From c633ddc98994de41159f6d2fe873205c4b284bd4 Mon Sep 17 00:00:00 2001 From: Martin Date: Sun, 28 Jul 2019 22:27:27 +0200 Subject: [PATCH 001/374] adapted for BioSignals ADC format --- Source/SampleBuffer.hpp | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index 86377b81..3cb9f774 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -9,18 +9,21 @@ #include "device.h" #ifdef ARM_CORTEX #include "arm_math.h" -#define AUDIO_SATURATE_SAMPLES +// #define AUDIO_SATURATE_SAMPLES #else #undef AUDIO_SATURATE_SAMPLES #endif //ARM_CORTEX +#define MULTIPLIER 2147483648 +// #define MULTIPLIER 8388608 +// #define MULTIPLIER 1073741824 class SampleBuffer : public AudioBuffer { protected: FloatArray left; FloatArray right; uint16_t size; - const float mul = 1/2147483648.0f; + const float mul = 1.0f/MULTIPLIER; public: SampleBuffer(int blocksize){ left = FloatArray::create(blocksize); @@ -29,8 +32,10 @@ class SampleBuffer : public AudioBuffer { void split32(int32_t* input, uint16_t blocksize){ size = blocksize; for(int i=0; i Date: Sat, 5 Oct 2019 12:03:30 +0200 Subject: [PATCH 002/374] comments --- GenSource/GenPatch.hpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/GenSource/GenPatch.hpp b/GenSource/GenPatch.hpp index 4f1dbc0e..9af60fbd 100644 --- a/GenSource/GenPatch.hpp +++ b/GenSource/GenPatch.hpp @@ -195,6 +195,9 @@ class GenPatch : public Patch { params[param_count++] = new GenParameter(this, context, name, (PatchParameterId)index, i); } } + // ins = num_inputs(); + // outs = num_outputs(); + // todo: assign unused outputs to output parameters, starting from the last registered input parametere } ~GenPatch() { From 4d3ea2a4ae175e86ed93410f2be61e2088383c53 Mon Sep 17 00:00:00 2001 From: Martin Date: Sat, 5 Oct 2019 12:13:05 +0200 Subject: [PATCH 003/374] force AUDIO_FORMAT_24B32 --- Source/PatchProgram.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Source/PatchProgram.cpp b/Source/PatchProgram.cpp index d3be97a5..9496fd1a 100644 --- a/Source/PatchProgram.cpp +++ b/Source/PatchProgram.cpp @@ -106,10 +106,11 @@ void setup(ProgramVector* pv){ } void run(ProgramVector* pv){ + pv->audio_format = AUDIO_FORMAT_24B32; #if 0 for(;;){ pv->programReady(); - memcpy(pv->audio_output, pv->audio_input, pv->audio_blocksize*2*sizeof(uint32_t)); + memcpy(pv->audio_output, pv->audio_input, pv->audio_blocksize*2*sizeof(int32_t)); } #else if(pv->audio_format == AUDIO_FORMAT_24B32){ @@ -138,8 +139,8 @@ void run(ProgramVector* pv){ processor.patch->processAudio(*samples); samples->comb16(pv->audio_output); } -#endif } +#endif } #if 0 From f2e943aba93eb60d0f5fa42957d12b05ca0dba59 Mon Sep 17 00:00:00 2001 From: Martin Date: Sat, 5 Oct 2019 16:39:24 +0200 Subject: [PATCH 004/374] updated to support 4-channel / multichannel configurations --- Source/PatchProgram.cpp | 61 +++++++++++++++-------- Source/ProgramVector.h | 7 +-- Source/SampleBuffer.hpp | 105 ++++++++++++++++++++++++++-------------- 3 files changed, 114 insertions(+), 59 deletions(-) diff --git a/Source/PatchProgram.cpp b/Source/PatchProgram.cpp index 9496fd1a..f6813789 100644 --- a/Source/PatchProgram.cpp +++ b/Source/PatchProgram.cpp @@ -101,46 +101,69 @@ void setup(ProgramVector* pv){ getProgramVector()->serviceCall(OWL_SERVICE_REQUEST_CALLBACK, midiTxArgs, 2); #endif /* USE_MIDI_CALLBACK */ - samples = new SampleBuffer(pv->audio_blocksize); + switch(pv->audio_format){ + case AUDIO_FORMAT_24B16_2X: + case AUDIO_FORMAT_24B24_2X: + case AUDIO_FORMAT_24B32_2X: + samples = new SampleBuffer(2, pv->audio_blocksize); + break; + case AUDIO_FORMAT_24B32_4X: + samples = new SampleBuffer(4, pv->audio_blocksize); + break; + default: + error(CONFIGURATION_ERROR_STATUS, "Unsupported audio format"); + break; + } #include "registerpatch.cpp" } void run(ProgramVector* pv){ - pv->audio_format = AUDIO_FORMAT_24B32; -#if 0 - for(;;){ - pv->programReady(); - memcpy(pv->audio_output, pv->audio_input, pv->audio_blocksize*2*sizeof(int32_t)); - } -#else - if(pv->audio_format == AUDIO_FORMAT_24B32){ + switch(pv->audio_format){ + case 0: for(;;){ pv->programReady(); - samples->split32(pv->audio_input, pv->audio_blocksize); + memcpy(pv->audio_output, pv->audio_input, pv->audio_blocksize*2*sizeof(int32_t)); + } + break; + case AUDIO_FORMAT_24B16_2X: + for(;;){ + pv->programReady(); + samples->split16(pv->audio_input, pv->audio_blocksize); processor.setParameterValues(pv->parameters); processor.patch->processAudio(*samples); - samples->comb32(pv->audio_output); + samples->comb16(pv->audio_output); } -#if 0 - }else if(pv->audio_format == AUDIO_FORMAT_24B24){ - for(;;){ + break; + case AUDIO_FORMAT_24B24_2X: + for(;;){ pv->programReady(); samples->split24(pv->audio_input, pv->audio_blocksize); processor.setParameterValues(pv->parameters); processor.patch->processAudio(*samples); samples->comb24(pv->audio_output); } -#endif - }else{ + break; + case AUDIO_FORMAT_24B32_2X: for(;;){ pv->programReady(); - samples->split16(pv->audio_input, pv->audio_blocksize); + samples->split32(pv->audio_input, pv->audio_blocksize); processor.setParameterValues(pv->parameters); processor.patch->processAudio(*samples); - samples->comb16(pv->audio_output); + samples->comb32(pv->audio_output); } + break; + case AUDIO_FORMAT_24B32_4X: + for(;;){ + pv->programReady(); + samples->split32x4(pv->audio_input, pv->audio_blocksize); + processor.setParameterValues(pv->parameters); + processor.patch->processAudio(*samples); + samples->comb32x4(pv->audio_output); + } + break; + default: + break; } -#endif } #if 0 diff --git a/Source/ProgramVector.h b/Source/ProgramVector.h index 5ce4b3c0..04d05016 100644 --- a/Source/ProgramVector.h +++ b/Source/ProgramVector.h @@ -21,9 +21,10 @@ #define OUT_OF_MEMORY_ERROR_STATUS -20 #define CONFIGURATION_ERROR_STATUS -30 -#define AUDIO_FORMAT_24B16 0x10 -#define AUDIO_FORMAT_24B24 0x18 -#define AUDIO_FORMAT_24B32 0x20 +#define AUDIO_FORMAT_24B16_2X 0x10 +#define AUDIO_FORMAT_24B24_2X 0x18 +#define AUDIO_FORMAT_24B32_2X 0x20 +#define AUDIO_FORMAT_24B32_4X 0x24 typedef enum { AUDIO_IDLE_STATUS = 0, diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index 3cb9f774..7c550f9b 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -14,28 +14,33 @@ #undef AUDIO_SATURATE_SAMPLES #endif //ARM_CORTEX -#define MULTIPLIER 2147483648 -// #define MULTIPLIER 8388608 -// #define MULTIPLIER 1073741824 +#define MULTIPLIER_31B 2147483648 +#define MULTIPLIER_30B 1073741824 +#define MULTIPLIER_23B 8388608 class SampleBuffer : public AudioBuffer { protected: - FloatArray left; - FloatArray right; + FloatArray* buffers; uint16_t size; - const float mul = 1.0f/MULTIPLIER; + size_t channels; public: - SampleBuffer(int blocksize){ - left = FloatArray::create(blocksize); - right = FloatArray::create(blocksize); + SampleBuffer(size_t channels, size_t blocksize) + :channels(channels), size(blocksize) { + buffers = new FloatArray[channels]; + for(size_t i=0; i> 24; *dest++ = qint >> 16; *dest++ = qint >> 8; *dest++ = qint; #ifdef AUDIO_SATURATE_SAMPLES - qint = __SSAT((q31_t)(right[i] * MULTIPLIER), 24); + qint = __SSAT((q31_t)(buffers[1][i] * MULTIPLIER_23B), 24); #else - qint = right[i] * MULTIPLIER; + qint = buffers[1][i] * MULTIPLIER_23B; #endif *dest++ = qint >> 24; *dest++ = qint >> 16; @@ -96,32 +126,32 @@ class SampleBuffer : public AudioBuffer { *dest++ = qint; } } -#endif void split16(int32_t* data, uint16_t blocksize){ + const float mul = 1.0f/MULTIPLIER_31B; uint16_t* input = (uint16_t*)data; size = blocksize; int32_t qint; for(int i=0; i 0u){ - qint = *l++ * 2147483648.0f; + qint = *l++ * MULTIPLIER_31B; *dst++ = qint >> 16; *dst++ = qint & 0xffff; - qint = *r++ * 2147483648.0f; + qint = *r++ * MULTIPLIER_31B; *dst++ = qint >> 16; *dst++ = qint & 0xffff; blkCnt--; @@ -129,15 +159,16 @@ class SampleBuffer : public AudioBuffer { } void clear(){ - left.clear(); - right.clear(); + for(size_t i=0; i Date: Sat, 5 Oct 2019 16:39:35 +0200 Subject: [PATCH 005/374] updated to support 4-channel / multichannel configurations --- LibSource/Patch.cpp | 6 ++++++ LibSource/Patch.h | 1 + 2 files changed, 7 insertions(+) diff --git a/LibSource/Patch.cpp b/LibSource/Patch.cpp index d29530fc..d057c8f7 100644 --- a/LibSource/Patch.cpp +++ b/LibSource/Patch.cpp @@ -28,6 +28,12 @@ int Patch::getBlockSize(){ return getProgramVector()->audio_blocksize; } +int Patch::getNumberOfChannels(){ + if(getProgramVector()->audio_format == AUDIO_FORMAT_24B32_4X) + return 4; + return 2; +} + float Patch::getParameterValue(PatchParameterId pid){ // return getInitialisingPatchProcessor()->getParameterValue(pid); // if(pid < getProgramVector()->parameters_size) diff --git a/LibSource/Patch.h b/LibSource/Patch.h index 905ad261..b769854d 100644 --- a/LibSource/Patch.h +++ b/LibSource/Patch.h @@ -60,6 +60,7 @@ class Patch { int getSamplesSinceButtonPressed(PatchButtonId bid); void setButton(PatchButtonId bid, uint16_t value, uint16_t samples=0); int getBlockSize(); + int getNumberOfChannels(); float getSampleRate(); AudioBuffer* createMemoryBuffer(int channels, int samples); float getElapsedBlockTime(); From 4dfb5662adf52e2fa029444680c57810f40db9b2 Mon Sep 17 00:00:00 2001 From: Martin Date: Sat, 5 Oct 2019 16:39:46 +0200 Subject: [PATCH 006/374] connect to any OWL- device --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index f08ef29f..4f61d124 100644 --- a/Makefile +++ b/Makefile @@ -54,7 +54,7 @@ endif PATCHIN ?= 2 PATCHOUT ?= 2 SLOT ?= 0 -OWLDEVICE ?= OWL-MIDI* +OWLDEVICE ?= OWL-* BUILD ?= $(BUILDROOT)/Build LDSCRIPT ?= $(BUILDROOT)/Source/flash.ld # LDSCRIPT ?= $(BUILDROOT)/Source/STM32F746ZGTx_FLASH.ld From dc10ebd6675a1a257f75fe794cb54236d4e5fdb8 Mon Sep 17 00:00:00 2001 From: Martin Date: Sat, 7 Dec 2019 15:23:32 +0100 Subject: [PATCH 007/374] support 7 and 8 channel biosignals output --- LibSource/Patch.cpp | 5 +++-- Source/PatchProgram.cpp | 31 +++++++++++++++++++------------ Source/ProgramVector.h | 5 ++++- Source/SampleBuffer.hpp | 38 ++++++++++++++++++++++++++++++-------- 4 files changed, 56 insertions(+), 23 deletions(-) diff --git a/LibSource/Patch.cpp b/LibSource/Patch.cpp index d057c8f7..ffe29a0d 100644 --- a/LibSource/Patch.cpp +++ b/LibSource/Patch.cpp @@ -29,8 +29,9 @@ int Patch::getBlockSize(){ } int Patch::getNumberOfChannels(){ - if(getProgramVector()->audio_format == AUDIO_FORMAT_24B32_4X) - return 4; + uint8_t format = getProgramVector()->audio_format; + if((format & 0xf0) == AUDIO_FORMAT_24B32) + return format & 0x0f; return 2; } diff --git a/Source/PatchProgram.cpp b/Source/PatchProgram.cpp index f6813789..6648d527 100644 --- a/Source/PatchProgram.cpp +++ b/Source/PatchProgram.cpp @@ -103,13 +103,17 @@ void setup(ProgramVector* pv){ #endif /* USE_MIDI_CALLBACK */ switch(pv->audio_format){ case AUDIO_FORMAT_24B16_2X: - case AUDIO_FORMAT_24B24_2X: - case AUDIO_FORMAT_24B32_2X: samples = new SampleBuffer(2, pv->audio_blocksize); break; case AUDIO_FORMAT_24B32_4X: samples = new SampleBuffer(4, pv->audio_blocksize); break; + case AUDIO_FORMAT_24B32_7X: + samples = new SampleBuffer(7, pv->audio_blocksize); + break; + case AUDIO_FORMAT_24B32_8X: + samples = new SampleBuffer(8, pv->audio_blocksize); + break; default: error(CONFIGURATION_ERROR_STATUS, "Unsupported audio format"); break; @@ -143,22 +147,25 @@ void run(ProgramVector* pv){ samples->comb24(pv->audio_output); } break; + // case AUDIO_FORMAT_24B32_2X: + // for(;;){ + // pv->programReady(); + // samples->split32(pv->audio_input, pv->audio_blocksize); + // processor.setParameterValues(pv->parameters); + // processor.patch->processAudio(*samples); + // samples->comb32(pv->audio_output); + // } + // break; case AUDIO_FORMAT_24B32_2X: - for(;;){ - pv->programReady(); - samples->split32(pv->audio_input, pv->audio_blocksize); - processor.setParameterValues(pv->parameters); - processor.patch->processAudio(*samples); - samples->comb32(pv->audio_output); - } - break; case AUDIO_FORMAT_24B32_4X: + case AUDIO_FORMAT_24B32_7X: + case AUDIO_FORMAT_24B32_8X: for(;;){ pv->programReady(); - samples->split32x4(pv->audio_input, pv->audio_blocksize); + samples->split32xN(pv->audio_input, pv->audio_blocksize); processor.setParameterValues(pv->parameters); processor.patch->processAudio(*samples); - samples->comb32x4(pv->audio_output); + samples->comb32xN(pv->audio_output); } break; default: diff --git a/Source/ProgramVector.h b/Source/ProgramVector.h index 04d05016..cf08423c 100644 --- a/Source/ProgramVector.h +++ b/Source/ProgramVector.h @@ -23,8 +23,11 @@ #define AUDIO_FORMAT_24B16_2X 0x10 #define AUDIO_FORMAT_24B24_2X 0x18 -#define AUDIO_FORMAT_24B32_2X 0x20 +#define AUDIO_FORMAT_24B32 0x20 +#define AUDIO_FORMAT_24B32_2X 0x22 #define AUDIO_FORMAT_24B32_4X 0x24 +#define AUDIO_FORMAT_24B32_7X 0x27 +#define AUDIO_FORMAT_24B32_8X 0x28 typedef enum { AUDIO_IDLE_STATUS = 0, diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index 7c550f9b..db7a604e 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -21,7 +21,7 @@ class SampleBuffer : public AudioBuffer { protected: FloatArray* buffers; - uint16_t size; + size_t size; size_t channels; public: SampleBuffer(size_t channels, size_t blocksize) @@ -38,14 +38,14 @@ class SampleBuffer : public AudioBuffer { void split32(int32_t* input, uint16_t blocksize){ const float mul = 1.0f/MULTIPLIER_31B; size = blocksize; - for(int i=0; i Date: Sat, 7 Dec 2019 15:55:19 +0100 Subject: [PATCH 008/374] multichannel 32-bit support --- Source/PatchProgram.cpp | 13 ++--------- Source/SampleBuffer.hpp | 52 ++--------------------------------------- 2 files changed, 4 insertions(+), 61 deletions(-) diff --git a/Source/PatchProgram.cpp b/Source/PatchProgram.cpp index 6648d527..e2955780 100644 --- a/Source/PatchProgram.cpp +++ b/Source/PatchProgram.cpp @@ -147,25 +147,16 @@ void run(ProgramVector* pv){ samples->comb24(pv->audio_output); } break; - // case AUDIO_FORMAT_24B32_2X: - // for(;;){ - // pv->programReady(); - // samples->split32(pv->audio_input, pv->audio_blocksize); - // processor.setParameterValues(pv->parameters); - // processor.patch->processAudio(*samples); - // samples->comb32(pv->audio_output); - // } - // break; case AUDIO_FORMAT_24B32_2X: case AUDIO_FORMAT_24B32_4X: case AUDIO_FORMAT_24B32_7X: case AUDIO_FORMAT_24B32_8X: for(;;){ pv->programReady(); - samples->split32xN(pv->audio_input, pv->audio_blocksize); + samples->split32(pv->audio_input, pv->audio_blocksize); processor.setParameterValues(pv->parameters); processor.patch->processAudio(*samples); - samples->comb32xN(pv->audio_output); + samples->comb32(pv->audio_output); } break; default: diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index db7a604e..be72dda4 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -35,29 +35,8 @@ class SampleBuffer : public AudioBuffer { FloatArray::destroy(buffers[i]); delete[] buffers; } - void split32(int32_t* input, uint16_t blocksize){ - const float mul = 1.0f/MULTIPLIER_31B; - size = blocksize; - for(size_t i=0; i Date: Fri, 10 Jan 2020 15:45:02 +0100 Subject: [PATCH 009/374] updated divisor to match Noctua --- Source/SampleBuffer.hpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index be72dda4..6b6e2755 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -9,7 +9,7 @@ #include "device.h" #ifdef ARM_CORTEX #include "arm_math.h" -// #define AUDIO_SATURATE_SAMPLES +#define AUDIO_SATURATE_SAMPLES #else #undef AUDIO_SATURATE_SAMPLES #endif //ARM_CORTEX @@ -37,7 +37,7 @@ class SampleBuffer : public AudioBuffer { } void split32(int32_t* input, uint16_t blocksize){ - const float mul = 1.0f/MULTIPLIER_31B; + const float mul = 1.0f/MULTIPLIER_23B; size = blocksize; for(size_t i=0; i Date: Fri, 24 Jan 2020 15:57:30 +0100 Subject: [PATCH 010/374] tidier hex --- Source/SampleBuffer.hpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index 6b6e2755..02e5cbc2 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -14,9 +14,9 @@ #undef AUDIO_SATURATE_SAMPLES #endif //ARM_CORTEX -#define MULTIPLIER_31B 2147483648 -#define MULTIPLIER_30B 1073741824 -#define MULTIPLIER_23B 8388608 +#define MULTIPLIER_31B 0x80000000 +#define MULTIPLIER_30B 0x40000000 +#define MULTIPLIER_23B 0x00800000 class SampleBuffer : public AudioBuffer { protected: @@ -41,7 +41,7 @@ class SampleBuffer : public AudioBuffer { size = blocksize; for(size_t i=0; i Date: Fri, 22 Jan 2021 17:04:47 +0100 Subject: [PATCH 011/374] disable AUDIO_SATURATE_SAMPLES (doesn't work with current Noctua fw) --- Source/SampleBuffer.hpp | 1 + 1 file changed, 1 insertion(+) diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index 02e5cbc2..860cf9a7 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -17,6 +17,7 @@ #define MULTIPLIER_31B 0x80000000 #define MULTIPLIER_30B 0x40000000 #define MULTIPLIER_23B 0x00800000 +#undef AUDIO_SATURATE_SAMPLES class SampleBuffer : public AudioBuffer { protected: From 5020a7fd88877cf2f2c8f41f4e6e2abdf50efba4 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Thu, 4 Feb 2021 02:57:19 +0100 Subject: [PATCH 012/374] re-enable saturate --- Source/SampleBuffer.hpp | 1 - 1 file changed, 1 deletion(-) diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index 860cf9a7..02e5cbc2 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -17,7 +17,6 @@ #define MULTIPLIER_31B 0x80000000 #define MULTIPLIER_30B 0x40000000 #define MULTIPLIER_23B 0x00800000 -#undef AUDIO_SATURATE_SAMPLES class SampleBuffer : public AudioBuffer { protected: From fdd75d29b4201c2918431c188aa94eb2231a804a Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Tue, 9 Feb 2021 17:25:53 +0100 Subject: [PATCH 013/374] fix initialisation order --- LibSource/Resource.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/LibSource/Resource.h b/LibSource/Resource.h index 2cb33a9d..2225b16c 100644 --- a/LibSource/Resource.h +++ b/LibSource/Resource.h @@ -93,10 +93,10 @@ class Resource { ~Resource(){} protected: Resource(const char* name, size_t size, void* data) - : name(name), size(size), data((uint8_t*)data) {} + : name(name), size(size), data((uint8_t*)data), allocated(false) {} const char* name; - uint8_t* data; size_t size; + uint8_t* data; bool allocated; }; #endif From 130803f939c0037de4ba9c01c8c0e3441696379e Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Fri, 12 Feb 2021 18:06:27 +0100 Subject: [PATCH 014/374] added 'perform' target --- Makefile | 7 +- TestPatches/PatchRun.cpp | 157 ++++++++++++++++++++++++++++++++++++++ TestPatches/PatchTest.cpp | 15 +++- test.mk | 18 +++-- 4 files changed, 190 insertions(+), 7 deletions(-) create mode 100644 TestPatches/PatchRun.cpp diff --git a/Makefile b/Makefile index 606012dd..c1599353 100644 --- a/Makefile +++ b/Makefile @@ -88,11 +88,12 @@ DEPS += $(BUILD)/registerpatch.cpp $(BUILD)/registerpatch.h $(BUILD)/Source/star all: libs patch -.PHONY: .FORCE patch libs faust gen heavy soul maximilian web minify map as test check tables resource size clean realclean sysex run store docs help +.PHONY: .FORCE patch libs faust gen heavy soul maximilian web minify map as test perform check tables resource size clean realclean sysex run store docs help .FORCE: @mkdir -p $(BUILD)/Source @mkdir -p $(BUILD)/web + @mkdir -p $(BUILD)/Test $(BUILD)/registerpatch.cpp: .FORCE @echo "REGISTER_PATCH($(PATCHCLASS), \"$(PATCHNAME)\", $(PATCHIN), $(PATCHOUT));" > $@ @@ -177,7 +178,11 @@ as: patch ## build assembly file (Build/patch.s) test: $(DEPS) ## run test patch @$(MAKE) -s -f test.mk test +perform: $(DEPS) ## run patch locally + @$(MAKE) -s -f test.mk perform + check: patch ## run tests (compile dummy patch) + @$(MAKE) -s TEST=ShortArrayTest test help: ## show this help @echo 'Usage: make [target] ...' diff --git a/TestPatches/PatchRun.cpp b/TestPatches/PatchRun.cpp new file mode 100644 index 00000000..dd1205ed --- /dev/null +++ b/TestPatches/PatchRun.cpp @@ -0,0 +1,157 @@ +#include +#include + +#include "heap.h" +void *pvPortMalloc( size_t xWantedSize ){ + return malloc(xWantedSize); +} +void vPortFree( void *pv ){ + free(pv); +} +#include "basicmaths.h" +#include "message.h" +#include "Patch.h" +#include "ProgramVector.h" +#include "PatchProcessor.h" +#include "SampleBuffer.hpp" + +#include "MemoryBuffer.hpp" +AudioBuffer* AudioBuffer::create(int channels, int samples){ + return new ManagedMemoryBuffer(channels, samples); +} +AudioBuffer::~AudioBuffer(){} + +#include "registerpatch.h" + +#define SAMPLE_RATE 48000 +#define CHANNELS 2 +#define BLOCKSIZE 128 + +extern "C" { + // http://www.keil.com/forum/60479/ + void arm_bitreversal_32(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab) +{ + uint32_t r3 = (bitRevLen + 1) / 2; + uint32_t *r2, *r6; + uint32_t r4, r5; + while(r3--) + { + r2 = (uint32_t *)((uint32_t)pSrc + pBitRevTab[0]); + r6 = (uint32_t *)((uint32_t)pSrc + pBitRevTab[1]); + r5 = r2[0]; + r4 = r6[0]; + r6[0] = r5; + r2[0] = r4; + r5 = r2[1]; + r4 = r6[1]; + r6[1] = r5; + r2[1] = r4; + pBitRevTab += 2; + } +} + +void arm_bitreversal_16(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab) +{ + #warning TODO! + // ASSERT(false, "arm_bitreversal_16"); +} +} + +PatchProcessor processor; +ProgramVector programVector; + +void assert_failed(const char* msg, const char* location, int line){ + printf("Assertion failed: %s, in %s line %d\n", msg, location, line); + exit(-1); +} + +void debugMessage(char const* msg, int a){ + printf("%s %d\n", msg, a); +} + +void debugMessage(char const* msg, float a){ + printf("%s %f\n", msg, a); +} + +void debugMessage(char const* msg, int a, int b){ + printf("%s %d %d\n", msg, a, b); +} + +void debugMessage(char const* msg, float a, float b){ + printf("%s %f %f\n", msg, a, b); +} + +void debugMessage(char const* msg, int a, int b, int c){ + printf("%s %d %d %d\n", msg, a, b, c); +} + +void debugMessage(char const* msg, float a, float b, float c){ + printf("%s %f %f %f\n", msg, a, b, c); +} + +void debugMessage(char const* msg){ + printf("%s\n", msg); +} + +Patch::Patch(){} +Patch::~Patch(){} +PatchProcessor::PatchProcessor(){} +PatchProcessor::~PatchProcessor(){} +void Patch::registerParameter(PatchParameterId pid, const char* name){ + printf("Register parameter %c: %s\n", 'A'+pid, name); +} +void Patch::processMidi(MidiMessage msg){} +void Patch::sendMidi(MidiMessage msg){ + printf("Sending MIDI [%x:%x:%x:%x]\n", msg.data[0], msg.data[1], msg.data[2], msg.data[3]); +} + +float Patch::getSampleRate(){ + return SAMPLE_RATE; +} + +int Patch::getBlockSize(){ + return BLOCKSIZE; +} + +int Patch::getNumberOfChannels(){ + return CHANNELS; +} + +float Patch::getParameterValue(PatchParameterId pid){ + return 0.0f; +} + +void Patch::setParameterValue(PatchParameterId pid, float value){ + printf("Set parameter %c: %d\n", 'A'+pid, value); +} + +void Patch::setButton(PatchButtonId bid, uint16_t value, uint16_t samples){ + printf("Set button %c: %d\n", 'A'+bid, value); +} + +bool Patch::isButtonPressed(PatchButtonId bid){ + return false; +} + +PatchProcessor* getInitialisingPatchProcessor(){ + return &processor; +} + +static Patch* testpatch = NULL; +void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* patch){ + //if(patch == NULL) + // error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory"); + testpatch = patch; +} + +#define REGISTER_PATCH(T, STR, IN, OUT) registerPatch(STR, IN, OUT, new T) + +int main(int argc, char** argv){ +#include "registerpatch.cpp" + ASSERT(testpatch != NULL, "Missing patch"); + int ret = 0; + SampleBuffer* samples = new SampleBuffer(128); + testpatch->processAudio(*samples); + delete samples; + return ret; +} diff --git a/TestPatches/PatchTest.cpp b/TestPatches/PatchTest.cpp index 17a874e9..bb08c507 100644 --- a/TestPatches/PatchTest.cpp +++ b/TestPatches/PatchTest.cpp @@ -1,3 +1,12 @@ +#include "malloc.h" +#include "heap.h" +void *pvPortMalloc( size_t xWantedSize ){ + return malloc(xWantedSize); +} +void vPortFree( void *pv ){ + free(pv); +} +#include "basicmaths.h" #include "message.h" #include "TestPatch.hpp" #include "ProgramVector.h" @@ -32,7 +41,7 @@ extern "C" { void arm_bitreversal_16(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab) { #warning TODO! - // ASSERT(false, "arm_bitreversal_16"); + ASSERT(false, "arm_bitreversal_16"); } } @@ -77,6 +86,10 @@ Patch::~Patch(){} PatchProcessor::PatchProcessor(){} PatchProcessor::~PatchProcessor(){} int Patch::getBlockSize(){return 128;} +void Patch::processMidi(MidiMessage msg){} +void Patch::sendMidi(MidiMessage msg){ + printf("Sending MIDI [%x:%x:%x:%x]\n", msg.data[0], msg.data[1], msg.data[2], msg.data[3]); +} PatchProcessor* getInitialisingPatchProcessor(){ return &processor; diff --git a/test.mk b/test.mk index e0159da4..69811296 100644 --- a/test.mk +++ b/test.mk @@ -18,6 +18,7 @@ GENSOURCE = $(BUILD)/Source TESTPATCHES = $(BUILDROOT)/TestPatches CPPFLAGS = -g -Wall -m32 CPPFLAGS += -I$(SOURCE) +CPPFLAGS += -I$(PATCHSOURCE) CPPFLAGS += -I$(LIBSOURCE) CPPFLAGS += -I$(GENSOURCE) CPPFLAGS += -I$(TESTPATCHES) @@ -47,7 +48,7 @@ LDFLAGS = -Wl,--gc-sections CXXFLAGS = -std=c++11 # object files -OBJS = $(C_SRC:%.c=$(BUILD)/%.o) $(CPP_SRC:%.cpp=$(BUILD)/%.o) +OBJS = $(C_SRC:%.c=$(BUILD)/Test/%.o) $(CPP_SRC:%.cpp=$(BUILD)/Test/%.o) # Set up search path vpath %.cpp $(SOURCE) @@ -169,16 +170,23 @@ OBJS += $(DSPLIB)/StatisticsFunctions/arm_var_q15.o OBJS += $(DSPLIB)/BasicMathFunctions/arm_add_q31.o # include $(BUILDROOT)/libs.mk +.PHONY: perform test + +perform: $(TESTPATCHES)/PatchRun.cpp $(DEPS) $(OBJS) + @$(CXX) $(CPPFLAGS) $(CXXFLAGS) $(TESTPATCHES)/PatchRun.cpp -I$(BUILD) $(OBJS) -o $(BUILD)/Test/patch + @$(BUILD)/Test/patch + + test: $(TESTPATCHES)/PatchTest.cpp $(DEPS) $(OBJS) - @$(CXX) $(CPPFLAGS) $(CXXFLAGS) $(TESTPATCHES)/PatchTest.cpp -I$(BUILD) $(OBJS) -o $(BUILD)/$@ - @$(BUILD)/$@ + @$(CXX) $(CPPFLAGS) $(CXXFLAGS) $(TESTPATCHES)/PatchTest.cpp -I$(BUILD) $(OBJS) -o $(BUILD)/Test/$@ + @$(BUILD)/Test/$@ # compile and generate dependency info -$(BUILD)/%.o: %.c +$(BUILD)/Test/%.o: %.c @$(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ @$(CC) -MM -MT"$@" $(CPPFLAGS) $(CFLAGS) $< > $(@:.o=.d) -$(BUILD)/%.o: %.cpp +$(BUILD)/Test/%.o: %.cpp @$(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $< -o $@ @$(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) $< > $(@:.o=.d) From aad0deb108842a943748619219df61225e360ce0 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Fri, 12 Feb 2021 19:09:31 +0100 Subject: [PATCH 015/374] make updates --- Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index c1599353..a5dbaa3a 100644 --- a/Makefile +++ b/Makefile @@ -175,13 +175,13 @@ as: patch ## build assembly file (Build/patch.s) @$(MAKE) -s -f compile.mk as @echo Built $(PATCHNAME) assembly in $(BUILD)/$(TARGET).s -test: $(DEPS) ## run test patch +test: $(DEPS) ## run test patch locally @$(MAKE) -s -f test.mk test perform: $(DEPS) ## run patch locally @$(MAKE) -s -f test.mk perform -check: patch ## run tests (compile dummy patch) +check: ## run tests @$(MAKE) -s TEST=ShortArrayTest test help: ## show this help From f84da7930e8746de0fc21619b5be6243e000e838 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Sat, 13 Feb 2021 01:48:54 +0100 Subject: [PATCH 016/374] clean up code --- TestPatches/PatchRun.cpp | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) diff --git a/TestPatches/PatchRun.cpp b/TestPatches/PatchRun.cpp index dd1205ed..79ed13f8 100644 --- a/TestPatches/PatchRun.cpp +++ b/TestPatches/PatchRun.cpp @@ -2,6 +2,7 @@ #include #include "heap.h" +// define these before defining the malloc/free macros void *pvPortMalloc( size_t xWantedSize ){ return malloc(xWantedSize); } @@ -14,13 +15,7 @@ void vPortFree( void *pv ){ #include "ProgramVector.h" #include "PatchProcessor.h" #include "SampleBuffer.hpp" - #include "MemoryBuffer.hpp" -AudioBuffer* AudioBuffer::create(int channels, int samples){ - return new ManagedMemoryBuffer(channels, samples); -} -AudioBuffer::~AudioBuffer(){} - #include "registerpatch.h" #define SAMPLE_RATE 48000 @@ -57,9 +52,6 @@ void arm_bitreversal_16(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t } } -PatchProcessor processor; -ProgramVector programVector; - void assert_failed(const char* msg, const char* location, int line){ printf("Assertion failed: %s, in %s line %d\n", msg, location, line); exit(-1); @@ -93,6 +85,11 @@ void debugMessage(char const* msg){ printf("%s\n", msg); } +AudioBuffer* AudioBuffer::create(int channels, int samples){ + return new ManagedMemoryBuffer(channels, samples); +} +AudioBuffer::~AudioBuffer(){} + Patch::Patch(){} Patch::~Patch(){} PatchProcessor::PatchProcessor(){} @@ -133,14 +130,18 @@ bool Patch::isButtonPressed(PatchButtonId bid){ return false; } +static PatchProcessor processor; +ProgramVector programVector; +static Patch* testpatch = NULL; + PatchProcessor* getInitialisingPatchProcessor(){ return &processor; } -static Patch* testpatch = NULL; void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* patch){ //if(patch == NULL) // error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory"); + printf("Register patch %s (%d ins, %d outs)\n", name, inputs, outputs); testpatch = patch; } From 217ba93959dc92f0abcfd32444c3626f8999ebaa Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Sat, 13 Feb 2021 03:06:48 +0100 Subject: [PATCH 017/374] added destructor to destroy allocated FloatArrays --- Source/SampleBuffer.hpp | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp index 86377b81..69ef4c2a 100644 --- a/Source/SampleBuffer.hpp +++ b/Source/SampleBuffer.hpp @@ -26,6 +26,10 @@ class SampleBuffer : public AudioBuffer { left = FloatArray::create(blocksize); right = FloatArray::create(blocksize); } + ~SampleBuffer(){ + FloatArray::destroy(left); + FloatArray::destroy(right); + } void split32(int32_t* input, uint16_t blocksize){ size = blocksize; for(int i=0; i Date: Sat, 13 Feb 2021 03:07:50 +0100 Subject: [PATCH 018/374] read/write wav and pass through patch --- TestPatches/PatchRun.cpp | 98 ++++++++++++++++++++++++++++++++++++++-- TestPatches/wav.h | 67 +++++++++++++++++++++++++++ 2 files changed, 160 insertions(+), 5 deletions(-) create mode 100644 TestPatches/wav.h diff --git a/TestPatches/PatchRun.cpp b/TestPatches/PatchRun.cpp index 79ed13f8..f81a6de0 100644 --- a/TestPatches/PatchRun.cpp +++ b/TestPatches/PatchRun.cpp @@ -14,14 +14,62 @@ void vPortFree( void *pv ){ #include "Patch.h" #include "ProgramVector.h" #include "PatchProcessor.h" -#include "SampleBuffer.hpp" #include "MemoryBuffer.hpp" #include "registerpatch.h" +#include "wav.h" #define SAMPLE_RATE 48000 #define CHANNELS 2 #define BLOCKSIZE 128 +static float parameter_values[40] = {}; +static uint32_t button_values = 0; + +class SampleBuffer : public AudioBuffer { +protected: + FloatArray left; + FloatArray right; + uint16_t size; + const float mul = 1/2147483648.0f; +public: + SampleBuffer(int blocksize){ + left = FloatArray::create(blocksize); + right = FloatArray::create(blocksize); + } + ~SampleBuffer(){ + FloatArray::destroy(left); + FloatArray::destroy(right); + } + void split16(int16_t* input, uint16_t blocksize){ + size = blocksize; + for(int i=0; iprocessAudio(*samples); + SampleBuffer* samples = new SampleBuffer(BLOCKSIZE); + if(argc > 1){ + const char* input_filename = argv[1]; + WavHeader *wav_header = new WavHeader(); + int16_t* data = NULL; + wavread(wav_header, input_filename, &data); + ASSERT(wav_header->num_channels == CHANNELS, "Incorrect number of channels in input file"); + // ASSERT(wav_header->sample_rate == SAMPLE_RATE, "Incorrect sample rate in input file"); + ASSERT(wav_header->bps == 16, "Incorrect number of bits per sample in input file"); + const int channels = wav_header->num_channels; + const int len = wav_header->datachunk_size/(wav_header->fmtchunk_size/8); + int16_t* src = data; + int16_t* end = data+len; + while(src+BLOCKSIZE <= end){ + samples->split16(src, BLOCKSIZE); + testpatch->processAudio(*samples); + samples->comb16(src); + src += BLOCKSIZE*channels; + } + if(argc > 2){ + const char* output_filename = argv[2]; + wavwrite(wav_header, output_filename, data); + } + free(data); + delete wav_header; + }else{ + testpatch->processAudio(*samples); + } delete samples; + delete testpatch; return ret; } diff --git a/TestPatches/wav.h b/TestPatches/wav.h new file mode 100644 index 00000000..10ba7977 --- /dev/null +++ b/TestPatches/wav.h @@ -0,0 +1,67 @@ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +typedef struct { + char chunk_id[4]; + uint32_t chunk_size; + char format[4]; + char fmtchunk_id[4]; + uint32_t fmtchunk_size; + uint16_t audio_format; + uint16_t num_channels; + uint32_t sample_rate; + uint32_t byte_rate; + uint16_t block_align; + uint16_t bps; + char datachunk_id[4]; + uint32_t datachunk_size; +}WavHeader; +void wavread(WavHeader *header, const char *file_name, int16_t **samples) +{ + int fd; + if (!file_name) + errx(1, "Filename not specified"); + if ((fd = open(file_name, O_RDONLY)) < 1) + errx(1, "Error opening file"); + if (!header) + header = (WavHeader*)malloc(sizeof(WavHeader)); + if (read(fd, header, sizeof(WavHeader)) < sizeof(WavHeader)) + errx(1, "File broken: header"); + if (strncmp(header->chunk_id, "RIFF", 4) || + strncmp(header->format, "WAVE", 4)) + errx(1, "Not a WAV file"); + if (header->audio_format != 1) + warnx("Only PCM encoding supported"); + if(header->datachunk_size == 0) + warnx("Data chunk size should not be zero"); + if (*samples) free(*samples); + *samples = (int16_t*)malloc(header->datachunk_size); + if (!*samples) + errx(1, "Error allocating memory"); + if (read(fd, *samples, header->datachunk_size) < header->datachunk_size) + errx(1, "File broken: samples"); + close(fd); +} +void wavwrite(WavHeader *header, const char *file_name, int16_t *samples) +{ + int fd; + if (!file_name) + errx(1, "Filename not specified"); + if (!samples) + errx(1, "Samples buffer not specified"); + if ((fd = creat(file_name, 0666)) < 1) + errx(1, "Error creating file"); + if (write(fd, header, sizeof(WavHeader)) < sizeof(WavHeader)) + errx(1, "Error writing header"); + if (write(fd, samples, header->datachunk_size) < header->datachunk_size) + errx(1, "Error writing samples"); + close(fd); +} From af1973dc92add9ce6a454e07bd4bce7fcb16a260 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Sat, 13 Feb 2021 03:09:24 +0100 Subject: [PATCH 019/374] updated dependencies --- test.mk | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/test.mk b/test.mk index 69811296..afa39edd 100644 --- a/test.mk +++ b/test.mk @@ -1,14 +1,17 @@ BUILDROOT ?= . -C_SRC = basicmaths.c -C_SRC += kiss_fft.c -C_SRC += fastpow.c fastlog.c -CPP_SRC += FloatArray.cpp -CPP_SRC += ShortArray.cpp +C_SRC = kiss_fft.c +C_SRC += basicmaths.c fastpow.c fastlog.c # sbrk.c heap_5.c +CPP_SRC = operators.cpp system_tables.cpp # message.cpp main.cpp +# CPP_SRC += PatchProcessor.cpp Patch.cpp +CPP_SRC += FloatArray.cpp ComplexFloatArray.cpp FastFourierTransform.cpp +CPP_SRC += ShortArray.cpp # ComplexShortArray.cpp ShortFastFourierTransform.cpp CPP_SRC += Envelope.cpp VoltsPerOctave.cpp Window.cpp CPP_SRC += WavetableOscillator.cpp PolyBlepOscillator.cpp CPP_SRC += SmoothValue.cpp # PatchParameter.cpp -CPP_SRC += system_tables.cpp +CPP_SRC += MonochromeScreenPatch.cpp ColourScreenPatch.cpp +CPP_SRC += Resource.cpp +C_SRC += font.c BUILD ?= $(BUILDROOT)/Build From 0756597ce25c136e7a2f6fbcc678ad793274df35 Mon Sep 17 00:00:00 2001 From: antisvin Date: Sun, 14 Feb 2021 19:51:33 +0300 Subject: [PATCH 020/374] Soundfiles support --- FaustCode/WaveReader.h | 256 +++++++++++++++++++++++++++++++++++ FaustCode/owl.cpp | 295 +++++++++++++++++++++++++++++++++++++++-- faust.mk | 3 +- 3 files changed, 542 insertions(+), 12 deletions(-) create mode 100644 FaustCode/WaveReader.h diff --git a/FaustCode/WaveReader.h b/FaustCode/WaveReader.h new file mode 100644 index 00000000..b9e9f5dd --- /dev/null +++ b/FaustCode/WaveReader.h @@ -0,0 +1,256 @@ +/************************** BEGIN WaveReader.h **************************/ +/************************************************************************ + FAUST Architecture File + Copyright (C) 2020 GRAME, Centre National de Creation Musicale + --------------------------------------------------------------------- + This Architecture section is free software; you can redistribute it + and/or modify it under the terms of the GNU General Public License + as published by the Free Software Foundation; either version 3 of + the License, or (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; If not, see . + + EXCEPTION : As a special exception, you may create a larger work + that contains this FAUST architecture section and distribute + that work under terms of your choice, so long as this FAUST + architecture section is not modified. + ************************************************************************/ + +#ifndef __WaveReader__ +#define __WaveReader__ + +#undef min +#undef max + +#include +#include "Resource.h" + +// WAVE file description +class WaveFile { +public: + // The canonical WAVE format starts with the RIFF header + + /** + Variable: chunk_id + Contains the letters "RIFF" in ASCII form (0x52494646 big-endian form). + **/ + int chunk_id; + + /** + Variable: chunk_size + 36 + SubChunk2Size, or more precisely: 4 + (8 + SubChunk1Size) + (8 + SubChunk2Size) + This is the size of the rest of the chunk following this number. + This is the size of the entire file in bytes minus 8 bytes for the + two fields not included in this count: ChunkID and ChunkSize. + **/ + int chunk_size; + + /** + Variable: format + Contains the letters "WAVE" (0x57415645 big-endian form). + **/ + int format; + + // The "WAVE" format consists of two subchunks: "fmt " and "data": + // The "fmt " subchunk describes the sound data's format: + + /** + Variable: subchunk_1_id + Contains the letters "fmt " (0x666d7420 big-endian form). + **/ + int subchunk_1_id; + + /** + Variable: subchunk_1_size + 16 for PCM. This is the size of the rest of the Subchunk which follows this number. + **/ + int subchunk_1_size; + + /** + Variable: audio_format + PCM = 1 (i.e. Linear quantization) Values other than 1 indicate some form of compression. + **/ + short audio_format; + + /** + Variable: num_channels + Mono = 1, Stereo = 2, etc. + **/ + short num_channels; + + /** + Variable: sample_rate + 8000, 44100, etc. + **/ + int sample_rate; + + /** + Variable: byte_rate + == SampleRate * NumChannels * BitsPerSample/8 + **/ + int byte_rate; + + /** + Variable: block_align + == NumChannels * BitsPerSample/8 + The number of bytes for one sample including all channels. I wonder what happens + when this number isn't an integer? + **/ + short block_align; + + /** + Variable: bits_per_sample + 8 bits = 8, 16 bits = 16, etc. + **/ + short bits_per_sample; + + /** + Here should come some extra parameters which i will avoid. + **/ + + // The "data" subchunk contains the size of the data and the actual sound: + + /** + Variable: subchunk_2_id + Contains the letters "data" (0x64617461 big-endian form). + **/ + int subchunk_2_id; + + /** + Variable: subchunk_2_size + == NumSamples * NumChannels * BitsPerSample/8 + This is the number of bytes in the data. You can also think of this as the size + of the read of the subchunk following this number. + **/ + int subchunk_2_size; + + /** + Variable: data + The actual sound data. + **/ + char* data; + +}; + +// Base reader +class WaveReader { +public: + WaveFile* fWave; + + WaveReader() { + fWave = new WaveFile(); + } + + virtual ~WaveReader() { + if (fWave->data != NULL) + delete[] fWave->data; + delete fWave; + } + + bool loadWaveHeader() { + char buffer[4]; + + read(buffer, 4); + if (strncmp(buffer, "RIFF", 4) != 0) { + debugMessage("Not a valid WAV file!"); + return false; + } + + fWave->chunk_id = toInt(buffer, 4); + + read(buffer, 4); + fWave->chunk_size = toInt(buffer, 4); + + read(buffer, 4); + fWave->format = toInt(buffer, 4); + + read(buffer, 4); + fWave->subchunk_1_id = toInt(buffer, 4); + + read(buffer, 4); + fWave->subchunk_1_size = toInt(buffer, 4); + + read(buffer, 2); + fWave->audio_format = toInt(buffer, 2); + read(buffer, 2); + fWave->num_channels = toInt(buffer, 2); + + read(buffer, 4); + fWave->sample_rate = toInt(buffer, 4); + + read(buffer, 4); + fWave->byte_rate = toInt(buffer, 4); + + read(buffer, 2); + fWave->block_align = toInt(buffer, 2); + read(buffer, 2); + fWave->bits_per_sample = toInt(buffer, 2); + + read(buffer, 4); + if (strncmp(buffer, "data", 4) != 0) { + read(buffer, 4); + int _extra_size = toInt(buffer, 4); + char _extra_data[_extra_size]; + read(_extra_data, _extra_size); + read(buffer, 4); + fWave->subchunk_2_id = toInt(buffer, 4); + } else { + fWave->subchunk_2_id = toInt(buffer, 4); + } + + read(buffer, 4); + fWave->subchunk_2_size = toInt(buffer, 4); + return true; + } + + void loadWave() + { + // Read sound data + fWave->data = new char[fWave->subchunk_2_size]; + read(fWave->data, fWave->subchunk_2_size); + } + + virtual void read(char* buffer, unsigned int size) = 0; + +protected: + inline int toInt(char* buffer, int len) + { + int a = 0; + for(int i = 0; i < len; i++) { + ((char*)&a)[i] = buffer[i]; + } + return a; + } +}; + +/* + * WAV file reader that handles resource parser + */ +class WaveResourceReader : public WaveReader { +public: + WaveResourceReader(const char* name) : + offset(0) { + resource = Resource::open(name); + }; + + ~WaveResourceReader() { + Resource::destroy(resource); + }; + + void read(char* buffer, unsigned int size) override { + size_t read_len = resource->read((void*)buffer, size, offset); + offset += read_len; + } +private: + Resource* resource; + size_t offset; +}; + +#endif +/************************** END WaveReader.h **************************/ diff --git a/FaustCode/owl.cpp b/FaustCode/owl.cpp index 5919c24d..a8a275c8 100644 --- a/FaustCode/owl.cpp +++ b/FaustCode/owl.cpp @@ -38,12 +38,23 @@ #include "Patch.h" #include "VoltsPerOctave.h" +#include "Resource.h" +#include "WaveReader.h" // We have to undefine min/max from OWL's basicmaths.h, otherwise they cause // errors when Faust calls functions with the same names in std:: namespace #undef min #undef max +// Parent soundfile object uses exceptions in one of its method. +// This is probably the easiest may to make GCC happy about it when we compile +// with exceptions disabled. +#define try if(true) +#define catch(x) if(false) + +#define MAX_SOUNDFILES 32 +// This is just value for upper limit - actual memory used depends only on number of files loaded + #include #include @@ -53,6 +64,8 @@ #include "faust/dsp/dsp.h" #include "faust/gui/UI.h" #include "faust/gui/meta.h" +#include "faust/gui/Soundfile.h" + static float fKey, fFreq, fGain, fGate; static float fBend = 1.0f; @@ -347,6 +360,194 @@ class OwlButton : public OwlParameterBase { } }; +/************************************************************************************** + * + * OwlResourceReader: Reads resources from flash storage and returns Soundfile objects. + * + * This is based on SoundfileReader in faust/gui/Soundfile.h with some changes: + * - no allocation of excessive amounts of RAM for empty buffers + * - no stdlib usage of vectors, maps, + * - exception handling removed + * + ***************************************************************************************/ + +#define EMPTY_BUFFER_SIZE 0 + +class OwlResourceReader { +public: + virtual ~OwlResourceReader() {} + + void setSampleRate(int sample_rate) { fDriverSR = sample_rate; } + + Soundfile* createSoundfile(const char** path_name_list, int path_name_size, int max_chan) { + Soundfile *soundfile = NULL; + int cur_chan = 1; // At least one channel + int total_length = 1; // At least one byte - otherwise we can't allocate empty channels + + // Compute total length and channels max of all files + for (int i = 0; i < path_name_size; i++) { + int chan, length; + if (strcmp(path_name_list[i], "__empty_sound__") == 0) { + length = EMPTY_BUFFER_SIZE; + chan = 1; + } else { + getParamsFile(path_name_list[i], chan, length); + } + cur_chan = std::max(cur_chan, chan); + total_length += length; + } + + // Complete with empty parts + total_length += (MAX_SOUNDFILE_PARTS - path_name_size) * EMPTY_BUFFER_SIZE; + + // Create the soundfile + soundfile = createSoundfile(cur_chan, total_length, max_chan); + + // Init offset + int offset = 0; + + // Read all files + for (int i = 0; i < path_name_size; i++) { + if (strcmp(path_name_list[i], "__empty_sound__") == 0){ + emptyFile(soundfile, i, offset); + } else { + readFile(soundfile, path_name_list[i], i, offset, max_chan); + } + } + + // Complete with empty parts + for (int i = path_name_size; i < MAX_SOUNDFILE_PARTS; i++) { + emptyFile(soundfile, i, offset); + } + + // Share the same buffers for all other channels so that we have max_chan channels available + for (int chan = cur_chan; chan < max_chan; chan++) { + soundfile->fBuffers[chan] = soundfile->fBuffers[chan % cur_chan]; + } + return soundfile; + } + + /** + * Check the availability of a sound resource. + * + * @param resource_name - the name of the file, or sound resource identified this way + * + * @return true if the sound resource is available, false otherwise. + */ + bool checkFile(const char* resource_name) { + Resource* resource = Resource::open(resource_name); + bool result = resource != NULL; + Resource::destroy(resource); + if (!result){ + debugMessage("Resource not found"); + } + return result; + } + +protected: + int fDriverSR; + + void emptyFile(Soundfile* soundfile, int part, int& offset) { + soundfile->fLength[part] = EMPTY_BUFFER_SIZE; + soundfile->fSR[part] = SAMPLE_RATE; + soundfile->fOffset[part] = offset; + // Update offset + offset += soundfile->fLength[part]; + } + + Soundfile* createSoundfile(int cur_chan, int length, int max_chan) { + Soundfile* soundfile = new Soundfile(); + soundfile->fBuffers = new FAUSTFLOAT*[max_chan]; + + for (int chan = 0; chan < cur_chan; chan++) { + soundfile->fBuffers[chan] = new FAUSTFLOAT[length]; + memset(soundfile->fBuffers[chan], 0, sizeof(FAUSTFLOAT) * length); + } + + soundfile->fChannels = cur_chan; + return soundfile; + } + + void getBuffersOffset(Soundfile* soundfile, FAUSTFLOAT** buffers, int offset) { + for (int chan = 0; chan < soundfile->fChannels; chan++) { + buffers[chan] = &soundfile->fBuffers[chan][offset]; + } + } + + /** + * Get the channels and length values of the given sound resource. + * + * @param path_name - the name of the file, or sound resource identified this way + * @param channels - the channels value to be filled with the sound resource number of channels + * @param length - the length value to be filled with the sound resource length in frames + * + */ + void getParamsFile(const char* path_name, int& channels, int& length) { + WaveResourceReader reader(path_name); + channels = 1; + length = 0; + + if (reader.loadWaveHeader()){ + channels = reader.fWave->num_channels; + length = (reader.fWave->subchunk_2_size * 8) / (reader.fWave->num_channels * reader.fWave->bits_per_sample); + } + } + + /** + * Read one sound resource and fill the 'soundfile' structure accordingly + * + * @param soundfile - the soundfile to be filled + * @param path_name - the name of the file, or sound resource identified this way + * @param part - the part number to be filled in the soundfile + * @param offset - the offset value to be incremented with the actual sound resource length in frames + * @param max_chan - the maximum number of mono channels to fill + * + */ + void readFile(Soundfile* soundfile, const char* path_name, int part, int& offset, int max_chan) { + WaveResourceReader reader(path_name); + if (!reader.loadWaveHeader()){ + return; + } + reader.loadWave(); + + soundfile->fLength[part] = (reader.fWave->subchunk_2_size * 8) / (reader.fWave->num_channels * reader.fWave->bits_per_sample); + soundfile->fSR[part] = reader.fWave->sample_rate; + soundfile->fOffset[part] = offset; + + // Audio frames have to be written for each chan + switch (reader.fWave->bits_per_sample){ + case 16: + // 16 bit samples are signed ints + for (int sample = 0; sample < soundfile->fLength[part]; sample++) { + float factor = 1.f/32767.f; + int16_t* frame = (int16_t*)&reader.fWave->data[reader.fWave->block_align * sample]; + for (int chan = 0; chan < reader.fWave->num_channels; chan++) { + soundfile->fBuffers[chan][offset + sample] = frame[chan] * factor; + } + } + break; + case 8: + // 8 bit samples are unsigned ints + for (int sample = 0; sample < soundfile->fLength[part]; sample++) { + float factor = 1.f/255.f; + uint8_t* frame = (uint8_t*)&reader.fWave->data[reader.fWave->block_align * sample]; + for (int chan = 0; chan < reader.fWave->num_channels; chan++) { + soundfile->fBuffers[chan][offset + sample] = frame[chan] * factor - 0.5f; + } + } + break; + default: + debugMessage("Unsupported format"); + return; + } + + // + // Update offset + offset += soundfile->fLength[part]; + } +}; + + /************************************************************************************** * * OwlUI : Faust User Interface builder. Passed to buildUserInterface OwlU @@ -359,18 +560,25 @@ class OwlButton : public OwlParameterBase { // The maximun number of mappings between owl parameters and faust widgets #define MAXOWLPARAMETERS 20 -#define NO_PARAMETER ((PatchParameterId)-1) -#define NO_BUTTON ((PatchButtonId)-1) +#define NO_PARAMETER ((PatchParameterId)-1) +#define NO_BUTTON ((PatchButtonId)-1) +#define PATH_LEN 24 MonoVoiceAllocator allocator(fKey, fFreq, fGain, fGate, fBend); VoltsPerOctave* fVOctInput; VoltsPerOctave* fVOctOutput; +Soundfile* defaultsound; class OwlUI : public UI { Patch* fPatch; PatchParameterId fParameter; // current parameter ID, value NO_PARAMETER means not set - int fParameterIndex = 0; // number of OwlParameters collected so far + int fParameterIndex; // number of OwlParameters collected so far + int fSoundfileIndex; + int fSampleRate; + //std::map fSoundfileMap; // Map to share loaded soundfiles OwlParameterBase* fParameterTable[MAXOWLPARAMETERS]; + OwlResourceReader* fSoundReader; + Soundfile* fSoundfiles[MAX_SOUNDFILES]; PatchButtonId fButton; // check if the widget is an Owl parameter and, if so, add the corresponding OwlParameter void addInputOwlParameter(const char* label, FAUSTFLOAT* zone, @@ -398,7 +606,7 @@ class OwlUI : public UI { } } fParameter = NO_PARAMETER; // clear current parameter ID - fButton = NO_BUTTON; + fButton = NO_BUTTON; } void addOutputOwlParameter( @@ -434,10 +642,17 @@ class OwlUI : public UI { fButton = NO_BUTTON; // clear current button ID } - // we dont want to create a widget but we clear the current parameter ID just in case - void skip() { - fParameter = NO_PARAMETER; // clear current parameter ID - fButton = NO_BUTTON; + void addOwlResources(const char** resource_names, int names_size, Soundfile** sf_zone){ + if (fSoundfileIndex < MAX_SOUNDFILES){ + Soundfile* sound_file = fSoundReader->createSoundfile(resource_names, names_size, MAX_CHAN); + fSoundfiles[fSoundfileIndex++] = sound_file; + if (sound_file != NULL) { + *sf_zone = sound_file; + return; + } + } + // If failure, use 'defaultsound' + *sf_zone = defaultsound; } public: @@ -446,7 +661,10 @@ class OwlUI : public UI { : fPatch(pp) , fParameter(NO_PARAMETER) , fParameterIndex(0) + , fSoundfileIndex(0) , fButton(NO_BUTTON) { + fSoundReader = new OwlResourceReader(); + fSoundReader->setSampleRate(fPatch->getSampleRate()); } virtual ~OwlUI() { @@ -456,6 +674,12 @@ class OwlUI : public UI { delete fVOctInput; if (meta.vOctOutput) delete fVOctOutput; + if (fSoundReader != NULL) { + delete fSoundReader; + } + for (int i = 0; i < fSoundfileIndex; i++){ + delete fSoundfiles[i]; + } } // should be called before compute() to update widget's zones registered as OWL parameters @@ -509,9 +733,58 @@ class OwlUI : public UI { addOutputOwlParameter(label, zone, lo, hi); } // -- soundfiles - virtual void addSoundfile( - const char* label, const char* filename, Soundfile** sf_zone) { - skip(); + virtual void addSoundfile(const char* label, const char* url, Soundfile** sf_zone) { + if (fSoundReader == NULL){ + fSoundReader = new OwlResourceReader(); + fSoundReader->setSampleRate(fPatch->getSampleRate()); + defaultsound = fSoundReader->createSoundfile(nullptr, 0, 1); + } + + if (url[0] == '{'){ + char* paths[MAX_SOUNDFILE_PARTS]; + int total_paths = 0; + bool reading_path = false; + const char* c = url; + const char* start_path; + while (c){ + if (reading_path){ + if (*c++ == '\''){ + // Closing quote + reading_path = false; + uint32_t path_len = std::min(c - start_path, PATH_LEN - 1); + paths[total_paths] = new char[path_len]; + strncpy(paths[total_paths], start_path, path_len - 1); + paths[total_paths][path_len -1] = 0; + if (fSoundReader->checkFile(paths[total_paths])) + total_paths++; + else { + delete[] paths[total_paths]; + } + } + } + else { + switch (*c){ + case '\'': + // Opening quote + start_path = ++c; + reading_path = true; + break; + case '}': + c = 0; // Done! + break; + default: + // Path separator will end here + c++; + break; + } + } + } + addOwlResources((const char**)paths, total_paths, sf_zone); + // Parsed path names are not used after loading resources + for (int i = 0; i < total_paths; i++){ + delete[] paths[i]; + } + } } // -- metadata declarations diff --git a/faust.mk b/faust.mk index b4ad8289..f7114e71 100644 --- a/faust.mk +++ b/faust.mk @@ -1,11 +1,12 @@ FAUSTCC ?= faust FAUSTFLAGS ?= -light +FAUSTCODE = FaustCode faust: $(BUILD)/Source/FaustPatch.hpp $(BUILD)/Source/FaustPatch.hpp: $(PATCHSOURCE)/$(FAUST).dsp @$(FAUSTCC) $(FAUSTFLAGS) -I $(PATCHSOURCE) -i -inpl -mem -a FaustCode/owl.cpp -fm faustmath.h $< $(BUILDROOT)/FaustCode/owl.lib -o $@ - @cp FaustCode/owl.h $(PATCHSOURCE) + @cp $(FAUSTCODE)/*.h $(BUILD)/Source/ $(BUILD)/Source/%Patch.hpp: $(PATCHSOURCE)/%.dsp @$(FAUSTCC) $(FAUSTFLAGS) -I $(PATCHSOURCE) -i -inpl -mem -a FaustCode/owl.cpp -fm faustmath.h $< -o $@ From 02122194f9d081fb78430f1486ed674a021d3784 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Mon, 15 Feb 2021 19:54:51 +0100 Subject: [PATCH 021/374] refactored build and updated some tests --- LibSource/ComplexFourierTransform.h | 2 +- LibSource/ComplexShortArray.cpp | 56 ++- LibSource/ComplexShortArray.h | 29 +- LibSource/qint.h | 56 +++ Makefile | 11 +- TestPatches/ComplexFloatArrayTestPatch.hpp | 56 +-- .../ComplexFourierTransformTestPatch.hpp | 2 +- TestPatches/DummyPatch.hpp | 178 +++++++++ TestPatches/FloatArrayTestPatch.hpp | 349 ++++++++---------- TestPatches/PatchRun.cpp | 164 +------- TestPatches/PatchTest.cpp | 106 ++---- TestPatches/ShortArrayTestPatch.hpp | 16 +- TestPatches/TestPatch.hpp | 9 +- common.mk | 27 +- compile.mk | 75 ++-- libs.mk | 195 +++++----- sources.mk | 17 + test.mk | 158 ++------ web.mk | 42 ++- 19 files changed, 729 insertions(+), 819 deletions(-) create mode 100644 LibSource/qint.h create mode 100644 TestPatches/DummyPatch.hpp create mode 100644 sources.mk diff --git a/LibSource/ComplexFourierTransform.h b/LibSource/ComplexFourierTransform.h index 31d4fb84..853e7934 100644 --- a/LibSource/ComplexFourierTransform.h +++ b/LibSource/ComplexFourierTransform.h @@ -66,7 +66,7 @@ class ComplexFourierTransform { temp.scale(1.0f/getSize()); inout.copyFrom(temp); } - int getSize(){ + size_t getSize(){ return temp.getSize(); } }; diff --git a/LibSource/ComplexShortArray.cpp b/LibSource/ComplexShortArray.cpp index d33094b3..3347f4e6 100644 --- a/LibSource/ComplexShortArray.cpp +++ b/LibSource/ComplexShortArray.cpp @@ -1,6 +1,33 @@ #include "ComplexShortArray.h" #include "basicmaths.h" #include "message.h" +#include "qint.h" + +int16_t ComplexShort::getMagnitude(){ +#ifdef ARM_CORTEX + int16_t out; + int16_t in[2] = {re, im}; + arm_cmplx_mag_q15(in, &out, 1); + // function above returns 2.14, so we shift it back to 1.15 + // but first we check we do not lose data. + // TODO: make sure it saturates + out = out >> 1; + return out; +#else + float fre = Q15_TO_FLOAT(re); + float fim = Q15_TO_FLOAT(im); + return FLOAT_TO_Q15(sqrtf(fre*fre+fim*fim) + 0.5); +#endif +} + +float ComplexShort::getPhase(){ + return atan2(Q15_TO_FLOAT(im), Q15_TO_FLOAT(re)); +} + +void ComplexShort::setPolar(int16_t magnitude, float phase){ + re = FLOAT_TO_Q15(Q15_TO_FLOAT(magnitude)*cosf(phase) + 0.5); + im = FLOAT_TO_Q15(Q15_TO_FLOAT(magnitude)*sinf(phase) + 0.5); +} int16_t ComplexShortArray::mag(const int i){ int16_t result; @@ -8,8 +35,7 @@ int16_t ComplexShortArray::mag(const int i){ #ifdef ARM_CORTEX arm_cmplx_mag_q15((int16_t*)&(data[i]), &result,1); #else - #error TODO - result=sqrtf(mag2(i)); + result = FLOAT_TO_Q15(sqrtf(Q15_TO_FLOAT(mag2(i)))); #endif return result; } @@ -36,10 +62,9 @@ int16_t ComplexShortArray::mag2(const int i){ // this is saturating arm_shift_q15((int16_t*)&result, 2, (int16_t*)&result, 1); #else - #error TODO - int16_t re=data[i].re; - int16_t im=data[i].im; - result=re*re+im*im; + float re=Q15_TO_FLOAT(data[i].re); + float im=Q15_TO_FLOAT(data[i].im); + result=FLOAT_TO_Q15(re*re+im*im); #endif return result; } @@ -85,14 +110,15 @@ void ComplexShortArray::complexByComplexMultiplication(ComplexShortArray operand #ifdef ARM_CORTEX arm_cmplx_mult_cmplx_q15((int16_t*)getData(), (int16_t*)operand2.getData(), (int16_t*)result.getData(), size ); #else - ASSERT(false, "TODO"); - float *pSrcA=(float*)data; - float *pSrcB=(float*)operand2; - float *pDst=(float*)result; - for(int n=0; n> 1; - return out; - #else - #error TODO - return int16_t(sqrtf(re*re+im*im) + 0.5); - #endif - } + int16_t getMagnitude(); /** Get the phase of the complex number. Computes and returns the phase of the complex number. @return The phase of the complex number. */ - float getPhase(){ - return atan2(im,re); - } + float getPhase(); /** Set the phase of the complex number. @@ -55,7 +39,7 @@ struct ComplexShort { @param phase The new phase of the complex number */ void setPhase(float phase){ - int16_t magnitude=getMagnitude(); + int16_t magnitude = getMagnitude(); setPolar(magnitude, phase); } @@ -65,7 +49,7 @@ struct ComplexShort { @param magnitude The new magnitude of the complex number */ void setMagnitude(int16_t magnitude){ - float phase=getPhase(); + float phase = getPhase(); setPolar(magnitude, phase); } @@ -74,10 +58,7 @@ struct ComplexShort { @param magnitude The new magnitude of the complex number @param phase The new phase of the complex number */ - void setPolar(int16_t magnitude, float phase){ - re=(int16_t)(magnitude*cosf(phase) + 0.5); - im=(int16_t)(magnitude*sinf(phase) + 0.5); - } + void setPolar(int16_t magnitude, float phase); }; class ComplexShortArray { diff --git a/LibSource/qint.h b/LibSource/qint.h new file mode 100644 index 00000000..7afe8ba8 --- /dev/null +++ b/LibSource/qint.h @@ -0,0 +1,56 @@ +#ifndef __QINT_H__ +#define __QINT_H__ + +#include + +#ifdef ARM_CORTEX +#include "arm_math.h" +#define Q15_MUL_Q15(a,b) (__SSAT(((q31_t)(a)*(b))>>15, 16)) +#define Q31_MUL_Q31(a,b) (__SSAT(((q63_t)(a)*(b))>>31, 32)) +#define FLOAT_TO_Q7(a) (__SSAT((q15_t)((a)*128.0f), 8)) +#define FLOAT_TO_Q15(a) (__SSAT((q31_t)((a)*32768.0f), 16)) +#define FLOAT_TO_Q31(a) clip_q63_to_q31((q63_t)((a)*2147483648.0f)) +#else +#define Q7_CLIP(a) ((a) > Q7_MAX ? Q7_MAX : (a) < Q7_MIN ? Q7_MIN : (a)) +#define Q15_CLIP(a) ((a) > Q15_MAX ? Q15_MAX : (a) < Q15_MIN ? Q15_MIN : (a)) +#define Q31_CLIP(a) ((a) > Q31_MAX ? Q31_MAX : (a) < Q31_MIN ? Q31_MIN : (a)) +#define Q15_MUL_Q15(a,b) Q15_CLIP(((q63_t)(a)*(b))>>15) +#define Q31_MUL_Q31(a,b) Q31_CLIP(((q63_t)(a)*(b))>>31) +#define FLOAT_TO_Q7(a) Q7_CLIP((q15_t)((a)*128.0f)) +#define FLOAT_TO_Q15(a) Q15_CLIP((q63_t)((a)*32768.0f)) +#define FLOAT_TO_Q31(a) Q31_CLIP((q63_t)((a)*2147483648.0f)) +#endif + +typedef int8_t q7_t; +typedef int16_t q15_t; +typedef int32_t q31_t; +typedef int64_t q63_t; + +#ifndef Q7_MIN +#define Q7_MIN INT8_MIN +#endif +#ifndef Q7_MAX +#define Q7_MAX INT8_MAX +#endif +#ifndef Q15_MIN +#define Q15_MIN INT16_MIN +#endif +#ifndef Q15_MAX +#define Q15_MAX INT16_MAX +#endif +#ifndef Q31_MIN +#define Q31_MIN INT32_MIN +#endif +#ifndef Q31_MAX +#define Q31_MAX INT32_MAX +#endif + +#define Q15_DIV_Q15(a,b) (((q31_t)(a)<<15)/(b)) /* non-rounding */ +#define Q15_RECIPROCAL(a) (((q31_t)Q15_MAX<<15)/(a)) + +#define Q7_TO_FLOAT(a) ((float)(a)/128.0f) +#define Q15_TO_FLOAT(a) ((float)(a)/32768.0f) +#define Q31_TO_FLOAT(a) ((float)(a)/2147483648.0f) +#define Q63_TO_FLOAT(a) ((float)(a)/9223372036854775808.0f) + +#endif /* defined(__QINT_H__) */ diff --git a/Makefile b/Makefile index a5dbaa3a..ff9d9933 100644 --- a/Makefile +++ b/Makefile @@ -46,10 +46,6 @@ PATCHNAME ?= $(MAXIMILIAN) PATCHCLASS ?= MaximilianPatch PATCHFILE ?= MaximilianPatch.hpp DEPS += maximilian -else ifdef TEST -PATCHNAME ?= $(TEST) -PATCHCLASS ?= $(PATCHNAME)Patch -PATCHFILE ?= $(PATCHNAME)Patch.hpp else ifdef SOUL # options for SOUL patch compilation PATCHNAME ?= $(SOUL) @@ -59,6 +55,10 @@ SOULCLASS ?= $(SOUL) SOULFILE ?= $(SOUL).soulpatch SOULHPP ?= $(SOUL).hpp DEPS += soul +else ifdef TEST +PATCHNAME = $(TEST) +PATCHCLASS = $(PATCHNAME)Patch +PATCHFILE = $(PATCHNAME)Patch.hpp else # options for C++ compilation PATCHNAME ?= "Template" @@ -182,6 +182,9 @@ perform: $(DEPS) ## run patch locally @$(MAKE) -s -f test.mk perform check: ## run tests + @$(MAKE) -s TEST=ComplexFourierTransformTest test + # @$(MAKE) -s TEST=ComplexFloatArrayTest test + @$(MAKE) -s TEST=FloatArrayTest test @$(MAKE) -s TEST=ShortArrayTest test help: ## show this help diff --git a/TestPatches/ComplexFloatArrayTestPatch.hpp b/TestPatches/ComplexFloatArrayTestPatch.hpp index d1cc3def..5fdada61 100644 --- a/TestPatches/ComplexFloatArrayTestPatch.hpp +++ b/TestPatches/ComplexFloatArrayTestPatch.hpp @@ -44,10 +44,10 @@ class ComplexFloatArrayTestPatch : public Patch { debugMessage("start"); passed=0; failed=0; - int size=100; + size_t size=100; ComplexFloat data[size]; ComplexFloat backupData[size]; - for(int n=0; nmaxMagVal){ maxMagVal=cfa.mag(n); maxMagInd=n; @@ -137,24 +137,24 @@ class ComplexFloatArrayTestPatch : public Patch { assertr(maxMagInd==cfa.getMaxMagnitudeIndex(),"getMaxMagnitudeIndex()"); cfa.getRealValues(tempf); - for(int n=0; n=offset && n=offset && ngetValue()); + if(pid < 40) + parameter_values[pid] = param->getValue(); +} + +void PatchProcessor::setPatchParameter(int pid, IntParameter* param){ + printf("Set parameter %c: %d\n", 'A'+pid, param->getValue()); + if(pid < 40) + parameter_values[pid] = param->getValue()/4096.0f; +} + +void Patch::registerParameter(PatchParameterId pid, const char* name){ + printf("Register parameter %c: %s\n", 'A'+pid, name); +} + +void Patch::processMidi(MidiMessage msg){} + +void Patch::sendMidi(MidiMessage msg){ + printf("Sending MIDI [%x:%x:%x:%x]\n", msg.data[0], msg.data[1], msg.data[2], msg.data[3]); +} + +float Patch::getSampleRate(){ + return SAMPLE_RATE; +} + +int Patch::getBlockSize(){ + return BLOCKSIZE; +} + +int Patch::getNumberOfChannels(){ + return CHANNELS; +} + +float Patch::getParameterValue(PatchParameterId pid){ + if(pid < 40) + return parameter_values[pid]; + return 0.0f; +} + +void Patch::setParameterValue(PatchParameterId pid, float value){ + printf("Set parameter %c: %f\n", 'A'+pid, value); + if(pid < 40) + parameter_values[pid] = value; +} + +void Patch::setButton(PatchButtonId bid, uint16_t value, uint16_t samples){ + printf("Set button %c: %d\n", 'A'+bid, value); + if(value) + button_values |= (1<=0) - debugMessage(message, n); - else - debugMessage(message); - ASSERT(condition, message); //this actually causes the program to exit and the LED to turn red - //but if you comment out the line above you can get nice acoustic feedback instead (sinewave for success, noise for error) - failed++; - } else { - passed++; - } - return condition; - } +/* + * Status: The first few tests have been converted to the new TestPatch format. + * Most of the tests still need to be converted to use e.g. CHECK_EQUAL() + * and CHECK_CLOSE() as defined in TestPatch.hpp + */ + +#define TESTCHECK(x, y) TEST(y); CHECK(x) +#define TESTCHECK_EQUAL(a, b, y) TEST(y); CHECK_EQUAL(a, b) +#define TESTCHECK_CLOSE(a, b, y, z) TEST(y); CHECK_CLOSE(a, b, z) + +class FloatArrayTestPatch : public TestPatch { public: FloatArrayTestPatch(){ - success=true; - passed=0; - failed=0; - int size=101; + size_t size=101; float data[size]; float backupData[size]; - for(int n=0; n=min, "clip, asymmetric"); + for(size_t n=0; n=min, "clip, asymmetric"); } } //test negate tempFa1.copyFrom(fa); tempFa1.negate(); //in-place - for(int n=0; n=0 && n1=offset+samples){ - assert(tempFa1[n]==init, "insert() init"); + TESTCHECK(tempFa1[n]==init, "insert() init"); } else { - assert(tempFa1[n]==fa[n-offset], "insert() inserted values"); + TESTCHECK(tempFa1[n]==fa[n-offset], "insert() inserted values"); } } } { float init=0.2; tempFa1.setAll(init); - int sourceOffset=20; - int destinationOffset=30; - int samples=40; + size_t sourceOffset=20; + size_t destinationOffset=30; + size_t samples=40; tempFa1.insert(fa, sourceOffset, destinationOffset, samples); - for(int n=0; n=destinationOffset+samples){ - assert(tempFa1[n]==init, "insert() sourceOffset init", n); + TESTCHECK(tempFa1[n]==init, "insert() sourceOffset init"); } else { - assert(tempFa1[n]==fa[n-destinationOffset+sourceOffset], "insert() sourceOffset inserted values"); + TESTCHECK(tempFa1[n]==fa[n-destinationOffset+sourceOffset], "insert() sourceOffset inserted values"); } } } { //test move - int fromIndex=size/5; - int toIndex=fromIndex*2; - int length=size/6; + size_t fromIndex=size/5; + size_t toIndex=fromIndex*2; + size_t length=size/6; tempFa1.copyFrom(fa); tempFa1.move(fromIndex, toIndex, length); - for(int n=0; n=toIndex+length){ - assert(tempFa1[n]==fa[n], "move() non moved values"); + TESTCHECK(tempFa1[n]==fa[n], "move() non moved values"); } else { - assert(tempFa1[n]==fa[fromIndex+ n-toIndex], "move() moved values"); + TESTCHECK(tempFa1[n]==fa[fromIndex+ n-toIndex], "move() moved values"); } } } { //test subArray - int offset=size/5; - int length=size/6; + size_t offset=size/5; + size_t length=size/6; FloatArray sub=fa.subArray(offset, length); - for(int n=0; nrefValue){ refValue=fa[n]; refIndex=n; } } fa.getMax(&value, &index); - assert(value==refValue,"getMax() value"); - assert(index==refIndex,"getMax() index"); - assert(fa.getMaxValue()==refValue,"getMaxValue()"); - assert(fa.getMaxIndex()==refIndex,"getMaxIndex()"); + TESTCHECK(value==refValue,"getMax() value"); + TESTCHECK(index==refIndex,"getMax() index"); + TESTCHECK(fa.getMaxValue()==refValue,"getMaxValue()"); + TESTCHECK(fa.getMaxIndex()==refIndex,"getMaxIndex()"); } //test rms { float rms=0; - for(int n=0; n0 && tempFa1.getRms()<1, "noise rms"); - assert(tempFa1.getPower()>0 && tempFa1.getPower()0 && tempFa1.getRms()<1, "noise rms"); + TESTCHECK(tempFa1.getPower()>0 && tempFa1.getPower() #include "registerpatch.h" -extern "C" { - // http://www.keil.com/forum/60479/ - void arm_bitreversal_32(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab) -{ - uint32_t r3 = (bitRevLen + 1) / 2; - uint32_t *r2, *r6; - uint32_t r4, r5; - while(r3--) - { - r2 = (uint32_t *)((uint32_t)pSrc + pBitRevTab[0]); - r6 = (uint32_t *)((uint32_t)pSrc + pBitRevTab[1]); - r5 = r2[0]; - r4 = r6[0]; - r6[0] = r5; - r2[0] = r4; - r5 = r2[1]; - r4 = r6[1]; - r6[1] = r5; - r2[1] = r4; - pBitRevTab += 2; - } -} +#define SAMPLE_RATE 48000 +#define CHANNELS 2 +#define BLOCKSIZE 64 -void arm_bitreversal_16(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab) -{ - #warning TODO! - ASSERT(false, "arm_bitreversal_16"); -} -} +#include "DummyPatch.hpp" PatchProcessor processor; ProgramVector programVector; -void assert_failed(const char* msg, const char* location, int line){ - printf("Assertion failed: %s, in %s line %d\n", msg, location, line); - exit(-1); -} - -void debugMessage(char const* msg, int a){ - printf("%s %d\n", msg, a); -} - -void debugMessage(char const* msg, float a){ - printf("%s %f\n", msg, a); -} - -void debugMessage(char const* msg, int a, int b){ - printf("%s %d %d\n", msg, a, b); -} - -void debugMessage(char const* msg, float a, float b){ - printf("%s %f %f\n", msg, a, b); -} - -void debugMessage(char const* msg, int a, int b, int c){ - printf("%s %d %d %d\n", msg, a, b, c); -} - -void debugMessage(char const* msg, float a, float b, float c){ - printf("%s %f %f %f\n", msg, a, b, c); -} - -void debugMessage(char const* msg){ - printf("%s\n", msg); -} - -Patch::Patch(){} -Patch::~Patch(){} -PatchProcessor::PatchProcessor(){} -PatchProcessor::~PatchProcessor(){} -int Patch::getBlockSize(){return 128;} -void Patch::processMidi(MidiMessage msg){} -void Patch::sendMidi(MidiMessage msg){ - printf("Sending MIDI [%x:%x:%x:%x]\n", msg.data[0], msg.data[1], msg.data[2], msg.data[3]); -} - PatchProcessor* getInitialisingPatchProcessor(){ return &processor; } -static TestPatch* testpatch = NULL; -void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, TestPatch* patch){ - //if(patch == NULL) - // error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory"); +extern "C"{ +void error(int8_t code, const char* reason){ + printf("%s\n", reason); + exit(-1); +} +} +static Patch* testpatch = NULL; +void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* patch){ + if(patch == NULL) + error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory"); testpatch = patch; } @@ -108,12 +48,14 @@ int main(int argc, char** argv){ #include "registerpatch.cpp" ASSERT(testpatch != NULL, "Missing test patch"); int ret = 0; - printf("Passed %d Failed %d\n", testpatch->passed, testpatch->failed); - if(testpatch->success){ - printf("Success\n"); - }else{ - printf("Fail\n"); - ret = -1; - } + AudioBuffer* samples = AudioBuffer::create(CHANNELS, BLOCKSIZE); + testpatch->processAudio(*samples); + // printf("Passed %d Failed %d\n", testpatch->passed, testpatch->failed); + // if(testpatch->success){ + // printf("Success\n"); + // }else{ + // printf("Fail\n"); + // ret = -1; + // } return ret; } diff --git a/TestPatches/ShortArrayTestPatch.hpp b/TestPatches/ShortArrayTestPatch.hpp index 203fbd40..780fc651 100644 --- a/TestPatches/ShortArrayTestPatch.hpp +++ b/TestPatches/ShortArrayTestPatch.hpp @@ -18,7 +18,7 @@ class ShortArrayTestPatch : public TestPatch { CHECK_EQUAL((int)array.getSize(), 512); REQUIRE(array.getData() != NULL); for(size_t i=0; i<512; ++i){ - CHECK_CLOSE(array[i], 0.0, DEFAULT_TOLERANCE); + CHECK_EQUAL((int)array[i], 0); } ShortArray::destroy(array); } @@ -142,11 +142,11 @@ class ShortArrayTestPatch : public TestPatch { ar.copyTo(ar2); ar2.reciprocal(); for(size_t n = 0; n < ar.getSize(); ++n){ - CHECK_CLOSE(ar2[n], (0.5 + 1.f/ar[n]), 2); + CHECK_CLOSE((int)ar2[n], int(0.5 + 1.f/ar[n]), 2); } ar.reciprocal(ar2); for(size_t n = 0; n < ar.getSize(); ++n){ - CHECK_CLOSE(ar2[n], (0.5 + 1.f/ar[n]), 2); + CHECK_CLOSE((int)ar2[n], int(0.5 + 1.f/ar[n]), 2); } ShortArray::destroy(ar); ShortArray::destroy(ar2); @@ -179,7 +179,7 @@ class ShortArrayTestPatch : public TestPatch { acc += ar[n] * ar[n] / (float)ar.getSize(); } int rms=(sqrtf(acc + 0.5)); - CHECK_CLOSE(rms, ar.getRms(), 5); + CHECK_CLOSE(rms, (int)ar.getRms(), 5); ShortArray::destroy(ar); ShortArray::destroy(ar2); } @@ -195,7 +195,7 @@ class ShortArrayTestPatch : public TestPatch { mean = mean > SHRT_MAX ? SHRT_MAX : mean; mean = mean < SHRT_MIN ? SHRT_MIN : mean; - CHECK_CLOSE(mean, ar.getMean(), 30); + CHECK_CLOSE(mean, (int32_t)ar.getMean(), 30); ShortArray::destroy(ar); } { @@ -206,7 +206,9 @@ class ShortArrayTestPatch : public TestPatch { for(size_t n = 0; n < ar.getSize(); ++n){ power += ar[n] * ar[n]; } - CHECK_CLOSE(power, ar.getPower(), 30); + float a = power/float(INT64_MAX); + float b = ar.getPower()/float(INT64_MAX); + CHECK_CLOSE(a, b, 0.00001f); ShortArray::destroy(ar); } { @@ -426,7 +428,7 @@ class ShortArrayTestPatch : public TestPatch { for(size_t n = 0; n < ar.getSize(); ++n){ float value = rand() / (float)RAND_MAX * 2 - 1; ar.setFloatValue(n, value); - CHECK_CLOSE(ar[n], value * (float)-SHRT_MIN, 2); + CHECK_CLOSE((int)ar[n], int(value * (float)-SHRT_MIN), 2); CHECK_CLOSE(ar.getFloatValue(n), ar[n] / (float)-SHRT_MIN, 0.0004f); CHECK_CLOSE(ar.getFloatValue(n), value, 0.0004f); } diff --git a/TestPatches/TestPatch.hpp b/TestPatches/TestPatch.hpp index 6f3201bd..cba0c918 100644 --- a/TestPatches/TestPatch.hpp +++ b/TestPatches/TestPatch.hpp @@ -6,16 +6,16 @@ #define TEST(name) do{ errormessage = (char*)("Test " name " failed line"); }while(0) #define CHECK(cond) if(!(cond)){ fail("CHECK(" #cond ") fail", __LINE__); }else{ pass(); } // #define CHECK_EQUAL(a, b) if((a) != (b)){ fail("CHECK_EQUAL(" #a ", " #b ") fail", __LINE__); }else{ pass(); } -#define CHECK_CLOSE(a, b, c) if(abs((a)-(b))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } +// #define CHECK_CLOSE(a, b, c) if(abs((a)-(b))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } #define CHECK_RELATIVE(a, b, c) if(abs(((a)-(b))/(a))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } #define CHECK_EQUAL(a, b) check_equal(a, b, __LINE__) -// #define CHECK_CLOSE(a, b, c) check_close(a, b, __LINE__) +#define CHECK_CLOSE(a, b, c) check_close(a, b, c, __LINE__) #define REQUIRE(cond) if(!(cond)){ assert_failed("REQUIRE(" #cond ") fail", "", __LINE__); }else{ pass(); } /** Abstract base class for tests */ class TestPatch : public Patch { public: - const float DEFAULT_TOLERANCE = 0.0000001; + const float DEFAULT_TOLERANCE = 0.0000001f; const char* DEFAULT_MESSAGE = (char*)"Tests passed/failed"; bool success; int passed; @@ -37,7 +37,7 @@ class TestPatch : public Patch { } template void check_close(T a, T b, T c, int line){ - if(a != b){ + if(abs((a)-(b))>(c)){ debugMessage("CHECK_CLOSE", a, b, c); debugMessage(errormessage, line); success = false; @@ -70,6 +70,7 @@ class TestPatch : public Patch { for(int n=0; n $(@:.o=.d) + $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ + $(CC) -MM -MT"$@" $(CPPFLAGS) $(CFLAGS) $< > $(@:.o=.d) $(BUILD)/%.o: %.cpp - @$(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $< -o $@ - @$(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) $< > $(@:.o=.d) + $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $< -o $@ + $(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) $< > $(@:.o=.d) + +$(BUILD)/%.o: %.cc + $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $< -o $@ + $(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) $< > $(@:.o=.d) $(BUILD)/%.o: %.s - @$(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ + $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ + +$(BUILD)/%.o: %.S + $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ $(BUILD)/%.s: %.c - @$(CC) -S $(CPPFLAGS) $(CFLAGS) $< -o $@ + $(CC) -S $(CPPFLAGS) $(CFLAGS) $< -o $@ $(BUILD)/%.s: %.cpp @$(CXX) -S $(CPPFLAGS) $(CXXFLAGS) $< -o $@ +$(BUILD)/%.s: %.cc + @$(CXX) -S $(CPPFLAGS) $(CXXFLAGS) $< -o $@ + $(BUILD)/%.bin: $(BUILD)/%.elf @$(OBJCOPY) -O binary $< $@ diff --git a/compile.mk b/compile.mk index 53b0f3ec..f8329ef1 100644 --- a/compile.mk +++ b/compile.mk @@ -1,16 +1,7 @@ BUILDROOT ?= . -C_SRC = basicmaths.c heap_5.c fastpow.c fastlog.c # sbrk.c -CPP_SRC = main.cpp operators.cpp message.cpp system_tables.cpp -CPP_SRC += Patch.cpp PatchProcessor.cpp -CPP_SRC += FloatArray.cpp ComplexFloatArray.cpp ComplexShortArray.cpp FastFourierTransform.cpp ShortFastFourierTransform.cpp -CPP_SRC += ShortArray.cpp -CPP_SRC += Envelope.cpp VoltsPerOctave.cpp Window.cpp -CPP_SRC += WavetableOscillator.cpp PolyBlepOscillator.cpp -CPP_SRC += SmoothValue.cpp PatchParameter.cpp -CPP_SRC += MonochromeScreenPatch.cpp ColourScreenPatch.cpp -CPP_SRC += Resource.cpp -C_SRC += font.c +C_SRC = Source/heap_5.c +# C_SRC += sbrk.c SOURCE = $(BUILDROOT)/Source LIBSOURCE = $(BUILDROOT)/LibSource @@ -31,17 +22,21 @@ CPPFLAGS += -I$(DAISYSP)/Noise CPPFLAGS += -I$(DAISYSP)/PhysicalModeling CPPFLAGS += -I$(DAISYSP)/Synthesis CPPFLAGS += -I$(DAISYSP)/Utility + +PATCH_S_SRC = $(SOURCE)/startup.s PATCH_C_SRC = $(wildcard $(PATCHSOURCE)/*.c) PATCH_CPP_SRC += $(wildcard $(PATCHSOURCE)/*.cpp) PATCH_CPP_SRC += PatchProgram.cpp +ifdef GEN PATCH_C_SRC += $(wildcard $(GENSOURCE)/*.c) PATCH_CPP_SRC += $(wildcard $(GENSOURCE)/*.cpp) +endif ifdef MAXIMILIAN PATCH_CPP_SRC := $(filter-out $(PATCHSOURCE)/$(MAXIMILIAN).cpp, $(PATCH_CPP_SRC)) endif +PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_S_SRC:.s=.o))) PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_C_SRC:.c=.o))) PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_CPP_SRC:.cpp=.o))) -PATCH_OBJS += $(BUILD)/startup.o DAISYSP_CPP_SRC = $(wildcard $(DAISYSP)/*/*.cpp) DAISYSP_OBJS = $(addprefix $(BUILD)/, $(notdir $(DAISYSP_CPP_SRC:.cpp=.o))) @@ -75,63 +70,53 @@ ifdef HEAVY CPPFLAGS += -D__unix__ -DHV_SIMD_NONE endif -CC=gcc -LD=gcc -AR=ar -AS=as -NM=nm -CXX=g++ -GDB=gdb -SIZE=size -RANLIB=ranlib -OBJCOPY=objcopy -OBJDUMP=objdump - -# object files -OBJS = $(C_SRC:%.c=$(BUILD)/%.o) $(CPP_SRC:%.cpp=$(BUILD)/%.o) -OBJS += $(BUILD)/libnosys_gnu.o - # include common make file include $(BUILDROOT)/libs.mk +include $(BUILDROOT)/sources.mk include $(BUILDROOT)/common.mk +CPP_SRC += LibSource/Patch.cpp +CPP_SRC += LibSource/ComplexShortArray.cpp +CPP_SRC += LibSource/ShortFastFourierTransform.cpp +CPP_SRC += Source/PatchProcessor.cpp +CPP_SRC += Source/main.cpp Source/operators.cpp Source/message.cpp +CPP_SRC += Source/system_tables.cpp + +# Set up search path +OBJS = $(addprefix $(BUILD)/,$(notdir $(C_SRC:.c=.o))) +OBJS += $(addprefix $(BUILD)/,$(notdir $(CPP_SRC:.cpp=.o))) +OBJS += $(addprefix $(BUILD)/,$(notdir $(S_SRC:.S=.o))) +vpath %.c $(sort $(dir $(C_SRC))) +vpath %.cpp $(sort $(dir $(CPP_SRC))) +vpath %.s $(sort $(dir $(S_SRC))) +vpath %.S $(sort $(dir $(S_SRC))) +vpath %.cpp $(sort $(dir $(DAISYSP_CPP_SRC))) + # Set up search path vpath %.cpp $(SOURCE) vpath %.c $(SOURCE) vpath %.s $(SOURCE) -vpath %.cpp $(LIBSOURCE) -vpath %.c $(LIBSOURCE) -vpath %.s $(LIBSOURCE) vpath %.cpp $(PATCHSOURCE) vpath %.c $(PATCHSOURCE) vpath %.s $(PATCHSOURCE) vpath %.cpp $(GENSOURCE) vpath %.c $(GENSOURCE) vpath %.s $(GENSOURCE) -vpath %.cpp $(DAISYSP)/Control -vpath %.cpp $(DAISYSP)/Drums -vpath %.cpp $(DAISYSP)/Dynamics -vpath %.cpp $(DAISYSP)/Effects -vpath %.cpp $(DAISYSP)/Filters -vpath %.cpp $(DAISYSP)/Noise -vpath %.cpp $(DAISYSP)/PhysicalModeling -vpath %.cpp $(DAISYSP)/Synthesis -vpath %.cpp $(DAISYSP)/Utility vpath %.c Libraries/syscalls .PHONY: libs as map compile $(BUILD)/ShortPatchProgram.o: $(SOURCE)/ShortPatchProgram.cpp $(DEPS) - @$(CXX) -c $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/ShortPatchProgram.cpp -o $@ - @$(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/ShortPatchProgram.cpp > $(@:.o=.d) + $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/ShortPatchProgram.cpp -o $@ + $(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/ShortPatchProgram.cpp > $(@:.o=.d) $(BUILD)/PatchProgram.o: $(SOURCE)/PatchProgram.cpp $(DEPS) - @$(CXX) -c $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/PatchProgram.cpp -o $@ - @$(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/PatchProgram.cpp > $(@:.o=.d) + $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/PatchProgram.cpp -o $@ + $(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/PatchProgram.cpp > $(@:.o=.d) Libraries/libowlprg.a: $(OBJS) - @$(AR) rcs $@ $^ + $(AR) rcs $@ $^ Libraries/libdaisysp.a: $(DAISYSP_OBJS) @$(AR) rcs $@ $^ diff --git a/libs.mk b/libs.mk index 7963dd47..73af874b 100644 --- a/libs.mk +++ b/libs.mk @@ -1,109 +1,110 @@ -OBJS += $(DSPLIB)/FastMathFunctions/arm_sin_f32.o -OBJS += $(DSPLIB)/FastMathFunctions/arm_cos_f32.o -OBJS += $(DSPLIB)/CommonTables/arm_common_tables.o -OBJS += $(DSPLIB)/CommonTables/arm_const_structs.o +S_SRC += $(DSPLIB)/TransformFunctions/arm_bitreversal2.S -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_conj_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_dot_prod_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_squared_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_real_f32.o +C_SRC += $(DSPLIB)/FastMathFunctions/arm_sin_f32.c +C_SRC += $(DSPLIB)/FastMathFunctions/arm_cos_f32.c +C_SRC += $(DSPLIB)/CommonTables/arm_common_tables.c +C_SRC += $(DSPLIB)/CommonTables/arm_const_structs.c -OBJS += $(DSPLIB)/TransformFunctions/arm_cfft_f32.o -OBJS += $(DSPLIB)/TransformFunctions/arm_cfft_radix8_f32.o -OBJS += $(DSPLIB)/TransformFunctions/arm_bitreversal2.o -OBJS += $(DSPLIB)/TransformFunctions/arm_rfft_fast_f32.o -OBJS += $(DSPLIB)/TransformFunctions/arm_rfft_init_q15.o -OBJS += $(DSPLIB)/TransformFunctions/arm_rfft_q15.o -OBJS += $(DSPLIB)/TransformFunctions/arm_cfft_q15.o -OBJS += $(DSPLIB)/TransformFunctions/arm_cfft_radix4_q15.o +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_conj_f32.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_f32.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_real_f32.c -OBJS += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df1_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df1_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df2T_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_correlate_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_conv_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_conv_partial_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_norm_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_norm_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_init_f32.o +C_SRC += $(DSPLIB)/TransformFunctions/arm_cfft_f32.c +C_SRC += $(DSPLIB)/TransformFunctions/arm_cfft_radix8_f32.c +C_SRC += $(DSPLIB)/TransformFunctions/arm_rfft_fast_f32.c +C_SRC += $(DSPLIB)/TransformFunctions/arm_rfft_init_q15.c +C_SRC += $(DSPLIB)/TransformFunctions/arm_rfft_q15.c +C_SRC += $(DSPLIB)/TransformFunctions/arm_cfft_q15.c +C_SRC += $(DSPLIB)/TransformFunctions/arm_cfft_radix4_q15.c -OBJS += $(DSPLIB)/SupportFunctions/arm_float_to_q31.o -OBJS += $(DSPLIB)/SupportFunctions/arm_q31_to_float.o -OBJS += $(DSPLIB)/SupportFunctions/arm_float_to_q15.o -OBJS += $(DSPLIB)/SupportFunctions/arm_q15_to_float.o -OBJS += $(DSPLIB)/SupportFunctions/arm_copy_f32.o -OBJS += $(DSPLIB)/SupportFunctions/arm_fill_f32.o -OBJS += $(DSPLIB)/SupportFunctions/arm_q15_to_q31.o -OBJS += $(DSPLIB)/SupportFunctions/arm_q31_to_q15.o +C_SRC += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df1_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df2T_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_correlate_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_conv_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_conv_partial_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_lms_init_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_lms_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_lms_norm_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_lms_norm_init_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_init_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_init_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_f32.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_init_f32.c -OBJS += $(DSPLIB)/BasicMathFunctions/arm_abs_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_add_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_dot_prod_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_mult_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_negate_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_scale_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_sub_f32.o +C_SRC += $(DSPLIB)/SupportFunctions/arm_float_to_q31.c +C_SRC += $(DSPLIB)/SupportFunctions/arm_q31_to_float.c +C_SRC += $(DSPLIB)/SupportFunctions/arm_float_to_q15.c +C_SRC += $(DSPLIB)/SupportFunctions/arm_q15_to_float.c +C_SRC += $(DSPLIB)/SupportFunctions/arm_copy_f32.c +C_SRC += $(DSPLIB)/SupportFunctions/arm_fill_f32.c +C_SRC += $(DSPLIB)/SupportFunctions/arm_q15_to_q31.c +C_SRC += $(DSPLIB)/SupportFunctions/arm_q31_to_q15.c -OBJS += $(DSPLIB)/StatisticsFunctions/arm_max_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_mean_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_min_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_power_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_rms_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_std_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_var_f32.o +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_abs_f32.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_add_f32.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_dot_prod_f32.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_mult_f32.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_negate_f32.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_scale_f32.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_sub_f32.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_max_f32.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_mean_f32.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_min_f32.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_power_f32.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_rms_f32.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_std_f32.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_var_f32.c -OBJS += $(DSPLIB)/FastMathFunctions/arm_sin_q15.o -OBJS += $(DSPLIB)/FastMathFunctions/arm_cos_q15.o -OBJS += $(DSPLIB)/FastMathFunctions/arm_sqrt_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_conj_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_dot_prod_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_squared_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_real_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_correlate_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_conv_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_conv_partial_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_init_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_norm_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_norm_init_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_init_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_init_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_init_q15.o -OBJS += $(DSPLIB)/SupportFunctions/arm_copy_q15.o -OBJS += $(DSPLIB)/SupportFunctions/arm_fill_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_abs_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_add_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_dot_prod_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_mult_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_negate_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_scale_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_sub_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_shift_q15.o +C_SRC += $(DSPLIB)/FastMathFunctions/arm_sin_q15.c +C_SRC += $(DSPLIB)/FastMathFunctions/arm_cos_q15.c +C_SRC += $(DSPLIB)/FastMathFunctions/arm_sqrt_q15.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_conj_q15.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_q15.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c +C_SRC += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_real_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_correlate_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_conv_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_conv_partial_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_lms_init_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_lms_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_lms_norm_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_lms_norm_init_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_init_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_init_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_q15.c +C_SRC += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_init_q15.c +C_SRC += $(DSPLIB)/SupportFunctions/arm_copy_q15.c -OBJS += $(DSPLIB)/StatisticsFunctions/arm_max_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_mean_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_min_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_power_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_rms_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_std_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_var_q15.o +C_SRC += $(DSPLIB)/SupportFunctions/arm_fill_q15.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_abs_q15.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_add_q15.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_dot_prod_q15.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_mult_q15.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_negate_q15.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_scale_q15.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_sub_q15.c +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_shift_q15.c -OBJS += $(DSPLIB)/BasicMathFunctions/arm_add_q31.o +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_max_q15.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_mean_q15.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_min_q15.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_power_q15.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_rms_q15.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_std_q15.c +C_SRC += $(DSPLIB)/StatisticsFunctions/arm_var_q15.c + +C_SRC += $(DSPLIB)/BasicMathFunctions/arm_add_q31.c diff --git a/sources.mk b/sources.mk new file mode 100644 index 00000000..f7f7e602 --- /dev/null +++ b/sources.mk @@ -0,0 +1,17 @@ +C_SRC += Source/font.c +C_SRC += LibSource/fastpow.c LibSource/fastlog.c +C_SRC += LibSource/basicmaths.c +CPP_SRC += LibSource/FloatArray.cpp +CPP_SRC += LibSource/ComplexFloatArray.cpp +CPP_SRC += LibSource/FastFourierTransform.cpp +CPP_SRC += LibSource/ShortArray.cpp +CPP_SRC += LibSource/Envelope.cpp +CPP_SRC += LibSource/VoltsPerOctave.cpp +CPP_SRC += LibSource/Window.cpp +CPP_SRC += LibSource/WavetableOscillator.cpp +CPP_SRC += LibSource/PolyBlepOscillator.cpp +CPP_SRC += LibSource/SmoothValue.cpp +CPP_SRC += LibSource/PatchParameter.cpp +CPP_SRC += LibSource/MonochromeScreenPatch.cpp +CPP_SRC += LibSource/ColourScreenPatch.cpp +CPP_SRC += LibSource/Resource.cpp diff --git a/test.mk b/test.mk index afa39edd..03f7b770 100644 --- a/test.mk +++ b/test.mk @@ -1,17 +1,16 @@ BUILDROOT ?= . -C_SRC = kiss_fft.c -C_SRC += basicmaths.c fastpow.c fastlog.c # sbrk.c heap_5.c -CPP_SRC = operators.cpp system_tables.cpp # message.cpp main.cpp -# CPP_SRC += PatchProcessor.cpp Patch.cpp -CPP_SRC += FloatArray.cpp ComplexFloatArray.cpp FastFourierTransform.cpp -CPP_SRC += ShortArray.cpp # ComplexShortArray.cpp ShortFastFourierTransform.cpp -CPP_SRC += Envelope.cpp VoltsPerOctave.cpp Window.cpp -CPP_SRC += WavetableOscillator.cpp PolyBlepOscillator.cpp -CPP_SRC += SmoothValue.cpp # PatchParameter.cpp -CPP_SRC += MonochromeScreenPatch.cpp ColourScreenPatch.cpp -CPP_SRC += Resource.cpp -C_SRC += font.c +# C_SRC += basicmaths.c fastpow.c fastlog.c # sbrk.c heap_5.c +# CPP_SRC = operators.cpp system_tables.cpp # message.cpp main.cpp +# # CPP_SRC += PatchProcessor.cpp Patch.cpp +# CPP_SRC += FloatArray.cpp ComplexFloatArray.cpp FastFourierTransform.cpp +# CPP_SRC += ShortArray.cpp # ComplexShortArray.cpp ShortFastFourierTransform.cpp +# CPP_SRC += Envelope.cpp VoltsPerOctave.cpp Window.cpp +# CPP_SRC += WavetableOscillator.cpp PolyBlepOscillator.cpp +# CPP_SRC += SmoothValue.cpp # PatchParameter.cpp +# CPP_SRC += MonochromeScreenPatch.cpp ColourScreenPatch.cpp +# CPP_SRC += Resource.cpp +# C_SRC += font.c BUILD ?= $(BUILDROOT)/Build @@ -19,6 +18,7 @@ SOURCE = $(BUILDROOT)/Source LIBSOURCE = $(BUILDROOT)/LibSource GENSOURCE = $(BUILD)/Source TESTPATCHES = $(BUILDROOT)/TestPatches +DSPLIB = Libraries/CMSIS/DSP_Lib/Source CPPFLAGS = -g -Wall -m32 CPPFLAGS += -I$(SOURCE) CPPFLAGS += -I$(PATCHSOURCE) @@ -31,8 +31,6 @@ CPPFLAGS += -DARM_MATH_CM0 CPPFLAGS += -fno-builtin -ffreestanding # Tools -# TOOLROOT=i686-pc-cygwin- -# TOOLROOT=x86_64-pc-cygwin- CC=$(TOOLROOT)gcc LD=$(TOOLROOT)gcc AR=$(TOOLROOT)ar @@ -51,127 +49,21 @@ LDFLAGS = -Wl,--gc-sections CXXFLAGS = -std=c++11 # object files -OBJS = $(C_SRC:%.c=$(BUILD)/Test/%.o) $(CPP_SRC:%.cpp=$(BUILD)/Test/%.o) +# OBJS = $(C_SRC:%.c=$(BUILD)/Test/%.o) $(CPP_SRC:%.cpp=$(BUILD)/Test/%.o) + +include $(BUILDROOT)/libs.mk +include $(BUILDROOT)/sources.mk +C_SRC += Libraries/KissFFT/kiss_fft.c +C_SRC += $(DSPLIB)/TransformFunctions/arm_bitreversal.c # Set up search path -vpath %.cpp $(SOURCE) -vpath %.c $(SOURCE) -vpath %.c Libraries/KissFFT/ -vpath %.s $(SOURCE) -vpath %.cpp $(LIBSOURCE) -vpath %.c $(LIBSOURCE) -vpath %.s $(LIBSOURCE) -vpath %.cpp $(GENSOURCE) -vpath %.c $(GENSOURCE) -vpath %.s $(GENSOURCE) - -DSPLIB=Libraries/CMSIS/DSP_Lib/Source -OBJS += $(DSPLIB)/FastMathFunctions/arm_sin_f32.o -OBJS += $(DSPLIB)/FastMathFunctions/arm_cos_f32.o -OBJS += $(DSPLIB)/CommonTables/arm_common_tables.o -OBJS += $(DSPLIB)/CommonTables/arm_const_structs.o - -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_conj_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_dot_prod_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_squared_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_real_f32.o - -OBJS += $(DSPLIB)/TransformFunctions/arm_cfft_f32.o -OBJS += $(DSPLIB)/TransformFunctions/arm_cfft_radix8_f32.o -OBJS += $(DSPLIB)/TransformFunctions/arm_bitreversal.o -OBJS += $(DSPLIB)/TransformFunctions/arm_rfft_fast_f32.o -OBJS += $(DSPLIB)/TransformFunctions/arm_rfft_init_q15.o -OBJS += $(DSPLIB)/TransformFunctions/arm_rfft_q15.o -OBJS += $(DSPLIB)/TransformFunctions/arm_cfft_q15.o -OBJS += $(DSPLIB)/TransformFunctions/arm_cfft_radix4_q15.o - -OBJS += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df1_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df1_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_biquad_cascade_df2T_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_correlate_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_conv_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_conv_partial_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_norm_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_norm_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_init_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_f32.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_init_f32.o - -OBJS += $(DSPLIB)/SupportFunctions/arm_float_to_q31.o -OBJS += $(DSPLIB)/SupportFunctions/arm_q31_to_float.o -OBJS += $(DSPLIB)/SupportFunctions/arm_float_to_q15.o -OBJS += $(DSPLIB)/SupportFunctions/arm_q15_to_float.o -OBJS += $(DSPLIB)/SupportFunctions/arm_copy_f32.o -OBJS += $(DSPLIB)/SupportFunctions/arm_fill_f32.o -OBJS += $(DSPLIB)/SupportFunctions/arm_q15_to_q31.o -OBJS += $(DSPLIB)/SupportFunctions/arm_q31_to_q15.o - -OBJS += $(DSPLIB)/BasicMathFunctions/arm_abs_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_add_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_dot_prod_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_mult_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_negate_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_scale_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_sub_f32.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_shift_q15.o - -OBJS += $(DSPLIB)/StatisticsFunctions/arm_max_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_mean_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_min_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_power_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_rms_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_std_f32.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_var_f32.o - -OBJS += $(DSPLIB)/FastMathFunctions/arm_sin_q15.o -OBJS += $(DSPLIB)/FastMathFunctions/arm_cos_q15.o -OBJS += $(DSPLIB)/FastMathFunctions/arm_sqrt_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_conj_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_dot_prod_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mag_squared_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.o -OBJS += $(DSPLIB)/ComplexMathFunctions/arm_cmplx_mult_real_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_correlate_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_conv_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_conv_partial_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_init_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_norm_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_lms_norm_init_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_init_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_decimate_init_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_q15.o -OBJS += $(DSPLIB)/FilteringFunctions/arm_fir_interpolate_init_q15.o -OBJS += $(DSPLIB)/SupportFunctions/arm_copy_q15.o -OBJS += $(DSPLIB)/SupportFunctions/arm_fill_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_abs_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_add_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_dot_prod_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_mult_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_negate_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_scale_q15.o -OBJS += $(DSPLIB)/BasicMathFunctions/arm_sub_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_max_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_mean_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_min_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_power_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_rms_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_std_q15.o -OBJS += $(DSPLIB)/StatisticsFunctions/arm_var_q15.o - -OBJS += $(DSPLIB)/BasicMathFunctions/arm_add_q31.o -# include $(BUILDROOT)/libs.mk +OBJS = $(addprefix $(BUILD)/Test/,$(notdir $(C_SRC:.c=.o))) +vpath %.c $(sort $(dir $(C_SRC))) +OBJS += $(addprefix $(BUILD)/Test/,$(notdir $(CPP_SRC:.cpp=.o))) +vpath %.cpp $(sort $(dir $(CPP_SRC))) + +vpath %.cpp $(SOURCE) $(LIBSOURCE) $(GENSOURCE) +vpath %.c $(SOURCE) $(LIBSOURCE) $(GENSOURCE) .PHONY: perform test diff --git a/web.mk b/web.mk index 6358121a..236cc6c4 100644 --- a/web.mk +++ b/web.mk @@ -26,15 +26,17 @@ EMCCFLAGS += -Wno-unknown-warning-option EMCCFLAGS += --memory-init-file 0 # don't create separate memory init file .mem EMCCFLAGS += -s EXPORTED_FUNCTIONS="['_WEB_setup','_WEB_setParameter','_WEB_getParameter','_WEB_processBlock','_WEB_getPatchName','_WEB_getParameterName','_WEB_getMessage','_WEB_getStatus','_WEB_getButtons','_WEB_setButton', '_WEB_processMidi', '_malloc']" EMCCFLAGS += -s "EXTRA_EXPORTED_RUNTIME_METHODS=['cwrap']" -CPP_SRC = $(SOURCE)/PatchProcessor.cpp $(SOURCE)/message.cpp + +include $(BUILDROOT)/sources.mk +CPP_SRC += LibSource/Patch.cpp +# CPP_SRC += LibSource/ComplexShortArray.cpp +# CPP_SRC += LibSource/ShortFastFourierTransform.cpp +CPP_SRC += Source/PatchProcessor.cpp +# CPP_SRC += Source/main.cpp Source/operators.cpp +CPP_SRC += Source/message.cpp CPP_SRC += WebSource/web.cpp -CPP_SRC += Resource.cpp -C_SRC += $(LIBSOURCE)/basicmaths.c -CPP_SRC += $(LIBSOURCE)/Patch.cpp $(LIBSOURCE)/FloatArray.cpp $(LIBSOURCE)/ComplexFloatArray.cpp $(LIBSOURCE)/FastFourierTransform.cpp $(LIBSOURCE)/Envelope.cpp $(LIBSOURCE)/VoltsPerOctave.cpp $(LIBSOURCE)/Window.cpp $(LIBSOURCE)/WavetableOscillator.cpp $(LIBSOURCE)/PolyBlepOscillator.cpp $(LIBSOURCE)/SmoothValue.cpp $(LIBSOURCE)/PatchParameter.cpp -C_SRC += $(LIBSOURCE)/fastpow.c $(LIBSOURCE)/fastlog.c C_SRC += Libraries/KissFFT/kiss_fft.c -CPP_SRC += MonochromeScreenPatch.cpp ColourScreenPatch.cpp -C_SRC += font.c + ifdef MAXIMILIAN EMCC_SRC := $(filter-out $(PATCHSOURCE)/$(MAXIMILIAN).cpp, $(EMCC_SRC)) endif @@ -53,16 +55,26 @@ EMCC_OBJS += $(addprefix $(WEBDIR)/, $(notdir $(C_SRC:.c=.o))) EMDAISYSP_CPP_SRC = $(wildcard $(DAISYSP)/*/*.cpp) EMDAISYSP_OBJS = $(addprefix $(WEBDIR)/, $(notdir $(EMDAISYSP_CPP_SRC:.cpp=.o))) -PATCH_C_SRC = $(wildcard $(GENSOURCE)/*.c) -PATCH_CPP_SRC = $(wildcard $(GENSOURCE)/*.cpp) $(SOURCE)/PatchProgram.cpp -PATCH_C_SRC += $(wildcard $(PATCHSOURCE)/*.c) +PATCH_C_SRC = $(wildcard $(GENSOURCE)/*.c) +PATCH_C_SRC += $(wildcard $(PATCHSOURCE)/*.c) +PATCH_CPP_SRC = $(SOURCE)/PatchProgram.cpp +PATCH_CPP_SRC += $(wildcard $(GENSOURCE)/*.cpp) PATCH_CPP_SRC += $(wildcard $(PATCHSOURCE)/*.cpp) PATCH_OBJS = $(addprefix $(WEBDIR)/, $(notdir $(PATCH_CPP_SRC:.cpp=.o))) PATCH_OBJS += $(addprefix $(WEBDIR)/, $(notdir $(PATCH_C_SRC:.c=.o))) +OBJS = $(addprefix $(BUILD)/,$(notdir $(C_SRC:.c=.o))) +OBJS += $(addprefix $(BUILD)/,$(notdir $(CPP_SRC:.cpp=.o))) +# OBJS += $(addprefix $(BUILD)/,$(notdir $(S_SRC:.S=.o))) # Set up search path +vpath %.c $(sort $(dir $(C_SRC))) +vpath %.cpp $(sort $(dir $(CPP_SRC))) +vpath %.s $(sort $(dir $(S_SRC))) +vpath %.S $(sort $(dir $(S_SRC))) +vpath %.cpp $(sort $(dir $(EMDAISYSP_CPP_SRC))) + vpath %.cpp $(SOURCE) vpath %.c $(SOURCE) vpath %.s $(SOURCE) @@ -75,16 +87,6 @@ vpath %.s $(PATCHSOURCE) vpath %.cpp $(GENSOURCE) vpath %.c $(GENSOURCE) vpath %.s $(GENSOURCE) -vpath %.cpp $(DAISYSP) -vpath %.cpp $(DAISYSP)/Control -vpath %.cpp $(DAISYSP)/Drums -vpath %.cpp $(DAISYSP)/Dynamics -vpath %.cpp $(DAISYSP)/Effects -vpath %.cpp $(DAISYSP)/Filters -vpath %.cpp $(DAISYSP)/Noise -vpath %.cpp $(DAISYSP)/PhysicalModeling -vpath %.cpp $(DAISYSP)/Synthesis -vpath %.cpp $(DAISYSP)/Utility vpath %.cpp WebSource vpath %.c Libraries/KissFFT From e5f6d8d93b202a92e860d9d20743d40c1c1b9ed8 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Mon, 15 Feb 2021 21:49:44 +0100 Subject: [PATCH 022/374] fix new[]/delete mismatch --- Source/MemoryBuffer.hpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Source/MemoryBuffer.hpp b/Source/MemoryBuffer.hpp index ac6d62b0..9a022917 100644 --- a/Source/MemoryBuffer.hpp +++ b/Source/MemoryBuffer.hpp @@ -34,6 +34,6 @@ class ManagedMemoryBuffer : public MemoryBuffer { error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory"); } ~ManagedMemoryBuffer(){ - delete buffer; + delete[] buffer; } }; From d0e06fa2debc9456a898e3b60216a8f5bee5513f Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Mon, 15 Feb 2021 21:58:23 +0100 Subject: [PATCH 023/374] test updates: build in native format instead of m32 --- Makefile | 6 ++- TestPatches/DummyPatch.hpp | 19 +++++-- TestPatches/FastExpTestPatch.hpp | 9 +++- TestPatches/FastLogTestPatch.hpp | 6 ++- TestPatches/FastPowTestPatch.hpp | 6 ++- TestPatches/FloatArrayTestPatch.hpp | 77 +++++++++++------------------ TestPatches/PatchRun.cpp | 33 +++++++------ TestPatches/PatchTest.cpp | 32 +++++------- TestPatches/TestPatch.hpp | 28 ++++++----- test.mk | 53 +++++++------------- 10 files changed, 129 insertions(+), 140 deletions(-) diff --git a/Makefile b/Makefile index ff9d9933..250f62bf 100644 --- a/Makefile +++ b/Makefile @@ -86,7 +86,7 @@ export CONFIG PLATFORM DEPS += $(BUILD)/registerpatch.cpp $(BUILD)/registerpatch.h $(BUILD)/Source/startup.s -all: libs patch +all: libs patch web .PHONY: .FORCE patch libs faust gen heavy soul maximilian web minify map as test perform check tables resource size clean realclean sysex run store docs help @@ -183,9 +183,11 @@ perform: $(DEPS) ## run patch locally check: ## run tests @$(MAKE) -s TEST=ComplexFourierTransformTest test - # @$(MAKE) -s TEST=ComplexFloatArrayTest test @$(MAKE) -s TEST=FloatArrayTest test @$(MAKE) -s TEST=ShortArrayTest test + @$(MAKE) -s TEST=FastExpTest test + @$(MAKE) -s TEST=FastLogTest test + @$(MAKE) -s TEST=FastPowTest test help: ## show this help @echo 'Usage: make [target] ...' diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp index bc9827d4..7dba6835 100644 --- a/TestPatches/DummyPatch.hpp +++ b/TestPatches/DummyPatch.hpp @@ -1,3 +1,6 @@ +#include "FastPowTable.h" +#include "FastLogTable.h" +#include "basicmaths.h" static float parameter_values[40] = {}; static uint32_t button_values = 0; @@ -47,10 +50,10 @@ class SampleBuffer : public AudioBuffer { } }; +#ifdef ARM_MATH_CM0 extern "C" { // http://www.keil.com/forum/60479/ - void arm_bitreversal_32(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab) -{ + void arm_bitreversal_32(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab){ uint32_t r3 = (bitRevLen + 1) / 2; uint32_t *r2, *r6; uint32_t r4, r5; @@ -69,12 +72,12 @@ extern "C" { pBitRevTab += 2; } } - void arm_bitreversal_16(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t *pBitRevTab) { ASSERT(false, "TODO: arm_bitreversal_16"); } } +#endif void assert_failed(const char* msg, const char* location, int line){ printf("Assertion failed: %s, in %s line %d\n", msg, location, line); @@ -116,7 +119,15 @@ AudioBuffer::~AudioBuffer(){} Patch::Patch(){} Patch::~Patch(){} -PatchProcessor::PatchProcessor(){} +PatchProcessor::PatchProcessor(){ + fast_log_set_table(fast_log_table, fast_log_table_size); + fast_pow_set_table(fast_pow_table, fast_pow_table_size); +} +void PatchProcessor::setPatch(Patch* patch, const char* name){ + if(patch == NULL) + error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory"); + this->patch = patch; +} PatchProcessor::~PatchProcessor(){} void PatchProcessor::setPatchParameter(int pid, FloatParameter* param){ diff --git a/TestPatches/FastExpTestPatch.hpp b/TestPatches/FastExpTestPatch.hpp index 0afc5dd7..909b1e95 100644 --- a/TestPatches/FastExpTestPatch.hpp +++ b/TestPatches/FastExpTestPatch.hpp @@ -4,13 +4,18 @@ #undef expf #endif #include + class FastExpTestPatch : public TestPatch { public: FastExpTestPatch(){ { TEST("FastExp"); float maxPerc = 0; - float threshold = 0.02; // maximum relative error accepted +#ifdef ARM_CORTEX + float threshold = 0.02; +#else + float threshold = 0.544; // maximum relative error accepted: 0.02 for big tables, 0.544 for small +#endif int errs = 0; int tests = 0; for(int n = -90; n < 90; n++){ @@ -18,7 +23,7 @@ class FastExpTestPatch : public TestPatch { float approx = fast_expf(x); float exact = expf(x); float err = fabsf(approx - exact); - float perc = (exact == 0.00 || std::isfinite(exact)) == 0 ? err*100 : err/exact*100; + float perc = (exact == 0.00 || std::isfinite(exact)) == 0 ? err*100 : (err/exact)*100; CHECK(perc perc ? maxPerc : perc; if(fabsf(perc) > threshold) diff --git a/TestPatches/FastLogTestPatch.hpp b/TestPatches/FastLogTestPatch.hpp index a9c359d1..0452666e 100644 --- a/TestPatches/FastLogTestPatch.hpp +++ b/TestPatches/FastLogTestPatch.hpp @@ -10,7 +10,11 @@ class FastLogTestPatch : public TestPatch { { TEST("FastLog"); float maxPerc = 0; - float threshold = 0.00025; // maximum relative error accepted +#ifdef ARM_CORTEX + float threshold = 0.00025; +#else + float threshold = 0.8283; // maximum relative error accepted: 0.00025 for big tables, 0.8283 for small +#endif int errs = 0; int tests = 0; for(int n = 10; n <= 10000; n++){ diff --git a/TestPatches/FastPowTestPatch.hpp b/TestPatches/FastPowTestPatch.hpp index b0f7161c..e6c3c9ed 100644 --- a/TestPatches/FastPowTestPatch.hpp +++ b/TestPatches/FastPowTestPatch.hpp @@ -10,7 +10,11 @@ class FastPowTestPatch : public TestPatch { { TEST("FastPow"); float maxPerc = 0; - float threshold = 0.04; // maximum relative error accepted +#ifdef ARM_CORTEX + float threshold = 0.04; +#else + float threshold = 0.544; // maximum relative error accepted: 0.04 for big tables, 0.544 for small +#endif int errs = 0; int tests = 0; for(int n = -1000; n < 1000; n++){ diff --git a/TestPatches/FloatArrayTestPatch.hpp b/TestPatches/FloatArrayTestPatch.hpp index 3832f4c3..2ca77e04 100644 --- a/TestPatches/FloatArrayTestPatch.hpp +++ b/TestPatches/FloatArrayTestPatch.hpp @@ -10,8 +10,7 @@ */ #define TESTCHECK(x, y) TEST(y); CHECK(x) -#define TESTCHECK_EQUAL(a, b, y) TEST(y); CHECK_EQUAL(a, b) -#define TESTCHECK_CLOSE(a, b, y, z) TEST(y); CHECK_CLOSE(a, b, z) +#define TESTCHECK_CLOSE(a, b, y) TEST(y); CHECK_CLOSE(a, b, DEFAULT_TOLERANCE) class FloatArrayTestPatch : public TestPatch { public: @@ -159,23 +158,23 @@ class FloatArrayTestPatch : public TestPatch { tempFa3.copyFrom(tempFa1); fa.add(tempFa1,tempFa2); for(size_t n=0; n2*M_PI ? phase-2*M_PI : phase; - } - } } }; diff --git a/TestPatches/PatchRun.cpp b/TestPatches/PatchRun.cpp index 1b7a3a04..2316ff7b 100644 --- a/TestPatches/PatchRun.cpp +++ b/TestPatches/PatchRun.cpp @@ -26,30 +26,35 @@ void vPortFree( void *pv ){ static PatchProcessor processor; ProgramVector programVector; -static Patch* testpatch = NULL; - -int serviceCall(int service, void** params, int len){ - printf("Service call (todo) : %d\n", service); -} +static int errorcode = 0; PatchProcessor* getInitialisingPatchProcessor(){ return &processor; } +extern "C"{ + int serviceCall(int service, void** params, int len){ + printf("Service call (todo) : %d\n", service); + return -1; + } + void error(int8_t code, const char* reason){ + printf("%s\n", reason); + errorcode = -1; + } +} + void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* patch){ - //if(patch == NULL) - // error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory"); printf("Register patch %s (%d ins, %d outs)\n", name, inputs, outputs); - testpatch = patch; + getInitialisingPatchProcessor()->setPatch(patch, name); } #define REGISTER_PATCH(T, STR, IN, OUT) registerPatch(STR, IN, OUT, new T) int main(int argc, char** argv){ + errorcode = 0; programVector.serviceCall = serviceCall; #include "registerpatch.cpp" - ASSERT(testpatch != NULL, "Missing patch"); - int ret = 0; + ASSERT(processor.patch != NULL, "Missing test patch"); SampleBuffer* samples = new SampleBuffer(BLOCKSIZE); if(argc > 1){ const char* input_filename = argv[1]; @@ -65,7 +70,7 @@ int main(int argc, char** argv){ int16_t* end = data+len; while(src+BLOCKSIZE <= end){ samples->split16(src, BLOCKSIZE); - testpatch->processAudio(*samples); + processor.patch->processAudio(*samples); samples->comb16(src); src += BLOCKSIZE*channels; } @@ -76,9 +81,9 @@ int main(int argc, char** argv){ free(data); delete wav_header; }else{ - testpatch->processAudio(*samples); + processor.patch->processAudio(*samples); } delete samples; - delete testpatch; - return ret; + delete processor.patch; + return errorcode; } diff --git a/TestPatches/PatchTest.cpp b/TestPatches/PatchTest.cpp index c076917c..1d22415c 100644 --- a/TestPatches/PatchTest.cpp +++ b/TestPatches/PatchTest.cpp @@ -24,38 +24,32 @@ void vPortFree( void *pv ){ PatchProcessor processor; ProgramVector programVector; +static int errorcode = 0; PatchProcessor* getInitialisingPatchProcessor(){ return &processor; } extern "C"{ -void error(int8_t code, const char* reason){ - printf("%s\n", reason); - exit(-1); + void error(int8_t code, const char* reason){ + printf("%s\n", reason); + errorcode = -1; + } } -} -static Patch* testpatch = NULL; + void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* patch){ - if(patch == NULL) - error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory"); - testpatch = patch; + getInitialisingPatchProcessor()->setPatch(patch, name); } #define REGISTER_PATCH(T, STR, IN, OUT) registerPatch(STR, IN, OUT, new T) int main(int argc, char** argv){ + errorcode = 0; #include "registerpatch.cpp" - ASSERT(testpatch != NULL, "Missing test patch"); - int ret = 0; + ASSERT(getInitialisingPatchProcessor()->patch != NULL, "Missing test patch"); AudioBuffer* samples = AudioBuffer::create(CHANNELS, BLOCKSIZE); - testpatch->processAudio(*samples); - // printf("Passed %d Failed %d\n", testpatch->passed, testpatch->failed); - // if(testpatch->success){ - // printf("Success\n"); - // }else{ - // printf("Fail\n"); - // ret = -1; - // } - return ret; + getInitialisingPatchProcessor()->patch->processAudio(*samples); + delete samples; + delete getInitialisingPatchProcessor()->patch; + return errorcode; } diff --git a/TestPatches/TestPatch.hpp b/TestPatches/TestPatch.hpp index cba0c918..cd25676c 100644 --- a/TestPatches/TestPatch.hpp +++ b/TestPatches/TestPatch.hpp @@ -1,21 +1,24 @@ #ifndef __TestPatch_hpp__ #define __TestPatch_hpp__ +#include #include "Patch.h" #define TEST(name) do{ errormessage = (char*)("Test " name " failed line"); }while(0) #define CHECK(cond) if(!(cond)){ fail("CHECK(" #cond ") fail", __LINE__); }else{ pass(); } -// #define CHECK_EQUAL(a, b) if((a) != (b)){ fail("CHECK_EQUAL(" #a ", " #b ") fail", __LINE__); }else{ pass(); } -// #define CHECK_CLOSE(a, b, c) if(abs((a)-(b))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } -#define CHECK_RELATIVE(a, b, c) if(abs(((a)-(b))/(a))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } -#define CHECK_EQUAL(a, b) check_equal(a, b, __LINE__) -#define CHECK_CLOSE(a, b, c) check_close(a, b, c, __LINE__) +#define CHECK_EQUAL(a, b) if((a) != (b)){ fail("CHECK_EQUAL(" #a ", " #b ") fail", __LINE__); }else{ pass(); } +#define CHECK_CLOSE(a, b, c) if(abs((a)-(b))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } +#define CHECK_RELATIVE(a, b, c) if(abs(((a)-(b))/(a))>(c)){ fail("CHECK_RELATIVE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } #define REQUIRE(cond) if(!(cond)){ assert_failed("REQUIRE(" #cond ") fail", "", __LINE__); }else{ pass(); } +/* alternatively use templates to check different typed values */ +// #define CHECK_EQUAL(a, b) check_equal(a, b, __LINE__) +// #define CHECK_CLOSE(a, b, c) check_close(a, b, c, __LINE__) + /** Abstract base class for tests */ class TestPatch : public Patch { public: - const float DEFAULT_TOLERANCE = 0.0000001f; + const float DEFAULT_TOLERANCE = 2*FLT_EPSILON; const char* DEFAULT_MESSAGE = (char*)"Tests passed/failed"; bool success; int passed; @@ -24,6 +27,12 @@ class TestPatch : public Patch { void pass(){ passed++; } + void fail(const char* condition, int line){ + debugMessage(condition); + debugMessage(errormessage, line); + success = false; + failed++; + } template void check_equal(T a, T b, int line){ if(a != b){ @@ -46,12 +55,6 @@ class TestPatch : public Patch { pass(); } } - void fail(const char* condition, int line){ - debugMessage(condition); - debugMessage(errormessage, line); - success = false; - failed++; - } TestPatch(): success(true), passed(0), failed(0), errormessage((char*)DEFAULT_MESSAGE){ } @@ -65,7 +68,6 @@ class TestPatch : public Patch { phase+=inc; phase= phase>2*M_PI ? phase-2*M_PI : phase; } - debugMessage("Tests passed", passed); }else{ for(int n=0; n Date: Mon, 15 Feb 2021 22:43:54 +0100 Subject: [PATCH 024/374] added project history file (history begins now) --- HISTORY.md | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 HISTORY.md diff --git a/HISTORY.md b/HISTORY.md new file mode 100644 index 00000000..f7c66156 --- /dev/null +++ b/HISTORY.md @@ -0,0 +1,17 @@ +v21.1 +----- + +* SOUL integration +* Maximilian integration +* DaisySP integration +* Added FAUST 'key' MIDI parameter (complements 'freq', 'gain', 'gate' and 'bend') +* Added StateVariableFilter DSP class +* Fixed Bus Error regression on legacy hardware +* Automatically zero-initialise all heap allocations + +v21.0 +----- + +* Matches release v21.0 of OpenWare. +* Adds support for patch resources. + From f008d7fcc93d3a4bc2ef7788b51b4eae5ba9b240 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Mon, 15 Feb 2021 22:58:42 +0100 Subject: [PATCH 025/374] updated history --- HISTORY.md | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/HISTORY.md b/HISTORY.md index f7c66156..65143d0b 100644 --- a/HISTORY.md +++ b/HISTORY.md @@ -12,6 +12,11 @@ v21.1 v21.0 ----- -* Matches release v21.0 of OpenWare. -* Adds support for patch resources. +* Matches release v21.0 of OpenWare +* Add support for patch resources + +Prehistory +----------- + +A wise old OWL sat in an oak From 8e8dabf80db20bdf3ce88f0f777f6e08286abf70 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Tue, 16 Feb 2021 10:00:37 +0100 Subject: [PATCH 026/374] removed KickBox example --- README.md | 6 ------ 1 file changed, 6 deletions(-) diff --git a/README.md b/README.md index ac4d070f..27c9af00 100644 --- a/README.md +++ b/README.md @@ -150,10 +150,6 @@ Compile puredata file owl_hypersaw.pd and send to device to be run immediately: make HEAVY=owl_hypersaw clean run -Compile KickBox[[9]](#ref9) C++ patch: - - make PATCHNAME=KickBox clean patch - # References [1] https://developer.arm.com/open-source/gnu-toolchain/gnu-rm @@ -171,5 +167,3 @@ Compile KickBox[[9]](#ref9) C++ patch: [8] https://www.rebeltech.org/patch-library/patch/4_saw -[9] https://github.com/marsus/MyPatches (AudioDisplay.hpp, BassDrum.hpp, Cymbal.hpp, Drum.hpp, KickBoxPatch.hpp, Oscillators.hpp, Sequence.h, SynthVoice.hpp, bjorklund.h) - From f972ab9c3dc06157c8624c427005d12de62ee7d9 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Tue, 16 Feb 2021 11:11:06 +0100 Subject: [PATCH 027/374] added test/perform instructions --- README.md | 33 +++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/README.md b/README.md index 27c9af00..462d4cbe 100644 --- a/README.md +++ b/README.md @@ -3,7 +3,7 @@ Dynamically loaded OWL program. OwlProgram is the patch build environment for the OWL Pedal, OWL Modular, Magus, Wizard and Alchemist products from Rebel Technology. For details see https://www.rebeltech.org (moved from http://hoxtonowl.com). -It is used to build, run and store patches written in PD, FAUST, Max Gen and C++. +It is used to build, run and store patches written in Pure Data, FAUST, Max Gen, SOUL, Maximilian and C++. # Instructions @@ -12,10 +12,11 @@ It is used to build, run and store patches written in PD, FAUST, Max Gen and C++ * FirmwareSender (to make sysex and run) [[2]](#ref2) * emcc (to make web) [[3]](#ref3) * faust2owl (to compile FAUST patches) [[4]](#ref4) -* The heavy hvcc compiler (to compile PD patches) [[5]](#ref5) -* The soul compiler (to compile SOUL patches) [[6]](#ref6) +* The Heavy `hvcc` compiler (to compile PD patches) [[5]](#ref5) +* The `soul` compiler (to compile SOUL patches) [[6]](#ref6) +* gcc native compiler (to test locally) [[9]](#ref9) -* On Windows, you'll need a MAKE utility [[7]](#ref7). You'll also need to open common.mk and point TOOLROOT to your gcc installation directory, using a path string without spaces (such as using 8.3 filenames). +* On Windows, you'll need a MAKE utility [[7]](#ref7). You'll also need to open compile.mk and point TOOLROOT to your gcc installation directory, using a path string without spaces (such as using 8.3 filenames). ## Preparing the environment This has been done on a Ubuntu server 18.04 @@ -29,16 +30,20 @@ This has been done on a Ubuntu server 18.04 $ git submodule init $ git submodule update -edit OwlProgram/common.mk and point TOOLROOT to where arm-none-eabi binaries are installed +Either install gcc-arm-none-eabi system-wide and ensure the binaries are in your path, or edit OwlProgram/compile.mk and point TOOLROOT to where arm-none-eabi binaries are installed. - TOOLROOT ?= /usr/bin/ + TOOLROOT = /usr/bin/ -to compile puredata patches you need hvcc +To compile puredata patches you need `hvcc`, the Heavy compiler. $ sudo apt install python python-enum34 python-jinja2 python-nose2 $ git clone https://github.com/pingdynasty/hvcc.git + +To compile patches in native format (e.g. for testing) you will also need the gcc compiler: + + $ sudo apt install gcc -compile FirmwareSender +Compile FirmwareSender FirmwareSender makes it possible to use `run` and `store` make targets, or by invoking FirmwareSender directly to run/store a compiled patch to the device using sysex codes. @@ -59,6 +64,8 @@ FirmwareSender makes it possible to use `run` and `store` make targets, or by in * make clean: remove intermediary and target files * make realclean: remove all (library+patch) intermediary and target files * make size: show binary size metrics and large object summary +* make test: build and test a native format binary of your patch +* make perform: build and run a native format binary of your patch * make map: build map file (Build/patch.map) * make as: build assembly file (Build/patch.s) * make help: print target information @@ -140,6 +147,15 @@ do it like this from the main directory of OwlProgram (this will store in slot 6 Tools/FirmwareSender -in ./Build/patch.bin -out "OWL-MIDI*" -store 6 +## Testing Patches + +You can also build and test your patches locally, in native format. This requires having gcc installed locally (i.e. the native gcc compiler, not the arm gcc cross-compiler). +Specify your patch name (and optionally the PATCHSOURCE directory) as usual, but substitute for the `test` target: + +* `make SOUL=Foo clean patch` + + + # Examples Compile the puredata file owl_hypersaw.pd[[8]](#ref8): @@ -167,3 +183,4 @@ Compile puredata file owl_hypersaw.pd and send to device to be run immediately: [8] https://www.rebeltech.org/patch-library/patch/4_saw +[9] https://gcc.gnu.org/ From 8beda0ee81a5a95b6c56bb32f41b729b3487fe4b Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Tue, 16 Feb 2021 11:16:19 +0100 Subject: [PATCH 028/374] ensure support for Heavy and Faust patches --- TestPatches/DummyPatch.hpp | 55 ++++++++++++++++++++++++++++++++++---- 1 file changed, 50 insertions(+), 5 deletions(-) diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp index 7dba6835..3d8ccf95 100644 --- a/TestPatches/DummyPatch.hpp +++ b/TestPatches/DummyPatch.hpp @@ -84,6 +84,40 @@ void assert_failed(const char* msg, const char* location, int line){ exit(-1); } +const char hexnumerals[] = "0123456789abcdef"; +char* msg_itoa(int val, int base){ + static char buf[13] = {0}; + int i = 11; + unsigned int part = abs(val); + do{ + buf[i--] = hexnumerals[part % base]; + part /= base; + }while(part && i); + if(val < 0) + buf[i--] = '-'; + return &buf[i+1]; +} + +char* msg_ftoa(float val, int base){ + static char buf[16] = {0}; + int i = 14; + // print 2 decimal points + unsigned int part = abs((int)((val-int(val))*100)); + do{ + buf[i--] = hexnumerals[part % base]; + part /= base; + }while(i > 12); + buf[i--] = '.'; + part = abs(int(val)); + do{ + buf[i--] = hexnumerals[part % base]; + part /= base; + }while(part && i); + if(val < 0.0f) + buf[i--] = '-'; + return &buf[i+1]; +} + void debugMessage(char const* msg, int a){ printf("%s %d\n", msg, a); } @@ -177,13 +211,24 @@ void Patch::setParameterValue(PatchParameterId pid, float value){ } void Patch::setButton(PatchButtonId bid, uint16_t value, uint16_t samples){ - printf("Set button %c: %d\n", 'A'+bid, value); - if(value) - button_values |= (1< Date: Tue, 16 Feb 2021 11:17:14 +0100 Subject: [PATCH 029/374] incorporated common.mk into compile.mk, updated docs, refactored build some more --- HISTORY.md | 32 ++++++++- Makefile | 2 +- common.mk | 81 ----------------------- compile.mk | 191 +++++++++++++++++++++++++++++++++++------------------ test.mk | 15 +++-- web.mk | 14 ++-- 6 files changed, 173 insertions(+), 162 deletions(-) delete mode 100644 common.mk diff --git a/HISTORY.md b/HISTORY.md index 65143d0b..00a9d17a 100644 --- a/HISTORY.md +++ b/HISTORY.md @@ -1,3 +1,10 @@ +v21.2 +----- + +* Fixed 'test' make target +* Allow patches to be compiled and run natively + + v21.1 ----- @@ -15,8 +22,31 @@ v21.0 * Matches release v21.0 of OpenWare * Add support for patch resources +v12.0 +----- + +* extended parameters: up to 24 parameters controlled by MIDI +* incoming events: handle button presses and MIDI note on/off messages in the patch +* outgoing events: send parameter and button changes as MIDI CC and note on/off messages +* parameter defaults, ranges, smoothing, hysteresis, and non-linearity (exponential and logarithmic curves) + +v11.0 +----- + +* new library classes: AdsrEnvelope, VoltsPerOctave +* updates to web audio processing +* sample accurate button states +* full compatibility with OWL v11 firmware +* improvements to FAUST build + +v10.0 +----- + +OwlProgram release, including OWL Library, to coincide with release v10 of the OWL Firmware. + + Prehistory ----------- -A wise old OWL sat in an oak +A wise old OWL sat in an oak. diff --git a/Makefile b/Makefile index 250f62bf..58c1c97e 100644 --- a/Makefile +++ b/Makefile @@ -175,7 +175,7 @@ as: patch ## build assembly file (Build/patch.s) @$(MAKE) -s -f compile.mk as @echo Built $(PATCHNAME) assembly in $(BUILD)/$(TARGET).s -test: $(DEPS) ## run test patch locally +test: $(DEPS) ## test patch locally @$(MAKE) -s -f test.mk test perform: $(DEPS) ## run patch locally diff --git a/common.mk b/common.mk deleted file mode 100644 index f497e99a..00000000 --- a/common.mk +++ /dev/null @@ -1,81 +0,0 @@ -# Code Paths -CMSIS ?= Libraries/CMSIS/Include/ -DSPLIB = Libraries/CMSIS/DSP_Lib/Source - -# Tool path -# TOOLROOT ?= Tools/gcc-arm-none-eabi-9-2020-q2-update/bin/ - -# Tools -CC=$(TOOLROOT)arm-none-eabi-gcc -LD=$(TOOLROOT)arm-none-eabi-gcc -AR=$(TOOLROOT)arm-none-eabi-gcc-ar -AS=$(TOOLROOT)arm-none-eabi-as -NM=$(TOOLROOT)arm-none-eabi-nm -CXX=$(TOOLROOT)arm-none-eabi-g++ -GDB=$(TOOLROOT)arm-none-eabi-gdb -SIZE=$(TOOLROOT)arm-none-eabi-size -RANLIB=$(TOOLROOT)arm-none-eabi-ranlib -OBJCOPY=$(TOOLROOT)arm-none-eabi-objcopy -OBJDUMP=$(TOOLROOT)arm-none-eabi-objdump - -# Compilation Flags -ARCH_FLAGS = -fsingle-precision-constant -mthumb -ARCH_FLAGS += -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 -# ARCH_FLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16 -# ARCH_FLAGS += -mcpu=cortex-m0 -mfloat-abi=soft -msoft-float -DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT -D__FPU_USED=1 -DDSY_CORE_DSP -DDSY_CUSTOM_DSP -# DEF_FLAGS = -DSTM32F745xx -DARM_MATH_CM7 -D__FPU_PRESENT -D__FPU_USED=1 - -INC_FLAGS = -I$(BUILDROOT)/Libraries -I$(DEVICE) -I$(CMSIS) -I$(PERIPH_FILE)/inc -I$(SOURCE) -INC_FLAGS += -I$(DEVICE)/Include -I$(CMSIS) -INC_FLAGS += -I$(USB_DEVICE_FILE)/Core/inc -I$(USB_DEVICE_FILE)/Class/cdc/inc -INC_FLAGS += -I$(USB_OTG_FILE)/inc -CPPFLAGS += $(ARCH_FLAGS) $(INC_FLAGS) $(DEF_FLAGS) -CFLAGS += -std=gnu11 -CXXFLAGS += -std=gnu++14 -LDFLAGS += -T$(LDSCRIPT) $(ARCH_FLAGS) - -# compile and generate dependency info -$(BUILD)/%.o: %.c - $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ - $(CC) -MM -MT"$@" $(CPPFLAGS) $(CFLAGS) $< > $(@:.o=.d) - -$(BUILD)/%.o: %.cpp - $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $< -o $@ - $(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) $< > $(@:.o=.d) - -$(BUILD)/%.o: %.cc - $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $< -o $@ - $(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) $< > $(@:.o=.d) - -$(BUILD)/%.o: %.s - $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ - -$(BUILD)/%.o: %.S - $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ - -$(BUILD)/%.s: %.c - $(CC) -S $(CPPFLAGS) $(CFLAGS) $< -o $@ - -$(BUILD)/%.s: %.cpp - @$(CXX) -S $(CPPFLAGS) $(CXXFLAGS) $< -o $@ - -$(BUILD)/%.s: %.cc - @$(CXX) -S $(CPPFLAGS) $(CXXFLAGS) $< -o $@ - -$(BUILD)/%.bin: $(BUILD)/%.elf - @$(OBJCOPY) -O binary $< $@ - -$(BUILD)/%.s: $(BUILD)/%.elf - @$(OBJDUMP) -S $< > $@ - -$(BUILD)/%.map: $(BUILD)/%.elf - @$(OBJDUMP) -S $< > $@ - -size: - $(NM) --print-size --size-sort $(BUILD)/$(TARGET).elf | tail -n 20 - $(SIZE) $(BUILD)/$(TARGET).elf - ls -s $(BUILD)/$(TARGET).bin - -# pull in dependencies --include $(OBJS:.o=.d) $(SOLO_OBJS:.o=.d) $(MULTI_OBJS:.o=.d) diff --git a/compile.mk b/compile.mk index f8329ef1..2bf525c3 100644 --- a/compile.mk +++ b/compile.mk @@ -1,16 +1,59 @@ -BUILDROOT ?= . - -C_SRC = Source/heap_5.c -# C_SRC += sbrk.c +BUILDROOT ?= . +BUILD ?= $(BUILDROOT)/Build +# Code Paths SOURCE = $(BUILDROOT)/Source LIBSOURCE = $(BUILDROOT)/LibSource -GENSOURCE = $(BUILD)/Source +BUILDSOURCE = $(BUILD)/Source TESTPATCHES = $(BUILDROOT)/TestPatches DAISYSP = $(BUILDROOT)/Libraries/DaisySP/Source +CMSIS = $(BUILDROOT)/Libraries/CMSIS/Include/ +DSPLIB = $(BUILDROOT)/Libraries/CMSIS/DSP_Lib/Source + +# Tool path +# TOOLROOT ?= Tools/gcc-arm-none-eabi-9-2020-q2-update/bin/ + +# Tools +CC=$(TOOLROOT)arm-none-eabi-gcc +LD=$(TOOLROOT)arm-none-eabi-gcc +AR=$(TOOLROOT)arm-none-eabi-gcc-ar +AS=$(TOOLROOT)arm-none-eabi-as +NM=$(TOOLROOT)arm-none-eabi-nm +CXX=$(TOOLROOT)arm-none-eabi-g++ +GDB=$(TOOLROOT)arm-none-eabi-gdb +SIZE=$(TOOLROOT)arm-none-eabi-size +RANLIB=$(TOOLROOT)arm-none-eabi-ranlib +OBJCOPY=$(TOOLROOT)arm-none-eabi-objcopy +OBJDUMP=$(TOOLROOT)arm-none-eabi-objdump + +# Compilation Flags +LDLIBS = -lm +LDFLAGS = -Wl,--gc-sections +LDFLAGS += -fpic +LDFLAGS += -fpie +LDFLAGS += -flto +CXXFLAGS = -fno-rtti +CXXFLAGS += -fno-exceptions +ifdef HEAVY +CPPFLAGS += -D__unix__ -DHV_SIMD_NONE +endif +ARCH_FLAGS = -fsingle-precision-constant -mthumb +ARCH_FLAGS += -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16 +# ARCH_FLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16 +# ARCH_FLAGS += -mcpu=cortex-m0 -mfloat-abi=soft -msoft-float +DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT -D__FPU_USED=1 -DDSY_CORE_DSP -DDSY_CUSTOM_DSP +# DEF_FLAGS = -DSTM32F745xx -DARM_MATH_CM7 -D__FPU_PRESENT -D__FPU_USED=1 +INC_FLAGS = -I$(BUILDROOT)/Libraries -I$(DEVICE) -I$(CMSIS) -I$(PERIPH_FILE)/inc -I$(SOURCE) +INC_FLAGS += -I$(DEVICE)/Include -I$(CMSIS) +INC_FLAGS += -I$(USB_DEVICE_FILE)/Core/inc -I$(USB_DEVICE_FILE)/Class/cdc/inc +INC_FLAGS += -I$(USB_OTG_FILE)/inc +CPPFLAGS += $(ARCH_FLAGS) $(INC_FLAGS) $(DEF_FLAGS) +CFLAGS += -std=gnu11 +CXXFLAGS += -std=gnu++14 +LDFLAGS += -T$(LDSCRIPT) $(ARCH_FLAGS) CPPFLAGS += -I$(PATCHSOURCE) CPPFLAGS += -I$(LIBSOURCE) -CPPFLAGS += -I$(GENSOURCE) +CPPFLAGS += -I$(BUILDSOURCE) CPPFLAGS += -I$(TESTPATCHES) CPPFLAGS += -I$(DAISYSP) CPPFLAGS += -I$(DAISYSP)/Control @@ -22,24 +65,6 @@ CPPFLAGS += -I$(DAISYSP)/Noise CPPFLAGS += -I$(DAISYSP)/PhysicalModeling CPPFLAGS += -I$(DAISYSP)/Synthesis CPPFLAGS += -I$(DAISYSP)/Utility - -PATCH_S_SRC = $(SOURCE)/startup.s -PATCH_C_SRC = $(wildcard $(PATCHSOURCE)/*.c) -PATCH_CPP_SRC += $(wildcard $(PATCHSOURCE)/*.cpp) -PATCH_CPP_SRC += PatchProgram.cpp -ifdef GEN -PATCH_C_SRC += $(wildcard $(GENSOURCE)/*.c) -PATCH_CPP_SRC += $(wildcard $(GENSOURCE)/*.cpp) -endif -ifdef MAXIMILIAN -PATCH_CPP_SRC := $(filter-out $(PATCHSOURCE)/$(MAXIMILIAN).cpp, $(PATCH_CPP_SRC)) -endif -PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_S_SRC:.s=.o))) -PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_C_SRC:.c=.o))) -PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_CPP_SRC:.cpp=.o))) -DAISYSP_CPP_SRC = $(wildcard $(DAISYSP)/*/*.cpp) -DAISYSP_OBJS = $(addprefix $(BUILD)/, $(notdir $(DAISYSP_CPP_SRC:.cpp=.o))) - CPPFLAGS += -DARM_CORTEX CPPFLAGS += -DEXTERNAL_SRAM CPPFLAGS += -nostdlib -nostartfiles -fno-builtin -ffreestanding @@ -49,63 +74,54 @@ CPPFLAGS += -fpic CPPFLAGS += -fpie CPPFLAGS += -fdata-sections CPPFLAGS += -ffunction-sections -# CPPFLAGS += -munaligned-access CPPFLAGS += -mno-unaligned-access -# CPPFLAGS += -mlong-calls - -# CPPFLAGS += -mpic-data-is-text-relative CPPFLAGS += -fno-omit-frame-pointer CPPFLAGS += -flto +# CPPFLAGS += -munaligned-access +# CPPFLAGS += -mlong-calls +# CPPFLAGS += -mpic-data-is-text-relative -LDLIBS = -lm -LDFLAGS = -Wl,--gc-sections -LDFLAGS += -fpic -LDFLAGS += -fpie -LDFLAGS += -flto - -CXXFLAGS = -fno-rtti -CXXFLAGS += -fno-exceptions - -ifdef HEAVY -CPPFLAGS += -D__unix__ -DHV_SIMD_NONE +# source files +PATCH_S_SRC = $(SOURCE)/startup.s +PATCH_C_SRC = $(wildcard $(PATCHSOURCE)/*.c) +PATCH_CPP_SRC += $(wildcard $(PATCHSOURCE)/*.cpp) +PATCH_CPP_SRC += PatchProgram.cpp +PATCH_C_SRC += $(wildcard $(BUILDSOURCE)/*.c) +PATCH_CPP_SRC += $(wildcard $(BUILDSOURCE)/*.cpp) +ifdef MAXIMILIAN +PATCH_CPP_SRC := $(filter-out $(PATCHSOURCE)/$(MAXIMILIAN).cpp, $(PATCH_CPP_SRC)) endif +PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_S_SRC:.s=.o))) +PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_C_SRC:.c=.o))) +PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_CPP_SRC:.cpp=.o))) +DAISYSP_CPP_SRC = $(wildcard $(DAISYSP)/*/*.cpp) +DAISYSP_OBJS = $(addprefix $(BUILD)/, $(notdir $(DAISYSP_CPP_SRC:.cpp=.o))) -# include common make file +# include common make files include $(BUILDROOT)/libs.mk include $(BUILDROOT)/sources.mk -include $(BUILDROOT)/common.mk -CPP_SRC += LibSource/Patch.cpp -CPP_SRC += LibSource/ComplexShortArray.cpp -CPP_SRC += LibSource/ShortFastFourierTransform.cpp -CPP_SRC += Source/PatchProcessor.cpp -CPP_SRC += Source/main.cpp Source/operators.cpp Source/message.cpp -CPP_SRC += Source/system_tables.cpp +C_SRC += $(SOURCE)/heap_5.c +CPP_SRC += $(LIBSOURCE)/Patch.cpp +CPP_SRC += $(LIBSOURCE)/ComplexShortArray.cpp +CPP_SRC += $(LIBSOURCE)/ShortFastFourierTransform.cpp +CPP_SRC += $(SOURCE)/PatchProcessor.cpp +CPP_SRC += $(SOURCE)/main.cpp +CPP_SRC += $(SOURCE)/operators.cpp +CPP_SRC += $(SOURCE)/message.cpp +CPP_SRC += $(SOURCE)/system_tables.cpp -# Set up search path OBJS = $(addprefix $(BUILD)/,$(notdir $(C_SRC:.c=.o))) OBJS += $(addprefix $(BUILD)/,$(notdir $(CPP_SRC:.cpp=.o))) OBJS += $(addprefix $(BUILD)/,$(notdir $(S_SRC:.S=.o))) -vpath %.c $(sort $(dir $(C_SRC))) -vpath %.cpp $(sort $(dir $(CPP_SRC))) -vpath %.s $(sort $(dir $(S_SRC))) -vpath %.S $(sort $(dir $(S_SRC))) -vpath %.cpp $(sort $(dir $(DAISYSP_CPP_SRC))) # Set up search path -vpath %.cpp $(SOURCE) -vpath %.c $(SOURCE) -vpath %.s $(SOURCE) -vpath %.cpp $(PATCHSOURCE) -vpath %.c $(PATCHSOURCE) -vpath %.s $(PATCHSOURCE) -vpath %.cpp $(GENSOURCE) -vpath %.c $(GENSOURCE) -vpath %.s $(GENSOURCE) - -vpath %.c Libraries/syscalls +vpath %.S $(sort $(dir $(S_SRC))) +vpath %.s $(sort $(dir $(S_SRC) $(PATCH_S_SRC))) +vpath %.c $(sort $(dir $(C_SRC) $(PATCH_C_SRC))) +vpath %.cpp $(sort $(dir $(CPP_SRC) $(PATCH_CPP_SRC) $(DAISYSP_CPP_SRC))) -.PHONY: libs as map compile +.PHONY: libs as map compile size $(BUILD)/ShortPatchProgram.o: $(SOURCE)/ShortPatchProgram.cpp $(DEPS) $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) -I$(BUILD) $(SOURCE)/ShortPatchProgram.cpp -o $@ @@ -133,3 +149,48 @@ map: $(PATCH_OBJS) $(LDSCRIPT) @$(LD) $(LDFLAGS) -Wl,-Map=$(BUILD)/$(TARGET).map $(PATCH_OBJS) $(LDLIBS) Libraries/libdaisysp.a Libraries/libowlprg.a compile: $(BUILD)/$(TARGET).bin + +size: + $(NM) --print-size --size-sort $(BUILD)/$(TARGET).elf | tail -n 20 + $(SIZE) $(BUILD)/$(TARGET).elf + ls -s $(BUILD)/$(TARGET).bin + +# compile and generate dependency info +$(BUILD)/%.o: %.c + $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ + $(CC) -MM -MT"$@" $(CPPFLAGS) $(CFLAGS) $< > $(@:.o=.d) + +$(BUILD)/%.o: %.cpp + $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $< -o $@ + $(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) $< > $(@:.o=.d) + +$(BUILD)/%.o: %.cc + $(CXX) -c $(CPPFLAGS) $(CXXFLAGS) $< -o $@ + $(CXX) -MM -MT"$@" $(CPPFLAGS) $(CXXFLAGS) $< > $(@:.o=.d) + +$(BUILD)/%.o: %.s + $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ + +$(BUILD)/%.o: %.S + $(CC) -c $(CPPFLAGS) $(CFLAGS) $< -o $@ + +$(BUILD)/%.s: %.c + $(CC) -S $(CPPFLAGS) $(CFLAGS) $< -o $@ + +$(BUILD)/%.s: %.cpp + @$(CXX) -S $(CPPFLAGS) $(CXXFLAGS) $< -o $@ + +$(BUILD)/%.s: %.cc + @$(CXX) -S $(CPPFLAGS) $(CXXFLAGS) $< -o $@ + +$(BUILD)/%.bin: $(BUILD)/%.elf + @$(OBJCOPY) -O binary $< $@ + +$(BUILD)/%.s: $(BUILD)/%.elf + @$(OBJDUMP) -S $< > $@ + +$(BUILD)/%.map: $(BUILD)/%.elf + @$(OBJDUMP) -S $< > $@ + +# pull in dependencies +-include $(OBJS:.o=.d) $(SOLO_OBJS:.o=.d) $(MULTI_OBJS:.o=.d) diff --git a/test.mk b/test.mk index 5341616d..c181a5a1 100644 --- a/test.mk +++ b/test.mk @@ -1,16 +1,15 @@ -BUILDROOT ?= . - +BUILDROOT ?= . BUILD ?= $(BUILDROOT)/Build SOURCE = $(BUILDROOT)/Source LIBSOURCE = $(BUILDROOT)/LibSource -GENSOURCE = $(BUILD)/Source +BUILDSOURCE = $(BUILD)/Source TESTPATCHES = $(BUILDROOT)/TestPatches DSPLIB = Libraries/CMSIS/DSP_Lib/Source CPPFLAGS = -g -Wall CPPFLAGS += -I$(SOURCE) CPPFLAGS += -I$(PATCHSOURCE) CPPFLAGS += -I$(LIBSOURCE) -CPPFLAGS += -I$(GENSOURCE) +CPPFLAGS += -I$(BUILDSOURCE) CPPFLAGS += -I$(TESTPATCHES) CPPFLAGS += -ILibraries -ILibraries/KissFFT CXXFLAGS = -std=c++14 @@ -38,7 +37,9 @@ OBJDUMP=$(TOOLROOT)objdump # C_SRC += $(DSPLIB)/TransformFunctions/arm_bitreversal.c include $(BUILDROOT)/sources.mk -C_SRC += Libraries/KissFFT/kiss_fft.c +C_SRC += Libraries/KissFFT/kiss_fft.c +C_SRC += $(wildcard $(BUILDSOURCE)/*.c) +CPP_SRC += $(wildcard $(BUILDSOURCE)/*.cpp) # Set up search path OBJS = $(addprefix $(BUILD)/Test/,$(notdir $(C_SRC:.c=.o))) @@ -46,8 +47,8 @@ OBJS += $(addprefix $(BUILD)/Test/,$(notdir $(CPP_SRC:.cpp=.o))) vpath %.c $(sort $(dir $(C_SRC))) vpath %.cpp $(sort $(dir $(CPP_SRC))) -vpath %.cpp $(SOURCE) $(LIBSOURCE) $(GENSOURCE) -vpath %.c $(SOURCE) $(LIBSOURCE) $(GENSOURCE) +vpath %.cpp $(SOURCE) $(LIBSOURCE) $(BUILDSOURCE) +vpath %.c $(SOURCE) $(LIBSOURCE) $(BUILDSOURCE) .PHONY: perform test diff --git a/web.mk b/web.mk index 236cc6c4..8c50a2f7 100644 --- a/web.mk +++ b/web.mk @@ -1,6 +1,6 @@ LIBSOURCE = $(BUILDROOT)/LibSource SOURCE = $(BUILDROOT)/Source -GENSOURCE = $(BUILD)/Source +BUILDSOURCE = $(BUILD)/Source DAISYSP = $(BUILDROOT)/Libraries/DaisySP/Source # emscripten @@ -8,7 +8,7 @@ EMCC ?= emcc EMAR ?= emar EMCCFLAGS += -fno-rtti -fno-exceptions # EMCCFLAGS += -s ASSERTIONS=1 -Wall -EMCCFLAGS += -I$(SOURCE) -I$(PATCHSOURCE) -I$(LIBSOURCE) -I$(GENSOURCE) -I$(BUILD) +EMCCFLAGS += -I$(SOURCE) -I$(PATCHSOURCE) -I$(LIBSOURCE) -I$(BUILDSOURCE) -I$(BUILD) EMCCFLAGS += -I$(BUILD)/Source EMCCFLAGS += -I$(DAISYSP) EMCCFLAGS += -I$(DAISYSP)/Control @@ -55,10 +55,10 @@ EMCC_OBJS += $(addprefix $(WEBDIR)/, $(notdir $(C_SRC:.c=.o))) EMDAISYSP_CPP_SRC = $(wildcard $(DAISYSP)/*/*.cpp) EMDAISYSP_OBJS = $(addprefix $(WEBDIR)/, $(notdir $(EMDAISYSP_CPP_SRC:.cpp=.o))) -PATCH_C_SRC = $(wildcard $(GENSOURCE)/*.c) +PATCH_C_SRC = $(wildcard $(BUILDSOURCE)/*.c) PATCH_C_SRC += $(wildcard $(PATCHSOURCE)/*.c) PATCH_CPP_SRC = $(SOURCE)/PatchProgram.cpp -PATCH_CPP_SRC += $(wildcard $(GENSOURCE)/*.cpp) +PATCH_CPP_SRC += $(wildcard $(BUILDSOURCE)/*.cpp) PATCH_CPP_SRC += $(wildcard $(PATCHSOURCE)/*.cpp) PATCH_OBJS = $(addprefix $(WEBDIR)/, $(notdir $(PATCH_CPP_SRC:.cpp=.o))) @@ -84,9 +84,9 @@ vpath %.s $(LIBSOURCE) vpath %.cpp $(PATCHSOURCE) vpath %.c $(PATCHSOURCE) vpath %.s $(PATCHSOURCE) -vpath %.cpp $(GENSOURCE) -vpath %.c $(GENSOURCE) -vpath %.s $(GENSOURCE) +vpath %.cpp $(BUILDSOURCE) +vpath %.c $(BUILDSOURCE) +vpath %.s $(BUILDSOURCE) vpath %.cpp WebSource vpath %.c Libraries/KissFFT From 7d6c91620f128aea558491f1ca789b328c24e5d1 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 15:37:39 +0100 Subject: [PATCH 030/374] changed make target 'run' to 'load', and 'perform' to 'run' --- Makefile | 10 +++++----- README.md | 33 +++++++++++++++++---------------- TestPatches/DummyPatch.hpp | 36 ++++++++++++++++++------------------ test.mk | 7 +++++-- 4 files changed, 45 insertions(+), 41 deletions(-) diff --git a/Makefile b/Makefile index 58c1c97e..6397b962 100644 --- a/Makefile +++ b/Makefile @@ -88,7 +88,7 @@ DEPS += $(BUILD)/registerpatch.cpp $(BUILD)/registerpatch.h $(BUILD)/Source/star all: libs patch web -.PHONY: .FORCE patch libs faust gen heavy soul maximilian web minify map as test perform check tables resource size clean realclean sysex run store docs help +.PHONY: .FORCE patch libs faust gen heavy soul maximilian web minify map as test run check tables resource size clean realclean sysex load store docs help .FORCE: @mkdir -p $(BUILD)/Source @@ -140,8 +140,8 @@ soul: .FORCE sysex: patch $(BUILD)/$(TARGET).syx ## package patch binary as MIDI sysex @echo Built sysex $(PATCHNAME) in $(BUILD)/$(TARGET).syx -run: patch ## upload patch to attached OWL via MIDI - @echo Sending patch $(PATCHNAME) to $(OWLDEVICE) to run +load: patch ## upload patch to attached OWL via MIDI + @echo Sending patch $(PATCHNAME) to $(OWLDEVICE) to load @$(FIRMWARESENDER) -q -in $(BUILD)/$(TARGET).bin -out "$(OWLDEVICE)" -run store: patch ## upload and save patch to attached OWL @@ -178,8 +178,8 @@ as: patch ## build assembly file (Build/patch.s) test: $(DEPS) ## test patch locally @$(MAKE) -s -f test.mk test -perform: $(DEPS) ## run patch locally - @$(MAKE) -s -f test.mk perform +run: $(DEPS) ## run patch locally + @$(MAKE) -s -f test.mk run check: ## run tests @$(MAKE) -s TEST=ComplexFourierTransformTest test diff --git a/README.md b/README.md index 462d4cbe..2a54831c 100644 --- a/README.md +++ b/README.md @@ -9,7 +9,7 @@ It is used to build, run and store patches written in Pure Data, FAUST, Max Gen, ## Prerequisites * gcc arm compiler (to make patch binary) [[1]](#ref1) -* FirmwareSender (to make sysex and run) [[2]](#ref2) +* FirmwareSender (to make, load and store sysex) [[2]](#ref2) * emcc (to make web) [[3]](#ref3) * faust2owl (to compile FAUST patches) [[4]](#ref4) * The Heavy `hvcc` compiler (to compile PD patches) [[5]](#ref5) @@ -45,7 +45,7 @@ To compile patches in native format (e.g. for testing) you will also need the gc Compile FirmwareSender -FirmwareSender makes it possible to use `run` and `store` make targets, or by invoking FirmwareSender directly to run/store a compiled patch to the device using sysex codes. +FirmwareSender makes it possible to use `load` and `store` make targets, or by invoking FirmwareSender directly to load/store a compiled patch to the device using sysex codes. $ sudo apt install libasound2-dev libcurl4-openssl-dev pkg-config $ git clone https://github.com/pingdynasty/FirmwareSender @@ -58,14 +58,15 @@ FirmwareSender makes it possible to use `run` and `store` make targets, or by in * make libs: build library archives * make patch: build patch binary * make sysex: package binary as sysex -* make run: upload patch to attached OWL -* make store: upload and save to attached OWL +* make load: upload patch to attached OWL and run from RAM +* make store: upload patch to attached OWL and store in FLASH * make web: build Javascript patch * make clean: remove intermediary and target files * make realclean: remove all (library+patch) intermediary and target files * make size: show binary size metrics and large object summary +* make native: build a native format binary of your patch * make test: build and test a native format binary of your patch -* make perform: build and run a native format binary of your patch +* make run: build and run a native format binary of your patch * make map: build map file (Build/patch.map) * make as: build assembly file (Build/patch.s) * make help: print target information @@ -97,17 +98,17 @@ Note that when storing user programs, the legacy OwlWare firmware has four user ## Building C++ patches First copy all patch files to `PatchSource` folder, then issue the appropriate make command. -Example: Compile and run the TestTone patch, defined in file `PatchSource/TestTonePatch.hpp` as class `TestTonePatch`: -`make PATCHNAME=TestTone run` +Example: Compile and load the TestTone patch, defined in file `PatchSource/TestTonePatch.hpp` as class `TestTonePatch`: +`make PATCHNAME=TestTone load` Example: Compile and run in browser `make PATCHNAME=TestTone web` Then open `Build/web/patch.html` ## Building FAUST patches -To compile and run a FAUST patch +To compile and load a FAUST patch * copy .dsp file and dependencies into `PatchSource`, e.g. `LowShelf.dsp` -* `make FAUST=LowShelf run` +* `make FAUST=LowShelf load` Note: assign OWL parameters with slider metadata: `[OWL:A]`, `[OWL:B]` et c. For example: ```gain = vslider("gain[OWL:C]", 1,0,1,0.1);```. Assign push button with e.g. ```gate = button("gate[OWL:Push]");``` @@ -115,23 +116,23 @@ Note: assign OWL parameters with slider metadata: `[OWL:A]`, `[OWL:B]` et c. For ## Building Pure Data patches * put your PD patch file (e.g. `Foo.pd`) into `PatchSource` -* `make HEAVY=Foo run` +* `make HEAVY=Foo load` ## Building Max Gen patches Requires the `.cpp` and `.h` files of a Gen patch generated by Max Gen. -To compile and run a Gen patch called `Foo`: +To compile and load a Gen patch called `Foo`: * copy `Foo.cpp` and `Foo.h` into `PatchSource` -* `make GEN=Foo run` +* `make GEN=Foo load` Note: use OWL parameters in Gen with parameter names: `A`, `B`, `C`, `D`, `Exp`, and `Push`. ## Building Maximilian patches Requires your Maximilian code to be in a `.cpp` file. -To compile and run a Maximilian patch called `Foo`: +To compile and load a Maximilian patch called `Foo`: * copy `Foo.cpp` into `PatchSource` -* `make MAXIMILIAN=Foo run` +* `make MAXIMILIAN=Foo load` Note: use OWL parameters in Maximilian by adding maxiParam objects to your patch. @@ -162,9 +163,9 @@ Compile the puredata file owl_hypersaw.pd[[8]](#ref8): make HEAVY=owl_hypersaw clean patch -Compile puredata file owl_hypersaw.pd and send to device to be run immediately: +Compile puredata file owl_hypersaw.pd and send to device to be run immediately from RAM: - make HEAVY=owl_hypersaw clean run + make HEAVY=owl_hypersaw clean load # References [1] https://developer.arm.com/open-source/gnu-toolchain/gnu-rm diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp index 3d8ccf95..27eaff33 100644 --- a/TestPatches/DummyPatch.hpp +++ b/TestPatches/DummyPatch.hpp @@ -79,9 +79,24 @@ void arm_bitreversal_16(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t } #endif -void assert_failed(const char* msg, const char* location, int line){ - printf("Assertion failed: %s, in %s line %d\n", msg, location, line); - exit(-1); +extern "C"{ + void doSetButton(uint8_t bid, uint16_t value, uint16_t samples){ + printf("Set button %c: %d\n", 'A'+bid, value); + if(value) + button_values |= (1< Date: Wed, 17 Feb 2021 15:38:19 +0100 Subject: [PATCH 031/374] changed test.mk Makefile name to native.mk --- Makefile | 4 ++-- test.mk => native.mk | 0 2 files changed, 2 insertions(+), 2 deletions(-) rename test.mk => native.mk (100%) diff --git a/Makefile b/Makefile index 6397b962..0e1e31fc 100644 --- a/Makefile +++ b/Makefile @@ -176,10 +176,10 @@ as: patch ## build assembly file (Build/patch.s) @echo Built $(PATCHNAME) assembly in $(BUILD)/$(TARGET).s test: $(DEPS) ## test patch locally - @$(MAKE) -s -f test.mk test + @$(MAKE) -s -f native.mk test run: $(DEPS) ## run patch locally - @$(MAKE) -s -f test.mk run + @$(MAKE) -s -f native.mk run check: ## run tests @$(MAKE) -s TEST=ComplexFourierTransformTest test diff --git a/test.mk b/native.mk similarity index 100% rename from test.mk rename to native.mk From 07ee69c68c9413fda164c4de24656fbfe6fbf02a Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 16:08:46 +0100 Subject: [PATCH 032/374] added top-level native make target --- Makefile | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 0e1e31fc..9ef3d625 100644 --- a/Makefile +++ b/Makefile @@ -88,7 +88,7 @@ DEPS += $(BUILD)/registerpatch.cpp $(BUILD)/registerpatch.h $(BUILD)/Source/star all: libs patch web -.PHONY: .FORCE patch libs faust gen heavy soul maximilian web minify map as test run check tables resource size clean realclean sysex load store docs help +.PHONY: .FORCE patch libs faust gen heavy soul maximilian web minify map as native test run check tables resource size clean realclean sysex load store docs help .FORCE: @mkdir -p $(BUILD)/Source @@ -175,6 +175,9 @@ as: patch ## build assembly file (Build/patch.s) @$(MAKE) -s -f compile.mk as @echo Built $(PATCHNAME) assembly in $(BUILD)/$(TARGET).s +native: $(DEPS) ## build native executable of patch + @$(MAKE) -s -f native.mk native + test: $(DEPS) ## test patch locally @$(MAKE) -s -f native.mk test From 26072df05fd6a022828145bdcfa0f6c71aa8ded2 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Fri, 12 Feb 2021 16:26:24 +0100 Subject: [PATCH 033/374] refactored library classes with common base classes SignalGenerator and SignalProcessor --- LibSource/BiquadFilter.h | 52 +++++-- LibSource/ChirpOscillator.h | 35 +++-- LibSource/Envelope.cpp | 27 +--- LibSource/Envelope.h | 61 +++++++-- LibSource/ExponentialDecayEnvelope.h | 34 +++-- LibSource/FirFilter.h | 20 ++- LibSource/NoiseGenerator.h | 196 +++++++++++++++++++++++++++ LibSource/NoiseOscillator.h | 195 +------------------------- LibSource/OpenWareLibrary.h | 19 +++ LibSource/Oscillator.h | 55 ++++++-- LibSource/PolyBlepOscillator.cpp | 42 ++++-- LibSource/PolyBlepOscillator.h | 20 +-- LibSource/RampOscillator.h | 27 ++-- LibSource/Resample.h | 79 ++++++++++- LibSource/SignalGenerator.h | 27 ++++ LibSource/SignalProcessor.h | 14 ++ LibSource/SineOscillator.h | 34 +++-- LibSource/StateVariableFilter.h | 8 +- LibSource/TemplatePatch.hpp | 41 ++++++ LibSource/WavetableOscillator.cpp | 28 ++-- LibSource/WavetableOscillator.h | 19 ++- LibSource/Window.h | 6 +- 22 files changed, 679 insertions(+), 360 deletions(-) create mode 100644 LibSource/NoiseGenerator.h create mode 100644 LibSource/OpenWareLibrary.h create mode 100644 LibSource/SignalGenerator.h create mode 100644 LibSource/SignalProcessor.h create mode 100644 LibSource/TemplatePatch.hpp diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h index be737684..ca5c5382 100644 --- a/LibSource/BiquadFilter.h +++ b/LibSource/BiquadFilter.h @@ -2,6 +2,7 @@ #define __BiquadFilter_h__ #include "FloatArray.h" +#include "SignalProcessor.h" class FilterStage { public: @@ -38,7 +39,7 @@ class FilterStage { void setHighShelf(float fc, float gain){ setHighShelf(coefficients, fc, gain); } - void setCoefficients(FloatArray newCoefficients){ + void copyCoefficients(FloatArray newCoefficients){ ASSERT(coefficients.getSize()==newCoefficients.getSize(), "wrong size"); coefficients.copyFrom(newCoefficients); } @@ -51,7 +52,7 @@ class FilterStage { } static void setLowPass(float* coefficients, float fc, float q){ - float omega = M_PI*fc/2; + float omega = M_PI*fc; float K = tanf(omega); float norm = 1 / (1 + K / q + K * K); coefficients[0] = K * K * norm; @@ -62,7 +63,7 @@ class FilterStage { } static void setHighPass(float* coefficients, float fc, float q){ - float omega = M_PI*fc/2; + float omega = M_PI*fc; float K = tanf(omega); float norm = 1 / (1 + K / q + K * K); coefficients[0] = 1 * norm; @@ -73,7 +74,7 @@ class FilterStage { } static void setBandPass(float* coefficients, float fc, float q){ - float omega = M_PI*fc/2; + float omega = M_PI*fc; float K = tanf(omega); float norm = 1 / (1 + K / q + K * K); coefficients[0] = K / q * norm; @@ -84,7 +85,7 @@ class FilterStage { } static void setNotch(float* coefficients, float fc, float q){ - float omega = M_PI*fc/2; + float omega = M_PI*fc; float K = tanf(omega); float norm = 1 / (1 + K / q + K * K); coefficients[0] = (1 + K * K) * norm; @@ -95,7 +96,7 @@ class FilterStage { } static void setPeak(float* coefficients, float fc, float q, float gain){ - float omega = M_PI*fc/2; + float omega = M_PI*fc; float K = tanf(omega); float V = fabs(gain-0.5)*60 + 1; // Gain float norm; @@ -118,7 +119,7 @@ class FilterStage { } static void setLowShelf(float* coefficients, float fc, float gain){ - float omega = M_PI*fc/2; + float omega = M_PI*fc; float K = tanf(omega); float V = fabs(gain-0.5)*60 + 1; // Gain float norm; @@ -140,7 +141,7 @@ class FilterStage { } static void setHighShelf(float* coefficients, float fc, float gain){ - float omega = M_PI*fc/2; + float omega = M_PI*fc; float K = tanf(omega); float V = fabs(gain-0.5)*60 + 1; // Gain float norm; @@ -170,7 +171,7 @@ class FilterStage { */ #define BIQUAD_COEFFICIENTS_PER_STAGE 5 #define BIQUAD_STATE_VARIABLES_PER_STAGE 2 -class BiquadFilter { +class BiquadFilter : public SignalProcessor { private: #ifdef ARM_CORTEX // arm_biquad_casd_df1_inst_f32 df1; @@ -287,32 +288,57 @@ class BiquadFilter { return output; } + void setLowPass(float fc, float q, float sr){ + setLowPass(fc/sr, q); + } void setLowPass(float fc, float q){ FilterStage::setLowPass(coefficients, fc, q); copyCoefficients(); } + void setHighPass(float fc, float q, float sr){ + setHighPass(fc/sr, q); + } void setHighPass(float fc, float q){ FilterStage::setHighPass(coefficients, fc, q); copyCoefficients(); } + void setBandPass(float fc, float q, float sr){ + setBandPass(fc/sr, q); + } void setBandPass(float fc, float q){ FilterStage::setBandPass(coefficients, fc, q); copyCoefficients(); } + + void setNotch(float fc, float q, float sr){ + setNotch(fc/sr, q); + } void setNotch(float fc, float q){ FilterStage::setNotch(coefficients, fc, q); copyCoefficients(); } + + void setPeak(float fc, float q, float gain, float sr){ + setPeak(fc/sr, q, gain); + } void setPeak(float fc, float q, float gain){ FilterStage::setPeak(coefficients, fc, q, gain); copyCoefficients(); } + + void setLowShelf(float fc, float gain, float sr){ + setLowShelf(fc/sr, gain); + } void setLowShelf(float fc, float gain){ FilterStage::setLowShelf(coefficients, fc, gain); copyCoefficients(); } + + void setHighShelf(float fc, float gain, float sr){ + setHighShelf(fc/sr, gain); + } void setHighShelf(float fc, float gain){ FilterStage::setHighShelf(coefficients, fc, gain); copyCoefficients(); @@ -324,11 +350,15 @@ class BiquadFilter { init(); } - void setCoefficients(FloatArray newCoefficients){//copies coefficients to all stages + void copyCoefficients(FloatArray newCoefficients){ ASSERT(newCoefficients.getSize()==BIQUAD_COEFFICIENTS_PER_STAGE, "wrong size"); - getFilterStage(0).setCoefficients(newCoefficients); + getFilterStage(0).copyCoefficients(newCoefficients); copyCoefficients(); //set all the other stages } + [[deprecated("use copyCoefficients() instead.")]] + void setCoefficients(FloatArray newCoefficients){ // copies coefficients to all stages + copyCoefficients(newCoefficients); + } static BiquadFilter* create(int stages){ return new BiquadFilter(new float[stages*5], new float[stages*2], stages); diff --git a/LibSource/ChirpOscillator.h b/LibSource/ChirpOscillator.h index ab363d50..6f2ec443 100644 --- a/LibSource/ChirpOscillator.h +++ b/LibSource/ChirpOscillator.h @@ -5,33 +5,36 @@ class ChirpOscillator : public Oscillator { private: - const float fs; float phase; float incr; public: float rate; - ChirpOscillator(float sr) - : fs(sr), phase(0.0f), incr(1.0f){} - void setFrequency(float freq){ - incr = freq*2*M_PI/fs; + ChirpOscillator() + : phase(0.0f), incr(1.0f), rate(0) {} + using Oscillator::setFrequency; + void setFrequency(float nfreq){ + incr = nfreq*M_PI; } - void setRate(float r){ + void setRate(float r, float sr){ // should be: rate 0: 1 (constant), rate -1: 1-0.5/sr (halved in a second), rate 1: 1+1/sr (doubled in a second) if(r < 0) - rate = 1.0f - 10*(1/(1-r))/fs; + rate = 1.0f - 10*(1/(1-r))/sr; else - rate = 1.0f + 10*(1/(1+r))/fs; + rate = 1.0f + 10*(1/(1+r))/sr; } /** * Set expontential decay rate. */ - void setDecay(float d){ - setRate(-(d+1/fs)); + void setDecay(float d, float sr){ + setRate(-(d+1/sr), sr); } void trigger(){ + reset(); + } + void reset(){ phase = 0.0f; } - float getNextSample(){ + float generate(){ float sample = sinf(phase); phase += incr; incr *= rate; @@ -40,8 +43,14 @@ class ChirpOscillator : public Oscillator { // phase -= 2*M_PI; return sample; } - static ChirpOscillator* create(float sr){ - return new ChirpOscillator(sr); + float generate(float fm){ + float sample = sinf(phase); + phase += incr + fm; + incr *= rate; + return sample; + } + static ChirpOscillator* create(){ + return new ChirpOscillator(); } static void destroy(ChirpOscillator* osc){ delete osc; diff --git a/LibSource/Envelope.cpp b/LibSource/Envelope.cpp index d54e83eb..29a544ac 100644 --- a/LibSource/Envelope.cpp +++ b/LibSource/Envelope.cpp @@ -9,10 +9,7 @@ void EnvelopeGenerator::calculateMultiplier(double startLevel, } */ -const float AdsrEnvelope::minTime = 0.001; - -AdsrEnvelope::AdsrEnvelope(float sampleRate) : - samplePeriod(1.0/sampleRate), +AdsrEnvelope::AdsrEnvelope() : stage(kIdle), trig(kGate), level(0.0), @@ -28,23 +25,19 @@ AdsrEnvelope::AdsrEnvelope(float sampleRate) : AdsrEnvelope::~AdsrEnvelope(){} void AdsrEnvelope::setAttack(float newAttack){ - newAttack = newAttack > minTime ? newAttack : minTime; - attackIncrement = samplePeriod / newAttack; + attackIncrement = 1 / newAttack; } void AdsrEnvelope::setDecay(float newDecay){ - newDecay = newDecay > minTime ? newDecay : minTime; - decayIncrement = - samplePeriod / newDecay; + decayIncrement = - 1 / newDecay; } void AdsrEnvelope::setRelease(float newRelease){ - newRelease = newRelease > minTime ? newRelease : minTime; - releaseIncrement = - samplePeriod / newRelease; + releaseIncrement = - 1 / newRelease; } void AdsrEnvelope::setSustain(float newSustain){ sustain = newSustain; - // TODO: in the real world, you would probably glide to the new sustain level at a rate determined by either decay or attack } void AdsrEnvelope::setRetrigger(bool state){ @@ -84,17 +77,7 @@ void AdsrEnvelope::setLevel(float newLevel){ level = newLevel; } -void AdsrEnvelope::attenuate(FloatArray output){ - for(size_t n = 0; n < output.getSize(); n++) - output[n] *= getNextSample(); -} - -void AdsrEnvelope::getEnvelope(FloatArray output){ - for(size_t n = 0; n < output.getSize(); n++) - output[n] = getNextSample(); -} - -float AdsrEnvelope::getNextSample(){ +float AdsrEnvelope::generate(){ if(gateTime == 0){ stage = kAttack; if(trig == kTrigger){ diff --git a/LibSource/Envelope.h b/LibSource/Envelope.h index 753f0e93..04c55d77 100644 --- a/LibSource/Envelope.h +++ b/LibSource/Envelope.h @@ -2,9 +2,12 @@ #define ENVELOPE_HPP #include "FloatArray.h" +#include "SignalGenerator.h" +#include "SignalProcessor.h" -class Envelope { +class Envelope : public SignalGenerator, SignalProcessor { public: + using SignalGenerator::generate; virtual void trigger(){ trigger(true, 0); } @@ -16,6 +19,13 @@ class Envelope { gate(state, 0); } virtual void gate(bool state, int gateDelay){} + /** + * Attenuate samples in @param input by envelope and place results in @param output + */ + virtual void process(FloatArray input, FloatArray output){ + for(size_t n = 0; n < output.getSize(); n++) + output[n] = input[n]*generate(); + } }; /** @@ -27,14 +37,22 @@ class AdsrEnvelope : public Envelope { enum EnvelopeTrigger { kGate, kTrigger }; public: - AdsrEnvelope(float newSampleRate); + AdsrEnvelope(); virtual ~AdsrEnvelope(); - void setSampleRate(float sampleRate){ - samplePeriod = 1.0/sampleRate; + using Envelope::process; + using SignalGenerator::generate; + void setAttack(float newAttack, float sr){ + setAttack(newAttack/sr); } void setAttack(float newAttack); + void setDecay(float newDecay, float sr){ + setDecay(newDecay/sr); + } void setDecay(float newDecay); - void setRelease(float newRelase); + void setRelease(float newRelease, float sr){ + setRelease(newRelease/sr); + } + void setRelease(float newRelease); void setSustain(float newSustain); void trigger(); void trigger(bool state); @@ -44,18 +62,37 @@ class AdsrEnvelope : public Envelope { void gate(bool state, int gateDelay); float getLevel(); void setLevel(float newLevel); - float getNextSample(); // increments envelope one step - void getEnvelope(FloatArray output); // increments envelope by output buffer length - void attenuate(FloatArray buf); // increments envelope by buffer length - static AdsrEnvelope* create(float sr){ - return new AdsrEnvelope(sr); + /** + * Produce the next envelope sample. + */ + float generate(); + [[deprecated("use generate() instead.")]] + float getNextSample(){ + return generate(); // increments envelope one step + } + [[deprecated("use generate() instead.")]] + void getEnvelope(FloatArray output){ + generate(output); // increments envelope by output buffer length + } + [[deprecated("use process() instead.")]] + void attenuate(FloatArray buf){ + process(buf, buf); // increments envelope by buffer length + } + static AdsrEnvelope* create(){ + return new AdsrEnvelope(); + } + static AdsrEnvelope* create(float a, float d, float s, float r, float sr){ + AdsrEnvelope* env = new AdsrEnvelope(); + env->setAttack(a, sr); + env->setDecay(d, sr); + env->setSustain(s); + env->setRelease(r, sr); + return env; } static void destroy(AdsrEnvelope* env){ delete env; } private: - static const float minTime; - float samplePeriod; EnvelopeStage stage; EnvelopeTrigger trig; bool retrigger; diff --git a/LibSource/ExponentialDecayEnvelope.h b/LibSource/ExponentialDecayEnvelope.h index 2459c832..4f3e7a4f 100644 --- a/LibSource/ExponentialDecayEnvelope.h +++ b/LibSource/ExponentialDecayEnvelope.h @@ -5,31 +5,43 @@ class ExponentialDecayEnvelope : public Envelope { private: - const float fs; float value; float incr; public: - ExponentialDecayEnvelope(float sr) - : fs(sr){} - void setRate(float r){ + ExponentialDecayEnvelope(): value(0), incr(0){} + using Envelope::process; + using SignalGenerator::generate; + void setRate(float r, float sr){ if(r < 0) - incr = 1.0f - 100*(1/(1-r))/fs; + incr = 1.0f - 100*(1/(1-r))/sr; else - incr = 1.0f + 100*r/fs; + incr = 1.0f + 100*r/sr; } - void setDecay(float d){ - setRate(-(d+1/fs)); + void setDecay(float d, float sr){ + setRate(-(d+1/sr), sr); } void trigger(){ value = 1.0; } - float getNextSample(){ + /** + * Produce the next envelope sample. + */ + float generate(){ float sample = value; value *= incr; return sample; } - static ExponentialDecayEnvelope* create(float sr){ - return new ExponentialDecayEnvelope(sr); + [[deprecated("use generate() instead.")]] + float getNextSample(){ + return generate(); // increments envelope one step + } + static ExponentialDecayEnvelope* create(){ + return new ExponentialDecayEnvelope(); + } + static ExponentialDecayEnvelope* create(float rate, float sr){ + ExponentialDecayEnvelope* env = new ExponentialDecayEnvelope(); + env->setRate(rate, sr); + return env; } static void destroy(ExponentialDecayEnvelope* env){ delete env; diff --git a/LibSource/FirFilter.h b/LibSource/FirFilter.h index 720f3500..d36962cf 100644 --- a/LibSource/FirFilter.h +++ b/LibSource/FirFilter.h @@ -2,8 +2,9 @@ #define __FirFilter_h__ #include "FloatArray.h" +#include "SignalProcessor.h" -class FirFilter { +class FirFilter : public SignalProcessor { private: FloatArray coefficients; FloatArray states; @@ -48,17 +49,26 @@ class FirFilter { ~FirFilter(){ } - void processBlock(FloatArray buffer){ + void process(FloatArray buffer){ ASSERT(buffer.getSize()<=blockSize, "Too large"); //TODO: check that in-place actually works properly processBlock(buffer.getData(), buffer.getData(), buffer.getSize()); } - - void processBlock(FloatArray source, FloatArray destination){ + + void process(FloatArray source, FloatArray destination){ ASSERT(source.getSize()<=blockSize, "Too large"); ASSERT(source.getSize()==destination.getSize(), "Sizes don't match"); processBlock(source.getData(), destination.getData(), destination.getSize()); } - + + [[deprecated("use process() instead.")]] + void processBlock(FloatArray buffer){ + process(buffer); + } + [[deprecated("use process() instead.")]] + void processBlock(FloatArray source, FloatArray destination){ + process(source, destination); + } + FloatArray getCoefficients(){ return coefficients; }; diff --git a/LibSource/NoiseGenerator.h b/LibSource/NoiseGenerator.h new file mode 100644 index 00000000..893c833f --- /dev/null +++ b/LibSource/NoiseGenerator.h @@ -0,0 +1,196 @@ +#ifndef NOISE_GENERATOR_HPP +#define NOISE_GENERATOR_HPP + +#include +#include "basicmaths.h" +#include "SignalGenerator.h" + +class WhiteNoiseGenerator : public SignalGenerator { + public: + /* returns white noise in the range -0.5 to 0.5 */ + virtual float generate(){ +#if 0 // #ifdef ARM_CORTEX + // todo: fixme + union { + float f; + uint32_t i; + } x; + x.i = arm_rand32(); + // brutally converting u32 to float by zeroing some + // exponent bits in IEEE single precision float + // x.i &= 0xbfffffff; // mask top exponent bit to get exponent values from 2^-1 to 2^-126 (-1 to 1) + x.i &= 0x9fffffff; // mask top two exponent bits to get exponent values from 2^-2 to 2^-126 (-0.5 to 0.5) + // mantissa holds a value from 1.0 to 1.999... + // https://en.wikipedia.org/wiki/Single-precision_floating-point_format + return x.f; +#else + return (rand()/(float)RAND_MAX) * 2 - 1; +#endif + } + + static WhiteNoiseGenerator* create(){ + return new WhiteNoiseGenerator(); + } + static void destroy(WhiteNoiseGenerator* osc){ + delete osc; + } +}; + +#ifdef ARM_CORTEX +#define CTZ(x) (__builtin_ctz(x)) +#else +int inline CTZ(int num){ + int i=0; + while (((num>>i)&1)==0 && i 4.0f) + m_pink -= r; + else + break; + } + // update counter + m_count++; + return (WhiteNoiseGenerator::generate() + m_pink)*0.125f; + } + static PinkNoiseGenerator* create(){ + return new PinkNoiseGenerator(); + } + static void destroy(PinkNoiseGenerator* osc){ + delete osc; + } +private: + unsigned long m_count; + float m_pink; + float m_pinkStore[NumPinkBins]; +}; + +/** + * Generator that produces Brownian noise (aka red noise) + */ +class BrownNoiseGenerator : public WhiteNoiseGenerator { +private: + float m_brown; +public: + BrownNoiseGenerator(){ + m_brown = 0.0f; + } + // returns brown noise random number in the range -0.5 to 0.5 + // + float generate() { + while (true) + { + float r = WhiteNoiseGenerator::generate(); + m_brown += r; + if (m_brown<-8.0f || m_brown>8.0f) + m_brown -= r; + else + break; + } + return m_brown*0.0625f; + } + static BrownNoiseGenerator* create(){ + return new BrownNoiseGenerator(); + } + static void destroy(BrownNoiseGenerator* osc){ + delete osc; + } +}; + +class GaussianNoiseGenerator : public SignalGenerator { +private: + FloatArray noise; // whitenoise + int phase; +public: + GaussianNoiseGenerator(FloatArray ns) : noise(ns), phase(0) {} + + static void destroy(GaussianNoiseGenerator* gn){ + FloatArray::destroy(gn->noise); + delete gn; + } + + static GaussianNoiseGenerator* create(int size){ + GaussianNoiseGenerator* gn = new GaussianNoiseGenerator(FloatArray::create(size)); + // generate white gaussian noise: + // from http://www.musicdsp.org/showone.php?id=168 + /* Setup constants */ + const static int q = 15; + const static float c1 = (1 << q) - 1; + const static float c2 = ((int)(c1 / 3)) + 1; + const static float c3 = 1.f / c1; + float max = 0; + + /* random number in range 0 - 1 not including 1 */ + float random = 0.f; + for(int i = 0; i < gn->noise.getSize(); i++){ + random = ((float)rand() / (float)RAND_MAX); + gn->noise[i] = (2.f * ((random * c2) + (random * c2) + (random * c2)) - 3.f * (c2 - 1.f)) * c3; + if(fabs(gn->noise[i]) > max) + max = fabs(gn->noise[i]); + } + for (int i = 0; i < gn->noise.getSize(); i++){ + //normalize the gain of our noise + gn->noise[i] = gn->noise[i] / max; + } + + return gn; + } + + float generate(){ + float sample = noise[phase]; + if(++phase == noise.getSize()) + phase = 0; + return sample; + } +}; + + +#if 0 // ARM_CORTEX +class TrueNoiseGenerator : public SignalGenerator { +public: + TrueNoiseGenerator() { + RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_RNG,ENABLE); + RNG_Cmd(ENABLE); + } + float generate(){ + while(RNG_GetFlagStatus(RNG_FLAG_DRDY) == RESET); + uint32_t data = RNG_GetRandomNumber(); + return data/float(UINT32_MAX); + } +}; +#endif + +#endif /* NOISE_GENERATOR_HPP */ diff --git a/LibSource/NoiseOscillator.h b/LibSource/NoiseOscillator.h index c0f84d3d..adbdca6d 100644 --- a/LibSource/NoiseOscillator.h +++ b/LibSource/NoiseOscillator.h @@ -1,196 +1,13 @@ #ifndef NOISE_OSCILLATOR_HPP #define NOISE_OSCILLATOR_HPP -#include -#include "Oscillator.h" -#include "basicmaths.h" +#include "NoiseGenerator.h" -class WhiteNoiseOscillator : public Oscillator { - public: - /* returns white noise in the range -0.5 to 0.5 */ - virtual float getNextSample(){ -#if 0 // #ifdef ARM_CORTEX - // todo: fixme - union { - float f; - uint32_t i; - } x; - x.i = arm_rand32(); - // brutally converting u32 to float by zeroing some - // exponent bits in IEEE single precision float - // x.i &= 0xbfffffff; // mask top exponent bit to get exponent values from 2^-1 to 2^-126 (-1 to 1) - x.i &= 0x9fffffff; // mask top two exponent bits to get exponent values from 2^-2 to 2^-126 (-0.5 to 0.5) - // mantissa holds a value from 1.0 to 1.999... - // https://en.wikipedia.org/wiki/Single-precision_floating-point_format - return x.f; -#else - return (rand()/(float)RAND_MAX) * 2 - 1; -#endif - } +#warning "NoiseOscillator.h is deprecated, use NoiseGenerator.h instead" - static WhiteNoiseOscillator* create(){ - return new WhiteNoiseOscillator(); - } - static void destroy(WhiteNoiseOscillator* osc){ - delete osc; - } -}; - -#ifdef ARM_CORTEX -#define CTZ(x) (__builtin_ctz(x)) -#else -int inline CTZ(int num){ - int i=0; - while (((num>>i)&1)==0 && i 4.0f) - m_pink -= r; - else - break; - } - // update counter - m_count++; - return (WhiteNoiseOscillator::getNextSample() + m_pink)*0.125f; - } - static PinkNoiseOscillator* create(){ - return new PinkNoiseOscillator(); - } - static void destroy(PinkNoiseOscillator* osc){ - delete osc; - } -private: - unsigned long m_count; - float m_pink; - float m_pinkStore[NumPinkBins]; -}; - -/** - * Oscillator that produces Brownian noise (aka red noise) - */ -class BrownNoiseOscillator : public WhiteNoiseOscillator { -private: - float m_brown; -public: - BrownNoiseOscillator(){ - m_brown = 0.0f; - } - // returns brown noise random number in the range -0.5 to 0.5 - // - float getNextSample() { - while (true) - { - float r = WhiteNoiseOscillator::getNextSample(); - m_brown += r; - if (m_brown<-8.0f || m_brown>8.0f) - m_brown -= r; - else - break; - } - return m_brown*0.0625f; - } - static BrownNoiseOscillator* create(){ - return new BrownNoiseOscillator(); - } - static void destroy(BrownNoiseOscillator* osc){ - delete osc; - } -}; - -class GaussianNoiseOscillator : public Oscillator { -private: - FloatArray noise; // whitenoise - int phase; -public: - GaussianNoiseOscillator(FloatArray ns) : noise(ns), phase(0) {} - - static void destroy(GaussianNoiseOscillator* gn){ - FloatArray::destroy(gn->noise); - delete gn; - } - - static GaussianNoiseOscillator* create(int size){ - GaussianNoiseOscillator* gn = new GaussianNoiseOscillator(FloatArray::create(size)); - // generate white gaussian noise: - // from http://www.musicdsp.org/showone.php?id=168 - /* Setup constants */ - const static int q = 15; - const static float c1 = (1 << q) - 1; - const static float c2 = ((int)(c1 / 3)) + 1; - const static float c3 = 1.f / c1; - float max = 0; - - /* random number in range 0 - 1 not including 1 */ - float random = 0.f; - for(int i = 0; i < gn->noise.getSize(); i++){ - random = ((float)rand() / (float)RAND_MAX); - gn->noise[i] = (2.f * ((random * c2) + (random * c2) + (random * c2)) - 3.f * (c2 - 1.f)) * c3; - if(fabs(gn->noise[i]) > max) - max = fabs(gn->noise[i]); - } - for (int i = 0; i < gn->noise.getSize(); i++){ - //normalize the gain of our noise - gn->noise[i] = gn->noise[i] / max; - } - - return gn; - } - - float getNextSample(){ - float sample = noise[phase]; - if(++phase == noise.getSize()) - phase = 0; - return sample; - } -}; - - -#if 0 // ARM_CORTEX -class TrueNoiseOscillator : public Oscillator { -public: - TrueNoiseOscillator() { - RCC_AHB2PeriphClockCmd(RCC_AHB2Periph_RNG,ENABLE); - RNG_Cmd(ENABLE); - } - float getNextSample(){ - while(RNG_GetFlagStatus(RNG_FLAG_DRDY) == RESET); - uint32_t data = RNG_GetRandomNumber(); - return data/float(UINT32_MAX); - } -}; -#endif +typedef WhiteNoiseGenerator WhiteNoiseOscillator; +typedef PinkNoiseGenerator PinkNoiseOscillator; +typedef BrownNoiseGenerator BrownNoiseOscillator; +typedef GaussianNoiseGenerator GaussianNoiseOscillator; #endif /* NOISE_OSCILLATOR_HPP */ diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h new file mode 100644 index 00000000..d8b2c5a7 --- /dev/null +++ b/LibSource/OpenWareLibrary.h @@ -0,0 +1,19 @@ +#ifndef __OpenWareLibrary_h__ +#define __OpenWareLibrary_h__ + +#include "Patch.h" +#include "Window.h" +#include "NoiseGenerator.h" +#include "SineOscillator.h" +#include "RampOscillator.h" +#include "ChirpOscillator.h" +#include "PolyBlepOscillator.h" +#include "WavetableOscillator.h" +#include "FirFilter.h" +#include "BiquadFilter.h" +#include "StateVariableFilter.h" +#include "Envelope.h" +#include "ExponentialDecayEnvelope.h" +#include "Resample.h" + +#endif /* __OpenWareLibrary_h__ */ diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h index 8663fc6c..3e9625a0 100644 --- a/LibSource/Oscillator.h +++ b/LibSource/Oscillator.h @@ -2,25 +2,58 @@ #define OSCILLATOR_HPP #include "FloatArray.h" +#include "SignalGenerator.h" -class Oscillator { +/** + * An Oscillator is a SignalGenerator that operates at a given frequency + * and that can be frequency modulated. + */ +class Oscillator : public SignalGenerator { public: Oscillator(){} virtual ~Oscillator(){} - virtual float getNextSample(){ return 0.0f; } - virtual float getNextSample(float fm){ return 0.0f; } - /* Fills @param output with samples */ - virtual void getSamples(FloatArray output){ - for(size_t i=0; i(frequency, pw, shape, &sample, 1); return sample; } -void PolyBlepOscillator::getSamples(FloatArray output){ - osc.Render(frequency, pw, shape, output, output.getSize()); +float PolyBlepOscillator::generate(float fm){ + float sample; + osc.Render(frequency+fm, pw, shape, &sample, 1); + return sample; } -void PolyBlepOscillator::getSamples(FloatArray output, FloatArray frequency){ - frequency.multiply(multiplier); +void PolyBlepOscillator::generate(FloatArray output){ osc.Render(frequency, pw, shape, output, output.getSize()); } -PolyBlepOscillator* PolyBlepOscillator::create(float sr){ - return new PolyBlepOscillator(sr); +void PolyBlepOscillator::generate(FloatArray output, FloatArray fm){ + fm.add(frequency); // add our base frequency + osc.Render(fm, pw, shape, output, output.getSize()); +} + +void PolyBlepOscillator::getSamples(FloatArray output, FloatArray freqs){ + osc.Render(freqs, pw, shape, output, output.getSize()); +} + +PolyBlepOscillator* PolyBlepOscillator::create(){ + return new PolyBlepOscillator(); +} + +PolyBlepOscillator* PolyBlepOscillator::create(float freq, float sr){ + return new PolyBlepOscillator(freq, sr); } void PolyBlepOscillator::destroy(PolyBlepOscillator* osc){ diff --git a/LibSource/PolyBlepOscillator.h b/LibSource/PolyBlepOscillator.h index d7f18cd4..6a1ccb98 100644 --- a/LibSource/PolyBlepOscillator.h +++ b/LibSource/PolyBlepOscillator.h @@ -7,24 +7,28 @@ class PolyBlepOscillator : public Oscillator { private: - float multiplier; stmlib::Oscillator osc; float frequency, shape, pw; public: - PolyBlepOscillator(float sr=48000.0); - void setSampleRate(float value); + PolyBlepOscillator(); + PolyBlepOscillator(float freq, float sr); + using Oscillator::setFrequency; void setFrequency(float value); /** set waveform shape: 0.0 for saw, 1.0 for square wave */ void setShape(float value); /** set square wave pulse width: 0.0 to 1.0 for 0% to 100% */ void setPulseWidth(float value); - float getNextSample(); + float generate(); + float generate(float fm); /* put a block of output samples into @param output */ - void getSamples(FloatArray output); + void generate(FloatArray output); + /* put a block of output samples into @param output, frequency modulated by @param fm */ + void generate(FloatArray output, FloatArray fm); /* put a block of output samples into @param samples, - with frequency determined by samples in @param frequency */ - void getSamples(FloatArray output, FloatArray frequency); - static PolyBlepOscillator* create(float sr); + with normalised frequency determined by samples in @param frequency */ + void getSamples(FloatArray output, FloatArray nfreq); + static PolyBlepOscillator* create(); + static PolyBlepOscillator* create(float freq, float sr); static void destroy(PolyBlepOscillator* osc); }; diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h index 2deee9d8..a5484fbb 100644 --- a/LibSource/RampOscillator.h +++ b/LibSource/RampOscillator.h @@ -5,49 +5,48 @@ class RampOscillator : public Oscillator { private: - float mul; float phase; float incr; public: RampOscillator() : phase(0.0f), incr(0.0f) { - setSampleRate(48000); } - RampOscillator(float sr) : phase(0.0f), incr(0.0f){ - setSampleRate(sr); + RampOscillator(float freq, float sr) : phase(0.0f){ + setFrequency(freq, sr); } - void setSampleRate(float sr){ - mul = 1.0f/sr; + void reset(){ + phase = 0.0f; } + using Oscillator::setFrequency; void setFrequency(float freq){ - incr = freq*mul; + incr = freq*2; } void setPhase(float ph){ phase = ph; while(phase >= 1) phase -= 1; } - void reset(){ - phase = 0.0f; - } float getPhase(){ return phase; } - float getNextSample(){ + float generate(){ float sample = phase; phase += incr; if(phase >= 1.0f) phase -= 2.0f; return sample; } - float getNextSample(float fm){ + float generate(float fm){ float sample = phase; phase += incr + fm; if(phase >= 1.0f) phase -= 2.0f; return sample; } - static RampOscillator* create(float sr){ - return new RampOscillator(sr); + static RampOscillator* create(){ + return new RampOscillator(); + } + static RampOscillator* create(float freq, float sr){ + return new RampOscillator(freq, sr); } static void destroy(RampOscillator* osc){ delete osc; diff --git a/LibSource/Resample.h b/LibSource/Resample.h index b807b443..8192143c 100644 --- a/LibSource/Resample.h +++ b/LibSource/Resample.h @@ -1,12 +1,13 @@ #ifndef __Resample_h__ #define __Resample_h__ +#include "SignalProcessor.h" #include "BiquadFilter.h" -# + /** - Implements 4x oversampling -*/ -class Resampler { + * Implements 4x oversampling + */ +class [[deprecated("use UpSampler and DownSampler instead.")]] Resampler { private: BiquadFilter *downfilter; BiquadFilter *upfilter; @@ -14,6 +15,7 @@ class Resampler { int upsampleStages; int downsampleStages; public: + Resampler():upsampleStages(1), downsampleStages(1){ // two filters: same coefficients, different state variables init(); @@ -45,8 +47,8 @@ class Resampler { for(int n=3; n<5; n++){ upCoeffs[n]=downCoeffs[n]; } - downfilter->setCoefficients(FloatArray(downCoeffs,5)); - upfilter->setCoefficients(FloatArray(upCoeffs,5)); + downfilter->copyCoefficients(FloatArray(downCoeffs,5)); + upfilter->copyCoefficients(FloatArray(upCoeffs,5)); } void downsample(FloatArray input, FloatArray output){ ASSERT(input.getSize()==output.getSize()*factor, "wrong size"); @@ -70,4 +72,69 @@ class Resampler { } }; +class UpSampler : public SignalProcessor { +private: + BiquadFilter* filter; + const size_t factor; +public: + UpSampler(BiquadFilter* filter, int factor=4): filter(filter), factor(factor) {} + static UpSampler* create(int stages, int factor=4){ + BiquadFilter* filter = BiquadFilter::create(stages); + // [B, A]=cheby1(2, 2, 0.25); then use [B, -A(2:end)] , note the minus sign in front of the A coefficients!!!! + //alternatively, we could use FilterStage to compute the coefficients + float upCoeffs[5]= {0.07609109, 0.15218218, 0.07609109, +1.16511283, -0.54828486}; + for(int n=0; n<3; n++) + upCoeffs[n] *= factor; //compensate for the gain loss due to zero-stuffing, gives unitary gain after upsampling + filter->copyCoefficients(FloatArray(upCoeffs, 5)); + return new UpSampler(filter, factor); + } + static void destroy(UpSampler* obj){ + BiquadFilter::destroy(obj->filter); + delete obj; + } + /** + * Up-sample param @input and put results into @param output. Note: in-place processing not supported + */ + void process(FloatArray input, FloatArray output){ + ASSERT(input.getSize()*factor==output.getSize(), "wrong size"); + float* p = output; + output.clear(); + for(int i=0; iprocess(output, output.getSize()); + } +}; + +class DownSampler : public SignalProcessor { +private: + BiquadFilter* filter; + const size_t factor; +public: + DownSampler(BiquadFilter* filter, int factor=4): filter(filter), factor(factor) {} + static DownSampler* create(int stages, int factor=4){ + BiquadFilter* filter = BiquadFilter::create(stages); + // [B, A]=cheby1(2, 2, 0.25); then use [B, -A(2:end)] , note the minus sign in front of the A coefficients!!!! + //alternatively, we could use FilterStage to compute the coefficients + static float downCoeffs[5]={0.07609109, 0.15218218, 0.07609109, +1.16511283, -0.54828486}; + filter->copyCoefficients(FloatArray(downCoeffs,5)); + return new DownSampler(filter, factor); + } + static void destroy(DownSampler* obj){ + BiquadFilter::destroy(obj->filter); + delete obj; + } + /** + * Down-sample param @input and put results into @param output. Note: in-place processing not supported + */ + void process(FloatArray input, FloatArray output){ + ASSERT(input.getSize()==output.getSize()*factor, "wrong size"); + filter->process(input, input.getSize()); + float* p = (float*)input; + for(int i=0; i= 2*M_PI) phase -= 2*M_PI; } - void reset(){ - phase = 0.0f; - } float getPhase(){ return phase; } - float getNextSample(){ + float generate(){ float sample = sinf(phase); phase += incr; if(phase >= 2*M_PI) phase -= 2*M_PI; return sample; } - float getNextSample(float fm){ + float generate(float fm){ float sample = sinf(phase); phase += incr + fm; if(phase >= 2*M_PI) phase -= 2*M_PI; return sample; - } - static SineOscillator* create(float sr){ - return new SineOscillator(sr); + } + static SineOscillator* create(){ + return new SineOscillator(); + } + static SineOscillator* create(float freq, float sr){ + return new SineOscillator(freq, sr); } static void destroy(SineOscillator* osc){ delete osc; diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h index 322bc5e6..346a3725 100644 --- a/LibSource/StateVariableFilter.h +++ b/LibSource/StateVariableFilter.h @@ -1,12 +1,14 @@ #ifndef __StateVariableFilter_h__ #define __StateVariableFilter_h__ +#include "FloatArray.h" +#include "SignalProcessor.h" + /** - * State Variable Filter based on Andy Simper's code: + * State Variable Filter based on Andy Simper's code and analysis: * @ref http://www.cytomic.com/files/dsp/SvfLinearTrapOptimised2.pdf */ - -class StateVariableFilter { +class StateVariableFilter : public SignalProcessor { public: void process(FloatArray input, FloatArray output){ diff --git a/LibSource/TemplatePatch.hpp b/LibSource/TemplatePatch.hpp new file mode 100644 index 00000000..dea39fc0 --- /dev/null +++ b/LibSource/TemplatePatch.hpp @@ -0,0 +1,41 @@ +/* + + + LICENSE: + This program is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . + + */ + + +/* created by the OWL team 2013 */ + +#ifndef __TemplatePatch_hpp__ +#define __TemplatePatch_hpp__ + +#include "OpenWareLibrary.h" + +class TemplatePatch : public Patch { +public: + TemplatePatch(){ + registerParameter(PARAMETER_A, "My Knob A"); + registerParameter(PARAMETER_B, "My Knob B"); + registerParameter(PARAMETER_C, "My Knob C"); + registerParameter(PARAMETER_D, "My Knob D"); + } + void processAudio(AudioBuffer &buffer){ + // put your code here! + } +}; + +#endif // __TemplatePatch_hpp__ diff --git a/LibSource/WavetableOscillator.cpp b/LibSource/WavetableOscillator.cpp index 49829559..42d1e6d2 100644 --- a/LibSource/WavetableOscillator.cpp +++ b/LibSource/WavetableOscillator.cpp @@ -2,11 +2,11 @@ #include "basicmaths.h" #include -WavetableOscillator* WavetableOscillator::create(float sr, size_t size) { +WavetableOscillator* WavetableOscillator::create(size_t size) { FloatArray wave = FloatArray::create(size); for(size_t i=0; i= 1.0) + acc -= 1.0; + return s; +} + +float WavetableOscillator::generate(float fm){ + float s = getSample(acc); + acc += inc + fm; if(acc > 1.0) acc -= 1.0; return s; } -void WavetableOscillator::getSamples(FloatArray samples){ +void WavetableOscillator::generate(FloatArray samples){ for(size_t i=0; i Date: Fri, 12 Feb 2021 16:36:02 +0100 Subject: [PATCH 034/374] template moved to LibSource --- Source/TemplatePatch.hpp | 47 ---------------------------------------- 1 file changed, 47 deletions(-) delete mode 100644 Source/TemplatePatch.hpp diff --git a/Source/TemplatePatch.hpp b/Source/TemplatePatch.hpp deleted file mode 100644 index bdce2ca1..00000000 --- a/Source/TemplatePatch.hpp +++ /dev/null @@ -1,47 +0,0 @@ -//////////////////////////////////////////////////////////////////////////////////////////////////// - -/* - - - LICENSE: - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program. If not, see . - - */ - - -/* created by the OWL team 2013 */ - - -//////////////////////////////////////////////////////////////////////////////////////////////////// - - -#ifndef __TemplatePatch_hpp__ -#define __TemplatePatch_hpp__ - -#include "Patch.h" - -class TemplatePatch : public Patch { -public: - TemplatePatch(){ - registerParameter(PARAMETER_A, "My Knob A"); - registerParameter(PARAMETER_B, "My Knob B"); - registerParameter(PARAMETER_C, "My Knob C"); - registerParameter(PARAMETER_D, "My Knob D"); - } - void processAudio(AudioBuffer &buffer){ - // put your code here! - } -}; - -#endif // __TemplatePatch_hpp__ From c8aa05375892d51fcc6820448ef95ca05c2deb90 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Fri, 12 Feb 2021 18:07:03 +0100 Subject: [PATCH 035/374] added [[deprecated]] attribute --- LibSource/Patch.h | 1 + 1 file changed, 1 insertion(+) diff --git a/LibSource/Patch.h b/LibSource/Patch.h index c812dab0..dac7dcad 100644 --- a/LibSource/Patch.h +++ b/LibSource/Patch.h @@ -55,6 +55,7 @@ class Patch { void setParameterValue(PatchParameterId pid, float value); bool isButtonPressed(PatchButtonId bid); /** @deprecated */ + [[deprecated]] int getSamplesSinceButtonPressed(PatchButtonId bid); void setButton(PatchButtonId bid, uint16_t value, uint16_t samples=0); int getBlockSize(); From f9be110977370611b9583bf473fd8108938e3cdc Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Fri, 12 Feb 2021 19:21:54 +0100 Subject: [PATCH 036/374] added sample-based SignalProcessor::process() --- LibSource/Envelope.h | 3 +++ LibSource/FirFilter.h | 9 ++++++++- LibSource/Resample.h | 6 ++++++ LibSource/SignalProcessor.h | 6 +++++- LibSource/Window.h | 8 ++++++++ 5 files changed, 30 insertions(+), 2 deletions(-) diff --git a/LibSource/Envelope.h b/LibSource/Envelope.h index 04c55d77..69e5aae0 100644 --- a/LibSource/Envelope.h +++ b/LibSource/Envelope.h @@ -19,6 +19,9 @@ class Envelope : public SignalGenerator, SignalProcessor { gate(state, 0); } virtual void gate(bool state, int gateDelay){} + virtual float process(float input){ + return input*generate(); + } /** * Attenuate samples in @param input by envelope and place results in @param output */ diff --git a/LibSource/FirFilter.h b/LibSource/FirFilter.h index d36962cf..7f118591 100644 --- a/LibSource/FirFilter.h +++ b/LibSource/FirFilter.h @@ -14,6 +14,7 @@ class FirFilter : public SignalProcessor { #else size_t pointer = 0; #endif /* ARM_CORTEX */ + size_t index = 0; void processBlock(float* source, float* destination, int size){ #ifdef ARM_CORTEX @@ -48,7 +49,13 @@ class FirFilter : public SignalProcessor { ~FirFilter(){ } - + + float process(float input){ + float output; + processBlock(&input, &output, 1); + return output; + } + void process(FloatArray buffer){ ASSERT(buffer.getSize()<=blockSize, "Too large"); //TODO: check that in-place actually works properly processBlock(buffer.getData(), buffer.getData(), buffer.getSize()); diff --git a/LibSource/Resample.h b/LibSource/Resample.h index 8192143c..4072364e 100644 --- a/LibSource/Resample.h +++ b/LibSource/Resample.h @@ -92,6 +92,9 @@ class UpSampler : public SignalProcessor { BiquadFilter::destroy(obj->filter); delete obj; } + float process(float input){ + return filter->process(input); // this doesn't really make sense + } /** * Up-sample param @input and put results into @param output. Note: in-place processing not supported */ @@ -123,6 +126,9 @@ class DownSampler : public SignalProcessor { BiquadFilter::destroy(obj->filter); delete obj; } + float process(float input){ + return filter->process(input); // this doesn't really make sense + } /** * Down-sample param @input and put results into @param output. Note: in-place processing not supported */ diff --git a/LibSource/SignalProcessor.h b/LibSource/SignalProcessor.h index c6d6eda9..8251ade0 100644 --- a/LibSource/SignalProcessor.h +++ b/LibSource/SignalProcessor.h @@ -8,7 +8,11 @@ */ class SignalProcessor { public: - virtual void process(FloatArray input, FloatArray output) = 0; + virtual float process(float input) = 0; + virtual void process(FloatArray input, FloatArray output){ + for(size_t i=0; i= getSize()) + index = 0; + return value; + } void process(FloatArray input, FloatArray output){ Window::applyWindow(input, getData(), output, getSize()); } From 3822828844c198a89442ea7cfaf4371776ae129d Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Fri, 12 Feb 2021 19:22:55 +0100 Subject: [PATCH 037/374] call setDecay in ExponentialDecayEnvelope::create instead of calling setRate --- LibSource/ExponentialDecayEnvelope.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/LibSource/ExponentialDecayEnvelope.h b/LibSource/ExponentialDecayEnvelope.h index 4f3e7a4f..1e70966f 100644 --- a/LibSource/ExponentialDecayEnvelope.h +++ b/LibSource/ExponentialDecayEnvelope.h @@ -40,7 +40,7 @@ class ExponentialDecayEnvelope : public Envelope { } static ExponentialDecayEnvelope* create(float rate, float sr){ ExponentialDecayEnvelope* env = new ExponentialDecayEnvelope(); - env->setRate(rate, sr); + env->setDecay(rate, sr); return env; } static void destroy(ExponentialDecayEnvelope* env){ From 93374c22ddc5d893c43bffa0c64483efa050037e Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Sat, 13 Feb 2021 00:21:26 +0100 Subject: [PATCH 038/374] added sample based process method --- LibSource/SignalProcessor.h | 1 + LibSource/StateVariableFilter.h | 9 ++++++++- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/LibSource/SignalProcessor.h b/LibSource/SignalProcessor.h index 8251ade0..d0ea2560 100644 --- a/LibSource/SignalProcessor.h +++ b/LibSource/SignalProcessor.h @@ -8,6 +8,7 @@ */ class SignalProcessor { public: + virtual ~SignalProcessor(){} virtual float process(float input) = 0; virtual void process(FloatArray input, FloatArray output){ for(size_t i=0; i Date: Sat, 13 Feb 2021 03:09:51 +0100 Subject: [PATCH 039/374] fix delete[] --- LibSource/FloatArray.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/LibSource/FloatArray.cpp b/LibSource/FloatArray.cpp index 49d3ea84..b890078c 100644 --- a/LibSource/FloatArray.cpp +++ b/LibSource/FloatArray.cpp @@ -520,5 +520,5 @@ FloatArray FloatArray::create(int size){ } void FloatArray::destroy(FloatArray array){ - delete array.data; + delete[] array.data; } From ae2e342d76b8f60fc0a247652ab3bb29b0a0622f Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Sun, 14 Feb 2021 01:39:42 +0100 Subject: [PATCH 040/374] Set sample rate on all objects that involve frequency parameters. No normalised frequencies in API. --- LibSource/BiquadFilter.h | 113 +++++++++++---------------- LibSource/ChirpOscillator.h | 42 +++++----- LibSource/Envelope.cpp | 22 +++++- LibSource/Envelope.h | 27 +++---- LibSource/ExponentialDecayEnvelope.h | 20 +++-- LibSource/FloatArray.cpp | 23 +----- LibSource/FloatArray.h | 49 +++++++++--- LibSource/OpenWareLibrary.h | 7 ++ LibSource/Oscillator.h | 12 +-- LibSource/PolyBlepOscillator.cpp | 19 +++-- LibSource/PolyBlepOscillator.h | 13 +-- LibSource/RampOscillator.h | 14 ++-- LibSource/SineOscillator.h | 18 +++-- LibSource/StateVariableFilter.h | 69 +++++++--------- LibSource/WavetableOscillator.cpp | 15 ++-- LibSource/WavetableOscillator.h | 17 +--- 16 files changed, 238 insertions(+), 242 deletions(-) diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h index ca5c5382..71f62f0c 100644 --- a/LibSource/BiquadFilter.h +++ b/LibSource/BiquadFilter.h @@ -14,30 +14,30 @@ class FilterStage { FilterStage(FloatArray co, FloatArray st) : coefficients(co), state(st){} - void setLowPass(float fc, float q){ - setLowPass(coefficients, fc, q); + void setLowPass(float fc, float q, float sr){ + setLowPass(coefficients, fc*M_PI/sr, q); } - void setHighPass(float fc, float q){ - setHighPass(coefficients, fc, q); + void setHighPass(float fc, float q, float sr){ + setHighPass(coefficients, fc*M_PI/sr, q); } - void setBandPass(float fc, float q){ - setBandPass(coefficients, fc, q); + void setBandPass(float fc, float q, float sr){ + setBandPass(coefficients, fc*M_PI/sr, q); } - void setNotch(float fc, float q){ - setNotch(coefficients, fc, q); + void setNotch(float fc, float q, float sr){ + setNotch(coefficients, fc*M_PI/sr, q); } - void setPeak(float fc, float q, float gain){ - setPeak(coefficients, fc, q, gain); + void setPeak(float fc, float q, float gain, float sr){ + setPeak(coefficients, fc*M_PI/sr, q, gain); } - void setLowShelf(float fc, float gain){ - setLowShelf(coefficients, fc, gain); + void setLowShelf(float fc, float gain, float sr){ + setLowShelf(coefficients, fc*M_PI/sr, gain); } - void setHighShelf(float fc, float gain){ - setHighShelf(coefficients, fc, gain); + void setHighShelf(float fc, float gain, float sr){ + setHighShelf(coefficients, fc*M_PI/sr, gain); } void copyCoefficients(FloatArray newCoefficients){ ASSERT(coefficients.getSize()==newCoefficients.getSize(), "wrong size"); @@ -51,8 +51,7 @@ class FilterStage { return state; } - static void setLowPass(float* coefficients, float fc, float q){ - float omega = M_PI*fc; + static void setLowPass(float* coefficients, float omega, float q){ float K = tanf(omega); float norm = 1 / (1 + K / q + K * K); coefficients[0] = K * K * norm; @@ -62,8 +61,7 @@ class FilterStage { coefficients[4] = - (1 - K / q + K * K) * norm; } - static void setHighPass(float* coefficients, float fc, float q){ - float omega = M_PI*fc; + static void setHighPass(float* coefficients, float omega, float q){ float K = tanf(omega); float norm = 1 / (1 + K / q + K * K); coefficients[0] = 1 * norm; @@ -73,8 +71,7 @@ class FilterStage { coefficients[4] = - (1 - K / q + K * K) * norm; } - static void setBandPass(float* coefficients, float fc, float q){ - float omega = M_PI*fc; + static void setBandPass(float* coefficients, float omega, float q){ float K = tanf(omega); float norm = 1 / (1 + K / q + K * K); coefficients[0] = K / q * norm; @@ -84,8 +81,7 @@ class FilterStage { coefficients[4] = - (1 - K / q + K * K) * norm; } - static void setNotch(float* coefficients, float fc, float q){ - float omega = M_PI*fc; + static void setNotch(float* coefficients, float omega, float q){ float K = tanf(omega); float norm = 1 / (1 + K / q + K * K); coefficients[0] = (1 + K * K) * norm; @@ -95,8 +91,7 @@ class FilterStage { coefficients[4] = - (1 - K / q + K * K) * norm; } - static void setPeak(float* coefficients, float fc, float q, float gain){ - float omega = M_PI*fc; + static void setPeak(float* coefficients, float omega, float q, float gain){ float K = tanf(omega); float V = fabs(gain-0.5)*60 + 1; // Gain float norm; @@ -118,8 +113,7 @@ class FilterStage { } } - static void setLowShelf(float* coefficients, float fc, float gain){ - float omega = M_PI*fc; + static void setLowShelf(float* coefficients, float omega, float gain){ float K = tanf(omega); float V = fabs(gain-0.5)*60 + 1; // Gain float norm; @@ -140,8 +134,7 @@ class FilterStage { } } - static void setHighShelf(float* coefficients, float fc, float gain){ - float omega = M_PI*fc; + static void setHighShelf(float* coefficients, float omega, float gain){ float K = tanf(omega); float V = fabs(gain-0.5)*60 + 1; // Gain float norm; @@ -173,6 +166,7 @@ class FilterStage { #define BIQUAD_STATE_VARIABLES_PER_STAGE 2 class BiquadFilter : public SignalProcessor { private: + float pioversr; #ifdef ARM_CORTEX // arm_biquad_casd_df1_inst_f32 df1; arm_biquad_cascade_df2T_instance_f32 df2; @@ -211,13 +205,17 @@ class BiquadFilter : public SignalProcessor { } public: BiquadFilter() - : coefficients(NULL), state(NULL), stages(0) {} + : pioversr(0), coefficients(NULL), state(NULL), stages(0) {} - BiquadFilter(float* coefs, float* ste, int sgs) : - coefficients(coefs), state(ste), stages(sgs) { + BiquadFilter(float sr, float* coefs, float* ste, int sgs) : + pioversr(M_PI/sr), coefficients(coefs), state(ste), stages(sgs) { init(); } + void setSampleRate(float sr){ + pioversr = M_PI/sr; + } + int getStages(){ return stages; } @@ -288,59 +286,38 @@ class BiquadFilter : public SignalProcessor { return output; } - void setLowPass(float fc, float q, float sr){ - setLowPass(fc/sr, q); - } void setLowPass(float fc, float q){ - FilterStage::setLowPass(coefficients, fc, q); + FilterStage::setLowPass(coefficients, fc*pioversr, q); copyCoefficients(); } - void setHighPass(float fc, float q, float sr){ - setHighPass(fc/sr, q); - } void setHighPass(float fc, float q){ - FilterStage::setHighPass(coefficients, fc, q); + FilterStage::setHighPass(coefficients, fc*pioversr, q); copyCoefficients(); } - void setBandPass(float fc, float q, float sr){ - setBandPass(fc/sr, q); - } void setBandPass(float fc, float q){ - FilterStage::setBandPass(coefficients, fc, q); + FilterStage::setBandPass(coefficients, fc*pioversr, q); copyCoefficients(); } - void setNotch(float fc, float q, float sr){ - setNotch(fc/sr, q); - } void setNotch(float fc, float q){ - FilterStage::setNotch(coefficients, fc, q); + FilterStage::setNotch(coefficients, fc*pioversr, q); copyCoefficients(); } - void setPeak(float fc, float q, float gain, float sr){ - setPeak(fc/sr, q, gain); - } void setPeak(float fc, float q, float gain){ - FilterStage::setPeak(coefficients, fc, q, gain); + FilterStage::setPeak(coefficients, fc*pioversr, q, gain); copyCoefficients(); } - void setLowShelf(float fc, float gain, float sr){ - setLowShelf(fc/sr, gain); - } void setLowShelf(float fc, float gain){ - FilterStage::setLowShelf(coefficients, fc, gain); + FilterStage::setLowShelf(coefficients, fc*pioversr, gain); copyCoefficients(); } - void setHighShelf(float fc, float gain, float sr){ - setHighShelf(fc/sr, gain); - } void setHighShelf(float fc, float gain){ - FilterStage::setHighShelf(coefficients, fc, gain); + FilterStage::setHighShelf(coefficients, fc*pioversr, gain); copyCoefficients(); } @@ -360,15 +337,15 @@ class BiquadFilter : public SignalProcessor { copyCoefficients(newCoefficients); } - static BiquadFilter* create(int stages){ - return new BiquadFilter(new float[stages*5], new float[stages*2], stages); + static BiquadFilter* create(float sr, int stages=1){ + return new BiquadFilter(sr, new float[stages*5], new float[stages*2], stages); // for df1: state requires stages*4 // return new BiquadFilter(new float[stages*5], new float[stages*4], stages); } static void destroy(BiquadFilter* filter){ - delete filter->coefficients; - delete filter->state; + delete[] filter->coefficients; + delete[] filter->state; delete filter; } }; @@ -377,9 +354,9 @@ class StereoBiquadFilter : public BiquadFilter { private: BiquadFilter right; public: - StereoBiquadFilter(float* coefs, float* lstate, float* rstate, int sgs) : - BiquadFilter(coefs, lstate, sgs), - right(coefs, rstate, sgs) {} + StereoBiquadFilter(float sr, float* coefs, float* lstate, float* rstate, int sgs) : + BiquadFilter(sr, coefs, lstate, sgs), + right(sr, coefs, rstate, sgs) {} BiquadFilter* getLeftFilter(){ return this; @@ -394,8 +371,8 @@ class StereoBiquadFilter : public BiquadFilter { right.process(buffer.getSamples(RIGHT_CHANNEL)); } - static StereoBiquadFilter* create(int stages){ - return new StereoBiquadFilter(new float[stages*5], new float[stages*2], new float[stages*2], stages); + static StereoBiquadFilter* create(float sr, int stages){ + return new StereoBiquadFilter(sr, new float[stages*5], new float[stages*2], new float[stages*2], stages); } static void destroy(StereoBiquadFilter* filter){ diff --git a/LibSource/ChirpOscillator.h b/LibSource/ChirpOscillator.h index 6f2ec443..8b98161f 100644 --- a/LibSource/ChirpOscillator.h +++ b/LibSource/ChirpOscillator.h @@ -5,30 +5,31 @@ class ChirpOscillator : public Oscillator { private: + float sr; float phase; float incr; -public: + float basefreq; float rate; - ChirpOscillator() - : phase(0.0f), incr(1.0f), rate(0) {} - using Oscillator::setFrequency; - void setFrequency(float nfreq){ - incr = nfreq*M_PI; - } - void setRate(float r, float sr){ - // should be: rate 0: 1 (constant), rate -1: 1-0.5/sr (halved in a second), rate 1: 1+1/sr (doubled in a second) - if(r < 0) - rate = 1.0f - 10*(1/(1-r))/sr; - else - rate = 1.0f + 10*(1/(1+r))/sr; +public: + ChirpOscillator(float sr=48000) + : sr(sr), phase(0), incr(0), basefreq(0), rate(0) {} + void setFrequency(float freq){ + incr = freq*2*M_PI/sr; + basefreq = freq; + } + void setSampleRate(float sample_rate){ + sr = sample_rate; } /** - * Set expontential decay rate. + * Set rate of change: positive for ascending chirp, negative for descending. + * +1 doubles frequency in one second + * -1 halves frequency in one second */ - void setDecay(float d, float sr){ - setRate(-(d+1/sr), sr); + void setRate(float r){ + rate = 1 + r/sr; } void trigger(){ + incr = basefreq*2*M_PI/sr; reset(); } void reset(){ @@ -38,9 +39,8 @@ class ChirpOscillator : public Oscillator { float sample = sinf(phase); phase += incr; incr *= rate; - // phase %= 2*M_PI; - // if(phase >= 2*M_PI) - // phase -= 2*M_PI; + if(phase >= 2*M_PI) + phase -= 2*M_PI; return sample; } float generate(float fm){ @@ -49,8 +49,8 @@ class ChirpOscillator : public Oscillator { incr *= rate; return sample; } - static ChirpOscillator* create(){ - return new ChirpOscillator(); + static ChirpOscillator* create(float sr){ + return new ChirpOscillator(sr); } static void destroy(ChirpOscillator* osc){ delete osc; diff --git a/LibSource/Envelope.cpp b/LibSource/Envelope.cpp index 29a544ac..c9e19652 100644 --- a/LibSource/Envelope.cpp +++ b/LibSource/Envelope.cpp @@ -9,7 +9,8 @@ void EnvelopeGenerator::calculateMultiplier(double startLevel, } */ -AdsrEnvelope::AdsrEnvelope() : +AdsrEnvelope::AdsrEnvelope(float sampleRate) : + samplePeriod(1.0/sampleRate), stage(kIdle), trig(kGate), level(0.0), @@ -24,16 +25,29 @@ AdsrEnvelope::AdsrEnvelope() : AdsrEnvelope::~AdsrEnvelope(){} +void AdsrEnvelope::setSampleRate(float sampleRate){ + samplePeriod = 1.0/sampleRate; +} + void AdsrEnvelope::setAttack(float newAttack){ - attackIncrement = 1 / newAttack; + if(newAttack > 0) + attackIncrement = samplePeriod / newAttack; + else + attackIncrement = 1; } void AdsrEnvelope::setDecay(float newDecay){ - decayIncrement = - 1 / newDecay; + if(newDecay > 0) + decayIncrement = - samplePeriod / newDecay; + else + decayIncrement = - 1; } void AdsrEnvelope::setRelease(float newRelease){ - releaseIncrement = - 1 / newRelease; + if(newRelease > 0) + releaseIncrement = - samplePeriod / newRelease; + else + releaseIncrement = -1; } void AdsrEnvelope::setSustain(float newSustain){ diff --git a/LibSource/Envelope.h b/LibSource/Envelope.h index 69e5aae0..405f1587 100644 --- a/LibSource/Envelope.h +++ b/LibSource/Envelope.h @@ -40,21 +40,13 @@ class AdsrEnvelope : public Envelope { enum EnvelopeTrigger { kGate, kTrigger }; public: - AdsrEnvelope(); + AdsrEnvelope(float sampleRate=48000); virtual ~AdsrEnvelope(); using Envelope::process; using SignalGenerator::generate; - void setAttack(float newAttack, float sr){ - setAttack(newAttack/sr); - } + void setSampleRate(float sampleRate); void setAttack(float newAttack); - void setDecay(float newDecay, float sr){ - setDecay(newDecay/sr); - } void setDecay(float newDecay); - void setRelease(float newRelease, float sr){ - setRelease(newRelease/sr); - } void setRelease(float newRelease); void setSustain(float newSustain); void trigger(); @@ -81,21 +73,22 @@ class AdsrEnvelope : public Envelope { void attenuate(FloatArray buf){ process(buf, buf); // increments envelope by buffer length } - static AdsrEnvelope* create(){ - return new AdsrEnvelope(); + static AdsrEnvelope* create(float sampleRate){ + return new AdsrEnvelope(sampleRate); } - static AdsrEnvelope* create(float a, float d, float s, float r, float sr){ - AdsrEnvelope* env = new AdsrEnvelope(); - env->setAttack(a, sr); - env->setDecay(d, sr); + static AdsrEnvelope* create(float a, float d, float s, float r, float sampleRate){ + AdsrEnvelope* env = new AdsrEnvelope(sampleRate); + env->setAttack(a); + env->setDecay(d); env->setSustain(s); - env->setRelease(r, sr); + env->setRelease(r); return env; } static void destroy(AdsrEnvelope* env){ delete env; } private: + float samplePeriod; EnvelopeStage stage; EnvelopeTrigger trig; bool retrigger; diff --git a/LibSource/ExponentialDecayEnvelope.h b/LibSource/ExponentialDecayEnvelope.h index 1e70966f..3e65c3af 100644 --- a/LibSource/ExponentialDecayEnvelope.h +++ b/LibSource/ExponentialDecayEnvelope.h @@ -5,20 +5,24 @@ class ExponentialDecayEnvelope : public Envelope { private: + float sr; float value; float incr; public: - ExponentialDecayEnvelope(): value(0), incr(0){} + ExponentialDecayEnvelope(float sr=48000): sr(sr), value(0), incr(0){} using Envelope::process; using SignalGenerator::generate; - void setRate(float r, float sr){ + void setSampleRate(float sampleRate){ + sr = sampleRate; + } + void setRate(float r){ if(r < 0) incr = 1.0f - 100*(1/(1-r))/sr; else incr = 1.0f + 100*r/sr; } - void setDecay(float d, float sr){ - setRate(-(d+1/sr), sr); + void setDecay(float d){ + setRate(-(d+1/sr)); } void trigger(){ value = 1.0; @@ -35,12 +39,12 @@ class ExponentialDecayEnvelope : public Envelope { float getNextSample(){ return generate(); // increments envelope one step } - static ExponentialDecayEnvelope* create(){ - return new ExponentialDecayEnvelope(); + static ExponentialDecayEnvelope* create(float sr){ + return new ExponentialDecayEnvelope(sr); } static ExponentialDecayEnvelope* create(float rate, float sr){ - ExponentialDecayEnvelope* env = new ExponentialDecayEnvelope(); - env->setDecay(rate, sr); + ExponentialDecayEnvelope* env = new ExponentialDecayEnvelope(sr); + env->setDecay(rate); return env; } static void destroy(ExponentialDecayEnvelope* env){ diff --git a/LibSource/FloatArray.cpp b/LibSource/FloatArray.cpp index b890078c..2909e99f 100644 --- a/LibSource/FloatArray.cpp +++ b/LibSource/FloatArray.cpp @@ -92,11 +92,6 @@ void FloatArray::rectify(FloatArray& destination){ //this is actually "copy data #endif } -void FloatArray::rectify(){//in place - /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library - rectify(*this); -} - void FloatArray::reverse(FloatArray& destination){ //this is actually "copy data with reverse" if(destination==*this){ //make sure it is not called "in-place" reverse(); @@ -121,10 +116,6 @@ void FloatArray::reciprocal(FloatArray& destination){ destination[n] = 1.0f/data[n]; } -void FloatArray::reciprocal(){//in place - reciprocal(*this); -} - float FloatArray::getRms(){ float result; /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library @@ -389,18 +380,13 @@ void FloatArray::multiply(float scalar, FloatArray destination){ } void FloatArray::negate(FloatArray& destination){//allows in-place - /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library #ifdef ARM_CORTEX arm_negate_f32(data, destination.getData(), size); - #else +#else for(size_t n=0; nCMSIS library - negate(*this); +#endif /* ARM_CORTEX */ } void FloatArray::noise(){ @@ -417,7 +403,6 @@ void FloatArray::noise(float min, float max){ void FloatArray::convolve(FloatArray operand2, FloatArray destination){ ASSERT(destination.size >= size + operand2.size -1, "Destination array too small"); -/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library #ifdef ARM_CORTEX arm_conv_f32(data, size, operand2.data, operand2.size, destination); #else @@ -509,10 +494,6 @@ void FloatArray::tanh(FloatArray destination){ destination[i] = tanhf(data[i]); } -void FloatArray::tanh(){ - tanh(*this); -} - FloatArray FloatArray::create(int size){ FloatArray fa(new float[size], size); fa.clear(); diff --git a/LibSource/FloatArray.h b/LibSource/FloatArray.h index ce720eba..16fad7f0 100644 --- a/LibSource/FloatArray.h +++ b/LibSource/FloatArray.h @@ -81,10 +81,12 @@ class FloatArray { void rectify(FloatArray& destination); /** - * Absolute value of the array. + * Absolute value of the array, in-place version. * Sets each element in the array to its absolute value. - */ - void rectify(); //in place + */ + void rectify(){ + rectify(*this); + } /** * Reverse the array @@ -107,23 +109,28 @@ class FloatArray { void reciprocal(FloatArray& destination); /** - * Reciprocal of the array. + * Reciprocal of the array, in-place version. * Sets each element in the array to its reciprocal. */ - void reciprocal(); + void reciprocal(){ + reciprocal(*this); + } /** * Negate the array. * Stores the opposite of the elements in the array into destination. * @param[out] destination the destination array. - */ + * @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library + */ void negate(FloatArray& destination); /** * Negate the array. * Sets each element in the array to its opposite. */ - void negate(); + void negate(){ + negate(*this); + } /** * Random values @@ -268,12 +275,13 @@ class FloatArray { */ void multiply(float scalar, FloatArray destination); -/** + /** * Convolution between arrays. * Sets **destination** to the result of the convolution between the array and **operand2** * @param[in] operand2 the second operand for the convolution * @param[out] destination array. It must have a minimum size of this+other-1. - */ + * @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library + */ void convolve(FloatArray operand2, FloatArray destination); /** @@ -285,6 +293,7 @@ class FloatArray { * @param[in] samples number of samples to compute * @remarks **destination[n]** is left unchanged for nCMSIS library */ void convolve(FloatArray operand2, FloatArray destination, int offset, size_t samples); @@ -293,6 +302,7 @@ class FloatArray { * Sets **destination** to the correlation of the array and **operand2**. * @param[in] operand2 the second operand for the correlation * @param[out] destination the destination array. It must have a minimum size of 2*max(srcALen, srcBLen)-1 + * @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library */ void correlate(FloatArray operand2, FloatArray destination); @@ -470,10 +480,23 @@ class FloatArray { } /** - * Create a linear ramp from one value to another across all values in the Float + * Create a linear ramp from one value to another. + * Interpolates all samples in the FloatArray between the endpoints @param from to @param to. */ void ramp(float from, float to); - + + /** + * Scale all values along a linear ramp from one value to another. + */ + void scale(float from, float to, FloatArray destination); + + /** + * In-place scale. + */ + void scale(float from, float to){ + scale(from, to, *this); + } + /** * Apply tanh to each element in the array */ @@ -482,7 +505,9 @@ class FloatArray { /** * In-place tanh */ - void tanh(); + void tanh(){ + tanh(*this); + } /** * Creates a new FloatArray. diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h index d8b2c5a7..9f1ea5a7 100644 --- a/LibSource/OpenWareLibrary.h +++ b/LibSource/OpenWareLibrary.h @@ -15,5 +15,12 @@ #include "Envelope.h" #include "ExponentialDecayEnvelope.h" #include "Resample.h" +#include "ComplexFloatArray.h" +#include "FastFourierTransform.h" +#include "ShortArray.h" +#include "ComplexShortArray.h" +#include "ShortFastFourierTransform.h" +#include "IntArray.h" +#include "FloatMatrix.h" #endif /* __OpenWareLibrary_h__ */ diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h index 3e9625a0..bf84fe1d 100644 --- a/LibSource/Oscillator.h +++ b/LibSource/Oscillator.h @@ -14,15 +14,11 @@ class Oscillator : public SignalGenerator { virtual ~Oscillator(){} using SignalGenerator::generate; /** - * Set oscillator frequency (at given sample rate @param sr) + * Set oscillator sample rate */ - void setFrequency(float freq, float sr){ - setFrequency(freq/sr); - } + virtual void setSampleRate(float value){} /** - * Set normalised frequency. - * Normalised frequency equals frequency divided by sample rate. - * Values 0 to 0.5 represents 0 Hz to Nyquist frequency. + * Set oscillator frequency in Hertz */ virtual void setFrequency(float value){} /** @@ -52,8 +48,6 @@ class Oscillator : public SignalGenerator { void getSamples(FloatArray output, FloatArray fm){ generate(output, fm); } - [[deprecated("use setFrequency(freq, SR) instead.")]] - virtual void setSampleRate(float value){} }; #endif /* OSCILLATOR_HPP */ diff --git a/LibSource/PolyBlepOscillator.cpp b/LibSource/PolyBlepOscillator.cpp index 87ef6e1a..4fff9627 100644 --- a/LibSource/PolyBlepOscillator.cpp +++ b/LibSource/PolyBlepOscillator.cpp @@ -1,7 +1,8 @@ #include "PolyBlepOscillator.h" #include "basicmaths.h" -PolyBlepOscillator::PolyBlepOscillator(): +PolyBlepOscillator::PolyBlepOscillator(float sr): + mul(1.0/sr), frequency(0), shape(0.5), pw(0.5) { @@ -9,14 +10,19 @@ PolyBlepOscillator::PolyBlepOscillator(): } PolyBlepOscillator::PolyBlepOscillator(float freq, float sr): + mul(1.0/sr), shape(0.5), pw(0.5) { - setFrequency(freq, sr); + setFrequency(freq); osc.Init(); } -void PolyBlepOscillator::setFrequency(float value){ - frequency = value; +void PolyBlepOscillator::setSampleRate(float sr){ + mul = 1.0/sr; +} + +void PolyBlepOscillator::setFrequency(float freq){ + frequency = mul*freq; } void PolyBlepOscillator::setShape(float value){ @@ -49,11 +55,12 @@ void PolyBlepOscillator::generate(FloatArray output, FloatArray fm){ } void PolyBlepOscillator::getSamples(FloatArray output, FloatArray freqs){ + freqs.multiply(mul); // normalise frequencies osc.Render(freqs, pw, shape, output, output.getSize()); } -PolyBlepOscillator* PolyBlepOscillator::create(){ - return new PolyBlepOscillator(); +PolyBlepOscillator* PolyBlepOscillator::create(float sr){ + return new PolyBlepOscillator(sr); } PolyBlepOscillator* PolyBlepOscillator::create(float freq, float sr){ diff --git a/LibSource/PolyBlepOscillator.h b/LibSource/PolyBlepOscillator.h index 6a1ccb98..a0c8d638 100644 --- a/LibSource/PolyBlepOscillator.h +++ b/LibSource/PolyBlepOscillator.h @@ -7,13 +7,14 @@ class PolyBlepOscillator : public Oscillator { private: + float mul; stmlib::Oscillator osc; float frequency, shape, pw; public: - PolyBlepOscillator(); + PolyBlepOscillator(float sr=48000); PolyBlepOscillator(float freq, float sr); - using Oscillator::setFrequency; - void setFrequency(float value); + void setSampleRate(float sr); + void setFrequency(float freq); /** set waveform shape: 0.0 for saw, 1.0 for square wave */ void setShape(float value); /** set square wave pulse width: 0.0 to 1.0 for 0% to 100% */ @@ -25,9 +26,9 @@ class PolyBlepOscillator : public Oscillator { /* put a block of output samples into @param output, frequency modulated by @param fm */ void generate(FloatArray output, FloatArray fm); /* put a block of output samples into @param samples, - with normalised frequency determined by samples in @param frequency */ - void getSamples(FloatArray output, FloatArray nfreq); - static PolyBlepOscillator* create(); + with frequency determined by samples in @param frequency */ + void getSamples(FloatArray output, FloatArray freq); + static PolyBlepOscillator* create(float sr); static PolyBlepOscillator* create(float freq, float sr); static void destroy(PolyBlepOscillator* osc); }; diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h index a5484fbb..6193e335 100644 --- a/LibSource/RampOscillator.h +++ b/LibSource/RampOscillator.h @@ -5,20 +5,24 @@ class RampOscillator : public Oscillator { private: + float mul; float phase; float incr; public: - RampOscillator() : phase(0.0f), incr(0.0f) { + RampOscillator(float sr=48000) : phase(0.0f), incr(0.0f) { } RampOscillator(float freq, float sr) : phase(0.0f){ - setFrequency(freq, sr); - } + setSampleRate(sr); + setFrequency(freq); + } void reset(){ phase = 0.0f; } - using Oscillator::setFrequency; + void setSampleRate(float sr){ + mul = 1.0f/sr; + } void setFrequency(float freq){ - incr = freq*2; + incr = freq*mul; } void setPhase(float ph){ phase = ph; diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h index 167c4519..9f68aa1a 100644 --- a/LibSource/SineOscillator.h +++ b/LibSource/SineOscillator.h @@ -5,20 +5,26 @@ class SineOscillator : public Oscillator { private: + float mul; float phase; float incr; public: - SineOscillator() : phase(0.0f), incr(0.0f) {} - SineOscillator(float freq, float sr) : phase(0.0f){ - setFrequency(freq, sr); + SineOscillator(float sr=48000) : phase(0), incr(0) { + setSampleRate(sr); } - using Oscillator::setFrequency; - void setFrequency(float nfreq){ - incr = nfreq*2*M_PI; + SineOscillator(float freq, float sr) : phase(0.0f) { + setSampleRate(sr); + setFrequency(freq); } void reset(){ phase = 0.0f; } + void setSampleRate(float sr){ + mul = 2*M_PI/sr; + } + void setFrequency(float freq){ + incr = freq*mul; + } void setPhase(float ph){ phase = ph; while(phase >= 2*M_PI) diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h index 26461eb1..7638ca80 100644 --- a/LibSource/StateVariableFilter.h +++ b/LibSource/StateVariableFilter.h @@ -10,6 +10,8 @@ */ class StateVariableFilter : public SignalProcessor { public: + StateVariableFilter(float sr): pioversr(M_PI/sr) {} + float process(float v0){ mV3 = v0 - mIc2eq; mV1 = m_a1 * mIc1eq + m_a2*mV3; @@ -18,6 +20,7 @@ class StateVariableFilter : public SignalProcessor { mIc2eq = 2. * mV2 - mIc2eq; return m_m0 * v0 + m_m1 * mV1 + m_m2 * mV2; } + void process(FloatArray input, FloatArray output){ size_t nFrames = input.getSize(); for(size_t s = 0; s < nFrames; s++){ @@ -39,12 +42,8 @@ class StateVariableFilter : public SignalProcessor { mIc2eq = 0.; } - void setLowPass(float freq, float q, float sampleRate){ - setLowPass(freq/sampleRate, q); - } - - void setLowPass(float fnorm, float q){ - const float w = tanf(M_PI * fnorm); + void setLowPass(float fc, float q){ + const float w = tanf(pioversr*fc); const float g = w; const float k = 1. / q; m_a1 = 1./(1. + g * (g + k)); @@ -55,11 +54,8 @@ class StateVariableFilter : public SignalProcessor { m_m2 = 1.; } - void setHighPass(float freq, float q, float sampleRate){ - setHighPass(freq/sampleRate, q); - } - void setHighPass(float fnorm, float q){ - const float w = tanf(M_PI * fnorm); + void setHighPass(float fc, float q){ + const float w = tanf(pioversr*fc); const float g = w; const float k = 1. / q; m_a1 = 1./(1. + g * (g + k)); @@ -70,11 +66,8 @@ class StateVariableFilter : public SignalProcessor { m_m2 = -1.; } - void setBandPass(float freq, float q, float sampleRate){ - setBandPass(freq/sampleRate, q); - } - void setBandPass(float fnorm, float q){ - const float w = tanf(M_PI * fnorm); + void setBandPass(float fc, float q){ + const float w = tanf(pioversr*fc); const float g = w; const float k = 1. / q; m_a1 = 1./(1. + g * (g + k)); @@ -85,11 +78,8 @@ class StateVariableFilter : public SignalProcessor { m_m2 = 0.; } - void setNotch(float freq, float q, float sampleRate){ - setNotch(freq/sampleRate, q); - } - void setNotch(float fnorm, float q){ - const float w = tanf(M_PI * fnorm); + void setNotch(float fc, float q){ + const float w = tanf(pioversr*fc); const float g = w; const float k = 1. / q; m_a1 = 1./(1. + g * (g + k)); @@ -100,11 +90,8 @@ class StateVariableFilter : public SignalProcessor { m_m2 = 0.; } - void setPeak(float freq, float q, float sampleRate){ - setPeak(freq/sampleRate, q); - } - void setPeak(float fnorm, float q){ - const float w = tanf(M_PI * fnorm); + void setPeak(float fc, float q){ + const float w = tanf(pioversr*fc); const float g = w; const float k = 1. / q; m_a1 = 1./(1. + g * (g + k)); @@ -115,11 +102,8 @@ class StateVariableFilter : public SignalProcessor { m_m2 = -2.; } - void setBell(float freq, float q, float gain, float sampleRate){ - setBell(freq/sampleRate, q, gain); - } - void setBell(float fnorm, float q, float gain){ - const float w = tanf(M_PI * fnorm); + void setBell(float fc, float q, float gain){ + const float w = tanf(pioversr*fc); const float A = exp10f(gain/40.); const float g = w; const float k = 1 / q; @@ -131,11 +115,8 @@ class StateVariableFilter : public SignalProcessor { m_m2 = 0.; } - void setLowShelf(float freq, float q, float gain, float sampleRate){ - setLowShelf(freq/sampleRate, q, gain); - } - void setLowShelf(float fnorm, float q, float gain){ - const float w = tanf(M_PI * fnorm); + void setLowShelf(float fc, float q, float gain){ + const float w = tanf(pioversr*fc); const float A = exp10f(gain/40.); const float g = w / sqrtf(A); const float k = 1. / q; @@ -147,11 +128,8 @@ class StateVariableFilter : public SignalProcessor { m_m2 = (A * A - 1.); } - void setHighShelf(float freq, float q, float gain, float sampleRate){ - setHighShelf(freq/sampleRate, q, gain); - } - void setHighShelf(float fnorm, float q, float gain){ - const float w = tanf(M_PI * fnorm); + void setHighShelf(float fc, float q, float gain){ + const float w = tanf(pioversr*fc); const float A = exp10f(gain/40.); const float g = w / sqrtf(A); const float k = 1. / q; @@ -163,7 +141,16 @@ class StateVariableFilter : public SignalProcessor { m_m2 = (1. - A*A); } + static StateVariableFilter* create(float sr){ + return new StateVariableFilter(sr); + } + + static void destroy(StateVariableFilter* svf){ + delete svf; + } + private: + float pioversr; // state float mV1 = 0.; float mV2 = 0.; diff --git a/LibSource/WavetableOscillator.cpp b/LibSource/WavetableOscillator.cpp index 42d1e6d2..c60babac 100644 --- a/LibSource/WavetableOscillator.cpp +++ b/LibSource/WavetableOscillator.cpp @@ -2,11 +2,11 @@ #include "basicmaths.h" #include -WavetableOscillator* WavetableOscillator::create(size_t size) { +WavetableOscillator* WavetableOscillator::create(float sr, size_t size) { FloatArray wave = FloatArray::create(size); for(size_t i=0; i Date: Sun, 14 Feb 2021 02:03:10 +0100 Subject: [PATCH 041/374] added multi channel SignalGenerator and SignalProcessor --- LibSource/BiquadFilter.h | 10 +++++----- LibSource/SignalGenerator.h | 10 ++++++++++ LibSource/SignalProcessor.h | 10 ++++++++++ 3 files changed, 25 insertions(+), 5 deletions(-) diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h index 71f62f0c..d1413572 100644 --- a/LibSource/BiquadFilter.h +++ b/LibSource/BiquadFilter.h @@ -350,7 +350,7 @@ class BiquadFilter : public SignalProcessor { } }; -class StereoBiquadFilter : public BiquadFilter { +class StereoBiquadFilter : public BiquadFilter, public StereoSignalProcessor { private: BiquadFilter right; public: @@ -366,12 +366,12 @@ class StereoBiquadFilter : public BiquadFilter { return &right; } - void process(AudioBuffer &buffer){ - BiquadFilter::process(buffer.getSamples(LEFT_CHANNEL)); - right.process(buffer.getSamples(RIGHT_CHANNEL)); + void process(AudioBuffer &input, AudioBuffer &output){ + BiquadFilter::process(input.getSamples(LEFT_CHANNEL), output.getSamples(LEFT_CHANNEL)); + right.process(input.getSamples(RIGHT_CHANNEL), output.getSamples(RIGHT_CHANNEL)); } - static StereoBiquadFilter* create(float sr, int stages){ + static StereoBiquadFilter* create(float sr, int stages=1){ return new StereoBiquadFilter(sr, new float[stages*5], new float[stages*2], new float[stages*2], stages); } diff --git a/LibSource/SignalGenerator.h b/LibSource/SignalGenerator.h index 23f2cfee..f676f36c 100644 --- a/LibSource/SignalGenerator.h +++ b/LibSource/SignalGenerator.h @@ -24,4 +24,14 @@ class SignalGenerator { } }; +class AudioBuffer; +template +class MultiSignalGenerator { +public: + virtual ~MultiSignalGenerator(){} + virtual void generate(AudioBuffer& output) = 0; +}; + +typedef MultiSignalGenerator<2> StereoSignalGenerator; + #endif // __SignalGenerator_h__ diff --git a/LibSource/SignalProcessor.h b/LibSource/SignalProcessor.h index d0ea2560..c0b89d8f 100644 --- a/LibSource/SignalProcessor.h +++ b/LibSource/SignalProcessor.h @@ -16,4 +16,14 @@ class SignalProcessor { } }; +class AudioBuffer; +template +class MultiSignalProcessor { +public: + virtual ~MultiSignalProcessor(){} + virtual void process(AudioBuffer& input, AudioBuffer& output) = 0; +}; + +typedef MultiSignalProcessor<2> StereoSignalProcessor; + #endif // __SignalProcessor_h__ From 08318f3c3f2d0499efa6f9507a7a02359c0915bb Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Mon, 15 Feb 2021 10:35:22 +0100 Subject: [PATCH 042/374] templated multichannel BiquadFilter --- LibSource/BiquadFilter.h | 87 ++++++++++++++++++++----------------- LibSource/FloatArray.cpp | 10 +++++ LibSource/SignalGenerator.h | 3 -- LibSource/SignalProcessor.h | 3 -- 4 files changed, 58 insertions(+), 45 deletions(-) diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h index d1413572..8ba23b43 100644 --- a/LibSource/BiquadFilter.h +++ b/LibSource/BiquadFilter.h @@ -1,6 +1,7 @@ #ifndef __BiquadFilter_h__ #define __BiquadFilter_h__ +#include // for memcpy #include "FloatArray.h" #include "SignalProcessor.h" @@ -154,7 +155,6 @@ class FilterStage { coefficients[4] = - (V - sqrtf(2*V) * K + K * K) * norm; } } - }; /** @@ -163,7 +163,7 @@ class FilterStage { * Each cascaded stage implements a second order filter. */ #define BIQUAD_COEFFICIENTS_PER_STAGE 5 -#define BIQUAD_STATE_VARIABLES_PER_STAGE 2 +#define BIQUAD_STATE_VARIABLES_PER_STAGE 2 // 4 for df1, 2 for df2 class BiquadFilter : public SignalProcessor { private: float pioversr; @@ -185,13 +185,8 @@ class BiquadFilter : public SignalProcessor { * and so on. The coeffs array must contain a total of 5*stages values. */ void copyCoefficients(){ - for(int i=1; i +class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor { private: - BiquadFilter right; + BiquadFilter filters[channels-1]; +protected: public: - StereoBiquadFilter(float sr, float* coefs, float* lstate, float* rstate, int sgs) : - BiquadFilter(sr, coefs, lstate, sgs), - right(sr, coefs, rstate, sgs) {} - - BiquadFilter* getLeftFilter(){ - return this; + MultiBiquadFilter(){} + MultiBiquadFilter(float sr, float* coefs, float* states, int stages) : + BiquadFilter(sr, coefs, states, stages) { + for(size_t ch=1; ch* create(float sr, int stages=1){ + return new MultiBiquadFilter(sr, new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE], new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*channels], stages); + } + static void destroy(MultiBiquadFilter* obj){ + for(size_t ch=1; chfilters[ch-1].getState()); + BiquadFilter::destroy(obj); + } + BiquadFilter* getFilter(size_t channel){ + if(channel == 0) + return this; + if(channel < channels) + return &filters[channel-1]; + return NULL; } - + void process(AudioBuffer &input, AudioBuffer &output){ - BiquadFilter::process(input.getSamples(LEFT_CHANNEL), output.getSamples(LEFT_CHANNEL)); - right.process(input.getSamples(RIGHT_CHANNEL), output.getSamples(RIGHT_CHANNEL)); - } - - static StereoBiquadFilter* create(float sr, int stages=1){ - return new StereoBiquadFilter(sr, new float[stages*5], new float[stages*2], new float[stages*2], stages); - } - - static void destroy(StereoBiquadFilter* filter){ - FloatArray::destroy(filter->right.getState()); - BiquadFilter::destroy(filter); + size_t len = min(channels, min(input.getChannels(), output.getChannels())); + BiquadFilter::process(input.getSamples(0), output.getSamples(0)); + for(size_t ch=1; ch StereoBiquadFilter; + const float FilterStage::BESSEL_Q = 1/sqrtf(3); // 1/sqrt(3) const float FilterStage::SALLEN_KEY_Q = 0.5f; // 1/2 const float FilterStage::BUTTERWORTH_Q = 1/sqrtf(2); // 1/sqrt(2) diff --git a/LibSource/FloatArray.cpp b/LibSource/FloatArray.cpp index 2909e99f..525a0d32 100644 --- a/LibSource/FloatArray.cpp +++ b/LibSource/FloatArray.cpp @@ -452,6 +452,7 @@ void FloatArray::correlate(FloatArray operand2, FloatArray destination){ /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library correlateInitialized(operand2, destination); } + void FloatArray::correlateInitialized(FloatArray operand2, FloatArray destination){ ASSERT(destination.size >= size+operand2.size-1, "Destination array too small"); //TODO: change CMSIS docs, which state a different size /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library @@ -489,6 +490,15 @@ void FloatArray::ramp(float from, float to){ } } +void FloatArray::scale(float from, float to, FloatArray destination){ + float step = (to-from)/size; + float value = from; + for(size_t i=0; i class MultiSignalGenerator { public: virtual ~MultiSignalGenerator(){} virtual void generate(AudioBuffer& output) = 0; }; -typedef MultiSignalGenerator<2> StereoSignalGenerator; - #endif // __SignalGenerator_h__ diff --git a/LibSource/SignalProcessor.h b/LibSource/SignalProcessor.h index c0b89d8f..4c5c7c0a 100644 --- a/LibSource/SignalProcessor.h +++ b/LibSource/SignalProcessor.h @@ -17,13 +17,10 @@ class SignalProcessor { }; class AudioBuffer; -template class MultiSignalProcessor { public: virtual ~MultiSignalProcessor(){} virtual void process(AudioBuffer& input, AudioBuffer& output) = 0; }; -typedef MultiSignalProcessor<2> StereoSignalProcessor; - #endif // __SignalProcessor_h__ From 339bd797c5d1870692261180c94b4cc7bab3f70d Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Mon, 15 Feb 2021 15:21:33 +0100 Subject: [PATCH 043/374] multichannel StateVariableFilter --- LibSource/StateVariableFilter.h | 139 +++++++++++++++++++++++--------- 1 file changed, 99 insertions(+), 40 deletions(-) diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h index 7638ca80..e7805243 100644 --- a/LibSource/StateVariableFilter.h +++ b/LibSource/StateVariableFilter.h @@ -8,39 +8,9 @@ * State Variable Filter based on Andy Simper's code and analysis: * @ref http://www.cytomic.com/files/dsp/SvfLinearTrapOptimised2.pdf */ -class StateVariableFilter : public SignalProcessor { +class AbstractStateVariableFilter { public: - StateVariableFilter(float sr): pioversr(M_PI/sr) {} - - float process(float v0){ - mV3 = v0 - mIc2eq; - mV1 = m_a1 * mIc1eq + m_a2*mV3; - mV2 = mIc2eq + m_a2 * mIc1eq + m_a3 * mV3; - mIc1eq = 2. * mV1 - mIc1eq; - mIc2eq = 2. * mV2 - mIc2eq; - return m_m0 * v0 + m_m1 * mV1 + m_m2 * mV2; - } - - void process(FloatArray input, FloatArray output){ - size_t nFrames = input.getSize(); - for(size_t s = 0; s < nFrames; s++){ - const float v0 = input[s]; - mV3 = v0 - mIc2eq; - mV1 = m_a1 * mIc1eq + m_a2*mV3; - mV2 = mIc2eq + m_a2 * mIc1eq + m_a3 * mV3; - mIc1eq = 2. * mV1 - mIc1eq; - mIc2eq = 2. * mV2 - mIc2eq; - output[s] = m_m0 * v0 + m_m1 * mV1 + m_m2 * mV2; - } - } - - void reset() { - mV1 = 0.; - mV2 = 0.; - mV3 = 0.; - mIc1eq = 0.; - mIc2eq = 0.; - } + AbstractStateVariableFilter(float sr): pioversr(M_PI/sr) {} void setLowPass(float fc, float q){ const float w = tanf(pioversr*fc); @@ -140,6 +110,50 @@ class StateVariableFilter : public SignalProcessor { m_m1 = k*(1. - A)*A; m_m2 = (1. - A*A); } +protected: + float pioversr; + // coefficients + float m_a1 = 0.; + float m_a2 = 0.; + float m_a3 = 0.; + float m_m0 = 0.; + float m_m1 = 0.; + float m_m2 = 0.; +}; + +class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor { +public: + StateVariableFilter(float sr): AbstractStateVariableFilter(sr) {} + + float process(float v0){ + mV3 = v0 - mIc2eq; + mV1 = m_a1 * mIc1eq + m_a2*mV3; + mV2 = mIc2eq + m_a2 * mIc1eq + m_a3 * mV3; + mIc1eq = 2. * mV1 - mIc1eq; + mIc2eq = 2. * mV2 - mIc2eq; + return m_m0 * v0 + m_m1 * mV1 + m_m2 * mV2; + } + + void process(FloatArray input, FloatArray output){ + size_t nFrames = input.getSize(); + for(size_t s = 0; s < nFrames; s++){ + const float v0 = input[s]; + mV3 = v0 - mIc2eq; + mV1 = m_a1 * mIc1eq + m_a2*mV3; + mV2 = mIc2eq + m_a2 * mIc1eq + m_a3 * mV3; + mIc1eq = 2. * mV1 - mIc1eq; + mIc2eq = 2. * mV2 - mIc2eq; + output[s] = m_m0 * v0 + m_m1 * mV1 + m_m2 * mV2; + } + } + + void reset() { + mV1 = 0.; + mV2 = 0.; + mV3 = 0.; + mIc1eq = 0.; + mIc2eq = 0.; + } static StateVariableFilter* create(float sr){ return new StateVariableFilter(sr); @@ -150,20 +164,65 @@ class StateVariableFilter : public SignalProcessor { } private: - float pioversr; // state float mV1 = 0.; float mV2 = 0.; float mV3 = 0.; float mIc1eq = 0.; float mIc2eq = 0.; - // coefficients - float m_a1 = 0.; - float m_a2 = 0.; - float m_a3 = 0.; - float m_m0 = 0.; - float m_m1 = 0.; - float m_m2 = 0.; }; +template +class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignalProcessor { +public: + MultiStateVariableFilter(float sr): AbstractStateVariableFilter(sr) {} + + void process(AudioBuffer &input, AudioBuffer &output){ + size_t len = min(channels, min(input.getChannels(), output.getChannels())); + for(int ch=0; ch* create(float sr){ + return new MultiStateVariableFilter(sr); + } + + static void destroy(MultiStateVariableFilter* svf){ + delete svf; + } + +private: + // state + float mV1[channels] = {}; + float mV2[channels] = {}; + float mV3[channels] = {}; + float mIc1eq[channels] = {}; + float mIc2eq[channels] = {}; +}; + + +typedef MultiStateVariableFilter<2> StereoStateVariableFilter; + #endif // __StateVariableFilter_h__ From abec5331a05118af651a7360db61ab6d9eea82b3 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Mon, 15 Feb 2021 22:22:35 +0100 Subject: [PATCH 044/374] fixed invalid calls to BiquadFilter --- LibSource/Resample.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/LibSource/Resample.h b/LibSource/Resample.h index 4072364e..a7e124d4 100644 --- a/LibSource/Resample.h +++ b/LibSource/Resample.h @@ -52,7 +52,7 @@ class [[deprecated("use UpSampler and DownSampler instead.")]] Resampler { } void downsample(FloatArray input, FloatArray output){ ASSERT(input.getSize()==output.getSize()*factor, "wrong size"); - downfilter->process(input, input.getSize()); + downfilter->process(input, input); float* p = (float*)input; for(int i=0; iprocess(output, output.getSize()); + upfilter->process(output, output); } }; @@ -104,7 +104,7 @@ class UpSampler : public SignalProcessor { output.clear(); for(int i=0; iprocess(output, output.getSize()); + filter->process(output, output); } }; @@ -134,7 +134,7 @@ class DownSampler : public SignalProcessor { */ void process(FloatArray input, FloatArray output){ ASSERT(input.getSize()==output.getSize()*factor, "wrong size"); - filter->process(input, input.getSize()); + filter->process(input, input); float* p = (float*)input; for(int i=0; i Date: Mon, 15 Feb 2021 22:33:27 +0100 Subject: [PATCH 045/374] fix invalid API calls --- LibSource/PitchDetector.h | 16 +++------------- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/LibSource/PitchDetector.h b/LibSource/PitchDetector.h index 23855379..f48eccc1 100644 --- a/LibSource/PitchDetector.h +++ b/LibSource/PitchDetector.h @@ -127,7 +127,7 @@ class ZeroCrossingPitchDetector{ // RAII constructor filterOutput = FloatArray::create(blocksize); counts = FloatArray::create(POINTS_AVERAGE); //number of zcc to be averaged - filter = BiquadFilter::create(numLowPassStages+numHighPassStages); + filter = BiquadFilter::create(aSamplingRate, numLowPassStages+numHighPassStages); setLowPassCutoff(0.03); setHighPassCutoff(0.001); } @@ -142,22 +142,12 @@ class ZeroCrossingPitchDetector{ void setLowPassCutoff(float fc){ if(numLowPassStages<1) return; - FilterStage stage0=filter->getFilterStage(0); - stage0.setLowPass(fc/samplingRate, FilterStage::BUTTERWORTH_Q); - for(int n=1; ngetFilterStage(n); - stage.setCoefficients(FloatArray(stage0.getCoefficients(), 5)); - } + filter->setLowPass(fc, FilterStage::BUTTERWORTH_Q); }; void setHighPassCutoff(float fc){ if(numHighPassStages<1) return; - FilterStage stage0=filter->getFilterStage(numLowPassStages); - stage0.setHighPass(fc/samplingRate, FilterStage::BUTTERWORTH_Q); - for(int n=numLowPassStages+1; ngetFilterStage(n); - stage.setCoefficients(stage0.getCoefficients()); - } + filter->setHighPass(fc, FilterStage::BUTTERWORTH_Q); }; void process(FloatArray input){ ASSERT(input.getSize()<=filterOutput.getSize(), "wrong size"); From 8cc9eb43ef87d6774c68147fd3cc96a0f06ade8a Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Mon, 15 Feb 2021 22:33:48 +0100 Subject: [PATCH 046/374] complete set of library includes --- LibSource/OpenWareLibrary.h | 44 ++++++++++++++++++++++++------------- 1 file changed, 29 insertions(+), 15 deletions(-) diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h index 9f1ea5a7..e4603720 100644 --- a/LibSource/OpenWareLibrary.h +++ b/LibSource/OpenWareLibrary.h @@ -1,26 +1,40 @@ #ifndef __OpenWareLibrary_h__ #define __OpenWareLibrary_h__ -#include "Patch.h" -#include "Window.h" -#include "NoiseGenerator.h" -#include "SineOscillator.h" -#include "RampOscillator.h" -#include "ChirpOscillator.h" -#include "PolyBlepOscillator.h" -#include "WavetableOscillator.h" -#include "FirFilter.h" #include "BiquadFilter.h" -#include "StateVariableFilter.h" +#include "ChirpOscillator.h" +#include "ComplexFloatArray.h" +#include "ComplexFourierTransform.h" +#include "ComplexShortArray.h" +#include "Control.h" #include "Envelope.h" #include "ExponentialDecayEnvelope.h" -#include "Resample.h" -#include "ComplexFloatArray.h" #include "FastFourierTransform.h" +#include "FastLogTable.h" +#include "FastPowTable.h" +#include "FirFilter.h" +#include "FloatArray.h" +#include "FloatMatrix.h" +#include "IntArray.h" +#include "NoiseGenerator.h" +#include "OpenWareMidiControl.h" +#include "Oscillator.h" +#include "Patch.h" +#include "PatchParameter.h" +#include "PitchDetector.h" +#include "PolyBlepOscillator.h" +#include "RampOscillator.h" +#include "Resample.h" +#include "Resource.h" #include "ShortArray.h" -#include "ComplexShortArray.h" #include "ShortFastFourierTransform.h" -#include "IntArray.h" -#include "FloatMatrix.h" +#include "SignalGenerator.h" +#include "SignalProcessor.h" +#include "SineOscillator.h" +#include "SmoothValue.h" +#include "StateVariableFilter.h" +#include "VoltsPerOctave.h" +#include "WavetableOscillator.h" +#include "Window.h" #endif /* __OpenWareLibrary_h__ */ From 8b8d0eef89ae324779083eefc6b0699592f92120 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 15:21:40 +0100 Subject: [PATCH 047/374] added getMasterPhase() getter --- Libraries/polyblep/dsp/oscillator.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Libraries/polyblep/dsp/oscillator.h b/Libraries/polyblep/dsp/oscillator.h index 6d14f3af..ee148d65 100755 --- a/Libraries/polyblep/dsp/oscillator.h +++ b/Libraries/polyblep/dsp/oscillator.h @@ -120,7 +120,10 @@ class Oscillator { previous_pw_ = 0.5f; previous_waveshape_ = 0.0f; } - + + float getMasterPhase(){ + return master_phase_; + } template void Render( From 04addfdf4a8f1196ddce746bdfdd5422b92414b8 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 15:22:16 +0100 Subject: [PATCH 048/374] added ac/dc blocking IIR filters --- LibSource/AcBlockingFilter.h | 74 +++++++++++++++++++++++++++++++++ LibSource/DcBlockingFilter.h | 79 ++++++++++++++++++++++++++++++++++++ 2 files changed, 153 insertions(+) create mode 100644 LibSource/AcBlockingFilter.h create mode 100644 LibSource/DcBlockingFilter.h diff --git a/LibSource/AcBlockingFilter.h b/LibSource/AcBlockingFilter.h new file mode 100644 index 00000000..27301ea0 --- /dev/null +++ b/LibSource/AcBlockingFilter.h @@ -0,0 +1,74 @@ +#ifndef __AcBlockingFilter_h__ +#define __AcBlockingFilter_h__ + +#include "FloatArray.h" +#include "SignalProcessor.h" + +/** + * AC Blocking IIR filter, the Leaky Integrator. Used for signal smoothing. + */ +class AcBlockingFilter : public SignalProcessor { +private: + const float lambda; + float y; +public: + AcBlockingFilter(float lambda = 0.995): lambda(lambda), y(0) {} + + /* process a single sample and return the result */ + float process(float x){ + y = y*lambda + x*(1.0f - lambda); + return y; + } + + void process(float* input, float* output, size_t size){ + float x; + while(size--){ + x = *input++; + y = y*lambda + x*(1.0f - lambda); + *output++ = y; + } + } + + /* perform in-place processing */ + void process(float* buf, int size){ + process(buf, buf, size); + } + + void process(FloatArray in){ + process(in, in, in.getSize()); + } + + void process(FloatArray in, FloatArray out){ + ASSERT(out.getSize() >= in.getSize(), "output array must be at least as long as input"); + process(in, out, in.getSize()); + } + + static AcBlockingFilter* create(float lambda){ + return new AcBlockingFilter(lambda); + } + + static void destroy(AcBlockingFilter* obj){ + delete obj; + } +}; + +class StereoAcBlockingFilter : public MultiSignalProcessor { +private: + AcBlockingFilter left, right; +public: + StereoAcBlockingFilter(float lambda = 0.995): left(lambda), right(lambda) {} + void process(AudioBuffer& input, AudioBuffer& output){ + left.process(input.getSamples(LEFT_CHANNEL), output.getSamples(LEFT_CHANNEL)); + right.process(input.getSamples(RIGHT_CHANNEL), output.getSamples(RIGHT_CHANNEL)); + } + + static StereoAcBlockingFilter* create(float lambda){ + return new StereoAcBlockingFilter(lambda); + } + + static void destroy(StereoAcBlockingFilter* obj){ + delete obj; + } +}; + +#endif // __AcBlockingFilter_h__ diff --git a/LibSource/DcBlockingFilter.h b/LibSource/DcBlockingFilter.h new file mode 100644 index 00000000..173db05c --- /dev/null +++ b/LibSource/DcBlockingFilter.h @@ -0,0 +1,79 @@ +#ifndef __DcBlockingFilter_h__ +#define __DcBlockingFilter_h__ + +#include "FloatArray.h" +#include "SignalProcessor.h" + +/** + * DC Blocking IIR filter: + * Leaky differentiator. + */ +class DcBlockingFilter : public SignalProcessor { +private: + const float lambda; + float x1, y1; +public: + DcBlockingFilter(float lambda = 0.995): lambda(lambda), x1(0), y1(0) {} + + /* process a single sample and return the result */ + float process(float x){ + y1 = x - x1 + lambda*y1; + x1 = x; + return y1; + } + + void process(float* input, float* output, size_t size){ + float x; + float y = y1; + while(size--){ + x = *input++; + y = x - x1 + lambda*y; + x1 = x; + *output++ = y; + } + y1 = y; + } + + /* perform in-place processing */ + void process(float* buf, int size){ + process(buf, buf, size); + } + + void process(FloatArray in){ + process(in, in, in.getSize()); + } + + void process(FloatArray in, FloatArray out){ + ASSERT(out.getSize() >= in.getSize(), "output array must be at least as long as input"); + process(in, out, in.getSize()); + } + + static DcBlockingFilter* create(float lambda){ + return new DcBlockingFilter(lambda); + } + + static void destroy(DcBlockingFilter* obj){ + delete obj; + } +}; + +class StereoDcBlockingFilter : public MultiSignalProcessor { +private: + DcBlockingFilter left, right; +public: + StereoDcBlockingFilter(float lambda = 0.995): left(lambda), right(lambda) {} + void process(AudioBuffer& input, AudioBuffer& output){ + left.process(input.getSamples(LEFT_CHANNEL), output.getSamples(LEFT_CHANNEL)); + right.process(input.getSamples(RIGHT_CHANNEL), output.getSamples(RIGHT_CHANNEL)); + } + + static StereoDcBlockingFilter* create(float lambda){ + return new StereoDcBlockingFilter(lambda); + } + + static void destroy(StereoDcBlockingFilter* obj){ + delete obj; + } +}; + +#endif // __DcBlockingFilter_h__ From 2fdb030577e8d63bdc9aed4f17cb0defc606d0e2 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 15:22:59 +0100 Subject: [PATCH 049/374] added Oscillator::getFrequency() getSampleRate() and getPhase() --- LibSource/ChirpOscillator.h | 9 ++++++ LibSource/OpenWareLibrary.h | 2 ++ LibSource/Oscillator.h | 17 +++++++++++ LibSource/PolyBlepOscillator.cpp | 38 +++++++++++++++-------- LibSource/PolyBlepOscillator.h | 5 +++- LibSource/RampOscillator.h | 33 ++++++++++++++++---- LibSource/SineOscillator.h | 27 ++++++++++++----- LibSource/WavetableOscillator.cpp | 50 +++++++++++++++++++------------ LibSource/WavetableOscillator.h | 3 ++ 9 files changed, 139 insertions(+), 45 deletions(-) diff --git a/LibSource/ChirpOscillator.h b/LibSource/ChirpOscillator.h index 8b98161f..f8cdef04 100644 --- a/LibSource/ChirpOscillator.h +++ b/LibSource/ChirpOscillator.h @@ -17,9 +17,15 @@ class ChirpOscillator : public Oscillator { incr = freq*2*M_PI/sr; basefreq = freq; } + float getFrequency(){ + return basefreq; + } void setSampleRate(float sample_rate){ sr = sample_rate; } + float getSampleRate(){ + return sr; + } /** * Set rate of change: positive for ascending chirp, negative for descending. * +1 doubles frequency in one second @@ -35,6 +41,9 @@ class ChirpOscillator : public Oscillator { void reset(){ phase = 0.0f; } + float getPhase(){ + return phase; + } float generate(){ float sample = sinf(phase); phase += incr; diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h index e4603720..ccc85556 100644 --- a/LibSource/OpenWareLibrary.h +++ b/LibSource/OpenWareLibrary.h @@ -1,12 +1,14 @@ #ifndef __OpenWareLibrary_h__ #define __OpenWareLibrary_h__ +#include "AcBlockingFilter.h" #include "BiquadFilter.h" #include "ChirpOscillator.h" #include "ComplexFloatArray.h" #include "ComplexFourierTransform.h" #include "ComplexShortArray.h" #include "Control.h" +#include "DcBlockingFilter.h" #include "Envelope.h" #include "ExponentialDecayEnvelope.h" #include "FastFourierTransform.h" diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h index bf84fe1d..cbe341a3 100644 --- a/LibSource/Oscillator.h +++ b/LibSource/Oscillator.h @@ -17,10 +17,27 @@ class Oscillator : public SignalGenerator { * Set oscillator sample rate */ virtual void setSampleRate(float value){} + /** + * Get oscillator sample rate + */ + virtual float getSampleRate(){ + return 0.0f; + } /** * Set oscillator frequency in Hertz */ virtual void setFrequency(float value){} + /** + * Get oscillator frequency in Hertz + */ + virtual float getFrequency(float value){ + return 0.0f; + } + /** + * Get current oscillator phase in radians + * @return a value between 0 and 2*pi + */ + virtual float getPhase() = 0; /** * Reset oscillator (typically resets phase) */ diff --git a/LibSource/PolyBlepOscillator.cpp b/LibSource/PolyBlepOscillator.cpp index 4fff9627..0ef0ffc9 100644 --- a/LibSource/PolyBlepOscillator.cpp +++ b/LibSource/PolyBlepOscillator.cpp @@ -2,27 +2,35 @@ #include "basicmaths.h" PolyBlepOscillator::PolyBlepOscillator(float sr): - mul(1.0/sr), - frequency(0), - shape(0.5), - pw(0.5) { + mul(1.0f/sr), + nfreq(0.0f), + shape(0.5f), + pw(0.5f) { osc.Init(); } PolyBlepOscillator::PolyBlepOscillator(float freq, float sr): - mul(1.0/sr), - shape(0.5), - pw(0.5) { + mul(1.0f/sr), + shape(0.5f), + pw(0.5f) { setFrequency(freq); osc.Init(); } void PolyBlepOscillator::setSampleRate(float sr){ - mul = 1.0/sr; + mul = 1.0f/sr; +} + +float PolyBlepOscillator::getSampleRate(){ + return 1.0f/mul; } void PolyBlepOscillator::setFrequency(float freq){ - frequency = mul*freq; + nfreq = mul*freq; +} + +float PolyBlepOscillator::getFrequency(){ + return nfreq/mul; } void PolyBlepOscillator::setShape(float value){ @@ -33,24 +41,28 @@ void PolyBlepOscillator::setPulseWidth(float value){ pw = value; } +float PolyBlepOscillator::getPhase(){ + return osc.getMasterPhase()*2*M_PI; +} + float PolyBlepOscillator::generate(){ float sample; - osc.Render(frequency, pw, shape, &sample, 1); + osc.Render(nfreq, pw, shape, &sample, 1); return sample; } float PolyBlepOscillator::generate(float fm){ float sample; - osc.Render(frequency+fm, pw, shape, &sample, 1); + osc.Render(nfreq+fm, pw, shape, &sample, 1); return sample; } void PolyBlepOscillator::generate(FloatArray output){ - osc.Render(frequency, pw, shape, output, output.getSize()); + osc.Render(nfreq, pw, shape, output, output.getSize()); } void PolyBlepOscillator::generate(FloatArray output, FloatArray fm){ - fm.add(frequency); // add our base frequency + fm.add(nfreq); // add our base frequency osc.Render(fm, pw, shape, output, output.getSize()); } diff --git a/LibSource/PolyBlepOscillator.h b/LibSource/PolyBlepOscillator.h index a0c8d638..0ad2f2cb 100644 --- a/LibSource/PolyBlepOscillator.h +++ b/LibSource/PolyBlepOscillator.h @@ -9,16 +9,19 @@ class PolyBlepOscillator : public Oscillator { private: float mul; stmlib::Oscillator osc; - float frequency, shape, pw; + float nfreq, shape, pw; public: PolyBlepOscillator(float sr=48000); PolyBlepOscillator(float freq, float sr); void setSampleRate(float sr); + float getSampleRate(); void setFrequency(float freq); + float getFrequency(); /** set waveform shape: 0.0 for saw, 1.0 for square wave */ void setShape(float value); /** set square wave pulse width: 0.0 to 1.0 for 0% to 100% */ void setPulseWidth(float value); + float getPhase(); float generate(); float generate(float fm); /* put a block of output samples into @param output */ diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h index 6193e335..05159927 100644 --- a/LibSource/RampOscillator.h +++ b/LibSource/RampOscillator.h @@ -19,18 +19,23 @@ class RampOscillator : public Oscillator { phase = 0.0f; } void setSampleRate(float sr){ - mul = 1.0f/sr; + mul = 2.0f/sr; + } + float getS2ampleRate(){ + return 2.0f/mul; } void setFrequency(float freq){ incr = freq*mul; } + float getFrequency(){ + return incr/mul; + } void setPhase(float ph){ - phase = ph; - while(phase >= 1) - phase -= 1; + phase = ph/M_PI - 1.0f; // internal phase is -1 to 1 } float getPhase(){ - return phase; + // return phase 0 to 2*pi + return phase*M_PI+M_PI; } float generate(){ float sample = phase; @@ -39,6 +44,24 @@ class RampOscillator : public Oscillator { phase -= 2.0f; return sample; } + void generate(FloatArray output){ + size_t len = output.getSize(); + float* dest = output; + while(phase + incr*len >= 1.0f){ + float remain = 1.0f - phase; + size_t steps = (size_t)(remain/incr); + for(size_t i=0; i= 2*M_PI) - phase -= 2*M_PI; } float getPhase(){ return phase; @@ -40,6 +43,16 @@ class SineOscillator : public Oscillator { phase -= 2*M_PI; return sample; } + void generate(FloatArray output){ + size_t len = output.getSize(); + for(size_t i=0; i 0) + phase -= rw*2*M_PI; + } float generate(float fm){ float sample = sinf(phase); phase += incr + fm; diff --git a/LibSource/WavetableOscillator.cpp b/LibSource/WavetableOscillator.cpp index c60babac..7e86bc15 100644 --- a/LibSource/WavetableOscillator.cpp +++ b/LibSource/WavetableOscillator.cpp @@ -2,32 +2,28 @@ #include "basicmaths.h" #include -WavetableOscillator* WavetableOscillator::create(float sr, size_t size) { - FloatArray wave = FloatArray::create(size); - for(size_t i=0; iwave); - delete osc; -} - WavetableOscillator::WavetableOscillator(float sr, const FloatArray wavetable): - mul(1.0/sr), + mul(1.0f/sr), wave(wavetable), - acc(0.0), inc(0.1) + acc(0.0f), inc(0.1f) {} void WavetableOscillator::setSampleRate(float sr){ - mul = 1.0/sr; + mul = 1.0f/sr; +} + +float WavetableOscillator::getSampleRate(){ + return 1.0f/mul; } void WavetableOscillator::setFrequency(float freq){ inc = freq*mul; } +float WavetableOscillator::getFrequency(){ + return inc/mul; +} + float WavetableOscillator::getSample(float phase){ uint32_t size = wave.getSize(); uint32_t index = phase*(size-1); @@ -35,19 +31,23 @@ float WavetableOscillator::getSample(float phase){ return wave[index]; } +float WavetableOscillator::getPhase(){ + return acc*2*M_PI; +} + float WavetableOscillator::generate(){ float s = getSample(acc); acc += inc; - if(acc >= 1.0) - acc -= 1.0; + if(acc >= 1.0f) + acc -= 1.0f; return s; } float WavetableOscillator::generate(float fm){ float s = getSample(acc); acc += inc + fm; - if(acc > 1.0) - acc -= 1.0; + if(acc > 1.0f) + acc -= 1.0f; return s; } @@ -55,3 +55,15 @@ void WavetableOscillator::generate(FloatArray samples){ for(size_t i=0; iwave); + delete osc; +} diff --git a/LibSource/WavetableOscillator.h b/LibSource/WavetableOscillator.h index 210ef77c..1dde423a 100644 --- a/LibSource/WavetableOscillator.h +++ b/LibSource/WavetableOscillator.h @@ -13,8 +13,11 @@ class WavetableOscillator : public Oscillator { public: WavetableOscillator(float sr, const FloatArray wavetable); void setSampleRate(float sr); + float getSampleRate(); void setFrequency(float freq); + float getFrequency(); float getSample(float phase); + float getPhase(); float generate(); float generate(float fm); void generate(FloatArray samples); From 44e22247196179aee111672eec2fad8a70d05978 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 15:23:30 +0100 Subject: [PATCH 050/374] added SineOscillatorTestPatch --- TestPatches/SineOscillatorTestPatch.hpp | 28 +++++++++++++++++++++++++ 1 file changed, 28 insertions(+) create mode 100644 TestPatches/SineOscillatorTestPatch.hpp diff --git a/TestPatches/SineOscillatorTestPatch.hpp b/TestPatches/SineOscillatorTestPatch.hpp new file mode 100644 index 00000000..d0d98377 --- /dev/null +++ b/TestPatches/SineOscillatorTestPatch.hpp @@ -0,0 +1,28 @@ +#include "TestPatch.hpp" +#include "SineOscillator.h" + +class SineOscillatorTestPatch : public TestPatch { +public: + SineOscillatorTestPatch(){ + { + TEST("ctor"); + SineOscillator osc(440, 16000); + CHECK_EQUAL(osc.getSampleRate(), 16000); + CHECK_EQUAL(osc.getFrequency(), 440); + osc = SineOscillator(32000); + CHECK_EQUAL(osc.getFrequency(), 0.0f); + } + { + TEST("create"); + SineOscillator* osc = SineOscillator::create(120.0f, 32000); + CHECK_EQUAL(osc->getFrequency(), 120.0f); + SineOscillator::destroy(osc); + } + { + TEST("setSampleRate"); + SineOscillator* osc = SineOscillator::create(321.0f, 44100); + + } + } +}; + From 1c756322ca77d67e58921ff5fb75df1b7e2a770b Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 15:23:38 +0100 Subject: [PATCH 051/374] remove unused include --- TestPatches/ShortArrayTestPatch.hpp | 1 - 1 file changed, 1 deletion(-) diff --git a/TestPatches/ShortArrayTestPatch.hpp b/TestPatches/ShortArrayTestPatch.hpp index 780fc651..62be7e96 100644 --- a/TestPatches/ShortArrayTestPatch.hpp +++ b/TestPatches/ShortArrayTestPatch.hpp @@ -1,7 +1,6 @@ #include "TestPatch.hpp" #include "ShortArray.h" #include -#include class ShortArrayTestPatch : public TestPatch { public: From 1ea156d53bd6519fa34d4134e3d97986e506d630 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 18:27:23 +0100 Subject: [PATCH 052/374] fix 'size' target --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 9ef3d625..2b4e03a3 100644 --- a/Makefile +++ b/Makefile @@ -165,7 +165,7 @@ realclean: clean ## remove all library object files @find Libraries/ -name '*.[a|o]' -delete size: patch ## show binary size metrics and large object summary - @$(MAKE) -s -f common.mk size + @$(MAKE) -s -f compile.mk size map: patch ## build map file (Build/patch.map) @$(MAKE) -s -f compile.mk map From 5ba07ee2f96b09ac139b35df139761c518c713cf Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 18:27:23 +0100 Subject: [PATCH 053/374] fix 'size' target --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 9ef3d625..2b4e03a3 100644 --- a/Makefile +++ b/Makefile @@ -165,7 +165,7 @@ realclean: clean ## remove all library object files @find Libraries/ -name '*.[a|o]' -delete size: patch ## show binary size metrics and large object summary - @$(MAKE) -s -f common.mk size + @$(MAKE) -s -f compile.mk size map: patch ## build map file (Build/patch.map) @$(MAKE) -s -f compile.mk map From 04eebe77b13989c08a3b0bfc2161c962d96ea2e1 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Wed, 17 Feb 2021 18:33:08 +0100 Subject: [PATCH 054/374] fix compilation warnings --- LibSource/FloatArray.cpp | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/LibSource/FloatArray.cpp b/LibSource/FloatArray.cpp index 525a0d32..5ceee968 100644 --- a/LibSource/FloatArray.cpp +++ b/LibSource/FloatArray.cpp @@ -406,13 +406,13 @@ void FloatArray::convolve(FloatArray operand2, FloatArray destination){ #ifdef ARM_CORTEX arm_conv_f32(data, size, operand2.data, operand2.size, destination); #else - size_t size2=operand2.getSize(); - for (size_t n=0; n=0 && n1=0 && n1 Date: Thu, 18 Feb 2021 02:19:20 +0100 Subject: [PATCH 055/374] unit test changes --- Makefile | 15 +++--- TestPatches/BiquadFilterTestPatch.hpp | 34 ++++++++------ TestPatches/ComplexShortArrayTestPatch.hpp | 46 ++----------------- TestPatches/DummyPatch.hpp | 3 ++ TestPatches/FastFourierTestPatch.hpp | 27 ----------- TestPatches/FastFourierTransformTestPatch.hpp | 33 ------------- TestPatches/FourierPitchDetectorTestPatch.hpp | 4 +- TestPatches/PatchParameterTestPatch.hpp | 28 ----------- TestPatches/ResampleTestPatch.hpp | 3 +- TestPatches/SineOscillatorTestPatch.hpp | 17 +++++-- TestPatches/TestPatch.hpp | 18 ++++---- native.mk | 3 +- sources.mk | 1 + 13 files changed, 62 insertions(+), 170 deletions(-) delete mode 100644 TestPatches/FastFourierTestPatch.hpp delete mode 100644 TestPatches/FastFourierTransformTestPatch.hpp delete mode 100755 TestPatches/PatchParameterTestPatch.hpp diff --git a/Makefile b/Makefile index 2b4e03a3..4d27df1c 100644 --- a/Makefile +++ b/Makefile @@ -76,6 +76,10 @@ LDSCRIPT ?= $(BUILDROOT)/Source/flash.ld PATCHSOURCE ?= $(BUILDROOT)/PatchSource FIRMWARESENDER ?= Tools/FirmwareSender +# set up tests +TEST_FILES = $(notdir $(wildcard $(BUILDROOT)/TestPatches/*TestPatch.hpp)) +TESTS = $(filter-out ShortFastFourierTest, $(TEST_FILES:%Patch.hpp=%)) + export BUILD BUILDROOT TARGET export PATCHNAME PATCHCLASS PATCHSOURCE export PATCHFILE PATCHIN PATCHOUT @@ -184,13 +188,10 @@ test: $(DEPS) ## test patch locally run: $(DEPS) ## run patch locally @$(MAKE) -s -f native.mk run -check: ## run tests - @$(MAKE) -s TEST=ComplexFourierTransformTest test - @$(MAKE) -s TEST=FloatArrayTest test - @$(MAKE) -s TEST=ShortArrayTest test - @$(MAKE) -s TEST=FastExpTest test - @$(MAKE) -s TEST=FastLogTest test - @$(MAKE) -s TEST=FastPowTest test +check: + for nm in $(TESTS) ; do \ + $(MAKE) TEST=$$nm test || exit;\ + done help: ## show this help @echo 'Usage: make [target] ...' diff --git a/TestPatches/BiquadFilterTestPatch.hpp b/TestPatches/BiquadFilterTestPatch.hpp index d1afa867..015c78af 100644 --- a/TestPatches/BiquadFilterTestPatch.hpp +++ b/TestPatches/BiquadFilterTestPatch.hpp @@ -29,7 +29,8 @@ #ifndef __BiquadFilterTestPatch_hpp__ #define __BiquadFilterTestPatch_hpp__ -#include "StompBox.h" +#include "Patch.h" +#include "BiquadFilter.h" class BiquadFilterTestPatch : public Patch { public: @@ -37,24 +38,24 @@ class BiquadFilterTestPatch : public Patch { BiquadFilterTestPatch(){ registerParameter(PARAMETER_A, "Cutoff"); registerParameter(PARAMETER_B, "Resonance"); - int stages=3; - filter=BiquadFilter::create(stages); - float cutoff=0.2; + size_t stages=3; + filter=BiquadFilter::create(getSampleRate(), stages); + float cutoff=1200; float resonance=2; //test setLowPass - FloatArray coefficients=FloatArray::create(5*stages); - FloatArray states=FloatArray::create(2*stages); + FloatArray coefficients=FloatArray::create(BIQUAD_COEFFICIENTS_PER_STAGE*stages); + FloatArray states=FloatArray::create(BIQUAD_STATE_VARIABLES_PER_STAGE*stages); FilterStage stage(coefficients, states); filter->setLowPass(cutoff, resonance); - stage.setLowPass(cutoff, resonance); - for(int k=0; kgetFilterStage(k).getCoefficients()[n]; float stageC=stage.getCoefficients()[n]; - ASSERT(filterC==stageC, "Coefficients not initialized"); //check that filter coefficients are properly initialized + ASSERT(abs(filterC-stageC) < 0.000001, "Coefficients not initialized"); //check that filter coefficients are properly initialized } } - int signalLength=100; + size_t signalLength=100; FloatArray x=FloatArray::create(signalLength); FloatArray x1=FloatArray::create(signalLength); @@ -70,10 +71,10 @@ class BiquadFilterTestPatch : public Patch { float b2=filter->getFilterStage(0).getCoefficients()[2]; float a1=filter->getFilterStage(0).getCoefficients()[3]; float a2=filter->getFilterStage(0).getCoefficients()[4]; - for(int n=0; n> 17, 4); CHECK_CLOSE(tempc2[n].im, (cfa[n].re*tempc[n].im + cfa[n].im*tempc[n].re) >> 17, 4); } @@ -45,44 +44,5 @@ class ComplexShortArrayTestPatch : public TestPatch { ComplexShortArray::destroy(tempc); ComplexShortArray::destroy(tempc2); } - { - TEST("ShortToInt and IntToShort"); - ComplexShortArray cs = ComplexShortArray::create(1000); - ComplexIntArray ci = ComplexIntArray::create(1000); - ShortArray data = ShortArray((int16_t*)cs.getData(), 2000); - data.noise(); - ci.copyFrom(cs); - for(int n = 0; n < cs.getSize(); ++n){ - CHECK(cs[n].re == ci[n].re); - CHECK(cs[n].im == cs[n].im); - } - data.clear(); - ci.copyTo(cs); - for(int n = 0; n < cs.getSize(); ++n){ - CHECK(cs[n].re == ci[n].re); - CHECK(cs[n].im == cs[n].im); - } - ComplexShortArray::destroy(cs); - ComplexIntArray::destroy(ci); - } - { - TEST("ComplexIntArray.add"); - ComplexIntArray ci = ComplexIntArray::create(1000); - ComplexIntArray ci2 = ComplexIntArray::create(1000); - ComplexIntArray ci3 = ComplexIntArray::create(1000); - ShortArray data1 = ShortArray((int16_t*)ci.getData(), 4000); - ShortArray data2 = ShortArray((int16_t*)ci2.getData(), 4000); - data1.noise(); - data2.noise(); - ci.add(ci2, ci3); - for(int n = 0; n < ci3.getSize(); ++n){ - CHECK(ci3[n].re == ci[n].re + ci2[n].re); - CHECK(ci3[n].im == ci[n].im + ci2[n].im); - } - ComplexIntArray::destroy(ci); - ComplexIntArray::destroy(ci2); - ComplexIntArray::destroy(ci3); - } - debugMessage("end of tests!"); } }; diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp index 27eaff33..dadc9638 100644 --- a/TestPatches/DummyPatch.hpp +++ b/TestPatches/DummyPatch.hpp @@ -195,6 +195,9 @@ void Patch::registerParameter(PatchParameterId pid, const char* name){ printf("Register parameter %c: %s\n", 'A'+pid, name); } +float Patch::getElapsedBlockTime(){ return 0; } +int Patch::getElapsedCycles(){ return 0; } + void Patch::processMidi(MidiMessage msg){} void Patch::sendMidi(MidiMessage msg){ diff --git a/TestPatches/FastFourierTestPatch.hpp b/TestPatches/FastFourierTestPatch.hpp deleted file mode 100644 index 5d7e2d3a..00000000 --- a/TestPatches/FastFourierTestPatch.hpp +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef __FastFourierTestPatch_hpp__ -#define __FastFourierTestPatch_hpp__ - -#include "StompBox.h" -#include "FastFourierTransform.h" - -class FastFourierTestPatch : public Patch { -private: - FastFourierTransform transform; - ComplexFloatArray ca; -public: - FastFourierTestPatch(){ - int fftSize = getBlockSize(); - transform.init(fftSize); - ca = ComplexFloatArray::create(fftSize); - } - ~FastFourierTestPatch(){ - ComplexFloatArray::destroy(ca); - } - void processAudio(AudioBuffer &buffer){ - FloatArray buf = buffer.getSamples(0); - transform.fft(buf, ca); - transform.ifft(ca, buf); - } -}; - -#endif // __FastFourierTestPatch_hpp__ diff --git a/TestPatches/FastFourierTransformTestPatch.hpp b/TestPatches/FastFourierTransformTestPatch.hpp deleted file mode 100644 index a8a7f744..00000000 --- a/TestPatches/FastFourierTransformTestPatch.hpp +++ /dev/null @@ -1,33 +0,0 @@ -#ifndef __FastFourierTransformTestPatch_hpp__ -#define __FastFourierTransformTestPatch_hpp__ - -#include "StompBox.h" - -class FastFourierTransformTestPatch : public Patch { -private: - bool success; - int passed; - int failed; - int fftsize; - FastFourierTransform fft; - ComplexFloatArray fd; - SuperSaw ss; -public: - FastFourierTransformTestPatch(): ss(getSampleRate()){ - - fftsize=getBlockSize(); - fft.init(fftsize); - fd=ComplexFloatArray::create(fftsize); - - }; - void processAudio(AudioBuffer &buffer){ - ss.setFrequency(300); - FloatArray td=buffer.getSamples(0); - ss.getSamples(td); - fft.fft(td,fd); - fft.ifft(fd,td); - td.scale(0.1); - } -}; - -#endif // __FastFourierTransformTestPatch_hpp__ diff --git a/TestPatches/FourierPitchDetectorTestPatch.hpp b/TestPatches/FourierPitchDetectorTestPatch.hpp index d157bc30..aa3e3f96 100644 --- a/TestPatches/FourierPitchDetectorTestPatch.hpp +++ b/TestPatches/FourierPitchDetectorTestPatch.hpp @@ -29,11 +29,11 @@ #ifndef __FourierPitchDetectorTestPatch_hpp__ #define __FourierPitchDetectorTestPatch_hpp__ -#include "StompBox.h" +#include "Patch.h" +#include "PitchDetector.h" class FourierPitchDetectorTestPatch : public Patch { public: - BiquadFilter *filter; FourierPitchDetector fpd; FloatArray aux; int fftOccurrency; diff --git a/TestPatches/PatchParameterTestPatch.hpp b/TestPatches/PatchParameterTestPatch.hpp deleted file mode 100755 index 76fe1a7a..00000000 --- a/TestPatches/PatchParameterTestPatch.hpp +++ /dev/null @@ -1,28 +0,0 @@ -#ifndef __PatchParameterTestPatch_hpp__ -#define __PatchParameterTestPatch_hpp__ - -#include "StompBox.h" - -class PatchParameterTestPatch : public Patch { -private: - FloatParameter p1; - FloatParameter p2; - IntParameter p3; - FloatParameter p4; - FloatParameter p5; -public: - PatchParameterTestPatch(){ - p1 = getFloatParameter("float", 0.0, 1.0); - p2 = getFloatParameter("smoothfloat", 0.0, 1.0, 0.5, 0.9); - p3 = getIntParameter("stiffint", 0, 10, 0, 0, 2); - p4 = getFloatParameter("expfloat", 0.0, 10.0, 0.0, 0.0, 0.0, EXP); - p5 = getFloatParameter("logfloat", 0.0, 10.0, 0.0, 0.0, 0.0, LOG); - } - void processAudio(AudioBuffer &buffer){ - // debugMessage("p1/p2/p3", (float)p1, (float)p2, (float)p3); - // debugMessage("p2/p3/p4", (float)p2, (float)p3, (float)p4); - debugMessage("p3/p4/p5", (float)p3, (float)p4, (float)p5); - } -}; - -#endif // __PatchParameterTestPatch_hpp__ diff --git a/TestPatches/ResampleTestPatch.hpp b/TestPatches/ResampleTestPatch.hpp index 723ceeeb..e5896b64 100644 --- a/TestPatches/ResampleTestPatch.hpp +++ b/TestPatches/ResampleTestPatch.hpp @@ -29,7 +29,8 @@ #ifndef __ResampleTestPatch_hpp__ #define __ResampleTestPatch_hpp__ -#include "StompBox.h" +#include "Patch.h" +#include "Resample.h" class ResampleTestPatch : public Patch { public: diff --git a/TestPatches/SineOscillatorTestPatch.hpp b/TestPatches/SineOscillatorTestPatch.hpp index d0d98377..a96c5ce5 100644 --- a/TestPatches/SineOscillatorTestPatch.hpp +++ b/TestPatches/SineOscillatorTestPatch.hpp @@ -8,20 +8,27 @@ class SineOscillatorTestPatch : public TestPatch { TEST("ctor"); SineOscillator osc(440, 16000); CHECK_EQUAL(osc.getSampleRate(), 16000); - CHECK_EQUAL(osc.getFrequency(), 440); + CHECK_EQUAL((int)osc.getFrequency(), 440); osc = SineOscillator(32000); CHECK_EQUAL(osc.getFrequency(), 0.0f); + CHECK_EQUAL(osc.getSampleRate(), 32000); } { TEST("create"); - SineOscillator* osc = SineOscillator::create(120.0f, 32000); - CHECK_EQUAL(osc->getFrequency(), 120.0f); + SineOscillator* osc = SineOscillator::create(120, 32000); + CHECK_EQUAL(osc->getSampleRate(), 32000); + CHECK_EQUAL(osc->getFrequency(), 120); SineOscillator::destroy(osc); } { TEST("setSampleRate"); - SineOscillator* osc = SineOscillator::create(321.0f, 44100); - + SineOscillator* osc = SineOscillator::create(321, 44100); + CHECK_EQUAL(osc->getSampleRate(), 44100); + CHECK_EQUAL(osc->getFrequency(), 321); + osc->setSampleRate(48000); + CHECK_EQUAL((int)osc->getSampleRate(), 48000); + CHECK_EQUAL(osc->getFrequency(), 321); // check that frequency is the same + SineOscillator::destroy(osc); } } }; diff --git a/TestPatches/TestPatch.hpp b/TestPatches/TestPatch.hpp index cd25676c..7a5aef49 100644 --- a/TestPatches/TestPatch.hpp +++ b/TestPatches/TestPatch.hpp @@ -6,14 +6,14 @@ #define TEST(name) do{ errormessage = (char*)("Test " name " failed line"); }while(0) #define CHECK(cond) if(!(cond)){ fail("CHECK(" #cond ") fail", __LINE__); }else{ pass(); } -#define CHECK_EQUAL(a, b) if((a) != (b)){ fail("CHECK_EQUAL(" #a ", " #b ") fail", __LINE__); }else{ pass(); } -#define CHECK_CLOSE(a, b, c) if(abs((a)-(b))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } +// #define CHECK_EQUAL(a, b) if((a) != (b)){ fail("CHECK_EQUAL(" #a ", " #b ") fail", __LINE__); }else{ pass(); } +// #define CHECK_CLOSE(a, b, c) if(abs((a)-(b))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } #define CHECK_RELATIVE(a, b, c) if(abs(((a)-(b))/(a))>(c)){ fail("CHECK_RELATIVE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); } #define REQUIRE(cond) if(!(cond)){ assert_failed("REQUIRE(" #cond ") fail", "", __LINE__); }else{ pass(); } /* alternatively use templates to check different typed values */ -// #define CHECK_EQUAL(a, b) check_equal(a, b, __LINE__) -// #define CHECK_CLOSE(a, b, c) check_close(a, b, c, __LINE__) +#define CHECK_EQUAL(a, b) check_equal(a, b, __LINE__) +#define CHECK_CLOSE(a, b, c) check_close(a, b, c, __LINE__) /** Abstract base class for tests */ class TestPatch : public Patch { @@ -33,8 +33,9 @@ class TestPatch : public Patch { success = false; failed++; } - template - void check_equal(T a, T b, int line){ + // template + // void check_equal(T a, T b, int line){ + void check_equal(float a, float b, int line){ if(a != b){ debugMessage("CHECK_EQUAL", a, b); debugMessage(errormessage, line); @@ -44,8 +45,9 @@ class TestPatch : public Patch { pass(); } } - template - void check_close(T a, T b, T c, int line){ + // template + // void check_close(T a, T b, T c, int line){ + void check_close(float a, float b, float c, int line){ if(abs((a)-(b))>(c)){ debugMessage("CHECK_CLOSE", a, b, c); debugMessage(errormessage, line); diff --git a/native.mk b/native.mk index 1160f29c..8d53f584 100644 --- a/native.mk +++ b/native.mk @@ -1,5 +1,6 @@ BUILDROOT ?= . BUILD ?= $(BUILDROOT)/Build +PATCHSOURCE ?= $(BUILDROOT)/PatchSource SOURCE = $(BUILDROOT)/Source LIBSOURCE = $(BUILDROOT)/LibSource BUILDSOURCE = $(BUILD)/Source @@ -54,7 +55,7 @@ vpath %.c $(SOURCE) $(LIBSOURCE) $(BUILDSOURCE) native: $(TESTPATCHES)/PatchRun.cpp $(DEPS) $(OBJS) @$(CXX) $(CPPFLAGS) $(CXXFLAGS) $(TESTPATCHES)/PatchRun.cpp -I$(BUILD) $(OBJS) -o $(BUILD)/Test/patch - @echo Built $(PATCHNAME) native executable in $(BUILD)/Test/patch + echo Built $(PATCHNAME) native executable in $(BUILD)/Test/patch run: native @$(BUILD)/Test/patch diff --git a/sources.mk b/sources.mk index f7f7e602..0b890d3a 100644 --- a/sources.mk +++ b/sources.mk @@ -5,6 +5,7 @@ CPP_SRC += LibSource/FloatArray.cpp CPP_SRC += LibSource/ComplexFloatArray.cpp CPP_SRC += LibSource/FastFourierTransform.cpp CPP_SRC += LibSource/ShortArray.cpp +CPP_SRC += LibSource/ComplexShortArray.cpp CPP_SRC += LibSource/Envelope.cpp CPP_SRC += LibSource/VoltsPerOctave.cpp CPP_SRC += LibSource/Window.cpp From 392cce69cc34e5e6eefdd877a8b5a141c66cc599 Mon Sep 17 00:00:00 2001 From: Martin Klang Date: Thu, 18 Feb 2021 02:19:44 +0100 Subject: [PATCH 056/374] fix signdness and memcpy bug --- LibSource/BiquadFilter.h | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h index 8ba23b43..5de52d3e 100644 --- a/LibSource/BiquadFilter.h +++ b/LibSource/BiquadFilter.h @@ -174,7 +174,7 @@ class BiquadFilter : public SignalProcessor { protected: float* coefficients; // stages*5 float* state; // stages*4 for df1, stages*2 for df2 - int stages; + size_t stages; /* * The coefficients are stored in the array coefficients in the following order: * 
@@ -185,15 +185,15 @@ class BiquadFilter : public SignalProcessor {
    * and so on.  The coeffs array must contain a total of 5*stages values.   
    */
   void copyCoefficients(){
-    for(int i=1; i* create(float sr, int stages=1){
+  static MultiBiquadFilter* create(float sr, size_t stages=1){
     return new MultiBiquadFilter(sr, new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE], new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*channels], stages);
   }  
   static void destroy(MultiBiquadFilter* obj){

From a82e8e6ee796040e600ae4ad81f9ac8ea8bf653d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 18 Feb 2021 02:20:18 +0100
Subject: [PATCH 057/374] remove ComplexInt/Array and fix many issues

---
 LibSource/ComplexShortArray.cpp | 267 +++++---------------------------
 LibSource/ComplexShortArray.h   | 119 +-------------
 2 files changed, 42 insertions(+), 344 deletions(-)

diff --git a/LibSource/ComplexShortArray.cpp b/LibSource/ComplexShortArray.cpp
index 3347f4e6..b19437a3 100644
--- a/LibSource/ComplexShortArray.cpp
+++ b/LibSource/ComplexShortArray.cpp
@@ -20,13 +20,15 @@ int16_t ComplexShort::getMagnitude(){
 #endif
 }
 
-float ComplexShort::getPhase(){
-  return atan2(Q15_TO_FLOAT(im), Q15_TO_FLOAT(re));
+int16_t ComplexShort::getPhase(){
+  return FLOAT_TO_Q15(atan2(Q15_TO_FLOAT(im), Q15_TO_FLOAT(re)));
 }
 
-void ComplexShort::setPolar(int16_t magnitude, float phase){
-  re = FLOAT_TO_Q15(Q15_TO_FLOAT(magnitude)*cosf(phase) + 0.5);
-  im = FLOAT_TO_Q15(Q15_TO_FLOAT(magnitude)*sinf(phase) + 0.5);
+void ComplexShort::setPolar(int16_t magnitude, int16_t phase){
+  float fm = Q15_TO_FLOAT(magnitude);
+  float fp = Q15_TO_FLOAT(phase);
+  re = FLOAT_TO_Q15(fm*cosf(fp) + 0.5);
+  im = FLOAT_TO_Q15(fm*sinf(fp) + 0.5);
 }
 
 int16_t ComplexShortArray::mag(const int i){
@@ -85,15 +87,15 @@ void ComplexShortArray::getMagnitudeSquaredValues(ShortArray destination){
 }
 
 #if 0
-void ComplexShortArray::complexDotProduct(ComplexShortArray operand2, ComplexFloat& result){
+void ComplexShortArray::complexDotProduct(ComplexShortArray operand2, ComplexShort& result){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
 #ifdef ARM_CORTEX
-  arm_cmplx_dot_prod_f32 ( (float*)data, (float*)operand2, size, &(result.re), &(result.im) );
+  arm_cmplx_dot_prod_q15 ( (int16_t*)data, (int16_t*)operand2, size, &(result.re), &(result.im) );
 #else
-  float *pSrcA=(float*)data;
-  float *pSrcB=(float*)operand2;
-  float realResult=0;    
-  float imagResult=0;    
+  int16_t *pSrcA=(int16_t*)data;
+  int16_t *pSrcB=(int16_t*)operand2;
+  int16_t realResult=0;    
+  int16_t imagResult=0;    
   for(int n=0; nCMSIS library
 #ifdef ARM_CORTEX
-  arm_fill_q15(value, (int16_t*)data, size*2 ); //note the *2 multiplier which accounts for real and imaginary parts
+  arm_fill_q15(value, (int16_t*)data, size *2 ); //note the *2 multiplier which accounts for real and imaginary parts
 #else
   ComplexShort val;
   val.re=value;
@@ -142,243 +144,50 @@ void ComplexShortArray::setAll(int16_t value){
 #endif /* ARM_CORTEX */
 }
 
-#if 0
-void ComplexShortArray::add(ComplexShortArray operand2, ComplexShortArray destination){
-  ASSERT(operand2.size == size && destination.size >= size, "Arrays size mismatch");
-#ifdef ARM_CORTEX
-  arm_add_f32((float*)data, (float*)operand2.data, (float*)destination.data, size*2);
-#else
+void ComplexShortArray::setAll(ComplexShort value){
   for(int n=0; n= size, "Arrays size mismatch");
+
+void ComplexShortArray::add(ComplexShortArray operand2, ComplexShortArray destination){
+  //ASSERT(operand2.size == size && destination.size >= size, "Arrays size mismatch");
 #ifdef ARM_CORTEX
-  arm_sub_f32((float*)data, (float*)operand2.data, (float*)destination.data, size*2);
+  arm_add_q15((int16_t*)data, (int16_t*)operand2.data, (int16_t*)destination.data, size*2);
 #else
   for(int n=0; nCMSIS library
+void ComplexShortArray::copyFrom(ComplexShortArray operand2){
 #ifdef ARM_CORTEX
-  arm_cmplx_conj_f32( (float*)data, (float*)destination, size );  
+  arm_copy_q15((int16_t*)operand2.getData(), (int16_t*)data, size * 2);
 #else
-  float *pSrc=(float*)data;
-  float *pDst=(float *)destination;
-  for(int n=0; nCMSIS library
-#ifdef ARM_CORTEX
-  arm_cmplx_mult_real_f32 ( (float*)data, (float*)operand2, (float*)result, size );  
-#else
-  float *pSrcCmplx=(float*)data;
-  float *pSrcReal=(float*)operand2;
-  float *pCmplxDst=(float*)result;
-  for(int n=0; nmaxMag){
-      maxMag=magnitude;
-      maxInd=n;
-    }
-  }
-  return maxInd;
-}
-
-ComplexShortArray ComplexShortArray::subArray(int offset, int length){
-  ASSERT(size >= offset+length, "Array too small");
-  return ComplexShortArray(data+offset, length);
-}
-
-float ComplexShortArray::getMaxMagnitudeValue(){ //this is probably slower than getMagnitudeSquaredValues() and getMaxValue() on it
-  float maxMag=-1;
-  for(int n=0; nmag2(n);
-    if(mag>maxMag){
-      maxMag=mag;
-    }
-  }
-  maxMag=sqrtf(maxMag);
-  return maxMag;
-}
-
-void ComplexShortArray::getRealValues(ShortArray buf){
-  for(int n=0; nCMSIS library
-#ifdef ARM_CORTEX  
-  arm_scale_f32((float*)data, factor, (float*)data, size*2); //the *2 accounts for the fact that both real and imaginary parts are scaled
-#else
-  for(int n=0; n= length, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_f32((float *)data, (float *)other, length*sizeof(ComplexFloat)/sizeof(float));
-#else
-  for(int n=0; n= length, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
+  
+void ComplexShortArray::copyTo(ComplexShortArray operand2){
 #ifdef ARM_CORTEX
-  arm_copy_f32((float *)other, (float *)data, length*sizeof(ComplexFloat)/sizeof(float));  //note the *2 multiplier which accounts for real and imaginary parts
+  arm_copy_q15((int16_t*)data, (int16_t*)operand2.getData(), size * 2);
 #else
-  for(int n=0; nCMSIS library
-#ifdef ARM_CORTEX
-  arm_fill_f32(value, (float *)data, size *2 ); //note the *2 multiplier which accounts for real and imaginary parts
-#else
-  ComplexFloat val;
-  val.re=value;
-  val.im=value;
-  setAll(val);
-#endif /* ARM_CORTEX */
-}
-/*END -- methods copied and adapted from ComplexShortArray.cpp*/
-
-void ComplexShortArray::setAll(ComplexFloat value){
-  for(int n=0; n=count+offset, "Wrong size");
-  for(int n=offset; n= size, "Arrays size mismatch");
-#ifdef ARM_CORTEX
-    arm_add_q31((int32_t*)data, (int32_t*)operand2.getData(), (int32_t*)destination.getData(), size*2);
-#else
-    for(int n=0; n
Date: Thu, 18 Feb 2021 02:29:56 +0100
Subject: [PATCH 058/374] updated [[deprecated]] tags

---
 LibSource/Patch.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/LibSource/Patch.h b/LibSource/Patch.h
index dac7dcad..5a20948c 100644
--- a/LibSource/Patch.h
+++ b/LibSource/Patch.h
@@ -48,13 +48,13 @@ class Patch {
   FloatParameter getFloatParameter(const char* name, float min, float max, float defaultValue=0.0f, float lambda=0.0f, float delta=0.0, float skew=LIN);
   IntParameter getIntParameter(const char* name, int min, int max, int defaultValue=0, float lambda=0.0f, float delta=0.0, float skew=LIN);
   void registerParameter(PatchParameterId pid, const char* name);
+  [[deprecated]]
   void registerParameter(PatchParameterId pid, const char* name, const char* desc){
     registerParameter(pid, name);
   }    
   float getParameterValue(PatchParameterId pid);
   void setParameterValue(PatchParameterId pid, float value);
   bool isButtonPressed(PatchButtonId bid);
-  /** @deprecated */
   [[deprecated]]
   int getSamplesSinceButtonPressed(PatchButtonId bid);
   void setButton(PatchButtonId bid, uint16_t value, uint16_t samples=0);
@@ -64,6 +64,7 @@ class Patch {
   AudioBuffer* createMemoryBuffer(int channels, int samples);
   float getElapsedBlockTime();
   int getElapsedCycles();
+  [[deprecated]]
   virtual void encoderChanged(PatchParameterId pid, int16_t delta, uint16_t samples){};
   virtual void buttonChanged(PatchButtonId bid, uint16_t value, uint16_t samples){}
   /* virtual void parameterChanged(PatchParameterId pid, float value, int samples){} */

From b3014c9caae4cf7efa290c4dcafc54d6a37f2b80 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 18 Feb 2021 02:40:15 +0100
Subject: [PATCH 059/374] updated sources list

---
 compile.mk | 3 +--
 sources.mk | 3 ++-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/compile.mk b/compile.mk
index 2bf525c3..a7642293 100644
--- a/compile.mk
+++ b/compile.mk
@@ -103,8 +103,7 @@ include $(BUILDROOT)/sources.mk
 
 C_SRC   += $(SOURCE)/heap_5.c
 CPP_SRC += $(LIBSOURCE)/Patch.cpp
-CPP_SRC += $(LIBSOURCE)/ComplexShortArray.cpp
-CPP_SRC += $(LIBSOURCE)/ShortFastFourierTransform.cpp 
+# CPP_SRC += $(LIBSOURCE)/ShortFastFourierTransform.cpp 
 CPP_SRC += $(SOURCE)/PatchProcessor.cpp
 CPP_SRC += $(SOURCE)/main.cpp
 CPP_SRC += $(SOURCE)/operators.cpp
diff --git a/sources.mk b/sources.mk
index 0b890d3a..a9fec1d6 100644
--- a/sources.mk
+++ b/sources.mk
@@ -1,5 +1,6 @@
 C_SRC   += Source/font.c
-C_SRC   += LibSource/fastpow.c LibSource/fastlog.c
+C_SRC   += LibSource/fastpow.c
+C_SRC   += LibSource/fastlog.c
 C_SRC   += LibSource/basicmaths.c
 CPP_SRC += LibSource/FloatArray.cpp
 CPP_SRC += LibSource/ComplexFloatArray.cpp

From 74f358b3e90110c8a9efc53757aa7260f08b3bf8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 18 Feb 2021 10:03:07 +0100
Subject: [PATCH 060/374] added test

---
 TestPatches/SineOscillatorTestPatch.hpp | 23 ++++++++++++++++++++++-
 1 file changed, 22 insertions(+), 1 deletion(-)

diff --git a/TestPatches/SineOscillatorTestPatch.hpp b/TestPatches/SineOscillatorTestPatch.hpp
index a96c5ce5..213f02e5 100644
--- a/TestPatches/SineOscillatorTestPatch.hpp
+++ b/TestPatches/SineOscillatorTestPatch.hpp
@@ -30,6 +30,27 @@ class SineOscillatorTestPatch : public TestPatch {
       CHECK_EQUAL(osc->getFrequency(), 321); // check that frequency is the same
       SineOscillator::destroy(osc);      
     }
-  }
+    {
+      TEST("compareBlockAndSampleBased");
+      SineOscillator* osc1 = SineOscillator::create(480, 48000);
+      SineOscillator* osc2 = SineOscillator::create(480, 48000);
+      FloatArray s1 = FloatArray::create(1000);
+      FloatArray s2 = FloatArray::create(1000);
+      osc1->generate(s1);
+      for(size_t i=0; i<1000; ++i)
+	s2[i] = osc2->generate();
+      for(size_t i=0; i<1000; ++i)
+	CHECK_CLOSE(s1[i], s2[i], 0.00002);
+      osc1->generate(s1);
+      for(size_t i=0; i<1000; ++i)
+	s2[i] = osc2->generate();
+      for(size_t i=0; i<1000; ++i)
+	CHECK_CLOSE(s1[i], s2[i], 0.00002);
+      FloatArray::destroy(s1);      
+      FloatArray::destroy(s2);      
+      SineOscillator::destroy(osc1);      
+      SineOscillator::destroy(osc2);      
+    }
+}
 };
 

From 81adddd3cf701995b30905db4efed99bae8bd173 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 18 Feb 2021 10:03:28 +0100
Subject: [PATCH 061/374] prevent accumulating rounding error

---
 LibSource/SineOscillator.h | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h
index 7a24e381..b375b837 100644
--- a/LibSource/SineOscillator.h
+++ b/LibSource/SineOscillator.h
@@ -49,9 +49,8 @@ class SineOscillator : public Oscillator {
       output[i] = sinf(phase);
       phase += incr; // allow phase to overrun
     }
-    int rw = (int)(phase/2*M_PI);
-    if(rw > 0)
-      phase -= rw*2*M_PI;
+    while(phase >= 2*M_PI)
+      phase -= 2*M_PI;
   }
   float generate(float fm){
     float sample = sinf(phase);

From 87ba9b4f142680a7450aadcb456f8342ba992772 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 18 Feb 2021 10:20:12 +0100
Subject: [PATCH 062/374] updated create() to take sample rate

---
 LibSource/RampOscillator.h | 4 ++--
 LibSource/SineOscillator.h | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 05159927..4c16fd31 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -69,8 +69,8 @@ class RampOscillator : public Oscillator {
       phase -= 2.0f;
     return sample;
   }  
-  static RampOscillator* create(){
-    return new RampOscillator();
+  static RampOscillator* create(float sr){
+    return new RampOscillator(sr);
   }
   static RampOscillator* create(float freq, float sr){
     return new RampOscillator(freq, sr);
diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h
index b375b837..8ef36405 100644
--- a/LibSource/SineOscillator.h
+++ b/LibSource/SineOscillator.h
@@ -59,8 +59,8 @@ class SineOscillator : public Oscillator {
       phase -= 2*M_PI;
     return sample;
   }
-  static SineOscillator* create(){
-    return new SineOscillator();
+  static SineOscillator* create(float sr){
+    return new SineOscillator(sr);
   }
   static SineOscillator* create(float freq, float sr){
     return new SineOscillator(freq, sr);

From 01da40eab49f0e930e85e1a49cc7b05be22a7be1 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 18 Feb 2021 10:23:13 +0100
Subject: [PATCH 063/374] stab at templating Arrays

---
 LibSource/AbstractArray.h | 317 ++++++++++++++++++++++++++++++++++++++
 LibSource/FloatArray.cpp  |   6 -
 LibSource/FloatArray.h    |  77 +++++----
 LibSource/IntArray.h      |  15 +-
 LibSource/ShortArray.cpp  |   6 +-
 LibSource/ShortArray.h    |   7 +-
 6 files changed, 375 insertions(+), 53 deletions(-)
 create mode 100644 LibSource/AbstractArray.h

diff --git a/LibSource/AbstractArray.h b/LibSource/AbstractArray.h
new file mode 100644
index 00000000..2e785e5a
--- /dev/null
+++ b/LibSource/AbstractArray.h
@@ -0,0 +1,317 @@
+#ifndef __AbstractArray_h__
+#define __AbstractArray_h__
+
+#include 
+
+/**
+ * This class contains useful methods for manipulating arrays of int16_ts.
+ * It also provides a convenient handle to the array pointer and the size of the array.
+ * AbstractArray objects can be passed by value without copying the contents of the array.
+ */
+template
+class AbstractArray {
+protected:
+  T* data;
+  size_t size;
+public:
+  AbstractArray() : data(NULL), size(0){}
+  AbstractArray(T* data, size_t size) : data(data), size(size){}
+  virtual ~AbstractArray(){}
+  
+  size_t getSize() const{
+    return size;
+  }
+
+  size_t getSize(){
+    return size;
+  }
+
+  /**
+   * Clear the array.
+   * Set all the values in the array to 0.
+  */
+  void clear(){
+    setAll(0);
+  }
+  
+  /**
+   * Get the minimum value in the array and its index
+   * @param[out] value will be set to the minimum value after the call
+   * @param[out] index will be set to the index of the minimum value after the call
+   * 
+   */
+  void getMin(T* value, int* index);
+  
+  /**
+   * Get the maximum value in the array and its index
+   * @param[out] value will be set to the maximum value after the call
+   * @param[out] index will be set to the index of the maximum value after the call
+  */
+  void getMax(T* value, int* index);
+  
+  /**
+   * Get the minimum value in the array
+   * @return the minimum value contained in the array
+  */
+  T getMinValue();
+  
+  /**
+   * Get the maximum value in the array
+   * @return the maximum value contained in the array
+   */
+  T getMaxValue();
+  
+  /**
+   * Get the index of the minimum value in the array
+   * @return the mimimum value contained in the array
+   */
+  int getMinIndex();
+  
+  /**
+   * Get the index of the maximum value in the array
+   * @return the maximum value contained in the array
+   */
+  int getMaxIndex();
+
+  /**
+   * Absolute value of the array.
+   * Stores the absolute value of the elements in the array into destination.
+   * @param[out] destination the destination array.
+  */
+  void rectify(AbstractArray& destination);
+  
+  /**
+   * Absolute value of the array.
+   * Sets each element in the array to its absolute value.
+  */
+  void rectify(); //in place
+  
+  /**
+   * Reverse the array
+   * Copies the elements of the array in reversed order into destination.
+   * @param[out] destination the destination array.
+  */
+  void reverse(AbstractArray& destination);
+  
+  /**
+   * Reverse the array.
+   * Reverses the order of the elements in the array.
+  */
+  void reverse(); //in place
+  
+  /**
+   * Mean of the array.
+   * Gets the mean (or average) of the values in the array.
+  */
+  T getMean();
+  
+  /**
+   * Clips the elements in the array in the range [-**range**, **range**].
+   * @param range clipping value.
+  */
+  void clip(T range);
+  
+  /**
+   * Clips the elements in the array in the range [**min**, **max**].
+   * @param min minimum value
+   * @param max maximum value
+  */
+  void clip(T min, T max);
+  
+  /**
+   * Element-wise sum between arrays.
+   * Sets each element in **destination** to the sum of the corresponding element of the array and **operand2**
+   * @param[in] operand2 second operand for the sum
+   * @param[out] destination the destination array
+  */
+  void add(AbstractArray operand2, AbstractArray destination);
+  
+  /**
+   * Element-wise sum between arrays.
+   * Adds each element of **operand2** to the corresponding element in the array.
+   * @param operand2 second operand for the sum
+  */
+  void add(AbstractArray operand2); //in-place
+  
+  /**
+   * Array-scalar sum.
+   * Adds **scalar** to the values in the array.
+   * @param scalar value to be added to the array
+  */
+  void add(T scalar);
+  
+  /**
+   * Element-wise difference between arrays.
+   * Sets each element in **destination** to the difference between the corresponding element of the array and **operand2**
+   * @param[in] operand2 second operand for the subtraction
+   * @param[out] destination the destination array
+  */
+  void subtract(AbstractArray operand2, AbstractArray destination);
+  
+  
+  /**
+   * Element-wise difference between arrays.
+   * Subtracts from each element of the array the corresponding element in **operand2**.
+   * @param[in] operand2 second operand for the subtraction
+  */
+  void subtract(AbstractArray operand2); //in-place
+  
+  /**
+   * Array-scalar subtraction.
+   * Subtracts **scalar** from the values in the array.
+   * @param scalar to be subtracted from the array
+  */
+  void subtract(T scalar);
+  
+/**
+   * Element-wise multiplication between arrays.
+   * Sets each element in **destination** to the product of the corresponding element of the array and **operand2**
+   * @param[in] operand2 second operand for the product
+   * @param[out] destination the destination array
+  */
+  void multiply(AbstractArray operand2, AbstractArray destination);
+  
+   /**
+   * Element-wise multiplication between arrays.
+   * Multiplies each element in the array by the corresponding element in **operand2**.
+   * @param operand2 second operand for the sum
+  */
+  void multiply(AbstractArray operand2); //in-place
+  
+  /**
+   * Array-scalar multiplication.
+   * Multiplies the values in the array by **scalar**.
+   * @param scalar to be multiplied with the array elements
+  */
+  void multiply(T scalar);
+
+  /**
+   * Set all the values in the array.
+   * Sets all the elements of the array to **value**.
+   * @param[in] value all the elements are set to this value.
+  */
+  void setAll(T value);
+  
+  /**
+   * A subset of the array.
+   * Returns a array that points to subset of the memory used by the original array.
+   * @param[in] offset the first element of the subset.
+   * @param[in] length the number of elments in the new AbstractArray.
+   * @return the newly created AbstractArray.
+   * @remarks no memory is allocated by this method. The memory is still shared with the original array.
+   * The memory should not be de-allocated elsewhere (e.g.: by calling AbstractArray::destroy() on the original AbstractArray) 
+   * as long as the AbstractArray returned by this method is still in use.
+   * @remarks Calling AbstractArray::destroy() on a AbstractArray instance created with this method might cause an exception.
+  */
+  AbstractArray subArray(int offset, size_t length);
+  
+  /**
+   * Copies the content of the array to another array.
+   * @param[out] destination the destination array
+  */
+  void copyTo(AbstractArray destination);
+
+  /**
+   * Copies the content of an array into another array.
+   * @param[in] source the source array
+  */
+  void copyFrom(AbstractArray source);
+
+  /**
+   * Copies the content of an array into a subset of the array.
+   * Copies **samples** elements from **source** to **destinationOffset** in the current array.
+   * @param[in] source the source array
+   * @param[in] destinationOffset the offset into the destination array 
+   * @param[in] samples the number of samples to copy
+   *
+  */
+  void insert(AbstractArray source, int destinationOffset, size_t samples);
+
+  /**
+   * Copies the content of an array into a subset of the array.
+   * Copies **samples** elements starting from **sourceOffset** of **source** to **destinationOffset** in the current array.
+   * @param[in] source the source array
+   * @param[in] sourceOffset the offset into the source array
+   * @param[in] destinationOffset the offset into the destination array
+   * @param[in] samples the number of samples to copy
+  */
+  void insert(AbstractArray source, int sourceOffset, int destinationOffset, size_t samples);
+  
+  /**
+   * Copies values within an array.
+   * Copies **length** values starting from index **fromIndex** to locations starting with index **toIndex**
+   * @param[in] fromIndex the first element to copy
+   * @param[in] toIndex the destination of the first element
+   * @param[in] length the number of elements to copy
+   * @remarks this method uses *memmove()* so that the source memory and the destination memory can overlap. As a consequence it might have slow performances.
+  */
+  void move(int fromIndex, int toIndex, size_t length);
+  
+  /**
+   * Allows to index the array using array-style brackets.
+   * @param index the index of the element
+   * @return the value of the **index** element of the array
+  */
+  T& operator [](size_t index){
+    return data[index];
+  }
+  
+  /**
+   * Allows to index the array using array-style brackets.
+   * **const** version of operator[]
+  */
+  T& operator [](size_t index) const{
+    return data[index];
+  }
+  
+  /**
+   * Get a single value stored in the array.
+   * @return the value stored at index @param index
+  */
+  T getElement(int index){
+    return data[index];
+  }
+
+  /**
+   * Set a single value in the array.
+  */
+  void setElement(int index, T value){
+    data[index] = value;
+  }
+
+  /**
+   * Compares two arrays.
+   * Performs an element-wise comparison of the values contained in the arrays.
+   * @param other the array to compare against.
+   * @return **true** if the arrays have the same size and the value of each of the elements of the one 
+   * match the value of the corresponding element of the other, or **false** otherwise.
+  */
+  bool equals(const AbstractArray& other) const{
+    if(size != other.getSize())
+      return false;
+    for(size_t n=0; n
 
- FloatArray::FloatArray() :
-   data(NULL), size(0) {}
-
- FloatArray::FloatArray(float* d, size_t s) :
-   data(d), size(s) {}
-
 void FloatArray::getMin(float* value, int* index){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
 #ifdef ARM_CORTEX
diff --git a/LibSource/FloatArray.h b/LibSource/FloatArray.h
index 16fad7f0..069855e1 100644
--- a/LibSource/FloatArray.h
+++ b/LibSource/FloatArray.h
@@ -3,18 +3,29 @@
 
 #include 
 
+#define USE_TEMPLATE
+
 /**
  * This class contains useful methods for manipulating arrays of floats.
  * It also provides a convenient handle to the array pointer and the size of the array.
  * FloatArray objects can be passed by value without copying the contents of the array.
  */
+#ifdef USE_TEMPLATE
+#include "AbstractArray.h"
+class FloatArray : public AbstractArray {
+public:
+  FloatArray(){}
+  FloatArray(float* data, size_t size) :
+    AbstractArray(data, size) {}
+
+#else
 class FloatArray {
 private:
   float* data;
   size_t size;
 public:
-  FloatArray();
-  FloatArray(float* data, size_t size);
+  FloatArray(){}
+  FloatArray(float* data, size_t size) : data(data), size(size){}
 
   size_t getSize() const{
     return size;
@@ -23,6 +34,37 @@ class FloatArray {
   size_t getSize(){
     return size;
   }
+  /**
+   * Casting operator to float*
+   * @return a float* pointer to the data stored in the FloatArray
+   */
+  operator float*(){
+    return data;
+  }
+  
+  /**
+   * Get the data stored in the FloatArray.
+   * @return a float* pointer to the data stored in the FloatArray
+   */
+  float* getData(){
+    return data;
+  }
+
+  /**
+   * Get a single float stored in the FloatArray.
+   * @return the float stored at index @param index
+   */
+  float getElement(int index){
+    return data[index];
+  }
+
+  /**
+   * Set a single float in the FloatArray.
+   */
+  void setElement(int index, float value){
+    data[index] = value;
+  }
+#endif
 
   /**
    * Clear the array.
@@ -448,37 +490,6 @@ class FloatArray {
     return true;
   }
   
-  /**
-   * Casting operator to float*
-   * @return a float* pointer to the data stored in the FloatArray
-  */
-  operator float*(){
-    return data;
-  }
-  
-  /**
-   * Get the data stored in the FloatArray.
-   * @return a float* pointer to the data stored in the FloatArray
-  */
-  float* getData(){
-    return data;
-  }
-
-  /**
-   * Get a single float stored in the FloatArray.
-   * @return the float stored at index @param index
-  */
-  float getElement(int index){
-    return data[index];
-  }
-
-  /**
-   * Set a single float in the FloatArray.
-  */
-  void setElement(int index, float value){
-    data[index] = value;
-  }
-  
   /**
    * Create a linear ramp from one value to another.
    * Interpolates all samples in the FloatArray between the endpoints @param from to @param to.
diff --git a/LibSource/IntArray.h b/LibSource/IntArray.h
index 3b343699..388b3096 100644
--- a/LibSource/IntArray.h
+++ b/LibSource/IntArray.h
@@ -1,8 +1,11 @@
-class IntArray
-{
-private:
-  int32_t* data;
-  int size;
+#ifndef __IntArray_h__
+#define __IntArray_h__
+
+#include 
+#include "AbstractArray.h"
+#include "FloatArray.h"
+
+class IntArray : public AbstractArray {
 public:
   IntArray();
   IntArray(int32_t* data, int size);
@@ -160,3 +163,5 @@ class IntArray
 #endif
   }
 };
+
+#endif // __IntArray_h__
diff --git a/LibSource/ShortArray.cpp b/LibSource/ShortArray.cpp
index 65d818e8..132d2a0e 100644
--- a/LibSource/ShortArray.cpp
+++ b/LibSource/ShortArray.cpp
@@ -14,11 +14,9 @@ static int16_t saturateTo16(int64_t value){
 }
 #endif
 
-ShortArray::ShortArray() :
- data(NULL), size(0) {}
+ShortArray::ShortArray() {}
 
-ShortArray::ShortArray(int16_t* d, size_t s) :
- data(d), size(s) {}
+ShortArray::ShortArray(int16_t* d, size_t s) : AbstractArray(d, s){}
 
 void ShortArray::getMin(int16_t* value, int* index){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
diff --git a/LibSource/ShortArray.h b/LibSource/ShortArray.h
index d9746e7f..aa93e749 100644
--- a/LibSource/ShortArray.h
+++ b/LibSource/ShortArray.h
@@ -2,7 +2,7 @@
 #define __ShortArray_h__
 
 #include 
-#include "basicmaths.h"
+#include "AbstractArray.h"
 #include "FloatArray.h"
 
 /**
@@ -10,10 +10,7 @@
  * It also provides a convenient handle to the array pointer and the size of the array.
  * ShortArray objects can be passed by value without copying the contents of the array.
  */
-class ShortArray {
-private:
-  int16_t* data;
-  size_t size;
+class ShortArray : public AbstractArray {
 public:
   ShortArray();
   ShortArray(int16_t* data, size_t size);

From 0f0352c3aa3eda7373f18cddba625d9287340251 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 18 Feb 2021 10:26:52 +0100
Subject: [PATCH 064/374] removed redundant comment

---
 LibSource/AbstractArray.h | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/LibSource/AbstractArray.h b/LibSource/AbstractArray.h
index 2e785e5a..ad76a2c0 100644
--- a/LibSource/AbstractArray.h
+++ b/LibSource/AbstractArray.h
@@ -3,11 +3,6 @@
 
 #include 
 
-/**
- * This class contains useful methods for manipulating arrays of int16_ts.
- * It also provides a convenient handle to the array pointer and the size of the array.
- * AbstractArray objects can be passed by value without copying the contents of the array.
- */
 template
 class AbstractArray {
 protected:

From 382b6ecae03d7ed89aefaab38cf80c606af62b53 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 19 Feb 2021 15:10:18 +0100
Subject: [PATCH 065/374] simplified AbstractArray to remove vtable from object
 size and fixed many compilation warnings

---
 LibSource/AbstractArray.h                     | 301 +++---------------
 LibSource/ComplexFloatArray.cpp               |  34 +-
 LibSource/ComplexFloatArray.h                 | 173 +++++-----
 LibSource/ComplexFourierTransform.h           |   6 +-
 LibSource/ComplexShortArray.h                 | 161 +++++-----
 LibSource/FastFourierTransform.cpp            |   8 +-
 LibSource/FirFilter.h                         |  22 +-
 LibSource/FloatArray.h                        | 103 +++---
 LibSource/IntArray.h                          | 145 +++++----
 LibSource/PitchDetector.h                     |  17 +-
 LibSource/Resample.h                          |   8 +-
 LibSource/ShortArray.cpp                      |   4 -
 LibSource/ShortArray.h                        | 154 +++++----
 TestPatches/ComplexFloatArrayTestPatch.hpp    |   2 +-
 TestPatches/EnvelopeTestPatch.hpp             |   6 +-
 TestPatches/FirFilterPerformanceTestPatch.hpp |   2 +-
 TestPatches/FirFilterTestPatch.hpp            |   2 +-
 .../ZeroCrossingPitchDetectorTestPatch.hpp    |   2 +-
 18 files changed, 513 insertions(+), 637 deletions(-)

diff --git a/LibSource/AbstractArray.h b/LibSource/AbstractArray.h
index ad76a2c0..dc287e98 100644
--- a/LibSource/AbstractArray.h
+++ b/LibSource/AbstractArray.h
@@ -3,6 +3,11 @@
 
 #include 
 
+/**
+ * AbstractArray holds a pointer to an array and the array size, and is designed to 
+ * be passed by value. It does not define any virtual methods to prevent overheads 
+ * in its subclasses.
+ */
 template
 class AbstractArray {
 protected:
@@ -11,269 +16,39 @@ class AbstractArray {
 public:
   AbstractArray() : data(NULL), size(0){}
   AbstractArray(T* data, size_t size) : data(data), size(size){}
-  virtual ~AbstractArray(){}
+  /* virtual ~AbstractArray(){} No virtual destructor to prevent adding a vtable to the object size */
   
-  size_t getSize() const{
-    return size;
-  }
-
-  size_t getSize(){
-    return size;
-  }
-
   /**
-   * Clear the array.
-   * Set all the values in the array to 0.
+   * Get the data stored in the Array.
+   * @return a T* pointer to the data stored in the Array
   */
-  void clear(){
-    setAll(0);
+  T* getData(){
+    return data;
   }
-  
-  /**
-   * Get the minimum value in the array and its index
-   * @param[out] value will be set to the minimum value after the call
-   * @param[out] index will be set to the index of the minimum value after the call
-   * 
-   */
-  void getMin(T* value, int* index);
-  
-  /**
-   * Get the maximum value in the array and its index
-   * @param[out] value will be set to the maximum value after the call
-   * @param[out] index will be set to the index of the maximum value after the call
-  */
-  void getMax(T* value, int* index);
-  
-  /**
-   * Get the minimum value in the array
-   * @return the minimum value contained in the array
-  */
-  T getMinValue();
-  
-  /**
-   * Get the maximum value in the array
-   * @return the maximum value contained in the array
-   */
-  T getMaxValue();
-  
-  /**
-   * Get the index of the minimum value in the array
-   * @return the mimimum value contained in the array
-   */
-  int getMinIndex();
-  
-  /**
-   * Get the index of the maximum value in the array
-   * @return the maximum value contained in the array
-   */
-  int getMaxIndex();
-
-  /**
-   * Absolute value of the array.
-   * Stores the absolute value of the elements in the array into destination.
-   * @param[out] destination the destination array.
-  */
-  void rectify(AbstractArray& destination);
-  
-  /**
-   * Absolute value of the array.
-   * Sets each element in the array to its absolute value.
-  */
-  void rectify(); //in place
-  
-  /**
-   * Reverse the array
-   * Copies the elements of the array in reversed order into destination.
-   * @param[out] destination the destination array.
-  */
-  void reverse(AbstractArray& destination);
-  
-  /**
-   * Reverse the array.
-   * Reverses the order of the elements in the array.
-  */
-  void reverse(); //in place
-  
-  /**
-   * Mean of the array.
-   * Gets the mean (or average) of the values in the array.
-  */
-  T getMean();
-  
-  /**
-   * Clips the elements in the array in the range [-**range**, **range**].
-   * @param range clipping value.
-  */
-  void clip(T range);
-  
-  /**
-   * Clips the elements in the array in the range [**min**, **max**].
-   * @param min minimum value
-   * @param max maximum value
-  */
-  void clip(T min, T max);
-  
-  /**
-   * Element-wise sum between arrays.
-   * Sets each element in **destination** to the sum of the corresponding element of the array and **operand2**
-   * @param[in] operand2 second operand for the sum
-   * @param[out] destination the destination array
-  */
-  void add(AbstractArray operand2, AbstractArray destination);
-  
-  /**
-   * Element-wise sum between arrays.
-   * Adds each element of **operand2** to the corresponding element in the array.
-   * @param operand2 second operand for the sum
-  */
-  void add(AbstractArray operand2); //in-place
-  
-  /**
-   * Array-scalar sum.
-   * Adds **scalar** to the values in the array.
-   * @param scalar value to be added to the array
-  */
-  void add(T scalar);
-  
-  /**
-   * Element-wise difference between arrays.
-   * Sets each element in **destination** to the difference between the corresponding element of the array and **operand2**
-   * @param[in] operand2 second operand for the subtraction
-   * @param[out] destination the destination array
-  */
-  void subtract(AbstractArray operand2, AbstractArray destination);
-  
-  
-  /**
-   * Element-wise difference between arrays.
-   * Subtracts from each element of the array the corresponding element in **operand2**.
-   * @param[in] operand2 second operand for the subtraction
-  */
-  void subtract(AbstractArray operand2); //in-place
-  
-  /**
-   * Array-scalar subtraction.
-   * Subtracts **scalar** from the values in the array.
-   * @param scalar to be subtracted from the array
-  */
-  void subtract(T scalar);
-  
-/**
-   * Element-wise multiplication between arrays.
-   * Sets each element in **destination** to the product of the corresponding element of the array and **operand2**
-   * @param[in] operand2 second operand for the product
-   * @param[out] destination the destination array
-  */
-  void multiply(AbstractArray operand2, AbstractArray destination);
-  
-   /**
-   * Element-wise multiplication between arrays.
-   * Multiplies each element in the array by the corresponding element in **operand2**.
-   * @param operand2 second operand for the sum
-  */
-  void multiply(AbstractArray operand2); //in-place
-  
-  /**
-   * Array-scalar multiplication.
-   * Multiplies the values in the array by **scalar**.
-   * @param scalar to be multiplied with the array elements
-  */
-  void multiply(T scalar);
-
-  /**
-   * Set all the values in the array.
-   * Sets all the elements of the array to **value**.
-   * @param[in] value all the elements are set to this value.
-  */
-  void setAll(T value);
-  
-  /**
-   * A subset of the array.
-   * Returns a array that points to subset of the memory used by the original array.
-   * @param[in] offset the first element of the subset.
-   * @param[in] length the number of elments in the new AbstractArray.
-   * @return the newly created AbstractArray.
-   * @remarks no memory is allocated by this method. The memory is still shared with the original array.
-   * The memory should not be de-allocated elsewhere (e.g.: by calling AbstractArray::destroy() on the original AbstractArray) 
-   * as long as the AbstractArray returned by this method is still in use.
-   * @remarks Calling AbstractArray::destroy() on a AbstractArray instance created with this method might cause an exception.
-  */
-  AbstractArray subArray(int offset, size_t length);
-  
-  /**
-   * Copies the content of the array to another array.
-   * @param[out] destination the destination array
-  */
-  void copyTo(AbstractArray destination);
-
-  /**
-   * Copies the content of an array into another array.
-   * @param[in] source the source array
-  */
-  void copyFrom(AbstractArray source);
-
-  /**
-   * Copies the content of an array into a subset of the array.
-   * Copies **samples** elements from **source** to **destinationOffset** in the current array.
-   * @param[in] source the source array
-   * @param[in] destinationOffset the offset into the destination array 
-   * @param[in] samples the number of samples to copy
-   *
-  */
-  void insert(AbstractArray source, int destinationOffset, size_t samples);
-
-  /**
-   * Copies the content of an array into a subset of the array.
-   * Copies **samples** elements starting from **sourceOffset** of **source** to **destinationOffset** in the current array.
-   * @param[in] source the source array
-   * @param[in] sourceOffset the offset into the source array
-   * @param[in] destinationOffset the offset into the destination array
-   * @param[in] samples the number of samples to copy
-  */
-  void insert(AbstractArray source, int sourceOffset, int destinationOffset, size_t samples);
-  
-  /**
-   * Copies values within an array.
-   * Copies **length** values starting from index **fromIndex** to locations starting with index **toIndex**
-   * @param[in] fromIndex the first element to copy
-   * @param[in] toIndex the destination of the first element
-   * @param[in] length the number of elements to copy
-   * @remarks this method uses *memmove()* so that the source memory and the destination memory can overlap. As a consequence it might have slow performances.
-  */
-  void move(int fromIndex, int toIndex, size_t length);
-  
-  /**
-   * Allows to index the array using array-style brackets.
-   * @param index the index of the element
-   * @return the value of the **index** element of the array
-  */
-  T& operator [](size_t index){
-    return data[index];
+    
+  size_t getSize() const {
+    return size;
   }
-  
-  /**
-   * Allows to index the array using array-style brackets.
-   * **const** version of operator[]
-  */
-  T& operator [](size_t index) const{
-    return data[index];
+    
+  bool isEmpty() const {
+    return size == 0;
   }
-  
+
   /**
    * Get a single value stored in the array.
    * @return the value stored at index @param index
   */
-  T getElement(int index){
+  T getElement(size_t index){
     return data[index];
   }
 
   /**
    * Set a single value in the array.
   */
-  void setElement(int index, T value){
+  void setElement(size_t index, T value){
     data[index] = value;
   }
-
+    
   /**
    * Compares two arrays.
    * Performs an element-wise comparison of the values contained in the arrays.
@@ -281,31 +56,41 @@ class AbstractArray {
    * @return **true** if the arrays have the same size and the value of each of the elements of the one 
    * match the value of the corresponding element of the other, or **false** otherwise.
   */
-  bool equals(const AbstractArray& other) const{
-    if(size != other.getSize())
+  bool equals(const AbstractArray& other) const {
+    if(size != other.size)
       return false;
     for(size_t n=0; nCMSIS library
 #ifdef ARM_CORTEX
-  arm_cmplx_dot_prod_f32 ( (float*)data, (float*)operand2, size, &(result.re), &(result.im) );
+  arm_cmplx_dot_prod_f32 ( (float*)getData(), (float*)operand2.getData(), size, &(result.re), &(result.im) );
 #else
-  float *pSrcA=(float*)data;
-  float *pSrcB=(float*)operand2;
+  float *pSrcA=(float*)getData();
+  float *pSrcB=(float*)operand2.getData();
   float realResult=0;    
   float imagResult=0;    
   for(size_t n=0; n= size, "Arrays size mismatch");
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
 #ifdef ARM_CORTEX
-  arm_cmplx_mult_cmplx_f32( (float*)data, (float*)operand2, (float*)result, size );  
+  arm_cmplx_mult_cmplx_f32( (float*)getData(), (float*)operand2.getData(), (float*)result.getData(), size );  
 #else
-  float *pSrcA=(float*)data;
-  float *pSrcB=(float*)operand2;
-  float *pDst=(float*)result;
-  for(size_t n=0; n= size, "Arrays size mismatch");
 #ifdef ARM_CORTEX
-  arm_add_f32((float*)data, (float*)operand2.data, (float*)destination.data, size*2);
+  arm_add_f32((float*)getData(), (float*)operand2.getData(), (float*)destination.getData(), size*2);
 #else
   for(size_t n=0; n= size, "Arrays size mismatch");
 #ifdef ARM_CORTEX
-  arm_sub_f32((float*)data, (float*)operand2.data, (float*)destination.data, size*2);
+  arm_sub_f32((float*)data, (float*)operand2.data, (float*)destination.getData(), size*2);
 #else
   for(size_t n=0; nCMSIS library
 #ifdef ARM_CORTEX
-  arm_cmplx_conj_f32( (float*)data, (float*)destination, size );  
+  arm_cmplx_conj_f32( (float*)getData(), (float*)destination.getData(), size );  
 #else
-  float *pSrc=(float*)data;
-  float *pDst=(float *)destination;
+  float *pSrc=(float*)getData();
+  float *pDst=(float *)destination.getData();
   for(size_t n=0; nCMSIS library
 #ifdef ARM_CORTEX
-  arm_cmplx_mult_real_f32 ( (float*)data, (float*)operand2, (float*)result, size );  
+  arm_cmplx_mult_real_f32 ( (float*)getData(), (float*)operand2.getData(), (float*)result.getData(), size );  
 #else
-  float *pSrcCmplx=(float*)data;
-  float *pSrcReal=(float*)operand2;
-  float *pCmplxDst=(float*)result;
+  float *pSrcCmplx=(float*)getData();
+  float *pSrcReal=(float*)operand2.getData();
+  float *pCmplxDst=(float*)result.getData();
   for(size_t n=0; n {
+public:
+  ComplexFloatArray(){}
+  ComplexFloatArray(ComplexFloat* data, size_t size) :
+    AbstractArray(data, size) {}
+#else
 class ComplexFloatArray {
 private:
   ComplexFloat* data;
   size_t size;
 public:
   /**Constructor
-    Initializes size to 0.
+     Initializes size to 0.
   */
   ComplexFloatArray() :
     data(NULL), size(0) {}
@@ -85,7 +101,85 @@ class ComplexFloatArray {
   */
   ComplexFloatArray(ComplexFloat* array, size_t size) :
     data(array), size(size) {}
-      
+
+  
+  /**
+   * Get the data stored in the ComplexFloatArray.
+   * @return a ComplexFloat* pointer to the data stored in the ComplexFloatArray
+  */
+  ComplexFloat* getData(){
+    return data;
+  }
+  
+  size_t getSize() const{
+    return size;
+  }
+
+  
+  /**
+   * Allows to index the array using array-style brackets.
+   * @param index The index of the element
+   * @return the Value of the index element of the array
+   * Example usage:
+   * @code
+   * int size=1000;
+   * float content[size]; 
+   * ComplexFloatArray complexFloatArray(content, size);
+   * for(size_t n=0; nconst version of operator[]
+  */
+  ComplexFloat& operator [](const int i) const{
+    return data[i];
+  }
+
+  /**
+   * Casting operator to ComplexFloat*
+   * @return A ComplexFloat* pointer to the data stored in the ComplexFloatArray
+  */  
+  operator ComplexFloat*() {
+    return data;
+  }
+
+  /**
+   * Compares two arrays.
+   * Performs an element-wise comparison of the values contained in the arrays.
+   * @param other the array to compare against.
+   * @return true if the arrays have the same size and the value of each of the elements of the one 
+   * match the value of the corresponding element of the other, or false otherwise.
+  */
+  bool equals(const ComplexFloatArray other) const{
+    if(size!=other.size){
+      return false;
+    }
+    for(size_t n=0; nindex element of the array
-   * Example usage:
-   * @code
-   * int size=1000;
-   * float content[size]; 
-   * ComplexFloatArray complexFloatArray(content, size);
-   * for(size_t n=0; nconst version of operator[]
-  */
-  ComplexFloat& operator [](const int i) const{
-    return data[i];
-  }
-
-  /**
-   * Casting operator to ComplexFloat*
-   * @return A ComplexFloat* pointer to the data stored in the ComplexFloatArray
-  */  
-  operator ComplexFloat*() {
-    return data;
-  }
-  
-  /**
-   * Casting operator to float*
-   * @return A float* pointer to the data stored in the ComplexFloatArray
-  */ 
-  operator float*() {
-    return (float *)data;
-  }
-  
-  /**
-   * Get the data stored in the ComplexFloatArray.
-   * @return a ComplexFloat* pointer to the data stored in the ComplexFloatArray
-  */
-  ComplexFloat* getData(){
-    return data;
-  }
-
-  /**
-   * Compares two arrays.
-   * Performs an element-wise comparison of the values contained in the arrays.
-   * @param other the array to compare against.
-   * @return true if the arrays have the same size and the value of each of the elements of the one 
-   * match the value of the corresponding element of the other, or false otherwise.
-  */
-  bool equals(const ComplexFloatArray other) const{
-    if(size!=other.getSize()){
-      return false;
-    }
-    for(size_t n=0; n= getSize(), "Input array too small");
-    arm_cfft_f32(&instance, (float*)inout, 0, 1); //forward
+    arm_cfft_f32(&instance, (float*)inout.getData(), 0, 1); //forward
   }
   void ifft(ComplexFloatArray inout){
     ASSERT(inout.getSize() >= getSize(), "Input array too small");
-   arm_cfft_f32(&instance, (float*)inout, 1, 1); //inverse
+   arm_cfft_f32(&instance, (float*)inout.getData(), 1, 1); //inverse
   }
   int getSize(){
     return instance.fftLen;
@@ -62,7 +62,7 @@ class ComplexFourierTransform {
   }
   void ifft(ComplexFloatArray inout){
     ASSERT(inout.getSize() >= getSize(), "Input array too small");
-    kiss_fft(cfgifft, (kiss_fft_cpx*)(float*)inout, (kiss_fft_cpx*)(float*)temp.getData());
+    kiss_fft(cfgifft, (kiss_fft_cpx*)(float*)inout.getData(), (kiss_fft_cpx*)(float*)temp.getData());
     temp.scale(1.0f/getSize());
     inout.copyFrom(temp);
   }
diff --git a/LibSource/ComplexShortArray.h b/LibSource/ComplexShortArray.h
index 009811a8..82c0ce9f 100644
--- a/LibSource/ComplexShortArray.h
+++ b/LibSource/ComplexShortArray.h
@@ -57,28 +57,111 @@ struct ComplexShort {
   @param phase The new phase of the complex number
   */
   void setPolar(int16_t magnitude, int16_t phase);
+
+  bool operator==(const ComplexShort& other) const {
+    return re == other.re && im == other.im;
+  }
+  
+  bool operator!=(const ComplexShort& other) const {
+    return re != other.re || im != other.im;
+  }
 };
 
+#ifdef USE_TEMPLATE
+class ComplexShortArray : public AbstractArray {
+public:
+  ComplexShortArray(){}
+  ComplexShortArray(ComplexShort* data, size_t size) :
+    AbstractArray(data, size) {}
+#else
 class ComplexShortArray {
 private:
   ComplexShort* data;
-  unsigned int size;
+  size_t size;
 public:
   /**Constructor
-
-    Initializes size to 0.
+     Initializes size to 0.
   */
   ComplexShortArray() :
     data(NULL), size(0) {}
   
   /**
-    Constructor.
-      
+    Constructor.      
     @param array A pointer to an array of ComplexShort
     @param size The length of the rray
   */
-  ComplexShortArray(ComplexShort* array, unsigned int size) :
+  ComplexShortArray(ComplexShort* array, size_t size) :
     data(array), size(size) {}
+
+  
+  /**
+   * Get the data stored in the ComplexShortArray.
+   * @return a ComplexShort* pointer to the data stored in the ComplexShortArray
+  */
+  ComplexShort* getData(){
+    return data;
+  }
+  
+  size_t getSize() const{
+    return size;
+  }
+
+  
+  /**
+   * Allows to index the array using array-style brackets.
+   * @param index The index of the element
+   * @return the Value of the index element of the array
+   * Example usage:
+   * @code
+   * int size=1000;
+   * float content[size]; 
+   * ComplexShortArray complexShortArray(content, size);
+   * for(size_t n=0; nconst version of operator[]
+  */
+  ComplexShort& operator [](const int i) const{
+    return data[i];
+  }
+
+  /**
+   * Casting operator to ComplexShort*
+   * @return A ComplexShort* pointer to the data stored in the ComplexShortArray
+  */  
+  operator ComplexShort*() {
+    return data;
+  }
+
+  /**
+   * Compares two arrays.
+   * Performs an element-wise comparison of the values contained in the arrays.
+   * @param other the array to compare against.
+   * @return true if the arrays have the same size and the value of each of the elements of the one 
+   * match the value of the corresponding element of the other, or false otherwise.
+  */
+  bool equals(const ComplexShortArray other) const{
+    if(size!=other.size){
+      return false;
+    }
+    for(size_t n=0; nindex element of the array
-   * Example usage:
-   * @code
-   * int size=1000;
-   * int16_t content[size]; 
-   * ComplexShortArray complexShortArray(content, size);
-   * for(int n=0; nconst version of operator[]
-  */
-  ComplexShort& operator [](const int i) const{
-    return data[i];
-  }
-
-  /*
-   * Casting operator to ComplexShort*
-   * @return A ComplexShort* pointer to the data stored in the ComplexShortArray
-  */  
-  operator ComplexShort*() {
-    return data;
-  }
-  /**
-   * Get the data stored in the ComplexShortArray.
-   * @return a ComplexShort* pointer to the data stored in the ComplexShortArray
-  */
-  ComplexShort* getData(){
-    return data;
-  }
-
-  /**
-   * Compares two arrays.
-   * Performs an element-wise comparison of the values contained in the arrays.
-   * @param other the array to compare against.
-   * @return true if the arrays have the same size and the value of each of the elements of the one 
-   * match the value of the corresponding element of the other, or false otherwise.
-  */
-  bool equals(const ComplexShortArray other) const{
-    if(size!=other.getSize()){
-      return false;
-    }
-    for(int n=0; n= getSize(), "Input array too small");
   ASSERT(out.getSize() >= getSize()/2, "Output array too small");
-  arm_rfft_fast_f32(&instance, (float*)in, (float*)out, 0);
+  arm_rfft_fast_f32(&instance, (float*)in.getData(), (float*)out.getData(), 0);
 }
 
 void FastFourierTransform::ifft(ComplexFloatArray in, FloatArray out){
   ASSERT(in.getSize() >= getSize()/2, "Input array too small");
   ASSERT(out.getSize() >= getSize(), "Output array too small");
-  arm_rfft_fast_f32(&instance, (float*)in, (float*)out, 1);
+  arm_rfft_fast_f32(&instance, (float*)in.getData(), (float*)out.getData(), 1);
 }
 
 size_t FastFourierTransform::getSize(){
@@ -62,13 +62,13 @@ void FastFourierTransform::fft(FloatArray input, ComplexFloatArray output){
     temp[n].re=input[n];
     temp[n].im=0;
   }
-  kiss_fft(cfgfft, (kiss_fft_cpx*)(float*)temp.getData(), (kiss_fft_cpx*)(float*)output);
+  kiss_fft(cfgfft, (kiss_fft_cpx*)(float*)temp.getData(), (kiss_fft_cpx*)(float*)output.getData());
 }
   
 void FastFourierTransform::ifft(ComplexFloatArray input, FloatArray output){
   ASSERT(input.getSize() >= getSize(), "Input array too small");
   ASSERT(output.getSize() >= getSize(), "Output array too small");
-  kiss_fft(cfgifft, (kiss_fft_cpx*)(float*)input, (kiss_fft_cpx*)(float*)temp.getData());
+  kiss_fft(cfgifft, (kiss_fft_cpx*)(float*)input.getData(), (kiss_fft_cpx*)(float*)temp.getData());
   float scale=1.0f/getSize();
   for(size_t n=0; n {
 public:
-  IntArray();
-  IntArray(int32_t* data, int size);
+  IntArray(){}
+  IntArray(int32_t* data, size_t size) :
+    AbstractArray(data, size) {}
 
-  int getSize() const{
+#else
+class IntArray {
+private:
+  int32_t* data;
+  size_t size;
+public:
+  IntArray() :
+    data(NULL), size(0) {}
+  IntArray(int32_t* data, size_t size) :
+    data(data), size(size) {}
+
+  size_t getSize() const{
     return size;
   }
 
-  int getSize(){
+  size_t getSize(){
     return size;
   }
 
-  void setAll(int32_t value){
-  /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  #ifdef ARM_CORTEX
-    arm_fill_q31(value, data, size);
-  #else
-    for(int n=0; n= size &&  destination.size<=size, "Arrays must be matching size");
-  /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  #ifdef ARM_CORTEX
-    arm_add_q31(data, operand2.data, destination.data, size);
-  #else
-    for(int n=0; nCMSIS library
-    add(operand2, *this);
-  } //in-place
+   * Set a single int32_t in the IntArray.
+   */
+  void setElement(int index, int32_t value){
+    data[index] = value;
+  }
   
   /**
    * Allows to index the array using array-style brackets.
@@ -73,9 +70,9 @@ class IntArray : public AbstractArray {
    * @code
    * int size=1000;
    * int32_t content[size]; 
-   * IntArray intArray(content, size);
+   * IntArray int32_tArray(content, size);
    * for(int n=0; n {
    * Allows to index the array using array-style brackets.
    * **const** version of operator[]
   */
-  int32_t& operator [](const int index) const{
+  const int32_t& operator [](const int index) const {
     return data[index];
   }
   
@@ -101,30 +98,62 @@ class IntArray : public AbstractArray {
     if(size!=other.getSize()){
       return false;
     }
-    for(int n=0; nCMSIS library
+  #ifdef ARM_CORTEX
+    arm_fill_q31(value, data, size);
+  #else
+    for(int n=0; n= size &&  destination.size<=size, "Arrays must be matching size");
+  /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
+  #ifdef ARM_CORTEX
+    arm_add_q31(data, operand2.data, destination.data, size);
+  #else
+    for(int n=0; nCMSIS library
+    add(operand2, *this);
+  } //in-place
+
   /**
    * Creates a new IntArray.
    * Allocates size*sizeof(int32_t) bytes of memory and returns a IntArray that points to it.
diff --git a/LibSource/PitchDetector.h b/LibSource/PitchDetector.h
index f48eccc1..be42c610 100644
--- a/LibSource/PitchDetector.h
+++ b/LibSource/PitchDetector.h
@@ -18,7 +18,7 @@ class FourierPitchDetector{
   ComplexFloatArray fd;
   FloatArray magnitudes;
   FloatArray timeDomain;
-  int writePointer;
+  size_t writePointer;
   Window window;
 public:
   FourierPitchDetector(){
@@ -44,7 +44,7 @@ class FourierPitchDetector{
     timeDomain=FloatArray::create(fftSize);
     window=Window::create(Window::HannWindow, fftSize);
   }
-  int getSize(){
+  size_t getSize(){
     return fft.getSize();
   }
   void setSamplingRate(float asamplingRate){
@@ -64,7 +64,7 @@ class FourierPitchDetector{
       return 1;
     }
     // otherwise keep filling the input buffer TODO: could multiply by the window while copying
-    int samplesToCopy=min(input.getSize(),timeDomain.getSize()-writePointer);
+    size_t samplesToCopy=min(input.getSize(),timeDomain.getSize()-writePointer);
     timeDomain.insert(input, 0, writePointer, samplesToCopy);
     writePointer+=samplesToCopy;
     if(writePointer==fft.getSize()){ // if it is full, reset pointer and do fft 
@@ -80,7 +80,7 @@ class FourierPitchDetector{
     ComplexFloatArray fdsub=fd.subArray((int)minBin, (int)maxBin-(int)minBin);
     FloatArray magnitudesSub=magnitudes.subArray((int)minBin, (int)maxBin-(int)minBin);
     fdsub.getMagnitudeSquaredValues(magnitudesSub);
-    int maxIndex=magnitudesSub.getMaxIndex();
+    size_t maxIndex=magnitudesSub.getMaxIndex();
     //do quadratic interpolation https://ccrma.stanford.edu/~jos/sasp/Quadratic_Interpolation_Spectral_Peaks.html
     //this single iteration method gives the following accuracy using as input a sinewave in the range 100Hz-200Hz
     //fftSize=512; max(abs(error))=15Hz well, with this fftSize, the binsize is 93.75 Hz, with a 100Hz input
@@ -112,12 +112,12 @@ class FourierPitchDetector{
 
 class ZeroCrossingPitchDetector{
 private:
-  BiquadFilter *filter;
+  float samplingRate;
   int numLowPassStages;
   int numHighPassStages;
+  BiquadFilter *filter;
   FloatArray counts;
   FloatArray filterOutput;
-  float samplingRate;
   const static int POINTS_AVERAGE = 10;
 public:
   ZeroCrossingPitchDetector(float aSamplingRate, int blocksize, int aNumLowPassStages=1, int aNumHighPassStages=1) :
@@ -152,12 +152,11 @@ class ZeroCrossingPitchDetector{
   void process(FloatArray input){
     ASSERT(input.getSize()<=filterOutput.getSize(), "wrong size");
     static float lastValue=0;
-    static int countsPointer=0;
-    static float period=0;
+    static size_t countsPointer=0;
     static float count;
     filter->process(input, filterOutput);
     // filterOutput.copyTo(input);
-    for(int n=0; n0 && lastValue<=0){
         /*
diff --git a/LibSource/Resample.h b/LibSource/Resample.h
index a7e124d4..2fd04132 100644
--- a/LibSource/Resample.h
+++ b/LibSource/Resample.h
@@ -54,7 +54,7 @@ class [[deprecated("use UpSampler and DownSampler instead.")]] Resampler {
     ASSERT(input.getSize()==output.getSize()*factor, "wrong size");
     downfilter->process(input, input);
     float* p = (float*)input;
-    for(int i=0; iprocess(output, output);
   }
@@ -136,7 +136,7 @@ class DownSampler : public SignalProcessor {
     ASSERT(input.getSize()==output.getSize()*factor, "wrong size");
     filter->process(input, input);
     float* p = (float*)input;
-    for(int i=0; iCMSIS library
 #ifdef ARM_CORTEX
diff --git a/LibSource/ShortArray.h b/LibSource/ShortArray.h
index aa93e749..f87c974a 100644
--- a/LibSource/ShortArray.h
+++ b/LibSource/ShortArray.h
@@ -2,7 +2,6 @@
 #define __ShortArray_h__
 
 #include 
-#include "AbstractArray.h"
 #include "FloatArray.h"
 
 /**
@@ -10,10 +9,23 @@
  * It also provides a convenient handle to the array pointer and the size of the array.
  * ShortArray objects can be passed by value without copying the contents of the array.
  */
+#ifdef USE_TEMPLATE
 class ShortArray : public AbstractArray {
 public:
-  ShortArray();
-  ShortArray(int16_t* data, size_t size);
+  ShortArray(){}
+  ShortArray(int16_t* data, size_t size) :
+    AbstractArray(data, size) {}
+
+#else
+class ShortArray {
+private:
+  int16_t* data;
+  size_t size;
+public:
+  ShortArray() :
+    data(NULL), size(0) {}
+  ShortArray(int16_t* data, size_t size) :
+    data(data), size(size) {}
 
   size_t getSize() const{
     return size;
@@ -23,6 +35,82 @@ class ShortArray : public AbstractArray {
     return size;
   }
 
+  /**
+   * Casting operator to int16_t*
+   * @return a int16_t* pointer to the data stored in the ShortArray
+   */
+  operator int16_t*(){
+    return data;
+  }
+
+  /**
+   * Get the data stored in the ShortArray.
+   * @return a int16_t* pointer to the data stored in the ShortArray
+   */
+  int16_t* getData(){
+    return data;
+  }
+
+  /**
+   * Get a single int16_t stored in the ShortArray.
+   * @return the int16_t stored at index @param index
+   */
+  int16_t getElement(int index){
+    return data[index];
+  }
+
+  /**
+   * Set a single int16_t in the ShortArray.
+   */
+  void setElement(int index, int16_t value){
+    data[index] = value;
+  }
+  
+  /**
+   * Allows to index the array using array-style brackets.
+   * @param index the index of the element
+   * @return the value of the **index** element of the array
+   * Example usage:
+   * @code
+   * int size=1000;
+   * int16_t content[size]; 
+   * ShortArray int16_tArray(content, size);
+   * for(int n=0; n {
   */
   void move(int fromIndex, int toIndex, size_t length);
   
-  /**
-   * Allows to index the array using array-style brackets.
-   * @param index the index of the element
-   * @return the value of the **index** element of the array
-   * Example usage:
-   * @code
-   * int size=1000;
-   * int16_t content[size]; 
-   * ShortArray int16_tArray(content, size);
-   * for(int n=0; nprocessBlock(left);
+    filter->process(left, left);
   }
 };
 
diff --git a/TestPatches/FirFilterTestPatch.hpp b/TestPatches/FirFilterTestPatch.hpp
index 4a79bab7..6d03b37f 100644
--- a/TestPatches/FirFilterTestPatch.hpp
+++ b/TestPatches/FirFilterTestPatch.hpp
@@ -21,7 +21,7 @@ class FirFilterTestPatch : public Patch {
   void processAudio(AudioBuffer &buffer){
     FloatArray fa=buffer.getSamples(0);
     // fa.noise();
-    filter->processBlock(fa, temp);
+    filter->process(fa, temp);
     // fa.copyFrom(temp);
     // debugMessage("max value",fa.getMaxValue());
   }
diff --git a/TestPatches/ZeroCrossingPitchDetectorTestPatch.hpp b/TestPatches/ZeroCrossingPitchDetectorTestPatch.hpp
index 0e550ef5..9a120a89 100644
--- a/TestPatches/ZeroCrossingPitchDetectorTestPatch.hpp
+++ b/TestPatches/ZeroCrossingPitchDetectorTestPatch.hpp
@@ -50,7 +50,7 @@ class ZeroCrossingPitchDetectorTestPatch : public Patch {
     float frequency=zcc.getFrequency();
     float envelope=fa.getRms();
     fa.multiply(1-mix);
-    for(int n=0;n
Date: Fri, 19 Feb 2021 15:16:01 +0100
Subject: [PATCH 066/374] AbstractArray renamed SimpleArray

---
 LibSource/ComplexFloatArray.h                |  4 ++--
 LibSource/ComplexShortArray.h                |  4 ++--
 LibSource/FloatArray.h                       |  6 +++---
 LibSource/IntArray.h                         |  6 +++---
 LibSource/ShortArray.h                       |  4 ++--
 LibSource/{AbstractArray.h => SimpleArray.h} | 18 +++++++++---------
 6 files changed, 21 insertions(+), 21 deletions(-)
 rename LibSource/{AbstractArray.h => SimpleArray.h} (80%)

diff --git a/LibSource/ComplexFloatArray.h b/LibSource/ComplexFloatArray.h
index 023b362f..5a3d28da 100644
--- a/LibSource/ComplexFloatArray.h
+++ b/LibSource/ComplexFloatArray.h
@@ -77,11 +77,11 @@ struct ComplexFloat {
 };
 
 #ifdef USE_TEMPLATE
-class ComplexFloatArray : public AbstractArray {
+class ComplexFloatArray : public SimpleArray {
 public:
   ComplexFloatArray(){}
   ComplexFloatArray(ComplexFloat* data, size_t size) :
-    AbstractArray(data, size) {}
+    SimpleArray(data, size) {}
 #else
 class ComplexFloatArray {
 private:
diff --git a/LibSource/ComplexShortArray.h b/LibSource/ComplexShortArray.h
index 82c0ce9f..d084745b 100644
--- a/LibSource/ComplexShortArray.h
+++ b/LibSource/ComplexShortArray.h
@@ -68,11 +68,11 @@ struct ComplexShort {
 };
 
 #ifdef USE_TEMPLATE
-class ComplexShortArray : public AbstractArray {
+class ComplexShortArray : public SimpleArray {
 public:
   ComplexShortArray(){}
   ComplexShortArray(ComplexShort* data, size_t size) :
-    AbstractArray(data, size) {}
+    SimpleArray(data, size) {}
 #else
 class ComplexShortArray {
 private:
diff --git a/LibSource/FloatArray.h b/LibSource/FloatArray.h
index ac37489a..ab469422 100644
--- a/LibSource/FloatArray.h
+++ b/LibSource/FloatArray.h
@@ -11,12 +11,12 @@
  * FloatArray objects can be passed by value without copying the contents of the array.
  */
 #ifdef USE_TEMPLATE
-#include "AbstractArray.h"
-class FloatArray : public AbstractArray {
+#include "SimpleArray.h"
+class FloatArray : public SimpleArray {
 public:
   FloatArray(){}
   FloatArray(float* data, size_t size) :
-    AbstractArray(data, size) {}
+    SimpleArray(data, size) {}
 
 #else
 class FloatArray {
diff --git a/LibSource/IntArray.h b/LibSource/IntArray.h
index f179e486..9234d06b 100644
--- a/LibSource/IntArray.h
+++ b/LibSource/IntArray.h
@@ -2,15 +2,15 @@
 #define __IntArray_h__
 
 #include 
-#include "AbstractArray.h"
+#include "SimpleArray.h"
 #include "FloatArray.h"
 
 #ifdef USE_TEMPLATE
-class IntArray : public AbstractArray {
+class IntArray : public SimpleArray {
 public:
   IntArray(){}
   IntArray(int32_t* data, size_t size) :
-    AbstractArray(data, size) {}
+    SimpleArray(data, size) {}
 
 #else
 class IntArray {
diff --git a/LibSource/ShortArray.h b/LibSource/ShortArray.h
index f87c974a..0184198c 100644
--- a/LibSource/ShortArray.h
+++ b/LibSource/ShortArray.h
@@ -10,11 +10,11 @@
  * ShortArray objects can be passed by value without copying the contents of the array.
  */
 #ifdef USE_TEMPLATE
-class ShortArray : public AbstractArray {
+class ShortArray : public SimpleArray {
 public:
   ShortArray(){}
   ShortArray(int16_t* data, size_t size) :
-    AbstractArray(data, size) {}
+    SimpleArray(data, size) {}
 
 #else
 class ShortArray {
diff --git a/LibSource/AbstractArray.h b/LibSource/SimpleArray.h
similarity index 80%
rename from LibSource/AbstractArray.h
rename to LibSource/SimpleArray.h
index dc287e98..0d0cd059 100644
--- a/LibSource/AbstractArray.h
+++ b/LibSource/SimpleArray.h
@@ -1,22 +1,22 @@
-#ifndef __AbstractArray_h__
-#define __AbstractArray_h__
+#ifndef __SimpleArray_h__
+#define __SimpleArray_h__
 
 #include 
 
 /**
- * AbstractArray holds a pointer to an array and the array size, and is designed to 
+ * SimpleArray holds a pointer to an array and the array size, and is designed to 
  * be passed by value. It does not define any virtual methods to prevent overheads 
  * in its subclasses.
  */
 template
-class AbstractArray {
+class SimpleArray {
 protected:
   T* data;
   size_t size;
 public:
-  AbstractArray() : data(NULL), size(0){}
-  AbstractArray(T* data, size_t size) : data(data), size(size){}
-  /* virtual ~AbstractArray(){} No virtual destructor to prevent adding a vtable to the object size */
+  SimpleArray() : data(NULL), size(0){}
+  SimpleArray(T* data, size_t size) : data(data), size(size){}
+  /* virtual ~SimpleArray(){} No virtual destructor to prevent adding a vtable to the object size */
   
   /**
    * Get the data stored in the Array.
@@ -56,7 +56,7 @@ class AbstractArray {
    * @return **true** if the arrays have the same size and the value of each of the elements of the one 
    * match the value of the corresponding element of the other, or **false** otherwise.
   */
-  bool equals(const AbstractArray& other) const {
+  bool equals(const SimpleArray& other) const {
     if(size != other.size)
       return false;
     for(size_t n=0; n
Date: Fri, 19 Feb 2021 16:22:36 +0100
Subject: [PATCH 067/374] updated setCoefficients()/setState()

---
 LibSource/BiquadFilter.h | 50 +++++++++++++++++++++++++---------------
 LibSource/FirFilter.h    | 32 ++++++++++++++++++++++---
 LibSource/FloatArray.h   |  2 +-
 3 files changed, 62 insertions(+), 22 deletions(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 5de52d3e..53b861e1 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -193,9 +193,8 @@ class BiquadFilter : public SignalProcessor {
     // arm_biquad_cascade_df1_init_f32(&df1, stages, coefficients, state);
     arm_biquad_cascade_df2T_init_f32(&df2, stages, coefficients, state);
 #else
-    for(size_t n=0; n* create(float sr, size_t stages=1){
     return new MultiBiquadFilter(sr, new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE], new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*channels], stages);
   }  
-  static void destroy(MultiBiquadFilter* obj){
-    for(size_t ch=1; chfilters[ch-1].getState());
-    BiquadFilter::destroy(obj);
+  static void destroy(MultiBiquadFilter* filter){
+    delete[] filter->coefficients;
+    delete[] filter->state;
+    delete filter;
   }
   BiquadFilter* getFilter(size_t channel){
     if(channel == 0)
diff --git a/LibSource/FirFilter.h b/LibSource/FirFilter.h
index eeeee73b..fd4b9ad7 100644
--- a/LibSource/FirFilter.h
+++ b/LibSource/FirFilter.h
@@ -79,14 +79,40 @@ class FirFilter : public SignalProcessor {
   FloatArray getCoefficients(){
     return coefficients;
   };
-  
+
   /**
-    Copies coefficients value from an array.
-  */
+   * Sets coefficients to point to a different set of values
+   */
   void setCoefficients(FloatArray newCoefficients){
+    coefficients = newCoefficients;
+  }
+  
+  /**
+   * Copies coefficient values from an array.
+   */
+  void copyCoefficients(FloatArray newCoefficients){
     ASSERT(coefficients.getSize()==newCoefficients.getSize(), "wrong size");
     coefficients.copyFrom(newCoefficients);
   }
+
+  FloatArray getState(){
+    return state;
+  };
+
+  /**
+   * Sets state to point to a different set of values
+   */
+  void setState(FloatArray newState){
+    state = newState;
+  }
+  
+  /**
+   * Copies state values from an array.
+   */
+  void copyState(FloatArray newState){
+    ASSERT(state.getSize()==newState.getSize(), "wrong size");
+    state.copyFrom(newState);
+  }
   
   static FirFilter* create(size_t taps, size_t blocksize){
     FloatArray coefficients = FloatArray::create(taps);
diff --git a/LibSource/FloatArray.h b/LibSource/FloatArray.h
index ab469422..17155709 100644
--- a/LibSource/FloatArray.h
+++ b/LibSource/FloatArray.h
@@ -3,7 +3,7 @@
 
 #include 
 
-#define USE_TEMPLATE
+// #define USE_TEMPLATE
 
 /**
  * This class contains useful methods for manipulating arrays of floats.

From ec85124f67f9afa763a7d7dac6d8bfdebf79830e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 19 Feb 2021 17:28:09 +0100
Subject: [PATCH 068/374] fix some compilation errors and tested exp/log/pow on
 Lich

---
 TestPatches/EnvelopeTestPatch.hpp             |  2 --
 TestPatches/FastExpTestPatch.hpp              |  2 +-
 TestPatches/FastLogTestPatch.hpp              |  4 ++--
 TestPatches/FastPowTestPatch.hpp              |  2 +-
 TestPatches/FloatArrayTestPatch.hpp           |  2 +-
 TestPatches/FourierPitchDetectorTestPatch.hpp |  2 +-
 TestPatches/ShortArrayTestPatch.hpp           |  4 ----
 TestPatches/TestPatch.hpp                     | 15 ++++++++-------
 TestPatches/wav.h                             |  4 ++--
 9 files changed, 16 insertions(+), 21 deletions(-)

diff --git a/TestPatches/EnvelopeTestPatch.hpp b/TestPatches/EnvelopeTestPatch.hpp
index 8c3240c1..1cb9fdc3 100644
--- a/TestPatches/EnvelopeTestPatch.hpp
+++ b/TestPatches/EnvelopeTestPatch.hpp
@@ -82,8 +82,6 @@ class EnvelopeTestPatch : public Patch {
     // or:
     env.process(fa, fa);
     fa.multiply(0.2);
-    
-    static float maxValue = 0;
   }
 };
 
diff --git a/TestPatches/FastExpTestPatch.hpp b/TestPatches/FastExpTestPatch.hpp
index 909b1e95..5effbacc 100644
--- a/TestPatches/FastExpTestPatch.hpp
+++ b/TestPatches/FastExpTestPatch.hpp
@@ -19,7 +19,7 @@ class FastExpTestPatch : public TestPatch {
       int errs = 0;
       int tests = 0;
       for(int n = -90; n < 90; n++){
-        float x = rand()/(float)RAND_MAX * n;
+        float x = randf() * n;
         float approx = fast_expf(x);
         float exact = expf(x);
         float err = fabsf(approx - exact);
diff --git a/TestPatches/FastLogTestPatch.hpp b/TestPatches/FastLogTestPatch.hpp
index 0452666e..b81daf3f 100644
--- a/TestPatches/FastLogTestPatch.hpp
+++ b/TestPatches/FastLogTestPatch.hpp
@@ -11,14 +11,14 @@ class FastLogTestPatch : public TestPatch {
       TEST("FastLog");
       float maxPerc = 0;
 #ifdef ARM_CORTEX
-      float threshold = 0.00025;
+      float threshold = 0.025;
 #else
       float threshold = 0.8283; // maximum relative error accepted: 0.00025 for big tables, 0.8283 for small
 #endif      
       int errs = 0;
       int tests = 0;
       for(int n = 10; n <= 10000; n++){
-        float x = rand()/(float)RAND_MAX * n;
+        float x = randf() * n;
         float approx = fast_logf(x);
         float exact = logf(x);
         float err = fabsf(approx - exact);
diff --git a/TestPatches/FastPowTestPatch.hpp b/TestPatches/FastPowTestPatch.hpp
index e6c3c9ed..83c81788 100644
--- a/TestPatches/FastPowTestPatch.hpp
+++ b/TestPatches/FastPowTestPatch.hpp
@@ -18,7 +18,7 @@ class FastPowTestPatch : public TestPatch {
       int errs = 0;
       int tests = 0;
       for(int n = -1000; n < 1000; n++){
-        float base = rand()/(float)RAND_MAX * 10;
+        float base = randf() * 10;
         float exponent = n*10/1000.f;
         float approx = fast_powf(base, exponent);
         float exact = powf(base, exponent);
diff --git a/TestPatches/FloatArrayTestPatch.hpp b/TestPatches/FloatArrayTestPatch.hpp
index 2ca77e04..8792d0ca 100644
--- a/TestPatches/FloatArrayTestPatch.hpp
+++ b/TestPatches/FloatArrayTestPatch.hpp
@@ -15,7 +15,7 @@
 class FloatArrayTestPatch : public TestPatch {
 public:
   FloatArrayTestPatch(){
-    size_t size=101;
+    size_t size=606;
     float data[size];
     float backupData[size];
     for(size_t n=0; n 0){
             int32_t v = (int32_t)value << shiftValue;
-            if(v < SHRT_MIN)
-              v = SHRT_MIN;
-            else if (v > SHRT_MAX)
-              v = SHRT_MAX;
             value = (int16_t)v;
           } else {
             value = value >> -shiftValue;
diff --git a/TestPatches/TestPatch.hpp b/TestPatches/TestPatch.hpp
index 7a5aef49..a8837ff0 100644
--- a/TestPatches/TestPatch.hpp
+++ b/TestPatches/TestPatch.hpp
@@ -33,28 +33,28 @@ class TestPatch : public Patch {
     success = false;
     failed++;
   }
-  // template
-  // void check_equal(T a, T b, int line){
-  void check_equal(float a, float b, int line){
+  bool check_equal(float a, float b, int line){
     if(a != b){
       debugMessage("CHECK_EQUAL", a, b);
       debugMessage(errormessage, line);
       success = false;
       failed++;
+      return false;
     }else{
       pass();
+      return true;
     }
   }
-  // template
-  // void check_close(T a, T b, T c, int line){
-  void check_close(float a, float b, float c, int line){
+  bool check_close(float a, float b, float c, int line){
     if(abs((a)-(b))>(c)){
       debugMessage("CHECK_CLOSE", a, b, c);
       debugMessage(errormessage, line);
       success = false;
       failed++;
+      return false;
     }else{
       pass();
+      return true;
     }
   }
   TestPatch(): success(true), passed(0), failed(0), errormessage((char*)DEFAULT_MESSAGE){
@@ -74,7 +74,8 @@ class TestPatch : public Patch {
       for(int n=0; nchunk_id, "RIFF", 4) ||
         strncmp(header->format, "WAVE", 4))
@@ -59,7 +59,7 @@ void wavwrite(WavHeader *header, const char *file_name, int16_t *samples)
         errx(1, "Samples buffer not specified");
     if ((fd = creat(file_name, 0666)) < 1)
         errx(1, "Error creating file");
-    if (write(fd, header, sizeof(WavHeader)) < sizeof(WavHeader))
+    if (write(fd, header, sizeof(WavHeader)) < (int)sizeof(WavHeader))
         errx(1, "Error writing header");
     if (write(fd, samples, header->datachunk_size) < header->datachunk_size)
         errx(1, "Error writing samples");

From 2b77b3ada74abfd6e0507233be2715b83bd5501d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 19 Feb 2021 17:36:30 +0100
Subject: [PATCH 069/374] quieter tests

---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 4d27df1c..e0d3b646 100644
--- a/Makefile
+++ b/Makefile
@@ -189,8 +189,8 @@ run: $(DEPS) ## run patch locally
 	@$(MAKE) -s -f native.mk run
 
 check:
-	for nm in $(TESTS) ; do \
-		$(MAKE) TEST=$$nm test || exit;\
+	@for nm in $(TESTS) ; do \
+		$(MAKE) -s TEST=$$nm test || exit;\
 	done
 
 help: ## show this help

From 5f20f2555ef03ba06523dfea6a1f7a488329a90b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 19 Feb 2021 17:37:20 +0100
Subject: [PATCH 070/374] added copy/insert/move methods to SimpleArray and
 fixed some compilation warnings

---
 LibSource/ComplexShortArray.cpp |  16 ++--
 LibSource/FirFilter.h           |   8 +-
 LibSource/FloatArray.cpp        |  15 ++++
 LibSource/FloatArray.h          | 147 ++++++++++++++++++--------------
 LibSource/IntArray.h            |  23 +++--
 LibSource/ShortArray.cpp        |  22 ++---
 LibSource/SimpleArray.h         |  58 +++++++++++++
 7 files changed, 184 insertions(+), 105 deletions(-)

diff --git a/LibSource/ComplexShortArray.cpp b/LibSource/ComplexShortArray.cpp
index b19437a3..a6a0f3a3 100644
--- a/LibSource/ComplexShortArray.cpp
+++ b/LibSource/ComplexShortArray.cpp
@@ -49,7 +49,7 @@ void ComplexShortArray::getMagnitudeValues(ShortArray destination){
   // function above returns 2.14, so we shift it back to 1.15
   destination.shift(1);
 #else
-  for(int i=0; i= size, "Array too small");
+  arm_copy_f32(data, destination.data, size);
+}
+
+void FloatArray::copyFrom(FloatArray source){
+  ASSERT(source.size >= size, "Array too small");
+  arm_copy_f32(source.data, data, size);
+}
+#endif
+
+#ifndef USE_TEMPLATE
+
 void FloatArray::copyTo(FloatArray destination){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
   copyTo(destination, min(size, destination.getSize()));
@@ -267,6 +281,7 @@ void FloatArray::move(int fromIndex, int toIndex, size_t samples){
   ASSERT(size >= toIndex+samples, "Array too small");
   memmove(data+toIndex, data+fromIndex, samples*sizeof(float)); //TODO: evaluate if it is appropriate to use arm_copy_f32 for this method
 }
+#endif
 
 void FloatArray::setAll(float value){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
diff --git a/LibSource/FloatArray.h b/LibSource/FloatArray.h
index 17155709..0a042261 100644
--- a/LibSource/FloatArray.h
+++ b/LibSource/FloatArray.h
@@ -3,7 +3,7 @@
 
 #include 
 
-// #define USE_TEMPLATE
+#define USE_TEMPLATE
 
 /**
  * This class contains useful methods for manipulating arrays of floats.
@@ -18,6 +18,22 @@ class FloatArray : public SimpleArray {
   FloatArray(float* data, size_t size) :
     SimpleArray(data, size) {}
 
+#ifdef ARM_CORTEX // shadow methods with optimised implementations
+  /**
+   * Copies the content of the array to another array.
+   * @param[out] destination the destination array
+   * @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
+  */
+  void copyTo(FloatArray destination);
+
+  /**
+   * Copies the content of an array into another array.
+   * @param[in] source the source array
+   * @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
+  */
+  void copyFrom(FloatArray source);
+#endif
+
 #else
 class FloatArray {
 private:
@@ -109,8 +125,72 @@ class FloatArray {
     }
     return true;
   }
+  
+  /**
+   * Copies the content of the array to another array.
+   * @param[out] destination the destination array
+  */
+  void copyTo(FloatArray destination);
+
+  /**
+   * Copies the content of the array to a location in memory.
+   * @param[out] destination a pointer to the beginning of the memory location to copy to.
+   * The **length***sizeof(float) bytes of memory starting at this location must have been allocated before calling this method.
+   * @param[in] length number of samples to copy
+  */
+  void copyTo(float* destination, size_t length);
+
+  /**
+   * Copies the content of an array into another array.
+   * @param[in] source the source array
+  */
+  void copyFrom(FloatArray source);
+  
+  /**
+   * Copies an array of float into the array.
+   * @param[in] source a pointer to the beginning of the portion of memory to read from.
+   * @param[in] length number of samples to copy.
+  */
+  void copyFrom(float* source, size_t length);
+  
+  /**
+   * Copies the content of an array into a subset of the array.
+   * Copies **samples** elements from **source** to **destinationOffset** in the current array.
+   * @param[in] source the source array
+   * @param[in] destinationOffset the offset into the destination array 
+   * @param[in] samples the number of samples to copy
+   *
+  */
+  void insert(FloatArray source, int destinationOffset, size_t samples);
+
+  /**
+   * Copies the content of an array into a subset of the array.
+   * Copies **samples** elements starting from **sourceOffset** of **source** to **destinationOffset** in the current array.
+   * @param[in] source the source array
+   * @param[in] sourceOffset the offset into the source array
+   * @param[in] destinationOffset the offset into the destination array
+   * @param[in] samples the number of samples to copy
+  */
+  void insert(FloatArray source, int sourceOffset, int destinationOffset, size_t samples);
+  
+  /**
+   * Copies values within an array.
+   * Copies **length** values starting from index **fromIndex** to locations starting with index **toIndex**
+   * @param[in] fromIndex the first element to copy
+   * @param[in] toIndex the destination of the first element
+   * @param[in] length the number of elements to copy
+   * @remarks this method uses *memmove()* so that the source memory and the destination memory can overlap. As a consequence it might have slow performances.
+  */
+  void move(int fromIndex, int toIndex, size_t length);  
 #endif
 
+  /**
+   * Set all the values in the array.
+   * Sets all the elements of the array to **value**.
+   * @param[in] value all the elements are set to this value.
+  */
+  void setAll(float value);
+
   /**
    * Clear the array.
    * Set all the values in the array to 0.
@@ -413,13 +493,6 @@ class FloatArray {
    * -6dB = 0.5, 0dB = 1.0, +6dB = 2.0
    */  
   void decibelToGain(FloatArray destination);
-
-  /**
-   * Set all the values in the array.
-   * Sets all the elements of the array to **value**.
-   * @param[in] value all the elements are set to this value.
-  */
-  void setAll(float value);
   
   /**
    * A subset of the array.
@@ -433,64 +506,6 @@ class FloatArray {
    * @remarks Calling FloatArray::destroy() on a FloatArray instance created with this method might cause an exception.
   */
   FloatArray subArray(int offset, size_t length);
-  
-  /**
-   * Copies the content of the array to another array.
-   * @param[out] destination the destination array
-  */
-  void copyTo(FloatArray destination);
-
-  /**
-   * Copies the content of the array to a location in memory.
-   * @param[out] destination a pointer to the beginning of the memory location to copy to.
-   * The **length***sizeof(float) bytes of memory starting at this location must have been allocated before calling this method.
-   * @param[in] length number of samples to copy
-  */
-  void copyTo(float* destination, size_t length);
-
-  /**
-   * Copies the content of an array into another array.
-   * @param[in] source the source array
-  */
-  void copyFrom(FloatArray source);
-  
-  /**
-   * Copies an array of float into the array.
-   * @param[in] source a pointer to the beginning of the portion of memory to read from.
-   * @param[in] length number of samples to copy.
-  */
-  void copyFrom(float* source, size_t length);
-  
-  /**
-   * Copies the content of an array into a subset of the array.
-   * Copies **samples** elements from **source** to **destinationOffset** in the current array.
-   * @param[in] source the source array
-   * @param[in] destinationOffset the offset into the destination array 
-   * @param[in] samples the number of samples to copy
-   *
-  */
-  void insert(FloatArray source, int destinationOffset, size_t samples);
-
-  /**
-   * Copies the content of an array into a subset of the array.
-   * Copies **samples** elements starting from **sourceOffset** of **source** to **destinationOffset** in the current array.
-   * @param[in] source the source array
-   * @param[in] sourceOffset the offset into the source array
-   * @param[in] destinationOffset the offset into the destination array
-   * @param[in] samples the number of samples to copy
-  */
-  void insert(FloatArray source, int sourceOffset, int destinationOffset, size_t samples);
-  
-  /**
-   * Copies values within an array.
-   * Copies **length** values starting from index **fromIndex** to locations starting with index **toIndex**
-   * @param[in] fromIndex the first element to copy
-   * @param[in] toIndex the destination of the first element
-   * @param[in] length the number of elements to copy
-   * @remarks this method uses *memmove()* so that the source memory and the destination memory can overlap. As a consequence it might have slow performances.
-  */
-  void move(int fromIndex, int toIndex, size_t length);
-  
   /**
    * Create a linear ramp from one value to another.
    * Interpolates all samples in the FloatArray between the endpoints @param from to @param to.
diff --git a/LibSource/IntArray.h b/LibSource/IntArray.h
index 9234d06b..32a1d649 100644
--- a/LibSource/IntArray.h
+++ b/LibSource/IntArray.h
@@ -66,14 +66,6 @@ class IntArray {
    * Allows to index the array using array-style brackets.
    * @param index the index of the element
    * @return the value of the **index** element of the array
-   * Example usage:
-   * @code
-   * int size=1000;
-   * int32_t content[size]; 
-   * IntArray int32_tArray(content, size);
-   * for(int n=0; n= 0){
+      for(size_t n=0; n> shiftValue;
+    }
 #endif
   }
 };
diff --git a/LibSource/ShortArray.cpp b/LibSource/ShortArray.cpp
index 5eb71fea..a68da9d3 100644
--- a/LibSource/ShortArray.cpp
+++ b/LibSource/ShortArray.cpp
@@ -583,20 +583,14 @@ void ShortArray::shift(int shiftValue){
 #ifdef ARM_CORTEX
     arm_shift_q15(data, shiftValue, data, size);
 #else
-    for(size_t n = 0; n < getSize(); ++n){
-      int16_t value = data[n];
-      if(shiftValue > 0){
-        int32_t v = (int32_t)value << shiftValue;
-        if(v < SHRT_MIN)
-          v = SHRT_MIN;
-        else if (v > SHRT_MAX)
-          v = SHRT_MAX;
-        value = (int16_t)v;
-      } else {
-        value = value >> -shiftValue;
-      }
-      data[n] = value;
-    } 
+    if(shiftValue >= 0){
+      for(size_t n=0; n> shiftValue;
+    }
 #endif
   }
 
diff --git a/LibSource/SimpleArray.h b/LibSource/SimpleArray.h
index 0d0cd059..95bb6783 100644
--- a/LibSource/SimpleArray.h
+++ b/LibSource/SimpleArray.h
@@ -2,6 +2,8 @@
 #define __SimpleArray_h__
 
 #include 
+#include  /* for memcpy and memmov */
+#include "message.h"
 
 /**
  * SimpleArray holds a pointer to an array and the array size, and is designed to 
@@ -65,6 +67,62 @@ class SimpleArray {
     }
     return true;
   }
+  
+  /**
+   * Copies the content of the array to another array.
+   * @param[out] destination the destination array
+   */
+  void copyTo(SimpleArray destination){
+    ASSERT(destination.size >= size, "Array too small");
+    memcpy((void*)destination.data, (void*)data, size*sizeof(T));
+  }
+
+  /**
+   * Copies the content of an array into another array.
+   * @param[in] source the source array
+   */
+  void copyFrom(SimpleArray source){
+    ASSERT(source.size >= size, "Array too small");
+    memcpy((void*)data, (void*)source.data, size*sizeof(T));
+  }
+
+  /**
+   * Copies the content of an array into a subset of the array.
+   * Copies **len** elements from **source** to **destinationOffset** in the current array.
+   * @param[in] source the source array
+   * @param[in] destinationOffset the offset into the destination array 
+   * @param[in] len the number of samples to copy
+   *
+  */
+  void insert(SimpleArray source, int destinationOffset, size_t len){
+    insert(source, 0, destinationOffset, len);
+  }
+
+  /**
+   * Copies the content of an array into a subset of the array.
+   * Copies **samples** elements starting from **sourceOffset** of **source** to **destinationOffset** in the current array.
+   * @param[in] source the source array
+   * @param[in] sourceOffset the offset into the source array
+   * @param[in] destinationOffset the offset into the destination array
+   * @param[in] samples the number of samples to copy
+  */
+  void insert(SimpleArray source, int sourceOffset, int destinationOffset, size_t len){
+    ASSERT(size >= destinationOffset+len, "Array too small");
+    ASSERT(source.size >= sourceOffset+len, "Array too small");
+    memcpy((void*)(data+destinationOffset), (void*)(source.data+sourceOffset), len*sizeof(T));
+  }
+
+  /**
+   * Copies values within an array.
+   * Copies **length** values starting from index **fromIndex** to locations starting with index **toIndex**
+   * @param[in] fromIndex the first element to copy
+   * @param[in] toIndex the destination of the first element
+   * @param[in] len the number of elements to copy
+   */
+  void move(int fromIndex, int toIndex, size_t len){
+    ASSERT(size >= toIndex+len, "Array too small");
+    memmove((void*)(data+toIndex), (void*)(data+fromIndex), len*sizeof(T));
+  }
 
   /**
    * Casting operator to T*

From 0ae6db06d29b72f3b8416496e8757c99f592f26f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 20 Feb 2021 01:16:59 +0100
Subject: [PATCH 071/374] added setPhase()

---
 LibSource/ChirpOscillator.h       |  3 +++
 LibSource/Oscillator.h            |  5 +++++
 LibSource/PolyBlepOscillator.cpp  | 12 ++++++++++++
 LibSource/PolyBlepOscillator.h    |  3 +++
 LibSource/WavetableOscillator.cpp |  4 ++++
 LibSource/WavetableOscillator.h   |  1 +
 6 files changed, 28 insertions(+)

diff --git a/LibSource/ChirpOscillator.h b/LibSource/ChirpOscillator.h
index f8cdef04..dbc95371 100644
--- a/LibSource/ChirpOscillator.h
+++ b/LibSource/ChirpOscillator.h
@@ -44,6 +44,9 @@ class ChirpOscillator : public Oscillator {
   float getPhase(){
     return phase;
   }
+  void setPhase(float phase){
+    this->phase = phase;
+  }
   float generate(){
     float sample = sinf(phase);
     phase += incr;
diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index cbe341a3..9cd5ce10 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -33,6 +33,11 @@ class Oscillator : public SignalGenerator {
   virtual float getFrequency(float value){
     return 0.0f;
   }
+  /**
+   * Set current oscillator phase in radians
+   * @param phase a value between 0 and 2*pi
+   */
+  virtual void setPhase(float phase) = 0;
   /**
    * Get current oscillator phase in radians
    * @return a value between 0 and 2*pi
diff --git a/LibSource/PolyBlepOscillator.cpp b/LibSource/PolyBlepOscillator.cpp
index 0ef0ffc9..5420f297 100644
--- a/LibSource/PolyBlepOscillator.cpp
+++ b/LibSource/PolyBlepOscillator.cpp
@@ -37,14 +37,26 @@ void PolyBlepOscillator::setShape(float value){
   shape = value;
 }
 
+float PolyBlepOscillator::getShape(){
+  return shape;
+}
+
 void PolyBlepOscillator::setPulseWidth(float value){
   pw = value;
 }
 
+float PolyBlepOscillator::getPulseWidth(){
+  return pw;
+}
+
 float PolyBlepOscillator::getPhase(){
   return osc.getMasterPhase()*2*M_PI;
 }
 
+void PolyBlepOscillator::setPhase(float phase){
+  osc.setMasterPhase(phase/(2*M_PI));
+}
+
 float PolyBlepOscillator::generate(){
   float sample;
   osc.Render(nfreq, pw, shape, &sample, 1);
diff --git a/LibSource/PolyBlepOscillator.h b/LibSource/PolyBlepOscillator.h
index 0ad2f2cb..6fb28522 100644
--- a/LibSource/PolyBlepOscillator.h
+++ b/LibSource/PolyBlepOscillator.h
@@ -19,8 +19,11 @@ class PolyBlepOscillator : public Oscillator {
   float getFrequency();
   /** set waveform shape: 0.0 for saw, 1.0 for square wave */
   void setShape(float value);
+  float getShape();
   /** set square wave pulse width: 0.0 to 1.0 for 0% to 100% */
   void setPulseWidth(float value);
+  float getPulseWidth();
+  void setPhase(float phase);
   float getPhase();
   float generate();
   float generate(float fm);
diff --git a/LibSource/WavetableOscillator.cpp b/LibSource/WavetableOscillator.cpp
index 7e86bc15..02a6361c 100644
--- a/LibSource/WavetableOscillator.cpp
+++ b/LibSource/WavetableOscillator.cpp
@@ -31,6 +31,10 @@ float WavetableOscillator::getSample(float phase){
   return wave[index];
 }
 
+void WavetableOscillator::setPhase(float phase){
+  acc = phase/(2*M_PI);
+}
+
 float WavetableOscillator::getPhase(){
   return acc*2*M_PI;
 }
diff --git a/LibSource/WavetableOscillator.h b/LibSource/WavetableOscillator.h
index 1dde423a..c1c5ca65 100644
--- a/LibSource/WavetableOscillator.h
+++ b/LibSource/WavetableOscillator.h
@@ -17,6 +17,7 @@ class WavetableOscillator : public Oscillator {
   void setFrequency(float freq);
   float getFrequency();
   float getSample(float phase);
+  void setPhase(float phase);
   float getPhase();
   float generate();
   float generate(float fm);

From adf1f58a8579a7eda4540fbd442fbfe36dc578f2 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 20 Feb 2021 01:17:11 +0100
Subject: [PATCH 072/374] access phase

---
 Libraries/polyblep/dsp/oscillator.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Libraries/polyblep/dsp/oscillator.h b/Libraries/polyblep/dsp/oscillator.h
index ee148d65..2b594dfe 100755
--- a/Libraries/polyblep/dsp/oscillator.h
+++ b/Libraries/polyblep/dsp/oscillator.h
@@ -125,6 +125,10 @@ class Oscillator {
     return master_phase_;
   }
 
+  void setMasterPhase(float value){
+    master_phase_ = value;
+  }
+
   template
   void Render(
       float* frequency,

From 2fcbc8dbf7983b1f92ed29a9e6c771945de9f8f4 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 20 Feb 2021 01:17:41 +0100
Subject: [PATCH 073/374] ensure failing tests kick out

---
 TestPatches/FastLogTestPatch.hpp |  2 +-
 TestPatches/TestPatch.hpp        | 16 ++++++++--------
 2 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/TestPatches/FastLogTestPatch.hpp b/TestPatches/FastLogTestPatch.hpp
index b81daf3f..eb60fadb 100644
--- a/TestPatches/FastLogTestPatch.hpp
+++ b/TestPatches/FastLogTestPatch.hpp
@@ -13,7 +13,7 @@ class FastLogTestPatch : public TestPatch {
 #ifdef ARM_CORTEX
       float threshold = 0.025;
 #else
-      float threshold = 0.8283; // maximum relative error accepted: 0.00025 for big tables, 0.8283 for small
+      float threshold = 0.8283; // maximum relative error accepted: 0.025 for big tables, 0.8283 for small
 #endif      
       int errs = 0;
       int tests = 0;
diff --git a/TestPatches/TestPatch.hpp b/TestPatches/TestPatch.hpp
index a8837ff0..cd8edc99 100644
--- a/TestPatches/TestPatch.hpp
+++ b/TestPatches/TestPatch.hpp
@@ -63,19 +63,19 @@ class TestPatch : public Patch {
   void processAudio(AudioBuffer &buffer){
     FloatArray sig = buffer.getSamples(LEFT_CHANNEL);
     if(success){
-      static float phase=0;
-      float inc=2*M_PI/200.0f;
+      static float phase = 0;
+      float inc = 2*M_PI/200.0f;
       for(int n=0; n2*M_PI ? phase-2*M_PI : phase;
+        sig[n] = 0.4*sinf(phase);
+        phase += inc;
+        phase = phase>2*M_PI ? phase-2*M_PI : phase;
       }
     }else{
       for(int n=0; n
Date: Sat, 20 Feb 2021 01:28:25 +0100
Subject: [PATCH 074/374] reverted random number generation

---
 TestPatches/FastLogTestPatch.hpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/TestPatches/FastLogTestPatch.hpp b/TestPatches/FastLogTestPatch.hpp
index eb60fadb..e5c0634d 100644
--- a/TestPatches/FastLogTestPatch.hpp
+++ b/TestPatches/FastLogTestPatch.hpp
@@ -18,12 +18,14 @@ class FastLogTestPatch : public TestPatch {
       int errs = 0;
       int tests = 0;
       for(int n = 10; n <= 10000; n++){
-        float x = randf() * n;
+        float x = rand()/(float)RAND_MAX * n;
+	// float x = randf() * n;
         float approx = fast_logf(x);
         float exact = logf(x);
         float err = fabsf(approx - exact);
         float perc = err/exact * 100;
 	CHECK(perc x ? maxPerc : x;
         maxPerc = maxPerc > perc ? maxPerc : perc;
         if(fabsf(perc) > threshold)
 	  errs++;

From cb85b29a7a59131043bd5ae2c529334179dcbed2 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 21 Feb 2021 03:14:07 +0100
Subject: [PATCH 075/374] removed unused comment

---
 TestPatches/FastLogTestPatch.hpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/TestPatches/FastLogTestPatch.hpp b/TestPatches/FastLogTestPatch.hpp
index e5c0634d..0be1d401 100644
--- a/TestPatches/FastLogTestPatch.hpp
+++ b/TestPatches/FastLogTestPatch.hpp
@@ -25,7 +25,6 @@ class FastLogTestPatch : public TestPatch {
         float err = fabsf(approx - exact);
         float perc = err/exact * 100;
 	CHECK(perc x ? maxPerc : x;
         maxPerc = maxPerc > perc ? maxPerc : perc;
         if(fabsf(perc) > threshold)
 	  errs++;

From 274f175243c003c643325ab98ea674533c40a19f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 21 Feb 2021 03:17:31 +0100
Subject: [PATCH 076/374] include all .c and .cpp files in patch source
 directory when compiling native binary

---
 native.mk | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/native.mk b/native.mk
index 1160f29c..77ce4126 100644
--- a/native.mk
+++ b/native.mk
@@ -40,6 +40,11 @@ include $(BUILDROOT)/sources.mk
 C_SRC   += Libraries/KissFFT/kiss_fft.c
 C_SRC   += $(wildcard $(BUILDSOURCE)/*.c)
 CPP_SRC += $(wildcard $(BUILDSOURCE)/*.cpp)
+C_SRC   += $(wildcard $(PATCHSOURCE)/*.c)
+CPP_SRC += $(wildcard $(PATCHSOURCE)/*.cpp)
+ifdef MAXIMILIAN
+CPP_SRC := $(filter-out $(PATCHSOURCE)/$(MAXIMILIAN).cpp, $(CPP_SRC))
+endif
 
 # Set up search path
 OBJS = $(addprefix $(BUILD)/Test/,$(notdir $(C_SRC:.c=.o)))

From f01fb383a841532b7ee15b17304e57c160d76abd Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 21 Feb 2021 17:39:52 +0100
Subject: [PATCH 077/374] added sizeof tests to array types

---
 TestPatches/ComplexShortArrayTestPatch.hpp |  4 ++++
 TestPatches/FloatArrayTestPatch.hpp        | 22 +++++++++++++++-------
 TestPatches/ShortArrayTestPatch.hpp        |  4 ++++
 3 files changed, 23 insertions(+), 7 deletions(-)

diff --git a/TestPatches/ComplexShortArrayTestPatch.hpp b/TestPatches/ComplexShortArrayTestPatch.hpp
index aec0757d..9b10357b 100644
--- a/TestPatches/ComplexShortArrayTestPatch.hpp
+++ b/TestPatches/ComplexShortArrayTestPatch.hpp
@@ -5,6 +5,10 @@
 class ComplexShortArrayTestPatch : public TestPatch {
 public:
   ComplexShortArrayTestPatch(){
+    {
+      TEST("sizeof");
+      CHECK(sizeof(ComplexShortArray) == sizeof(ComplexShort*)+sizeof(size_t));
+    }
     {
       TEST("Default ctor");
       ComplexShortArray empty;
diff --git a/TestPatches/FloatArrayTestPatch.hpp b/TestPatches/FloatArrayTestPatch.hpp
index 8792d0ca..130c413a 100644
--- a/TestPatches/FloatArrayTestPatch.hpp
+++ b/TestPatches/FloatArrayTestPatch.hpp
@@ -5,8 +5,8 @@
 
 /*
  * Status: The first few tests have been converted to the new TestPatch format.
- *         Most of the tests still need to be converted to use e.g. CHECK_EQUAL() 
- *         and CHECK_CLOSE() as defined in TestPatch.hpp
+ *         Most of the tests still need to be converted to use CHECK(), CHECK_EQUAL() 
+ *         or CHECK_CLOSE() as defined in TestPatch.hpp
  */
 
 #define TESTCHECK(x, y) TEST(y); CHECK(x)
@@ -20,16 +20,24 @@ class FloatArrayTestPatch : public TestPatch {
     float backupData[size];
     for(size_t n=0; n
Date: Sun, 21 Feb 2021 20:26:12 +0100
Subject: [PATCH 078/374] removed non-templated Array option

---
 LibSource/ComplexFloatArray.h |  98 ---------------------
 LibSource/ComplexShortArray.h |  90 --------------------
 LibSource/FloatArray.cpp      |  56 +-----------
 LibSource/FloatArray.h        | 155 +---------------------------------
 LibSource/IntArray.h          |  88 -------------------
 LibSource/ShortArray.h        |  96 ---------------------
 6 files changed, 2 insertions(+), 581 deletions(-)

diff --git a/LibSource/ComplexFloatArray.h b/LibSource/ComplexFloatArray.h
index 5a3d28da..7a83a2f4 100644
--- a/LibSource/ComplexFloatArray.h
+++ b/LibSource/ComplexFloatArray.h
@@ -76,109 +76,11 @@ struct ComplexFloat {
 
 };
 
-#ifdef USE_TEMPLATE
 class ComplexFloatArray : public SimpleArray {
 public:
   ComplexFloatArray(){}
   ComplexFloatArray(ComplexFloat* data, size_t size) :
     SimpleArray(data, size) {}
-#else
-class ComplexFloatArray {
-private:
-  ComplexFloat* data;
-  size_t size;
-public:
-  /**Constructor
-     Initializes size to 0.
-  */
-  ComplexFloatArray() :
-    data(NULL), size(0) {}
-  
-  /**
-    Constructor.      
-    @param array A pointer to an array of ComplexFloat
-    @param size The length of the rray
-  */
-  ComplexFloatArray(ComplexFloat* array, size_t size) :
-    data(array), size(size) {}
-
-  
-  /**
-   * Get the data stored in the ComplexFloatArray.
-   * @return a ComplexFloat* pointer to the data stored in the ComplexFloatArray
-  */
-  ComplexFloat* getData(){
-    return data;
-  }
-  
-  size_t getSize() const{
-    return size;
-  }
-
-  
-  /**
-   * Allows to index the array using array-style brackets.
-   * @param index The index of the element
-   * @return the Value of the index element of the array
-   * Example usage:
-   * @code
-   * int size=1000;
-   * float content[size]; 
-   * ComplexFloatArray complexFloatArray(content, size);
-   * for(size_t n=0; nconst version of operator[]
-  */
-  ComplexFloat& operator [](const int i) const{
-    return data[i];
-  }
-
-  /**
-   * Casting operator to ComplexFloat*
-   * @return A ComplexFloat* pointer to the data stored in the ComplexFloatArray
-  */  
-  operator ComplexFloat*() {
-    return data;
-  }
-
-  /**
-   * Compares two arrays.
-   * Performs an element-wise comparison of the values contained in the arrays.
-   * @param other the array to compare against.
-   * @return true if the arrays have the same size and the value of each of the elements of the one 
-   * match the value of the corresponding element of the other, or false otherwise.
-  */
-  bool equals(const ComplexFloatArray other) const{
-    if(size!=other.size){
-      return false;
-    }
-    for(size_t n=0; n {
 public:
   ComplexShortArray(){}
   ComplexShortArray(ComplexShort* data, size_t size) :
     SimpleArray(data, size) {}
-#else
-class ComplexShortArray {
-private:
-  ComplexShort* data;
-  size_t size;
-public:
-  /**Constructor
-     Initializes size to 0.
-  */
-  ComplexShortArray() :
-    data(NULL), size(0) {}
-  
-  /**
-    Constructor.      
-    @param array A pointer to an array of ComplexShort
-    @param size The length of the rray
-  */
-  ComplexShortArray(ComplexShort* array, size_t size) :
-    data(array), size(size) {}
-
-  
-  /**
-   * Get the data stored in the ComplexShortArray.
-   * @return a ComplexShort* pointer to the data stored in the ComplexShortArray
-  */
-  ComplexShort* getData(){
-    return data;
-  }
-  
-  size_t getSize() const{
-    return size;
-  }
-
-  
-  /**
-   * Allows to index the array using array-style brackets.
-   * @param index The index of the element
-   * @return the Value of the index element of the array
-   * Example usage:
-   * @code
-   * int size=1000;
-   * float content[size]; 
-   * ComplexShortArray complexShortArray(content, size);
-   * for(size_t n=0; nconst version of operator[]
-  */
-  ComplexShort& operator [](const int i) const{
-    return data[i];
-  }
 
-  /**
-   * Casting operator to ComplexShort*
-   * @return A ComplexShort* pointer to the data stored in the ComplexShortArray
-  */  
-  operator ComplexShort*() {
-    return data;
-  }
-
-  /**
-   * Compares two arrays.
-   * Performs an element-wise comparison of the values contained in the arrays.
-   * @param other the array to compare against.
-   * @return true if the arrays have the same size and the value of each of the elements of the one 
-   * match the value of the corresponding element of the other, or false otherwise.
-  */
-  bool equals(const ComplexShortArray other) const{
-    if(size!=other.size){
-      return false;
-    }
-    for(size_t n=0; n= size, "Array too small");
   arm_copy_f32(data, destination.data, size);
@@ -229,60 +229,6 @@ void FloatArray::copyFrom(FloatArray source){
 }
 #endif
 
-#ifndef USE_TEMPLATE
-
-void FloatArray::copyTo(FloatArray destination){
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  copyTo(destination, min(size, destination.getSize()));
-}
-
-void FloatArray::copyFrom(FloatArray source){
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  copyFrom(source, min(size, source.getSize()));
-}
-
-void FloatArray::copyTo(float* other, size_t length){
-  ASSERT(size >= length, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_f32(data, other, length);
-#else
-  memcpy((void *)other, (void *)getData(), length*sizeof(float));
-#endif /* ARM_CORTEX */
-}
-
-void FloatArray::copyFrom(float* other, size_t length){
-  ASSERT(size >= length, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_f32(other, data, length);
-#else
-  memcpy((void *)getData(), (void *)other, length*sizeof(float));
-#endif /* ARM_CORTEX */
-}
-
-void FloatArray::insert(FloatArray source, int sourceOffset, int destinationOffset, size_t samples){
-  ASSERT(size >= destinationOffset+samples, "Array too small");
-  ASSERT(source.size >= sourceOffset+samples, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_f32(source.data+sourceOffset, data+destinationOffset, samples);  
-#else
-  memcpy((void*)(getData()+destinationOffset), (void*)(source.getData()+sourceOffset), samples*sizeof(float));
-#endif /* ARM_CORTEX */
-}
-
-void FloatArray::insert(FloatArray source, int destinationOffset, size_t samples){
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  insert(source, 0, destinationOffset, samples);
-}
-
-void FloatArray::move(int fromIndex, int toIndex, size_t samples){
-  ASSERT(size >= toIndex+samples, "Array too small");
-  memmove(data+toIndex, data+fromIndex, samples*sizeof(float)); //TODO: evaluate if it is appropriate to use arm_copy_f32 for this method
-}
-#endif
-
 void FloatArray::setAll(float value){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
 #ifdef ARM_CORTEX
diff --git a/LibSource/FloatArray.h b/LibSource/FloatArray.h
index 0a042261..678e2a70 100644
--- a/LibSource/FloatArray.h
+++ b/LibSource/FloatArray.h
@@ -2,16 +2,13 @@
 #define __FloatArray_h__
 
 #include 
-
-#define USE_TEMPLATE
+#include "SimpleArray.h"
 
 /**
  * This class contains useful methods for manipulating arrays of floats.
  * It also provides a convenient handle to the array pointer and the size of the array.
  * FloatArray objects can be passed by value without copying the contents of the array.
  */
-#ifdef USE_TEMPLATE
-#include "SimpleArray.h"
 class FloatArray : public SimpleArray {
 public:
   FloatArray(){}
@@ -34,156 +31,6 @@ class FloatArray : public SimpleArray {
   void copyFrom(FloatArray source);
 #endif
 
-#else
-class FloatArray {
-private:
-  float* data;
-  size_t size;
-public:
-  FloatArray(){}
-  FloatArray(float* data, size_t size) : data(data), size(size){}
-
-  size_t getSize() const{
-    return size;
-  }
-
-  size_t getSize(){
-    return size;
-  }
-  
-  /**
-   * Get the data stored in the FloatArray.
-   * @return a float* pointer to the data stored in the FloatArray
-   */
-  float* getData(){
-    return data;
-  }
-
-  /**
-   * Get a single float stored in the FloatArray.
-   * @return the float stored at index @param index
-   */
-  float getElement(int index){
-    return data[index];
-  }
-
-  /**
-   * Set a single float in the FloatArray.
-   */
-  void setElement(int index, float value){
-    data[index] = value;
-  }
-
-  /**
-   * Casting operator to float*
-   * @return a float* pointer to the data stored in the FloatArray
-   */
-  operator float*(){
-    return data;
-  }
-  
-  /**
-   * Allows to index the array using array-style brackets.
-   * @param index the index of the element
-   * @return the value of the **index** element of the array
-   * Example usage:
-   * @code
-   * int size=1000;
-   * float content[size]; 
-   * FloatArray floatArray(content, size);
-   * for(int n=0; n {
 public:
   IntArray(){}
   IntArray(int32_t* data, size_t size) :
     SimpleArray(data, size) {}
 
-#else
-class IntArray {
-private:
-  int32_t* data;
-  size_t size;
-public:
-  IntArray() :
-    data(NULL), size(0) {}
-  IntArray(int32_t* data, size_t size) :
-    data(data), size(size) {}
-
-  size_t getSize() const{
-    return size;
-  }
-
-  size_t getSize(){
-    return size;
-  }
-
-  /**
-   * Casting operator to int32_t*
-   * @return a int32_t* pointer to the data stored in the IntArray
-   */
-  operator int32_t*(){
-    return data;
-  }
-
-  /**
-   * Get the data stored in the IntArray.
-   * @return a int32_t* pointer to the data stored in the IntArray
-   */
-  int32_t* getData(){
-    return data;
-  }
-
-  /**
-   * Get a single int32_t stored in the IntArray.
-   * @return the int32_t stored at index @param index
-   */
-  int32_t getElement(int index){
-    return data[index];
-  }
-
-  /**
-   * Set a single int32_t in the IntArray.
-   */
-  void setElement(int index, int32_t value){
-    data[index] = value;
-  }
-  
-  /**
-   * Allows to index the array using array-style brackets.
-   * @param index the index of the element
-   * @return the value of the **index** element of the array
-  */
-  int32_t& operator [](const int index){
-    return data[index];
-  }
-  
-  /**
-   * Allows to index the array using array-style brackets.
-   * **const** version of operator[]
-  */
-  const int32_t& operator [](const int index) const {
-    return data[index];
-  }
-  
-  /**
-   * Compares two arrays.
-   * Performs an element-wise comparison of the values contained in the arrays.
-   * @param other the array to compare against.
-   * @return **true** if the arrays have the same size and the value of each of the elements of the one 
-   * match the value of the corresponding element of the other, or **false** otherwise.
-  */
-  bool equals(const IntArray& other) const{
-    if(size!=other.getSize()){
-      return false;
-    }
-    for(size_t n=0; nCMSIS library
   #ifdef ARM_CORTEX
diff --git a/LibSource/ShortArray.h b/LibSource/ShortArray.h
index 0184198c..17b91a21 100644
--- a/LibSource/ShortArray.h
+++ b/LibSource/ShortArray.h
@@ -9,108 +9,12 @@
  * It also provides a convenient handle to the array pointer and the size of the array.
  * ShortArray objects can be passed by value without copying the contents of the array.
  */
-#ifdef USE_TEMPLATE
 class ShortArray : public SimpleArray {
 public:
   ShortArray(){}
   ShortArray(int16_t* data, size_t size) :
     SimpleArray(data, size) {}
 
-#else
-class ShortArray {
-private:
-  int16_t* data;
-  size_t size;
-public:
-  ShortArray() :
-    data(NULL), size(0) {}
-  ShortArray(int16_t* data, size_t size) :
-    data(data), size(size) {}
-
-  size_t getSize() const{
-    return size;
-  }
-
-  size_t getSize(){
-    return size;
-  }
-
-  /**
-   * Casting operator to int16_t*
-   * @return a int16_t* pointer to the data stored in the ShortArray
-   */
-  operator int16_t*(){
-    return data;
-  }
-
-  /**
-   * Get the data stored in the ShortArray.
-   * @return a int16_t* pointer to the data stored in the ShortArray
-   */
-  int16_t* getData(){
-    return data;
-  }
-
-  /**
-   * Get a single int16_t stored in the ShortArray.
-   * @return the int16_t stored at index @param index
-   */
-  int16_t getElement(int index){
-    return data[index];
-  }
-
-  /**
-   * Set a single int16_t in the ShortArray.
-   */
-  void setElement(int index, int16_t value){
-    data[index] = value;
-  }
-  
-  /**
-   * Allows to index the array using array-style brackets.
-   * @param index the index of the element
-   * @return the value of the **index** element of the array
-   * Example usage:
-   * @code
-   * int size=1000;
-   * int16_t content[size]; 
-   * ShortArray int16_tArray(content, size);
-   * for(int n=0; n
Date: Sun, 21 Feb 2021 21:01:38 +0100
Subject: [PATCH 079/374] dynamic multi-channel class instead of template

---
 LibSource/StateVariableFilter.h | 42 ++++++++++++++++++++-------------
 1 file changed, 26 insertions(+), 16 deletions(-)

diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h
index e7805243..c85b1fb4 100644
--- a/LibSource/StateVariableFilter.h
+++ b/LibSource/StateVariableFilter.h
@@ -172,10 +172,25 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
   float mIc2eq = 0.;
 };
 
-template
 class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignalProcessor {
+private:
+  size_t channels;
+  // state
+  float* mV1;
+  float* mV2;
+  float* mV3;
+  float* mIc1eq;
+  float* mIc2eq;
 public:
-  MultiStateVariableFilter(float sr): AbstractStateVariableFilter(sr) {}
+  MultiStateVariableFilter(float sr) :
+    AbstractStateVariableFilter(sr),
+    channels(0), mV1(NULL), mV2(NULL), mV3(NULL), mIc1eq(NULL), mIc2eq(NULL) {}
+
+  MultiStateVariableFilter(float sr, size_t channels,
+			   float* mV1, float* mV2, float* mV3,
+			   float* mIc1eq, float* mIc2eq) :
+    AbstractStateVariableFilter(sr),
+    channels(channels), mV1(mV1), mV2(mV2), mV3(mV3), mIc1eq(mIc1eq), mIc2eq(mIc2eq) {}
 
   void process(AudioBuffer &input, AudioBuffer &output){
     size_t len = min(channels, min(input.getChannels(), output.getChannels()));
@@ -205,24 +220,19 @@ class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignal
     }
   }
 
-  static MultiStateVariableFilter* create(float sr){
-    return new MultiStateVariableFilter(sr);
+  static MultiStateVariableFilter* create(float sr, size_t channels){
+    return new MultiStateVariableFilter(sr, channels, new float[channels], new float[channels],
+					new float[channels], new float[channels], new float[channels]);
   }
 
-  static void destroy(MultiStateVariableFilter* svf){
+  static void destroy(MultiStateVariableFilter* svf){
+    delete[] svf->mV1;
+    delete[] svf->mV2;
+    delete[] svf->mV3;
+    delete[] svf->mIc1eq;
+    delete[] svf->mIc2eq;
     delete svf;
   }
-  
-private:
-  // state
-  float mV1[channels] = {};
-  float mV2[channels] = {};
-  float mV3[channels] = {};
-  float mIc1eq[channels] = {};
-  float mIc2eq[channels] = {};
 };
 
-
-typedef MultiStateVariableFilter<2> StereoStateVariableFilter;
-
 #endif // __StateVariableFilter_h__

From 4985105572bce81d4b53091317a23d83748a653c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 21 Feb 2021 21:42:32 +0100
Subject: [PATCH 080/374] changed to single state array

---
 LibSource/StateVariableFilter.h | 59 ++++++++++++++-------------------
 1 file changed, 25 insertions(+), 34 deletions(-)

diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h
index c85b1fb4..f58a3d0f 100644
--- a/LibSource/StateVariableFilter.h
+++ b/LibSource/StateVariableFilter.h
@@ -174,63 +174,54 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
 
 class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignalProcessor {
 private:
-  size_t channels;
+  size_t mChannels;
   // state
-  float* mV1;
-  float* mV2;
-  float* mV3;
-  float* mIc1eq;
-  float* mIc2eq;
+  float* mState;
+  static constexpr size_t STATE_VARIABLES_PER_CHANNEL = 5;
 public:
   MultiStateVariableFilter(float sr) :
-    AbstractStateVariableFilter(sr),
-    channels(0), mV1(NULL), mV2(NULL), mV3(NULL), mIc1eq(NULL), mIc2eq(NULL) {}
+    AbstractStateVariableFilter(sr), 
+    mChannels(0), mState(NULL) {}
 
   MultiStateVariableFilter(float sr, size_t channels,
-			   float* mV1, float* mV2, float* mV3,
-			   float* mIc1eq, float* mIc2eq) :
+			   float* state) :
     AbstractStateVariableFilter(sr),
-    channels(channels), mV1(mV1), mV2(mV2), mV3(mV3), mIc1eq(mIc1eq), mIc2eq(mIc2eq) {}
+    mChannels(channels), mState(state) {}
 
   void process(AudioBuffer &input, AudioBuffer &output){
-    size_t len = min(channels, min(input.getChannels(), output.getChannels()));
-    for(int ch=0; chmV1;
-    delete[] svf->mV2;
-    delete[] svf->mV3;
-    delete[] svf->mIc1eq;
-    delete[] svf->mIc2eq;
+    delete[] svf->mState;
     delete svf;
   }
 };

From 1195467a270f78cd1035f6ac58ec9765b61ea259 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 21 Feb 2021 22:01:07 +0100
Subject: [PATCH 081/374] dynamic multi-channel class instead of template

---
 LibSource/BiquadFilter.h | 19 +++++++++----------
 1 file changed, 9 insertions(+), 10 deletions(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 53b861e1..e0e3d470 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -360,15 +360,16 @@ class BiquadFilter : public SignalProcessor {
   }
 };
 
-template
 class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor {
 private:
-  BiquadFilter filters[channels-1];
+  size_t channels;
+  BiquadFilter* filters;
 protected:
 public:
   MultiBiquadFilter(){}
-  MultiBiquadFilter(float sr, float* coefs, float* states, size_t stages) :
-    BiquadFilter(sr, coefs, states, stages) {
+  MultiBiquadFilter(float sr, size_t channels, float* coefs, float* states, size_t stages) :
+    BiquadFilter(sr, coefs, states, stages), channels(channels) {
+    filters = new BiquadFilter[channels-1];
     FloatArray coefficients(coefs, stages*BIQUAD_COEFFICIENTS_PER_STAGE);
     for(size_t ch=1; ch* create(float sr, size_t stages=1){
-    return new MultiBiquadFilter(sr, new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE], new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*channels], stages);
+  static MultiBiquadFilter* create(float sr, size_t channels, size_t stages=1){
+    return new MultiBiquadFilter(sr, channels, new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE], new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*channels], stages);
   }  
-  static void destroy(MultiBiquadFilter* filter){
+  static void destroy(MultiBiquadFilter* filter){
     delete[] filter->coefficients;
     delete[] filter->state;
+    delete[] filter->filters;
     delete filter;
   }
   BiquadFilter* getFilter(size_t channel){
@@ -393,7 +395,6 @@ class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor {
       return &filters[channel-1];
     return NULL;
   }
-  
   void process(AudioBuffer &input, AudioBuffer &output){
     size_t len = min(channels, min(input.getChannels(), output.getChannels()));
     BiquadFilter::process(input.getSamples(0), output.getSamples(0));
@@ -402,8 +403,6 @@ class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor {
   }
 };
 
-typedef MultiBiquadFilter<2> StereoBiquadFilter;
-
 const float FilterStage::BESSEL_Q = 1/sqrtf(3); // 1/sqrt(3)
 const float FilterStage::SALLEN_KEY_Q = 0.5f; // 1/2
 const float FilterStage::BUTTERWORTH_Q = 1/sqrtf(2); // 1/sqrt(2)

From 6dc09489c2365ae4c7dc2d36c5e9353bd2c9ed2f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 21 Feb 2021 22:01:33 +0100
Subject: [PATCH 082/374] added delete[](void*, size_t) operator

---
 Source/operators.cpp | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Source/operators.cpp b/Source/operators.cpp
index fd8114ac..ae8b7420 100644
--- a/Source/operators.cpp
+++ b/Source/operators.cpp
@@ -12,6 +12,7 @@ void * operator new[](size_t size) { return pvPortMalloc(size); }
 void operator delete(void* ptr) { vPortFree(ptr); }
 void operator delete(void* ptr, unsigned int) { vPortFree(ptr); }
 void operator delete[](void * ptr) { vPortFree(ptr); }
+void operator delete[](void* ptr, unsigned int) { vPortFree(ptr); }
 //int _gettimeofday(struct timeval *__p, void *__tz){return 0;}
 
 // Static initialisation thread safety guards

From e1f6172a89d79a6720c5e208909b50a83ef6c9a7 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 21 Feb 2021 22:18:53 +0100
Subject: [PATCH 083/374] removed copy-paste error in getFrequency(float)

---
 LibSource/Oscillator.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index 9cd5ce10..f1b6d62b 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -30,7 +30,7 @@ class Oscillator : public SignalGenerator {
   /**
    * Get oscillator frequency in Hertz
    */
-  virtual float getFrequency(float value){
+  virtual float getFrequency(){
     return 0.0f;
   }
   /**

From 44eb6b4afa4bc558c1b376dc0bcd28e1f6984257 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 22 Feb 2021 17:24:19 +0100
Subject: [PATCH 084/374] use virtual SampleBuffer split/comb methods

---
 Source/PatchProgram.cpp | 80 +++++-----------------------------
 Source/SampleBuffer.hpp | 96 +++++++++++++++++++++++++++--------------
 2 files changed, 74 insertions(+), 102 deletions(-)

diff --git a/Source/PatchProgram.cpp b/Source/PatchProgram.cpp
index 09e27f45..9a4a24ca 100644
--- a/Source/PatchProgram.cpp
+++ b/Source/PatchProgram.cpp
@@ -75,7 +75,7 @@ void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* pat
   processor.setPatch(patch, name);
 }
 
-static SampleBuffer* samples;
+static SampleBuffer* samples = NULL;
 void setup(ProgramVector* pv){
   setSystemTables(pv);
 #ifdef USE_MIDI_CALLBACK
@@ -87,78 +87,20 @@ void setup(ProgramVector* pv){
   getProgramVector()->serviceCall(OWL_SERVICE_REQUEST_CALLBACK, midiTxArgs, 2);
 
 #endif /* USE_MIDI_CALLBACK */
-  switch(pv->audio_format){
-  case AUDIO_FORMAT_24B16_2X:
-    samples = new SampleBuffer(2, pv->audio_blocksize);
-    break;
-  case AUDIO_FORMAT_24B32_4X:
-    samples = new SampleBuffer(4, pv->audio_blocksize);
-    break;
-  case AUDIO_FORMAT_24B32_7X:
-    samples = new SampleBuffer(7, pv->audio_blocksize);
-    break;
-  case AUDIO_FORMAT_24B32_8X:
-    samples = new SampleBuffer(8, pv->audio_blocksize);
-    break;
-  default:
+  if(samples != NULL)
+    SampleBuffer::destroy(samples);
+  samples = SampleBuffer::create(pv->audio_format, pv->audio_blocksize);
+  if(samples == NULL)
     error(CONFIGURATION_ERROR_STATUS, "Unsupported audio format");
-    break;
-  }
 #include "registerpatch.cpp"
 }
 
 void run(ProgramVector* pv){
-  switch(pv->audio_format){
-  case 0:
-    for(;;){
-      pv->programReady();
-      memcpy(pv->audio_output, pv->audio_input, pv->audio_blocksize*2*sizeof(int32_t));
-    }
-    break;
-  case AUDIO_FORMAT_24B16_2X:
-    for(;;){
-      pv->programReady();
-      samples->split16(pv->audio_input, pv->audio_blocksize);
-      processor.setParameterValues(pv->parameters);
-      processor.patch->processAudio(*samples);
-      samples->comb16(pv->audio_output);
-    }
-    break;
-  case AUDIO_FORMAT_24B24_2X:
-    for(;;){   
-      pv->programReady();
-      samples->split24(pv->audio_input, pv->audio_blocksize);
-      processor.setParameterValues(pv->parameters);
-      processor.patch->processAudio(*samples);
-      samples->comb24(pv->audio_output);
-    }
-    break;
-  case AUDIO_FORMAT_24B32_2X:
-  case AUDIO_FORMAT_24B32_4X:
-  case AUDIO_FORMAT_24B32_7X:
-  case AUDIO_FORMAT_24B32_8X:
-    for(;;){
-      pv->programReady();
-      samples->split32(pv->audio_input, pv->audio_blocksize);
-      processor.setParameterValues(pv->parameters);
-      processor.patch->processAudio(*samples);
-      samples->comb32(pv->audio_output);
-    }
-    break;
-  default:
-    break;
+  for(;;){
+    pv->programReady();
+    samples->split(pv->audio_input);
+    processor.setParameterValues(pv->parameters);
+    processor.patch->processAudio(*samples);
+    samples->comb(pv->audio_output);
   }
 }
-
-#if 0
-      static int32_t value = 0;
-      static int32_t step = 32;
-      ProgramVector* pv = getProgramVector();
-      for(int i=0; i < pv->audio_blocksize; ++i){
-	pv->audio_output[i*2] = value;
-	pv->audio_output[i*2+1] = value; // swap(value);
-	value += step;
-	if(value >= INT32_MAX)
-	  value = INT32_MIN;
-      }
-#endif
diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp
index 908d7b76..a7cbaaa4 100644
--- a/Source/SampleBuffer.hpp
+++ b/Source/SampleBuffer.hpp
@@ -21,11 +21,11 @@
 class SampleBuffer : public AudioBuffer {
 protected:
   FloatArray* buffers;
-  size_t size;
+  size_t blocksize;
   size_t channels;
 public:
   SampleBuffer(size_t channels, size_t blocksize)
-    :channels(channels), size(blocksize) {
+    :channels(channels), blocksize(blocksize) {
     buffers = new FloatArray[channels];
     for(size_t i=0; i 0u){
@@ -130,22 +162,20 @@ class SampleBuffer : public AudioBuffer {
       blkCnt--;
     }
   }
+};
 
-  void clear(){
-    for(size_t i=0; i
Date: Mon, 22 Feb 2021 18:52:24 +0100
Subject: [PATCH 085/374] fix split32 and disable 24B24 format

---
 Source/SampleBuffer.hpp | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp
index a7cbaaa4..d9d637fb 100644
--- a/Source/SampleBuffer.hpp
+++ b/Source/SampleBuffer.hpp
@@ -64,10 +64,10 @@ class SampleBuffer32 : public SampleBuffer {
 public:
   SampleBuffer32(size_t channels, size_t blocksize) : SampleBuffer(channels, blocksize){}
   void split(int32_t* input){
-    const float mul = 1.0f/MULTIPLIER_23B;
+    const float mul = 1.0f/MULTIPLIER_31B;
     for(size_t i=0; i
Date: Mon, 22 Feb 2021 20:56:27 +0300
Subject: [PATCH 086/374] Leftover duplicate allocation for soundfile reader
 removed

---
 FaustCode/owl.cpp | 2 --
 1 file changed, 2 deletions(-)

diff --git a/FaustCode/owl.cpp b/FaustCode/owl.cpp
index a8a275c8..6bf5a3f7 100644
--- a/FaustCode/owl.cpp
+++ b/FaustCode/owl.cpp
@@ -663,8 +663,6 @@ class OwlUI : public UI {
         , fParameterIndex(0)
         , fSoundfileIndex(0)
         , fButton(NO_BUTTON) {
-        fSoundReader = new OwlResourceReader();
-        fSoundReader->setSampleRate(fPatch->getSampleRate());
     }
 
     virtual ~OwlUI() {

From 4037f512b0cfd3f3e98679528440e80f46c0293c Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Mon, 22 Feb 2021 21:09:59 +0300
Subject: [PATCH 087/374] Fixed crime against humanity

---
 FaustCode/owl.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/FaustCode/owl.cpp b/FaustCode/owl.cpp
index 6bf5a3f7..36b45ba9 100644
--- a/FaustCode/owl.cpp
+++ b/FaustCode/owl.cpp
@@ -577,7 +577,7 @@ class OwlUI : public UI {
     int fSampleRate;
     //std::map fSoundfileMap;    // Map to share loaded soundfiles
     OwlParameterBase* fParameterTable[MAXOWLPARAMETERS];
-    OwlResourceReader* fSoundReader;
+    OwlResourceReader* fSoundReader = NULL;
     Soundfile* fSoundfiles[MAX_SOUNDFILES];
     PatchButtonId fButton;
     // check if the widget is an Owl parameter and, if so, add the corresponding OwlParameter

From b27d8ec2ee5ce4b0f232c34489107f6f7c2f9776 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 23 Feb 2021 10:20:59 +0100
Subject: [PATCH 088/374] fix compilation warning

---
 LibSource/BiquadFilter.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index e0e3d470..f5fc25a7 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -396,7 +396,7 @@ class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor {
     return NULL;
   }
   void process(AudioBuffer &input, AudioBuffer &output){
-    size_t len = min(channels, min(input.getChannels(), output.getChannels()));
+    size_t len = min((int)channels, min(input.getChannels(), output.getChannels()));
     BiquadFilter::process(input.getSamples(0), output.getSamples(0));
     for(size_t ch=1; ch
Date: Tue, 23 Feb 2021 11:39:11 +0100
Subject: [PATCH 089/374] fixed init bug

---
 LibSource/ComplexFourierTransform.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/ComplexFourierTransform.h b/LibSource/ComplexFourierTransform.h
index 465e23a2..baf4729d 100644
--- a/LibSource/ComplexFourierTransform.h
+++ b/LibSource/ComplexFourierTransform.h
@@ -53,7 +53,7 @@ class ComplexFourierTransform {
     ASSERT(len==32 || len ==64 || len==128 || len==256 || len==512 || len==1024 || len==2048 || len==4096, "Unsupported FFT size");
     cfgfft = kiss_fft_alloc(len, 0 , 0, 0);
     cfgifft = kiss_fft_alloc(len, 1,0, 0);
-    temp = ComplexFloatArray::create(getSize());
+    temp = ComplexFloatArray::create(len);
   }
   void fft(ComplexFloatArray inout){
     ASSERT(inout.getSize() >= getSize(), "Input array too small");

From 952dc21ab34096025d03d5694a6d3b733a5e37b9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 23 Feb 2021 11:39:14 +0100
Subject: [PATCH 090/374] moved all array copyFrom/To, insert and move methods
 to SimpleArray

---
 LibSource/ComplexFloatArray.cpp |  71 +++++------------
 LibSource/ComplexFloatArray.h   | 133 ++++++++++++++++----------------
 LibSource/ComplexShortArray.cpp |  36 ++-------
 LibSource/ComplexShortArray.h   |  41 ----------
 LibSource/FloatArray.cpp        |  12 ---
 LibSource/FloatArray.h          |  18 -----
 LibSource/IntArray.h            |  42 +++++-----
 LibSource/ShortArray.cpp        |  95 ++++++-----------------
 LibSource/ShortArray.h          |  34 ++------
 9 files changed, 140 insertions(+), 342 deletions(-)

diff --git a/LibSource/ComplexFloatArray.cpp b/LibSource/ComplexFloatArray.cpp
index 3d5678b8..a88b3794 100644
--- a/LibSource/ComplexFloatArray.cpp
+++ b/LibSource/ComplexFloatArray.cpp
@@ -215,64 +215,22 @@ void ComplexFloatArray::scale(float factor){
 #endif
 }
 
-ComplexFloatArray ComplexFloatArray::create(size_t size){
-  return ComplexFloatArray(new ComplexFloat[size], size);
-}
-
-void ComplexFloatArray::destroy(ComplexFloatArray array){
-  delete array.data;
-}
-
-/* Copies real values from a FloatArray, sets imaginary values to 0
- */
-void ComplexFloatArray::copyFrom(FloatArray source){
-  for(size_t n=0; n= size, "Array too small");
+  for(size_t n=0; n= length, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_f32((float *)data, (float *)other, length*sizeof(ComplexFloat)/sizeof(float));
-#else
-  for(size_t n=0; n= size, "Array too small");
+  for(size_t n=0; n= length, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_f32((float *)other, (float *)data, length*sizeof(ComplexFloat)/sizeof(float));  //note the *2 multiplier which accounts for real and imaginary parts
-#else
-  for(size_t n=0; nCMSIS library
@@ -285,7 +243,6 @@ void ComplexFloatArray::setAll(float value){
   setAll(val);
 #endif /* ARM_CORTEX */
 }
-/*END -- methods copied and adapted from ComplexFloatArray.cpp*/
 
 void ComplexFloatArray::setAll(ComplexFloat value){
   for(size_t n=0; n(const ComplexFloat& other) const {
+    return getMagnitudeSquared() > other.getMagnitudeSquared();
+  }
+
+  bool operator<=(const ComplexFloat& other) const {
+    return getMagnitudeSquared() <= other.getMagnitudeSquared();
+  }
+
+  bool operator>=(const ComplexFloat& other) const {
+    return getMagnitudeSquared() >= other.getMagnitudeSquared();
+  }
+
   bool operator==(const ComplexFloat& other) const {
     return re == other.re && im == other.im;
   }
@@ -83,19 +108,19 @@ class ComplexFloatArray : public SimpleArray {
     SimpleArray(data, size) {}
     
   /** 
-    The real part of an element of the array.      
-    @param i The index of the element
-    @return The real part of the element
-  */
+   * Get the real part of an element of the array.      
+   * @param i The index of the element
+   * @return The real part of the element
+   */
   float re(const int i){
     return data[i].re;
   }
   
   /**
-    The imaginary part of an element of the array.
-    @param i The index of the element
-    @return The imaginary part of the element
-  */
+   *  Get the imaginary part of an element of the array.
+   * @param i The index of the element
+   * @return The imaginary part of the element
+   */
   float im(const int i){
     return data[i].im;
   }
@@ -105,10 +130,10 @@ class ComplexFloatArray : public SimpleArray {
   }
 
   /**
-    The magnitude of an element of the array.
-    @param i The index of the element
-    @return The magnitude of the element
-  */  
+   * Get the magnitude of an element of the array.
+   *  @param i The index of the element
+   *  @return The magnitude of the element
+   */  
   float mag(const int i);
   
   /**
@@ -245,45 +270,17 @@ class ComplexFloatArray : public SimpleArray {
   static void destroy(ComplexFloatArray);
 
   /**
-   * Copies the content of an array into another array.
+   * Copies real values from a FloatArray, sets imaginary values to 0
    * @param[in] source The source array
   */
-  void copyFrom(FloatArray source);
-
-  /**
-   * Copies the content of a FloatArray into the ComplexFloatArray.
-   * @param[in] source The source array
-   * @remarks The size of the FloatArray must be twice the size of the ComplexFloatArray.
-  */
-  void copyFrom(ComplexFloatArray source);
+  void fromFloat(FloatArray source);
   
   /**
-   * Copies an array of ComplexFloat into the array.
-   * @param[in] source A pointer to the beginning of the portion of memory to read from.
-   * @param[in] length Number of samples to copy.
-  */
-  void copyFrom(ComplexFloat* source, size_t length);
-  
-  /**
-   * Copies the content of the ComplexFloatArray into a FloatArray.
+   * Copies real and imaginary values of the ComplexFloatArray into a FloatArray.
    * @param[out] destination The destination array
    * @remarks The size of the FloatArray must be twice the size of the ComplexFloatArray.
   */
-  void copyTo(FloatArray destination);
-
-  /**
-   * Copies the content of the array to another array.
-   * @param[out] destination The destination array
-  */
-  void copyTo(ComplexFloatArray destination);
-  
-  /**
-   * Copies an array of ComplexFloat into the array.
-   * @param[in] destination A pointer to the beginning of the portion of memory to write to.
-   * @param[in] length Number of samples to copy.
-  */
-  void copyTo(ComplexFloat* destination, size_t length);
-
+  void toFloat(FloatArray destination);
 
   /**
    * Set all the elements in the array.
diff --git a/LibSource/ComplexShortArray.cpp b/LibSource/ComplexShortArray.cpp
index a6a0f3a3..a0b5da42 100644
--- a/LibSource/ComplexShortArray.cpp
+++ b/LibSource/ComplexShortArray.cpp
@@ -124,14 +124,6 @@ void ComplexShortArray::complexByComplexMultiplication(ComplexShortArray operand
 #endif  
 }
 
-ComplexShortArray ComplexShortArray::create(unsigned int size){
-  return ComplexShortArray(new ComplexShort[size], size);
-}
-
-void ComplexShortArray::destroy(ComplexShortArray array){
-  delete array.data;
-}
-
 void ComplexShortArray::setAll(int16_t value){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
 #ifdef ARM_CORTEX
@@ -156,7 +148,6 @@ void ComplexShortArray::setAll(int16_t valueRe, int16_t valueIm){
   setAll(value);
 }
 
-
 void ComplexShortArray::add(ComplexShortArray operand2, ComplexShortArray destination){
   //ASSERT(operand2.size == size && destination.size >= size, "Arrays size mismatch");
 #ifdef ARM_CORTEX
@@ -169,25 +160,12 @@ void ComplexShortArray::add(ComplexShortArray operand2, ComplexShortArray destin
 #endif /* ARM_CORTEX */  
 }
 
-void ComplexShortArray::copyFrom(ComplexShortArray operand2){
-#ifdef ARM_CORTEX
-  arm_copy_q15((int16_t*)operand2.getData(), (int16_t*)data, size * 2);
-#else
-  for(size_t n = 0; n < size; ++n){
-    data[n].re = operand2[n].re;
-    data[n].im = operand2[n].im ;
-  }
-#endif
-}
-  
-void ComplexShortArray::copyTo(ComplexShortArray operand2){
-#ifdef ARM_CORTEX
-  arm_copy_q15((int16_t*)data, (int16_t*)operand2.getData(), size * 2);
-#else
-  for(size_t n = 0; n < size; ++n){
-    data[n].re = (int16_t)operand2[n].re;
-    data[n].im = (int16_t)operand2[n].im ;
-  }
-#endif
+ComplexShortArray ComplexShortArray::create(unsigned int size){
+  ComplexShortArray obj(new ComplexShort[size], size);
+  obj.clear();
+  return obj;
 }
 
+void ComplexShortArray::destroy(ComplexShortArray array){
+  delete[] array.data;
+}
diff --git a/LibSource/ComplexShortArray.h b/LibSource/ComplexShortArray.h
index d6bc1ee3..b1794cfd 100644
--- a/LibSource/ComplexShortArray.h
+++ b/LibSource/ComplexShortArray.h
@@ -236,47 +236,6 @@ class ComplexShortArray : public SimpleArray {
   */
   static void destroy(ComplexShortArray);
 
-  /**
-   * Copies the content of an array into another array.
-   * @param[in] source The source array
-  */
-  void copyFrom(ShortArray source);
-
-  /**
-   * Copies the content of a ShortArray into the ComplexShortArray.
-   * @param[in] source The source array
-   * @remarks The size of the ShortArray must be twice the size of the ComplexShortArray.
-  */
-  void copyFrom(ComplexShortArray source);
-  
-  /**
-   * Copies an array of ComplexShort into the array.
-   * @param[in] source A pointer to the beginning of the portion of memory to read from.
-   * @param[in] length Number of samples to copy.
-  */
-  void copyFrom(ComplexShort* source, unsigned int length);
-  
-  /**
-   * Copies the content of the ComplexShortArray into a ShortArray.
-   * @param[out] destination The destination array
-   * @remarks The size of the ShortArray must be twice the size of the ComplexShortArray.
-  */
-  void copyTo(ShortArray destination);
-
-  /**
-   * Copies the content of the array to another array.
-   * @param[out] destination The destination array
-  */
-  void copyTo(ComplexShortArray destination);
-  
-  /**
-   * Copies an array of ComplexShort into the array.
-   * @param[in] destination A pointer to the beginning of the portion of memory to write to.
-   * @param[in] length Number of samples to copy.
-  */
-  void copyTo(ComplexShort* destination, int length);
-
-
   /**
    * Set all the elements in the array.
    * @param[in] value All the elements are set to this value.
diff --git a/LibSource/FloatArray.cpp b/LibSource/FloatArray.cpp
index a292386a..bcda5b1e 100644
--- a/LibSource/FloatArray.cpp
+++ b/LibSource/FloatArray.cpp
@@ -217,18 +217,6 @@ FloatArray FloatArray::subArray(int offset, size_t length){
   return FloatArray(data+offset, length);
 }
 
-#if defined ARM_CORTEX
-void FloatArray::copyTo(FloatArray destination){
-  ASSERT(destination.size >= size, "Array too small");
-  arm_copy_f32(data, destination.data, size);
-}
-
-void FloatArray::copyFrom(FloatArray source){
-  ASSERT(source.size >= size, "Array too small");
-  arm_copy_f32(source.data, data, size);
-}
-#endif
-
 void FloatArray::setAll(float value){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
 #ifdef ARM_CORTEX
diff --git a/LibSource/FloatArray.h b/LibSource/FloatArray.h
index 678e2a70..39fc3612 100644
--- a/LibSource/FloatArray.h
+++ b/LibSource/FloatArray.h
@@ -15,22 +15,6 @@ class FloatArray : public SimpleArray {
   FloatArray(float* data, size_t size) :
     SimpleArray(data, size) {}
 
-#ifdef ARM_CORTEX // shadow methods with optimised implementations
-  /**
-   * Copies the content of the array to another array.
-   * @param[out] destination the destination array
-   * @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  */
-  void copyTo(FloatArray destination);
-
-  /**
-   * Copies the content of an array into another array.
-   * @param[in] source the source array
-   * @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  */
-  void copyFrom(FloatArray source);
-#endif
-
   /**
    * Set all the values in the array.
    * Sets all the elements of the array to **value**.
@@ -85,8 +69,6 @@ class FloatArray : public SimpleArray {
    */
   int getMaxIndex();
   
-  float getDb(); //TODO: not implemented
-  
   /**
    * Absolute value of the array.
    * Stores the absolute value of the elements in the array into destination.
diff --git a/LibSource/IntArray.h b/LibSource/IntArray.h
index 98a54cb6..f7036b56 100644
--- a/LibSource/IntArray.h
+++ b/LibSource/IntArray.h
@@ -58,6 +58,26 @@ class IntArray : public SimpleArray {
     add(operand2, *this);
   } //in-place
 
+  /**
+   * Bitshift the array values, saturating.
+   *
+   * @param shiftValue number of positions to shift. A positive value will shift left, a negative value will shift right.
+   */
+  void shift(int shiftValue){
+#ifdef ARM_CORTEX
+    arm_shift_q31(data, shiftValue, data, size);
+#else
+    if(shiftValue >= 0){
+      for(size_t n=0; n> shiftValue;
+    }
+#endif
+  }
+
   /**
    * Creates a new IntArray.
    * Allocates size*sizeof(int32_t) bytes of memory and returns a IntArray that points to it.
@@ -78,27 +98,7 @@ class IntArray : public SimpleArray {
    * @remarks a IntArray object that has not been created by the IntArray::create() method might cause an exception if passed as an argument to this method.
   */
   static void destroy(IntArray array){
-    delete array.data;
-  }
-
-  /**
-   * Bitshift the array values, saturating.
-   *
-   * @param shiftValue number of positions to shift. A positive value will shift left, a negative value will shift right.
-   */
-  void shift(int shiftValue){
-#ifdef ARM_CORTEX
-    arm_shift_q31(data, shiftValue, data, size);
-#else
-    if(shiftValue >= 0){
-      for(size_t n=0; n> shiftValue;
-    }
-#endif
+    delete[] array.data;
   }
 };
 
diff --git a/LibSource/ShortArray.cpp b/LibSource/ShortArray.cpp
index a68da9d3..487febb9 100644
--- a/LibSource/ShortArray.cpp
+++ b/LibSource/ShortArray.cpp
@@ -213,6 +213,7 @@ void ShortArray::clip(int16_t max){
       data[n]=-max;
   }
 }
+
 void ShortArray::clip(int16_t min, int16_t max){
   for(size_t n=0; nmax)
@@ -221,62 +222,12 @@ void ShortArray::clip(int16_t min, int16_t max){
       data[n]=min;
   }
 }
+
 ShortArray ShortArray::subArray(int offset, size_t length){
   ASSERT(size >= offset+length, "Array too small");
   return ShortArray(data+offset, length);
 }
 
-void ShortArray::copyTo(ShortArray destination){
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  copyTo(destination, min(size, destination.getSize()));
-}
-
-void ShortArray::copyFrom(ShortArray source){
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  copyFrom(source, min(size, source.getSize()));
-}
-
-void ShortArray::copyTo(int16_t* other, size_t length){
-  ASSERT(size >= length, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_q15(data, other, length);
-#else
-  memcpy((void *)other, (void *)getData(), length*sizeof(int16_t));
-#endif /* ARM_CORTEX */
-}
-
-void ShortArray::copyFrom(int16_t* other, size_t length){
-  ASSERT(size >= length, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_q15(other, data, length);
-#else
-  memcpy((void *)getData(), (void *)other, length*sizeof(int16_t));
-#endif /* ARM_CORTEX */
-}
-
-void ShortArray::insert(ShortArray source, int sourceOffset, int destinationOffset, size_t samples){
-  ASSERT(size >= destinationOffset+samples, "Array too small");
-  ASSERT(source.size >= sourceOffset+samples, "Array too small");
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-#ifdef ARM_CORTEX
-  arm_copy_q15(source.data+sourceOffset, data+destinationOffset, samples);  
-#else
-  memcpy((void*)(getData()+destinationOffset), (void*)(source.getData()+sourceOffset), samples*sizeof(int16_t));
-#endif /* ARM_CORTEX */
-}
-
-void ShortArray::insert(ShortArray source, int destinationOffset, size_t samples){
-/// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
-  insert(source, 0, destinationOffset, samples);
-}
-
-void ShortArray::move(int fromIndex, int toIndex, size_t samples){
-  ASSERT(size >= toIndex+samples, "Array too small");
-  memmove(data+toIndex, data+fromIndex, samples*sizeof(int16_t)); //TODO: evaluate if it is appropriate to use arm_copy_q15 for this method
-}
-
 void ShortArray::setAll(int16_t value){
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
 #ifdef ARM_CORTEX
@@ -581,27 +532,17 @@ void ShortArray::correlateInitialized(ShortArray operand2, ShortArray destinatio
 
 void ShortArray::shift(int shiftValue){
 #ifdef ARM_CORTEX
-    arm_shift_q15(data, shiftValue, data, size);
+  arm_shift_q15(data, shiftValue, data, size);
 #else
-    if(shiftValue >= 0){
-      for(size_t n=0; n> shiftValue;
-    }
-#endif
+  if(shiftValue >= 0){
+    for(size_t n=0; n> shiftValue;
   }
-
-ShortArray ShortArray::create(int size){
-  ShortArray fa(new int16_t[size], size);
-  fa.clear();
-  return fa;
-}
-
-void ShortArray::destroy(ShortArray array){
-  delete array.data;
+#endif
 }
 
 void ShortArray::setFloatValue(uint32_t n, float value){
@@ -612,7 +553,7 @@ float ShortArray::getFloatValue(uint32_t n){
   return data[n] / (float)-SHRT_MIN;
 }
 
-void ShortArray::copyFrom(FloatArray source){
+void ShortArray::fromFloat(FloatArray source){
   ASSERT(source.getSize() == size, "Size does not match");
 #ifdef ARM_CORTEX
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
@@ -624,7 +565,7 @@ void ShortArray::copyFrom(FloatArray source){
 #endif
 }
 
-void ShortArray::copyTo(FloatArray destination){
+void ShortArray::toFloat(FloatArray destination){
   ASSERT(destination.getSize() == size, "Size does not match");
 #ifdef ARM_CORTEX
 /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
@@ -635,3 +576,13 @@ void ShortArray::copyTo(FloatArray destination){
   }
 #endif
 }
+
+ShortArray ShortArray::create(int size){
+  ShortArray fa(new int16_t[size], size);
+  fa.clear();
+  return fa;
+}
+
+void ShortArray::destroy(ShortArray array){
+  delete[] array.data;
+}
diff --git a/LibSource/ShortArray.h b/LibSource/ShortArray.h
index 17b91a21..31427691 100644
--- a/LibSource/ShortArray.h
+++ b/LibSource/ShortArray.h
@@ -296,47 +296,23 @@ class ShortArray : public SimpleArray {
    * @remarks Calling ShortArray::destroy() on a ShortArray instance created with this method might cause an exception.
   */
   ShortArray subArray(int offset, size_t length);
-  
-  /**
-   * Copies the content of the array to another array.
-   * @param[out] destination the destination array
-  */
-  void copyTo(ShortArray destination);
-
-  /**
-   * Copies the content of the array to a location in memory.
-   * @param[out] destination a pointer to the beginning of the memory location to copy to.
-   * The **length***sizeof(int16_t) bytes of memory starting at this location must have been allocated before calling this method.
-   * @param[in] length number of samples to copy
-  */
-  void copyTo(int16_t* destination, size_t length);
 
+  using SimpleArray::copyTo;
+  using SimpleArray::copyFrom;
+  
   /**
    * Copies the content of the array to a FloatArray, interpreting the content
    * of the ShortArray as 1.15.
    * @param[out] destination the destination array
   */
-  void copyTo(FloatArray destination);
+  void toFloat(FloatArray destination);
 
-  /**
-   * Copies the content of an array into another array.
-   * @param[in] source the source array
-  */
-  void copyFrom(ShortArray source);
-  
-  /**
-   * Copies an array of int16_t into the array.
-   * @param[in] source a pointer to the beginning of the portion of memory to read from.
-   * @param[in] length number of samples to copy.
-  */
-  void copyFrom(int16_t* source, size_t length);
-  
   /**
    * Copies the content of a FloatArray into a ShortArray, converting
    * the float elements to fixed-point 1.15.
    * @param[in] source the source array
   */
-  void copyFrom(FloatArray source);
+  void fromFloat(FloatArray source);
 
   /**
    * Converts a float to int16 and stores it.

From 7cdd5af4e7b12872fae8d1fceb60052edffaafd9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 23 Feb 2021 11:51:08 +0100
Subject: [PATCH 091/374] conversion methods renamed toFloat()/fromFloat()

---
 TestPatches/ComplexFloatArrayTestPatch.hpp       | 16 +++++-----------
 TestPatches/ComplexFourierTransformTestPatch.hpp |  4 ++--
 TestPatches/ShortArrayTestPatch.hpp              |  4 ++--
 3 files changed, 9 insertions(+), 15 deletions(-)

diff --git a/TestPatches/ComplexFloatArrayTestPatch.hpp b/TestPatches/ComplexFloatArrayTestPatch.hpp
index 3f80114b..bcf683d9 100644
--- a/TestPatches/ComplexFloatArrayTestPatch.hpp
+++ b/TestPatches/ComplexFloatArrayTestPatch.hpp
@@ -45,6 +45,8 @@ class ComplexFloatArrayTestPatch : public Patch {
     passed=0;
     failed=0;
     size_t size=100;
+    assertr(sizeof(ComplexFloat) == sizeof(float)*2, "sizeof ComplexFloat");
+    assertr(sizeof(ComplexFloatArray) == sizeof(ComplexFloat*)+sizeof(size_t), "sizeof ComplexFloat");
     ComplexFloat data[size];
     ComplexFloat backupData[size];
     for(size_t n=0; n
Date: Tue, 23 Feb 2021 12:57:49 +0100
Subject: [PATCH 092/374] removed redundant using:: directves

---
 LibSource/ShortArray.h | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/LibSource/ShortArray.h b/LibSource/ShortArray.h
index 31427691..d0fcf5f2 100644
--- a/LibSource/ShortArray.h
+++ b/LibSource/ShortArray.h
@@ -297,9 +297,6 @@ class ShortArray : public SimpleArray {
   */
   ShortArray subArray(int offset, size_t length);
 
-  using SimpleArray::copyTo;
-  using SimpleArray::copyFrom;
-  
   /**
    * Copies the content of the array to a FloatArray, interpreting the content
    * of the ShortArray as 1.15.

From 4413b113002174390a1250c7cd2854bc94672da1 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 23 Feb 2021 12:58:13 +0100
Subject: [PATCH 093/374] added 'optimised' (sometimes) data copy function

---
 LibSource/SimpleArray.h | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/LibSource/SimpleArray.h b/LibSource/SimpleArray.h
index 95bb6783..ca65fc2a 100644
--- a/LibSource/SimpleArray.h
+++ b/LibSource/SimpleArray.h
@@ -123,6 +123,30 @@ class SimpleArray {
     ASSERT(size >= toIndex+len, "Array too small");
     memmove((void*)(data+toIndex), (void*)(data+fromIndex), len*sizeof(T));
   }
+    
+  /**
+   * Optimised array copy for datatype T.
+   * Copy four at a time to minimise loop overheads and allow SIMD optimisations.
+   * This performs well on external RAM but is slower on internal memory compared to memcpy.
+   */
+  static void copy(T* dst, T* src, size_t len){
+    size_t blocks = len >> 2u;
+    T a, b, c, d;
+    while(blocks--){
+      a = *src++;
+      b = *src++;
+      c = *src++;
+      d = *src++;
+      *dst++ = a;
+      *dst++ = b;
+      *dst++ = c;
+      *dst++ = d;
+    }
+    blocks = len & 0x3;
+    while(blocks--){
+      *dst++ = *src++;
+    }
+  }
 
   /**
    * Casting operator to T*
@@ -131,7 +155,7 @@ class SimpleArray {
   operator T*(){
     return data;
   }
-    
+
   // /**
   //  * Allows to index the array using array-style brackets.
   //  * @param index the index of the element

From f78b2705594f8632571d3fb12566e4f40f1a37a3 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 23 Feb 2021 15:15:03 +0100
Subject: [PATCH 094/374] test FloatArray::copy

---
 TestPatches/FloatArrayTestPatch.hpp | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/TestPatches/FloatArrayTestPatch.hpp b/TestPatches/FloatArrayTestPatch.hpp
index 130c413a..89e150d3 100644
--- a/TestPatches/FloatArrayTestPatch.hpp
+++ b/TestPatches/FloatArrayTestPatch.hpp
@@ -91,6 +91,15 @@ class FloatArrayTestPatch : public TestPatch {
     for(size_t n=0; n
Date: Wed, 24 Feb 2021 10:42:24 +0100
Subject: [PATCH 095/374] added interpolated read and write

---
 LibSource/CircularBuffer.h  | 216 ++++++++++++++++++++++++++++++++++++
 LibSource/OpenWareLibrary.h |   1 +
 2 files changed, 217 insertions(+)
 create mode 100644 LibSource/CircularBuffer.h

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
new file mode 100644
index 00000000..e8fdd9c9
--- /dev/null
+++ b/LibSource/CircularBuffer.h
@@ -0,0 +1,216 @@
+#ifndef _CircularBuffer_hpp_
+#define _CircularBuffer_hpp_
+
+#include 
+#include  // for memcpy
+
+template
+class CircularBuffer {
+private:
+  T* data;
+  size_t size;
+  volatile size_t writepos = 0;
+  volatile size_t readpos = 0;
+public:
+  CircularBuffer(): data(NULL), size(0){}
+  CircularBuffer(T* data, size_t size): data(data), size(size){}
+
+  size_t getSize() const {
+    return size;
+  }
+  
+  bool isEmpty() const {
+    return writepos == readpos;
+  }
+
+  void write(T c){
+    data[writepos++] = c;
+    if(writepos >= size)
+      writepos = 0;
+  }
+
+  void write(T* data, size_t len){
+    ASSERT(getWriteCapacity() < len, "CircularBuffer overflow");
+    T* dest = getWriteHead();
+    size_t rem = size-writepos;
+    if(len >= rem){
+      memcpy(dest, data, rem);
+      // note that len-rem may be zero
+      memcpy(data, data+rem, len-rem);
+      writepos = len-rem;
+    }else{
+      memcpy(dest, data, len);
+      writepos += len;
+    }
+  }
+    
+  void writeAt(size_t index, T value){
+    data[index % size] = value;
+  }
+
+  /**
+   * Interpolated write at sub-sample index.
+   * Inserts a value linearly interpolated at a fractional index.
+   */
+  void interpolatedWriteAt(float index, T value){
+    size_t idx = (size_t)index;
+    T low = readAt(idx);
+    T high = readAt(idx+1);
+    float frac = index - idx;
+    writeAt(idx, low + (value-low)*frac);
+    writeAt(idx+1, value + (high-value)*frac);
+  }
+
+  T read(){
+    T c = data[readpos++];
+    if(readpos >= size)
+      readpos = 0;
+    return c;
+  }
+
+  void read(T* data, size_t len){
+    ASSERT(getReadCapacity() < len, "CircularBuffer underflow");
+    T* src = getReadHead();
+    size_t rem = size-readpos;
+    if(len >= rem){
+      memcpy(data, src, rem);
+      // note that len-rem may be zero
+      memcpy(data+rem, data, len-rem);
+      readpos = len-rem;
+    }else{
+      memcpy(data, src, len);
+      readpos += len;
+    }
+  }
+  
+  T readAt(size_t index){
+    return data[index % size];
+  }
+  
+  /**
+   * Interpolated read at sub-sample index.
+   * @return a value linearly interpolated at a fractional index
+   */
+  inline float interpolatedReadAt(float index){
+    size_t idx = (size_t)index;
+    T low = readAt(idx);
+    T high = readAt(idx+1);
+    float frac = index - idx;
+    return high+frac*(low-high);
+  }
+
+  void skipUntilLast(char c){
+    T* src = getReadHead();
+    size_t rem = size-readpos;
+    for(int i=0; i= size)
+      writepos -= size;
+  }
+
+  size_t getReadIndex(){
+    return readpos;
+  }
+
+  void setReadIndex(size_t pos){
+    readpos = pos % size;
+  }
+
+  T* getReadHead(){
+    return data+readpos;
+  }
+
+  void incrementReadHead(size_t len){
+    ASSERT(getReadCapacity() < len, "CircularBuffer underflow");
+    readpos += len;
+    if(readpos >= size)
+      readpos -= size;
+  }
+
+  /**
+   * Set the read pos @param samples behind the write position.
+   */
+  void setDelay(int samples){
+    readpos = (writepos-samples) % size;
+  }
+
+  size_t getReadCapacity(){
+    return (writepos + size - readpos) % size;
+  }
+
+  size_t getWriteCapacity(){
+    return size - getReadCapacity();
+  }
+
+  size_t getContiguousWriteCapacity(){
+    if(writepos < readpos)
+      return readpos - writepos;
+    else
+      return size - writepos;
+  }
+
+  size_t getContiguousReadCapacity(){
+    if(writepos < readpos)
+      return size - readpos;
+    else
+      return writepos - readpos;
+  }
+
+  void setAll(const T value){
+    for(size_t i=0; i* create(size_t len){
+    CircularBuffer* obj = new CircularBuffer(new T[len], len);
+    obj->clear();
+    return obj;
+  }
+
+  static void destroy(CircularBuffer* obj){
+    delete[] obj->data;
+    delete obj;
+  }
+};
+
+typedef CircularBuffer CircularFloatBuffer;
+typedef CircularBuffer CircularShortBuffer;
+typedef CircularBuffer CircularIntBuffer;
+
+#endif /* _CircularBuffer_hpp_ */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index ccc85556..9cdb3b83 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -4,6 +4,7 @@
 #include "AcBlockingFilter.h"
 #include "BiquadFilter.h"
 #include "ChirpOscillator.h"
+#include "CircularBuffer.h"
 #include "ComplexFloatArray.h"
 #include "ComplexFourierTransform.h"
 #include "ComplexShortArray.h"

From 590d78fb7b85e08804e49b3834996900bb83dc7f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 24 Feb 2021 15:29:10 +0100
Subject: [PATCH 096/374] added delay line SignalProcessor and fast
 interpolating circular buffer

---
 LibSource/CircularBuffer.h                   |  39 ++-
 LibSource/DelayProcessor.h                   |  69 +++++
 LibSource/FastInterpolatedCircularBuffer.h   | 253 +++++++++++++++++++
 LibSource/OpenWareLibrary.h                  |   2 +
 TestPatches/CircularFloatBufferTestPatch.hpp |  36 +++
 5 files changed, 385 insertions(+), 14 deletions(-)
 create mode 100644 LibSource/DelayProcessor.h
 create mode 100644 LibSource/FastInterpolatedCircularBuffer.h
 create mode 100644 TestPatches/CircularFloatBufferTestPatch.hpp

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index e8fdd9c9..21d41fe1 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -9,8 +9,8 @@ class CircularBuffer {
 private:
   T* data;
   size_t size;
-  volatile size_t writepos = 0;
-  volatile size_t readpos = 0;
+  size_t writepos = 0;
+  size_t readpos = 0;
 public:
   CircularBuffer(): data(NULL), size(0){}
   CircularBuffer(T* data, size_t size): data(data), size(size){}
@@ -18,6 +18,10 @@ class CircularBuffer {
   size_t getSize() const {
     return size;
   }
+
+  T* getData() {
+    return data;
+  }
   
   bool isEmpty() const {
     return writepos == readpos;
@@ -29,17 +33,16 @@ class CircularBuffer {
       writepos = 0;
   }
 
-  void write(T* data, size_t len){
+  void write(T* source, size_t len){
     ASSERT(getWriteCapacity() < len, "CircularBuffer overflow");
     T* dest = getWriteHead();
     size_t rem = size-writepos;
-    if(len >= rem){
-      memcpy(dest, data, rem);
-      // note that len-rem may be zero
-      memcpy(data, data+rem, len-rem);
+    if(len > rem){
+      memcpy(dest, source, rem);
       writepos = len-rem;
+      memcpy(data, source+rem, writepos);
     }else{
-      memcpy(dest, data, len);
+      memcpy(dest, source, len);
       writepos += len;
     }
   }
@@ -68,17 +71,16 @@ class CircularBuffer {
     return c;
   }
 
-  void read(T* data, size_t len){
+  void read(T* dst, size_t len){
     ASSERT(getReadCapacity() < len, "CircularBuffer underflow");
     T* src = getReadHead();
     size_t rem = size-readpos;
-    if(len >= rem){
-      memcpy(data, src, rem);
-      // note that len-rem may be zero
-      memcpy(data+rem, data, len-rem);
+    if(len > rem){
+      memcpy(dst, src, rem);
       readpos = len-rem;
+      memcpy(dst+rem, data, readpos);
     }else{
-      memcpy(data, src, len);
+      memcpy(dst, src, len);
       readpos += len;
     }
   }
@@ -162,6 +164,15 @@ class CircularBuffer {
     readpos = (writepos-samples) % size;
   }
 
+  /**
+   * Write to buffer and read with a delay
+   */
+  void delay(T* in, T* out, size_t len, int delay){
+    setDelay(delay);
+    write(in, len);
+    read(in, len);
+  }
+
   size_t getReadCapacity(){
     return (writepos + size - readpos) % size;
   }
diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
new file mode 100644
index 00000000..195504e9
--- /dev/null
+++ b/LibSource/DelayProcessor.h
@@ -0,0 +1,69 @@
+#ifndef __DelayProcessor_h__
+#define __DelayProcessor_h__
+
+#include "CircularBuffer.h"
+#include "SignalProcessor.h"
+
+/**
+ * Delay line signal processor implemented with a circular buffer
+ */
+class DelayProcessor : public SignalProcessor {
+protected:
+  CircularFloatBuffer buffer;
+  int delay;
+public:
+  DelayProcessor() : delay(0) {}
+  DelayProcessor(float* buffer, size_t len) : buffer(buffer, len), delay(0) {}
+  int getDelay(){
+    return delay;
+  }
+  void setDelay(int samples){
+    delay = samples;
+  }
+  float process(float input){
+    buffer.write(input);
+    return buffer.read();
+  }
+  void process(FloatArray input, FloatArray output){
+    buffer.delay(input, output, input.getSize(), delay);
+  }
+  static DelayProcessor* create(size_t len){
+    return new DelayProcessor(new float[len], len);
+  }
+  static void destroy(DelayProcessor* obj){
+    delete[] obj->buffer.getData();
+    delete obj;
+  }
+};
+
+/**
+ * Interpolating delay line signal processor with fractional delay times.
+ */
+class FractionalDelayProcessor : public SignalProcessor {
+protected:
+  CircularFloatBuffer buffer;
+  float delay;
+public:
+  FractionalDelayProcessor() : delay(0) {}
+  FractionalDelayProcessor(float* buffer, size_t len) : buffer(buffer, len), delay(0) {}
+  float getDelay(){
+    return delay;
+  }
+  void setDelay(float samples){
+    delay = samples;
+  }
+  float process(float input){
+    float pos = buffer.getWriteIndex();
+    buffer.write(input);
+    return buffer.interpolatedReadAt(pos-delay);
+  }
+  static FractionalDelayProcessor* create(size_t len){
+    return new FractionalDelayProcessor(new float[len], len);
+  }
+  static void destroy(FractionalDelayProcessor* obj){
+    delete[] obj->buffer.getData();
+    delete obj;
+  }
+};
+
+#endif // __DelayProcessor_h__
diff --git a/LibSource/FastInterpolatedCircularBuffer.h b/LibSource/FastInterpolatedCircularBuffer.h
new file mode 100644
index 00000000..dd1f88c6
--- /dev/null
+++ b/LibSource/FastInterpolatedCircularBuffer.h
@@ -0,0 +1,253 @@
+#ifndef _FastInterpolatedCircularBuffer_hpp_
+#define _FastInterpolatedCircularBuffer_hpp_
+
+#include 
+
+/**
+ * Circular buffer that keeps a delta table of differences for faster fractional delay lines.
+ */
+template
+class FastInterpolatedCircularBuffer {
+private:
+  T* data;
+  T* delta;
+  size_t size;
+  size_t writepos = 0;
+  float readpos = 0;
+
+protected:
+  /**
+   * Update an entry in the internal data and delta tables
+   */
+  inline T update(T previous, T current, size_t i){
+    delta[i] = previous - current;
+    data[i] = current;
+    return current;
+  }
+public:
+  FastInterpolatedCircularBuffer(): data(NULL), delta(NULL), size(0){}
+  FastInterpolatedCircularBuffer(T* data, T* delta, size_t size) : data(data), delta(delta), size(size){}
+
+  size_t getSize() const {
+    return size;
+  }
+
+  T* getData() {
+    return data;
+  }
+
+  T* getDelta() {
+    return delta;
+  }
+  
+  bool isEmpty() const {
+    return abs(writepos-readpos) < 1;
+  }
+
+  void write(T value){
+    T previous = readAt(writepos-1);
+    update(previous, value, writepos);
+    if(++writepos >= size)
+      writepos = 0;
+  }
+
+  void write(T* src, size_t len){
+    T previous = readAt(writepos-1);
+    size_t rem = size-writepos;
+    if(len > rem){
+      for(size_t i=writepos; i= size)
+      readpos -= size;
+    return current + fraction*delta;
+  }
+
+  void read(T* dst, size_t len){
+    size_t idx = (size_t)readpos;
+    float fraction = readpos-idx;
+    size_t rem = size-idx;
+    T* pdata = data+idx;
+    T* pdelta = delta+idx;
+    if(len > rem){
+      readpos += len - size;
+      for(size_t i=idx; i= size)
+      writepos -= size;
+  }
+
+  float getReadIndex(){
+    return readpos;
+  }
+
+  void setReadIndex(float pos){
+    while(pos >= size)
+      pos -= size;
+    readpos = pos;
+  }
+
+  T* getReadHead(){
+    return data+(size_t)readpos;
+  }
+
+  void incrementReadHead(float len){
+    setReadIndex(readpos+len);
+  }
+
+  /**
+   * Set the read pos @param samples behind the write position.
+   */
+  void setDelay(float samples){
+    setReadIndex(writepos-samples);
+  }
+
+  /**
+   * Write to buffer and read with a delay
+   */
+  void delay(T* in, T* out, size_t len, float delay){
+    setDelay(delay);
+    write(in, len);
+    read(in, len);
+  }
+  
+  /**
+   * Write to buffer and read with a delay that ramps up or down
+   * from @param beginDelay to @param endDelay
+   */
+  void delay(T* in, T* out, size_t len, float beginDelay, float endDelay){
+    setDelay(beginDelay);
+    float pos = readPos;
+    float incr = (endDelay-beginDelay)/len + 1;
+    T previous = readAt(writepos-1);
+    size_t rem = size-writepos;
+    if(len > rem){
+      for(size_t i=writepos; i* create(size_t len){
+    FastInterpolatedCircularBuffer* obj = new FastInterpolatedCircularBuffer(new T[len], new T[len], len);
+    obj->clear();
+    return obj;
+  }
+
+  static void destroy(FastInterpolatedCircularBuffer* obj){
+    delete[] obj->data;
+    delete[] obj->delta;
+    delete obj;
+  }
+};
+
+typedef FastInterpolatedCircularBuffer FastInterpolatedCircularFloatBuffer;
+typedef FastInterpolatedCircularBuffer FastInterpolatedCircularShortBuffer;
+typedef FastInterpolatedCircularBuffer FastInterpolatedCircularIntBuffer;
+
+#endif /* _FastInterpolatedCircularBuffer_hpp_ */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 9cdb3b83..850ffe3e 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -10,9 +10,11 @@
 #include "ComplexShortArray.h"
 #include "Control.h"
 #include "DcBlockingFilter.h"
+#include "DelayProcessor.h"
 #include "Envelope.h"
 #include "ExponentialDecayEnvelope.h"
 #include "FastFourierTransform.h"
+#include "FastInterpolatedCircularBuffer.h"
 #include "FastLogTable.h"
 #include "FastPowTable.h"
 #include "FirFilter.h"
diff --git a/TestPatches/CircularFloatBufferTestPatch.hpp b/TestPatches/CircularFloatBufferTestPatch.hpp
new file mode 100644
index 00000000..1df51fc5
--- /dev/null
+++ b/TestPatches/CircularFloatBufferTestPatch.hpp
@@ -0,0 +1,36 @@
+#include "TestPatch.hpp"
+#include "CircularBuffer.h"
+#include 
+
+class CircularFloatBufferTestPatch : public TestPatch {
+public:
+  CircularFloatBufferTestPatch(){
+    {
+      TEST("Default ctor");
+      CircularFloatBuffer empty;
+      CHECK_EQUAL(empty.getSize(), 0);
+      CHECK(empty.getReadHead() == NULL);
+      CHECK(empty.getWriteHead() == NULL);
+    }
+    {
+      TEST("ctor");
+      const size_t size = 123;
+      float data[size];
+      CircularFloatBuffer* buffer = new CircularFloatBuffer(data, size);
+      CHECK_EQUAL(size, buffer->getSize());
+      CHECK(data == buffer->getReadHead());
+      CHECK(data == buffer->getWriteHead());
+      delete buffer;
+    }
+    {
+      TEST("create");
+      CircularFloatBuffer* buffer = CircularFloatBuffer::create(512);
+      CHECK_EQUAL((int)buffer->getSize(), 512);
+      REQUIRE(buffer->getReadHead() != NULL);
+      for(size_t i=0; i<512; ++i)
+	CHECK_EQUAL(buffer->readAt(i), 0);
+      CircularFloatBuffer::destroy(buffer);
+    }
+  }
+};
+

From 05b231f75e835b810efd4fc995249f42527fd91f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 24 Feb 2021 16:27:17 +0100
Subject: [PATCH 097/374] fixed some circular buffer bugs

---
 LibSource/CircularBuffer.h                 | 21 ++++++++++------
 LibSource/DelayProcessor.h                 | 28 +++++++++++++++++-----
 LibSource/FastInterpolatedCircularBuffer.h | 23 +++++++++++-------
 3 files changed, 51 insertions(+), 21 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 21d41fe1..618a325a 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -34,7 +34,7 @@ class CircularBuffer {
   }
 
   void write(T* source, size_t len){
-    ASSERT(getWriteCapacity() < len, "CircularBuffer overflow");
+    ASSERT(getWriteCapacity() >= len, "overflow");
     T* dest = getWriteHead();
     size_t rem = size-writepos;
     if(len > rem){
@@ -72,7 +72,7 @@ class CircularBuffer {
   }
 
   void read(T* dst, size_t len){
-    ASSERT(getReadCapacity() < len, "CircularBuffer underflow");
+    ASSERT(getReadCapacity() >= len, "underflow");
     T* src = getReadHead();
     size_t rem = size-readpos;
     if(len > rem){
@@ -132,7 +132,7 @@ class CircularBuffer {
   }
 
   void incrementWriteHead(size_t len){
-    ASSERT(getWriteCapacity() < len, "CircularBuffer overflow");
+    ASSERT(getWriteCapacity() < len, "overflow");
     writepos += len;
     if(writepos >= size)
       writepos -= size;
@@ -151,17 +151,24 @@ class CircularBuffer {
   }
 
   void incrementReadHead(size_t len){
-    ASSERT(getReadCapacity() < len, "CircularBuffer underflow");
+    ASSERT(getReadCapacity() < len, "underflow");
     readpos += len;
     if(readpos >= size)
       readpos -= size;
   }
 
   /**
-   * Set the read pos @param samples behind the write position.
+   * Set the read index @param samples behind the write index.
    */
   void setDelay(int samples){
-    readpos = (writepos-samples) % size;
+    readpos = (writepos-samples+size) % size;
+  }
+
+  /**
+   * Get the read index expressed as delay behind the write index.
+   */
+  int getDelay(){
+    return (writepos-readpos+size) % size;
   }
 
   /**
@@ -170,7 +177,7 @@ class CircularBuffer {
   void delay(T* in, T* out, size_t len, int delay){
     setDelay(delay);
     write(in, len);
-    read(in, len);
+    read(out, len);
   }
 
   size_t getReadCapacity(){
diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 195504e9..cf092bc1 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -3,6 +3,7 @@
 
 #include "CircularBuffer.h"
 #include "SignalProcessor.h"
+#include "FastInterpolatedCircularBuffer.h"
 
 /**
  * Delay line signal processor implemented with a circular buffer
@@ -19,13 +20,17 @@ class DelayProcessor : public SignalProcessor {
   }
   void setDelay(int samples){
     delay = samples;
+    buffer.setDelay(samples);
   }
   float process(float input){
     buffer.write(input);
     return buffer.read();
   }
+  // using SignalProcessor::process;
   void process(FloatArray input, FloatArray output){
-    buffer.delay(input, output, input.getSize(), delay);
+    buffer.write(input, input.getSize());
+    buffer.read(output, output.getSize());
+    // buffer.delay(input, output, input.getSize(), delay);
   }
   static DelayProcessor* create(size_t len){
     return new DelayProcessor(new float[len], len);
@@ -41,27 +46,38 @@ class DelayProcessor : public SignalProcessor {
  */
 class FractionalDelayProcessor : public SignalProcessor {
 protected:
-  CircularFloatBuffer buffer;
+  FastInterpolatedCircularFloatBuffer buffer;
   float delay;
 public:
   FractionalDelayProcessor() : delay(0) {}
-  FractionalDelayProcessor(float* buffer, size_t len) : buffer(buffer, len), delay(0) {}
+  FractionalDelayProcessor(float* buffer, float* delta, size_t len) : buffer(buffer, delta, len), delay(0) {}
   float getDelay(){
     return delay;
   }
   void setDelay(float samples){
     delay = samples;
+    buffer.setDelay(samples);
   }
   float process(float input){
-    float pos = buffer.getWriteIndex();
     buffer.write(input);
-    return buffer.interpolatedReadAt(pos-delay);
+    return buffer.read();
+  }
+  void process(FloatArray input, FloatArray output){
+    buffer.delay(input, output, input.getSize(), delay);
+  }
+  /**
+   * Delay ramping smoothly from the previous delay time to @param newDelay
+   */
+  void smooth(FloatArray input, FloatArray output, float newDelay){
+    buffer.delay(input, output, input.getSize(), delay, newDelay);
+    delay = newDelay;
   }
   static FractionalDelayProcessor* create(size_t len){
-    return new FractionalDelayProcessor(new float[len], len);
+    return new FractionalDelayProcessor(new float[len], new float[len], len);
   }
   static void destroy(FractionalDelayProcessor* obj){
     delete[] obj->buffer.getData();
+    delete[] obj->buffer.getDelta();
     delete obj;
   }
 };
diff --git a/LibSource/FastInterpolatedCircularBuffer.h b/LibSource/FastInterpolatedCircularBuffer.h
index dd1f88c6..dbe8c3ac 100644
--- a/LibSource/FastInterpolatedCircularBuffer.h
+++ b/LibSource/FastInterpolatedCircularBuffer.h
@@ -75,12 +75,12 @@ class FastInterpolatedCircularBuffer {
   T read(){
     size_t idx = (size_t)readpos;
     T current = data[idx];
-    T delta = delta[idx];
+    T diff = delta[idx];
     float fraction = readpos-idx;
     readpos += 1;
     if(readpos >= size)
       readpos -= size;
-    return current + fraction*delta;
+    return current + fraction*diff;
   }
 
   void read(T* dst, size_t len){
@@ -147,11 +147,18 @@ class FastInterpolatedCircularBuffer {
   }
 
   /**
-   * Set the read pos @param samples behind the write position.
+   * Set the read index @param samples behind the write index.
    */
   void setDelay(float samples){
     setReadIndex(writepos-samples);
   }
+  
+  /**
+   * Get the read index expressed as delay behind the write index.
+   */
+  float getDelay(){
+    return fmodf(writepos-readpos+size, size);
+  }
 
   /**
    * Write to buffer and read with a delay
@@ -159,7 +166,7 @@ class FastInterpolatedCircularBuffer {
   void delay(T* in, T* out, size_t len, float delay){
     setDelay(delay);
     write(in, len);
-    read(in, len);
+    read(out, len);
   }
   
   /**
@@ -168,19 +175,19 @@ class FastInterpolatedCircularBuffer {
    */
   void delay(T* in, T* out, size_t len, float beginDelay, float endDelay){
     setDelay(beginDelay);
-    float pos = readPos;
+    float pos = readpos;
     float incr = (endDelay-beginDelay)/len + 1;
     T previous = readAt(writepos-1);
     size_t rem = size-writepos;
     if(len > rem){
       for(size_t i=writepos; i
Date: Wed, 24 Feb 2021 16:48:55 +0100
Subject: [PATCH 098/374] build tests in debug mode

---
 Makefile | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Makefile b/Makefile
index e0d3b646..40a675af 100644
--- a/Makefile
+++ b/Makefile
@@ -1,8 +1,12 @@
 BUILDROOT ?= .
 
 ifndef CONFIG
+ifdef TEST
+  CONFIG=Debug
+else
   CONFIG=Release
 endif
+endif
 
 ifndef PLATFORM
   PLATFORM=OWL

From dfe3a7e013f219b04622ba4a34253f3f24e8f9da Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 24 Feb 2021 16:50:33 +0100
Subject: [PATCH 099/374] fix memcpy calls

---
 LibSource/CircularBuffer.h | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 618a325a..bb6d48f1 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -38,11 +38,11 @@ class CircularBuffer {
     T* dest = getWriteHead();
     size_t rem = size-writepos;
     if(len > rem){
-      memcpy(dest, source, rem);
+      memcpy(dest, source, rem*sizeof(T));
       writepos = len-rem;
-      memcpy(data, source+rem, writepos);
+      memcpy(data, source+rem, writepos*sizeof(T));
     }else{
-      memcpy(dest, source, len);
+      memcpy(dest, source, len*sizeof(T));
       writepos += len;
     }
   }
@@ -76,11 +76,11 @@ class CircularBuffer {
     T* src = getReadHead();
     size_t rem = size-readpos;
     if(len > rem){
-      memcpy(dst, src, rem);
+      memcpy(dst, src, rem*sizeof(T));
       readpos = len-rem;
-      memcpy(dst+rem, data, readpos);
+      memcpy(dst+rem, data, readpos*sizeof(T));
     }else{
-      memcpy(dst, src, len);
+      memcpy(dst, src, len*sizeof(T));
       readpos += len;
     }
   }

From 7b891ae844649ce3aa957f31604fd83a27dd1ef8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 24 Feb 2021 16:51:11 +0100
Subject: [PATCH 100/374] add test

---
 TestPatches/CircularFloatBufferTestPatch.hpp | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/TestPatches/CircularFloatBufferTestPatch.hpp b/TestPatches/CircularFloatBufferTestPatch.hpp
index 1df51fc5..30e958d9 100644
--- a/TestPatches/CircularFloatBufferTestPatch.hpp
+++ b/TestPatches/CircularFloatBufferTestPatch.hpp
@@ -31,6 +31,19 @@ class CircularFloatBufferTestPatch : public TestPatch {
 	CHECK_EQUAL(buffer->readAt(i), 0);
       CircularFloatBuffer::destroy(buffer);
     }
+    {
+      TEST("delay");
+      CircularFloatBuffer* buffer = CircularFloatBuffer::create(60);
+      FloatArray input = FloatArray::create(25);
+      FloatArray delay = FloatArray::create(25);
+      input.noise();
+      CHECK(!input.equals(delay));
+      buffer->delay(input, delay, input.getSize(), 10);
+      CHECK(input.subArray(0, 15).equals(delay.subArray(10, 15)));
+      CircularFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+      FloatArray::destroy(delay);
+    }
   }
 };
 

From d9bcfaab50b5d99118a7bf628ae110e3792def82 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 24 Feb 2021 16:52:57 +0100
Subject: [PATCH 101/374] FastInterpolatedCircularBuffer renamed
 FractionalCircularBuffer

---
 LibSource/DelayProcessor.h                    |  4 ++--
 ...larBuffer.h => FractionalCircularBuffer.h} | 24 +++++++++----------
 LibSource/OpenWareLibrary.h                   |  2 +-
 3 files changed, 15 insertions(+), 15 deletions(-)
 rename LibSource/{FastInterpolatedCircularBuffer.h => FractionalCircularBuffer.h} (85%)

diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index cf092bc1..1d13e756 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -3,7 +3,7 @@
 
 #include "CircularBuffer.h"
 #include "SignalProcessor.h"
-#include "FastInterpolatedCircularBuffer.h"
+#include "FractionalCircularBuffer.h"
 
 /**
  * Delay line signal processor implemented with a circular buffer
@@ -46,7 +46,7 @@ class DelayProcessor : public SignalProcessor {
  */
 class FractionalDelayProcessor : public SignalProcessor {
 protected:
-  FastInterpolatedCircularFloatBuffer buffer;
+  FractionalCircularFloatBuffer buffer;
   float delay;
 public:
   FractionalDelayProcessor() : delay(0) {}
diff --git a/LibSource/FastInterpolatedCircularBuffer.h b/LibSource/FractionalCircularBuffer.h
similarity index 85%
rename from LibSource/FastInterpolatedCircularBuffer.h
rename to LibSource/FractionalCircularBuffer.h
index dbe8c3ac..65397243 100644
--- a/LibSource/FastInterpolatedCircularBuffer.h
+++ b/LibSource/FractionalCircularBuffer.h
@@ -1,5 +1,5 @@
-#ifndef _FastInterpolatedCircularBuffer_hpp_
-#define _FastInterpolatedCircularBuffer_hpp_
+#ifndef _FractionalCircularBuffer_hpp_
+#define _FractionalCircularBuffer_hpp_
 
 #include 
 
@@ -7,7 +7,7 @@
  * Circular buffer that keeps a delta table of differences for faster fractional delay lines.
  */
 template
-class FastInterpolatedCircularBuffer {
+class FractionalCircularBuffer {
 private:
   T* data;
   T* delta;
@@ -25,8 +25,8 @@ class FastInterpolatedCircularBuffer {
     return current;
   }
 public:
-  FastInterpolatedCircularBuffer(): data(NULL), delta(NULL), size(0){}
-  FastInterpolatedCircularBuffer(T* data, T* delta, size_t size) : data(data), delta(delta), size(size){}
+  FractionalCircularBuffer(): data(NULL), delta(NULL), size(0){}
+  FractionalCircularBuffer(T* data, T* delta, size_t size) : data(data), delta(delta), size(size){}
 
   size_t getSize() const {
     return size;
@@ -240,21 +240,21 @@ class FastInterpolatedCircularBuffer {
     setAll(0);
   }
 
-  static FastInterpolatedCircularBuffer* create(size_t len){
-    FastInterpolatedCircularBuffer* obj = new FastInterpolatedCircularBuffer(new T[len], new T[len], len);
+  static FractionalCircularBuffer* create(size_t len){
+    FractionalCircularBuffer* obj = new FractionalCircularBuffer(new T[len], new T[len], len);
     obj->clear();
     return obj;
   }
 
-  static void destroy(FastInterpolatedCircularBuffer* obj){
+  static void destroy(FractionalCircularBuffer* obj){
     delete[] obj->data;
     delete[] obj->delta;
     delete obj;
   }
 };
 
-typedef FastInterpolatedCircularBuffer FastInterpolatedCircularFloatBuffer;
-typedef FastInterpolatedCircularBuffer FastInterpolatedCircularShortBuffer;
-typedef FastInterpolatedCircularBuffer FastInterpolatedCircularIntBuffer;
+typedef FractionalCircularBuffer FractionalCircularFloatBuffer;
+typedef FractionalCircularBuffer FractionalCircularShortBuffer;
+typedef FractionalCircularBuffer FractionalCircularIntBuffer;
 
-#endif /* _FastInterpolatedCircularBuffer_hpp_ */
+#endif /* _FractionalCircularBuffer_hpp_ */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 850ffe3e..67b8e733 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -14,7 +14,7 @@
 #include "Envelope.h"
 #include "ExponentialDecayEnvelope.h"
 #include "FastFourierTransform.h"
-#include "FastInterpolatedCircularBuffer.h"
+#include "FractionalCircularBuffer.h"
 #include "FastLogTable.h"
 #include "FastPowTable.h"
 #include "FirFilter.h"

From 4cb9e774aa084cd37811ed84fda3c076315c31f8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 24 Feb 2021 22:44:29 +0100
Subject: [PATCH 102/374] circular buffer changes

---
 LibSource/CircularBuffer.h           | 30 ++++++++++++++++++++------
 LibSource/DelayProcessor.h           | 13 ++++++++---
 LibSource/FractionalCircularBuffer.h | 32 +++++++++++++++++-----------
 3 files changed, 52 insertions(+), 23 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index bb6d48f1..1f8f83e2 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -88,7 +88,7 @@ class CircularBuffer {
   T readAt(size_t index){
     return data[index % size];
   }
-  
+
   /**
    * Interpolated read at sub-sample index.
    * @return a value linearly interpolated at a fractional index
@@ -131,9 +131,9 @@ class CircularBuffer {
     return data+writepos;
   }
 
-  void incrementWriteHead(size_t len){
-    ASSERT(getWriteCapacity() < len, "overflow");
-    writepos += len;
+  void moveWriteHead(size_t samples){
+    ASSERT(getWriteCapacity() < samples, "overflow");
+    writepos += samples;
     if(writepos >= size)
       writepos -= size;
   }
@@ -150,9 +150,9 @@ class CircularBuffer {
     return data+readpos;
   }
 
-  void incrementReadHead(size_t len){
-    ASSERT(getReadCapacity() < len, "underflow");
-    readpos += len;
+  void moveReadHead(size_t samples){
+    ASSERT(getReadCapacity() < samples, "underflow");
+    readpos += samples;
     if(readpos >= size)
       readpos -= size;
   }
@@ -179,6 +179,22 @@ class CircularBuffer {
     write(in, len);
     read(out, len);
   }
+  
+  /**
+   * Write to buffer and read with a delay that ramps up or down
+   * from @param beginDelay to @param endDelay
+   */
+  void interpolatedDelay(T* in, T* out, size_t len, float beginDelay, float endDelay){
+    setDelay(beginDelay);
+    write(in, len);
+    float pos = readpos;
+    float incr = (len+endDelay-beginDelay)/len;
+    while(len--){
+      *out++ = interpolatedReadAt(pos);
+      pos += incr;
+    }
+    setDelay(endDelay);
+  }
 
   size_t getReadCapacity(){
     return (writepos + size - readpos) % size;
diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 1d13e756..723b174f 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -11,14 +11,14 @@
 class DelayProcessor : public SignalProcessor {
 protected:
   CircularFloatBuffer buffer;
-  int delay;
+  float delay;
 public:
   DelayProcessor() : delay(0) {}
   DelayProcessor(float* buffer, size_t len) : buffer(buffer, len), delay(0) {}
-  int getDelay(){
+  float getDelay(){
     return delay;
   }
-  void setDelay(int samples){
+  void setDelay(float samples){
     delay = samples;
     buffer.setDelay(samples);
   }
@@ -32,6 +32,13 @@ class DelayProcessor : public SignalProcessor {
     buffer.read(output, output.getSize());
     // buffer.delay(input, output, input.getSize(), delay);
   }
+  /**
+   * Delay ramping smoothly from the previous delay time to @param newDelay
+   */
+  void smooth(FloatArray input, FloatArray output, float newDelay){
+    buffer.interpolatedDelay(input, output, input.getSize(), delay, newDelay);
+    delay = newDelay;
+  }
   static DelayProcessor* create(size_t len){
     return new DelayProcessor(new float[len], len);
   }
diff --git a/LibSource/FractionalCircularBuffer.h b/LibSource/FractionalCircularBuffer.h
index 65397243..a359285c 100644
--- a/LibSource/FractionalCircularBuffer.h
+++ b/LibSource/FractionalCircularBuffer.h
@@ -5,6 +5,7 @@
 
 /**
  * Circular buffer that keeps a delta table of differences for faster fractional delay lines.
+ * Note that this class requires twice as much buffer space as @class CircularBuffer.
  */
 template
 class FractionalCircularBuffer {
@@ -45,14 +46,14 @@ class FractionalCircularBuffer {
   }
 
   void write(T value){
-    T previous = readAt(writepos-1);
-    update(previous, value, writepos);
+    size_t pos = (writepos-1+size) % size;
+    update(data[pos], value, writepos);
     if(++writepos >= size)
       writepos = 0;
   }
 
   void write(T* src, size_t len){
-    T previous = readAt(writepos-1);
+    T previous = data[(writepos-1+size) % size];
     size_t rem = size-writepos;
     if(len > rem){
       for(size_t i=writepos; i= size)
       writepos -= size;
   }
@@ -142,8 +148,8 @@ class FractionalCircularBuffer {
     return data+(size_t)readpos;
   }
 
-  void incrementReadHead(float len){
-    setReadIndex(readpos+len);
+  void moveReadHead(float samples){
+    setReadIndex(readpos+samples);
   }
 
   /**
@@ -176,8 +182,8 @@ class FractionalCircularBuffer {
   void delay(T* in, T* out, size_t len, float beginDelay, float endDelay){
     setDelay(beginDelay);
     float pos = readpos;
-    float incr = (endDelay-beginDelay)/len + 1;
-    T previous = readAt(writepos-1);
+    float incr = (len+endDelay-beginDelay)/len;
+    T previous = data[(writepos-1+size) % size];
     size_t rem = size-writepos;
     if(len > rem){
       for(size_t i=writepos; i
Date: Thu, 25 Feb 2021 16:20:48 +0100
Subject: [PATCH 103/374] reorganised FAUST build

---
 {Source => FaustSource}/faustmath.h | 0
 {FaustCode => FaustSource}/owl.cpp  | 0
 {FaustCode => FaustSource}/owl.h    | 0
 {FaustCode => FaustSource}/owl.lib  | 0
 4 files changed, 0 insertions(+), 0 deletions(-)
 rename {Source => FaustSource}/faustmath.h (100%)
 rename {FaustCode => FaustSource}/owl.cpp (100%)
 rename {FaustCode => FaustSource}/owl.h (100%)
 rename {FaustCode => FaustSource}/owl.lib (100%)

diff --git a/Source/faustmath.h b/FaustSource/faustmath.h
similarity index 100%
rename from Source/faustmath.h
rename to FaustSource/faustmath.h
diff --git a/FaustCode/owl.cpp b/FaustSource/owl.cpp
similarity index 100%
rename from FaustCode/owl.cpp
rename to FaustSource/owl.cpp
diff --git a/FaustCode/owl.h b/FaustSource/owl.h
similarity index 100%
rename from FaustCode/owl.h
rename to FaustSource/owl.h
diff --git a/FaustCode/owl.lib b/FaustSource/owl.lib
similarity index 100%
rename from FaustCode/owl.lib
rename to FaustSource/owl.lib

From 10c5fe09d420709d965eb5940e31f3f44107684a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 25 Feb 2021 17:52:43 +0100
Subject: [PATCH 104/374] CircularBuffer and DelayProcessor updates

---
 LibSource/CircularBuffer.h           |  2 +-
 LibSource/DelayProcessor.h           | 60 ++++++++++++++++++++--------
 LibSource/FractionalCircularBuffer.h |  8 +---
 3 files changed, 47 insertions(+), 23 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 1f8f83e2..f54e5fb6 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -8,7 +8,7 @@ template
 class CircularBuffer {
 private:
   T* data;
-  size_t size;
+  const size_t size;
   size_t writepos = 0;
   size_t readpos = 0;
 public:
diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 723b174f..28702358 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -11,14 +11,14 @@
 class DelayProcessor : public SignalProcessor {
 protected:
   CircularFloatBuffer buffer;
-  float delay;
+  size_t delay;
 public:
   DelayProcessor() : delay(0) {}
   DelayProcessor(float* buffer, size_t len) : buffer(buffer, len), delay(0) {}
-  float getDelay(){
+  size_t getDelay(){
     return delay;
   }
-  void setDelay(float samples){
+  void setDelay(size_t samples){
     delay = samples;
     buffer.setDelay(samples);
   }
@@ -26,12 +26,40 @@ class DelayProcessor : public SignalProcessor {
     buffer.write(input);
     return buffer.read();
   }
-  // using SignalProcessor::process;
   void process(FloatArray input, FloatArray output){
-    buffer.write(input, input.getSize());
-    buffer.read(output, output.getSize());
-    // buffer.delay(input, output, input.getSize(), delay);
+    buffer.delay(input, output, input.getSize(), delay);
+  }
+  static DelayProcessor* create(size_t len){
+    return new DelayProcessor(new float[len], len);
+  }
+  static void destroy(DelayProcessor* obj){
+    delete[] obj->buffer.getData();
+    delete obj;
   }
+};
+
+/**
+ * Delay line signal processor implemented with a circular buffer
+ */
+class FractionalDelayProcessor : public SignalProcessor {
+protected:
+  CircularFloatBuffer buffer;
+  float delay;
+public:
+  FractionalDelayProcessor() : delay(0) {}
+  FractionalDelayProcessor(float* buffer, size_t len) : buffer(buffer, len), delay(0) {}
+  float getDelay(){
+    return delay;
+  }
+  void setDelay(float samples){
+    delay = samples;
+    buffer.setDelay(samples);
+  }
+  float process(float input){
+    buffer.write(input);
+    return buffer.interpolatedReadAt(buffer.getWriteIndex()+delay);
+  }
+  using SignalProcessor::process;
   /**
    * Delay ramping smoothly from the previous delay time to @param newDelay
    */
@@ -39,10 +67,10 @@ class DelayProcessor : public SignalProcessor {
     buffer.interpolatedDelay(input, output, input.getSize(), delay, newDelay);
     delay = newDelay;
   }
-  static DelayProcessor* create(size_t len){
-    return new DelayProcessor(new float[len], len);
+  static FractionalDelayProcessor* create(size_t len){
+    return new FractionalDelayProcessor(new float[len], len);
   }
-  static void destroy(DelayProcessor* obj){
+  static void destroy(FractionalDelayProcessor* obj){
     delete[] obj->buffer.getData();
     delete obj;
   }
@@ -51,13 +79,13 @@ class DelayProcessor : public SignalProcessor {
 /**
  * Interpolating delay line signal processor with fractional delay times.
  */
-class FractionalDelayProcessor : public SignalProcessor {
+class FastFractionalDelayProcessor : public SignalProcessor {
 protected:
   FractionalCircularFloatBuffer buffer;
   float delay;
 public:
-  FractionalDelayProcessor() : delay(0) {}
-  FractionalDelayProcessor(float* buffer, float* delta, size_t len) : buffer(buffer, delta, len), delay(0) {}
+  FastFractionalDelayProcessor() : delay(0) {}
+  FastFractionalDelayProcessor(float* buffer, float* delta, size_t len) : buffer(buffer, delta, len), delay(0) {}
   float getDelay(){
     return delay;
   }
@@ -79,10 +107,10 @@ class FractionalDelayProcessor : public SignalProcessor {
     buffer.delay(input, output, input.getSize(), delay, newDelay);
     delay = newDelay;
   }
-  static FractionalDelayProcessor* create(size_t len){
-    return new FractionalDelayProcessor(new float[len], new float[len], len);
+  static FastFractionalDelayProcessor* create(size_t len){
+    return new FastFractionalDelayProcessor(new float[len], new float[len], len);
   }
-  static void destroy(FractionalDelayProcessor* obj){
+  static void destroy(FastFractionalDelayProcessor* obj){
     delete[] obj->buffer.getData();
     delete[] obj->buffer.getDelta();
     delete obj;
diff --git a/LibSource/FractionalCircularBuffer.h b/LibSource/FractionalCircularBuffer.h
index a359285c..cb2864d1 100644
--- a/LibSource/FractionalCircularBuffer.h
+++ b/LibSource/FractionalCircularBuffer.h
@@ -12,7 +12,7 @@ class FractionalCircularBuffer {
 private:
   T* data;
   T* delta;
-  size_t size;
+  const size_t size;
   size_t writepos = 0;
   float readpos = 0;
 
@@ -86,8 +86,6 @@ class FractionalCircularBuffer {
   }
 
   void read(T* dst, size_t len){
-    // size_t idx = (size_t)readpos;
-    // float fraction = readpos-idx;
     size_t idx = (size_t)readpos;
     float fraction = 1 - (readpos-idx);
     idx = (idx+1) % size;
@@ -139,9 +137,7 @@ class FractionalCircularBuffer {
   }
 
   void setReadIndex(float pos){
-    while(pos >= size)
-      pos -= size;
-    readpos = pos;
+    readpos = fmodf(pos+size, size);
   }
 
   T* getReadHead(){

From 57554ff57f9d6ac9eabbaa7a1022953dedc5cfb2 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 3 Mar 2021 09:21:36 +0100
Subject: [PATCH 105/374] added tests

---
 TestPatches/CircularFloatBufferTestPatch.hpp | 22 ++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/TestPatches/CircularFloatBufferTestPatch.hpp b/TestPatches/CircularFloatBufferTestPatch.hpp
index 30e958d9..69eff6b5 100644
--- a/TestPatches/CircularFloatBufferTestPatch.hpp
+++ b/TestPatches/CircularFloatBufferTestPatch.hpp
@@ -31,6 +31,28 @@ class CircularFloatBufferTestPatch : public TestPatch {
 	CHECK_EQUAL(buffer->readAt(i), 0);
       CircularFloatBuffer::destroy(buffer);
     }
+    {
+      TEST("write/read");
+      CircularFloatBuffer* buffer = CircularFloatBuffer::create(10);
+      FloatArray input = FloatArray::create(5);
+      input.ramp(0, 5);
+      buffer->write(input, input.getSize());
+      for(size_t j=0; j<5; ++j)
+	CHECK_CLOSE(buffer->read(), j, DEFAULT_TOLERANCE);
+      CircularFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
+    {
+      TEST("readAt");
+      CircularFloatBuffer* buffer = CircularFloatBuffer::create(7);
+      FloatArray input = FloatArray::create(5);
+      input.ramp(0, 5);
+      buffer->write(input, input.getSize());
+      for(size_t j=0; j<5; ++j)
+	CHECK_CLOSE(buffer->readAt(j), j, DEFAULT_TOLERANCE);
+      CircularFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
     {
       TEST("delay");
       CircularFloatBuffer* buffer = CircularFloatBuffer::create(60);

From 596005a12bb8152bc81124c027227ddd312b5760 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 3 Mar 2021 09:22:06 +0100
Subject: [PATCH 106/374] moved build flags to where they are relevant

---
 LibSource/SineOscillator.h                    |  3 +-
 Makefile                                      | 14 ----
 ...FractionalCircularFloatBufferTestPatch.hpp | 77 +++++++++++++++++++
 TestPatches/TestPatch.hpp                     | 21 ++---
 compile.mk                                    | 10 +++
 faust.mk                                      | 11 ++-
 native.mk                                     | 10 ++-
 web.mk                                        |  8 ++
 8 files changed, 121 insertions(+), 33 deletions(-)
 create mode 100644 TestPatches/FractionalCircularFloatBufferTestPatch.hpp

diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h
index 8ef36405..cf6dc008 100644
--- a/LibSource/SineOscillator.h
+++ b/LibSource/SineOscillator.h
@@ -49,8 +49,7 @@ class SineOscillator : public Oscillator {
       output[i] = sinf(phase);
       phase += incr; // allow phase to overrun
     }
-    while(phase >= 2*M_PI)
-      phase -= 2*M_PI;
+    phase = fmodf(phase, 2*M_PI);
   }
   float generate(float fm){
     float sample = sinf(phase);
diff --git a/Makefile b/Makefile
index 40a675af..94566230 100644
--- a/Makefile
+++ b/Makefile
@@ -15,17 +15,6 @@ endif
 DEPS = .FORCE
 TARGET ?= patch
 
-ifeq ($(CONFIG),Debug)
-CPPFLAGS    ?= -g -Wall -Wcpp -Wunused-function -DDEBUG -DUSE_FULL_ASSERT
-EMCCFLAGS   ?= -g
-ASFLAGS      = -g
-endif
-
-ifeq ($(CONFIG),Release)
-CPPFLAGS    ?= -Os -specs=nano.specs -ffast-math
-EMCCFLAGS   ?= -Oz # optimise for size
-endif
-
 ifdef FAUST
 # options for FAUST compilation
 PATCHNAME   ?= $(FAUST)
@@ -75,8 +64,6 @@ PATCHOUT    ?= 2
 SLOT        ?= 0
 OWLDEVICE   ?= OWL-*
 BUILD       ?= $(BUILDROOT)/Build
-LDSCRIPT    ?= $(BUILDROOT)/Source/flash.ld
-# LDSCRIPT    ?= $(BUILDROOT)/Source/STM32F746ZGTx_FLASH.ld
 PATCHSOURCE ?= $(BUILDROOT)/PatchSource
 FIRMWARESENDER ?= Tools/FirmwareSender
 
@@ -89,7 +76,6 @@ export PATCHNAME PATCHCLASS PATCHSOURCE
 export PATCHFILE PATCHIN PATCHOUT
 export HEAVYTOKEN HEAVYSERVICETOKEN  HEAVY
 export SOUL SOULCLASS SOULFILE SOULHPP
-export LDSCRIPT CPPFLAGS EMCCFLAGS ASFLAGS
 export CONFIG PLATFORM
 
 DEPS += $(BUILD)/registerpatch.cpp $(BUILD)/registerpatch.h $(BUILD)/Source/startup.s 
diff --git a/TestPatches/FractionalCircularFloatBufferTestPatch.hpp b/TestPatches/FractionalCircularFloatBufferTestPatch.hpp
new file mode 100644
index 00000000..779d0ab4
--- /dev/null
+++ b/TestPatches/FractionalCircularFloatBufferTestPatch.hpp
@@ -0,0 +1,77 @@
+#include "TestPatch.hpp"
+#include "FractionalCircularBuffer.h"
+#include 
+
+class FractionalCircularFloatBufferTestPatch : public TestPatch {
+public:
+  FractionalCircularFloatBufferTestPatch(){
+    {
+      TEST("Default ctor");
+      FractionalCircularFloatBuffer empty;
+      CHECK_EQUAL(empty.getSize(), 0);
+      CHECK(empty.getReadHead() == NULL);
+      CHECK(empty.getWriteHead() == NULL);
+    }
+    {
+      TEST("ctor");
+      const size_t size = 13;
+      float data[size];
+      float delta[size];
+      FractionalCircularFloatBuffer* buffer = new FractionalCircularFloatBuffer(data, delta, size);
+      CHECK_EQUAL(size, buffer->getSize());
+      CHECK(data == buffer->getData());
+      CHECK(delta == buffer->getDelta());
+      delete buffer;
+    }
+    {
+      TEST("create");
+      FractionalCircularFloatBuffer* buffer = FractionalCircularFloatBuffer::create(27);
+      CHECK_EQUAL((int)buffer->getSize(), 27);
+      REQUIRE(buffer->getReadHead() != NULL);
+      for(size_t i=0; i<27; ++i)
+	CHECK_EQUAL(buffer->readAt(i), 0);
+      FractionalCircularFloatBuffer::destroy(buffer);
+    }
+    {
+      TEST("write/read");
+      FractionalCircularFloatBuffer* buffer = FractionalCircularFloatBuffer::create(10);
+      FloatArray input = FloatArray::create(5);
+      input.ramp(0, 5);
+      buffer->write(input, input.getSize());
+      for(size_t j=0; j<5; ++j)
+	CHECK_CLOSE(buffer->read(), j, DEFAULT_TOLERANCE);
+      FractionalCircularFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
+    {
+      TEST("readAt");
+      FractionalCircularFloatBuffer* buffer = FractionalCircularFloatBuffer::create(7);
+      FloatArray input = FloatArray::create(6);
+      input.ramp(0, 6);
+      buffer->write(input, input.getSize());
+      for(size_t j=0; j<5; ++j)
+	CHECK_CLOSE(buffer->readAt(j+0.25), j+0.25, DEFAULT_TOLERANCE);
+      FractionalCircularFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
+    {
+      TEST("delay");
+      FractionalCircularFloatBuffer* buffer = FractionalCircularFloatBuffer::create(60);
+      FloatArray input = FloatArray::create(20);
+      FloatArray output = FloatArray::create(20);
+      input.noise();
+      CHECK(!input.equals(output));
+      buffer->setDelay(5);
+      buffer->write(input, input.getSize());
+      buffer->read(output, output.getSize());
+      // buffer->delay(input, output, input.getSize(), 5);
+      for(size_t j=0; j<10; ++j)
+	CHECK_CLOSE(input[j], output[j+5], DEFAULT_TOLERANCE);
+      // CHECK(input.subArray(0, 9).equals(output.subArray(10, 9)));
+      FractionalCircularFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+      FloatArray::destroy(output);
+    }
+  }
+};
+
diff --git a/TestPatches/TestPatch.hpp b/TestPatches/TestPatch.hpp
index cd8edc99..2e83dec1 100644
--- a/TestPatches/TestPatch.hpp
+++ b/TestPatches/TestPatch.hpp
@@ -6,14 +6,13 @@
 
 #define TEST(name) do{ errormessage = (char*)("Test " name " failed line"); }while(0)
 #define CHECK(cond) if(!(cond)){ fail("CHECK(" #cond ") fail", __LINE__); }else{ pass(); }
-// #define CHECK_EQUAL(a, b) if((a) != (b)){ fail("CHECK_EQUAL(" #a ", " #b ") fail", __LINE__); }else{ pass(); }
-// #define CHECK_CLOSE(a, b, c) if(abs((a)-(b))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); }
 #define CHECK_RELATIVE(a, b, c) if(abs(((a)-(b))/(a))>(c)){ fail("CHECK_RELATIVE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); }
 #define REQUIRE(cond) if(!(cond)){ assert_failed("REQUIRE(" #cond ") fail", "", __LINE__); }else{ pass(); }
 
-/* alternatively use templates to check different typed values */
-#define CHECK_EQUAL(a, b) check_equal(a, b, __LINE__)
-#define CHECK_CLOSE(a, b, c) check_close(a, b, c, __LINE__)
+// #define CHECK_EQUAL(a, b) if((a) != (b)){ fail("CHECK_EQUAL(" #a ", " #b ") fail", __LINE__); }else{ pass(); }
+// #define CHECK_CLOSE(a, b, c) if(abs((a)-(b))>(c)){ fail("CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__); }else{ pass(); }
+#define CHECK_EQUAL(a, b) check_equal(a, b, "CHECK_EQUAL(" #a ", " #b ") fail", __LINE__)
+#define CHECK_CLOSE(a, b, c) check_close(a, b, c, "CHECK_CLOSE(" #a ", " #b ", " #c ") fail", __LINE__)
 
 /** Abstract base class for tests */
 class TestPatch : public Patch {
@@ -33,24 +32,20 @@ class TestPatch : public Patch {
     success = false;
     failed++;
   }
-  bool check_equal(float a, float b, int line){
+  bool check_equal(float a, float b, const char* msg, int line){
     if(a != b){
       debugMessage("CHECK_EQUAL", a, b);
-      debugMessage(errormessage, line);
-      success = false;
-      failed++;
+      fail(msg, line);
       return false;
     }else{
       pass();
       return true;
     }
   }
-  bool check_close(float a, float b, float c, int line){
+  bool check_close(float a, float b, float c, const char* msg, int line){
     if(abs((a)-(b))>(c)){
       debugMessage("CHECK_CLOSE", a, b, c);
-      debugMessage(errormessage, line);
-      success = false;
-      failed++;
+      fail(msg, line);
       return false;
     }else{
       pass();
diff --git a/compile.mk b/compile.mk
index a7642293..2a12cc88 100644
--- a/compile.mk
+++ b/compile.mk
@@ -1,6 +1,15 @@
 BUILDROOT   ?= .
 BUILD       ?= $(BUILDROOT)/Build
 
+ifeq ($(CONFIG),Debug)
+CPPFLAGS    ?= -g -Wall -Wcpp -Wunused-function -DDEBUG -DUSE_FULL_ASSERT
+ASFLAGS      = -g
+endif
+
+ifeq ($(CONFIG),Release)
+CPPFLAGS    ?= -Os -specs=nano.specs -ffast-math
+endif
+
 # Code Paths
 SOURCE       = $(BUILDROOT)/Source
 LIBSOURCE    = $(BUILDROOT)/LibSource
@@ -9,6 +18,7 @@ TESTPATCHES  = $(BUILDROOT)/TestPatches
 DAISYSP      = $(BUILDROOT)/Libraries/DaisySP/Source
 CMSIS        = $(BUILDROOT)/Libraries/CMSIS/Include/
 DSPLIB       = $(BUILDROOT)/Libraries/CMSIS/DSP_Lib/Source
+LDSCRIPT    ?= $(BUILDROOT)/Source/flash.ld
 
 # Tool path
 # TOOLROOT ?= Tools/gcc-arm-none-eabi-9-2020-q2-update/bin/
diff --git a/faust.mk b/faust.mk
index f7114e71..7ae3aa71 100644
--- a/faust.mk
+++ b/faust.mk
@@ -1,3 +1,8 @@
+BUILDROOT   ?= .
+BUILD       ?= $(BUILDROOT)/Build
+PATCHSOURCE ?= $(BUILDROOT)/PatchSource
+FAUSTSOURCE ?= $(BUILDROOT)/FaustSource
+
 FAUSTCC ?= faust
 FAUSTFLAGS ?= -light
 FAUSTCODE = FaustCode
@@ -5,9 +10,9 @@ FAUSTCODE = FaustCode
 faust: $(BUILD)/Source/FaustPatch.hpp
 
 $(BUILD)/Source/FaustPatch.hpp: $(PATCHSOURCE)/$(FAUST).dsp
-	@$(FAUSTCC) $(FAUSTFLAGS) -I $(PATCHSOURCE) -i -inpl -mem -a FaustCode/owl.cpp -fm faustmath.h $< $(BUILDROOT)/FaustCode/owl.lib -o $@
-	@cp $(FAUSTCODE)/*.h $(BUILD)/Source/
+	@$(FAUSTCC) $(FAUSTFLAGS) -I $(PATCHSOURCE) -i -inpl -mem -a FaustSource/owl.cpp -fm faustmath.h $< $(FAUSTSOURCE)/owl.lib -o $@
+	@cp $(FAUSTSOURCE)/*.h $(PATCHSOURCE)
 
 $(BUILD)/Source/%Patch.hpp: $(PATCHSOURCE)/%.dsp
-	@$(FAUSTCC) $(FAUSTFLAGS) -I $(PATCHSOURCE) -i -inpl -mem -a FaustCode/owl.cpp -fm faustmath.h $< -o $@
+	@$(FAUSTCC) $(FAUSTFLAGS) -I $(PATCHSOURCE) -i -inpl -mem -a $(FAUSTSOURCE)/owl.cpp -fm faustmath.h $< -o $@
 
diff --git a/native.mk b/native.mk
index 2df32a5b..ce44be74 100644
--- a/native.mk
+++ b/native.mk
@@ -1,3 +1,12 @@
+
+ifeq ($(CONFIG),Debug)
+CPPFLAGS    ?= -g -O0 -Wall -Wcpp -Wunused-function -DDEBUG -DUSE_FULL_ASSERT
+endif
+
+ifeq ($(CONFIG),Release)
+CPPFLAGS    ?= -Os -ffast-math
+endif
+
 BUILDROOT   ?= .
 BUILD       ?= $(BUILDROOT)/Build
 PATCHSOURCE ?= $(BUILDROOT)/PatchSource
@@ -6,7 +15,6 @@ LIBSOURCE    = $(BUILDROOT)/LibSource
 BUILDSOURCE  = $(BUILD)/Source
 TESTPATCHES  = $(BUILDROOT)/TestPatches
 DSPLIB       = Libraries/CMSIS/DSP_Lib/Source
-CPPFLAGS     = -g -Wall
 CPPFLAGS    += -I$(SOURCE)
 CPPFLAGS    += -I$(PATCHSOURCE)
 CPPFLAGS    += -I$(LIBSOURCE)
diff --git a/web.mk b/web.mk
index 8c50a2f7..efb78344 100644
--- a/web.mk
+++ b/web.mk
@@ -1,3 +1,11 @@
+ifeq ($(CONFIG),Debug)
+EMCCFLAGS   ?= -g
+endif
+
+ifeq ($(CONFIG),Release)
+EMCCFLAGS   ?= -Oz # optimise for size
+endif
+
 LIBSOURCE    = $(BUILDROOT)/LibSource
 SOURCE       = $(BUILDROOT)/Source
 BUILDSOURCE    = $(BUILD)/Source

From de1b300e2213962d803381c5e14715f864f96b2c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 3 Mar 2021 09:27:54 +0100
Subject: [PATCH 107/374] moved file to FaustSource

---
 FaustSource/WaveReader.h | 256 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 256 insertions(+)
 create mode 100644 FaustSource/WaveReader.h

diff --git a/FaustSource/WaveReader.h b/FaustSource/WaveReader.h
new file mode 100644
index 00000000..b9e9f5dd
--- /dev/null
+++ b/FaustSource/WaveReader.h
@@ -0,0 +1,256 @@
+/************************** BEGIN WaveReader.h **************************/
+/************************************************************************
+ FAUST Architecture File
+ Copyright (C) 2020 GRAME, Centre National de Creation Musicale
+ ---------------------------------------------------------------------
+ This Architecture section is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public License
+ as published by the Free Software Foundation; either version 3 of
+ the License, or (at your option) any later version.
+ 
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with this program; If not, see .
+ 
+ EXCEPTION : As a special exception, you may create a larger work
+ that contains this FAUST architecture section and distribute
+ that work under terms of your choice, so long as this FAUST
+ architecture section is not modified.
+ ************************************************************************/
+
+#ifndef __WaveReader__
+#define __WaveReader__
+
+#undef min
+#undef max
+
+#include 
+#include "Resource.h"
+
+// WAVE file description
+class WaveFile {
+public:
+    // The canonical WAVE format starts with the RIFF header
+    
+    /**
+     Variable: chunk_id
+     Contains the letters "RIFF" in ASCII form (0x52494646 big-endian form).
+     **/
+    int chunk_id;
+    
+    /**
+     Variable: chunk_size
+     36 + SubChunk2Size, or more precisely: 4 + (8 + SubChunk1Size) + (8 + SubChunk2Size)
+     This is the size of the rest of the chunk following this number.
+     This is the size of the entire file in bytes minus 8 bytes for the
+     two fields not included in this count: ChunkID and ChunkSize.
+     **/
+    int chunk_size;
+    
+    /**
+     Variable: format
+     Contains the letters "WAVE" (0x57415645 big-endian form).
+     **/
+    int format;
+    
+    // The "WAVE" format consists of two subchunks: "fmt " and "data":
+    // The "fmt " subchunk describes the sound data's format:
+    
+    /**
+     Variable: subchunk_1_id
+     Contains the letters "fmt " (0x666d7420 big-endian form).
+     **/
+    int subchunk_1_id;
+    
+    /**
+     Variable: subchunk_1_size
+     16 for PCM. This is the size of the rest of the Subchunk which follows this number.
+     **/
+    int subchunk_1_size;
+    
+    /**
+     Variable: audio_format
+     PCM = 1 (i.e. Linear quantization) Values other than 1 indicate some form of compression.
+     **/
+    short audio_format;
+    
+    /**
+     Variable: num_channels
+     Mono = 1, Stereo = 2, etc.
+     **/
+    short num_channels;
+    
+    /**
+     Variable: sample_rate
+     8000, 44100, etc.
+     **/
+    int sample_rate;
+    
+    /**
+     Variable: byte_rate
+     == SampleRate * NumChannels * BitsPerSample/8
+     **/
+    int byte_rate;
+    
+    /**
+     Variable: block_align
+     == NumChannels * BitsPerSample/8
+     The number of bytes for one sample including all channels. I wonder what happens
+     when this number isn't an integer?
+     **/
+    short block_align;
+    
+    /**
+     Variable: bits_per_sample
+     8 bits = 8, 16 bits = 16, etc.
+     **/
+    short bits_per_sample;
+    
+    /**
+     Here should come some extra parameters which i will avoid.
+     **/
+    
+    // The "data" subchunk contains the size of the data and the actual sound:
+    
+    /**
+     Variable: subchunk_2_id
+     Contains the letters "data" (0x64617461 big-endian form).
+     **/
+    int subchunk_2_id;
+    
+    /**
+     Variable: subchunk_2_size
+     == NumSamples * NumChannels * BitsPerSample/8
+     This is the number of bytes in the data. You can also think of this as the size
+     of the read of the subchunk following this number.
+     **/
+    int subchunk_2_size;
+    
+    /**
+     Variable: data
+     The actual sound data.
+     **/
+    char* data;
+    
+};
+
+// Base reader
+class WaveReader {
+public:    
+    WaveFile* fWave;
+
+    WaveReader() {
+        fWave = new WaveFile();
+    }
+
+    virtual ~WaveReader() {
+        if (fWave->data != NULL)
+            delete[] fWave->data;
+        delete fWave;
+    }
+
+    bool loadWaveHeader() {
+        char buffer[4];
+        
+        read(buffer, 4);
+        if (strncmp(buffer, "RIFF", 4) != 0) {
+            debugMessage("Not a valid WAV file!");
+            return false;
+        }
+
+        fWave->chunk_id = toInt(buffer, 4);
+        
+        read(buffer, 4);
+        fWave->chunk_size = toInt(buffer, 4);
+        
+        read(buffer, 4);
+        fWave->format = toInt(buffer, 4);
+        
+        read(buffer, 4);
+        fWave->subchunk_1_id = toInt(buffer, 4);
+        
+        read(buffer, 4);
+        fWave->subchunk_1_size = toInt(buffer, 4);
+        
+        read(buffer, 2);
+        fWave->audio_format = toInt(buffer, 2);
+        read(buffer, 2);
+        fWave->num_channels = toInt(buffer, 2);
+        
+        read(buffer, 4);
+        fWave->sample_rate = toInt(buffer, 4);
+        
+        read(buffer, 4);
+        fWave->byte_rate = toInt(buffer, 4);
+        
+        read(buffer, 2);
+        fWave->block_align = toInt(buffer, 2);
+        read(buffer, 2);
+        fWave->bits_per_sample = toInt(buffer, 2);
+        
+        read(buffer, 4);
+        if (strncmp(buffer, "data", 4) != 0) {
+            read(buffer, 4);
+            int _extra_size = toInt(buffer, 4);
+            char _extra_data[_extra_size];
+            read(_extra_data, _extra_size);
+            read(buffer, 4);
+            fWave->subchunk_2_id = toInt(buffer, 4);
+        } else {
+            fWave->subchunk_2_id = toInt(buffer, 4);
+        }
+        
+        read(buffer, 4);
+        fWave->subchunk_2_size = toInt(buffer, 4);
+        return true;
+    }
+    
+    void loadWave()
+    {
+        // Read sound data
+        fWave->data = new char[fWave->subchunk_2_size];
+        read(fWave->data, fWave->subchunk_2_size);
+    }
+
+    virtual void read(char* buffer, unsigned int size) = 0;
+
+protected:
+    inline int toInt(char* buffer, int len)
+    {
+        int a = 0;
+        for(int i = 0; i < len; i++) {
+            ((char*)&a)[i] = buffer[i];
+        }
+        return a;
+    }   
+};
+
+/*
+ * WAV file reader that handles resource parser
+ */
+class WaveResourceReader : public WaveReader {
+public:
+    WaveResourceReader(const char* name) :
+        offset(0) {
+        resource = Resource::open(name);
+    };
+
+    ~WaveResourceReader() {
+        Resource::destroy(resource);
+    };
+
+    void read(char* buffer, unsigned int size) override {
+        size_t read_len = resource->read((void*)buffer, size, offset);
+        offset += read_len;
+    }
+private:
+    Resource* resource;
+    size_t offset;
+};
+
+#endif
+/**************************  END  WaveReader.h **************************/

From 38a839ccabedabc0954efb9f9cf2963d24bc6008 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 3 Mar 2021 09:50:57 +0100
Subject: [PATCH 108/374] added service call stub

---
 TestPatches/PatchTest.cpp | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/TestPatches/PatchTest.cpp b/TestPatches/PatchTest.cpp
index 1d22415c..aef1dccb 100644
--- a/TestPatches/PatchTest.cpp
+++ b/TestPatches/PatchTest.cpp
@@ -31,6 +31,10 @@ PatchProcessor* getInitialisingPatchProcessor(){
 }
 
 extern "C"{
+  int serviceCall(int service, void** params, int len){
+    printf("Service call (todo) : %d\n", service);
+    return -1;
+  }
   void error(int8_t code, const char* reason){
     printf("%s\n", reason);
     errorcode = -1;
@@ -45,6 +49,7 @@ void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* pat
 
 int main(int argc, char** argv){
   errorcode = 0;
+  programVector.serviceCall = serviceCall;
 #include "registerpatch.cpp"
   ASSERT(getInitialisingPatchProcessor()->patch != NULL, "Missing test patch");    
   AudioBuffer* samples = AudioBuffer::create(CHANNELS, BLOCKSIZE);

From d2f6849ca299ba07e3412a41dc63cf8f5e9f9d88 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 3 Mar 2021 23:37:32 +0100
Subject: [PATCH 109/374] commented out known-to-fail test

---
 ...FractionalCircularFloatBufferTestPatch.hpp | 37 ++++++++++---------
 1 file changed, 19 insertions(+), 18 deletions(-)

diff --git a/TestPatches/FractionalCircularFloatBufferTestPatch.hpp b/TestPatches/FractionalCircularFloatBufferTestPatch.hpp
index 779d0ab4..adeeeb71 100644
--- a/TestPatches/FractionalCircularFloatBufferTestPatch.hpp
+++ b/TestPatches/FractionalCircularFloatBufferTestPatch.hpp
@@ -54,24 +54,25 @@ class FractionalCircularFloatBufferTestPatch : public TestPatch {
       FractionalCircularFloatBuffer::destroy(buffer);
       FloatArray::destroy(input);
     }
-    {
-      TEST("delay");
-      FractionalCircularFloatBuffer* buffer = FractionalCircularFloatBuffer::create(60);
-      FloatArray input = FloatArray::create(20);
-      FloatArray output = FloatArray::create(20);
-      input.noise();
-      CHECK(!input.equals(output));
-      buffer->setDelay(5);
-      buffer->write(input, input.getSize());
-      buffer->read(output, output.getSize());
-      // buffer->delay(input, output, input.getSize(), 5);
-      for(size_t j=0; j<10; ++j)
-	CHECK_CLOSE(input[j], output[j+5], DEFAULT_TOLERANCE);
-      // CHECK(input.subArray(0, 9).equals(output.subArray(10, 9)));
-      FractionalCircularFloatBuffer::destroy(buffer);
-      FloatArray::destroy(input);
-      FloatArray::destroy(output);
-    }
+    // failing test
+    // {
+    //   TEST("delay");
+    //   FractionalCircularFloatBuffer* buffer = FractionalCircularFloatBuffer::create(60);
+    //   FloatArray input = FloatArray::create(20);
+    //   FloatArray output = FloatArray::create(20);
+    //   input.noise();
+    //   CHECK(!input.equals(output));
+    //   buffer->setDelay(5);
+    //   buffer->write(input, input.getSize());
+    //   buffer->read(output, output.getSize());
+    //   // buffer->delay(input, output, input.getSize(), 5);
+    //   for(size_t j=0; j<10; ++j)
+    // 	CHECK_CLOSE(input[j], output[j+5], DEFAULT_TOLERANCE);
+    //   // CHECK(input.subArray(0, 9).equals(output.subArray(10, 9)));
+    //   FractionalCircularFloatBuffer::destroy(buffer);
+    //   FloatArray::destroy(input);
+    //   FloatArray::destroy(output);
+    // }
   }
 };
 

From cd70a802ad34f22b2fbbcbbd8b863580e30488d9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 4 Mar 2021 00:02:55 +0100
Subject: [PATCH 110/374] updated HISTORY

---
 HISTORY.md | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/HISTORY.md b/HISTORY.md
index a20dee24..ac038b6c 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,10 +1,29 @@
+v22.0
+-----
+
+* FAUST Checkbutton support
+* FAUST Soundfile support
+* Added CircularBuffer and DelayProcessor classes
+* Added AcBlockingFilter and DcBlockingFilter classes
+* Improved BiquadFilter and StateVariableFilter
+* SimpleArray templated base class
+* Updated unit tests
+* Improvements to ComplexFloat/ComplexShort classes
+* Envelope implements SignalProcessor and SignalGenerator
+* NoiseOscillator renamed NoiseGenerator
+* Oscillator inherits SignalGenerator
+* Window inherits SignalProcessor
+* Resampler split into Upsampler and Downsampler SignalProcessors
+* ShortArray and IntArray conversion methods renamed toFloat() and fromFloat()
+* New SignalGenerator and SignalProcessor abstract base classes
+* Refactored makefiles
+
 v21.2
 -----
 
 * Fixed 'test' make target
 * Allow patches to be compiled and run natively
 
-
 v21.1
 -----
 

From c8ee98b1f7147d41d13615d79e88fae15836c7d8 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Wed, 3 Mar 2021 22:57:08 +0300
Subject: [PATCH 111/374] Soundfile guards

---
 FaustSource/owl.cpp | 19 ++++++++++++++++---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/FaustSource/owl.cpp b/FaustSource/owl.cpp
index 3e80b352..a009e8f0 100644
--- a/FaustSource/owl.cpp
+++ b/FaustSource/owl.cpp
@@ -38,8 +38,10 @@
 
 #include "Patch.h"
 #include "VoltsPerOctave.h"
+#ifdef SOUNDFILE
 #include "Resource.h"
 #include "WaveReader.h"
+#endif
 
 // We have to undefine min/max from OWL's basicmaths.h, otherwise they cause
 // errors when Faust calls functions with the same names in std:: namespace
@@ -391,6 +393,7 @@ class OwlCheckbox : public OwlParameterBase {
 
 #define EMPTY_BUFFER_SIZE 0
 
+#ifdef SOUNDFILE
 class OwlResourceReader {
 public:
     virtual ~OwlResourceReader() {}
@@ -564,6 +567,7 @@ class OwlResourceReader {
         offset += soundfile->fLength[part];
     }
 };
+#endif /* SOUNDFILE */
 
 
 /**************************************************************************************
@@ -591,12 +595,14 @@ class OwlUI : public UI {
     Patch* fPatch;
     PatchParameterId fParameter; // current parameter ID, value NO_PARAMETER means not set
     int fParameterIndex;         // number of OwlParameters collected so far
-    int fSoundfileIndex;
     int fSampleRate;
     //std::map fSoundfileMap;    // Map to share loaded soundfiles
     OwlParameterBase* fParameterTable[MAXOWLPARAMETERS];
+#ifdef SOUNDFILE
+    int fSoundfileIndex;
     OwlResourceReader* fSoundReader = NULL;
     Soundfile* fSoundfiles[MAX_SOUNDFILES];
+#endif
     PatchButtonId fButton;
     // check if the widget is an Owl parameter and, if so, add the corresponding OwlParameter
     void addInputOwlParameter(const char* label, FAUSTFLOAT* zone,
@@ -659,7 +665,7 @@ class OwlUI : public UI {
         fParameter = NO_PARAMETER;
         fButton = NO_BUTTON; // clear current button ID
     }
-
+#ifdef SOUNDFILE
     void addOwlResources(const char** resource_names, int names_size, Soundfile** sf_zone){
         if (fSoundfileIndex < MAX_SOUNDFILES){
             Soundfile* sound_file = fSoundReader->createSoundfile(resource_names, names_size, MAX_CHAN);
@@ -672,7 +678,7 @@ class OwlUI : public UI {
         // If failure, use 'defaultsound'
         *sf_zone = defaultsound;
     }
-
+#endif /* SOUNDFILE */
     void addOwlCheckbox(const char* label, FAUSTFLOAT* zone) {
         if (fParameterIndex < MAXOWLPARAMETERS) {
             if (meta.midiOn && strcasecmp(label, "gate") == 0) {
@@ -711,12 +717,14 @@ class OwlUI : public UI {
             delete fVOctInput;
         if (meta.vOctOutput)
             delete fVOctOutput;
+#ifdef SOUNDFILE
         if (fSoundReader != NULL) {
             delete fSoundReader;
         }
         for (int i = 0; i < fSoundfileIndex; i++){
             delete fSoundfiles[i];
         }
+#endif
     }
 
     // should be called before compute() to update widget's zones registered as OWL parameters
@@ -771,6 +779,7 @@ class OwlUI : public UI {
     }
     // -- soundfiles
     virtual void addSoundfile(const char* label, const char* url, Soundfile** sf_zone) {
+#ifdef SOUNDFILE
         if (fSoundReader == NULL){
             fSoundReader = new OwlResourceReader();
             fSoundReader->setSampleRate(fPatch->getSampleRate());
@@ -822,6 +831,10 @@ class OwlUI : public UI {
                 delete[] paths[i];
             }
         }
+#else
+        fParameter = NO_PARAMETER; // clear current parameter ID
+        fButton = NO_BUTTON;
+#endif /* SOUNDFILE */
     }
 
     // -- metadata declarations

From 4f966250846d958c4b328d884a4b321674c05abf Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Wed, 3 Mar 2021 23:19:09 +0300
Subject: [PATCH 112/374] Makefile integration and docs

---
 README.md  | 2 ++
 compile.mk | 5 +++++
 2 files changed, 7 insertions(+)

diff --git a/README.md b/README.md
index 2a54831c..1fcc5517 100644
--- a/README.md
+++ b/README.md
@@ -113,6 +113,8 @@ To compile and load a FAUST patch
 Note: assign OWL parameters with slider metadata: `[OWL:A]`, `[OWL:B]` et c. For example:
 ```gain = vslider("gain[OWL:C]", 1,0,1,0.1);```. Assign push button with e.g. ```gate = button("gate[OWL:Push]");```
 
+Use `make FAUSTOPTS=soundfile` to build patch with soundfiles support. This allows loading WAV files from OWL's flash storage.
+
 ## Building Pure Data patches
 
 * put your PD patch file (e.g. `Foo.pd`) into `PatchSource`
diff --git a/compile.mk b/compile.mk
index 2a12cc88..5c22b0c6 100644
--- a/compile.mk
+++ b/compile.mk
@@ -47,6 +47,11 @@ CXXFLAGS += -fno-exceptions
 ifdef HEAVY
 CPPFLAGS    += -D__unix__ -DHV_SIMD_NONE
 endif
+ifdef FAUST
+ifneq (,$(findstring soundfile,$(FAUSTOPTS)))
+CPPFLAGS    += -DSOUNDFILE
+endif
+endif
 ARCH_FLAGS = -fsingle-precision-constant -mthumb
 ARCH_FLAGS += -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
 # ARCH_FLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16

From 3513345a470a7fc5994c7cf621f106608a96aab4 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Thu, 4 Mar 2021 02:44:17 +0300
Subject: [PATCH 113/374] Missed member initialization

---
 FaustSource/owl.cpp | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/FaustSource/owl.cpp b/FaustSource/owl.cpp
index a009e8f0..651e24cc 100644
--- a/FaustSource/owl.cpp
+++ b/FaustSource/owl.cpp
@@ -706,7 +706,9 @@ class OwlUI : public UI {
         : fPatch(pp)
         , fParameter(NO_PARAMETER)
         , fParameterIndex(0)
+#ifdef SOUNDFILE
         , fSoundfileIndex(0)
+#endif
         , fButton(NO_BUTTON) {
     }
 

From 5fcb7d61930db5ffc9d912c86be73b4acb3e2bc9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 4 Mar 2021 10:41:48 +0100
Subject: [PATCH 114/374] header guard Suondfile.h include

---
 FaustSource/owl.cpp | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/FaustSource/owl.cpp b/FaustSource/owl.cpp
index 651e24cc..b1b57051 100644
--- a/FaustSource/owl.cpp
+++ b/FaustSource/owl.cpp
@@ -48,15 +48,6 @@
 #undef min
 #undef max
 
-// Parent soundfile object uses exceptions in one of its method.
-// This is probably the easiest may to make GCC happy about it when we compile
-// with exceptions disabled.
-#define try if(true)
-#define catch(x) if(false)
-
-#define MAX_SOUNDFILES 32
-// This is just value for upper limit - actual memory used depends only on number of files loaded
-
 #include 
 #include 
 
@@ -66,8 +57,17 @@
 #include "faust/dsp/dsp.h"
 #include "faust/gui/UI.h"
 #include "faust/gui/meta.h"
+#ifdef SOUNDFILE
+// Parent soundfile object uses exceptions in one of its method.
+// This is probably the easiest may to make GCC happy about it when we compile
+// with exceptions disabled.
+#define try if(true)
+#define catch(x) if(false)
 #include "faust/gui/Soundfile.h"
 
+#define MAX_SOUNDFILES 32
+// This is just value for upper limit - actual memory used depends only on number of files loaded
+#endif
 
 static float fKey, fFreq, fGain, fGate;
 static float fBend = 1.0f;

From ea92dfdd803bd43c45cc2c4b81f650aaffcc9690 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 4 Mar 2021 16:20:59 +0100
Subject: [PATCH 115/374] removed log messages

---
 Source/SampleBuffer.hpp | 8 --------
 1 file changed, 8 deletions(-)

diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp
index d9d637fb..50b9b5cc 100644
--- a/Source/SampleBuffer.hpp
+++ b/Source/SampleBuffer.hpp
@@ -1,10 +1,7 @@
 #ifndef __SAMPLEBUFFER_H__
 #define __SAMPLEBUFFER_H__
 
-// https://stackoverflow.com/questions/41675438/fastest-way-to-swap-alternate-bytes-on-arm-cortex-m4-using-gcc
-
 #include 
-#include 
 #include "Patch.h"
 #include "device.h"
 #ifdef ARM_CORTEX
@@ -37,7 +34,6 @@ class SampleBuffer : public AudioBuffer {
   }
   virtual void split(int32_t* input) = 0;
   virtual void comb(int32_t* output) = 0;
-  
   void clear(){
     for(size_t i=0; i
Date: Thu, 4 Mar 2021 16:35:18 +0100
Subject: [PATCH 116/374] removed 24B24 format and made channel/format
 independent parts of AUDIO_FORMAT

---
 Source/ProgramVector.h  | 11 ++++++++---
 Source/SampleBuffer.hpp | 18 +++++++++---------
 2 files changed, 17 insertions(+), 12 deletions(-)

diff --git a/Source/ProgramVector.h b/Source/ProgramVector.h
index cf08423c..a2e20011 100644
--- a/Source/ProgramVector.h
+++ b/Source/ProgramVector.h
@@ -21,13 +21,18 @@
 #define OUT_OF_MEMORY_ERROR_STATUS   -20
 #define CONFIGURATION_ERROR_STATUS   -30
 
-#define AUDIO_FORMAT_24B16_2X       0x10
-#define AUDIO_FORMAT_24B24_2X       0x18
+#define AUDIO_FORMAT_24B16          0x10
+#define AUDIO_FORMAT_24B16_2X       0x12
+#define AUDIO_FORMAT_24B16_4X       0x14
+#define AUDIO_FORMAT_24B16_6X       0x16
+#define AUDIO_FORMAT_24B16_8X       0x18
 #define AUDIO_FORMAT_24B32          0x20
 #define AUDIO_FORMAT_24B32_2X       0x22
 #define AUDIO_FORMAT_24B32_4X       0x24
-#define AUDIO_FORMAT_24B32_7X       0x27
+#define AUDIO_FORMAT_24B32_6X       0x26
 #define AUDIO_FORMAT_24B32_8X       0x28
+#define AUDIO_FORMAT_FORMAT_MASK    0xf0
+#define AUDIO_FORMAT_CHANNEL_MASK   0x0f
 
   typedef enum { 
     AUDIO_IDLE_STATUS = 0, 
diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp
index 50b9b5cc..bdc94ef7 100644
--- a/Source/SampleBuffer.hpp
+++ b/Source/SampleBuffer.hpp
@@ -161,15 +161,15 @@ class SampleBuffer16 : public SampleBuffer {
 };
 
 SampleBuffer* SampleBuffer::create(uint8_t format, size_t blocksize){
-  if(format == AUDIO_FORMAT_24B16_2X){
-    return new SampleBuffer16(2, blocksize);
-  // }else if(format == AUDIO_FORMAT_24B24_2X){
-  //   return new SampleBuffer24(2, blocksize);
-  }else if(format == AUDIO_FORMAT_24B32){
-    return new SampleBuffer32(2, blocksize);
-  }else if((format & 0xf0) == AUDIO_FORMAT_24B32){
-    return new SampleBuffer32(format & 0x0f, blocksize);
-  }else{
+  size_t channels = format & AUDIO_FORMAT_CHANNELS_MASK;
+  if(channels = 0)
+    channels = 2;
+  switch(format & AUDIO_FORMAT_FORMAT_MASK){
+  case AUDIO_FORMAT_24B16:
+    return new SampleBuffer16(channels, blocksize);
+  case AUDIO_FORMAT_24B32:
+    return new SampleBuffer32(channels, blocksize);
+  default:
     return NULL; // unrecognised audio format
   }
 }

From 170a6065cae80d4d6dbb562211a5f448bf3fb99f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 4 Mar 2021 17:08:47 +0100
Subject: [PATCH 117/374] fixed typo

---
 Source/SampleBuffer.hpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp
index bdc94ef7..b3452c11 100644
--- a/Source/SampleBuffer.hpp
+++ b/Source/SampleBuffer.hpp
@@ -161,7 +161,7 @@ class SampleBuffer16 : public SampleBuffer {
 };
 
 SampleBuffer* SampleBuffer::create(uint8_t format, size_t blocksize){
-  size_t channels = format & AUDIO_FORMAT_CHANNELS_MASK;
+  size_t channels = format & AUDIO_FORMAT_CHANNEL_MASK;
   if(channels = 0)
     channels = 2;
   switch(format & AUDIO_FORMAT_FORMAT_MASK){

From 61286886f6514d261a7be880789733ac7b01d1b6 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 4 Mar 2021 18:31:29 +0100
Subject: [PATCH 118/374] fixed typo

---
 Source/SampleBuffer.hpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp
index b3452c11..fc2d8183 100644
--- a/Source/SampleBuffer.hpp
+++ b/Source/SampleBuffer.hpp
@@ -162,7 +162,7 @@ class SampleBuffer16 : public SampleBuffer {
 
 SampleBuffer* SampleBuffer::create(uint8_t format, size_t blocksize){
   size_t channels = format & AUDIO_FORMAT_CHANNEL_MASK;
-  if(channels = 0)
+  if(channels == 0)
     channels = 2;
   switch(format & AUDIO_FORMAT_FORMAT_MASK){
   case AUDIO_FORMAT_24B16:

From a2e9476e8f0f4f27d858be7a9d51010826e852c2 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 9 Mar 2021 15:58:39 +0100
Subject: [PATCH 119/374] iterate over channels first for efficiency

---
 Source/SampleBuffer.hpp | 29 +++++++++++++++++++----------
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/Source/SampleBuffer.hpp b/Source/SampleBuffer.hpp
index fc2d8183..4a7328ed 100644
--- a/Source/SampleBuffer.hpp
+++ b/Source/SampleBuffer.hpp
@@ -17,9 +17,9 @@
 
 class SampleBuffer : public AudioBuffer {
 protected:
+  const size_t channels;
+  const size_t blocksize;
   FloatArray* buffers;
-  size_t blocksize;
-  size_t channels;
 public:
   SampleBuffer(size_t channels, size_t blocksize)
     :channels(channels), blocksize(blocksize) {
@@ -61,20 +61,29 @@ class SampleBuffer32 : public SampleBuffer {
   SampleBuffer32(size_t channels, size_t blocksize) : SampleBuffer(channels, blocksize){}
   void split(int32_t* input){
     const float mul = 1.0f/MULTIPLIER_31B;
-    for(size_t i=0; i
Date: Wed, 10 Mar 2021 11:10:45 +0100
Subject: [PATCH 120/374] remove debug message, and set default parameter value

---
 GenSource/GenPatch.hpp | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/GenSource/GenPatch.hpp b/GenSource/GenPatch.hpp
index f8e103ab..e364476e 100644
--- a/GenSource/GenPatch.hpp
+++ b/GenSource/GenPatch.hpp
@@ -109,6 +109,9 @@ class GenParameter : public GenParameterBase {
       min = gen::getparametermin(context, index);
       max = gen::getparametermax(context, index);
     }    
+    float defaultvalue;
+    gen::getparameter(context, index, &defaultvalue);
+    patch->setParameterValue(id, defaultvalue);
   }
   void update(Patch* patch, CommonState *context){
     float value = patch->getParameterValue(pid);
@@ -198,7 +201,6 @@ class GenPatch : public Patch {
     }
     buffers = new float*[gen::num_outputs()];
     size_t channels = getNumberOfChannels();
-    debugMessage("SR/CH/BS", (int)getSampleRate(), getNumberOfChannels(), getBlockSize());
     char name[] = "Out0>";
     for(int ch=channels; ch
Date: Wed, 10 Mar 2021 11:11:02 +0100
Subject: [PATCH 121/374] remove unwanted include files

---
 LibSource/OpenWareLibrary.h | 2 --
 1 file changed, 2 deletions(-)

diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 67b8e733..f98826d7 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -15,8 +15,6 @@
 #include "ExponentialDecayEnvelope.h"
 #include "FastFourierTransform.h"
 #include "FractionalCircularBuffer.h"
-#include "FastLogTable.h"
-#include "FastPowTable.h"
 #include "FirFilter.h"
 #include "FloatArray.h"
 #include "FloatMatrix.h"

From 2a2e170fcf9a4458c867ab7c4d04bf5f5ad03b3b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 10 Mar 2021 11:11:45 +0100
Subject: [PATCH 122/374] ensure registerPatch is called before patch
 constructor

---
 Source/PatchProgram.cpp | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/Source/PatchProgram.cpp b/Source/PatchProgram.cpp
index 9a4a24ca..ee33dce8 100644
--- a/Source/PatchProgram.cpp
+++ b/Source/PatchProgram.cpp
@@ -65,13 +65,16 @@ void doMidiSend(uint8_t port, uint8_t d0, uint8_t d1, uint8_t d2){
 }
 #endif /* USE_MIDI_CALLBACK */
 
-#define REGISTER_PATCH(T, STR, IN, OUT) registerPatch(STR, IN, OUT, new T)
+#define REGISTER_PATCH(T, STR, IN, OUT) do { registerPatch(STR, IN, OUT); setPatch(STR, new T); }while(0)
 
-void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* patch){
-  if(patch == NULL)
-    error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory");
+void registerPatch(const char* name, uint8_t inputs, uint8_t outputs){
   if(getProgramVector()->registerPatch != NULL)
     getProgramVector()->registerPatch(name, inputs, outputs);
+}
+
+void setPatch(const char* name, Patch* patch){
+  if(patch == NULL)
+    error(OUT_OF_MEMORY_ERROR_STATUS, "Out of memory");
   processor.setPatch(patch, name);
 }
 

From 4c83d2695f96f8e864fb98848caa3c1c006138de Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 10 Mar 2021 11:12:13 +0100
Subject: [PATCH 123/374] added Patch::getBlockRate()

---
 LibSource/Patch.cpp | 4 ++++
 LibSource/Patch.h   | 1 +
 2 files changed, 5 insertions(+)

diff --git a/LibSource/Patch.cpp b/LibSource/Patch.cpp
index 456c4041..ed65c3f0 100644
--- a/LibSource/Patch.cpp
+++ b/LibSource/Patch.cpp
@@ -25,6 +25,10 @@ float Patch::getSampleRate(){
   return getProgramVector()->audio_samplingrate;
 }
 
+float Patch::getBlockRate(){
+  return getSampleRate()/getBlockSize();
+}
+
 int Patch::getBlockSize(){
   return getProgramVector()->audio_blocksize;
 }
diff --git a/LibSource/Patch.h b/LibSource/Patch.h
index 5a20948c..84f60a3c 100644
--- a/LibSource/Patch.h
+++ b/LibSource/Patch.h
@@ -61,6 +61,7 @@ class Patch {
   int getBlockSize();
   int getNumberOfChannels();
   float getSampleRate();
+  float getBlockRate();
   AudioBuffer* createMemoryBuffer(int channels, int samples);
   float getElapsedBlockTime();
   int getElapsedCycles();

From 9c3f4b2f356f1b27a4e0f5ee9a86fa5ee7557efa Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 10 Mar 2021 11:37:54 +0100
Subject: [PATCH 124/374] fixed state management

---
 LibSource/StateVariableFilter.h | 67 +++++++++++++++------------------
 1 file changed, 30 insertions(+), 37 deletions(-)

diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h
index f58a3d0f..409310ba 100644
--- a/LibSource/StateVariableFilter.h
+++ b/LibSource/StateVariableFilter.h
@@ -126,31 +126,29 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
   StateVariableFilter(float sr): AbstractStateVariableFilter(sr) {}
 
   float process(float v0){
-    mV3 = v0 - mIc2eq;
-    mV1 = m_a1 * mIc1eq + m_a2*mV3;
-    mV2 = mIc2eq + m_a2 * mIc1eq + m_a3 * mV3;
-    mIc1eq = 2. * mV1 - mIc1eq;
-    mIc2eq = 2. * mV2 - mIc2eq;
-    return m_m0 * v0 + m_m1 * mV1 + m_m2 * mV2;
+    float v3 = v0 - mIc2eq;
+    float v1 = m_a1 * mIc1eq + m_a2*v3;
+    float v2 = mIc2eq + m_a2 * mIc1eq + m_a3 * v3;
+    mIc1eq = 2. * v1 - mIc1eq;
+    mIc2eq = 2. * v2 - mIc2eq;
+    return m_m0 * v0 + m_m1 * v1 + m_m2 * v2;
   }
 
   void process(FloatArray input, FloatArray output){
     size_t nFrames = input.getSize();
+    float v0, v1, v2, v3;
     for(size_t s = 0; s < nFrames; s++){
-      const float v0 = input[s];
-      mV3 = v0 - mIc2eq;
-      mV1 = m_a1 * mIc1eq + m_a2*mV3;
-      mV2 = mIc2eq + m_a2 * mIc1eq + m_a3 * mV3;
-      mIc1eq = 2. * mV1 - mIc1eq;
-      mIc2eq = 2. * mV2 - mIc2eq;
-      output[s] = m_m0 * v0 + m_m1 * mV1 + m_m2 * mV2;
+      v0 = input[s];
+      v3 = v0 - mIc2eq;
+      v1 = m_a1 * mIc1eq + m_a2*v3;
+      v2 = mIc2eq + m_a2 * mIc1eq + m_a3 * v3;
+      mIc1eq = 2. * v1 - mIc1eq;
+      mIc2eq = 2. * v2 - mIc2eq;
+      output[s] = m_m0 * v0 + m_m1 * v1 + m_m2 * v2;
     }
   }
 
   void reset() {
-    mV1 = 0.;
-    mV2 = 0.;
-    mV3 = 0.;
     mIc1eq = 0.;
     mIc2eq = 0.;
   }
@@ -165,9 +163,6 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
   
 private:
   // state
-  float mV1 = 0.;
-  float mV2 = 0.;
-  float mV3 = 0.;
   float mIc1eq = 0.;
   float mIc2eq = 0.;
 };
@@ -175,18 +170,15 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
 class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignalProcessor {
 private:
   size_t mChannels;
-  // state
   float* mState;
-  static constexpr size_t STATE_VARIABLES_PER_CHANNEL = 5;
+  static constexpr size_t STATE_VARIABLES_PER_CHANNEL = 2;
 public:
   MultiStateVariableFilter(float sr) :
     AbstractStateVariableFilter(sr), 
     mChannels(0), mState(NULL) {}
 
-  MultiStateVariableFilter(float sr, size_t channels,
-			   float* state) :
-    AbstractStateVariableFilter(sr),
-    mChannels(channels), mState(state) {}
+  MultiStateVariableFilter(float sr, size_t channels, float* state) :
+    AbstractStateVariableFilter(sr), mChannels(channels), mState(state) {}
 
   void process(AudioBuffer &input, AudioBuffer &output){
     size_t len = min((int)mChannels, min(input.getChannels(), output.getChannels()));
@@ -195,20 +187,21 @@ class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignal
       FloatArray in = input.getSamples(ch);
       FloatArray out = output.getSamples(ch);
       size_t nFrames = in.getSize();
-      float mV1 = *state++;
-      float mV2 = *state++;
-      float mV3 = *state++;
-      float mIc1eq = *state++;
-      float mIc2eq = *state++;
+      float v0, v1, v2, v3;
+      float mIc1eq = state[0];
+      float mIc2eq = state[1];
       for(size_t s = 0; s < nFrames; s++){
-	float v0 = in[s];
-	mV3 = v0 - mIc2eq;
-	mV1 = m_a1 * mIc1eq + m_a2*mV3;
-	mV2 = mIc2eq + m_a2 * mIc1eq + m_a3 * mV3;
-	mIc1eq = 2. * mV1 - mIc1eq;
-	mIc2eq = 2. * mV2 - mIc2eq;
-	out[s] = m_m0 * v0 + m_m1 * mV1 + m_m2 * mV2;
+	v0 = in[s];
+	v3 = v0 - mIc2eq;
+	v1 = m_a1 * mIc1eq + m_a2*v3;
+	v2 = mIc2eq + m_a2 * mIc1eq + m_a3 * v3;
+	mIc1eq = 2. * v1 - mIc1eq;
+	mIc2eq = 2. * v2 - mIc2eq;
+	out[s] = m_m0 * v0 + m_m1 * v1 + m_m2 * v2;
       }
+      state[0] = mIc1eq;
+      state[1] = mIc2eq;
+      state += STATE_VARIABLES_PER_CHANNEL;
     }
   }
 

From a892e2d192a79fd0f1bc3e7d7885ffc10a4fe908 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 10 Mar 2021 13:00:15 +0100
Subject: [PATCH 125/374] added fast_fmodf and updated fast_log2i

---
 LibSource/basicmaths.c | 11 ++++++++---
 LibSource/basicmaths.h |  8 ++------
 2 files changed, 10 insertions(+), 9 deletions(-)

diff --git a/LibSource/basicmaths.c b/LibSource/basicmaths.c
index 65f596c4..d5a23ca5 100644
--- a/LibSource/basicmaths.c
+++ b/LibSource/basicmaths.c
@@ -125,14 +125,19 @@ float fast_log2f(float x){
 
 void fast_pow_set_table(const uint32_t* table, int size){
   pow_table = table;
-  pow_precision = log2i(size);
+  pow_precision = fast_log2i(size);
 }
 
 void fast_log_set_table(const float* table, int size){
   log_table = table;
-  log_precision = log2i(size);
+  log_precision = fast_log2i(size);
+}
+
+float fast_fmodf(float x, float y) {
+  float a = x/y;
+  return (a-(int)a)*y;
 }
 
 uint32_t fast_log2i(uint32_t x){
-  return x == 0 ? 0 : 31 - __builtin_clz (x); /* clz returns the number of leading 0's */
+  return 31 - __builtin_clz (x); /* clz returns the number of leading 0's */
 }
diff --git a/LibSource/basicmaths.h b/LibSource/basicmaths.h
index 79ff2b2d..0b0edd40 100644
--- a/LibSource/basicmaths.h
+++ b/LibSource/basicmaths.h
@@ -66,9 +66,8 @@
    float fast_logf(float x);
    float fast_log2f(float x);
    float fast_log10f(float x);
-   void fast_log_set_table(const float* table, int size);
-
    uint32_t fast_log2i(uint32_t x);
+   void fast_log_set_table(const float* table, int size);
 
    // fast approximations
    float fast_atan2f(float a, float b);
@@ -76,10 +75,7 @@
    /** generate a random number between 0 and 1 */
    float randf();
 
-   static inline uint32_t log2i(const uint32_t x){
-     return (31 - __builtin_clz (x));
-   }
-
+   float fast_fmodf(float x, float y);
 
 #define malloc(x) pvPortMalloc(x)
 #define calloc(x, y) pvPortCalloc(x, y)

From c9d24cf62260d63c36d1da3dafb0c3c53efdd14c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 16 Mar 2021 16:22:13 +0100
Subject: [PATCH 126/374] added back StereoBiquadFilter class

---
 LibSource/BiquadFilter.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index f5fc25a7..3aeaaaba 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -403,6 +403,18 @@ class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor {
   }
 };
 
+class StereoBiquadFilter : public MultiBiquadFilter {
+public:
+  StereoBiquadFilter(float sr, float* coefs, float* states, size_t stages) :
+    MultiBiquadFilter(sr, 2, coefs, states, stages) {}
+  static StereoBiquadFilter* create(float sr, size_t stages=1){
+    return new StereoBiquadFilter(sr, new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE], new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*2], stages);
+  }
+  static void destroy(StereoBiquadFilter* filter){
+    MultiBiquadFilter::destroy(filter);
+  }
+};
+
 const float FilterStage::BESSEL_Q = 1/sqrtf(3); // 1/sqrt(3)
 const float FilterStage::SALLEN_KEY_Q = 0.5f; // 1/2
 const float FilterStage::BUTTERWORTH_Q = 1/sqrtf(2); // 1/sqrt(2)

From 9c97b6b26102d2830cd0d66285848b00d24ed3fb Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 16 Mar 2021 16:34:38 +0100
Subject: [PATCH 127/374] added back StereoStateVariableFilter class

---
 LibSource/StateVariableFilter.h | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h
index 409310ba..0925c762 100644
--- a/LibSource/StateVariableFilter.h
+++ b/LibSource/StateVariableFilter.h
@@ -219,4 +219,19 @@ class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignal
   }
 };
 
+
+class StereoStateVariableFilter : public MultiStateVariableFilter {
+public:
+  StereoStateVariableFilter(float sr, float* state) :
+    MultiStateVariableFilter(sr, 2, state) {}
+  static StereoStateVariableFilter* create(float sr, size_t channels){
+    return new StereoStateVariableFilter(sr, new float[STATE_VARIABLES_PER_CHANNEL]);
+  }
+
+  static void destroy(StereoStateVariableFilter* svf){
+    MultiStateVariableFilter::destroy(svf);
+  }
+
+};
+
 #endif // __StateVariableFilter_h__

From 991fb2b6c7cac1d0b80b92df74469764675831e5 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 16 Mar 2021 16:37:40 +0100
Subject: [PATCH 128/374] AcBlockingFilter renamed SmoothingFilter

---
 HISTORY.md                                    |  2 +-
 LibSource/OpenWareLibrary.h                   |  2 +-
 .../{AcBlockingFilter.h => SmoothingFilter.h} | 28 +++++++++----------
 3 files changed, 16 insertions(+), 16 deletions(-)
 rename LibSource/{AcBlockingFilter.h => SmoothingFilter.h} (63%)

diff --git a/HISTORY.md b/HISTORY.md
index ac038b6c..81bd4e47 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -4,7 +4,7 @@ v22.0
 * FAUST Checkbutton support
 * FAUST Soundfile support
 * Added CircularBuffer and DelayProcessor classes
-* Added AcBlockingFilter and DcBlockingFilter classes
+* Added SmoothingFilter and DcBlockingFilter classes
 * Improved BiquadFilter and StateVariableFilter
 * SimpleArray templated base class
 * Updated unit tests
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index f98826d7..e1887c75 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -1,7 +1,6 @@
 #ifndef __OpenWareLibrary_h__
 #define __OpenWareLibrary_h__
 
-#include "AcBlockingFilter.h"
 #include "BiquadFilter.h"
 #include "ChirpOscillator.h"
 #include "CircularBuffer.h"
@@ -35,6 +34,7 @@
 #include "SignalProcessor.h"
 #include "SineOscillator.h"
 #include "SmoothValue.h"
+#include "SmoothingFilter.h"
 #include "StateVariableFilter.h"
 #include "VoltsPerOctave.h"
 #include "WavetableOscillator.h"
diff --git a/LibSource/AcBlockingFilter.h b/LibSource/SmoothingFilter.h
similarity index 63%
rename from LibSource/AcBlockingFilter.h
rename to LibSource/SmoothingFilter.h
index 27301ea0..564faeaa 100644
--- a/LibSource/AcBlockingFilter.h
+++ b/LibSource/SmoothingFilter.h
@@ -1,5 +1,5 @@
-#ifndef __AcBlockingFilter_h__
-#define __AcBlockingFilter_h__
+#ifndef __SmoothingFilter_h__
+#define __SmoothingFilter_h__
 
 #include "FloatArray.h"
 #include "SignalProcessor.h"
@@ -7,12 +7,12 @@
 /**
  * AC Blocking IIR filter, the Leaky Integrator. Used for signal smoothing.
  */
-class AcBlockingFilter : public SignalProcessor {
+class SmoothingFilter : public SignalProcessor {
 private:
   const float lambda;
   float y;
 public:
-  AcBlockingFilter(float lambda = 0.995): lambda(lambda), y(0) {}
+  SmoothingFilter(float lambda = 0.995): lambda(lambda), y(0) {}
 
   /* process a single sample and return the result */
   float process(float x){
@@ -43,32 +43,32 @@ class AcBlockingFilter : public SignalProcessor {
     process(in, out, in.getSize());
   }
 
-  static AcBlockingFilter* create(float lambda){
-    return new AcBlockingFilter(lambda);
+  static SmoothingFilter* create(float lambda){
+    return new SmoothingFilter(lambda);
   }
 
-  static void destroy(AcBlockingFilter* obj){
+  static void destroy(SmoothingFilter* obj){
     delete obj;
   }
 };
 
-class StereoAcBlockingFilter : public MultiSignalProcessor {
+class StereoSmoothingFilter : public MultiSignalProcessor {
 private:
-  AcBlockingFilter left, right;
+  SmoothingFilter left, right;
 public:
-  StereoAcBlockingFilter(float lambda = 0.995): left(lambda), right(lambda) {}
+  StereoSmoothingFilter(float lambda = 0.995): left(lambda), right(lambda) {}
   void process(AudioBuffer& input, AudioBuffer& output){
     left.process(input.getSamples(LEFT_CHANNEL), output.getSamples(LEFT_CHANNEL));
     right.process(input.getSamples(RIGHT_CHANNEL), output.getSamples(RIGHT_CHANNEL));
   }
 
-  static StereoAcBlockingFilter* create(float lambda){
-    return new StereoAcBlockingFilter(lambda);
+  static StereoSmoothingFilter* create(float lambda){
+    return new StereoSmoothingFilter(lambda);
   }
 
-  static void destroy(StereoAcBlockingFilter* obj){
+  static void destroy(StereoSmoothingFilter* obj){
     delete obj;
   }
 };
 
-#endif // __AcBlockingFilter_h__
+#endif // __SmoothingFilter_h__

From 790adcd8c67ca2f8d819682d2052e96f893bcc60 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 16 Mar 2021 16:43:01 +0100
Subject: [PATCH 129/374] fix for StereoStateVariableFilter

---
 LibSource/StateVariableFilter.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h
index 0925c762..6bc519d6 100644
--- a/LibSource/StateVariableFilter.h
+++ b/LibSource/StateVariableFilter.h
@@ -168,7 +168,7 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
 };
 
 class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignalProcessor {
-private:
+protected:
   size_t mChannels;
   float* mState;
   static constexpr size_t STATE_VARIABLES_PER_CHANNEL = 2;
@@ -224,7 +224,7 @@ class StereoStateVariableFilter : public MultiStateVariableFilter {
 public:
   StereoStateVariableFilter(float sr, float* state) :
     MultiStateVariableFilter(sr, 2, state) {}
-  static StereoStateVariableFilter* create(float sr, size_t channels){
+  static StereoStateVariableFilter* create(float sr){
     return new StereoStateVariableFilter(sr, new float[STATE_VARIABLES_PER_CHANNEL]);
   }
 

From 4e91e85a8d2c0a680b1576078e5d5de4a98cd05d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 16 Mar 2021 19:32:23 +0100
Subject: [PATCH 130/374] fix AA-DH parameters

---
 GenSource/GenPatch.hpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/GenSource/GenPatch.hpp b/GenSource/GenPatch.hpp
index e364476e..b1833014 100644
--- a/GenSource/GenPatch.hpp
+++ b/GenSource/GenPatch.hpp
@@ -195,7 +195,7 @@ class GenPatch : public Patch {
 	params[param_count++] = new GenParameter(this, context, name, (PatchParameterId)index, i);
       }else if(strlen(name) == 2 && name[0] >= 'A' && name[0] <= 'H'
 	                         && name[1] >= 'A' && name[1] <= 'H'){
-	uint8_t index = PARAMETER_H*(name[0]-'A') + name[1]-'A';
+	uint8_t index = PARAMETER_AA*(1+name[0]-'A') + name[1]-'A';
 	params[param_count++] = new GenParameter(this, context, name, (PatchParameterId)index, i);
       }
     }

From ddd8b91e9f8380661afe0af2c774b6f5a151d753 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Sun, 21 Mar 2021 16:41:05 +0300
Subject: [PATCH 131/374] Downsampler uses wrong array size

---
 LibSource/Resample.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/Resample.h b/LibSource/Resample.h
index 2fd04132..795d7b6f 100644
--- a/LibSource/Resample.h
+++ b/LibSource/Resample.h
@@ -136,7 +136,7 @@ class DownSampler : public SignalProcessor {
     ASSERT(input.getSize()==output.getSize()*factor, "wrong size");
     filter->process(input, input);
     float* p = (float*)input;
-    for(size_t i=0; i
Date: Sun, 21 Mar 2021 21:22:34 +0300
Subject: [PATCH 132/374] Same issue with Resample class

---
 LibSource/Resample.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/Resample.h b/LibSource/Resample.h
index 795d7b6f..0d8e7584 100644
--- a/LibSource/Resample.h
+++ b/LibSource/Resample.h
@@ -54,7 +54,7 @@ class [[deprecated("use UpSampler and DownSampler instead.")]] Resampler {
     ASSERT(input.getSize()==output.getSize()*factor, "wrong size");
     downfilter->process(input, input);
     float* p = (float*)input;
-    for(size_t i=0; i
Date: Mon, 22 Mar 2021 23:46:23 +0300
Subject: [PATCH 133/374] Bringing destruction to your audio buffers

---
 LibSource/Patch.cpp | 4 ++++
 LibSource/Patch.h   | 1 +
 2 files changed, 5 insertions(+)

diff --git a/LibSource/Patch.cpp b/LibSource/Patch.cpp
index ed65c3f0..08f6bfc8 100644
--- a/LibSource/Patch.cpp
+++ b/LibSource/Patch.cpp
@@ -108,6 +108,10 @@ AudioBuffer* AudioBuffer::create(int channels, int samples){
   return new ManagedMemoryBuffer(channels, samples);
 }
 
+void AudioBuffer::destroy(AudioBuffer* buffer){
+  delete buffer;
+}
+
 FloatParameter Patch::getParameter(const char* name, float defaultValue){
   return getFloatParameter(name, 0.0f, 1.0f, defaultValue, 0.0f, 0.0f, LIN);
 }
diff --git a/LibSource/Patch.h b/LibSource/Patch.h
index 84f60a3c..a15a4ebf 100644
--- a/LibSource/Patch.h
+++ b/LibSource/Patch.h
@@ -26,6 +26,7 @@ class AudioBuffer {
   virtual int getSize() = 0;
   virtual void clear() = 0;
   static AudioBuffer* create(int channels, int samples);
+  static void destroy(AudioBuffer* buffer);
 };
 
 class Patch {

From 406c1c93a95bd755be67a7b3301f4fa6b73d730f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 26 Mar 2021 18:08:02 +0100
Subject: [PATCH 134/374] added methods for sample-rate cutoff frequency
 control

---
 LibSource/BiquadFilter.h        | 21 +++++++++++++++++++++
 LibSource/StateVariableFilter.h | 21 +++++++++++++++++++++
 2 files changed, 42 insertions(+)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 3aeaaaba..6e249395 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -289,6 +289,27 @@ class BiquadFilter : public SignalProcessor {
     process(in, out, in.getSize());
   }
 
+  void processLowPass(FloatArray in, FloatArray fc, float q, FloatArray out){
+    for(size_t i = 0; i < in.getSize(); i++){
+      setLowPass(fc[i], q);
+      out[i] = process(in[i]);
+    }
+  }
+
+  void processHighPass(FloatArray in, FloatArray fc, float q, FloatArray out){
+    for(size_t i = 0; i < in.getSize(); i++){
+      setHighPass(fc[i], q);
+      out[i] = process(in[i]);
+    }
+  }
+
+  void processBandPass(FloatArray in, FloatArray fc, float q, FloatArray out){
+    for(size_t i = 0; i < in.getSize(); i++){
+      setBandPass(fc[i], q);
+      out[i] = process(in[i]);
+    }
+  }
+
   /* process a single sample and return the result */
   float process(float input){
     float output;
diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h
index 6bc519d6..14a01bf5 100644
--- a/LibSource/StateVariableFilter.h
+++ b/LibSource/StateVariableFilter.h
@@ -148,6 +148,27 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
     }
   }
 
+  void processLowPass(FloatArray in, FloatArray fc, float q, FloatArray out){
+    for(size_t i = 0; i < in.getSize(); i++){
+      setLowPass(fc[i], q);
+      out[i] = process(in[i]);
+    }
+  }
+
+  void processHighPass(FloatArray in, FloatArray fc, float q, FloatArray out){
+    for(size_t i = 0; i < in.getSize(); i++){
+      setHighPass(fc[i], q);
+      out[i] = process(in[i]);
+    }
+  }
+
+  void processBandPass(FloatArray in, FloatArray fc, float q, FloatArray out){
+    for(size_t i = 0; i < in.getSize(); i++){
+      setBandPass(fc[i], q);
+      out[i] = process(in[i]);
+    }
+  }
+
   void reset() {
     mIc1eq = 0.;
     mIc2eq = 0.;

From c0653cf76185f679bee3d8d2ee261aaf9d3ae9e1 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 26 Mar 2021 18:08:15 +0100
Subject: [PATCH 135/374] envelope interface updates

---
 LibSource/Envelope.cpp               |  8 --------
 LibSource/Envelope.h                 |  5 ++---
 LibSource/ExponentialDecayEnvelope.h | 10 ++++++++--
 3 files changed, 10 insertions(+), 13 deletions(-)

diff --git a/LibSource/Envelope.cpp b/LibSource/Envelope.cpp
index c9e19652..917adaf1 100644
--- a/LibSource/Envelope.cpp
+++ b/LibSource/Envelope.cpp
@@ -58,14 +58,6 @@ void AdsrEnvelope::setRetrigger(bool state){
   retrigger = state;
 }
 
-void AdsrEnvelope::trigger(){
-  trigger(true, 0);
-}
-
-void AdsrEnvelope::trigger(bool state){
-  trigger(state, 0);
-}
-
 void AdsrEnvelope::trigger(bool state, int delay){
   gate(state, delay);
   trig = kTrigger;
diff --git a/LibSource/Envelope.h b/LibSource/Envelope.h
index 405f1587..2f201096 100644
--- a/LibSource/Envelope.h
+++ b/LibSource/Envelope.h
@@ -14,7 +14,7 @@ class Envelope : public SignalGenerator, SignalProcessor {
   virtual void trigger(bool state){
     trigger(state, 0);
   }
-  virtual void trigger(bool state, int triggerDelay){}
+  virtual void trigger(bool state, int triggerDelay) = 0;
   virtual void gate(bool state){
     gate(state, 0);
   }
@@ -43,14 +43,13 @@ class AdsrEnvelope : public Envelope {
   AdsrEnvelope(float sampleRate=48000);
   virtual ~AdsrEnvelope();
   using Envelope::process;
+  using Envelope::trigger;
   using SignalGenerator::generate;
   void setSampleRate(float sampleRate);
   void setAttack(float newAttack);
   void setDecay(float newDecay);
   void setRelease(float newRelease);
   void setSustain(float newSustain);
-  void trigger();
-  void trigger(bool state);
   void trigger(bool state, int triggerDelay);
   void setRetrigger(bool on);
   void gate(bool state);
diff --git a/LibSource/ExponentialDecayEnvelope.h b/LibSource/ExponentialDecayEnvelope.h
index 3e65c3af..5d74023b 100644
--- a/LibSource/ExponentialDecayEnvelope.h
+++ b/LibSource/ExponentialDecayEnvelope.h
@@ -10,6 +10,8 @@ class ExponentialDecayEnvelope : public Envelope {
   float incr;
 public:
   ExponentialDecayEnvelope(float sr=48000): sr(sr), value(0), incr(0){}
+  using Envelope::gate;
+  using Envelope::trigger;
   using Envelope::process;
   using SignalGenerator::generate;
   void setSampleRate(float sampleRate){
@@ -24,8 +26,12 @@ class ExponentialDecayEnvelope : public Envelope {
   void setDecay(float d){
     setRate(-(d+1/sr));
   }
-  void trigger(){
-    value = 1.0;
+  void trigger(bool state, int triggerDelay){
+    if(state)
+      value = 1;
+  }
+  void gate(bool state, int triggerDelay){
+    value = state;
   }
   /**
    * Produce the next envelope sample.

From a24b39cec32592b0f0c9dd89f4cf83d4cbfe2caf Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 11 Apr 2021 10:57:26 +0200
Subject: [PATCH 136/374] update history

---
 HISTORY.md | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index 81bd4e47..9b348575 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,11 @@
+v22.1
+-----
+
+* Added methods for sample-rate cutoff frequency modulation in StateVariableFilter and BiquadFilter
+* Added VelocityCurve, MidiProcessor, AbstractSynth
+* New templates for polyphonic and monophonic MIDI voicing: PolyphonicSynth and MonophonicSynth
+* Added WavFile for reading wav resources and converting to FloatArray
+
 v22.0
 -----
 

From 2827449c841d2222f3271822d12aea662de65547 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 11 Apr 2021 10:58:43 +0200
Subject: [PATCH 137/374] adding service call placeholders

---
 TestPatches/DummyPatch.hpp | 41 ++++++++++++++++++++++++++++++++++++++
 TestPatches/PatchRun.cpp   | 13 +-----------
 TestPatches/PatchTest.cpp  | 13 +-----------
 3 files changed, 43 insertions(+), 24 deletions(-)

diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp
index dadc9638..9808db1b 100644
--- a/TestPatches/DummyPatch.hpp
+++ b/TestPatches/DummyPatch.hpp
@@ -1,9 +1,42 @@
+#include "ServiceCall.h"
 #include "FastPowTable.h"
 #include "FastLogTable.h"
 #include "basicmaths.h"
 
 static float parameter_values[40] = {};
 static uint32_t button_values = 0;
+int errorcode = 0;
+
+extern "C"{
+  int serviceCall(int service, void** params, int len){
+    int ret = -1;
+    switch(service){
+    case OWL_SERVICE_LOAD_RESOURCE:
+      if(len == 4){
+	const char* name = (const char*)params[0];
+	uint8_t** buffer = (uint8_t**)params[1];
+	uint32_t offset = *(uint32_t*)params[2];
+	uint32_t* max_size = (uint32_t*)params[3];
+	printf("Service call (LOAD RESOURCE) : %s [%u:%u]\n", name, offset, *max_size);
+	if(*buffer == NULL)
+	  *max_size = 16384*4;
+	ret = OWL_SERVICE_OK;
+      }else{
+	printf("Service call (LOAD RESOURCE) Invalid");
+      }	
+      break;
+    default:
+      printf("Service call (todo) : %d\n", service);
+      break;
+    }
+    return ret;
+  }
+  void error(int8_t code, const char* reason){
+    printf("%s\n", reason);
+    errorcode = -1;
+    exit(errorcode);
+  }
+}
 
 class SampleBuffer : public AudioBuffer {
 protected:
@@ -191,6 +224,14 @@ void PatchProcessor::setPatchParameter(int pid, IntParameter* param){
     parameter_values[pid] = param->getValue()/4096.0f;
 }
 
+Resource* Patch::getResource(char const* name){
+  printf("Get resource %s\n", name);
+  Resource* resource = Resource::load(name);
+  if(resource == NULL)
+    error(CONFIGURATION_ERROR_STATUS, "Missing Resource");
+  return resource;
+}
+
 void Patch::registerParameter(PatchParameterId pid, const char* name){
   printf("Register parameter %c: %s\n", 'A'+pid, name);
 }  
diff --git a/TestPatches/PatchRun.cpp b/TestPatches/PatchRun.cpp
index 2316ff7b..e1d9d136 100644
--- a/TestPatches/PatchRun.cpp
+++ b/TestPatches/PatchRun.cpp
@@ -26,23 +26,12 @@ void vPortFree( void *pv ){
 
 static PatchProcessor processor;
 ProgramVector programVector;
-static int errorcode = 0;
+extern int errorcode;
 
 PatchProcessor* getInitialisingPatchProcessor(){
   return &processor;
 }
 
-extern "C"{
-  int serviceCall(int service, void** params, int len){
-    printf("Service call (todo) : %d\n", service);
-    return -1;
-  }
-  void error(int8_t code, const char* reason){
-    printf("%s\n", reason);
-    errorcode = -1;
-  }
-}
-
 void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* patch){
   printf("Register patch %s (%d ins, %d outs)\n", name, inputs, outputs);
   getInitialisingPatchProcessor()->setPatch(patch, name);
diff --git a/TestPatches/PatchTest.cpp b/TestPatches/PatchTest.cpp
index aef1dccb..cdd3bb5b 100644
--- a/TestPatches/PatchTest.cpp
+++ b/TestPatches/PatchTest.cpp
@@ -24,23 +24,12 @@ void vPortFree( void *pv ){
 
 PatchProcessor processor;
 ProgramVector programVector;
-static int errorcode = 0;
+extern int errorcode;
 
 PatchProcessor* getInitialisingPatchProcessor(){
   return &processor;
 }
 
-extern "C"{
-  int serviceCall(int service, void** params, int len){
-    printf("Service call (todo) : %d\n", service);
-    return -1;
-  }
-  void error(int8_t code, const char* reason){
-    printf("%s\n", reason);
-    errorcode = -1;
-  }
-}
-
 void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* patch){
   getInitialisingPatchProcessor()->setPatch(patch, name);
 }

From d4d591be484abd87ae1e8d09a1b5541d5c0294aa Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 11 Apr 2021 11:00:09 +0200
Subject: [PATCH 138/374] new AbstractSynth and related classes

---
 HISTORY.md                         |   2 +-
 LibSource/AbstractSynth.h          | 242 +++++++++++++++++++++++++++++
 LibSource/FastFourierTransform.cpp |   4 +-
 LibSource/IntArray.h               |  71 +++++++++
 LibSource/MidiProcessor.h          |  37 +++++
 LibSource/Resource.cpp             |   7 +-
 LibSource/VelocityCurve.h          |  31 ++++
 LibSource/WavFile.h                |  86 ++++++++++
 8 files changed, 476 insertions(+), 4 deletions(-)
 create mode 100644 LibSource/AbstractSynth.h
 create mode 100644 LibSource/MidiProcessor.h
 create mode 100644 LibSource/VelocityCurve.h
 create mode 100644 LibSource/WavFile.h

diff --git a/HISTORY.md b/HISTORY.md
index 9b348575..7ef6529f 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -3,7 +3,7 @@ v22.1
 
 * Added methods for sample-rate cutoff frequency modulation in StateVariableFilter and BiquadFilter
 * Added VelocityCurve, MidiProcessor, AbstractSynth
-* New templates for polyphonic and monophonic MIDI voicing: PolyphonicSynth and MonophonicSynth
+* New templates for MIDI voicing: PolyphonicSynth and MonophonicSynth
 * Added WavFile for reading wav resources and converting to FloatArray
 
 v22.0
diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
new file mode 100644
index 00000000..c74e965e
--- /dev/null
+++ b/LibSource/AbstractSynth.h
@@ -0,0 +1,242 @@
+#ifndef __AbstractSynth_h__
+#define __AbstractSynth_h__
+
+#include "SignalGenerator.h"
+#include "MidiProcessor.h"
+#include "VelocityCurve.h"
+
+class AbstractSynth : public MidiProcessor, public SignalGenerator, public VelocityCurve {
+protected:
+  uint8_t note = 69;
+  float pb = 0;
+  float pb_range = 2;
+public:
+  virtual ~AbstractSynth(){}
+  // getters and setters
+  /**
+   * Set note in whole semitones
+   */
+  uint8_t getNote(){
+    return note;
+  }
+  /**
+   * Set note in whole semitones and update frequency
+   */
+  void setNote(uint8_t note){
+    this->note = note;
+    setFrequency(noteToFrequency(note+pb));
+  }
+  /**
+   * Get pitch bend amount in semitones
+   */
+  float getPitchBend(){
+    return pb;
+  }
+  /**
+   * Set pitch bend amount in semitones and update frequency
+   */
+  void setPitchBend(float pb){
+    this->pb = pb;
+    setFrequency(noteToFrequency(note+pb));
+  }
+  float getPitchBendRange(){
+    return pb_range;
+  }
+  void setPitchBendRange(float range){
+    this->pb_range = range;
+  }  
+  float getFrequency(){
+    return noteToFrequency(note+pb);
+  }
+  // pure abstract methods that must be implemented by a derived class
+  virtual void setFrequency(float freq) = 0;
+  virtual void setGain(float gain) = 0;
+  virtual void gate(bool state) = 0;
+  // MIDI handlers
+  virtual void noteOn(MidiMessage msg){
+    note = msg.getNote();
+    setFrequency(noteToFrequency(note+pb));
+    setGain(velocityToGain(msg.getVelocity()));
+    gate(true);
+  }
+  virtual void noteOff(MidiMessage msg){
+    gate(false);
+  }
+  virtual void controlChange(MidiMessage msg){
+    if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
+      allNotesOff();
+  }
+  virtual void allNotesOff(){
+    gate(false);
+  }
+  virtual void pitchbend(MidiMessage msg){
+    setPitchBend(pb_range*msg.getPitchBend()/8192.0f);
+  }
+  // static utility methods
+  static inline float frequencyToNote(float freq){
+    return 12 * log2f(freq / 440) + 69;
+  }
+  static inline float noteToFrequency(float note){
+    return 440 * exp2f((note - 69) / 12);
+  }
+};
+  
+template
+class PolyphonicSynth : public AbstractSynth {
+private:
+  static const uint16_t TAKEN = 0xffff;
+  SynthVoice* voice[VOICES];
+  uint8_t notes[VOICES];
+  uint16_t allocation[VOICES];
+  uint16_t allocated;
+  FloatArray buffer;
+protected:
+  void take(uint8_t ch, MidiMessage msg){
+    release(ch);
+    notes[ch] = note;
+    allocation[ch] = TAKEN;
+    voice[ch]->noteOn(msg);
+  }
+  void release(uint8_t ch){
+    // notes[ch] = EMPTY;
+    allocation[ch] = ++allocated;
+    voice[ch]->setGate(false);
+  }
+public:
+  PolyphonicSynth(float sr, int bs) : allocated(0) {
+    for(int i=0; igetSamples(output);
+    for(int i=1; igetSamples(buffer);
+      output.add(buffer);
+    }
+  }
+  void setFrequency(float freq){
+    for(int i=0; isetFrequency(freq);
+  }
+  void setGain(float gain){
+    for(int i=0; isetGain(gain);
+  }
+  void gate(bool state){
+    for(int i=0; igate(state);
+  }
+  void setPitchBend(float pb){
+    for(int i=0; isetPitchBend(pb);
+  }
+  SynthVoice* getVoice(size_t index){
+    if(index < VOICES)
+      return voice[index];
+    return NULL;
+  }
+};
+
+template
+class MonophonicSynth : public AbstractSynth {
+private:
+  SynthVoice* voice;
+  uint8_t notes[16];
+  uint8_t lastNote = 0;
+public:
+  MonophonicSynth(SynthVoice* voice) : voice(voice) {}
+  virtual void noteOn(MidiMessage msg){
+    if(lastNote < 16)
+      notes[lastNote++] = msg.getNote();
+    voice->noteOn(msg);
+  }
+  virtual void noteOff(MidiMessage msg){
+    uint8_t note = msg.getNote();
+    int i;
+    for(i = 0; i < lastNote; ++i) {
+      if(notes[i] == note)
+	break;
+    }
+    if(lastNote > 1) {
+      lastNote--;
+      while (i < lastNote) {
+	notes[i] = notes[i + 1];
+	i++;
+      }
+      voice->setNote(notes[lastNote - 1]);
+    }else{
+      voice->gate(false);
+      lastNote = 0;
+    }
+  }
+  void allNotesOff() {
+    voice->gate(false);
+    lastNote = 0;
+  }
+  float generate(){
+    return voice->generate();
+  }
+  void generate(FloatArray output){
+    voice->generate(output);
+  }
+  void setFrequency(float freq){
+    voice->setFrequency(freq);
+  }
+  void setGain(float gain){
+    voice->setGain(gain);
+  }
+  void gate(bool state){
+    voice->gate(state);
+  }
+  void setPitchBend(float pb){
+    voice->setPitchBend(pb);
+    debugMessage("pb", pb);
+  }
+  // void pitchbend(MidiMessage msg){
+  //   voice->pitchbend(msg);
+  // }
+  SynthVoice* getVoice(){
+    return voice;
+  }
+};
+
+#endif // __AbstractSynth_h__
diff --git a/LibSource/FastFourierTransform.cpp b/LibSource/FastFourierTransform.cpp
index 5ef0d090..2f82c293 100644
--- a/LibSource/FastFourierTransform.cpp
+++ b/LibSource/FastFourierTransform.cpp
@@ -45,6 +45,8 @@ FastFourierTransform::FastFourierTransform(size_t aSize){
 }
 
 FastFourierTransform::~FastFourierTransform(){
+  free(cfgfft);
+  free(cfgifft);
   ComplexFloatArray::destroy(temp);
 }
 
@@ -52,7 +54,7 @@ void FastFourierTransform::init(size_t aSize){
   ASSERT(aSize==32 || aSize ==64 || aSize==128 || aSize==256 || aSize==512 || aSize==1024 || aSize==2048 || aSize==4096, "Unsupported FFT size");
   cfgfft = kiss_fft_alloc(aSize, 0 , 0, 0);
   cfgifft = kiss_fft_alloc(aSize, 1,0, 0);
-  temp = ComplexFloatArray::create(getSize());
+  temp = ComplexFloatArray::create(aSize);
 }
 
 void FastFourierTransform::fft(FloatArray input, ComplexFloatArray output){
diff --git a/LibSource/IntArray.h b/LibSource/IntArray.h
index f7036b56..5fd53fa2 100644
--- a/LibSource/IntArray.h
+++ b/LibSource/IntArray.h
@@ -4,6 +4,7 @@
 #include 
 #include "SimpleArray.h"
 #include "FloatArray.h"
+#include 
 
 class IntArray : public SimpleArray {
 public:
@@ -78,6 +79,76 @@ class IntArray : public SimpleArray {
 #endif
   }
 
+    /**
+   * A subset of the array.
+   * Returns a array that points to subset of the memory used by the original array.
+   * @param[in] offset the first element of the subset.
+   * @param[in] length the number of elments in the new IntArray.
+   * @return the newly created IntArray.
+   * @remarks no memory is allocated by this method. The memory is still shared with the original array.
+   * The memory should not be de-allocated elsewhere (e.g.: by calling IntArray::destroy() on the original IntArray) 
+   * as long as the IntArray returned by this method is still in use.
+   * @remarks Calling IntArray::destroy() on a IntArray instance created with this method might cause an exception.
+  */
+  IntArray subArray(int offset, size_t length){
+    ASSERT(size >= offset+length, "Array too small");
+    return IntArray(data+offset, length);
+  }
+
+
+  /**
+   * Copies the content of the array to a FloatArray, interpreting the content
+   * of the IntArray as 1.31.
+   * @param[out] destination the destination array
+   */
+  void toFloat(FloatArray destination){
+    ASSERT(destination.getSize() == size, "Size does not match");
+#ifdef ARM_CORTEX
+    /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
+    arm_q31_to_float(data, destination.getData(), size);
+#else
+    for(size_t n = 0; n < size; ++n)
+      destination[n] = getFloatValue(n);
+#endif
+  }
+
+  /**
+   * Copies the content of a FloatArray into a IntArray, converting
+   * the float elements to fixed-point 1.31.
+   * @param[in] source the source array
+   */
+  void fromFloat(FloatArray source){
+    ASSERT(source.getSize() == size, "Size does not match");
+#ifdef ARM_CORTEX
+    /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
+    arm_float_to_q31(source.getData(), data, size);
+#else
+    for(size_t n = 0; n < size; ++n){
+      setFloatValue(n, source[n]);
+    }
+#endif
+  }
+
+  /**
+   * Converts a float to int16 and stores it.
+   *
+   * @param n the array element to write to.
+   * @value the value to write
+   */
+  void setFloatValue(uint32_t n, float value){
+    data[n] = (int32_t)(value * -(float)INT_MIN);
+  }
+
+  /**
+   * Returns an element of the array converted to float.
+   *
+   * @param n the array element to read.
+   * @return the floating point representation of the element.
+   */
+  float getFloatValue(uint32_t n){
+    return data[n] / -(float)INT_MIN;
+  }
+
   /**
    * Creates a new IntArray.
    * Allocates size*sizeof(int32_t) bytes of memory and returns a IntArray that points to it.
diff --git a/LibSource/MidiProcessor.h b/LibSource/MidiProcessor.h
new file mode 100644
index 00000000..9b29b595
--- /dev/null
+++ b/LibSource/MidiProcessor.h
@@ -0,0 +1,37 @@
+#ifndef __MidiProcessor_h__
+#define __MidiProcessor_h__
+
+#include "MidiMessage.h"
+
+/**
+ * Base class for midi processors such as Synths
+ * Derived classes can overload the specific message handlers,
+ * and/or the entry-point: @method process(MidiMessage msg)
+ */
+class MidiProcessor {
+public:
+  virtual ~MidiProcessor(){}
+  virtual void noteOn(MidiMessage msg){}
+  virtual void noteOff(MidiMessage msg){}
+  virtual void pitchbend(MidiMessage msg){}
+  virtual void controlChange(MidiMessage msg){}
+  virtual void channelPressure(MidiMessage msg){}
+  virtual void process(MidiMessage msg) {
+    if(msg.isNoteOn()) {
+      if(msg.getVelocity())
+	noteOn(msg);
+      else
+	noteOff(msg);
+    }else if(msg.isNoteOff()) {
+      noteOff(msg);
+    }else if(msg.isPitchBend()) {
+      pitchbend(msg);
+    }else if(msg.isControlChange()) {
+      controlChange(msg);
+    }else if(msg.isChannelPressure()) {
+      channelPressure(msg);
+    }
+  }  
+};
+
+#endif // __MidiProcessor_h__
diff --git a/LibSource/Resource.cpp b/LibSource/Resource.cpp
index 3263291e..8ff9e114 100644
--- a/LibSource/Resource.cpp
+++ b/LibSource/Resource.cpp
@@ -36,15 +36,18 @@ Resource* Resource::open(const char* name){
 Resource* Resource::load(const char* name){
   Resource* resource = Resource::open(name);
   if(resource && !resource->hasData()){
-    uint8_t* data = new uint8_t[resource->size];
     size_t offset = 0;
+    size_t size = resource->size;
+    uint8_t* data = new uint8_t[size];
     void* args[] = {
-		    (void*)name, (void*)&data, (void*)&offset, (void*)&resource->size
+      (void*)name, (void*)&data, (void*)&offset, (void*)&size
     };
     if (getProgramVector()->serviceCall(OWL_SERVICE_LOAD_RESOURCE, args, 4) == OWL_SERVICE_OK){
       resource->data = data;
+      resource->size = size;
       resource->allocated = true;
     }else{
+      resource->size = 0;
       delete[] data;
     }
   }
diff --git a/LibSource/VelocityCurve.h b/LibSource/VelocityCurve.h
new file mode 100644
index 00000000..dc0340dc
--- /dev/null
+++ b/LibSource/VelocityCurve.h
@@ -0,0 +1,31 @@
+#ifndef __VelocityCurve_h__
+#define __VelocityCurve_h__
+
+/**
+ * General MIDI DLS Level 1 Specification:
+ * The MIDI Note Velocity value is converted to attenuation in dB by the Concave Transform
+ * attenuation = 20*log10(127^2/velocity^2)
+ * so gain = velocity^2/127^2
+ * Adjustable for dynamic range.
+ * ref: https://www.cs.cmu.edu/~rbd/papers/velocity-icmc2006.pdf
+ */
+class VelocityCurve {
+private:
+  // defaults for 72dB range: r=10^(72/20), b=127/(126*sqrt(r)) - 1/126, m=(1-b)/127
+  float b = 0.00803821f;
+  float m = 0.00781072f;
+public:
+  void setDynamicRange(float db){
+    float r = exp10f(db/20);
+    b = 127/(126*sqrtf(r)) - 1.0f/126;
+    m = (1-b)/127;
+  }
+  float velocityToGain(float v){
+    /* a = peak RMS value, v is velocity */
+    /* a = (m*v+b)^2 */
+    float root = m*v+b;
+    return root*root;
+  }
+};
+
+#endif // __VelocityCurve_h__
diff --git a/LibSource/WavFile.h b/LibSource/WavFile.h
new file mode 100644
index 00000000..72481e94
--- /dev/null
+++ b/LibSource/WavFile.h
@@ -0,0 +1,86 @@
+#ifndef __WavFile_h__
+#define __WavFile_h__
+
+#include "IntArray.h"
+#include "ShortArray.h"
+#include "FloatArray.h"
+
+// supports only basic 44-byte wav headers with PCM type
+// http://www-mmsp.ece.mcgill.ca/Documents/AudioFormats/WAVE/WAVE.html
+
+typedef struct {
+    char     chunk_id[4];
+    uint32_t chunk_size;
+    char     format[4];
+    char     fmtchunk_id[4];
+    uint32_t fmtchunk_size; // Chunk size: 16, 18 or 40
+    uint16_t audio_format; // 1 = PCM, 3 = float
+    uint16_t num_channels;
+    uint32_t sample_rate;
+    uint32_t byte_rate;
+    uint16_t block_align;
+    uint16_t bps;
+    char     datachunk_id[4];
+    uint32_t datachunk_size;
+}WavHeader;
+
+class WavFile {
+  WavHeader* header;
+public:
+  WavFile(WavHeader* header) : header(header){}
+  WavHeader* getHeader(){
+    return header;
+  }
+  bool isValid(){
+    // support only basic 44-byte wav headers with PCM type
+    if(strncmp(header->chunk_id, "RIFF", 4) ||
+       strncmp(header->format, "WAVE", 4) ||
+       strncmp(header->datachunk_id, "data", 4) ||
+       header->datachunk_size == 0 ||
+       header->fmtchunk_size != 16)
+      return false;
+    if(header->audio_format == 1 && header->bps == 16)
+      return true;
+    if(header->audio_format == 1 && header->bps == 32)
+      return true;
+    if(header->audio_format == 3 && header->bps == 32)
+      return true;
+    return false;
+  }
+  size_t getNumberOfChannels(){
+    return header->num_channels;
+  }
+  size_t getNumberOfSamples(){
+    return header->datachunk_size/(header->bps/8);    
+  }
+  void* getData(){
+    // if(header->fmtchunk_size == 16)
+    return ((uint8_t*)header) + sizeof(WavHeader);
+  }
+  FloatArray createFloatArray(){
+    uint8_t* data = ((uint8_t*)header) + sizeof(WavHeader);
+    size_t len = getNumberOfSamples();
+    if(header->audio_format == 1 && header->bps == 16){ // WAVE_FORMAT_PCM
+      ShortArray samples((int16_t*)data, len);
+      FloatArray result = FloatArray::create(samples.getSize());
+      samples.toFloat(result);
+      return result;
+    }else if(header->audio_format == 1 && header->bps == 32){ // WAVE_FORMAT_PCM
+      IntArray samples((int32_t*)data, len);
+      FloatArray result = FloatArray::create(samples.getSize());
+      samples.toFloat(result);
+      return result;
+    // }else if(header->audio_format == 3 && header->bps == 32){ // WAVE_FORMAT_IEEE_FLOAT
+    //   FloatArray samples((float*)data, len);
+    //   FloatArray result = FloatArray::create(samples.getSize());
+    //   samples.copyTo(result);
+    //   return result;
+    }
+    return FloatArray();
+  }
+  static WavFile create(void* data){
+    return WavFile((WavHeader*)data);
+  }
+};
+
+#endif // __WavFile_h__

From f035f2b05e70ba227a5ec43b4c0e84b117f9467a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 11 Apr 2021 12:36:11 +0200
Subject: [PATCH 139/374] attempt to load resources from filesystem when
 running patches

---
 TestPatches/DummyPatch.hpp | 21 +++++++++++++++++++--
 TestPatches/PatchRun.cpp   |  1 +
 TestPatches/wav.h          | 15 ---------------
 3 files changed, 20 insertions(+), 17 deletions(-)

diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp
index 9808db1b..8a9df422 100644
--- a/TestPatches/DummyPatch.hpp
+++ b/TestPatches/DummyPatch.hpp
@@ -8,6 +8,24 @@ static uint32_t button_values = 0;
 int errorcode = 0;
 
 extern "C"{
+  size_t fileread(const char *file_name, uint8_t** data, size_t size){
+    FILE* fd;
+    if(!file_name)
+      errx(1, "Filename not specified");
+    if((fd = fopen(file_name, "rb")) == NULL)
+      errx(1, "Error opening file");
+    if(*data){
+      if(fread(*data, 1, size, fd) < size)
+	errx(1, "File read failed");
+    }else{
+      fseek(fd, 0L, SEEK_END);
+      size = ftell(fd);
+      rewind(fd);
+    }
+    fclose(fd);
+    return size;
+  }
+
   int serviceCall(int service, void** params, int len){
     int ret = -1;
     switch(service){
@@ -18,8 +36,7 @@ extern "C"{
 	uint32_t offset = *(uint32_t*)params[2];
 	uint32_t* max_size = (uint32_t*)params[3];
 	printf("Service call (LOAD RESOURCE) : %s [%u:%u]\n", name, offset, *max_size);
-	if(*buffer == NULL)
-	  *max_size = 16384*4;
+	*max_size = fileread(name, buffer, *max_size);
 	ret = OWL_SERVICE_OK;
       }else{
 	printf("Service call (LOAD RESOURCE) Invalid");
diff --git a/TestPatches/PatchRun.cpp b/TestPatches/PatchRun.cpp
index e1d9d136..d7bd7a11 100644
--- a/TestPatches/PatchRun.cpp
+++ b/TestPatches/PatchRun.cpp
@@ -16,6 +16,7 @@ void vPortFree( void *pv ){
 #include "PatchProcessor.h"
 #include "MemoryBuffer.hpp"
 #include "registerpatch.h"
+#include "WavFile.h"
 #include "wav.h"
 
 #define SAMPLE_RATE 48000
diff --git a/TestPatches/wav.h b/TestPatches/wav.h
index 838e6d4a..17f60b47 100644
--- a/TestPatches/wav.h
+++ b/TestPatches/wav.h
@@ -9,21 +9,6 @@
 #include 
 #include 
 
-typedef struct {
-    char     chunk_id[4];
-    uint32_t chunk_size;
-    char     format[4];
-    char     fmtchunk_id[4];
-    uint32_t fmtchunk_size;
-    uint16_t audio_format;
-    uint16_t num_channels;
-    uint32_t sample_rate;
-    uint32_t byte_rate;
-    uint16_t block_align;
-    uint16_t bps;
-    char     datachunk_id[4];
-    uint32_t datachunk_size;
-}WavHeader;
 void wavread(WavHeader *header, const char *file_name, int16_t **samples)
 {
     int fd;

From 57923e199e6694012c26d1eeffad51f91fb36cac Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 11 Apr 2021 13:03:07 +0200
Subject: [PATCH 140/374] refactored wav reading/writing to use WavFile class

---
 TestPatches/DummyPatch.hpp | 21 ++-------------
 TestPatches/PatchRun.cpp   | 26 +++++++++----------
 TestPatches/fileio.h       | 48 +++++++++++++++++++++++++++++++++++
 TestPatches/wav.h          | 52 --------------------------------------
 4 files changed, 63 insertions(+), 84 deletions(-)
 create mode 100644 TestPatches/fileio.h
 delete mode 100644 TestPatches/wav.h

diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp
index 8a9df422..4cdbd8a9 100644
--- a/TestPatches/DummyPatch.hpp
+++ b/TestPatches/DummyPatch.hpp
@@ -2,30 +2,13 @@
 #include "FastPowTable.h"
 #include "FastLogTable.h"
 #include "basicmaths.h"
+#include "fileio.h"
 
 static float parameter_values[40] = {};
 static uint32_t button_values = 0;
 int errorcode = 0;
 
 extern "C"{
-  size_t fileread(const char *file_name, uint8_t** data, size_t size){
-    FILE* fd;
-    if(!file_name)
-      errx(1, "Filename not specified");
-    if((fd = fopen(file_name, "rb")) == NULL)
-      errx(1, "Error opening file");
-    if(*data){
-      if(fread(*data, 1, size, fd) < size)
-	errx(1, "File read failed");
-    }else{
-      fseek(fd, 0L, SEEK_END);
-      size = ftell(fd);
-      rewind(fd);
-    }
-    fclose(fd);
-    return size;
-  }
-
   int serviceCall(int service, void** params, int len){
     int ret = -1;
     switch(service){
@@ -131,7 +114,7 @@ void arm_bitreversal_16(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t
 
 extern "C"{
   void doSetButton(uint8_t bid, uint16_t value, uint16_t samples){
-    printf("Set button %c: %d\n", 'A'+bid, value);
+    printf("Set button %c: %d\n", 'A'+bid-4, value);
     if(value)
       button_values |= (1< 1){
     const char* input_filename = argv[1];
-    WavHeader *wav_header = new WavHeader();
-    int16_t* data = NULL;
-    wavread(wav_header, input_filename, &data);
-    ASSERT(wav_header->num_channels == CHANNELS, "Incorrect number of channels in input file");
-    // ASSERT(wav_header->sample_rate == SAMPLE_RATE, "Incorrect sample rate in input file");
-    ASSERT(wav_header->bps == 16, "Incorrect number of bits per sample in input file");
-    const int channels = wav_header->num_channels;
-    const int len = wav_header->datachunk_size/(wav_header->fmtchunk_size/8);
-    int16_t* src = data;
-    int16_t* end = data+len;
+    uint8_t* data = NULL;
+    size_t len = fileread(input_filename, &data, 0);
+    data = (uint8_t*)malloc(len);
+    fileread(input_filename, &data, len);
+    WavFile wav = WavFile::create(data);
+    const int channels = wav.getNumberOfChannels();
+    // ASSERT(wav.getSampleRate() == SAMPLE_RATE, "Incorrect sample rate in input file");
+    ASSERT(channels == CHANNELS, "Incorrect number of channels in input file");
+    ASSERT(wav.getBitsPerSample() == 16, "Incorrect number of bits per sample in input file");
+    ASSERT(wav.isValid(), "Invalid wav");
+    int16_t* src = (int16_t*)wav.getData();
+    int16_t* end = src+wav.getNumberOfSamples();
     while(src+BLOCKSIZE <= end){
       samples->split16(src, BLOCKSIZE);
       processor.patch->processAudio(*samples);
@@ -66,10 +67,9 @@ int main(int argc, char** argv){
     }
     if(argc > 2){
       const char* output_filename = argv[2];
-      wavwrite(wav_header, output_filename, data);
+      filewrite(output_filename, data, len);
     }
     free(data);
-    delete wav_header;
   }else{
     processor.patch->processAudio(*samples);
   }
diff --git a/TestPatches/fileio.h b/TestPatches/fileio.h
new file mode 100644
index 00000000..fc102735
--- /dev/null
+++ b/TestPatches/fileio.h
@@ -0,0 +1,48 @@
+#ifndef __fileio_h__
+#define __fileio_h__
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+extern "C"{
+  size_t fileread(const char *file_name, uint8_t** data, size_t size){
+    FILE* fd;
+    if(!file_name)
+      errx(1, "Filename not specified");
+    if((fd = fopen(file_name, "rb")) == NULL)
+      errx(1, "Error opening file");
+    if(*data){
+      if(fread(*data, 1, size, fd) < size)
+	errx(1, "File read failed");
+    }else{
+      fseek(fd, 0L, SEEK_END);
+      size = ftell(fd);
+      rewind(fd);
+    }
+    fclose(fd);
+    return size;
+  }
+  size_t filewrite(const char *file_name, uint8_t* data, size_t size){
+    int fd;
+    if (!file_name)
+        errx(1, "Filename not specified");
+    if (!data)
+        errx(1, "Data buffer not specified");
+    if ((fd = creat(file_name, 0666)) < 1)
+        errx(1, "Error creating file");
+    if (write(fd, data, size) < size)
+        errx(1, "Error writing samples");
+    close(fd);
+    return size;
+  }
+}
+
+#endif // __fileio_h__
diff --git a/TestPatches/wav.h b/TestPatches/wav.h
deleted file mode 100644
index 17f60b47..00000000
--- a/TestPatches/wav.h
+++ /dev/null
@@ -1,52 +0,0 @@
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-#include 
-
-void wavread(WavHeader *header, const char *file_name, int16_t **samples)
-{
-    int fd;
-    if (!file_name)
-        errx(1, "Filename not specified");
-    if ((fd = open(file_name, O_RDONLY)) < 1)
-        errx(1, "Error opening file");
-    if (!header)
-        header = (WavHeader*)malloc(sizeof(WavHeader));
-    if (read(fd, header, sizeof(WavHeader)) < (int)sizeof(WavHeader))
-        errx(1, "File broken: header");
-    if (strncmp(header->chunk_id, "RIFF", 4) ||
-        strncmp(header->format, "WAVE", 4))
-        errx(1, "Not a WAV file");
-    if (header->audio_format != 1)
-        warnx("Only PCM encoding supported");
-    if(header->datachunk_size == 0)
-        warnx("Data chunk size should not be zero");
-    if (*samples) free(*samples);
-    *samples = (int16_t*)malloc(header->datachunk_size);
-    if (!*samples)
-        errx(1, "Error allocating memory");
-    if (read(fd, *samples, header->datachunk_size) < header->datachunk_size)
-        errx(1, "File broken: samples");
-    close(fd);
-}
-void wavwrite(WavHeader *header, const char *file_name, int16_t *samples)
-{
-    int fd;
-    if (!file_name)
-        errx(1, "Filename not specified");
-    if (!samples)
-        errx(1, "Samples buffer not specified");
-    if ((fd = creat(file_name, 0666)) < 1)
-        errx(1, "Error creating file");
-    if (write(fd, header, sizeof(WavHeader)) < (int)sizeof(WavHeader))
-        errx(1, "Error writing header");
-    if (write(fd, samples, header->datachunk_size) < header->datachunk_size)
-        errx(1, "Error writing samples");
-    close(fd);
-}

From b6d3452a3bab600755b646792ae31f0fd4d89afe Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 11 Apr 2021 13:03:22 +0200
Subject: [PATCH 141/374] added WavFile::getBitsPerSample()

---
 LibSource/WavFile.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/LibSource/WavFile.h b/LibSource/WavFile.h
index 72481e94..a5f8a798 100644
--- a/LibSource/WavFile.h
+++ b/LibSource/WavFile.h
@@ -53,6 +53,9 @@ class WavFile {
   size_t getNumberOfSamples(){
     return header->datachunk_size/(header->bps/8);    
   }
+  size_t getBitsPerSample(){
+    return header->bps;
+  }
   void* getData(){
     // if(header->fmtchunk_size == 16)
     return ((uint8_t*)header) + sizeof(WavHeader);

From 5423eaddee403dc3a422ea9cd5b8cc24f3784953 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Apr 2021 03:01:18 +0200
Subject: [PATCH 142/374] added missing Patch::getBlockRate() implementation

---
 TestPatches/DummyPatch.hpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp
index 4cdbd8a9..e6598041 100644
--- a/TestPatches/DummyPatch.hpp
+++ b/TestPatches/DummyPatch.hpp
@@ -253,6 +253,10 @@ int Patch::getBlockSize(){
   return BLOCKSIZE;
 }
 
+float Patch::getBlockRate(){
+  return SAMPLE_RATE/BLOCKSIZE;
+}
+
 int Patch::getNumberOfChannels(){
   return CHANNELS;
 }

From 7919e89606974f96ec638ff6219bad5fdebbf4c1 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Apr 2021 03:02:06 +0200
Subject: [PATCH 143/374] changed Poly/MonophonicSynth to
 Poly/MonophonicProcessor, added pure abstract Synth class

---
 HISTORY.md                  |  4 +--
 LibSource/AbstractSynth.h   | 68 ++++++++++++++-----------------------
 LibSource/OpenWareLibrary.h |  4 +++
 LibSource/Synth.h           | 16 +++++++++
 4 files changed, 47 insertions(+), 45 deletions(-)
 create mode 100644 LibSource/Synth.h

diff --git a/HISTORY.md b/HISTORY.md
index 7ef6529f..a0ed0d96 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -2,8 +2,8 @@ v22.1
 -----
 
 * Added methods for sample-rate cutoff frequency modulation in StateVariableFilter and BiquadFilter
-* Added VelocityCurve, MidiProcessor, AbstractSynth
-* New templates for MIDI voicing: PolyphonicSynth and MonophonicSynth
+* Added VelocityCurve, MidiProcessor, Synth and AbstractSynth
+* New templates for MIDI voicing: PolyphonicProcessor and MonophonicProcessor
 * Added WavFile for reading wav resources and converting to FloatArray
 
 v22.0
diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index c74e965e..2e63c824 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -1,18 +1,17 @@
 #ifndef __AbstractSynth_h__
 #define __AbstractSynth_h__
 
-#include "SignalGenerator.h"
+#include "Synth.h"
 #include "MidiProcessor.h"
 #include "VelocityCurve.h"
 
-class AbstractSynth : public MidiProcessor, public SignalGenerator, public VelocityCurve {
+class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
 protected:
   uint8_t note = 69;
   float pb = 0;
   float pb_range = 2;
 public:
   virtual ~AbstractSynth(){}
-  // getters and setters
   /**
    * Set note in whole semitones
    */
@@ -39,19 +38,19 @@ class AbstractSynth : public MidiProcessor, public SignalGenerator, public Veloc
     this->pb = pb;
     setFrequency(noteToFrequency(note+pb));
   }
+  /**
+   * Get pitch bend range in semitones
+   */
   float getPitchBendRange(){
     return pb_range;
   }
+  /**
+   * Set pitch bend range in semitones.
+   * Does not update the frequency; effective from next pitch bend change
+   */
   void setPitchBendRange(float range){
     this->pb_range = range;
   }  
-  float getFrequency(){
-    return noteToFrequency(note+pb);
-  }
-  // pure abstract methods that must be implemented by a derived class
-  virtual void setFrequency(float freq) = 0;
-  virtual void setGain(float gain) = 0;
-  virtual void gate(bool state) = 0;
   // MIDI handlers
   virtual void noteOn(MidiMessage msg){
     note = msg.getNote();
@@ -82,7 +81,7 @@ class AbstractSynth : public MidiProcessor, public SignalGenerator, public Veloc
 };
   
 template
-class PolyphonicSynth : public AbstractSynth {
+class PolyphonicProcessor : public MidiProcessor {
 private:
   static const uint16_t TAKEN = 0xffff;
   SynthVoice* voice[VOICES];
@@ -93,7 +92,7 @@ class PolyphonicSynth : public AbstractSynth {
 protected:
   void take(uint8_t ch, MidiMessage msg){
     release(ch);
-    notes[ch] = note;
+    notes[ch] = msg.getNote();
     allocation[ch] = TAKEN;
     voice[ch]->noteOn(msg);
   }
@@ -103,7 +102,7 @@ class PolyphonicSynth : public AbstractSynth {
     voice[ch]->setGate(false);
   }
 public:
-  PolyphonicSynth(float sr, int bs) : allocated(0) {
+  PolyphonicProcessor(float sr, int bs) : allocated(0) {
     for(int i=0; isetFrequency(freq);
-  }
-  void setGain(float gain){
-    for(int i=0; isetGain(gain);
-  }
-  void gate(bool state){
-    for(int i=0; igate(state);
+ void controlChange(MidiMessage msg){
+    if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
+      allNotesOff();
   }
-  void setPitchBend(float pb){
+  void pitchbend(MidiMessage msg){
     for(int i=0; isetPitchBend(pb);
+      pitchbend(msg);
   }
   SynthVoice* getVoice(size_t index){
     if(index < VOICES)
@@ -177,13 +168,13 @@ class PolyphonicSynth : public AbstractSynth {
 };
 
 template
-class MonophonicSynth : public AbstractSynth {
+class MonophonicProcessor : public MidiProcessor {
 private:
   SynthVoice* voice;
   uint8_t notes[16];
   uint8_t lastNote = 0;
 public:
-  MonophonicSynth(SynthVoice* voice) : voice(voice) {}
+  MonophonicProcessor(SynthVoice* voice) : voice(voice) {}
   virtual void noteOn(MidiMessage msg){
     if(lastNote < 16)
       notes[lastNote++] = msg.getNote();
@@ -218,22 +209,13 @@ class MonophonicSynth : public AbstractSynth {
   void generate(FloatArray output){
     voice->generate(output);
   }
-  void setFrequency(float freq){
-    voice->setFrequency(freq);
-  }
-  void setGain(float gain){
-    voice->setGain(gain);
-  }
-  void gate(bool state){
-    voice->gate(state);
+ void controlChange(MidiMessage msg){
+    if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
+      allNotesOff();
   }
-  void setPitchBend(float pb){
-    voice->setPitchBend(pb);
-    debugMessage("pb", pb);
+  void pitchbend(MidiMessage msg){
+    voice->pitchbend(msg);
   }
-  // void pitchbend(MidiMessage msg){
-  //   voice->pitchbend(msg);
-  // }
   SynthVoice* getVoice(){
     return voice;
   }
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index e1887c75..7723d3a0 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -1,6 +1,7 @@
 #ifndef __OpenWareLibrary_h__
 #define __OpenWareLibrary_h__
 
+#include "AbstractSynth.h"
 #include "BiquadFilter.h"
 #include "ChirpOscillator.h"
 #include "CircularBuffer.h"
@@ -18,6 +19,7 @@
 #include "FloatArray.h"
 #include "FloatMatrix.h"
 #include "IntArray.h"
+#include "MidiProcessor.h"
 #include "NoiseGenerator.h"
 #include "OpenWareMidiControl.h"
 #include "Oscillator.h"
@@ -36,7 +38,9 @@
 #include "SmoothValue.h"
 #include "SmoothingFilter.h"
 #include "StateVariableFilter.h"
+#include "Synth.h"
 #include "VoltsPerOctave.h"
+#include "VelocityCurve.h"
 #include "WavetableOscillator.h"
 #include "Window.h"
 
diff --git a/LibSource/Synth.h b/LibSource/Synth.h
new file mode 100644
index 00000000..74602e02
--- /dev/null
+++ b/LibSource/Synth.h
@@ -0,0 +1,16 @@
+#ifndef __Synth_h__
+#define __Synth_h__
+
+#include "SignalGenerator.h"
+
+class Synth : public SignalGenerator {
+public:
+  virtual ~Synth(){}
+  // pure abstract methods that must be implemented by a derived class
+  virtual void setFrequency(float freq) = 0;
+  virtual void setGain(float gain) = 0;
+  virtual void gate(bool state) = 0;
+  virtual void trigger() = 0;
+};
+
+#endif // __Synth_h__

From 1bd226b119d29b99aa3e1d94d00b2a826d7362bf Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Apr 2021 03:08:02 +0200
Subject: [PATCH 144/374] added missing include

---
 LibSource/AbstractSynth.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index 2e63c824..13dc0992 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -1,6 +1,7 @@
 #ifndef __AbstractSynth_h__
 #define __AbstractSynth_h__
 
+#include 
 #include "Synth.h"
 #include "MidiProcessor.h"
 #include "VelocityCurve.h"

From 1bbe2dccedb96415fe3a303bb3386d1a8f85286e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Apr 2021 03:23:49 +0200
Subject: [PATCH 145/374] simplified AbstractSynth to call setNote from noteOn

---
 LibSource/AbstractSynth.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index 13dc0992..8d654e86 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -8,7 +8,7 @@
 
 class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
 protected:
-  uint8_t note = 69;
+  uint8_t note = 60; // C4
   float pb = 0;
   float pb_range = 2;
 public:
@@ -54,7 +54,7 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
   }  
   // MIDI handlers
   virtual void noteOn(MidiMessage msg){
-    note = msg.getNote();
+    setNote(msg.getNote());
     setFrequency(noteToFrequency(note+pb));
     setGain(velocityToGain(msg.getVelocity()));
     gate(true);

From 036e5d7ae4c73a38aae3d3e89c69b3edb871d248 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 13 Apr 2021 04:01:03 +0200
Subject: [PATCH 146/374] disable ASSERT on hardware if not compiling in debug
 mode

---
 LibSource/message.h | 4 ++++
 compile.mk          | 2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/LibSource/message.h b/LibSource/message.h
index e5d736e2..67981630 100644
--- a/LibSource/message.h
+++ b/LibSource/message.h
@@ -12,7 +12,11 @@
 /* #define ASSERT_FALSE(cond) if(cond){debugAssertFailed("Assertion failed", __PRETTY_FUNCTION__, __LINE__);} */
 /* #define ASSERT(cond, msg) if(!(cond)){debugAssertFailed(msg, __PRETTY_FUNCTION__, __LINE__);} */
 
+#ifndef NDEBUG
 #define ASSERT(cond, msg) if(!(cond)){assert_failed(msg, __PRETTY_FUNCTION__, __LINE__);}
+#else
+#define ASSERT(cond, msg)
+#endif
 
 #ifndef CHECKSUM_ERROR_STATUS
 #define CHECKSUM_ERROR_STATUS      -10
diff --git a/compile.mk b/compile.mk
index 5c22b0c6..d306ffc2 100644
--- a/compile.mk
+++ b/compile.mk
@@ -7,7 +7,7 @@ ASFLAGS      = -g
 endif
 
 ifeq ($(CONFIG),Release)
-CPPFLAGS    ?= -Os -specs=nano.specs -ffast-math
+CPPFLAGS    ?= -Os -specs=nano.specs -ffast-math -DNDEBUG
 endif
 
 # Code Paths

From 072f66926d6ff975ac832602f5f67da498524ca0 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 13 Apr 2021 04:04:15 +0200
Subject: [PATCH 147/374] added metadata for gen patches

---
 GenSource/GenPatch.hpp   | 74 +++++++++++++++++++++++++++++++++++-----
 Source/PatchMetadata.cpp | 11 ++++++
 Source/PatchMetadata.h   | 31 +++++++++++++++++
 3 files changed, 108 insertions(+), 8 deletions(-)
 create mode 100644 Source/PatchMetadata.cpp
 create mode 100644 Source/PatchMetadata.h

diff --git a/GenSource/GenPatch.hpp b/GenSource/GenPatch.hpp
index b1833014..82a8e3e2 100644
--- a/GenSource/GenPatch.hpp
+++ b/GenSource/GenPatch.hpp
@@ -3,6 +3,11 @@
 
 #include "Patch.h"
 #include "gen.h"
+#include "PatchMetadata.h"
+
+#if __has_include("metadata.h")
+#include "metadata.h"
+#endif
 
 #define GEN_OWL_PARAM_FREQ "freq"
 #define GEN_OWL_PARAM_GAIN "gain"
@@ -14,7 +19,6 @@
 #define GEN_OWL_PARAM_BUTTON_B "ButtonB"
 #define GEN_OWL_PARAM_BUTTON_C "ButtonC"
 #define GEN_OWL_PARAM_BUTTON_D "ButtonD"
-#define GEN_OWL_MAX_PARAM_COUNT 20
 
 class MonoVoiceAllocator {
   float& freq;
@@ -104,7 +108,9 @@ class GenParameter : public GenParameterBase {
   float min = 0.0;
   float max = 1.0;
   GenParameter(Patch* patch, CommonState *context, const char* name, PatchParameterId id, int8_t idx) : pid(id), index(idx) {
+#ifndef OWL_METADATA
     patch->registerParameter(id, name);
+#endif
     if(gen::getparameterhasminmax(context, index)){
       min = gen::getparametermin(context, index);
       max = gen::getparametermax(context, index);
@@ -155,8 +161,19 @@ class GenVariableParameter : public GenParameterBase  {
 
 class GenPatch : public Patch {
 private:
+  class OutputParameter {
+  public:
+    uint16_t id;
+    const char* name;
+    FloatArray buffer;
+    OutputParameter() : name(NULL) {}
+    OutputParameter(uint16_t id, const char* name, FloatArray buffer)
+      : id(id), name(name), buffer(buffer) {}
+  };
+  SimpleArray outputs;
+
   CommonState *context;
-  GenParameterBase* params[GEN_OWL_MAX_PARAM_COUNT];
+  GenParameterBase** params;
   size_t param_count = 0;
   float freq = 440.0f;
   float gain = 0.0f;
@@ -168,7 +185,8 @@ class GenPatch : public Patch {
   GenPatch() : allocator(freq, gain, gate, bend) {
     context = (CommonState*)gen::create(getSampleRate(), getBlockSize());
     int numParams = gen::num_params();
-    for(int i = 0; i < numParams && param_count < GEN_OWL_MAX_PARAM_COUNT; i++){
+    params = new GenParameterBase*[numParams];
+    for(int i = 0; i < numParams; i++){
       const char* name = gen::getparametername(context, i);
       if(strcasecmp(GEN_OWL_PARAM_FREQ, name) == 0){
 	params[param_count++] = new GenVariableParameter(this, context, name, &freq, i);
@@ -201,20 +219,55 @@ class GenPatch : public Patch {
     }
     buffers = new float*[gen::num_outputs()];
     size_t channels = getNumberOfChannels();
+    for(int ch=channels; ch 0)
+      outputs = SimpleArray(new OutputParameter[nof_outs], nof_outs);
+#ifdef OWL_METADATA
+    size_t outputindex = 0;
+    for(int i=0; i 0x100){
+	float maxvalue = outputs[i].buffer.getMaxValue();
+	setButton((PatchButtonId)(outputs[i].id-0x100), maxvalue > 0.5);
+      }else{
+	float avg = outputs[i].buffer.getMean();
+	setParameterValue((PatchParameterId)outputs[i].id, avg);      
+      }
     }
   }
 };
diff --git a/Source/PatchMetadata.cpp b/Source/PatchMetadata.cpp
new file mode 100644
index 00000000..eb49de51
--- /dev/null
+++ b/Source/PatchMetadata.cpp
@@ -0,0 +1,11 @@
+#include "PatchMetadata.h"
+
+#define __weak  __attribute__((weak))
+
+__weak const char* PatchMetadata::name = NULL;
+__weak const int PatchMetadata::channels_in = 2;
+__weak const int PatchMetadata::channels_out = 2;
+__weak const int PatchMetadata::parameter_count = 2;
+__weak const int PatchMetadata::button_count = 2;
+__weak const PatchMetadata::Control PatchMetadata::parameters[] = {};
+__weak const PatchMetadata::Control PatchMetadata::buttons[] = {};
diff --git a/Source/PatchMetadata.h b/Source/PatchMetadata.h
new file mode 100644
index 00000000..be9dcf97
--- /dev/null
+++ b/Source/PatchMetadata.h
@@ -0,0 +1,31 @@
+#ifndef __PatchMetadata_h
+#define __PatchMetadata_h
+
+#define CONTROL_INPUT     0
+#define CONTROL_OUTPUT    1
+#define CONTROL_UNIPOLAR  0
+#define CONTROL_BIPOLAR   2
+
+#define CONTROL_BUTTON    4
+#define CONTROL_TOGGLE    8
+
+#define NOF_PARAMETERS    20
+#define NOF_BUTTONS       20
+
+struct PatchMetadata {
+public:
+  struct Control {
+    uint8_t id;
+    uint8_t flags;
+    const char* name;
+  };
+  static const char* name;
+  static const int channels_in;
+  static const int channels_out;
+  static const int parameter_count;
+  static const int button_count;
+  static const Control parameters[NOF_PARAMETERS];
+  static const Control buttons[NOF_BUTTONS];
+};
+
+#endif /* __PatchMetadata_h */

From 1214225d27b68ec79a0db000ed3fdee3e8923711 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 13 Apr 2021 17:02:20 +0200
Subject: [PATCH 148/374] fixes to PolyphonicProcessor

---
 LibSource/AbstractSynth.h   | 52 +++++++++++++++++++++----------------
 LibSource/OpenWareLibrary.h |  1 +
 2 files changed, 31 insertions(+), 22 deletions(-)

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index 8d654e86..e5e86304 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -98,28 +98,19 @@ class PolyphonicProcessor : public MidiProcessor {
     voice[ch]->noteOn(msg);
   }
   void release(uint8_t ch){
-    // notes[ch] = EMPTY;
     allocation[ch] = ++allocated;
-    voice[ch]->setGate(false);
+    voice[ch]->gate(false);
   }
 public:
-  PolyphonicProcessor(float sr, int bs) : allocated(0) {
-    for(int i=0; i* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new PolyphonicProcessor(buffer);
   }
-  void allNotesOff(){
-    for(int i=0; i* obj){
+    delete obj->buffer;
+    delete obj;
   }
   void noteOn(MidiMessage msg){
     uint8_t note = msg.getNote();
@@ -138,7 +129,6 @@ class PolyphonicProcessor : public MidiProcessor {
     }
     // take oldest voice
     take(minidx, msg);
-    // debugMessage("idx/note/vel", minidx, note, velocity);
   }
   void noteOff(MidiMessage msg){
     uint8_t note = msg.getNote();
@@ -146,10 +136,16 @@ class PolyphonicProcessor : public MidiProcessor {
       if(notes[i] == note)
 	release(i);
   }
+  float generate(){
+    float sample = 0.0f;
+    for(int i=0; igenerate();
+    return sample;
+  }
   void generate(FloatArray output){
-    voice[0]->getSamples(output);
+    voice[0]->generate(output);
     for(int i=1; igetSamples(buffer);
+      voice[i]->generate(buffer);
       output.add(buffer);
     }
   }
@@ -159,7 +155,19 @@ class PolyphonicProcessor : public MidiProcessor {
   }
   void pitchbend(MidiMessage msg){
     for(int i=0; ipitchbend(msg);
+  }
+  void allNotesOn() {
+    for(int i=0; igate(true);      
+  }
+  void allNotesOff() {
+    for(int i=0; igate(false);      
+  }
+  void setVoice(size_t index, SynthVoice* obj){
+    if(index < VOICES)
+      voice[index] = obj;
   }
   SynthVoice* getVoice(size_t index){
     if(index < VOICES)
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 7723d3a0..88cae4e9 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -41,6 +41,7 @@
 #include "Synth.h"
 #include "VoltsPerOctave.h"
 #include "VelocityCurve.h"
+#include "WavFile.h"
 #include "WavetableOscillator.h"
 #include "Window.h"
 

From e9f6ea9b3edf437c6c6928984b0d1fa6e47f88e4 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 15 Apr 2021 06:34:05 +0200
Subject: [PATCH 149/374] refactored Synth and Poly/monophonic classes

---
 LibSource/AbstractSynth.h       | 153 +-------------------------------
 LibSource/AudioBuffer.h         |  18 ++++
 LibSource/MidiProcessor.h       |   2 +-
 LibSource/MonophonicProcessor.h |  78 ++++++++++++++++
 LibSource/OpenWareLibrary.h     |   6 ++
 LibSource/Patch.h               |  12 +--
 LibSource/PolyphonicProcessor.h | 140 +++++++++++++++++++++++++++++
 LibSource/SignalGenerator.h     |   2 +-
 LibSource/Synth.h               |  10 ++-
 LibSource/WavFile.h             |   5 +-
 Source/MemoryBuffer.hpp         |   4 +
 TestPatches/PatchRun.cpp        |   2 +-
 12 files changed, 261 insertions(+), 171 deletions(-)
 create mode 100644 LibSource/AudioBuffer.h
 create mode 100644 LibSource/MonophonicProcessor.h
 create mode 100644 LibSource/PolyphonicProcessor.h

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index e5e86304..799daa52 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -63,7 +63,9 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
     gate(false);
   }
   virtual void controlChange(MidiMessage msg){
-    if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
+    if(msg.getControllerNumber() == MIDI_CC_MODULATION)
+      setParameter(1, msg.getControllerValue()/127.0f);
+    else if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
       allNotesOff();
   }
   virtual void allNotesOff(){
@@ -80,154 +82,5 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
     return 440 * exp2f((note - 69) / 12);
   }
 };
-  
-template
-class PolyphonicProcessor : public MidiProcessor {
-private:
-  static const uint16_t TAKEN = 0xffff;
-  SynthVoice* voice[VOICES];
-  uint8_t notes[VOICES];
-  uint16_t allocation[VOICES];
-  uint16_t allocated;
-  FloatArray buffer;
-protected:
-  void take(uint8_t ch, MidiMessage msg){
-    release(ch);
-    notes[ch] = msg.getNote();
-    allocation[ch] = TAKEN;
-    voice[ch]->noteOn(msg);
-  }
-  void release(uint8_t ch){
-    allocation[ch] = ++allocated;
-    voice[ch]->gate(false);
-  }
-public:
-  PolyphonicProcessor(FloatArray buffer) : allocated(0), buffer(buffer) {}
-  virtual ~PolyphonicProcessor(){};
-  static PolyphonicProcessor* create(size_t blocksize){
-    FloatArray buffer = FloatArray::create(blocksize);    
-    return new PolyphonicProcessor(buffer);
-  }
-  static void destroy(PolyphonicProcessor* obj){
-    delete obj->buffer;
-    delete obj;
-  }
-  void noteOn(MidiMessage msg){
-    uint8_t note = msg.getNote();
-    uint16_t minval = USHRT_MAX;
-    uint8_t minidx = 0;
-    // take oldest free voice, to allow voices to ring out
-    for(int i=0; igenerate();
-    return sample;
-  }
-  void generate(FloatArray output){
-    voice[0]->generate(output);
-    for(int i=1; igenerate(buffer);
-      output.add(buffer);
-    }
-  }
- void controlChange(MidiMessage msg){
-    if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
-      allNotesOff();
-  }
-  void pitchbend(MidiMessage msg){
-    for(int i=0; ipitchbend(msg);
-  }
-  void allNotesOn() {
-    for(int i=0; igate(true);      
-  }
-  void allNotesOff() {
-    for(int i=0; igate(false);      
-  }
-  void setVoice(size_t index, SynthVoice* obj){
-    if(index < VOICES)
-      voice[index] = obj;
-  }
-  SynthVoice* getVoice(size_t index){
-    if(index < VOICES)
-      return voice[index];
-    return NULL;
-  }
-};
-
-template
-class MonophonicProcessor : public MidiProcessor {
-private:
-  SynthVoice* voice;
-  uint8_t notes[16];
-  uint8_t lastNote = 0;
-public:
-  MonophonicProcessor(SynthVoice* voice) : voice(voice) {}
-  virtual void noteOn(MidiMessage msg){
-    if(lastNote < 16)
-      notes[lastNote++] = msg.getNote();
-    voice->noteOn(msg);
-  }
-  virtual void noteOff(MidiMessage msg){
-    uint8_t note = msg.getNote();
-    int i;
-    for(i = 0; i < lastNote; ++i) {
-      if(notes[i] == note)
-	break;
-    }
-    if(lastNote > 1) {
-      lastNote--;
-      while (i < lastNote) {
-	notes[i] = notes[i + 1];
-	i++;
-      }
-      voice->setNote(notes[lastNote - 1]);
-    }else{
-      voice->gate(false);
-      lastNote = 0;
-    }
-  }
-  void allNotesOff() {
-    voice->gate(false);
-    lastNote = 0;
-  }
-  float generate(){
-    return voice->generate();
-  }
-  void generate(FloatArray output){
-    voice->generate(output);
-  }
- void controlChange(MidiMessage msg){
-    if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
-      allNotesOff();
-  }
-  void pitchbend(MidiMessage msg){
-    voice->pitchbend(msg);
-  }
-  SynthVoice* getVoice(){
-    return voice;
-  }
-};
 
 #endif // __AbstractSynth_h__
diff --git a/LibSource/AudioBuffer.h b/LibSource/AudioBuffer.h
new file mode 100644
index 00000000..810a9146
--- /dev/null
+++ b/LibSource/AudioBuffer.h
@@ -0,0 +1,18 @@
+#ifndef __AudioBuffer_h__
+#define __AudioBuffer_h__
+
+#include "FloatArray.h"
+
+class AudioBuffer {
+public:
+  virtual ~AudioBuffer();
+  virtual FloatArray getSamples(int channel) = 0;
+  virtual int getChannels() = 0;
+  virtual int getSize() = 0;
+  virtual void clear() = 0;
+  virtual void add(AudioBuffer& buffer){}
+  static AudioBuffer* create(int channels, int samples);
+  static void destroy(AudioBuffer* buffer);
+};
+
+#endif // __AudioBuffer_h__
diff --git a/LibSource/MidiProcessor.h b/LibSource/MidiProcessor.h
index 9b29b595..3e5ebd73 100644
--- a/LibSource/MidiProcessor.h
+++ b/LibSource/MidiProcessor.h
@@ -4,7 +4,7 @@
 #include "MidiMessage.h"
 
 /**
- * Base class for midi processors such as Synths
+ * Base class for MIDI processors such as @class AbstractSynth.
  * Derived classes can overload the specific message handlers,
  * and/or the entry-point: @method process(MidiMessage msg)
  */
diff --git a/LibSource/MonophonicProcessor.h b/LibSource/MonophonicProcessor.h
new file mode 100644
index 00000000..54f2e381
--- /dev/null
+++ b/LibSource/MonophonicProcessor.h
@@ -0,0 +1,78 @@
+#ifndef __MonophonicProcessor_h__
+#define __MonophonicProcessor_h__
+
+template
+class MonophonicMidiProcessor : public MidiProcessor {
+protected:
+  SynthVoice* voice;
+  uint8_t notes[16];
+  uint8_t lastNote = 0;
+public:
+  MonophonicMidiProcessor(SynthVoice* voice) : voice(voice) {}
+  virtual void noteOn(MidiMessage msg){
+    if(lastNote < 16)
+      notes[lastNote++] = msg.getNote();
+    voice->noteOn(msg);
+  }
+  virtual void noteOff(MidiMessage msg){
+    uint8_t note = msg.getNote();
+    int i;
+    for(i = 0; i < lastNote; ++i) {
+      if(notes[i] == note)
+	break;
+    }
+    if(lastNote > 1) {
+      lastNote--;
+      while (i < lastNote) {
+	notes[i] = notes[i + 1];
+	i++;
+      }
+      voice->setNote(notes[lastNote - 1]);
+    }else{
+      voice->gate(false);
+      lastNote = 0;
+    }
+  }
+  void allNotesOff() {
+    voice->gate(false);
+    lastNote = 0;
+  }
+ void controlChange(MidiMessage msg){
+   if(msg.getControllerNumber() == MIDI_CC_MODULATION)
+     setParameter(1, msg.getControllerValue()/127.0f);
+   else if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
+      allNotesOff();
+  }
+  void pitchbend(MidiMessage msg){
+    voice->pitchbend(msg);
+  }
+  SynthVoice* getVoice(){
+    return voice;
+  }
+  void setParameter(uint8_t parameter_id, float value){
+    voice->setParameter(parameter_id, value);
+  }
+};
+
+template
+class MonophonicSignalGenerator : public MonophonicMidiProcessor, public SignalGenerator {
+public:
+  MonophonicSignalGenerator(SynthVoice* voice) : MonophonicMidiProcessor(voice) {}
+  float generate(){
+    return this->voice->generate();
+  }
+  void generate(FloatArray output){
+    this->voice->generate(output);
+  }
+};
+
+template
+class MonophonicMultiSignalGenerator : public MonophonicMidiProcessor, public MultiSignalGenerator {
+public:
+  MonophonicMultiSignalGenerator(SynthVoice* voice) : MonophonicMidiProcessor(voice) {}
+  void generate(AudioBuffer& output){
+    this->voice->generate(output);
+  }  
+};
+
+#endif // __MonophonicProcessor_h__
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 88cae4e9..c5b7bf3e 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -20,6 +20,7 @@
 #include "FloatMatrix.h"
 #include "IntArray.h"
 #include "MidiProcessor.h"
+#include "MidiStatus.h"
 #include "NoiseGenerator.h"
 #include "OpenWareMidiControl.h"
 #include "Oscillator.h"
@@ -45,4 +46,9 @@
 #include "WavetableOscillator.h"
 #include "Window.h"
 
+#include "PolyphonicProcessor.h"
+#include "MonophonicProcessor.h"
+#include "AudioBuffer.h"
+
+
 #endif	/* __OpenWareLibrary_h__ */
diff --git a/LibSource/Patch.h b/LibSource/Patch.h
index a15a4ebf..8e1b6f4c 100644
--- a/LibSource/Patch.h
+++ b/LibSource/Patch.h
@@ -7,6 +7,7 @@
 #include "FloatArray.h"
 #include "PatchParameter.h"
 #include "SmoothValue.h"
+#include "AudioBuffer.h"
 #include "OpenWareMidiControl.h"
 
 #ifdef USE_MIDI_CALLBACK
@@ -18,17 +19,6 @@ enum PatchChannelId {
   RIGHT_CHANNEL = 1
 };
 
-class AudioBuffer {
-public:
-  virtual ~AudioBuffer();
-  virtual FloatArray getSamples(int channel) = 0;
-  virtual int getChannels() = 0;
-  virtual int getSize() = 0;
-  virtual void clear() = 0;
-  static AudioBuffer* create(int channels, int samples);
-  static void destroy(AudioBuffer* buffer);
-};
-
 class Patch {
 public:
   Patch();
diff --git a/LibSource/PolyphonicProcessor.h b/LibSource/PolyphonicProcessor.h
new file mode 100644
index 00000000..30f9aa26
--- /dev/null
+++ b/LibSource/PolyphonicProcessor.h
@@ -0,0 +1,140 @@
+#ifndef __PolyphonicProcessor_h__
+#define __PolyphonicProcessor_h__
+
+#include "MidiProcessor.h"
+#include "SignalGenerator.h"
+
+template
+class PolyphonicMidiProcessor : public MidiProcessor {
+protected:
+  static const uint16_t TAKEN = 0xffff;
+  SynthVoice* voice[VOICES];
+  uint8_t notes[VOICES];
+  uint16_t allocation[VOICES];
+  uint16_t allocated;
+protected:
+  void take(uint8_t ch, MidiMessage msg){
+    release(ch);
+    notes[ch] = msg.getNote();
+    allocation[ch] = TAKEN;
+    voice[ch]->noteOn(msg);
+  }
+  void release(uint8_t ch){
+    allocation[ch] = ++allocated;
+    voice[ch]->gate(false);
+  }
+public:
+  PolyphonicMidiProcessor() : allocated(0) {}
+  virtual ~PolyphonicMidiProcessor(){};
+  void noteOn(MidiMessage msg){
+    uint8_t note = msg.getNote();
+    uint16_t minval = USHRT_MAX;
+    uint8_t minidx = 0;
+    // take oldest free voice, to allow voices to ring out
+    for(int i=0; ipitchbend(msg);
+  }
+  void allNotesOn() {
+    for(int i=0; igate(true);      
+  }
+  void allNotesOff() {
+    for(int i=0; igate(false);      
+  }
+  void setVoice(size_t index, SynthVoice* obj){
+    if(index < VOICES)
+      voice[index] = obj;
+  }
+  SynthVoice* getVoice(size_t index){
+    if(index < VOICES)
+      return voice[index];
+    return NULL;
+  }
+  void setParameter(uint8_t parameter_id, float value){
+    for(int i=0; isetParameter(parameter_id, value);
+  }
+};
+
+template
+class PolyphonicSignalGenerator : public PolyphonicMidiProcessor, public SignalGenerator {
+private:
+  FloatArray buffer;
+public:
+  PolyphonicSignalGenerator(FloatArray buffer) : buffer(buffer) {}
+  virtual ~PolyphonicSignalGenerator(){};
+  static PolyphonicSignalGenerator* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new PolyphonicSignalGenerator(buffer);
+  }
+  static void destroy(PolyphonicSignalGenerator* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+  float generate(){
+    float sample = this->voice[0]->generate();
+    for(int i=1; ivoice[i]->generate();
+    return sample;
+  }
+  void generate(FloatArray output){
+    this->voice[0]->generate(output);
+    for(int i=1; ivoice[i]->generate(buffer);
+      output.add(buffer);
+    }
+  }
+};
+
+template
+class PolyphonicMultiSignalGenerator : public PolyphonicMidiProcessor, public MultiSignalGenerator {
+private:
+  AudioBuffer* buffer;
+public:
+  PolyphonicMultiSignalGenerator(AudioBuffer* buffer) : buffer(buffer) {}
+  virtual ~PolyphonicMultiSignalGenerator(){};
+  static PolyphonicMultiSignalGenerator* create(size_t channels, size_t blocksize){
+    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
+    return new PolyphonicMultiSignalGenerator(buffer);
+  }
+  static void destroy(PolyphonicMultiSignalGenerator* obj){
+    // AudioBuffer::destroy(obj->buffer);
+    delete obj;
+  }
+  void generate(AudioBuffer& output){
+    this->voice[0]->generate(output);
+    for(int i=1; ivoice[i]->generate(*buffer);
+      output.add(*buffer);
+    }
+  }  
+};
+
+#endif // __PolyphonicProcessor_h__
diff --git a/LibSource/SignalGenerator.h b/LibSource/SignalGenerator.h
index e91cb6eb..004ab707 100644
--- a/LibSource/SignalGenerator.h
+++ b/LibSource/SignalGenerator.h
@@ -2,6 +2,7 @@
 #define __SignalGenerator_h__
 
 #include "FloatArray.h"
+#include "AudioBuffer.h"
 
 /**
  * Base class for signal generators such as Oscillators.
@@ -24,7 +25,6 @@ class SignalGenerator {
   }
 };
 
-class AudioBuffer;
 class MultiSignalGenerator {
 public:
   virtual ~MultiSignalGenerator(){}
diff --git a/LibSource/Synth.h b/LibSource/Synth.h
index 74602e02..2a08f841 100644
--- a/LibSource/Synth.h
+++ b/LibSource/Synth.h
@@ -1,16 +1,20 @@
 #ifndef __Synth_h__
 #define __Synth_h__
 
-#include "SignalGenerator.h"
+#include 
 
-class Synth : public SignalGenerator {
+class Synth {
 public:
   virtual ~Synth(){}
-  // pure abstract methods that must be implemented by a derived class
   virtual void setFrequency(float freq) = 0;
   virtual void setGain(float gain) = 0;
   virtual void gate(bool state) = 0;
   virtual void trigger() = 0;
+  /**
+   * Set a Synth parameter. The definition of parameter is up to the Synth,
+   * but parameter 1 is dedicated to modulation
+   */
+  virtual void setParameter(uint8_t parameter_id, float value){}
 };
 
 #endif // __Synth_h__
diff --git a/LibSource/WavFile.h b/LibSource/WavFile.h
index a5f8a798..2defa9ba 100644
--- a/LibSource/WavFile.h
+++ b/LibSource/WavFile.h
@@ -27,7 +27,7 @@ typedef struct {
 class WavFile {
   WavHeader* header;
 public:
-  WavFile(WavHeader* header) : header(header){}
+  WavFile(void* data) : header((WavHeader*)data){}
   WavHeader* getHeader(){
     return header;
   }
@@ -81,9 +81,6 @@ class WavFile {
     }
     return FloatArray();
   }
-  static WavFile create(void* data){
-    return WavFile((WavHeader*)data);
-  }
 };
 
 #endif // __WavFile_h__
diff --git a/Source/MemoryBuffer.hpp b/Source/MemoryBuffer.hpp
index 9a022917..82390fd1 100644
--- a/Source/MemoryBuffer.hpp
+++ b/Source/MemoryBuffer.hpp
@@ -18,6 +18,10 @@ class MemoryBuffer : public AudioBuffer {
     ASSERT(channel < channels, "Invalid channel");
     return FloatArray(buffer+channel*size, size);
   }
+  void add(AudioBuffer& other){
+    for(size_t i=0; i
Date: Tue, 20 Apr 2021 17:54:13 +0200
Subject: [PATCH 150/374] added static create/destroy methods

---
 LibSource/FastFourierTransform.cpp | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/LibSource/FastFourierTransform.cpp b/LibSource/FastFourierTransform.cpp
index 2f82c293..0b786e0b 100644
--- a/LibSource/FastFourierTransform.cpp
+++ b/LibSource/FastFourierTransform.cpp
@@ -82,3 +82,11 @@ size_t FastFourierTransform::getSize(){
 }
 
 #endif /* ifndef ARM_CORTEX */
+
+FastFourierTransform* FastFourierTransform::create(size_t blocksize){
+  return new FastFourierTransform(blocksize);
+}
+
+void FastFourierTransform::destroy(FastFourierTransform* obj){
+  delete obj;
+}

From a7b9395c244a0257dac6bd3514425cc38adce0e6 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 20 Apr 2021 17:54:14 +0200
Subject: [PATCH 151/374] added static create/destroy methods

---
 LibSource/FastFourierTransform.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/LibSource/FastFourierTransform.h b/LibSource/FastFourierTransform.h
index 09a55e3a..4931d354 100644
--- a/LibSource/FastFourierTransform.h
+++ b/LibSource/FastFourierTransform.h
@@ -71,6 +71,9 @@ class FastFourierTransform {
    * @return The size of the FFT
   */
   size_t getSize();
+
+  static FastFourierTransform* create(size_t blocksize);
+  static void destroy(FastFourierTransform* obj);
 };
 
 #endif // __FastFourierTransform_h__

From 882367167caf1cba8d5b06adf4b9c4cd514c57f7 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 20 Apr 2021 21:31:54 +0200
Subject: [PATCH 152/374] use wildcards to not miss an compilation units, moved
 non-library Patch.cpp implementation

---
 {LibSource => Source}/Patch.cpp |  0
 compile.mk                      |  3 +--
 sources.mk                      | 20 ++------------------
 web.mk                          |  5 +----
 4 files changed, 4 insertions(+), 24 deletions(-)
 rename {LibSource => Source}/Patch.cpp (100%)

diff --git a/LibSource/Patch.cpp b/Source/Patch.cpp
similarity index 100%
rename from LibSource/Patch.cpp
rename to Source/Patch.cpp
diff --git a/compile.mk b/compile.mk
index d306ffc2..9538437d 100644
--- a/compile.mk
+++ b/compile.mk
@@ -117,8 +117,7 @@ include $(BUILDROOT)/libs.mk
 include $(BUILDROOT)/sources.mk
 
 C_SRC   += $(SOURCE)/heap_5.c
-CPP_SRC += $(LIBSOURCE)/Patch.cpp
-# CPP_SRC += $(LIBSOURCE)/ShortFastFourierTransform.cpp 
+CPP_SRC += $(SOURCE)/Patch.cpp
 CPP_SRC += $(SOURCE)/PatchProcessor.cpp
 CPP_SRC += $(SOURCE)/main.cpp
 CPP_SRC += $(SOURCE)/operators.cpp
diff --git a/sources.mk b/sources.mk
index a9fec1d6..9960f2fe 100644
--- a/sources.mk
+++ b/sources.mk
@@ -1,19 +1,3 @@
 C_SRC   += Source/font.c
-C_SRC   += LibSource/fastpow.c
-C_SRC   += LibSource/fastlog.c
-C_SRC   += LibSource/basicmaths.c
-CPP_SRC += LibSource/FloatArray.cpp
-CPP_SRC += LibSource/ComplexFloatArray.cpp
-CPP_SRC += LibSource/FastFourierTransform.cpp
-CPP_SRC += LibSource/ShortArray.cpp
-CPP_SRC += LibSource/ComplexShortArray.cpp
-CPP_SRC += LibSource/Envelope.cpp
-CPP_SRC += LibSource/VoltsPerOctave.cpp
-CPP_SRC += LibSource/Window.cpp
-CPP_SRC += LibSource/WavetableOscillator.cpp
-CPP_SRC += LibSource/PolyBlepOscillator.cpp
-CPP_SRC += LibSource/SmoothValue.cpp
-CPP_SRC += LibSource/PatchParameter.cpp
-CPP_SRC += LibSource/MonochromeScreenPatch.cpp
-CPP_SRC += LibSource/ColourScreenPatch.cpp
-CPP_SRC += LibSource/Resource.cpp
+C_SRC   += $(wildcard LibSource/*.c)
+CPP_SRC += $(wildcard LibSource/*.cpp)
diff --git a/web.mk b/web.mk
index efb78344..ec109e84 100644
--- a/web.mk
+++ b/web.mk
@@ -36,11 +36,8 @@ EMCCFLAGS += -s EXPORTED_FUNCTIONS="['_WEB_setup','_WEB_setParameter','_WEB_getP
 EMCCFLAGS += -s "EXTRA_EXPORTED_RUNTIME_METHODS=['cwrap']"
 
 include $(BUILDROOT)/sources.mk
-CPP_SRC += LibSource/Patch.cpp
-# CPP_SRC += LibSource/ComplexShortArray.cpp
-# CPP_SRC += LibSource/ShortFastFourierTransform.cpp 
+CPP_SRC += Source/Patch.cpp
 CPP_SRC += Source/PatchProcessor.cpp
-# CPP_SRC += Source/main.cpp Source/operators.cpp
 CPP_SRC += Source/message.cpp
 CPP_SRC += WebSource/web.cpp
 C_SRC   += Libraries/KissFFT/kiss_fft.c

From b875cc46f335e7148b476ef757b1cffdd5badb9e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 23 Apr 2021 19:11:09 +0200
Subject: [PATCH 153/374] redefined buttons

---
 LibSource/OpenWareMidiControl.h | 31 ++++++++++++++++++-------------
 1 file changed, 18 insertions(+), 13 deletions(-)

diff --git a/LibSource/OpenWareMidiControl.h b/LibSource/OpenWareMidiControl.h
index 5888819e..be069080 100644
--- a/LibSource/OpenWareMidiControl.h
+++ b/LibSource/OpenWareMidiControl.h
@@ -56,24 +56,29 @@ enum PatchParameterId {
   PARAMETER_GAIN
 };
 
+#define BUTTON_A   BUTTON_1
+#define BUTTON_B   BUTTON_2
+#define BUTTON_C   BUTTON_3
+#define BUTTON_D   BUTTON_4
+#define BUTTON_E   BUTTON_5
+#define BUTTON_F   BUTTON_6
+#define BUTTON_G   BUTTON_7
+#define BUTTON_H   BUTTON_8
+
 enum PatchButtonId {
-  BYPASS_BUTTON,
-  PUSHBUTTON,
+  PUSHBUTTON = 1,
   GREEN_BUTTON,
   RED_BUTTON,
-  BUTTON_A,
-  BUTTON_B,
-  BUTTON_C,
-  BUTTON_D,
-  BUTTON_E,
-  BUTTON_F,
-  BUTTON_G,
-  BUTTON_H,
-  GATE_BUTTON = 0x7f,
-  MIDI_NOTE_BUTTON = 0x80 // values over 127 are mapped to note numbers
+  BUTTON_1 = 4,
+  BUTTON_2 = 5,
+  BUTTON_3 = 6,
+  BUTTON_4 = 7,
+  BUTTON_5 = 8,
+  BUTTON_6 = 9,
+  BUTTON_7 = 10,
+  BUTTON_8 = 11
 };
 
-
 #define SYSEX_CONFIGURATION_AUDIO_RATE            "FS"
 #define SYSEX_CONFIGURATION_AUDIO_BITDEPTH        "BD"
 #define SYSEX_CONFIGURATION_AUDIO_DATAFORMAT      "DF"

From 42c6085c2ae133e66279abb0077b40688bbde985 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 24 Apr 2021 20:52:52 +0200
Subject: [PATCH 154/374] AudioBuffer updates

---
 Source/MemoryBuffer.hpp             | 20 ++++++++++----------
 Source/SampleBuffer.hpp             |  5 ++++-
 TestPatches/DummyPatch.hpp          | 13 ++++++++++---
 TestPatches/FloatArrayTestPatch.hpp |  2 +-
 TestPatches/PatchRun.cpp            |  2 +-
 5 files changed, 26 insertions(+), 16 deletions(-)

diff --git a/Source/MemoryBuffer.hpp b/Source/MemoryBuffer.hpp
index 82390fd1..c6e7b4b3 100644
--- a/Source/MemoryBuffer.hpp
+++ b/Source/MemoryBuffer.hpp
@@ -6,33 +6,33 @@
 class MemoryBuffer : public AudioBuffer {
 protected:
   float* buffer;
-  int channels;
-  int size;
+  size_t channels;
+  size_t size;
 public:
-  MemoryBuffer(float* buf, int ch, int sz): buffer(buf), channels(ch), size(sz) {}
+  MemoryBuffer(float* buf, size_t ch, size_t sz): buffer(buf), channels(ch), size(sz) {}
   virtual ~MemoryBuffer(){}
-  void clear(){
+  void clear() override {
     memset(buffer, 0, size*channels*sizeof(float));
   }
-  FloatArray getSamples(int channel){
+  FloatArray getSamples(int channel) override {
     ASSERT(channel < channels, "Invalid channel");
     return FloatArray(buffer+channel*size, size);
   }
-  void add(AudioBuffer& other){
-    for(size_t i=0; i 1){
     const char* input_filename = argv[1];
     uint8_t* data = NULL;

From ee06ce847889bbf05601d14996077076aac94682 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 24 Apr 2021 20:59:32 +0200
Subject: [PATCH 155/374] removed disused note->button mappings, fixed
 AudioBuffer::add issue

---
 WebSource/web.cpp | 19 +------------------
 1 file changed, 1 insertion(+), 18 deletions(-)

diff --git a/WebSource/web.cpp b/WebSource/web.cpp
index 20d5b7cc..9779d39d 100644
--- a/WebSource/web.cpp
+++ b/WebSource/web.cpp
@@ -112,24 +112,6 @@ int WEB_getButtons(){
 }
 
 int WEB_processMidi(int port, int status, int d1, int d2){
-  switch(status & 0xf0){
-  case 0x80: // NOTE_OFF
-    getInitialisingPatchProcessor()->patch->buttonChanged((PatchButtonId)(MIDI_NOTE_BUTTON+d1), 0, 0);
-    break;
-  case 0x90: // NOTE_ON
-    getInitialisingPatchProcessor()->patch->buttonChanged((PatchButtonId)(MIDI_NOTE_BUTTON+d1), d2, 0);
-    break;
-  case 0xE0: // PITCH_BEND_CHANGE
-    // set PARAMETER_G
-    if(PARAMETER_G < NOF_PARAMETERS)
-      parameters[PARAMETER_G] = (d1 | (d2<<7)) - 8192;
-    break;
-  case 0xB0: // CONTROL_CHANGE
-    // todo: PARAMETER_F for CC 1
-    if(d1 == 0x01 && PARAMETER_F < NOF_PARAMETERS)
-      parameters[PARAMETER_F] = d2<<5;
-    break;
-  }    
  // todo: set PARAMETER_FREQ, PARAMETER_GAIN
 #ifdef USE_MIDI_CALLBACK
   static MidiMessage msg;
@@ -200,6 +182,7 @@ class MemBuffer : public AudioBuffer {
   void clear(){
     // memset(buffer, 0, size*channels*sizeof(float));
   }
+  void add(AudioBuffer& other) {}
 };
 
 void WEB_processBlock(float** inputs, float** outputs){

From f488c97d3a3770933fd57364aa1255c6cbc1bc13 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 24 Apr 2021 20:59:51 +0200
Subject: [PATCH 156/374] added Vosim-style oscillator

---
 LibSource/AbstractSynth.h                     |  26 ++-
 LibSource/AudioBuffer.h                       |   2 +-
 LibSource/DcBlockingFilter.h                  |   2 +-
 LibSource/MidiMessage.h                       |  45 ++++-
 LibSource/MidiPolyphonicExpressionProcessor.h | 189 ++++++++++++++++++
 LibSource/MidiProcessor.h                     |   5 +
 LibSource/MonophonicProcessor.h               |  32 ++-
 LibSource/OpenWareLibrary.h                   |  10 +-
 LibSource/Oscillator.h                        |  18 +-
 LibSource/PolyphonicProcessor.h               |  59 ++++--
 LibSource/ShortArray.cpp                      |   1 -
 LibSource/ShortFastFourierTransform.cpp       |   4 +-
 LibSource/ShortFastFourierTransform.h         |   2 +
 LibSource/SimpleArray.h                       |  10 +-
 LibSource/Synth.h                             |   3 +-
 LibSource/VelocityCurve.h                     |   2 +
 LibSource/VosimOscillator.h                   |  82 ++++++++
 17 files changed, 431 insertions(+), 61 deletions(-)
 create mode 100644 LibSource/MidiPolyphonicExpressionProcessor.h
 create mode 100644 LibSource/VosimOscillator.h

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index 799daa52..0bee4a76 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -22,7 +22,7 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
   /**
    * Set note in whole semitones and update frequency
    */
-  void setNote(uint8_t note){
+  virtual void setNote(uint8_t note){
     this->note = note;
     setFrequency(noteToFrequency(note+pb));
   }
@@ -35,7 +35,7 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
   /**
    * Set pitch bend amount in semitones and update frequency
    */
-  void setPitchBend(float pb){
+  virtual void setPitchBend(float pb){
     this->pb = pb;
     setFrequency(noteToFrequency(note+pb));
   }
@@ -53,27 +53,35 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
     this->pb_range = range;
   }  
   // MIDI handlers
-  virtual void noteOn(MidiMessage msg){
+  virtual void noteOn(MidiMessage msg) override {
     setNote(msg.getNote());
     setFrequency(noteToFrequency(note+pb));
     setGain(velocityToGain(msg.getVelocity()));
     gate(true);
   }
-  virtual void noteOff(MidiMessage msg){
+  virtual void noteOff(MidiMessage msg) override {
     gate(false);
   }
-  virtual void controlChange(MidiMessage msg){
+  virtual void controlChange(MidiMessage msg) override {
     if(msg.getControllerNumber() == MIDI_CC_MODULATION)
-      setParameter(1, msg.getControllerValue()/127.0f);
+      setModulation(msg.getControllerValue()/127.0f);
     else if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
       allNotesOff();
   }
-  virtual void allNotesOff(){
-    gate(false);
+  virtual void channelPressure(MidiMessage msg){
+    setPressure(msg.getChannelPressure()/127.0f);
+  }
+  virtual void polyKeyPressure(MidiMessage msg){
+    setPressure(msg.getPolyKeyPressure()/127.0f);
   }
-  virtual void pitchbend(MidiMessage msg){
+  virtual void setModulation(float modulation){} // default implementation does nothing
+  virtual void setPressure(float pressure){}
+  virtual void pitchbend(MidiMessage msg) override {
     setPitchBend(pb_range*msg.getPitchBend()/8192.0f);
   }
+  virtual void allNotesOff(){
+    gate(false);
+  }
   // static utility methods
   static inline float frequencyToNote(float freq){
     return 12 * log2f(freq / 440) + 69;
diff --git a/LibSource/AudioBuffer.h b/LibSource/AudioBuffer.h
index 810a9146..f2b60106 100644
--- a/LibSource/AudioBuffer.h
+++ b/LibSource/AudioBuffer.h
@@ -10,7 +10,7 @@ class AudioBuffer {
   virtual int getChannels() = 0;
   virtual int getSize() = 0;
   virtual void clear() = 0;
-  virtual void add(AudioBuffer& buffer){}
+  virtual void add(AudioBuffer& buffer) = 0;
   static AudioBuffer* create(int channels, int samples);
   static void destroy(AudioBuffer* buffer);
 };
diff --git a/LibSource/DcBlockingFilter.h b/LibSource/DcBlockingFilter.h
index 173db05c..7e7d181c 100644
--- a/LibSource/DcBlockingFilter.h
+++ b/LibSource/DcBlockingFilter.h
@@ -48,7 +48,7 @@ class DcBlockingFilter : public SignalProcessor {
     process(in, out, in.getSize());
   }
 
-  static DcBlockingFilter* create(float lambda){
+  static DcBlockingFilter* create(float lambda=0.995){
     return new DcBlockingFilter(lambda);
   }
 
diff --git a/LibSource/MidiMessage.h b/LibSource/MidiMessage.h
index 3f51282e..835de89e 100644
--- a/LibSource/MidiMessage.h
+++ b/LibSource/MidiMessage.h
@@ -18,7 +18,7 @@ class MidiMessage {
     data[3] = d2;
   }
   uint8_t getPort(){
-    return (data[0] & 0xf0)>>4;
+    return data[0] >> 4;
   }
   uint8_t getChannel(){
     return (data[1] & MIDI_CHANNEL_MASK);
@@ -26,6 +26,37 @@ class MidiMessage {
   uint8_t getStatus(){
     return (data[1] & MIDI_STATUS_MASK);
   }
+  uint8_t getSize(){
+    uint8_t sz;
+    switch(data[0] & 0x0f){
+    case USB_COMMAND_SINGLE_BYTE:
+    case USB_COMMAND_SYSEX_EOX1:
+      sz = 1;
+      break;
+    case USB_COMMAND_PROGRAM_CHANGE:
+    case USB_COMMAND_CHANNEL_PRESSURE:
+    case USB_COMMAND_2BYTE_SYSTEM_COMMON:
+    case USB_COMMAND_SYSEX_EOX2:
+      sz = 2;
+      break;
+    case USB_COMMAND_NOTE_OFF:
+    case USB_COMMAND_NOTE_ON:
+    case USB_COMMAND_POLY_KEY_PRESSURE:
+    case USB_COMMAND_CONTROL_CHANGE:
+    case USB_COMMAND_PITCH_BEND_CHANGE:
+    case USB_COMMAND_SYSEX:
+    case USB_COMMAND_SYSEX_EOX3:
+    case USB_COMMAND_3BYTE_SYSTEM_COMMON:
+      sz = 3;
+      break;
+    case USB_COMMAND_MISC:
+    case USB_COMMAND_CABLE_EVENT:
+    default:
+      sz = 0;
+      break;
+    }
+    return sz;
+  }
   uint8_t getNote(){
     return data[2];
   }
@@ -41,6 +72,9 @@ class MidiMessage {
   uint8_t getChannelPressure(){
     return data[2];
   }
+  uint8_t getPolyKeyPressure(){
+    return data[3];
+  }
   uint8_t getProgramChange(){
     return data[1];
   }
@@ -54,6 +88,12 @@ class MidiMessage {
   bool isNoteOff(){
     return ((data[1] & MIDI_STATUS_MASK) == NOTE_OFF) || (((data[1] & MIDI_STATUS_MASK) == NOTE_ON) && getVelocity() == 0);
   }
+  bool isSysEx(){
+    return data[0] == USB_COMMAND_SYSEX ||
+      data[0] == USB_COMMAND_SYSEX_EOX1 ||
+      data[0] == USB_COMMAND_SYSEX_EOX2 ||
+      data[0] == USB_COMMAND_SYSEX_EOX3;
+  }      
   bool isControlChange(){
     return (data[1] & MIDI_STATUS_MASK) == CONTROL_CHANGE;
   }
@@ -63,6 +103,9 @@ class MidiMessage {
   bool isChannelPressure(){
     return (data[1] & MIDI_STATUS_MASK) == CHANNEL_PRESSURE;
   }
+  bool isPolyKeyPressure(){
+    return (data[1] & MIDI_STATUS_MASK) == POLY_KEY_PRESSURE;
+  }
   bool isPitchBend(){
     return (data[1] & MIDI_STATUS_MASK) == PITCH_BEND_CHANGE;
   }
diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
new file mode 100644
index 00000000..b5ede1bc
--- /dev/null
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -0,0 +1,189 @@
+#ifndef __MidiPolyphonicExpressionProcessor_h__
+#define __MidiPolyphonicExpressionProcessor_h__
+
+/**
+ * Implementation of MPE, MidiPolyphonicExpression, message processing.
+ * We are controlling an AbstractSynth with:
+ * X: Pitch Bend: setFrequency()
+ * Y: CC74 or CC1 : setModulation()
+ * Z: Channel Pressure : setPressure()
+ */
+template
+class MidiPolyphonicExpressionProcessor : public MidiProcessor {
+// routes five per-note messages (Note On, Note Off, Pitch Bend, CC74 and Channel Pressure/Aftertouch)
+// to the voice assigned to each channel
+protected:
+  SynthVoice* voice[VOICES];
+  uint8_t notes[VOICES];
+  float pressure[VOICES];
+  float modulation[VOICES];
+  const uint8_t master_channel = 1;
+  // One channel (usually Channel 1) is used for global messages
+  // The global channel is set by the "MPE Zone." When the MPE Zone is the Lower Zone, Channel 1 is used for global messages. When the MPE Zone is Upper Zone is, Channel 16 is used for global messages.
+  float zone_pitchbend = 0;
+  float zone_pressure = 0;
+  float zone_modulation = 0;
+  float note_pitchbend_range = 48;
+  float zone_pitchbend_range = 2;
+public:
+  MidiPolyphonicExpressionProcessor() {}
+  virtual ~MidiPolyphonicExpressionProcessor(){};
+  void noteOn(MidiMessage msg){
+    uint8_t ch = getNoteChannel(msg);
+    if(ch < VOICES)
+      voice[ch]->noteOn(msg);
+  }
+  void noteOff(MidiMessage msg){
+    uint8_t ch = getNoteChannel(msg);
+    if(ch < VOICES)
+      voice[ch]->noteOff(msg);
+  }
+  void setPitchBendRange(float range){
+    zone_pitchbend_range = range;
+  }    
+  void controlChange(MidiMessage msg){
+    switch(msg.getControllerNumber()){
+    case MIDI_CC_MODULATION: // handle modulation same as CC74 for non-MPE compatibility
+    /* case MIDI_CC_FREQUENCY_CUTOFF: { */
+    case 74: {
+// All MPE receivers are required to respond to CC #74 at the Zone and Note level. If a device receives CC #74
+// on both a Master Channel and Member Channel, it must combine such data meaningfully and separately for
+// each sounding note.
+      uint8_t ch = getNoteChannel(msg);
+      float value = msg.getControllerValue()/127.0f;
+      if(ch < VOICES){
+	voice[ch]->setModulation(zone_modulation + value);
+	modulation[ch] = value;
+      }else if(isMasterChannel(msg)){ // Zone message
+	for(int i=0; isetModulation(value + modulation[i]);
+	zone_modulation = value;
+      }
+      break;
+    }
+    case MIDI_ALL_NOTES_OFF:
+      allNotesOff();
+      break;
+    }
+  }
+  bool isMasterChannel(MidiMessage msg){
+    return msg.getChannel()+1 == master_channel;
+  }
+  uint8_t getNoteChannel(MidiMessage msg){
+    if(master_channel == 1)
+      return (msg.getChannel()-1) % VOICES;
+    return msg.getChannel() % VOICES;
+  }
+  void pitchbend(MidiMessage msg){
+    // Pitch Bend is both a Zone Message and a Note Level Message. If an MPE synthesizer receives Pitch Bend (for example) on both a Master and a Member Channel, it must combine the data meaningfully. The same is true for Channel Pressure. 
+    uint8_t ch = getNoteChannel(msg);
+    float value = note_pitchbend_range*msg.getPitchBend()/8192.0f;
+    if(ch < VOICES){ // Note level message
+      voice[ch]->setPitchBend(zone_pitchbend + value);
+    }else if(isMasterChannel(msg)){ // Zone message
+      float delta = value - zone_pitchbend;
+      for(int i=0; isetPitchBend(voice[i]->getPitchBend()+delta);
+      zone_pitchbend = value;
+    }
+  }
+  void channelPressure(MidiMessage msg){
+    uint8_t ch = getNoteChannel(msg);
+    float value = msg.getChannelPressure()/127.0f;
+    if(ch < VOICES){ // Note level message
+      voice[ch]->setPressure(zone_pressure + value);
+      pressure[ch] = value;
+    }else if(isMasterChannel(msg)){ // Zone message
+// All MPE receivers are required to respond to CC #74 at the Zone and Note level. If a device receives CC #74
+// on both a Master Channel and Member Channel, it must combine such data meaningfully and separately for
+// each sounding note.
+      for(int i=0; isetPressure(value + pressure[i]);
+      zone_pressure = value;
+    }
+  }
+  void polyKeyPressure(MidiMessage msg){
+    // Polyphonic Key Pressure may be used with notes on the Master Channel, but not on
+    // other Channels
+    if(isMasterChannel(msg)){
+      uint8_t note = msg.getNote();
+      for(int i=0; igetNote() == note)
+	  voice[i]->setPressure(msg.getPolyKeyPressure()/127.0f);
+    }
+  }
+  void allNotesOff() {
+    for(int i=0; igate(false);      
+  }
+  void setVoice(size_t index, SynthVoice* obj){
+    if(index < VOICES)
+      voice[index] = obj;
+  }
+  SynthVoice* getVoice(size_t index){
+    if(index < VOICES)
+      return voice[index];
+    return NULL;
+  }
+  void setParameter(uint8_t parameter_id, float value){
+    for(int i=0; isetParameter(parameter_id, value);
+  }
+};
+
+
+template
+class MidiPolyphonicExpressionSignalGenerator : public MidiPolyphonicExpressionProcessor, public SignalGenerator {
+private:
+  FloatArray buffer;
+public:
+  MidiPolyphonicExpressionSignalGenerator(FloatArray buffer) : buffer(buffer) {}
+  virtual ~MidiPolyphonicExpressionSignalGenerator(){};
+  float generate(){
+    float sample = this->voice[0]->generate();
+    for(int i=1; ivoice[i]->generate();
+    return sample;
+  }
+  void generate(FloatArray output){
+    this->voice[0]->generate(output);
+    for(int i=1; ivoice[i]->generate(buffer);
+      output.add(buffer);
+    }
+  }
+  static MidiPolyphonicExpressionSignalGenerator* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new MidiPolyphonicExpressionSignalGenerator(buffer);
+  }
+  static void destroy(MidiPolyphonicExpressionSignalGenerator* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+template
+class MidiPolyphonicExpressionMultiSignalGenerator : public MidiPolyphonicExpressionProcessor, public MultiSignalGenerator {
+private:
+  AudioBuffer* buffer;
+public:
+  MidiPolyphonicExpressionMultiSignalGenerator(AudioBuffer* buffer) : buffer(buffer) {}
+  virtual ~MidiPolyphonicExpressionMultiSignalGenerator(){};
+  static MidiPolyphonicExpressionMultiSignalGenerator* create(size_t channels, size_t blocksize){
+    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
+    return new MidiPolyphonicExpressionMultiSignalGenerator(buffer);
+  }
+  static void destroy(MidiPolyphonicExpressionMultiSignalGenerator* obj){
+    AudioBuffer::destroy(obj->buffer);
+    delete obj;
+  }
+  void generate(AudioBuffer& output){
+    this->voice[0]->generate(output);
+    for(int i=1; ivoice[i]->generate(*buffer);
+      output.add(*buffer);
+    }
+  }  
+};
+
+#endif /* __MidiPolyphonicExpressionProcessor_h__ */
diff --git a/LibSource/MidiProcessor.h b/LibSource/MidiProcessor.h
index 3e5ebd73..0ffa5b32 100644
--- a/LibSource/MidiProcessor.h
+++ b/LibSource/MidiProcessor.h
@@ -16,6 +16,7 @@ class MidiProcessor {
   virtual void pitchbend(MidiMessage msg){}
   virtual void controlChange(MidiMessage msg){}
   virtual void channelPressure(MidiMessage msg){}
+  virtual void polyKeyPressure(MidiMessage msg){}
   virtual void process(MidiMessage msg) {
     if(msg.isNoteOn()) {
       if(msg.getVelocity())
@@ -30,6 +31,10 @@ class MidiProcessor {
       controlChange(msg);
     }else if(msg.isChannelPressure()) {
       channelPressure(msg);
+    }else if(msg.isChannelPressure()) {
+      channelPressure(msg);
+    }else if(msg.isPolyKeyPressure()) {
+      polyKeyPressure(msg);
     }
   }  
 };
diff --git a/LibSource/MonophonicProcessor.h b/LibSource/MonophonicProcessor.h
index 54f2e381..a725f465 100644
--- a/LibSource/MonophonicProcessor.h
+++ b/LibSource/MonophonicProcessor.h
@@ -8,6 +8,7 @@ class MonophonicMidiProcessor : public MidiProcessor {
   uint8_t notes[16];
   uint8_t lastNote = 0;
 public:
+  MonophonicMidiProcessor() : voice(NULL) {}
   MonophonicMidiProcessor(SynthVoice* voice) : voice(voice) {}
   virtual void noteOn(MidiMessage msg){
     if(lastNote < 16)
@@ -37,17 +38,20 @@ class MonophonicMidiProcessor : public MidiProcessor {
     voice->gate(false);
     lastNote = 0;
   }
- void controlChange(MidiMessage msg){
-   if(msg.getControllerNumber() == MIDI_CC_MODULATION)
-     setParameter(1, msg.getControllerValue()/127.0f);
-   else if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
-      allNotesOff();
+  void controlChange(MidiMessage msg){
+    voice->controlChange(msg);
   }
   void pitchbend(MidiMessage msg){
     voice->pitchbend(msg);
   }
-  SynthVoice* getVoice(){
-    return voice;
+  void setVoice(size_t index, SynthVoice* obj){
+    if(index == 0)
+      voice = obj;
+  }
+  SynthVoice* getVoice(size_t index){
+    if(index == 0)
+      return voice;
+    return NULL;
   }
   void setParameter(uint8_t parameter_id, float value){
     voice->setParameter(parameter_id, value);
@@ -57,6 +61,7 @@ class MonophonicMidiProcessor : public MidiProcessor {
 template
 class MonophonicSignalGenerator : public MonophonicMidiProcessor, public SignalGenerator {
 public:
+  MonophonicSignalGenerator() {}
   MonophonicSignalGenerator(SynthVoice* voice) : MonophonicMidiProcessor(voice) {}
   float generate(){
     return this->voice->generate();
@@ -64,15 +69,28 @@ class MonophonicSignalGenerator : public MonophonicMidiProcessor, pu
   void generate(FloatArray output){
     this->voice->generate(output);
   }
+  static MonophonicSignalGenerator* create(size_t blocksize){
+    return new MonophonicSignalGenerator();
+  }
+  static void destroy(MonophonicSignalGenerator* obj){
+    delete obj;
+  }
 };
 
 template
 class MonophonicMultiSignalGenerator : public MonophonicMidiProcessor, public MultiSignalGenerator {
 public:
+  MonophonicMultiSignalGenerator() {}
   MonophonicMultiSignalGenerator(SynthVoice* voice) : MonophonicMidiProcessor(voice) {}
   void generate(AudioBuffer& output){
     this->voice->generate(output);
   }  
+  static MonophonicMultiSignalGenerator* create(size_t channels, size_t blocksize){
+    return new MonophonicMultiSignalGenerator();
+  }
+  static void destroy(MonophonicMultiSignalGenerator* obj){
+    delete obj;
+  }
 };
 
 #endif // __MonophonicProcessor_h__
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index c5b7bf3e..ba74193a 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -2,6 +2,7 @@
 #define __OpenWareLibrary_h__
 
 #include "AbstractSynth.h"
+#include "AudioBuffer.h"
 #include "BiquadFilter.h"
 #include "ChirpOscillator.h"
 #include "CircularBuffer.h"
@@ -20,7 +21,9 @@
 #include "FloatMatrix.h"
 #include "IntArray.h"
 #include "MidiProcessor.h"
+#include "MidiPolyphonicExpressionProcessor.h"
 #include "MidiStatus.h"
+#include "MonophonicProcessor.h"
 #include "NoiseGenerator.h"
 #include "OpenWareMidiControl.h"
 #include "Oscillator.h"
@@ -28,6 +31,7 @@
 #include "PatchParameter.h"
 #include "PitchDetector.h"
 #include "PolyBlepOscillator.h"
+#include "PolyphonicProcessor.h"
 #include "RampOscillator.h"
 #include "Resample.h"
 #include "Resource.h"
@@ -42,13 +46,9 @@
 #include "Synth.h"
 #include "VoltsPerOctave.h"
 #include "VelocityCurve.h"
+#include "VosimOscillator.h"
 #include "WavFile.h"
 #include "WavetableOscillator.h"
 #include "Window.h"
 
-#include "PolyphonicProcessor.h"
-#include "MonophonicProcessor.h"
-#include "AudioBuffer.h"
-
-
 #endif	/* __OpenWareLibrary_h__ */
diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index f1b6d62b..8cf35ed3 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -1,5 +1,5 @@
-#ifndef OSCILLATOR_HPP
-#define OSCILLATOR_HPP
+#ifndef __Oscillator_h
+#define __Oscillator_h
 
 #include "FloatArray.h"
 #include "SignalGenerator.h"
@@ -17,22 +17,14 @@ class Oscillator : public SignalGenerator {
    * Set oscillator sample rate
    */
   virtual void setSampleRate(float value){}
-  /**
-   * Get oscillator sample rate
-   */
-  virtual float getSampleRate(){
-    return 0.0f;
-  }
   /**
    * Set oscillator frequency in Hertz
    */
-  virtual void setFrequency(float value){}
+  virtual void setFrequency(float value) = 0;
   /**
    * Get oscillator frequency in Hertz
    */
-  virtual float getFrequency(){
-    return 0.0f;
-  }
+  virtual float getFrequency() = 0;
   /**
    * Set current oscillator phase in radians
    * @param phase a value between 0 and 2*pi
@@ -72,4 +64,4 @@ class Oscillator : public SignalGenerator {
   }
 };
 
-#endif /* OSCILLATOR_HPP */
+#endif /* __Oscillator_h */
diff --git a/LibSource/PolyphonicProcessor.h b/LibSource/PolyphonicProcessor.h
index 30f9aa26..0754cab2 100644
--- a/LibSource/PolyphonicProcessor.h
+++ b/LibSource/PolyphonicProcessor.h
@@ -4,6 +4,9 @@
 #include "MidiProcessor.h"
 #include "SignalGenerator.h"
 
+/**
+ * Supports both Polyphonic Key Pressure and Channel Pressure Aftertouch.
+ */
 template
 class PolyphonicMidiProcessor : public MidiProcessor {
 protected:
@@ -26,6 +29,14 @@ class PolyphonicMidiProcessor : public MidiProcessor {
 public:
   PolyphonicMidiProcessor() : allocated(0) {}
   virtual ~PolyphonicMidiProcessor(){};
+  size_t getNumberOfTakenVoices(){
+    size_t active = 0;
+    for(int i=0; ipitchbend(msg);
   }
+  void modulate(MidiMessage msg){
+    float value = msg.getControllerValue()/127.0f;
+    for(int i=0; isetModulation(value);
+  }
+  // todo: unison note on/off
   void allNotesOn() {
     for(int i=0; igate(true);      
+      voice[i]->gate(true);
   }
   void allNotesOff() {
     for(int i=0; isetPressure(msg.getChannelPressure()/127.0f);
+  }
+  void polyKeyPressure(MidiMessage msg){
+    // route poly key pressure to the right voice
+    uint8_t note = msg.getNote();
+    for(int i=0; isetPressure(msg.getPolyKeyPressure()/127.0f);
+  }
   void setParameter(uint8_t parameter_id, float value){
     for(int i=0; isetParameter(parameter_id, value);
@@ -90,14 +119,6 @@ class PolyphonicSignalGenerator : public PolyphonicMidiProcessor* create(size_t blocksize){
-    FloatArray buffer = FloatArray::create(blocksize);    
-    return new PolyphonicSignalGenerator(buffer);
-  }
-  static void destroy(PolyphonicSignalGenerator* obj){
-    FloatArray::destroy(obj->buffer);
-    delete obj;
-  }
   float generate(){
     float sample = this->voice[0]->generate();
     for(int i=1; i* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new PolyphonicSignalGenerator(buffer);
+  }
+  static void destroy(PolyphonicSignalGenerator* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
 };
 
 template
@@ -125,7 +154,7 @@ class PolyphonicMultiSignalGenerator : public PolyphonicMidiProcessor(buffer);
   }
   static void destroy(PolyphonicMultiSignalGenerator* obj){
-    // AudioBuffer::destroy(obj->buffer);
+    AudioBuffer::destroy(obj->buffer);
     delete obj;
   }
   void generate(AudioBuffer& output){
@@ -137,4 +166,4 @@ class PolyphonicMultiSignalGenerator : public PolyphonicMidiProcessor= getSize(), "Input array too small");
   ASSERT(output.getSize() >= getSize(), "Output array too small");
-  kiss_fft(cfgifft, (kiss_fft_cpx*)(float*)input, (kiss_fft_cpx*)(float*)temp.getData());
+  kiss_fft(cfgifft, (kiss_fft_cpx*)(int16_t*)input.getData(), (kiss_fft_cpx*)(int16_t*)temp.getData());
   float scale=1.0f/getSize();
   for(int n=0; n destination){
@@ -78,12 +79,13 @@ class SimpleArray {
   }
 
   /**
-   * Copies the content of an array into another array.
+   * Copies the content of another array into this array.
+   * This array needs to be at least as big as the other array.
    * @param[in] source the source array
    */
   void copyFrom(SimpleArray source){
-    ASSERT(source.size >= size, "Array too small");
-    memcpy((void*)data, (void*)source.data, size*sizeof(T));
+    ASSERT(size >= source.size, "Array too small");
+    memcpy((void*)data, (void*)source.data, source.size*sizeof(T));
   }
 
   /**
diff --git a/LibSource/Synth.h b/LibSource/Synth.h
index 2a08f841..f9e2ef8f 100644
--- a/LibSource/Synth.h
+++ b/LibSource/Synth.h
@@ -11,8 +11,7 @@ class Synth {
   virtual void gate(bool state) = 0;
   virtual void trigger() = 0;
   /**
-   * Set a Synth parameter. The definition of parameter is up to the Synth,
-   * but parameter 1 is dedicated to modulation
+   * Set a Synth parameter. The definition of each parameter is determined by the Synth.
    */
   virtual void setParameter(uint8_t parameter_id, float value){}
 };
diff --git a/LibSource/VelocityCurve.h b/LibSource/VelocityCurve.h
index dc0340dc..961a8530 100644
--- a/LibSource/VelocityCurve.h
+++ b/LibSource/VelocityCurve.h
@@ -1,6 +1,8 @@
 #ifndef __VelocityCurve_h__
 #define __VelocityCurve_h__
 
+#include "basicmaths.h"
+
 /**
  * General MIDI DLS Level 1 Specification:
  * The MIDI Note Velocity value is converted to attenuation in dB by the Concave Transform
diff --git a/LibSource/VosimOscillator.h b/LibSource/VosimOscillator.h
new file mode 100644
index 00000000..e3efad52
--- /dev/null
+++ b/LibSource/VosimOscillator.h
@@ -0,0 +1,82 @@
+#ifndef __VosimOscillator_h
+#define __VosimOscillator_h
+
+#include "Oscillator.h"
+
+/**
+ * VOSIM-type oscillator based on Rob Hordijk's Nord Modular patch.
+ * ref: https://electro-music.com/nm_classic/015_workshops/Clavia/NordModularWorkshops&Threads/WerkMap/WorkShops/Hordijk1999-2000/VOSIM.html
+*/
+class VosimOscillator : public Oscillator {
+private:
+  const float fs;
+  SineOscillator* formant1;
+  SineOscillator* formant2;
+  float phase;
+  float incr;
+public:
+  VosimOscillator(float samplerate, SineOscillator* osc2, SineOscillator* osc1) :
+    fs(samplerate), formant1(osc1) , formant2(osc2) {}
+  float getFrequency(){
+    return incr*fs;
+  }
+  void setFrequency(float freq){
+    incr = freq/fs;
+  }
+  void reset(){
+    phase = 0.0f;
+  }
+  void setPhase(float ph){
+    phase = 1-ph/(2*M_PI);
+  }
+  float getPhase(){
+    return (1-phase)*2*M_PI;
+  }
+  float getFormant1(){
+    return formant1->getFrequency();
+  }
+  float getFormant2(){
+    return formant1->getFrequency();
+  }
+  void setFormant1(float frequency){
+    formant1->setFrequency(frequency);
+  }
+  void setFormant2(float frequency){
+    formant2->setFrequency(frequency);
+  }
+  using Oscillator::generate;
+  float generate(float fm){
+    phase -= incr+fm;
+    if(phase <= 0.0){
+      phase += 1.0;
+      formant1->reset();
+      formant2->reset();
+    }
+    float s1 = formant1->generate();
+    float s2 = formant2->generate();
+    return (s1*s1 + s2*s2)*phase*0.5;
+  }
+  float generate(){
+    phase -= incr;
+    if(phase <= 0.0){
+      phase += 1.0;
+      formant1->reset();
+      formant2->reset();
+    }
+    float s1 = formant1->generate();
+    float s2 = formant2->generate();
+    return (s1*s1 + s2*s2)*phase*0.5;
+  }
+  static VosimOscillator* create(float sr){
+    SineOscillator* f1 = SineOscillator::create(sr);
+    SineOscillator* f2 = SineOscillator::create(sr);
+    return new VosimOscillator(sr, f1, f2);
+  }
+  static void destroy(VosimOscillator* obj){
+    SineOscillator::destroy(obj->formant1);
+    SineOscillator::destroy(obj->formant2);
+    delete obj;
+  }
+};
+
+#endif  /* __VosimOscillator_h */

From ce68fdc123a3cd9d2a0515a1c8136d5ee7e34db7 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 24 Apr 2021 21:26:57 +0200
Subject: [PATCH 157/374] updated history

---
 HISTORY.md | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/HISTORY.md b/HISTORY.md
index a0ed0d96..be56745b 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,10 +1,12 @@
 v22.1
 -----
-
+* Added MPE processor
+* Added VOSIM oscillator
 * Added methods for sample-rate cutoff frequency modulation in StateVariableFilter and BiquadFilter
 * Added VelocityCurve, MidiProcessor, Synth and AbstractSynth
 * New templates for MIDI voicing: PolyphonicProcessor and MonophonicProcessor
 * Added WavFile for reading wav resources and converting to FloatArray
+* Changed enum for BUTTON_A, B, C to BUTTON_1, 2, 3 et c.
 
 v22.0
 -----

From 07fa5302daf29e786badba200ad187f2fb140841 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 25 Apr 2021 22:16:52 +0200
Subject: [PATCH 158/374] added RPN handling for pitch bend tuning

---
 LibSource/MidiPolyphonicExpressionProcessor.h | 34 +++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index b5ede1bc..700d0df0 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -25,6 +25,7 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
   float zone_modulation = 0;
   float note_pitchbend_range = 48;
   float zone_pitchbend_range = 2;
+  uint16_t rpn = 0;
 public:
   MidiPolyphonicExpressionProcessor() {}
   virtual ~MidiPolyphonicExpressionProcessor(){};
@@ -61,6 +62,39 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
       }
       break;
     }
+    case 100: // RPN MSB
+      rpn = msg.getControllerValue()<<7;
+      break;
+    case 101: // RPN LSB
+      rpn |= msg.getControllerValue();
+      if(rpn == (127<<7)|127)
+	rpn = 0;
+      break;
+    case 6: // Data Entry MSB
+      if(rpn == 0){ // Pitch Bend Sensitivity
+	float semitones = msg.getControllerValue();
+	if(isMasterChannel(msg)){
+	  zone_pitchbend_range = semitones;
+	}else{
+	  note_pitchbend_range = semitones;
+	}
+      }
+      break;
+    case 38: // Data Entry LSB
+      if(rpn == 0){ // Pitch Bend Sensitivity
+	// It is recommended that MPE devices use an integer number of semitones
+	// for the range and either transmit the LSB as zero, or not transmit it
+	// at all so that the receiver infers zero. MPE devices can still choose
+	// to respond to 14-bit Pitch Bend Sensitivity messages for
+	// compatibility with other equipment.
+	float cents = msg.getControllerValue()/100.0f;
+	if(isMasterChannel(msg)){
+	  zone_pitchbend_range += cents;
+	}else{
+	  note_pitchbend_range += cents;
+	}
+      }
+      break;
     case MIDI_ALL_NOTES_OFF:
       allNotesOff();
       break;

From 58ddc1e4898ee010fbc388c6ff35abaa16db94f5 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 25 Apr 2021 22:20:45 +0200
Subject: [PATCH 159/374] allocation only in create() method

---
 LibSource/BiquadFilter.h | 37 ++++++++++++++++++++++++++-----------
 1 file changed, 26 insertions(+), 11 deletions(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 6e249395..569356eb 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -205,7 +205,7 @@ class BiquadFilter : public SignalProcessor {
     pioversr(M_PI/sr), coefficients(coefs), state(ste), stages(sgs) {
     init();
   }
-
+  virtual ~BiquadFilter(){}
   void setSampleRate(float sr){
     pioversr = M_PI/sr;
   }
@@ -387,11 +387,15 @@ class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor {
   BiquadFilter* filters;
 protected:
 public:
-  MultiBiquadFilter(){}
-  MultiBiquadFilter(float sr, size_t channels, float* coefs, float* states, size_t stages) :
-    BiquadFilter(sr, coefs, states, stages), channels(channels) {
-    filters = new BiquadFilter[channels-1];
+  MultiBiquadFilter(float sr, float* coefs, float* states, size_t stages, BiquadFilter* filters, size_t len) :
+    BiquadFilter(sr, coefs, states, stages), filters(filters), channels(len){}
+  virtual ~MultiBiquadFilter(){}
+  static MultiBiquadFilter* create(float sr, size_t channels, size_t stages=1){
+    BiquadFilter* filters = new BiquadFilter[channels-1];
+    float* coefs = new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE];
+    float* states = new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*channels];
     FloatArray coefficients(coefs, stages*BIQUAD_COEFFICIENTS_PER_STAGE);
+    float* mystate = states;
     for(size_t ch=1; chcoefficients;
@@ -426,10 +428,23 @@ class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor {
 
 class StereoBiquadFilter : public MultiBiquadFilter {
 public:
-  StereoBiquadFilter(float sr, float* coefs, float* states, size_t stages) :
-    MultiBiquadFilter(sr, 2, coefs, states, stages) {}
+  StereoBiquadFilter(float sr, float* coefs, float* states, size_t stages, BiquadFilter* filters) :
+    MultiBiquadFilter(sr, coefs, states, stages, filters, 2) {}
   static StereoBiquadFilter* create(float sr, size_t stages=1){
-    return new StereoBiquadFilter(sr, new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE], new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*2], stages);
+    size_t channels = 2;
+    BiquadFilter* filters = new BiquadFilter[channels-1];
+    float* coefs = new float[stages*BIQUAD_COEFFICIENTS_PER_STAGE];
+    float* states = new float[stages*BIQUAD_STATE_VARIABLES_PER_STAGE*channels];
+    FloatArray coefficients(coefs, stages*BIQUAD_COEFFICIENTS_PER_STAGE);
+    float* mystate = states;
+    for(size_t ch=1; ch
Date: Sun, 25 Apr 2021 22:20:57 +0200
Subject: [PATCH 160/374] history

---
 HISTORY.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index be56745b..62255c8a 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,5 +1,6 @@
 v22.1
 -----
+
 * Added MPE processor
 * Added VOSIM oscillator
 * Added methods for sample-rate cutoff frequency modulation in StateVariableFilter and BiquadFilter
@@ -7,6 +8,7 @@ v22.1
 * New templates for MIDI voicing: PolyphonicProcessor and MonophonicProcessor
 * Added WavFile for reading wav resources and converting to FloatArray
 * Changed enum for BUTTON_A, B, C to BUTTON_1, 2, 3 et c.
+* Fix FloatMatrix compilation
 
 v22.0
 -----

From 7493abeeef92773ae91fd67853395fea6c695494 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 25 Apr 2021 22:39:44 +0200
Subject: [PATCH 161/374] prevent unintended LSB additions

---
 LibSource/MidiPolyphonicExpressionProcessor.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index 700d0df0..44fa5223 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -89,9 +89,9 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
 	// compatibility with other equipment.
 	float cents = msg.getControllerValue()/100.0f;
 	if(isMasterChannel(msg)){
-	  zone_pitchbend_range += cents;
+	  zone_pitchbend_range = ((int)zone_pitchbend_range) + cents;
 	}else{
-	  note_pitchbend_range += cents;
+	  note_pitchbend_range = ((int)note_pitchbend_range) + cents;
 	}
       }
       break;

From 345d34161aefd19e48fabee80c84046d72817016 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sun, 25 Apr 2021 22:44:34 +0200
Subject: [PATCH 162/374] swap RPN MSB and LSB back again

---
 LibSource/MidiPolyphonicExpressionProcessor.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index 44fa5223..cbae579b 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -62,17 +62,17 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
       }
       break;
     }
-    case 100: // RPN MSB
+    case 101: // RPN MSB
       rpn = msg.getControllerValue()<<7;
       break;
-    case 101: // RPN LSB
+    case 100: // RPN LSB
       rpn |= msg.getControllerValue();
       if(rpn == (127<<7)|127)
 	rpn = 0;
       break;
     case 6: // Data Entry MSB
       if(rpn == 0){ // Pitch Bend Sensitivity
-	float semitones = msg.getControllerValue();
+	uint8_t semitones = msg.getControllerValue();
 	if(isMasterChannel(msg)){
 	  zone_pitchbend_range = semitones;
 	}else{

From 004317851aaf6d182fe8aa296c0e40deec31b068 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 26 Apr 2021 12:00:48 +0200
Subject: [PATCH 163/374] set gain in dB

---
 LibSource/BiquadFilter.h | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 569356eb..6194942b 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -94,9 +94,9 @@ class FilterStage {
 
   static void setPeak(float* coefficients, float omega, float q, float gain){
     float K = tanf(omega);
-    float V = fabs(gain-0.5)*60 + 1; // Gain
+    float V = exp10f(fabsf(gain)/20);
     float norm;
-    if (gain >= 0.5) {
+    if (gain >= 0) {
       norm = 1 / (1 + 1/q * K + K * K);
       coefficients[0] = (1 + V/q * K + K * K) * norm;
       coefficients[1] = 2 * (K * K - 1) * norm;
@@ -116,9 +116,9 @@ class FilterStage {
 
   static void setLowShelf(float* coefficients, float omega, float gain){
     float K = tanf(omega);
-    float V = fabs(gain-0.5)*60 + 1; // Gain
+    float V = exp10f(fabsf(gain)/20);
     float norm;
-    if(gain >= 0.5) {
+    if(gain >= 0) {
       norm = 1 / (1 + M_SQRT2 * K + K * K);
       coefficients[0] = (1 + sqrtf(2*V) * K + V * K * K) * norm;
       coefficients[1] = 2 * (V * K * K - 1) * norm;
@@ -137,9 +137,9 @@ class FilterStage {
 
   static void setHighShelf(float* coefficients, float omega, float gain){
     float K = tanf(omega);
-    float V = fabs(gain-0.5)*60 + 1; // Gain
+    float V = exp10f(fabsf(gain)/20);
     float norm;
-    if(gain >= 0.5) {
+    if(gain >= 0) {
       norm = 1 / (1 + M_SQRT2 * K + K * K);
       coefficients[0] = (V + sqrtf(2*V) * K + K * K) * norm;
       coefficients[1] = 2 * (K * K - V) * norm;
@@ -337,16 +337,28 @@ class BiquadFilter : public SignalProcessor {
     copyCoefficients();
   }
 
+  /**
+   * Configure a peaking filter with resonance and variable gain.
+   * @param gain in dB
+   */
   void setPeak(float fc, float q, float gain){
     FilterStage::setPeak(coefficients, fc*pioversr, q, gain);
     copyCoefficients();
   }
 
+  /**
+   * Configure a low shelf filter with variable gain.
+   * @param gain in dB
+   */
   void setLowShelf(float fc, float gain){
     FilterStage::setLowShelf(coefficients, fc*pioversr, gain);
     copyCoefficients();
   }
 
+  /**
+   * Configure a low shelf filter with variable gain.
+   * @param gain in dB
+   */
   void setHighShelf(float fc, float gain){
     FilterStage::setHighShelf(coefficients, fc*pioversr, gain);
     copyCoefficients();

From 96c1cc053d23c4892f69aed54231e927ce69b09c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 29 Apr 2021 01:55:12 +0200
Subject: [PATCH 164/374] fix typos, added comments

---
 LibSource/BiquadFilter.h   | 2 +-
 LibSource/RampOscillator.h | 7 +++++--
 2 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 6194942b..b20055bf 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -356,7 +356,7 @@ class BiquadFilter : public SignalProcessor {
   }
 
   /**
-   * Configure a low shelf filter with variable gain.
+   * Configure a high shelf filter with variable gain.
    * @param gain in dB
    */
   void setHighShelf(float fc, float gain){
diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 4c16fd31..21b64684 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -3,6 +3,9 @@
 
 #include "Oscillator.h"
 
+/**
+ * Ramp oscillator generates output values from -1 to 1.
+ */
 class RampOscillator : public Oscillator {
 private:
   float mul;
@@ -16,12 +19,12 @@ class RampOscillator : public Oscillator {
     setFrequency(freq);
   }
   void reset(){
-    phase = 0.0f;
+    phase = -1;
   }
   void setSampleRate(float sr){
     mul = 2.0f/sr;
   }
-  float getS2ampleRate(){
+  float getSampleRate(){
     return 2.0f/mul;
   }
   void setFrequency(float freq){

From 93b7ba678c4cdc45c1cd8fceeb97d6f4a9274653 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 09:59:51 +0200
Subject: [PATCH 165/374] added RPN enum

---
 LibSource/MidiStatus.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/LibSource/MidiStatus.h b/LibSource/MidiStatus.h
index 1e7900c8..a95d02b3 100644
--- a/LibSource/MidiStatus.h
+++ b/LibSource/MidiStatus.h
@@ -79,4 +79,10 @@ enum OwlProtocol {
   OWL_COMMAND_RESET               = 0xf0,
 };
 
+enum MidiRPN {
+  MIDI_RPN_PITCH_BEND_RANGE       = 0x0000,
+  MIDI_RPN_MPE_CONFIGURATION      = 0x0006,
+  MIDI_RPN_RESET                  = 0x3fff,
+};
+
 #endif /* _MidiStatus_h_ */

From 46455abef089cb7645633031d3fd9285f9ca24db Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 10:00:05 +0200
Subject: [PATCH 166/374] added RPN config and comments

---
 LibSource/MidiPolyphonicExpressionProcessor.h | 42 +++++++++++++++----
 1 file changed, 35 insertions(+), 7 deletions(-)

diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index cbae579b..38ee8444 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -29,6 +29,15 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
 public:
   MidiPolyphonicExpressionProcessor() {}
   virtual ~MidiPolyphonicExpressionProcessor(){};
+  // class RpnMessage {
+  // uint8_t ch;
+  // uint16_t rpn;
+  // uint16_t value;
+  // };
+  // RpnMessage getMCM(){
+  // returns the MPE Configuration Message
+  // ch0 cc 100:06 101:00 06:VOICES
+  // }
   void noteOn(MidiMessage msg){
     uint8_t ch = getNoteChannel(msg);
     if(ch < VOICES)
@@ -62,22 +71,36 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
       }
       break;
     }
-    case 101: // RPN MSB
-      rpn = msg.getControllerValue()<<7;
+    case 100: // RPN LSB comes first
+      rpn = msg.getControllerValue();
       break;
-    case 100: // RPN LSB
-      rpn |= msg.getControllerValue();
-      if(rpn == (127<<7)|127)
+    case 101: // RPN MSB
+      rpn |= msg.getControllerValue()<<7;
+      if(rpn == MIDI_RPN_RESET) // RPN reset
 	rpn = 0;
       break;
     case 6: // Data Entry MSB
-      if(rpn == 0){ // Pitch Bend Sensitivity
+      if(rpn == MIDI_RPN_PITCH_BEND_RANGE){
 	uint8_t semitones = msg.getControllerValue();
 	if(isMasterChannel(msg)){
 	  zone_pitchbend_range = semitones;
 	}else{
 	  note_pitchbend_range = semitones;
 	}
+      }else if(rpn == MIDI_RPN_MPE_CONFIGURATION){
+	uint8_t n = msg.getChannel();
+	uint8_t mm = msg.getControllerValue();
+	// mm=0: MPE is Off (No Channels)
+	// mm=1 to F: Assigns that number of MIDI Channels to the Zone
+	if(mm != 0){
+	  if(n == 0x0) // n=0: Lower Zone Master Channel
+	    master_channel = 1;
+	  else if(n == 0xf) // n=F: Upper Zone Master Channel
+	    master_channel = 0xf;
+	  // All other channel values are invalid and should be ignored
+	}
+	// Each Zone is activated with its own message, which can be sent in either order.
+	// Sending an MCM with the number of Member Channels set to zero deactivates that Zone.
       }
       break;
     case 38: // Data Entry LSB
@@ -104,9 +127,14 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
     return msg.getChannel()+1 == master_channel;
   }
   uint8_t getNoteChannel(MidiMessage msg){
+    // The Lower Zone is controlled by Master Channel 1,
+    // with Member Channels assigned sequentially from Channel 2 upwards.
     if(master_channel == 1)
       return (msg.getChannel()-1) % VOICES;
-    return msg.getChannel() % VOICES;
+    else
+      return (14-msg.getChannel()) % VOICES;
+    // The Upper Zone is controlled by Master Channel 16,
+    // with Member Channels assigned sequentially from Channel 15 downwards.
   }
   void pitchbend(MidiMessage msg){
     // Pitch Bend is both a Zone Message and a Note Level Message. If an MPE synthesizer receives Pitch Bend (for example) on both a Master and a Member Channel, it must combine the data meaningfully. The same is true for Channel Pressure. 

From 0de967fe67088ae20c200a7b574de150f77bf405 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 10:00:23 +0200
Subject: [PATCH 167/374] added MidiMessage::isNote()

---
 LibSource/MidiMessage.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/LibSource/MidiMessage.h b/LibSource/MidiMessage.h
index 835de89e..54234b0f 100644
--- a/LibSource/MidiMessage.h
+++ b/LibSource/MidiMessage.h
@@ -82,6 +82,9 @@ class MidiMessage {
     int16_t pb = (data[2] | (data[3]<<7)) - 8192;
     return pb;
   }
+  bool isNote(){
+    return isNoteOn() || isNoteOff();
+  }
   bool isNoteOn(){
     return ((data[1] & MIDI_STATUS_MASK) == NOTE_ON) && getVelocity() != 0;
   }

From b056bb1095e1c7458f318629c62c2a982e6994d0 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 11:56:03 +0200
Subject: [PATCH 168/374] added valgrind target

---
 Makefile  | 3 +++
 native.mk | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/Makefile b/Makefile
index 94566230..d04c90b0 100644
--- a/Makefile
+++ b/Makefile
@@ -178,6 +178,9 @@ test: $(DEPS) ## test patch locally
 run: $(DEPS) ## run patch locally
 	@$(MAKE) -s -f native.mk run
 
+grind: $(DEPS) ## run valgrind on patch locally
+	@$(MAKE) -s -f native.mk grind
+
 check:
 	@for nm in $(TESTS) ; do \
 		$(MAKE) -s TEST=$$nm test || exit;\
diff --git a/native.mk b/native.mk
index ce44be74..a2c17bcf 100644
--- a/native.mk
+++ b/native.mk
@@ -73,6 +73,9 @@ native: $(TESTPATCHES)/PatchRun.cpp $(DEPS) $(OBJS)
 run: native
 	@$(BUILD)/Test/patch
 
+grind: native
+	valgrind --leak-check=full $(BUILD)/Test/patch
+
 test: $(TESTPATCHES)/PatchTest.cpp $(DEPS) $(OBJS)
 	@$(CXX) $(CPPFLAGS) $(CXXFLAGS) $(TESTPATCHES)/PatchTest.cpp -I$(BUILD) $(OBJS) -o $(BUILD)/Test/$@
 	@$(BUILD)/Test/$@

From 2b7c035e49e5e53ecca68c372d391b8bb9b8d7df Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 13:02:14 +0200
Subject: [PATCH 169/374] added Agnesi curve oscillator

---
 LibSource/AgnesiOscillator.h | 71 ++++++++++++++++++++++++++++++++++++
 LibSource/OpenWareLibrary.h  |  1 +
 2 files changed, 72 insertions(+)
 create mode 100644 LibSource/AgnesiOscillator.h

diff --git a/LibSource/AgnesiOscillator.h b/LibSource/AgnesiOscillator.h
new file mode 100644
index 00000000..d12fc1bd
--- /dev/null
+++ b/LibSource/AgnesiOscillator.h
@@ -0,0 +1,71 @@
+#ifndef __AgnesiOscillator_h
+#define __AgnesiOscillator_h
+
+#include "Oscillator.h"
+
+/**
+ * Oscillator that produces an Agnesi curve (Witch of Agnesi)
+ * With a=0.5, the output is between near 0 (0.038 for N=5) and 1.
+ * N sets the x range for one half period, which determines the y offset.
+ */
+class AgnesiOscillator : public Oscillator {
+private:
+  const float sr;
+  float a;
+  float N;
+  float incr = 0;
+  float x = 0;
+  float offset = 0;
+  float gain = 1;
+public:
+  AgnesiOscillator(float sr, float a, float N)
+    : sr(sr), a(a), N(N) {}
+  static float agnesi(float x, float a){
+    return (8*a*a*a) / (x*x + 4*a*a);
+  }
+  void setFrequency(float freq){
+    incr = 2*N*freq/sr;
+  }
+  float getFrequency(){
+    return incr*sr/(2*N);
+  }
+  void setPhase(float phase){
+    x = N*phase/M_PI;
+  }
+  float getPhase(){
+    return x*M_PI/N;
+  }
+  /**
+   * Normalise offset and gain so that signal is between 0 and 1
+   */
+  void normalise(){
+    offset = agnesi(N, a);
+    gain = 1/(agnesi(0, a) - offset);
+  }
+  float generate(){
+    float y = agnesi(x, a);
+    x += incr;
+    if(x > N)
+      x -= 2*N;
+    return gain*(y-offset);
+  }
+  float generate(float fm){
+    // modulate coefficient 'a' instead of rate
+    float y = agnesi(x, a+fm);
+    x += incr;
+    if(x > N)
+      x -= 2*N;
+    return gain*(y-offset);
+  }
+  using SignalGenerator::generate;
+  static AgnesiOscillator* create(float sr, float a=0.5, float N=5){
+    AgnesiOscillator* osc = new AgnesiOscillator(sr, a, N);
+    osc->normalise();
+    return osc;
+  }
+  static void destroy(AgnesiOscillator* obj){
+    delete obj;
+  }
+};
+
+#endif /* __AgnesiOscillator_h */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index ba74193a..c00a3694 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -2,6 +2,7 @@
 #define __OpenWareLibrary_h__
 
 #include "AbstractSynth.h"
+#include "AgnesiOscillator.h"
 #include "AudioBuffer.h"
 #include "BiquadFilter.h"
 #include "ChirpOscillator.h"

From 4a892092a035b2543daa4d3122dbd55dcfbe7a96 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 15:13:57 +0200
Subject: [PATCH 170/374] added DcBlockingFilter::reset()

---
 LibSource/DcBlockingFilter.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/LibSource/DcBlockingFilter.h b/LibSource/DcBlockingFilter.h
index 7e7d181c..703ea816 100644
--- a/LibSource/DcBlockingFilter.h
+++ b/LibSource/DcBlockingFilter.h
@@ -15,6 +15,10 @@ class DcBlockingFilter : public SignalProcessor {
 public:
   DcBlockingFilter(float lambda = 0.995): lambda(lambda), x1(0), y1(0) {}
 
+  void reset(){
+    x1 = y1 = 0;
+  }
+
   /* process a single sample and return the result */
   float process(float x){
     y1 = x - x1 + lambda*y1;

From a901746c68c38454ea77993fccac3f097690e36a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 15:14:17 +0200
Subject: [PATCH 171/374] added override declarations

---
 LibSource/AbstractSynth.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index 0bee4a76..88c63b30 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -68,10 +68,10 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
     else if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
       allNotesOff();
   }
-  virtual void channelPressure(MidiMessage msg){
+  virtual void channelPressure(MidiMessage msg) override {
     setPressure(msg.getChannelPressure()/127.0f);
   }
-  virtual void polyKeyPressure(MidiMessage msg){
+  virtual void polyKeyPressure(MidiMessage msg) override {
     setPressure(msg.getPolyKeyPressure()/127.0f);
   }
   virtual void setModulation(float modulation){} // default implementation does nothing

From 51263191764a94e7705fca85ab524d174ef27770 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 15:14:33 +0200
Subject: [PATCH 172/374] master_channel made non-const

---
 LibSource/MidiPolyphonicExpressionProcessor.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index 38ee8444..2b45835c 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -17,7 +17,7 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
   uint8_t notes[VOICES];
   float pressure[VOICES];
   float modulation[VOICES];
-  const uint8_t master_channel = 1;
+  uint8_t master_channel = 1;
   // One channel (usually Channel 1) is used for global messages
   // The global channel is set by the "MPE Zone." When the MPE Zone is the Lower Zone, Channel 1 is used for global messages. When the MPE Zone is Upper Zone is, Channel 16 is used for global messages.
   float zone_pitchbend = 0;

From b0ddcb783f5161a6589720afed4a69ee36b4a090 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 15:14:54 +0200
Subject: [PATCH 173/374] fixed field order

---
 LibSource/BiquadFilter.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index b20055bf..49dfa5eb 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -395,8 +395,8 @@ class BiquadFilter : public SignalProcessor {
 
 class MultiBiquadFilter : public BiquadFilter, public MultiSignalProcessor {
 private:
-  size_t channels;
   BiquadFilter* filters;
+  size_t channels;
 protected:
 public:
   MultiBiquadFilter(float sr, float* coefs, float* states, size_t stages, BiquadFilter* filters, size_t len) :

From 8b4dc04d98bca070927858400da0ea0800c950c8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 15:15:17 +0200
Subject: [PATCH 174/374] updated comments

---
 LibSource/RampOscillator.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 21b64684..6ac26c7a 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -1,10 +1,10 @@
-#ifndef RAMPOSCILLATOR_H
-#define RAMPOSCILLATOR_H
+#ifndef __RampOscillator_h
+#define __RampOscillator_h
 
 #include "Oscillator.h"
 
 /**
- * Ramp oscillator generates output values from -1 to 1.
+ * Ramp oscillator generates rising output values from -1 to 1.
  */
 class RampOscillator : public Oscillator {
 private:
@@ -83,4 +83,4 @@ class RampOscillator : public Oscillator {
   }
 };
 
-#endif /* RAMPOSCILLATOR_H */
+#endif /* __RampOscillator_h */

From b55c496bd6f8c1f9bb28e0a2ac3cef7ad97a47b7 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 15:15:39 +0200
Subject: [PATCH 175/374] support more wav file variations

---
 LibSource/WavFile.h | 97 +++++++++++++++++++++++++++++----------------
 1 file changed, 62 insertions(+), 35 deletions(-)

diff --git a/LibSource/WavFile.h b/LibSource/WavFile.h
index 2defa9ba..607ed24b 100644
--- a/LibSource/WavFile.h
+++ b/LibSource/WavFile.h
@@ -5,9 +5,13 @@
 #include "ShortArray.h"
 #include "FloatArray.h"
 
-// supports only basic 44-byte wav headers with PCM type
 // http://www-mmsp.ece.mcgill.ca/Documents/AudioFormats/WAVE/WAVE.html
 
+typedef struct {
+  char     id[4];
+  uint32_t size;  
+} WavDataChunk;
+
 typedef struct {
     char     chunk_id[4];
     uint32_t chunk_size;
@@ -20,66 +24,89 @@ typedef struct {
     uint32_t byte_rate;
     uint16_t block_align;
     uint16_t bps;
-    char     datachunk_id[4];
-    uint32_t datachunk_size;
-}WavHeader;
+} WavHeader;
 
 class WavFile {
   WavHeader* header;
+  WavDataChunk* datachunk;
+  size_t size;
 public:
-  WavFile(void* data) : header((WavHeader*)data){}
+  WavFile(void* data, size_t len) : header((WavHeader*)data), size(len) {
+    datachunk = (WavDataChunk*)(header->fmtchunk_id + 8 + header->fmtchunk_size);
+    void* end = (uint8_t*)data+len;
+    // iterate through data chunks to find one with id 'data'
+    while(datachunk->id + datachunk->size < end && strncmp(datachunk->id, "data", 4) != 0)
+      datachunk = (WavDataChunk*)(datachunk->id + sizeof(WavDataChunk) + datachunk->size);
+  }
   WavHeader* getHeader(){
     return header;
   }
   bool isValid(){
-    // support only basic 44-byte wav headers with PCM type
-    if(strncmp(header->chunk_id, "RIFF", 4) ||
+    if(!header || !datachunk ||
+       strncmp(header->chunk_id, "RIFF", 4) ||
        strncmp(header->format, "WAVE", 4) ||
-       strncmp(header->datachunk_id, "data", 4) ||
-       header->datachunk_size == 0 ||
-       header->fmtchunk_size != 16)
+       strncmp(datachunk->id, "data", 4) ||
+       datachunk->size == 0)
       return false;
+    if(header->audio_format == 1 && header->bps == 8)
+      return true; // 8-bit PCM
     if(header->audio_format == 1 && header->bps == 16)
-      return true;
-    if(header->audio_format == 1 && header->bps == 32)
-      return true;
+      return true; // 16-bit PCM
+    // if(header->audio_format == 1 && header->bps == 24)
+    //   return true; // 24-bit PCM
     if(header->audio_format == 3 && header->bps == 32)
-      return true;
+      return true; // 32-bit float
     return false;
   }
+  
   size_t getNumberOfChannels(){
     return header->num_channels;
   }
   size_t getNumberOfSamples(){
-    return header->datachunk_size/(header->bps/8);    
+    size_t total = datachunk->size/(header->bps/8);
+    return total/getNumberOfChannels();
+  }
+  size_t getSize(){
+    return size;
   }
   size_t getBitsPerSample(){
     return header->bps;
   }
   void* getData(){
-    // if(header->fmtchunk_size == 16)
-    return ((uint8_t*)header) + sizeof(WavHeader);
+    return datachunk->id + sizeof(WavDataChunk);
   }
-  FloatArray createFloatArray(){
-    uint8_t* data = ((uint8_t*)header) + sizeof(WavHeader);
+  FloatArray createFloatArray(size_t channel){
+    size_t channels = getNumberOfChannels();
     size_t len = getNumberOfSamples();
-    if(header->audio_format == 1 && header->bps == 16){ // WAVE_FORMAT_PCM
-      ShortArray samples((int16_t*)data, len);
-      FloatArray result = FloatArray::create(samples.getSize());
-      samples.toFloat(result);
-      return result;
-    }else if(header->audio_format == 1 && header->bps == 32){ // WAVE_FORMAT_PCM
-      IntArray samples((int32_t*)data, len);
-      FloatArray result = FloatArray::create(samples.getSize());
-      samples.toFloat(result);
-      return result;
-    // }else if(header->audio_format == 3 && header->bps == 32){ // WAVE_FORMAT_IEEE_FLOAT
-    //   FloatArray samples((float*)data, len);
-    //   FloatArray result = FloatArray::create(samples.getSize());
-    //   samples.copyTo(result);
-    //   return result;
+    size_t pos = channel % channels;
+    FloatArray result = FloatArray::create(len);
+    if(header->audio_format == 1 && header->bps == 8){ // WAVE_FORMAT_PCM 8-bit
+      int8_t* data = (int8_t*)getData();      
+      for(size_t i=0; iaudio_format == 1 && header->bps == 16){ // WAVE_FORMAT_PCM 16-bit
+      int16_t* data = (int16_t*)getData();      
+      for(size_t i=0; iaudio_format == 1 && header->bps == 24){ // WAVE_FORMAT_PCM 24-bit
+    //   int32_t* data = (int32_t*)getData();      
+    //   for(size_t i=0; iaudio_format == 3 && header->bps == 32){ // WAVE_FORMAT_IEEE_FLOAT
+      float* data = (float*)getData();
+      for(size_t i=0; i
Date: Thu, 6 May 2021 15:16:15 +0200
Subject: [PATCH 176/374] set parameters, change WavFile initialisation

---
 TestPatches/PatchRun.cpp | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/TestPatches/PatchRun.cpp b/TestPatches/PatchRun.cpp
index 8acbabdc..5b78fb9c 100644
--- a/TestPatches/PatchRun.cpp
+++ b/TestPatches/PatchRun.cpp
@@ -42,6 +42,10 @@ void registerPatch(const char* name, uint8_t inputs, uint8_t outputs, Patch* pat
 int main(int argc, char** argv){
   errorcode = 0;
   programVector.serviceCall = serviceCall;
+  size_t parameters_size = 40;
+  int16_t parameters[parameters_size] = {};
+  programVector.parameters_size = parameters_size;
+  programVector.parameters = parameters;
 #include "registerpatch.cpp"
   ASSERT(processor.patch != NULL, "Missing test patch");    
   StereoSampleBuffer* samples = new StereoSampleBuffer(BLOCKSIZE);
@@ -51,7 +55,7 @@ int main(int argc, char** argv){
     size_t len = fileread(input_filename, &data, 0);
     data = (uint8_t*)malloc(len);
     fileread(input_filename, &data, len);
-    WavFile wav(data);
+    WavFile wav(data, len);
     const int channels = wav.getNumberOfChannels();
     // ASSERT(wav.getSampleRate() == SAMPLE_RATE, "Incorrect sample rate in input file");
     ASSERT(channels == CHANNELS, "Incorrect number of channels in input file");

From 7786a547e6f82c8627ecdcd709d791260bdabccc Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 15:16:36 +0200
Subject: [PATCH 177/374] added SampleOscillator

---
 LibSource/OpenWareLibrary.h  |   1 +
 LibSource/SampleOscillator.h | 127 +++++++++++++++++++++++++++++++++++
 2 files changed, 128 insertions(+)
 create mode 100644 LibSource/SampleOscillator.h

diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index c00a3694..c0231d0a 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -36,6 +36,7 @@
 #include "RampOscillator.h"
 #include "Resample.h"
 #include "Resource.h"
+#include "SampleOscillator.h"
 #include "ShortArray.h"
 #include "ShortFastFourierTransform.h"
 #include "SignalGenerator.h"
diff --git a/LibSource/SampleOscillator.h b/LibSource/SampleOscillator.h
new file mode 100644
index 00000000..1939b6b5
--- /dev/null
+++ b/LibSource/SampleOscillator.h
@@ -0,0 +1,127 @@
+#ifndef __SampleOscillator_h
+#define __SampleOscillator_h
+
+#include "Oscillator.h"
+
+class SampleOscillator : public Oscillator {
+public:
+  enum RepeatMode {
+	REPEAT_REVERSE = -1,
+	REPEAT_NONE    = 0,
+	REPEAT_FORWARD = 1
+  };
+private:
+  const float sr;
+  FloatArray buffer;
+  float pos = 0.0f;
+  size_t size;
+  float rate = 1.0f;
+  RepeatMode repeat_mode = REPEAT_NONE;
+  static constexpr float MIDDLE_C = 261.6;
+public:
+
+ SampleOscillator(float sr, FloatArray sample)
+    : sr(sr)
+    , buffer(sample) {
+    size = buffer.getSize() - 1;
+  }
+  void setFrequency(float freq) {
+    rate = copysignf(freq / MIDDLE_C, rate); // preserve sign
+  }
+  float getFrequency(){
+    return rate*MIDDLE_C;
+  }
+  void setSample(FloatArray sample){
+    buffer = sample;
+    size = buffer.getSize() -1;
+    pos = 0;
+  }
+  FloatArray getSample(){
+    return buffer;
+  }
+  void setRepeatMode(RepeatMode mode){
+    repeat_mode = mode;
+  }
+  void reset() {
+    pos = 0;
+  }
+  static float interpolate(float index, FloatArray data) {
+    size_t idx = (int)index;
+    float low = data[idx];
+    float high = data[idx + 1];
+    float frac = index - idx;
+    return CosineInterpolate(low, high, frac);
+    // return LinearInterpolate(low, high, frac);
+  }
+  void setPhase(float phase){
+    pos = size*phase/(2*M_PI);
+  }
+  float getPhase(){
+    return pos*2*M_PI/size;
+  }
+  float generate(float fm) {
+    return generate();
+  }
+  float generate() {
+    if(pos < 0){
+      if(repeat_mode == REPEAT_REVERSE){
+	rate *= -1;
+	pos = 0;
+      }else{
+	return 0;
+      }
+    }else if(pos > size){
+      if(repeat_mode == REPEAT_FORWARD){
+	pos = 0;
+      }else if(repeat_mode == REPEAT_REVERSE){
+	rate *= -1;
+	pos = size;
+      }else{
+	return 0;
+      }
+    }
+    float sample = interpolate(pos, buffer);
+    pos += rate;
+    return sample;
+  }
+  using Oscillator::generate;
+  // void generate(FloatArray out){
+  //   // todo: unwind interpolation
+  //   // use circular buffer to retrieve blocks of samples
+  // }
+  size_t findZeroCrossing(size_t index) {
+    size_t len = buffer.getSize()-1;
+    size_t i = min(index, len);
+    if (buffer[i] > 0)
+      while (i < len && buffer[i] > 0)
+	i++;
+    else
+      while (i < len && buffer[i] < 0)
+	i++;
+    return i;
+  }
+  void setDuration(float duration) {
+    size_t samples = duration * getSampleLength()+sr*0.025; // min 25 mS
+    size = findZeroCrossing(samples);
+  }
+  /* @return the audio length in samples */
+  size_t getSampleLength() {
+    return buffer.getSize();
+  }
+  static SampleOscillator* create(float sr, FloatArray buf) {
+    return new SampleOscillator(sr, buf);
+  }
+  static void destroy(SampleOscillator* obj) {
+    delete obj;
+  }
+
+  static float LinearInterpolate(float y1, float y2, float mu){
+    return y1 + (y2 - y1) * mu;
+  }
+  static float CosineInterpolate(float y1, float y2, float mu){
+    float mu2 = (1-cosf(mu*M_PI))/2;
+    return y1*(1-mu2)+y2*mu2;
+  }
+};
+
+#endif /* __SampleOscillator_h */

From 8b2e8893344d1cd477f07b666b57bff11486b8e6 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 15:16:42 +0200
Subject: [PATCH 178/374] updated history

---
 HISTORY.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index 62255c8a..7884ba78 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,6 +1,8 @@
 v22.1
 -----
 
+* Added Sample oscillator
+* Added Agnesi curve oscillator
 * Added MPE processor
 * Added VOSIM oscillator
 * Added methods for sample-rate cutoff frequency modulation in StateVariableFilter and BiquadFilter

From 524f608bfee7c5c14e00ca80dc3ff7cbceb19ec9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 17:36:48 +0200
Subject: [PATCH 179/374] fix get/set phase

---
 LibSource/AgnesiOscillator.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/AgnesiOscillator.h b/LibSource/AgnesiOscillator.h
index d12fc1bd..1a7a62e0 100644
--- a/LibSource/AgnesiOscillator.h
+++ b/LibSource/AgnesiOscillator.h
@@ -30,10 +30,10 @@ class AgnesiOscillator : public Oscillator {
     return incr*sr/(2*N);
   }
   void setPhase(float phase){
-    x = N*phase/M_PI;
+    x = N*(phase-M_PI)/M_PI;
   }
   float getPhase(){
-    return x*M_PI/N;
+    return M_PI*x/N+M_PI;
   }
   /**
    * Normalise offset and gain so that signal is between 0 and 1

From c4b75205e594b93fc2004ed4dec2f4a9a099090b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 17:37:23 +0200
Subject: [PATCH 180/374] added WavFile::read()

---
 LibSource/WavFile.h | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/LibSource/WavFile.h b/LibSource/WavFile.h
index 607ed24b..1b97db4a 100644
--- a/LibSource/WavFile.h
+++ b/LibSource/WavFile.h
@@ -75,38 +75,41 @@ class WavFile {
   void* getData(){
     return datachunk->id + sizeof(WavDataChunk);
   }
-  FloatArray createFloatArray(size_t channel){
+  void read(size_t channel, FloatArray output){
     size_t channels = getNumberOfChannels();
-    size_t len = getNumberOfSamples();
+    size_t len = min(output.getSize(), getNumberOfSamples());
     size_t pos = channel % channels;
-    FloatArray result = FloatArray::create(len);
     if(header->audio_format == 1 && header->bps == 8){ // WAVE_FORMAT_PCM 8-bit
       int8_t* data = (int8_t*)getData();      
       for(size_t i=0; iaudio_format == 1 && header->bps == 16){ // WAVE_FORMAT_PCM 16-bit
       int16_t* data = (int16_t*)getData();      
       for(size_t i=0; iaudio_format == 1 && header->bps == 24){ // WAVE_FORMAT_PCM 24-bit
     //   int32_t* data = (int32_t*)getData();      
     //   for(size_t i=0; iaudio_format == 3 && header->bps == 32){ // WAVE_FORMAT_IEEE_FLOAT
       float* data = (float*)getData();
       for(size_t i=0; i
Date: Thu, 6 May 2021 17:41:17 +0200
Subject: [PATCH 181/374] added block-based generate() method

---
 LibSource/SampleOscillator.h | 48 ++++++++++++++++++++++++++++++++----
 1 file changed, 43 insertions(+), 5 deletions(-)

diff --git a/LibSource/SampleOscillator.h b/LibSource/SampleOscillator.h
index 1939b6b5..b5eecb69 100644
--- a/LibSource/SampleOscillator.h
+++ b/LibSource/SampleOscillator.h
@@ -84,11 +84,49 @@ class SampleOscillator : public Oscillator {
     pos += rate;
     return sample;
   }
-  using Oscillator::generate;
-  // void generate(FloatArray out){
-  //   // todo: unwind interpolation
-  //   // use circular buffer to retrieve blocks of samples
-  // }
+  void generate(FloatArray output){
+    size_t len = output.getSize();
+    float* dest = output;
+    if(rate > 0){
+      while(pos + rate*len > size){
+	float remain = size - pos;
+	size_t steps = (size_t)(remain/rate);
+	for(size_t i=0; i
Date: Thu, 6 May 2021 17:41:31 +0200
Subject: [PATCH 182/374] added ExponentialDecayEnvelope::set/getLevel()

---
 LibSource/ExponentialDecayEnvelope.h | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/LibSource/ExponentialDecayEnvelope.h b/LibSource/ExponentialDecayEnvelope.h
index 5d74023b..44ef1f94 100644
--- a/LibSource/ExponentialDecayEnvelope.h
+++ b/LibSource/ExponentialDecayEnvelope.h
@@ -41,6 +41,12 @@ class ExponentialDecayEnvelope : public Envelope {
     value *= incr;
     return sample;
   }
+  float getLevel(){
+    return value;
+  }
+  void setLevel(float level){
+    value = level;
+  }
   [[deprecated("use generate() instead.")]]
   float getNextSample(){
     return generate(); // increments envelope one step

From 9a3cdefc21ffa80568466fd9ecb71478bfbb5086 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 6 May 2021 18:19:52 +0200
Subject: [PATCH 183/374] aligned versions with OpenWare

---
 HISTORY.md | 10 +---------
 1 file changed, 1 insertion(+), 9 deletions(-)

diff --git a/HISTORY.md b/HISTORY.md
index 7884ba78..887b6ff4 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,4 +1,4 @@
-v22.1
+v21.2
 -----
 
 * Added Sample oscillator
@@ -11,10 +11,6 @@ v22.1
 * Added WavFile for reading wav resources and converting to FloatArray
 * Changed enum for BUTTON_A, B, C to BUTTON_1, 2, 3 et c.
 * Fix FloatMatrix compilation
-
-v22.0
------
-
 * FAUST Checkbutton support
 * FAUST Soundfile support
 * Added CircularBuffer and DelayProcessor classes
@@ -31,10 +27,6 @@ v22.0
 * ShortArray and IntArray conversion methods renamed toFloat() and fromFloat()
 * New SignalGenerator and SignalProcessor abstract base classes
 * Refactored makefiles
-
-v21.2
------
-
 * Fixed 'test' make target
 * Allow patches to be compiled and run natively
 

From 900303a88824713823a0aedb34a169d33569af63 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 May 2021 22:30:52 +0200
Subject: [PATCH 184/374] added AudioBuffer::copyFrom(), copyTo() ::multiply()

---
 LibSource/AudioBuffer.h    | 17 ++++++++++++++++-
 Source/SampleBuffer.hpp    |  4 ----
 TestPatches/DummyPatch.hpp |  4 ----
 WebSource/web.cpp          |  1 -
 4 files changed, 16 insertions(+), 10 deletions(-)

diff --git a/LibSource/AudioBuffer.h b/LibSource/AudioBuffer.h
index f2b60106..56528d15 100644
--- a/LibSource/AudioBuffer.h
+++ b/LibSource/AudioBuffer.h
@@ -10,7 +10,22 @@ class AudioBuffer {
   virtual int getChannels() = 0;
   virtual int getSize() = 0;
   virtual void clear() = 0;
-  virtual void add(AudioBuffer& buffer) = 0;
+  void multiply(float scalar){
+    for(size_t i=0; i
Date: Thu, 13 May 2021 22:45:55 +0200
Subject: [PATCH 185/374] initialise member fields

---
 LibSource/VosimOscillator.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/VosimOscillator.h b/LibSource/VosimOscillator.h
index e3efad52..1934fea4 100644
--- a/LibSource/VosimOscillator.h
+++ b/LibSource/VosimOscillator.h
@@ -12,8 +12,8 @@ class VosimOscillator : public Oscillator {
   const float fs;
   SineOscillator* formant1;
   SineOscillator* formant2;
-  float phase;
-  float incr;
+  float phase = 0;
+  float incr = 0;
 public:
   VosimOscillator(float samplerate, SineOscillator* osc2, SineOscillator* osc1) :
     fs(samplerate), formant1(osc1) , formant2(osc2) {}

From 690a14ca11290be2d3f1b85d7cc7f08d00db81cf Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 May 2021 22:47:18 +0200
Subject: [PATCH 186/374] added DryWetProcessor, FeedbackProcessor, TapTempo

---
 LibSource/DryWetProcessor.h   |  63 +++++++++++++++++
 LibSource/FeedbackProcessor.h | 115 +++++++++++++++++++++++++++++++
 LibSource/OpenWareLibrary.h   |   3 +
 LibSource/TapTempo.h          | 124 ++++++++++++++++++++++++++++++++++
 4 files changed, 305 insertions(+)
 create mode 100644 LibSource/DryWetProcessor.h
 create mode 100644 LibSource/FeedbackProcessor.h
 create mode 100644 LibSource/TapTempo.h

diff --git a/LibSource/DryWetProcessor.h b/LibSource/DryWetProcessor.h
new file mode 100644
index 00000000..3bdbb65a
--- /dev/null
+++ b/LibSource/DryWetProcessor.h
@@ -0,0 +1,63 @@
+#ifndef __DryWetProcessor_h__
+#define __DryWetProcessor_h__
+
+#include 
+#include "SignalProcessor.h"
+
+template
+class DryWetSignalProcessor : public Processor {
+protected:
+  FloatArray mix_buffer;
+  float mix_amount;
+public:
+  template 
+  DryWetSignalProcessor(FloatArray buffer, Args&&... args) :
+    Processor(std::forward(args)...), mix_buffer(buffer), mix_amount(0) {}
+  void setMix(float amount){
+    mix_amount = amount;
+  }
+  float getMix(){
+    return mix_amount;
+  }
+  void process(FloatArray input, FloatArray output){
+    mix_buffer.copyFrom(input);
+    Processor::process(input, output);
+    output.multiply(mix_amount);
+    mix_buffer.multiply(1-mix_amount);
+    output.add(mix_buffer);
+  }
+  static void destroy(DryWetSignalProcessor* obj){
+    FloatArray::destroy(obj->mix_buffer);
+    Processor::destroy(obj);
+  }
+};
+
+template
+class DryWetMultiSignalProcessor : public Processor {
+protected:
+  AudioBuffer* mix_buffer;
+  float mix_amount;
+public:
+  template 
+  DryWetMultiSignalProcessor(AudioBuffer* buffer, Args&&... args) :
+    Processor(std::forward(args)...), mix_buffer(buffer), mix_amount(0) {}
+  void setMix(float amount){
+    mix_amount = amount;
+  }
+  float getMix(){
+    return mix_amount;
+  }
+  void process(AudioBuffer& input, AudioBuffer& output){
+    mix_buffer->copyFrom(input);
+    Processor::process(input, output);
+    output.multiply(mix_amount);
+    mix_buffer->multiply(1-mix_amount);
+    output.add(*mix_buffer);
+  }
+  static void destroy(DryWetMultiSignalProcessor* obj){
+    AudioBuffer::destroy(obj->mix_buffer);
+    Processor::destroy(obj);
+  }
+};
+
+#endif // __DryWetProcessor_h__
diff --git a/LibSource/FeedbackProcessor.h b/LibSource/FeedbackProcessor.h
new file mode 100644
index 00000000..cd846904
--- /dev/null
+++ b/LibSource/FeedbackProcessor.h
@@ -0,0 +1,115 @@
+#ifndef __FeedbackProcessor_h__
+#define __FeedbackProcessor_h__
+
+#include 
+#include "SignalProcessor.h"
+#include "DcBlockingFilter.h"
+
+template
+class FeedbackSignalProcessor : public Processor {
+protected:
+  FloatArray feedback_buffer;
+  float feedback_amount;
+public:
+  template 
+  FeedbackSignalProcessor(FloatArray buffer, Args&&... args) :
+    Processor(std::forward(args)...), feedback_buffer(buffer), feedback_amount(0) {}
+  void setFeedback(float amount){
+    feedback_amount = amount;
+  }
+  float getFeedback(){
+    return feedback_amount;
+  }
+  void process(FloatArray input, FloatArray output){
+    feedback_buffer.multiply(feedback_amount);
+    input.add(feedback_buffer);
+    Processor::process(input, output);
+    feedback_buffer.copyFrom(output);
+  }
+  static void destroy(FeedbackSignalProcessor* obj){
+    FloatArray::destroy(obj->feedback_buffer);
+    Processor::destroy(obj);
+  }
+};
+
+class StereoFeedbackProcessor : public MultiSignalProcessor {
+protected:
+  SignalProcessor* processor_left;
+  SignalProcessor* processor_right;
+  FloatArray feedback_left;
+  FloatArray feedback_right;
+  float feedback_amount;
+public:
+  template 
+  StereoFeedbackProcessor(SignalProcessor* left, SignalProcessor* right,
+			  FloatArray fbl, FloatArray fbr) :
+    processor_left(left), processor_right(right), feedback_left(fbl), feedback_right(fbr) {}
+  void setFeedback(float amount){
+    feedback_amount = amount;
+  }
+  float getFeedback(){
+    return feedback_amount;
+  }
+  void process(AudioBuffer& input, AudioBuffer& output){
+    FloatArray input_left = input.getSamples(LEFT_CHANNEL);
+    FloatArray output_left = output.getSamples(LEFT_CHANNEL);
+    feedback_left.multiply(feedback_amount);
+    input_left.add(feedback_left);
+    processor_left->process(input_left, output_left);
+    FloatArray input_right = input.getSamples(RIGHT_CHANNEL);
+    FloatArray output_right = output.getSamples(RIGHT_CHANNEL);
+    feedback_right.multiply(feedback_amount);
+    input_right.add(feedback_right);
+    processor_right->process(input_right, output_right);
+    feedback_left.copyFrom(output_left);
+    feedback_right.copyFrom(output_right);
+  }
+  static void destroy(StereoFeedbackProcessor* obj){
+    FloatArray::destroy(obj->feedback_left);
+    FloatArray::destroy(obj->feedback_right);
+  }
+};
+
+class PingPongFeedbackProcessor : public MultiSignalProcessor {
+protected:
+  DcBlockingFilter dc_left;
+  DcBlockingFilter dc_right;
+  SignalProcessor* processor_left;
+  SignalProcessor* processor_right;
+  FloatArray feedback_left;
+  FloatArray feedback_right;
+  float feedback_amount;
+public:
+  template 
+  PingPongFeedbackProcessor(SignalProcessor* left, SignalProcessor* right,
+				  FloatArray fbl, FloatArray fbr) :
+    processor_left(left), processor_right(right), feedback_left(fbl), feedback_right(fbr) {}
+  void setFeedback(float amount){
+    feedback_amount = amount;
+  }
+  float getFeedback(){
+    return feedback_amount;
+  }
+  void process(AudioBuffer& input, AudioBuffer& output){
+    FloatArray input_left = input.getSamples(LEFT_CHANNEL);
+    FloatArray output_left = output.getSamples(LEFT_CHANNEL);
+    feedback_left.multiply(feedback_amount);
+    input_left.add(feedback_left);
+    processor_left->process(input_left, output_left);
+    FloatArray input_right = input.getSamples(RIGHT_CHANNEL);
+    FloatArray output_right = output.getSamples(RIGHT_CHANNEL);
+    feedback_right.multiply(feedback_amount);
+    input_right.add(feedback_right);
+    processor_right->process(input_right, output_right);
+    feedback_left.copyFrom(output_right);
+    dc_left.process(feedback_left);
+    feedback_right.copyFrom(output_left);
+    dc_right.process(feedback_right);
+  }
+  static void destroy(PingPongFeedbackProcessor* obj){
+    FloatArray::destroy(obj->feedback_left);
+    FloatArray::destroy(obj->feedback_right);
+  }
+};
+
+#endif // __FeedbackProcessor_h__
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index c0231d0a..0f8240ed 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -13,9 +13,11 @@
 #include "Control.h"
 #include "DcBlockingFilter.h"
 #include "DelayProcessor.h"
+#include "DryWetProcessor.h"
 #include "Envelope.h"
 #include "ExponentialDecayEnvelope.h"
 #include "FastFourierTransform.h"
+#include "FeedbackProcessor.h"
 #include "FractionalCircularBuffer.h"
 #include "FirFilter.h"
 #include "FloatArray.h"
@@ -46,6 +48,7 @@
 #include "SmoothingFilter.h"
 #include "StateVariableFilter.h"
 #include "Synth.h"
+#include "TapTempo.h"
 #include "VoltsPerOctave.h"
 #include "VelocityCurve.h"
 #include "VosimOscillator.h"
diff --git a/LibSource/TapTempo.h b/LibSource/TapTempo.h
new file mode 100644
index 00000000..fed202bf
--- /dev/null
+++ b/LibSource/TapTempo.h
@@ -0,0 +1,124 @@
+#ifndef __TapTempo_h__
+#define __TapTempo_h__
+
+class TapTempo {
+protected:
+  const float sr;
+  const size_t limit;
+  size_t samples;
+  size_t trig;
+  bool ison;
+public:
+  TapTempo(float sr, size_t limit) : 
+    sr(sr), limit(limit), samples(limit/2), trig(limit), ison(false) {
+  }
+  bool isOn(){
+    return ison;
+  }
+  void trigger(bool on){
+    trigger(on, 0);
+  }
+  void trigger(bool on, int delay){
+    if(on && !ison){
+      if(trig < limit){
+	samples = trig + delay;
+      }
+      trig = 0;
+    }
+    ison = on;
+  }
+  void clock(){
+    if(trig < limit)
+      trig++;
+  }
+  void clock(size_t steps){
+    trig += steps;
+    if(trig > limit)
+      trig = limit;
+  }
+  /**
+   * Get tap tempo in BPM.
+   */
+  float getBeatsPerMinute(){
+    return samplePeriodToBpm(samples, sr);
+  }
+  /**
+   * Set tap tempo in BPM.
+   */
+  void setBeatsPerMinute(float bpm){
+    samples = bpmToSamplePeriod(bpm, sr);
+  }
+  /**
+   * Get tap tempo frequency.
+   */
+  float getFrequency(){
+    return sr/samples;
+  }
+  /**
+   * Set tap tempo frequency.
+   */
+  void setFrequency(float freq){
+    samples = freq*sr;
+  }
+  /**
+   * Get tap tempo period in samples.
+   */
+  size_t getSamples(){
+    return samples;
+  }
+  /**
+   * Set tap tempo period in samples.
+   */
+  void setSamples(size_t value){
+    samples = value;
+  }
+  static float bpmToFrequency(float bpm){
+    return bpm/60;
+  }
+  static float frequencyToBpm(float freq){
+    return freq*60;
+  }
+  static float bpmToSamplePeriod(float bpm, float sr){
+    return sr/bpmToFrequency(bpm);
+  }
+  static float samplePeriodToBpm(float samples, float sr){
+    return frequencyToBpm(sr/samples);
+  }
+  static TapTempo* create(float sr, size_t limit){
+    return new TapTempo(sr, limit);
+  }
+  static void destroy(TapTempo* obj){
+    delete obj;
+  }    
+};
+
+class AdjustableTapTempo : public TapTempo {
+protected:
+  uint16_t speed;
+public:
+  AdjustableTapTempo(float sr, size_t limit) :
+    TapTempo(sr, limit), speed(2048) {}
+  void resetAdjustment(uint16_t s){
+    speed = s;
+  }
+  /**
+   * Adjust the tap tempo period by a 12-bit value.
+   * The difference between consecutive calls is used to 
+   * recalculate the current tempo.
+   */
+  void adjust(uint16_t s){
+    if(abs(speed-s) > 16){
+      int64_t delta = (int64_t)samples*(speed-s)/2048;
+      samples = max(1, samples+delta);
+      speed = s;
+    }
+  }
+  static AdjustableTapTempo* create(float sr, size_t limit){
+    return new AdjustableTapTempo(sr, limit);
+  }
+  static void destroy(AdjustableTapTempo* obj){
+    delete obj;
+  }    
+};
+
+#endif /* __TapTempo_h__ */

From 89bc9531258f3865c0ec9904ec8ad3045d55a992 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 May 2021 22:55:35 +0200
Subject: [PATCH 187/374] added fixed interpolated delay method

---
 LibSource/CircularBuffer.h | 16 +++++++++++++---
 1 file changed, 13 insertions(+), 3 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index f54e5fb6..8653b358 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -180,20 +180,30 @@ class CircularBuffer {
     read(out, len);
   }
   
+  /**
+   * Write to buffer and read with a fractional delay
+   */
+  void interpolatedDelay(T* in, T* out, size_t len, float delay){
+    write(in, len);
+    float pos = fmodf(writepos-delay+size, size);
+    while(len--){
+      *out++ = interpolatedReadAt(pos);
+      pos += 1;
+    }
+  }
+  
   /**
    * Write to buffer and read with a delay that ramps up or down
    * from @param beginDelay to @param endDelay
    */
   void interpolatedDelay(T* in, T* out, size_t len, float beginDelay, float endDelay){
-    setDelay(beginDelay);
     write(in, len);
-    float pos = readpos;
+    float pos = fmodf(writepos-delay+size, size);
     float incr = (len+endDelay-beginDelay)/len;
     while(len--){
       *out++ = interpolatedReadAt(pos);
       pos += incr;
     }
-    setDelay(endDelay);
   }
 
   size_t getReadCapacity(){

From ad74309bac1751ce64f4225c829a395e18b586d2 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 May 2021 22:57:17 +0200
Subject: [PATCH 188/374] updated FractionalDelay and added CrossFadingDelay

---
 LibSource/DelayProcessor.h | 75 ++++++++++++++++++++++++++++++++++----
 1 file changed, 68 insertions(+), 7 deletions(-)

diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 28702358..8d1de3ea 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -6,7 +6,7 @@
 #include "FractionalCircularBuffer.h"
 
 /**
- * Delay line signal processor implemented with a circular buffer
+ * Delay line signal processor implemented with a circular buffer.
  */
 class DelayProcessor : public SignalProcessor {
 protected:
@@ -39,7 +39,7 @@ class DelayProcessor : public SignalProcessor {
 };
 
 /**
- * Delay line signal processor implemented with a circular buffer
+ * Delay line signal processor implemented with a circular buffer, allowing fractional delay times.
  */
 class FractionalDelayProcessor : public SignalProcessor {
 protected:
@@ -53,13 +53,14 @@ class FractionalDelayProcessor : public SignalProcessor {
   }
   void setDelay(float samples){
     delay = samples;
-    buffer.setDelay(samples);
   }
   float process(float input){
     buffer.write(input);
-    return buffer.interpolatedReadAt(buffer.getWriteIndex()+delay);
+    return buffer.interpolatedReadAt(buffer.getWriteIndex()-delay);
+  }
+  void process(FloatArray input, FloatArray output){
+    buffer.interpolatedDelay(input, output, delay);
   }
-  using SignalProcessor::process;
   /**
    * Delay ramping smoothly from the previous delay time to @param newDelay
    */
@@ -91,14 +92,14 @@ class FastFractionalDelayProcessor : public SignalProcessor {
   }
   void setDelay(float samples){
     delay = samples;
-    buffer.setDelay(samples);
   }
   float process(float input){
+    buffer.setDelay(samples);
     buffer.write(input);
     return buffer.read();
   }
   void process(FloatArray input, FloatArray output){
-    buffer.delay(input, output, input.getSize(), delay);
+    smooth(input, output, delay);
   }
   /**
    * Delay ramping smoothly from the previous delay time to @param newDelay
@@ -117,4 +118,64 @@ class FastFractionalDelayProcessor : public SignalProcessor {
   }
 };
 
+/**
+ * Delay line signal processor that crossfades to smooth changes in delay time.
+ */
+class CrossFadingDelayProcessor : public SignalProcessor {
+protected:
+  CircularFloatBuffer* a;
+  CircularFloatBuffer* b;
+  FloatArray buffer;
+  float delay = 0;
+public:
+  CrossFadingDelayProcessor(CircularFloatBuffer* a, CircularFloatBuffer* b, FloatArray buffer)
+    : a(a), b(b), buffer(buffer) {}  
+  float getDelay(){
+    return delay;
+  }
+  void setDelay(float samples){
+    delay = samples;
+  }
+  float process(float input){
+    b->setDelay(delay);
+    a->write(input);
+    b->write(input);
+    float sample = (a->read()+b->read())/2;
+    a->setDelay(delay);
+    return sample;
+  }
+  void process(FloatArray input, FloatArray output){
+    smooth(input, output, delay);
+  }
+  /**
+   * Delay ramping smoothly from the previous delay time to @param newDelay
+   */
+  void smooth(FloatArray input, FloatArray output, float newDelay){
+    ASSERT(buffer.getSize() >= input.getSize(), "buffer array too small");
+    ASSERT(output.getSize() >= input.getSize(), "output array too small");
+    size_t len = input.getSize();
+    b->setDelay(newDelay);
+    a->write(input.getData(), len);
+    b->write(input.getData(), len);
+    a->read(buffer.getData(), len);
+    buffer.scale(0, 1);
+    b->read(output.getData(), len);
+    output.scale(1, 0);
+    output.add(buffer);
+    a->setDelay(newDelay);
+    delay = newDelay;
+  }
+  static CrossFadingDelayProcessor* create(size_t delay_len, size_t buffer_len){
+    return new CrossFadingDelayProcessor(CircularFloatBuffer::create(delay_len),
+					 CircularFloatBuffer::create(delay_len),
+					 FloatArray::create(buffer_len));
+  }
+  static void destroy(CrossFadingDelayProcessor* obj){
+    CircularFloatBuffer::destroy(obj->a);
+    CircularFloatBuffer::destroy(obj->b);
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
 #endif // __DelayProcessor_h__

From 30bf6ca19a967374598265a3ae0b69ecaf7b32c3 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 May 2021 22:57:45 +0200
Subject: [PATCH 189/374] added AudioBuffer::copyFrom(), copyTo() ::multiply()

---
 Source/MemoryBuffer.hpp | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/Source/MemoryBuffer.hpp b/Source/MemoryBuffer.hpp
index c6e7b4b3..15e9f7c3 100644
--- a/Source/MemoryBuffer.hpp
+++ b/Source/MemoryBuffer.hpp
@@ -18,10 +18,6 @@ class MemoryBuffer : public AudioBuffer {
     ASSERT(channel < channels, "Invalid channel");
     return FloatArray(buffer+channel*size, size);
   }
-  void add(AudioBuffer& other) override {
-    for(size_t i=0; i
Date: Thu, 13 May 2021 22:58:09 +0200
Subject: [PATCH 190/374] writing history

---
 HISTORY.md | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index 887b6ff4..ace94105 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,6 +1,10 @@
 v21.2
 -----
 
+* Added DryWetProcessors
+* Added FeedbackProcessors
+* Added CrossFadingDelayProcessor
+* Added AudioBuffer::copyFrom(), copyTo(), multiply() and add()
 * Added Sample oscillator
 * Added Agnesi curve oscillator
 * Added MPE processor

From 738147acd392b106670edd78ad89404cbcfc8412 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 14 May 2021 10:17:47 +0200
Subject: [PATCH 191/374] added sustain

---
 LibSource/PolyphonicProcessor.h | 31 ++++++++++++++++++++++++++++---
 1 file changed, 28 insertions(+), 3 deletions(-)

diff --git a/LibSource/PolyphonicProcessor.h b/LibSource/PolyphonicProcessor.h
index 0754cab2..213b4df1 100644
--- a/LibSource/PolyphonicProcessor.h
+++ b/LibSource/PolyphonicProcessor.h
@@ -15,6 +15,7 @@ class PolyphonicMidiProcessor : public MidiProcessor {
   uint8_t notes[VOICES];
   uint16_t allocation[VOICES];
   uint16_t allocated;
+  bool dosustain = false;
 protected:
   void take(uint8_t ch, MidiMessage msg){
     release(ch);
@@ -24,7 +25,8 @@ class PolyphonicMidiProcessor : public MidiProcessor {
   }
   void release(uint8_t ch){
     allocation[ch] = ++allocated;
-    voice[ch]->gate(false);
+    if(!dosustain)
+      voice[ch]->gate(false);
   }
 public:
   PolyphonicMidiProcessor() : allocated(0) {}
@@ -62,10 +64,17 @@ class PolyphonicMidiProcessor : public MidiProcessor {
 	release(i);
   }
   void controlChange(MidiMessage msg){
-    if(msg.getControllerNumber() == MIDI_CC_MODULATION)
+    switch(msg.getControllerNumber()){
+    case MIDI_CC_MODULATION:
       modulate(msg);
-    else if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
+      break;
+    case MIDI_CC_SUSTAIN:
+      sustain(msg);
+      break;
+    case MIDI_ALL_NOTES_OFF:
       allNotesOff();
+      break;
+    }
   }
   void pitchbend(MidiMessage msg){
     for(int i=0; isetModulation(value);
   }
+  void sustain(MidiMessage msg){
+    setSustain(msg.getControllerValue() > 63);
+  }
   // todo: unison note on/off
   void allNotesOn() {
     for(int i=0; isetParameter(parameter_id, value);
   }
+  bool getSustain(){
+    return dosustain;
+  }
+  void setSustain(bool value){
+    if(!value && dosustain){
+      // gate off any sustained (but not active) voices
+      for(int i=0; igate(false);
+      }
+    }
+    dosustain = value;
+  }
 };
 
 template

From 7ffcfbdfdf6aae9056c7cedc09e5546aaa24c956 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 14 May 2021 10:17:58 +0200
Subject: [PATCH 192/374] added sustain

---
 LibSource/MidiStatus.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/LibSource/MidiStatus.h b/LibSource/MidiStatus.h
index a95d02b3..c62b7906 100644
--- a/LibSource/MidiStatus.h
+++ b/LibSource/MidiStatus.h
@@ -41,6 +41,9 @@ enum MidiControlChange {
   MIDI_CC_EXPRESSION    = 0x0b,
   MIDI_CC_EFFECT_CTRL_1 = 0x0c,
   MIDI_CC_EFFECT_CTRL_2 = 0x0d,
+  MIDI_CC_SUSTAIN       = 0x40,
+  MIDI_CC_PORTAMENTO    = 0x41,
+  MIDI_CC_SOSTENUTO     = 0x42,
   MIDI_ALL_SOUND_OFF    = 0x78,
   MIDI_RESET_ALL_CTRLS  = 0x79,
   MIDI_LOCAL_CONTROL    = 0x7a,

From eba3aecf38ae3792c6474fed4be19e91eab1ee24 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 14 May 2021 10:39:37 +0200
Subject: [PATCH 193/374] fix typos

---
 LibSource/DelayProcessor.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 8d1de3ea..46c00506 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -59,7 +59,7 @@ class FractionalDelayProcessor : public SignalProcessor {
     return buffer.interpolatedReadAt(buffer.getWriteIndex()-delay);
   }
   void process(FloatArray input, FloatArray output){
-    buffer.interpolatedDelay(input, output, delay);
+    buffer.interpolatedDelay(input, output, input.getSize(), delay);
   }
   /**
    * Delay ramping smoothly from the previous delay time to @param newDelay
@@ -94,7 +94,7 @@ class FastFractionalDelayProcessor : public SignalProcessor {
     delay = samples;
   }
   float process(float input){
-    buffer.setDelay(samples);
+    buffer.setDelay(delay);
     buffer.write(input);
     return buffer.read();
   }

From 4f5450c72005f256908ab7dc69484fc58f3ba69f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 14 May 2021 10:40:30 +0200
Subject: [PATCH 194/374] fix typos

---
 LibSource/CircularBuffer.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 8653b358..a01bebe9 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -198,7 +198,7 @@ class CircularBuffer {
    */
   void interpolatedDelay(T* in, T* out, size_t len, float beginDelay, float endDelay){
     write(in, len);
-    float pos = fmodf(writepos-delay+size, size);
+    float pos = fmodf(writepos-beginDelay+size, size);
     float incr = (len+endDelay-beginDelay)/len;
     while(len--){
       *out++ = interpolatedReadAt(pos);

From 566106c19be1929f8114e94a3e5cc836cc1ba858 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 18 May 2021 16:30:50 +0200
Subject: [PATCH 195/374] added softclip method

---
 LibSource/FloatArray.cpp | 22 ++++++++++++++++++++--
 LibSource/FloatArray.h   | 30 ++++++++++++++++++++++++++----
 2 files changed, 46 insertions(+), 6 deletions(-)

diff --git a/LibSource/FloatArray.cpp b/LibSource/FloatArray.cpp
index bcda5b1e..7114c76b 100644
--- a/LibSource/FloatArray.cpp
+++ b/LibSource/FloatArray.cpp
@@ -251,10 +251,15 @@ void FloatArray::add(FloatArray operand2){ //in-place
 
 void FloatArray::add(float scalar){
   for(size_t n=0; n= size, "Arrays size mismatch");
   /// @note When built for ARM Cortex-M processor series, this method uses the optimized CMSIS library
@@ -440,9 +445,22 @@ void FloatArray::scale(float from, float to, FloatArray destination){
   }  
 }
 
+/*
+ * Third-order static soft-clipping function.
+ * ref:  T. Araya and A. Suyama, “Sound effector capable of
+ * imparting plural sound effects like distortion and other
+ * effects,” US Patent 5,570,424, 29 Oct. 1996.
+ */
+void FloatArray::softclip(FloatArray destination){
+  for(size_t i=0; i {
    * @param max maximum value
   */
   void clip(float min, float max);
+
+  /**
+   * Applies a cubic soft-clip algorithm to all elements in the array which limits them to the range [-1, 1]
+   * @param[out] destination the destination array
+   */
+  void softclip(FloatArray destination);
+
+  /**
+   * Applies a cubic soft-clip algorithm to all elements in the array which limits them to the range [-1, 1]
+   * In-place version.
+   */
+  void softclip(){
+    softclip(*this);
+  }  
   
   /**
    * Element-wise sum between arrays.
@@ -212,12 +226,20 @@ class FloatArray : public SimpleArray {
   void add(FloatArray operand2); //in-place
   
   /**
-   * Array-scalar sum.
-   * Adds **scalar** to the values in the array.
-   * @param scalar value to be added to the array
+   * Array-scalar addition.
+   * Adds **scalar** to each value in the array and put the result in **destination**
+   * @param[in] scalar value to be added to the array
+   * @param[out] destination the destination array
+   */
+  void add(float scalar, FloatArray destination);
+
+  /**
+   * In-place array-scalar addition.
+   * Adds **scalar** to each value in the array
+   * @param[in] scalar value to be added to the array
   */
   void add(float scalar);
-  
+
   /**
    * Element-wise difference between arrays.
    * Sets each element in **destination** to the difference between the corresponding element of the array and **operand2**

From a37f6b17e1195da9a7572fa417abd656860ff7d8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 18 May 2021 16:31:01 +0200
Subject: [PATCH 196/374] added 'clamp()

---
 LibSource/basicmaths.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/LibSource/basicmaths.h b/LibSource/basicmaths.h
index 0b0edd40..c36b8507 100644
--- a/LibSource/basicmaths.h
+++ b/LibSource/basicmaths.h
@@ -46,6 +46,9 @@
 #ifndef abs
 #define abs(x) ((x)>0?(x):-(x))
 #endif
+#ifndef clamp
+#define clamp(x, lo, hi) ((x)>(hi)?(hi):((x)<(lo)?(lo):(x)))
+#endif
 
 #ifdef __cplusplus
  extern "C" {

From 707aedc81870803c75fac0fe4de64659265b7570 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 18 May 2021 16:32:01 +0200
Subject: [PATCH 197/374] updated history

---
 HISTORY.md | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index ace94105..d23b3b7e 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,6 +1,9 @@
 v21.2
 -----
 
+* Added FloatArray::softclip()
+* Added clamp(x, lo, hi) macro
+* Added TapTempo
 * Added DryWetProcessors
 * Added FeedbackProcessors
 * Added CrossFadingDelayProcessor

From 35c5bbb1393283ab0b6fdf302afd72a748ad7182 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 24 May 2021 16:50:50 +0200
Subject: [PATCH 198/374] prevent clashing definition of 'clamp'

---
 GenSource/genlib_ops.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/GenSource/genlib_ops.h b/GenSource/genlib_ops.h
index d890de2e..9b553146 100644
--- a/GenSource/genlib_ops.h
+++ b/GenSource/genlib_ops.h
@@ -22,6 +22,9 @@ OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "genlib_common.h"	// common to common code and any host code
 #include "genlib.h"			// this file is different for different "hosts"
+#ifdef clamp
+#undef clamp
+#endif
 
 //////////// genlib_ops.h ////////////
 

From 110c4fd3d0a111984bbc021dd7a9dd52b5688f7b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 24 May 2021 19:39:33 +0200
Subject: [PATCH 199/374] prevent clashing definition of 'clamp'

---
 LibSource/custom_dsp.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/LibSource/custom_dsp.h b/LibSource/custom_dsp.h
index e960f595..acf5547b 100644
--- a/LibSource/custom_dsp.h
+++ b/LibSource/custom_dsp.h
@@ -13,6 +13,7 @@
 #undef pow
 #undef log
 #undef rand
+#undef clamp
 
 /** PIs
 */

From ba96a92d7b0d5438f2c30dbd9506264bcbe52cfc Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 24 May 2021 19:40:37 +0200
Subject: [PATCH 200/374] prevent clashing definition of 'clamp'

---
 Maximilian/maximilian.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Maximilian/maximilian.h b/Maximilian/maximilian.h
index 4ef802d1..e6b02c31 100755
--- a/Maximilian/maximilian.h
+++ b/Maximilian/maximilian.h
@@ -41,6 +41,7 @@
 #undef max
 #undef min
 #undef abs
+#undef clamp
 // #include 
 
 // #include 

From 59f577fb87b213980ca259fc24511c1bc74f5931 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 25 May 2021 17:38:56 +0200
Subject: [PATCH 201/374] added scalar FloatBuffer::add()

---
 LibSource/AudioBuffer.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/LibSource/AudioBuffer.h b/LibSource/AudioBuffer.h
index 56528d15..65fc621a 100644
--- a/LibSource/AudioBuffer.h
+++ b/LibSource/AudioBuffer.h
@@ -14,6 +14,10 @@ class AudioBuffer {
     for(size_t i=0; i
Date: Tue, 25 May 2021 17:39:53 +0200
Subject: [PATCH 202/374] interpolated block read methods

---
 LibSource/CircularBuffer.h | 29 ++++++++++++++++++++++-------
 1 file changed, 22 insertions(+), 7 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index a01bebe9..58ce8685 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -179,25 +179,31 @@ class CircularBuffer {
     write(in, len);
     read(out, len);
   }
-  
+
   /**
-   * Write to buffer and read with a fractional delay
+   * Read with a fractional delay
    */
-  void interpolatedDelay(T* in, T* out, size_t len, float delay){
-    write(in, len);
+  void interpolatedDelay(T* out, size_t len, float delay){
     float pos = fmodf(writepos-delay+size, size);
     while(len--){
       *out++ = interpolatedReadAt(pos);
       pos += 1;
     }
+  }  
+  
+  /**
+   * Write to buffer and read with a fractional delay
+   */
+  void interpolatedDelay(T* in, T* out, size_t len, float delay){
+    write(in, len);
+    interpolatedDelay(out, len, delay);
   }
   
   /**
-   * Write to buffer and read with a delay that ramps up or down
+   * Read with a delay that ramps up or down
    * from @param beginDelay to @param endDelay
    */
-  void interpolatedDelay(T* in, T* out, size_t len, float beginDelay, float endDelay){
-    write(in, len);
+  void interpolatedDelay(T* out, size_t len, float beginDelay, float endDelay){
     float pos = fmodf(writepos-beginDelay+size, size);
     float incr = (len+endDelay-beginDelay)/len;
     while(len--){
@@ -205,6 +211,15 @@ class CircularBuffer {
       pos += incr;
     }
   }
+  
+  /**
+   * Write to buffer and read with a delay that ramps up or down
+   * from @param beginDelay to @param endDelay
+   */
+  void interpolatedDelay(T* in, T* out, size_t len, float beginDelay, float endDelay){
+    write(in, len);
+    interpolatedDelay(out, len, beginDelay, endDelay);
+  }
 
   size_t getReadCapacity(){
     return (writepos + size - readpos) % size;

From f9bc21ab23a9189eb6d4ab18799d5336563e44f1 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 25 May 2021 17:40:31 +0200
Subject: [PATCH 203/374] added sustain and SignalProcessor subclasses

---
 LibSource/MidiPolyphonicExpressionProcessor.h | 138 +++++++++++++-----
 1 file changed, 103 insertions(+), 35 deletions(-)

diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index 2b45835c..5ebc9f2e 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -26,26 +26,22 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
   float note_pitchbend_range = 48;
   float zone_pitchbend_range = 2;
   uint16_t rpn = 0;
+  bool dosustain = false;
 public:
   MidiPolyphonicExpressionProcessor() {}
   virtual ~MidiPolyphonicExpressionProcessor(){};
-  // class RpnMessage {
-  // uint8_t ch;
-  // uint16_t rpn;
-  // uint16_t value;
-  // };
-  // RpnMessage getMCM(){
-  // returns the MPE Configuration Message
-  // ch0 cc 100:06 101:00 06:VOICES
-  // }
   void noteOn(MidiMessage msg){
-    uint8_t ch = getNoteChannel(msg);
-    if(ch < VOICES)
-      voice[ch]->noteOn(msg);
+    if(isMasterChannel(msg)){ // Zone message
+      // todo: how should this voice be allocated?
+    }else{
+      uint8_t ch = getNoteChannel(msg);
+      if(ch < VOICES)
+	voice[ch]->noteOn(msg);
+    }
   }
   void noteOff(MidiMessage msg){
     uint8_t ch = getNoteChannel(msg);
-    if(ch < VOICES)
+    if(ch < VOICES && !dosustain)
       voice[ch]->noteOff(msg);
   }
   void setPitchBendRange(float range){
@@ -56,18 +52,20 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
     case MIDI_CC_MODULATION: // handle modulation same as CC74 for non-MPE compatibility
     /* case MIDI_CC_FREQUENCY_CUTOFF: { */
     case 74: {
-// All MPE receivers are required to respond to CC #74 at the Zone and Note level. If a device receives CC #74
-// on both a Master Channel and Member Channel, it must combine such data meaningfully and separately for
-// each sounding note.
-      uint8_t ch = getNoteChannel(msg);
+      // All MPE receivers are required to respond to CC #74 at the Zone and Note level. If a device receives CC #74
+      // on both a Master Channel and Member Channel, it must combine such data meaningfully and separately for
+      // each sounding note.
       float value = msg.getControllerValue()/127.0f;
-      if(ch < VOICES){
-	voice[ch]->setModulation(zone_modulation + value);
-	modulation[ch] = value;
-      }else if(isMasterChannel(msg)){ // Zone message
+      if(isMasterChannel(msg)){ // Zone message
 	for(int i=0; isetModulation(value + modulation[i]);
 	zone_modulation = value;
+      }else{
+	uint8_t ch = getNoteChannel(msg);
+	if(ch < VOICES){
+	  voice[ch]->setModulation(zone_modulation + value);
+	  modulation[ch] = value;
+	}
       }
       break;
     }
@@ -138,35 +136,38 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
   }
   void pitchbend(MidiMessage msg){
     // Pitch Bend is both a Zone Message and a Note Level Message. If an MPE synthesizer receives Pitch Bend (for example) on both a Master and a Member Channel, it must combine the data meaningfully. The same is true for Channel Pressure. 
-    uint8_t ch = getNoteChannel(msg);
     float value = note_pitchbend_range*msg.getPitchBend()/8192.0f;
-    if(ch < VOICES){ // Note level message
-      voice[ch]->setPitchBend(zone_pitchbend + value);
-    }else if(isMasterChannel(msg)){ // Zone message
+    if(isMasterChannel(msg)){ // Zone message
       float delta = value - zone_pitchbend;
       for(int i=0; isetPitchBend(voice[i]->getPitchBend()+delta);
       zone_pitchbend = value;
+    }else{
+      uint8_t ch = getNoteChannel(msg);
+      if(ch < VOICES){ // Note level message
+	voice[ch]->setPitchBend(zone_pitchbend + value);
+      }
     }
   }
   void channelPressure(MidiMessage msg){
-    uint8_t ch = getNoteChannel(msg);
+    // All MPE receivers are required to respond to Channel Pressure at the Note and Zone level.
+    // If a device receives Channel Pressure on both a Master Channel and Member Channel it must
+    // combine such data meaningfully and separately for each sounding note.
     float value = msg.getChannelPressure()/127.0f;
-    if(ch < VOICES){ // Note level message
-      voice[ch]->setPressure(zone_pressure + value);
-      pressure[ch] = value;
-    }else if(isMasterChannel(msg)){ // Zone message
-// All MPE receivers are required to respond to CC #74 at the Zone and Note level. If a device receives CC #74
-// on both a Master Channel and Member Channel, it must combine such data meaningfully and separately for
-// each sounding note.
+    if(isMasterChannel(msg)){ // Zone message
       for(int i=0; isetPressure(value + pressure[i]);
       zone_pressure = value;
+    }else{
+      uint8_t ch = getNoteChannel(msg);
+      if(ch < VOICES){ // Note level message
+	voice[ch]->setPressure(zone_pressure + value);
+	pressure[ch] = value;
+      }
     }
   }
   void polyKeyPressure(MidiMessage msg){
-    // Polyphonic Key Pressure may be used with notes on the Master Channel, but not on
-    // other Channels
+    // Polyphonic Key Pressure may be used with notes on the Master Channel, but not on other Channels
     if(isMasterChannel(msg)){
       uint8_t note = msg.getNote();
       for(int i=0; isetParameter(parameter_id, value);
   }
+  bool getSustain(){
+    return dosustain;
+  }
+  void setSustain(bool value){
+    if(!value && dosustain){
+      // gate off any sustained (but not active) voices
+      for(int i=0; igate(false);
+      }
+    }
+    dosustain = value;
+  }
 };
 
 
@@ -248,4 +262,58 @@ class MidiPolyphonicExpressionMultiSignalGenerator : public MidiPolyphonicExpres
   }  
 };
 
+template
+class MidiPolyphonicExpressionSignalProcessor : public MidiPolyphonicExpressionProcessor, public SignalProcessor {
+private:
+  FloatArray buffer;
+public:
+  MidiPolyphonicExpressionSignalProcessor(FloatArray buffer) : buffer(buffer) {}
+  virtual ~MidiPolyphonicExpressionSignalProcessor(){};
+  using MidiProcessor::process;
+  float process(float input){
+    float sample = 0;
+    for(int i=0; ivoice[i]->process(input);
+    return sample;
+  }
+  void process(FloatArray input, FloatArray output){
+    for(int i=0; ivoice[i]->process(input, buffer);
+      output.add(buffer);
+    }
+  }
+  static MidiPolyphonicExpressionSignalProcessor* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new MidiPolyphonicExpressionSignalProcessor(buffer);
+  }
+  static void destroy(MidiPolyphonicExpressionSignalProcessor* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+template
+class MidiPolyphonicExpressionMultiSignalProcessor : public MidiPolyphonicExpressionProcessor, public MultiSignalProcessor {
+private:
+  AudioBuffer* buffer;
+public:
+  MidiPolyphonicExpressionMultiSignalProcessor(AudioBuffer* buffer) : buffer(buffer) {}
+  virtual ~MidiPolyphonicExpressionMultiSignalProcessor(){};
+  using MidiProcessor::process;
+  void process(AudioBuffer& input, AudioBuffer& output){
+    for(int i=0; ivoice[i]->process(input, *buffer);
+      output.add(*buffer);
+    }
+  }  
+  static MidiPolyphonicExpressionMultiSignalProcessor* create(size_t channels, size_t blocksize){
+    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
+    return new MidiPolyphonicExpressionMultiSignalProcessor(buffer);
+  }
+  static void destroy(MidiPolyphonicExpressionMultiSignalProcessor* obj){
+    AudioBuffer::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
 #endif /* __MidiPolyphonicExpressionProcessor_h__ */

From b4b6efef01429e600e9348ed469b05f30cdb6698 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 25 May 2021 17:40:51 +0200
Subject: [PATCH 204/374] added SignalProcessor subclasses

---
 LibSource/PolyphonicProcessor.h | 130 ++++++++++++++++++++++++++++++++
 1 file changed, 130 insertions(+)

diff --git a/LibSource/PolyphonicProcessor.h b/LibSource/PolyphonicProcessor.h
index 213b4df1..bfd87d52 100644
--- a/LibSource/PolyphonicProcessor.h
+++ b/LibSource/PolyphonicProcessor.h
@@ -191,4 +191,134 @@ class PolyphonicMultiSignalGenerator : public PolyphonicMidiProcessor
+class PolyphonicSignalProcessor : public PolyphonicMidiProcessor, public SignalProcessor {
+private:
+  FloatArray buffer;
+public:
+  PolyphonicSignalProcessor(FloatArray buffer) : buffer(buffer) {}
+  virtual ~PolyphonicSignalProcessor(){};
+  using MidiProcessor::process;
+  float process(float input){
+    float sample = 0;
+    for(int i=0; ivoice[i]->process(input);
+    return sample;
+  }
+  void process(FloatArray input, FloatArray output){
+    for(int i=0; ivoice[i]->process(input, buffer);
+      output.add(buffer);
+    }
+  }
+  static PolyphonicSignalProcessor* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new PolyphonicSignalProcessor(buffer);
+  }
+  static void destroy(PolyphonicSignalProcessor* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+template
+class PolyphonicMultiSignalProcessor : public PolyphonicMidiProcessor, public MultiSignalProcessor {
+private:
+  AudioBuffer* buffer;
+public:
+  PolyphonicMultiSignalProcessor(AudioBuffer* buffer) : buffer(buffer) {}
+  virtual ~PolyphonicMultiSignalProcessor(){};
+  using MidiProcessor::process;
+  void process(AudioBuffer& input, AudioBuffer& output){
+    for(int i=0; ivoice[i]->process(input, *buffer);
+      output.add(*buffer);
+    }
+  }  
+  static PolyphonicMultiSignalProcessor* create(size_t channels, size_t blocksize){
+    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
+    return new PolyphonicMultiSignalProcessor(buffer);
+  }
+  static void destroy(PolyphonicMultiSignalProcessor* obj){
+    AudioBuffer::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+template
+class PolyphonicProcessor : public PolyphonicMidiProcessor,
+			    public SignalGenerator, public SignalProcessor {
+private:
+  FloatArray buffer;
+public:
+  PolyphonicProcessor(FloatArray buffer) : buffer(buffer) {}
+  virtual ~PolyphonicProcessor(){};
+  float generate(){
+    float sample = 0;
+    for(int i=0; ivoice[i]->generate();
+    return sample;
+  }
+  void generate(FloatArray output){
+    this->voice[0]->generate(output);
+    for(int i=1; ivoice[i]->generate(buffer);
+      output.add(buffer);
+    }
+  }
+  using MidiProcessor::process;
+  float process(float input){
+    float sample = 0;
+    for(int i=0; ivoice[i]->process(input);
+    return sample;
+  }
+  void process(FloatArray input, FloatArray output){
+    for(int i=0; ivoice[i]->process(input, buffer);
+      output.add(buffer);
+    }
+  }
+  static PolyphonicProcessor* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new PolyphonicProcessor(buffer);
+  }
+  static void destroy(PolyphonicProcessor* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+template
+class PolyphonicMultiProcessor : public PolyphonicMidiProcessor,
+				 public MultiSignalGenerator, public MultiSignalProcessor {
+private:
+  AudioBuffer* buffer;
+public:
+  PolyphonicMultiProcessor(AudioBuffer* buffer) : buffer(buffer) {}
+  virtual ~PolyphonicMultiProcessor(){};
+  static PolyphonicMultiProcessor* create(size_t channels, size_t blocksize){
+    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
+    return new PolyphonicMultiProcessor(buffer);
+  }
+  static void destroy(PolyphonicMultiProcessor* obj){
+    AudioBuffer::destroy(obj->buffer);
+    delete obj;
+  }
+  void generate(AudioBuffer& output){
+    this->voice[0]->generate(output);
+    for(int i=1; ivoice[i]->generate(*buffer);
+      output.add(*buffer);
+    }
+  }  
+  using MidiProcessor::process;
+  void process(AudioBuffer& input, AudioBuffer& output){
+    for(int i=0; ivoice[i]->process(input, *buffer);
+      output.add(*buffer);
+    }
+  }  
+};
+
 #endif /* __PolyphonicProcessor_h__ */

From f574177329fc6575832a92e6ba5cebce50a5cc2d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 25 May 2021 17:41:27 +0200
Subject: [PATCH 205/374] random phase in GaussianNoiseGennerator

---
 LibSource/NoiseGenerator.h | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/LibSource/NoiseGenerator.h b/LibSource/NoiseGenerator.h
index 893c833f..561415f1 100644
--- a/LibSource/NoiseGenerator.h
+++ b/LibSource/NoiseGenerator.h
@@ -24,10 +24,10 @@ class WhiteNoiseGenerator : public SignalGenerator {
     // https://en.wikipedia.org/wiki/Single-precision_floating-point_format
     return x.f;
 #else
-    return (rand()/(float)RAND_MAX) * 2 - 1;
+    return randf()*2 - 1;
 #endif
   }
-
+  using SignalGenerator::generate;
   static WhiteNoiseGenerator* create(){
     return new WhiteNoiseGenerator();
   }
@@ -86,6 +86,7 @@ class PinkNoiseGenerator : public WhiteNoiseGenerator {
     m_count++; 
     return (WhiteNoiseGenerator::generate() + m_pink)*0.125f; 
   }
+  using SignalGenerator::generate;
   static PinkNoiseGenerator* create(){
     return new PinkNoiseGenerator();
   }
@@ -109,10 +110,8 @@ class BrownNoiseGenerator : public WhiteNoiseGenerator {
     m_brown = 0.0f;
   }
   // returns brown noise random number in the range -0.5 to 0.5
-  //
   float generate() {
-    while (true)
-    {
+    while (true){
       float  r = WhiteNoiseGenerator::generate();
       m_brown += r;
       if (m_brown<-8.0f || m_brown>8.0f) 
@@ -122,6 +121,7 @@ class BrownNoiseGenerator : public WhiteNoiseGenerator {
     }
     return m_brown*0.0625f;
   }  
+  using SignalGenerator::generate;
   static BrownNoiseGenerator* create(){
     return new BrownNoiseGenerator();
   }
@@ -136,12 +136,10 @@ class GaussianNoiseGenerator : public SignalGenerator {
   int phase;
 public:
   GaussianNoiseGenerator(FloatArray ns) : noise(ns), phase(0) {}
-
   static void destroy(GaussianNoiseGenerator* gn){
     FloatArray::destroy(gn->noise);
     delete gn;
   }
-
   static GaussianNoiseGenerator* create(int size){
     GaussianNoiseGenerator* gn = new GaussianNoiseGenerator(FloatArray::create(size));
     // generate white gaussian noise:
@@ -171,10 +169,10 @@ class GaussianNoiseGenerator : public SignalGenerator {
 
   float generate(){
     float sample = noise[phase];
-    if(++phase == noise.getSize())
-      phase = 0;
+    phase = randf()*noise.getSize();
     return sample;
   }
+  using SignalGenerator::generate;
 };
 
 

From 75d8d6da2cd3131f33a97c293aad010786ebe11d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 25 May 2021 17:43:25 +0200
Subject: [PATCH 206/374] refactored oscillator fm

---
 LibSource/AgnesiOscillator.h      |  2 +-
 LibSource/Oscillator.h            | 12 ++++
 LibSource/PolyBlepOscillator.cpp  |  5 +-
 LibSource/RampOscillator.h        | 97 +++++++++++++++++++++++++++++--
 LibSource/SampleOscillator.h      |  3 +
 LibSource/SineOscillator.h        | 10 +++-
 LibSource/VosimOscillator.h       | 33 ++++++++---
 LibSource/WavetableOscillator.cpp | 11 +++-
 LibSource/WavetableOscillator.h   |  1 +
 9 files changed, 156 insertions(+), 18 deletions(-)

diff --git a/LibSource/AgnesiOscillator.h b/LibSource/AgnesiOscillator.h
index 1a7a62e0..88c7d34b 100644
--- a/LibSource/AgnesiOscillator.h
+++ b/LibSource/AgnesiOscillator.h
@@ -51,7 +51,7 @@ class AgnesiOscillator : public Oscillator {
   }
   float generate(float fm){
     // modulate coefficient 'a' instead of rate
-    float y = agnesi(x, a+fm);
+    float y = agnesi(x, a*(1+fm));
     x += incr;
     if(x > N)
       x -= 2*N;
diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index 8cf35ed3..9258d991 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -62,6 +62,18 @@ class Oscillator : public SignalGenerator {
   void getSamples(FloatArray output, FloatArray fm){
     generate(output, fm);
   }
+protected:
+  static float polyblep(float t, float dt){
+    if(t < dt){ // 0 <= t < 1
+      t /= dt;
+      return t+t - t*t - 1;
+    }else if(t > 1.0 - dt){ // -1 < t < 0      
+      t = (t - 1.0) / dt;
+      return t*t + t+t + 1;
+    }
+    // 0 otherwise
+    return 0;
+  }
 };
 
 #endif /* __Oscillator_h */
diff --git a/LibSource/PolyBlepOscillator.cpp b/LibSource/PolyBlepOscillator.cpp
index 5420f297..8756e296 100644
--- a/LibSource/PolyBlepOscillator.cpp
+++ b/LibSource/PolyBlepOscillator.cpp
@@ -65,7 +65,7 @@ float PolyBlepOscillator::generate(){
 
 float PolyBlepOscillator::generate(float fm){
   float sample;
-  osc.Render(nfreq+fm, pw, shape, &sample, 1);
+  osc.Render(nfreq*(1+fm), pw, shape, &sample, 1);
   return sample;
 }
 
@@ -74,7 +74,8 @@ void PolyBlepOscillator::generate(FloatArray output){
 }
 
 void PolyBlepOscillator::generate(FloatArray output, FloatArray fm){
-  fm.add(nfreq); // add our base frequency
+  fm.multiply(nfreq); // scale by base frequency
+  fm.add(nfreq); // add base frequency : freq = nfreq + nfreq*fm
   osc.Render(fm, pw, shape, output, output.getSize());
 }
 
diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 6ac26c7a..7fe14baf 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -3,16 +3,20 @@
 
 #include "Oscillator.h"
 
+enum Waveshape { RAMP_SHAPE, POLYBLEP_RAMP_SHAPE, SQUARE_SHAPE, POLYBLEP_SQUARE_SHAPE, TRIANGLE_SHAPE, POLYBLEP_TRIANGLE_SHAPE };
+
 /**
  * Ramp oscillator generates rising output values from -1 to 1.
  */
+template
 class RampOscillator : public Oscillator {
-private:
+protected:
   float mul;
   float phase;
   float incr;
+  float getSample();
 public:
-  RampOscillator(float sr=48000) : phase(0.0f), incr(0.0f) {
+  RampOscillator(float sr) : phase(0.0f), incr(0.0f) {
   }
   RampOscillator(float freq, float sr) : phase(0.0f){
     setSampleRate(sr);
@@ -41,7 +45,7 @@ class RampOscillator : public Oscillator {
     return phase*M_PI+M_PI;
   }
   float generate(){
-    float sample = phase;
+    float sample = getSample();
     phase += incr;
     if(phase >= 1.0f)
       phase -= 2.0f;
@@ -54,24 +58,32 @@ class RampOscillator : public Oscillator {
       float remain = 1.0f - phase;
       size_t steps = (size_t)(remain/incr);
       for(size_t i=0; i= 1.0f)
       phase -= 2.0f;
     return sample;
   }  
+  void generate(FloatArray output, FloatArray fm){
+    for(size_t i=0; i= 1)
+	phase -= 2;
+    }
+  }
   static RampOscillator* create(float sr){
     return new RampOscillator(sr);
   }
@@ -83,4 +95,77 @@ class RampOscillator : public Oscillator {
   }
 };
 
+template<>
+float RampOscillator::getSample(){
+  return phase;
+}
+
+template<>
+float RampOscillator::getSample(){
+  return phase - polyblep(incr, phase);
+}
+typedef RampOscillator AntialisedRampOscillator;
+
+template<>
+float RampOscillator::getSample(){
+  return -2 * (fabsf(phase) - 0.5);
+}
+typedef RampOscillator TriangleOscillator;
+
+template<>
+float RampOscillator::getSample(){
+  return phase < 0 ? 1 : -1;
+}
+typedef RampOscillator SquareOscillator;
+
+template<>
+float RampOscillator::getSample(){
+  float sample = phase < 0 ? 1 : -1;
+  sample += polyblep(incr, phase);
+  sample -= polyblep(incr, fmodf(phase + 1, 2));
+  return sample;
+}
+typedef RampOscillator AntialiasedSquareOscillator;
+
+// template
+// class SquareOscillator : public RampOscillator {
+// protected:
+//   float pw = 0;
+// public:
+//   /**
+//    * set pulse width to a value between 0 and 1
+//    */
+//   void setPulseWidth(float value){
+//     pw = value*2 - 1; // scale to [-1,1]
+//   }
+// };
+
+// template<>
+// float SquareOscillator::getSample(){
+//   return phase < pw ? 1 : -1;
+// }
+
+// template<>
+// float SquareOscillator::getSample(){
+//   float sample = phase < pw ? 1 : -1;
+//   sample += polyblep(incr, phase);
+//   sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
+//   return sample;
+// }
+// typedef SquareOscillator AntialiasedSquareOscillator;
+
+// class AntialiasedTriangleOscillator : public AntialiasedSquareOscillator {
+// protected:
+//   float previousSample = 0;
+// };
+
+// float AntialiasedTriangleOscillator::getSample(){
+//   float sample = AntialiasedSquareOscillator::getSample();
+//     // Leaky integrator: y[n] = A * x[n] + (1 - A) * y[n-1] = A * (x[n] - y[n-1]) + y[n-1]
+//     float lambda = incr*0.5;
+//     sample = lambda * (sample - previousSample) + previousSample;
+//     previousSample = sample;
+//     return sample;
+// }
+
 #endif /* __RampOscillator_h */
diff --git a/LibSource/SampleOscillator.h b/LibSource/SampleOscillator.h
index b5eecb69..ecc508ed 100644
--- a/LibSource/SampleOscillator.h
+++ b/LibSource/SampleOscillator.h
@@ -127,6 +127,9 @@ class SampleOscillator : public Oscillator {
       pos += rate;
     }
   }
+  void generate(FloatArray output, FloatArray fm){
+    return generate(output);
+  }
   size_t findZeroCrossing(size_t index) {
     size_t len = buffer.getSize()-1;
     size_t i = min(index, len);
diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h
index cf6dc008..b202b687 100644
--- a/LibSource/SineOscillator.h
+++ b/LibSource/SineOscillator.h
@@ -53,11 +53,19 @@ class SineOscillator : public Oscillator {
   }
   float generate(float fm){
     float sample = sinf(phase);
-    phase += incr + fm;
+    phase += incr * (1 + fm);
     if(phase >= 2*M_PI)
       phase -= 2*M_PI;
     return sample;
   }
+  void generate(FloatArray output, FloatArray fm){
+    for(size_t i=0; i= 2*M_PI)
+	phase -= 2*M_PI;
+    }
+  }
   static SineOscillator* create(float sr){
     return new SineOscillator(sr);
   }
diff --git a/LibSource/VosimOscillator.h b/LibSource/VosimOscillator.h
index 1934fea4..8fcd3759 100644
--- a/LibSource/VosimOscillator.h
+++ b/LibSource/VosimOscillator.h
@@ -46,26 +46,45 @@ class VosimOscillator : public Oscillator {
   }
   using Oscillator::generate;
   float generate(float fm){
-    phase -= incr+fm;
+    float s1 = formant1->generate();
+    float s2 = formant2->generate();
+    float sample = (s1*s1 + s2*s2)*phase - 1;
+    float dt = incr * (1 + fm);
+    // sample = 2*phase-1;
+    // sample -= polyblep(phase, dt);
+    // polyblep works on sawtooth but doesn't help vosim
+    phase -= dt;
     if(phase <= 0.0){
       phase += 1.0;
+#if 0
+      float ph = getPhase();
+      formant1->setPhase(ph);
+      formant2->setPhase(ph);
+#else
       formant1->reset();
       formant2->reset();
+#endif
     }
-    float s1 = formant1->generate();
-    float s2 = formant2->generate();
-    return (s1*s1 + s2*s2)*phase*0.5;
+    return sample;
   }
   float generate(){
+    float s1 = formant1->generate();
+    float s2 = formant2->generate();
+    float sample = (s1*s1 + s2*s2)*phase - 1;
+    // sample -= polyblep(1-phase, incr);
     phase -= incr;
     if(phase <= 0.0){
       phase += 1.0;
+#if 0
+      float ph = getPhase();
+      formant1->setPhase(ph);
+      formant2->setPhase(ph);
+#else
       formant1->reset();
       formant2->reset();
+#endif
     }
-    float s1 = formant1->generate();
-    float s2 = formant2->generate();
-    return (s1*s1 + s2*s2)*phase*0.5;
+    return sample;
   }
   static VosimOscillator* create(float sr){
     SineOscillator* f1 = SineOscillator::create(sr);
diff --git a/LibSource/WavetableOscillator.cpp b/LibSource/WavetableOscillator.cpp
index 02a6361c..623474e2 100644
--- a/LibSource/WavetableOscillator.cpp
+++ b/LibSource/WavetableOscillator.cpp
@@ -49,7 +49,7 @@ float WavetableOscillator::generate(){
 
 float WavetableOscillator::generate(float fm){
   float s = getSample(acc);
-  acc += inc + fm;
+  acc += inc * (1 + fm);
   if(acc > 1.0f)
     acc -= 1.0f;
   return s;
@@ -60,6 +60,15 @@ void WavetableOscillator::generate(FloatArray samples){
     samples[i] = generate();
 }
 
+void WavetableOscillator::generate(FloatArray output, FloatArray fm){
+  for(size_t i=0; i 1.0f)
+      acc -= 1.0f;
+  }
+}
+
 WavetableOscillator* WavetableOscillator::create(float sr, size_t size) {
   FloatArray wave = FloatArray::create(size);
   for(size_t i=0; i
Date: Tue, 25 May 2021 17:43:52 +0200
Subject: [PATCH 207/374] changed divs to muls

---
 LibSource/DelayProcessor.h | 2 +-
 LibSource/basicmaths.c     | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 46c00506..e8cc418b 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -140,7 +140,7 @@ class CrossFadingDelayProcessor : public SignalProcessor {
     b->setDelay(delay);
     a->write(input);
     b->write(input);
-    float sample = (a->read()+b->read())/2;
+    float sample = (a->read()+b->read())*0.5;
     a->setDelay(delay);
     return sample;
   }
diff --git a/LibSource/basicmaths.c b/LibSource/basicmaths.c
index d5a23ca5..7600f2ae 100644
--- a/LibSource/basicmaths.c
+++ b/LibSource/basicmaths.c
@@ -47,7 +47,7 @@ uint32_t arm_rand32(){
 }
 
 float randf(){
-  return arm_rand32()/4294967296.0f;
+  return arm_rand32()*(1/4294967296.0f);
 }
 
 float arm_sqrtf(float in){

From 82ee2853a19259a972bf456a0bd323ecf62d03f0 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 26 May 2021 10:22:22 +0200
Subject: [PATCH 208/374] add trailing > to metadata output parameter names

---
 GenSource/GenPatch.hpp | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/GenSource/GenPatch.hpp b/GenSource/GenPatch.hpp
index 82a8e3e2..c49ca53d 100644
--- a/GenSource/GenPatch.hpp
+++ b/GenSource/GenPatch.hpp
@@ -231,12 +231,22 @@ class GenPatch : public Patch {
     for(int i=0; i at end of name
+	char name[len+2];
+	strcpy(name, ctrl.name);
+	name[len] = '>';
+	name[len+1] = '\0';
+	registerParameter(pid, name);
+      }else{
+	registerParameter(pid, ctrl.name);
+      }
     }
     for(int i=0; i
Date: Wed, 26 May 2021 12:28:14 +0200
Subject: [PATCH 209/374] refactored voice allocators/processors

---
 LibSource/MidiPolyphonicExpressionProcessor.h | 160 ++----------
 LibSource/MonophonicProcessor.h               |  70 +-----
 LibSource/PolyphonicProcessor.h               | 231 +-----------------
 LibSource/VoiceAllocator.h                    | 158 ++++++++++++
 4 files changed, 203 insertions(+), 416 deletions(-)
 create mode 100644 LibSource/VoiceAllocator.h

diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index 5ebc9f2e..8803d858 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -1,19 +1,23 @@
 #ifndef __MidiPolyphonicExpressionProcessor_h__
 #define __MidiPolyphonicExpressionProcessor_h__
 
+#include "MidiProcessor.h"
+#include "SignalGenerator.h"
+#include "VoiceAllocator.h"
+
 /**
- * Implementation of MPE, MidiPolyphonicExpression, message processing.
+ * Implementation of MPE (MIDI Polyphonic Expression) message processing.
  * We are controlling an AbstractSynth with:
  * X: Pitch Bend: setFrequency()
  * Y: CC74 or CC1 : setModulation()
  * Z: Channel Pressure : setPressure()
  */
 template
-class MidiPolyphonicExpressionProcessor : public MidiProcessor {
+class MidiPolyphonicExpressionProcessor : public VoiceAllocator {
 // routes five per-note messages (Note On, Note Off, Pitch Bend, CC74 and Channel Pressure/Aftertouch)
 // to the voice assigned to each channel
+  typedef VoiceAllocator Allocator;
 protected:
-  SynthVoice* voice[VOICES];
   uint8_t notes[VOICES];
   float pressure[VOICES];
   float modulation[VOICES];
@@ -36,13 +40,13 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
     }else{
       uint8_t ch = getNoteChannel(msg);
       if(ch < VOICES)
-	voice[ch]->noteOn(msg);
+	Allocator::voice[ch]->noteOn(msg);
     }
   }
   void noteOff(MidiMessage msg){
     uint8_t ch = getNoteChannel(msg);
     if(ch < VOICES && !dosustain)
-      voice[ch]->noteOff(msg);
+      Allocator::voice[ch]->noteOff(msg);
   }
   void setPitchBendRange(float range){
     zone_pitchbend_range = range;
@@ -58,12 +62,12 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
       float value = msg.getControllerValue()/127.0f;
       if(isMasterChannel(msg)){ // Zone message
 	for(int i=0; isetModulation(value + modulation[i]);
+	  Allocator::voice[i]->setModulation(value + modulation[i]);
 	zone_modulation = value;
       }else{
 	uint8_t ch = getNoteChannel(msg);
 	if(ch < VOICES){
-	  voice[ch]->setModulation(zone_modulation + value);
+	  Allocator::voice[ch]->setModulation(zone_modulation + value);
 	  modulation[ch] = value;
 	}
       }
@@ -117,7 +121,7 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
       }
       break;
     case MIDI_ALL_NOTES_OFF:
-      allNotesOff();
+      Allocator::allNotesOff();
       break;
     }
   }
@@ -140,12 +144,12 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
     if(isMasterChannel(msg)){ // Zone message
       float delta = value - zone_pitchbend;
       for(int i=0; isetPitchBend(voice[i]->getPitchBend()+delta);
+	Allocator::voice[i]->setPitchBend(Allocator::voice[i]->getPitchBend()+delta);
       zone_pitchbend = value;
     }else{
       uint8_t ch = getNoteChannel(msg);
       if(ch < VOICES){ // Note level message
-	voice[ch]->setPitchBend(zone_pitchbend + value);
+	Allocator::voice[ch]->setPitchBend(zone_pitchbend + value);
       }
     }
   }
@@ -156,12 +160,12 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
     float value = msg.getChannelPressure()/127.0f;
     if(isMasterChannel(msg)){ // Zone message
       for(int i=0; isetPressure(value + pressure[i]);
+	Allocator::voice[i]->setPressure(value + pressure[i]);
       zone_pressure = value;
     }else{
       uint8_t ch = getNoteChannel(msg);
       if(ch < VOICES){ // Note level message
-	voice[ch]->setPressure(zone_pressure + value);
+	Allocator::voice[ch]->setPressure(zone_pressure + value);
 	pressure[ch] = value;
       }
     }
@@ -171,27 +175,10 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
     if(isMasterChannel(msg)){
       uint8_t note = msg.getNote();
       for(int i=0; igetNote() == note)
-	  voice[i]->setPressure(msg.getPolyKeyPressure()/127.0f);
+	if(Allocator::voice[i]->getNote() == note)
+	  Allocator::voice[i]->setPressure(msg.getPolyKeyPressure()/127.0f);
     }
   }
-  void allNotesOff() {
-    for(int i=0; igate(false);      
-  }
-  void setVoice(size_t index, SynthVoice* obj){
-    if(index < VOICES)
-      voice[index] = obj;
-  }
-  SynthVoice* getVoice(size_t index){
-    if(index < VOICES)
-      return voice[index];
-    return NULL;
-  }
-  void setParameter(uint8_t parameter_id, float value){
-    for(int i=0; isetParameter(parameter_id, value);
-  }
   bool getSustain(){
     return dosustain;
   }
@@ -200,120 +187,11 @@ class MidiPolyphonicExpressionProcessor : public MidiProcessor {
       // gate off any sustained (but not active) voices
       for(int i=0; igate(false);
+	Allocator::voice[i]->gate(false);
       }
     }
     dosustain = value;
   }
 };
 
-
-template
-class MidiPolyphonicExpressionSignalGenerator : public MidiPolyphonicExpressionProcessor, public SignalGenerator {
-private:
-  FloatArray buffer;
-public:
-  MidiPolyphonicExpressionSignalGenerator(FloatArray buffer) : buffer(buffer) {}
-  virtual ~MidiPolyphonicExpressionSignalGenerator(){};
-  float generate(){
-    float sample = this->voice[0]->generate();
-    for(int i=1; ivoice[i]->generate();
-    return sample;
-  }
-  void generate(FloatArray output){
-    this->voice[0]->generate(output);
-    for(int i=1; ivoice[i]->generate(buffer);
-      output.add(buffer);
-    }
-  }
-  static MidiPolyphonicExpressionSignalGenerator* create(size_t blocksize){
-    FloatArray buffer = FloatArray::create(blocksize);    
-    return new MidiPolyphonicExpressionSignalGenerator(buffer);
-  }
-  static void destroy(MidiPolyphonicExpressionSignalGenerator* obj){
-    FloatArray::destroy(obj->buffer);
-    delete obj;
-  }
-};
-
-template
-class MidiPolyphonicExpressionMultiSignalGenerator : public MidiPolyphonicExpressionProcessor, public MultiSignalGenerator {
-private:
-  AudioBuffer* buffer;
-public:
-  MidiPolyphonicExpressionMultiSignalGenerator(AudioBuffer* buffer) : buffer(buffer) {}
-  virtual ~MidiPolyphonicExpressionMultiSignalGenerator(){};
-  static MidiPolyphonicExpressionMultiSignalGenerator* create(size_t channels, size_t blocksize){
-    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
-    return new MidiPolyphonicExpressionMultiSignalGenerator(buffer);
-  }
-  static void destroy(MidiPolyphonicExpressionMultiSignalGenerator* obj){
-    AudioBuffer::destroy(obj->buffer);
-    delete obj;
-  }
-  void generate(AudioBuffer& output){
-    this->voice[0]->generate(output);
-    for(int i=1; ivoice[i]->generate(*buffer);
-      output.add(*buffer);
-    }
-  }  
-};
-
-template
-class MidiPolyphonicExpressionSignalProcessor : public MidiPolyphonicExpressionProcessor, public SignalProcessor {
-private:
-  FloatArray buffer;
-public:
-  MidiPolyphonicExpressionSignalProcessor(FloatArray buffer) : buffer(buffer) {}
-  virtual ~MidiPolyphonicExpressionSignalProcessor(){};
-  using MidiProcessor::process;
-  float process(float input){
-    float sample = 0;
-    for(int i=0; ivoice[i]->process(input);
-    return sample;
-  }
-  void process(FloatArray input, FloatArray output){
-    for(int i=0; ivoice[i]->process(input, buffer);
-      output.add(buffer);
-    }
-  }
-  static MidiPolyphonicExpressionSignalProcessor* create(size_t blocksize){
-    FloatArray buffer = FloatArray::create(blocksize);    
-    return new MidiPolyphonicExpressionSignalProcessor(buffer);
-  }
-  static void destroy(MidiPolyphonicExpressionSignalProcessor* obj){
-    FloatArray::destroy(obj->buffer);
-    delete obj;
-  }
-};
-
-template
-class MidiPolyphonicExpressionMultiSignalProcessor : public MidiPolyphonicExpressionProcessor, public MultiSignalProcessor {
-private:
-  AudioBuffer* buffer;
-public:
-  MidiPolyphonicExpressionMultiSignalProcessor(AudioBuffer* buffer) : buffer(buffer) {}
-  virtual ~MidiPolyphonicExpressionMultiSignalProcessor(){};
-  using MidiProcessor::process;
-  void process(AudioBuffer& input, AudioBuffer& output){
-    for(int i=0; ivoice[i]->process(input, *buffer);
-      output.add(*buffer);
-    }
-  }  
-  static MidiPolyphonicExpressionMultiSignalProcessor* create(size_t channels, size_t blocksize){
-    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
-    return new MidiPolyphonicExpressionMultiSignalProcessor(buffer);
-  }
-  static void destroy(MidiPolyphonicExpressionMultiSignalProcessor* obj){
-    AudioBuffer::destroy(obj->buffer);
-    delete obj;
-  }
-};
-
 #endif /* __MidiPolyphonicExpressionProcessor_h__ */
diff --git a/LibSource/MonophonicProcessor.h b/LibSource/MonophonicProcessor.h
index a725f465..9711c1fb 100644
--- a/LibSource/MonophonicProcessor.h
+++ b/LibSource/MonophonicProcessor.h
@@ -1,19 +1,22 @@
 #ifndef __MonophonicProcessor_h__
 #define __MonophonicProcessor_h__
 
+#include "MidiProcessor.h"
+#include "SignalGenerator.h"
+#include "VoiceAllocator.h"
+
 template
-class MonophonicMidiProcessor : public MidiProcessor {
+class MonophonicProcessor : public VoiceAllocator {
+  typedef VoiceAllocator Allocator;
 protected:
-  SynthVoice* voice;
   uint8_t notes[16];
   uint8_t lastNote = 0;
 public:
-  MonophonicMidiProcessor() : voice(NULL) {}
-  MonophonicMidiProcessor(SynthVoice* voice) : voice(voice) {}
+  MonophonicProcessor() {}
   virtual void noteOn(MidiMessage msg){
     if(lastNote < 16)
       notes[lastNote++] = msg.getNote();
-    voice->noteOn(msg);
+    Allocator::voice[0]->noteOn(msg);
   }
   virtual void noteOff(MidiMessage msg){
     uint8_t note = msg.getNote();
@@ -28,68 +31,21 @@ class MonophonicMidiProcessor : public MidiProcessor {
 	notes[i] = notes[i + 1];
 	i++;
       }
-      voice->setNote(notes[lastNote - 1]);
+      Allocator::voice[0]->setNote(notes[lastNote - 1]);
     }else{
-      voice->gate(false);
+      Allocator::voice[0]->gate(false);
       lastNote = 0;
     }
   }
   void allNotesOff() {
-    voice->gate(false);
+    Allocator::voice[0]->gate(false);
     lastNote = 0;
   }
   void controlChange(MidiMessage msg){
-    voice->controlChange(msg);
+    Allocator::voice[0]->controlChange(msg);
   }
   void pitchbend(MidiMessage msg){
-    voice->pitchbend(msg);
-  }
-  void setVoice(size_t index, SynthVoice* obj){
-    if(index == 0)
-      voice = obj;
-  }
-  SynthVoice* getVoice(size_t index){
-    if(index == 0)
-      return voice;
-    return NULL;
-  }
-  void setParameter(uint8_t parameter_id, float value){
-    voice->setParameter(parameter_id, value);
-  }
-};
-
-template
-class MonophonicSignalGenerator : public MonophonicMidiProcessor, public SignalGenerator {
-public:
-  MonophonicSignalGenerator() {}
-  MonophonicSignalGenerator(SynthVoice* voice) : MonophonicMidiProcessor(voice) {}
-  float generate(){
-    return this->voice->generate();
-  }
-  void generate(FloatArray output){
-    this->voice->generate(output);
-  }
-  static MonophonicSignalGenerator* create(size_t blocksize){
-    return new MonophonicSignalGenerator();
-  }
-  static void destroy(MonophonicSignalGenerator* obj){
-    delete obj;
-  }
-};
-
-template
-class MonophonicMultiSignalGenerator : public MonophonicMidiProcessor, public MultiSignalGenerator {
-public:
-  MonophonicMultiSignalGenerator() {}
-  MonophonicMultiSignalGenerator(SynthVoice* voice) : MonophonicMidiProcessor(voice) {}
-  void generate(AudioBuffer& output){
-    this->voice->generate(output);
-  }  
-  static MonophonicMultiSignalGenerator* create(size_t channels, size_t blocksize){
-    return new MonophonicMultiSignalGenerator();
-  }
-  static void destroy(MonophonicMultiSignalGenerator* obj){
-    delete obj;
+    Allocator::voice[0]->pitchbend(msg);
   }
 };
 
diff --git a/LibSource/PolyphonicProcessor.h b/LibSource/PolyphonicProcessor.h
index bfd87d52..2c3327a6 100644
--- a/LibSource/PolyphonicProcessor.h
+++ b/LibSource/PolyphonicProcessor.h
@@ -3,15 +3,16 @@
 
 #include "MidiProcessor.h"
 #include "SignalGenerator.h"
+#include "VoiceAllocator.h"
 
 /**
  * Supports both Polyphonic Key Pressure and Channel Pressure Aftertouch.
  */
 template
-class PolyphonicMidiProcessor : public MidiProcessor {
+class PolyphonicProcessor : public VoiceAllocator {
+  typedef VoiceAllocator Allocator;
 protected:
   static const uint16_t TAKEN = 0xffff;
-  SynthVoice* voice[VOICES];
   uint8_t notes[VOICES];
   uint16_t allocation[VOICES];
   uint16_t allocated;
@@ -21,16 +22,16 @@ class PolyphonicMidiProcessor : public MidiProcessor {
     release(ch);
     notes[ch] = msg.getNote();
     allocation[ch] = TAKEN;
-    voice[ch]->noteOn(msg);
+    Allocator::voice[ch]->noteOn(msg);
   }
   void release(uint8_t ch){
     allocation[ch] = ++allocated;
     if(!dosustain)
-      voice[ch]->gate(false);
+      Allocator::voice[ch]->gate(false);
   }
 public:
-  PolyphonicMidiProcessor() : allocated(0) {}
-  virtual ~PolyphonicMidiProcessor(){};
+  PolyphonicProcessor() : allocated(0) {}
+  virtual ~PolyphonicProcessor(){};
   size_t getNumberOfTakenVoices(){
     size_t active = 0;
     for(int i=0; ipitchbend(msg);
+      Allocator::voice[i]->pitchbend(msg);
   }
   void modulate(MidiMessage msg){
     float value = msg.getControllerValue()/127.0f;
     for(int i=0; isetModulation(value);
+      Allocator::voice[i]->setModulation(value);
   }
   void sustain(MidiMessage msg){
     setSustain(msg.getControllerValue() > 63);
   }
-  // todo: unison note on/off
-  void allNotesOn() {
-    for(int i=0; igate(true);
-  }
-  void allNotesOff() {
-    for(int i=0; igate(false);      
-  }
-  void setVoice(size_t index, SynthVoice* obj){
-    if(index < VOICES)
-      voice[index] = obj;
-  }
-  SynthVoice* getVoice(size_t index){
-    if(index < VOICES)
-      return voice[index];
-    return NULL;
-  }
   void channelPressure(MidiMessage msg){
     // route channel pressure to all voices
     for(int i=0; isetPressure(msg.getChannelPressure()/127.0f);
+      Allocator::voice[i]->setPressure(msg.getChannelPressure()/127.0f);
   }
   void polyKeyPressure(MidiMessage msg){
     // route poly key pressure to the right voice
     uint8_t note = msg.getNote();
     for(int i=0; isetPressure(msg.getPolyKeyPressure()/127.0f);
-  }
-  void setParameter(uint8_t parameter_id, float value){
-    for(int i=0; isetParameter(parameter_id, value);
+	Allocator::voice[i]->setPressure(msg.getPolyKeyPressure()/127.0f);
   }
   bool getSustain(){
     return dosustain;
@@ -130,195 +109,11 @@ class PolyphonicMidiProcessor : public MidiProcessor {
       // gate off any sustained (but not active) voices
       for(int i=0; igate(false);
+	  Allocator::voice[i]->gate(false);
       }
     }
     dosustain = value;
   }
 };
 
-template
-class PolyphonicSignalGenerator : public PolyphonicMidiProcessor, public SignalGenerator {
-private:
-  FloatArray buffer;
-public:
-  PolyphonicSignalGenerator(FloatArray buffer) : buffer(buffer) {}
-  virtual ~PolyphonicSignalGenerator(){};
-  float generate(){
-    float sample = this->voice[0]->generate();
-    for(int i=1; ivoice[i]->generate();
-    return sample;
-  }
-  void generate(FloatArray output){
-    this->voice[0]->generate(output);
-    for(int i=1; ivoice[i]->generate(buffer);
-      output.add(buffer);
-    }
-  }
-  static PolyphonicSignalGenerator* create(size_t blocksize){
-    FloatArray buffer = FloatArray::create(blocksize);    
-    return new PolyphonicSignalGenerator(buffer);
-  }
-  static void destroy(PolyphonicSignalGenerator* obj){
-    FloatArray::destroy(obj->buffer);
-    delete obj;
-  }
-};
-
-template
-class PolyphonicMultiSignalGenerator : public PolyphonicMidiProcessor, public MultiSignalGenerator {
-private:
-  AudioBuffer* buffer;
-public:
-  PolyphonicMultiSignalGenerator(AudioBuffer* buffer) : buffer(buffer) {}
-  virtual ~PolyphonicMultiSignalGenerator(){};
-  static PolyphonicMultiSignalGenerator* create(size_t channels, size_t blocksize){
-    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
-    return new PolyphonicMultiSignalGenerator(buffer);
-  }
-  static void destroy(PolyphonicMultiSignalGenerator* obj){
-    AudioBuffer::destroy(obj->buffer);
-    delete obj;
-  }
-  void generate(AudioBuffer& output){
-    this->voice[0]->generate(output);
-    for(int i=1; ivoice[i]->generate(*buffer);
-      output.add(*buffer);
-    }
-  }  
-};
-
-template
-class PolyphonicSignalProcessor : public PolyphonicMidiProcessor, public SignalProcessor {
-private:
-  FloatArray buffer;
-public:
-  PolyphonicSignalProcessor(FloatArray buffer) : buffer(buffer) {}
-  virtual ~PolyphonicSignalProcessor(){};
-  using MidiProcessor::process;
-  float process(float input){
-    float sample = 0;
-    for(int i=0; ivoice[i]->process(input);
-    return sample;
-  }
-  void process(FloatArray input, FloatArray output){
-    for(int i=0; ivoice[i]->process(input, buffer);
-      output.add(buffer);
-    }
-  }
-  static PolyphonicSignalProcessor* create(size_t blocksize){
-    FloatArray buffer = FloatArray::create(blocksize);    
-    return new PolyphonicSignalProcessor(buffer);
-  }
-  static void destroy(PolyphonicSignalProcessor* obj){
-    FloatArray::destroy(obj->buffer);
-    delete obj;
-  }
-};
-
-template
-class PolyphonicMultiSignalProcessor : public PolyphonicMidiProcessor, public MultiSignalProcessor {
-private:
-  AudioBuffer* buffer;
-public:
-  PolyphonicMultiSignalProcessor(AudioBuffer* buffer) : buffer(buffer) {}
-  virtual ~PolyphonicMultiSignalProcessor(){};
-  using MidiProcessor::process;
-  void process(AudioBuffer& input, AudioBuffer& output){
-    for(int i=0; ivoice[i]->process(input, *buffer);
-      output.add(*buffer);
-    }
-  }  
-  static PolyphonicMultiSignalProcessor* create(size_t channels, size_t blocksize){
-    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
-    return new PolyphonicMultiSignalProcessor(buffer);
-  }
-  static void destroy(PolyphonicMultiSignalProcessor* obj){
-    AudioBuffer::destroy(obj->buffer);
-    delete obj;
-  }
-};
-
-template
-class PolyphonicProcessor : public PolyphonicMidiProcessor,
-			    public SignalGenerator, public SignalProcessor {
-private:
-  FloatArray buffer;
-public:
-  PolyphonicProcessor(FloatArray buffer) : buffer(buffer) {}
-  virtual ~PolyphonicProcessor(){};
-  float generate(){
-    float sample = 0;
-    for(int i=0; ivoice[i]->generate();
-    return sample;
-  }
-  void generate(FloatArray output){
-    this->voice[0]->generate(output);
-    for(int i=1; ivoice[i]->generate(buffer);
-      output.add(buffer);
-    }
-  }
-  using MidiProcessor::process;
-  float process(float input){
-    float sample = 0;
-    for(int i=0; ivoice[i]->process(input);
-    return sample;
-  }
-  void process(FloatArray input, FloatArray output){
-    for(int i=0; ivoice[i]->process(input, buffer);
-      output.add(buffer);
-    }
-  }
-  static PolyphonicProcessor* create(size_t blocksize){
-    FloatArray buffer = FloatArray::create(blocksize);    
-    return new PolyphonicProcessor(buffer);
-  }
-  static void destroy(PolyphonicProcessor* obj){
-    FloatArray::destroy(obj->buffer);
-    delete obj;
-  }
-};
-
-template
-class PolyphonicMultiProcessor : public PolyphonicMidiProcessor,
-				 public MultiSignalGenerator, public MultiSignalProcessor {
-private:
-  AudioBuffer* buffer;
-public:
-  PolyphonicMultiProcessor(AudioBuffer* buffer) : buffer(buffer) {}
-  virtual ~PolyphonicMultiProcessor(){};
-  static PolyphonicMultiProcessor* create(size_t channels, size_t blocksize){
-    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);    
-    return new PolyphonicMultiProcessor(buffer);
-  }
-  static void destroy(PolyphonicMultiProcessor* obj){
-    AudioBuffer::destroy(obj->buffer);
-    delete obj;
-  }
-  void generate(AudioBuffer& output){
-    this->voice[0]->generate(output);
-    for(int i=1; ivoice[i]->generate(*buffer);
-      output.add(*buffer);
-    }
-  }  
-  using MidiProcessor::process;
-  void process(AudioBuffer& input, AudioBuffer& output){
-    for(int i=0; ivoice[i]->process(input, *buffer);
-      output.add(*buffer);
-    }
-  }  
-};
-
 #endif /* __PolyphonicProcessor_h__ */
diff --git a/LibSource/VoiceAllocator.h b/LibSource/VoiceAllocator.h
new file mode 100644
index 00000000..a0a65ab4
--- /dev/null
+++ b/LibSource/VoiceAllocator.h
@@ -0,0 +1,158 @@
+#ifndef __VoiceAllocator_h__
+#define __VoiceAllocator_h__
+
+template
+class VoiceAllocator : public MidiProcessor {
+protected:
+  SynthVoice* voice[VOICES];
+public:
+  void allNotesOff() {
+    for(int i=0; igate(false);      
+  }
+  // todo: unison note on/off
+  void allNotesOn() {
+    for(int i=0; igate(true);
+  }
+  void setVoice(size_t index, SynthVoice* obj){
+    if(index < VOICES)
+      voice[index] = obj;
+  }
+  SynthVoice* getVoice(size_t index){
+    if(index < VOICES)
+      return voice[index];
+    return NULL;
+  }
+  void setParameter(uint8_t parameter_id, float value){
+    for(int i=0; isetParameter(parameter_id, value);
+  }
+};
+
+template
+class VoiceAllocatorSignalGenerator : public Allocator, public SignalGenerator {
+  static_assert(std::is_base_of, Allocator>::value, "Allocator must derive from VoiceAllocator");
+  typedef VoiceAllocatorSignalGenerator MyClass;
+protected:
+  FloatArray buffer;
+public:
+  template 
+  VoiceAllocatorSignalGenerator(FloatArray buffer, Args&&... args) :
+    Allocator(std::forward(args)...), buffer(buffer) {}
+  virtual ~VoiceAllocatorSignalGenerator(){};
+  float generate(){
+    float sample = this->voice[0]->generate();
+    for(int i=1; ivoice[i]->generate();
+    return sample;
+  }
+  void generate(FloatArray output){
+    this->voice[0]->generate(output);
+    for(int i=1; ivoice[i]->generate(buffer);
+      output.add(buffer);
+    }
+  }
+  static MyClass* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new MyClass(buffer);
+  }
+  static void destroy(MyClass* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+template
+class VoiceAllocatorSignalProcessor : public Allocator, public SignalProcessor {
+  static_assert(std::is_base_of, Allocator>::value, "Allocator must derive from VoiceAllocator");
+  typedef VoiceAllocatorSignalProcessor MyClass;
+protected:
+  FloatArray buffer;
+public:
+  template 
+  VoiceAllocatorSignalProcessor(FloatArray buffer, Args&&... args) :
+    Allocator(std::forward(args)...), buffer(buffer) {}
+  virtual ~VoiceAllocatorSignalProcessor(){};
+  using MidiProcessor::process;
+  float process(float input){
+    float sample = 0;
+    for(int i=0; ivoice[i]->process(input);
+    return sample;
+  }
+  void process(FloatArray input, FloatArray output){
+    for(int i=0; ivoice[i]->process(input, buffer);
+      output.add(buffer);
+    }
+  }
+  static MyClass* create(size_t blocksize){
+    FloatArray buffer = FloatArray::create(blocksize);    
+    return new MyClass(buffer);
+  }
+  static void destroy(MyClass* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+template
+class VoiceAllocatorMultiSignalGenerator : public Allocator, public SignalGenerator {
+  static_assert(std::is_base_of, Allocator>::value, "Allocator must derive from VoiceAllocator");
+  typedef VoiceAllocatorMultiSignalGenerator MyClass;
+protected:
+  AudioBuffer* buffer;
+public:
+  template 
+  VoiceAllocatorMultiSignalGenerator(AudioBuffer* buffer, Args&&... args) :
+    Allocator(std::forward(args)...), buffer(buffer) {}
+  virtual ~VoiceAllocatorMultiSignalGenerator(){};
+  void generate(AudioBuffer& output){
+    this->voice[0]->generate(output);
+    for(int i=1; ivoice[i]->generate(*buffer);
+      output.add(*buffer);
+    }
+  }  
+  static MyClass* create(size_t channels, size_t blocksize){
+    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);
+    return new MyClass(buffer);
+  }
+  static void destroy(MyClass* obj){
+    AudioBuffer::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+template
+class VoiceAllocatorMultiSignalProcessor : public Allocator, public SignalProcessor {
+  static_assert(std::is_base_of, Allocator>::value, "Allocator must derive from VoiceAllocator");
+  typedef VoiceAllocatorMultiSignalProcessor MyClass;
+protected:
+  AudioBuffer* buffer;
+public:
+  template 
+  VoiceAllocatorMultiSignalProcessor(AudioBuffer* buffer, Args&&... args) :
+    Allocator(std::forward(args)...), buffer(buffer) {}
+  virtual ~VoiceAllocatorMultiSignalProcessor(){};
+  using MidiProcessor::process;
+  void process(AudioBuffer& input, AudioBuffer& output){
+    for(int i=0; ivoice[i]->process(input, *buffer);
+      output.add(*buffer);
+    }
+  }  
+  static MyClass* create(size_t channels, size_t blocksize){
+    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);
+    return new MyClass(buffer);
+  }
+  static void destroy(MyClass* obj){
+    AudioBuffer::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+
+#endif /* __VoiceAllocator_h__ */

From 63a237243343488151b864d86d13a9712db7dffd Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 27 May 2021 09:56:50 +0200
Subject: [PATCH 210/374] fixed typos

---
 LibSource/VoiceAllocator.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/VoiceAllocator.h b/LibSource/VoiceAllocator.h
index a0a65ab4..91d88c07 100644
--- a/LibSource/VoiceAllocator.h
+++ b/LibSource/VoiceAllocator.h
@@ -99,7 +99,7 @@ class VoiceAllocatorSignalProcessor : public Allocator, public SignalProcessor {
 };
 
 template
-class VoiceAllocatorMultiSignalGenerator : public Allocator, public SignalGenerator {
+class VoiceAllocatorMultiSignalGenerator : public Allocator, public MultiSignalGenerator {
   static_assert(std::is_base_of, Allocator>::value, "Allocator must derive from VoiceAllocator");
   typedef VoiceAllocatorMultiSignalGenerator MyClass;
 protected:
@@ -127,7 +127,7 @@ class VoiceAllocatorMultiSignalGenerator : public Allocator, public SignalGenera
 };
 
 template
-class VoiceAllocatorMultiSignalProcessor : public Allocator, public SignalProcessor {
+class VoiceAllocatorMultiSignalProcessor : public Allocator, public MultiSignalProcessor {
   static_assert(std::is_base_of, Allocator>::value, "Allocator must derive from VoiceAllocator");
   typedef VoiceAllocatorMultiSignalProcessor MyClass;
 protected:

From da5acaf2ca7c9b976e42dd998f475cf5e803bf5b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 28 May 2021 22:06:14 +0200
Subject: [PATCH 211/374] added dynamic voice allocation for master channel

---
 LibSource/MidiPolyphonicExpressionProcessor.h | 67 ++++++++++++++++---
 1 file changed, 58 insertions(+), 9 deletions(-)

diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index 8803d858..75012950 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -18,7 +18,10 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocator Allocator;
 protected:
+  static const uint16_t TAKEN = 0xffff;
   uint8_t notes[VOICES];
+  uint16_t allocation[VOICES];
+  uint16_t allocated;
   float pressure[VOICES];
   float modulation[VOICES];
   uint8_t master_channel = 1;
@@ -31,26 +34,71 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatornoteOn(msg);
+  }
+  void release(uint8_t ch){
+    allocation[ch] = ++allocated;
+    if(!dosustain)
+      Allocator::voice[ch]->gate(false);
+  }
 public:
   MidiPolyphonicExpressionProcessor() {}
   virtual ~MidiPolyphonicExpressionProcessor(){};
+
+  uint8_t findFreeVoice(MidiMessage msg){
+    uint8_t note = msg.getNote();
+    uint16_t minval = USHRT_MAX;
+    uint8_t minidx = 0;
+    // take oldest free voice, to allow voices to ring out
+    for(int i=0; inoteOn(msg);
+      uint8_t idx = getNoteChannel(msg);
+      take(idx, msg);
     }
   }
+
   void noteOff(MidiMessage msg){
-    uint8_t ch = getNoteChannel(msg);
-    if(ch < VOICES && !dosustain)
-      Allocator::voice[ch]->noteOff(msg);
+    if(isMasterChannel(msg)){ // Zone message
+      releaseVoicesForNote(msg);
+    }else{
+      uint8_t ch = getNoteChannel(msg);
+      if(ch < VOICES)
+	release(ch);
+    }
   }
+
   void setPitchBendRange(float range){
     zone_pitchbend_range = range;
-  }    
+  }
+
   void controlChange(MidiMessage msg){
     switch(msg.getControllerNumber()){
     case MIDI_CC_MODULATION: // handle modulation same as CC74 for non-MPE compatibility
@@ -140,13 +188,14 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatorsetPitchBend(Allocator::voice[i]->getPitchBend()+delta);
       zone_pitchbend = value;
     }else{
+      float value = note_pitchbend_range*msg.getPitchBend()/8192.0f;
       uint8_t ch = getNoteChannel(msg);
       if(ch < VOICES){ // Note level message
 	Allocator::voice[ch]->setPitchBend(zone_pitchbend + value);

From 943a5dcb2740e2c5c0bccdfd213d9d2d63d1f918 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 28 May 2021 22:07:36 +0200
Subject: [PATCH 212/374] prevent clobbering fm array

---
 LibSource/PolyBlepOscillator.cpp | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/LibSource/PolyBlepOscillator.cpp b/LibSource/PolyBlepOscillator.cpp
index 8756e296..048c166a 100644
--- a/LibSource/PolyBlepOscillator.cpp
+++ b/LibSource/PolyBlepOscillator.cpp
@@ -74,9 +74,10 @@ void PolyBlepOscillator::generate(FloatArray output){
 }
 
 void PolyBlepOscillator::generate(FloatArray output, FloatArray fm){
-  fm.multiply(nfreq); // scale by base frequency
-  fm.add(nfreq); // add base frequency : freq = nfreq + nfreq*fm
-  osc.Render(fm, pw, shape, output, output.getSize());
+  output.copyFrom(fm);
+  output.multiply(nfreq); // scale by base frequency
+  output.add(nfreq); // add base frequency : freq = nfreq + nfreq*fm
+  osc.Render(output, pw, shape, output, output.getSize());
 }
 
 void PolyBlepOscillator::getSamples(FloatArray output, FloatArray freqs){

From 5b9795c68f98dd5bf4551599a307c6d7bf628f3b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 28 May 2021 22:08:34 +0200
Subject: [PATCH 213/374] added create() methods, fixed destroy()

---
 LibSource/FeedbackProcessor.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/LibSource/FeedbackProcessor.h b/LibSource/FeedbackProcessor.h
index cd846904..7ddaa148 100644
--- a/LibSource/FeedbackProcessor.h
+++ b/LibSource/FeedbackProcessor.h
@@ -26,6 +26,10 @@ class FeedbackSignalProcessor : public Processor {
     Processor::process(input, output);
     feedback_buffer.copyFrom(output);
   }
+  template 
+  static FeedbackSignalProcessor* create(size_t blocksize, Args&&... args){
+    return new FeedbackSignalProcessor(FloatArray::create(blocksize), std::forward(args)...);
+  }
   static void destroy(FeedbackSignalProcessor* obj){
     FloatArray::destroy(obj->feedback_buffer);
     Processor::destroy(obj);
@@ -64,9 +68,13 @@ class StereoFeedbackProcessor : public MultiSignalProcessor {
     feedback_left.copyFrom(output_left);
     feedback_right.copyFrom(output_right);
   }
+  static StereoFeedbackProcessor* create(SignalProcessor* left, SignalProcessor* right, size_t blocksize){
+    return new StereoFeedbackProcessor(left, right, FloatArray::create(blocksize), FloatArray::create(blocksize));
+  }
   static void destroy(StereoFeedbackProcessor* obj){
     FloatArray::destroy(obj->feedback_left);
     FloatArray::destroy(obj->feedback_right);
+    delete obj;
   }
 };
 
@@ -106,9 +114,13 @@ class PingPongFeedbackProcessor : public MultiSignalProcessor {
     feedback_right.copyFrom(output_left);
     dc_right.process(feedback_right);
   }
+  static PingPongFeedbackProcessor* create(SignalProcessor* left, SignalProcessor* right, size_t blocksize){
+    return new PingPongFeedbackProcessor(left, right, FloatArray::create(blocksize), FloatArray::create(blocksize));
+  }
   static void destroy(PingPongFeedbackProcessor* obj){
     FloatArray::destroy(obj->feedback_left);
     FloatArray::destroy(obj->feedback_right);
+    delete obj;
   }
 };
 

From 0166291617148fbba9acd09147683f1cc6a6d3f5 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 28 May 2021 22:08:54 +0200
Subject: [PATCH 214/374] added create() methods, fixed destroy()

---
 LibSource/DryWetProcessor.h | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/LibSource/DryWetProcessor.h b/LibSource/DryWetProcessor.h
index 3bdbb65a..abafe04d 100644
--- a/LibSource/DryWetProcessor.h
+++ b/LibSource/DryWetProcessor.h
@@ -26,6 +26,11 @@ class DryWetSignalProcessor : public Processor {
     mix_buffer.multiply(1-mix_amount);
     output.add(mix_buffer);
   }
+  template 
+  static DryWetSignalProcessor* create(size_t blocksize, Args&&... args){
+    FloatArray buffer = FloatArray::create(blocksize);
+    return new DryWetSignalProcessor(buffer, std::forward(args)...);
+  }    
   static void destroy(DryWetSignalProcessor* obj){
     FloatArray::destroy(obj->mix_buffer);
     Processor::destroy(obj);
@@ -54,6 +59,11 @@ class DryWetMultiSignalProcessor : public Processor {
     mix_buffer->multiply(1-mix_amount);
     output.add(*mix_buffer);
   }
+  template 
+  static DryWetMultiSignalProcessor* create(size_t channels, size_t blocksize, Args&&... args){
+    AudioBuffer* buffer = AudioBuffer::create(channels, blocksize);
+    return new DryWetMultiSignalProcessor(buffer, std::forward(args)...);
+  }    
   static void destroy(DryWetMultiSignalProcessor* obj){
     AudioBuffer::destroy(obj->mix_buffer);
     Processor::destroy(obj);

From 9aab00c29f85d806f8046ef188ab44c882ef20ff Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 28 May 2021 22:10:18 +0200
Subject: [PATCH 215/374] Added interpolation templates. Refactored
 CircularBuffer into InterpolatingCircularBuffer

---
 LibSource/CircularBuffer.h      | 199 +++++++++++++++++++++-----------
 LibSource/DelayProcessor.h      |  10 +-
 LibSource/Interpolator.h        |  78 +++++++++++++
 LibSource/OpenWareLibrary.h     |   1 +
 LibSource/PolyphonicProcessor.h |   1 +
 LibSource/SampleOscillator.h    |  36 +++---
 6 files changed, 237 insertions(+), 88 deletions(-)
 create mode 100644 LibSource/Interpolator.h

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 58ce8685..7bc0a888 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -3,10 +3,11 @@
 
 #include 
 #include  // for memcpy
+#include "Interpolator.h"
 
-template
+template
 class CircularBuffer {
-private:
+protected:
   T* data;
   const size_t size;
   size_t writepos = 0;
@@ -51,19 +52,6 @@ class CircularBuffer {
     data[index % size] = value;
   }
 
-  /**
-   * Interpolated write at sub-sample index.
-   * Inserts a value linearly interpolated at a fractional index.
-   */
-  void interpolatedWriteAt(float index, T value){
-    size_t idx = (size_t)index;
-    T low = readAt(idx);
-    T high = readAt(idx+1);
-    float frac = index - idx;
-    writeAt(idx, low + (value-low)*frac);
-    writeAt(idx+1, value + (high-value)*frac);
-  }
-
   T read(){
     T c = data[readpos++];
     if(readpos >= size)
@@ -89,18 +77,6 @@ class CircularBuffer {
     return data[index % size];
   }
 
-  /**
-   * Interpolated read at sub-sample index.
-   * @return a value linearly interpolated at a fractional index
-   */
-  inline float interpolatedReadAt(float index){
-    size_t idx = (size_t)index;
-    T low = readAt(idx);
-    T high = readAt(idx+1);
-    float frac = index - idx;
-    return high+frac*(low-high);
-  }
-
   void skipUntilLast(char c){
     T* src = getReadHead();
     size_t rem = size-readpos;
@@ -180,47 +156,6 @@ class CircularBuffer {
     read(out, len);
   }
 
-  /**
-   * Read with a fractional delay
-   */
-  void interpolatedDelay(T* out, size_t len, float delay){
-    float pos = fmodf(writepos-delay+size, size);
-    while(len--){
-      *out++ = interpolatedReadAt(pos);
-      pos += 1;
-    }
-  }  
-  
-  /**
-   * Write to buffer and read with a fractional delay
-   */
-  void interpolatedDelay(T* in, T* out, size_t len, float delay){
-    write(in, len);
-    interpolatedDelay(out, len, delay);
-  }
-  
-  /**
-   * Read with a delay that ramps up or down
-   * from @param beginDelay to @param endDelay
-   */
-  void interpolatedDelay(T* out, size_t len, float beginDelay, float endDelay){
-    float pos = fmodf(writepos-beginDelay+size, size);
-    float incr = (len+endDelay-beginDelay)/len;
-    while(len--){
-      *out++ = interpolatedReadAt(pos);
-      pos += incr;
-    }
-  }
-  
-  /**
-   * Write to buffer and read with a delay that ramps up or down
-   * from @param beginDelay to @param endDelay
-   */
-  void interpolatedDelay(T* in, T* out, size_t len, float beginDelay, float endDelay){
-    write(in, len);
-    interpolatedDelay(out, len, beginDelay, endDelay);
-  }
-
   size_t getReadCapacity(){
     return (writepos + size - readpos) % size;
   }
@@ -272,4 +207,132 @@ typedef CircularBuffer CircularFloatBuffer;
 typedef CircularBuffer CircularShortBuffer;
 typedef CircularBuffer CircularIntBuffer;
 
+template
+class InterpolatingCircularFloatBuffer : public CircularFloatBuffer {
+public:
+  InterpolatingCircularFloatBuffer() {}
+  InterpolatingCircularFloatBuffer(float* data, size_t size): CircularFloatBuffer(data, size) {}
+  /**
+   * Interpolated write at sub-sample index.
+   * Inserts a value linearly interpolated at a fractional index.
+   */
+  void writeAt(float index, float value);
+
+  /**
+   * Interpolated read at sub-sample index.
+   * @return a value linearly interpolated at a fractional index
+   */
+  float readAt(float index);
+
+  /**
+   * Read with a fractional delay
+   */
+  void delay(float* out, size_t len, float delay){
+    float pos = fmodf(writepos-delay+size, size);
+    while(len--){
+      *out++ = readAt(pos);
+      pos += 1;
+    }
+  }  
+  
+  /**
+   * Write to buffer and read with a fractional delay
+   * @note input buffer length is added to delay time
+   */
+  void delay(float* in, float* out, size_t len, float readDelay){
+    write(in, len);
+    delay(out, len, readDelay);
+  }
+  
+  /**
+   * Read with a delay that ramps up or down
+   * from @param beginDelay to @param endDelay
+   */
+  void delay(float* out, size_t len, float beginDelay, float endDelay){
+    float pos = fmodf(writepos-beginDelay+size, size);
+    float incr = (len+endDelay-beginDelay)/len;
+    while(len--){
+      *out++ = readAt(pos);
+      pos += incr;
+    }
+  }
+  
+  /**
+   * Write to buffer and read with a delay that ramps up or down
+   * from @param beginDelay to @param endDelay
+   * @note input buffer length is added to delay times
+   */
+  void delay(float* in, float* out, size_t len, float beginDelay, float endDelay){
+    write(in, len);
+    delay(out, len, beginDelay, endDelay);
+  }
+};
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float low = CircularFloatBuffer::readAt(idx);
+  float high = CircularFloatBuffer::readAt(idx+1);
+  float frac = index - idx;
+  return Interpolator::linear(low, high, frac);
+}
+
+template<>
+void InterpolatingCircularFloatBuffer::writeAt(float index, float value){
+  size_t idx = (size_t)index;
+  float low = CircularFloatBuffer::readAt(idx);
+  float high = CircularFloatBuffer::readAt(idx+1);
+  float frac = index - idx;
+  writeAt(idx, low + (value-low)*frac);
+  writeAt(idx+1, value + (high-value)*frac);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float low = CircularFloatBuffer::readAt(idx);
+  float high = CircularFloatBuffer::readAt(idx+1);
+  float frac = index - idx;
+  return Interpolator::cosine(low, high, frac);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float y0 = CircularFloatBuffer::readAt(idx-1);
+  float y1 = CircularFloatBuffer::readAt(idx);
+  float y2 = CircularFloatBuffer::readAt(idx+1);
+  return Interpolator::cubic(y0, y1, y2, index - idx);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float y0 = CircularFloatBuffer::readAt(idx-1);
+  float y1 = CircularFloatBuffer::readAt(idx);
+  float y2 = CircularFloatBuffer::readAt(idx+1);
+  float y3 = CircularFloatBuffer::readAt(idx+2);
+  return Interpolator::cubic(y0, y1, y2, y3, index - idx);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float y0 = CircularFloatBuffer::readAt(idx-1);
+  float y1 = CircularFloatBuffer::readAt(idx);
+  float y2 = CircularFloatBuffer::readAt(idx+1);
+  float y3 = CircularFloatBuffer::readAt(idx+2);
+  return Interpolator::cubicSmooth(y0, y1, y2, y3, index - idx);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float y0 = CircularFloatBuffer::readAt(idx-1);
+  float y1 = CircularFloatBuffer::readAt(idx);
+  float y2 = CircularFloatBuffer::readAt(idx+1);
+  float y3 = CircularFloatBuffer::readAt(idx+2);
+  return Interpolator::hermite(y0, y1, y2, y3, index - idx);
+}
+
 #endif /* _CircularBuffer_hpp_ */
diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index e8cc418b..fbe668ff 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -41,9 +41,11 @@ class DelayProcessor : public SignalProcessor {
 /**
  * Delay line signal processor implemented with a circular buffer, allowing fractional delay times.
  */
+template
 class FractionalDelayProcessor : public SignalProcessor {
 protected:
-  CircularFloatBuffer buffer;
+  // CircularFloatBuffer buffer;
+  InterpolatingCircularFloatBuffer buffer;
   float delay;
 public:
   FractionalDelayProcessor() : delay(0) {}
@@ -56,16 +58,16 @@ class FractionalDelayProcessor : public SignalProcessor {
   }
   float process(float input){
     buffer.write(input);
-    return buffer.interpolatedReadAt(buffer.getWriteIndex()-delay);
+    return buffer.readAt(buffer.getWriteIndex()-delay);
   }
   void process(FloatArray input, FloatArray output){
-    buffer.interpolatedDelay(input, output, input.getSize(), delay);
+    buffer.delay(input, output, input.getSize(), delay);
   }
   /**
    * Delay ramping smoothly from the previous delay time to @param newDelay
    */
   void smooth(FloatArray input, FloatArray output, float newDelay){
-    buffer.interpolatedDelay(input, output, input.getSize(), delay, newDelay);
+    buffer.delay(input, output, input.getSize(), delay, newDelay);
     delay = newDelay;
   }
   static FractionalDelayProcessor* create(size_t len){
diff --git a/LibSource/Interpolator.h b/LibSource/Interpolator.h
new file mode 100644
index 00000000..fd261e22
--- /dev/null
+++ b/LibSource/Interpolator.h
@@ -0,0 +1,78 @@
+#ifndef _Interpolator_h_
+#define _Interpolator_h_
+
+#include 
+
+class Interpolator {
+public:
+  static float linear(float y1, float y2, float mu){
+    return y1 + (y2 - y1) * mu;
+  }
+  static float cosine(float y1, float y2, float mu){
+    float mu2 = (1-cosf(mu*M_PI))/2;
+    return y1*(1-mu2)+y2*mu2;
+  }
+  /** 
+   * Three-point cubic interpolation of point between y1 and y2
+   * ref: http://www.ebyte.it/library/codesnippets/P3Interpolation.html
+   */
+  static float cubic(float y0, float y1, float y2, float mu){
+    float d1 = 0.5*(y2-y0);
+    float d2 = y2-y1+y0-y1;
+    float dx = mu;
+    return y1 + dx*(d1+0.5*d2*dx);
+  }
+  /**
+   * Four-point cubic interpolation
+   * Get the interpolated value of a curve described by y0 to y4,
+   * somewhere between the points y1 and y2.
+   */
+  static float cubic(float y0, float y1, float y2, float y3, float mu) {
+    float mu2 = mu*mu;
+    float a0 = y3 - y2 - y0 + y1;
+    float a1 = y0 - y1 - a0;
+    float a2 = y2 - y0;
+    float a3 = y1;
+    return a0*mu*mu2+a1*mu2+a2*mu+a3;
+  }
+  static float cubicSmooth(float y0, float y1, float y2, float y3, float mu) {
+    // use Catmull-Rom splines:
+    // take the slope between the previous point and the next as the derivative at the current point
+    float mu2 = mu*mu;
+    float a0 = -0.5*y0 + 1.5*y1 - 1.5*y2 + 0.5*y3;
+    float a1 = y0 - 2.5*y1 + 2*y2 - 0.5*y3;
+    float a2 = -0.5*y0 + 0.5*y2;
+    float a3 = y1;
+    return a0*mu*mu2+a1*mu2+a2*mu+a3;
+  }
+  /*
+    Tension: 1 is high, 0 normal, -1 is low
+    Bias: 0 is even,
+         positive is towards first segment,
+         negative towards the other
+  */
+  static float hermite(float y0, float y1, float y2, float y3, float mu, float tension=0, float bias=0){
+    float mu2 = mu * mu;
+    float mu3 = mu2 * mu;
+    float m0  = (y1-y0)*(1+bias)*(1-tension)/2;
+    m0 += (y2-y1)*(1-bias)*(1-tension)/2;
+    float m1  = (y2-y1)*(1+bias)*(1-tension)/2;
+    m1 += (y3-y2)*(1-bias)*(1-tension)/2;
+    float a0 =  2*mu3 - 3*mu2 + 1;
+    float a1 =    mu3 - 2*mu2 + mu;
+    float a2 =    mu3 -   mu2;
+    float a3 = -2*mu3 + 3*mu2;
+   return(a0*y1+a1*m0+a2*m1+a3*y2);
+  }
+};
+
+enum InterpolationMethod {
+  LINEAR_INTERPOLATION,
+  COSINE_INTERPOLATION,
+  CUBIC_3P_INTERPOLATION,
+  CUBIC_4P_INTERPOLATION,
+  CUBIC_4P_SMOOTH_INTERPOLATION,
+  HERMITE_INTERPOLATION
+};
+
+#endif /* _Interpolator_h_ */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 0f8240ed..a87f8b04 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -23,6 +23,7 @@
 #include "FloatArray.h"
 #include "FloatMatrix.h"
 #include "IntArray.h"
+#include "Interpolator.h"
 #include "MidiProcessor.h"
 #include "MidiPolyphonicExpressionProcessor.h"
 #include "MidiStatus.h"
diff --git a/LibSource/PolyphonicProcessor.h b/LibSource/PolyphonicProcessor.h
index 2c3327a6..eb7727c7 100644
--- a/LibSource/PolyphonicProcessor.h
+++ b/LibSource/PolyphonicProcessor.h
@@ -61,6 +61,7 @@ class PolyphonicProcessor : public VoiceAllocator {
   void noteOff(MidiMessage msg){
     uint8_t note = msg.getNote();
     for(int i=0; i
 class SampleOscillator : public Oscillator {
 public:
   enum RepeatMode {
@@ -45,14 +46,7 @@ class SampleOscillator : public Oscillator {
   void reset() {
     pos = 0;
   }
-  static float interpolate(float index, FloatArray data) {
-    size_t idx = (int)index;
-    float low = data[idx];
-    float high = data[idx + 1];
-    float frac = index - idx;
-    return CosineInterpolate(low, high, frac);
-    // return LinearInterpolate(low, high, frac);
-  }
+  float interpolate(float index, FloatArray data);
   void setPhase(float phase){
     pos = size*phase/(2*M_PI);
   }
@@ -155,14 +149,24 @@ class SampleOscillator : public Oscillator {
   static void destroy(SampleOscillator* obj) {
     delete obj;
   }
-
-  static float LinearInterpolate(float y1, float y2, float mu){
-    return y1 + (y2 - y1) * mu;
-  }
-  static float CosineInterpolate(float y1, float y2, float mu){
-    float mu2 = (1-cosf(mu*M_PI))/2;
-    return y1*(1-mu2)+y2*mu2;
-  }
 };
 
+template<>
+float SampleOscillator::interpolate(float index, FloatArray data) {
+  size_t idx = (int)index;
+  float low = data[idx];
+  float high = data[idx + 1];
+  float frac = index - idx;
+  return Interpolator::linear(low, high, frac);
+}
+
+template<>
+float SampleOscillator::interpolate(float index, FloatArray data) {
+  size_t idx = (int)index;
+  return Interpolator::cosine(data[idx], data[idx + 1], index - idx);
+}
+
+typedef SampleOscillator LinearSampleOscillator;
+typedef SampleOscillator CosineSampleOscillator;
+
 #endif /* __SampleOscillator_h */

From de3131e9a762402cc7be7c8f53a6e582ef9dc99e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 2 Jun 2021 12:08:51 +0200
Subject: [PATCH 216/374] added
 InterpolatingCircularFloatBuffer::create/destroy methods

---
 LibSource/CircularBuffer.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 7bc0a888..f2969988 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -266,6 +266,17 @@ class InterpolatingCircularFloatBuffer : public CircularFloatBuffer {
     write(in, len);
     delay(out, len, beginDelay, endDelay);
   }
+
+  static InterpolatingCircularFloatBuffer* create(size_t len){
+    InterpolatingCircularFloatBuffer* obj = new InterpolatingCircularFloatBuffer(new float[len], len);
+    obj->clear();
+    return obj;
+  }
+
+  static void destroy(InterpolatingCircularFloatBuffer* obj){
+    delete[] obj->data;
+    delete obj;
+  }
 };
 
 template<>

From 2d1ffe132448d43bb7570b47a2c41b37b0f9cfe6 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 7 Jun 2021 17:19:38 +0200
Subject: [PATCH 217/374] changed CrossFadingDelayProcessor to use single
 circular buffer with two read positions

---
 LibSource/DelayProcessor.h | 36 +++++++++++++++---------------------
 1 file changed, 15 insertions(+), 21 deletions(-)

diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index fbe668ff..32d9a445 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -125,13 +125,12 @@ class FastFractionalDelayProcessor : public SignalProcessor {
  */
 class CrossFadingDelayProcessor : public SignalProcessor {
 protected:
-  CircularFloatBuffer* a;
-  CircularFloatBuffer* b;
+  CircularFloatBuffer* ringbuffer;
   FloatArray buffer;
   float delay = 0;
 public:
-  CrossFadingDelayProcessor(CircularFloatBuffer* a, CircularFloatBuffer* b, FloatArray buffer)
-    : a(a), b(b), buffer(buffer) {}  
+  CrossFadingDelayProcessor(CircularFloatBuffer* ringbuffer, FloatArray buffer)
+    : ringbuffer(ringbuffer), buffer(buffer) {}  
   float getDelay(){
     return delay;
   }
@@ -139,12 +138,11 @@ class CrossFadingDelayProcessor : public SignalProcessor {
     delay = samples;
   }
   float process(float input){
-    b->setDelay(delay);
-    a->write(input);
-    b->write(input);
-    float sample = (a->read()+b->read())*0.5;
-    a->setDelay(delay);
-    return sample;
+    ringbuffer->write(input);
+    float sample = ringbuffer->read();
+    ringbuffer->setDelay(delay);
+    sample += ringbuffer->read();
+    return sample*0.5;
   }
   void process(FloatArray input, FloatArray output){
     smooth(input, output, delay);
@@ -156,25 +154,21 @@ class CrossFadingDelayProcessor : public SignalProcessor {
     ASSERT(buffer.getSize() >= input.getSize(), "buffer array too small");
     ASSERT(output.getSize() >= input.getSize(), "output array too small");
     size_t len = input.getSize();
-    b->setDelay(newDelay);
-    a->write(input.getData(), len);
-    b->write(input.getData(), len);
-    a->read(buffer.getData(), len);
-    buffer.scale(0, 1);
-    b->read(output.getData(), len);
-    output.scale(1, 0);
+    ringbuffer->write(input.getData(), len);
+    ringbuffer->read(buffer.getData(), len); // read at previous delay position
+    buffer.scale(1, 0); // ramp down
+    ringbuffer->setDelay(newDelay);
+    ringbuffer->read(output.getData(), len); // read at new delay position
+    output.scale(0, 1); // ramp up
     output.add(buffer);
-    a->setDelay(newDelay);
     delay = newDelay;
   }
   static CrossFadingDelayProcessor* create(size_t delay_len, size_t buffer_len){
     return new CrossFadingDelayProcessor(CircularFloatBuffer::create(delay_len),
-					 CircularFloatBuffer::create(delay_len),
 					 FloatArray::create(buffer_len));
   }
   static void destroy(CrossFadingDelayProcessor* obj){
-    CircularFloatBuffer::destroy(obj->a);
-    CircularFloatBuffer::destroy(obj->b);
+    CircularFloatBuffer::destroy(obj->ringbuffer);
     FloatArray::destroy(obj->buffer);
     delete obj;
   }

From df1360c967e3d0c823ee4a14d44eb53b3f48ec2c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 7 Jun 2021 17:52:15 +0200
Subject: [PATCH 218/374] added CrossFadingCircularBuffer

---
 LibSource/CircularBuffer.h | 62 +++++++++++++++++++++++++++++++++++---
 1 file changed, 58 insertions(+), 4 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index f2969988..61942388 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -150,8 +150,8 @@ class CircularBuffer {
   /**
    * Write to buffer and read with a delay
    */
-  void delay(T* in, T* out, size_t len, int delay){
-    setDelay(delay);
+  void delay(T* in, T* out, size_t len, int delay_samples){
+    setDelay(delay_samples); // set delay relative to where we start writing
     write(in, len);
     read(out, len);
   }
@@ -241,7 +241,7 @@ class InterpolatingCircularFloatBuffer : public CircularFloatBuffer {
    */
   void delay(float* in, float* out, size_t len, float readDelay){
     write(in, len);
-    delay(out, len, readDelay);
+    delay(out, len, readDelay + len); // set delay relative to where we started writing
   }
   
   /**
@@ -264,7 +264,7 @@ class InterpolatingCircularFloatBuffer : public CircularFloatBuffer {
    */
   void delay(float* in, float* out, size_t len, float beginDelay, float endDelay){
     write(in, len);
-    delay(out, len, beginDelay, endDelay);
+    delay(out, len, beginDelay + len, endDelay + len); // set delays relative to where we started writing
   }
 
   static InterpolatingCircularFloatBuffer* create(size_t len){
@@ -346,4 +346,58 @@ float InterpolatingCircularFloatBuffer::readAt(float inde
   return Interpolator::hermite(y0, y1, y2, y3, index - idx);
 }
 
+template
+class CrossFadingCircularBuffer : public CircularBuffer {
+protected:
+  FloatArray buffer;
+public:
+  CrossFadingCircularBuffer() {}
+  CrossFadingCircularBuffer(T* data, size_t size, FloatArray buffer):
+    CircularBuffer(data, size), buffer(buffer) {}  
+  /**
+   * Read from buffer with a delay.
+   * The output will be crossfaded between the previous delay time and the new one.
+   */
+  void delay(T* out, size_t len, int delay_samples){
+    delay(out, len, CircularBuffer::getDelay(), delay_samples);
+  }
+  /**
+   * Write to buffer and read with a delay
+   */
+  void delay(T* in, T* out, size_t len, int delay_samples){
+    CircularBuffer::write(in, len);
+    delay(out, len, CircularBuffer::getDelay(), delay_samples + len);
+  }
+  /**
+   * Read from buffer with a delay
+   */
+  void delay(T* out, size_t len, int beginDelay, int endDelay){
+    ASSERT(len <= buffer.getSize(), "Buffer too small");
+    FloatArray output(out, len);
+    CircularBuffer::setDelay(beginDelay);
+    CircularBuffer::read(out, len);
+    output.scale(1, 0);
+    CircularBuffer::setDelay(endDelay);
+    CircularBuffer::read(buffer.getData(), len);
+    buffer.scale(0, 1);
+    output.add(buffer);
+  }
+  /**
+   * Write to buffer and read with a delay
+   */
+  void delay(T* in, T* out, size_t len, int beginDelay, int endDelay){
+    CircularBuffer::write(in, len);
+    delay(out, len, beginDelay + len, endDelay + len); // set delays relative to where we started writing
+  }
+  static CrossFadingCircularBuffer* create(size_t len, size_t blocksize){
+    return new CrossFadingCircularBuffer(new T[len], len, FloatArray::create(blocksize));
+  }
+  static void destroy(CrossFadingCircularBuffer* obj){
+    FloatArray::destroy(obj->buffer);
+    delete obj;
+  }
+};
+
+typedef CrossFadingCircularBuffer CrossFadingCircularFloatBuffer;
+
 #endif /* _CircularBuffer_hpp_ */

From db3b134dbcf14f13687c7c2c461d26293224d6f5 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 9 Jun 2021 14:36:04 +0200
Subject: [PATCH 219/374] signedness fixes

---
 LibSource/AudioBuffer.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/LibSource/AudioBuffer.h b/LibSource/AudioBuffer.h
index 65fc621a..ab79ba23 100644
--- a/LibSource/AudioBuffer.h
+++ b/LibSource/AudioBuffer.h
@@ -11,23 +11,23 @@ class AudioBuffer {
   virtual int getSize() = 0;
   virtual void clear() = 0;
   void multiply(float scalar){
-    for(size_t i=0; i
Date: Wed, 9 Jun 2021 14:36:33 +0200
Subject: [PATCH 220/374] fixed create/destroy methods

---
 LibSource/CircularBuffer.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 61942388..f921c601 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -390,10 +390,14 @@ class CrossFadingCircularBuffer : public CircularBuffer {
     delay(out, len, beginDelay + len, endDelay + len); // set delays relative to where we started writing
   }
   static CrossFadingCircularBuffer* create(size_t len, size_t blocksize){
-    return new CrossFadingCircularBuffer(new T[len], len, FloatArray::create(blocksize));
+    CrossFadingCircularBuffer* obj =
+      new CrossFadingCircularBuffer(new T[len], len, FloatArray::create(blocksize));
+    obj->clear();
+    return obj;
   }
   static void destroy(CrossFadingCircularBuffer* obj){
     FloatArray::destroy(obj->buffer);
+    delete[] obj->data;
     delete obj;
   }
 };

From 816e25336ad33bece15597114faf137ee0a28379 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 9 Jun 2021 15:41:30 +0200
Subject: [PATCH 221/374] TapTempo::get/setSamples() changed to
 get/setPeriodInSamples()

---
 LibSource/TapTempo.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/TapTempo.h b/LibSource/TapTempo.h
index fed202bf..41f0cb38 100644
--- a/LibSource/TapTempo.h
+++ b/LibSource/TapTempo.h
@@ -63,13 +63,13 @@ class TapTempo {
   /**
    * Get tap tempo period in samples.
    */
-  size_t getSamples(){
+  size_t getPeriodInSamples(){
     return samples;
   }
   /**
    * Set tap tempo period in samples.
    */
-  void setSamples(size_t value){
+  void setPeriodInSamples(size_t value){
     samples = value;
   }
   static float bpmToFrequency(float bpm){

From e195865f48f298ab58e7f7b4134e0cebb316b599 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 9 Jun 2021 17:25:16 +0200
Subject: [PATCH 222/374] refactored circular buffers and delay lines

---
 LibSource/CircularBuffer.h              | 198 ------------------------
 LibSource/CrossFadingCircularBuffer.h   |  65 ++++++++
 LibSource/DelayProcessor.h              |  48 ++----
 LibSource/InterpolatingCircularBuffer.h | 159 +++++++++++++++++++
 LibSource/OpenWareLibrary.h             |   2 +
 5 files changed, 240 insertions(+), 232 deletions(-)
 create mode 100644 LibSource/CrossFadingCircularBuffer.h
 create mode 100644 LibSource/InterpolatingCircularBuffer.h

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index f921c601..6af26dd8 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -3,7 +3,6 @@
 
 #include 
 #include  // for memcpy
-#include "Interpolator.h"
 
 template
 class CircularBuffer {
@@ -207,201 +206,4 @@ typedef CircularBuffer CircularFloatBuffer;
 typedef CircularBuffer CircularShortBuffer;
 typedef CircularBuffer CircularIntBuffer;
 
-template
-class InterpolatingCircularFloatBuffer : public CircularFloatBuffer {
-public:
-  InterpolatingCircularFloatBuffer() {}
-  InterpolatingCircularFloatBuffer(float* data, size_t size): CircularFloatBuffer(data, size) {}
-  /**
-   * Interpolated write at sub-sample index.
-   * Inserts a value linearly interpolated at a fractional index.
-   */
-  void writeAt(float index, float value);
-
-  /**
-   * Interpolated read at sub-sample index.
-   * @return a value linearly interpolated at a fractional index
-   */
-  float readAt(float index);
-
-  /**
-   * Read with a fractional delay
-   */
-  void delay(float* out, size_t len, float delay){
-    float pos = fmodf(writepos-delay+size, size);
-    while(len--){
-      *out++ = readAt(pos);
-      pos += 1;
-    }
-  }  
-  
-  /**
-   * Write to buffer and read with a fractional delay
-   * @note input buffer length is added to delay time
-   */
-  void delay(float* in, float* out, size_t len, float readDelay){
-    write(in, len);
-    delay(out, len, readDelay + len); // set delay relative to where we started writing
-  }
-  
-  /**
-   * Read with a delay that ramps up or down
-   * from @param beginDelay to @param endDelay
-   */
-  void delay(float* out, size_t len, float beginDelay, float endDelay){
-    float pos = fmodf(writepos-beginDelay+size, size);
-    float incr = (len+endDelay-beginDelay)/len;
-    while(len--){
-      *out++ = readAt(pos);
-      pos += incr;
-    }
-  }
-  
-  /**
-   * Write to buffer and read with a delay that ramps up or down
-   * from @param beginDelay to @param endDelay
-   * @note input buffer length is added to delay times
-   */
-  void delay(float* in, float* out, size_t len, float beginDelay, float endDelay){
-    write(in, len);
-    delay(out, len, beginDelay + len, endDelay + len); // set delays relative to where we started writing
-  }
-
-  static InterpolatingCircularFloatBuffer* create(size_t len){
-    InterpolatingCircularFloatBuffer* obj = new InterpolatingCircularFloatBuffer(new float[len], len);
-    obj->clear();
-    return obj;
-  }
-
-  static void destroy(InterpolatingCircularFloatBuffer* obj){
-    delete[] obj->data;
-    delete obj;
-  }
-};
-
-template<>
-float InterpolatingCircularFloatBuffer::readAt(float index){
-  size_t idx = (size_t)index;
-  float low = CircularFloatBuffer::readAt(idx);
-  float high = CircularFloatBuffer::readAt(idx+1);
-  float frac = index - idx;
-  return Interpolator::linear(low, high, frac);
-}
-
-template<>
-void InterpolatingCircularFloatBuffer::writeAt(float index, float value){
-  size_t idx = (size_t)index;
-  float low = CircularFloatBuffer::readAt(idx);
-  float high = CircularFloatBuffer::readAt(idx+1);
-  float frac = index - idx;
-  writeAt(idx, low + (value-low)*frac);
-  writeAt(idx+1, value + (high-value)*frac);
-}
-
-template<>
-float InterpolatingCircularFloatBuffer::readAt(float index){
-  size_t idx = (size_t)index;
-  float low = CircularFloatBuffer::readAt(idx);
-  float high = CircularFloatBuffer::readAt(idx+1);
-  float frac = index - idx;
-  return Interpolator::cosine(low, high, frac);
-}
-
-template<>
-float InterpolatingCircularFloatBuffer::readAt(float index){
-  size_t idx = (size_t)index;
-  float y0 = CircularFloatBuffer::readAt(idx-1);
-  float y1 = CircularFloatBuffer::readAt(idx);
-  float y2 = CircularFloatBuffer::readAt(idx+1);
-  return Interpolator::cubic(y0, y1, y2, index - idx);
-}
-
-template<>
-float InterpolatingCircularFloatBuffer::readAt(float index){
-  size_t idx = (size_t)index;
-  float y0 = CircularFloatBuffer::readAt(idx-1);
-  float y1 = CircularFloatBuffer::readAt(idx);
-  float y2 = CircularFloatBuffer::readAt(idx+1);
-  float y3 = CircularFloatBuffer::readAt(idx+2);
-  return Interpolator::cubic(y0, y1, y2, y3, index - idx);
-}
-
-template<>
-float InterpolatingCircularFloatBuffer::readAt(float index){
-  size_t idx = (size_t)index;
-  float y0 = CircularFloatBuffer::readAt(idx-1);
-  float y1 = CircularFloatBuffer::readAt(idx);
-  float y2 = CircularFloatBuffer::readAt(idx+1);
-  float y3 = CircularFloatBuffer::readAt(idx+2);
-  return Interpolator::cubicSmooth(y0, y1, y2, y3, index - idx);
-}
-
-template<>
-float InterpolatingCircularFloatBuffer::readAt(float index){
-  size_t idx = (size_t)index;
-  float y0 = CircularFloatBuffer::readAt(idx-1);
-  float y1 = CircularFloatBuffer::readAt(idx);
-  float y2 = CircularFloatBuffer::readAt(idx+1);
-  float y3 = CircularFloatBuffer::readAt(idx+2);
-  return Interpolator::hermite(y0, y1, y2, y3, index - idx);
-}
-
-template
-class CrossFadingCircularBuffer : public CircularBuffer {
-protected:
-  FloatArray buffer;
-public:
-  CrossFadingCircularBuffer() {}
-  CrossFadingCircularBuffer(T* data, size_t size, FloatArray buffer):
-    CircularBuffer(data, size), buffer(buffer) {}  
-  /**
-   * Read from buffer with a delay.
-   * The output will be crossfaded between the previous delay time and the new one.
-   */
-  void delay(T* out, size_t len, int delay_samples){
-    delay(out, len, CircularBuffer::getDelay(), delay_samples);
-  }
-  /**
-   * Write to buffer and read with a delay
-   */
-  void delay(T* in, T* out, size_t len, int delay_samples){
-    CircularBuffer::write(in, len);
-    delay(out, len, CircularBuffer::getDelay(), delay_samples + len);
-  }
-  /**
-   * Read from buffer with a delay
-   */
-  void delay(T* out, size_t len, int beginDelay, int endDelay){
-    ASSERT(len <= buffer.getSize(), "Buffer too small");
-    FloatArray output(out, len);
-    CircularBuffer::setDelay(beginDelay);
-    CircularBuffer::read(out, len);
-    output.scale(1, 0);
-    CircularBuffer::setDelay(endDelay);
-    CircularBuffer::read(buffer.getData(), len);
-    buffer.scale(0, 1);
-    output.add(buffer);
-  }
-  /**
-   * Write to buffer and read with a delay
-   */
-  void delay(T* in, T* out, size_t len, int beginDelay, int endDelay){
-    CircularBuffer::write(in, len);
-    delay(out, len, beginDelay + len, endDelay + len); // set delays relative to where we started writing
-  }
-  static CrossFadingCircularBuffer* create(size_t len, size_t blocksize){
-    CrossFadingCircularBuffer* obj =
-      new CrossFadingCircularBuffer(new T[len], len, FloatArray::create(blocksize));
-    obj->clear();
-    return obj;
-  }
-  static void destroy(CrossFadingCircularBuffer* obj){
-    FloatArray::destroy(obj->buffer);
-    delete[] obj->data;
-    delete obj;
-  }
-};
-
-typedef CrossFadingCircularBuffer CrossFadingCircularFloatBuffer;
-
 #endif /* _CircularBuffer_hpp_ */
diff --git a/LibSource/CrossFadingCircularBuffer.h b/LibSource/CrossFadingCircularBuffer.h
new file mode 100644
index 00000000..4280b0e4
--- /dev/null
+++ b/LibSource/CrossFadingCircularBuffer.h
@@ -0,0 +1,65 @@
+#ifndef _CrossFadingCircularBuffer_hpp_
+#define _CrossFadingCircularBuffer_hpp_
+
+#include 
+#include "CircularBuffer.h"
+
+template
+class CrossFadingCircularBuffer : public CircularBuffer {
+protected:
+  FloatArray buffer;
+public:
+  CrossFadingCircularBuffer() {}
+  CrossFadingCircularBuffer(T* data, size_t size, FloatArray buffer):
+    CircularBuffer(data, size), buffer(buffer) {}  
+  /**
+   * Read from buffer with a delay.
+   * The output will be crossfaded between the previous delay time and the new one.
+   */
+  void delay(T* out, size_t len, int delay_samples){
+    delay(out, len, CircularBuffer::getDelay(), delay_samples);
+  }
+  /**
+   * Write to buffer and read with a delay
+   */
+  void delay(T* in, T* out, size_t len, int delay_samples){
+    CircularBuffer::write(in, len);
+    delay(out, len, CircularBuffer::getDelay(), delay_samples + len);
+  }
+  /**
+   * Read from buffer with a delay
+   */
+  void delay(T* out, size_t len, int beginDelay, int endDelay){
+    ASSERT(len <= buffer.getSize(), "Buffer too small");
+    FloatArray output(out, len);
+    CircularBuffer::setDelay(beginDelay);
+    CircularBuffer::read(out, len);
+    output.scale(1, 0);
+    CircularBuffer::setDelay(endDelay);
+    CircularBuffer::read(buffer.getData(), len);
+    buffer.scale(0, 1);
+    output.add(buffer);
+  }
+  /**
+   * Write to buffer and read with a delay
+   */
+  void delay(T* in, T* out, size_t len, int beginDelay, int endDelay){
+    CircularBuffer::write(in, len);
+    delay(out, len, beginDelay + len, endDelay + len); // set delays relative to where we started writing
+  }
+  static CrossFadingCircularBuffer* create(size_t len, size_t blocksize){
+    CrossFadingCircularBuffer* obj =
+      new CrossFadingCircularBuffer(new T[len], len, FloatArray::create(blocksize));
+    obj->clear();
+    return obj;
+  }
+  static void destroy(CrossFadingCircularBuffer* obj){
+    FloatArray::destroy(obj->buffer);
+    delete[] obj->data;
+    delete obj;
+  }
+};
+
+typedef CrossFadingCircularBuffer CrossFadingCircularFloatBuffer;
+
+#endif /* _CrossFadingCircularBuffer_hpp_ */
diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 32d9a445..185daa09 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -4,6 +4,8 @@
 #include "CircularBuffer.h"
 #include "SignalProcessor.h"
 #include "FractionalCircularBuffer.h"
+#include "InterpolatingCircularBuffer.h"
+#include "CrossFadingCircularBuffer.h"
 
 /**
  * Delay line signal processor implemented with a circular buffer.
@@ -44,7 +46,6 @@ class DelayProcessor : public SignalProcessor {
 template
 class FractionalDelayProcessor : public SignalProcessor {
 protected:
-  // CircularFloatBuffer buffer;
   InterpolatingCircularFloatBuffer buffer;
   float delay;
 public:
@@ -57,18 +58,16 @@ class FractionalDelayProcessor : public SignalProcessor {
     delay = samples;
   }
   float process(float input){
+    float sample = buffer.readAt(buffer.getWriteIndex() - delay);
     buffer.write(input);
-    return buffer.readAt(buffer.getWriteIndex()-delay);
-  }
-  void process(FloatArray input, FloatArray output){
-    buffer.delay(input, output, input.getSize(), delay);
+    return sample;
   }
   /**
-   * Delay ramping smoothly from the previous delay time to @param newDelay
+   * Delay smoothly from the previous delay time to @param newDelay
    */
-  void smooth(FloatArray input, FloatArray output, float newDelay){
-    buffer.delay(input, output, input.getSize(), delay, newDelay);
-    delay = newDelay;
+  void process(FloatArray input, FloatArray output){
+    // buffer.delay(input, output, input.getSize(), buffer.getFractionalDelay(), delay);
+    buffer.delay(input, output, input.getSize(), delay);
   }
   static FractionalDelayProcessor* create(size_t len){
     return new FractionalDelayProcessor(new float[len], len);
@@ -125,12 +124,11 @@ class FastFractionalDelayProcessor : public SignalProcessor {
  */
 class CrossFadingDelayProcessor : public SignalProcessor {
 protected:
-  CircularFloatBuffer* ringbuffer;
-  FloatArray buffer;
+  CrossFadingCircularFloatBuffer* ringbuffer;
   float delay = 0;
 public:
-  CrossFadingDelayProcessor(CircularFloatBuffer* ringbuffer, FloatArray buffer)
-    : ringbuffer(ringbuffer), buffer(buffer) {}  
+  CrossFadingDelayProcessor(CrossFadingCircularFloatBuffer* ringbuffer)
+    : ringbuffer(ringbuffer) {}  
   float getDelay(){
     return delay;
   }
@@ -145,31 +143,13 @@ class CrossFadingDelayProcessor : public SignalProcessor {
     return sample*0.5;
   }
   void process(FloatArray input, FloatArray output){
-    smooth(input, output, delay);
-  }
-  /**
-   * Delay ramping smoothly from the previous delay time to @param newDelay
-   */
-  void smooth(FloatArray input, FloatArray output, float newDelay){
-    ASSERT(buffer.getSize() >= input.getSize(), "buffer array too small");
-    ASSERT(output.getSize() >= input.getSize(), "output array too small");
-    size_t len = input.getSize();
-    ringbuffer->write(input.getData(), len);
-    ringbuffer->read(buffer.getData(), len); // read at previous delay position
-    buffer.scale(1, 0); // ramp down
-    ringbuffer->setDelay(newDelay);
-    ringbuffer->read(output.getData(), len); // read at new delay position
-    output.scale(0, 1); // ramp up
-    output.add(buffer);
-    delay = newDelay;
+    ringbuffer->delay(input, output, input.getSize(), delay);
   }
   static CrossFadingDelayProcessor* create(size_t delay_len, size_t buffer_len){
-    return new CrossFadingDelayProcessor(CircularFloatBuffer::create(delay_len),
-					 FloatArray::create(buffer_len));
+    return new CrossFadingDelayProcessor(CrossFadingCircularFloatBuffer::create(delay_len, buffer_len));
   }
   static void destroy(CrossFadingDelayProcessor* obj){
-    CircularFloatBuffer::destroy(obj->ringbuffer);
-    FloatArray::destroy(obj->buffer);
+    CrossFadingCircularFloatBuffer::destroy(obj->ringbuffer);
     delete obj;
   }
 };
diff --git a/LibSource/InterpolatingCircularBuffer.h b/LibSource/InterpolatingCircularBuffer.h
new file mode 100644
index 00000000..aeadaf22
--- /dev/null
+++ b/LibSource/InterpolatingCircularBuffer.h
@@ -0,0 +1,159 @@
+#ifndef _InterpolatingCircularBuffer_hpp_
+#define _InterpolatingCircularBuffer_hpp_
+
+#include 
+#include "CircularBuffer.h"
+#include "Interpolator.h"
+
+template
+class InterpolatingCircularFloatBuffer : public CircularBuffer {
+protected:
+  float delay_samples = 0;
+public:
+  InterpolatingCircularFloatBuffer() {}
+  InterpolatingCircularFloatBuffer(float* data, size_t size): CircularFloatBuffer(data, size) {}
+  /**
+   * Interpolated write at sub-sample index.
+   * Inserts a value linearly interpolated at a fractional index.
+   */
+  void writeAt(float index, float value);
+
+  /**
+   * Interpolated read at sub-sample index.
+   * @return a value linearly interpolated at a fractional index
+   */
+  float readAt(float index);
+
+  float getFractionalDelay(){
+    return delay_samples;
+  }
+
+  /**
+   * Read with a fractional delay
+   */
+  void delay(float* out, size_t len, float delay){
+    // float pos = fmodf(writepos-delay+size, size);
+    float pos = writepos - delay + size;
+    while(len--){
+      *out++ = readAt(pos);
+      pos += 1;
+    }
+    delay_samples = delay;
+  }  
+  
+  /**
+   * Write to buffer and read with a fractional delay
+   * @note input buffer length is added to delay time
+   */
+  void delay(float* in, float* out, size_t len, float readDelay){
+    write(in, len);
+    delay(out, len, readDelay + len); // set delay relative to where we started writing
+  }
+  
+  /**
+   * Read with a delay that ramps up or down
+   * from @param beginDelay to @param endDelay
+   */
+  void delay(float* out, size_t len, float beginDelay, float endDelay){
+    // float pos = fmodf(writepos-beginDelay+size, size);
+    float pos = writepos - beginDelay + size;
+    float incr = (len+endDelay-beginDelay)/len;
+    // incr = clamp(incr, 0.5, 2);
+    // delay_samples = beginDelay + incr*len - len;
+    delay_samples = endDelay;
+    while(len--){
+      *out++ = readAt(pos);
+      pos += incr;
+    }
+  }
+  
+  /**
+   * Write to buffer and read with a delay that ramps up or down
+   * from @param beginDelay to @param endDelay
+   * @note input buffer length is added to delay times
+   */
+  void delay(float* in, float* out, size_t len, float beginDelay, float endDelay){
+    write(in, len);
+    delay(out, len, beginDelay + len, endDelay + len); // set delays relative to where we started writing
+  }
+
+  static InterpolatingCircularFloatBuffer* create(size_t len){
+    InterpolatingCircularFloatBuffer* obj = new InterpolatingCircularFloatBuffer(new float[len], len);
+    obj->clear();
+    return obj;
+  }
+
+  static void destroy(InterpolatingCircularFloatBuffer* obj){
+    delete[] obj->data;
+    delete obj;
+  }
+};
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float low = CircularFloatBuffer::readAt(idx);
+  float high = CircularFloatBuffer::readAt(idx+1);
+  float frac = index - idx;
+  return Interpolator::linear(low, high, frac);
+}
+
+template<>
+void InterpolatingCircularFloatBuffer::writeAt(float index, float value){
+  size_t idx = (size_t)index;
+  float low = CircularFloatBuffer::readAt(idx);
+  float high = CircularFloatBuffer::readAt(idx+1);
+  float frac = index - idx;
+  writeAt(idx, low + (value-low)*frac);
+  writeAt(idx+1, value + (high-value)*frac);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float low = CircularFloatBuffer::readAt(idx);
+  float high = CircularFloatBuffer::readAt(idx+1);
+  float frac = index - idx;
+  return Interpolator::cosine(low, high, frac);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float y0 = CircularFloatBuffer::readAt(idx-1);
+  float y1 = CircularFloatBuffer::readAt(idx);
+  float y2 = CircularFloatBuffer::readAt(idx+1);
+  return Interpolator::cubic(y0, y1, y2, index - idx);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float y0 = CircularFloatBuffer::readAt(idx-1);
+  float y1 = CircularFloatBuffer::readAt(idx);
+  float y2 = CircularFloatBuffer::readAt(idx+1);
+  float y3 = CircularFloatBuffer::readAt(idx+2);
+  return Interpolator::cubic(y0, y1, y2, y3, index - idx);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float y0 = CircularFloatBuffer::readAt(idx-1);
+  float y1 = CircularFloatBuffer::readAt(idx);
+  float y2 = CircularFloatBuffer::readAt(idx+1);
+  float y3 = CircularFloatBuffer::readAt(idx+2);
+  return Interpolator::cubicSmooth(y0, y1, y2, y3, index - idx);
+}
+
+template<>
+float InterpolatingCircularFloatBuffer::readAt(float index){
+  size_t idx = (size_t)index;
+  float y0 = CircularFloatBuffer::readAt(idx-1);
+  float y1 = CircularFloatBuffer::readAt(idx);
+  float y2 = CircularFloatBuffer::readAt(idx+1);
+  float y3 = CircularFloatBuffer::readAt(idx+2);
+  return Interpolator::hermite(y0, y1, y2, y3, index - idx);
+}
+
+#endif /* _InterpolatingCircularBuffer_hpp_ */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index a87f8b04..0d66b986 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -11,6 +11,7 @@
 #include "ComplexFourierTransform.h"
 #include "ComplexShortArray.h"
 #include "Control.h"
+#include "CrossFadingCircularBuffer.h"
 #include "DcBlockingFilter.h"
 #include "DelayProcessor.h"
 #include "DryWetProcessor.h"
@@ -24,6 +25,7 @@
 #include "FloatMatrix.h"
 #include "IntArray.h"
 #include "Interpolator.h"
+#include "InterpolatingCircularBuffer.h"
 #include "MidiProcessor.h"
 #include "MidiPolyphonicExpressionProcessor.h"
 #include "MidiStatus.h"

From b3ba57bdfa90254384dc202a10b87280b90790e4 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 9 Jun 2021 17:25:38 +0200
Subject: [PATCH 223/374] fix signedness warning

---
 Source/MemoryBuffer.hpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Source/MemoryBuffer.hpp b/Source/MemoryBuffer.hpp
index 15e9f7c3..cdd7e3e0 100644
--- a/Source/MemoryBuffer.hpp
+++ b/Source/MemoryBuffer.hpp
@@ -15,7 +15,7 @@ class MemoryBuffer : public AudioBuffer {
     memset(buffer, 0, size*channels*sizeof(float));
   }
   FloatArray getSamples(int channel) override {
-    ASSERT(channel < channels, "Invalid channel");
+    ASSERT((size_t)channel < channels, "Invalid channel");
     return FloatArray(buffer+channel*size, size);
   }
   int getChannels() override {

From a7ea6a92979e179d4b60cfb90cfba161a181b069 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 9 Jun 2021 17:26:12 +0200
Subject: [PATCH 224/374] fix signedness warnings and use destroy instead of
 delete

---
 TestPatches/DummyPatch.hpp | 5 +++--
 TestPatches/PatchTest.cpp  | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp
index cd2a31fe..d8b3f884 100644
--- a/TestPatches/DummyPatch.hpp
+++ b/TestPatches/DummyPatch.hpp
@@ -48,14 +48,15 @@ class StereoSampleBuffer : public AudioBuffer {
   StereoSampleBuffer(int blocksize){
     left = FloatArray::create(blocksize);
     right = FloatArray::create(blocksize);
+    size = blocksize;
   }
   ~StereoSampleBuffer(){
     FloatArray::destroy(left);
     FloatArray::destroy(right);
   }
   void split16(int16_t* input, uint16_t blocksize){
-    size = blocksize;
-    for(int i=0; ipatch != NULL, "Missing test patch");    
   AudioBuffer* samples = AudioBuffer::create(CHANNELS, BLOCKSIZE);
   getInitialisingPatchProcessor()->patch->processAudio(*samples);
-  delete samples;
+  AudioBuffer::destroy(samples);
   delete getInitialisingPatchProcessor()->patch;  
   return errorcode;
 }

From 6edf70509051350a0a6db6611ba3b71c158bf254 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 9 Jun 2021 17:26:30 +0200
Subject: [PATCH 225/374] check all leaks with valgrind and track origins

---
 native.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/native.mk b/native.mk
index a2c17bcf..d7be5120 100644
--- a/native.mk
+++ b/native.mk
@@ -74,7 +74,7 @@ run: native
 	@$(BUILD)/Test/patch
 
 grind: native
-	valgrind --leak-check=full $(BUILD)/Test/patch
+	valgrind --leak-check=full --show-leak-kinds=all --track-origins=yes $(BUILD)/Test/patch
 
 test: $(TESTPATCHES)/PatchTest.cpp $(DEPS) $(OBJS)
 	@$(CXX) $(CPPFLAGS) $(CXXFLAGS) $(TESTPATCHES)/PatchTest.cpp -I$(BUILD) $(OBJS) -o $(BUILD)/Test/$@

From 48777f25a3e65a93bf9bf2d4159eec1455cd59d1 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 9 Jun 2021 17:26:44 +0200
Subject: [PATCH 226/374] set -O3 optimisation

---
 compile.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/compile.mk b/compile.mk
index 9538437d..24a5cf79 100644
--- a/compile.mk
+++ b/compile.mk
@@ -7,7 +7,7 @@ ASFLAGS      = -g
 endif
 
 ifeq ($(CONFIG),Release)
-CPPFLAGS    ?= -Os -specs=nano.specs -ffast-math -DNDEBUG
+CPPFLAGS    ?= -O3 -specs=nano.specs -ffast-math -DNDEBUG
 endif
 
 # Code Paths

From 1a4f70acf693ef9d4e0ac63652b335bb974e40bd Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 18 Jun 2021 14:56:27 +0200
Subject: [PATCH 227/374] added clear() methods

---
 LibSource/DelayProcessor.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 185daa09..9f3a540e 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -24,6 +24,9 @@ class DelayProcessor : public SignalProcessor {
     delay = samples;
     buffer.setDelay(samples);
   }
+  void clear(){
+    buffer.clear();
+  }
   float process(float input){
     buffer.write(input);
     return buffer.read();
@@ -57,6 +60,9 @@ class FractionalDelayProcessor : public SignalProcessor {
   void setDelay(float samples){
     delay = samples;
   }
+  void clear(){
+    buffer.clear();
+  }
   float process(float input){
     float sample = buffer.readAt(buffer.getWriteIndex() - delay);
     buffer.write(input);
@@ -94,6 +100,9 @@ class FastFractionalDelayProcessor : public SignalProcessor {
   void setDelay(float samples){
     delay = samples;
   }
+  void clear(){
+    buffer.clear();
+  }
   float process(float input){
     buffer.setDelay(delay);
     buffer.write(input);
@@ -135,6 +144,9 @@ class CrossFadingDelayProcessor : public SignalProcessor {
   void setDelay(float samples){
     delay = samples;
   }
+  void clear(){
+    ringbuffer->clear();
+  }
   float process(float input){
     ringbuffer->write(input);
     float sample = ringbuffer->read();

From ea8380b55bb920755da5ae286e8f60634180e61d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 18 Jun 2021 14:56:57 +0200
Subject: [PATCH 228/374] bug fixes

---
 LibSource/RampOscillator.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 7fe14baf..99ac89ab 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -17,6 +17,7 @@ class RampOscillator : public Oscillator {
   float getSample();
 public:
   RampOscillator(float sr) : phase(0.0f), incr(0.0f) {
+    setSampleRate(sr);
   }
   RampOscillator(float freq, float sr) : phase(0.0f){
     setSampleRate(sr);
@@ -70,7 +71,7 @@ class RampOscillator : public Oscillator {
     }
   }
   float generate(float fm){
-    float sample = phase;
+    float sample = getSample();
     phase += incr * (1 + fm);
     if(phase >= 1.0f)
       phase -= 2.0f;
@@ -78,7 +79,7 @@ class RampOscillator : public Oscillator {
   }  
   void generate(FloatArray output, FloatArray fm){
     for(size_t i=0; i= 1)
 	phase -= 2;
@@ -128,7 +129,7 @@ float RampOscillator::getSample(){
 typedef RampOscillator AntialiasedSquareOscillator;
 
 // template
-// class SquareOscillator : public RampOscillator {
+// class SquareOscillator : public RampOscillator {
 // protected:
 //   float pw = 0;
 // public:

From bbee8010886dc1c8af03911231963290fd02e420 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 04:52:29 +0200
Subject: [PATCH 229/374] updated to produce output range [-1, 1]

---
 LibSource/AgnesiOscillator.h | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/LibSource/AgnesiOscillator.h b/LibSource/AgnesiOscillator.h
index 88c7d34b..fcac5c2c 100644
--- a/LibSource/AgnesiOscillator.h
+++ b/LibSource/AgnesiOscillator.h
@@ -35,12 +35,16 @@ class AgnesiOscillator : public Oscillator {
   float getPhase(){
     return M_PI*x/N+M_PI;
   }
+  void reset(){
+    x = -N;
+  }
   /**
    * Normalise offset and gain so that signal is between 0 and 1
    */
   void normalise(){
     offset = agnesi(N, a);
-    gain = 1/(agnesi(0, a) - offset);
+    gain = 2/(agnesi(0, a) - offset);
+    offset += 0.5;
   }
   float generate(){
     float y = agnesi(x, a);

From d5b49bbfae6a84be11386e6f7cffd34d7a2f94d0 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 04:53:27 +0200
Subject: [PATCH 230/374] size doesn't have to be const

---
 LibSource/CircularBuffer.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 6af26dd8..15162048 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -8,7 +8,7 @@ template
 class CircularBuffer {
 protected:
   T* data;
-  const size_t size;
+  size_t size;
   size_t writepos = 0;
   size_t readpos = 0;
 public:

From b6bfef537c255f8f2694fb738fc64d35edc9036b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 04:53:58 +0200
Subject: [PATCH 231/374] refactored oscillators

---
 LibSource/Oscillator.h     |  71 ++++++++++-
 LibSource/RampOscillator.h | 239 ++++++++++++++-----------------------
 LibSource/SineOscillator.h |  69 ++---------
 3 files changed, 168 insertions(+), 211 deletions(-)

diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index 9258d991..c227f011 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -38,7 +38,7 @@ class Oscillator : public SignalGenerator {
   /**
    * Reset oscillator (typically resets phase)
    */
-  virtual void reset(){}
+  virtual void reset() = 0;
   /**
    * Produce a sample with frequency modulation.
    */
@@ -62,16 +62,75 @@ class Oscillator : public SignalGenerator {
   void getSamples(FloatArray output, FloatArray fm){
     generate(output, fm);
   }
+};
+
+template
+class OscillatorTemplate : public Oscillator {
+protected:
+  float mul;
+  float phase;
+  float incr;
+public:
+  void setSampleRate(float sr){
+    float freq = getFrequency();
+    mul = (T::end_phase - T::begin_phase)/sr;
+    setFrequency(freq);
+  }
+  float getSampleRate(){
+    return (T::end_phase - T::begin_phase)/mul;
+  }
+  void setFrequency(float freq){
+    incr = freq*mul;
+  }
+  float getFrequency(){
+    return incr/mul;
+  }
+  void setPhase(float ph){
+    phase = (T::end_phase - T::begin_phase)*ph/(2*M_PI) + T::begin_phase;
+  }
+  float getPhase(){
+    // return phase 0 to 2*pi
+    return (phase - T::begin_phase)*2*M_PI/(T::end_phase - T::begin_phase);
+  }
+  void reset(){
+    phase = T::begin_phase;
+  }
+  float generate(){
+    float sample = static_cast(this)->getSample();
+    phase += incr;
+    if(phase >= T::end_phase)
+      phase -= (T::end_phase - T::begin_phase);
+    return sample;
+  }
+  float generate(float fm){
+    float sample = static_cast(this)->getSample();
+    phase += incr * (1 + fm);
+    if(phase >= T::end_phase)
+      phase -= (T::end_phase - T::begin_phase);
+    return sample;
+  }  
+  using Oscillator::generate;
+  static T* create(float sr){
+    T* obj = new T();
+    obj->setSampleRate(sr);
+    return obj;
+  }
+  static void destroy(T* osc){
+    delete osc;
+  }
 protected:
   static float polyblep(float t, float dt){
-    if(t < dt){ // 0 <= t < 1
-      t /= dt;
+    // PolyBLEP by various
+    // http://research.spa.aalto.fi/publications/papers/smc2010-phaseshaping/
+    // https://www.kvraudio.com/forum/viewtopic.php?t=375517
+    // http://www.martin-finke.de/blog/articles/audio-plugins-018-polyblep-oscillator/
+    if(t < T::begin_phase + dt){
+      t = (t - T::begin_phase) / dt;
       return t+t - t*t - 1;
-    }else if(t > 1.0 - dt){ // -1 < t < 0      
-      t = (t - 1.0) / dt;
+    }else if(t > T::end_phase - dt){
+      t = (t - T::end_phase) / dt;
       return t*t + t+t + 1;
     }
-    // 0 otherwise
     return 0;
   }
 };
diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 99ac89ab..3bcfcef0 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -3,170 +3,115 @@
 
 #include "Oscillator.h"
 
-enum Waveshape { RAMP_SHAPE, POLYBLEP_RAMP_SHAPE, SQUARE_SHAPE, POLYBLEP_SQUARE_SHAPE, TRIANGLE_SHAPE, POLYBLEP_TRIANGLE_SHAPE };
-
 /**
  * Ramp oscillator generates rising output values from -1 to 1.
  */
-template
-class RampOscillator : public Oscillator {
-protected:
-  float mul;
-  float phase;
-  float incr;
-  float getSample();
+class RampOscillator : public OscillatorTemplate {
 public:
-  RampOscillator(float sr) : phase(0.0f), incr(0.0f) {
-    setSampleRate(sr);
-  }
-  RampOscillator(float freq, float sr) : phase(0.0f){
-    setSampleRate(sr);
-    setFrequency(freq);
+  static constexpr float begin_phase = -1;
+  static constexpr float end_phase = 1;
+  float getSample(){
+    return phase;
   }
-  void reset(){
-    phase = -1;
+};
+
+class AntialisedRampOscillator : public OscillatorTemplate {
+public:
+  static constexpr float begin_phase = -1;
+  static constexpr float end_phase = 1;
+  float getSample(){
+    return phase - polyblep(phase, incr);
   }
-  void setSampleRate(float sr){
-    mul = 2.0f/sr;
+};
+
+class TriangleOscillator : public OscillatorTemplate {
+public:
+  static constexpr float begin_phase = -1;
+  static constexpr float end_phase = 1;
+  float getSample(){
+    return -2 * (fabsf(phase) - 0.5);
   }
-  float getSampleRate(){
-    return 2.0f/mul;
+};
+
+class SquareOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
   }
-  void setFrequency(float freq){
-    incr = freq*mul;
+  float getSample(){
+    return phase < pw ? 1 : -1;
   }
-  float getFrequency(){
-    return incr/mul;
+};
+
+class InvertedSquareOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
   }
-  void setPhase(float ph){
-    phase = ph/M_PI - 1.0f; // internal phase is -1 to 1
+  float getSample(){
+    return phase < pw ? -1 : 1;
   }
-  float getPhase(){
-    // return phase 0 to 2*pi
-    return phase*M_PI+M_PI;
+};
+
+class AntialiasedSquareOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5f;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
   }
-  float generate(){
-    float sample = getSample();
-    phase += incr;
-    if(phase >= 1.0f)
-      phase -= 2.0f;
+  float getSample(){
+    float sample = phase < pw ? 1 : -1;
+    sample += polyblep(incr, phase);
+    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
     return sample;
   }
-  void generate(FloatArray output){
-    size_t len = output.getSize();
-    float* dest = output;
-    while(phase + incr*len >= 1.0f){
-      float remain = 1.0f - phase;
-      size_t steps = (size_t)(remain/incr);
-      for(size_t i=0; i {
+protected:
+  float pw = 0.5f;
+  float previousSample = 0;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
   }
-  float generate(float fm){
-    float sample = getSample();
-    phase += incr * (1 + fm);
-    if(phase >= 1.0f)
-      phase -= 2.0f;
+  float getSample(){
+    float sample = phase < pw ? 1 : -1;
+    sample += polyblep(incr, phase);
+    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
+    // Leaky integrator: y[n] = A * x[n] + (1 - A) * y[n-1] = A * (x[n] - y[n-1]) + y[n-1]
+    float lambda = incr;
+    // float lambda = incr*2*M_PI;
+    sample = lambda * sample + (1 - lambda) * previousSample;
+    // sample = lambda * (sample - previousSample) + previousSample;
+    previousSample = sample;
     return sample;
-  }  
-  void generate(FloatArray output, FloatArray fm){
-    for(size_t i=0; i= 1)
-	phase -= 2;
-    }
-  }
-  static RampOscillator* create(float sr){
-    return new RampOscillator(sr);
-  }
-  static RampOscillator* create(float freq, float sr){
-    return new RampOscillator(freq, sr);
-  }
-  static void destroy(RampOscillator* osc){
-    delete osc;
   }
 };
 
-template<>
-float RampOscillator::getSample(){
-  return phase;
-}
-
-template<>
-float RampOscillator::getSample(){
-  return phase - polyblep(incr, phase);
-}
-typedef RampOscillator AntialisedRampOscillator;
-
-template<>
-float RampOscillator::getSample(){
-  return -2 * (fabsf(phase) - 0.5);
-}
-typedef RampOscillator TriangleOscillator;
-
-template<>
-float RampOscillator::getSample(){
-  return phase < 0 ? 1 : -1;
-}
-typedef RampOscillator SquareOscillator;
-
-template<>
-float RampOscillator::getSample(){
-  float sample = phase < 0 ? 1 : -1;
-  sample += polyblep(incr, phase);
-  sample -= polyblep(incr, fmodf(phase + 1, 2));
-  return sample;
-}
-typedef RampOscillator AntialiasedSquareOscillator;
-
-// template
-// class SquareOscillator : public RampOscillator {
-// protected:
-//   float pw = 0;
-// public:
-//   /**
-//    * set pulse width to a value between 0 and 1
-//    */
-//   void setPulseWidth(float value){
-//     pw = value*2 - 1; // scale to [-1,1]
-//   }
-// };
-
-// template<>
-// float SquareOscillator::getSample(){
-//   return phase < pw ? 1 : -1;
-// }
-
-// template<>
-// float SquareOscillator::getSample(){
-//   float sample = phase < pw ? 1 : -1;
-//   sample += polyblep(incr, phase);
-//   sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
-//   return sample;
-// }
-// typedef SquareOscillator AntialiasedSquareOscillator;
-
-// class AntialiasedTriangleOscillator : public AntialiasedSquareOscillator {
-// protected:
-//   float previousSample = 0;
-// };
-
-// float AntialiasedTriangleOscillator::getSample(){
-//   float sample = AntialiasedSquareOscillator::getSample();
-//     // Leaky integrator: y[n] = A * x[n] + (1 - A) * y[n-1] = A * (x[n] - y[n-1]) + y[n-1]
-//     float lambda = incr*0.5;
-//     sample = lambda * (sample - previousSample) + previousSample;
-//     previousSample = sample;
-//     return sample;
-// }
-
 #endif /* __RampOscillator_h */
diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h
index b202b687..71093359 100644
--- a/LibSource/SineOscillator.h
+++ b/LibSource/SineOscillator.h
@@ -3,45 +3,12 @@
 
 #include "Oscillator.h"
 
-class SineOscillator : public Oscillator {
-private:
-  float mul;
-  float phase;
-  float incr;
+class SineOscillator : public OscillatorTemplate {
 public:
-  SineOscillator(float sr=48000) : mul(2*M_PI/sr), phase(0), incr(0) {}
-  SineOscillator(float freq, float sr) : mul(2*M_PI/sr), phase(0.0f) {
-    setFrequency(freq);
-  }
-  void reset(){
-    phase = 0.0f;
-  }
-  void setSampleRate(float sr){
-    float freq = getFrequency();
-    mul = 2*M_PI/sr;
-    setFrequency(freq);
-  }
-  float getSampleRate(){
-    return (2*M_PI)/mul;
-  }
-  void setFrequency(float freq){
-    incr = freq*mul;
-  }
-  float getFrequency(){
-    return incr/mul;
-  }
-  void setPhase(float ph){
-    phase = ph;
-  }
-  float getPhase(){
-    return phase;
-  }
-  float generate(){
-    float sample = sinf(phase);
-    phase += incr;
-    if(phase >= 2*M_PI)
-      phase -= 2*M_PI;
-    return sample;
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 2*M_PI;
+  float getSample(){
+    return sinf(phase);
   }
   void generate(FloatArray output){
     size_t len = output.getSize();
@@ -49,32 +16,18 @@ class SineOscillator : public Oscillator {
       output[i] = sinf(phase);
       phase += incr; // allow phase to overrun
     }
-    phase = fmodf(phase, 2*M_PI);
-  }
-  float generate(float fm){
-    float sample = sinf(phase);
-    phase += incr * (1 + fm);
-    if(phase >= 2*M_PI)
-      phase -= 2*M_PI;
-    return sample;
+    phase = fmodf(phase, end_phase);
   }
   void generate(FloatArray output, FloatArray fm){
-    for(size_t i=0; i= 2*M_PI)
-	phase -= 2*M_PI;
+      // allow phase to overrun
     }
+    phase = fmodf(phase, end_phase);
   }
-  static SineOscillator* create(float sr){
-    return new SineOscillator(sr);
-  }
-  static SineOscillator* create(float freq, float sr){
-    return new SineOscillator(freq, sr);
-  }
-  static void destroy(SineOscillator* osc){
-    delete osc;
-  }
+  using OscillatorTemplate::generate;  
 };
 
 #endif /* SINE_OSCILLATOR_H */

From e0d98fbe0a4004f24215b826838c2b505cf42119 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 04:54:59 +0200
Subject: [PATCH 232/374] changed min/max/clamp macros to use
 std::min/max/clamp from algorithm

---
 LibSource/TapTempo.h   |  2 +-
 LibSource/basicmaths.h | 41 ++++++++++++++++++++++++++---------------
 compile.mk             |  4 ++--
 3 files changed, 29 insertions(+), 18 deletions(-)

diff --git a/LibSource/TapTempo.h b/LibSource/TapTempo.h
index 41f0cb38..0ef0c2ae 100644
--- a/LibSource/TapTempo.h
+++ b/LibSource/TapTempo.h
@@ -109,7 +109,7 @@ class AdjustableTapTempo : public TapTempo {
   void adjust(uint16_t s){
     if(abs(speed-s) > 16){
       int64_t delta = (int64_t)samples*(speed-s)/2048;
-      samples = max(1, samples+delta);
+      samples = max(1ll, samples+delta);
       speed = s;
     }
   }
diff --git a/LibSource/basicmaths.h b/LibSource/basicmaths.h
index c36b8507..88ccc450 100644
--- a/LibSource/basicmaths.h
+++ b/LibSource/basicmaths.h
@@ -3,6 +3,7 @@
 
 #include 
 #include 
+#include 
 #include "heap.h"
 
 #define _USE_MATH_DEFINES
@@ -37,18 +38,23 @@
 #ifndef M_SQRT2
 #define M_SQRT2 1.41421356237309504880
 #endif
-#ifndef min
-#define min(a,b) ((a)<(b)?(a):(b))
-#endif
-#ifndef max
-#define max(a,b) ((a)>(b)?(a):(b))
-#endif
-#ifndef abs
-#define abs(x) ((x)>0?(x):-(x))
-#endif
-#ifndef clamp
-#define clamp(x, lo, hi) ((x)>(hi)?(hi):((x)<(lo)?(lo):(x)))
-#endif
+/* #ifndef min */
+/* #define min(a,b) ((a)<(b)?(a):(b)) */
+/* #endif */
+/* #ifndef max */
+/* #define max(a,b) ((a)>(b)?(a):(b)) */
+/* #endif */
+/* #ifndef abs */
+/* #define abs(x) ((x)>0?(x):-(x)) */
+/* #endif */
+/* #ifndef clamp */
+/* #define clamp(x, lo, hi) ((x)>(hi)?(hi):((x)<(lo)?(lo):(x))) */
+/* #endif */
+
+using std::min;
+using std::max;
+using std::abs;
+using std::clamp;
 
 #ifdef __cplusplus
  extern "C" {
@@ -96,8 +102,8 @@ void* pvPortRealloc(void *pv, size_t xWantedSize);
 #define sinf(x) arm_sin_f32(x)
 #define cos(x) arm_cos_f32(x)
 #define cosf(x) arm_cos_f32(x)
-#define sqrt(x) arm_sqrtf(x)
-#define sqrtf(x) arm_sqrtf(x)
+#define sqrt(x) sqrtf(x)
+/* #define sqrtf(x) arm_sqrtf(x) */
 #define rand() arm_rand32()
 
 #ifdef __FAST_MATH__ /* set by gcc option -ffast-math */
@@ -123,7 +129,12 @@ void* pvPortRealloc(void *pv, size_t xWantedSize);
 #define log10(x) fast_log10f(x)
 #define log10f(x) fast_log10f(x)
 
-#endif
+#else /* __FAST_MATH__ */
+
+#define exp10(x) powf(10, x)
+#define exp10f(x) powf(10, x)
+
+#endif /* __FAST_MATH__ */
 
 #undef RAND_MAX
 #define RAND_MAX UINT32_MAX
diff --git a/compile.mk b/compile.mk
index 24a5cf79..39734d0f 100644
--- a/compile.mk
+++ b/compile.mk
@@ -7,7 +7,7 @@ ASFLAGS      = -g
 endif
 
 ifeq ($(CONFIG),Release)
-CPPFLAGS    ?= -O3 -specs=nano.specs -ffast-math -DNDEBUG
+CPPFLAGS    ?= -O3 -ffast-math -DNDEBUG
 endif
 
 # Code Paths
@@ -64,7 +64,7 @@ INC_FLAGS += -I$(USB_DEVICE_FILE)/Core/inc -I$(USB_DEVICE_FILE)/Class/cdc/inc
 INC_FLAGS += -I$(USB_OTG_FILE)/inc
 CPPFLAGS += $(ARCH_FLAGS) $(INC_FLAGS) $(DEF_FLAGS)
 CFLAGS   += -std=gnu11
-CXXFLAGS += -std=gnu++14
+CXXFLAGS += -std=gnu++17
 LDFLAGS  += -T$(LDSCRIPT) $(ARCH_FLAGS)
 CPPFLAGS += -I$(PATCHSOURCE)
 CPPFLAGS += -I$(LIBSOURCE)

From eee41cc67d4d5486840f119d662cb151c360dd33 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 05:19:22 +0200
Subject: [PATCH 233/374] revert to macros for c only

---
 LibSource/basicmaths.h | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/LibSource/basicmaths.h b/LibSource/basicmaths.h
index 88ccc450..c965d3c4 100644
--- a/LibSource/basicmaths.h
+++ b/LibSource/basicmaths.h
@@ -3,7 +3,6 @@
 
 #include 
 #include 
-#include 
 #include "heap.h"
 
 #define _USE_MATH_DEFINES
@@ -28,8 +27,25 @@
 
 #ifdef __cplusplus
 #include 
+#include 
+using std::min;
+using std::max;
+using std::abs;
+using std::clamp;
 #else
 #include 
+#ifndef min
+#define min(a,b) ((a)<(b)?(a):(b))
+#endif
+#ifndef max
+#define max(a,b) ((a)>(b)?(a):(b))
+#endif
+#ifndef abs
+#define abs(x) ((x)>0?(x):-(x))
+#endif
+#ifndef clamp
+#define clamp(x, lo, hi) ((x)>(hi)?(hi):((x)<(lo)?(lo):(x)))
+#endif
 #endif
 
 #ifndef M_PI
@@ -38,23 +54,7 @@
 #ifndef M_SQRT2
 #define M_SQRT2 1.41421356237309504880
 #endif
-/* #ifndef min */
-/* #define min(a,b) ((a)<(b)?(a):(b)) */
-/* #endif */
-/* #ifndef max */
-/* #define max(a,b) ((a)>(b)?(a):(b)) */
-/* #endif */
-/* #ifndef abs */
-/* #define abs(x) ((x)>0?(x):-(x)) */
-/* #endif */
-/* #ifndef clamp */
-/* #define clamp(x, lo, hi) ((x)>(hi)?(hi):((x)<(lo)?(lo):(x))) */
-/* #endif */
 
-using std::min;
-using std::max;
-using std::abs;
-using std::clamp;
 
 #ifdef __cplusplus
  extern "C" {

From 04b1befa5f050e5fd2894e9c30f2812cbfcbb226 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 05:19:36 +0200
Subject: [PATCH 234/374] fix some tests

---
 TestPatches/SineOscillatorTestPatch.hpp | 19 +++++++++++++------
 1 file changed, 13 insertions(+), 6 deletions(-)

diff --git a/TestPatches/SineOscillatorTestPatch.hpp b/TestPatches/SineOscillatorTestPatch.hpp
index 213f02e5..6c894792 100644
--- a/TestPatches/SineOscillatorTestPatch.hpp
+++ b/TestPatches/SineOscillatorTestPatch.hpp
@@ -6,23 +6,28 @@ class SineOscillatorTestPatch : public TestPatch {
   SineOscillatorTestPatch(){
     {
       TEST("ctor");
-      SineOscillator osc(440, 16000);
+      SineOscillator osc;
+      osc.setSampleRate(16000);
+      osc.setFrequency(440);
       CHECK_EQUAL(osc.getSampleRate(), 16000);
       CHECK_EQUAL((int)osc.getFrequency(), 440);
-      osc = SineOscillator(32000);
+      osc = SineOscillator();
+      osc.setSampleRate(32000);
       CHECK_EQUAL(osc.getFrequency(), 0.0f);
       CHECK_EQUAL(osc.getSampleRate(), 32000);
     }
     {
       TEST("create");
-      SineOscillator* osc = SineOscillator::create(120, 32000);
+      SineOscillator* osc = SineOscillator::create(32000);
+      osc->setFrequency(120);
       CHECK_EQUAL(osc->getSampleRate(), 32000);
       CHECK_EQUAL(osc->getFrequency(), 120);
       SineOscillator::destroy(osc);
     }
     {
       TEST("setSampleRate");
-      SineOscillator* osc = SineOscillator::create(321, 44100);
+      SineOscillator* osc = SineOscillator::create(44100);
+      osc->setFrequency(321);
       CHECK_EQUAL(osc->getSampleRate(), 44100);
       CHECK_EQUAL(osc->getFrequency(), 321);
       osc->setSampleRate(48000);
@@ -32,8 +37,10 @@ class SineOscillatorTestPatch : public TestPatch {
     }
     {
       TEST("compareBlockAndSampleBased");
-      SineOscillator* osc1 = SineOscillator::create(480, 48000);
-      SineOscillator* osc2 = SineOscillator::create(480, 48000);
+      SineOscillator* osc1 = SineOscillator::create(48000);
+      SineOscillator* osc2 = SineOscillator::create(48000);
+      osc1->setFrequency(480);      
+      osc2->setFrequency(480);      
       FloatArray s1 = FloatArray::create(1000);
       FloatArray s2 = FloatArray::create(1000);
       osc1->generate(s1);

From 88327384a4a482e1ad47610849e208628164a9d9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 05:20:01 +0200
Subject: [PATCH 235/374] changed min/max/clamp macros to use
 std::min/max/clamp from algorithm

---
 LibSource/FloatArray.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/FloatArray.cpp b/LibSource/FloatArray.cpp
index 7114c76b..4109c310 100644
--- a/LibSource/FloatArray.cpp
+++ b/LibSource/FloatArray.cpp
@@ -454,7 +454,7 @@ void FloatArray::scale(float from, float to, FloatArray destination){
 void FloatArray::softclip(FloatArray destination){
   for(size_t i=0; i
Date: Fri, 25 Jun 2021 05:20:28 +0200
Subject: [PATCH 236/374] added required reset()

---
 LibSource/PolyBlepOscillator.h  | 3 +++
 LibSource/WavetableOscillator.h | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/LibSource/PolyBlepOscillator.h b/LibSource/PolyBlepOscillator.h
index 6fb28522..d47252d6 100644
--- a/LibSource/PolyBlepOscillator.h
+++ b/LibSource/PolyBlepOscillator.h
@@ -25,6 +25,9 @@ class PolyBlepOscillator : public Oscillator {
   float getPulseWidth();
   void setPhase(float phase);
   float getPhase();
+  void reset(){
+    setPhase(0);
+  }
   float generate();
   float generate(float fm);
   /* put a block of output samples into @param output */
diff --git a/LibSource/WavetableOscillator.h b/LibSource/WavetableOscillator.h
index 128b404d..639166a3 100644
--- a/LibSource/WavetableOscillator.h
+++ b/LibSource/WavetableOscillator.h
@@ -18,6 +18,9 @@ class WavetableOscillator : public Oscillator {
   float getFrequency();
   float getSample(float phase);
   void setPhase(float phase);
+  void reset(){
+    setPhase(0);
+  }
   float getPhase();
   float generate();
   float generate(float fm);

From 1d77f7184168215c3f190e065ae5c74bcab92ab9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 05:20:52 +0200
Subject: [PATCH 237/374] fix includes

---
 LibSource/Oscillator.h            | 1 +
 LibSource/WavetableOscillator.cpp | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index c227f011..16a6329f 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -1,6 +1,7 @@
 #ifndef __Oscillator_h
 #define __Oscillator_h
 
+#include "basicmaths.h"
 #include "FloatArray.h"
 #include "SignalGenerator.h"
 
diff --git a/LibSource/WavetableOscillator.cpp b/LibSource/WavetableOscillator.cpp
index 623474e2..12a1169c 100644
--- a/LibSource/WavetableOscillator.cpp
+++ b/LibSource/WavetableOscillator.cpp
@@ -1,5 +1,4 @@
 #include "WavetableOscillator.h"
-#include "basicmaths.h"
 #include 
 
 WavetableOscillator::WavetableOscillator(float sr, const FloatArray wavetable):

From aaf22f0cd180be79837c4dc6e9b7e4f7d3bcebe4 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 05:21:23 +0200
Subject: [PATCH 238/374] use gnu++17 to support std::clamp (and strnlen)

---
 native.mk | 2 +-
 web.mk    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/native.mk b/native.mk
index d7be5120..a036d64e 100644
--- a/native.mk
+++ b/native.mk
@@ -21,7 +21,7 @@ CPPFLAGS    += -I$(LIBSOURCE)
 CPPFLAGS    += -I$(BUILDSOURCE)
 CPPFLAGS    += -I$(TESTPATCHES)
 CPPFLAGS    += -ILibraries -ILibraries/KissFFT
-CXXFLAGS     = -std=c++14
+CXXFLAGS     = -std=gnu++17
 LDLIBS       = -lm
 LDFLAGS      = -Wl,--gc-sections
 
diff --git a/web.mk b/web.mk
index ec109e84..f1cc0d73 100644
--- a/web.mk
+++ b/web.mk
@@ -51,7 +51,7 @@ EMCCFLAGS += -s WASM=0 # disables wasm output
 
 CPPFLAGS =
 CFLAGS   = $(EMCCFLAGS) -std=gnu11
-CXXFLAGS = $(EMCCFLAGS) -std=gnu++14
+CXXFLAGS = $(EMCCFLAGS) -std=gnu++17
 LDFLAGS  = $(EMCCFLAGS)
 
 EMCC_OBJS = $(addprefix $(WEBDIR)/, $(notdir $(CPP_SRC:.cpp=.o)))

From 654ae6897ae2d7eb9a8e2fca703022b76e966aa6 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 25 Jun 2021 15:59:46 +0200
Subject: [PATCH 239/374] divide by 128.0 for 7-bit range [0,1)

---
 LibSource/AbstractSynth.h                     | 6 +++---
 LibSource/MidiPolyphonicExpressionProcessor.h | 6 +++---
 LibSource/PolyphonicProcessor.h               | 6 +++---
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index 88c63b30..64f89806 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -64,15 +64,15 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
   }
   virtual void controlChange(MidiMessage msg) override {
     if(msg.getControllerNumber() == MIDI_CC_MODULATION)
-      setModulation(msg.getControllerValue()/127.0f);
+      setModulation(msg.getControllerValue()/128.0f);
     else if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
       allNotesOff();
   }
   virtual void channelPressure(MidiMessage msg) override {
-    setPressure(msg.getChannelPressure()/127.0f);
+    setPressure(msg.getChannelPressure()/128.0f);
   }
   virtual void polyKeyPressure(MidiMessage msg) override {
-    setPressure(msg.getPolyKeyPressure()/127.0f);
+    setPressure(msg.getPolyKeyPressure()/128.0f);
   }
   virtual void setModulation(float modulation){} // default implementation does nothing
   virtual void setPressure(float pressure){}
diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index 75012950..be41818d 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -107,7 +107,7 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatorsetModulation(value + modulation[i]);
@@ -206,7 +206,7 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatorsetPressure(value + pressure[i]);
@@ -225,7 +225,7 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatorgetNote() == note)
-	  Allocator::voice[i]->setPressure(msg.getPolyKeyPressure()/127.0f);
+	  Allocator::voice[i]->setPressure(msg.getPolyKeyPressure()/128.0f);
     }
   }
   bool getSustain(){
diff --git a/LibSource/PolyphonicProcessor.h b/LibSource/PolyphonicProcessor.h
index eb7727c7..0dcab596 100644
--- a/LibSource/PolyphonicProcessor.h
+++ b/LibSource/PolyphonicProcessor.h
@@ -83,7 +83,7 @@ class PolyphonicProcessor : public VoiceAllocator {
       Allocator::voice[i]->pitchbend(msg);
   }
   void modulate(MidiMessage msg){
-    float value = msg.getControllerValue()/127.0f;
+    float value = msg.getControllerValue()/128.0f;
     for(int i=0; isetModulation(value);
   }
@@ -93,14 +93,14 @@ class PolyphonicProcessor : public VoiceAllocator {
   void channelPressure(MidiMessage msg){
     // route channel pressure to all voices
     for(int i=0; isetPressure(msg.getChannelPressure()/127.0f);
+      Allocator::voice[i]->setPressure(msg.getChannelPressure()/128.0f);
   }
   void polyKeyPressure(MidiMessage msg){
     // route poly key pressure to the right voice
     uint8_t note = msg.getNote();
     for(int i=0; isetPressure(msg.getPolyKeyPressure()/127.0f);
+	Allocator::voice[i]->setPressure(msg.getPolyKeyPressure()/128.0f);
   }
   bool getSustain(){
     return dosustain;

From 1d049715f3ad9855fd39e4a81832a46130b8142b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 1 Jul 2021 13:28:15 +0200
Subject: [PATCH 240/374] prevent std::max warnings

---
 LibSource/TapTempo.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/TapTempo.h b/LibSource/TapTempo.h
index 0ef0c2ae..a876dd01 100644
--- a/LibSource/TapTempo.h
+++ b/LibSource/TapTempo.h
@@ -109,7 +109,7 @@ class AdjustableTapTempo : public TapTempo {
   void adjust(uint16_t s){
     if(abs(speed-s) > 16){
       int64_t delta = (int64_t)samples*(speed-s)/2048;
-      samples = max(1ll, samples+delta);
+      samples = max(int64_t(1), int64_t(samples+delta));
       speed = s;
     }
   }

From 2995459c2f0472a5124e3d95912b3f5ab2276b1b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 1 Jul 2021 13:39:52 +0200
Subject: [PATCH 241/374] normalise phase increment in polyblep method

---
 LibSource/Oscillator.h | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index 16a6329f..354a0344 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -125,11 +125,15 @@ class OscillatorTemplate : public Oscillator {
     // http://research.spa.aalto.fi/publications/papers/smc2010-phaseshaping/
     // https://www.kvraudio.com/forum/viewtopic.php?t=375517
     // http://www.martin-finke.de/blog/articles/audio-plugins-018-polyblep-oscillator/
+    // https://www.metafunction.co.uk/post/all-about-digital-oscillators-part-2-blits-bleps
+    // if t and dt are normalised before call then end/begin phase are not needed    
     if(t < T::begin_phase + dt){
-      t = (t - T::begin_phase) / dt;
+      dt = dt / (T::end_phase - T::begin_phase); // normalise phase increment
+      t = (t - T::begin_phase) / dt; // distance from discontinuity
       return t+t - t*t - 1;
     }else if(t > T::end_phase - dt){
-      t = (t - T::end_phase) / dt;
+      dt = dt / (T::end_phase - T::begin_phase); // normalise phase increment
+      t = (t - T::end_phase) / dt; // distance from discontinuity
       return t*t + t+t + 1;
     }
     return 0;

From 561cd93e0e20f051378ea9bc2681f50b28903504 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 1 Jul 2021 13:46:32 +0200
Subject: [PATCH 242/374] fixed TapTempo::setFrequency() (was setting period
 instead of frequency)

---
 LibSource/TapTempo.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/TapTempo.h b/LibSource/TapTempo.h
index a876dd01..77dbec2e 100644
--- a/LibSource/TapTempo.h
+++ b/LibSource/TapTempo.h
@@ -58,7 +58,7 @@ class TapTempo {
    * Set tap tempo frequency.
    */
   void setFrequency(float freq){
-    samples = freq*sr;
+    samples = sr/freq;
   }
   /**
    * Get tap tempo period in samples.

From 74e7875c9ba8469397fc1e61ca6e40e1780e5103 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 2 Jul 2021 00:14:30 +0200
Subject: [PATCH 243/374] updated with latest definitions

---
 LibSource/OpenWareMidiControl.h | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/LibSource/OpenWareMidiControl.h b/LibSource/OpenWareMidiControl.h
index be069080..dc63a482 100644
--- a/LibSource/OpenWareMidiControl.h
+++ b/LibSource/OpenWareMidiControl.h
@@ -2,7 +2,7 @@
 #define OPENWAREMIDICONTROL_H_INCLUDED
 
 #define MIDI_SYSEX_MANUFACTURER        0x7d     /* Educational or development use only */
-#define MIDI_SYSEX_DEVICE              0x52
+#define MIDI_SYSEX_OMNI_DEVICE         0x52
 #define MIDI_SYSEX_OWL_DEVICE          0x20     /* OWL Open Ware Laboratory */
 #define MIDI_SYSEX_VERSION             0x03     /* Revision */
 
@@ -51,9 +51,6 @@ enum PatchParameterId {
   PARAMETER_DF,
   PARAMETER_DG,
   PARAMETER_DH,
-
-  PARAMETER_FREQ,
-  PARAMETER_GAIN
 };
 
 #define BUTTON_A   BUTTON_1
@@ -85,7 +82,9 @@ enum PatchButtonId {
 #define SYSEX_CONFIGURATION_AUDIO_BLOCKSIZE       "BS"
 #define SYSEX_CONFIGURATION_CODEC_SWAP            "SW"
 #define SYSEX_CONFIGURATION_CODEC_BYPASS          "BY"
+#define SYSEX_CONFIGURATION_CODEC_INPUT_GAIN      "IG"
 #define SYSEX_CONFIGURATION_CODEC_OUTPUT_GAIN     "OG"
+#define SYSEX_CONFIGURATION_CODEC_HIGHPASS        "HP"
 #define SYSEX_CONFIGURATION_PC_BUTTON             "PC"
 #define SYSEX_CONFIGURATION_INPUT_OFFSET          "IO"
 #define SYSEX_CONFIGURATION_INPUT_SCALAR          "IS"
@@ -93,22 +92,33 @@ enum PatchButtonId {
 #define SYSEX_CONFIGURATION_OUTPUT_SCALAR         "OS"
 #define SYSEX_CONFIGURATION_MIDI_INPUT_CHANNEL    "MI"
 #define SYSEX_CONFIGURATION_MIDI_OUTPUT_CHANNEL   "MO"
+#define SYSEX_CONFIGURATION_BUS_ENABLE            "BE"
+#define SYSEX_CONFIGURATION_BUS_FORWARD_MIDI      "BM"
+#define SYSEX_CONFIGURATION_BOOTLOADER_LOCK       "BL"
 
 enum OpenWareMidiSysexCommand {
   SYSEX_PRESET_NAME_COMMAND       = 0x01,
   SYSEX_PARAMETER_NAME_COMMAND    = 0x02,
   SYSEX_CONFIGURATION_COMMAND     = 0x03,
+  SYSEX_RESOURCE_NAME_COMMAND     = 0x04,
+  SYSEX_DEVICE_RESET_COMMAND      = 0x7d,
   SYSEX_BOOTLOADER_COMMAND        = 0x7e,
   SYSEX_FIRMWARE_UPLOAD           = 0x10,
   SYSEX_FIRMWARE_STORE            = 0x11,
   SYSEX_FIRMWARE_RUN              = 0x12,
   SYSEX_FIRMWARE_FLASH            = 0x13,
   SYSEX_FLASH_ERASE               = 0x14,
+  SYSEX_SETTINGS_RESET            = 0x15,
+  SYSEX_SETTINGS_STORE            = 0x16,
+  SYSEX_FIRMWARE_SAVE             = 0x17,
+  SYSEX_FIRMWARE_SEND             = 0x18,
   SYSEX_FIRMWARE_VERSION          = 0x20,
   SYSEX_DEVICE_ID                 = 0x21,
   SYSEX_PROGRAM_MESSAGE           = 0x22,
   SYSEX_DEVICE_STATS              = 0x23,
-  SYSEX_PROGRAM_STATS             = 0x24
+  SYSEX_PROGRAM_STATS             = 0x24,
+  SYSEX_BOOTLOADER_VERSION        = 0x25,
+  SYSEX_PROGRAM_ERROR             = 0x30
 };
 
 /*
@@ -126,6 +136,8 @@ enum OpenWareMidiControl {
 
   PATCH_BUTTON           = 25, /* LED Pushbutton: 0=not pressed, 127=pressed */
   PATCH_CONTROL          = 26, /* Remote control: 0=local, 127=MIDI */
+  PATCH_BUTTON_ON        = 27, /* Switch a button on: 0-127 button id */
+  PATCH_BUTTON_OFF       = 28, /* Switch a button off: 0-127 button id */
   LED                    = 30, /* set/get LED value: 
 				* 0-41 = off
 				* 42-83 = green

From 7ab6f8ed55950d650bdb00ae1d2adcf0cd51cc76 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 2 Jul 2021 10:05:26 +0200
Subject: [PATCH 244/374] AdsrEnvelope renamed LinearAdsrEnvelope

---
 LibSource/Envelope.h                          | 69 -------------------
 .../{Envelope.cpp => LinearAdsrEnvelope.cpp}  | 57 +++++++--------
 LibSource/LinearAdsrEnvelope.h                | 66 ++++++++++++++++++
 LibSource/OpenWareLibrary.h                   |  1 +
 4 files changed, 91 insertions(+), 102 deletions(-)
 rename LibSource/{Envelope.cpp => LinearAdsrEnvelope.cpp} (64%)
 create mode 100644 LibSource/LinearAdsrEnvelope.h

diff --git a/LibSource/Envelope.h b/LibSource/Envelope.h
index 2f201096..819f9e7c 100644
--- a/LibSource/Envelope.h
+++ b/LibSource/Envelope.h
@@ -31,73 +31,4 @@ class Envelope : public SignalGenerator, SignalProcessor {
   }
 };
 
-/**
- * Linear ADSR Envelope
- */
-class AdsrEnvelope : public Envelope {
-private:
-  enum EnvelopeStage { kAttack, kDecay, kSustain, kRelease, kIdle };
-  enum EnvelopeTrigger { kGate, kTrigger };
-
-public:
-  AdsrEnvelope(float sampleRate=48000);
-  virtual ~AdsrEnvelope();
-  using Envelope::process;
-  using Envelope::trigger;
-  using SignalGenerator::generate;
-  void setSampleRate(float sampleRate);
-  void setAttack(float newAttack);
-  void setDecay(float newDecay);
-  void setRelease(float newRelease);
-  void setSustain(float newSustain);
-  void trigger(bool state, int triggerDelay);
-  void setRetrigger(bool on);
-  void gate(bool state);
-  void gate(bool state, int gateDelay);
-  float getLevel();
-  void setLevel(float newLevel);
-  /**
-   * Produce the next envelope sample.
-   */
-  float generate();
-  [[deprecated("use generate() instead.")]]
-  float getNextSample(){
-    return generate(); // increments envelope one step
-  }  
-  [[deprecated("use generate() instead.")]]
-  void getEnvelope(FloatArray output){
-    generate(output); // increments envelope by output buffer length
-  }
-  [[deprecated("use process() instead.")]]
-  void attenuate(FloatArray buf){
-    process(buf, buf); // increments envelope by buffer length
-  }
-  static AdsrEnvelope* create(float sampleRate){
-    return new AdsrEnvelope(sampleRate);
-  }
-  static AdsrEnvelope* create(float a, float d, float s, float r, float sampleRate){
-     AdsrEnvelope* env = new AdsrEnvelope(sampleRate);
-     env->setAttack(a);
-     env->setDecay(d);
-     env->setSustain(s);
-     env->setRelease(r);
-     return env;
-  }
-  static void destroy(AdsrEnvelope* env){
-    delete env;
-  }
-private:
-  float samplePeriod;
-  EnvelopeStage stage;
-  EnvelopeTrigger trig;
-  bool retrigger;
-  float level;
-  float attackIncrement;
-  float decayIncrement;
-  float releaseIncrement;
-  float sustain;
-  bool gateState;
-  int gateTime;
-};
-
 #endif /* ENVELOPE_HPP */
diff --git a/LibSource/Envelope.cpp b/LibSource/LinearAdsrEnvelope.cpp
similarity index 64%
rename from LibSource/Envelope.cpp
rename to LibSource/LinearAdsrEnvelope.cpp
index 917adaf1..44323677 100644
--- a/LibSource/Envelope.cpp
+++ b/LibSource/LinearAdsrEnvelope.cpp
@@ -1,5 +1,5 @@
-#include "Envelope.h"
-#include "message.h"
+#include "LinearAdsrEnvelope.h"
+#include "basicmaths.h"
 
 /*
 void EnvelopeGenerator::calculateMultiplier(double startLevel,
@@ -9,65 +9,56 @@ void EnvelopeGenerator::calculateMultiplier(double startLevel,
 }
 */
 
-AdsrEnvelope::AdsrEnvelope(float sampleRate) :
-  samplePeriod(1.0/sampleRate),
+LinearAdsrEnvelope::LinearAdsrEnvelope(float sampleRate) :
+  sampleRate(sampleRate),
   stage(kIdle),
   trig(kGate),
   level(0.0),
   gateState(false),
   gateTime(-1) {
-  setAttack(0.0);
-  setDecay(0.0);
+  setAttack(1/sampleRate);
+  setDecay(1/sampleRate);
   setSustain(1.0);
-  setRelease(0.0);
+  setRelease(1/sampleRate);
   setRetrigger(false);
 }
 
-AdsrEnvelope::~AdsrEnvelope(){}
+LinearAdsrEnvelope::~LinearAdsrEnvelope(){}
 
-void AdsrEnvelope::setSampleRate(float sampleRate){
-  samplePeriod = 1.0/sampleRate;
+void LinearAdsrEnvelope::setSampleRate(float value){
+  sampleRate = value;
 }
 
-void AdsrEnvelope::setAttack(float newAttack){
-  if(newAttack > 0)
-    attackIncrement = samplePeriod / newAttack;
-  else
-    attackIncrement = 1;
+void LinearAdsrEnvelope::setAttack(float value){
+  attackIncrement = 1/(sampleRate*value);
 }
 
-void AdsrEnvelope::setDecay(float newDecay){
-  if(newDecay > 0)
-    decayIncrement = - samplePeriod / newDecay;
-  else
-    decayIncrement = - 1;
+void LinearAdsrEnvelope::setDecay(float value){
+  decayIncrement = - 1/(sampleRate*value);
 }
 
-void AdsrEnvelope::setRelease(float newRelease){
-  if(newRelease > 0)
-    releaseIncrement = - samplePeriod / newRelease;
-  else
-    releaseIncrement = -1;
+void LinearAdsrEnvelope::setRelease(float value){
+  releaseIncrement = - 1/(sampleRate*value);
 }
 
-void AdsrEnvelope::setSustain(float newSustain){
+void LinearAdsrEnvelope::setSustain(float newSustain){
   sustain = newSustain;
 }
 
-void AdsrEnvelope::setRetrigger(bool state){
+void LinearAdsrEnvelope::setRetrigger(bool state){
   retrigger = state;
 }
 
-void AdsrEnvelope::trigger(bool state, int delay){
+void LinearAdsrEnvelope::trigger(bool state, int delay){
   gate(state, delay);
   trig = kTrigger;
 }
 
-void AdsrEnvelope::gate(bool state){
+void LinearAdsrEnvelope::gate(bool state){
   gate(state, 0);
 }
 
-void AdsrEnvelope::gate(bool state, int delay){
+void LinearAdsrEnvelope::gate(bool state, int delay){
   if(gateState != state){
     gateTime = delay;
     gateState = state;
@@ -75,15 +66,15 @@ void AdsrEnvelope::gate(bool state, int delay){
   trig = kGate;
 }
 
-float AdsrEnvelope::getLevel(){
+float LinearAdsrEnvelope::getLevel(){
   return level;
 }
 
-void AdsrEnvelope::setLevel(float newLevel){
+void LinearAdsrEnvelope::setLevel(float newLevel){
   level = newLevel;
 }
 
-float AdsrEnvelope::generate(){
+float LinearAdsrEnvelope::generate(){
   if(gateTime == 0){
     stage = kAttack;
     if(trig == kTrigger){
diff --git a/LibSource/LinearAdsrEnvelope.h b/LibSource/LinearAdsrEnvelope.h
new file mode 100644
index 00000000..1956093e
--- /dev/null
+++ b/LibSource/LinearAdsrEnvelope.h
@@ -0,0 +1,66 @@
+#ifndef __LINEAR_ADSR_ENVELOPE_H
+#define __LINEAR_ADSR_ENVELOPE_H
+
+#include "Envelope.h"
+
+/**
+ * Linear ADSR Envelope
+ */
+class LinearAdsrEnvelope : public Envelope {
+protected:
+  enum EnvelopeStage { kAttack, kDecay, kSustain, kRelease, kIdle };
+  enum EnvelopeTrigger { kGate, kTrigger };
+public:
+  LinearAdsrEnvelope(float sampleRate);
+  virtual ~LinearAdsrEnvelope();
+  using Envelope::process;
+  using Envelope::trigger;
+  using SignalGenerator::generate;
+  void setSampleRate(float sampleRate);
+  void setAttack(float newAttack);
+  void setDecay(float newDecay);
+  void setRelease(float newRelease);
+  void setSustain(float newSustain);
+  void trigger(bool state, int triggerDelay);
+  void setRetrigger(bool on);
+  void gate(bool state);
+  void gate(bool state, int gateDelay);
+  float getLevel();
+  void setLevel(float newLevel);
+  /**
+   * Produce the next envelope sample.
+   */
+  float generate();
+  [[deprecated("use generate() instead.")]]
+  float getNextSample(){
+    return generate(); // increments envelope one step
+  }  
+  [[deprecated("use generate() instead.")]]
+  void getEnvelope(FloatArray output){
+    generate(output); // increments envelope by output buffer length
+  }
+  [[deprecated("use process() instead.")]]
+  void attenuate(FloatArray buf){
+    process(buf, buf); // increments envelope by buffer length
+  }
+  static LinearAdsrEnvelope* create(float sampleRate){
+    return new LinearAdsrEnvelope(sampleRate);
+  }
+  static void destroy(LinearAdsrEnvelope* env){
+    delete env;
+  }
+protected:
+  float sampleRate;
+  EnvelopeStage stage;
+  EnvelopeTrigger trig;
+  bool retrigger;
+  float level;
+  float attackIncrement;
+  float decayIncrement;
+  float releaseIncrement;
+  float sustain;
+  bool gateState;
+  int gateTime;
+};
+
+#endif /* __LINEAR_ADSR_ENVELOPE_H */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 0d66b986..f0b41c95 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -26,6 +26,7 @@
 #include "IntArray.h"
 #include "Interpolator.h"
 #include "InterpolatingCircularBuffer.h"
+#include "LinearAdsrEnvelope.h"
 #include "MidiProcessor.h"
 #include "MidiPolyphonicExpressionProcessor.h"
 #include "MidiStatus.h"

From eb0708bbfa67ee3f0ed8ae10d37d6e577c2e3332 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 2 Jul 2021 10:05:59 +0200
Subject: [PATCH 245/374] updated doc strings

---
 Makefile | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/Makefile b/Makefile
index d04c90b0..3a789a3d 100644
--- a/Makefile
+++ b/Makefile
@@ -172,16 +172,16 @@ as: patch ## build assembly file (Build/patch.s)
 native: $(DEPS) ## build native executable of patch
 	@$(MAKE) -s -f native.mk native
 
-test: $(DEPS) ## test patch locally
+test: $(DEPS) ## test patch natively
 	@$(MAKE) -s -f native.mk test
 
-run: $(DEPS) ## run patch locally
+run: $(DEPS) ## run patch natively
 	@$(MAKE) -s -f native.mk run
 
-grind: $(DEPS) ## run valgrind on patch locally
+grind: $(DEPS) ## run valgrind on patch natively
 	@$(MAKE) -s -f native.mk grind
 
-check:
+check: ## run test patches and unit tests natively
 	@for nm in $(TESTS) ; do \
 		$(MAKE) -s TEST=$$nm test || exit;\
 	done

From c95040a50c57c5a8ec6378f0668796ceafb315e7 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 2 Jul 2021 11:15:30 +0200
Subject: [PATCH 246/374] fix adsr test

---
 TestPatches/EnvelopeTestPatch.hpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/TestPatches/EnvelopeTestPatch.hpp b/TestPatches/EnvelopeTestPatch.hpp
index 1cb9fdc3..847f9b17 100644
--- a/TestPatches/EnvelopeTestPatch.hpp
+++ b/TestPatches/EnvelopeTestPatch.hpp
@@ -29,12 +29,12 @@
 #ifndef __EnvelopeTestPatch_hpp__
 #define __EnvelopeTestPatch_hpp__
 
-#include "StompBox.h"
-#include "Envelope.h"
+#include "Patch.h"
+#include "LinearAdsrEnvelope.h"
 
 class EnvelopeTestPatch : public Patch {
 public:
-  AdsrEnvelope env;
+  LinearAdsrEnvelope env;
   FloatArray envBuffer;
   EnvelopeTestPatch():
     env(getSampleRate())

From da8e25d80ba912a1b0c06ef1eea5ccbce30c8373 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 2 Jul 2021 17:51:25 +0200
Subject: [PATCH 247/374] clamp outputs to [1,1] range

---
 LibSource/AgnesiOscillator.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/LibSource/AgnesiOscillator.h b/LibSource/AgnesiOscillator.h
index fcac5c2c..ef5f7c3c 100644
--- a/LibSource/AgnesiOscillator.h
+++ b/LibSource/AgnesiOscillator.h
@@ -39,7 +39,7 @@ class AgnesiOscillator : public Oscillator {
     x = -N;
   }
   /**
-   * Normalise offset and gain so that signal is between 0 and 1
+   * Normalise offset and gain so that signal is between -1 and 1
    */
   void normalise(){
     offset = agnesi(N, a);
@@ -51,7 +51,7 @@ class AgnesiOscillator : public Oscillator {
     x += incr;
     if(x > N)
       x -= 2*N;
-    return gain*(y-offset);
+    return clamp(gain*(y-offset), -1.0f, 1.0f);
   }
   float generate(float fm){
     // modulate coefficient 'a' instead of rate
@@ -59,7 +59,7 @@ class AgnesiOscillator : public Oscillator {
     x += incr;
     if(x > N)
       x -= 2*N;
-    return gain*(y-offset);
+    return clamp(gain*(y-offset), -1.0f, 1.0f);
   }
   using SignalGenerator::generate;
   static AgnesiOscillator* create(float sr, float a=0.5, float N=5){

From ca25498bb86e75dce6b89e6816c9eed2ea1164fb Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 6 Jul 2021 16:40:39 +0200
Subject: [PATCH 248/374] added WavFile::getAudioFormat()

---
 LibSource/WavFile.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/LibSource/WavFile.h b/LibSource/WavFile.h
index 1b97db4a..bbb8a316 100644
--- a/LibSource/WavFile.h
+++ b/LibSource/WavFile.h
@@ -72,6 +72,9 @@ class WavFile {
   size_t getBitsPerSample(){
     return header->bps;
   }
+  int16_t getAudioFormat(){
+    return header->audio_format;
+  }
   void* getData(){
     return datachunk->id + sizeof(WavDataChunk);
   }

From 4ee05aeb357b0f73fb090925a9ea961f0d8b4a9a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 7 Jul 2021 12:46:39 +0200
Subject: [PATCH 249/374] envelope changes

---
 LibSource/AdsrEnvelope.h         | 211 +++++++++++++++++++++++++++++++
 LibSource/LinearAdsrEnvelope.cpp | 138 --------------------
 LibSource/LinearAdsrEnvelope.h   |  66 ----------
 LibSource/OpenWareLibrary.h      |   2 +-
 4 files changed, 212 insertions(+), 205 deletions(-)
 create mode 100644 LibSource/AdsrEnvelope.h
 delete mode 100644 LibSource/LinearAdsrEnvelope.cpp
 delete mode 100644 LibSource/LinearAdsrEnvelope.h

diff --git a/LibSource/AdsrEnvelope.h b/LibSource/AdsrEnvelope.h
new file mode 100644
index 00000000..21e57f6e
--- /dev/null
+++ b/LibSource/AdsrEnvelope.h
@@ -0,0 +1,211 @@
+#ifndef __ADSR_ENVELOPE_H
+#define __ADSR_ENVELOPE_H
+
+#include "Envelope.h"
+
+/**
+ * ADSR Envelope, either linear or exponential
+ */
+template
+class AdsrEnvelope : public Envelope {
+protected:
+  static const float MINLEVEL;
+  enum EnvelopeStage { kAttack, kDecay, kSustain, kRelease, kIdle };
+  enum EnvelopeTrigger { kGate, kTrigger };
+  float calculateIncrement(float startValue, float endValue, float time);
+  float increment(float level, float amount);
+  float decrement(float level, float amount);
+public:
+  AdsrEnvelope(float sampleRate) :
+    sampleRate(sampleRate),
+    stage(kIdle),
+    trig(kGate),
+    level(MINLEVEL),
+    gateState(false),
+    gateTime(-1) {
+    setAttack(1/sampleRate);
+    setDecay(1/sampleRate);
+    setSustain(1.0);
+    setRelease(1/sampleRate);
+    setRetrigger(false);
+  }
+
+  using Envelope::process;
+  using Envelope::trigger;
+  using SignalGenerator::generate;
+  void setSampleRate(float value){
+    sampleRate = value;
+  }
+  void setAttack(float value){
+    attackIncrement = calculateIncrement(MINLEVEL, 1, value);
+  }
+  void setDecay(float value){
+    decayIncrement = calculateIncrement(1, MINLEVEL, value);
+  }
+  void setRelease(float value){
+    releaseIncrement = calculateIncrement(1, MINLEVEL, value);
+  }
+  void setSustain(float newSustain){
+    sustain = newSustain;
+  }
+  void trigger(bool state, int delay){
+    gate(state, delay);
+    trig = kTrigger;
+  }
+  void setRetrigger(bool state){
+    retrigger = state;
+  }
+  void gate(bool state){
+    gate(state, 0);
+  }
+  void gate(bool state, int delay){
+    if(gateState != state){
+      gateTime = delay;
+      gateState = state;
+    }
+    trig = kGate;
+  }
+  float getLevel(){
+    return level;
+  }
+  void setLevel(float newLevel){
+    level = newLevel;
+  }
+  /**
+   * Produce the next envelope sample.
+   */
+  float generate(){
+    if(gateTime == 0){
+      stage = kAttack;
+      if(trig == kTrigger){
+	gateState = false;
+      }
+    }
+    if(gateTime >= 0){
+      gateTime--; // this will stop at -1
+    }
+    switch (stage) {
+    case kAttack:
+      // attack ramp
+      level = increment(level, attackIncrement);
+      if(level >= 1.0){
+	level = 1.0;
+	stage = kDecay;
+      }else if(gateState == false && trig == kGate){
+	stage = kRelease;
+      }
+      break;
+    case kDecay:
+      // decay ramp
+      level = decrement(level, decayIncrement);
+      if(level <= sustain){
+	level = sustain;
+	if(trig == kGate){
+	  stage = kSustain;
+	} else { // (trig == kTrigger)
+	  stage = kRelease;
+	}
+      } else if(gateState == false && trig == kGate){
+	stage = kRelease;
+      }
+      break;
+    case kSustain:
+      level = sustain;
+      if(gateState == false){
+	stage = kRelease;
+      }
+      break;
+    case kRelease:
+      // release ramp
+      level = decrement(level, releaseIncrement);
+      if(level <= MINLEVEL){
+	level = MINLEVEL;
+	if (retrigger == true)
+	  trigger();
+	else // (retrigger == false)
+	  stage = kIdle;
+      }else if(gateState == true ){ // if during release the gate is on again, start over from the current level
+	stage = kAttack;
+      }
+      break;
+    case kIdle:
+      level = MINLEVEL;
+      if(gateState == true)
+	stage = kAttack;
+      break;
+    }
+    return level;
+  }
+  [[deprecated("use generate() instead.")]]
+  float getNextSample(){
+    return generate(); // increments envelope one step
+  }  
+  [[deprecated("use generate() instead.")]]
+  void getEnvelope(FloatArray output){
+    generate(output); // increments envelope by output buffer length
+  }
+  [[deprecated("use process() instead.")]]
+  void attenuate(FloatArray buf){
+    process(buf, buf); // increments envelope by buffer length
+  }
+  static AdsrEnvelope* create(float sampleRate){
+    return new AdsrEnvelope(sampleRate);
+  }
+  static void destroy(AdsrEnvelope* env){
+    delete env;
+  }
+protected:
+  float sampleRate;
+  EnvelopeStage stage;
+  EnvelopeTrigger trig;
+  bool retrigger;
+  float level;
+  float attackIncrement;
+  float decayIncrement;
+  float releaseIncrement;
+  float sustain;
+  bool gateState;
+  int gateTime;
+};
+
+template<>
+float AdsrEnvelope::increment(float level, float amount){
+  return level + amount;
+}
+
+template<>
+float AdsrEnvelope::decrement(float level, float amount){
+  return level + amount;
+}
+
+template<>
+float AdsrEnvelope::increment(float level, float amount){
+  return level + (1.01-level)*amount; // aim slightly higher to ensure we reach 1.0
+}
+
+template<>
+float AdsrEnvelope::decrement(float level, float amount){
+  return level + level * amount;
+}
+
+template<>
+float AdsrEnvelope::calculateIncrement(float startValue, float endValue, float time){
+  return (endValue-startValue)/(sampleRate*time+1);
+}
+
+template<>
+float AdsrEnvelope::calculateIncrement(float startValue, float endValue, float time) {
+  // Ref: Christian Schoenebeck http://www.musicdsp.org/showone.php?id=189
+  return (logf(endValue) - logf(startValue)) / (time*sampleRate+10);
+}
+
+template<>
+const float AdsrEnvelope::MINLEVEL = 0;
+
+template<>
+const float AdsrEnvelope::MINLEVEL = 0.00001; // -100dB
+
+typedef AdsrEnvelope LinearAdsrEnvelope;
+typedef AdsrEnvelope ExponentialAdsrEnvelope;
+
+#endif /* __ADSR_ENVELOPE_H */
diff --git a/LibSource/LinearAdsrEnvelope.cpp b/LibSource/LinearAdsrEnvelope.cpp
deleted file mode 100644
index 44323677..00000000
--- a/LibSource/LinearAdsrEnvelope.cpp
+++ /dev/null
@@ -1,138 +0,0 @@
-#include "LinearAdsrEnvelope.h"
-#include "basicmaths.h"
-
-/*
-void EnvelopeGenerator::calculateMultiplier(double startLevel,
-                                            double endLevel,
-                                            unsigned long long lengthInSamples) {
-    multiplier = 1.0 + (log(endLevel) - log(startLevel)) / (lengthInSamples);
-}
-*/
-
-LinearAdsrEnvelope::LinearAdsrEnvelope(float sampleRate) :
-  sampleRate(sampleRate),
-  stage(kIdle),
-  trig(kGate),
-  level(0.0),
-  gateState(false),
-  gateTime(-1) {
-  setAttack(1/sampleRate);
-  setDecay(1/sampleRate);
-  setSustain(1.0);
-  setRelease(1/sampleRate);
-  setRetrigger(false);
-}
-
-LinearAdsrEnvelope::~LinearAdsrEnvelope(){}
-
-void LinearAdsrEnvelope::setSampleRate(float value){
-  sampleRate = value;
-}
-
-void LinearAdsrEnvelope::setAttack(float value){
-  attackIncrement = 1/(sampleRate*value);
-}
-
-void LinearAdsrEnvelope::setDecay(float value){
-  decayIncrement = - 1/(sampleRate*value);
-}
-
-void LinearAdsrEnvelope::setRelease(float value){
-  releaseIncrement = - 1/(sampleRate*value);
-}
-
-void LinearAdsrEnvelope::setSustain(float newSustain){
-  sustain = newSustain;
-}
-
-void LinearAdsrEnvelope::setRetrigger(bool state){
-  retrigger = state;
-}
-
-void LinearAdsrEnvelope::trigger(bool state, int delay){
-  gate(state, delay);
-  trig = kTrigger;
-}
-
-void LinearAdsrEnvelope::gate(bool state){
-  gate(state, 0);
-}
-
-void LinearAdsrEnvelope::gate(bool state, int delay){
-  if(gateState != state){
-    gateTime = delay;
-    gateState = state;
-  }
-  trig = kGate;
-}
-
-float LinearAdsrEnvelope::getLevel(){
-  return level;
-}
-
-void LinearAdsrEnvelope::setLevel(float newLevel){
-  level = newLevel;
-}
-
-float LinearAdsrEnvelope::generate(){
-  if(gateTime == 0){
-    stage = kAttack;
-    if(trig == kTrigger){
-      gateState = false;
-    }
-  }
-  if(gateTime >= 0){
-    gateTime--; // this will stop at -1
-  }
-  switch (stage) {
-  case kAttack:
-    // attack ramp
-    level += attackIncrement;
-    if(level >= 1.0){
-      level = 1.0;
-      stage = kDecay;
-    }else if(gateState == false && trig == kGate){
-      stage = kRelease;
-    }
-    break;
-  case kDecay:
-    // decay ramp
-    level += decayIncrement;
-    if(level <= sustain){
-      level = sustain;
-      if(trig == kGate){
-        stage = kSustain;
-      } else { // (trig == kTrigger)
-        stage = kRelease;
-      }
-    } else if(gateState == false && trig == kGate){
-      stage = kRelease;
-    }
-    break;
-  case kSustain:
-    level = sustain;
-    if(gateState == false){
-      stage = kRelease;
-    }
-    break;
-  case kRelease:
-    // release ramp
-    level += releaseIncrement;
-    if(level <= 0.0){
-      level = 0.0;
-      if (retrigger == true)
-        trigger();
-      else // (retrigger == false)
-        stage = kIdle;
-    }else if(gateState == true ){ // if during release the gate is on again, start over from the current level
-      stage = kAttack;
-    }
-    break;
-  case kIdle:
-    level = 0.0;
-    if(gateState == true)
-      stage = kAttack;
-    break;
-  }
-  return level;
-}
diff --git a/LibSource/LinearAdsrEnvelope.h b/LibSource/LinearAdsrEnvelope.h
deleted file mode 100644
index 1956093e..00000000
--- a/LibSource/LinearAdsrEnvelope.h
+++ /dev/null
@@ -1,66 +0,0 @@
-#ifndef __LINEAR_ADSR_ENVELOPE_H
-#define __LINEAR_ADSR_ENVELOPE_H
-
-#include "Envelope.h"
-
-/**
- * Linear ADSR Envelope
- */
-class LinearAdsrEnvelope : public Envelope {
-protected:
-  enum EnvelopeStage { kAttack, kDecay, kSustain, kRelease, kIdle };
-  enum EnvelopeTrigger { kGate, kTrigger };
-public:
-  LinearAdsrEnvelope(float sampleRate);
-  virtual ~LinearAdsrEnvelope();
-  using Envelope::process;
-  using Envelope::trigger;
-  using SignalGenerator::generate;
-  void setSampleRate(float sampleRate);
-  void setAttack(float newAttack);
-  void setDecay(float newDecay);
-  void setRelease(float newRelease);
-  void setSustain(float newSustain);
-  void trigger(bool state, int triggerDelay);
-  void setRetrigger(bool on);
-  void gate(bool state);
-  void gate(bool state, int gateDelay);
-  float getLevel();
-  void setLevel(float newLevel);
-  /**
-   * Produce the next envelope sample.
-   */
-  float generate();
-  [[deprecated("use generate() instead.")]]
-  float getNextSample(){
-    return generate(); // increments envelope one step
-  }  
-  [[deprecated("use generate() instead.")]]
-  void getEnvelope(FloatArray output){
-    generate(output); // increments envelope by output buffer length
-  }
-  [[deprecated("use process() instead.")]]
-  void attenuate(FloatArray buf){
-    process(buf, buf); // increments envelope by buffer length
-  }
-  static LinearAdsrEnvelope* create(float sampleRate){
-    return new LinearAdsrEnvelope(sampleRate);
-  }
-  static void destroy(LinearAdsrEnvelope* env){
-    delete env;
-  }
-protected:
-  float sampleRate;
-  EnvelopeStage stage;
-  EnvelopeTrigger trig;
-  bool retrigger;
-  float level;
-  float attackIncrement;
-  float decayIncrement;
-  float releaseIncrement;
-  float sustain;
-  bool gateState;
-  int gateTime;
-};
-
-#endif /* __LINEAR_ADSR_ENVELOPE_H */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index f0b41c95..62c31f72 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -26,7 +26,7 @@
 #include "IntArray.h"
 #include "Interpolator.h"
 #include "InterpolatingCircularBuffer.h"
-#include "LinearAdsrEnvelope.h"
+#include "AdsrEnvelope.h"
 #include "MidiProcessor.h"
 #include "MidiPolyphonicExpressionProcessor.h"
 #include "MidiStatus.h"

From a7e66ff89b9d25672eb6eba93763e97bd7d0c497 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 7 Jul 2021 12:49:22 +0200
Subject: [PATCH 250/374] fix envelope test include

---
 TestPatches/EnvelopeTestPatch.hpp | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/TestPatches/EnvelopeTestPatch.hpp b/TestPatches/EnvelopeTestPatch.hpp
index 847f9b17..b619fcb1 100644
--- a/TestPatches/EnvelopeTestPatch.hpp
+++ b/TestPatches/EnvelopeTestPatch.hpp
@@ -30,7 +30,7 @@
 #define __EnvelopeTestPatch_hpp__
 
 #include "Patch.h"
-#include "LinearAdsrEnvelope.h"
+#include "AdsrEnvelope.h"
 
 class EnvelopeTestPatch : public Patch {
 public:
@@ -44,7 +44,6 @@ class EnvelopeTestPatch : public Patch {
     registerParameter(PARAMETER_C, "Sustain");
     registerParameter(PARAMETER_D, "Release");
     envBuffer = FloatArray::create(getBlockSize());
-    debugMessage("__");
   }
   ~EnvelopeTestPatch(){
     FloatArray::destroy(envBuffer);

From 51cf822fb7e1405c99ebadbd643b8453c5a9bf70 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 7 Jul 2021 12:49:46 +0200
Subject: [PATCH 251/374] changed time basis calculation

---
 LibSource/ExponentialDecayEnvelope.h | 22 +++++++++-------------
 1 file changed, 9 insertions(+), 13 deletions(-)

diff --git a/LibSource/ExponentialDecayEnvelope.h b/LibSource/ExponentialDecayEnvelope.h
index 44ef1f94..af08edaa 100644
--- a/LibSource/ExponentialDecayEnvelope.h
+++ b/LibSource/ExponentialDecayEnvelope.h
@@ -4,10 +4,14 @@
 #include "Envelope.h"
 
 class ExponentialDecayEnvelope : public Envelope {
-private:
+protected:
   float sr;
   float value;
   float incr;
+  float calculateMultiplier(float startLevel, float endLevel, size_t lengthInSamples) {
+    // Ref: Christian Schoenebeck http://www.musicdsp.org/showone.php?id=189
+    return 1.0 + (logf(endLevel) - logf(startLevel)) / (lengthInSamples+20);
+  }
 public:
   ExponentialDecayEnvelope(float sr=48000): sr(sr), value(0), incr(0){}
   using Envelope::gate;
@@ -17,14 +21,11 @@ class ExponentialDecayEnvelope : public Envelope {
   void setSampleRate(float sampleRate){
     sr = sampleRate;
   }
-  void setRate(float r){
-    if(r < 0)
-      incr = 1.0f - 100*(1/(1-r))/sr;
-    else
-      incr = 1.0f + 100*r/sr;
+  void setDecaySamples(float samples){ // set decay time in samples
+    incr = calculateMultiplier(1, 0.0001, samples);
   }
-  void setDecay(float d){
-    setRate(-(d+1/sr));
+  void setDecay(float sec){ // set decay time in seconds to reach -80dB
+    incr = calculateMultiplier(1, 0.0001, sec*sr);
   }
   void trigger(bool state, int triggerDelay){
     if(state)
@@ -54,11 +55,6 @@ class ExponentialDecayEnvelope : public Envelope {
   static ExponentialDecayEnvelope* create(float sr){
     return new ExponentialDecayEnvelope(sr);
   }
-  static ExponentialDecayEnvelope* create(float rate, float sr){
-    ExponentialDecayEnvelope* env = new ExponentialDecayEnvelope(sr);
-    env->setDecay(rate);
-    return env;
-  }
   static void destroy(ExponentialDecayEnvelope* env){
     delete env;
   }

From d96ceb916dbc77a13946045a51d449a0c308da9b Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 16:46:40 +0200
Subject: [PATCH 252/374] changed to decimal CC assignments, added RPN message
 types

---
 LibSource/MidiStatus.h | 52 +++++++++++++++++++++++++-----------------
 1 file changed, 31 insertions(+), 21 deletions(-)

diff --git a/LibSource/MidiStatus.h b/LibSource/MidiStatus.h
index c62b7906..391fc44c 100644
--- a/LibSource/MidiStatus.h
+++ b/LibSource/MidiStatus.h
@@ -33,25 +33,32 @@ enum MidiStatus {
 };
 
 enum MidiControlChange {
-  MIDI_CC_MODULATION    = 0x01,
-  MIDI_CC_BREATH        = 0x02,
-  MIDI_CC_VOLUME        = 0x07,
-  MIDI_CC_BALANCE       = 0x08,
-  MIDI_CC_PAN           = 0x0a,
-  MIDI_CC_EXPRESSION    = 0x0b,
-  MIDI_CC_EFFECT_CTRL_1 = 0x0c,
-  MIDI_CC_EFFECT_CTRL_2 = 0x0d,
-  MIDI_CC_SUSTAIN       = 0x40,
-  MIDI_CC_PORTAMENTO    = 0x41,
-  MIDI_CC_SOSTENUTO     = 0x42,
-  MIDI_ALL_SOUND_OFF    = 0x78,
-  MIDI_RESET_ALL_CTRLS  = 0x79,
-  MIDI_LOCAL_CONTROL    = 0x7a,
-  MIDI_ALL_NOTES_OFF    = 0x7b,
-  MIDI_OMNI_MODE_OFF    = 0x7c,
-  MIDI_OMNI_MODE_ON     = 0x7d,
-  MIDI_MONO_MODE_ON     = 0x7e,
-  MIDI_POLY_MODE_ON     = 0x7f
+  MIDI_CC_MODULATION    = 1,
+  MIDI_CC_BREATH        = 2,
+  MIDI_CC_DATAENTRY_MSB = 6,
+  MIDI_CC_VOLUME        = 7,
+  MIDI_CC_BALANCE       = 8,
+  MIDI_CC_PAN           = 10,
+  MIDI_CC_EXPRESSION    = 11,
+  MIDI_CC_EFFECT_CTRL_1 = 12,
+  MIDI_CC_EFFECT_CTRL_2 = 13,
+  MIDI_CC_DATAENTRY_LSB = 38,
+  MIDI_CC_SUSTAIN       = 64,
+  MIDI_CC_PORTAMENTO    = 65,
+  MIDI_CC_SOSTENUTO     = 66,
+  MIDI_CC_FREQ_CUTOFF   = 74,
+  MIDI_CC_DATA_INCR     = 96,
+  MIDI_CC_DATA_DECR     = 97,
+  MIDI_CC_RPN_LSB       = 100,
+  MIDI_CC_RPN_MSB       = 101,
+  MIDI_ALL_SOUND_OFF    = 120,
+  MIDI_RESET_ALL_CTRLS  = 121,
+  MIDI_LOCAL_CONTROL    = 122,
+  MIDI_ALL_NOTES_OFF    = 123,
+  MIDI_OMNI_MODE_OFF    = 124,
+  MIDI_OMNI_MODE_ON     = 125,
+  MIDI_MONO_MODE_ON     = 126,
+  MIDI_POLY_MODE_ON     = 127
 };
 
 enum UsbMidi {
@@ -83,8 +90,11 @@ enum OwlProtocol {
 };
 
 enum MidiRPN {
-  MIDI_RPN_PITCH_BEND_RANGE       = 0x0000,
-  MIDI_RPN_MPE_CONFIGURATION      = 0x0006,
+  MIDI_RPN_PITCH_BEND_RANGE       = 0x0000, // GM1
+  MIDI_RPN_FINE_TUNING            = 0x0001, // GM1
+  MIDI_RPN_COARSE_TUNING          = 0x0002, // GM1
+  MIDI_RPN_MODULATION_DEPTH_RANGE = 0x0005, // GM2
+  MIDI_RPN_MPE_CONFIGURATION      = 0x0006, // MPE
   MIDI_RPN_RESET                  = 0x3fff,
 };
 

From da791001bd1fe559947dd004caa1974ccbf3baa7 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 16:47:21 +0200
Subject: [PATCH 253/374] changed to use oscillator template

---
 LibSource/VosimOscillator.h | 70 +++++++++++++------------------------
 1 file changed, 25 insertions(+), 45 deletions(-)

diff --git a/LibSource/VosimOscillator.h b/LibSource/VosimOscillator.h
index 8fcd3759..3a2ee940 100644
--- a/LibSource/VosimOscillator.h
+++ b/LibSource/VosimOscillator.h
@@ -2,36 +2,32 @@
 #define __VosimOscillator_h
 
 #include "Oscillator.h"
+#include "PolyBlepOscillator.h"
 
 /**
  * VOSIM-type oscillator based on Rob Hordijk's Nord Modular patch.
  * ref: https://electro-music.com/nm_classic/015_workshops/Clavia/NordModularWorkshops&Threads/WerkMap/WorkShops/Hordijk1999-2000/VOSIM.html
 */
-class VosimOscillator : public Oscillator {
+class VosimOscillator : public OscillatorTemplate {
 private:
-  const float fs;
   SineOscillator* formant1;
   SineOscillator* formant2;
-  float phase = 0;
-  float incr = 0;
 public:
-  VosimOscillator(float samplerate, SineOscillator* osc2, SineOscillator* osc1) :
-    fs(samplerate), formant1(osc1) , formant2(osc2) {}
-  float getFrequency(){
-    return incr*fs;
-  }
-  void setFrequency(float freq){
-    incr = freq/fs;
-  }
-  void reset(){
-    phase = 0.0f;
-  }
-  void setPhase(float ph){
-    phase = 1-ph/(2*M_PI);
-  }
-  float getPhase(){
-    return (1-phase)*2*M_PI;
+  VosimOscillator(SineOscillator* osc2, SineOscillator* osc1) :
+    formant1(osc1) , formant2(osc2) {}
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  float waveshape = 0;
+  float getSample(){
+    float square = phase < 0.5 ? 0.0f : 1.0f;
+    float saw = phase;
+    return 1 - ( saw + (square - saw) * waveshape );
+    // return 1 - ( phase - polyblep(phase, incr));
+    // return 1 - phase;
   }
+  void setWaveshape(float value){
+    waveshape = value;
+  }    
   float getFormant1(){
     return formant1->getFrequency();
   }
@@ -46,16 +42,14 @@ class VosimOscillator : public Oscillator {
   }
   using Oscillator::generate;
   float generate(float fm){
+    float sample = getSample() * (1 - 0.4*waveshape);
     float s1 = formant1->generate();
     float s2 = formant2->generate();
-    float sample = (s1*s1 + s2*s2)*phase - 1;
+    sample = (s1*s1 + s2*s2)*sample;
     float dt = incr * (1 + fm);
-    // sample = 2*phase-1;
-    // sample -= polyblep(phase, dt);
-    // polyblep works on sawtooth but doesn't help vosim
-    phase -= dt;
-    if(phase <= 0.0){
-      phase += 1.0;
+    phase += incr * (1 + fm);
+    if(phase >= end_phase){
+      phase -= (end_phase - begin_phase);
 #if 0
       float ph = getPhase();
       formant1->setPhase(ph);
@@ -68,28 +62,14 @@ class VosimOscillator : public Oscillator {
     return sample;
   }
   float generate(){
-    float s1 = formant1->generate();
-    float s2 = formant2->generate();
-    float sample = (s1*s1 + s2*s2)*phase - 1;
-    // sample -= polyblep(1-phase, incr);
-    phase -= incr;
-    if(phase <= 0.0){
-      phase += 1.0;
-#if 0
-      float ph = getPhase();
-      formant1->setPhase(ph);
-      formant2->setPhase(ph);
-#else
-      formant1->reset();
-      formant2->reset();
-#endif
-    }
-    return sample;
+    return generate(0);
   }
   static VosimOscillator* create(float sr){
     SineOscillator* f1 = SineOscillator::create(sr);
     SineOscillator* f2 = SineOscillator::create(sr);
-    return new VosimOscillator(sr, f1, f2);
+    VosimOscillator* osc = new VosimOscillator(f1, f2);
+    osc->setSampleRate(sr);
+    return osc;
   }
   static void destroy(VosimOscillator* obj){
     SineOscillator::destroy(obj->formant1);

From a749a99da5003d919f7897488cc1b7c9084ef77e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 17:18:02 +0200
Subject: [PATCH 254/374] added RPN modulation depth, pitch bend range and
 tuning

---
 LibSource/AbstractSynth.h                     |  41 ++++--
 LibSource/MidiPolyphonicExpressionProcessor.h |  78 ++++--------
 LibSource/MonophonicProcessor.h               |  15 ++-
 LibSource/PolyphonicProcessor.h               |  38 ++----
 LibSource/VoiceAllocator.h                    | 118 ++++++++++++++++++
 5 files changed, 192 insertions(+), 98 deletions(-)

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index 64f89806..c1951bc0 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -10,9 +10,20 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
 protected:
   uint8_t note = 60; // C4
   float pb = 0;
-  float pb_range = 2;
+  float pb_range = 2/8192.0f;
+  float mod_range = 0.5/127.0f;
+  float tuning = 440;
 public:
   virtual ~AbstractSynth(){}
+  /**
+   * Set frequency in Hertz for middle A (defaults to Stuttgart pitch, A440, 440 Hz)
+   */
+  void setTuning(float value){
+    tuning = value;
+  }
+  float getTuning(){
+    return tuning;
+  }
   /**
    * Set note in whole semitones
    */
@@ -50,8 +61,14 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
    * Does not update the frequency; effective from next pitch bend change
    */
   void setPitchBendRange(float range){
-    this->pb_range = range;
-  }  
+    this->pb_range = range/8192.0f;
+  }
+  /**
+   * Set modulation depth range, from 0 to 1.0
+   */
+  void setModulationDepthRange(float range){
+    mod_range = range / 127.0f;
+  }
   // MIDI handlers
   virtual void noteOn(MidiMessage msg) override {
     setNote(msg.getNote());
@@ -74,20 +91,24 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
   virtual void polyKeyPressure(MidiMessage msg) override {
     setPressure(msg.getPolyKeyPressure()/128.0f);
   }
-  virtual void setModulation(float modulation){} // default implementation does nothing
-  virtual void setPressure(float pressure){}
+  virtual void modulate(MidiMessage msg) override {
+    setModulation(mod_range * msg.getControllerValue());
+  }
   virtual void pitchbend(MidiMessage msg) override {
-    setPitchBend(pb_range*msg.getPitchBend()/8192.0f);
+    setPitchBend(pb_range * msg.getPitchBend());
   }
   virtual void allNotesOff(){
     gate(false);
   }
+  // default implementations do nothing
+  virtual void setModulation(float modulation){} 
+  virtual void setPressure(float pressure){}
   // static utility methods
-  static inline float frequencyToNote(float freq){
-    return 12 * log2f(freq / 440) + 69;
+  inline float frequencyToNote(float freq){
+    return 12 * log2f(freq / tuning) + 69;
   }
-  static inline float noteToFrequency(float note){
-    return 440 * exp2f((note - 69) / 12);
+  inline float noteToFrequency(float note){
+    return tuning * exp2f((note - 69) / 12);
   }
 };
 
diff --git a/LibSource/MidiPolyphonicExpressionProcessor.h b/LibSource/MidiPolyphonicExpressionProcessor.h
index be41818d..aac9f12c 100644
--- a/LibSource/MidiPolyphonicExpressionProcessor.h
+++ b/LibSource/MidiPolyphonicExpressionProcessor.h
@@ -31,9 +31,6 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatorgate(false);
   }
 public:
@@ -94,20 +91,14 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatorsetModulation(value + modulation[i]);
@@ -121,23 +112,23 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatorsetPitchBend(Allocator::voice[i]->getPitchBend()+delta);
@@ -228,18 +204,12 @@ class MidiPolyphonicExpressionProcessor : public VoiceAllocatorsetPressure(msg.getPolyKeyPressure()/128.0f);
     }
   }
-  bool getSustain(){
-    return dosustain;
-  }
-  void setSustain(bool value){
-    if(!value && dosustain){
-      // gate off any sustained (but not active) voices
-      for(int i=0; igate(false);
-      }
     }
-    dosustain = value;
   }
 };
 
diff --git a/LibSource/MonophonicProcessor.h b/LibSource/MonophonicProcessor.h
index 9711c1fb..e728601d 100644
--- a/LibSource/MonophonicProcessor.h
+++ b/LibSource/MonophonicProcessor.h
@@ -33,16 +33,25 @@ class MonophonicProcessor : public VoiceAllocator {
       }
       Allocator::voice[0]->setNote(notes[lastNote - 1]);
     }else{
-      Allocator::voice[0]->gate(false);
+      if(!Allocator::dosustain)
+	Allocator::voice[0]->gate(false);
       lastNote = 0;
     }
   }
+  void allNotesOn() {
+    Allocator::voice[0]->gate(true);
+  }
   void allNotesOff() {
     Allocator::voice[0]->gate(false);
     lastNote = 0;
   }
-  void controlChange(MidiMessage msg){
-    Allocator::voice[0]->controlChange(msg);
+  virtual void sustainOff(){
+    if(lastNote == 0)
+      Allocator::voice[0]->gate(false);
+  }
+  // void sustain(MidiMessage msg){} // todo
+  void modulate(MidiMessage msg){
+    Allocator::voice[0]->modulate(msg);
   }
   void pitchbend(MidiMessage msg){
     Allocator::voice[0]->pitchbend(msg);
diff --git a/LibSource/PolyphonicProcessor.h b/LibSource/PolyphonicProcessor.h
index 0dcab596..03ae07bf 100644
--- a/LibSource/PolyphonicProcessor.h
+++ b/LibSource/PolyphonicProcessor.h
@@ -16,7 +16,6 @@ class PolyphonicProcessor : public VoiceAllocator {
   uint8_t notes[VOICES];
   uint16_t allocation[VOICES];
   uint16_t allocated;
-  bool dosustain = false;
 protected:
   void take(uint8_t ch, MidiMessage msg){
     release(ch);
@@ -26,7 +25,7 @@ class PolyphonicProcessor : public VoiceAllocator {
   }
   void release(uint8_t ch){
     allocation[ch] = ++allocated;
-    if(!dosustain)
+    if(!Allocator::dosustain)
       Allocator::voice[ch]->gate(false);
   }
 public:
@@ -65,30 +64,13 @@ class PolyphonicProcessor : public VoiceAllocator {
       if(notes[i] == note)
 	release(i);
   }
-  void controlChange(MidiMessage msg){
-    switch(msg.getControllerNumber()){
-    case MIDI_CC_MODULATION:
-      modulate(msg);
-      break;
-    case MIDI_CC_SUSTAIN:
-      sustain(msg);
-      break;
-    case MIDI_ALL_NOTES_OFF:
-      Allocator::allNotesOff();
-      break;
-    }
-  }
   void pitchbend(MidiMessage msg){
     for(int i=0; ipitchbend(msg);
   }
   void modulate(MidiMessage msg){
-    float value = msg.getControllerValue()/128.0f;
     for(int i=0; isetModulation(value);
-  }
-  void sustain(MidiMessage msg){
-    setSustain(msg.getControllerValue() > 63);
+      Allocator::voice[i]->modulate(msg);
   }
   void channelPressure(MidiMessage msg){
     // route channel pressure to all voices
@@ -102,18 +84,12 @@ class PolyphonicProcessor : public VoiceAllocator {
       if(notes[i] == note)
 	Allocator::voice[i]->setPressure(msg.getPolyKeyPressure()/128.0f);
   }
-  bool getSustain(){
-    return dosustain;
-  }
-  void setSustain(bool value){
-    if(!value && dosustain){
-      // gate off any sustained (but not active) voices
-      for(int i=0; igate(false);
-      }
+  void sustainOff(){
+    // gate off any sustained (but not active) voices
+    for(int i=0; igate(false);
     }
-    dosustain = value;
   }
 };
 
diff --git a/LibSource/VoiceAllocator.h b/LibSource/VoiceAllocator.h
index 91d88c07..a1ec66b5 100644
--- a/LibSource/VoiceAllocator.h
+++ b/LibSource/VoiceAllocator.h
@@ -5,7 +5,52 @@ template
 class VoiceAllocator : public MidiProcessor {
 protected:
   SynthVoice* voice[VOICES];
+  float pb_range = 2/8192.0f;
+  float mod_range = 0.5/127.0f;
+  bool dosustain = false;
+  uint16_t rpn_id = 0;
+  uint8_t rpn_msb = 0;
+  uint8_t tuning_semitones = 69;
+  static float noteToFrequency(float note){
+    return 440 * exp2f((note - 69) / 12);
+  }
+  static float frequencyToNote(float freq){
+    return 12 * log2f(freq / 440) + 69;
+  }
 public:
+  float getPitchBendRange(){
+    return voice[0]->getPitchBendRange();
+  }
+  /**
+   * Set pitch bend range in semitones.
+   * Does not update the frequency; effective from next pitch bend change
+   */
+  void setPitchBendRange(float range){
+    for(int i=0; isetPitchBendRange(range);
+  }
+  /**
+   * Set modulation depth range, from 0 to 1.0
+   */
+  void setModulationDepthRange(float range){
+    for(int i=0; isetModulationDepthRange(range);
+  }
+  /**
+   * Set the MIDI velocity dynamic range in dB, default 72dB
+   */
+  void setDynamicRange(float range){
+    for(int i=0; isetDynamicRange(range);    
+  }
+  float getTuning(){
+    return voice[0]->getTuning();
+  }
+  void setTuning(float frequency){
+    debugMessage("set tuning", frequency);
+    for(int i=0; isetTuning(frequency);
+  }
   void allNotesOff() {
     for(int i=0; igate(false);      
@@ -28,6 +73,79 @@ class VoiceAllocator : public MidiProcessor {
     for(int i=0; isetParameter(parameter_id, value);
   }
+  void sustain(MidiMessage msg){
+    setSustain(msg.getControllerValue() > 63);
+  }
+  bool getSustain(){
+    return dosustain;
+  }
+  void setSustain(bool value){
+    if(value != dosustain && !value)
+      sustainOff();
+    dosustain = value;
+  }
+  virtual void sustainOff(){}
+  void rpn(uint16_t id, uint8_t msb, uint8_t lsb, MidiMessage msg){
+    switch(id){
+    case MIDI_RPN_PITCH_BEND_RANGE: {
+      float semitones = msb + lsb/100.0f; // semitones and cents
+      setPitchBendRange(semitones);
+      break;
+    }
+    case MIDI_RPN_FINE_TUNING: {
+      // The MSB and LSB together form a 14-bit value that sets the tuning in semitones,
+      // with a +/- 1 semitone range, where 0x2000 is A440 tuning
+      // MIDI note 69 is Middle A, 440Hz concert pitch
+      float semitones = tuning_semitones + (((msb << 7) | lsb) - 8192) / 8192.0f;
+      setTuning(noteToFrequency(semitones));
+      break;
+    }
+    case MIDI_RPN_COARSE_TUNING: {
+      // Setting the coarse tuning adjusts the tuning in semitones, where 0x40 is A440 tuning.
+      // Setting coarse tuning resets fine tuning.
+      // Only the coarse data entry / MSB is used.
+      tuning_semitones = 69 + msb - 0x40;
+      setTuning(noteToFrequency(tuning_semitones));
+      break;
+    }
+    case MIDI_RPN_MODULATION_DEPTH_RANGE: {
+      setModulationDepthRange(((msb << 7) | lsb) / 16384.0f);
+      break;
+    }
+    }
+  }
+  void controlChange(MidiMessage msg){
+    switch(msg.getControllerNumber()){
+    case MIDI_CC_MODULATION:
+      modulate(msg);
+      break;
+    case MIDI_CC_SUSTAIN:
+      sustain(msg);
+      break;
+    case MIDI_ALL_NOTES_OFF:
+      allNotesOff();
+      break;
+    // case MIDI_CC_DATA_INCR: // Data Button Increment
+    // case MIDI_CC_DATA_DECR: // Data Button Decrement
+    case MIDI_CC_RPN_LSB: // RPN LSB comes first
+      rpn_id = msg.getControllerValue();
+      break;
+    case MIDI_CC_RPN_MSB: // Then comes RPN MSB
+      rpn_id |= msg.getControllerValue() << 7;
+      if(rpn_id == MIDI_RPN_RESET){ // RPN reset
+	rpn_id = 0;
+	rpn_msb = 0;
+      }
+      break;
+    case MIDI_CC_DATAENTRY_MSB: // Data Entry MSB
+      rpn_msb = msg.getControllerValue();
+      rpn(rpn_id, rpn_msb, 0, msg); // call rpn callback with zero LSB
+      break;
+    case MIDI_CC_DATAENTRY_LSB: // Data Entry LSB
+      rpn(rpn_id, rpn_msb, msg.getControllerValue(), msg);
+      break;
+    }
+  }
 };
 
 template

From 1580d2b629cb160c3669f5247f4e8205e62842c9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 17:18:46 +0200
Subject: [PATCH 255/374] added MidiProcessor::sustain() and modulate()
 callbacks

---
 LibSource/MidiProcessor.h | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/LibSource/MidiProcessor.h b/LibSource/MidiProcessor.h
index 0ffa5b32..757db1ca 100644
--- a/LibSource/MidiProcessor.h
+++ b/LibSource/MidiProcessor.h
@@ -13,16 +13,15 @@ class MidiProcessor {
   virtual ~MidiProcessor(){}
   virtual void noteOn(MidiMessage msg){}
   virtual void noteOff(MidiMessage msg){}
+  virtual void sustain(MidiMessage msg){}
+  virtual void modulate(MidiMessage msg){}
   virtual void pitchbend(MidiMessage msg){}
   virtual void controlChange(MidiMessage msg){}
   virtual void channelPressure(MidiMessage msg){}
   virtual void polyKeyPressure(MidiMessage msg){}
   virtual void process(MidiMessage msg) {
     if(msg.isNoteOn()) {
-      if(msg.getVelocity())
-	noteOn(msg);
-      else
-	noteOff(msg);
+      noteOn(msg);
     }else if(msg.isNoteOff()) {
       noteOff(msg);
     }else if(msg.isPitchBend()) {

From 569f5d6f064f8a150fc0b592b354b2e88a5e631a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 17:20:25 +0200
Subject: [PATCH 256/374] added/refactored
 Triangle/Ramp/SquareWave/VariableShape oscillators

---
 LibSource/OpenWareLibrary.h         |  3 +
 LibSource/Oscillator.h              |  7 ++-
 LibSource/RampOscillator.h          | 92 +----------------------------
 LibSource/SampleOscillator.h        |  6 +-
 LibSource/SquareOscillator.h        | 60 +++++++++++++++++++
 LibSource/SquareWaveOscillator.h    | 60 +++++++++++++++++++
 LibSource/TriangleOscillator.h      | 42 +++++++++++++
 LibSource/VariableShapeOscillator.h | 36 +++++++++++
 8 files changed, 208 insertions(+), 98 deletions(-)
 create mode 100644 LibSource/SquareOscillator.h
 create mode 100644 LibSource/SquareWaveOscillator.h
 create mode 100644 LibSource/TriangleOscillator.h
 create mode 100644 LibSource/VariableShapeOscillator.h

diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 62c31f72..a94871c1 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -51,8 +51,11 @@
 #include "SmoothValue.h"
 #include "SmoothingFilter.h"
 #include "StateVariableFilter.h"
+#include "SquareWaveOscillator.h"
 #include "Synth.h"
 #include "TapTempo.h"
+#include "TriangleOscillator.h"
+#include "VariableShapeOscillator.h"
 #include "VoltsPerOctave.h"
 #include "VelocityCurve.h"
 #include "VosimOscillator.h"
diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index 354a0344..cafd4054 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -69,8 +69,8 @@ template
 class OscillatorTemplate : public Oscillator {
 protected:
   float mul;
-  float phase;
-  float incr;
+  float phase = 0;
+  float incr = 0;
 public:
   void setSampleRate(float sr){
     float freq = getFrequency();
@@ -105,7 +105,8 @@ class OscillatorTemplate : public Oscillator {
   }
   float generate(float fm){
     float sample = static_cast(this)->getSample();
-    phase += incr * (1 + fm);
+    // phase += incr * (1 + fm);
+    phase += incr  + (T::end_phase - T::begin_phase)*fm;
     if(phase >= T::end_phase)
       phase -= (T::end_phase - T::begin_phase);
     return sample;
diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 3bcfcef0..f575d663 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -23,95 +23,5 @@ class AntialisedRampOscillator : public OscillatorTemplate {
-public:
-  static constexpr float begin_phase = -1;
-  static constexpr float end_phase = 1;
-  float getSample(){
-    return -2 * (fabsf(phase) - 0.5);
-  }
-};
-
-class SquareOscillator : public OscillatorTemplate {
-protected:
-  float pw = 0.5;
-public:
-  static constexpr float begin_phase = 0;
-  static constexpr float end_phase = 1;
-  /**
-   * Set pulse width to a value between 0 and 1
-   */
-  void setPulseWidth(float value){
-    pw = value;
-  }
-  float getSample(){
-    return phase < pw ? 1 : -1;
-  }
-};
-
-class InvertedSquareOscillator : public OscillatorTemplate {
-protected:
-  float pw = 0.5;
-public:
-  static constexpr float begin_phase = 0;
-  static constexpr float end_phase = 1;
-  /**
-   * Set pulse width to a value between 0 and 1
-   */
-  void setPulseWidth(float value){
-    pw = value;
-  }
-  float getSample(){
-    return phase < pw ? -1 : 1;
-  }
-};
-
-class AntialiasedSquareOscillator : public OscillatorTemplate {
-protected:
-  float pw = 0.5f;
-public:
-  static constexpr float begin_phase = 0;
-  static constexpr float end_phase = 1;
-  /**
-   * Set pulse width to a value between 0 and 1
-   */
-  void setPulseWidth(float value){
-    pw = value;
-  }
-  float getSample(){
-    float sample = phase < pw ? 1 : -1;
-    sample += polyblep(incr, phase);
-    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
-    return sample;
-  }
-};
-
-class AntialiasedTriangleOscillator : public OscillatorTemplate {
-protected:
-  float pw = 0.5f;
-  float previousSample = 0;
-public:
-  static constexpr float begin_phase = 0;
-  static constexpr float end_phase = 1;
-  /**
-   * Set pulse width to a value between 0 and 1
-   */
-  void setPulseWidth(float value){
-    pw = value;
-  }
-  float getSample(){
-    float sample = phase < pw ? 1 : -1;
-    sample += polyblep(incr, phase);
-    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
-    // Leaky integrator: y[n] = A * x[n] + (1 - A) * y[n-1] = A * (x[n] - y[n-1]) + y[n-1]
-    float lambda = incr;
-    // float lambda = incr*2*M_PI;
-    sample = lambda * sample + (1 - lambda) * previousSample;
-    // sample = lambda * (sample - previousSample) + previousSample;
-    previousSample = sample;
-    return sample;
-  }
-};
-
+  
 #endif /* __RampOscillator_h */
diff --git a/LibSource/SampleOscillator.h b/LibSource/SampleOscillator.h
index d674f0b1..5372c618 100644
--- a/LibSource/SampleOscillator.h
+++ b/LibSource/SampleOscillator.h
@@ -23,9 +23,7 @@ class SampleOscillator : public Oscillator {
 
  SampleOscillator(float sr, FloatArray sample)
     : sr(sr)
-    , buffer(sample) {
-    size = buffer.getSize() - 1;
-  }
+    , buffer(sample), pos(0), size(sample.getSize() - 1) {}
   void setFrequency(float freq) {
     rate = copysignf(freq / MIDDLE_C, rate); // preserve sign
   }
@@ -34,7 +32,7 @@ class SampleOscillator : public Oscillator {
   }
   void setSample(FloatArray sample){
     buffer = sample;
-    size = buffer.getSize() -1;
+    size = sample.getSize() -1;
     pos = 0;
   }
   FloatArray getSample(){
diff --git a/LibSource/SquareOscillator.h b/LibSource/SquareOscillator.h
new file mode 100644
index 00000000..482f0b20
--- /dev/null
+++ b/LibSource/SquareOscillator.h
@@ -0,0 +1,60 @@
+#ifndef __SquareOscillator_h
+#define __SquareOscillator_h
+
+#include "Oscillator.h"
+
+class SquareOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
+  }
+  float getSample(){
+    return phase < pw ? 1 : -1;
+  }
+};
+
+class InvertedSquareOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
+  }
+  float getSample(){
+    return phase < pw ? -1 : 1;
+  }
+};
+
+class AntialiasedSquareOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5f;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
+  }
+  float getSample(){
+    float sample = phase < pw ? 1 : -1;
+    sample += polyblep(incr, phase);
+    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
+    return sample;
+  }
+};
+  
+#endif /* __SquareOscillator_h */
diff --git a/LibSource/SquareWaveOscillator.h b/LibSource/SquareWaveOscillator.h
new file mode 100644
index 00000000..ae98d31c
--- /dev/null
+++ b/LibSource/SquareWaveOscillator.h
@@ -0,0 +1,60 @@
+#ifndef __SquareWaveOscillator_h
+#define __SquareWaveOscillator_h
+
+#include "Oscillator.h"
+
+class SquareWaveOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
+  }
+  float getSample(){
+    return phase < pw ? 1 : -1;
+  }
+};
+
+class InvertedSquareWaveOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
+  }
+  float getSample(){
+    return phase < pw ? -1 : 1;
+  }
+};
+
+class AntialiasedSquareWaveOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5f;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
+  }
+  float getSample(){
+    float sample = phase < pw ? 1 : -1;
+    sample += polyblep(incr, phase);
+    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
+    return sample;
+  }
+};
+  
+#endif /* __SquareWaveOscillator_h */
diff --git a/LibSource/TriangleOscillator.h b/LibSource/TriangleOscillator.h
new file mode 100644
index 00000000..f54784fe
--- /dev/null
+++ b/LibSource/TriangleOscillator.h
@@ -0,0 +1,42 @@
+#ifndef __TriangleOscillator_h
+#define __TriangleOscillator_h
+
+#include "Oscillator.h"
+
+class TriangleOscillator : public OscillatorTemplate {
+public:
+  static constexpr float begin_phase = -1;
+  static constexpr float end_phase = 1;
+  float getSample(){
+    return -2 * (fabsf(phase) - 0.5);
+  }
+};
+
+class AntialiasedTriangleOscillator : public OscillatorTemplate {
+protected:
+  float pw = 0.5f;
+  float previousSample = 0;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
+  }
+  float getSample(){
+    float sample = phase < pw ? 1 : -1;
+    sample += polyblep(incr, phase);
+    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
+    // Leaky integrator: y[n] = A * x[n] + (1 - A) * y[n-1] = A * (x[n] - y[n-1]) + y[n-1]
+    float lambda = incr;
+    // float lambda = incr*2*M_PI;
+    sample = lambda * sample + (1 - lambda) * previousSample;
+    // sample = lambda * (sample - previousSample) + previousSample;
+    previousSample = sample;
+    return sample;
+  }
+};
+  
+#endif /* __TriangleOscillator_h */
diff --git a/LibSource/VariableShapeOscillator.h b/LibSource/VariableShapeOscillator.h
new file mode 100644
index 00000000..f2aab976
--- /dev/null
+++ b/LibSource/VariableShapeOscillator.h
@@ -0,0 +1,36 @@
+#ifndef __VariableShapeOscillator_h
+#define __VariableShapeOscillator_h
+
+#include "Oscillator.h"
+
+/**
+ * Oscillator with a waveshape that is variable from saw to square, with adjustable pulse width
+ */
+class VariableShapeOscillator : public OscillatorTemplate {
+protected:
+  float waveshape = 0;
+  float pw = 0.5f;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  /**
+   * Set pulse width to a value between 0 (for saw) and 1 (for square)
+   */
+  void setWaveshape(float value){
+    waveshape = value;
+  }
+  /**
+   * Set pulse width to a value between 0 and 1
+   */
+  void setPulseWidth(float value){
+    pw = value;
+  }
+  float getSample(){
+    float square = phase < pw ? 0 : 1;
+    float saw = phase;
+    float sample = saw + (square - saw) * waveshape;
+    return sample * 2 - 1;
+  }
+};
+  
+#endif /* __VariableShapeOscillator_h */

From 4f1ce8cad4b8449ea0bd70159a8d707d31050cd9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 18:01:51 +0200
Subject: [PATCH 257/374] updated CMSIS libs

---
 HISTORY.md                                    |     5 +
 .../CMSIS/DSP/Include/arm_common_tables.h     |   378 +
 .../CMSIS/DSP/Include/arm_const_structs.h     |    66 +
 Libraries/CMSIS/DSP/Include/arm_math.h        |  7361 ++
 .../BasicMathFunctions/BasicMathFunctions.c   |    63 +
 .../Source/BasicMathFunctions/arm_abs_f32.c   |   146 +
 .../Source/BasicMathFunctions/arm_abs_q15.c   |   132 +
 .../Source/BasicMathFunctions/arm_abs_q31.c   |   132 +
 .../Source/BasicMathFunctions/arm_abs_q7.c    |   134 +
 .../Source/BasicMathFunctions/arm_add_f32.c   |   145 +
 .../Source/BasicMathFunctions/arm_add_q15.c   |   126 +
 .../Source/BasicMathFunctions/arm_add_q31.c   |   108 +
 .../Source/BasicMathFunctions/arm_add_q7.c    |   109 +
 .../BasicMathFunctions/arm_dot_prod_f32.c     |   163 +
 .../BasicMathFunctions/arm_dot_prod_q15.c     |   120 +
 .../BasicMathFunctions/arm_dot_prod_q31.c     |   115 +
 .../BasicMathFunctions/arm_dot_prod_q7.c      |   139 +
 .../Source/BasicMathFunctions/arm_mult_f32.c  |   148 +
 .../Source/BasicMathFunctions/arm_mult_q15.c  |   143 +
 .../Source/BasicMathFunctions/arm_mult_q31.c  |   119 +
 .../Source/BasicMathFunctions/arm_mult_q7.c   |   119 +
 .../BasicMathFunctions/arm_negate_f32.c       |   145 +
 .../BasicMathFunctions/arm_negate_q15.c       |   126 +
 .../BasicMathFunctions/arm_negate_q31.c       |   132 +
 .../Source/BasicMathFunctions/arm_negate_q7.c |   126 +
 .../BasicMathFunctions/arm_offset_f32.c       |   147 +
 .../BasicMathFunctions/arm_offset_q15.c       |   121 +
 .../BasicMathFunctions/arm_offset_q31.c       |   128 +
 .../Source/BasicMathFunctions/arm_offset_q7.c |   116 +
 .../Source/BasicMathFunctions/arm_scale_f32.c |   159 +
 .../Source/BasicMathFunctions/arm_scale_q15.c |   144 +
 .../Source/BasicMathFunctions/arm_scale_q31.c |   191 +
 .../Source/BasicMathFunctions/arm_scale_q7.c  |   129 +
 .../Source/BasicMathFunctions/arm_shift_q15.c |   201 +
 .../Source/BasicMathFunctions/arm_shift_q31.c |   181 +
 .../Source/BasicMathFunctions/arm_shift_q7.c  |   175 +
 .../Source/BasicMathFunctions/arm_sub_f32.c   |   148 +
 .../Source/BasicMathFunctions/arm_sub_q15.c   |   126 +
 .../Source/BasicMathFunctions/arm_sub_q31.c   |   108 +
 .../Source/BasicMathFunctions/arm_sub_q7.c    |   109 +
 .../DSP/Source/CommonTables/CommonTables.c    |    31 +
 .../Source/CommonTables/arm_common_tables.c   | 57215 ++++++++++++++++
 .../Source/CommonTables/arm_const_structs.c   |   486 +
 .../ComplexMathFunctions.c                    |    46 +
 .../ComplexMathFunctions/arm_cmplx_conj_f32.c |   161 +
 .../ComplexMathFunctions/arm_cmplx_conj_q15.c |   157 +
 .../ComplexMathFunctions/arm_cmplx_conj_q31.c |   137 +
 .../arm_cmplx_dot_prod_f32.c                  |   233 +
 .../arm_cmplx_dot_prod_q15.c                  |   154 +
 .../arm_cmplx_dot_prod_q31.c                  |   153 +
 .../ComplexMathFunctions/arm_cmplx_mag_f32.c  |   188 +
 .../ComplexMathFunctions/arm_cmplx_mag_q15.c  |   162 +
 .../ComplexMathFunctions/arm_cmplx_mag_q31.c  |   130 +
 .../arm_cmplx_mag_squared_f32.c               |   184 +
 .../arm_cmplx_mag_squared_q15.c               |   161 +
 .../arm_cmplx_mag_squared_q31.c               |   129 +
 .../arm_cmplx_mult_cmplx_f32.c                |   194 +
 .../arm_cmplx_mult_cmplx_q15.c                |   136 +
 .../arm_cmplx_mult_cmplx_q31.c                |   137 +
 .../arm_cmplx_mult_real_f32.c                 |   169 +
 .../arm_cmplx_mult_real_q15.c                 |   182 +
 .../arm_cmplx_mult_real_q31.c                 |   148 +
 .../ControllerFunctions/ControllerFunctions.c |    37 +
 .../ControllerFunctions/arm_pid_init_f32.c    |    75 +
 .../ControllerFunctions/arm_pid_init_q15.c    |    95 +
 .../ControllerFunctions/arm_pid_init_q31.c    |    92 +
 .../ControllerFunctions/arm_pid_reset_f32.c   |    54 +
 .../ControllerFunctions/arm_pid_reset_q15.c   |    54 +
 .../ControllerFunctions/arm_pid_reset_q31.c   |    54 +
 .../ControllerFunctions/arm_sin_cos_f32.c     |   146 +
 .../ControllerFunctions/arm_sin_cos_q31.c     |   110 +
 .../FastMathFunctions/FastMathFunctions.c     |    37 +
 .../Source/FastMathFunctions/arm_cos_f32.c    |   122 +
 .../Source/FastMathFunctions/arm_cos_q15.c    |    84 +
 .../Source/FastMathFunctions/arm_cos_q31.c    |    84 +
 .../Source/FastMathFunctions/arm_sin_f32.c    |   122 +
 .../Source/FastMathFunctions/arm_sin_q15.c    |    77 +
 .../Source/FastMathFunctions/arm_sin_q31.c    |    77 +
 .../Source/FastMathFunctions/arm_sqrt_q15.c   |   144 +
 .../Source/FastMathFunctions/arm_sqrt_q31.c   |   144 +
 .../FilteringFunctions/FilteringFunctions.c   |   127 +
 .../arm_biquad_cascade_df1_32x64_init_q31.c   |    94 +
 .../arm_biquad_cascade_df1_32x64_q31.c        |   458 +
 .../arm_biquad_cascade_df1_f32.c              |   495 +
 .../arm_biquad_cascade_df1_fast_q15.c         |   250 +
 .../arm_biquad_cascade_df1_fast_q31.c         |   296 +
 .../arm_biquad_cascade_df1_init_f32.c         |    91 +
 .../arm_biquad_cascade_df1_init_q15.c         |    96 +
 .../arm_biquad_cascade_df1_init_q31.c         |    95 +
 .../arm_biquad_cascade_df1_q15.c              |   363 +
 .../arm_biquad_cascade_df1_q31.c              |   247 +
 .../arm_biquad_cascade_df2T_f32.c             |   523 +
 .../arm_biquad_cascade_df2T_f64.c             |   443 +
 .../arm_biquad_cascade_df2T_init_f32.c        |   211 +
 .../arm_biquad_cascade_df2T_init_f64.c        |    86 +
 .../arm_biquad_cascade_stereo_df2T_f32.c      |   285 +
 .../arm_biquad_cascade_stereo_df2T_init_f32.c |    86 +
 .../Source/FilteringFunctions/arm_conv_f32.c  |   816 +
 .../arm_conv_fast_opt_q15.c                   |   366 +
 .../FilteringFunctions/arm_conv_fast_q15.c    |   663 +
 .../FilteringFunctions/arm_conv_fast_q31.c    |   421 +-
 .../FilteringFunctions/arm_conv_opt_q15.c     |   362 +
 .../FilteringFunctions/arm_conv_opt_q7.c      |   360 +
 .../FilteringFunctions/arm_conv_partial_f32.c |   676 +
 .../arm_conv_partial_fast_opt_q15.c           |   387 +
 .../arm_conv_partial_fast_q15.c               |   700 +
 .../arm_conv_partial_fast_q31.c               |   477 +-
 .../arm_conv_partial_opt_q15.c                |   386 +
 .../arm_conv_partial_opt_q7.c                 |   390 +
 .../FilteringFunctions/arm_conv_partial_q15.c |   752 +
 .../FilteringFunctions/arm_conv_partial_q31.c |   634 +
 .../FilteringFunctions/arm_conv_partial_q7.c  |   546 +-
 .../Source/FilteringFunctions/arm_conv_q15.c  |   540 +-
 .../Source/FilteringFunctions/arm_conv_q31.c  |   581 +
 .../Source/FilteringFunctions/arm_conv_q7.c   |   700 +
 .../FilteringFunctions/arm_correlate_f32.c    |   893 +
 .../arm_correlate_fast_opt_q15.c              |   345 +
 .../arm_correlate_fast_q15.c                  |   614 +
 .../arm_correlate_fast_q31.c                  |   467 +-
 .../arm_correlate_opt_q15.c                   |   341 +
 .../FilteringFunctions/arm_correlate_opt_q7.c |   388 +
 .../FilteringFunctions/arm_correlate_q15.c    |   541 +-
 .../FilteringFunctions/arm_correlate_q31.c    |   682 +
 .../FilteringFunctions/arm_correlate_q7.c     |   606 +-
 .../FilteringFunctions/arm_fir_decimate_f32.c |   703 +
 .../arm_fir_decimate_fast_q15.c               |   595 +
 .../arm_fir_decimate_fast_q31.c               |   390 +
 .../arm_fir_decimate_init_f32.c               |   105 +
 .../arm_fir_decimate_init_q15.c               |   106 +
 .../arm_fir_decimate_init_q31.c               |   105 +
 .../FilteringFunctions/arm_fir_decimate_q15.c |   595 +
 .../FilteringFunctions/arm_fir_decimate_q31.c |   387 +
 .../Source/FilteringFunctions/arm_fir_f32.c   |   715 +
 .../FilteringFunctions/arm_fir_fast_q15.c     |   332 +
 .../FilteringFunctions/arm_fir_fast_q31.c     |   324 +
 .../FilteringFunctions/arm_fir_init_f32.c     |    81 +
 .../FilteringFunctions/arm_fir_init_q15.c     |   137 +
 .../FilteringFunctions/arm_fir_init_q31.c     |    80 +
 .../FilteringFunctions/arm_fir_init_q7.c      |    81 +
 .../arm_fir_interpolate_f32.c                 |   914 +
 .../arm_fir_interpolate_init_f32.c            |   106 +
 .../arm_fir_interpolate_init_q15.c            |   106 +
 .../arm_fir_interpolate_init_q31.c            |   105 +
 .../arm_fir_interpolate_q15.c                 |   479 +
 .../arm_fir_interpolate_q31.c                 |   481 +
 .../FilteringFunctions/arm_fir_lattice_f32.c  |   453 +
 .../arm_fir_lattice_init_f32.c                |    70 +
 .../arm_fir_lattice_init_q15.c                |    70 +
 .../arm_fir_lattice_init_q31.c                |    70 +
 .../FilteringFunctions/arm_fir_lattice_q15.c  |   506 +
 .../FilteringFunctions/arm_fir_lattice_q31.c  |   505 +
 .../Source/FilteringFunctions/arm_fir_q15.c   |   332 +
 .../Source/FilteringFunctions/arm_fir_q31.c   |   288 +
 .../Source/FilteringFunctions/arm_fir_q7.c    |   323 +
 .../FilteringFunctions/arm_fir_sparse_f32.c   |   341 +
 .../arm_fir_sparse_init_f32.c                 |    93 +
 .../arm_fir_sparse_init_q15.c                 |    93 +
 .../arm_fir_sparse_init_q31.c                 |    92 +
 .../arm_fir_sparse_init_q7.c                  |    93 +
 .../FilteringFunctions/arm_fir_sparse_q15.c   |   341 +
 .../FilteringFunctions/arm_fir_sparse_q31.c   |   357 +
 .../FilteringFunctions/arm_fir_sparse_q7.c    |   341 +
 .../FilteringFunctions/arm_iir_lattice_f32.c  |   354 +
 .../arm_iir_lattice_init_f32.c                |    77 +
 .../arm_iir_lattice_init_q15.c                |    77 +
 .../arm_iir_lattice_init_q31.c                |    77 +
 .../FilteringFunctions/arm_iir_lattice_q15.c  |   396 +
 .../FilteringFunctions/arm_iir_lattice_q31.c  |   356 +
 .../Source/FilteringFunctions/arm_lms_f32.c   |   533 +
 .../FilteringFunctions/arm_lms_init_f32.c     |    81 +
 .../FilteringFunctions/arm_lms_init_q15.c     |    92 +
 .../FilteringFunctions/arm_lms_init_q31.c     |    92 +
 .../FilteringFunctions/arm_lms_norm_f32.c     |   564 +
 .../arm_lms_norm_init_f32.c                   |    92 +
 .../arm_lms_norm_init_q15.c                   |    98 +
 .../arm_lms_norm_init_q31.c                   |    97 +
 .../FilteringFunctions/arm_lms_norm_q15.c     |   297 +
 .../FilteringFunctions/arm_lms_norm_q31.c     |   311 +
 .../Source/FilteringFunctions/arm_lms_q15.c   |   262 +
 .../Source/FilteringFunctions/arm_lms_q31.c   |   283 +
 .../Source/MatrixFunctions/MatrixFunctions.c  |    53 +
 .../Source/MatrixFunctions/arm_mat_add_f32.c  |   232 +
 .../Source/MatrixFunctions/arm_mat_add_q15.c  |   149 +
 .../Source/MatrixFunctions/arm_mat_add_q31.c  |   139 +
 .../MatrixFunctions/arm_mat_cmplx_mult_f32.c  |   631 +
 .../MatrixFunctions/arm_mat_cmplx_mult_q15.c  |   340 +
 .../MatrixFunctions/arm_mat_cmplx_mult_q31.c  |   283 +
 .../Source/MatrixFunctions/arm_mat_init_f32.c |    76 +
 .../Source/MatrixFunctions/arm_mat_init_q15.c |    67 +
 .../Source/MatrixFunctions/arm_mat_init_q31.c |    72 +
 .../MatrixFunctions/arm_mat_inverse_f32.c     |  1127 +
 .../MatrixFunctions/arm_mat_inverse_f64.c     |   673 +
 .../Source/MatrixFunctions/arm_mat_mult_f32.c |   534 +
 .../MatrixFunctions/arm_mat_mult_fast_q15.c   |   483 +
 .../MatrixFunctions/arm_mat_mult_fast_q31.c   |   374 +
 .../Source/MatrixFunctions/arm_mat_mult_q15.c |   357 +
 .../Source/MatrixFunctions/arm_mat_mult_q31.c |   196 +
 .../MatrixFunctions/arm_mat_scale_f32.c       |   221 +
 .../MatrixFunctions/arm_mat_scale_q15.c       |   170 +
 .../MatrixFunctions/arm_mat_scale_q31.c       |   164 +
 .../Source/MatrixFunctions/arm_mat_sub_f32.c  |   226 +
 .../Source/MatrixFunctions/arm_mat_sub_q15.c  |   144 +
 .../Source/MatrixFunctions/arm_mat_sub_q31.c  |   139 +
 .../MatrixFunctions/arm_mat_trans_f32.c       |   284 +
 .../MatrixFunctions/arm_mat_trans_q15.c       |   182 +
 .../MatrixFunctions/arm_mat_trans_q31.c       |   146 +
 .../StatisticsFunctions/StatisticsFunctions.c |    53 +
 .../Source/StatisticsFunctions/arm_max_f32.c  |   271 +
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 Libraries/CMSIS/Include/cmsis_armcc.h         |   894 +
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 Libraries/CMSIS/Include/cmsis_compiler.h      |   283 +
 Libraries/CMSIS/Include/cmsis_gcc.h           |  2168 +
 Libraries/CMSIS/Include/cmsis_iccarm.h        |   964 +
 Libraries/CMSIS/Include/cmsis_version.h       |    39 +
 Libraries/CMSIS/Include/core_armv81mml.h      |  2968 +
 Libraries/CMSIS/Include/core_armv8mbl.h       |  1921 +
 Libraries/CMSIS/Include/core_armv8mml.h       |  2835 +
 Libraries/CMSIS/Include/core_cm0.h            |   842 +-
 Libraries/CMSIS/Include/core_cm0plus.h        |   951 +-
 Libraries/CMSIS/Include/core_cm1.h            |   979 +
 Libraries/CMSIS/Include/core_cm23.h           |  1996 +
 Libraries/CMSIS/Include/core_cm3.h            |  1742 +-
 Libraries/CMSIS/Include/core_cm33.h           |  2910 +
 Libraries/CMSIS/Include/core_cm35p.h          |  2910 +
 Libraries/CMSIS/Include/core_cm4.h            |  1916 +-
 Libraries/CMSIS/Include/core_cm7.h            |  2570 +-
 Libraries/CMSIS/Include/core_cmFunc.h         |   664 -
 Libraries/CMSIS/Include/core_cmInstr.h        |   916 -
 Libraries/CMSIS/Include/core_cmSimd.h         |   697 -
 Libraries/CMSIS/Include/core_sc000.h          |   897 +-
 Libraries/CMSIS/Include/core_sc300.h          |  1725 +-
 Libraries/CMSIS/Include/mpu_armv7.h           |   272 +
 Libraries/CMSIS/Include/mpu_armv8.h           |   346 +
 Libraries/CMSIS/Include/tz_context.h          |    70 +
 Libraries/CMSIS/LICENSE.txt                   |   201 +
 compile.mk                                    |     9 +-
 native.mk                                     |     9 +-
 581 files changed, 162627 insertions(+), 158635 deletions(-)
 create mode 100644 Libraries/CMSIS/DSP/Include/arm_common_tables.h
 create mode 100644 Libraries/CMSIS/DSP/Include/arm_const_structs.h
 create mode 100644 Libraries/CMSIS/DSP/Include/arm_math.h
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/CommonTables/CommonTables.c
 create mode 100644 Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
 create mode 100644 Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
 rename Libraries/CMSIS/{DSP_Lib => DSP}/Source/FilteringFunctions/arm_conv_fast_q31.c (54%)
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
 rename Libraries/CMSIS/{DSP_Lib => DSP}/Source/FilteringFunctions/arm_conv_partial_fast_q31.c (52%)
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
 rename Libraries/CMSIS/{DSP_Lib => DSP}/Source/FilteringFunctions/arm_conv_partial_q7.c (54%)
 rename Libraries/CMSIS/{DSP_Lib => DSP}/Source/FilteringFunctions/arm_conv_q15.c (52%)
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
 rename Libraries/CMSIS/{DSP_Lib => DSP}/Source/FilteringFunctions/arm_correlate_fast_q31.c (51%)
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
 rename Libraries/CMSIS/{DSP_Lib => DSP}/Source/FilteringFunctions/arm_correlate_q15.c (51%)
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
 rename Libraries/CMSIS/{DSP_Lib => DSP}/Source/FilteringFunctions/arm_correlate_q7.c (52%)
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
 create mode 100644 Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
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 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c
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 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c
 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c
 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c
 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c
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 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c
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 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c
 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c
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 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
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 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
 delete mode 100644 Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c
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diff --git a/HISTORY.md b/HISTORY.md
index 887b6ff4..4f2fbfda 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,8 @@
+* Implemented RPN messages in VoiceAllocator
+* Update ExponentialDecayEnvelope
+* Implemented LinearAdsrEnvelope and ExponentialAdsrEnvelope
+* Changed to use std::min/max/abs/clamp for C++ compilation units
+
 v21.2
 -----
 
diff --git a/Libraries/CMSIS/DSP/Include/arm_common_tables.h b/Libraries/CMSIS/DSP/Include/arm_common_tables.h
new file mode 100644
index 00000000..cf6586fd
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_common_tables.h
@@ -0,0 +1,378 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_common_tables.h
+ * Description:  Extern declaration for common tables
+ *
+ * $Date:        27. January 2017
+ * $Revision:    V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math.h"
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+    extern const uint16_t armBitRevTable[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
+    extern const float32_t twiddleCoef_16[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
+    extern const float32_t twiddleCoef_32[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
+    extern const float32_t twiddleCoef_64[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+    extern const float32_t twiddleCoef_128[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
+    extern const float32_t twiddleCoef_256[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
+    extern const float32_t twiddleCoef_512[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
+    extern const float32_t twiddleCoef_1024[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
+    extern const float32_t twiddleCoef_2048[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+    extern const float32_t twiddleCoef_4096[8192];
+    #define twiddleCoef twiddleCoef_4096
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
+    extern const q31_t twiddleCoef_16_q31[24];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
+    extern const q31_t twiddleCoef_32_q31[48];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
+    extern const q31_t twiddleCoef_64_q31[96];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
+    extern const q31_t twiddleCoef_128_q31[192];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
+    extern const q31_t twiddleCoef_256_q31[384];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
+    extern const q31_t twiddleCoef_512_q31[768];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
+    extern const q31_t twiddleCoef_1024_q31[1536];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
+    extern const q31_t twiddleCoef_2048_q31[3072];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
+    extern const q31_t twiddleCoef_4096_q31[6144];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
+    extern const q15_t twiddleCoef_16_q15[24];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
+    extern const q15_t twiddleCoef_32_q15[48];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
+    extern const q15_t twiddleCoef_64_q15[96];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
+    extern const q15_t twiddleCoef_128_q15[192];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
+    extern const q15_t twiddleCoef_256_q15[384];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
+    extern const q15_t twiddleCoef_512_q15[768];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
+    extern const q15_t twiddleCoef_1024_q15[1536];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
+    extern const q15_t twiddleCoef_2048_q15[3072];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
+    extern const q15_t twiddleCoef_4096_q15[6144];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
+    extern const float32_t twiddleCoef_rfft_32[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
+    extern const float32_t twiddleCoef_rfft_64[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
+    extern const float32_t twiddleCoef_rfft_128[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
+    extern const float32_t twiddleCoef_rfft_256[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
+    extern const float32_t twiddleCoef_rfft_512[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
+    extern const float32_t twiddleCoef_rfft_1024[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
+    extern const float32_t twiddleCoef_rfft_2048[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
+    extern const float32_t twiddleCoef_rfft_4096[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  /* floating-point bit reversal tables */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
+    #define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
+    extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
+    #define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
+    extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
+    #define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
+    extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
+    #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
+    extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
+    #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
+    extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
+    #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
+    extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
+    #define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
+    extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
+    #define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
+    extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
+    #define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
+    extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  
+  /* fixed-point bit reversal tables */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
+    #define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
+    extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
+    #define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
+    extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
+    #define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
+    extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
+    #define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
+    extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
+    #define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
+    extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
+    #define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
+    extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
+    #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
+    extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
+    #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
+    extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
+    #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
+    extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
+    extern const float32_t realCoefA[8192];
+    extern const float32_t realCoefB[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
+    extern const q31_t realCoefAQ31[8192];
+    extern const q31_t realCoefBQ31[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
+    extern const q15_t realCoefAQ15[8192];
+    extern const q15_t realCoefBQ15[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
+    extern const float32_t Weights_128[256];
+    extern const float32_t cos_factors_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
+    extern const float32_t Weights_512[1024];
+    extern const float32_t cos_factors_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
+    extern const float32_t Weights_2048[4096];
+    extern const float32_t cos_factors_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
+    extern const float32_t Weights_8192[16384];
+    extern const float32_t cos_factors_8192[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
+    extern const q15_t WeightsQ15_128[256];
+    extern const q15_t cos_factorsQ15_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
+    extern const q15_t WeightsQ15_512[1024];
+    extern const q15_t cos_factorsQ15_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
+    extern const q15_t WeightsQ15_2048[4096];
+    extern const q15_t cos_factorsQ15_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
+    extern const q15_t WeightsQ15_8192[16384];
+    extern const q15_t cos_factorsQ15_8192[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)  
+    extern const q31_t WeightsQ31_128[256];
+    extern const q31_t cos_factorsQ31_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) 
+    extern const q31_t WeightsQ31_512[1024];
+    extern const q31_t cos_factorsQ31_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) 
+    extern const q31_t WeightsQ31_2048[4096];
+    extern const q31_t cos_factorsQ31_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) 
+    extern const q31_t WeightsQ31_8192[16384];
+    extern const q31_t cos_factorsQ31_8192[8192];
+  #endif
+    
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
+    extern const q15_t armRecipTableQ15[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
+    extern const q31_t armRecipTableQ31[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  
+  /* Tables for Fast Math Sine and Cosine */
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+    extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
+    extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
+    extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
+
+#endif /*  ARM_COMMON_TABLES_H */
diff --git a/Libraries/CMSIS/DSP/Include/arm_const_structs.h b/Libraries/CMSIS/DSP/Include/arm_const_structs.h
new file mode 100644
index 00000000..677073e5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_const_structs.h
@@ -0,0 +1,66 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs.h
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f32() function.
+ *
+ * $Date:        27. January 2017
+ * $Revision:    V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+
+#endif
diff --git a/Libraries/CMSIS/DSP/Include/arm_math.h b/Libraries/CMSIS/DSP/Include/arm_math.h
new file mode 100644
index 00000000..fb2bce51
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_math.h
@@ -0,0 +1,7361 @@
+/******************************************************************************
+ * @file     arm_math.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.6.0
+ * @date     18. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+   \mainpage CMSIS DSP Software Library
+   *
+   * Introduction
+   * ------------
+   *
+   * This user manual describes the CMSIS DSP software library,
+   * a suite of common signal processing functions for use on Cortex-M processor based devices.
+   *
+   * The library is divided into a number of functions each covering a specific category:
+   * - Basic math functions
+   * - Fast math functions
+   * - Complex math functions
+   * - Filters
+   * - Matrix functions
+   * - Transform functions
+   * - Motor control functions
+   * - Statistical functions
+   * - Support functions
+   * - Interpolation functions
+   *
+   * The library has separate functions for operating on 8-bit integers, 16-bit integers,
+   * 32-bit integer and 32-bit floating-point values.
+   *
+   * Using the Library
+   * ------------
+   *
+   * The library installer contains prebuilt versions of the libraries in the Lib folder.
+   * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit)
+   * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit)
+   * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit)
+   * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on)
+   * - arm_cortexM7l_math.lib (Cortex-M7, Little endian)
+   * - arm_cortexM7b_math.lib (Cortex-M7, Big endian)
+   * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit)
+   * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit)
+   * - arm_cortexM4l_math.lib (Cortex-M4, Little endian)
+   * - arm_cortexM4b_math.lib (Cortex-M4, Big endian)
+   * - arm_cortexM3l_math.lib (Cortex-M3, Little endian)
+   * - arm_cortexM3b_math.lib (Cortex-M3, Big endian)
+   * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian)
+   * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian)
+   * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian)
+   * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian)
+   * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point Unit)
+   * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions)
+   * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precision Floating Point Unit)
+   *
+   * The library functions are declared in the public file arm_math.h which is placed in the Include folder.
+   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
+   * public header file  arm_math.h for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
+   *
+   *
+   * Examples
+   * --------
+   *
+   * The library ships with a number of examples which demonstrate how to use the library functions.
+   *
+   * Toolchain Support
+   * ------------
+   *
+   * The library has been developed and tested with MDK version 5.14.0.0
+   * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
+   *
+   * Building the Library
+   * ------------
+   *
+   * The library installer contains a project file to rebuild libraries on MDK toolchain in the CMSIS\\DSP\\Projects\\ARM folder.
+   * - arm_cortexM_math.uvprojx
+   *
+   *
+   * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional preprocessor macros detailed above.
+   *
+   * Preprocessor Macros
+   * ------------
+   *
+   * Each library project have different preprocessor macros.
+   *
+   * - ARM_MATH_BIG_ENDIAN:
+   *
+   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+   *
+   * - ARM_MATH_MATRIX_CHECK:
+   *
+   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
+   *
+   * - ARM_MATH_ROUNDING:
+   *
+   * Define macro ARM_MATH_ROUNDING for rounding on support functions
+   *
+   * - ARM_MATH_LOOPUNROLL:
+   *
+   * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions
+   *
+   * - ARM_MATH_NEON:
+   *
+   * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
+   * It is not enabled by default when Neon is available because performances are 
+   * dependent on the compiler and target architecture.
+   *
+   * - ARM_MATH_NEON_EXPERIMENTAL:
+   *
+   * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of 
+   * of some DSP functions. Experimental Neon versions currently do not have better
+   * performances than the scalar versions.
+   *
+   * 

+   * CMSIS-DSP in ARM::CMSIS Pack
+   * -----------------------------
+   *
+   * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories:
+   * |File/Folder                      |Content                                                                 |
+   * |---------------------------------|------------------------------------------------------------------------|
+   * |\b CMSIS\\Documentation\\DSP     | This documentation                                                     |
+   * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite                                                     |
+   * |\b CMSIS\\DSP\\Examples          | Example projects demonstrating the usage of the library functions      |
+   * |\b CMSIS\\DSP\\Include           | DSP_Lib include files                                                  |
+   * |\b CMSIS\\DSP\\Lib               | DSP_Lib binaries                                                       |
+   * |\b CMSIS\\DSP\\Projects          | Projects to rebuild DSP_Lib binaries                                   |
+   * |\b CMSIS\\DSP\\Source            | DSP_Lib source files                                                   |
+   *
+   * 

+   * Revision History of CMSIS-DSP
+   * ------------
+   * Please refer to \ref ChangeLog_pg.
+   */
+
+
+/**
+ * @defgroup groupMath Basic Math Functions
+ */
+
+/**
+ * @defgroup groupFastMath Fast Math Functions
+ * This set of functions provides a fast approximation to sine, cosine, and square root.
+ * As compared to most of the other functions in the CMSIS math library, the fast math functions
+ * operate on individual values and not arrays.
+ * There are separate functions for Q15, Q31, and floating-point data.
+ *
+ */
+
+/**
+ * @defgroup groupCmplxMath Complex Math Functions
+ * This set of functions operates on complex data vectors.
+ * The data in the complex arrays is stored in an interleaved fashion
+ * (real, imag, real, imag, ...).
+ * In the API functions, the number of samples in a complex array refers
+ * to the number of complex values; the array contains twice this number of
+ * real values.
+ */
+
+/**
+ * @defgroup groupFilters Filtering Functions
+ */
+
+/**
+ * @defgroup groupMatrix Matrix Functions
+ *
+ * This set of functions provides basic matrix math operations.
+ * The functions operate on matrix data structures.  For example,
+ * the type
+ * definition for the floating-point matrix structure is shown
+ * below:
+ * 
+ *     typedef struct
+ *     {
+ *       uint16_t numRows;     // number of rows of the matrix.
+ *       uint16_t numCols;     // number of columns of the matrix.
+ *       float32_t *pData;     // points to the data of the matrix.
+ *     } arm_matrix_instance_f32;
+ * 

+ * There are similar definitions for Q15 and Q31 data types.
+ *
+ * The structure specifies the size of the matrix and then points to
+ * an array of data.  The array is of size numRows X numCols
+ * and the values are arranged in row order.  That is, the
+ * matrix element (i, j) is stored at:
+ * 
+ *     pData[i*numCols + j]
+ * 

+ *
+ * \par Init Functions
+ * There is an associated initialization function for each type of matrix
+ * data structure.
+ * The initialization function sets the values of the internal structure fields.
+ * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
+ * for floating-point, Q31 and Q15 types,  respectively.
+ *
+ * \par
+ * Use of the initialization function is optional. However, if initialization function is used
+ * then the instance structure cannot be placed into a const data section.
+ * To place the instance structure in a const data
+ * section, manually initialize the data structure.  For example:
+ * 
+ * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
+ * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
+ * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
+ * 

+ * where nRows specifies the number of rows, nColumns
+ * specifies the number of columns, and pData points to the
+ * data array.
+ *
+ * \par Size Checking
+ * By default all of the matrix functions perform size checking on the input and
+ * output matrices. For example, the matrix addition function verifies that the
+ * two input matrices and the output matrix all have the same number of rows and
+ * columns. If the size check fails the functions return:
+ * 
+ *     ARM_MATH_SIZE_MISMATCH
+ * 

+ * Otherwise the functions return
+ * 
+ *     ARM_MATH_SUCCESS
+ * 

+ * There is some overhead associated with this matrix size checking.
+ * The matrix size checking is enabled via the \#define
+ * 
+ *     ARM_MATH_MATRIX_CHECK
+ * 

+ * within the library project settings.  By default this macro is defined
+ * and size checking is enabled. By changing the project settings and
+ * undefining this macro size checking is eliminated and the functions
+ * run a bit faster. With size checking disabled the functions always
+ * return ARM_MATH_SUCCESS.
+ */
+
+/**
+ * @defgroup groupTransforms Transform Functions
+ */
+
+/**
+ * @defgroup groupController Controller Functions
+ */
+
+/**
+ * @defgroup groupStats Statistics Functions
+ */
+
+/**
+ * @defgroup groupSupport Support Functions
+ */
+
+/**
+ * @defgroup groupInterpolation Interpolation Functions
+ * These functions perform 1- and 2-dimensional interpolation of data.
+ * Linear interpolation is used for 1-dimensional data and
+ * bilinear interpolation is used for 2-dimensional data.
+ */
+
+/**
+ * @defgroup groupExamples Examples
+ */
+
+
+#ifndef _ARM_MATH_H
+#define _ARM_MATH_H
+
+/* Compiler specific diagnostic adjustment */
+#if   defined ( __CC_ARM )
+
+#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wsign-conversion"
+  #pragma GCC diagnostic ignored "-Wconversion"
+  #pragma GCC diagnostic ignored "-Wunused-parameter"
+
+#elif defined ( __ICCARM__ )
+
+#elif defined ( __TI_ARM__ )
+
+#elif defined ( __CSMC__ )
+
+#elif defined ( __TASKING__ )
+
+#elif defined ( _MSC_VER )
+
+#else
+  #error Unknown compiler
+#endif
+
+
+/* Included for instrinsics definitions */
+#if !defined ( _MSC_VER )
+#include "cmsis_compiler.h"
+#else
+#include 
+#define __STATIC_FORCEINLINE static __forceinline
+#define __ALIGNED(x) __declspec(align(x))
+#define LOW_OPTIMIZATION_ENTER
+#define LOW_OPTIMIZATION_EXIT
+#define IAR_ONLY_LOW_OPTIMIZATION_ENTER 
+#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+#endif
+
+#include "string.h"
+#include "math.h"
+#include "float.h"
+
+/* evaluate ARM DSP feature */
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+  #define ARM_MATH_DSP                   1
+#endif
+
+#if defined(__ARM_NEON)
+#include 
+#endif
+
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+  /**
+   * @brief Macros required for reciprocal calculation in Normalized LMS
+   */
+
+#define DELTA_Q31          (0x100)
+#define DELTA_Q15          0x5
+#define INDEX_MASK         0x0000003F
+#ifndef PI
+  #define PI               3.14159265358979f
+#endif
+
+  /**
+   * @brief Macros required for SINE and COSINE Fast math approximations
+   */
+
+#define FAST_MATH_TABLE_SIZE  512
+#define FAST_MATH_Q31_SHIFT   (32 - 10)
+#define FAST_MATH_Q15_SHIFT   (16 - 10)
+#define CONTROLLER_Q31_SHIFT  (32 - 9)
+#define TABLE_SPACING_Q31     0x400000
+#define TABLE_SPACING_Q15     0x80
+
+  /**
+   * @brief Macros required for SINE and COSINE Controller functions
+   */
+  /* 1.31(q31) Fixed value of 2/360 */
+  /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
+#define INPUT_SPACING         0xB60B61
+
+
+  /**
+   * @brief Error status returned by some functions in the library.
+   */
+
+  typedef enum
+  {
+    ARM_MATH_SUCCESS        =  0,        /**< No error */
+    ARM_MATH_ARGUMENT_ERROR = -1,        /**< One or more arguments are incorrect */
+    ARM_MATH_LENGTH_ERROR   = -2,        /**< Length of data buffer is incorrect */
+    ARM_MATH_SIZE_MISMATCH  = -3,        /**< Size of matrices is not compatible with the operation */
+    ARM_MATH_NANINF         = -4,        /**< Not-a-number (NaN) or infinity is generated */
+    ARM_MATH_SINGULAR       = -5,        /**< Input matrix is singular and cannot be inverted */
+    ARM_MATH_TEST_FAILURE   = -6         /**< Test Failed */
+  } arm_status;
+
+  /**
+   * @brief 8-bit fractional data type in 1.7 format.
+   */
+  typedef int8_t q7_t;
+
+  /**
+   * @brief 16-bit fractional data type in 1.15 format.
+   */
+  typedef int16_t q15_t;
+
+  /**
+   * @brief 32-bit fractional data type in 1.31 format.
+   */
+  typedef int32_t q31_t;
+
+  /**
+   * @brief 64-bit fractional data type in 1.63 format.
+   */
+  typedef int64_t q63_t;
+
+  /**
+   * @brief 32-bit floating-point type definition.
+   */
+  typedef float float32_t;
+
+  /**
+   * @brief 64-bit floating-point type definition.
+   */
+  typedef double float64_t;
+
+
+/**
+  @brief definition to read/write two 16 bit values.
+  @deprecated
+ */
+#if   defined ( __CC_ARM )
+  #define __SIMD32_TYPE int32_t __packed
+#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+  #define __SIMD32_TYPE int32_t
+#elif defined ( __GNUC__ )
+  #define __SIMD32_TYPE int32_t
+#elif defined ( __ICCARM__ )
+  #define __SIMD32_TYPE int32_t __packed
+#elif defined ( __TI_ARM__ )
+  #define __SIMD32_TYPE int32_t
+#elif defined ( __CSMC__ )
+  #define __SIMD32_TYPE int32_t
+#elif defined ( __TASKING__ )
+  #define __SIMD32_TYPE __un(aligned) int32_t
+#elif defined(_MSC_VER )
+  #define __SIMD32_TYPE int32_t
+#else
+  #error Unknown compiler
+#endif
+
+#define __SIMD32(addr)        (*(__SIMD32_TYPE **) & (addr))
+#define __SIMD32_CONST(addr)  ( (__SIMD32_TYPE * )   (addr))
+#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE * )   (addr))
+#define __SIMD64(addr)        (*(      int64_t **) & (addr))
+
+/* SIMD replacement */
+
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2 (
+  q15_t * pQ15)
+{
+  q31_t val;
+
+  memcpy (&val, pQ15, 4);
+
+  return (val);
+}
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer and increment pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2_ia (
+  q15_t ** pQ15)
+{
+  q31_t val;
+
+  memcpy (&val, *pQ15, 4);
+  *pQ15 += 2;
+
+  return (val);
+}
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2_da (
+  q15_t ** pQ15)
+{
+  q31_t val;
+
+  memcpy (&val, *pQ15, 4);
+  *pQ15 -= 2;
+
+  return (val);
+}
+
+/**
+  @brief         Write 2 Q15 to Q15 pointer and increment pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q15x2_ia (
+  q15_t ** pQ15,
+  q31_t    value)
+{
+  q31_t val = value;
+
+  memcpy (*pQ15, &val, 4);
+  *pQ15 += 2;
+}
+
+/**
+  @brief         Write 2 Q15 to Q15 pointer.
+  @param[in]     pQ15      points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q15x2 (
+  q15_t * pQ15,
+  q31_t   value)
+{
+  q31_t val = value;
+
+  memcpy (pQ15, &val, 4);
+}
+
+
+/**
+  @brief         Read 4 Q7 from Q7 pointer and increment pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q7x4_ia (
+  q7_t ** pQ7)
+{
+  q31_t val;
+
+  memcpy (&val, *pQ7, 4);
+  *pQ7 += 4;
+
+  return (val);
+}
+
+/**
+  @brief         Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q7x4_da (
+  q7_t ** pQ7)
+{
+  q31_t val;
+
+  memcpy (&val, *pQ7, 4);
+  *pQ7 -= 4;
+
+  return (val);
+}
+
+/**
+  @brief         Write 4 Q7 to Q7 pointer and increment pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q7x4_ia (
+  q7_t ** pQ7,
+  q31_t   value)
+{
+  q31_t val = value;
+
+  memcpy (*pQ7, &val, 4);
+  *pQ7 += 4;
+}
+
+/*
+
+Normally those kind of definitions are in a compiler file
+in Core or Core_A.
+
+But for MSVC compiler it is a bit special. The goal is very specific
+to CMSIS-DSP and only to allow the use of this library from other
+systems like Python or Matlab.
+
+MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
+compiler file in Core or Core_A would not make sense.
+
+*/
+#if defined ( _MSC_VER )
+    __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
+    {
+      if (data == 0U) { return 32U; }
+
+      uint32_t count = 0U;
+      uint32_t mask = 0x80000000U;
+
+      while ((data & mask) == 0U)
+      {
+        count += 1U;
+        mask = mask >> 1U;
+      }
+      return count;
+    }
+
+  __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+  {
+    if ((sat >= 1U) && (sat <= 32U))
+    {
+      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+      const int32_t min = -1 - max ;
+      if (val > max)
+      {
+        return max;
+      }
+      else if (val < min)
+      {
+        return min;
+      }
+    }
+    return val;
+  }
+
+  __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+  {
+    if (sat <= 31U)
+    {
+      const uint32_t max = ((1U << sat) - 1U);
+      if (val > (int32_t)max)
+      {
+        return max;
+      }
+      else if (val < 0)
+      {
+        return 0U;
+      }
+    }
+    return (uint32_t)val;
+  }
+#endif
+
+#ifndef ARM_MATH_DSP
+  /**
+   * @brief definition to pack two 16 bit values.
+   */
+  #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0x0000FFFF) | \
+                                      (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
+  #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0xFFFF0000) | \
+                                      (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
+#endif
+
+   /**
+   * @brief definition to pack four 8 bit values.
+   */
+#ifndef ARM_MATH_BIG_ENDIAN
+  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
+                                  (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
+                                  (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
+                                  (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
+#else
+  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
+                                  (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
+                                  (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
+                                  (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
+#endif
+
+
+  /**
+   * @brief Clips Q63 to Q31 values.
+   */
+  __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
+  q63_t x)
+  {
+    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+      ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
+  }
+
+  /**
+   * @brief Clips Q63 to Q15 values.
+   */
+  __STATIC_FORCEINLINE q15_t clip_q63_to_q15(
+  q63_t x)
+  {
+    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+      ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
+  }
+
+  /**
+   * @brief Clips Q31 to Q7 values.
+   */
+  __STATIC_FORCEINLINE q7_t clip_q31_to_q7(
+  q31_t x)
+  {
+    return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
+      ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
+  }
+
+  /**
+   * @brief Clips Q31 to Q15 values.
+   */
+  __STATIC_FORCEINLINE q15_t clip_q31_to_q15(
+  q31_t x)
+  {
+    return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
+      ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
+  }
+
+  /**
+   * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
+   */
+  __STATIC_FORCEINLINE q63_t mult32x64(
+  q63_t x,
+  q31_t y)
+  {
+    return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
+            (((q63_t) (x >> 32)                * y)      )  );
+  }
+
+  /**
+   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
+   */
+  __STATIC_FORCEINLINE uint32_t arm_recip_q31(
+        q31_t in,
+        q31_t * dst,
+  const q31_t * pRecipTable)
+  {
+    q31_t out;
+    uint32_t tempVal;
+    uint32_t index, i;
+    uint32_t signBits;
+
+    if (in > 0)
+    {
+      signBits = ((uint32_t) (__CLZ( in) - 1));
+    }
+    else
+    {
+      signBits = ((uint32_t) (__CLZ(-in) - 1));
+    }
+
+    /* Convert input sample to 1.31 format */
+    in = (in << signBits);
+
+    /* calculation of index for initial approximated Val */
+    index = (uint32_t)(in >> 24);
+    index = (index & INDEX_MASK);
+
+    /* 1.31 with exp 1 */
+    out = pRecipTable[index];
+
+    /* calculation of reciprocal value */
+    /* running approximation for two iterations */
+    for (i = 0U; i < 2U; i++)
+    {
+      tempVal = (uint32_t) (((q63_t) in * out) >> 31);
+      tempVal = 0x7FFFFFFFu - tempVal;
+      /*      1.31 with exp 1 */
+      /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
+      out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
+    }
+
+    /* write output */
+    *dst = out;
+
+    /* return num of signbits of out = 1/in value */
+    return (signBits + 1U);
+  }
+
+
+  /**
+   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
+   */
+  __STATIC_FORCEINLINE uint32_t arm_recip_q15(
+        q15_t in,
+        q15_t * dst,
+  const q15_t * pRecipTable)
+  {
+    q15_t out = 0;
+    uint32_t tempVal = 0;
+    uint32_t index = 0, i = 0;
+    uint32_t signBits = 0;
+
+    if (in > 0)
+    {
+      signBits = ((uint32_t)(__CLZ( in) - 17));
+    }
+    else
+    {
+      signBits = ((uint32_t)(__CLZ(-in) - 17));
+    }
+
+    /* Convert input sample to 1.15 format */
+    in = (in << signBits);
+
+    /* calculation of index for initial approximated Val */
+    index = (uint32_t)(in >>  8);
+    index = (index & INDEX_MASK);
+
+    /*      1.15 with exp 1  */
+    out = pRecipTable[index];
+
+    /* calculation of reciprocal value */
+    /* running approximation for two iterations */
+    for (i = 0U; i < 2U; i++)
+    {
+      tempVal = (uint32_t) (((q31_t) in * out) >> 15);
+      tempVal = 0x7FFFu - tempVal;
+      /*      1.15 with exp 1 */
+      out = (q15_t) (((q31_t) out * tempVal) >> 14);
+      /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
+    }
+
+    /* write output */
+    *dst = out;
+
+    /* return num of signbits of out = 1/in value */
+    return (signBits + 1);
+  }
+
+#if defined(ARM_MATH_NEON)
+
+static inline float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t  x)
+{
+    float32x4_t x1 = vmaxq_f32(x, vdupq_n_f32(FLT_MIN));
+    float32x4_t e = vrsqrteq_f32(x1);
+    e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
+    e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
+    return vmulq_f32(x, e);
+}
+
+static inline int16x8_t __arm_vec_sqrt_q15_neon(int16x8_t vec)
+{
+    float32x4_t tempF;
+    int32x4_t tempHI,tempLO;
+
+    tempLO = vmovl_s16(vget_low_s16(vec));
+    tempF = vcvtq_n_f32_s32(tempLO,15);
+    tempF = __arm_vec_sqrt_f32_neon(tempF);
+    tempLO = vcvtq_n_s32_f32(tempF,15);
+
+    tempHI = vmovl_s16(vget_high_s16(vec));
+    tempF = vcvtq_n_f32_s32(tempHI,15);
+    tempF = __arm_vec_sqrt_f32_neon(tempF);
+    tempHI = vcvtq_n_s32_f32(tempF,15);
+
+    return(vcombine_s16(vqmovn_s32(tempLO),vqmovn_s32(tempHI)));
+}
+
+static inline int32x4_t __arm_vec_sqrt_q31_neon(int32x4_t vec)
+{
+  float32x4_t temp;
+
+  temp = vcvtq_n_f32_s32(vec,31);
+  temp = __arm_vec_sqrt_f32_neon(temp);
+  return(vcvtq_n_s32_f32(temp,31));
+}
+
+#endif
+
+/*
+ * @brief C custom defined intrinsic functions
+ */
+#if !defined (ARM_MATH_DSP)
+
+  /*
+   * @brief C custom defined QADD8
+   */
+  __STATIC_FORCEINLINE uint32_t __QADD8(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s, t, u;
+
+    r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+    s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+    t = __SSAT(((((q31_t)x <<  8) >> 24) + (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
+    u = __SSAT(((((q31_t)x      ) >> 24) + (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
+
+    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QSUB8
+   */
+  __STATIC_FORCEINLINE uint32_t __QSUB8(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s, t, u;
+
+    r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+    s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+    t = __SSAT(((((q31_t)x <<  8) >> 24) - (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
+    u = __SSAT(((((q31_t)x      ) >> 24) - (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
+
+    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QADD16
+   */
+  __STATIC_FORCEINLINE uint32_t __QADD16(
+  uint32_t x,
+  uint32_t y)
+  {
+/*  q31_t r,     s;  without initialisation 'arm_offset_q15 test' fails  but 'intrinsic' tests pass! for armCC */
+    q31_t r = 0, s = 0;
+
+    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SHADD16
+   */
+  __STATIC_FORCEINLINE uint32_t __SHADD16(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    s = (((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QSUB16
+   */
+  __STATIC_FORCEINLINE uint32_t __QSUB16(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SHSUB16
+   */
+  __STATIC_FORCEINLINE uint32_t __SHSUB16(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    s = (((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QASX
+   */
+  __STATIC_FORCEINLINE uint32_t __QASX(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SHASX
+   */
+  __STATIC_FORCEINLINE uint32_t __SHASX(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    s = (((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QSAX
+   */
+  __STATIC_FORCEINLINE uint32_t __QSAX(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SHSAX
+   */
+  __STATIC_FORCEINLINE uint32_t __SHSAX(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    s = (((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SMUSDX
+   */
+  __STATIC_FORCEINLINE uint32_t __SMUSDX(
+  uint32_t x,
+  uint32_t y)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
+  }
+
+  /*
+   * @brief C custom defined SMUADX
+   */
+  __STATIC_FORCEINLINE uint32_t __SMUADX(
+  uint32_t x,
+  uint32_t y)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
+  }
+
+
+  /*
+   * @brief C custom defined QADD
+   */
+  __STATIC_FORCEINLINE int32_t __QADD(
+  int32_t x,
+  int32_t y)
+  {
+    return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
+  }
+
+
+  /*
+   * @brief C custom defined QSUB
+   */
+  __STATIC_FORCEINLINE int32_t __QSUB(
+  int32_t x,
+  int32_t y)
+  {
+    return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
+  }
+
+
+  /*
+   * @brief C custom defined SMLAD
+   */
+  __STATIC_FORCEINLINE uint32_t __SMLAD(
+  uint32_t x,
+  uint32_t y,
+  uint32_t sum)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ( ((q31_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMLADX
+   */
+  __STATIC_FORCEINLINE uint32_t __SMLADX(
+  uint32_t x,
+  uint32_t y,
+  uint32_t sum)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ( ((q31_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMLSDX
+   */
+  __STATIC_FORCEINLINE uint32_t __SMLSDX(
+  uint32_t x,
+  uint32_t y,
+  uint32_t sum)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ( ((q31_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMLALD
+   */
+  __STATIC_FORCEINLINE uint64_t __SMLALD(
+  uint32_t x,
+  uint32_t y,
+  uint64_t sum)
+  {
+/*  return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
+    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ( ((q63_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMLALDX
+   */
+  __STATIC_FORCEINLINE uint64_t __SMLALDX(
+  uint32_t x,
+  uint32_t y,
+  uint64_t sum)
+  {
+/*  return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
+    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ( ((q63_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMUAD
+   */
+  __STATIC_FORCEINLINE uint32_t __SMUAD(
+  uint32_t x,
+  uint32_t y)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMUSD
+   */
+  __STATIC_FORCEINLINE uint32_t __SMUSD(
+  uint32_t x,
+  uint32_t y)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
+  }
+
+
+  /*
+   * @brief C custom defined SXTB16
+   */
+  __STATIC_FORCEINLINE uint32_t __SXTB16(
+  uint32_t x)
+  {
+    return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
+                       ((((q31_t)x <<  8) >>  8) & (q31_t)0xFFFF0000)  ));
+  }
+
+  /*
+   * @brief C custom defined SMMLA
+   */
+  __STATIC_FORCEINLINE int32_t __SMMLA(
+  int32_t x,
+  int32_t y,
+  int32_t sum)
+  {
+    return (sum + (int32_t) (((int64_t) x * y) >> 32));
+  }
+
+#endif /* !defined (ARM_MATH_DSP) */
+
+
+  /**
+   * @brief Instance structure for the Q7 FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;        /**< number of filter coefficients in the filter. */
+          q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+  } arm_fir_instance_q7;
+
+  /**
+   * @brief Instance structure for the Q15 FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;         /**< number of filter coefficients in the filter. */
+          q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+  } arm_fir_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;         /**< number of filter coefficients in the filter. */
+          q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
+  } arm_fir_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< number of filter coefficients in the filter. */
+          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+  } arm_fir_instance_f32;
+
+  /**
+   * @brief Processing function for the Q7 FIR filter.
+   * @param[in]  S          points to an instance of the Q7 FIR filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_q7(
+  const arm_fir_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q7 FIR filter.
+   * @param[in,out] S          points to an instance of the Q7 FIR structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed.
+   */
+  void arm_fir_init_q7(
+        arm_fir_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q15 FIR filter.
+   * @param[in]  S          points to an instance of the Q15 FIR structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the fast Q15 FIR filter (fast version).
+   * @param[in]  S          points to an instance of the Q15 FIR filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_fast_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q15 FIR filter.
+   * @param[in,out] S          points to an instance of the Q15 FIR filter structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed at a time.
+   * @return     The function returns either
+   * ARM_MATH_SUCCESS if initialization was successful or
+   * ARM_MATH_ARGUMENT_ERROR if numTaps is not a supported value.
+   */
+  arm_status arm_fir_init_q15(
+        arm_fir_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 FIR filter.
+   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the fast Q31 FIR filter (fast version).
+   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_fast_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q31 FIR filter.
+   * @param[in,out] S          points to an instance of the Q31 FIR structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed at a time.
+   */
+  void arm_fir_init_q31(
+        arm_fir_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the floating-point FIR filter.
+   * @param[in]  S          points to an instance of the floating-point FIR structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_f32(
+  const arm_fir_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point FIR filter.
+   * @param[in,out] S          points to an instance of the floating-point FIR filter structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed at a time.
+   */
+  void arm_fir_init_f32(
+        arm_fir_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Instance structure for the Q15 Biquad cascade filter.
+   */
+  typedef struct
+  {
+          int8_t numStages;        /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q15_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q15_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+          int8_t postShift;        /**< Additional shift, in bits, applied to each output sample. */
+  } arm_biquad_casd_df1_inst_q15;
+
+  /**
+   * @brief Instance structure for the Q31 Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
+  } arm_biquad_casd_df1_inst_q31;
+
+  /**
+   * @brief Instance structure for the floating-point Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const float32_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_casd_df1_inst_f32;
+
+  /**
+   * @brief Processing function for the Q15 Biquad cascade filter.
+   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q15 Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
+   */
+  void arm_biquad_cascade_df1_init_q15(
+        arm_biquad_casd_df1_inst_q15 * S,
+        uint8_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int8_t postShift);
+
+  /**
+   * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_fast_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 Biquad cascade filter
+   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_fast_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q31 Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
+   */
+  void arm_biquad_cascade_df1_init_q31(
+        arm_biquad_casd_df1_inst_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int8_t postShift);
+
+  /**
+   * @brief Processing function for the floating-point Biquad cascade filter.
+   * @param[in]  S          points to an instance of the floating-point Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the floating-point Biquad cascade structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_df1_init_f32(
+        arm_biquad_casd_df1_inst_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
+
+  /**
+   * @brief Instance structure for the floating-point matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    float32_t *pData;     /**< points to the data of the matrix. */
+  } arm_matrix_instance_f32;
+
+
+  /**
+   * @brief Instance structure for the floating-point matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    float64_t *pData;     /**< points to the data of the matrix. */
+  } arm_matrix_instance_f64;
+
+  /**
+   * @brief Instance structure for the Q15 matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    q15_t *pData;         /**< points to the data of the matrix. */
+  } arm_matrix_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    q31_t *pData;         /**< points to the data of the matrix. */
+  } arm_matrix_instance_q31;
+
+  /**
+   * @brief Floating-point matrix addition.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix addition.
+   * @param[in]   pSrcA  points to the first input matrix structure
+   * @param[in]   pSrcB  points to the second input matrix structure
+   * @param[out]  pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_add_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix addition.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_add_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point, complex, matrix multiplication.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15, complex,  matrix multiplication.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pScratch);
+
+  /**
+   * @brief Q31, complex, matrix multiplication.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
+   * or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
+   * or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  ARM_MATH_SIZE_MISMATCH
+   * or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix multiplication
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix multiplication
+   * @param[in]  pSrcA   points to the first input matrix structure
+   * @param[in]  pSrcB   points to the second input matrix structure
+   * @param[out] pDst    points to output matrix structure
+   * @param[in]  pState  points to the array for storing intermediate results
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pState);
+
+  /**
+   * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA   points to the first input matrix structure
+   * @param[in]  pSrcB   points to the second input matrix structure
+   * @param[out] pDst    points to output matrix structure
+   * @param[in]  pState  points to the array for storing intermediate results
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_fast_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pState);
+
+  /**
+   * @brief Q31 matrix multiplication
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_fast_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix subtraction
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix subtraction
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_sub_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix subtraction
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_sub_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix scaling.
+   * @param[in]  pSrc   points to the input matrix
+   * @param[in]  scale  scale factor
+   * @param[out] pDst   points to the output matrix
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        float32_t scale,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix scaling.
+   * @param[in]  pSrc        points to input matrix
+   * @param[in]  scaleFract  fractional portion of the scale factor
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to output matrix
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_scale_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        q15_t scaleFract,
+        int32_t shift,
+        arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix scaling.
+   * @param[in]  pSrc        points to input matrix
+   * @param[in]  scaleFract  fractional portion of the scale factor
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to output matrix structure
+   * @return     The function returns either
+   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+   */
+arm_status arm_mat_scale_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        q31_t scaleFract,
+        int32_t shift,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief  Q31 matrix initialization.
+   * @param[in,out] S         points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows     number of rows in the matrix.
+   * @param[in]     nColumns  number of columns in the matrix.
+   * @param[in]     pData     points to the matrix data array.
+   */
+void arm_mat_init_q31(
+        arm_matrix_instance_q31 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        q31_t * pData);
+
+  /**
+   * @brief  Q15 matrix initialization.
+   * @param[in,out] S         points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows     number of rows in the matrix.
+   * @param[in]     nColumns  number of columns in the matrix.
+   * @param[in]     pData     points to the matrix data array.
+   */
+void arm_mat_init_q15(
+        arm_matrix_instance_q15 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        q15_t * pData);
+
+  /**
+   * @brief  Floating-point matrix initialization.
+   * @param[in,out] S         points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows     number of rows in the matrix.
+   * @param[in]     nColumns  number of columns in the matrix.
+   * @param[in]     pData     points to the matrix data array.
+   */
+void arm_mat_init_f32(
+        arm_matrix_instance_f32 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        float32_t * pData);
+
+
+  /**
+   * @brief Instance structure for the Q15 PID Control.
+   */
+  typedef struct
+  {
+          q15_t A0;           /**< The derived gain, A0 = Kp + Ki + Kd . */
+#if !defined (ARM_MATH_DSP)
+          q15_t A1;
+          q15_t A2;
+#else
+          q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
+#endif
+          q15_t state[3];     /**< The state array of length 3. */
+          q15_t Kp;           /**< The proportional gain. */
+          q15_t Ki;           /**< The integral gain. */
+          q15_t Kd;           /**< The derivative gain. */
+  } arm_pid_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 PID Control.
+   */
+  typedef struct
+  {
+          q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
+          q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
+          q31_t A2;            /**< The derived gain, A2 = Kd . */
+          q31_t state[3];      /**< The state array of length 3. */
+          q31_t Kp;            /**< The proportional gain. */
+          q31_t Ki;            /**< The integral gain. */
+          q31_t Kd;            /**< The derivative gain. */
+  } arm_pid_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point PID Control.
+   */
+  typedef struct
+  {
+          float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
+          float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
+          float32_t A2;          /**< The derived gain, A2 = Kd . */
+          float32_t state[3];    /**< The state array of length 3. */
+          float32_t Kp;          /**< The proportional gain. */
+          float32_t Ki;          /**< The integral gain. */
+          float32_t Kd;          /**< The derivative gain. */
+  } arm_pid_instance_f32;
+
+
+
+  /**
+   * @brief  Initialization function for the floating-point PID Control.
+   * @param[in,out] S               points to an instance of the PID structure.
+   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   */
+  void arm_pid_init_f32(
+        arm_pid_instance_f32 * S,
+        int32_t resetStateFlag);
+
+
+  /**
+   * @brief  Reset function for the floating-point PID Control.
+   * @param[in,out] S  is an instance of the floating-point PID Control structure
+   */
+  void arm_pid_reset_f32(
+        arm_pid_instance_f32 * S);
+
+
+  /**
+   * @brief  Initialization function for the Q31 PID Control.
+   * @param[in,out] S               points to an instance of the Q15 PID structure.
+   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   */
+  void arm_pid_init_q31(
+        arm_pid_instance_q31 * S,
+        int32_t resetStateFlag);
+
+
+  /**
+   * @brief  Reset function for the Q31 PID Control.
+   * @param[in,out] S   points to an instance of the Q31 PID Control structure
+   */
+
+  void arm_pid_reset_q31(
+        arm_pid_instance_q31 * S);
+
+
+  /**
+   * @brief  Initialization function for the Q15 PID Control.
+   * @param[in,out] S               points to an instance of the Q15 PID structure.
+   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   */
+  void arm_pid_init_q15(
+        arm_pid_instance_q15 * S,
+        int32_t resetStateFlag);
+
+
+  /**
+   * @brief  Reset function for the Q15 PID Control.
+   * @param[in,out] S  points to an instance of the q15 PID Control structure
+   */
+  void arm_pid_reset_q15(
+        arm_pid_instance_q15 * S);
+
+
+  /**
+   * @brief Instance structure for the floating-point Linear Interpolate function.
+   */
+  typedef struct
+  {
+          uint32_t nValues;           /**< nValues */
+          float32_t x1;               /**< x1 */
+          float32_t xSpacing;         /**< xSpacing */
+          float32_t *pYData;          /**< pointer to the table of Y values */
+  } arm_linear_interp_instance_f32;
+
+  /**
+   * @brief Instance structure for the floating-point bilinear interpolation function.
+   */
+  typedef struct
+  {
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          float32_t *pData;   /**< points to the data table. */
+  } arm_bilinear_interp_instance_f32;
+
+   /**
+   * @brief Instance structure for the Q31 bilinear interpolation function.
+   */
+  typedef struct
+  {
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q31_t *pData;       /**< points to the data table. */
+  } arm_bilinear_interp_instance_q31;
+
+   /**
+   * @brief Instance structure for the Q15 bilinear interpolation function.
+   */
+  typedef struct
+  {
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q15_t *pData;       /**< points to the data table. */
+  } arm_bilinear_interp_instance_q15;
+
+   /**
+   * @brief Instance structure for the Q15 bilinear interpolation function.
+   */
+  typedef struct
+  {
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q7_t *pData;        /**< points to the data table. */
+  } arm_bilinear_interp_instance_q7;
+
+
+  /**
+   * @brief Q7 vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q15 vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q31 vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Floating-point vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q15 CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q15_t *pTwiddle;                 /**< points to the Sin twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix2_instance_q15;
+
+/* Deprecated */
+  arm_status arm_cfft_radix2_init_q15(
+        arm_cfft_radix2_instance_q15 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix2_q15(
+  const arm_cfft_radix2_instance_q15 * S,
+        q15_t * pSrc);
+
+
+  /**
+   * @brief Instance structure for the Q15 CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix4_instance_q15;
+
+/* Deprecated */
+  arm_status arm_cfft_radix4_init_q15(
+        arm_cfft_radix4_instance_q15 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix4_q15(
+  const arm_cfft_radix4_instance_q15 * S,
+        q15_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q31_t *pTwiddle;                 /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix2_instance_q31;
+
+/* Deprecated */
+  arm_status arm_cfft_radix2_init_q31(
+        arm_cfft_radix2_instance_q31 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix2_q31(
+  const arm_cfft_radix2_instance_q31 * S,
+        q31_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Q31 CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix4_instance_q31;
+
+/* Deprecated */
+  void arm_cfft_radix4_q31(
+  const arm_cfft_radix4_instance_q31 * S,
+        q31_t * pSrc);
+
+/* Deprecated */
+  arm_status arm_cfft_radix4_init_q31(
+        arm_cfft_radix4_instance_q31 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          float32_t onebyfftLen;             /**< value of 1/fftLen. */
+  } arm_cfft_radix2_instance_f32;
+
+/* Deprecated */
+  arm_status arm_cfft_radix2_init_f32(
+        arm_cfft_radix2_instance_f32 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix2_f32(
+  const arm_cfft_radix2_instance_f32 * S,
+        float32_t * pSrc);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          float32_t onebyfftLen;             /**< value of 1/fftLen. */
+  } arm_cfft_radix4_instance_f32;
+
+/* Deprecated */
+  arm_status arm_cfft_radix4_init_f32(
+        arm_cfft_radix4_instance_f32 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix4_f32(
+  const arm_cfft_radix4_instance_f32 * S,
+        float32_t * pSrc);
+
+  /**
+   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+    const q15_t *pTwiddle;             /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
+  } arm_cfft_instance_q15;
+
+void arm_cfft_q15(
+    const arm_cfft_instance_q15 * S,
+          q15_t * p1,
+          uint8_t ifftFlag,
+          uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+    const q31_t *pTwiddle;             /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
+  } arm_cfft_instance_q31;
+
+void arm_cfft_q31(
+    const arm_cfft_instance_q31 * S,
+          q31_t * p1,
+          uint8_t ifftFlag,
+          uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
+  } arm_cfft_instance_f32;
+
+  void arm_cfft_f32(
+  const arm_cfft_instance_f32 * S,
+        float32_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the Q15 RFFT/RIFFT function.
+   */
+  typedef struct
+  {
+          uint32_t fftLenReal;                      /**< length of the real FFT. */
+          uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
+    const q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
+    const arm_cfft_instance_q15 *pCfft;       /**< points to the complex FFT instance. */
+  } arm_rfft_instance_q15;
+
+  arm_status arm_rfft_init_q15(
+        arm_rfft_instance_q15 * S,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
+
+  void arm_rfft_q15(
+  const arm_rfft_instance_q15 * S,
+        q15_t * pSrc,
+        q15_t * pDst);
+
+  /**
+   * @brief Instance structure for the Q31 RFFT/RIFFT function.
+   */
+  typedef struct
+  {
+          uint32_t fftLenReal;                        /**< length of the real FFT. */
+          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
+    const q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
+    const arm_cfft_instance_q31 *pCfft;         /**< points to the complex FFT instance. */
+  } arm_rfft_instance_q31;
+
+  arm_status arm_rfft_init_q31(
+        arm_rfft_instance_q31 * S,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
+
+  void arm_rfft_q31(
+  const arm_rfft_instance_q31 * S,
+        q31_t * pSrc,
+        q31_t * pDst);
+
+  /**
+   * @brief Instance structure for the floating-point RFFT/RIFFT function.
+   */
+  typedef struct
+  {
+          uint32_t fftLenReal;                        /**< length of the real FFT. */
+          uint16_t fftLenBy2;                         /**< length of the complex FFT. */
+          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
+    const float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
+          arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
+  } arm_rfft_instance_f32;
+
+  arm_status arm_rfft_init_f32(
+        arm_rfft_instance_f32 * S,
+        arm_cfft_radix4_instance_f32 * S_CFFT,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
+
+  void arm_rfft_f32(
+  const arm_rfft_instance_f32 * S,
+        float32_t * pSrc,
+        float32_t * pDst);
+
+  /**
+   * @brief Instance structure for the floating-point RFFT/RIFFT function.
+   */
+typedef struct
+  {
+          arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
+          uint16_t fftLenRFFT;             /**< length of the real sequence */
+    const float32_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
+  } arm_rfft_fast_instance_f32 ;
+
+arm_status arm_rfft_fast_init_f32 (
+         arm_rfft_fast_instance_f32 * S,
+         uint16_t fftLen);
+
+arm_status arm_rfft_32_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_64_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_128_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_256_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_512_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_1024_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_2048_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+arm_status arm_rfft_4096_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
+
+
+  void arm_rfft_fast_f32(
+        arm_rfft_fast_instance_f32 * S,
+        float32_t * p, float32_t * pOut,
+        uint8_t ifftFlag);
+
+  /**
+   * @brief Instance structure for the floating-point DCT4/IDCT4 function.
+   */
+  typedef struct
+  {
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          float32_t normalize;                 /**< normalizing factor. */
+    const float32_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const float32_t *pCosFactor;               /**< points to the cosFactor table. */
+          arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_f32;
+
+
+  /**
+   * @brief  Initialization function for the floating-point DCT4/IDCT4.
+   * @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure.
+   * @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure.
+   * @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure.
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.
+   */
+  arm_status arm_dct4_init_f32(
+        arm_dct4_instance_f32 * S,
+        arm_rfft_instance_f32 * S_RFFT,
+        arm_cfft_radix4_instance_f32 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        float32_t normalize);
+
+
+  /**
+   * @brief Processing function for the floating-point DCT4/IDCT4.
+   * @param[in]     S              points to an instance of the floating-point DCT4/IDCT4 structure.
+   * @param[in]     pState         points to state buffer.
+   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+   */
+  void arm_dct4_f32(
+  const arm_dct4_instance_f32 * S,
+        float32_t * pState,
+        float32_t * pInlineBuffer);
+
+
+  /**
+   * @brief Instance structure for the Q31 DCT4/IDCT4 function.
+   */
+  typedef struct
+  {
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          q31_t normalize;                     /**< normalizing factor. */
+    const q31_t *pTwiddle;                     /**< points to the twiddle factor table. */
+    const q31_t *pCosFactor;                   /**< points to the cosFactor table. */
+          arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_q31;
+
+
+  /**
+   * @brief  Initialization function for the Q31 DCT4/IDCT4.
+   * @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
+   * @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
+   * @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
+   */
+  arm_status arm_dct4_init_q31(
+        arm_dct4_instance_q31 * S,
+        arm_rfft_instance_q31 * S_RFFT,
+        arm_cfft_radix4_instance_q31 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        q31_t normalize);
+
+
+  /**
+   * @brief Processing function for the Q31 DCT4/IDCT4.
+   * @param[in]     S              points to an instance of the Q31 DCT4 structure.
+   * @param[in]     pState         points to state buffer.
+   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+   */
+  void arm_dct4_q31(
+  const arm_dct4_instance_q31 * S,
+        q31_t * pState,
+        q31_t * pInlineBuffer);
+
+
+  /**
+   * @brief Instance structure for the Q15 DCT4/IDCT4 function.
+   */
+  typedef struct
+  {
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          q15_t normalize;                     /**< normalizing factor. */
+    const q15_t *pTwiddle;                     /**< points to the twiddle factor table. */
+    const q15_t *pCosFactor;                   /**< points to the cosFactor table. */
+          arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_q15;
+
+
+  /**
+   * @brief  Initialization function for the Q15 DCT4/IDCT4.
+   * @param[in,out] S          points to an instance of Q15 DCT4/IDCT4 structure.
+   * @param[in]     S_RFFT     points to an instance of Q15 RFFT/RIFFT structure.
+   * @param[in]     S_CFFT     points to an instance of Q15 CFFT/CIFFT structure.
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
+   */
+  arm_status arm_dct4_init_q15(
+        arm_dct4_instance_q15 * S,
+        arm_rfft_instance_q15 * S_RFFT,
+        arm_cfft_radix4_instance_q15 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        q15_t normalize);
+
+
+  /**
+   * @brief Processing function for the Q15 DCT4/IDCT4.
+   * @param[in]     S              points to an instance of the Q15 DCT4 structure.
+   * @param[in]     pState         points to state buffer.
+   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+   */
+  void arm_dct4_q15(
+  const arm_dct4_instance_q15 * S,
+        q15_t * pState,
+        q15_t * pInlineBuffer);
+
+
+  /**
+   * @brief Floating-point vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q7 vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q15 vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q31 vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Floating-point vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q7 vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q15 vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q31 vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Multiplies a floating-point vector by a scalar.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  scale      scale factor to be applied
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_scale_f32(
+  const float32_t * pSrc,
+        float32_t scale,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Multiplies a Q7 vector by a scalar.
+   * @param[in]  pSrc        points to the input vector
+   * @param[in]  scaleFract  fractional portion of the scale value
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to the output vector
+   * @param[in]  blockSize   number of samples in the vector
+   */
+  void arm_scale_q7(
+  const q7_t * pSrc,
+        q7_t scaleFract,
+        int8_t shift,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Multiplies a Q15 vector by a scalar.
+   * @param[in]  pSrc        points to the input vector
+   * @param[in]  scaleFract  fractional portion of the scale value
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to the output vector
+   * @param[in]  blockSize   number of samples in the vector
+   */
+  void arm_scale_q15(
+  const q15_t * pSrc,
+        q15_t scaleFract,
+        int8_t shift,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Multiplies a Q31 vector by a scalar.
+   * @param[in]  pSrc        points to the input vector
+   * @param[in]  scaleFract  fractional portion of the scale value
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to the output vector
+   * @param[in]  blockSize   number of samples in the vector
+   */
+  void arm_scale_q31(
+  const q31_t * pSrc,
+        q31_t scaleFract,
+        int8_t shift,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q7 vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Floating-point vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q15 vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q31 vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Dot product of floating-point vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t blockSize,
+        float32_t * result);
+
+
+  /**
+   * @brief Dot product of Q7 vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        uint32_t blockSize,
+        q31_t * result);
+
+
+  /**
+   * @brief Dot product of Q15 vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result);
+
+
+  /**
+   * @brief Dot product of Q31 vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result);
+
+
+  /**
+   * @brief  Shifts the elements of a Q7 vector a specified number of bits.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_shift_q7(
+  const q7_t * pSrc,
+        int8_t shiftBits,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Shifts the elements of a Q15 vector a specified number of bits.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_shift_q15(
+  const q15_t * pSrc,
+        int8_t shiftBits,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Shifts the elements of a Q31 vector a specified number of bits.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_shift_q31(
+  const q31_t * pSrc,
+        int8_t shiftBits,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Adds a constant offset to a floating-point vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_f32(
+  const float32_t * pSrc,
+        float32_t offset,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Adds a constant offset to a Q7 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_q7(
+  const q7_t * pSrc,
+        q7_t offset,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Adds a constant offset to a Q15 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_q15(
+  const q15_t * pSrc,
+        q15_t offset,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Adds a constant offset to a Q31 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_q31(
+  const q31_t * pSrc,
+        q31_t offset,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Negates the elements of a floating-point vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Negates the elements of a Q7 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Negates the elements of a Q15 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Negates the elements of a Q31 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Copies the elements of a floating-point vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Copies the elements of a Q7 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Copies the elements of a Q15 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Copies the elements of a Q31 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a floating-point vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_f32(
+        float32_t value,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a Q7 vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_q7(
+        q7_t value,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a Q15 vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_q15(
+        q15_t value,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a Q31 vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_q31(
+        q31_t value,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+/**
+ * @brief Convolution of floating-point sequences.
+ * @param[in]  pSrcA    points to the first input sequence.
+ * @param[in]  srcALen  length of the first input sequence.
+ * @param[in]  pSrcB    points to the second input sequence.
+ * @param[in]  srcBLen  length of the second input sequence.
+ * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ */
+  void arm_conv_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q15 sequences.
+   * @param[in]  pSrcA      points to the first input sequence.
+   * @param[in]  srcALen    length of the first input sequence.
+   * @param[in]  pSrcB      points to the second input sequence.
+   * @param[in]  srcBLen    length of the second input sequence.
+   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+   */
+  void arm_conv_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+/**
+ * @brief Convolution of Q15 sequences.
+ * @param[in]  pSrcA    points to the first input sequence.
+ * @param[in]  srcALen  length of the first input sequence.
+ * @param[in]  pSrcB    points to the second input sequence.
+ * @param[in]  srcBLen  length of the second input sequence.
+ * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ */
+  void arm_conv_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+   */
+  void arm_conv_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA      points to the first input sequence.
+   * @param[in]  srcALen    length of the first input sequence.
+   * @param[in]  pSrcB      points to the second input sequence.
+   * @param[in]  srcBLen    length of the second input sequence.
+   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+   */
+  void arm_conv_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Convolution of Q31 sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+   */
+  void arm_conv_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+   */
+  void arm_conv_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
+
+
+    /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in]  pSrcA      points to the first input sequence.
+   * @param[in]  srcALen    length of the first input sequence.
+   * @param[in]  pSrcB      points to the second input sequence.
+   * @param[in]  srcBLen    length of the second input sequence.
+   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   */
+  void arm_conv_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+   */
+  void arm_conv_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst);
+
+
+  /**
+   * @brief Partial convolution of floating-point sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Partial convolution of Q31 sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q7 sequences
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @param[in]  pScratch1   points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2   points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+/**
+   * @brief Partial convolution of Q7 sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR decimator.
+   */
+  typedef struct
+  {
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const q15_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
+          q15_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+  } arm_fir_decimate_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR decimator.
+   */
+  typedef struct
+  {
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const q31_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
+          q31_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+  } arm_fir_decimate_instance_q31;
+
+/**
+  @brief Instance structure for floating-point FIR decimator.
+ */
+typedef struct
+  {
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const float32_t *pCoeffs;         /**< points to the coefficient array. The array is of length numTaps.*/
+          float32_t *pState;          /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+  } arm_fir_decimate_instance_f32;
+
+
+/**
+  @brief         Processing function for floating-point FIR decimator.
+  @param[in]     S         points to an instance of the floating-point FIR decimator structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+ */
+void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+/**
+  @brief         Initialization function for the floating-point FIR decimator.
+  @param[in,out] S          points to an instance of the floating-point FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M
+ */
+arm_status arm_fir_decimate_init_f32(
+        arm_fir_decimate_instance_f32 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 FIR decimator.
+   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_decimate_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_decimate_fast_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q15 FIR decimator.
+   * @param[in,out] S          points to an instance of the Q15 FIR decimator structure.
+   * @param[in]     numTaps    number of coefficients in the filter.
+   * @param[in]     M          decimation factor.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * blockSize is not a multiple of M.
+   */
+  arm_status arm_fir_decimate_init_q15(
+        arm_fir_decimate_instance_q15 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 FIR decimator.
+   * @param[in]  S     points to an instance of the Q31 FIR decimator structure.
+   * @param[in]  pSrc  points to the block of input data.
+   * @param[out] pDst  points to the block of output data
+   * @param[in] blockSize number of input samples to process per call.
+   */
+  void arm_fir_decimate_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+   * @param[in]  S          points to an instance of the Q31 FIR decimator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_decimate_fast_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q31 FIR decimator.
+   * @param[in,out] S          points to an instance of the Q31 FIR decimator structure.
+   * @param[in]     numTaps    number of coefficients in the filter.
+   * @param[in]     M          decimation factor.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * blockSize is not a multiple of M.
+   */
+  arm_status arm_fir_decimate_init_q31(
+        arm_fir_decimate_instance_q31 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR interpolator.
+   */
+  typedef struct
+  {
+        uint8_t L;                      /**< upsample factor. */
+        uint16_t phaseLength;           /**< length of each polyphase filter component. */
+  const q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
+        q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+  } arm_fir_interpolate_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR interpolator.
+   */
+  typedef struct
+  {
+        uint8_t L;                      /**< upsample factor. */
+        uint16_t phaseLength;           /**< length of each polyphase filter component. */
+  const q31_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
+        q31_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+  } arm_fir_interpolate_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR interpolator.
+   */
+  typedef struct
+  {
+        uint8_t L;                     /**< upsample factor. */
+        uint16_t phaseLength;          /**< length of each polyphase filter component. */
+  const float32_t *pCoeffs;            /**< points to the coefficient array. The array is of length L*phaseLength. */
+        float32_t *pState;             /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
+  } arm_fir_interpolate_instance_f32;
+
+
+  /**
+   * @brief Processing function for the Q15 FIR interpolator.
+   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_interpolate_q15(
+  const arm_fir_interpolate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q15 FIR interpolator.
+   * @param[in,out] S          points to an instance of the Q15 FIR interpolator structure.
+   * @param[in]     L          upsample factor.
+   * @param[in]     numTaps    number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficient buffer.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length numTaps is not a multiple of the interpolation factor L.
+   */
+  arm_status arm_fir_interpolate_init_q15(
+        arm_fir_interpolate_instance_q15 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 FIR interpolator.
+   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_interpolate_q31(
+  const arm_fir_interpolate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q31 FIR interpolator.
+   * @param[in,out] S          points to an instance of the Q31 FIR interpolator structure.
+   * @param[in]     L          upsample factor.
+   * @param[in]     numTaps    number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficient buffer.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length numTaps is not a multiple of the interpolation factor L.
+   */
+  arm_status arm_fir_interpolate_init_q31(
+        arm_fir_interpolate_instance_q31 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the floating-point FIR interpolator.
+   * @param[in]  S          points to an instance of the floating-point FIR interpolator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the floating-point FIR interpolator.
+   * @param[in,out] S          points to an instance of the floating-point FIR interpolator structure.
+   * @param[in]     L          upsample factor.
+   * @param[in]     numTaps    number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficient buffer.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length numTaps is not a multiple of the interpolation factor L.
+   */
+  arm_status arm_fir_interpolate_init_f32(
+        arm_fir_interpolate_instance_f32 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the high precision Q31 Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
+  } arm_biquad_cas_df1_32x64_ins_q31;
+
+
+  /**
+   * @param[in]  S          points to an instance of the high precision Q31 Biquad cascade filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cas_df1_32x64_q31(
+  const arm_biquad_cas_df1_32x64_ins_q31 * S,
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @param[in,out] S          points to an instance of the high precision Q31 Biquad cascade filter structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     postShift  shift to be applied to the output. Varies according to the coefficients format
+   */
+  void arm_biquad_cas_df1_32x64_init_q31(
+        arm_biquad_cas_df1_32x64_ins_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q63_t * pState,
+        uint8_t postShift);
+
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_df2T_instance_f32;
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_stereo_df2T_instance_f32;
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+          float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_df2T_instance_f64;
+
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in]  S          points to an instance of the filter data structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
+   * @param[in]  S          points to an instance of the filter data structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_stereo_df2T_f32(
+  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in]  S          points to an instance of the filter data structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df2T_f64(
+  const arm_biquad_cascade_df2T_instance_f64 * S,
+        float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize);
+
+
+#if defined(ARM_MATH_NEON) 
+void arm_biquad_cascade_df2T_compute_coefs_f32(
+  arm_biquad_cascade_df2T_instance_f32 * S,
+  uint8_t numStages,
+  float32_t * pCoeffs);
+#endif
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the filter data structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_df2T_init_f32(
+        arm_biquad_cascade_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
+
+
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the filter data structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_stereo_df2T_init_f32(
+        arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
+
+
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the filter data structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_df2T_init_f64(
+        arm_biquad_cascade_df2T_instance_f64 * S,
+        uint8_t numStages,
+        float64_t * pCoeffs,
+        float64_t * pState);
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of filter stages. */
+          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
+    const q15_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of filter stages. */
+          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
+    const q31_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of filter stages. */
+          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
+    const float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_f32;
+
+
+  /**
+   * @brief Initialization function for the Q15 FIR lattice filter.
+   * @param[in] S          points to an instance of the Q15 FIR lattice structure.
+   * @param[in] numStages  number of filter stages.
+   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] pState     points to the state buffer.  The array is of length numStages.
+   */
+  void arm_fir_lattice_init_q15(
+        arm_fir_lattice_instance_q15 * S,
+        uint16_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState);
+
+
+  /**
+   * @brief Processing function for the Q15 FIR lattice filter.
+   * @param[in]  S          points to an instance of the Q15 FIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_lattice_q15(
+  const arm_fir_lattice_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for the Q31 FIR lattice filter.
+   * @param[in] S          points to an instance of the Q31 FIR lattice structure.
+   * @param[in] numStages  number of filter stages.
+   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] pState     points to the state buffer.   The array is of length numStages.
+   */
+  void arm_fir_lattice_init_q31(
+        arm_fir_lattice_instance_q31 * S,
+        uint16_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState);
+
+
+  /**
+   * @brief Processing function for the Q31 FIR lattice filter.
+   * @param[in]  S          points to an instance of the Q31 FIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_lattice_q31(
+  const arm_fir_lattice_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+/**
+ * @brief Initialization function for the floating-point FIR lattice filter.
+ * @param[in] S          points to an instance of the floating-point FIR lattice structure.
+ * @param[in] numStages  number of filter stages.
+ * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+ * @param[in] pState     points to the state buffer.  The array is of length numStages.
+ */
+  void arm_fir_lattice_init_f32(
+        arm_fir_lattice_instance_f32 * S,
+        uint16_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
+
+
+  /**
+   * @brief Processing function for the floating-point FIR lattice filter.
+   * @param[in]  S          points to an instance of the floating-point FIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_lattice_f32(
+  const arm_fir_lattice_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q15 IIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
+          q15_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
+          q15_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 IIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
+          q31_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
+          q31_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point IIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages+blockSize. */
+          float32_t *pkCoeffs;                 /**< points to the reflection coefficient array. The array is of length numStages. */
+          float32_t *pvCoeffs;                 /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_f32;
+
+
+  /**
+   * @brief Processing function for the floating-point IIR lattice filter.
+   * @param[in]  S          points to an instance of the floating-point IIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_f32(
+  const arm_iir_lattice_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for the floating-point IIR lattice filter.
+   * @param[in] S          points to an instance of the floating-point IIR lattice structure.
+   * @param[in] numStages  number of stages in the filter.
+   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
+   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
+   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize-1.
+   * @param[in] blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_init_f32(
+        arm_iir_lattice_instance_f32 * S,
+        uint16_t numStages,
+        float32_t * pkCoeffs,
+        float32_t * pvCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 IIR lattice filter.
+   * @param[in]  S          points to an instance of the Q31 IIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_q31(
+  const arm_iir_lattice_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for the Q31 IIR lattice filter.
+   * @param[in] S          points to an instance of the Q31 IIR lattice structure.
+   * @param[in] numStages  number of stages in the filter.
+   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
+   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
+   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize.
+   * @param[in] blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_init_q31(
+        arm_iir_lattice_instance_q31 * S,
+        uint16_t numStages,
+        q31_t * pkCoeffs,
+        q31_t * pvCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 IIR lattice filter.
+   * @param[in]  S          points to an instance of the Q15 IIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_q15(
+  const arm_iir_lattice_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+/**
+ * @brief Initialization function for the Q15 IIR lattice filter.
+ * @param[in] S          points to an instance of the fixed-point Q15 IIR lattice structure.
+ * @param[in] numStages  number of stages in the filter.
+ * @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages.
+ * @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1.
+ * @param[in] pState     points to state buffer.  The array is of length numStages+blockSize.
+ * @param[in] blockSize  number of samples to process per call.
+ */
+  void arm_iir_lattice_init_q15(
+        arm_iir_lattice_instance_q15 * S,
+        uint16_t numStages,
+        q15_t * pkCoeffs,
+        q15_t * pvCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the floating-point LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
+          float32_t mu;        /**< step size that controls filter coefficient updates. */
+  } arm_lms_instance_f32;
+
+
+  /**
+   * @brief Processing function for floating-point LMS filter.
+   * @param[in]  S          points to an instance of the floating-point LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_f32(
+  const arm_lms_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for floating-point LMS filter.
+   * @param[in] S          points to an instance of the floating-point LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to the coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   */
+  void arm_lms_init_f32(
+        arm_lms_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q15 LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
+          q15_t mu;            /**< step size that controls filter coefficient updates. */
+          uint32_t postShift;  /**< bit shift applied to coefficients. */
+  } arm_lms_instance_q15;
+
+
+  /**
+   * @brief Initialization function for the Q15 LMS filter.
+   * @param[in] S          points to an instance of the Q15 LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to the coefficient buffer.
+   * @param[in] pState     points to the state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   * @param[in] postShift  bit shift applied to coefficients.
+   */
+  void arm_lms_init_q15(
+        arm_lms_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint32_t postShift);
+
+
+  /**
+   * @brief Processing function for Q15 LMS filter.
+   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_q15(
+  const arm_lms_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q31 LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
+          q31_t mu;            /**< step size that controls filter coefficient updates. */
+          uint32_t postShift;  /**< bit shift applied to coefficients. */
+  } arm_lms_instance_q31;
+
+
+  /**
+   * @brief Processing function for Q31 LMS filter.
+   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_q31(
+  const arm_lms_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for Q31 LMS filter.
+   * @param[in] S          points to an instance of the Q31 LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   * @param[in] postShift  bit shift applied to coefficients.
+   */
+  void arm_lms_init_q31(
+        arm_lms_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint32_t postShift);
+
+
+  /**
+   * @brief Instance structure for the floating-point normalized LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< number of coefficients in the filter. */
+          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+          float32_t mu;         /**< step size that control filter coefficient updates. */
+          float32_t energy;     /**< saves previous frame energy. */
+          float32_t x0;         /**< saves previous input sample. */
+  } arm_lms_norm_instance_f32;
+
+
+  /**
+   * @brief Processing function for floating-point normalized LMS filter.
+   * @param[in]  S          points to an instance of the floating-point normalized LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_norm_f32(
+        arm_lms_norm_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for floating-point normalized LMS filter.
+   * @param[in] S          points to an instance of the floating-point LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   */
+  void arm_lms_norm_init_f32(
+        arm_lms_norm_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q31 normalized LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< number of coefficients in the filter. */
+          q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
+          q31_t mu;             /**< step size that controls filter coefficient updates. */
+          uint8_t postShift;    /**< bit shift applied to coefficients. */
+    const q31_t *recipTable;    /**< points to the reciprocal initial value table. */
+          q31_t energy;         /**< saves previous frame energy. */
+          q31_t x0;             /**< saves previous input sample. */
+  } arm_lms_norm_instance_q31;
+
+
+  /**
+   * @brief Processing function for Q31 normalized LMS filter.
+   * @param[in]  S          points to an instance of the Q31 normalized LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_norm_q31(
+        arm_lms_norm_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for Q31 normalized LMS filter.
+   * @param[in] S          points to an instance of the Q31 normalized LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   * @param[in] postShift  bit shift applied to coefficients.
+   */
+  void arm_lms_norm_init_q31(
+        arm_lms_norm_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint8_t postShift);
+
+
+  /**
+   * @brief Instance structure for the Q15 normalized LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< Number of coefficients in the filter. */
+          q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
+          q15_t mu;             /**< step size that controls filter coefficient updates. */
+          uint8_t postShift;    /**< bit shift applied to coefficients. */
+    const q15_t *recipTable;    /**< Points to the reciprocal initial value table. */
+          q15_t energy;         /**< saves previous frame energy. */
+          q15_t x0;             /**< saves previous input sample. */
+  } arm_lms_norm_instance_q15;
+
+
+  /**
+   * @brief Processing function for Q15 normalized LMS filter.
+   * @param[in]  S          points to an instance of the Q15 normalized LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_norm_q15(
+        arm_lms_norm_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for Q15 normalized LMS filter.
+   * @param[in] S          points to an instance of the Q15 normalized LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   * @param[in] postShift  bit shift applied to coefficients.
+   */
+  void arm_lms_norm_init_q15(
+        arm_lms_norm_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint8_t postShift);
+
+
+  /**
+   * @brief Correlation of floating-point sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst);
+
+
+/**
+ @brief Correlation of Q15 sequences
+ @param[in]  pSrcA     points to the first input sequence
+ @param[in]  srcALen   length of the first input sequence
+ @param[in]  pSrcB     points to the second input sequence
+ @param[in]  srcBLen   length of the second input sequence
+ @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+*/
+void arm_correlate_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch);
+
+
+/**
+  @brief Correlation of Q15 sequences.
+  @param[in]  pSrcA    points to the first input sequence
+  @param[in]  srcALen  length of the first input sequence
+  @param[in]  pSrcB    points to the second input sequence
+  @param[in]  srcBLen  length of the second input sequence
+  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ */
+  void arm_correlate_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
+
+
+/**
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+ */
+void arm_correlate_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
+
+
+/**
+  @brief Correlation of Q15 sequences (fast version).
+  @param[in]  pSrcA     points to the first input sequence.
+  @param[in]  srcALen   length of the first input sequence.
+  @param[in]  pSrcB     points to the second input sequence.
+  @param[in]  srcBLen   length of the second input sequence.
+  @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ */
+void arm_correlate_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch);
+
+
+  /**
+   * @brief Correlation of Q31 sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
+
+
+/**
+  @brief Correlation of Q31 sequences (fast version).
+  @param[in]  pSrcA    points to the first input sequence
+  @param[in]  srcALen  length of the first input sequence
+  @param[in]  pSrcB    points to the second input sequence
+  @param[in]  srcBLen  length of the second input sequence
+  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ */
+void arm_correlate_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
+
+
+ /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in]  pSrcA      points to the first input sequence.
+   * @param[in]  srcALen    length of the first input sequence.
+   * @param[in]  pSrcB      points to the second input sequence.
+   * @param[in]  srcBLen    length of the second input sequence.
+   * @param[out] pDst       points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   */
+  void arm_correlate_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst);
+
+
+  /**
+   * @brief Instance structure for the floating-point sparse FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_f32;
+
+  /**
+   * @brief Instance structure for the Q31 sparse FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q31;
+
+  /**
+   * @brief Instance structure for the Q15 sparse FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q7 sparse FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q7;
+
+
+  /**
+   * @brief Processing function for the floating-point sparse FIR filter.
+   * @param[in]  S           points to an instance of the floating-point sparse FIR structure.
+   * @param[in]  pSrc        points to the block of input data.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize   number of input samples to process per call.
+   */
+  void arm_fir_sparse_f32(
+        arm_fir_sparse_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        float32_t * pScratchIn,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the floating-point sparse FIR filter.
+   * @param[in,out] S          points to an instance of the floating-point sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     pCoeffs    points to the array of filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     pTapDelay  points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   */
+  void arm_fir_sparse_init_f32(
+        arm_fir_sparse_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 sparse FIR filter.
+   * @param[in]  S           points to an instance of the Q31 sparse FIR structure.
+   * @param[in]  pSrc        points to the block of input data.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize   number of input samples to process per call.
+   */
+  void arm_fir_sparse_q31(
+        arm_fir_sparse_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        q31_t * pScratchIn,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q31 sparse FIR filter.
+   * @param[in,out] S          points to an instance of the Q31 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     pCoeffs    points to the array of filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     pTapDelay  points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   */
+  void arm_fir_sparse_init_q31(
+        arm_fir_sparse_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 sparse FIR filter.
+   * @param[in]  S            points to an instance of the Q15 sparse FIR structure.
+   * @param[in]  pSrc         points to the block of input data.
+   * @param[out] pDst         points to the block of output data
+   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
+   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize    number of input samples to process per call.
+   */
+  void arm_fir_sparse_q15(
+        arm_fir_sparse_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        q15_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q15 sparse FIR filter.
+   * @param[in,out] S          points to an instance of the Q15 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     pCoeffs    points to the array of filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     pTapDelay  points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   */
+  void arm_fir_sparse_init_q15(
+        arm_fir_sparse_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q7 sparse FIR filter.
+   * @param[in]  S            points to an instance of the Q7 sparse FIR structure.
+   * @param[in]  pSrc         points to the block of input data.
+   * @param[out] pDst         points to the block of output data
+   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
+   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize    number of input samples to process per call.
+   */
+  void arm_fir_sparse_q7(
+        arm_fir_sparse_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        q7_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q7 sparse FIR filter.
+   * @param[in,out] S          points to an instance of the Q7 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     pCoeffs    points to the array of filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     pTapDelay  points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   */
+  void arm_fir_sparse_init_q7(
+        arm_fir_sparse_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Floating-point sin_cos function.
+   * @param[in]  theta   input value in degrees
+   * @param[out] pSinVal  points to the processed sine output.
+   * @param[out] pCosVal  points to the processed cos output.
+   */
+  void arm_sin_cos_f32(
+        float32_t theta,
+        float32_t * pSinVal,
+        float32_t * pCosVal);
+
+
+  /**
+   * @brief  Q31 sin_cos function.
+   * @param[in]  theta    scaled input value in degrees
+   * @param[out] pSinVal  points to the processed sine output.
+   * @param[out] pCosVal  points to the processed cosine output.
+   */
+  void arm_sin_cos_q31(
+        q31_t theta,
+        q31_t * pSinVal,
+        q31_t * pCosVal);
+
+
+  /**
+   * @brief  Floating-point complex conjugate.
+   * @param[in]  pSrc        points to the input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_conj_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
+
+  /**
+   * @brief  Q31 complex conjugate.
+   * @param[in]  pSrc        points to the input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_conj_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q15 complex conjugate.
+   * @param[in]  pSrc        points to the input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_conj_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Floating-point complex magnitude squared
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_squared_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q31 complex magnitude squared
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_squared_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q15 complex magnitude squared
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_squared_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+
+ /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup PID PID Motor Control
+   *
+   * A Proportional Integral Derivative (PID) controller is a generic feedback control
+   * loop mechanism widely used in industrial control systems.
+   * A PID controller is the most commonly used type of feedback controller.
+   *
+   * This set of functions implements (PID) controllers
+   * for Q15, Q31, and floating-point data types.  The functions operate on a single sample
+   * of data and each call to the function returns a single processed value.
+   * S points to an instance of the PID control data structure.  in
+   * is the input sample value. The functions return the output value.
+   *
+   * \par Algorithm:
+   * 
+   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
+   *    A0 = Kp + Ki + Kd
+   *    A1 = (-Kp ) - (2 * Kd )
+   *    A2 = Kd
+   * 

+   *
+   * \par
+   * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
+   *
+   * \par
+   * \image html PID.gif "Proportional Integral Derivative Controller"
+   *
+   * \par
+   * The PID controller calculates an "error" value as the difference between
+   * the measured output and the reference input.
+   * The controller attempts to minimize the error by adjusting the process control inputs.
+   * The proportional value determines the reaction to the current error,
+   * the integral value determines the reaction based on the sum of recent errors,
+   * and the derivative value determines the reaction based on the rate at which the error has been changing.
+   *
+   * \par Instance Structure
+   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
+   * A separate instance structure must be defined for each PID Controller.
+   * There are separate instance structure declarations for each of the 3 supported data types.
+   *
+   * \par Reset Functions
+   * There is also an associated reset function for each data type which clears the state array.
+   *
+   * \par Initialization Functions
+   * There is also an associated initialization function for each data type.
+   * The initialization function performs the following operations:
+   * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
+   * - Zeros out the values in the state buffer.
+   *
+   * \par
+   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+   *
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the fixed-point versions of the PID Controller functions.
+   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup PID
+   * @{
+   */
+
+  /**
+   * @brief         Process function for the floating-point PID Control.
+   * @param[in,out] S   is an instance of the floating-point PID Control structure
+   * @param[in]     in  input sample to process
+   * @return        processed output sample.
+   */
+  __STATIC_FORCEINLINE float32_t arm_pid_f32(
+  arm_pid_instance_f32 * S,
+  float32_t in)
+  {
+    float32_t out;
+
+    /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
+    out = (S->A0 * in) +
+      (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+
+  }
+
+/**
+  @brief         Process function for the Q31 PID Control.
+  @param[in,out] S  points to an instance of the Q31 PID Control structure
+  @param[in]     in  input sample to process
+  @return        processed output sample.
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 64-bit accumulator.
+         The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+         Thus, if the accumulator result overflows it wraps around rather than clip.
+         In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+         After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+ */
+__STATIC_FORCEINLINE q31_t arm_pid_q31(
+  arm_pid_instance_q31 * S,
+  q31_t in)
+  {
+    q63_t acc;
+    q31_t out;
+
+    /* acc = A0 * x[n]  */
+    acc = (q63_t) S->A0 * in;
+
+    /* acc += A1 * x[n-1] */
+    acc += (q63_t) S->A1 * S->state[0];
+
+    /* acc += A2 * x[n-2]  */
+    acc += (q63_t) S->A2 * S->state[1];
+
+    /* convert output to 1.31 format to add y[n-1] */
+    out = (q31_t) (acc >> 31U);
+
+    /* out += y[n-1] */
+    out += S->state[2];
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+  }
+
+
+/**
+  @brief         Process function for the Q15 PID Control.
+  @param[in,out] S   points to an instance of the Q15 PID Control structure
+  @param[in]     in  input sample to process
+  @return        processed output sample.
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using a 64-bit internal accumulator.
+         Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+         The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+         There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+         After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+         Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+__STATIC_FORCEINLINE q15_t arm_pid_q15(
+  arm_pid_instance_q15 * S,
+  q15_t in)
+  {
+    q63_t acc;
+    q15_t out;
+
+#if defined (ARM_MATH_DSP)
+    /* Implementation of PID controller */
+
+    /* acc = A0 * x[n]  */
+    acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
+
+    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
+    acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc);
+#else
+    /* acc = A0 * x[n]  */
+    acc = ((q31_t) S->A0) * in;
+
+    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
+    acc += (q31_t) S->A1 * S->state[0];
+    acc += (q31_t) S->A2 * S->state[1];
+#endif
+
+    /* acc += y[n-1] */
+    acc += (q31_t) S->state[2] << 15;
+
+    /* saturate the output */
+    out = (q15_t) (__SSAT((acc >> 15), 16));
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+  }
+
+  /**
+   * @} end of PID group
+   */
+
+
+  /**
+   * @brief Floating-point matrix inverse.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] dst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
+   */
+  arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * src,
+  arm_matrix_instance_f32 * dst);
+
+
+  /**
+   * @brief Floating-point matrix inverse.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] dst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
+   */
+  arm_status arm_mat_inverse_f64(
+  const arm_matrix_instance_f64 * src,
+  arm_matrix_instance_f64 * dst);
+
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup clarke Vector Clarke Transform
+   * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
+   * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents
+   * in the two-phase orthogonal stator axis Ialpha and Ibeta.
+   * When Ialpha is superposed with Ia as shown in the figure below
+   * \image html clarke.gif Stator current space vector and its components in (a,b).
+   * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta
+   * can be calculated using only Ia and Ib.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html clarkeFormula.gif
+   * where Ia and Ib are the instantaneous stator phases and
+   * pIalpha and pIbeta are the two coordinates of time invariant vector.
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Clarke transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup clarke
+   * @{
+   */
+
+  /**
+   *
+   * @brief  Floating-point Clarke transform
+   * @param[in]  Ia       input three-phase coordinate a
+   * @param[in]  Ib       input three-phase coordinate b
+   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+   * @return        none
+   */
+  __STATIC_FORCEINLINE void arm_clarke_f32(
+  float32_t Ia,
+  float32_t Ib,
+  float32_t * pIalpha,
+  float32_t * pIbeta)
+  {
+    /* Calculate pIalpha using the equation, pIalpha = Ia */
+    *pIalpha = Ia;
+
+    /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
+    *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
+  }
+
+
+/**
+  @brief  Clarke transform for Q31 version
+  @param[in]  Ia       input three-phase coordinate a
+  @param[in]  Ib       input three-phase coordinate b
+  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_clarke_q31(
+  q31_t Ia,
+  q31_t Ib,
+  q31_t * pIalpha,
+  q31_t * pIbeta)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+
+    /* Calculating pIalpha from Ia by equation pIalpha = Ia */
+    *pIalpha = Ia;
+
+    /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
+    product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
+
+    /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
+    product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
+
+    /* pIbeta is calculated by adding the intermediate products */
+    *pIbeta = __QADD(product1, product2);
+  }
+
+  /**
+   * @} end of clarke group
+   */
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup inv_clarke Vector Inverse Clarke Transform
+   * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html clarkeInvFormula.gif
+   * where pIa and pIb are the instantaneous stator phases and
+   * Ialpha and Ibeta are the two coordinates of time invariant vector.
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Clarke transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup inv_clarke
+   * @{
+   */
+
+   /**
+   * @brief  Floating-point Inverse Clarke transform
+   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
+   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
+   * @param[out] pIa     points to output three-phase coordinate a
+   * @param[out] pIb     points to output three-phase coordinate b
+   * @return     none
+   */
+  __STATIC_FORCEINLINE void arm_inv_clarke_f32(
+  float32_t Ialpha,
+  float32_t Ibeta,
+  float32_t * pIa,
+  float32_t * pIb)
+  {
+    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+    *pIa = Ialpha;
+
+    /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
+    *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
+  }
+
+
+/**
+  @brief  Inverse Clarke transform for Q31 version
+  @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
+  @param[in]  Ibeta   input two-phase orthogonal vector axis beta
+  @param[out] pIa     points to output three-phase coordinate a
+  @param[out] pIb     points to output three-phase coordinate b
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the subtraction, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_inv_clarke_q31(
+  q31_t Ialpha,
+  q31_t Ibeta,
+  q31_t * pIa,
+  q31_t * pIb)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+
+    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+    *pIa = Ialpha;
+
+    /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
+    product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
+
+    /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
+    product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
+
+    /* pIb is calculated by subtracting the products */
+    *pIb = __QSUB(product2, product1);
+  }
+
+  /**
+   * @} end of inv_clarke group
+   */
+
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup park Vector Park Transform
+   *
+   * Forward Park transform converts the input two-coordinate vector to flux and torque components.
+   * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents
+   * from the stationary to the moving reference frame and control the spatial relationship between
+   * the stator vector current and rotor flux vector.
+   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
+   * current vector and the relationship from the two reference frames:
+   * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html parkFormula.gif
+   * where Ialpha and Ibeta are the stator vector components,
+   * pId and pIq are rotor vector components and cosVal and sinVal are the
+   * cosine and sine values of theta (rotor flux position).
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Park transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup park
+   * @{
+   */
+
+  /**
+   * @brief Floating-point Park transform
+   * @param[in]  Ialpha  input two-phase vector coordinate alpha
+   * @param[in]  Ibeta   input two-phase vector coordinate beta
+   * @param[out] pId     points to output   rotor reference frame d
+   * @param[out] pIq     points to output   rotor reference frame q
+   * @param[in]  sinVal  sine value of rotation angle theta
+   * @param[in]  cosVal  cosine value of rotation angle theta
+   * @return     none
+   *
+   * The function implements the forward Park transform.
+   *
+   */
+  __STATIC_FORCEINLINE void arm_park_f32(
+  float32_t Ialpha,
+  float32_t Ibeta,
+  float32_t * pId,
+  float32_t * pIq,
+  float32_t sinVal,
+  float32_t cosVal)
+  {
+    /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
+    *pId = Ialpha * cosVal + Ibeta * sinVal;
+
+    /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
+    *pIq = -Ialpha * sinVal + Ibeta * cosVal;
+  }
+
+
+/**
+  @brief  Park transform for Q31 version
+  @param[in]  Ialpha  input two-phase vector coordinate alpha
+  @param[in]  Ibeta   input two-phase vector coordinate beta
+  @param[out] pId     points to output rotor reference frame d
+  @param[out] pIq     points to output rotor reference frame q
+  @param[in]  sinVal  sine value of rotation angle theta
+  @param[in]  cosVal  cosine value of rotation angle theta
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition and subtraction, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_park_q31(
+  q31_t Ialpha,
+  q31_t Ibeta,
+  q31_t * pId,
+  q31_t * pIq,
+  q31_t sinVal,
+  q31_t cosVal)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
+
+    /* Intermediate product is calculated by (Ialpha * cosVal) */
+    product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
+
+    /* Intermediate product is calculated by (Ibeta * sinVal) */
+    product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
+
+
+    /* Intermediate product is calculated by (Ialpha * sinVal) */
+    product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
+
+    /* Intermediate product is calculated by (Ibeta * cosVal) */
+    product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
+
+    /* Calculate pId by adding the two intermediate products 1 and 2 */
+    *pId = __QADD(product1, product2);
+
+    /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
+    *pIq = __QSUB(product4, product3);
+  }
+
+  /**
+   * @} end of park group
+   */
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup inv_park Vector Inverse Park transform
+   * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html parkInvFormula.gif
+   * where pIalpha and pIbeta are the stator vector components,
+   * Id and Iq are rotor vector components and cosVal and sinVal are the
+   * cosine and sine values of theta (rotor flux position).
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Park transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup inv_park
+   * @{
+   */
+
+   /**
+   * @brief  Floating-point Inverse Park transform
+   * @param[in]  Id       input coordinate of rotor reference frame d
+   * @param[in]  Iq       input coordinate of rotor reference frame q
+   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+   * @param[in]  sinVal   sine value of rotation angle theta
+   * @param[in]  cosVal   cosine value of rotation angle theta
+   * @return     none
+   */
+  __STATIC_FORCEINLINE void arm_inv_park_f32(
+  float32_t Id,
+  float32_t Iq,
+  float32_t * pIalpha,
+  float32_t * pIbeta,
+  float32_t sinVal,
+  float32_t cosVal)
+  {
+    /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
+    *pIalpha = Id * cosVal - Iq * sinVal;
+
+    /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
+    *pIbeta = Id * sinVal + Iq * cosVal;
+  }
+
+
+/**
+  @brief  Inverse Park transform for   Q31 version
+  @param[in]  Id       input coordinate of rotor reference frame d
+  @param[in]  Iq       input coordinate of rotor reference frame q
+  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+  @param[in]  sinVal   sine value of rotation angle theta
+  @param[in]  cosVal   cosine value of rotation angle theta
+  @return     none
+
+  @par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_inv_park_q31(
+  q31_t Id,
+  q31_t Iq,
+  q31_t * pIalpha,
+  q31_t * pIbeta,
+  q31_t sinVal,
+  q31_t cosVal)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
+
+    /* Intermediate product is calculated by (Id * cosVal) */
+    product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
+
+    /* Intermediate product is calculated by (Iq * sinVal) */
+    product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
+
+
+    /* Intermediate product is calculated by (Id * sinVal) */
+    product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
+
+    /* Intermediate product is calculated by (Iq * cosVal) */
+    product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
+
+    /* Calculate pIalpha by using the two intermediate products 1 and 2 */
+    *pIalpha = __QSUB(product1, product2);
+
+    /* Calculate pIbeta by using the two intermediate products 3 and 4 */
+    *pIbeta = __QADD(product4, product3);
+  }
+
+  /**
+   * @} end of Inverse park group
+   */
+
+
+  /**
+   * @ingroup groupInterpolation
+   */
+
+  /**
+   * @defgroup LinearInterpolate Linear Interpolation
+   *
+   * Linear interpolation is a method of curve fitting using linear polynomials.
+   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
+   *
+   * \par
+   * \image html LinearInterp.gif "Linear interpolation"
+   *
+   * \par
+   * A  Linear Interpolate function calculates an output value(y), for the input(x)
+   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
+   *
+   * \par Algorithm:
+   * 
+   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
+   *       where x0, x1 are nearest values of input x
+   *             y0, y1 are nearest values to output y
+   * 

+   *
+   * \par
+   * This set of functions implements Linear interpolation process
+   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
+   * sample of data and each call to the function returns a single processed value.
+   * S points to an instance of the Linear Interpolate function data structure.
+   * x is the input sample value. The functions returns the output value.
+   *
+   * \par
+   * if x is outside of the table boundary, Linear interpolation returns first value of the table
+   * if x is below input range and returns last value of table if x is above range.
+   */
+
+  /**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+  /**
+   * @brief  Process function for the floating-point Linear Interpolation Function.
+   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
+   * @param[in]     x  input sample to process
+   * @return y processed output sample.
+   *
+   */
+  __STATIC_FORCEINLINE float32_t arm_linear_interp_f32(
+  arm_linear_interp_instance_f32 * S,
+  float32_t x)
+  {
+    float32_t y;
+    float32_t x0, x1;                            /* Nearest input values */
+    float32_t y0, y1;                            /* Nearest output values */
+    float32_t xSpacing = S->xSpacing;            /* spacing between input values */
+    int32_t i;                                   /* Index variable */
+    float32_t *pYData = S->pYData;               /* pointer to output table */
+
+    /* Calculation of index */
+    i = (int32_t) ((x - S->x1) / xSpacing);
+
+    if (i < 0)
+    {
+      /* Iniatilize output for below specified range as least output value of table */
+      y = pYData[0];
+    }
+    else if ((uint32_t)i >= S->nValues)
+    {
+      /* Iniatilize output for above specified range as last output value of table */
+      y = pYData[S->nValues - 1];
+    }
+    else
+    {
+      /* Calculation of nearest input values */
+      x0 = S->x1 +  i      * xSpacing;
+      x1 = S->x1 + (i + 1) * xSpacing;
+
+      /* Read of nearest output values */
+      y0 = pYData[i];
+      y1 = pYData[i + 1];
+
+      /* Calculation of output */
+      y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
+
+    }
+
+    /* returns output value */
+    return (y);
+  }
+
+
+   /**
+   *
+   * @brief  Process function for the Q31 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q31 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   *
+   */
+  __STATIC_FORCEINLINE q31_t arm_linear_interp_q31(
+  q31_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q31_t y;                                     /* output */
+    q31_t y0, y1;                                /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    int32_t index;                               /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    index = ((x & (q31_t)0xFFF00000) >> 20);
+
+    if (index >= (int32_t)(nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else if (index < 0)
+    {
+      return (pYData[0]);
+    }
+    else
+    {
+      /* 20 bits for the fractional part */
+      /* shift left by 11 to keep fract in 1.31 format */
+      fract = (x & 0x000FFFFF) << 11;
+
+      /* Read two nearest output values from the index in 1.31(q31) format */
+      y0 = pYData[index];
+      y1 = pYData[index + 1];
+
+      /* Calculation of y0 * (1-fract) and y is in 2.30 format */
+      y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
+
+      /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
+      y += ((q31_t) (((q63_t) y1 * fract) >> 32));
+
+      /* Convert y to 1.31 format */
+      return (y << 1U);
+    }
+  }
+
+
+  /**
+   *
+   * @brief  Process function for the Q15 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q15 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   *
+   */
+  __STATIC_FORCEINLINE q15_t arm_linear_interp_q15(
+  q15_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q63_t y;                                     /* output */
+    q15_t y0, y1;                                /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    int32_t index;                               /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    index = ((x & (int32_t)0xFFF00000) >> 20);
+
+    if (index >= (int32_t)(nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else if (index < 0)
+    {
+      return (pYData[0]);
+    }
+    else
+    {
+      /* 20 bits for the fractional part */
+      /* fract is in 12.20 format */
+      fract = (x & 0x000FFFFF);
+
+      /* Read two nearest output values from the index */
+      y0 = pYData[index];
+      y1 = pYData[index + 1];
+
+      /* Calculation of y0 * (1-fract) and y is in 13.35 format */
+      y = ((q63_t) y0 * (0xFFFFF - fract));
+
+      /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
+      y += ((q63_t) y1 * (fract));
+
+      /* convert y to 1.15 format */
+      return (q15_t) (y >> 20);
+    }
+  }
+
+
+  /**
+   *
+   * @brief  Process function for the Q7 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q7 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   */
+  __STATIC_FORCEINLINE q7_t arm_linear_interp_q7(
+  q7_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q31_t y;                                     /* output */
+    q7_t y0, y1;                                 /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    uint32_t index;                              /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    if (x < 0)
+    {
+      return (pYData[0]);
+    }
+    index = (x >> 20) & 0xfff;
+
+    if (index >= (nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else
+    {
+      /* 20 bits for the fractional part */
+      /* fract is in 12.20 format */
+      fract = (x & 0x000FFFFF);
+
+      /* Read two nearest output values from the index and are in 1.7(q7) format */
+      y0 = pYData[index];
+      y1 = pYData[index + 1];
+
+      /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
+      y = ((y0 * (0xFFFFF - fract)));
+
+      /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
+      y += (y1 * fract);
+
+      /* convert y to 1.7(q7) format */
+      return (q7_t) (y >> 20);
+     }
+  }
+
+  /**
+   * @} end of LinearInterpolate group
+   */
+
+  /**
+   * @brief  Fast approximation to the trigonometric sine function for floating-point data.
+   * @param[in] x  input value in radians.
+   * @return  sin(x).
+   */
+  float32_t arm_sin_f32(
+  float32_t x);
+
+
+  /**
+   * @brief  Fast approximation to the trigonometric sine function for Q31 data.
+   * @param[in] x  Scaled input value in radians.
+   * @return  sin(x).
+   */
+  q31_t arm_sin_q31(
+  q31_t x);
+
+
+  /**
+   * @brief  Fast approximation to the trigonometric sine function for Q15 data.
+   * @param[in] x  Scaled input value in radians.
+   * @return  sin(x).
+   */
+  q15_t arm_sin_q15(
+  q15_t x);
+
+
+  /**
+   * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
+   * @param[in] x  input value in radians.
+   * @return  cos(x).
+   */
+  float32_t arm_cos_f32(
+  float32_t x);
+
+
+  /**
+   * @brief Fast approximation to the trigonometric cosine function for Q31 data.
+   * @param[in] x  Scaled input value in radians.
+   * @return  cos(x).
+   */
+  q31_t arm_cos_q31(
+  q31_t x);
+
+
+  /**
+   * @brief  Fast approximation to the trigonometric cosine function for Q15 data.
+   * @param[in] x  Scaled input value in radians.
+   * @return  cos(x).
+   */
+  q15_t arm_cos_q15(
+  q15_t x);
+
+
+  /**
+   * @ingroup groupFastMath
+   */
+
+
+  /**
+   * @defgroup SQRT Square Root
+   *
+   * Computes the square root of a number.
+   * There are separate functions for Q15, Q31, and floating-point data types.
+   * The square root function is computed using the Newton-Raphson algorithm.
+   * This is an iterative algorithm of the form:
+   * 
+   *      x1 = x0 - f(x0)/f'(x0)
+   * 

+   * where x1 is the current estimate,
+   * x0 is the previous estimate, and
+   * f'(x0) is the derivative of f() evaluated at x0.
+   * For the square root function, the algorithm reduces to:
+   * 
+   *     x0 = in/2                         [initial guess]
+   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
+   * 

+   */
+
+
+  /**
+   * @addtogroup SQRT
+   * @{
+   */
+
+/**
+  @brief         Floating-point square root function.
+  @param[in]     in    input value
+  @param[out]    pOut  square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+__STATIC_FORCEINLINE arm_status arm_sqrt_f32(
+  float32_t in,
+  float32_t * pOut)
+  {
+    if (in >= 0.0f)
+    {
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+      *pOut = __sqrtf(in);
+  #else
+      *pOut = sqrtf(in);
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+      __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
+  #else
+      *pOut = sqrtf(in);
+  #endif
+
+#else
+      *pOut = sqrtf(in);
+#endif
+
+      return (ARM_MATH_SUCCESS);
+    }
+    else
+    {
+      *pOut = 0.0f;
+      return (ARM_MATH_ARGUMENT_ERROR);
+    }
+  }
+
+
+/**
+  @brief         Q31 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+arm_status arm_sqrt_q31(
+  q31_t in,
+  q31_t * pOut);
+
+
+/**
+  @brief         Q15 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+arm_status arm_sqrt_q15(
+  q15_t in,
+  q15_t * pOut);
+
+  /**
+   * @brief  Vector Floating-point square root function.
+   * @param[in]  pIn   input vector.
+   * @param[out] pOut  vector of square roots of input elements.
+   * @param[in]  len   length of input vector.
+   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+   * in is negative value and returns zero output for negative values.
+   */
+  void arm_vsqrt_f32(
+  float32_t * pIn,
+  float32_t * pOut,
+  uint16_t len);
+
+  void arm_vsqrt_q31(
+  q31_t * pIn,
+  q31_t * pOut,
+  uint16_t len);
+
+  void arm_vsqrt_q15(
+  q15_t * pIn,
+  q15_t * pOut,
+  uint16_t len);
+
+  /**
+   * @} end of SQRT group
+   */
+
+
+  /**
+   * @brief floating-point Circular write function.
+   */
+  __STATIC_FORCEINLINE void arm_circularWrite_f32(
+  int32_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const int32_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0U;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if (wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = (uint16_t)wOffset;
+  }
+
+
+
+  /**
+   * @brief floating-point Circular Read function.
+   */
+  __STATIC_FORCEINLINE void arm_circularRead_f32(
+  int32_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  int32_t * dst,
+  int32_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0U;
+    int32_t rOffset;
+    int32_t* dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+    dst_end = dst_base + dst_length;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if (dst == dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update rOffset.  Watch out for positive and negative value  */
+      rOffset += bufferInc;
+
+      if (rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+
+  /**
+   * @brief Q15 Circular write function.
+   */
+  __STATIC_FORCEINLINE void arm_circularWrite_q15(
+  q15_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const q15_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0U;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if (wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = (uint16_t)wOffset;
+  }
+
+
+  /**
+   * @brief Q15 Circular Read function.
+   */
+  __STATIC_FORCEINLINE void arm_circularRead_q15(
+  q15_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  q15_t * dst,
+  q15_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0;
+    int32_t rOffset;
+    q15_t* dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+
+    dst_end = dst_base + dst_length;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if (dst == dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      rOffset += bufferInc;
+
+      if (rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+
+  /**
+   * @brief Q7 Circular write function.
+   */
+  __STATIC_FORCEINLINE void arm_circularWrite_q7(
+  q7_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const q7_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0U;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if (wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = (uint16_t)wOffset;
+  }
+
+
+  /**
+   * @brief Q7 Circular Read function.
+   */
+  __STATIC_FORCEINLINE void arm_circularRead_q7(
+  q7_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  q7_t * dst,
+  q7_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0;
+    int32_t rOffset;
+    q7_t* dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+
+    dst_end = dst_base + dst_length;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if (dst == dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update rOffset.  Watch out for positive and negative value */
+      rOffset += bufferInc;
+
+      if (rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult);
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult);
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Variance of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_var_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Variance of the elements of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_var_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Variance of the elements of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_var_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  /**
+   * @brief  Root Mean Square of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_rms_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Root Mean Square of the elements of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_rms_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Root Mean Square of the elements of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_rms_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  /**
+   * @brief  Standard deviation of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_std_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Standard deviation of the elements of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_std_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Standard deviation of the elements of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_std_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  /**
+   * @brief  Floating-point complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q31 complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q15 complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q15 complex dot product
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   * @param[out] realResult  real part of the result returned here
+   * @param[out] imagResult  imaginary part of the result returned here
+   */
+  void arm_cmplx_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t numSamples,
+        q31_t * realResult,
+        q31_t * imagResult);
+
+
+  /**
+   * @brief  Q31 complex dot product
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   * @param[out] realResult  real part of the result returned here
+   * @param[out] imagResult  imaginary part of the result returned here
+   */
+  void arm_cmplx_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t numSamples,
+        q63_t * realResult,
+        q63_t * imagResult);
+
+
+  /**
+   * @brief  Floating-point complex dot product
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   * @param[out] realResult  real part of the result returned here
+   * @param[out] imagResult  imaginary part of the result returned here
+   */
+  void arm_cmplx_dot_prod_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t numSamples,
+        float32_t * realResult,
+        float32_t * imagResult);
+
+
+  /**
+   * @brief  Q15 complex-by-real multiplication
+   * @param[in]  pSrcCmplx   points to the complex input vector
+   * @param[in]  pSrcReal    points to the real input vector
+   * @param[out] pCmplxDst   points to the complex output vector
+   * @param[in]  numSamples  number of samples in each vector
+   */
+  void arm_cmplx_mult_real_q15(
+  const q15_t * pSrcCmplx,
+  const q15_t * pSrcReal,
+        q15_t * pCmplxDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q31 complex-by-real multiplication
+   * @param[in]  pSrcCmplx   points to the complex input vector
+   * @param[in]  pSrcReal    points to the real input vector
+   * @param[out] pCmplxDst   points to the complex output vector
+   * @param[in]  numSamples  number of samples in each vector
+   */
+  void arm_cmplx_mult_real_q31(
+  const q31_t * pSrcCmplx,
+  const q31_t * pSrcReal,
+        q31_t * pCmplxDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Floating-point complex-by-real multiplication
+   * @param[in]  pSrcCmplx   points to the complex input vector
+   * @param[in]  pSrcReal    points to the real input vector
+   * @param[out] pCmplxDst   points to the complex output vector
+   * @param[in]  numSamples  number of samples in each vector
+   */
+  void arm_cmplx_mult_real_f32(
+  const float32_t * pSrcCmplx,
+  const float32_t * pSrcReal,
+        float32_t * pCmplxDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Minimum value of a Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] result     is output pointer
+   * @param[in]  index      is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * result,
+        uint32_t * index);
+
+
+  /**
+   * @brief  Minimum value of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[in]  pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex);
+
+
+  /**
+   * @brief  Minimum value of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex);
+
+
+  /**
+   * @brief  Minimum value of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex);
+
+
+/**
+ * @brief Maximum value of a Q7 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex);
+
+
+/**
+ * @brief Maximum value of a Q15 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex);
+
+
+/**
+ * @brief Maximum value of a Q31 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex);
+
+
+/**
+ * @brief Maximum value of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex);
+
+
+  /**
+   * @brief  Q15 complex-by-complex multiplication
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_mult_cmplx_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q31 complex-by-complex multiplication
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_mult_cmplx_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Floating-point complex-by-complex multiplication
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_mult_cmplx_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]  pSrc       points to the floating-point input vector
+   * @param[out] pDst       points to the Q31 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+  void arm_float_to_q31(
+  const float32_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Converts the elements of the floating-point vector to Q15 vector.
+   * @param[in]  pSrc       points to the floating-point input vector
+   * @param[out] pDst       points to the Q15 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+  void arm_float_to_q15(
+  const float32_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Converts the elements of the floating-point vector to Q7 vector.
+   * @param[in]  pSrc       points to the floating-point input vector
+   * @param[out] pDst       points to the Q7 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+  void arm_float_to_q7(
+  const float32_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q31_to_float(
+  const q31_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q31_to_q15(
+  const q31_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q31_to_q7(
+  const q31_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q15_to_float(
+  const q15_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q15_to_q31(
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q15_to_q7(
+  const q15_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q7_to_float(
+  const q7_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to Q31 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_q7_to_q31(
+  const q7_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to Q15 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_q7_to_q15(
+  const q7_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @ingroup groupInterpolation
+   */
+
+  /**
+   * @defgroup BilinearInterpolate Bilinear Interpolation
+   *
+   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
+   * The underlying function f(x, y) is sampled on a regular grid and the interpolation process
+   * determines values between the grid points.
+   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
+   * Bilinear interpolation is often used in image processing to rescale images.
+   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
+   *
+   * Algorithm
+   * \par
+   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
+   * For floating-point, the instance structure is defined as:
+   * 
+   *   typedef struct
+   *   {
+   *     uint16_t numRows;
+   *     uint16_t numCols;
+   *     float32_t *pData;
+   * } arm_bilinear_interp_instance_f32;
+   * 

+   *
+   * \par
+   * where numRows specifies the number of rows in the table;
+   * numCols specifies the number of columns in the table;
+   * and pData points to an array of size numRows*numCols values.
+   * The data table pTable is organized in row order and the supplied data values fall on integer indexes.
+   * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers.
+   *
+   * \par
+   * Let (x, y) specify the desired interpolation point.  Then define:
+   * 
+   *     XF = floor(x)
+   *     YF = floor(y)
+   * 

+   * \par
+   * The interpolated output point is computed as:
+   * 
+   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
+   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
+   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
+   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
+   * 

+   * Note that the coordinates (x, y) contain integer and fractional components.
+   * The integer components specify which portion of the table to use while the
+   * fractional components control the interpolation processor.
+   *
+   * \par
+   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
+   */
+
+
+  /**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+  /**
+  * @brief  Floating-point bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate.
+  * @param[in]     Y  interpolation coordinate.
+  * @return out interpolated value.
+  */
+  __STATIC_FORCEINLINE float32_t arm_bilinear_interp_f32(
+  const arm_bilinear_interp_instance_f32 * S,
+  float32_t X,
+  float32_t Y)
+  {
+    float32_t out;
+    float32_t f00, f01, f10, f11;
+    float32_t *pData = S->pData;
+    int32_t xIndex, yIndex, index;
+    float32_t xdiff, ydiff;
+    float32_t b1, b2, b3, b4;
+
+    xIndex = (int32_t) X;
+    yIndex = (int32_t) Y;
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))
+    {
+      return (0);
+    }
+
+    /* Calculation of index for two nearest points in X-direction */
+    index = (xIndex - 1) + (yIndex - 1) * S->numCols;
+
+
+    /* Read two nearest points in X-direction */
+    f00 = pData[index];
+    f01 = pData[index + 1];
+
+    /* Calculation of index for two nearest points in Y-direction */
+    index = (xIndex - 1) + (yIndex) * S->numCols;
+
+
+    /* Read two nearest points in Y-direction */
+    f10 = pData[index];
+    f11 = pData[index + 1];
+
+    /* Calculation of intermediate values */
+    b1 = f00;
+    b2 = f01 - f00;
+    b3 = f10 - f00;
+    b4 = f00 - f01 - f10 + f11;
+
+    /* Calculation of fractional part in X */
+    xdiff = X - xIndex;
+
+    /* Calculation of fractional part in Y */
+    ydiff = Y - yIndex;
+
+    /* Calculation of bi-linear interpolated output */
+    out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
+
+    /* return to application */
+    return (out);
+  }
+
+
+  /**
+  * @brief  Q31 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  __STATIC_FORCEINLINE q31_t arm_bilinear_interp_q31(
+  arm_bilinear_interp_instance_q31 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q31_t out;                                   /* Temporary output */
+    q31_t acc = 0;                               /* output */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    q31_t x1, x2, y1, y2;                        /* Nearest output values */
+    int32_t rI, cI;                              /* Row and column indices */
+    q31_t *pYData = S->pData;                    /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* shift left xfract by 11 to keep 1.31 format */
+    xfract = (X & 0x000FFFFF) << 11U;
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[(rI) + (int32_t)nCols * (cI)    ];
+    x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];
+
+    /* 20 bits for the fractional part */
+    /* shift left yfract by 11 to keep 1.31 format */
+    yfract = (Y & 0x000FFFFF) << 11U;
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[(rI) + (int32_t)nCols * (cI + 1)    ];
+    y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
+    out = ((q31_t) (((q63_t) x1  * (0x7FFFFFFF - xfract)) >> 32));
+    acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
+
+    /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
+
+    /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
+
+    /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
+
+    /* Convert acc to 1.31(q31) format */
+    return ((q31_t)(acc << 2));
+  }
+
+
+  /**
+  * @brief  Q15 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  __STATIC_FORCEINLINE q15_t arm_bilinear_interp_q15(
+  arm_bilinear_interp_instance_q15 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q63_t acc = 0;                               /* output */
+    q31_t out;                                   /* Temporary output */
+    q15_t x1, x2, y1, y2;                        /* Nearest output values */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    int32_t rI, cI;                              /* Row and column indices */
+    q15_t *pYData = S->pData;                    /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* xfract should be in 12.20 format */
+    xfract = (X & 0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
+    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
+
+    /* 20 bits for the fractional part */
+    /* yfract should be in 12.20 format */
+    yfract = (Y & 0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
+    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
+
+    /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
+    /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
+    out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4U);
+    acc = ((q63_t) out * (0xFFFFF - yfract));
+
+    /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4U);
+    acc += ((q63_t) out * (xfract));
+
+    /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4U);
+    acc += ((q63_t) out * (yfract));
+
+    /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) y2 * (xfract)) >> 4U);
+    acc += ((q63_t) out * (yfract));
+
+    /* acc is in 13.51 format and down shift acc by 36 times */
+    /* Convert out to 1.15 format */
+    return ((q15_t)(acc >> 36));
+  }
+
+
+  /**
+  * @brief  Q7 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  __STATIC_FORCEINLINE q7_t arm_bilinear_interp_q7(
+  arm_bilinear_interp_instance_q7 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q63_t acc = 0;                               /* output */
+    q31_t out;                                   /* Temporary output */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    q7_t x1, x2, y1, y2;                         /* Nearest output values */
+    int32_t rI, cI;                              /* Row and column indices */
+    q7_t *pYData = S->pData;                     /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* xfract should be in 12.20 format */
+    xfract = (X & (q31_t)0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
+    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
+
+    /* 20 bits for the fractional part */
+    /* yfract should be in 12.20 format */
+    yfract = (Y & (q31_t)0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
+    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
+    out = ((x1 * (0xFFFFF - xfract)));
+    acc = (((q63_t) out * (0xFFFFF - yfract)));
+
+    /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
+    out = ((x2 * (0xFFFFF - yfract)));
+    acc += (((q63_t) out * (xfract)));
+
+    /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
+    out = ((y1 * (0xFFFFF - xfract)));
+    acc += (((q63_t) out * (yfract)));
+
+    /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
+    out = ((y2 * (yfract)));
+    acc += (((q63_t) out * (xfract)));
+
+    /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
+    return ((q7_t)(acc >> 40));
+  }
+
+  /**
+   * @} end of BilinearInterpolate group
+   */
+
+
+/* SMMLAR */
+#define multAcc_32x32_keep32_R(a, x, y) \
+    a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+/* SMMLSR */
+#define multSub_32x32_keep32_R(a, x, y) \
+    a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+/* SMMULR */
+#define mult_32x32_keep32_R(a, x, y) \
+    a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
+
+/* SMMLA */
+#define multAcc_32x32_keep32(a, x, y) \
+    a += (q31_t) (((q63_t) x * y) >> 32)
+
+/* SMMLS */
+#define multSub_32x32_keep32(a, x, y) \
+    a -= (q31_t) (((q63_t) x * y) >> 32)
+
+/* SMMUL */
+#define mult_32x32_keep32(a, x, y) \
+    a = (q31_t) (((q63_t) x * y ) >> 32)
+
+
+#if   defined ( __CC_ARM )
+  /* Enter low optimization region - place directly above function definition */
+  #if defined( __ARM_ARCH_7EM__ )
+    #define LOW_OPTIMIZATION_ENTER \
+       _Pragma ("push")         \
+       _Pragma ("O1")
+  #else
+    #define LOW_OPTIMIZATION_ENTER
+  #endif
+
+  /* Exit low optimization region - place directly after end of function definition */
+  #if defined ( __ARM_ARCH_7EM__ )
+    #define LOW_OPTIMIZATION_EXIT \
+       _Pragma ("pop")
+  #else
+    #define LOW_OPTIMIZATION_EXIT
+  #endif
+
+  /* Enter low optimization region - place directly above function definition */
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+
+  /* Exit low optimization region - place directly after end of function definition */
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined (__ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __GNUC__ )
+  #define LOW_OPTIMIZATION_ENTER \
+       __attribute__(( optimize("-O1") ))
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __ICCARM__ )
+  /* Enter low optimization region - place directly above function definition */
+  #if defined ( __ARM_ARCH_7EM__ )
+    #define LOW_OPTIMIZATION_ENTER \
+       _Pragma ("optimize=low")
+  #else
+    #define LOW_OPTIMIZATION_ENTER
+  #endif
+
+  /* Exit low optimization region - place directly after end of function definition */
+  #define LOW_OPTIMIZATION_EXIT
+
+  /* Enter low optimization region - place directly above function definition */
+  #if defined ( __ARM_ARCH_7EM__ )
+    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
+       _Pragma ("optimize=low")
+  #else
+    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #endif
+
+  /* Exit low optimization region - place directly after end of function definition */
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __TI_ARM__ )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __CSMC__ )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __TASKING__ )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#endif
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+/* Compiler specific diagnostic adjustment */
+#if   defined ( __CC_ARM )
+
+#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+
+#elif defined ( __GNUC__ )
+#pragma GCC diagnostic pop
+
+#elif defined ( __ICCARM__ )
+
+#elif defined ( __TI_ARM__ )
+
+#elif defined ( __CSMC__ )
+
+#elif defined ( __TASKING__ )
+
+#elif defined ( _MSC_VER )
+
+#else
+  #error Unknown compiler
+#endif
+
+#endif /* _ARM_MATH_H */
+
+/**
+ *
+ * End of file.
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
new file mode 100644
index 00000000..4d9f60a0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
@@ -0,0 +1,63 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BasicMathFunctions.c
+ * Description:  Combination of all basic math function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_abs_f32.c"
+#include "arm_abs_q15.c"
+#include "arm_abs_q31.c"
+#include "arm_abs_q7.c"
+#include "arm_add_f32.c"
+#include "arm_add_q15.c"
+#include "arm_add_q31.c"
+#include "arm_add_q7.c"
+#include "arm_dot_prod_f32.c"
+#include "arm_dot_prod_q15.c"
+#include "arm_dot_prod_q31.c"
+#include "arm_dot_prod_q7.c"
+#include "arm_mult_f32.c"
+#include "arm_mult_q15.c"
+#include "arm_mult_q31.c"
+#include "arm_mult_q7.c"
+#include "arm_negate_f32.c"
+#include "arm_negate_q15.c"
+#include "arm_negate_q31.c"
+#include "arm_negate_q7.c"
+#include "arm_offset_f32.c"
+#include "arm_offset_q15.c"
+#include "arm_offset_q31.c"
+#include "arm_offset_q7.c"
+#include "arm_scale_f32.c"
+#include "arm_scale_q15.c"
+#include "arm_scale_q31.c"
+#include "arm_scale_q7.c"
+#include "arm_shift_q15.c"
+#include "arm_shift_q31.c"
+#include "arm_shift_q7.c"
+#include "arm_sub_f32.c"
+#include "arm_sub_q15.c"
+#include "arm_sub_q31.c"
+#include "arm_sub_q7.c"
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
new file mode 100644
index 00000000..60db1414
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
@@ -0,0 +1,146 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_f32.c
+ * Description:  Floating-point vector absolute value
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include 
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicAbs Vector Absolute Value
+
+  Computes the absolute value of a vector on an element-by-element basis.
+
+  
+      pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.
+  

+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Floating-point vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_abs_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+
+    	/* Calculate absolute values and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vabsq_f32(vec1);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute and store result in destination buffer. */
+    *pDst++ = fabsf(*pSrc++);
+
+    *pDst++ = fabsf(*pSrc++);
+
+    *pDst++ = fabsf(*pSrc++);
+
+    *pDst++ = fabsf(*pSrc++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute and store result in destination buffer. */
+    *pDst++ = fabsf(*pSrc++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
new file mode 100644
index 00000000..9aff1802
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
@@ -0,0 +1,132 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_q15.c
+ * Description:  Q15 vector absolute value
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Q15 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+ */
+
+void arm_abs_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
new file mode 100644
index 00000000..e9d027a9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
@@ -0,0 +1,132 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_q31.c
+ * Description:  Q31 vector absolute value
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Q31 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+ */
+
+void arm_abs_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
new file mode 100644
index 00000000..060b967a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_q7.c
+ * Description:  Q7 vector absolute value
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Q7 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Conditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
+ */
+
+void arm_abs_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q7_t in;                                       /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t) __QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
new file mode 100644
index 00000000..8a485fa0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
@@ -0,0 +1,145 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_f32.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicAdd Vector Addition
+
+  Element-by-element addition of two vectors.
+
+  
+      pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
+  

+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Floating-point vector addition.
+  @param[in]     pSrcA      points to first input vector
+  @param[in]     pSrcB      points to second input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_add_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+    	/* Add and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vaddq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
new file mode 100644
index 00000000..1363b760
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
@@ -0,0 +1,126 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_q15.c
+ * Description:  Q15 vector addition
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Q15 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+void arm_add_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2;
+  q31_t inB1, inB2;
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 times 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
+
+    /* Add and store 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, __QADD16(inA1, inB1));
+    write_q15x2_ia (&pDst, __QADD16(inA2, inB2));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
new file mode 100644
index 00000000..2f8226d6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
@@ -0,0 +1,108 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_q31.c
+ * Description:  Q31 vector addition
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Q31 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+void arm_add_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
new file mode 100644
index 00000000..ac57c35b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
@@ -0,0 +1,109 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_q7.c
+ * Description:  Q7 vector addition
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Q7 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+
+void arm_add_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+#if defined (ARM_MATH_DSP)
+    /* Add and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
+#else
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
new file mode 100644
index 00000000..41ec12e2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
@@ -0,0 +1,163 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_f32.c
+ * Description:  Floating-point dot product
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicDotProd Vector Dot Product
+
+  Computes the dot product of two vectors.
+  The vectors are multiplied element-by-element and then summed.
+
+  
+      sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+  

+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of floating-point vectors.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @param[out]    result     output result returned here.
+  @return        none
+ */
+
+void arm_dot_prod_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t blockSize,
+        float32_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary return variable */
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+    float32x4_t accum = vdupq_n_f32(0);    
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    vec1 = vld1q_f32(pSrcA);
+    vec2 = vld1q_f32(pSrcB);
+
+    while (blkCnt > 0U)
+    {
+        /* C = A[0]*B[0] + A[1]*B[1] + A[2]*B[2] + ... + A[blockSize-1]*B[blockSize-1] */
+        /* Calculate dot product and then store the result in a temporary buffer. */
+        
+	accum = vmlaq_f32(accum, vec1, vec2);
+	
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+    
+#if __aarch64__
+    sum = vpadds_f32(vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)));
+#else
+    sum = (vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)))[0] + (vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)))[1];
+#endif    
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer */
+  *result = sum;
+}
+
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
new file mode 100644
index 00000000..2fa30fca
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
@@ -0,0 +1,120 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_q15.c
+ * Description:  Q15 dot product
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of Q15 vectors.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[in]     blockSize  number of samples in each vector
+  @param[out]    result     output result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
+                   results are added to a 64-bit accumulator in 34.30 format.
+                   Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
+                   there is no risk of overflow.
+                   The return result is in 34.30 format.
+ */
+
+void arm_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary return variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+#if defined (ARM_MATH_DSP)
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
+    sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
+#else
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+//#if defined (ARM_MATH_DSP)
+//    sum  = __SMLALD(*pSrcA++, *pSrcB++, sum);
+//#else
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+//#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer in 34.30 format */
+  *result = sum;
+}
+
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
new file mode 100644
index 00000000..954e0bd7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
@@ -0,0 +1,115 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_q31.c
+ * Description:  Q31 dot product
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of Q31 vectors.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @param[out]    result     output result returned here.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
+                   are truncated to 2.48 format by discarding the lower 14 bits.
+                   The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+                   There are 15 guard bits in the accumulator and there is no risk of overflow as long as
+                   the length of the vectors is less than 2^16 elements.
+                   The return result is in 16.48 format.
+ */
+
+void arm_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary return variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer in 16.48 format */
+  *result = sum;
+}
+
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
new file mode 100644
index 00000000..e8ba22be
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
@@ -0,0 +1,139 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_q7.c
+ * Description:  Q7 dot product
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of Q7 vectors.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[in]     blockSize  number of samples in each vector
+  @param[out]    result     output result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
+                   results are added to an accumulator in 18.14 format.
+                   Nonsaturating additions are used and there is no danger of wrap around as long as
+                   the vectors are less than 2^18 elements long.
+                   The return result is in 18.14 format.
+ */
+
+void arm_dot_prod_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        uint32_t blockSize,
+        q31_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary return variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t input1, input2;                          /* Temporary variables */
+  q31_t inA1, inA2, inB1, inB2;                  /* Temporary variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+#if defined (ARM_MATH_DSP)
+    /* read 4 samples at a time from sourceA */
+    input1 = read_q7x4_ia ((q7_t **) &pSrcA);
+    /* read 4 samples at a time from sourceB */
+    input2 = read_q7x4_ia ((q7_t **) &pSrcB);
+
+    /* extract two q7_t samples to q15_t samples */
+    inA1 = __SXTB16(__ROR(input1, 8));
+    /* extract reminaing two samples */
+    inA2 = __SXTB16(input1);
+    /* extract two q7_t samples to q15_t samples */
+    inB1 = __SXTB16(__ROR(input2, 8));
+    /* extract reminaing two samples */
+    inB2 = __SXTB16(input2);
+
+    /* multiply and accumulate two samples at a time */
+    sum = __SMLAD(inA1, inB1, sum);
+    sum = __SMLAD(inA2, inB2, sum);
+#else
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+//#if defined (ARM_MATH_DSP)
+//    sum  = __SMLAD(*pSrcA++, *pSrcB++, sum);
+//#else
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+//#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer in 18.14 format */
+  *result = sum;
+}
+
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
new file mode 100644
index 00000000..5a35b00f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
@@ -0,0 +1,148 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_f32.c
+ * Description:  Floating-point vector multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicMult Vector Multiplication
+
+  Element-by-element multiplication of two vectors.
+
+  
+      pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.
+  

+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Floating-point vector multiplication.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+ */
+
+void arm_mult_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A * B */
+
+    	/* Multiply the inputs and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vmulq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply input and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
new file mode 100644
index 00000000..270dc730
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
@@ -0,0 +1,143 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_q15.c
+ * Description:  Q15 vector multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Q15 vector multiplication
+  @param[in]     pSrcA      points to first input vector
+  @param[in]     pSrcB      points to second input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+void arm_mult_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2, inB1, inB2;                  /* Temporary input variables */
+  q15_t out1, out2, out3, out4;                  /* Temporary output variables */
+  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    /* read 2 samples at a time from sourceA */
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 samples at a time from sourceB */
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
+
+    /* multiply mul = sourceA * sourceB */
+    mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
+    mul2 = (q31_t) ((q15_t) (inA1      ) * (q15_t) (inB1      ));
+    mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2      ) * (q15_t) (inB2      ));
+
+    /* saturate result to 16 bit */
+    out1 = (q15_t) __SSAT(mul1 >> 15, 16);
+    out2 = (q15_t) __SSAT(mul2 >> 15, 16);
+    out3 = (q15_t) __SSAT(mul3 >> 15, 16);
+    out4 = (q15_t) __SSAT(mul4 >> 15, 16);
+
+    /* store result to destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(out2, out1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(out4, out3, 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pDst, __PKHBT(out3, out4, 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+#else
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
new file mode 100644
index 00000000..b6660de0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
@@ -0,0 +1,119 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_q31.c
+ * Description:  Q31 vector multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Q31 vector multiplication.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+void arm_mult_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t out;                                     /* Temporary output variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
new file mode 100644
index 00000000..b50c109d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
@@ -0,0 +1,119 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_q7.c
+ * Description:  Q7 vector multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Q7 vector multiplication
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+
+void arm_mult_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q7_t out1, out2, out3, out4;                   /* Temporary output variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+#if defined (ARM_MATH_DSP)
+    /* Multiply inputs and store results in temporary variables */
+    out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+
+    /* Pack and store result in destination buffer (in single write) */
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+#else
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply input and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
new file mode 100644
index 00000000..5b2268cd
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
@@ -0,0 +1,145 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_f32.c
+ * Description:  Negates floating-point vectors
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicNegate Vector Negate
+
+  Negates the elements of a vector.
+
+  
+      pDst[n] = -pSrc[n],   0 <= n < blockSize.
+  

+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector.
+  @param[out]    pDst       points to output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+ */
+
+void arm_negate_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+    float32x4_t vec1;
+    float32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = -A */
+
+    	/* Negate and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vnegq_f32(vec1);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    *pDst++ = -*pSrc++;
+
+    *pDst++ = -*pSrc++;
+
+    *pDst++ = -*pSrc++;
+
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
new file mode 100644
index 00000000..9c8ea7bb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
@@ -0,0 +1,126 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_q15.c
+ * Description:  Negates Q15 vectors
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+
+  @par           Conditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
+ */
+
+void arm_negate_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t in1;                                    /* Temporary input variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+#if defined (ARM_MATH_DSP)
+    /* Negate and store result in destination buffer (2 samples at a time). */
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    write_q15x2_ia (&pDst, __QSUB16(0, in1));
+
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    write_q15x2_ia (&pDst, __QSUB16(0, in1));
+#else
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
new file mode 100644
index 00000000..f01b1d9f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
@@ -0,0 +1,132 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_q31.c
+ * Description:  Negates Q31 vectors
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize   number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
+ */
+
+void arm_negate_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
new file mode 100644
index 00000000..a27223f3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
@@ -0,0 +1,126 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_q7.c
+ * Description:  Negates Q7 vectors
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a Q7 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize   number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q7 value -1 (0x80) is saturated to the maximum allowable positive value 0x7F.
+ */
+
+void arm_negate_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q7_t in;                                       /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t in1;                                    /* Temporary input variable */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+#if defined (ARM_MATH_DSP)
+    /* Negate and store result in destination buffer (4 samples at a time). */
+    in1 = read_q7x4_ia ((q7_t **) &pSrc);
+    write_q7x4_ia (&pDst, __QSUB8(0, in1));
+#else
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q7_t) __QSUB(0, in);
+#else
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
new file mode 100644
index 00000000..aef5d414
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
@@ -0,0 +1,147 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_f32.c
+ * Description:  Floating-point vector offset
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicOffset Vector Offset
+
+  Adds a constant offset to each element of a vector.
+
+  
+      pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.
+  

+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_offset_f32(
+  const float32_t * pSrc,
+        float32_t offset,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+    float32x4_t vec1;
+    float32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + offset */
+ 
+        /* Add offset and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vaddq_f32(vec1,vdupq_n_f32(offset));
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (*pSrc++) + offset;
+
+    *pDst++ = (*pSrc++) + offset;
+
+    *pDst++ = (*pSrc++) + offset;
+
+    *pDst++ = (*pSrc++) + offset;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (*pSrc++) + offset;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
new file mode 100644
index 00000000..196efb6f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
@@ -0,0 +1,121 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_q15.c
+ * Description:  Q15 vector offset
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+void arm_offset_q15(
+  const q15_t * pSrc,
+        q15_t offset,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t offset_packed;                           /* Offset packed to 32 bit */
+
+  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
+  offset_packed = __PKHBT(offset, offset, 16);
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+#if defined (ARM_MATH_DSP)
+    /* Add offset and store result in destination buffer (2 samples at a time). */
+    write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
+    write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
new file mode 100644
index 00000000..b043c858
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
@@ -0,0 +1,128 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_q31.c
+ * Description:  Q31 vector offset
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+void arm_offset_q31(
+  const q31_t * pSrc,
+        q31_t offset,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
new file mode 100644
index 00000000..95ccfda4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
@@ -0,0 +1,116 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_q7.c
+ * Description:  Q7 vector offset
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+
+void arm_offset_q7(
+  const q7_t * pSrc,
+        q7_t offset,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t offset_packed;                           /* Offset packed to 32 bit */
+
+  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
+  offset_packed = __PACKq7(offset, offset, offset, offset);
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+#if defined (ARM_MATH_DSP)
+    /* Add offset and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QADD8(read_q7x4_ia ((q7_t **) &pSrc), offset_packed));
+#else
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
new file mode 100644
index 00000000..38327ccc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
@@ -0,0 +1,159 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_f32.c
+ * Description:  Multiplies a floating-point vector by a scalar
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicScale Vector Scale
+
+  Multiply a vector by a scalar value.  For floating-point data, the algorithm used is:
+
+  
+      pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.
+  

+
+  In the fixed-point Q7, Q15, and Q31 functions, scale is represented by
+  a fractional multiplication scaleFract and an arithmetic shift shift.
+  The shift allows the gain of the scaling operation to exceed 1.0.
+  The algorithm used with fixed-point data is:
+
+  
+      pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.
+  

+
+  The overall scale factor applied to the fixed-point data is
+  
+      scale = scaleFract * 2^shift.
+  

+
+  The functions support in-place computation allowing the source and destination
+  pointers to reference the same memory buffer.
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a floating-point vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_scale_f32(
+  const float32_t *pSrc,
+        float32_t scale,
+        float32_t *pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+    float32x4_t vec1;
+    float32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A * scale */
+
+    	/* Scale the input and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vmulq_f32(vec1, vdupq_n_f32(scale));
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (*pSrc++) * scale;
+
+    *pDst++ = (*pSrc++) * scale;
+
+    *pDst++ = (*pSrc++) * scale;
+
+    *pDst++ = (*pSrc++) * scale;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (*pSrc++) * scale;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
new file mode 100644
index 00000000..fc3f2ee1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
@@ -0,0 +1,144 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_q15.c
+ * Description:  Multiplies a Q15 vector by a scalar
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a Q15 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The input data *pSrc and scaleFract are in 1.15 format.
+                   These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+ */
+
+void arm_scale_q15(
+  const q15_t *pSrc,
+        q15_t scaleFract,
+        int8_t shift,
+        q15_t *pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        int8_t kShift = 15 - shift;                    /* Shift to apply after scaling */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+#if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2;
+  q31_t out1, out2, out3, out4;                  /* Temporary output variables */
+  q15_t in1, in2, in3, in4;                      /* Temporary input variables */
+#endif
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from source */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrc);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrc);
+
+    /* Scale inputs and store result in temporary variables
+     * in single cycle by packing the outputs */
+    out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
+    out2 = (q31_t) ((q15_t) (inA1      ) * scaleFract);
+    out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
+    out4 = (q31_t) ((q15_t) (inA2      ) * scaleFract);
+
+    /* apply shifting */
+    out1 = out1 >> kShift;
+    out2 = out2 >> kShift;
+    out3 = out3 >> kShift;
+    out4 = out4 >> kShift;
+
+    /* saturate the output */
+    in1 = (q15_t) (__SSAT(out1, 16));
+    in2 = (q15_t) (__SSAT(out2, 16));
+    in3 = (q15_t) (__SSAT(out3, 16));
+    in4 = (q15_t) (__SSAT(out4, 16));
+
+    /* store result to destination */
+    write_q15x2_ia (&pDst, __PKHBT(in2, in1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(in4, in3, 16));
+#else
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
new file mode 100644
index 00000000..52821ed9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
@@ -0,0 +1,191 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_q31.c
+ * Description:  Multiplies a Q31 vector by a scalar
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a Q31 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The input data *pSrc and scaleFract are in 1.31 format.
+                   These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
+ */
+
+void arm_scale_q31(
+  const q31_t *pSrc,
+        q31_t scaleFract,
+        int8_t shift,
+        q31_t *pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in, out;                                 /* Temporary variables */
+        int8_t kShift = shift + 1;                     /* Shift to apply after scaling */
+        int8_t sign = (kShift & 0x80);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
+
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;                                /* read input from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in << kShift;                          /* apply shifting */
+      if (in != (out >> kShift))                   /* saturate the result */
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;                               /* Store result destination */
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
+
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;                                /* read four inputs from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in >> -kShift;                         /* apply shifting */
+      *pDst++ = out;                               /* Store result destination */
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
+
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+          out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
+
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+}
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
new file mode 100644
index 00000000..9da6af3a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
@@ -0,0 +1,129 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_q7.c
+ * Description:  Multiplies a Q7 vector by a scalar
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a Q7 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The input data *pSrc and scaleFract are in 1.7 format.
+                   These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
+ */
+
+void arm_scale_q7(
+  const q7_t * pSrc,
+        q7_t scaleFract,
+        int8_t shift,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        int8_t kShift = 7 - shift;                     /* Shift to apply after scaling */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q7_t in1,  in2,  in3,  in4;                    /* Temporary input variables */
+  q7_t out1, out2, out3, out4;                   /* Temporary output variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+#if defined (ARM_MATH_DSP)
+    /* Reading 4 inputs from memory */
+    in1 = *pSrc++;
+    in2 = *pSrc++;
+    in3 = *pSrc++;
+    in4 = *pSrc++;
+
+    /* Scale inputs and store result in the temporary variable. */
+    out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
+    out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
+    out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
+    out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
+
+    /* Pack and store result in destination buffer (in single write) */
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+#else
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
new file mode 100644
index 00000000..360be976
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
@@ -0,0 +1,201 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_shift_q15.c
+ * Description:  Shifts the elements of a Q15 vector by a specified number of bits
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicShift
+  @{
+ */
+
+/**
+  @brief         Shifts the elements of a Q15 vector a specified number of bits
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+void arm_shift_q15(
+  const q15_t * pSrc,
+        int8_t shiftBits,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q15_t in1, in2;                                /* Temporary input variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+      /* Shift the inputs and then store the results in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
+                                     __SSAT((in2 << shiftBits), 16), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
+                                      __SSAT((in1 << shiftBits), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
+                                     __SSAT((in2 << shiftBits), 16), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
+                                     __SSAT((in1 << shiftBits), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+#else
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+      /* Shift the inputs and then store the results in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
+                                     (in1 >> -shiftBits), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
+                                     (in1 >> -shiftBits), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+#else
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+}
+
+/**
+  @} end of BasicShift group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
new file mode 100644
index 00000000..5550426d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
@@ -0,0 +1,181 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_shift_q31.c
+ * Description:  Shifts the elements of a Q31 vector by a specified number of bits
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+/**
+  @defgroup BasicShift Vector Shift
+
+  Shifts the elements of a fixed-point vector by a specified number of bits.
+  There are separate functions for Q7, Q15, and Q31 data types.
+  The underlying algorithm used is:
+
+  
+      pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.
+  

+
+  If shift is positive then the elements of the vector are shifted to the left.
+  If shift is negative then the elements of the vector are shifted to the right.
+
+  The functions support in-place computation allowing the source and destination
+  pointers to reference the same memory buffer.
+ */
+
+/**
+  @addtogroup BasicShift
+  @{
+ */
+
+/**
+  @brief         Shifts the elements of a Q31 vector a specified number of bits.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in the vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+void arm_shift_q31(
+  const q31_t * pSrc,
+        int8_t shiftBits,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  q31_t in, out;                                 /* Temporary variables */
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+      /* Shift input and store results in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = clip_q63_to_q31((q63_t) *pSrc++ << shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+}
+
+/**
+  @} end of BasicShift group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
new file mode 100644
index 00000000..832e40a6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
@@ -0,0 +1,175 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_shift_q7.c
+ * Description:  Processing function for the Q7 Shifting
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicShift
+  @{
+ */
+
+/**
+  @brief         Shifts the elements of a Q7 vector a specified number of bits
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           onditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+
+void arm_shift_q7(
+  const q7_t * pSrc,
+        int8_t shiftBits,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q7_t in1,  in2,  in3,  in4;                    /* Temporary input variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* Read 4 inputs */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+      in3 = *pSrc++;
+      in4 = *pSrc++;
+
+    /* Pack and store result in destination buffer (in single write) */
+      write_q7x4_ia (&pDst, __PACKq7(__SSAT((in1 << shiftBits), 8),
+                                     __SSAT((in2 << shiftBits), 8),
+                                     __SSAT((in3 << shiftBits), 8),
+                                     __SSAT((in4 << shiftBits), 8) ));
+#else
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* Read 4 inputs */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+      in3 = *pSrc++;
+      in4 = *pSrc++;
+
+    /* Pack and store result in destination buffer (in single write) */
+      write_q7x4_ia (&pDst, __PACKq7((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits),
+                                     (in3 >> -shiftBits),
+                                     (in4 >> -shiftBits) ));
+#else
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+}
+
+/**
+  @} end of BasicShift group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
new file mode 100644
index 00000000..67556e49
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
@@ -0,0 +1,148 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_f32.c
+ * Description:  Floating-point vector subtraction
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicSub Vector Subtraction
+
+  Element-by-element subtraction of two vectors.
+
+  
+      pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.
+  

+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Floating-point vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_sub_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A - B */
+
+        /* Subtract and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vsubq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
new file mode 100644
index 00000000..07420c28
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
@@ -0,0 +1,126 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_q15.c
+ * Description:  Q15 vector subtraction
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Q15 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+void arm_sub_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2;
+  q31_t inB1, inB2;
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 times 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
+
+    /* Subtract and store 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, __QSUB16(inA1, inB1));
+    write_q15x2_ia (&pDst, __QSUB16(inA2, inB2));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
new file mode 100644
index 00000000..bd94ba5f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
@@ -0,0 +1,108 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_q31.c
+ * Description:  Q31 vector subtraction
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Q31 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+void arm_sub_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
new file mode 100644
index 00000000..ce65350e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
@@ -0,0 +1,109 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_q7.c
+ * Description:  Q7 vector subtraction
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Q7 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ */
+
+void arm_sub_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+#if defined (ARM_MATH_DSP)
+    /* Subtract and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QSUB8(read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
+#else
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/CommonTables.c b/Libraries/CMSIS/DSP/Source/CommonTables/CommonTables.c
new file mode 100644
index 00000000..02ea6b0a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/CommonTables.c
@@ -0,0 +1,31 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        CommonTables.c
+ * Description:  Combination of all common table source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_common_tables.c"
+#include "arm_const_structs.c"
+
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables.c b/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
new file mode 100644
index 00000000..1b80c191
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
@@ -0,0 +1,57215 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_common_tables.c
+ * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup ComplexFFT
+ */
+
+/**
+  @addtogroup CFFT_CIFFT Complex FFT Tables
+  @{
+ */
+
+/**
+  @par
+  Pseudo code for Generation of Bit reversal Table is
+  @par
+  
for (l = 1; l <= N/4; l++)
+  {
+    for (i = 0; i< logN2; i++)
+    {
+      a[i] = l & (1 << i);
+    }
+    for (j = 0; j < logN2; j++)
+    {
+      if (a[j] != 0)
+      y[l] += (1 << ((logN2 - 1) - j));
+    }
+    y[l] = y[l] >> 1;
+   } 

+  @par
+  where N = 4096, logN2 = 12
+  @par
+  N is the maximum FFT Size supported
+*/
+
+/**
+  @brief  Table for bit reversal process
+*/
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+const uint16_t armBitRevTable[1024] = {
+   0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x080, 0x480, 0x280,
+   0x680, 0x180, 0x580, 0x380, 0x780, 0x040, 0x440, 0x240, 0x640, 0x140,
+   0x540, 0x340, 0x740, 0x0c0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0,
+   0x7c0, 0x020, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0x0a0,
+   0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x060, 0x460, 0x260,
+   0x660, 0x160, 0x560, 0x360, 0x760, 0x0e0, 0x4e0, 0x2e0, 0x6e0, 0x1e0,
+   0x5e0, 0x3e0, 0x7e0, 0x010, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310,
+   0x710, 0x090, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x050,
+   0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0x0d0, 0x4d0, 0x2d0,
+   0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x030, 0x430, 0x230, 0x630, 0x130,
+   0x530, 0x330, 0x730, 0x0b0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,
+   0x7b0, 0x070, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0x0f0,
+   0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x008, 0x408, 0x208,
+   0x608, 0x108, 0x508, 0x308, 0x708, 0x088, 0x488, 0x288, 0x688, 0x188,
+   0x588, 0x388, 0x788, 0x048, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348,
+   0x748, 0x0c8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x028,
+   0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0x0a8, 0x4a8, 0x2a8,
+   0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x068, 0x468, 0x268, 0x668, 0x168,
+   0x568, 0x368, 0x768, 0x0e8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8,
+   0x7e8, 0x018, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x098,
+   0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x058, 0x458, 0x258,
+   0x658, 0x158, 0x558, 0x358, 0x758, 0x0d8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,
+   0x5d8, 0x3d8, 0x7d8, 0x038, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338,
+   0x738, 0x0b8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x078,
+   0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0x0f8, 0x4f8, 0x2f8,
+   0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x004, 0x404, 0x204, 0x604, 0x104,
+   0x504, 0x304, 0x704, 0x084, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384,
+   0x784, 0x044, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0x0c4,
+   0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x024, 0x424, 0x224,
+   0x624, 0x124, 0x524, 0x324, 0x724, 0x0a4, 0x4a4, 0x2a4, 0x6a4, 0x1a4,
+   0x5a4, 0x3a4, 0x7a4, 0x064, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364,
+   0x764, 0x0e4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x014,
+   0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x094, 0x494, 0x294,
+   0x694, 0x194, 0x594, 0x394, 0x794, 0x054, 0x454, 0x254, 0x654, 0x154,
+   0x554, 0x354, 0x754, 0x0d4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4,
+   0x7d4, 0x034, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0x0b4,
+   0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x074, 0x474, 0x274,
+   0x674, 0x174, 0x574, 0x374, 0x774, 0x0f4, 0x4f4, 0x2f4, 0x6f4, 0x1f4,
+   0x5f4, 0x3f4, 0x7f4, 0x00c, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c,
+   0x70c, 0x08c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x04c,
+   0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0x0cc, 0x4cc, 0x2cc,
+   0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x02c, 0x42c, 0x22c, 0x62c, 0x12c,
+   0x52c, 0x32c, 0x72c, 0x0ac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac,
+   0x7ac, 0x06c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0x0ec,
+   0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x01c, 0x41c, 0x21c,
+   0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x09c, 0x49c, 0x29c, 0x69c, 0x19c,
+   0x59c, 0x39c, 0x79c, 0x05c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c,
+   0x75c, 0x0dc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x03c,
+   0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0x0bc, 0x4bc, 0x2bc,
+   0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x07c, 0x47c, 0x27c, 0x67c, 0x17c,
+   0x57c, 0x37c, 0x77c, 0x0fc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc,
+   0x7fc, 0x002, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x082,
+   0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x042, 0x442, 0x242,
+   0x642, 0x142, 0x542, 0x342, 0x742, 0x0c2, 0x4c2, 0x2c2, 0x6c2, 0x1c2,
+   0x5c2, 0x3c2, 0x7c2, 0x022, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,
+   0x722, 0x0a2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x062,
+   0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0x0e2, 0x4e2, 0x2e2,
+   0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x012, 0x412, 0x212, 0x612, 0x112,
+   0x512, 0x312, 0x712, 0x092, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392,
+   0x792, 0x052, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0x0d2,
+   0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x032, 0x432, 0x232,
+   0x632, 0x132, 0x532, 0x332, 0x732, 0x0b2, 0x4b2, 0x2b2, 0x6b2, 0x1b2,
+   0x5b2, 0x3b2, 0x7b2, 0x072, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372,
+   0x772, 0x0f2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0x00a,
+   0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x08a, 0x48a, 0x28a,
+   0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x04a, 0x44a, 0x24a, 0x64a, 0x14a,
+   0x54a, 0x34a, 0x74a, 0x0ca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca,
+   0x7ca, 0x02a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0x0aa,
+   0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x06a, 0x46a, 0x26a,
+   0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0x0ea, 0x4ea, 0x2ea, 0x6ea, 0x1ea,
+   0x5ea, 0x3ea, 0x7ea, 0x01a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a,
+   0x71a, 0x09a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a,
+   0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0x0da, 0x4da, 0x2da,
+   0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x03a, 0x43a, 0x23a, 0x63a, 0x13a,
+   0x53a, 0x33a, 0x73a, 0x0ba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba,
+   0x7ba, 0x07a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0x0fa,
+   0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x006, 0x406, 0x206,
+   0x606, 0x106, 0x506, 0x306, 0x706, 0x086, 0x486, 0x286, 0x686, 0x186,
+   0x586, 0x386, 0x786, 0x046, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346,
+   0x746, 0x0c6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x026,
+   0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0x0a6, 0x4a6, 0x2a6,
+   0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x066, 0x466, 0x266, 0x666, 0x166,
+   0x566, 0x366, 0x766, 0x0e6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6,
+   0x7e6, 0x016, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x096,
+   0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x056, 0x456, 0x256,
+   0x656, 0x156, 0x556, 0x356, 0x756, 0x0d6, 0x4d6, 0x2d6, 0x6d6, 0x1d6,
+   0x5d6, 0x3d6, 0x7d6, 0x036, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336,
+   0x736, 0x0b6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x076,
+   0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0x0f6, 0x4f6, 0x2f6,
+   0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0x00e, 0x40e, 0x20e, 0x60e, 0x10e,
+   0x50e, 0x30e, 0x70e, 0x08e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e,
+   0x78e, 0x04e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0x0ce,
+   0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x02e, 0x42e, 0x22e,
+   0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0x0ae, 0x4ae, 0x2ae, 0x6ae, 0x1ae,
+   0x5ae, 0x3ae, 0x7ae, 0x06e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e,
+   0x76e, 0x0ee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x01e,
+   0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x09e, 0x49e, 0x29e,
+   0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x05e, 0x45e, 0x25e, 0x65e, 0x15e,
+   0x55e, 0x35e, 0x75e, 0x0de, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,
+   0x7de, 0x03e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0x0be,
+   0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x07e, 0x47e, 0x27e,
+   0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0x0fe, 0x4fe, 0x2fe, 0x6fe, 0x1fe,
+   0x5fe, 0x3fe, 0x7fe, 0x001
+};
+#endif
+/**
+  @brief  Floating-point Twiddle factors Table Generation
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for (i = 0; i < N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_16[32] = {
+    1.000000000f,  0.000000000f,
+    0.923879533f,  0.382683432f,
+    0.707106781f,  0.707106781f,
+    0.382683432f,  0.923879533f,
+    0.000000000f,  1.000000000f,
+   -0.382683432f,  0.923879533f,
+   -0.707106781f,  0.707106781f,
+   -0.923879533f,  0.382683432f,
+   -1.000000000f,  0.000000000f,
+   -0.923879533f, -0.382683432f,
+   -0.707106781f, -0.707106781f,
+   -0.382683432f, -0.923879533f,
+   -0.000000000f, -1.000000000f,
+    0.382683432f, -0.923879533f,
+    0.707106781f, -0.707106781f,
+    0.923879533f, -0.382683432f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
+
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_32[64] = {
+    1.000000000f,  0.000000000f,
+    0.980785280f,  0.195090322f,
+    0.923879533f,  0.382683432f,
+    0.831469612f,  0.555570233f,
+    0.707106781f,  0.707106781f,
+    0.555570233f,  0.831469612f,
+    0.382683432f,  0.923879533f,
+    0.195090322f,  0.980785280f,
+    0.000000000f,  1.000000000f,
+   -0.195090322f,  0.980785280f,
+   -0.382683432f,  0.923879533f,
+   -0.555570233f,  0.831469612f,
+   -0.707106781f,  0.707106781f,
+   -0.831469612f,  0.555570233f,
+   -0.923879533f,  0.382683432f,
+   -0.980785280f,  0.195090322f,
+   -1.000000000f,  0.000000000f,
+   -0.980785280f, -0.195090322f,
+   -0.923879533f, -0.382683432f,
+   -0.831469612f, -0.555570233f,
+   -0.707106781f, -0.707106781f,
+   -0.555570233f, -0.831469612f,
+   -0.382683432f, -0.923879533f,
+   -0.195090322f, -0.980785280f,
+   -0.000000000f, -1.000000000f,
+    0.195090322f, -0.980785280f,
+    0.382683432f, -0.923879533f,
+    0.555570233f, -0.831469612f,
+    0.707106781f, -0.707106781f,
+    0.831469612f, -0.555570233f,
+    0.923879533f, -0.382683432f,
+    0.980785280f, -0.195090322f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for(i = 0; i < N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_64[128] = {
+    1.000000000f,  0.000000000f,
+    0.995184727f,  0.098017140f,
+    0.980785280f,  0.195090322f,
+    0.956940336f,  0.290284677f,
+    0.923879533f,  0.382683432f,
+    0.881921264f,  0.471396737f,
+    0.831469612f,  0.555570233f,
+    0.773010453f,  0.634393284f,
+    0.707106781f,  0.707106781f,
+    0.634393284f,  0.773010453f,
+    0.555570233f,  0.831469612f,
+    0.471396737f,  0.881921264f,
+    0.382683432f,  0.923879533f,
+    0.290284677f,  0.956940336f,
+    0.195090322f,  0.980785280f,
+    0.098017140f,  0.995184727f,
+    0.000000000f,  1.000000000f,
+   -0.098017140f,  0.995184727f,
+   -0.195090322f,  0.980785280f,
+   -0.290284677f,  0.956940336f,
+   -0.382683432f,  0.923879533f,
+   -0.471396737f,  0.881921264f,
+   -0.555570233f,  0.831469612f,
+   -0.634393284f,  0.773010453f,
+   -0.707106781f,  0.707106781f,
+   -0.773010453f,  0.634393284f,
+   -0.831469612f,  0.555570233f,
+   -0.881921264f,  0.471396737f,
+   -0.923879533f,  0.382683432f,
+   -0.956940336f,  0.290284677f,
+   -0.980785280f,  0.195090322f,
+   -0.995184727f,  0.098017140f,
+   -1.000000000f,  0.000000000f,
+   -0.995184727f, -0.098017140f,
+   -0.980785280f, -0.195090322f,
+   -0.956940336f, -0.290284677f,
+   -0.923879533f, -0.382683432f,
+   -0.881921264f, -0.471396737f,
+   -0.831469612f, -0.555570233f,
+   -0.773010453f, -0.634393284f,
+   -0.707106781f, -0.707106781f,
+   -0.634393284f, -0.773010453f,
+   -0.555570233f, -0.831469612f,
+   -0.471396737f, -0.881921264f,
+   -0.382683432f, -0.923879533f,
+   -0.290284677f, -0.956940336f,
+   -0.195090322f, -0.980785280f,
+   -0.098017140f, -0.995184727f,
+   -0.000000000f, -1.000000000f,
+    0.098017140f, -0.995184727f,
+    0.195090322f, -0.980785280f,
+    0.290284677f, -0.956940336f,
+    0.382683432f, -0.923879533f,
+    0.471396737f, -0.881921264f,
+    0.555570233f, -0.831469612f,
+    0.634393284f, -0.773010453f,
+    0.707106781f, -0.707106781f,
+    0.773010453f, -0.634393284f,
+    0.831469612f, -0.555570233f,
+    0.881921264f, -0.471396737f,
+    0.923879533f, -0.382683432f,
+    0.956940336f, -0.290284677f,
+    0.980785280f, -0.195090322f,
+    0.995184727f, -0.098017140f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_128[256] = {
+    1.000000000f,  0.000000000f,
+    0.998795456f,  0.049067674f,
+    0.995184727f,  0.098017140f,
+    0.989176510f,  0.146730474f,
+    0.980785280f,  0.195090322f,
+    0.970031253f,  0.242980180f,
+    0.956940336f,  0.290284677f,
+    0.941544065f,  0.336889853f,
+    0.923879533f,  0.382683432f,
+    0.903989293f,  0.427555093f,
+    0.881921264f,  0.471396737f,
+    0.857728610f,  0.514102744f,
+    0.831469612f,  0.555570233f,
+    0.803207531f,  0.595699304f,
+    0.773010453f,  0.634393284f,
+    0.740951125f,  0.671558955f,
+    0.707106781f,  0.707106781f,
+    0.671558955f,  0.740951125f,
+    0.634393284f,  0.773010453f,
+    0.595699304f,  0.803207531f,
+    0.555570233f,  0.831469612f,
+    0.514102744f,  0.857728610f,
+    0.471396737f,  0.881921264f,
+    0.427555093f,  0.903989293f,
+    0.382683432f,  0.923879533f,
+    0.336889853f,  0.941544065f,
+    0.290284677f,  0.956940336f,
+    0.242980180f,  0.970031253f,
+    0.195090322f,  0.980785280f,
+    0.146730474f,  0.989176510f,
+    0.098017140f,  0.995184727f,
+    0.049067674f,  0.998795456f,
+    0.000000000f,  1.000000000f,
+   -0.049067674f,  0.998795456f,
+   -0.098017140f,  0.995184727f,
+   -0.146730474f,  0.989176510f,
+   -0.195090322f,  0.980785280f,
+   -0.242980180f,  0.970031253f,
+   -0.290284677f,  0.956940336f,
+   -0.336889853f,  0.941544065f,
+   -0.382683432f,  0.923879533f,
+   -0.427555093f,  0.903989293f,
+   -0.471396737f,  0.881921264f,
+   -0.514102744f,  0.857728610f,
+   -0.555570233f,  0.831469612f,
+   -0.595699304f,  0.803207531f,
+   -0.634393284f,  0.773010453f,
+   -0.671558955f,  0.740951125f,
+   -0.707106781f,  0.707106781f,
+   -0.740951125f,  0.671558955f,
+   -0.773010453f,  0.634393284f,
+   -0.803207531f,  0.595699304f,
+   -0.831469612f,  0.555570233f,
+   -0.857728610f,  0.514102744f,
+   -0.881921264f,  0.471396737f,
+   -0.903989293f,  0.427555093f,
+   -0.923879533f,  0.382683432f,
+   -0.941544065f,  0.336889853f,
+   -0.956940336f,  0.290284677f,
+   -0.970031253f,  0.242980180f,
+   -0.980785280f,  0.195090322f,
+   -0.989176510f,  0.146730474f,
+   -0.995184727f,  0.098017140f,
+   -0.998795456f,  0.049067674f,
+   -1.000000000f,  0.000000000f,
+   -0.998795456f, -0.049067674f,
+   -0.995184727f, -0.098017140f,
+   -0.989176510f, -0.146730474f,
+   -0.980785280f, -0.195090322f,
+   -0.970031253f, -0.242980180f,
+   -0.956940336f, -0.290284677f,
+   -0.941544065f, -0.336889853f,
+   -0.923879533f, -0.382683432f,
+   -0.903989293f, -0.427555093f,
+   -0.881921264f, -0.471396737f,
+   -0.857728610f, -0.514102744f,
+   -0.831469612f, -0.555570233f,
+   -0.803207531f, -0.595699304f,
+   -0.773010453f, -0.634393284f,
+   -0.740951125f, -0.671558955f,
+   -0.707106781f, -0.707106781f,
+   -0.671558955f, -0.740951125f,
+   -0.634393284f, -0.773010453f,
+   -0.595699304f, -0.803207531f,
+   -0.555570233f, -0.831469612f,
+   -0.514102744f, -0.857728610f,
+   -0.471396737f, -0.881921264f,
+   -0.427555093f, -0.903989293f,
+   -0.382683432f, -0.923879533f,
+   -0.336889853f, -0.941544065f,
+   -0.290284677f, -0.956940336f,
+   -0.242980180f, -0.970031253f,
+   -0.195090322f, -0.980785280f,
+   -0.146730474f, -0.989176510f,
+   -0.098017140f, -0.995184727f,
+   -0.049067674f, -0.998795456f,
+   -0.000000000f, -1.000000000f,
+    0.049067674f, -0.998795456f,
+    0.098017140f, -0.995184727f,
+    0.146730474f, -0.989176510f,
+    0.195090322f, -0.980785280f,
+    0.242980180f, -0.970031253f,
+    0.290284677f, -0.956940336f,
+    0.336889853f, -0.941544065f,
+    0.382683432f, -0.923879533f,
+    0.427555093f, -0.903989293f,
+    0.471396737f, -0.881921264f,
+    0.514102744f, -0.857728610f,
+    0.555570233f, -0.831469612f,
+    0.595699304f, -0.803207531f,
+    0.634393284f, -0.773010453f,
+    0.671558955f, -0.740951125f,
+    0.707106781f, -0.707106781f,
+    0.740951125f, -0.671558955f,
+    0.773010453f, -0.634393284f,
+    0.803207531f, -0.595699304f,
+    0.831469612f, -0.555570233f,
+    0.857728610f, -0.514102744f,
+    0.881921264f, -0.471396737f,
+    0.903989293f, -0.427555093f,
+    0.923879533f, -0.382683432f,
+    0.941544065f, -0.336889853f,
+    0.956940336f, -0.290284677f,
+    0.970031253f, -0.242980180f,
+    0.980785280f, -0.195090322f,
+    0.989176510f, -0.146730474f,
+    0.995184727f, -0.098017140f,
+    0.998795456f, -0.049067674f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for(i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_256[512] = {
+    1.000000000f,  0.000000000f,
+    0.999698819f,  0.024541229f,
+    0.998795456f,  0.049067674f,
+    0.997290457f,  0.073564564f,
+    0.995184727f,  0.098017140f,
+    0.992479535f,  0.122410675f,
+    0.989176510f,  0.146730474f,
+    0.985277642f,  0.170961889f,
+    0.980785280f,  0.195090322f,
+    0.975702130f,  0.219101240f,
+    0.970031253f,  0.242980180f,
+    0.963776066f,  0.266712757f,
+    0.956940336f,  0.290284677f,
+    0.949528181f,  0.313681740f,
+    0.941544065f,  0.336889853f,
+    0.932992799f,  0.359895037f,
+    0.923879533f,  0.382683432f,
+    0.914209756f,  0.405241314f,
+    0.903989293f,  0.427555093f,
+    0.893224301f,  0.449611330f,
+    0.881921264f,  0.471396737f,
+    0.870086991f,  0.492898192f,
+    0.857728610f,  0.514102744f,
+    0.844853565f,  0.534997620f,
+    0.831469612f,  0.555570233f,
+    0.817584813f,  0.575808191f,
+    0.803207531f,  0.595699304f,
+    0.788346428f,  0.615231591f,
+    0.773010453f,  0.634393284f,
+    0.757208847f,  0.653172843f,
+    0.740951125f,  0.671558955f,
+    0.724247083f,  0.689540545f,
+    0.707106781f,  0.707106781f,
+    0.689540545f,  0.724247083f,
+    0.671558955f,  0.740951125f,
+    0.653172843f,  0.757208847f,
+    0.634393284f,  0.773010453f,
+    0.615231591f,  0.788346428f,
+    0.595699304f,  0.803207531f,
+    0.575808191f,  0.817584813f,
+    0.555570233f,  0.831469612f,
+    0.534997620f,  0.844853565f,
+    0.514102744f,  0.857728610f,
+    0.492898192f,  0.870086991f,
+    0.471396737f,  0.881921264f,
+    0.449611330f,  0.893224301f,
+    0.427555093f,  0.903989293f,
+    0.405241314f,  0.914209756f,
+    0.382683432f,  0.923879533f,
+    0.359895037f,  0.932992799f,
+    0.336889853f,  0.941544065f,
+    0.313681740f,  0.949528181f,
+    0.290284677f,  0.956940336f,
+    0.266712757f,  0.963776066f,
+    0.242980180f,  0.970031253f,
+    0.219101240f,  0.975702130f,
+    0.195090322f,  0.980785280f,
+    0.170961889f,  0.985277642f,
+    0.146730474f,  0.989176510f,
+    0.122410675f,  0.992479535f,
+    0.098017140f,  0.995184727f,
+    0.073564564f,  0.997290457f,
+    0.049067674f,  0.998795456f,
+    0.024541229f,  0.999698819f,
+    0.000000000f,  1.000000000f,
+   -0.024541229f,  0.999698819f,
+   -0.049067674f,  0.998795456f,
+   -0.073564564f,  0.997290457f,
+   -0.098017140f,  0.995184727f,
+   -0.122410675f,  0.992479535f,
+   -0.146730474f,  0.989176510f,
+   -0.170961889f,  0.985277642f,
+   -0.195090322f,  0.980785280f,
+   -0.219101240f,  0.975702130f,
+   -0.242980180f,  0.970031253f,
+   -0.266712757f,  0.963776066f,
+   -0.290284677f,  0.956940336f,
+   -0.313681740f,  0.949528181f,
+   -0.336889853f,  0.941544065f,
+   -0.359895037f,  0.932992799f,
+   -0.382683432f,  0.923879533f,
+   -0.405241314f,  0.914209756f,
+   -0.427555093f,  0.903989293f,
+   -0.449611330f,  0.893224301f,
+   -0.471396737f,  0.881921264f,
+   -0.492898192f,  0.870086991f,
+   -0.514102744f,  0.857728610f,
+   -0.534997620f,  0.844853565f,
+   -0.555570233f,  0.831469612f,
+   -0.575808191f,  0.817584813f,
+   -0.595699304f,  0.803207531f,
+   -0.615231591f,  0.788346428f,
+   -0.634393284f,  0.773010453f,
+   -0.653172843f,  0.757208847f,
+   -0.671558955f,  0.740951125f,
+   -0.689540545f,  0.724247083f,
+   -0.707106781f,  0.707106781f,
+   -0.724247083f,  0.689540545f,
+   -0.740951125f,  0.671558955f,
+   -0.757208847f,  0.653172843f,
+   -0.773010453f,  0.634393284f,
+   -0.788346428f,  0.615231591f,
+   -0.803207531f,  0.595699304f,
+   -0.817584813f,  0.575808191f,
+   -0.831469612f,  0.555570233f,
+   -0.844853565f,  0.534997620f,
+   -0.857728610f,  0.514102744f,
+   -0.870086991f,  0.492898192f,
+   -0.881921264f,  0.471396737f,
+   -0.893224301f,  0.449611330f,
+   -0.903989293f,  0.427555093f,
+   -0.914209756f,  0.405241314f,
+   -0.923879533f,  0.382683432f,
+   -0.932992799f,  0.359895037f,
+   -0.941544065f,  0.336889853f,
+   -0.949528181f,  0.313681740f,
+   -0.956940336f,  0.290284677f,
+   -0.963776066f,  0.266712757f,
+   -0.970031253f,  0.242980180f,
+   -0.975702130f,  0.219101240f,
+   -0.980785280f,  0.195090322f,
+   -0.985277642f,  0.170961889f,
+   -0.989176510f,  0.146730474f,
+   -0.992479535f,  0.122410675f,
+   -0.995184727f,  0.098017140f,
+   -0.997290457f,  0.073564564f,
+   -0.998795456f,  0.049067674f,
+   -0.999698819f,  0.024541229f,
+   -1.000000000f,  0.000000000f,
+   -0.999698819f, -0.024541229f,
+   -0.998795456f, -0.049067674f,
+   -0.997290457f, -0.073564564f,
+   -0.995184727f, -0.098017140f,
+   -0.992479535f, -0.122410675f,
+   -0.989176510f, -0.146730474f,
+   -0.985277642f, -0.170961889f,
+   -0.980785280f, -0.195090322f,
+   -0.975702130f, -0.219101240f,
+   -0.970031253f, -0.242980180f,
+   -0.963776066f, -0.266712757f,
+   -0.956940336f, -0.290284677f,
+   -0.949528181f, -0.313681740f,
+   -0.941544065f, -0.336889853f,
+   -0.932992799f, -0.359895037f,
+   -0.923879533f, -0.382683432f,
+   -0.914209756f, -0.405241314f,
+   -0.903989293f, -0.427555093f,
+   -0.893224301f, -0.449611330f,
+   -0.881921264f, -0.471396737f,
+   -0.870086991f, -0.492898192f,
+   -0.857728610f, -0.514102744f,
+   -0.844853565f, -0.534997620f,
+   -0.831469612f, -0.555570233f,
+   -0.817584813f, -0.575808191f,
+   -0.803207531f, -0.595699304f,
+   -0.788346428f, -0.615231591f,
+   -0.773010453f, -0.634393284f,
+   -0.757208847f, -0.653172843f,
+   -0.740951125f, -0.671558955f,
+   -0.724247083f, -0.689540545f,
+   -0.707106781f, -0.707106781f,
+   -0.689540545f, -0.724247083f,
+   -0.671558955f, -0.740951125f,
+   -0.653172843f, -0.757208847f,
+   -0.634393284f, -0.773010453f,
+   -0.615231591f, -0.788346428f,
+   -0.595699304f, -0.803207531f,
+   -0.575808191f, -0.817584813f,
+   -0.555570233f, -0.831469612f,
+   -0.534997620f, -0.844853565f,
+   -0.514102744f, -0.857728610f,
+   -0.492898192f, -0.870086991f,
+   -0.471396737f, -0.881921264f,
+   -0.449611330f, -0.893224301f,
+   -0.427555093f, -0.903989293f,
+   -0.405241314f, -0.914209756f,
+   -0.382683432f, -0.923879533f,
+   -0.359895037f, -0.932992799f,
+   -0.336889853f, -0.941544065f,
+   -0.313681740f, -0.949528181f,
+   -0.290284677f, -0.956940336f,
+   -0.266712757f, -0.963776066f,
+   -0.242980180f, -0.970031253f,
+   -0.219101240f, -0.975702130f,
+   -0.195090322f, -0.980785280f,
+   -0.170961889f, -0.985277642f,
+   -0.146730474f, -0.989176510f,
+   -0.122410675f, -0.992479535f,
+   -0.098017140f, -0.995184727f,
+   -0.073564564f, -0.997290457f,
+   -0.049067674f, -0.998795456f,
+   -0.024541229f, -0.999698819f,
+   -0.000000000f, -1.000000000f,
+    0.024541229f, -0.999698819f,
+    0.049067674f, -0.998795456f,
+    0.073564564f, -0.997290457f,
+    0.098017140f, -0.995184727f,
+    0.122410675f, -0.992479535f,
+    0.146730474f, -0.989176510f,
+    0.170961889f, -0.985277642f,
+    0.195090322f, -0.980785280f,
+    0.219101240f, -0.975702130f,
+    0.242980180f, -0.970031253f,
+    0.266712757f, -0.963776066f,
+    0.290284677f, -0.956940336f,
+    0.313681740f, -0.949528181f,
+    0.336889853f, -0.941544065f,
+    0.359895037f, -0.932992799f,
+    0.382683432f, -0.923879533f,
+    0.405241314f, -0.914209756f,
+    0.427555093f, -0.903989293f,
+    0.449611330f, -0.893224301f,
+    0.471396737f, -0.881921264f,
+    0.492898192f, -0.870086991f,
+    0.514102744f, -0.857728610f,
+    0.534997620f, -0.844853565f,
+    0.555570233f, -0.831469612f,
+    0.575808191f, -0.817584813f,
+    0.595699304f, -0.803207531f,
+    0.615231591f, -0.788346428f,
+    0.634393284f, -0.773010453f,
+    0.653172843f, -0.757208847f,
+    0.671558955f, -0.740951125f,
+    0.689540545f, -0.724247083f,
+    0.707106781f, -0.707106781f,
+    0.724247083f, -0.689540545f,
+    0.740951125f, -0.671558955f,
+    0.757208847f, -0.653172843f,
+    0.773010453f, -0.634393284f,
+    0.788346428f, -0.615231591f,
+    0.803207531f, -0.595699304f,
+    0.817584813f, -0.575808191f,
+    0.831469612f, -0.555570233f,
+    0.844853565f, -0.534997620f,
+    0.857728610f, -0.514102744f,
+    0.870086991f, -0.492898192f,
+    0.881921264f, -0.471396737f,
+    0.893224301f, -0.449611330f,
+    0.903989293f, -0.427555093f,
+    0.914209756f, -0.405241314f,
+    0.923879533f, -0.382683432f,
+    0.932992799f, -0.359895037f,
+    0.941544065f, -0.336889853f,
+    0.949528181f, -0.313681740f,
+    0.956940336f, -0.290284677f,
+    0.963776066f, -0.266712757f,
+    0.970031253f, -0.242980180f,
+    0.975702130f, -0.219101240f,
+    0.980785280f, -0.195090322f,
+    0.985277642f, -0.170961889f,
+    0.989176510f, -0.146730474f,
+    0.992479535f, -0.122410675f,
+    0.995184727f, -0.098017140f,
+    0.997290457f, -0.073564564f,
+    0.998795456f, -0.049067674f,
+    0.999698819f, -0.024541229f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_512[1024] = {
+    1.000000000f,  0.000000000f,
+    0.999924702f,  0.012271538f,
+    0.999698819f,  0.024541229f,
+    0.999322385f,  0.036807223f,
+    0.998795456f,  0.049067674f,
+    0.998118113f,  0.061320736f,
+    0.997290457f,  0.073564564f,
+    0.996312612f,  0.085797312f,
+    0.995184727f,  0.098017140f,
+    0.993906970f,  0.110222207f,
+    0.992479535f,  0.122410675f,
+    0.990902635f,  0.134580709f,
+    0.989176510f,  0.146730474f,
+    0.987301418f,  0.158858143f,
+    0.985277642f,  0.170961889f,
+    0.983105487f,  0.183039888f,
+    0.980785280f,  0.195090322f,
+    0.978317371f,  0.207111376f,
+    0.975702130f,  0.219101240f,
+    0.972939952f,  0.231058108f,
+    0.970031253f,  0.242980180f,
+    0.966976471f,  0.254865660f,
+    0.963776066f,  0.266712757f,
+    0.960430519f,  0.278519689f,
+    0.956940336f,  0.290284677f,
+    0.953306040f,  0.302005949f,
+    0.949528181f,  0.313681740f,
+    0.945607325f,  0.325310292f,
+    0.941544065f,  0.336889853f,
+    0.937339012f,  0.348418680f,
+    0.932992799f,  0.359895037f,
+    0.928506080f,  0.371317194f,
+    0.923879533f,  0.382683432f,
+    0.919113852f,  0.393992040f,
+    0.914209756f,  0.405241314f,
+    0.909167983f,  0.416429560f,
+    0.903989293f,  0.427555093f,
+    0.898674466f,  0.438616239f,
+    0.893224301f,  0.449611330f,
+    0.887639620f,  0.460538711f,
+    0.881921264f,  0.471396737f,
+    0.876070094f,  0.482183772f,
+    0.870086991f,  0.492898192f,
+    0.863972856f,  0.503538384f,
+    0.857728610f,  0.514102744f,
+    0.851355193f,  0.524589683f,
+    0.844853565f,  0.534997620f,
+    0.838224706f,  0.545324988f,
+    0.831469612f,  0.555570233f,
+    0.824589303f,  0.565731811f,
+    0.817584813f,  0.575808191f,
+    0.810457198f,  0.585797857f,
+    0.803207531f,  0.595699304f,
+    0.795836905f,  0.605511041f,
+    0.788346428f,  0.615231591f,
+    0.780737229f,  0.624859488f,
+    0.773010453f,  0.634393284f,
+    0.765167266f,  0.643831543f,
+    0.757208847f,  0.653172843f,
+    0.749136395f,  0.662415778f,
+    0.740951125f,  0.671558955f,
+    0.732654272f,  0.680600998f,
+    0.724247083f,  0.689540545f,
+    0.715730825f,  0.698376249f,
+    0.707106781f,  0.707106781f,
+    0.698376249f,  0.715730825f,
+    0.689540545f,  0.724247083f,
+    0.680600998f,  0.732654272f,
+    0.671558955f,  0.740951125f,
+    0.662415778f,  0.749136395f,
+    0.653172843f,  0.757208847f,
+    0.643831543f,  0.765167266f,
+    0.634393284f,  0.773010453f,
+    0.624859488f,  0.780737229f,
+    0.615231591f,  0.788346428f,
+    0.605511041f,  0.795836905f,
+    0.595699304f,  0.803207531f,
+    0.585797857f,  0.810457198f,
+    0.575808191f,  0.817584813f,
+    0.565731811f,  0.824589303f,
+    0.555570233f,  0.831469612f,
+    0.545324988f,  0.838224706f,
+    0.534997620f,  0.844853565f,
+    0.524589683f,  0.851355193f,
+    0.514102744f,  0.857728610f,
+    0.503538384f,  0.863972856f,
+    0.492898192f,  0.870086991f,
+    0.482183772f,  0.876070094f,
+    0.471396737f,  0.881921264f,
+    0.460538711f,  0.887639620f,
+    0.449611330f,  0.893224301f,
+    0.438616239f,  0.898674466f,
+    0.427555093f,  0.903989293f,
+    0.416429560f,  0.909167983f,
+    0.405241314f,  0.914209756f,
+    0.393992040f,  0.919113852f,
+    0.382683432f,  0.923879533f,
+    0.371317194f,  0.928506080f,
+    0.359895037f,  0.932992799f,
+    0.348418680f,  0.937339012f,
+    0.336889853f,  0.941544065f,
+    0.325310292f,  0.945607325f,
+    0.313681740f,  0.949528181f,
+    0.302005949f,  0.953306040f,
+    0.290284677f,  0.956940336f,
+    0.278519689f,  0.960430519f,
+    0.266712757f,  0.963776066f,
+    0.254865660f,  0.966976471f,
+    0.242980180f,  0.970031253f,
+    0.231058108f,  0.972939952f,
+    0.219101240f,  0.975702130f,
+    0.207111376f,  0.978317371f,
+    0.195090322f,  0.980785280f,
+    0.183039888f,  0.983105487f,
+    0.170961889f,  0.985277642f,
+    0.158858143f,  0.987301418f,
+    0.146730474f,  0.989176510f,
+    0.134580709f,  0.990902635f,
+    0.122410675f,  0.992479535f,
+    0.110222207f,  0.993906970f,
+    0.098017140f,  0.995184727f,
+    0.085797312f,  0.996312612f,
+    0.073564564f,  0.997290457f,
+    0.061320736f,  0.998118113f,
+    0.049067674f,  0.998795456f,
+    0.036807223f,  0.999322385f,
+    0.024541229f,  0.999698819f,
+    0.012271538f,  0.999924702f,
+    0.000000000f,  1.000000000f,
+   -0.012271538f,  0.999924702f,
+   -0.024541229f,  0.999698819f,
+   -0.036807223f,  0.999322385f,
+   -0.049067674f,  0.998795456f,
+   -0.061320736f,  0.998118113f,
+   -0.073564564f,  0.997290457f,
+   -0.085797312f,  0.996312612f,
+   -0.098017140f,  0.995184727f,
+   -0.110222207f,  0.993906970f,
+   -0.122410675f,  0.992479535f,
+   -0.134580709f,  0.990902635f,
+   -0.146730474f,  0.989176510f,
+   -0.158858143f,  0.987301418f,
+   -0.170961889f,  0.985277642f,
+   -0.183039888f,  0.983105487f,
+   -0.195090322f,  0.980785280f,
+   -0.207111376f,  0.978317371f,
+   -0.219101240f,  0.975702130f,
+   -0.231058108f,  0.972939952f,
+   -0.242980180f,  0.970031253f,
+   -0.254865660f,  0.966976471f,
+   -0.266712757f,  0.963776066f,
+   -0.278519689f,  0.960430519f,
+   -0.290284677f,  0.956940336f,
+   -0.302005949f,  0.953306040f,
+   -0.313681740f,  0.949528181f,
+   -0.325310292f,  0.945607325f,
+   -0.336889853f,  0.941544065f,
+   -0.348418680f,  0.937339012f,
+   -0.359895037f,  0.932992799f,
+   -0.371317194f,  0.928506080f,
+   -0.382683432f,  0.923879533f,
+   -0.393992040f,  0.919113852f,
+   -0.405241314f,  0.914209756f,
+   -0.416429560f,  0.909167983f,
+   -0.427555093f,  0.903989293f,
+   -0.438616239f,  0.898674466f,
+   -0.449611330f,  0.893224301f,
+   -0.460538711f,  0.887639620f,
+   -0.471396737f,  0.881921264f,
+   -0.482183772f,  0.876070094f,
+   -0.492898192f,  0.870086991f,
+   -0.503538384f,  0.863972856f,
+   -0.514102744f,  0.857728610f,
+   -0.524589683f,  0.851355193f,
+   -0.534997620f,  0.844853565f,
+   -0.545324988f,  0.838224706f,
+   -0.555570233f,  0.831469612f,
+   -0.565731811f,  0.824589303f,
+   -0.575808191f,  0.817584813f,
+   -0.585797857f,  0.810457198f,
+   -0.595699304f,  0.803207531f,
+   -0.605511041f,  0.795836905f,
+   -0.615231591f,  0.788346428f,
+   -0.624859488f,  0.780737229f,
+   -0.634393284f,  0.773010453f,
+   -0.643831543f,  0.765167266f,
+   -0.653172843f,  0.757208847f,
+   -0.662415778f,  0.749136395f,
+   -0.671558955f,  0.740951125f,
+   -0.680600998f,  0.732654272f,
+   -0.689540545f,  0.724247083f,
+   -0.698376249f,  0.715730825f,
+   -0.707106781f,  0.707106781f,
+   -0.715730825f,  0.698376249f,
+   -0.724247083f,  0.689540545f,
+   -0.732654272f,  0.680600998f,
+   -0.740951125f,  0.671558955f,
+   -0.749136395f,  0.662415778f,
+   -0.757208847f,  0.653172843f,
+   -0.765167266f,  0.643831543f,
+   -0.773010453f,  0.634393284f,
+   -0.780737229f,  0.624859488f,
+   -0.788346428f,  0.615231591f,
+   -0.795836905f,  0.605511041f,
+   -0.803207531f,  0.595699304f,
+   -0.810457198f,  0.585797857f,
+   -0.817584813f,  0.575808191f,
+   -0.824589303f,  0.565731811f,
+   -0.831469612f,  0.555570233f,
+   -0.838224706f,  0.545324988f,
+   -0.844853565f,  0.534997620f,
+   -0.851355193f,  0.524589683f,
+   -0.857728610f,  0.514102744f,
+   -0.863972856f,  0.503538384f,
+   -0.870086991f,  0.492898192f,
+   -0.876070094f,  0.482183772f,
+   -0.881921264f,  0.471396737f,
+   -0.887639620f,  0.460538711f,
+   -0.893224301f,  0.449611330f,
+   -0.898674466f,  0.438616239f,
+   -0.903989293f,  0.427555093f,
+   -0.909167983f,  0.416429560f,
+   -0.914209756f,  0.405241314f,
+   -0.919113852f,  0.393992040f,
+   -0.923879533f,  0.382683432f,
+   -0.928506080f,  0.371317194f,
+   -0.932992799f,  0.359895037f,
+   -0.937339012f,  0.348418680f,
+   -0.941544065f,  0.336889853f,
+   -0.945607325f,  0.325310292f,
+   -0.949528181f,  0.313681740f,
+   -0.953306040f,  0.302005949f,
+   -0.956940336f,  0.290284677f,
+   -0.960430519f,  0.278519689f,
+   -0.963776066f,  0.266712757f,
+   -0.966976471f,  0.254865660f,
+   -0.970031253f,  0.242980180f,
+   -0.972939952f,  0.231058108f,
+   -0.975702130f,  0.219101240f,
+   -0.978317371f,  0.207111376f,
+   -0.980785280f,  0.195090322f,
+   -0.983105487f,  0.183039888f,
+   -0.985277642f,  0.170961889f,
+   -0.987301418f,  0.158858143f,
+   -0.989176510f,  0.146730474f,
+   -0.990902635f,  0.134580709f,
+   -0.992479535f,  0.122410675f,
+   -0.993906970f,  0.110222207f,
+   -0.995184727f,  0.098017140f,
+   -0.996312612f,  0.085797312f,
+   -0.997290457f,  0.073564564f,
+   -0.998118113f,  0.061320736f,
+   -0.998795456f,  0.049067674f,
+   -0.999322385f,  0.036807223f,
+   -0.999698819f,  0.024541229f,
+   -0.999924702f,  0.012271538f,
+   -1.000000000f,  0.000000000f,
+   -0.999924702f, -0.012271538f,
+   -0.999698819f, -0.024541229f,
+   -0.999322385f, -0.036807223f,
+   -0.998795456f, -0.049067674f,
+   -0.998118113f, -0.061320736f,
+   -0.997290457f, -0.073564564f,
+   -0.996312612f, -0.085797312f,
+   -0.995184727f, -0.098017140f,
+   -0.993906970f, -0.110222207f,
+   -0.992479535f, -0.122410675f,
+   -0.990902635f, -0.134580709f,
+   -0.989176510f, -0.146730474f,
+   -0.987301418f, -0.158858143f,
+   -0.985277642f, -0.170961889f,
+   -0.983105487f, -0.183039888f,
+   -0.980785280f, -0.195090322f,
+   -0.978317371f, -0.207111376f,
+   -0.975702130f, -0.219101240f,
+   -0.972939952f, -0.231058108f,
+   -0.970031253f, -0.242980180f,
+   -0.966976471f, -0.254865660f,
+   -0.963776066f, -0.266712757f,
+   -0.960430519f, -0.278519689f,
+   -0.956940336f, -0.290284677f,
+   -0.953306040f, -0.302005949f,
+   -0.949528181f, -0.313681740f,
+   -0.945607325f, -0.325310292f,
+   -0.941544065f, -0.336889853f,
+   -0.937339012f, -0.348418680f,
+   -0.932992799f, -0.359895037f,
+   -0.928506080f, -0.371317194f,
+   -0.923879533f, -0.382683432f,
+   -0.919113852f, -0.393992040f,
+   -0.914209756f, -0.405241314f,
+   -0.909167983f, -0.416429560f,
+   -0.903989293f, -0.427555093f,
+   -0.898674466f, -0.438616239f,
+   -0.893224301f, -0.449611330f,
+   -0.887639620f, -0.460538711f,
+   -0.881921264f, -0.471396737f,
+   -0.876070094f, -0.482183772f,
+   -0.870086991f, -0.492898192f,
+   -0.863972856f, -0.503538384f,
+   -0.857728610f, -0.514102744f,
+   -0.851355193f, -0.524589683f,
+   -0.844853565f, -0.534997620f,
+   -0.838224706f, -0.545324988f,
+   -0.831469612f, -0.555570233f,
+   -0.824589303f, -0.565731811f,
+   -0.817584813f, -0.575808191f,
+   -0.810457198f, -0.585797857f,
+   -0.803207531f, -0.595699304f,
+   -0.795836905f, -0.605511041f,
+   -0.788346428f, -0.615231591f,
+   -0.780737229f, -0.624859488f,
+   -0.773010453f, -0.634393284f,
+   -0.765167266f, -0.643831543f,
+   -0.757208847f, -0.653172843f,
+   -0.749136395f, -0.662415778f,
+   -0.740951125f, -0.671558955f,
+   -0.732654272f, -0.680600998f,
+   -0.724247083f, -0.689540545f,
+   -0.715730825f, -0.698376249f,
+   -0.707106781f, -0.707106781f,
+   -0.698376249f, -0.715730825f,
+   -0.689540545f, -0.724247083f,
+   -0.680600998f, -0.732654272f,
+   -0.671558955f, -0.740951125f,
+   -0.662415778f, -0.749136395f,
+   -0.653172843f, -0.757208847f,
+   -0.643831543f, -0.765167266f,
+   -0.634393284f, -0.773010453f,
+   -0.624859488f, -0.780737229f,
+   -0.615231591f, -0.788346428f,
+   -0.605511041f, -0.795836905f,
+   -0.595699304f, -0.803207531f,
+   -0.585797857f, -0.810457198f,
+   -0.575808191f, -0.817584813f,
+   -0.565731811f, -0.824589303f,
+   -0.555570233f, -0.831469612f,
+   -0.545324988f, -0.838224706f,
+   -0.534997620f, -0.844853565f,
+   -0.524589683f, -0.851355193f,
+   -0.514102744f, -0.857728610f,
+   -0.503538384f, -0.863972856f,
+   -0.492898192f, -0.870086991f,
+   -0.482183772f, -0.876070094f,
+   -0.471396737f, -0.881921264f,
+   -0.460538711f, -0.887639620f,
+   -0.449611330f, -0.893224301f,
+   -0.438616239f, -0.898674466f,
+   -0.427555093f, -0.903989293f,
+   -0.416429560f, -0.909167983f,
+   -0.405241314f, -0.914209756f,
+   -0.393992040f, -0.919113852f,
+   -0.382683432f, -0.923879533f,
+   -0.371317194f, -0.928506080f,
+   -0.359895037f, -0.932992799f,
+   -0.348418680f, -0.937339012f,
+   -0.336889853f, -0.941544065f,
+   -0.325310292f, -0.945607325f,
+   -0.313681740f, -0.949528181f,
+   -0.302005949f, -0.953306040f,
+   -0.290284677f, -0.956940336f,
+   -0.278519689f, -0.960430519f,
+   -0.266712757f, -0.963776066f,
+   -0.254865660f, -0.966976471f,
+   -0.242980180f, -0.970031253f,
+   -0.231058108f, -0.972939952f,
+   -0.219101240f, -0.975702130f,
+   -0.207111376f, -0.978317371f,
+   -0.195090322f, -0.980785280f,
+   -0.183039888f, -0.983105487f,
+   -0.170961889f, -0.985277642f,
+   -0.158858143f, -0.987301418f,
+   -0.146730474f, -0.989176510f,
+   -0.134580709f, -0.990902635f,
+   -0.122410675f, -0.992479535f,
+   -0.110222207f, -0.993906970f,
+   -0.098017140f, -0.995184727f,
+   -0.085797312f, -0.996312612f,
+   -0.073564564f, -0.997290457f,
+   -0.061320736f, -0.998118113f,
+   -0.049067674f, -0.998795456f,
+   -0.036807223f, -0.999322385f,
+   -0.024541229f, -0.999698819f,
+   -0.012271538f, -0.999924702f,
+   -0.000000000f, -1.000000000f,
+    0.012271538f, -0.999924702f,
+    0.024541229f, -0.999698819f,
+    0.036807223f, -0.999322385f,
+    0.049067674f, -0.998795456f,
+    0.061320736f, -0.998118113f,
+    0.073564564f, -0.997290457f,
+    0.085797312f, -0.996312612f,
+    0.098017140f, -0.995184727f,
+    0.110222207f, -0.993906970f,
+    0.122410675f, -0.992479535f,
+    0.134580709f, -0.990902635f,
+    0.146730474f, -0.989176510f,
+    0.158858143f, -0.987301418f,
+    0.170961889f, -0.985277642f,
+    0.183039888f, -0.983105487f,
+    0.195090322f, -0.980785280f,
+    0.207111376f, -0.978317371f,
+    0.219101240f, -0.975702130f,
+    0.231058108f, -0.972939952f,
+    0.242980180f, -0.970031253f,
+    0.254865660f, -0.966976471f,
+    0.266712757f, -0.963776066f,
+    0.278519689f, -0.960430519f,
+    0.290284677f, -0.956940336f,
+    0.302005949f, -0.953306040f,
+    0.313681740f, -0.949528181f,
+    0.325310292f, -0.945607325f,
+    0.336889853f, -0.941544065f,
+    0.348418680f, -0.937339012f,
+    0.359895037f, -0.932992799f,
+    0.371317194f, -0.928506080f,
+    0.382683432f, -0.923879533f,
+    0.393992040f, -0.919113852f,
+    0.405241314f, -0.914209756f,
+    0.416429560f, -0.909167983f,
+    0.427555093f, -0.903989293f,
+    0.438616239f, -0.898674466f,
+    0.449611330f, -0.893224301f,
+    0.460538711f, -0.887639620f,
+    0.471396737f, -0.881921264f,
+    0.482183772f, -0.876070094f,
+    0.492898192f, -0.870086991f,
+    0.503538384f, -0.863972856f,
+    0.514102744f, -0.857728610f,
+    0.524589683f, -0.851355193f,
+    0.534997620f, -0.844853565f,
+    0.545324988f, -0.838224706f,
+    0.555570233f, -0.831469612f,
+    0.565731811f, -0.824589303f,
+    0.575808191f, -0.817584813f,
+    0.585797857f, -0.810457198f,
+    0.595699304f, -0.803207531f,
+    0.605511041f, -0.795836905f,
+    0.615231591f, -0.788346428f,
+    0.624859488f, -0.780737229f,
+    0.634393284f, -0.773010453f,
+    0.643831543f, -0.765167266f,
+    0.653172843f, -0.757208847f,
+    0.662415778f, -0.749136395f,
+    0.671558955f, -0.740951125f,
+    0.680600998f, -0.732654272f,
+    0.689540545f, -0.724247083f,
+    0.698376249f, -0.715730825f,
+    0.707106781f, -0.707106781f,
+    0.715730825f, -0.698376249f,
+    0.724247083f, -0.689540545f,
+    0.732654272f, -0.680600998f,
+    0.740951125f, -0.671558955f,
+    0.749136395f, -0.662415778f,
+    0.757208847f, -0.653172843f,
+    0.765167266f, -0.643831543f,
+    0.773010453f, -0.634393284f,
+    0.780737229f, -0.624859488f,
+    0.788346428f, -0.615231591f,
+    0.795836905f, -0.605511041f,
+    0.803207531f, -0.595699304f,
+    0.810457198f, -0.585797857f,
+    0.817584813f, -0.575808191f,
+    0.824589303f, -0.565731811f,
+    0.831469612f, -0.555570233f,
+    0.838224706f, -0.545324988f,
+    0.844853565f, -0.534997620f,
+    0.851355193f, -0.524589683f,
+    0.857728610f, -0.514102744f,
+    0.863972856f, -0.503538384f,
+    0.870086991f, -0.492898192f,
+    0.876070094f, -0.482183772f,
+    0.881921264f, -0.471396737f,
+    0.887639620f, -0.460538711f,
+    0.893224301f, -0.449611330f,
+    0.898674466f, -0.438616239f,
+    0.903989293f, -0.427555093f,
+    0.909167983f, -0.416429560f,
+    0.914209756f, -0.405241314f,
+    0.919113852f, -0.393992040f,
+    0.923879533f, -0.382683432f,
+    0.928506080f, -0.371317194f,
+    0.932992799f, -0.359895037f,
+    0.937339012f, -0.348418680f,
+    0.941544065f, -0.336889853f,
+    0.945607325f, -0.325310292f,
+    0.949528181f, -0.313681740f,
+    0.953306040f, -0.302005949f,
+    0.956940336f, -0.290284677f,
+    0.960430519f, -0.278519689f,
+    0.963776066f, -0.266712757f,
+    0.966976471f, -0.254865660f,
+    0.970031253f, -0.242980180f,
+    0.972939952f, -0.231058108f,
+    0.975702130f, -0.219101240f,
+    0.978317371f, -0.207111376f,
+    0.980785280f, -0.195090322f,
+    0.983105487f, -0.183039888f,
+    0.985277642f, -0.170961889f,
+    0.987301418f, -0.158858143f,
+    0.989176510f, -0.146730474f,
+    0.990902635f, -0.134580709f,
+    0.992479535f, -0.122410675f,
+    0.993906970f, -0.110222207f,
+    0.995184727f, -0.098017140f,
+    0.996312612f, -0.085797312f,
+    0.997290457f, -0.073564564f,
+    0.998118113f, -0.061320736f,
+    0.998795456f, -0.049067674f,
+    0.999322385f, -0.036807223f,
+    0.999698819f, -0.024541229f,
+    0.999924702f, -0.012271538f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_1024[2048] = {
+    1.000000000f,  0.000000000f,
+    0.999981175f,  0.006135885f,
+    0.999924702f,  0.012271538f,
+    0.999830582f,  0.018406730f,
+    0.999698819f,  0.024541229f,
+    0.999529418f,  0.030674803f,
+    0.999322385f,  0.036807223f,
+    0.999077728f,  0.042938257f,
+    0.998795456f,  0.049067674f,
+    0.998475581f,  0.055195244f,
+    0.998118113f,  0.061320736f,
+    0.997723067f,  0.067443920f,
+    0.997290457f,  0.073564564f,
+    0.996820299f,  0.079682438f,
+    0.996312612f,  0.085797312f,
+    0.995767414f,  0.091908956f,
+    0.995184727f,  0.098017140f,
+    0.994564571f,  0.104121634f,
+    0.993906970f,  0.110222207f,
+    0.993211949f,  0.116318631f,
+    0.992479535f,  0.122410675f,
+    0.991709754f,  0.128498111f,
+    0.990902635f,  0.134580709f,
+    0.990058210f,  0.140658239f,
+    0.989176510f,  0.146730474f,
+    0.988257568f,  0.152797185f,
+    0.987301418f,  0.158858143f,
+    0.986308097f,  0.164913120f,
+    0.985277642f,  0.170961889f,
+    0.984210092f,  0.177004220f,
+    0.983105487f,  0.183039888f,
+    0.981963869f,  0.189068664f,
+    0.980785280f,  0.195090322f,
+    0.979569766f,  0.201104635f,
+    0.978317371f,  0.207111376f,
+    0.977028143f,  0.213110320f,
+    0.975702130f,  0.219101240f,
+    0.974339383f,  0.225083911f,
+    0.972939952f,  0.231058108f,
+    0.971503891f,  0.237023606f,
+    0.970031253f,  0.242980180f,
+    0.968522094f,  0.248927606f,
+    0.966976471f,  0.254865660f,
+    0.965394442f,  0.260794118f,
+    0.963776066f,  0.266712757f,
+    0.962121404f,  0.272621355f,
+    0.960430519f,  0.278519689f,
+    0.958703475f,  0.284407537f,
+    0.956940336f,  0.290284677f,
+    0.955141168f,  0.296150888f,
+    0.953306040f,  0.302005949f,
+    0.951435021f,  0.307849640f,
+    0.949528181f,  0.313681740f,
+    0.947585591f,  0.319502031f,
+    0.945607325f,  0.325310292f,
+    0.943593458f,  0.331106306f,
+    0.941544065f,  0.336889853f,
+    0.939459224f,  0.342660717f,
+    0.937339012f,  0.348418680f,
+    0.935183510f,  0.354163525f,
+    0.932992799f,  0.359895037f,
+    0.930766961f,  0.365612998f,
+    0.928506080f,  0.371317194f,
+    0.926210242f,  0.377007410f,
+    0.923879533f,  0.382683432f,
+    0.921514039f,  0.388345047f,
+    0.919113852f,  0.393992040f,
+    0.916679060f,  0.399624200f,
+    0.914209756f,  0.405241314f,
+    0.911706032f,  0.410843171f,
+    0.909167983f,  0.416429560f,
+    0.906595705f,  0.422000271f,
+    0.903989293f,  0.427555093f,
+    0.901348847f,  0.433093819f,
+    0.898674466f,  0.438616239f,
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+    0.393992040f, -0.919113852f,
+    0.399624200f, -0.916679060f,
+    0.405241314f, -0.914209756f,
+    0.410843171f, -0.911706032f,
+    0.416429560f, -0.909167983f,
+    0.422000271f, -0.906595705f,
+    0.427555093f, -0.903989293f,
+    0.433093819f, -0.901348847f,
+    0.438616239f, -0.898674466f,
+    0.444122145f, -0.895966250f,
+    0.449611330f, -0.893224301f,
+    0.455083587f, -0.890448723f,
+    0.460538711f, -0.887639620f,
+    0.465976496f, -0.884797098f,
+    0.471396737f, -0.881921264f,
+    0.476799230f, -0.879012226f,
+    0.482183772f, -0.876070094f,
+    0.487550160f, -0.873094978f,
+    0.492898192f, -0.870086991f,
+    0.498227667f, -0.867046246f,
+    0.503538384f, -0.863972856f,
+    0.508830143f, -0.860866939f,
+    0.514102744f, -0.857728610f,
+    0.519355990f, -0.854557988f,
+    0.524589683f, -0.851355193f,
+    0.529803625f, -0.848120345f,
+    0.534997620f, -0.844853565f,
+    0.540171473f, -0.841554977f,
+    0.545324988f, -0.838224706f,
+    0.550457973f, -0.834862875f,
+    0.555570233f, -0.831469612f,
+    0.560661576f, -0.828045045f,
+    0.565731811f, -0.824589303f,
+    0.570780746f, -0.821102515f,
+    0.575808191f, -0.817584813f,
+    0.580813958f, -0.814036330f,
+    0.585797857f, -0.810457198f,
+    0.590759702f, -0.806847554f,
+    0.595699304f, -0.803207531f,
+    0.600616479f, -0.799537269f,
+    0.605511041f, -0.795836905f,
+    0.610382806f, -0.792106577f,
+    0.615231591f, -0.788346428f,
+    0.620057212f, -0.784556597f,
+    0.624859488f, -0.780737229f,
+    0.629638239f, -0.776888466f,
+    0.634393284f, -0.773010453f,
+    0.639124445f, -0.769103338f,
+    0.643831543f, -0.765167266f,
+    0.648514401f, -0.761202385f,
+    0.653172843f, -0.757208847f,
+    0.657806693f, -0.753186799f,
+    0.662415778f, -0.749136395f,
+    0.666999922f, -0.745057785f,
+    0.671558955f, -0.740951125f,
+    0.676092704f, -0.736816569f,
+    0.680600998f, -0.732654272f,
+    0.685083668f, -0.728464390f,
+    0.689540545f, -0.724247083f,
+    0.693971461f, -0.720002508f,
+    0.698376249f, -0.715730825f,
+    0.702754744f, -0.711432196f,
+    0.707106781f, -0.707106781f,
+    0.711432196f, -0.702754744f,
+    0.715730825f, -0.698376249f,
+    0.720002508f, -0.693971461f,
+    0.724247083f, -0.689540545f,
+    0.728464390f, -0.685083668f,
+    0.732654272f, -0.680600998f,
+    0.736816569f, -0.676092704f,
+    0.740951125f, -0.671558955f,
+    0.745057785f, -0.666999922f,
+    0.749136395f, -0.662415778f,
+    0.753186799f, -0.657806693f,
+    0.757208847f, -0.653172843f,
+    0.761202385f, -0.648514401f,
+    0.765167266f, -0.643831543f,
+    0.769103338f, -0.639124445f,
+    0.773010453f, -0.634393284f,
+    0.776888466f, -0.629638239f,
+    0.780737229f, -0.624859488f,
+    0.784556597f, -0.620057212f,
+    0.788346428f, -0.615231591f,
+    0.792106577f, -0.610382806f,
+    0.795836905f, -0.605511041f,
+    0.799537269f, -0.600616479f,
+    0.803207531f, -0.595699304f,
+    0.806847554f, -0.590759702f,
+    0.810457198f, -0.585797857f,
+    0.814036330f, -0.580813958f,
+    0.817584813f, -0.575808191f,
+    0.821102515f, -0.570780746f,
+    0.824589303f, -0.565731811f,
+    0.828045045f, -0.560661576f,
+    0.831469612f, -0.555570233f,
+    0.834862875f, -0.550457973f,
+    0.838224706f, -0.545324988f,
+    0.841554977f, -0.540171473f,
+    0.844853565f, -0.534997620f,
+    0.848120345f, -0.529803625f,
+    0.851355193f, -0.524589683f,
+    0.854557988f, -0.519355990f,
+    0.857728610f, -0.514102744f,
+    0.860866939f, -0.508830143f,
+    0.863972856f, -0.503538384f,
+    0.867046246f, -0.498227667f,
+    0.870086991f, -0.492898192f,
+    0.873094978f, -0.487550160f,
+    0.876070094f, -0.482183772f,
+    0.879012226f, -0.476799230f,
+    0.881921264f, -0.471396737f,
+    0.884797098f, -0.465976496f,
+    0.887639620f, -0.460538711f,
+    0.890448723f, -0.455083587f,
+    0.893224301f, -0.449611330f,
+    0.895966250f, -0.444122145f,
+    0.898674466f, -0.438616239f,
+    0.901348847f, -0.433093819f,
+    0.903989293f, -0.427555093f,
+    0.906595705f, -0.422000271f,
+    0.909167983f, -0.416429560f,
+    0.911706032f, -0.410843171f,
+    0.914209756f, -0.405241314f,
+    0.916679060f, -0.399624200f,
+    0.919113852f, -0.393992040f,
+    0.921514039f, -0.388345047f,
+    0.923879533f, -0.382683432f,
+    0.926210242f, -0.377007410f,
+    0.928506080f, -0.371317194f,
+    0.930766961f, -0.365612998f,
+    0.932992799f, -0.359895037f,
+    0.935183510f, -0.354163525f,
+    0.937339012f, -0.348418680f,
+    0.939459224f, -0.342660717f,
+    0.941544065f, -0.336889853f,
+    0.943593458f, -0.331106306f,
+    0.945607325f, -0.325310292f,
+    0.947585591f, -0.319502031f,
+    0.949528181f, -0.313681740f,
+    0.951435021f, -0.307849640f,
+    0.953306040f, -0.302005949f,
+    0.955141168f, -0.296150888f,
+    0.956940336f, -0.290284677f,
+    0.958703475f, -0.284407537f,
+    0.960430519f, -0.278519689f,
+    0.962121404f, -0.272621355f,
+    0.963776066f, -0.266712757f,
+    0.965394442f, -0.260794118f,
+    0.966976471f, -0.254865660f,
+    0.968522094f, -0.248927606f,
+    0.970031253f, -0.242980180f,
+    0.971503891f, -0.237023606f,
+    0.972939952f, -0.231058108f,
+    0.974339383f, -0.225083911f,
+    0.975702130f, -0.219101240f,
+    0.977028143f, -0.213110320f,
+    0.978317371f, -0.207111376f,
+    0.979569766f, -0.201104635f,
+    0.980785280f, -0.195090322f,
+    0.981963869f, -0.189068664f,
+    0.983105487f, -0.183039888f,
+    0.984210092f, -0.177004220f,
+    0.985277642f, -0.170961889f,
+    0.986308097f, -0.164913120f,
+    0.987301418f, -0.158858143f,
+    0.988257568f, -0.152797185f,
+    0.989176510f, -0.146730474f,
+    0.990058210f, -0.140658239f,
+    0.990902635f, -0.134580709f,
+    0.991709754f, -0.128498111f,
+    0.992479535f, -0.122410675f,
+    0.993211949f, -0.116318631f,
+    0.993906970f, -0.110222207f,
+    0.994564571f, -0.104121634f,
+    0.995184727f, -0.098017140f,
+    0.995767414f, -0.091908956f,
+    0.996312612f, -0.085797312f,
+    0.996820299f, -0.079682438f,
+    0.997290457f, -0.073564564f,
+    0.997723067f, -0.067443920f,
+    0.998118113f, -0.061320736f,
+    0.998475581f, -0.055195244f,
+    0.998795456f, -0.049067674f,
+    0.999077728f, -0.042938257f,
+    0.999322385f, -0.036807223f,
+    0.999529418f, -0.030674803f,
+    0.999698819f, -0.024541229f,
+    0.999830582f, -0.018406730f,
+    0.999924702f, -0.012271538f,
+    0.999981175f, -0.006135885f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_2048[4096] = {
+    1.000000000f,  0.000000000f,
+    0.999995294f,  0.003067957f,
+    0.999981175f,  0.006135885f,
+    0.999957645f,  0.009203755f,
+    0.999924702f,  0.012271538f,
+    0.999882347f,  0.015339206f,
+    0.999830582f,  0.018406730f,
+    0.999769405f,  0.021474080f,
+    0.999698819f,  0.024541229f,
+    0.999618822f,  0.027608146f,
+    0.999529418f,  0.030674803f,
+    0.999430605f,  0.033741172f,
+    0.999322385f,  0.036807223f,
+    0.999204759f,  0.039872928f,
+    0.999077728f,  0.042938257f,
+    0.998941293f,  0.046003182f,
+    0.998795456f,  0.049067674f,
+    0.998640218f,  0.052131705f,
+    0.998475581f,  0.055195244f,
+    0.998301545f,  0.058258265f,
+    0.998118113f,  0.061320736f,
+    0.997925286f,  0.064382631f,
+    0.997723067f,  0.067443920f,
+    0.997511456f,  0.070504573f,
+    0.997290457f,  0.073564564f,
+    0.997060070f,  0.076623861f,
+    0.996820299f,  0.079682438f,
+    0.996571146f,  0.082740265f,
+    0.996312612f,  0.085797312f,
+    0.996044701f,  0.088853553f,
+    0.995767414f,  0.091908956f,
+    0.995480755f,  0.094963495f,
+    0.995184727f,  0.098017140f,
+    0.994879331f,  0.101069863f,
+    0.994564571f,  0.104121634f,
+    0.994240449f,  0.107172425f,
+    0.993906970f,  0.110222207f,
+    0.993564136f,  0.113270952f,
+    0.993211949f,  0.116318631f,
+    0.992850414f,  0.119365215f,
+    0.992479535f,  0.122410675f,
+    0.992099313f,  0.125454983f,
+    0.991709754f,  0.128498111f,
+    0.991310860f,  0.131540029f,
+    0.990902635f,  0.134580709f,
+    0.990485084f,  0.137620122f,
+    0.990058210f,  0.140658239f,
+    0.989622017f,  0.143695033f,
+    0.989176510f,  0.146730474f,
+    0.988721692f,  0.149764535f,
+    0.988257568f,  0.152797185f,
+    0.987784142f,  0.155828398f,
+    0.987301418f,  0.158858143f,
+    0.986809402f,  0.161886394f,
+    0.986308097f,  0.164913120f,
+    0.985797509f,  0.167938295f,
+    0.985277642f,  0.170961889f,
+    0.984748502f,  0.173983873f,
+    0.984210092f,  0.177004220f,
+    0.983662419f,  0.180022901f,
+    0.983105487f,  0.183039888f,
+    0.982539302f,  0.186055152f,
+    0.981963869f,  0.189068664f,
+    0.981379193f,  0.192080397f,
+    0.980785280f,  0.195090322f,
+    0.980182136f,  0.198098411f,
+    0.979569766f,  0.201104635f,
+    0.978948175f,  0.204108966f,
+    0.978317371f,  0.207111376f,
+    0.977677358f,  0.210111837f,
+    0.977028143f,  0.213110320f,
+    0.976369731f,  0.216106797f,
+    0.975702130f,  0.219101240f,
+    0.975025345f,  0.222093621f,
+    0.974339383f,  0.225083911f,
+    0.973644250f,  0.228072083f,
+    0.972939952f,  0.231058108f,
+    0.972226497f,  0.234041959f,
+    0.971503891f,  0.237023606f,
+    0.970772141f,  0.240003022f,
+    0.970031253f,  0.242980180f,
+    0.969281235f,  0.245955050f,
+    0.968522094f,  0.248927606f,
+    0.967753837f,  0.251897818f,
+    0.966976471f,  0.254865660f,
+    0.966190003f,  0.257831102f,
+    0.965394442f,  0.260794118f,
+    0.964589793f,  0.263754679f,
+    0.963776066f,  0.266712757f,
+    0.962953267f,  0.269668326f,
+    0.962121404f,  0.272621355f,
+    0.961280486f,  0.275571819f,
+    0.960430519f,  0.278519689f,
+    0.959571513f,  0.281464938f,
+    0.958703475f,  0.284407537f,
+    0.957826413f,  0.287347460f,
+    0.956940336f,  0.290284677f,
+    0.956045251f,  0.293219163f,
+    0.955141168f,  0.296150888f,
+    0.954228095f,  0.299079826f,
+    0.953306040f,  0.302005949f,
+    0.952375013f,  0.304929230f,
+    0.951435021f,  0.307849640f,
+    0.950486074f,  0.310767153f,
+    0.949528181f,  0.313681740f,
+    0.948561350f,  0.316593376f,
+    0.947585591f,  0.319502031f,
+    0.946600913f,  0.322407679f,
+    0.945607325f,  0.325310292f,
+    0.944604837f,  0.328209844f,
+    0.943593458f,  0.331106306f,
+    0.942573198f,  0.333999651f,
+    0.941544065f,  0.336889853f,
+    0.940506071f,  0.339776884f,
+    0.939459224f,  0.342660717f,
+    0.938403534f,  0.345541325f,
+    0.937339012f,  0.348418680f,
+    0.936265667f,  0.351292756f,
+    0.935183510f,  0.354163525f,
+    0.934092550f,  0.357030961f,
+    0.932992799f,  0.359895037f,
+    0.931884266f,  0.362755724f,
+    0.930766961f,  0.365612998f,
+    0.929640896f,  0.368466830f,
+    0.928506080f,  0.371317194f,
+    0.927362526f,  0.374164063f,
+    0.926210242f,  0.377007410f,
+    0.925049241f,  0.379847209f,
+    0.923879533f,  0.382683432f,
+    0.922701128f,  0.385516054f,
+    0.921514039f,  0.388345047f,
+    0.920318277f,  0.391170384f,
+    0.919113852f,  0.393992040f,
+    0.917900776f,  0.396809987f,
+    0.916679060f,  0.399624200f,
+    0.915448716f,  0.402434651f,
+    0.914209756f,  0.405241314f,
+    0.912962190f,  0.408044163f,
+    0.911706032f,  0.410843171f,
+    0.910441292f,  0.413638312f,
+    0.909167983f,  0.416429560f,
+    0.907886116f,  0.419216888f,
+    0.906595705f,  0.422000271f,
+    0.905296759f,  0.424779681f,
+    0.903989293f,  0.427555093f,
+    0.902673318f,  0.430326481f,
+    0.901348847f,  0.433093819f,
+    0.900015892f,  0.435857080f,
+    0.898674466f,  0.438616239f,
+    0.897324581f,  0.441371269f,
+    0.895966250f,  0.444122145f,
+    0.894599486f,  0.446868840f,
+    0.893224301f,  0.449611330f,
+    0.891840709f,  0.452349587f,
+    0.890448723f,  0.455083587f,
+    0.889048356f,  0.457813304f,
+    0.887639620f,  0.460538711f,
+    0.886222530f,  0.463259784f,
+    0.884797098f,  0.465976496f,
+    0.883363339f,  0.468688822f,
+    0.881921264f,  0.471396737f,
+    0.880470889f,  0.474100215f,
+    0.879012226f,  0.476799230f,
+    0.877545290f,  0.479493758f,
+    0.876070094f,  0.482183772f,
+    0.874586652f,  0.484869248f,
+    0.873094978f,  0.487550160f,
+    0.871595087f,  0.490226483f,
+    0.870086991f,  0.492898192f,
+    0.868570706f,  0.495565262f,
+    0.867046246f,  0.498227667f,
+    0.865513624f,  0.500885383f,
+    0.863972856f,  0.503538384f,
+    0.862423956f,  0.506186645f,
+    0.860866939f,  0.508830143f,
+    0.859301818f,  0.511468850f,
+    0.857728610f,  0.514102744f,
+    0.856147328f,  0.516731799f,
+    0.854557988f,  0.519355990f,
+    0.852960605f,  0.521975293f,
+    0.851355193f,  0.524589683f,
+    0.849741768f,  0.527199135f,
+    0.848120345f,  0.529803625f,
+    0.846490939f,  0.532403128f,
+    0.844853565f,  0.534997620f,
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+    0.495565262f, -0.868570706f,
+    0.498227667f, -0.867046246f,
+    0.500885383f, -0.865513624f,
+    0.503538384f, -0.863972856f,
+    0.506186645f, -0.862423956f,
+    0.508830143f, -0.860866939f,
+    0.511468850f, -0.859301818f,
+    0.514102744f, -0.857728610f,
+    0.516731799f, -0.856147328f,
+    0.519355990f, -0.854557988f,
+    0.521975293f, -0.852960605f,
+    0.524589683f, -0.851355193f,
+    0.527199135f, -0.849741768f,
+    0.529803625f, -0.848120345f,
+    0.532403128f, -0.846490939f,
+    0.534997620f, -0.844853565f,
+    0.537587076f, -0.843208240f,
+    0.540171473f, -0.841554977f,
+    0.542750785f, -0.839893794f,
+    0.545324988f, -0.838224706f,
+    0.547894059f, -0.836547727f,
+    0.550457973f, -0.834862875f,
+    0.553016706f, -0.833170165f,
+    0.555570233f, -0.831469612f,
+    0.558118531f, -0.829761234f,
+    0.560661576f, -0.828045045f,
+    0.563199344f, -0.826321063f,
+    0.565731811f, -0.824589303f,
+    0.568258953f, -0.822849781f,
+    0.570780746f, -0.821102515f,
+    0.573297167f, -0.819347520f,
+    0.575808191f, -0.817584813f,
+    0.578313796f, -0.815814411f,
+    0.580813958f, -0.814036330f,
+    0.583308653f, -0.812250587f,
+    0.585797857f, -0.810457198f,
+    0.588281548f, -0.808656182f,
+    0.590759702f, -0.806847554f,
+    0.593232295f, -0.805031331f,
+    0.595699304f, -0.803207531f,
+    0.598160707f, -0.801376172f,
+    0.600616479f, -0.799537269f,
+    0.603066599f, -0.797690841f,
+    0.605511041f, -0.795836905f,
+    0.607949785f, -0.793975478f,
+    0.610382806f, -0.792106577f,
+    0.612810082f, -0.790230221f,
+    0.615231591f, -0.788346428f,
+    0.617647308f, -0.786455214f,
+    0.620057212f, -0.784556597f,
+    0.622461279f, -0.782650596f,
+    0.624859488f, -0.780737229f,
+    0.627251815f, -0.778816512f,
+    0.629638239f, -0.776888466f,
+    0.632018736f, -0.774953107f,
+    0.634393284f, -0.773010453f,
+    0.636761861f, -0.771060524f,
+    0.639124445f, -0.769103338f,
+    0.641481013f, -0.767138912f,
+    0.643831543f, -0.765167266f,
+    0.646176013f, -0.763188417f,
+    0.648514401f, -0.761202385f,
+    0.650846685f, -0.759209189f,
+    0.653172843f, -0.757208847f,
+    0.655492853f, -0.755201377f,
+    0.657806693f, -0.753186799f,
+    0.660114342f, -0.751165132f,
+    0.662415778f, -0.749136395f,
+    0.664710978f, -0.747100606f,
+    0.666999922f, -0.745057785f,
+    0.669282588f, -0.743007952f,
+    0.671558955f, -0.740951125f,
+    0.673829000f, -0.738887324f,
+    0.676092704f, -0.736816569f,
+    0.678350043f, -0.734738878f,
+    0.680600998f, -0.732654272f,
+    0.682845546f, -0.730562769f,
+    0.685083668f, -0.728464390f,
+    0.687315341f, -0.726359155f,
+    0.689540545f, -0.724247083f,
+    0.691759258f, -0.722128194f,
+    0.693971461f, -0.720002508f,
+    0.696177131f, -0.717870045f,
+    0.698376249f, -0.715730825f,
+    0.700568794f, -0.713584869f,
+    0.702754744f, -0.711432196f,
+    0.704934080f, -0.709272826f,
+    0.707106781f, -0.707106781f,
+    0.709272826f, -0.704934080f,
+    0.711432196f, -0.702754744f,
+    0.713584869f, -0.700568794f,
+    0.715730825f, -0.698376249f,
+    0.717870045f, -0.696177131f,
+    0.720002508f, -0.693971461f,
+    0.722128194f, -0.691759258f,
+    0.724247083f, -0.689540545f,
+    0.726359155f, -0.687315341f,
+    0.728464390f, -0.685083668f,
+    0.730562769f, -0.682845546f,
+    0.732654272f, -0.680600998f,
+    0.734738878f, -0.678350043f,
+    0.736816569f, -0.676092704f,
+    0.738887324f, -0.673829000f,
+    0.740951125f, -0.671558955f,
+    0.743007952f, -0.669282588f,
+    0.745057785f, -0.666999922f,
+    0.747100606f, -0.664710978f,
+    0.749136395f, -0.662415778f,
+    0.751165132f, -0.660114342f,
+    0.753186799f, -0.657806693f,
+    0.755201377f, -0.655492853f,
+    0.757208847f, -0.653172843f,
+    0.759209189f, -0.650846685f,
+    0.761202385f, -0.648514401f,
+    0.763188417f, -0.646176013f,
+    0.765167266f, -0.643831543f,
+    0.767138912f, -0.641481013f,
+    0.769103338f, -0.639124445f,
+    0.771060524f, -0.636761861f,
+    0.773010453f, -0.634393284f,
+    0.774953107f, -0.632018736f,
+    0.776888466f, -0.629638239f,
+    0.778816512f, -0.627251815f,
+    0.780737229f, -0.624859488f,
+    0.782650596f, -0.622461279f,
+    0.784556597f, -0.620057212f,
+    0.786455214f, -0.617647308f,
+    0.788346428f, -0.615231591f,
+    0.790230221f, -0.612810082f,
+    0.792106577f, -0.610382806f,
+    0.793975478f, -0.607949785f,
+    0.795836905f, -0.605511041f,
+    0.797690841f, -0.603066599f,
+    0.799537269f, -0.600616479f,
+    0.801376172f, -0.598160707f,
+    0.803207531f, -0.595699304f,
+    0.805031331f, -0.593232295f,
+    0.806847554f, -0.590759702f,
+    0.808656182f, -0.588281548f,
+    0.810457198f, -0.585797857f,
+    0.812250587f, -0.583308653f,
+    0.814036330f, -0.580813958f,
+    0.815814411f, -0.578313796f,
+    0.817584813f, -0.575808191f,
+    0.819347520f, -0.573297167f,
+    0.821102515f, -0.570780746f,
+    0.822849781f, -0.568258953f,
+    0.824589303f, -0.565731811f,
+    0.826321063f, -0.563199344f,
+    0.828045045f, -0.560661576f,
+    0.829761234f, -0.558118531f,
+    0.831469612f, -0.555570233f,
+    0.833170165f, -0.553016706f,
+    0.834862875f, -0.550457973f,
+    0.836547727f, -0.547894059f,
+    0.838224706f, -0.545324988f,
+    0.839893794f, -0.542750785f,
+    0.841554977f, -0.540171473f,
+    0.843208240f, -0.537587076f,
+    0.844853565f, -0.534997620f,
+    0.846490939f, -0.532403128f,
+    0.848120345f, -0.529803625f,
+    0.849741768f, -0.527199135f,
+    0.851355193f, -0.524589683f,
+    0.852960605f, -0.521975293f,
+    0.854557988f, -0.519355990f,
+    0.856147328f, -0.516731799f,
+    0.857728610f, -0.514102744f,
+    0.859301818f, -0.511468850f,
+    0.860866939f, -0.508830143f,
+    0.862423956f, -0.506186645f,
+    0.863972856f, -0.503538384f,
+    0.865513624f, -0.500885383f,
+    0.867046246f, -0.498227667f,
+    0.868570706f, -0.495565262f,
+    0.870086991f, -0.492898192f,
+    0.871595087f, -0.490226483f,
+    0.873094978f, -0.487550160f,
+    0.874586652f, -0.484869248f,
+    0.876070094f, -0.482183772f,
+    0.877545290f, -0.479493758f,
+    0.879012226f, -0.476799230f,
+    0.880470889f, -0.474100215f,
+    0.881921264f, -0.471396737f,
+    0.883363339f, -0.468688822f,
+    0.884797098f, -0.465976496f,
+    0.886222530f, -0.463259784f,
+    0.887639620f, -0.460538711f,
+    0.889048356f, -0.457813304f,
+    0.890448723f, -0.455083587f,
+    0.891840709f, -0.452349587f,
+    0.893224301f, -0.449611330f,
+    0.894599486f, -0.446868840f,
+    0.895966250f, -0.444122145f,
+    0.897324581f, -0.441371269f,
+    0.898674466f, -0.438616239f,
+    0.900015892f, -0.435857080f,
+    0.901348847f, -0.433093819f,
+    0.902673318f, -0.430326481f,
+    0.903989293f, -0.427555093f,
+    0.905296759f, -0.424779681f,
+    0.906595705f, -0.422000271f,
+    0.907886116f, -0.419216888f,
+    0.909167983f, -0.416429560f,
+    0.910441292f, -0.413638312f,
+    0.911706032f, -0.410843171f,
+    0.912962190f, -0.408044163f,
+    0.914209756f, -0.405241314f,
+    0.915448716f, -0.402434651f,
+    0.916679060f, -0.399624200f,
+    0.917900776f, -0.396809987f,
+    0.919113852f, -0.393992040f,
+    0.920318277f, -0.391170384f,
+    0.921514039f, -0.388345047f,
+    0.922701128f, -0.385516054f,
+    0.923879533f, -0.382683432f,
+    0.925049241f, -0.379847209f,
+    0.926210242f, -0.377007410f,
+    0.927362526f, -0.374164063f,
+    0.928506080f, -0.371317194f,
+    0.929640896f, -0.368466830f,
+    0.930766961f, -0.365612998f,
+    0.931884266f, -0.362755724f,
+    0.932992799f, -0.359895037f,
+    0.934092550f, -0.357030961f,
+    0.935183510f, -0.354163525f,
+    0.936265667f, -0.351292756f,
+    0.937339012f, -0.348418680f,
+    0.938403534f, -0.345541325f,
+    0.939459224f, -0.342660717f,
+    0.940506071f, -0.339776884f,
+    0.941544065f, -0.336889853f,
+    0.942573198f, -0.333999651f,
+    0.943593458f, -0.331106306f,
+    0.944604837f, -0.328209844f,
+    0.945607325f, -0.325310292f,
+    0.946600913f, -0.322407679f,
+    0.947585591f, -0.319502031f,
+    0.948561350f, -0.316593376f,
+    0.949528181f, -0.313681740f,
+    0.950486074f, -0.310767153f,
+    0.951435021f, -0.307849640f,
+    0.952375013f, -0.304929230f,
+    0.953306040f, -0.302005949f,
+    0.954228095f, -0.299079826f,
+    0.955141168f, -0.296150888f,
+    0.956045251f, -0.293219163f,
+    0.956940336f, -0.290284677f,
+    0.957826413f, -0.287347460f,
+    0.958703475f, -0.284407537f,
+    0.959571513f, -0.281464938f,
+    0.960430519f, -0.278519689f,
+    0.961280486f, -0.275571819f,
+    0.962121404f, -0.272621355f,
+    0.962953267f, -0.269668326f,
+    0.963776066f, -0.266712757f,
+    0.964589793f, -0.263754679f,
+    0.965394442f, -0.260794118f,
+    0.966190003f, -0.257831102f,
+    0.966976471f, -0.254865660f,
+    0.967753837f, -0.251897818f,
+    0.968522094f, -0.248927606f,
+    0.969281235f, -0.245955050f,
+    0.970031253f, -0.242980180f,
+    0.970772141f, -0.240003022f,
+    0.971503891f, -0.237023606f,
+    0.972226497f, -0.234041959f,
+    0.972939952f, -0.231058108f,
+    0.973644250f, -0.228072083f,
+    0.974339383f, -0.225083911f,
+    0.975025345f, -0.222093621f,
+    0.975702130f, -0.219101240f,
+    0.976369731f, -0.216106797f,
+    0.977028143f, -0.213110320f,
+    0.977677358f, -0.210111837f,
+    0.978317371f, -0.207111376f,
+    0.978948175f, -0.204108966f,
+    0.979569766f, -0.201104635f,
+    0.980182136f, -0.198098411f,
+    0.980785280f, -0.195090322f,
+    0.981379193f, -0.192080397f,
+    0.981963869f, -0.189068664f,
+    0.982539302f, -0.186055152f,
+    0.983105487f, -0.183039888f,
+    0.983662419f, -0.180022901f,
+    0.984210092f, -0.177004220f,
+    0.984748502f, -0.173983873f,
+    0.985277642f, -0.170961889f,
+    0.985797509f, -0.167938295f,
+    0.986308097f, -0.164913120f,
+    0.986809402f, -0.161886394f,
+    0.987301418f, -0.158858143f,
+    0.987784142f, -0.155828398f,
+    0.988257568f, -0.152797185f,
+    0.988721692f, -0.149764535f,
+    0.989176510f, -0.146730474f,
+    0.989622017f, -0.143695033f,
+    0.990058210f, -0.140658239f,
+    0.990485084f, -0.137620122f,
+    0.990902635f, -0.134580709f,
+    0.991310860f, -0.131540029f,
+    0.991709754f, -0.128498111f,
+    0.992099313f, -0.125454983f,
+    0.992479535f, -0.122410675f,
+    0.992850414f, -0.119365215f,
+    0.993211949f, -0.116318631f,
+    0.993564136f, -0.113270952f,
+    0.993906970f, -0.110222207f,
+    0.994240449f, -0.107172425f,
+    0.994564571f, -0.104121634f,
+    0.994879331f, -0.101069863f,
+    0.995184727f, -0.098017140f,
+    0.995480755f, -0.094963495f,
+    0.995767414f, -0.091908956f,
+    0.996044701f, -0.088853553f,
+    0.996312612f, -0.085797312f,
+    0.996571146f, -0.082740265f,
+    0.996820299f, -0.079682438f,
+    0.997060070f, -0.076623861f,
+    0.997290457f, -0.073564564f,
+    0.997511456f, -0.070504573f,
+    0.997723067f, -0.067443920f,
+    0.997925286f, -0.064382631f,
+    0.998118113f, -0.061320736f,
+    0.998301545f, -0.058258265f,
+    0.998475581f, -0.055195244f,
+    0.998640218f, -0.052131705f,
+    0.998795456f, -0.049067674f,
+    0.998941293f, -0.046003182f,
+    0.999077728f, -0.042938257f,
+    0.999204759f, -0.039872928f,
+    0.999322385f, -0.036807223f,
+    0.999430605f, -0.033741172f,
+    0.999529418f, -0.030674803f,
+    0.999618822f, -0.027608146f,
+    0.999698819f, -0.024541229f,
+    0.999769405f, -0.021474080f,
+    0.999830582f, -0.018406730f,
+    0.999882347f, -0.015339206f,
+    0.999924702f, -0.012271538f,
+    0.999957645f, -0.009203755f,
+    0.999981175f, -0.006135885f,
+    0.999995294f, -0.003067957f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  
for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_4096[8192] = {
+    1.000000000f,  0.000000000f,
+    0.999998823f,  0.001533980f,
+    0.999995294f,  0.003067957f,
+    0.999989411f,  0.004601926f,
+    0.999981175f,  0.006135885f,
+    0.999970586f,  0.007669829f,
+    0.999957645f,  0.009203755f,
+    0.999942350f,  0.010737659f,
+    0.999924702f,  0.012271538f,
+    0.999904701f,  0.013805389f,
+    0.999882347f,  0.015339206f,
+    0.999857641f,  0.016872988f,
+    0.999830582f,  0.018406730f,
+    0.999801170f,  0.019940429f,
+    0.999769405f,  0.021474080f,
+    0.999735288f,  0.023007681f,
+    0.999698819f,  0.024541229f,
+    0.999659997f,  0.026074718f,
+    0.999618822f,  0.027608146f,
+    0.999575296f,  0.029141509f,
+    0.999529418f,  0.030674803f,
+    0.999481187f,  0.032208025f,
+    0.999430605f,  0.033741172f,
+    0.999377670f,  0.035274239f,
+    0.999322385f,  0.036807223f,
+    0.999264747f,  0.038340120f,
+    0.999204759f,  0.039872928f,
+    0.999142419f,  0.041405641f,
+    0.999077728f,  0.042938257f,
+    0.999010686f,  0.044470772f,
+    0.998941293f,  0.046003182f,
+    0.998869550f,  0.047535484f,
+    0.998795456f,  0.049067674f,
+    0.998719012f,  0.050599749f,
+    0.998640218f,  0.052131705f,
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+    0.932992799f, -0.359895037f,
+    0.933543773f, -0.358463421f,
+    0.934092550f, -0.357030961f,
+    0.934639130f, -0.355597662f,
+    0.935183510f, -0.354163525f,
+    0.935725689f, -0.352728556f,
+    0.936265667f, -0.351292756f,
+    0.936803442f, -0.349856130f,
+    0.937339012f, -0.348418680f,
+    0.937872376f, -0.346980411f,
+    0.938403534f, -0.345541325f,
+    0.938932484f, -0.344101426f,
+    0.939459224f, -0.342660717f,
+    0.939983753f, -0.341219202f,
+    0.940506071f, -0.339776884f,
+    0.941026175f, -0.338333767f,
+    0.941544065f, -0.336889853f,
+    0.942059740f, -0.335445147f,
+    0.942573198f, -0.333999651f,
+    0.943084437f, -0.332553370f,
+    0.943593458f, -0.331106306f,
+    0.944100258f, -0.329658463f,
+    0.944604837f, -0.328209844f,
+    0.945107193f, -0.326760452f,
+    0.945607325f, -0.325310292f,
+    0.946105232f, -0.323859367f,
+    0.946600913f, -0.322407679f,
+    0.947094366f, -0.320955232f,
+    0.947585591f, -0.319502031f,
+    0.948074586f, -0.318048077f,
+    0.948561350f, -0.316593376f,
+    0.949045882f, -0.315137929f,
+    0.949528181f, -0.313681740f,
+    0.950008245f, -0.312224814f,
+    0.950486074f, -0.310767153f,
+    0.950961666f, -0.309308760f,
+    0.951435021f, -0.307849640f,
+    0.951906137f, -0.306389795f,
+    0.952375013f, -0.304929230f,
+    0.952841648f, -0.303467947f,
+    0.953306040f, -0.302005949f,
+    0.953768190f, -0.300543241f,
+    0.954228095f, -0.299079826f,
+    0.954685755f, -0.297615707f,
+    0.955141168f, -0.296150888f,
+    0.955594334f, -0.294685372f,
+    0.956045251f, -0.293219163f,
+    0.956493919f, -0.291752263f,
+    0.956940336f, -0.290284677f,
+    0.957384501f, -0.288816408f,
+    0.957826413f, -0.287347460f,
+    0.958266071f, -0.285877835f,
+    0.958703475f, -0.284407537f,
+    0.959138622f, -0.282936570f,
+    0.959571513f, -0.281464938f,
+    0.960002146f, -0.279992643f,
+    0.960430519f, -0.278519689f,
+    0.960856633f, -0.277046080f,
+    0.961280486f, -0.275571819f,
+    0.961702077f, -0.274096910f,
+    0.962121404f, -0.272621355f,
+    0.962538468f, -0.271145160f,
+    0.962953267f, -0.269668326f,
+    0.963365800f, -0.268190857f,
+    0.963776066f, -0.266712757f,
+    0.964184064f, -0.265234030f,
+    0.964589793f, -0.263754679f,
+    0.964993253f, -0.262274707f,
+    0.965394442f, -0.260794118f,
+    0.965793359f, -0.259312915f,
+    0.966190003f, -0.257831102f,
+    0.966584374f, -0.256348682f,
+    0.966976471f, -0.254865660f,
+    0.967366292f, -0.253382037f,
+    0.967753837f, -0.251897818f,
+    0.968139105f, -0.250413007f,
+    0.968522094f, -0.248927606f,
+    0.968902805f, -0.247441619f,
+    0.969281235f, -0.245955050f,
+    0.969657385f, -0.244467903f,
+    0.970031253f, -0.242980180f,
+    0.970402839f, -0.241491885f,
+    0.970772141f, -0.240003022f,
+    0.971139158f, -0.238513595f,
+    0.971503891f, -0.237023606f,
+    0.971866337f, -0.235533059f,
+    0.972226497f, -0.234041959f,
+    0.972584369f, -0.232550307f,
+    0.972939952f, -0.231058108f,
+    0.973293246f, -0.229565366f,
+    0.973644250f, -0.228072083f,
+    0.973992962f, -0.226578264f,
+    0.974339383f, -0.225083911f,
+    0.974683511f, -0.223589029f,
+    0.975025345f, -0.222093621f,
+    0.975364885f, -0.220597690f,
+    0.975702130f, -0.219101240f,
+    0.976037079f, -0.217604275f,
+    0.976369731f, -0.216106797f,
+    0.976700086f, -0.214608811f,
+    0.977028143f, -0.213110320f,
+    0.977353900f, -0.211611327f,
+    0.977677358f, -0.210111837f,
+    0.977998515f, -0.208611852f,
+    0.978317371f, -0.207111376f,
+    0.978633924f, -0.205610413f,
+    0.978948175f, -0.204108966f,
+    0.979260123f, -0.202607039f,
+    0.979569766f, -0.201104635f,
+    0.979877104f, -0.199601758f,
+    0.980182136f, -0.198098411f,
+    0.980484862f, -0.196594598f,
+    0.980785280f, -0.195090322f,
+    0.981083391f, -0.193585587f,
+    0.981379193f, -0.192080397f,
+    0.981672686f, -0.190574755f,
+    0.981963869f, -0.189068664f,
+    0.982252741f, -0.187562129f,
+    0.982539302f, -0.186055152f,
+    0.982823551f, -0.184547737f,
+    0.983105487f, -0.183039888f,
+    0.983385110f, -0.181531608f,
+    0.983662419f, -0.180022901f,
+    0.983937413f, -0.178513771f,
+    0.984210092f, -0.177004220f,
+    0.984480455f, -0.175494253f,
+    0.984748502f, -0.173983873f,
+    0.985014231f, -0.172473084f,
+    0.985277642f, -0.170961889f,
+    0.985538735f, -0.169450291f,
+    0.985797509f, -0.167938295f,
+    0.986053963f, -0.166425904f,
+    0.986308097f, -0.164913120f,
+    0.986559910f, -0.163399949f,
+    0.986809402f, -0.161886394f,
+    0.987056571f, -0.160372457f,
+    0.987301418f, -0.158858143f,
+    0.987543942f, -0.157343456f,
+    0.987784142f, -0.155828398f,
+    0.988022017f, -0.154312973f,
+    0.988257568f, -0.152797185f,
+    0.988490793f, -0.151281038f,
+    0.988721692f, -0.149764535f,
+    0.988950265f, -0.148247679f,
+    0.989176510f, -0.146730474f,
+    0.989400428f, -0.145212925f,
+    0.989622017f, -0.143695033f,
+    0.989841278f, -0.142176804f,
+    0.990058210f, -0.140658239f,
+    0.990272812f, -0.139139344f,
+    0.990485084f, -0.137620122f,
+    0.990695025f, -0.136100575f,
+    0.990902635f, -0.134580709f,
+    0.991107914f, -0.133060525f,
+    0.991310860f, -0.131540029f,
+    0.991511473f, -0.130019223f,
+    0.991709754f, -0.128498111f,
+    0.991905700f, -0.126976696f,
+    0.992099313f, -0.125454983f,
+    0.992290591f, -0.123932975f,
+    0.992479535f, -0.122410675f,
+    0.992666142f, -0.120888087f,
+    0.992850414f, -0.119365215f,
+    0.993032350f, -0.117842062f,
+    0.993211949f, -0.116318631f,
+    0.993389211f, -0.114794927f,
+    0.993564136f, -0.113270952f,
+    0.993736722f, -0.111746711f,
+    0.993906970f, -0.110222207f,
+    0.994074879f, -0.108697444f,
+    0.994240449f, -0.107172425f,
+    0.994403680f, -0.105647154f,
+    0.994564571f, -0.104121634f,
+    0.994723121f, -0.102595869f,
+    0.994879331f, -0.101069863f,
+    0.995033199f, -0.099543619f,
+    0.995184727f, -0.098017140f,
+    0.995333912f, -0.096490431f,
+    0.995480755f, -0.094963495f,
+    0.995625256f, -0.093436336f,
+    0.995767414f, -0.091908956f,
+    0.995907229f, -0.090381361f,
+    0.996044701f, -0.088853553f,
+    0.996179829f, -0.087325535f,
+    0.996312612f, -0.085797312f,
+    0.996443051f, -0.084268888f,
+    0.996571146f, -0.082740265f,
+    0.996696895f, -0.081211447f,
+    0.996820299f, -0.079682438f,
+    0.996941358f, -0.078153242f,
+    0.997060070f, -0.076623861f,
+    0.997176437f, -0.075094301f,
+    0.997290457f, -0.073564564f,
+    0.997402130f, -0.072034653f,
+    0.997511456f, -0.070504573f,
+    0.997618435f, -0.068974328f,
+    0.997723067f, -0.067443920f,
+    0.997825350f, -0.065913353f,
+    0.997925286f, -0.064382631f,
+    0.998022874f, -0.062851758f,
+    0.998118113f, -0.061320736f,
+    0.998211003f, -0.059789571f,
+    0.998301545f, -0.058258265f,
+    0.998389737f, -0.056726821f,
+    0.998475581f, -0.055195244f,
+    0.998559074f, -0.053663538f,
+    0.998640218f, -0.052131705f,
+    0.998719012f, -0.050599749f,
+    0.998795456f, -0.049067674f,
+    0.998869550f, -0.047535484f,
+    0.998941293f, -0.046003182f,
+    0.999010686f, -0.044470772f,
+    0.999077728f, -0.042938257f,
+    0.999142419f, -0.041405641f,
+    0.999204759f, -0.039872928f,
+    0.999264747f, -0.038340120f,
+    0.999322385f, -0.036807223f,
+    0.999377670f, -0.035274239f,
+    0.999430605f, -0.033741172f,
+    0.999481187f, -0.032208025f,
+    0.999529418f, -0.030674803f,
+    0.999575296f, -0.029141509f,
+    0.999618822f, -0.027608146f,
+    0.999659997f, -0.026074718f,
+    0.999698819f, -0.024541229f,
+    0.999735288f, -0.023007681f,
+    0.999769405f, -0.021474080f,
+    0.999801170f, -0.019940429f,
+    0.999830582f, -0.018406730f,
+    0.999857641f, -0.016872988f,
+    0.999882347f, -0.015339206f,
+    0.999904701f, -0.013805389f,
+    0.999924702f, -0.012271538f,
+    0.999942350f, -0.010737659f,
+    0.999957645f, -0.009203755f,
+    0.999970586f, -0.007669829f,
+    0.999981175f, -0.006135885f,
+    0.999989411f, -0.004601926f,
+    0.999995294f, -0.003067957f,
+    0.999998823f, -0.001533980f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+/**
+  @brief  Q31 Twiddle factors Table
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
 for(i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_16_q31[24] = {
+    (q31_t)0x7FFFFFFF, (q31_t)0x00000000,
+    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+    (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C,
+    (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+    (q31_t)0xA57D8666, (q31_t)0x5A82799A,
+    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+    (q31_t)0x80000000, (q31_t)0x00000000,
+    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2,
+    (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_32_q31[48] = {
+    (q31_t)0x7FFFFFFF, (q31_t)0x00000000,
+    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6,
+    (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
+    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C,
+    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+    (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F,
+    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
+    (q31_t)0xA57D8666, (q31_t)0x5A82799A,
+    (q31_t)0x9592675B, (q31_t)0x471CECE6,
+    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C,
+    (q31_t)0x80000000, (q31_t)0x00000000,
+    (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
+    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2,
+    (q31_t)0x9592675B, (q31_t)0xB8E31319,
+    (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+    (q31_t)0xB8E31319, (q31_t)0x9592675B,
+    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+    (q31_t)0xE70747C3, (q31_t)0x8275A0C0
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_64_q31[96] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7F62368F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7641AF3C,
+	(q31_t)0x30FBC54D, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x62F201AC,
+	(q31_t)0x5133CC94, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x471CECE6,
+	(q31_t)0x6A6D98A4, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x25280C5D,
+	(q31_t)0x7A7D055B, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x00000000,
+	(q31_t)0x7FFFFFFF, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xDAD7F3A2,
+	(q31_t)0x7A7D055B, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xB8E31319,
+	(q31_t)0x6A6D98A4, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0x9D0DFE53,
+	(q31_t)0x5133CC94, (q31_t)0x9592675B, (q31_t)0x471CECE6,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x89BE50C3,
+	(q31_t)0x30FBC54D, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x809DC970,
+	(q31_t)0x0C8BD35E, (q31_t)0x80000000, (q31_t)0x00000000,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8275A0C0,
+	(q31_t)0xE70747C3, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8F1D343A,
+	(q31_t)0xC3A9458F, (q31_t)0x9592675B, (q31_t)0xB8E31319,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA57D8666,
+	(q31_t)0xA57D8666, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xC3A9458F,
+	(q31_t)0x8F1D343A, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE70747C3,
+	(q31_t)0x8275A0C0, (q31_t)0xF3742CA1, (q31_t)0x809DC970
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
for (i = 0; i < 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_128_q31[192] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FD8878D,
+	(q31_t)0x0647D97C, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7D8A5F3F,
+	(q31_t)0x18F8B83C, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x78848413,
+	(q31_t)0x2B1F34EB, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x70E2CBC6,
+	(q31_t)0x3C56BA70, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x66CF811F,
+	(q31_t)0x4C3FDFF3, (q31_t)0x62F201AC, (q31_t)0x5133CC94,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5A82799A,
+	(q31_t)0x5A82799A, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4C3FDFF3,
+	(q31_t)0x66CF811F, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3C56BA70,
+	(q31_t)0x70E2CBC6, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2B1F34EB,
+	(q31_t)0x78848413, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x18F8B83C,
+	(q31_t)0x7D8A5F3F, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0647D97C,
+	(q31_t)0x7FD8878D, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF3742CA1,
+	(q31_t)0x7F62368F, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE0E60684,
+	(q31_t)0x7C29FBEE, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xCF043AB2,
+	(q31_t)0x7641AF3C, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xBE31E19B,
+	(q31_t)0x6DCA0D14, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xAECC336B,
+	(q31_t)0x62F201AC, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA1288376,
+	(q31_t)0x55F5A4D2, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9592675B,
+	(q31_t)0x471CECE6, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8C4A142F,
+	(q31_t)0x36BA2013, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8582FAA4,
+	(q31_t)0x25280C5D, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x8162AA03,
+	(q31_t)0x12C8106E, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80000000,
+	(q31_t)0x00000000, (q31_t)0x80277872, (q31_t)0xF9B82683,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8162AA03,
+	(q31_t)0xED37EF91, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x8582FAA4,
+	(q31_t)0xDAD7F3A2, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8C4A142F,
+	(q31_t)0xC945DFEC, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9592675B,
+	(q31_t)0xB8E31319, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA1288376,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAECC336B,
+	(q31_t)0x9D0DFE53, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBE31E19B,
+	(q31_t)0x9235F2EB, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCF043AB2,
+	(q31_t)0x89BE50C3, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE0E60684,
+	(q31_t)0x83D60411, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF3742CA1,
+	(q31_t)0x809DC970, (q31_t)0xF9B82683, (q31_t)0x80277872
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
+const q31_t twiddleCoef_256_q31[384] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FF62182,
+	(q31_t)0x03242ABF, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F62368F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E1D93E9,
+	(q31_t)0x15E21444, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C29FBEE,
+	(q31_t)0x1F19F97B, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x798A23B1,
+	(q31_t)0x2826B928, (q31_t)0x78848413, (q31_t)0x2B1F34EB,
+	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x7641AF3C,
+	(q31_t)0x30FBC54D, (q31_t)0x7504D345, (q31_t)0x33DEF287,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x72552C84,
+	(q31_t)0x398CDD32, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
+	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6DCA0D14,
+	(q31_t)0x41CE1E64, (q31_t)0x6C242960, (q31_t)0x447ACD50,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x68A69E81,
+	(q31_t)0x49B41533, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,
+	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x62F201AC,
+	(q31_t)0x5133CC94, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5CB420DF,
+	(q31_t)0x5842DD54, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x55F5A4D2,
+	(q31_t)0x5ED77C89, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4EBFE8A4,
+	(q31_t)0x64E88926, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,
+	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x471CECE6,
+	(q31_t)0x6A6D98A4, (q31_t)0x447ACD50, (q31_t)0x6C242960,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3F1749B7,
+	(q31_t)0x6F5F02B1, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x36BA2013,
+	(q31_t)0x73B5EBD0, (q31_t)0x33DEF287, (q31_t)0x7504D345,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2E110A62,
+	(q31_t)0x776C4EDB, (q31_t)0x2B1F34EB, (q31_t)0x78848413,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x25280C5D,
+	(q31_t)0x7A7D055B, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1C0B826A,
+	(q31_t)0x7CE3CEB1, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x12C8106E,
+	(q31_t)0x7E9D55FC, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x096A9049,
+	(q31_t)0x7FA736B4, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x00000000,
+	(q31_t)0x7FFFFFFF, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF6956FB6,
+	(q31_t)0x7FA736B4, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xED37EF91,
+	(q31_t)0x7E9D55FC, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE3F47D95,
+	(q31_t)0x7CE3CEB1, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDAD7F3A2,
+	(q31_t)0x7A7D055B, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD1EEF59E,
+	(q31_t)0x776C4EDB, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xC945DFEC,
+	(q31_t)0x73B5EBD0, (q31_t)0xC67322CD, (q31_t)0x72552C84,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC0E8B648,
+	(q31_t)0x6F5F02B1, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xB8E31319,
+	(q31_t)0x6A6D98A4, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB140175B,
+	(q31_t)0x64E88926, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAA0A5B2D,
+	(q31_t)0x5ED77C89, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA34BDF20,
+	(q31_t)0x5842DD54, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9D0DFE53,
+	(q31_t)0x5133CC94, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9759617E,
+	(q31_t)0x49B41533, (q31_t)0x9592675B, (q31_t)0x471CECE6,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9235F2EB,
+	(q31_t)0x41CE1E64, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8DAAD37B,
+	(q31_t)0x398CDD32, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x89BE50C3,
+	(q31_t)0x30FBC54D, (q31_t)0x8893B124, (q31_t)0x2E110A62,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8675DC4E,
+	(q31_t)0x2826B928, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x83D60411,
+	(q31_t)0x1F19F97B, (q31_t)0x831C314E, (q31_t)0x1C0B826A,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x81E26C16,
+	(q31_t)0x15E21444, (q31_t)0x8162AA03, (q31_t)0x12C8106E,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x809DC970,
+	(q31_t)0x0C8BD35E, (q31_t)0x8058C94C, (q31_t)0x096A9049,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8009DE7D,
+	(q31_t)0x03242ABF, (q31_t)0x80000000, (q31_t)0x00000000,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80277872,
+	(q31_t)0xF9B82683, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80F66E3C,
+	(q31_t)0xF054D8D4, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x8275A0C0,
+	(q31_t)0xE70747C3, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x84A2FC62,
+	(q31_t)0xDDDC5B3A, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x877B7BEC,
+	(q31_t)0xD4E0CB14, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCC210D78, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8F1D343A,
+	(q31_t)0xC3A9458F, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x93DBD69F,
+	(q31_t)0xBB8532AF, (q31_t)0x9592675B, (q31_t)0xB8E31319,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x99307EE0,
+	(q31_t)0xB3C0200C, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9F13C7D0,
+	(q31_t)0xAC64D510, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA57D8666,
+	(q31_t)0xA57D8666, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAC64D510,
+	(q31_t)0x9F13C7D0, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB3C0200C,
+	(q31_t)0x99307EE0, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBB8532AF,
+	(q31_t)0x93DBD69F, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC3A9458F,
+	(q31_t)0x8F1D343A, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCC210D78,
+	(q31_t)0x8AFB2CBA, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD4E0CB14,
+	(q31_t)0x877B7BEC, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDDDC5B3A,
+	(q31_t)0x84A2FC62, (q31_t)0xE0E60684, (q31_t)0x83D60411,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE70747C3,
+	(q31_t)0x8275A0C0, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF054D8D4,
+	(q31_t)0x80F66E3C, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF9B82683,
+	(q31_t)0x80277872, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
+const q31_t twiddleCoef_512_q31[768] = {
+    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFD885A,
+	(q31_t)0x01921D1F, (q31_t)0x7FF62182, (q31_t)0x03242ABF,
+	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FD8878D,
+	(q31_t)0x0647D97C, (q31_t)0x7FC25596, (q31_t)0x07D95B9E,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F872BF3,
+	(q31_t)0x0AFB6805, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
+	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F0991C3,
+	(q31_t)0x0FAB272B, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E5FE493,
+	(q31_t)0x145576B1, (q31_t)0x7E1D93E9, (q31_t)0x15E21444,
+	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7D8A5F3F,
+	(q31_t)0x18F8B83C, (q31_t)0x7D3980EC, (q31_t)0x1A82A025,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C894BDD,
+	(q31_t)0x1D934FE5, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
+	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B5D039D,
+	(q31_t)0x2223A4C5, (q31_t)0x7AEF6323, (q31_t)0x23A6887E,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A05EEAD,
+	(q31_t)0x26A82185, (q31_t)0x798A23B1, (q31_t)0x2826B928,
+	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78848413,
+	(q31_t)0x2B1F34EB, (q31_t)0x77FAB988, (q31_t)0x2C98FBBA,
+	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x76D94988,
+	(q31_t)0x2F875262, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7504D345,
+	(q31_t)0x33DEF287, (q31_t)0x745F9DD1, (q31_t)0x354D9056,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x7307C3D0,
+	(q31_t)0x382493B0, (q31_t)0x72552C84, (q31_t)0x398CDD32,
+	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x70E2CBC6,
+	(q31_t)0x3C56BA70, (q31_t)0x70231099, (q31_t)0x3DB832A5,
+	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6E96A99C,
+	(q31_t)0x4073F21D, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,
+	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C242960,
+	(q31_t)0x447ACD50, (q31_t)0x6B4AF278, (q31_t)0x45CD358F,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x698C246C,
+	(q31_t)0x4869E664, (q31_t)0x68A69E81, (q31_t)0x49B41533,
+	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x66CF811F,
+	(q31_t)0x4C3FDFF3, (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4,
+	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x63EF328F,
+	(q31_t)0x4FFB654D, (q31_t)0x62F201AC, (q31_t)0x5133CC94,
+	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x60EC3830,
+	(q31_t)0x539B2AEF, (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5DC79D7C,
+	(q31_t)0x571DEEF9, (q31_t)0x5CB420DF, (q31_t)0x5842DD54,
+	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5A82799A,
+	(q31_t)0x5A82799A, (q31_t)0x59646497, (q31_t)0x5B9D1153,
+	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x571DEEF9,
+	(q31_t)0x5DC79D7C, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,
+	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x539B2AEF,
+	(q31_t)0x60EC3830, (q31_t)0x5269126E, (q31_t)0x61F1003E,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4FFB654D,
+	(q31_t)0x63EF328F, (q31_t)0x4EBFE8A4, (q31_t)0x64E88926,
+	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4C3FDFF3,
+	(q31_t)0x66CF811F, (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC,
+	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x4869E664,
+	(q31_t)0x698C246C, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
+	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x447ACD50,
+	(q31_t)0x6C242960, (q31_t)0x4325C135, (q31_t)0x6CF934FB,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4073F21D,
+	(q31_t)0x6E96A99C, (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1,
+	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3C56BA70,
+	(q31_t)0x70E2CBC6, (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x382493B0,
+	(q31_t)0x7307C3D0, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
+	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x33DEF287,
+	(q31_t)0x7504D345, (q31_t)0x326E54C7, (q31_t)0x75A585CF,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2F875262,
+	(q31_t)0x76D94988, (q31_t)0x2E110A62, (q31_t)0x776C4EDB,
+	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2B1F34EB,
+	(q31_t)0x78848413, (q31_t)0x29A3C484, (q31_t)0x7909A92C,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x26A82185,
+	(q31_t)0x7A05EEAD, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
+	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x2223A4C5,
+	(q31_t)0x7B5D039D, (q31_t)0x209F701C, (q31_t)0x7BC5E28F,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1D934FE5,
+	(q31_t)0x7C894BDD, (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1,
+	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x18F8B83C,
+	(q31_t)0x7D8A5F3F, (q31_t)0x176DD9DE, (q31_t)0x7DD6668E,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x145576B1,
+	(q31_t)0x7E5FE493, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
+	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x0FAB272B,
+	(q31_t)0x7F0991C3, (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0AFB6805,
+	(q31_t)0x7F872BF3, (q31_t)0x096A9049, (q31_t)0x7FA736B4,
+	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0647D97C,
+	(q31_t)0x7FD8878D, (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x01921D1F,
+	(q31_t)0x7FFD885A, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFCDBD541,
+	(q31_t)0x7FF62182, (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF826A461,
+	(q31_t)0x7FC25596, (q31_t)0xF6956FB6, (q31_t)0x7FA736B4,
+	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF3742CA1,
+	(q31_t)0x7F62368F, (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEEC60F31,
+	(q31_t)0x7ED5E5C6, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
+	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEA1DEBBB,
+	(q31_t)0x7E1D93E9, (q31_t)0xE8922621, (q31_t)0x7DD6668E,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE57D5FDA,
+	(q31_t)0x7D3980EC, (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1,
+	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE0E60684,
+	(q31_t)0x7C29FBEE, (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDC597781,
+	(q31_t)0x7AEF6323, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
+	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD7D946D7,
+	(q31_t)0x798A23B1, (q31_t)0xD65C3B7B, (q31_t)0x7909A92C,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD3670445,
+	(q31_t)0x77FAB988, (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB,
+	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xCF043AB2,
+	(q31_t)0x7641AF3C, (q31_t)0xCD91AB38, (q31_t)0x75A585CF,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCAB26FA9,
+	(q31_t)0x745F9DD1, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
+	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC67322CD,
+	(q31_t)0x72552C84, (q31_t)0xC50D1148, (q31_t)0x719E2CD2,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC247CD5A,
+	(q31_t)0x70231099, (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1,
+	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBE31E19B,
+	(q31_t)0x6DCA0D14, (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBA32CA70,
+	(q31_t)0x6B4AF278, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
+	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB64BEACC,
+	(q31_t)0x68A69E81, (q31_t)0xB5049368, (q31_t)0x67BD0FBC,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB27E9D3B,
+	(q31_t)0x65DDFBD3, (q31_t)0xB140175B, (q31_t)0x64E88926,
+	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAECC336B,
+	(q31_t)0x62F201AC, (q31_t)0xAD96ED91, (q31_t)0x61F1003E,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAB35F5B5,
+	(q31_t)0x5FE3B38D, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
+	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA7BD22AB,
+	(q31_t)0x5CB420DF, (q31_t)0xA69B9B68, (q31_t)0x5B9D1153,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA462EEAC,
+	(q31_t)0x59646497, (q31_t)0xA34BDF20, (q31_t)0x5842DD54,
+	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1288376,
+	(q31_t)0x55F5A4D2, (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E0EFFC1,
+	(q31_t)0x5269126E, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
+	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9B1776D9,
+	(q31_t)0x4EBFE8A4, (q31_t)0x9A22042C, (q31_t)0x4D8162C4,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9842F043,
+	(q31_t)0x4AFB6C97, (q31_t)0x9759617E, (q31_t)0x49B41533,
+	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x9592675B,
+	(q31_t)0x471CECE6, (q31_t)0x94B50D87, (q31_t)0x45CD358F,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9306CB04,
+	(q31_t)0x4325C135, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
+	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x90A0FD4E,
+	(q31_t)0x3F1749B7, (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8E61D32D,
+	(q31_t)0x3AF2EEB7, (q31_t)0x8DAAD37B, (q31_t)0x398CDD32,
+	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8C4A142F,
+	(q31_t)0x36BA2013, (q31_t)0x8BA0622F, (q31_t)0x354D9056,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8A5A7A30,
+	(q31_t)0x326E54C7, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x8893B124,
+	(q31_t)0x2E110A62, (q31_t)0x88054677, (q31_t)0x2C98FBBA,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x86F656D3,
+	(q31_t)0x29A3C484, (q31_t)0x8675DC4E, (q31_t)0x2826B928,
+	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x8582FAA4,
+	(q31_t)0x25280C5D, (q31_t)0x85109CDC, (q31_t)0x23A6887E,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x843A1D70,
+	(q31_t)0x209F701C, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
+	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x831C314E,
+	(q31_t)0x1C0B826A, (q31_t)0x82C67F13, (q31_t)0x1A82A025,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82299971,
+	(q31_t)0x176DD9DE, (q31_t)0x81E26C16, (q31_t)0x15E21444,
+	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x8162AA03,
+	(q31_t)0x12C8106E, (q31_t)0x812A1A39, (q31_t)0x1139F0CE,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80C7A80A,
+	(q31_t)0x0E1BC2E3, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
+	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x8058C94C,
+	(q31_t)0x096A9049, (q31_t)0x803DAA69, (q31_t)0x07D95B9E,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80163440,
+	(q31_t)0x04B6195D, (q31_t)0x8009DE7D, (q31_t)0x03242ABF,
+	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x80000000,
+	(q31_t)0x00000000, (q31_t)0x800277A5, (q31_t)0xFE6DE2E0,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80163440,
+	(q31_t)0xFB49E6A2, (q31_t)0x80277872, (q31_t)0xF9B82683,
+	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8058C94C,
+	(q31_t)0xF6956FB6, (q31_t)0x8078D40D, (q31_t)0xF50497FA,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80C7A80A,
+	(q31_t)0xF1E43D1C, (q31_t)0x80F66E3C, (q31_t)0xF054D8D4,
+	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8162AA03,
+	(q31_t)0xED37EF91, (q31_t)0x81A01B6C, (q31_t)0xEBAA894E,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82299971,
+	(q31_t)0xE8922621, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
+	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x831C314E,
+	(q31_t)0xE3F47D95, (q31_t)0x8376B422, (q31_t)0xE26CB01A,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x843A1D70,
+	(q31_t)0xDF608FE3, (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A,
+	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x8582FAA4,
+	(q31_t)0xDAD7F3A2, (q31_t)0x85FA1152, (q31_t)0xD957DE7A,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86F656D3,
+	(q31_t)0xD65C3B7B, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
+	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x8893B124,
+	(q31_t)0xD1EEF59E, (q31_t)0x8926B677, (q31_t)0xD078AD9D,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A5A7A30,
+	(q31_t)0xCD91AB38, (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78,
+	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8C4A142F,
+	(q31_t)0xC945DFEC, (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E61D32D,
+	(q31_t)0xC50D1148, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
+	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x90A0FD4E,
+	(q31_t)0xC0E8B648, (q31_t)0x91695663, (q31_t)0xBF8C0DE2,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9306CB04,
+	(q31_t)0xBCDA3ECA, (q31_t)0x93DBD69F, (q31_t)0xBB8532AF,
+	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x9592675B,
+	(q31_t)0xB8E31319, (q31_t)0x9673DB94, (q31_t)0xB796199B,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x9842F043,
+	(q31_t)0xB5049368, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
+	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9B1776D9,
+	(q31_t)0xB140175B, (q31_t)0x9C10CD70, (q31_t)0xB0049AB2,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9E0EFFC1,
+	(q31_t)0xAD96ED91, (q31_t)0x9F13C7D0, (q31_t)0xAC64D510,
+	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA1288376,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA2386283, (q31_t)0xA8E21106,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA462EEAC,
+	(q31_t)0xA69B9B68, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA7BD22AB,
+	(q31_t)0xA34BDF20, (q31_t)0xA8E21106, (q31_t)0xA2386283,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAB35F5B5,
+	(q31_t)0xA01C4C72, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0,
+	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xAECC336B,
+	(q31_t)0x9D0DFE53, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB27E9D3B,
+	(q31_t)0x9A22042C, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
+	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB64BEACC,
+	(q31_t)0x9759617E, (q31_t)0xB796199B, (q31_t)0x9673DB94,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBA32CA70,
+	(q31_t)0x94B50D87, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F,
+	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBE31E19B,
+	(q31_t)0x9235F2EB, (q31_t)0xBF8C0DE2, (q31_t)0x91695663,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC247CD5A,
+	(q31_t)0x8FDCEF66, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
+	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC67322CD,
+	(q31_t)0x8DAAD37B, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCAB26FA9,
+	(q31_t)0x8BA0622F, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCF043AB2,
+	(q31_t)0x89BE50C3, (q31_t)0xD078AD9D, (q31_t)0x8926B677,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD3670445,
+	(q31_t)0x88054677, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
+	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD7D946D7,
+	(q31_t)0x8675DC4E, (q31_t)0xD957DE7A, (q31_t)0x85FA1152,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDC597781,
+	(q31_t)0x85109CDC, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62,
+	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE0E60684,
+	(q31_t)0x83D60411, (q31_t)0xE26CB01A, (q31_t)0x8376B422,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE57D5FDA,
+	(q31_t)0x82C67F13, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
+	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xEA1DEBBB,
+	(q31_t)0x81E26C16, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEEC60F31,
+	(q31_t)0x812A1A39, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C,
+	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF3742CA1,
+	(q31_t)0x809DC970, (q31_t)0xF50497FA, (q31_t)0x8078D40D,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF826A461,
+	(q31_t)0x803DAA69, (q31_t)0xF9B82683, (q31_t)0x80277872,
+	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFCDBD541,
+	(q31_t)0x8009DE7D, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
+const q31_t twiddleCoef_1024_q31[1536] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFF6216,
+	(q31_t)0x00C90F88, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,
+	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF62182,
+	(q31_t)0x03242ABF, (q31_t)0x7FF09477, (q31_t)0x03ED26E6,
+	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE1C76B,
+	(q31_t)0x057F0034, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
+	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC25596,
+	(q31_t)0x07D95B9E, (q31_t)0x7FB563B2, (q31_t)0x08A2009A,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F97CEBC,
+	(q31_t)0x0A3308BC, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805,
+	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F62368F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92,
+	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2191B4,
+	(q31_t)0x0EE38765, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
+	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7ED5E5C6,
+	(q31_t)0x1139F0CE, (q31_t)0x7EBA3A39, (q31_t)0x120116D4,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E7F3956,
+	(q31_t)0x138EDBB0, (q31_t)0x7E5FE493, (q31_t)0x145576B1,
+	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E1D93E9,
+	(q31_t)0x15E21444, (q31_t)0x7DFA98A7, (q31_t)0x16A81305,
+	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DB0FDF7,
+	(q31_t)0x183366E8, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+	(q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D3980EC,
+	(q31_t)0x1A82A025, (q31_t)0x7D0F4218, (q31_t)0x1B4732EF,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CB72724,
+	(q31_t)0x1CCF8CB3, (q31_t)0x7C894BDD, (q31_t)0x1D934FE5,
+	(q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C29FBEE,
+	(q31_t)0x1F19F97B, (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A,
+	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B920B89,
+	(q31_t)0x2161B39F, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,
+	(q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7AEF6323,
+	(q31_t)0x23A6887E, (q31_t)0x7AB6CBA3, (q31_t)0x24677757,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A4210D8,
+	(q31_t)0x25E845B5, (q31_t)0x7A05EEAD, (q31_t)0x26A82185,
+	(q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x798A23B1,
+	(q31_t)0x2826B928, (q31_t)0x794A7C11, (q31_t)0x28E5714A,
+	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78C7ABA1,
+	(q31_t)0x2A61B101, (q31_t)0x78848413, (q31_t)0x2B1F34EB,
+	(q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x77FAB988,
+	(q31_t)0x2C98FBBA, (q31_t)0x77B417DF, (q31_t)0x2D553AFB,
+	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x77235F2D,
+	(q31_t)0x2ECC681E, (q31_t)0x76D94988, (q31_t)0x2F875262,
+	(q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x7641AF3C,
+	(q31_t)0x30FBC54D, (q31_t)0x75F42C0A, (q31_t)0x31B54A5D,
+	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7555BD4B,
+	(q31_t)0x3326E2C2, (q31_t)0x7504D345, (q31_t)0x33DEF287,
+	(q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x745F9DD1,
+	(q31_t)0x354D9056, (q31_t)0x740B53FA, (q31_t)0x36041AD9,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x735F6626,
+	(q31_t)0x376F9E46, (q31_t)0x7307C3D0, (q31_t)0x382493B0,
+	(q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x72552C84,
+	(q31_t)0x398CDD32, (q31_t)0x71FA3948, (q31_t)0x3A402DD1,
+	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x71410804,
+	(q31_t)0x3BA51E29, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
+	(q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x70231099,
+	(q31_t)0x3DB832A5, (q31_t)0x6FC19385, (q31_t)0x3E680B2C,
+	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6EFB5F12,
+	(q31_t)0x3FC5EC97, (q31_t)0x6E96A99C, (q31_t)0x4073F21D,
+	(q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6DCA0D14,
+	(q31_t)0x41CE1E64, (q31_t)0x6D6227FA, (q31_t)0x427A41D0,
+	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C8F351C,
+	(q31_t)0x43D09AEC, (q31_t)0x6C242960, (q31_t)0x447ACD50,
+	(q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B4AF278,
+	(q31_t)0x45CD358F, (q31_t)0x6ADCC964, (q31_t)0x46756827,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x69FD614A,
+	(q31_t)0x47C3C22E, (q31_t)0x698C246C, (q31_t)0x4869E664,
+	(q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68A69E81,
+	(q31_t)0x49B41533, (q31_t)0x683257AA, (q31_t)0x4A581C9D,
+	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x6746C7D7,
+	(q31_t)0x4B9E038F, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,
+	(q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x65DDFBD3,
+	(q31_t)0x4D8162C4, (q31_t)0x6563BF92, (q31_t)0x4E210617,
+	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x646C59BF,
+	(q31_t)0x4F5E08E3, (q31_t)0x63EF328F, (q31_t)0x4FFB654D,
+	(q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x62F201AC,
+	(q31_t)0x5133CC94, (q31_t)0x6271FA69, (q31_t)0x51CED46E,
+	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x616F146B,
+	(q31_t)0x53028517, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,
+	(q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x5FE3B38D,
+	(q31_t)0x54CA0A4A, (q31_t)0x5F5E0DB3, (q31_t)0x556040E2,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5E50015D,
+	(q31_t)0x568A34A9, (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9,
+	(q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5CB420DF,
+	(q31_t)0x5842DD54, (q31_t)0x5C290ACC, (q31_t)0x58D40E8C,
+	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B1035CF,
+	(q31_t)0x59F3DE12, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+	(q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59646497,
+	(q31_t)0x5B9D1153, (q31_t)0x58D40E8C, (q31_t)0x5C290ACC,
+	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x57B0D256,
+	(q31_t)0x5D3E5236, (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C,
+	(q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x55F5A4D2,
+	(q31_t)0x5ED77C89, (q31_t)0x556040E2, (q31_t)0x5F5E0DB3,
+	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x5433027D,
+	(q31_t)0x60686CCE, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,
+	(q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x5269126E,
+	(q31_t)0x61F1003E, (q31_t)0x51CED46E, (q31_t)0x6271FA69,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x5097FC5E,
+	(q31_t)0x637114CC, (q31_t)0x4FFB654D, (q31_t)0x63EF328F,
+	(q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4EBFE8A4,
+	(q31_t)0x64E88926, (q31_t)0x4E210617, (q31_t)0x6563BF92,
+	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4CE10034,
+	(q31_t)0x66573CBB, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,
+	(q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4AFB6C97,
+	(q31_t)0x67BD0FBC, (q31_t)0x4A581C9D, (q31_t)0x683257AA,
+	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x490F57EE,
+	(q31_t)0x6919E320, (q31_t)0x4869E664, (q31_t)0x698C246C,
+	(q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x471CECE6,
+	(q31_t)0x6A6D98A4, (q31_t)0x46756827, (q31_t)0x6ADCC964,
+	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x452456BC,
+	(q31_t)0x6BB812D0, (q31_t)0x447ACD50, (q31_t)0x6C242960,
+	(q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x4325C135,
+	(q31_t)0x6CF934FB, (q31_t)0x427A41D0, (q31_t)0x6D6227FA,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4121589A,
+	(q31_t)0x6E30E349, (q31_t)0x4073F21D, (q31_t)0x6E96A99C,
+	(q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F1749B7,
+	(q31_t)0x6F5F02B1, (q31_t)0x3E680B2C, (q31_t)0x6FC19385,
+	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D07C1D5,
+	(q31_t)0x708378FE, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
+	(q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3AF2EEB7,
+	(q31_t)0x719E2CD2, (q31_t)0x3A402DD1, (q31_t)0x71FA3948,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x38D8FE93,
+	(q31_t)0x72AF05A6, (q31_t)0x382493B0, (q31_t)0x7307C3D0,
+	(q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x36BA2013,
+	(q31_t)0x73B5EBD0, (q31_t)0x36041AD9, (q31_t)0x740B53FA,
+	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x3496824F,
+	(q31_t)0x74B2C883, (q31_t)0x33DEF287, (q31_t)0x7504D345,
+	(q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x326E54C7,
+	(q31_t)0x75A585CF, (q31_t)0x31B54A5D, (q31_t)0x75F42C0A,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x3041C760,
+	(q31_t)0x768E0EA5, (q31_t)0x2F875262, (q31_t)0x76D94988,
+	(q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E110A62,
+	(q31_t)0x776C4EDB, (q31_t)0x2D553AFB, (q31_t)0x77B417DF,
+	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2BDC4E6F,
+	(q31_t)0x78403328, (q31_t)0x2B1F34EB, (q31_t)0x78848413,
+	(q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x29A3C484,
+	(q31_t)0x7909A92C, (q31_t)0x28E5714A, (q31_t)0x794A7C11,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27679DF4,
+	(q31_t)0x79C89F6D, (q31_t)0x26A82185, (q31_t)0x7A05EEAD,
+	(q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x25280C5D,
+	(q31_t)0x7A7D055B, (q31_t)0x24677757, (q31_t)0x7AB6CBA3,
+	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x22E541AE,
+	(q31_t)0x7B26CB4F, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,
+	(q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x209F701C,
+	(q31_t)0x7BC5E28F, (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1E56CA1E,
+	(q31_t)0x7C5A3D4F, (q31_t)0x1D934FE5, (q31_t)0x7C894BDD,
+	(q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C0B826A,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1B4732EF, (q31_t)0x7D0F4218,
+	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x19BDCBF2,
+	(q31_t)0x7D628AC5, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+	(q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x176DD9DE,
+	(q31_t)0x7DD6668E, (q31_t)0x16A81305, (q31_t)0x7DFA98A7,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x151BDF85,
+	(q31_t)0x7E3F57FE, (q31_t)0x145576B1, (q31_t)0x7E5FE493,
+	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x12C8106E,
+	(q31_t)0x7E9D55FC, (q31_t)0x120116D4, (q31_t)0x7EBA3A39,
+	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x1072A047,
+	(q31_t)0x7EF0585F, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
+	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0E1BC2E3,
+	(q31_t)0x7F3857F5, (q31_t)0x0D53DB92, (q31_t)0x7F4DE450,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0BC3AC35,
+	(q31_t)0x7F754E7F, (q31_t)0x0AFB6805, (q31_t)0x7F872BF3,
+	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x096A9049,
+	(q31_t)0x7FA736B4, (q31_t)0x08A2009A, (q31_t)0x7FB563B2,
+	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0710A344,
+	(q31_t)0x7FCE0C3E, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
+	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x04B6195D,
+	(q31_t)0x7FE9CBC0, (q31_t)0x03ED26E6, (q31_t)0x7FF09477,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x025B26D7,
+	(q31_t)0x7FFA72D1, (q31_t)0x01921D1F, (q31_t)0x7FFD885A,
+	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x00000000,
+	(q31_t)0x7FFFFFFF, (q31_t)0xFF36F078, (q31_t)0x7FFF6216,
+	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFDA4D928,
+	(q31_t)0x7FFA72D1, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
+	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFB49E6A2,
+	(q31_t)0x7FE9CBC0, (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF8EF5CBB,
+	(q31_t)0x7FCE0C3E, (q31_t)0xF826A461, (q31_t)0x7FC25596,
+	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF6956FB6,
+	(q31_t)0x7FA736B4, (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC,
+	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF43C53CA,
+	(q31_t)0x7F754E7F, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
+	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF1E43D1C,
+	(q31_t)0x7F3857F5, (q31_t)0xF11C789A, (q31_t)0x7F2191B4,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEF8D5FB8,
+	(q31_t)0x7EF0585F, (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6,
+	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xED37EF91,
+	(q31_t)0x7E9D55FC, (q31_t)0xEC71244F, (q31_t)0x7E7F3956,
+	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEAE4207A,
+	(q31_t)0x7E3F57FE, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
+	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE8922621,
+	(q31_t)0x7DD6668E, (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE642340D,
+	(q31_t)0x7D628AC5, (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC,
+	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE3F47D95,
+	(q31_t)0x7CE3CEB1, (q31_t)0xE330734C, (q31_t)0x7CB72724,
+	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE1A935E1,
+	(q31_t)0x7C5A3D4F, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
+	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDF608FE3,
+	(q31_t)0x7BC5E28F, (q31_t)0xDE9E4C60, (q31_t)0x7B920B89,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDD1ABE51,
+	(q31_t)0x7B26CB4F, (q31_t)0xDC597781, (q31_t)0x7AEF6323,
+	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDAD7F3A2,
+	(q31_t)0x7A7D055B, (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8,
+	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD898620C,
+	(q31_t)0x79C89F6D, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
+	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD65C3B7B,
+	(q31_t)0x7909A92C, (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD423B190,
+	(q31_t)0x78403328, (q31_t)0xD3670445, (q31_t)0x77FAB988,
+	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD1EEF59E,
+	(q31_t)0x776C4EDB, (q31_t)0xD13397E1, (q31_t)0x77235F2D,
+	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xCFBE389F,
+	(q31_t)0x768E0EA5, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCD91AB38,
+	(q31_t)0x75A585CF, (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCB697DB0,
+	(q31_t)0x74B2C883, (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1,
+	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC945DFEC,
+	(q31_t)0x73B5EBD0, (q31_t)0xC89061BA, (q31_t)0x735F6626,
+	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC727016C,
+	(q31_t)0x72AF05A6, (q31_t)0xC67322CD, (q31_t)0x72552C84,
+	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC50D1148,
+	(q31_t)0x719E2CD2, (q31_t)0xC45AE1D7, (q31_t)0x71410804,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC2F83E2A,
+	(q31_t)0x708378FE, (q31_t)0xC247CD5A, (q31_t)0x70231099,
+	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC0E8B648,
+	(q31_t)0x6F5F02B1, (q31_t)0xC03A1368, (q31_t)0x6EFB5F12,
+	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBEDEA765,
+	(q31_t)0x6E30E349, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
+	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBCDA3ECA,
+	(q31_t)0x6CF934FB, (q31_t)0xBC2F6513, (q31_t)0x6C8F351C,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBADBA943,
+	(q31_t)0x6BB812D0, (q31_t)0xBA32CA70, (q31_t)0x6B4AF278,
+	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB8E31319,
+	(q31_t)0x6A6D98A4, (q31_t)0xB83C3DD1, (q31_t)0x69FD614A,
+	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB6F0A811,
+	(q31_t)0x6919E320, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
+	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB5049368,
+	(q31_t)0x67BD0FBC, (q31_t)0xB461FC70, (q31_t)0x6746C7D7,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB31EFFCB,
+	(q31_t)0x66573CBB, (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3,
+	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB140175B,
+	(q31_t)0x64E88926, (q31_t)0xB0A1F71C, (q31_t)0x646C59BF,
+	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAF6803A1,
+	(q31_t)0x637114CC, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
+	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xAD96ED91,
+	(q31_t)0x61F1003E, (q31_t)0xACFD7AE8, (q31_t)0x616F146B,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xABCCFD82,
+	(q31_t)0x60686CCE, (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D,
+	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA0A5B2D,
+	(q31_t)0x5ED77C89, (q31_t)0xA975CB56, (q31_t)0x5E50015D,
+	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA84F2DA9,
+	(q31_t)0x5D3E5236, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
+	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA69B9B68,
+	(q31_t)0x5B9D1153, (q31_t)0xA60C21ED, (q31_t)0x5B1035CF,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA4EFCA31,
+	(q31_t)0x59F3DE12, (q31_t)0xA462EEAC, (q31_t)0x59646497,
+	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA34BDF20,
+	(q31_t)0x5842DD54, (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256,
+	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1AFFEA2,
+	(q31_t)0x568A34A9, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
+	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA01C4C72,
+	(q31_t)0x54CA0A4A, (q31_t)0x9F979331, (q31_t)0x5433027D,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E90EB94,
+	(q31_t)0x53028517, (q31_t)0x9E0EFFC1, (q31_t)0x5269126E,
+	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D0DFE53,
+	(q31_t)0x5133CC94, (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E,
+	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9B93A640,
+	(q31_t)0x4F5E08E3, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
+	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A22042C,
+	(q31_t)0x4D8162C4, (q31_t)0x99A8C344, (q31_t)0x4CE10034,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x98B93828,
+	(q31_t)0x4B9E038F, (q31_t)0x9842F043, (q31_t)0x4AFB6C97,
+	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x9759617E,
+	(q31_t)0x49B41533, (q31_t)0x96E61CDF, (q31_t)0x490F57EE,
+	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x96029EB5,
+	(q31_t)0x47C3C22E, (q31_t)0x9592675B, (q31_t)0x471CECE6,
+	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x94B50D87,
+	(q31_t)0x45CD358F, (q31_t)0x9447ED2F, (q31_t)0x452456BC,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9370CAE4,
+	(q31_t)0x43D09AEC, (q31_t)0x9306CB04, (q31_t)0x4325C135,
+	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9235F2EB,
+	(q31_t)0x41CE1E64, (q31_t)0x91CF1CB6, (q31_t)0x4121589A,
+	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x9104A0ED,
+	(q31_t)0x3FC5EC97, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
+	(q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x8FDCEF66,
+	(q31_t)0x3DB832A5, (q31_t)0x8F7C8701, (q31_t)0x3D07C1D5,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8EBEF7FB,
+	(q31_t)0x3BA51E29, (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7,
+	(q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DAAD37B,
+	(q31_t)0x398CDD32, (q31_t)0x8D50FA59, (q31_t)0x38D8FE93,
+	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CA099D9,
+	(q31_t)0x376F9E46, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,
+	(q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BA0622F,
+	(q31_t)0x354D9056, (q31_t)0x8B4D377C, (q31_t)0x3496824F,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AAA42B4,
+	(q31_t)0x3326E2C2, (q31_t)0x8A5A7A30, (q31_t)0x326E54C7,
+	(q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89BE50C3,
+	(q31_t)0x30FBC54D, (q31_t)0x8971F15A, (q31_t)0x3041C760,
+	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x88DCA0D3,
+	(q31_t)0x2ECC681E, (q31_t)0x8893B124, (q31_t)0x2E110A62,
+	(q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x88054677,
+	(q31_t)0x2C98FBBA, (q31_t)0x87BFCCD7, (q31_t)0x2BDC4E6F,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8738545E,
+	(q31_t)0x2A61B101, (q31_t)0x86F656D3, (q31_t)0x29A3C484,
+	(q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x8675DC4E,
+	(q31_t)0x2826B928, (q31_t)0x86376092, (q31_t)0x27679DF4,
+	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85BDEF27,
+	(q31_t)0x25E845B5, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
+	(q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x85109CDC,
+	(q31_t)0x23A6887E, (q31_t)0x84D934B0, (q31_t)0x22E541AE,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x846DF476,
+	(q31_t)0x2161B39F, (q31_t)0x843A1D70, (q31_t)0x209F701C,
+	(q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83D60411,
+	(q31_t)0x1F19F97B, (q31_t)0x83A5C2B0, (q31_t)0x1E56CA1E,
+	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x8348D8DB,
+	(q31_t)0x1CCF8CB3, (q31_t)0x831C314E, (q31_t)0x1C0B826A,
+	(q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82C67F13,
+	(q31_t)0x1A82A025, (q31_t)0x829D753A, (q31_t)0x19BDCBF2,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x824F0208,
+	(q31_t)0x183366E8, (q31_t)0x82299971, (q31_t)0x176DD9DE,
+	(q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81E26C16,
+	(q31_t)0x15E21444, (q31_t)0x81C0A801, (q31_t)0x151BDF85,
+	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x8180C6A9,
+	(q31_t)0x138EDBB0, (q31_t)0x8162AA03, (q31_t)0x12C8106E,
+	(q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x812A1A39,
+	(q31_t)0x1139F0CE, (q31_t)0x810FA7A0, (q31_t)0x1072A047,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80DE6E4C,
+	(q31_t)0x0EE38765, (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3,
+	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x809DC970,
+	(q31_t)0x0C8BD35E, (q31_t)0x808AB180, (q31_t)0x0BC3AC35,
+	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80683143,
+	(q31_t)0x0A3308BC, (q31_t)0x8058C94C, (q31_t)0x096A9049,
+	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x803DAA69,
+	(q31_t)0x07D95B9E, (q31_t)0x8031F3C1, (q31_t)0x0710A344,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x801E3894,
+	(q31_t)0x057F0034, (q31_t)0x80163440, (q31_t)0x04B6195D,
+	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x8009DE7D,
+	(q31_t)0x03242ABF, (q31_t)0x80058D2E, (q31_t)0x025B26D7,
+	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x80009DE9,
+	(q31_t)0x00C90F88, (q31_t)0x80000000, (q31_t)0x00000000,
+	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x800277A5,
+	(q31_t)0xFE6DE2E0, (q31_t)0x80058D2E, (q31_t)0xFDA4D928,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800F6B88,
+	(q31_t)0xFC12D919, (q31_t)0x80163440, (q31_t)0xFB49E6A2,
+	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x80277872,
+	(q31_t)0xF9B82683, (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB,
+	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x804A9C4D,
+	(q31_t)0xF75DFF65, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
+	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x8078D40D,
+	(q31_t)0xF50497FA, (q31_t)0x808AB180, (q31_t)0xF43C53CA,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80B21BAF,
+	(q31_t)0xF2AC246D, (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C,
+	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80F66E3C,
+	(q31_t)0xF054D8D4, (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8,
+	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8145C5C6,
+	(q31_t)0xEDFEE92B, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
+	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81A01B6C,
+	(q31_t)0xEBAA894E, (q31_t)0x81C0A801, (q31_t)0xEAE4207A,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82056758,
+	(q31_t)0xE957ECFB, (q31_t)0x82299971, (q31_t)0xE8922621,
+	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x8275A0C0,
+	(q31_t)0xE70747C3, (q31_t)0x829D753A, (q31_t)0xE642340D,
+	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82F0BDE8,
+	(q31_t)0xE4B8CD10, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
+	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x8376B422,
+	(q31_t)0xE26CB01A, (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x840777CF,
+	(q31_t)0xE02323E5, (q31_t)0x843A1D70, (q31_t)0xDF608FE3,
+	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x84A2FC62,
+	(q31_t)0xDDDC5B3A, (q31_t)0x84D934B0, (q31_t)0xDD1ABE51,
+	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x8549345C,
+	(q31_t)0xDB9888A8, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
+	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85FA1152,
+	(q31_t)0xD957DE7A, (q31_t)0x86376092, (q31_t)0xD898620C,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86B583EE,
+	(q31_t)0xD71A8EB5, (q31_t)0x86F656D3, (q31_t)0xD65C3B7B,
+	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x877B7BEC,
+	(q31_t)0xD4E0CB14, (q31_t)0x87BFCCD7, (q31_t)0xD423B190,
+	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x884BE820,
+	(q31_t)0xD2AAC504, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
+	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x8926B677,
+	(q31_t)0xD078AD9D, (q31_t)0x8971F15A, (q31_t)0xCFBE389F,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A0BD3F5,
+	(q31_t)0xCE4AB5A2, (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38,
+	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCC210D78, (q31_t)0x8B4D377C, (q31_t)0xCB697DB0,
+	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BF4AC05,
+	(q31_t)0xC9FBE527, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
+	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CF83C30,
+	(q31_t)0xC7DB6C50, (q31_t)0x8D50FA59, (q31_t)0xC727016C,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E05C6B7,
+	(q31_t)0xC5BFD22E, (q31_t)0x8E61D32D, (q31_t)0xC50D1148,
+	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8F1D343A,
+	(q31_t)0xC3A9458F, (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A,
+	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x903E6C7A,
+	(q31_t)0xC197F4D3, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
+	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x91695663,
+	(q31_t)0xBF8C0DE2, (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x929DD805,
+	(q31_t)0xBD85BE2F, (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA,
+	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x93DBD69F,
+	(q31_t)0xBB8532AF, (q31_t)0x9447ED2F, (q31_t)0xBADBA943,
+	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x9523369B,
+	(q31_t)0xB98A97D8, (q31_t)0x9592675B, (q31_t)0xB8E31319,
+	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x9673DB94,
+	(q31_t)0xB796199B, (q31_t)0x96E61CDF, (q31_t)0xB6F0A811,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x97CDA855,
+	(q31_t)0xB5A7E362, (q31_t)0x9842F043, (q31_t)0xB5049368,
+	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x99307EE0,
+	(q31_t)0xB3C0200C, (q31_t)0x99A8C344, (q31_t)0xB31EFFCB,
+	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A9C406D,
+	(q31_t)0xB1DEF9E8, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
+	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9C10CD70,
+	(q31_t)0xB0049AB2, (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D8E0596,
+	(q31_t)0xAE312B91, (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91,
+	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9F13C7D0,
+	(q31_t)0xAC64D510, (q31_t)0x9F979331, (q31_t)0xABCCFD82,
+	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA0A1F24C,
+	(q31_t)0xAA9FBF1D, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
+	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA2386283,
+	(q31_t)0xA8E21106, (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3D6F533,
+	(q31_t)0xA72BF173, (q31_t)0xA462EEAC, (q31_t)0xA69B9B68,
+	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA57D8666,
+	(q31_t)0xA57D8666, (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31,
+	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA72BF173,
+	(q31_t)0xA3D6F533, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
+	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA8E21106,
+	(q31_t)0xA2386283, (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA9FBF1D,
+	(q31_t)0xA0A1F24C, (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72,
+	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xAC64D510,
+	(q31_t)0x9F13C7D0, (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94,
+	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xAE312B91,
+	(q31_t)0x9D8E0596, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
+	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xB0049AB2,
+	(q31_t)0x9C10CD70, (q31_t)0xB0A1F71C, (q31_t)0x9B93A640,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB1DEF9E8,
+	(q31_t)0x9A9C406D, (q31_t)0xB27E9D3B, (q31_t)0x9A22042C,
+	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB3C0200C,
+	(q31_t)0x99307EE0, (q31_t)0xB461FC70, (q31_t)0x98B93828,
+	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB5A7E362,
+	(q31_t)0x97CDA855, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
+	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB796199B,
+	(q31_t)0x9673DB94, (q31_t)0xB83C3DD1, (q31_t)0x96029EB5,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB98A97D8,
+	(q31_t)0x9523369B, (q31_t)0xBA32CA70, (q31_t)0x94B50D87,
+	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB8532AF,
+	(q31_t)0x93DBD69F, (q31_t)0xBC2F6513, (q31_t)0x9370CAE4,
+	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD85BE2F,
+	(q31_t)0x929DD805, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
+	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF8C0DE2,
+	(q31_t)0x91695663, (q31_t)0xC03A1368, (q31_t)0x9104A0ED,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC197F4D3,
+	(q31_t)0x903E6C7A, (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66,
+	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC3A9458F,
+	(q31_t)0x8F1D343A, (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB,
+	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5BFD22E,
+	(q31_t)0x8E05C6B7, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
+	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7DB6C50,
+	(q31_t)0x8CF83C30, (q31_t)0xC89061BA, (q31_t)0x8CA099D9,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9FBE527,
+	(q31_t)0x8BF4AC05, (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F,
+	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCC210D78,
+	(q31_t)0x8AFB2CBA, (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4,
+	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCE4AB5A2,
+	(q31_t)0x8A0BD3F5, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD078AD9D,
+	(q31_t)0x8926B677, (q31_t)0xD13397E1, (q31_t)0x88DCA0D3,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD2AAC504,
+	(q31_t)0x884BE820, (q31_t)0xD3670445, (q31_t)0x88054677,
+	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD4E0CB14,
+	(q31_t)0x877B7BEC, (q31_t)0xD59E4EFE, (q31_t)0x8738545E,
+	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD71A8EB5,
+	(q31_t)0x86B583EE, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
+	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD957DE7A,
+	(q31_t)0x85FA1152, (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB9888A8,
+	(q31_t)0x8549345C, (q31_t)0xDC597781, (q31_t)0x85109CDC,
+	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDDDC5B3A,
+	(q31_t)0x84A2FC62, (q31_t)0xDE9E4C60, (q31_t)0x846DF476,
+	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE02323E5,
+	(q31_t)0x840777CF, (q31_t)0xE0E60684, (q31_t)0x83D60411,
+	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE26CB01A,
+	(q31_t)0x8376B422, (q31_t)0xE330734C, (q31_t)0x8348D8DB,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4B8CD10,
+	(q31_t)0x82F0BDE8, (q31_t)0xE57D5FDA, (q31_t)0x82C67F13,
+	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE70747C3,
+	(q31_t)0x8275A0C0, (q31_t)0xE7CC9917, (q31_t)0x824F0208,
+	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE957ECFB,
+	(q31_t)0x82056758, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
+	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEBAA894E,
+	(q31_t)0x81A01B6C, (q31_t)0xEC71244F, (q31_t)0x8180C6A9,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEDFEE92B,
+	(q31_t)0x8145C5C6, (q31_t)0xEEC60F31, (q31_t)0x812A1A39,
+	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xF054D8D4,
+	(q31_t)0x80F66E3C, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C,
+	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2AC246D,
+	(q31_t)0x80B21BAF, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
+	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF50497FA,
+	(q31_t)0x8078D40D, (q31_t)0xF5CCF743, (q31_t)0x80683143,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF75DFF65,
+	(q31_t)0x804A9C4D, (q31_t)0xF826A461, (q31_t)0x803DAA69,
+	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9B82683,
+	(q31_t)0x80277872, (q31_t)0xFA80FFCB, (q31_t)0x801E3894,
+	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFC12D919,
+	(q31_t)0x800F6B88, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D,
+	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE6DE2E0,
+	(q31_t)0x800277A5, (q31_t)0xFF36F078, (q31_t)0x80009DE9
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_2048_q31[3072] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFD885,
+	(q31_t)0x006487E3, (q31_t)0x7FFF6216, (q31_t)0x00C90F88,
+	(q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFD885A,
+	(q31_t)0x01921D1F, (q31_t)0x7FFC250F, (q31_t)0x01F6A296,
+	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF871A1,
+	(q31_t)0x02BFA9A4, (q31_t)0x7FF62182, (q31_t)0x03242ABF,
+	(q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF09477,
+	(q31_t)0x03ED26E6, (q31_t)0x7FED5790, (q31_t)0x0451A176,
+	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE5F108,
+	(q31_t)0x051A8E5C, (q31_t)0x7FE1C76B, (q31_t)0x057F0034,
+	(q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FD8878D,
+	(q31_t)0x0647D97C, (q31_t)0x7FD37152, (q31_t)0x06AC406F,
+	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC85853,
+	(q31_t)0x077501BE, (q31_t)0x7FC25596, (q31_t)0x07D95B9E,
+	(q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB563B2,
+	(q31_t)0x08A2009A, (q31_t)0x7FAE7494, (q31_t)0x09064B3A,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F9FAA15,
+	(q31_t)0x09CECF89, (q31_t)0x7F97CEBC, (q31_t)0x0A3308BC,
+	(q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F872BF3,
+	(q31_t)0x0AFB6805, (q31_t)0x7F7E648B, (q31_t)0x0B5F8D9F,
+	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F6BE9D4,
+	(q31_t)0x0C27C389, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
+	(q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F4DE450,
+	(q31_t)0x0D53DB92, (q31_t)0x7F434563, (q31_t)0x0DB7D376,
+	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2D1C0E,
+	(q31_t)0x0E7FA99D, (q31_t)0x7F2191B4, (q31_t)0x0EE38765,
+	(q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0991C3,
+	(q31_t)0x0FAB272B, (q31_t)0x7EFD1C3C, (q31_t)0x100EE8AD,
+	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE34635,
+	(q31_t)0x10D64DBC, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE,
+	(q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EBA3A39,
+	(q31_t)0x120116D4, (q31_t)0x7EABEF2C, (q31_t)0x1264994E,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E8E6EB1,
+	(q31_t)0x132B7BF9, (q31_t)0x7E7F3956, (q31_t)0x138EDBB0,
+	(q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E5FE493,
+	(q31_t)0x145576B1, (q31_t)0x7E4FC53E, (q31_t)0x14B8B17F,
+	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E2E9CDF,
+	(q31_t)0x157F0086, (q31_t)0x7E1D93E9, (q31_t)0x15E21444,
+	(q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7DFA98A7,
+	(q31_t)0x16A81305, (q31_t)0x7DE8A670, (q31_t)0x170AFD8D,
+	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DC3D90D,
+	(q31_t)0x17D0A7BB, (q31_t)0x7DB0FDF7, (q31_t)0x183366E8,
+	(q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D8A5F3F,
+	(q31_t)0x18F8B83C, (q31_t)0x7D769BB5, (q31_t)0x195B49E9,
+	(q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D4E2C7E,
+	(q31_t)0x1A203E1B, (q31_t)0x7D3980EC, (q31_t)0x1A82A025,
+	(q31_t)0x7D24881A, (q31_t)0x1AE4F1D6, (q31_t)0x7D0F4218,
+	(q31_t)0x1B4732EF, (q31_t)0x7CF9AEF0, (q31_t)0x1BA96334,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CCDA168,
+	(q31_t)0x1C6D9053, (q31_t)0x7CB72724, (q31_t)0x1CCF8CB3,
+	(q31_t)0x7CA05FF1, (q31_t)0x1D31774D, (q31_t)0x7C894BDD,
+	(q31_t)0x1D934FE5, (q31_t)0x7C71EAF8, (q31_t)0x1DF5163F,
+	(q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4242F2,
+	(q31_t)0x1EB86B46, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
+	(q31_t)0x7C116853, (q31_t)0x1F7B7480, (q31_t)0x7BF88830,
+	(q31_t)0x1FDCDC1A, (q31_t)0x7BDF5B94, (q31_t)0x203E300D,
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+	(q31_t)0x3EBFBDCC, (q31_t)0x6F906D84, (q31_t)0x3E680B2C,
+	(q31_t)0x6FC19385, (q31_t)0x3E10320D, (q31_t)0x6FF27496,
+	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D600D2B,
+	(q31_t)0x70536771, (q31_t)0x3D07C1D5, (q31_t)0x708378FE,
+	(q31_t)0x3CAF50DA, (q31_t)0x70B34524, (q31_t)0x3C56BA70,
+	(q31_t)0x70E2CBC6, (q31_t)0x3BFDFECD, (q31_t)0x71120CC5,
+	(q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3B4C18BA,
+	(q31_t)0x716FBD68, (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2,
+	(q31_t)0x3A99A057, (q31_t)0x71CC5626, (q31_t)0x3A402DD1,
+	(q31_t)0x71FA3948, (q31_t)0x39E6975D, (q31_t)0x7227D61C,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x3932FF87,
+	(q31_t)0x72823C66, (q31_t)0x38D8FE93, (q31_t)0x72AF05A6,
+	(q31_t)0x387EDA8E, (q31_t)0x72DB8828, (q31_t)0x382493B0,
+	(q31_t)0x7307C3D0, (q31_t)0x37CA2A30, (q31_t)0x7333B883,
+	(q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x3714F02A,
+	(q31_t)0x738ACC9E, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
+	(q31_t)0x365F2E3B, (q31_t)0x73E0C3A3, (q31_t)0x36041AD9,
+	(q31_t)0x740B53FA, (q31_t)0x35A8E624, (q31_t)0x74359CBD,
+	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x34F219A7,
+	(q31_t)0x7489571B, (q31_t)0x3496824F, (q31_t)0x74B2C883,
+	(q31_t)0x343ACA87, (q31_t)0x74DBF1EF, (q31_t)0x33DEF287,
+	(q31_t)0x7504D345, (q31_t)0x3382FA88, (q31_t)0x752D6C6C,
+	(q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x32CAAB6F,
+	(q31_t)0x757DC5CA, (q31_t)0x326E54C7, (q31_t)0x75A585CF,
+	(q31_t)0x3211DF03, (q31_t)0x75CCFD42, (q31_t)0x31B54A5D,
+	(q31_t)0x75F42C0A, (q31_t)0x3158970D, (q31_t)0x761B1211,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x309ED555,
+	(q31_t)0x76680376, (q31_t)0x3041C760, (q31_t)0x768E0EA5,
+	(q31_t)0x2FE49BA6, (q31_t)0x76B3D0B3, (q31_t)0x2F875262,
+	(q31_t)0x76D94988, (q31_t)0x2F29EBCC, (q31_t)0x76FE790E,
+	(q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E6EC792,
+	(q31_t)0x7747FBCE, (q31_t)0x2E110A62, (q31_t)0x776C4EDB,
+	(q31_t)0x2DB330C7, (q31_t)0x7790583D, (q31_t)0x2D553AFB,
+	(q31_t)0x77B417DF, (q31_t)0x2CF72939, (q31_t)0x77D78DAA,
+	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2C3AB2B9,
+	(q31_t)0x781D9B64, (q31_t)0x2BDC4E6F, (q31_t)0x78403328,
+	(q31_t)0x2B7DCF17, (q31_t)0x786280BF, (q31_t)0x2B1F34EB,
+	(q31_t)0x78848413, (q31_t)0x2AC08025, (q31_t)0x78A63D10,
+	(q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x2A02C7B8,
+	(q31_t)0x78E8CFB1, (q31_t)0x29A3C484, (q31_t)0x7909A92C,
+	(q31_t)0x2944A7A2, (q31_t)0x792A37FE, (q31_t)0x28E5714A,
+	(q31_t)0x794A7C11, (q31_t)0x288621B9, (q31_t)0x796A7554,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27C737D2,
+	(q31_t)0x79A98715, (q31_t)0x27679DF4, (q31_t)0x79C89F6D,
+	(q31_t)0x2707EBC6, (q31_t)0x79E76CA6, (q31_t)0x26A82185,
+	(q31_t)0x7A05EEAD, (q31_t)0x26483F6C, (q31_t)0x7A24256E,
+	(q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x2588349D,
+	(q31_t)0x7A5FB0D8, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
+	(q31_t)0x24C7CD32, (q31_t)0x7A9A0E4F, (q31_t)0x24677757,
+	(q31_t)0x7AB6CBA3, (q31_t)0x24070B07, (q31_t)0x7AD33D45,
+	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x2345EFF7,
+	(q31_t)0x7B0B3D2C, (q31_t)0x22E541AE, (q31_t)0x7B26CB4F,
+	(q31_t)0x22847DDF, (q31_t)0x7B420D7A, (q31_t)0x2223A4C5,
+	(q31_t)0x7B5D039D, (q31_t)0x21C2B69C, (q31_t)0x7B77ADA8,
+	(q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x21009C0B,
+	(q31_t)0x7BAC1D31, (q31_t)0x209F701C, (q31_t)0x7BC5E28F,
+	(q31_t)0x203E300D, (q31_t)0x7BDF5B94, (q31_t)0x1FDCDC1A,
+	(q31_t)0x7BF88830, (q31_t)0x1F7B7480, (q31_t)0x7C116853,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1EB86B46,
+	(q31_t)0x7C4242F2, (q31_t)0x1E56CA1E, (q31_t)0x7C5A3D4F,
+	(q31_t)0x1DF5163F, (q31_t)0x7C71EAF8, (q31_t)0x1D934FE5,
+	(q31_t)0x7C894BDD, (q31_t)0x1D31774D, (q31_t)0x7CA05FF1,
+	(q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C6D9053,
+	(q31_t)0x7CCDA168, (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1,
+	(q31_t)0x1BA96334, (q31_t)0x7CF9AEF0, (q31_t)0x1B4732EF,
+	(q31_t)0x7D0F4218, (q31_t)0x1AE4F1D6, (q31_t)0x7D24881A,
+	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x1A203E1B,
+	(q31_t)0x7D4E2C7E, (q31_t)0x19BDCBF2, (q31_t)0x7D628AC5,
+	(q31_t)0x195B49E9, (q31_t)0x7D769BB5, (q31_t)0x18F8B83C,
+	(q31_t)0x7D8A5F3F, (q31_t)0x18961727, (q31_t)0x7D9DD55A,
+	(q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x17D0A7BB,
+	(q31_t)0x7DC3D90D, (q31_t)0x176DD9DE, (q31_t)0x7DD6668E,
+	(q31_t)0x170AFD8D, (q31_t)0x7DE8A670, (q31_t)0x16A81305,
+	(q31_t)0x7DFA98A7, (q31_t)0x16451A83, (q31_t)0x7E0C3D29,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x157F0086,
+	(q31_t)0x7E2E9CDF, (q31_t)0x151BDF85, (q31_t)0x7E3F57FE,
+	(q31_t)0x14B8B17F, (q31_t)0x7E4FC53E, (q31_t)0x145576B1,
+	(q31_t)0x7E5FE493, (q31_t)0x13F22F57, (q31_t)0x7E6FB5F3,
+	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x132B7BF9,
+	(q31_t)0x7E8E6EB1, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
+	(q31_t)0x1264994E, (q31_t)0x7EABEF2C, (q31_t)0x120116D4,
+	(q31_t)0x7EBA3A39, (q31_t)0x119D8940, (q31_t)0x7EC8371A,
+	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x10D64DBC,
+	(q31_t)0x7EE34635, (q31_t)0x1072A047, (q31_t)0x7EF0585F,
+	(q31_t)0x100EE8AD, (q31_t)0x7EFD1C3C, (q31_t)0x0FAB272B,
+	(q31_t)0x7F0991C3, (q31_t)0x0F475BFE, (q31_t)0x7F15B8EE,
+	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0E7FA99D,
+	(q31_t)0x7F2D1C0E, (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5,
+	(q31_t)0x0DB7D376, (q31_t)0x7F434563, (q31_t)0x0D53DB92,
+	(q31_t)0x7F4DE450, (q31_t)0x0CEFDB75, (q31_t)0x7F5834B6,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0C27C389,
+	(q31_t)0x7F6BE9D4, (q31_t)0x0BC3AC35, (q31_t)0x7F754E7F,
+	(q31_t)0x0B5F8D9F, (q31_t)0x7F7E648B, (q31_t)0x0AFB6805,
+	(q31_t)0x7F872BF3, (q31_t)0x0A973BA5, (q31_t)0x7F8FA4AF,
+	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x09CECF89,
+	(q31_t)0x7F9FAA15, (q31_t)0x096A9049, (q31_t)0x7FA736B4,
+	(q31_t)0x09064B3A, (q31_t)0x7FAE7494, (q31_t)0x08A2009A,
+	(q31_t)0x7FB563B2, (q31_t)0x083DB0A7, (q31_t)0x7FBC040A,
+	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x077501BE,
+	(q31_t)0x7FC85853, (q31_t)0x0710A344, (q31_t)0x7FCE0C3E,
+	(q31_t)0x06AC406F, (q31_t)0x7FD37152, (q31_t)0x0647D97C,
+	(q31_t)0x7FD8878D, (q31_t)0x05E36EA9, (q31_t)0x7FDD4EEC,
+	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x051A8E5C,
+	(q31_t)0x7FE5F108, (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0,
+	(q31_t)0x0451A176, (q31_t)0x7FED5790, (q31_t)0x03ED26E6,
+	(q31_t)0x7FF09477, (q31_t)0x0388A9E9, (q31_t)0x7FF38273,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x02BFA9A4,
+	(q31_t)0x7FF871A1, (q31_t)0x025B26D7, (q31_t)0x7FFA72D1,
+	(q31_t)0x01F6A296, (q31_t)0x7FFC250F, (q31_t)0x01921D1F,
+	(q31_t)0x7FFD885A, (q31_t)0x012D96B0, (q31_t)0x7FFE9CB2,
+	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x006487E3,
+	(q31_t)0x7FFFD885, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+	(q31_t)0xFF9B781D, (q31_t)0x7FFFD885, (q31_t)0xFF36F078,
+	(q31_t)0x7FFF6216, (q31_t)0xFED2694F, (q31_t)0x7FFE9CB2,
+	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFE095D69,
+	(q31_t)0x7FFC250F, (q31_t)0xFDA4D928, (q31_t)0x7FFA72D1,
+	(q31_t)0xFD40565B, (q31_t)0x7FF871A1, (q31_t)0xFCDBD541,
+	(q31_t)0x7FF62182, (q31_t)0xFC775616, (q31_t)0x7FF38273,
+	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFBAE5E89,
+	(q31_t)0x7FED5790, (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0,
+	(q31_t)0xFAE571A4, (q31_t)0x7FE5F108, (q31_t)0xFA80FFCB,
+	(q31_t)0x7FE1C76B, (q31_t)0xFA1C9156, (q31_t)0x7FDD4EEC,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF953BF90,
+	(q31_t)0x7FD37152, (q31_t)0xF8EF5CBB, (q31_t)0x7FCE0C3E,
+	(q31_t)0xF88AFE41, (q31_t)0x7FC85853, (q31_t)0xF826A461,
+	(q31_t)0x7FC25596, (q31_t)0xF7C24F58, (q31_t)0x7FBC040A,
+	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF6F9B4C5,
+	(q31_t)0x7FAE7494, (q31_t)0xF6956FB6, (q31_t)0x7FA736B4,
+	(q31_t)0xF6313076, (q31_t)0x7F9FAA15, (q31_t)0xF5CCF743,
+	(q31_t)0x7F97CEBC, (q31_t)0xF568C45A, (q31_t)0x7F8FA4AF,
+	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF4A07260,
+	(q31_t)0x7F7E648B, (q31_t)0xF43C53CA, (q31_t)0x7F754E7F,
+	(q31_t)0xF3D83C76, (q31_t)0x7F6BE9D4, (q31_t)0xF3742CA1,
+	(q31_t)0x7F62368F, (q31_t)0xF310248A, (q31_t)0x7F5834B6,
+	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF2482C89,
+	(q31_t)0x7F434563, (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5,
+	(q31_t)0xF1805662, (q31_t)0x7F2D1C0E, (q31_t)0xF11C789A,
+	(q31_t)0x7F2191B4, (q31_t)0xF0B8A401, (q31_t)0x7F15B8EE,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEFF11752,
+	(q31_t)0x7EFD1C3C, (q31_t)0xEF8D5FB8, (q31_t)0x7EF0585F,
+	(q31_t)0xEF29B243, (q31_t)0x7EE34635, (q31_t)0xEEC60F31,
+	(q31_t)0x7ED5E5C6, (q31_t)0xEE6276BF, (q31_t)0x7EC8371A,
+	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xED9B66B2,
+	(q31_t)0x7EABEF2C, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
+	(q31_t)0xECD48406, (q31_t)0x7E8E6EB1, (q31_t)0xEC71244F,
+	(q31_t)0x7E7F3956, (q31_t)0xEC0DD0A8, (q31_t)0x7E6FB5F3,
+	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEB474E80,
+	(q31_t)0x7E4FC53E, (q31_t)0xEAE4207A, (q31_t)0x7E3F57FE,
+	(q31_t)0xEA80FF79, (q31_t)0x7E2E9CDF, (q31_t)0xEA1DEBBB,
+	(q31_t)0x7E1D93E9, (q31_t)0xE9BAE57C, (q31_t)0x7E0C3D29,
+	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE8F50273,
+	(q31_t)0x7DE8A670, (q31_t)0xE8922621, (q31_t)0x7DD6668E,
+	(q31_t)0xE82F5844, (q31_t)0x7DC3D90D, (q31_t)0xE7CC9917,
+	(q31_t)0x7DB0FDF7, (q31_t)0xE769E8D8, (q31_t)0x7D9DD55A,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE6A4B616,
+	(q31_t)0x7D769BB5, (q31_t)0xE642340D, (q31_t)0x7D628AC5,
+	(q31_t)0xE5DFC1E4, (q31_t)0x7D4E2C7E, (q31_t)0xE57D5FDA,
+	(q31_t)0x7D3980EC, (q31_t)0xE51B0E2A, (q31_t)0x7D24881A,
+	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE4569CCB,
+	(q31_t)0x7CF9AEF0, (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1,
+	(q31_t)0xE3926FAC, (q31_t)0x7CCDA168, (q31_t)0xE330734C,
+	(q31_t)0x7CB72724, (q31_t)0xE2CE88B2, (q31_t)0x7CA05FF1,
+	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE20AE9C1,
+	(q31_t)0x7C71EAF8, (q31_t)0xE1A935E1, (q31_t)0x7C5A3D4F,
+	(q31_t)0xE14794B9, (q31_t)0x7C4242F2, (q31_t)0xE0E60684,
+	(q31_t)0x7C29FBEE, (q31_t)0xE0848B7F, (q31_t)0x7C116853,
+	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDFC1CFF2,
+	(q31_t)0x7BDF5B94, (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F,
+	(q31_t)0xDEFF63F4, (q31_t)0x7BAC1D31, (q31_t)0xDE9E4C60,
+	(q31_t)0x7B920B89, (q31_t)0xDE3D4963, (q31_t)0x7B77ADA8,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDD7B8220,
+	(q31_t)0x7B420D7A, (q31_t)0xDD1ABE51, (q31_t)0x7B26CB4F,
+	(q31_t)0xDCBA1008, (q31_t)0x7B0B3D2C, (q31_t)0xDC597781,
+	(q31_t)0x7AEF6323, (q31_t)0xDBF8F4F8, (q31_t)0x7AD33D45,
+	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDB3832CD,
+	(q31_t)0x7A9A0E4F, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
+	(q31_t)0xDA77CB62, (q31_t)0x7A5FB0D8, (q31_t)0xDA17BA4A,
+	(q31_t)0x7A4210D8, (q31_t)0xD9B7C093, (q31_t)0x7A24256E,
+	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD8F81439,
+	(q31_t)0x79E76CA6, (q31_t)0xD898620C, (q31_t)0x79C89F6D,
+	(q31_t)0xD838C82D, (q31_t)0x79A98715, (q31_t)0xD7D946D7,
+	(q31_t)0x798A23B1, (q31_t)0xD779DE46, (q31_t)0x796A7554,
+	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD6BB585D,
+	(q31_t)0x792A37FE, (q31_t)0xD65C3B7B, (q31_t)0x7909A92C,
+	(q31_t)0xD5FD3847, (q31_t)0x78E8CFB1, (q31_t)0xD59E4EFE,
+	(q31_t)0x78C7ABA1, (q31_t)0xD53F7FDA, (q31_t)0x78A63D10,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD48230E8,
+	(q31_t)0x786280BF, (q31_t)0xD423B190, (q31_t)0x78403328,
+	(q31_t)0xD3C54D46, (q31_t)0x781D9B64, (q31_t)0xD3670445,
+	(q31_t)0x77FAB988, (q31_t)0xD308D6C6, (q31_t)0x77D78DAA,
+	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD24CCF38,
+	(q31_t)0x7790583D, (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB,
+	(q31_t)0xD191386D, (q31_t)0x7747FBCE, (q31_t)0xD13397E1,
+	(q31_t)0x77235F2D, (q31_t)0xD0D61433, (q31_t)0x76FE790E,
+	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xD01B6459,
+	(q31_t)0x76B3D0B3, (q31_t)0xCFBE389F, (q31_t)0x768E0EA5,
+	(q31_t)0xCF612AAA, (q31_t)0x76680376, (q31_t)0xCF043AB2,
+	(q31_t)0x7641AF3C, (q31_t)0xCEA768F2, (q31_t)0x761B1211,
+	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCDEE20FC,
+	(q31_t)0x75CCFD42, (q31_t)0xCD91AB38, (q31_t)0x75A585CF,
+	(q31_t)0xCD355490, (q31_t)0x757DC5CA, (q31_t)0xCCD91D3D,
+	(q31_t)0x7555BD4B, (q31_t)0xCC7D0577, (q31_t)0x752D6C6C,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCBC53578,
+	(q31_t)0x74DBF1EF, (q31_t)0xCB697DB0, (q31_t)0x74B2C883,
+	(q31_t)0xCB0DE658, (q31_t)0x7489571B, (q31_t)0xCAB26FA9,
+	(q31_t)0x745F9DD1, (q31_t)0xCA5719DB, (q31_t)0x74359CBD,
+	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC9A0D1C4,
+	(q31_t)0x73E0C3A3, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
+	(q31_t)0xC8EB0FD6, (q31_t)0x738ACC9E, (q31_t)0xC89061BA,
+	(q31_t)0x735F6626, (q31_t)0xC835D5D0, (q31_t)0x7333B883,
+	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC7812571,
+	(q31_t)0x72DB8828, (q31_t)0xC727016C, (q31_t)0x72AF05A6,
+	(q31_t)0xC6CD0079, (q31_t)0x72823C66, (q31_t)0xC67322CD,
+	(q31_t)0x72552C84, (q31_t)0xC61968A2, (q31_t)0x7227D61C,
+	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC5665FA8,
+	(q31_t)0x71CC5626, (q31_t)0xC50D1148, (q31_t)0x719E2CD2,
+	(q31_t)0xC4B3E746, (q31_t)0x716FBD68, (q31_t)0xC45AE1D7,
+	(q31_t)0x71410804, (q31_t)0xC4020132, (q31_t)0x71120CC5,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC350AF25,
+	(q31_t)0x70B34524, (q31_t)0xC2F83E2A, (q31_t)0x708378FE,
+	(q31_t)0xC29FF2D4, (q31_t)0x70536771, (q31_t)0xC247CD5A,
+	(q31_t)0x70231099, (q31_t)0xC1EFCDF2, (q31_t)0x6FF27496,
+	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC1404233,
+	(q31_t)0x6F906D84, (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1,
+	(q31_t)0xC0915147, (q31_t)0x6F2D532C, (q31_t)0xC03A1368,
+	(q31_t)0x6EFB5F12, (q31_t)0xBFE2FCDF, (q31_t)0x6EC92682,
+	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBF3546A8,
+	(q31_t)0x6E63E87F, (q31_t)0xBEDEA765, (q31_t)0x6E30E349,
+	(q31_t)0xBE88304F, (q31_t)0x6DFD9A1B, (q31_t)0xBE31E19B,
+	(q31_t)0x6DCA0D14, (q31_t)0xBDDBBB7F, (q31_t)0x6D963C54,
+	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBD2FE9E1,
+	(q31_t)0x6D2DD027, (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB,
+	(q31_t)0xBC84BD1E, (q31_t)0x6CC45697, (q31_t)0xBC2F6513,
+	(q31_t)0x6C8F351C, (q31_t)0xBBDA36DC, (q31_t)0x6C59D0A9,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBB3058C0,
+	(q31_t)0x6BEE3F62, (q31_t)0xBADBA943, (q31_t)0x6BB812D0,
+	(q31_t)0xBA87246C, (q31_t)0x6B81A3CD, (q31_t)0xBA32CA70,
+	(q31_t)0x6B4AF278, (q31_t)0xB9DE9B83, (q31_t)0x6B13FEF5,
+	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB936BFA3,
+	(q31_t)0x6AA551E8, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
+	(q31_t)0xB88F926C, (q31_t)0x6A359DB9, (q31_t)0xB83C3DD1,
+	(q31_t)0x69FD614A, (q31_t)0xB7E9157A, (q31_t)0x69C4E37A,
+	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB7434A67,
+	(q31_t)0x69532442, (q31_t)0xB6F0A811, (q31_t)0x6919E320,
+	(q31_t)0xB69E32CD, (q31_t)0x68E06129, (q31_t)0xB64BEACC,
+	(q31_t)0x68A69E81, (q31_t)0xB5F9D042, (q31_t)0x686C9B4B,
+	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB556245E,
+	(q31_t)0x67F7D3C4, (q31_t)0xB5049368, (q31_t)0x67BD0FBC,
+	(q31_t)0xB4B330B2, (q31_t)0x67820BB6, (q31_t)0xB461FC70,
+	(q31_t)0x6746C7D7, (q31_t)0xB410F6D2, (q31_t)0x670B4443,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB36F784E,
+	(q31_t)0x66937E90, (q31_t)0xB31EFFCB, (q31_t)0x66573CBB,
+	(q31_t)0xB2CEB6B5, (q31_t)0x661ABBC5, (q31_t)0xB27E9D3B,
+	(q31_t)0x65DDFBD3, (q31_t)0xB22EB392, (q31_t)0x65A0FD0B,
+	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB18F7070,
+	(q31_t)0x6526438E, (q31_t)0xB140175B, (q31_t)0x64E88926,
+	(q31_t)0xB0F0EEDA, (q31_t)0x64AA907F, (q31_t)0xB0A1F71C,
+	(q31_t)0x646C59BF, (q31_t)0xB0533055, (q31_t)0x642DE50D,
+	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAFB63667,
+	(q31_t)0x63B0426D, (q31_t)0xAF6803A1, (q31_t)0x637114CC,
+	(q31_t)0xAF1A0293, (q31_t)0x6331A9D4, (q31_t)0xAECC336B,
+	(q31_t)0x62F201AC, (q31_t)0xAE7E965B, (q31_t)0x62B21C7B,
+	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xADE3F33E,
+	(q31_t)0x62319B9D, (q31_t)0xAD96ED91, (q31_t)0x61F1003E,
+	(q31_t)0xAD4A1ABA, (q31_t)0x61B02876, (q31_t)0xACFD7AE8,
+	(q31_t)0x616F146B, (q31_t)0xACB10E4A, (q31_t)0x612DC446,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAC18CF68,
+	(q31_t)0x60AA704F, (q31_t)0xABCCFD82, (q31_t)0x60686CCE,
+	(q31_t)0xAB815F8C, (q31_t)0x60262DD5, (q31_t)0xAB35F5B5,
+	(q31_t)0x5FE3B38D, (q31_t)0xAAEAC02B, (q31_t)0x5FA0FE1E,
+	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA54F2B9,
+	(q31_t)0x5F1AE273, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
+	(q31_t)0xA9BFF8A8, (q31_t)0x5E93DC1F, (q31_t)0xA975CB56,
+	(q31_t)0x5E50015D, (q31_t)0xA92BD366, (q31_t)0x5E0BEC6E,
+	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA8988463,
+	(q31_t)0x5D8314B0, (q31_t)0xA84F2DA9, (q31_t)0x5D3E5236,
+	(q31_t)0xA8060D08, (q31_t)0x5CF95638, (q31_t)0xA7BD22AB,
+	(q31_t)0x5CB420DF, (q31_t)0xA7746EC0, (q31_t)0x5C6EB258,
+	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA6E3AAF2,
+	(q31_t)0x5BE32A67, (q31_t)0xA69B9B68, (q31_t)0x5B9D1153,
+	(q31_t)0xA653C302, (q31_t)0x5B56BFBD, (q31_t)0xA60C21ED,
+	(q31_t)0x5B1035CF, (q31_t)0xA5C4B855, (q31_t)0x5AC973B4,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA5368C4B,
+	(q31_t)0x5A3B47AA, (q31_t)0xA4EFCA31, (q31_t)0x59F3DE12,
+	(q31_t)0xA4A94042, (q31_t)0x59AC3CFD, (q31_t)0xA462EEAC,
+	(q31_t)0x59646497, (q31_t)0xA41CD598, (q31_t)0x591C550E,
+	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA3914DA7,
+	(q31_t)0x588B913F, (q31_t)0xA34BDF20, (q31_t)0x5842DD54,
+	(q31_t)0xA306A9C7, (q31_t)0x57F9F2F7, (q31_t)0xA2C1ADC9,
+	(q31_t)0x57B0D256, (q31_t)0xA27CEB4F, (q31_t)0x57677B9D,
+	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1F41391,
+	(q31_t)0x56D42C99, (q31_t)0xA1AFFEA2, (q31_t)0x568A34A9,
+	(q31_t)0xA16C23E1, (q31_t)0x56400757, (q31_t)0xA1288376,
+	(q31_t)0x55F5A4D2, (q31_t)0xA0E51D8C, (q31_t)0x55AB0D46,
+	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA05F01E1,
+	(q31_t)0x55153FD4, (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A,
+	(q31_t)0x9FD9D22A, (q31_t)0x547EA073, (q31_t)0x9F979331,
+	(q31_t)0x5433027D, (q31_t)0x9F558FB0, (q31_t)0x53E73097,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9ED23BB9,
+	(q31_t)0x534EF1B5, (q31_t)0x9E90EB94, (q31_t)0x53028517,
+	(q31_t)0x9E4FD789, (q31_t)0x52B5E545, (q31_t)0x9E0EFFC1,
+	(q31_t)0x5269126E, (q31_t)0x9DCE6462, (q31_t)0x521C0CC1,
+	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D4DE384,
+	(q31_t)0x518169A4, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
+	(q31_t)0x9CCE562B, (q31_t)0x50E5FD6C, (q31_t)0x9C8EEB33,
+	(q31_t)0x5097FC5E, (q31_t)0x9C4FBD92, (q31_t)0x5049C999,
+	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9BD21AF2,
+	(q31_t)0x4FACCFAB, (q31_t)0x9B93A640, (q31_t)0x4F5E08E3,
+	(q31_t)0x9B556F80, (q31_t)0x4F0F1126, (q31_t)0x9B1776D9,
+	(q31_t)0x4EBFE8A4, (q31_t)0x9AD9BC71, (q31_t)0x4E708F8F,
+	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A5F02F5,
+	(q31_t)0x4DD14C6E, (q31_t)0x9A22042C, (q31_t)0x4D8162C4,
+	(q31_t)0x99E5443A, (q31_t)0x4D31494B, (q31_t)0x99A8C344,
+	(q31_t)0x4CE10034, (q31_t)0x996C816F, (q31_t)0x4C9087B1,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x98F4BBBC,
+	(q31_t)0x4BEF092D, (q31_t)0x98B93828, (q31_t)0x4B9E038F,
+	(q31_t)0x987DF449, (q31_t)0x4B4CCF4D, (q31_t)0x9842F043,
+	(q31_t)0x4AFB6C97, (q31_t)0x98082C3B, (q31_t)0x4AA9DBA1,
+	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x979364B5,
+	(q31_t)0x4A062FBD, (q31_t)0x9759617E, (q31_t)0x49B41533,
+	(q31_t)0x971F9ED6, (q31_t)0x4961CD32, (q31_t)0x96E61CDF,
+	(q31_t)0x490F57EE, (q31_t)0x96ACDBBD, (q31_t)0x48BCB598,
+	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x963B1C85,
+	(q31_t)0x4816EA85, (q31_t)0x96029EB5, (q31_t)0x47C3C22E,
+	(q31_t)0x95CA6246, (q31_t)0x47706D93, (q31_t)0x9592675B,
+	(q31_t)0x471CECE6, (q31_t)0x955AAE17, (q31_t)0x46C9405C,
+	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x94EC010B,
+	(q31_t)0x4621647C, (q31_t)0x94B50D87, (q31_t)0x45CD358F,
+	(q31_t)0x947E5C32, (q31_t)0x4578DB93, (q31_t)0x9447ED2F,
+	(q31_t)0x452456BC, (q31_t)0x9411C09D, (q31_t)0x44CFA73F,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x93A62F56,
+	(q31_t)0x4425C923, (q31_t)0x9370CAE4, (q31_t)0x43D09AEC,
+	(q31_t)0x933BA968, (q31_t)0x437B42E1, (q31_t)0x9306CB04,
+	(q31_t)0x4325C135, (q31_t)0x92D22FD8, (q31_t)0x42D0161E,
+	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9269C3AC,
+	(q31_t)0x42244480, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
+	(q31_t)0x920265E4, (q31_t)0x4177CFB0, (q31_t)0x91CF1CB6,
+	(q31_t)0x4121589A, (q31_t)0x919C1780, (q31_t)0x40CAB957,
+	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x9136D97D,
+	(q31_t)0x401D0320, (q31_t)0x9104A0ED, (q31_t)0x3FC5EC97,
+	(q31_t)0x90D2ACD3, (q31_t)0x3F6EAEB8, (q31_t)0x90A0FD4E,
+	(q31_t)0x3F1749B7, (q31_t)0x906F927B, (q31_t)0x3EBFBDCC,
+	(q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x900D8B69,
+	(q31_t)0x3E10320D, (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5,
+	(q31_t)0x8FAC988E, (q31_t)0x3D600D2B, (q31_t)0x8F7C8701,
+	(q31_t)0x3D07C1D5, (q31_t)0x8F4CBADB, (q31_t)0x3CAF50DA,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8EEDF33B,
+	(q31_t)0x3BFDFECD, (q31_t)0x8EBEF7FB, (q31_t)0x3BA51E29,
+	(q31_t)0x8E904298, (q31_t)0x3B4C18BA, (q31_t)0x8E61D32D,
+	(q31_t)0x3AF2EEB7, (q31_t)0x8E33A9D9, (q31_t)0x3A99A057,
+	(q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DD829E4,
+	(q31_t)0x39E6975D, (q31_t)0x8DAAD37B, (q31_t)0x398CDD32,
+	(q31_t)0x8D7DC399, (q31_t)0x3932FF87, (q31_t)0x8D50FA59,
+	(q31_t)0x38D8FE93, (q31_t)0x8D2477D8, (q31_t)0x387EDA8E,
+	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CCC477D,
+	(q31_t)0x37CA2A30, (q31_t)0x8CA099D9, (q31_t)0x376F9E46,
+	(q31_t)0x8C753361, (q31_t)0x3714F02A, (q31_t)0x8C4A142F,
+	(q31_t)0x36BA2013, (q31_t)0x8C1F3C5C, (q31_t)0x365F2E3B,
+	(q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BCA6342,
+	(q31_t)0x35A8E624, (q31_t)0x8BA0622F, (q31_t)0x354D9056,
+	(q31_t)0x8B76A8E4, (q31_t)0x34F219A7, (q31_t)0x8B4D377C,
+	(q31_t)0x3496824F, (q31_t)0x8B240E10, (q31_t)0x343ACA87,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AD29393,
+	(q31_t)0x3382FA88, (q31_t)0x8AAA42B4, (q31_t)0x3326E2C2,
+	(q31_t)0x8A823A35, (q31_t)0x32CAAB6F, (q31_t)0x8A5A7A30,
+	(q31_t)0x326E54C7, (q31_t)0x8A3302BD, (q31_t)0x3211DF03,
+	(q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89E4EDEE,
+	(q31_t)0x3158970D, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+	(q31_t)0x8997FC89, (q31_t)0x309ED555, (q31_t)0x8971F15A,
+	(q31_t)0x3041C760, (q31_t)0x894C2F4C, (q31_t)0x2FE49BA6,
+	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x890186F1,
+	(q31_t)0x2F29EBCC, (q31_t)0x88DCA0D3, (q31_t)0x2ECC681E,
+	(q31_t)0x88B80431, (q31_t)0x2E6EC792, (q31_t)0x8893B124,
+	(q31_t)0x2E110A62, (q31_t)0x886FA7C2, (q31_t)0x2DB330C7,
+	(q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x88287255,
+	(q31_t)0x2CF72939, (q31_t)0x88054677, (q31_t)0x2C98FBBA,
+	(q31_t)0x87E2649B, (q31_t)0x2C3AB2B9, (q31_t)0x87BFCCD7,
+	(q31_t)0x2BDC4E6F, (q31_t)0x879D7F40, (q31_t)0x2B7DCF17,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8759C2EF,
+	(q31_t)0x2AC08025, (q31_t)0x8738545E, (q31_t)0x2A61B101,
+	(q31_t)0x8717304E, (q31_t)0x2A02C7B8, (q31_t)0x86F656D3,
+	(q31_t)0x29A3C484, (q31_t)0x86D5C802, (q31_t)0x2944A7A2,
+	(q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x86958AAB,
+	(q31_t)0x288621B9, (q31_t)0x8675DC4E, (q31_t)0x2826B928,
+	(q31_t)0x865678EA, (q31_t)0x27C737D2, (q31_t)0x86376092,
+	(q31_t)0x27679DF4, (q31_t)0x86189359, (q31_t)0x2707EBC6,
+	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85DBDA91,
+	(q31_t)0x26483F6C, (q31_t)0x85BDEF27, (q31_t)0x25E845B5,
+	(q31_t)0x85A04F28, (q31_t)0x2588349D, (q31_t)0x8582FAA4,
+	(q31_t)0x25280C5D, (q31_t)0x8565F1B0, (q31_t)0x24C7CD32,
+	(q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x852CC2BA,
+	(q31_t)0x24070B07, (q31_t)0x85109CDC, (q31_t)0x23A6887E,
+	(q31_t)0x84F4C2D3, (q31_t)0x2345EFF7, (q31_t)0x84D934B0,
+	(q31_t)0x22E541AE, (q31_t)0x84BDF285, (q31_t)0x22847DDF,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x84885257,
+	(q31_t)0x21C2B69C, (q31_t)0x846DF476, (q31_t)0x2161B39F,
+	(q31_t)0x8453E2CE, (q31_t)0x21009C0B, (q31_t)0x843A1D70,
+	(q31_t)0x209F701C, (q31_t)0x8420A46B, (q31_t)0x203E300D,
+	(q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83EE97AC,
+	(q31_t)0x1F7B7480, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
+	(q31_t)0x83BDBD0D, (q31_t)0x1EB86B46, (q31_t)0x83A5C2B0,
+	(q31_t)0x1E56CA1E, (q31_t)0x838E1507, (q31_t)0x1DF5163F,
+	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x835FA00E,
+	(q31_t)0x1D31774D, (q31_t)0x8348D8DB, (q31_t)0x1CCF8CB3,
+	(q31_t)0x83325E97, (q31_t)0x1C6D9053, (q31_t)0x831C314E,
+	(q31_t)0x1C0B826A, (q31_t)0x8306510F, (q31_t)0x1BA96334,
+	(q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82DB77E5,
+	(q31_t)0x1AE4F1D6, (q31_t)0x82C67F13, (q31_t)0x1A82A025,
+	(q31_t)0x82B1D381, (q31_t)0x1A203E1B, (q31_t)0x829D753A,
+	(q31_t)0x19BDCBF2, (q31_t)0x8289644A, (q31_t)0x195B49E9,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82622AA5,
+	(q31_t)0x18961727, (q31_t)0x824F0208, (q31_t)0x183366E8,
+	(q31_t)0x823C26F2, (q31_t)0x17D0A7BB, (q31_t)0x82299971,
+	(q31_t)0x176DD9DE, (q31_t)0x8217598F, (q31_t)0x170AFD8D,
+	(q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81F3C2D7,
+	(q31_t)0x16451A83, (q31_t)0x81E26C16, (q31_t)0x15E21444,
+	(q31_t)0x81D16320, (q31_t)0x157F0086, (q31_t)0x81C0A801,
+	(q31_t)0x151BDF85, (q31_t)0x81B03AC1, (q31_t)0x14B8B17F,
+	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x81904A0C,
+	(q31_t)0x13F22F57, (q31_t)0x8180C6A9, (q31_t)0x138EDBB0,
+	(q31_t)0x8171914E, (q31_t)0x132B7BF9, (q31_t)0x8162AA03,
+	(q31_t)0x12C8106E, (q31_t)0x815410D3, (q31_t)0x1264994E,
+	(q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x8137C8E6,
+	(q31_t)0x119D8940, (q31_t)0x812A1A39, (q31_t)0x1139F0CE,
+	(q31_t)0x811CB9CA, (q31_t)0x10D64DBC, (q31_t)0x810FA7A0,
+	(q31_t)0x1072A047, (q31_t)0x8102E3C3, (q31_t)0x100EE8AD,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80EA4712,
+	(q31_t)0x0F475BFE, (q31_t)0x80DE6E4C, (q31_t)0x0EE38765,
+	(q31_t)0x80D2E3F1, (q31_t)0x0E7FA99D, (q31_t)0x80C7A80A,
+	(q31_t)0x0E1BC2E3, (q31_t)0x80BCBA9C, (q31_t)0x0DB7D376,
+	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x80A7CB49,
+	(q31_t)0x0CEFDB75, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
+	(q31_t)0x8094162B, (q31_t)0x0C27C389, (q31_t)0x808AB180,
+	(q31_t)0x0BC3AC35, (q31_t)0x80819B74, (q31_t)0x0B5F8D9F,
+	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80705B50,
+	(q31_t)0x0A973BA5, (q31_t)0x80683143, (q31_t)0x0A3308BC,
+	(q31_t)0x806055EA, (q31_t)0x09CECF89, (q31_t)0x8058C94C,
+	(q31_t)0x096A9049, (q31_t)0x80518B6B, (q31_t)0x09064B3A,
+	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x8043FBF6,
+	(q31_t)0x083DB0A7, (q31_t)0x803DAA69, (q31_t)0x07D95B9E,
+	(q31_t)0x8037A7AC, (q31_t)0x077501BE, (q31_t)0x8031F3C1,
+	(q31_t)0x0710A344, (q31_t)0x802C8EAD, (q31_t)0x06AC406F,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8022B113,
+	(q31_t)0x05E36EA9, (q31_t)0x801E3894, (q31_t)0x057F0034,
+	(q31_t)0x801A0EF7, (q31_t)0x051A8E5C, (q31_t)0x80163440,
+	(q31_t)0x04B6195D, (q31_t)0x8012A86F, (q31_t)0x0451A176,
+	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x800C7D8C,
+	(q31_t)0x0388A9E9, (q31_t)0x8009DE7D, (q31_t)0x03242ABF,
+	(q31_t)0x80078E5E, (q31_t)0x02BFA9A4, (q31_t)0x80058D2E,
+	(q31_t)0x025B26D7, (q31_t)0x8003DAF0, (q31_t)0x01F6A296,
+	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x8001634D,
+	(q31_t)0x012D96B0, (q31_t)0x80009DE9, (q31_t)0x00C90F88,
+	(q31_t)0x8000277A, (q31_t)0x006487E3, (q31_t)0x80000000,
+	(q31_t)0x00000000, (q31_t)0x8000277A, (q31_t)0xFF9B781D,
+	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x8001634D,
+	(q31_t)0xFED2694F, (q31_t)0x800277A5, (q31_t)0xFE6DE2E0,
+	(q31_t)0x8003DAF0, (q31_t)0xFE095D69, (q31_t)0x80058D2E,
+	(q31_t)0xFDA4D928, (q31_t)0x80078E5E, (q31_t)0xFD40565B,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800C7D8C,
+	(q31_t)0xFC775616, (q31_t)0x800F6B88, (q31_t)0xFC12D919,
+	(q31_t)0x8012A86F, (q31_t)0xFBAE5E89, (q31_t)0x80163440,
+	(q31_t)0xFB49E6A2, (q31_t)0x801A0EF7, (q31_t)0xFAE571A4,
+	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x8022B113,
+	(q31_t)0xFA1C9156, (q31_t)0x80277872, (q31_t)0xF9B82683,
+	(q31_t)0x802C8EAD, (q31_t)0xF953BF90, (q31_t)0x8031F3C1,
+	(q31_t)0xF8EF5CBB, (q31_t)0x8037A7AC, (q31_t)0xF88AFE41,
+	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8043FBF6,
+	(q31_t)0xF7C24F58, (q31_t)0x804A9C4D, (q31_t)0xF75DFF65,
+	(q31_t)0x80518B6B, (q31_t)0xF6F9B4C5, (q31_t)0x8058C94C,
+	(q31_t)0xF6956FB6, (q31_t)0x806055EA, (q31_t)0xF6313076,
+	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x80705B50,
+	(q31_t)0xF568C45A, (q31_t)0x8078D40D, (q31_t)0xF50497FA,
+	(q31_t)0x80819B74, (q31_t)0xF4A07260, (q31_t)0x808AB180,
+	(q31_t)0xF43C53CA, (q31_t)0x8094162B, (q31_t)0xF3D83C76,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80A7CB49,
+	(q31_t)0xF310248A, (q31_t)0x80B21BAF, (q31_t)0xF2AC246D,
+	(q31_t)0x80BCBA9C, (q31_t)0xF2482C89, (q31_t)0x80C7A80A,
+	(q31_t)0xF1E43D1C, (q31_t)0x80D2E3F1, (q31_t)0xF1805662,
+	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80EA4712,
+	(q31_t)0xF0B8A401, (q31_t)0x80F66E3C, (q31_t)0xF054D8D4,
+	(q31_t)0x8102E3C3, (q31_t)0xEFF11752, (q31_t)0x810FA7A0,
+	(q31_t)0xEF8D5FB8, (q31_t)0x811CB9CA, (q31_t)0xEF29B243,
+	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8137C8E6,
+	(q31_t)0xEE6276BF, (q31_t)0x8145C5C6, (q31_t)0xEDFEE92B,
+	(q31_t)0x815410D3, (q31_t)0xED9B66B2, (q31_t)0x8162AA03,
+	(q31_t)0xED37EF91, (q31_t)0x8171914E, (q31_t)0xECD48406,
+	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81904A0C,
+	(q31_t)0xEC0DD0A8, (q31_t)0x81A01B6C, (q31_t)0xEBAA894E,
+	(q31_t)0x81B03AC1, (q31_t)0xEB474E80, (q31_t)0x81C0A801,
+	(q31_t)0xEAE4207A, (q31_t)0x81D16320, (q31_t)0xEA80FF79,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x81F3C2D7,
+	(q31_t)0xE9BAE57C, (q31_t)0x82056758, (q31_t)0xE957ECFB,
+	(q31_t)0x8217598F, (q31_t)0xE8F50273, (q31_t)0x82299971,
+	(q31_t)0xE8922621, (q31_t)0x823C26F2, (q31_t)0xE82F5844,
+	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x82622AA5,
+	(q31_t)0xE769E8D8, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
+	(q31_t)0x8289644A, (q31_t)0xE6A4B616, (q31_t)0x829D753A,
+	(q31_t)0xE642340D, (q31_t)0x82B1D381, (q31_t)0xE5DFC1E4,
+	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82DB77E5,
+	(q31_t)0xE51B0E2A, (q31_t)0x82F0BDE8, (q31_t)0xE4B8CD10,
+	(q31_t)0x8306510F, (q31_t)0xE4569CCB, (q31_t)0x831C314E,
+	(q31_t)0xE3F47D95, (q31_t)0x83325E97, (q31_t)0xE3926FAC,
+	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x835FA00E,
+	(q31_t)0xE2CE88B2, (q31_t)0x8376B422, (q31_t)0xE26CB01A,
+	(q31_t)0x838E1507, (q31_t)0xE20AE9C1, (q31_t)0x83A5C2B0,
+	(q31_t)0xE1A935E1, (q31_t)0x83BDBD0D, (q31_t)0xE14794B9,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x83EE97AC,
+	(q31_t)0xE0848B7F, (q31_t)0x840777CF, (q31_t)0xE02323E5,
+	(q31_t)0x8420A46B, (q31_t)0xDFC1CFF2, (q31_t)0x843A1D70,
+	(q31_t)0xDF608FE3, (q31_t)0x8453E2CE, (q31_t)0xDEFF63F4,
+	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x84885257,
+	(q31_t)0xDE3D4963, (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A,
+	(q31_t)0x84BDF285, (q31_t)0xDD7B8220, (q31_t)0x84D934B0,
+	(q31_t)0xDD1ABE51, (q31_t)0x84F4C2D3, (q31_t)0xDCBA1008,
+	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x852CC2BA,
+	(q31_t)0xDBF8F4F8, (q31_t)0x8549345C, (q31_t)0xDB9888A8,
+	(q31_t)0x8565F1B0, (q31_t)0xDB3832CD, (q31_t)0x8582FAA4,
+	(q31_t)0xDAD7F3A2, (q31_t)0x85A04F28, (q31_t)0xDA77CB62,
+	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85DBDA91,
+	(q31_t)0xD9B7C093, (q31_t)0x85FA1152, (q31_t)0xD957DE7A,
+	(q31_t)0x86189359, (q31_t)0xD8F81439, (q31_t)0x86376092,
+	(q31_t)0xD898620C, (q31_t)0x865678EA, (q31_t)0xD838C82D,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86958AAB,
+	(q31_t)0xD779DE46, (q31_t)0x86B583EE, (q31_t)0xD71A8EB5,
+	(q31_t)0x86D5C802, (q31_t)0xD6BB585D, (q31_t)0x86F656D3,
+	(q31_t)0xD65C3B7B, (q31_t)0x8717304E, (q31_t)0xD5FD3847,
+	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x8759C2EF,
+	(q31_t)0xD53F7FDA, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
+	(q31_t)0x879D7F40, (q31_t)0xD48230E8, (q31_t)0x87BFCCD7,
+	(q31_t)0xD423B190, (q31_t)0x87E2649B, (q31_t)0xD3C54D46,
+	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x88287255,
+	(q31_t)0xD308D6C6, (q31_t)0x884BE820, (q31_t)0xD2AAC504,
+	(q31_t)0x886FA7C2, (q31_t)0xD24CCF38, (q31_t)0x8893B124,
+	(q31_t)0xD1EEF59E, (q31_t)0x88B80431, (q31_t)0xD191386D,
+	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x890186F1,
+	(q31_t)0xD0D61433, (q31_t)0x8926B677, (q31_t)0xD078AD9D,
+	(q31_t)0x894C2F4C, (q31_t)0xD01B6459, (q31_t)0x8971F15A,
+	(q31_t)0xCFBE389F, (q31_t)0x8997FC89, (q31_t)0xCF612AAA,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x89E4EDEE,
+	(q31_t)0xCEA768F2, (q31_t)0x8A0BD3F5, (q31_t)0xCE4AB5A2,
+	(q31_t)0x8A3302BD, (q31_t)0xCDEE20FC, (q31_t)0x8A5A7A30,
+	(q31_t)0xCD91AB38, (q31_t)0x8A823A35, (q31_t)0xCD355490,
+	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8AD29393,
+	(q31_t)0xCC7D0577, (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78,
+	(q31_t)0x8B240E10, (q31_t)0xCBC53578, (q31_t)0x8B4D377C,
+	(q31_t)0xCB697DB0, (q31_t)0x8B76A8E4, (q31_t)0xCB0DE658,
+	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BCA6342,
+	(q31_t)0xCA5719DB, (q31_t)0x8BF4AC05, (q31_t)0xC9FBE527,
+	(q31_t)0x8C1F3C5C, (q31_t)0xC9A0D1C4, (q31_t)0x8C4A142F,
+	(q31_t)0xC945DFEC, (q31_t)0x8C753361, (q31_t)0xC8EB0FD6,
+	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CCC477D,
+	(q31_t)0xC835D5D0, (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50,
+	(q31_t)0x8D2477D8, (q31_t)0xC7812571, (q31_t)0x8D50FA59,
+	(q31_t)0xC727016C, (q31_t)0x8D7DC399, (q31_t)0xC6CD0079,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8DD829E4,
+	(q31_t)0xC61968A2, (q31_t)0x8E05C6B7, (q31_t)0xC5BFD22E,
+	(q31_t)0x8E33A9D9, (q31_t)0xC5665FA8, (q31_t)0x8E61D32D,
+	(q31_t)0xC50D1148, (q31_t)0x8E904298, (q31_t)0xC4B3E746,
+	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8EEDF33B,
+	(q31_t)0xC4020132, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
+	(q31_t)0x8F4CBADB, (q31_t)0xC350AF25, (q31_t)0x8F7C8701,
+	(q31_t)0xC2F83E2A, (q31_t)0x8FAC988E, (q31_t)0xC29FF2D4,
+	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x900D8B69,
+	(q31_t)0xC1EFCDF2, (q31_t)0x903E6C7A, (q31_t)0xC197F4D3,
+	(q31_t)0x906F927B, (q31_t)0xC1404233, (q31_t)0x90A0FD4E,
+	(q31_t)0xC0E8B648, (q31_t)0x90D2ACD3, (q31_t)0xC0915147,
+	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x9136D97D,
+	(q31_t)0xBFE2FCDF, (q31_t)0x91695663, (q31_t)0xBF8C0DE2,
+	(q31_t)0x919C1780, (q31_t)0xBF3546A8, (q31_t)0x91CF1CB6,
+	(q31_t)0xBEDEA765, (q31_t)0x920265E4, (q31_t)0xBE88304F,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9269C3AC,
+	(q31_t)0xBDDBBB7F, (q31_t)0x929DD805, (q31_t)0xBD85BE2F,
+	(q31_t)0x92D22FD8, (q31_t)0xBD2FE9E1, (q31_t)0x9306CB04,
+	(q31_t)0xBCDA3ECA, (q31_t)0x933BA968, (q31_t)0xBC84BD1E,
+	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x93A62F56,
+	(q31_t)0xBBDA36DC, (q31_t)0x93DBD69F, (q31_t)0xBB8532AF,
+	(q31_t)0x9411C09D, (q31_t)0xBB3058C0, (q31_t)0x9447ED2F,
+	(q31_t)0xBADBA943, (q31_t)0x947E5C32, (q31_t)0xBA87246C,
+	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x94EC010B,
+	(q31_t)0xB9DE9B83, (q31_t)0x9523369B, (q31_t)0xB98A97D8,
+	(q31_t)0x955AAE17, (q31_t)0xB936BFA3, (q31_t)0x9592675B,
+	(q31_t)0xB8E31319, (q31_t)0x95CA6246, (q31_t)0xB88F926C,
+	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x963B1C85,
+	(q31_t)0xB7E9157A, (q31_t)0x9673DB94, (q31_t)0xB796199B,
+	(q31_t)0x96ACDBBD, (q31_t)0xB7434A67, (q31_t)0x96E61CDF,
+	(q31_t)0xB6F0A811, (q31_t)0x971F9ED6, (q31_t)0xB69E32CD,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x979364B5,
+	(q31_t)0xB5F9D042, (q31_t)0x97CDA855, (q31_t)0xB5A7E362,
+	(q31_t)0x98082C3B, (q31_t)0xB556245E, (q31_t)0x9842F043,
+	(q31_t)0xB5049368, (q31_t)0x987DF449, (q31_t)0xB4B330B2,
+	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x98F4BBBC,
+	(q31_t)0xB410F6D2, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
+	(q31_t)0x996C816F, (q31_t)0xB36F784E, (q31_t)0x99A8C344,
+	(q31_t)0xB31EFFCB, (q31_t)0x99E5443A, (q31_t)0xB2CEB6B5,
+	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A5F02F5,
+	(q31_t)0xB22EB392, (q31_t)0x9A9C406D, (q31_t)0xB1DEF9E8,
+	(q31_t)0x9AD9BC71, (q31_t)0xB18F7070, (q31_t)0x9B1776D9,
+	(q31_t)0xB140175B, (q31_t)0x9B556F80, (q31_t)0xB0F0EEDA,
+	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9BD21AF2,
+	(q31_t)0xB0533055, (q31_t)0x9C10CD70, (q31_t)0xB0049AB2,
+	(q31_t)0x9C4FBD92, (q31_t)0xAFB63667, (q31_t)0x9C8EEB33,
+	(q31_t)0xAF6803A1, (q31_t)0x9CCE562B, (q31_t)0xAF1A0293,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D4DE384,
+	(q31_t)0xAE7E965B, (q31_t)0x9D8E0596, (q31_t)0xAE312B91,
+	(q31_t)0x9DCE6462, (q31_t)0xADE3F33E, (q31_t)0x9E0EFFC1,
+	(q31_t)0xAD96ED91, (q31_t)0x9E4FD789, (q31_t)0xAD4A1ABA,
+	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9ED23BB9,
+	(q31_t)0xACB10E4A, (q31_t)0x9F13C7D0, (q31_t)0xAC64D510,
+	(q31_t)0x9F558FB0, (q31_t)0xAC18CF68, (q31_t)0x9F979331,
+	(q31_t)0xABCCFD82, (q31_t)0x9FD9D22A, (q31_t)0xAB815F8C,
+	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA05F01E1,
+	(q31_t)0xAAEAC02B, (q31_t)0xA0A1F24C, (q31_t)0xAA9FBF1D,
+	(q31_t)0xA0E51D8C, (q31_t)0xAA54F2B9, (q31_t)0xA1288376,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA16C23E1, (q31_t)0xA9BFF8A8,
+	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA1F41391,
+	(q31_t)0xA92BD366, (q31_t)0xA2386283, (q31_t)0xA8E21106,
+	(q31_t)0xA27CEB4F, (q31_t)0xA8988463, (q31_t)0xA2C1ADC9,
+	(q31_t)0xA84F2DA9, (q31_t)0xA306A9C7, (q31_t)0xA8060D08,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3914DA7,
+	(q31_t)0xA7746EC0, (q31_t)0xA3D6F533, (q31_t)0xA72BF173,
+	(q31_t)0xA41CD598, (q31_t)0xA6E3AAF2, (q31_t)0xA462EEAC,
+	(q31_t)0xA69B9B68, (q31_t)0xA4A94042, (q31_t)0xA653C302,
+	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA5368C4B,
+	(q31_t)0xA5C4B855, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+	(q31_t)0xA5C4B855, (q31_t)0xA5368C4B, (q31_t)0xA60C21ED,
+	(q31_t)0xA4EFCA31, (q31_t)0xA653C302, (q31_t)0xA4A94042,
+	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6E3AAF2,
+	(q31_t)0xA41CD598, (q31_t)0xA72BF173, (q31_t)0xA3D6F533,
+	(q31_t)0xA7746EC0, (q31_t)0xA3914DA7, (q31_t)0xA7BD22AB,
+	(q31_t)0xA34BDF20, (q31_t)0xA8060D08, (q31_t)0xA306A9C7,
+	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA8988463,
+	(q31_t)0xA27CEB4F, (q31_t)0xA8E21106, (q31_t)0xA2386283,
+	(q31_t)0xA92BD366, (q31_t)0xA1F41391, (q31_t)0xA975CB56,
+	(q31_t)0xA1AFFEA2, (q31_t)0xA9BFF8A8, (q31_t)0xA16C23E1,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA54F2B9,
+	(q31_t)0xA0E51D8C, (q31_t)0xAA9FBF1D, (q31_t)0xA0A1F24C,
+	(q31_t)0xAAEAC02B, (q31_t)0xA05F01E1, (q31_t)0xAB35F5B5,
+	(q31_t)0xA01C4C72, (q31_t)0xAB815F8C, (q31_t)0x9FD9D22A,
+	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xAC18CF68,
+	(q31_t)0x9F558FB0, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0,
+	(q31_t)0xACB10E4A, (q31_t)0x9ED23BB9, (q31_t)0xACFD7AE8,
+	(q31_t)0x9E90EB94, (q31_t)0xAD4A1ABA, (q31_t)0x9E4FD789,
+	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADE3F33E,
+	(q31_t)0x9DCE6462, (q31_t)0xAE312B91, (q31_t)0x9D8E0596,
+	(q31_t)0xAE7E965B, (q31_t)0x9D4DE384, (q31_t)0xAECC336B,
+	(q31_t)0x9D0DFE53, (q31_t)0xAF1A0293, (q31_t)0x9CCE562B,
+	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAFB63667,
+	(q31_t)0x9C4FBD92, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70,
+	(q31_t)0xB0533055, (q31_t)0x9BD21AF2, (q31_t)0xB0A1F71C,
+	(q31_t)0x9B93A640, (q31_t)0xB0F0EEDA, (q31_t)0x9B556F80,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB18F7070,
+	(q31_t)0x9AD9BC71, (q31_t)0xB1DEF9E8, (q31_t)0x9A9C406D,
+	(q31_t)0xB22EB392, (q31_t)0x9A5F02F5, (q31_t)0xB27E9D3B,
+	(q31_t)0x9A22042C, (q31_t)0xB2CEB6B5, (q31_t)0x99E5443A,
+	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB36F784E,
+	(q31_t)0x996C816F, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
+	(q31_t)0xB410F6D2, (q31_t)0x98F4BBBC, (q31_t)0xB461FC70,
+	(q31_t)0x98B93828, (q31_t)0xB4B330B2, (q31_t)0x987DF449,
+	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB556245E,
+	(q31_t)0x98082C3B, (q31_t)0xB5A7E362, (q31_t)0x97CDA855,
+	(q31_t)0xB5F9D042, (q31_t)0x979364B5, (q31_t)0xB64BEACC,
+	(q31_t)0x9759617E, (q31_t)0xB69E32CD, (q31_t)0x971F9ED6,
+	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB7434A67,
+	(q31_t)0x96ACDBBD, (q31_t)0xB796199B, (q31_t)0x9673DB94,
+	(q31_t)0xB7E9157A, (q31_t)0x963B1C85, (q31_t)0xB83C3DD1,
+	(q31_t)0x96029EB5, (q31_t)0xB88F926C, (q31_t)0x95CA6246,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB936BFA3,
+	(q31_t)0x955AAE17, (q31_t)0xB98A97D8, (q31_t)0x9523369B,
+	(q31_t)0xB9DE9B83, (q31_t)0x94EC010B, (q31_t)0xBA32CA70,
+	(q31_t)0x94B50D87, (q31_t)0xBA87246C, (q31_t)0x947E5C32,
+	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB3058C0,
+	(q31_t)0x9411C09D, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F,
+	(q31_t)0xBBDA36DC, (q31_t)0x93A62F56, (q31_t)0xBC2F6513,
+	(q31_t)0x9370CAE4, (q31_t)0xBC84BD1E, (q31_t)0x933BA968,
+	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD2FE9E1,
+	(q31_t)0x92D22FD8, (q31_t)0xBD85BE2F, (q31_t)0x929DD805,
+	(q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC, (q31_t)0xBE31E19B,
+	(q31_t)0x9235F2EB, (q31_t)0xBE88304F, (q31_t)0x920265E4,
+	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF3546A8,
+	(q31_t)0x919C1780, (q31_t)0xBF8C0DE2, (q31_t)0x91695663,
+	(q31_t)0xBFE2FCDF, (q31_t)0x9136D97D, (q31_t)0xC03A1368,
+	(q31_t)0x9104A0ED, (q31_t)0xC0915147, (q31_t)0x90D2ACD3,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1404233,
+	(q31_t)0x906F927B, (q31_t)0xC197F4D3, (q31_t)0x903E6C7A,
+	(q31_t)0xC1EFCDF2, (q31_t)0x900D8B69, (q31_t)0xC247CD5A,
+	(q31_t)0x8FDCEF66, (q31_t)0xC29FF2D4, (q31_t)0x8FAC988E,
+	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC350AF25,
+	(q31_t)0x8F4CBADB, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
+	(q31_t)0xC4020132, (q31_t)0x8EEDF33B, (q31_t)0xC45AE1D7,
+	(q31_t)0x8EBEF7FB, (q31_t)0xC4B3E746, (q31_t)0x8E904298,
+	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5665FA8,
+	(q31_t)0x8E33A9D9, (q31_t)0xC5BFD22E, (q31_t)0x8E05C6B7,
+	(q31_t)0xC61968A2, (q31_t)0x8DD829E4, (q31_t)0xC67322CD,
+	(q31_t)0x8DAAD37B, (q31_t)0xC6CD0079, (q31_t)0x8D7DC399,
+	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7812571,
+	(q31_t)0x8D2477D8, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30,
+	(q31_t)0xC835D5D0, (q31_t)0x8CCC477D, (q31_t)0xC89061BA,
+	(q31_t)0x8CA099D9, (q31_t)0xC8EB0FD6, (q31_t)0x8C753361,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9A0D1C4,
+	(q31_t)0x8C1F3C5C, (q31_t)0xC9FBE527, (q31_t)0x8BF4AC05,
+	(q31_t)0xCA5719DB, (q31_t)0x8BCA6342, (q31_t)0xCAB26FA9,
+	(q31_t)0x8BA0622F, (q31_t)0xCB0DE658, (q31_t)0x8B76A8E4,
+	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCBC53578,
+	(q31_t)0x8B240E10, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCC7D0577, (q31_t)0x8AD29393, (q31_t)0xCCD91D3D,
+	(q31_t)0x8AAA42B4, (q31_t)0xCD355490, (q31_t)0x8A823A35,
+	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDEE20FC,
+	(q31_t)0x8A3302BD, (q31_t)0xCE4AB5A2, (q31_t)0x8A0BD3F5,
+	(q31_t)0xCEA768F2, (q31_t)0x89E4EDEE, (q31_t)0xCF043AB2,
+	(q31_t)0x89BE50C3, (q31_t)0xCF612AAA, (q31_t)0x8997FC89,
+	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD01B6459,
+	(q31_t)0x894C2F4C, (q31_t)0xD078AD9D, (q31_t)0x8926B677,
+	(q31_t)0xD0D61433, (q31_t)0x890186F1, (q31_t)0xD13397E1,
+	(q31_t)0x88DCA0D3, (q31_t)0xD191386D, (q31_t)0x88B80431,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD24CCF38,
+	(q31_t)0x886FA7C2, (q31_t)0xD2AAC504, (q31_t)0x884BE820,
+	(q31_t)0xD308D6C6, (q31_t)0x88287255, (q31_t)0xD3670445,
+	(q31_t)0x88054677, (q31_t)0xD3C54D46, (q31_t)0x87E2649B,
+	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD48230E8,
+	(q31_t)0x879D7F40, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
+	(q31_t)0xD53F7FDA, (q31_t)0x8759C2EF, (q31_t)0xD59E4EFE,
+	(q31_t)0x8738545E, (q31_t)0xD5FD3847, (q31_t)0x8717304E,
+	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD6BB585D,
+	(q31_t)0x86D5C802, (q31_t)0xD71A8EB5, (q31_t)0x86B583EE,
+	(q31_t)0xD779DE46, (q31_t)0x86958AAB, (q31_t)0xD7D946D7,
+	(q31_t)0x8675DC4E, (q31_t)0xD838C82D, (q31_t)0x865678EA,
+	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8F81439,
+	(q31_t)0x86189359, (q31_t)0xD957DE7A, (q31_t)0x85FA1152,
+	(q31_t)0xD9B7C093, (q31_t)0x85DBDA91, (q31_t)0xDA17BA4A,
+	(q31_t)0x85BDEF27, (q31_t)0xDA77CB62, (q31_t)0x85A04F28,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB3832CD,
+	(q31_t)0x8565F1B0, (q31_t)0xDB9888A8, (q31_t)0x8549345C,
+	(q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA, (q31_t)0xDC597781,
+	(q31_t)0x85109CDC, (q31_t)0xDCBA1008, (q31_t)0x84F4C2D3,
+	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD7B8220,
+	(q31_t)0x84BDF285, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62,
+	(q31_t)0xDE3D4963, (q31_t)0x84885257, (q31_t)0xDE9E4C60,
+	(q31_t)0x846DF476, (q31_t)0xDEFF63F4, (q31_t)0x8453E2CE,
+	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDFC1CFF2,
+	(q31_t)0x8420A46B, (q31_t)0xE02323E5, (q31_t)0x840777CF,
+	(q31_t)0xE0848B7F, (q31_t)0x83EE97AC, (q31_t)0xE0E60684,
+	(q31_t)0x83D60411, (q31_t)0xE14794B9, (q31_t)0x83BDBD0D,
+	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE20AE9C1,
+	(q31_t)0x838E1507, (q31_t)0xE26CB01A, (q31_t)0x8376B422,
+	(q31_t)0xE2CE88B2, (q31_t)0x835FA00E, (q31_t)0xE330734C,
+	(q31_t)0x8348D8DB, (q31_t)0xE3926FAC, (q31_t)0x83325E97,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4569CCB,
+	(q31_t)0x8306510F, (q31_t)0xE4B8CD10, (q31_t)0x82F0BDE8,
+	(q31_t)0xE51B0E2A, (q31_t)0x82DB77E5, (q31_t)0xE57D5FDA,
+	(q31_t)0x82C67F13, (q31_t)0xE5DFC1E4, (q31_t)0x82B1D381,
+	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6A4B616,
+	(q31_t)0x8289644A, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
+	(q31_t)0xE769E8D8, (q31_t)0x82622AA5, (q31_t)0xE7CC9917,
+	(q31_t)0x824F0208, (q31_t)0xE82F5844, (q31_t)0x823C26F2,
+	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8F50273,
+	(q31_t)0x8217598F, (q31_t)0xE957ECFB, (q31_t)0x82056758,
+	(q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7, (q31_t)0xEA1DEBBB,
+	(q31_t)0x81E26C16, (q31_t)0xEA80FF79, (q31_t)0x81D16320,
+	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB474E80,
+	(q31_t)0x81B03AC1, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C,
+	(q31_t)0xEC0DD0A8, (q31_t)0x81904A0C, (q31_t)0xEC71244F,
+	(q31_t)0x8180C6A9, (q31_t)0xECD48406, (q31_t)0x8171914E,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED9B66B2,
+	(q31_t)0x815410D3, (q31_t)0xEDFEE92B, (q31_t)0x8145C5C6,
+	(q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEEC60F31,
+	(q31_t)0x812A1A39, (q31_t)0xEF29B243, (q31_t)0x811CB9CA,
+	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFF11752,
+	(q31_t)0x8102E3C3, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C,
+	(q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF11C789A,
+	(q31_t)0x80DE6E4C, (q31_t)0xF1805662, (q31_t)0x80D2E3F1,
+	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2482C89,
+	(q31_t)0x80BCBA9C, (q31_t)0xF2AC246D, (q31_t)0x80B21BAF,
+	(q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF3742CA1,
+	(q31_t)0x809DC970, (q31_t)0xF3D83C76, (q31_t)0x8094162B,
+	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF4A07260,
+	(q31_t)0x80819B74, (q31_t)0xF50497FA, (q31_t)0x8078D40D,
+	(q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF5CCF743,
+	(q31_t)0x80683143, (q31_t)0xF6313076, (q31_t)0x806055EA,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6F9B4C5,
+	(q31_t)0x80518B6B, (q31_t)0xF75DFF65, (q31_t)0x804A9C4D,
+	(q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF826A461,
+	(q31_t)0x803DAA69, (q31_t)0xF88AFE41, (q31_t)0x8037A7AC,
+	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF953BF90,
+	(q31_t)0x802C8EAD, (q31_t)0xF9B82683, (q31_t)0x80277872,
+	(q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA80FFCB,
+	(q31_t)0x801E3894, (q31_t)0xFAE571A4, (q31_t)0x801A0EF7,
+	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFBAE5E89,
+	(q31_t)0x8012A86F, (q31_t)0xFC12D919, (q31_t)0x800F6B88,
+	(q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCDBD541,
+	(q31_t)0x8009DE7D, (q31_t)0xFD40565B, (q31_t)0x80078E5E,
+	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE095D69,
+	(q31_t)0x8003DAF0, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5,
+	(q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF36F078,
+	(q31_t)0x80009DE9, (q31_t)0xFF9B781D, (q31_t)0x8000277A
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_4096_q31[6144] =
+{
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFF621,
+	(q31_t)0x003243F5, (q31_t)0x7FFFD885, (q31_t)0x006487E3,
+	(q31_t)0x7FFFA72C, (q31_t)0x0096CBC1, (q31_t)0x7FFF6216,
+	(q31_t)0x00C90F88, (q31_t)0x7FFF0942, (q31_t)0x00FB532F,
+	(q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFE1C64,
+	(q31_t)0x015FDA03, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,
+	(q31_t)0x7FFCE093, (q31_t)0x01C45FFE, (q31_t)0x7FFC250F,
+	(q31_t)0x01F6A296, (q31_t)0x7FFB55CE, (q31_t)0x0228E4E1,
+	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF97C17,
+	(q31_t)0x028D6870, (q31_t)0x7FF871A1, (q31_t)0x02BFA9A4,
+	(q31_t)0x7FF7536F, (q31_t)0x02F1EA6B, (q31_t)0x7FF62182,
+	(q31_t)0x03242ABF, (q31_t)0x7FF4DBD8, (q31_t)0x03566A96,
+	(q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF21553,
+	(q31_t)0x03BAE8B1, (q31_t)0x7FF09477, (q31_t)0x03ED26E6,
+	(q31_t)0x7FEEFFE1, (q31_t)0x041F647F, (q31_t)0x7FED5790,
+	(q31_t)0x0451A176, (q31_t)0x7FEB9B85, (q31_t)0x0483DDC3,
+	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE7E840,
+	(q31_t)0x04E8543D, (q31_t)0x7FE5F108, (q31_t)0x051A8E5C,
+	(q31_t)0x7FE3E616, (q31_t)0x054CC7B0, (q31_t)0x7FE1C76B,
+	(q31_t)0x057F0034, (q31_t)0x7FDF9508, (q31_t)0x05B137DF,
+	(q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FDAF518,
+	(q31_t)0x0615A48A, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
+	(q31_t)0x7FD6064B, (q31_t)0x067A0D75, (q31_t)0x7FD37152,
+	(q31_t)0x06AC406F, (q31_t)0x7FD0C8A3, (q31_t)0x06DE7261,
+	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FCB3C23,
+	(q31_t)0x0742D310, (q31_t)0x7FC85853, (q31_t)0x077501BE,
+	(q31_t)0x7FC560CF, (q31_t)0x07A72F45, (q31_t)0x7FC25596,
+	(q31_t)0x07D95B9E, (q31_t)0x7FBF36A9, (q31_t)0x080B86C1,
+	(q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB8BDB7,
+	(q31_t)0x086FD947, (q31_t)0x7FB563B2, (q31_t)0x08A2009A,
+	(q31_t)0x7FB1F5FC, (q31_t)0x08D42698, (q31_t)0x7FAE7494,
+	(q31_t)0x09064B3A, (q31_t)0x7FAADF7C, (q31_t)0x09386E77,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7FA37A3C,
+	(q31_t)0x099CB0A7, (q31_t)0x7F9FAA15, (q31_t)0x09CECF89,
+	(q31_t)0x7F9BC63F, (q31_t)0x0A00ECE8, (q31_t)0x7F97CEBC,
+	(q31_t)0x0A3308BC, (q31_t)0x7F93C38C, (q31_t)0x0A6522FE,
+	(q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F8B7226,
+	(q31_t)0x0AC952AA, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805,
+	(q31_t)0x7F82D214, (q31_t)0x0B2D7BAE, (q31_t)0x7F7E648B,
+	(q31_t)0x0B5F8D9F, (q31_t)0x7F79E35A, (q31_t)0x0B919DCE,
+	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F70A5FD,
+	(q31_t)0x0BF5B8CB, (q31_t)0x7F6BE9D4, (q31_t)0x0C27C389,
+	(q31_t)0x7F671A04, (q31_t)0x0C59CC67, (q31_t)0x7F62368F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F5D3F75, (q31_t)0x0CBDD865,
+	(q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F531654,
+	(q31_t)0x0D21DC87, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92,
+	(q31_t)0x7F489EAA, (q31_t)0x0D85D88F, (q31_t)0x7F434563,
+	(q31_t)0x0DB7D376, (q31_t)0x7F3DD87C, (q31_t)0x0DE9CC3F,
+	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F32C3D0,
+	(q31_t)0x0E4DB75B, (q31_t)0x7F2D1C0E, (q31_t)0x0E7FA99D,
+	(q31_t)0x7F2760AF, (q31_t)0x0EB199A3, (q31_t)0x7F2191B4,
+	(q31_t)0x0EE38765, (q31_t)0x7F1BAF1E, (q31_t)0x0F1572DC,
+	(q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0FAF24,
+	(q31_t)0x0F7942C6, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
+	(q31_t)0x7F0360CB, (q31_t)0x0FDD0925, (q31_t)0x7EFD1C3C,
+	(q31_t)0x100EE8AD, (q31_t)0x7EF6C418, (q31_t)0x1040C5BB,
+	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE9D913,
+	(q31_t)0x10A4784A, (q31_t)0x7EE34635, (q31_t)0x10D64DBC,
+	(q31_t)0x7EDC9FC6, (q31_t)0x11082096, (q31_t)0x7ED5E5C6,
+	(q31_t)0x1139F0CE, (q31_t)0x7ECF1837, (q31_t)0x116BBE5F,
+	(q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EC1426F,
+	(q31_t)0x11CF516A, (q31_t)0x7EBA3A39, (q31_t)0x120116D4,
+	(q31_t)0x7EB31E77, (q31_t)0x1232D978, (q31_t)0x7EABEF2C,
+	(q31_t)0x1264994E, (q31_t)0x7EA4AC58, (q31_t)0x1296564D,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E95EC19,
+	(q31_t)0x12F9C7AA, (q31_t)0x7E8E6EB1, (q31_t)0x132B7BF9,
+	(q31_t)0x7E86DDC5, (q31_t)0x135D2D53, (q31_t)0x7E7F3956,
+	(q31_t)0x138EDBB0, (q31_t)0x7E778165, (q31_t)0x13C0870A,
+	(q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E67D702,
+	(q31_t)0x1423D492, (q31_t)0x7E5FE493, (q31_t)0x145576B1,
+	(q31_t)0x7E57DEA6, (q31_t)0x148715AD, (q31_t)0x7E4FC53E,
+	(q31_t)0x14B8B17F, (q31_t)0x7E47985B, (q31_t)0x14EA4A1F,
+	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E37042A,
+	(q31_t)0x154D71AA, (q31_t)0x7E2E9CDF, (q31_t)0x157F0086,
+	(q31_t)0x7E26221E, (q31_t)0x15B08C11, (q31_t)0x7E1D93E9,
+	(q31_t)0x15E21444, (q31_t)0x7E14F242, (q31_t)0x16139917,
+	(q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7E03749F,
+	(q31_t)0x1676987F, (q31_t)0x7DFA98A7, (q31_t)0x16A81305,
+	(q31_t)0x7DF1A942, (q31_t)0x16D98A0C, (q31_t)0x7DE8A670,
+	(q31_t)0x170AFD8D, (q31_t)0x7DDF9034, (q31_t)0x173C6D80,
+	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DCD2981,
+	(q31_t)0x179F429F, (q31_t)0x7DC3D90D, (q31_t)0x17D0A7BB,
+	(q31_t)0x7DBA7534, (q31_t)0x1802092C, (q31_t)0x7DB0FDF7,
+	(q31_t)0x183366E8, (q31_t)0x7DA77359, (q31_t)0x1864C0E9,
+	(q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D9423FB,
+	(q31_t)0x18C7699B, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+	(q31_t)0x7D808727, (q31_t)0x192A0303, (q31_t)0x7D769BB5,
+	(q31_t)0x195B49E9, (q31_t)0x7D6C9CE9, (q31_t)0x198C8CE6,
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+	(q31_t)0x7E57DEA6, (q31_t)0x145576B1, (q31_t)0x7E5FE493,
+	(q31_t)0x1423D492, (q31_t)0x7E67D702, (q31_t)0x13F22F57,
+	(q31_t)0x7E6FB5F3, (q31_t)0x13C0870A, (q31_t)0x7E778165,
+	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x135D2D53,
+	(q31_t)0x7E86DDC5, (q31_t)0x132B7BF9, (q31_t)0x7E8E6EB1,
+	(q31_t)0x12F9C7AA, (q31_t)0x7E95EC19, (q31_t)0x12C8106E,
+	(q31_t)0x7E9D55FC, (q31_t)0x1296564D, (q31_t)0x7EA4AC58,
+	(q31_t)0x1264994E, (q31_t)0x7EABEF2C, (q31_t)0x1232D978,
+	(q31_t)0x7EB31E77, (q31_t)0x120116D4, (q31_t)0x7EBA3A39,
+	(q31_t)0x11CF516A, (q31_t)0x7EC1426F, (q31_t)0x119D8940,
+	(q31_t)0x7EC8371A, (q31_t)0x116BBE5F, (q31_t)0x7ECF1837,
+	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x11082096,
+	(q31_t)0x7EDC9FC6, (q31_t)0x10D64DBC, (q31_t)0x7EE34635,
+	(q31_t)0x10A4784A, (q31_t)0x7EE9D913, (q31_t)0x1072A047,
+	(q31_t)0x7EF0585F, (q31_t)0x1040C5BB, (q31_t)0x7EF6C418,
+	(q31_t)0x100EE8AD, (q31_t)0x7EFD1C3C, (q31_t)0x0FDD0925,
+	(q31_t)0x7F0360CB, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
+	(q31_t)0x0F7942C6, (q31_t)0x7F0FAF24, (q31_t)0x0F475BFE,
+	(q31_t)0x7F15B8EE, (q31_t)0x0F1572DC, (q31_t)0x7F1BAF1E,
+	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0EB199A3,
+	(q31_t)0x7F2760AF, (q31_t)0x0E7FA99D, (q31_t)0x7F2D1C0E,
+	(q31_t)0x0E4DB75B, (q31_t)0x7F32C3D0, (q31_t)0x0E1BC2E3,
+	(q31_t)0x7F3857F5, (q31_t)0x0DE9CC3F, (q31_t)0x7F3DD87C,
+	(q31_t)0x0DB7D376, (q31_t)0x7F434563, (q31_t)0x0D85D88F,
+	(q31_t)0x7F489EAA, (q31_t)0x0D53DB92, (q31_t)0x7F4DE450,
+	(q31_t)0x0D21DC87, (q31_t)0x7F531654, (q31_t)0x0CEFDB75,
+	(q31_t)0x7F5834B6, (q31_t)0x0CBDD865, (q31_t)0x7F5D3F75,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0C59CC67,
+	(q31_t)0x7F671A04, (q31_t)0x0C27C389, (q31_t)0x7F6BE9D4,
+	(q31_t)0x0BF5B8CB, (q31_t)0x7F70A5FD, (q31_t)0x0BC3AC35,
+	(q31_t)0x7F754E7F, (q31_t)0x0B919DCE, (q31_t)0x7F79E35A,
+	(q31_t)0x0B5F8D9F, (q31_t)0x7F7E648B, (q31_t)0x0B2D7BAE,
+	(q31_t)0x7F82D214, (q31_t)0x0AFB6805, (q31_t)0x7F872BF3,
+	(q31_t)0x0AC952AA, (q31_t)0x7F8B7226, (q31_t)0x0A973BA5,
+	(q31_t)0x7F8FA4AF, (q31_t)0x0A6522FE, (q31_t)0x7F93C38C,
+	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x0A00ECE8,
+	(q31_t)0x7F9BC63F, (q31_t)0x09CECF89, (q31_t)0x7F9FAA15,
+	(q31_t)0x099CB0A7, (q31_t)0x7FA37A3C, (q31_t)0x096A9049,
+	(q31_t)0x7FA736B4, (q31_t)0x09386E77, (q31_t)0x7FAADF7C,
+	(q31_t)0x09064B3A, (q31_t)0x7FAE7494, (q31_t)0x08D42698,
+	(q31_t)0x7FB1F5FC, (q31_t)0x08A2009A, (q31_t)0x7FB563B2,
+	(q31_t)0x086FD947, (q31_t)0x7FB8BDB7, (q31_t)0x083DB0A7,
+	(q31_t)0x7FBC040A, (q31_t)0x080B86C1, (q31_t)0x7FBF36A9,
+	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x07A72F45,
+	(q31_t)0x7FC560CF, (q31_t)0x077501BE, (q31_t)0x7FC85853,
+	(q31_t)0x0742D310, (q31_t)0x7FCB3C23, (q31_t)0x0710A344,
+	(q31_t)0x7FCE0C3E, (q31_t)0x06DE7261, (q31_t)0x7FD0C8A3,
+	(q31_t)0x06AC406F, (q31_t)0x7FD37152, (q31_t)0x067A0D75,
+	(q31_t)0x7FD6064B, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
+	(q31_t)0x0615A48A, (q31_t)0x7FDAF518, (q31_t)0x05E36EA9,
+	(q31_t)0x7FDD4EEC, (q31_t)0x05B137DF, (q31_t)0x7FDF9508,
+	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x054CC7B0,
+	(q31_t)0x7FE3E616, (q31_t)0x051A8E5C, (q31_t)0x7FE5F108,
+	(q31_t)0x04E8543D, (q31_t)0x7FE7E840, (q31_t)0x04B6195D,
+	(q31_t)0x7FE9CBC0, (q31_t)0x0483DDC3, (q31_t)0x7FEB9B85,
+	(q31_t)0x0451A176, (q31_t)0x7FED5790, (q31_t)0x041F647F,
+	(q31_t)0x7FEEFFE1, (q31_t)0x03ED26E6, (q31_t)0x7FF09477,
+	(q31_t)0x03BAE8B1, (q31_t)0x7FF21553, (q31_t)0x0388A9E9,
+	(q31_t)0x7FF38273, (q31_t)0x03566A96, (q31_t)0x7FF4DBD8,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x02F1EA6B,
+	(q31_t)0x7FF7536F, (q31_t)0x02BFA9A4, (q31_t)0x7FF871A1,
+	(q31_t)0x028D6870, (q31_t)0x7FF97C17, (q31_t)0x025B26D7,
+	(q31_t)0x7FFA72D1, (q31_t)0x0228E4E1, (q31_t)0x7FFB55CE,
+	(q31_t)0x01F6A296, (q31_t)0x7FFC250F, (q31_t)0x01C45FFE,
+	(q31_t)0x7FFCE093, (q31_t)0x01921D1F, (q31_t)0x7FFD885A,
+	(q31_t)0x015FDA03, (q31_t)0x7FFE1C64, (q31_t)0x012D96B0,
+	(q31_t)0x7FFE9CB2, (q31_t)0x00FB532F, (q31_t)0x7FFF0942,
+	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x0096CBC1,
+	(q31_t)0x7FFFA72C, (q31_t)0x006487E3, (q31_t)0x7FFFD885,
+	(q31_t)0x003243F5, (q31_t)0x7FFFF621, (q31_t)0x00000000,
+	(q31_t)0x7FFFFFFF, (q31_t)0xFFCDBC0A, (q31_t)0x7FFFF621,
+	(q31_t)0xFF9B781D, (q31_t)0x7FFFD885, (q31_t)0xFF69343E,
+	(q31_t)0x7FFFA72C, (q31_t)0xFF36F078, (q31_t)0x7FFF6216,
+	(q31_t)0xFF04ACD0, (q31_t)0x7FFF0942, (q31_t)0xFED2694F,
+	(q31_t)0x7FFE9CB2, (q31_t)0xFEA025FC, (q31_t)0x7FFE1C64,
+	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFE3BA001,
+	(q31_t)0x7FFCE093, (q31_t)0xFE095D69, (q31_t)0x7FFC250F,
+	(q31_t)0xFDD71B1E, (q31_t)0x7FFB55CE, (q31_t)0xFDA4D928,
+	(q31_t)0x7FFA72D1, (q31_t)0xFD72978F, (q31_t)0x7FF97C17,
+	(q31_t)0xFD40565B, (q31_t)0x7FF871A1, (q31_t)0xFD0E1594,
+	(q31_t)0x7FF7536F, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
+	(q31_t)0xFCA99569, (q31_t)0x7FF4DBD8, (q31_t)0xFC775616,
+	(q31_t)0x7FF38273, (q31_t)0xFC45174E, (q31_t)0x7FF21553,
+	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFBE09B80,
+	(q31_t)0x7FEEFFE1, (q31_t)0xFBAE5E89, (q31_t)0x7FED5790,
+	(q31_t)0xFB7C223C, (q31_t)0x7FEB9B85, (q31_t)0xFB49E6A2,
+	(q31_t)0x7FE9CBC0, (q31_t)0xFB17ABC2, (q31_t)0x7FE7E840,
+	(q31_t)0xFAE571A4, (q31_t)0x7FE5F108, (q31_t)0xFAB3384F,
+	(q31_t)0x7FE3E616, (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B,
+	(q31_t)0xFA4EC820, (q31_t)0x7FDF9508, (q31_t)0xFA1C9156,
+	(q31_t)0x7FDD4EEC, (q31_t)0xF9EA5B75, (q31_t)0x7FDAF518,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF985F28A,
+	(q31_t)0x7FD6064B, (q31_t)0xF953BF90, (q31_t)0x7FD37152,
+	(q31_t)0xF9218D9E, (q31_t)0x7FD0C8A3, (q31_t)0xF8EF5CBB,
+	(q31_t)0x7FCE0C3E, (q31_t)0xF8BD2CEF, (q31_t)0x7FCB3C23,
+	(q31_t)0xF88AFE41, (q31_t)0x7FC85853, (q31_t)0xF858D0BA,
+	(q31_t)0x7FC560CF, (q31_t)0xF826A461, (q31_t)0x7FC25596,
+	(q31_t)0xF7F4793E, (q31_t)0x7FBF36A9, (q31_t)0xF7C24F58,
+	(q31_t)0x7FBC040A, (q31_t)0xF79026B8, (q31_t)0x7FB8BDB7,
+	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF72BD967,
+	(q31_t)0x7FB1F5FC, (q31_t)0xF6F9B4C5, (q31_t)0x7FAE7494,
+	(q31_t)0xF6C79188, (q31_t)0x7FAADF7C, (q31_t)0xF6956FB6,
+	(q31_t)0x7FA736B4, (q31_t)0xF6634F58, (q31_t)0x7FA37A3C,
+	(q31_t)0xF6313076, (q31_t)0x7F9FAA15, (q31_t)0xF5FF1317,
+	(q31_t)0x7F9BC63F, (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC,
+	(q31_t)0xF59ADD01, (q31_t)0x7F93C38C, (q31_t)0xF568C45A,
+	(q31_t)0x7F8FA4AF, (q31_t)0xF536AD55, (q31_t)0x7F8B7226,
+	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF4D28451,
+	(q31_t)0x7F82D214, (q31_t)0xF4A07260, (q31_t)0x7F7E648B,
+	(q31_t)0xF46E6231, (q31_t)0x7F79E35A, (q31_t)0xF43C53CA,
+	(q31_t)0x7F754E7F, (q31_t)0xF40A4734, (q31_t)0x7F70A5FD,
+	(q31_t)0xF3D83C76, (q31_t)0x7F6BE9D4, (q31_t)0xF3A63398,
+	(q31_t)0x7F671A04, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
+	(q31_t)0xF342279A, (q31_t)0x7F5D3F75, (q31_t)0xF310248A,
+	(q31_t)0x7F5834B6, (q31_t)0xF2DE2378, (q31_t)0x7F531654,
+	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF27A2770,
+	(q31_t)0x7F489EAA, (q31_t)0xF2482C89, (q31_t)0x7F434563,
+	(q31_t)0xF21633C0, (q31_t)0x7F3DD87C, (q31_t)0xF1E43D1C,
+	(q31_t)0x7F3857F5, (q31_t)0xF1B248A5, (q31_t)0x7F32C3D0,
+	(q31_t)0xF1805662, (q31_t)0x7F2D1C0E, (q31_t)0xF14E665C,
+	(q31_t)0x7F2760AF, (q31_t)0xF11C789A, (q31_t)0x7F2191B4,
+	(q31_t)0xF0EA8D23, (q31_t)0x7F1BAF1E, (q31_t)0xF0B8A401,
+	(q31_t)0x7F15B8EE, (q31_t)0xF086BD39, (q31_t)0x7F0FAF24,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xF022F6DA,
+	(q31_t)0x7F0360CB, (q31_t)0xEFF11752, (q31_t)0x7EFD1C3C,
+	(q31_t)0xEFBF3A44, (q31_t)0x7EF6C418, (q31_t)0xEF8D5FB8,
+	(q31_t)0x7EF0585F, (q31_t)0xEF5B87B5, (q31_t)0x7EE9D913,
+	(q31_t)0xEF29B243, (q31_t)0x7EE34635, (q31_t)0xEEF7DF6A,
+	(q31_t)0x7EDC9FC6, (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6,
+	(q31_t)0xEE9441A0, (q31_t)0x7ECF1837, (q31_t)0xEE6276BF,
+	(q31_t)0x7EC8371A, (q31_t)0xEE30AE95, (q31_t)0x7EC1426F,
+	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xEDCD2687,
+	(q31_t)0x7EB31E77, (q31_t)0xED9B66B2, (q31_t)0x7EABEF2C,
+	(q31_t)0xED69A9B2, (q31_t)0x7EA4AC58, (q31_t)0xED37EF91,
+	(q31_t)0x7E9D55FC, (q31_t)0xED063855, (q31_t)0x7E95EC19,
+	(q31_t)0xECD48406, (q31_t)0x7E8E6EB1, (q31_t)0xECA2D2AC,
+	(q31_t)0x7E86DDC5, (q31_t)0xEC71244F, (q31_t)0x7E7F3956,
+	(q31_t)0xEC3F78F5, (q31_t)0x7E778165, (q31_t)0xEC0DD0A8,
+	(q31_t)0x7E6FB5F3, (q31_t)0xEBDC2B6D, (q31_t)0x7E67D702,
+	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEB78EA52,
+	(q31_t)0x7E57DEA6, (q31_t)0xEB474E80, (q31_t)0x7E4FC53E,
+	(q31_t)0xEB15B5E0, (q31_t)0x7E47985B, (q31_t)0xEAE4207A,
+	(q31_t)0x7E3F57FE, (q31_t)0xEAB28E55, (q31_t)0x7E37042A,
+	(q31_t)0xEA80FF79, (q31_t)0x7E2E9CDF, (q31_t)0xEA4F73EE,
+	(q31_t)0x7E26221E, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
+	(q31_t)0xE9EC66E8, (q31_t)0x7E14F242, (q31_t)0xE9BAE57C,
+	(q31_t)0x7E0C3D29, (q31_t)0xE9896780, (q31_t)0x7E03749F,
+	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE92675F4,
+	(q31_t)0x7DF1A942, (q31_t)0xE8F50273, (q31_t)0x7DE8A670,
+	(q31_t)0xE8C3927F, (q31_t)0x7DDF9034, (q31_t)0xE8922621,
+	(q31_t)0x7DD6668E, (q31_t)0xE860BD60, (q31_t)0x7DCD2981,
+	(q31_t)0xE82F5844, (q31_t)0x7DC3D90D, (q31_t)0xE7FDF6D3,
+	(q31_t)0x7DBA7534, (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7,
+	(q31_t)0xE79B3F16, (q31_t)0x7DA77359, (q31_t)0xE769E8D8,
+	(q31_t)0x7D9DD55A, (q31_t)0xE7389664, (q31_t)0x7D9423FB,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE6D5FCFC,
+	(q31_t)0x7D808727, (q31_t)0xE6A4B616, (q31_t)0x7D769BB5,
+	(q31_t)0xE6737319, (q31_t)0x7D6C9CE9, (q31_t)0xE642340D,
+	(q31_t)0x7D628AC5, (q31_t)0xE610F8F9, (q31_t)0x7D58654C,
+	(q31_t)0xE5DFC1E4, (q31_t)0x7D4E2C7E, (q31_t)0xE5AE8ED8,
+	(q31_t)0x7D43E05E, (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC,
+	(q31_t)0xE54C34F3, (q31_t)0x7D2F0E2A, (q31_t)0xE51B0E2A,
+	(q31_t)0x7D24881A, (q31_t)0xE4E9EB86, (q31_t)0x7D19EEBE,
+	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE487B2CF,
+	(q31_t)0x7D048228, (q31_t)0xE4569CCB, (q31_t)0x7CF9AEF0,
+	(q31_t)0xE4258B0A, (q31_t)0x7CEEC873, (q31_t)0xE3F47D95,
+	(q31_t)0x7CE3CEB1, (q31_t)0xE3C37473, (q31_t)0x7CD8C1AD,
+	(q31_t)0xE3926FAC, (q31_t)0x7CCDA168, (q31_t)0xE3616F47,
+	(q31_t)0x7CC26DE5, (q31_t)0xE330734C, (q31_t)0x7CB72724,
+	(q31_t)0xE2FF7BC3, (q31_t)0x7CABCD27, (q31_t)0xE2CE88B2,
+	(q31_t)0x7CA05FF1, (q31_t)0xE29D9A22, (q31_t)0x7C94DF82,
+	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE23BCAA2,
+	(q31_t)0x7C7DA504, (q31_t)0xE20AE9C1, (q31_t)0x7C71EAF8,
+	(q31_t)0xE1DA0D7E, (q31_t)0x7C661DBB, (q31_t)0xE1A935E1,
+	(q31_t)0x7C5A3D4F, (q31_t)0xE17862F3, (q31_t)0x7C4E49B6,
+	(q31_t)0xE14794B9, (q31_t)0x7C4242F2, (q31_t)0xE116CB3D,
+	(q31_t)0x7C362904, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
+	(q31_t)0xE0B54698, (q31_t)0x7C1DBBB2, (q31_t)0xE0848B7F,
+	(q31_t)0x7C116853, (q31_t)0xE053D541, (q31_t)0x7C0501D1,
+	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDFF27773,
+	(q31_t)0x7BEBFB70, (q31_t)0xDFC1CFF2, (q31_t)0x7BDF5B94,
+	(q31_t)0xDF912D6A, (q31_t)0x7BD2A89E, (q31_t)0xDF608FE3,
+	(q31_t)0x7BC5E28F, (q31_t)0xDF2FF764, (q31_t)0x7BB9096A,
+	(q31_t)0xDEFF63F4, (q31_t)0x7BAC1D31, (q31_t)0xDECED59B,
+	(q31_t)0x7B9F1DE5, (q31_t)0xDE9E4C60, (q31_t)0x7B920B89,
+	(q31_t)0xDE6DC84B, (q31_t)0x7B84E61E, (q31_t)0xDE3D4963,
+	(q31_t)0x7B77ADA8, (q31_t)0xDE0CCFB1, (q31_t)0x7B6A6227,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDDABEC07,
+	(q31_t)0x7B4F920E, (q31_t)0xDD7B8220, (q31_t)0x7B420D7A,
+	(q31_t)0xDD4B1D8B, (q31_t)0x7B3475E4, (q31_t)0xDD1ABE51,
+	(q31_t)0x7B26CB4F, (q31_t)0xDCEA6478, (q31_t)0x7B190DBB,
+	(q31_t)0xDCBA1008, (q31_t)0x7B0B3D2C, (q31_t)0xDC89C108,
+	(q31_t)0x7AFD59A3, (q31_t)0xDC597781, (q31_t)0x7AEF6323,
+	(q31_t)0xDC293379, (q31_t)0x7AE159AE, (q31_t)0xDBF8F4F8,
+	(q31_t)0x7AD33D45, (q31_t)0xDBC8BC05, (q31_t)0x7AC50DEB,
+	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDB685AE8,
+	(q31_t)0x7AA8766E, (q31_t)0xDB3832CD, (q31_t)0x7A9A0E4F,
+	(q31_t)0xDB08105E, (q31_t)0x7A8B9348, (q31_t)0xDAD7F3A2,
+	(q31_t)0x7A7D055B, (q31_t)0xDAA7DCA1, (q31_t)0x7A6E648A,
+	(q31_t)0xDA77CB62, (q31_t)0x7A5FB0D8, (q31_t)0xDA47BFED,
+	(q31_t)0x7A50EA46, (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8,
+	(q31_t)0xD9E7BA7E, (q31_t)0x7A33248F, (q31_t)0xD9B7C093,
+	(q31_t)0x7A24256E, (q31_t)0xD987CC8F, (q31_t)0x7A151377,
+	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD927F65B,
+	(q31_t)0x79F6B711, (q31_t)0xD8F81439, (q31_t)0x79E76CA6,
+	(q31_t)0xD8C8381C, (q31_t)0x79D80F6F, (q31_t)0xD898620C,
+	(q31_t)0x79C89F6D, (q31_t)0xD868920F, (q31_t)0x79B91CA4,
+	(q31_t)0xD838C82D, (q31_t)0x79A98715, (q31_t)0xD809046D,
+	(q31_t)0x7999DEC3, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
+	(q31_t)0xD7A98F73, (q31_t)0x797A55E0, (q31_t)0xD779DE46,
+	(q31_t)0x796A7554, (q31_t)0xD74A335A, (q31_t)0x795A820E,
+	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD6EAF05E,
+	(q31_t)0x793A6360, (q31_t)0xD6BB585D, (q31_t)0x792A37FE,
+	(q31_t)0xD68BC6BA, (q31_t)0x7919F9EB, (q31_t)0xD65C3B7B,
+	(q31_t)0x7909A92C, (q31_t)0xD62CB6A7, (q31_t)0x78F945C3,
+	(q31_t)0xD5FD3847, (q31_t)0x78E8CFB1, (q31_t)0xD5CDC062,
+	(q31_t)0x78D846FB, (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1,
+	(q31_t)0xD56EE424, (q31_t)0x78B6FDA8, (q31_t)0xD53F7FDA,
+	(q31_t)0x78A63D10, (q31_t)0xD5102227, (q31_t)0x789569DE,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD4B17AA7,
+	(q31_t)0x78738BB3, (q31_t)0xD48230E8, (q31_t)0x786280BF,
+	(q31_t)0xD452EDDE, (q31_t)0x7851633B, (q31_t)0xD423B190,
+	(q31_t)0x78403328, (q31_t)0xD3F47C06, (q31_t)0x782EF08B,
+	(q31_t)0xD3C54D46, (q31_t)0x781D9B64, (q31_t)0xD3962559,
+	(q31_t)0x780C33B8, (q31_t)0xD3670445, (q31_t)0x77FAB988,
+	(q31_t)0xD337EA12, (q31_t)0x77E92CD8, (q31_t)0xD308D6C6,
+	(q31_t)0x77D78DAA, (q31_t)0xD2D9CA6A, (q31_t)0x77C5DC01,
+	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD27BC69C,
+	(q31_t)0x77A24148, (q31_t)0xD24CCF38, (q31_t)0x7790583D,
+	(q31_t)0xD21DDEE1, (q31_t)0x777E5CC3, (q31_t)0xD1EEF59E,
+	(q31_t)0x776C4EDB, (q31_t)0xD1C01374, (q31_t)0x775A2E88,
+	(q31_t)0xD191386D, (q31_t)0x7747FBCE, (q31_t)0xD162648F,
+	(q31_t)0x7735B6AE, (q31_t)0xD13397E1, (q31_t)0x77235F2D,
+	(q31_t)0xD104D26B, (q31_t)0x7710F54B, (q31_t)0xD0D61433,
+	(q31_t)0x76FE790E, (q31_t)0xD0A75D42, (q31_t)0x76EBEA77,
+	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xD04A054D,
+	(q31_t)0x76C69646, (q31_t)0xD01B6459, (q31_t)0x76B3D0B3,
+	(q31_t)0xCFECCAC7, (q31_t)0x76A0F8D2, (q31_t)0xCFBE389F,
+	(q31_t)0x768E0EA5, (q31_t)0xCF8FADE8, (q31_t)0x767B1230,
+	(q31_t)0xCF612AAA, (q31_t)0x76680376, (q31_t)0xCF32AEEB,
+	(q31_t)0x7654E279, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+	(q31_t)0xCED5CE08, (q31_t)0x762E69C3, (q31_t)0xCEA768F2,
+	(q31_t)0x761B1211, (q31_t)0xCE790B78, (q31_t)0x7607A827,
+	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCE1C6776,
+	(q31_t)0x75E09DBD, (q31_t)0xCDEE20FC, (q31_t)0x75CCFD42,
+	(q31_t)0xCDBFE23A, (q31_t)0x75B94A9C, (q31_t)0xCD91AB38,
+	(q31_t)0x75A585CF, (q31_t)0xCD637BFD, (q31_t)0x7591AEDD,
+	(q31_t)0xCD355490, (q31_t)0x757DC5CA, (q31_t)0xCD0734F8,
+	(q31_t)0x7569CA98, (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B,
+	(q31_t)0xCCAB0D65, (q31_t)0x75419DE6, (q31_t)0xCC7D0577,
+	(q31_t)0x752D6C6C, (q31_t)0xCC4F057B, (q31_t)0x751928E0,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCBF31D75,
+	(q31_t)0x74F06B9E, (q31_t)0xCBC53578, (q31_t)0x74DBF1EF,
+	(q31_t)0xCB975589, (q31_t)0x74C7663A, (q31_t)0xCB697DB0,
+	(q31_t)0x74B2C883, (q31_t)0xCB3BADF2, (q31_t)0x749E18CD,
+	(q31_t)0xCB0DE658, (q31_t)0x7489571B, (q31_t)0xCAE026E8,
+	(q31_t)0x74748371, (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1,
+	(q31_t)0xCA84C0A2, (q31_t)0x744AA63E, (q31_t)0xCA5719DB,
+	(q31_t)0x74359CBD, (q31_t)0xCA297B5A, (q31_t)0x74208150,
+	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC9CE5748,
+	(q31_t)0x73F614C0, (q31_t)0xC9A0D1C4, (q31_t)0x73E0C3A3,
+	(q31_t)0xC97354A3, (q31_t)0x73CB60A7, (q31_t)0xC945DFEC,
+	(q31_t)0x73B5EBD0, (q31_t)0xC91873A5, (q31_t)0x73A06522,
+	(q31_t)0xC8EB0FD6, (q31_t)0x738ACC9E, (q31_t)0xC8BDB485,
+	(q31_t)0x73752249, (q31_t)0xC89061BA, (q31_t)0x735F6626,
+	(q31_t)0xC863177B, (q31_t)0x73499838, (q31_t)0xC835D5D0,
+	(q31_t)0x7333B883, (q31_t)0xC8089CBF, (q31_t)0x731DC709,
+	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC7AE4489,
+	(q31_t)0x72F1AED8, (q31_t)0xC7812571, (q31_t)0x72DB8828,
+	(q31_t)0xC7540F10, (q31_t)0x72C54FC0, (q31_t)0xC727016C,
+	(q31_t)0x72AF05A6, (q31_t)0xC6F9FC8D, (q31_t)0x7298A9DC,
+	(q31_t)0xC6CD0079, (q31_t)0x72823C66, (q31_t)0xC6A00D36,
+	(q31_t)0x726BBD48, (q31_t)0xC67322CD, (q31_t)0x72552C84,
+	(q31_t)0xC6464144, (q31_t)0x723E8A1F, (q31_t)0xC61968A2,
+	(q31_t)0x7227D61C, (q31_t)0xC5EC98ED, (q31_t)0x7211107D,
+	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC593146A,
+	(q31_t)0x71E3507F, (q31_t)0xC5665FA8, (q31_t)0x71CC5626,
+	(q31_t)0xC539B3F0, (q31_t)0x71B54A40, (q31_t)0xC50D1148,
+	(q31_t)0x719E2CD2, (q31_t)0xC4E077B8, (q31_t)0x7186FDDE,
+	(q31_t)0xC4B3E746, (q31_t)0x716FBD68, (q31_t)0xC4875FF8,
+	(q31_t)0x71586B73, (q31_t)0xC45AE1D7, (q31_t)0x71410804,
+	(q31_t)0xC42E6CE8, (q31_t)0x7129931E, (q31_t)0xC4020132,
+	(q31_t)0x71120CC5, (q31_t)0xC3D59EBD, (q31_t)0x70FA74FB,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC37CF5B0,
+	(q31_t)0x70CB1127, (q31_t)0xC350AF25, (q31_t)0x70B34524,
+	(q31_t)0xC32471F6, (q31_t)0x709B67C0, (q31_t)0xC2F83E2A,
+	(q31_t)0x708378FE, (q31_t)0xC2CC13C7, (q31_t)0x706B78E3,
+	(q31_t)0xC29FF2D4, (q31_t)0x70536771, (q31_t)0xC273DB58,
+	(q31_t)0x703B44AC, (q31_t)0xC247CD5A, (q31_t)0x70231099,
+	(q31_t)0xC21BC8E0, (q31_t)0x700ACB3B, (q31_t)0xC1EFCDF2,
+	(q31_t)0x6FF27496, (q31_t)0xC1C3DC96, (q31_t)0x6FDA0CAD,
+	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC16C16B0,
+	(q31_t)0x6FA90920, (q31_t)0xC1404233, (q31_t)0x6F906D84,
+	(q31_t)0xC1147763, (q31_t)0x6F77C0B3, (q31_t)0xC0E8B648,
+	(q31_t)0x6F5F02B1, (q31_t)0xC0BCFEE7, (q31_t)0x6F463383,
+	(q31_t)0xC0915147, (q31_t)0x6F2D532C, (q31_t)0xC065AD70,
+	(q31_t)0x6F1461AF, (q31_t)0xC03A1368, (q31_t)0x6EFB5F12,
+	(q31_t)0xC00E8335, (q31_t)0x6EE24B57, (q31_t)0xBFE2FCDF,
+	(q31_t)0x6EC92682, (q31_t)0xBFB7806C, (q31_t)0x6EAFF098,
+	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBF60A54A,
+	(q31_t)0x6E7D5193, (q31_t)0xBF3546A8, (q31_t)0x6E63E87F,
+	(q31_t)0xBF09F204, (q31_t)0x6E4A6E65, (q31_t)0xBEDEA765,
+	(q31_t)0x6E30E349, (q31_t)0xBEB366D1, (q31_t)0x6E17472F,
+	(q31_t)0xBE88304F, (q31_t)0x6DFD9A1B, (q31_t)0xBE5D03E5,
+	(q31_t)0x6DE3DC11, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
+	(q31_t)0xBE06C977, (q31_t)0x6DB02D29, (q31_t)0xBDDBBB7F,
+	(q31_t)0x6D963C54, (q31_t)0xBDB0B7BA, (q31_t)0x6D7C3A98,
+	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBD5ACEE5,
+	(q31_t)0x6D48047E, (q31_t)0xBD2FE9E1, (q31_t)0x6D2DD027,
+	(q31_t)0xBD050F2C, (q31_t)0x6D138AFA, (q31_t)0xBCDA3ECA,
+	(q31_t)0x6CF934FB, (q31_t)0xBCAF78C3, (q31_t)0x6CDECE2E,
+	(q31_t)0xBC84BD1E, (q31_t)0x6CC45697, (q31_t)0xBC5A0BE1,
+	(q31_t)0x6CA9CE3A, (q31_t)0xBC2F6513, (q31_t)0x6C8F351C,
+	(q31_t)0xBC04C8BA, (q31_t)0x6C748B3F, (q31_t)0xBBDA36DC,
+	(q31_t)0x6C59D0A9, (q31_t)0xBBAFAF81, (q31_t)0x6C3F055D,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBB5AC06C,
+	(q31_t)0x6C093CB6, (q31_t)0xBB3058C0, (q31_t)0x6BEE3F62,
+	(q31_t)0xBB05FBB0, (q31_t)0x6BD3316A, (q31_t)0xBADBA943,
+	(q31_t)0x6BB812D0, (q31_t)0xBAB1617F, (q31_t)0x6B9CE39B,
+	(q31_t)0xBA87246C, (q31_t)0x6B81A3CD, (q31_t)0xBA5CF210,
+	(q31_t)0x6B66536A, (q31_t)0xBA32CA70, (q31_t)0x6B4AF278,
+	(q31_t)0xBA08AD94, (q31_t)0x6B2F80FA, (q31_t)0xB9DE9B83,
+	(q31_t)0x6B13FEF5, (q31_t)0xB9B49442, (q31_t)0x6AF86C6C,
+	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB960A64B,
+	(q31_t)0x6AC115E1, (q31_t)0xB936BFA3, (q31_t)0x6AA551E8,
+	(q31_t)0xB90CE3E6, (q31_t)0x6A897D7D, (q31_t)0xB8E31319,
+	(q31_t)0x6A6D98A4, (q31_t)0xB8B94D44, (q31_t)0x6A51A361,
+	(q31_t)0xB88F926C, (q31_t)0x6A359DB9, (q31_t)0xB865E299,
+	(q31_t)0x6A1987B0, (q31_t)0xB83C3DD1, (q31_t)0x69FD614A,
+	(q31_t)0xB812A419, (q31_t)0x69E12A8C, (q31_t)0xB7E9157A,
+	(q31_t)0x69C4E37A, (q31_t)0xB7BF91F8, (q31_t)0x69A88C18,
+	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB76CAC68,
+	(q31_t)0x696FAC78, (q31_t)0xB7434A67, (q31_t)0x69532442,
+	(q31_t)0xB719F39D, (q31_t)0x69368BCE, (q31_t)0xB6F0A811,
+	(q31_t)0x6919E320, (q31_t)0xB6C767CA, (q31_t)0x68FD2A3D,
+	(q31_t)0xB69E32CD, (q31_t)0x68E06129, (q31_t)0xB6750921,
+	(q31_t)0x68C387E9, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
+	(q31_t)0xB622D7D5, (q31_t)0x6889A4F5, (q31_t)0xB5F9D042,
+	(q31_t)0x686C9B4B, (q31_t)0xB5D0D41A, (q31_t)0x684F8186,
+	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB57EFE21,
+	(q31_t)0x68151DBE, (q31_t)0xB556245E, (q31_t)0x67F7D3C4,
+	(q31_t)0xB52D561E, (q31_t)0x67DA79C2, (q31_t)0xB5049368,
+	(q31_t)0x67BD0FBC, (q31_t)0xB4DBDC42, (q31_t)0x679F95B7,
+	(q31_t)0xB4B330B2, (q31_t)0x67820BB6, (q31_t)0xB48A90C0,
+	(q31_t)0x676471C0, (q31_t)0xB461FC70, (q31_t)0x6746C7D7,
+	(q31_t)0xB43973C9, (q31_t)0x67290E02, (q31_t)0xB410F6D2,
+	(q31_t)0x670B4443, (q31_t)0xB3E88591, (q31_t)0x66ED6AA1,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB397C649,
+	(q31_t)0x66B187C3, (q31_t)0xB36F784E, (q31_t)0x66937E90,
+	(q31_t)0xB3473622, (q31_t)0x6675658C, (q31_t)0xB31EFFCB,
+	(q31_t)0x66573CBB, (q31_t)0xB2F6D54F, (q31_t)0x66390422,
+	(q31_t)0xB2CEB6B5, (q31_t)0x661ABBC5, (q31_t)0xB2A6A401,
+	(q31_t)0x65FC63A9, (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3,
+	(q31_t)0xB256A26A, (q31_t)0x65BF8447, (q31_t)0xB22EB392,
+	(q31_t)0x65A0FD0B, (q31_t)0xB206D0BA, (q31_t)0x65826622,
+	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB1B72F23,
+	(q31_t)0x6545095F, (q31_t)0xB18F7070, (q31_t)0x6526438E,
+	(q31_t)0xB167BDD6, (q31_t)0x65076E24, (q31_t)0xB140175B,
+	(q31_t)0x64E88926, (q31_t)0xB1187D05, (q31_t)0x64C99498,
+	(q31_t)0xB0F0EEDA, (q31_t)0x64AA907F, (q31_t)0xB0C96CDF,
+	(q31_t)0x648B7CDF, (q31_t)0xB0A1F71C, (q31_t)0x646C59BF,
+	(q31_t)0xB07A8D97, (q31_t)0x644D2722, (q31_t)0xB0533055,
+	(q31_t)0x642DE50D, (q31_t)0xB02BDF5C, (q31_t)0x640E9385,
+	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAFDD625F,
+	(q31_t)0x63CFC230, (q31_t)0xAFB63667, (q31_t)0x63B0426D,
+	(q31_t)0xAF8F16D0, (q31_t)0x6390B34A, (q31_t)0xAF6803A1,
+	(q31_t)0x637114CC, (q31_t)0xAF40FCE0, (q31_t)0x635166F8,
+	(q31_t)0xAF1A0293, (q31_t)0x6331A9D4, (q31_t)0xAEF314BF,
+	(q31_t)0x6311DD63, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
+	(q31_t)0xAEA55E9D, (q31_t)0x62D216B2, (q31_t)0xAE7E965B,
+	(q31_t)0x62B21C7B, (q31_t)0xAE57DAAA, (q31_t)0x6292130C,
+	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xAE0A8916,
+	(q31_t)0x6251D297, (q31_t)0xADE3F33E, (q31_t)0x62319B9D,
+	(q31_t)0xADBD6A10, (q31_t)0x6211557D, (q31_t)0xAD96ED91,
+	(q31_t)0x61F1003E, (q31_t)0xAD707DC8, (q31_t)0x61D09BE5,
+	(q31_t)0xAD4A1ABA, (q31_t)0x61B02876, (q31_t)0xAD23C46D,
+	(q31_t)0x618FA5F6, (q31_t)0xACFD7AE8, (q31_t)0x616F146B,
+	(q31_t)0xACD73E30, (q31_t)0x614E73D9, (q31_t)0xACB10E4A,
+	(q31_t)0x612DC446, (q31_t)0xAC8AEB3E, (q31_t)0x610D05B7,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAC3ECBC7,
+	(q31_t)0x60CB5BB6, (q31_t)0xAC18CF68, (q31_t)0x60AA704F,
+	(q31_t)0xABF2DFFA, (q31_t)0x60897600, (q31_t)0xABCCFD82,
+	(q31_t)0x60686CCE, (q31_t)0xABA72806, (q31_t)0x604754BE,
+	(q31_t)0xAB815F8C, (q31_t)0x60262DD5, (q31_t)0xAB5BA41A,
+	(q31_t)0x6004F818, (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D,
+	(q31_t)0xAB105464, (q31_t)0x5FC26038, (q31_t)0xAAEAC02B,
+	(q31_t)0x5FA0FE1E, (q31_t)0xAAC53912, (q31_t)0x5F7F8D46,
+	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA7A5253,
+	(q31_t)0x5F3C7F6B, (q31_t)0xAA54F2B9, (q31_t)0x5F1AE273,
+	(q31_t)0xAA2FA055, (q31_t)0x5EF936D1, (q31_t)0xAA0A5B2D,
+	(q31_t)0x5ED77C89, (q31_t)0xA9E52347, (q31_t)0x5EB5B3A1,
+	(q31_t)0xA9BFF8A8, (q31_t)0x5E93DC1F, (q31_t)0xA99ADB56,
+	(q31_t)0x5E71F606, (q31_t)0xA975CB56, (q31_t)0x5E50015D,
+	(q31_t)0xA950C8AF, (q31_t)0x5E2DFE28, (q31_t)0xA92BD366,
+	(q31_t)0x5E0BEC6E, (q31_t)0xA906EB81, (q31_t)0x5DE9CC32,
+	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA8BD43FA,
+	(q31_t)0x5DA5604E, (q31_t)0xA8988463, (q31_t)0x5D8314B0,
+	(q31_t)0xA873D246, (q31_t)0x5D60BAA6, (q31_t)0xA84F2DA9,
+	(q31_t)0x5D3E5236, (q31_t)0xA82A9693, (q31_t)0x5D1BDB65,
+	(q31_t)0xA8060D08, (q31_t)0x5CF95638, (q31_t)0xA7E1910E,
+	(q31_t)0x5CD6C2B4, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
+	(q31_t)0xA798C1E4, (q31_t)0x5C9170BF, (q31_t)0xA7746EC0,
+	(q31_t)0x5C6EB258, (q31_t)0xA7502943, (q31_t)0x5C4BE5B0,
+	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA707C756,
+	(q31_t)0x5C0621B2, (q31_t)0xA6E3AAF2, (q31_t)0x5BE32A67,
+	(q31_t)0xA6BF9C4B, (q31_t)0x5BC024F0, (q31_t)0xA69B9B68,
+	(q31_t)0x5B9D1153, (q31_t)0xA677A84E, (q31_t)0x5B79EF96,
+	(q31_t)0xA653C302, (q31_t)0x5B56BFBD, (q31_t)0xA62FEB8B,
+	(q31_t)0x5B3381CE, (q31_t)0xA60C21ED, (q31_t)0x5B1035CF,
+	(q31_t)0xA5E8662F, (q31_t)0x5AECDBC4, (q31_t)0xA5C4B855,
+	(q31_t)0x5AC973B4, (q31_t)0xA5A11865, (q31_t)0x5AA5FDA4,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA55A025B,
+	(q31_t)0x5A5EE79A, (q31_t)0xA5368C4B, (q31_t)0x5A3B47AA,
+	(q31_t)0xA513243B, (q31_t)0x5A1799D0, (q31_t)0xA4EFCA31,
+	(q31_t)0x59F3DE12, (q31_t)0xA4CC7E31, (q31_t)0x59D01474,
+	(q31_t)0xA4A94042, (q31_t)0x59AC3CFD, (q31_t)0xA4861069,
+	(q31_t)0x598857B1, (q31_t)0xA462EEAC, (q31_t)0x59646497,
+	(q31_t)0xA43FDB0F, (q31_t)0x594063B4, (q31_t)0xA41CD598,
+	(q31_t)0x591C550E, (q31_t)0xA3F9DE4D, (q31_t)0x58F838A9,
+	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA3B41A4F,
+	(q31_t)0x58AFD6BC, (q31_t)0xA3914DA7, (q31_t)0x588B913F,
+	(q31_t)0xA36E8F40, (q31_t)0x58673E1B, (q31_t)0xA34BDF20,
+	(q31_t)0x5842DD54, (q31_t)0xA3293D4B, (q31_t)0x581E6EF1,
+	(q31_t)0xA306A9C7, (q31_t)0x57F9F2F7, (q31_t)0xA2E4249A,
+	(q31_t)0x57D5696C, (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256,
+	(q31_t)0xA29F4559, (q31_t)0x578C2DB9, (q31_t)0xA27CEB4F,
+	(q31_t)0x57677B9D, (q31_t)0xA25A9FB1, (q31_t)0x5742BC05,
+	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA21633CD,
+	(q31_t)0x56F9147E, (q31_t)0xA1F41391, (q31_t)0x56D42C99,
+	(q31_t)0xA1D201D7, (q31_t)0x56AF3750, (q31_t)0xA1AFFEA2,
+	(q31_t)0x568A34A9, (q31_t)0xA18E09F9, (q31_t)0x566524AA,
+	(q31_t)0xA16C23E1, (q31_t)0x56400757, (q31_t)0xA14A4C5E,
+	(q31_t)0x561ADCB8, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
+	(q31_t)0xA106C92E, (q31_t)0x55D05FAA, (q31_t)0xA0E51D8C,
+	(q31_t)0x55AB0D46, (q31_t)0xA0C38094, (q31_t)0x5585ADAC,
+	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA08072BA,
+	(q31_t)0x553AC6ED, (q31_t)0xA05F01E1, (q31_t)0x55153FD4,
+	(q31_t)0xA03D9FC7, (q31_t)0x54EFAB9C, (q31_t)0xA01C4C72,
+	(q31_t)0x54CA0A4A, (q31_t)0x9FFB07E7, (q31_t)0x54A45BE5,
+	(q31_t)0x9FD9D22A, (q31_t)0x547EA073, (q31_t)0x9FB8AB41,
+	(q31_t)0x5458D7F9, (q31_t)0x9F979331, (q31_t)0x5433027D,
+	(q31_t)0x9F7689FF, (q31_t)0x540D2005, (q31_t)0x9F558FB0,
+	(q31_t)0x53E73097, (q31_t)0x9F34A449, (q31_t)0x53C13438,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9EF2FA48,
+	(q31_t)0x537514C1, (q31_t)0x9ED23BB9, (q31_t)0x534EF1B5,
+	(q31_t)0x9EB18C26, (q31_t)0x5328C1D0, (q31_t)0x9E90EB94,
+	(q31_t)0x53028517, (q31_t)0x9E705A09, (q31_t)0x52DC3B92,
+	(q31_t)0x9E4FD789, (q31_t)0x52B5E545, (q31_t)0x9E2F641A,
+	(q31_t)0x528F8237, (q31_t)0x9E0EFFC1, (q31_t)0x5269126E,
+	(q31_t)0x9DEEAA82, (q31_t)0x524295EF, (q31_t)0x9DCE6462,
+	(q31_t)0x521C0CC1, (q31_t)0x9DAE2D68, (q31_t)0x51F576E9,
+	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D6DECF4,
+	(q31_t)0x51A82555, (q31_t)0x9D4DE384, (q31_t)0x518169A4,
+	(q31_t)0x9D2DE94D, (q31_t)0x515AA162, (q31_t)0x9D0DFE53,
+	(q31_t)0x5133CC94, (q31_t)0x9CEE229C, (q31_t)0x510CEB40,
+	(q31_t)0x9CCE562B, (q31_t)0x50E5FD6C, (q31_t)0x9CAE9907,
+	(q31_t)0x50BF031F, (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E,
+	(q31_t)0x9C6F4CB5, (q31_t)0x5070E92F, (q31_t)0x9C4FBD92,
+	(q31_t)0x5049C999, (q31_t)0x9C303DCF, (q31_t)0x50229DA0,
+	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9BF16C7A,
+	(q31_t)0x4FD420A3, (q31_t)0x9BD21AF2, (q31_t)0x4FACCFAB,
+	(q31_t)0x9BB2D8DD, (q31_t)0x4F857268, (q31_t)0x9B93A640,
+	(q31_t)0x4F5E08E3, (q31_t)0x9B748320, (q31_t)0x4F369320,
+	(q31_t)0x9B556F80, (q31_t)0x4F0F1126, (q31_t)0x9B366B67,
+	(q31_t)0x4EE782FA, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
+	(q31_t)0x9AF891DB, (q31_t)0x4E984229, (q31_t)0x9AD9BC71,
+	(q31_t)0x4E708F8F, (q31_t)0x9ABAF6A0, (q31_t)0x4E48D0DC,
+	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A7D99DD,
+	(q31_t)0x4DF92F45, (q31_t)0x9A5F02F5, (q31_t)0x4DD14C6E,
+	(q31_t)0x9A407BB8, (q31_t)0x4DA95D96, (q31_t)0x9A22042C,
+	(q31_t)0x4D8162C4, (q31_t)0x9A039C56, (q31_t)0x4D595BFE,
+	(q31_t)0x99E5443A, (q31_t)0x4D31494B, (q31_t)0x99C6FBDE,
+	(q31_t)0x4D092AB0, (q31_t)0x99A8C344, (q31_t)0x4CE10034,
+	(q31_t)0x998A9A73, (q31_t)0x4CB8C9DD, (q31_t)0x996C816F,
+	(q31_t)0x4C9087B1, (q31_t)0x994E783C, (q31_t)0x4C6839B6,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9912955E,
+	(q31_t)0x4C177A6E, (q31_t)0x98F4BBBC, (q31_t)0x4BEF092D,
+	(q31_t)0x98D6F1FE, (q31_t)0x4BC68C36, (q31_t)0x98B93828,
+	(q31_t)0x4B9E038F, (q31_t)0x989B8E3F, (q31_t)0x4B756F3F,
+	(q31_t)0x987DF449, (q31_t)0x4B4CCF4D, (q31_t)0x98606A48,
+	(q31_t)0x4B2423BD, (q31_t)0x9842F043, (q31_t)0x4AFB6C97,
+	(q31_t)0x9825863D, (q31_t)0x4AD2A9E1, (q31_t)0x98082C3B,
+	(q31_t)0x4AA9DBA1, (q31_t)0x97EAE241, (q31_t)0x4A8101DE,
+	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x97B07E7A,
+	(q31_t)0x4A2F2BE5, (q31_t)0x979364B5, (q31_t)0x4A062FBD,
+	(q31_t)0x97765B0A, (q31_t)0x49DD282A, (q31_t)0x9759617E,
+	(q31_t)0x49B41533, (q31_t)0x973C7816, (q31_t)0x498AF6DE,
+	(q31_t)0x971F9ED6, (q31_t)0x4961CD32, (q31_t)0x9702D5C2,
+	(q31_t)0x49389836, (q31_t)0x96E61CDF, (q31_t)0x490F57EE,
+	(q31_t)0x96C97431, (q31_t)0x48E60C62, (q31_t)0x96ACDBBD,
+	(q31_t)0x48BCB598, (q31_t)0x96905387, (q31_t)0x48935397,
+	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x965773E7,
+	(q31_t)0x48406E07, (q31_t)0x963B1C85, (q31_t)0x4816EA85,
+	(q31_t)0x961ED573, (q31_t)0x47ED5BE6, (q31_t)0x96029EB5,
+	(q31_t)0x47C3C22E, (q31_t)0x95E6784F, (q31_t)0x479A1D66,
+	(q31_t)0x95CA6246, (q31_t)0x47706D93, (q31_t)0x95AE5C9E,
+	(q31_t)0x4746B2BC, (q31_t)0x9592675B, (q31_t)0x471CECE6,
+	(q31_t)0x95768282, (q31_t)0x46F31C1A, (q31_t)0x955AAE17,
+	(q31_t)0x46C9405C, (q31_t)0x953EEA1E, (q31_t)0x469F59B4,
+	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x95079393,
+	(q31_t)0x464B6BBD, (q31_t)0x94EC010B, (q31_t)0x4621647C,
+	(q31_t)0x94D07F05, (q31_t)0x45F7526B, (q31_t)0x94B50D87,
+	(q31_t)0x45CD358F, (q31_t)0x9499AC95, (q31_t)0x45A30DF0,
+	(q31_t)0x947E5C32, (q31_t)0x4578DB93, (q31_t)0x94631C64,
+	(q31_t)0x454E9E80, (q31_t)0x9447ED2F, (q31_t)0x452456BC,
+	(q31_t)0x942CCE95, (q31_t)0x44FA044F, (q31_t)0x9411C09D,
+	(q31_t)0x44CFA73F, (q31_t)0x93F6C34A, (q31_t)0x44A53F93,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x93C0FAA2,
+	(q31_t)0x4450507E, (q31_t)0x93A62F56, (q31_t)0x4425C923,
+	(q31_t)0x938B74C0, (q31_t)0x43FB3745, (q31_t)0x9370CAE4,
+	(q31_t)0x43D09AEC, (q31_t)0x935631C5, (q31_t)0x43A5F41E,
+	(q31_t)0x933BA968, (q31_t)0x437B42E1, (q31_t)0x932131D1,
+	(q31_t)0x4350873C, (q31_t)0x9306CB04, (q31_t)0x4325C135,
+	(q31_t)0x92EC7505, (q31_t)0x42FAF0D4, (q31_t)0x92D22FD8,
+	(q31_t)0x42D0161E, (q31_t)0x92B7FB82, (q31_t)0x42A5311A,
+	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9283C567,
+	(q31_t)0x424F4845, (q31_t)0x9269C3AC, (q31_t)0x42244480,
+	(q31_t)0x924FD2D6, (q31_t)0x41F93688, (q31_t)0x9235F2EB,
+	(q31_t)0x41CE1E64, (q31_t)0x921C23EE, (q31_t)0x41A2FC1A,
+	(q31_t)0x920265E4, (q31_t)0x4177CFB0, (q31_t)0x91E8B8D0,
+	(q31_t)0x414C992E, (q31_t)0x91CF1CB6, (q31_t)0x4121589A,
+	(q31_t)0x91B5919A, (q31_t)0x40F60DFB, (q31_t)0x919C1780,
+	(q31_t)0x40CAB957, (q31_t)0x9182AE6C, (q31_t)0x409F5AB6,
+	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x91500F67,
+	(q31_t)0x40487F93, (q31_t)0x9136D97D, (q31_t)0x401D0320,
+	(q31_t)0x911DB4A8, (q31_t)0x3FF17CCA, (q31_t)0x9104A0ED,
+	(q31_t)0x3FC5EC97, (q31_t)0x90EB9E50, (q31_t)0x3F9A528F,
+	(q31_t)0x90D2ACD3, (q31_t)0x3F6EAEB8, (q31_t)0x90B9CC7C,
+	(q31_t)0x3F430118, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
+	(q31_t)0x90883F4C, (q31_t)0x3EEB889C, (q31_t)0x906F927B,
+	(q31_t)0x3EBFBDCC, (q31_t)0x9056F6DF, (q31_t)0x3E93E94F,
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+	(q31_t)0x3E3C2369, (q31_t)0x900D8B69, (q31_t)0x3E10320D,
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+	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x80ACE9AB,
+	(q31_t)0x0D21DC87, (q31_t)0x80A7CB49, (q31_t)0x0CEFDB75,
+	(q31_t)0x80A2C08B, (q31_t)0x0CBDD865, (q31_t)0x809DC970,
+	(q31_t)0x0C8BD35E, (q31_t)0x8098E5FB, (q31_t)0x0C59CC67,
+	(q31_t)0x8094162B, (q31_t)0x0C27C389, (q31_t)0x808F5A02,
+	(q31_t)0x0BF5B8CB, (q31_t)0x808AB180, (q31_t)0x0BC3AC35,
+	(q31_t)0x80861CA5, (q31_t)0x0B919DCE, (q31_t)0x80819B74,
+	(q31_t)0x0B5F8D9F, (q31_t)0x807D2DEB, (q31_t)0x0B2D7BAE,
+	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80748DD9,
+	(q31_t)0x0AC952AA, (q31_t)0x80705B50, (q31_t)0x0A973BA5,
+	(q31_t)0x806C3C73, (q31_t)0x0A6522FE, (q31_t)0x80683143,
+	(q31_t)0x0A3308BC, (q31_t)0x806439C0, (q31_t)0x0A00ECE8,
+	(q31_t)0x806055EA, (q31_t)0x09CECF89, (q31_t)0x805C85C3,
+	(q31_t)0x099CB0A7, (q31_t)0x8058C94C, (q31_t)0x096A9049,
+	(q31_t)0x80552083, (q31_t)0x09386E77, (q31_t)0x80518B6B,
+	(q31_t)0x09064B3A, (q31_t)0x804E0A03, (q31_t)0x08D42698,
+	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x80474248,
+	(q31_t)0x086FD947, (q31_t)0x8043FBF6, (q31_t)0x083DB0A7,
+	(q31_t)0x8040C956, (q31_t)0x080B86C1, (q31_t)0x803DAA69,
+	(q31_t)0x07D95B9E, (q31_t)0x803A9F31, (q31_t)0x07A72F45,
+	(q31_t)0x8037A7AC, (q31_t)0x077501BE, (q31_t)0x8034C3DC,
+	(q31_t)0x0742D310, (q31_t)0x8031F3C1, (q31_t)0x0710A344,
+	(q31_t)0x802F375C, (q31_t)0x06DE7261, (q31_t)0x802C8EAD,
+	(q31_t)0x06AC406F, (q31_t)0x8029F9B4, (q31_t)0x067A0D75,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80250AE7,
+	(q31_t)0x0615A48A, (q31_t)0x8022B113, (q31_t)0x05E36EA9,
+	(q31_t)0x80206AF8, (q31_t)0x05B137DF, (q31_t)0x801E3894,
+	(q31_t)0x057F0034, (q31_t)0x801C19E9, (q31_t)0x054CC7B0,
+	(q31_t)0x801A0EF7, (q31_t)0x051A8E5C, (q31_t)0x801817BF,
+	(q31_t)0x04E8543D, (q31_t)0x80163440, (q31_t)0x04B6195D,
+	(q31_t)0x8014647A, (q31_t)0x0483DDC3, (q31_t)0x8012A86F,
+	(q31_t)0x0451A176, (q31_t)0x8011001E, (q31_t)0x041F647F,
+	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x800DEAAC,
+	(q31_t)0x03BAE8B1, (q31_t)0x800C7D8C, (q31_t)0x0388A9E9,
+	(q31_t)0x800B2427, (q31_t)0x03566A96, (q31_t)0x8009DE7D,
+	(q31_t)0x03242ABF, (q31_t)0x8008AC90, (q31_t)0x02F1EA6B,
+	(q31_t)0x80078E5E, (q31_t)0x02BFA9A4, (q31_t)0x800683E8,
+	(q31_t)0x028D6870, (q31_t)0x80058D2E, (q31_t)0x025B26D7,
+	(q31_t)0x8004AA31, (q31_t)0x0228E4E1, (q31_t)0x8003DAF0,
+	(q31_t)0x01F6A296, (q31_t)0x80031F6C, (q31_t)0x01C45FFE,
+	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x8001E39B,
+	(q31_t)0x015FDA03, (q31_t)0x8001634D, (q31_t)0x012D96B0,
+	(q31_t)0x8000F6BD, (q31_t)0x00FB532F, (q31_t)0x80009DE9,
+	(q31_t)0x00C90F88, (q31_t)0x800058D3, (q31_t)0x0096CBC1,
+	(q31_t)0x8000277A, (q31_t)0x006487E3, (q31_t)0x800009DE,
+	(q31_t)0x003243F5, (q31_t)0x80000000, (q31_t)0x00000000,
+	(q31_t)0x800009DE, (q31_t)0xFFCDBC0A, (q31_t)0x8000277A,
+	(q31_t)0xFF9B781D, (q31_t)0x800058D3, (q31_t)0xFF69343E,
+	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x8000F6BD,
+	(q31_t)0xFF04ACD0, (q31_t)0x8001634D, (q31_t)0xFED2694F,
+	(q31_t)0x8001E39B, (q31_t)0xFEA025FC, (q31_t)0x800277A5,
+	(q31_t)0xFE6DE2E0, (q31_t)0x80031F6C, (q31_t)0xFE3BA001,
+	(q31_t)0x8003DAF0, (q31_t)0xFE095D69, (q31_t)0x8004AA31,
+	(q31_t)0xFDD71B1E, (q31_t)0x80058D2E, (q31_t)0xFDA4D928,
+	(q31_t)0x800683E8, (q31_t)0xFD72978F, (q31_t)0x80078E5E,
+	(q31_t)0xFD40565B, (q31_t)0x8008AC90, (q31_t)0xFD0E1594,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800B2427,
+	(q31_t)0xFCA99569, (q31_t)0x800C7D8C, (q31_t)0xFC775616,
+	(q31_t)0x800DEAAC, (q31_t)0xFC45174E, (q31_t)0x800F6B88,
+	(q31_t)0xFC12D919, (q31_t)0x8011001E, (q31_t)0xFBE09B80,
+	(q31_t)0x8012A86F, (q31_t)0xFBAE5E89, (q31_t)0x8014647A,
+	(q31_t)0xFB7C223C, (q31_t)0x80163440, (q31_t)0xFB49E6A2,
+	(q31_t)0x801817BF, (q31_t)0xFB17ABC2, (q31_t)0x801A0EF7,
+	(q31_t)0xFAE571A4, (q31_t)0x801C19E9, (q31_t)0xFAB3384F,
+	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x80206AF8,
+	(q31_t)0xFA4EC820, (q31_t)0x8022B113, (q31_t)0xFA1C9156,
+	(q31_t)0x80250AE7, (q31_t)0xF9EA5B75, (q31_t)0x80277872,
+	(q31_t)0xF9B82683, (q31_t)0x8029F9B4, (q31_t)0xF985F28A,
+	(q31_t)0x802C8EAD, (q31_t)0xF953BF90, (q31_t)0x802F375C,
+	(q31_t)0xF9218D9E, (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB,
+	(q31_t)0x8034C3DC, (q31_t)0xF8BD2CEF, (q31_t)0x8037A7AC,
+	(q31_t)0xF88AFE41, (q31_t)0x803A9F31, (q31_t)0xF858D0BA,
+	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8040C956,
+	(q31_t)0xF7F4793E, (q31_t)0x8043FBF6, (q31_t)0xF7C24F58,
+	(q31_t)0x80474248, (q31_t)0xF79026B8, (q31_t)0x804A9C4D,
+	(q31_t)0xF75DFF65, (q31_t)0x804E0A03, (q31_t)0xF72BD967,
+	(q31_t)0x80518B6B, (q31_t)0xF6F9B4C5, (q31_t)0x80552083,
+	(q31_t)0xF6C79188, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
+	(q31_t)0x805C85C3, (q31_t)0xF6634F58, (q31_t)0x806055EA,
+	(q31_t)0xF6313076, (q31_t)0x806439C0, (q31_t)0xF5FF1317,
+	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x806C3C73,
+	(q31_t)0xF59ADD01, (q31_t)0x80705B50, (q31_t)0xF568C45A,
+	(q31_t)0x80748DD9, (q31_t)0xF536AD55, (q31_t)0x8078D40D,
+	(q31_t)0xF50497FA, (q31_t)0x807D2DEB, (q31_t)0xF4D28451,
+	(q31_t)0x80819B74, (q31_t)0xF4A07260, (q31_t)0x80861CA5,
+	(q31_t)0xF46E6231, (q31_t)0x808AB180, (q31_t)0xF43C53CA,
+	(q31_t)0x808F5A02, (q31_t)0xF40A4734, (q31_t)0x8094162B,
+	(q31_t)0xF3D83C76, (q31_t)0x8098E5FB, (q31_t)0xF3A63398,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80A2C08B,
+	(q31_t)0xF342279A, (q31_t)0x80A7CB49, (q31_t)0xF310248A,
+	(q31_t)0x80ACE9AB, (q31_t)0xF2DE2378, (q31_t)0x80B21BAF,
+	(q31_t)0xF2AC246D, (q31_t)0x80B76155, (q31_t)0xF27A2770,
+	(q31_t)0x80BCBA9C, (q31_t)0xF2482C89, (q31_t)0x80C22783,
+	(q31_t)0xF21633C0, (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C,
+	(q31_t)0x80CD3C2F, (q31_t)0xF1B248A5, (q31_t)0x80D2E3F1,
+	(q31_t)0xF1805662, (q31_t)0x80D89F51, (q31_t)0xF14E665C,
+	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80E450E2,
+	(q31_t)0xF0EA8D23, (q31_t)0x80EA4712, (q31_t)0xF0B8A401,
+	(q31_t)0x80F050DB, (q31_t)0xF086BD39, (q31_t)0x80F66E3C,
+	(q31_t)0xF054D8D4, (q31_t)0x80FC9F35, (q31_t)0xF022F6DA,
+	(q31_t)0x8102E3C3, (q31_t)0xEFF11752, (q31_t)0x81093BE8,
+	(q31_t)0xEFBF3A44, (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8,
+	(q31_t)0x811626EC, (q31_t)0xEF5B87B5, (q31_t)0x811CB9CA,
+	(q31_t)0xEF29B243, (q31_t)0x81236039, (q31_t)0xEEF7DF6A,
+	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8130E7C8,
+	(q31_t)0xEE9441A0, (q31_t)0x8137C8E6, (q31_t)0xEE6276BF,
+	(q31_t)0x813EBD90, (q31_t)0xEE30AE95, (q31_t)0x8145C5C6,
+	(q31_t)0xEDFEE92B, (q31_t)0x814CE188, (q31_t)0xEDCD2687,
+	(q31_t)0x815410D3, (q31_t)0xED9B66B2, (q31_t)0x815B53A8,
+	(q31_t)0xED69A9B2, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
+	(q31_t)0x816A13E6, (q31_t)0xED063855, (q31_t)0x8171914E,
+	(q31_t)0xECD48406, (q31_t)0x8179223A, (q31_t)0xECA2D2AC,
+	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81887E9A,
+	(q31_t)0xEC3F78F5, (q31_t)0x81904A0C, (q31_t)0xEC0DD0A8,
+	(q31_t)0x819828FD, (q31_t)0xEBDC2B6D, (q31_t)0x81A01B6C,
+	(q31_t)0xEBAA894E, (q31_t)0x81A82159, (q31_t)0xEB78EA52,
+	(q31_t)0x81B03AC1, (q31_t)0xEB474E80, (q31_t)0x81B867A4,
+	(q31_t)0xEB15B5E0, (q31_t)0x81C0A801, (q31_t)0xEAE4207A,
+	(q31_t)0x81C8FBD5, (q31_t)0xEAB28E55, (q31_t)0x81D16320,
+	(q31_t)0xEA80FF79, (q31_t)0x81D9DDE1, (q31_t)0xEA4F73EE,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x81EB0DBD,
+	(q31_t)0xE9EC66E8, (q31_t)0x81F3C2D7, (q31_t)0xE9BAE57C,
+	(q31_t)0x81FC8B60, (q31_t)0xE9896780, (q31_t)0x82056758,
+	(q31_t)0xE957ECFB, (q31_t)0x820E56BE, (q31_t)0xE92675F4,
+	(q31_t)0x8217598F, (q31_t)0xE8F50273, (q31_t)0x82206FCB,
+	(q31_t)0xE8C3927F, (q31_t)0x82299971, (q31_t)0xE8922621,
+	(q31_t)0x8232D67E, (q31_t)0xE860BD60, (q31_t)0x823C26F2,
+	(q31_t)0xE82F5844, (q31_t)0x82458ACB, (q31_t)0xE7FDF6D3,
+	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x82588CA6,
+	(q31_t)0xE79B3F16, (q31_t)0x82622AA5, (q31_t)0xE769E8D8,
+	(q31_t)0x826BDC04, (q31_t)0xE7389664, (q31_t)0x8275A0C0,
+	(q31_t)0xE70747C3, (q31_t)0x827F78D8, (q31_t)0xE6D5FCFC,
+	(q31_t)0x8289644A, (q31_t)0xE6A4B616, (q31_t)0x82936316,
+	(q31_t)0xE6737319, (q31_t)0x829D753A, (q31_t)0xE642340D,
+	(q31_t)0x82A79AB3, (q31_t)0xE610F8F9, (q31_t)0x82B1D381,
+	(q31_t)0xE5DFC1E4, (q31_t)0x82BC1FA1, (q31_t)0xE5AE8ED8,
+	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82D0F1D5,
+	(q31_t)0xE54C34F3, (q31_t)0x82DB77E5, (q31_t)0xE51B0E2A,
+	(q31_t)0x82E61141, (q31_t)0xE4E9EB86, (q31_t)0x82F0BDE8,
+	(q31_t)0xE4B8CD10, (q31_t)0x82FB7DD8, (q31_t)0xE487B2CF,
+	(q31_t)0x8306510F, (q31_t)0xE4569CCB, (q31_t)0x8311378C,
+	(q31_t)0xE4258B0A, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
+	(q31_t)0x83273E52, (q31_t)0xE3C37473, (q31_t)0x83325E97,
+	(q31_t)0xE3926FAC, (q31_t)0x833D921A, (q31_t)0xE3616F47,
+	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x835432D8,
+	(q31_t)0xE2FF7BC3, (q31_t)0x835FA00E, (q31_t)0xE2CE88B2,
+	(q31_t)0x836B207D, (q31_t)0xE29D9A22, (q31_t)0x8376B422,
+	(q31_t)0xE26CB01A, (q31_t)0x83825AFB, (q31_t)0xE23BCAA2,
+	(q31_t)0x838E1507, (q31_t)0xE20AE9C1, (q31_t)0x8399E244,
+	(q31_t)0xE1DA0D7E, (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1,
+	(q31_t)0x83B1B649, (q31_t)0xE17862F3, (q31_t)0x83BDBD0D,
+	(q31_t)0xE14794B9, (q31_t)0x83C9D6FB, (q31_t)0xE116CB3D,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x83E2444D,
+	(q31_t)0xE0B54698, (q31_t)0x83EE97AC, (q31_t)0xE0848B7F,
+	(q31_t)0x83FAFE2E, (q31_t)0xE053D541, (q31_t)0x840777CF,
+	(q31_t)0xE02323E5, (q31_t)0x8414048F, (q31_t)0xDFF27773,
+	(q31_t)0x8420A46B, (q31_t)0xDFC1CFF2, (q31_t)0x842D5761,
+	(q31_t)0xDF912D6A, (q31_t)0x843A1D70, (q31_t)0xDF608FE3,
+	(q31_t)0x8446F695, (q31_t)0xDF2FF764, (q31_t)0x8453E2CE,
+	(q31_t)0xDEFF63F4, (q31_t)0x8460E21A, (q31_t)0xDECED59B,
+	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x847B19E1,
+	(q31_t)0xDE6DC84B, (q31_t)0x84885257, (q31_t)0xDE3D4963,
+	(q31_t)0x84959DD9, (q31_t)0xDE0CCFB1, (q31_t)0x84A2FC62,
+	(q31_t)0xDDDC5B3A, (q31_t)0x84B06DF1, (q31_t)0xDDABEC07,
+	(q31_t)0x84BDF285, (q31_t)0xDD7B8220, (q31_t)0x84CB8A1B,
+	(q31_t)0xDD4B1D8B, (q31_t)0x84D934B0, (q31_t)0xDD1ABE51,
+	(q31_t)0x84E6F244, (q31_t)0xDCEA6478, (q31_t)0x84F4C2D3,
+	(q31_t)0xDCBA1008, (q31_t)0x8502A65C, (q31_t)0xDC89C108,
+	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x851EA652,
+	(q31_t)0xDC293379, (q31_t)0x852CC2BA, (q31_t)0xDBF8F4F8,
+	(q31_t)0x853AF214, (q31_t)0xDBC8BC05, (q31_t)0x8549345C,
+	(q31_t)0xDB9888A8, (q31_t)0x85578991, (q31_t)0xDB685AE8,
+	(q31_t)0x8565F1B0, (q31_t)0xDB3832CD, (q31_t)0x85746CB7,
+	(q31_t)0xDB08105E, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
+	(q31_t)0x85919B75, (q31_t)0xDAA7DCA1, (q31_t)0x85A04F28,
+	(q31_t)0xDA77CB62, (q31_t)0x85AF15B9, (q31_t)0xDA47BFED,
+	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85CCDB70,
+	(q31_t)0xD9E7BA7E, (q31_t)0x85DBDA91, (q31_t)0xD9B7C093,
+	(q31_t)0x85EAEC88, (q31_t)0xD987CC8F, (q31_t)0x85FA1152,
+	(q31_t)0xD957DE7A, (q31_t)0x860948EE, (q31_t)0xD927F65B,
+	(q31_t)0x86189359, (q31_t)0xD8F81439, (q31_t)0x8627F090,
+	(q31_t)0xD8C8381C, (q31_t)0x86376092, (q31_t)0xD898620C,
+	(q31_t)0x8646E35B, (q31_t)0xD868920F, (q31_t)0x865678EA,
+	(q31_t)0xD838C82D, (q31_t)0x8666213C, (q31_t)0xD809046D,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x8685AA1F,
+	(q31_t)0xD7A98F73, (q31_t)0x86958AAB, (q31_t)0xD779DE46,
+	(q31_t)0x86A57DF1, (q31_t)0xD74A335A, (q31_t)0x86B583EE,
+	(q31_t)0xD71A8EB5, (q31_t)0x86C59C9F, (q31_t)0xD6EAF05E,
+	(q31_t)0x86D5C802, (q31_t)0xD6BB585D, (q31_t)0x86E60614,
+	(q31_t)0xD68BC6BA, (q31_t)0x86F656D3, (q31_t)0xD65C3B7B,
+	(q31_t)0x8706BA3C, (q31_t)0xD62CB6A7, (q31_t)0x8717304E,
+	(q31_t)0xD5FD3847, (q31_t)0x8727B904, (q31_t)0xD5CDC062,
+	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x87490257,
+	(q31_t)0xD56EE424, (q31_t)0x8759C2EF, (q31_t)0xD53F7FDA,
+	(q31_t)0x876A9621, (q31_t)0xD5102227, (q31_t)0x877B7BEC,
+	(q31_t)0xD4E0CB14, (q31_t)0x878C744C, (q31_t)0xD4B17AA7,
+	(q31_t)0x879D7F40, (q31_t)0xD48230E8, (q31_t)0x87AE9CC5,
+	(q31_t)0xD452EDDE, (q31_t)0x87BFCCD7, (q31_t)0xD423B190,
+	(q31_t)0x87D10F75, (q31_t)0xD3F47C06, (q31_t)0x87E2649B,
+	(q31_t)0xD3C54D46, (q31_t)0x87F3CC47, (q31_t)0xD3962559,
+	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x8816D327,
+	(q31_t)0xD337EA12, (q31_t)0x88287255, (q31_t)0xD308D6C6,
+	(q31_t)0x883A23FE, (q31_t)0xD2D9CA6A, (q31_t)0x884BE820,
+	(q31_t)0xD2AAC504, (q31_t)0x885DBEB7, (q31_t)0xD27BC69C,
+	(q31_t)0x886FA7C2, (q31_t)0xD24CCF38, (q31_t)0x8881A33C,
+	(q31_t)0xD21DDEE1, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
+	(q31_t)0x88A5D177, (q31_t)0xD1C01374, (q31_t)0x88B80431,
+	(q31_t)0xD191386D, (q31_t)0x88CA4951, (q31_t)0xD162648F,
+	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x88EF0AB4,
+	(q31_t)0xD104D26B, (q31_t)0x890186F1, (q31_t)0xD0D61433,
+	(q31_t)0x89141589, (q31_t)0xD0A75D42, (q31_t)0x8926B677,
+	(q31_t)0xD078AD9D, (q31_t)0x893969B9, (q31_t)0xD04A054D,
+	(q31_t)0x894C2F4C, (q31_t)0xD01B6459, (q31_t)0x895F072D,
+	(q31_t)0xCFECCAC7, (q31_t)0x8971F15A, (q31_t)0xCFBE389F,
+	(q31_t)0x8984EDCF, (q31_t)0xCF8FADE8, (q31_t)0x8997FC89,
+	(q31_t)0xCF612AAA, (q31_t)0x89AB1D86, (q31_t)0xCF32AEEB,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x89D1963C,
+	(q31_t)0xCED5CE08, (q31_t)0x89E4EDEE, (q31_t)0xCEA768F2,
+	(q31_t)0x89F857D8, (q31_t)0xCE790B78, (q31_t)0x8A0BD3F5,
+	(q31_t)0xCE4AB5A2, (q31_t)0x8A1F6242, (q31_t)0xCE1C6776,
+	(q31_t)0x8A3302BD, (q31_t)0xCDEE20FC, (q31_t)0x8A46B563,
+	(q31_t)0xCDBFE23A, (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38,
+	(q31_t)0x8A6E5122, (q31_t)0xCD637BFD, (q31_t)0x8A823A35,
+	(q31_t)0xCD355490, (q31_t)0x8A963567, (q31_t)0xCD0734F8,
+	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8ABE6219,
+	(q31_t)0xCCAB0D65, (q31_t)0x8AD29393, (q31_t)0xCC7D0577,
+	(q31_t)0x8AE6D71F, (q31_t)0xCC4F057B, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCC210D78, (q31_t)0x8B0F9461, (q31_t)0xCBF31D75,
+	(q31_t)0x8B240E10, (q31_t)0xCBC53578, (q31_t)0x8B3899C5,
+	(q31_t)0xCB975589, (q31_t)0x8B4D377C, (q31_t)0xCB697DB0,
+	(q31_t)0x8B61E732, (q31_t)0xCB3BADF2, (q31_t)0x8B76A8E4,
+	(q31_t)0xCB0DE658, (q31_t)0x8B8B7C8F, (q31_t)0xCAE026E8,
+	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BB559C1,
+	(q31_t)0xCA84C0A2, (q31_t)0x8BCA6342, (q31_t)0xCA5719DB,
+	(q31_t)0x8BDF7EAF, (q31_t)0xCA297B5A, (q31_t)0x8BF4AC05,
+	(q31_t)0xC9FBE527, (q31_t)0x8C09EB40, (q31_t)0xC9CE5748,
+	(q31_t)0x8C1F3C5C, (q31_t)0xC9A0D1C4, (q31_t)0x8C349F58,
+	(q31_t)0xC97354A3, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
+	(q31_t)0x8C5F9ADD, (q31_t)0xC91873A5, (q31_t)0x8C753361,
+	(q31_t)0xC8EB0FD6, (q31_t)0x8C8ADDB6, (q31_t)0xC8BDB485,
+	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CB667C7,
+	(q31_t)0xC863177B, (q31_t)0x8CCC477D, (q31_t)0xC835D5D0,
+	(q31_t)0x8CE238F6, (q31_t)0xC8089CBF, (q31_t)0x8CF83C30,
+	(q31_t)0xC7DB6C50, (q31_t)0x8D0E5127, (q31_t)0xC7AE4489,
+	(q31_t)0x8D2477D8, (q31_t)0xC7812571, (q31_t)0x8D3AB03F,
+	(q31_t)0xC7540F10, (q31_t)0x8D50FA59, (q31_t)0xC727016C,
+	(q31_t)0x8D675623, (q31_t)0xC6F9FC8D, (q31_t)0x8D7DC399,
+	(q31_t)0xC6CD0079, (q31_t)0x8D9442B7, (q31_t)0xC6A00D36,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8DC175E0,
+	(q31_t)0xC6464144, (q31_t)0x8DD829E4, (q31_t)0xC61968A2,
+	(q31_t)0x8DEEEF82, (q31_t)0xC5EC98ED, (q31_t)0x8E05C6B7,
+	(q31_t)0xC5BFD22E, (q31_t)0x8E1CAF80, (q31_t)0xC593146A,
+	(q31_t)0x8E33A9D9, (q31_t)0xC5665FA8, (q31_t)0x8E4AB5BF,
+	(q31_t)0xC539B3F0, (q31_t)0x8E61D32D, (q31_t)0xC50D1148,
+	(q31_t)0x8E790222, (q31_t)0xC4E077B8, (q31_t)0x8E904298,
+	(q31_t)0xC4B3E746, (q31_t)0x8EA7948C, (q31_t)0xC4875FF8,
+	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8ED66CE1,
+	(q31_t)0xC42E6CE8, (q31_t)0x8EEDF33B, (q31_t)0xC4020132,
+	(q31_t)0x8F058B04, (q31_t)0xC3D59EBD, (q31_t)0x8F1D343A,
+	(q31_t)0xC3A9458F, (q31_t)0x8F34EED8, (q31_t)0xC37CF5B0,
+	(q31_t)0x8F4CBADB, (q31_t)0xC350AF25, (q31_t)0x8F64983F,
+	(q31_t)0xC32471F6, (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A,
+	(q31_t)0x8F94871D, (q31_t)0xC2CC13C7, (q31_t)0x8FAC988E,
+	(q31_t)0xC29FF2D4, (q31_t)0x8FC4BB53, (q31_t)0xC273DB58,
+	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x8FF534C4,
+	(q31_t)0xC21BC8E0, (q31_t)0x900D8B69, (q31_t)0xC1EFCDF2,
+	(q31_t)0x9025F352, (q31_t)0xC1C3DC96, (q31_t)0x903E6C7A,
+	(q31_t)0xC197F4D3, (q31_t)0x9056F6DF, (q31_t)0xC16C16B0,
+	(q31_t)0x906F927B, (q31_t)0xC1404233, (q31_t)0x90883F4C,
+	(q31_t)0xC1147763, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
+	(q31_t)0x90B9CC7C, (q31_t)0xC0BCFEE7, (q31_t)0x90D2ACD3,
+	(q31_t)0xC0915147, (q31_t)0x90EB9E50, (q31_t)0xC065AD70,
+	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x911DB4A8,
+	(q31_t)0xC00E8335, (q31_t)0x9136D97D, (q31_t)0xBFE2FCDF,
+	(q31_t)0x91500F67, (q31_t)0xBFB7806C, (q31_t)0x91695663,
+	(q31_t)0xBF8C0DE2, (q31_t)0x9182AE6C, (q31_t)0xBF60A54A,
+	(q31_t)0x919C1780, (q31_t)0xBF3546A8, (q31_t)0x91B5919A,
+	(q31_t)0xBF09F204, (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765,
+	(q31_t)0x91E8B8D0, (q31_t)0xBEB366D1, (q31_t)0x920265E4,
+	(q31_t)0xBE88304F, (q31_t)0x921C23EE, (q31_t)0xBE5D03E5,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x924FD2D6,
+	(q31_t)0xBE06C977, (q31_t)0x9269C3AC, (q31_t)0xBDDBBB7F,
+	(q31_t)0x9283C567, (q31_t)0xBDB0B7BA, (q31_t)0x929DD805,
+	(q31_t)0xBD85BE2F, (q31_t)0x92B7FB82, (q31_t)0xBD5ACEE5,
+	(q31_t)0x92D22FD8, (q31_t)0xBD2FE9E1, (q31_t)0x92EC7505,
+	(q31_t)0xBD050F2C, (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA,
+	(q31_t)0x932131D1, (q31_t)0xBCAF78C3, (q31_t)0x933BA968,
+	(q31_t)0xBC84BD1E, (q31_t)0x935631C5, (q31_t)0xBC5A0BE1,
+	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x938B74C0,
+	(q31_t)0xBC04C8BA, (q31_t)0x93A62F56, (q31_t)0xBBDA36DC,
+	(q31_t)0x93C0FAA2, (q31_t)0xBBAFAF81, (q31_t)0x93DBD69F,
+	(q31_t)0xBB8532AF, (q31_t)0x93F6C34A, (q31_t)0xBB5AC06C,
+	(q31_t)0x9411C09D, (q31_t)0xBB3058C0, (q31_t)0x942CCE95,
+	(q31_t)0xBB05FBB0, (q31_t)0x9447ED2F, (q31_t)0xBADBA943,
+	(q31_t)0x94631C64, (q31_t)0xBAB1617F, (q31_t)0x947E5C32,
+	(q31_t)0xBA87246C, (q31_t)0x9499AC95, (q31_t)0xBA5CF210,
+	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x94D07F05,
+	(q31_t)0xBA08AD94, (q31_t)0x94EC010B, (q31_t)0xB9DE9B83,
+	(q31_t)0x95079393, (q31_t)0xB9B49442, (q31_t)0x9523369B,
+	(q31_t)0xB98A97D8, (q31_t)0x953EEA1E, (q31_t)0xB960A64B,
+	(q31_t)0x955AAE17, (q31_t)0xB936BFA3, (q31_t)0x95768282,
+	(q31_t)0xB90CE3E6, (q31_t)0x9592675B, (q31_t)0xB8E31319,
+	(q31_t)0x95AE5C9E, (q31_t)0xB8B94D44, (q31_t)0x95CA6246,
+	(q31_t)0xB88F926C, (q31_t)0x95E6784F, (q31_t)0xB865E299,
+	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x961ED573,
+	(q31_t)0xB812A419, (q31_t)0x963B1C85, (q31_t)0xB7E9157A,
+	(q31_t)0x965773E7, (q31_t)0xB7BF91F8, (q31_t)0x9673DB94,
+	(q31_t)0xB796199B, (q31_t)0x96905387, (q31_t)0xB76CAC68,
+	(q31_t)0x96ACDBBD, (q31_t)0xB7434A67, (q31_t)0x96C97431,
+	(q31_t)0xB719F39D, (q31_t)0x96E61CDF, (q31_t)0xB6F0A811,
+	(q31_t)0x9702D5C2, (q31_t)0xB6C767CA, (q31_t)0x971F9ED6,
+	(q31_t)0xB69E32CD, (q31_t)0x973C7816, (q31_t)0xB6750921,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x97765B0A,
+	(q31_t)0xB622D7D5, (q31_t)0x979364B5, (q31_t)0xB5F9D042,
+	(q31_t)0x97B07E7A, (q31_t)0xB5D0D41A, (q31_t)0x97CDA855,
+	(q31_t)0xB5A7E362, (q31_t)0x97EAE241, (q31_t)0xB57EFE21,
+	(q31_t)0x98082C3B, (q31_t)0xB556245E, (q31_t)0x9825863D,
+	(q31_t)0xB52D561E, (q31_t)0x9842F043, (q31_t)0xB5049368,
+	(q31_t)0x98606A48, (q31_t)0xB4DBDC42, (q31_t)0x987DF449,
+	(q31_t)0xB4B330B2, (q31_t)0x989B8E3F, (q31_t)0xB48A90C0,
+	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x98D6F1FE,
+	(q31_t)0xB43973C9, (q31_t)0x98F4BBBC, (q31_t)0xB410F6D2,
+	(q31_t)0x9912955E, (q31_t)0xB3E88591, (q31_t)0x99307EE0,
+	(q31_t)0xB3C0200C, (q31_t)0x994E783C, (q31_t)0xB397C649,
+	(q31_t)0x996C816F, (q31_t)0xB36F784E, (q31_t)0x998A9A73,
+	(q31_t)0xB3473622, (q31_t)0x99A8C344, (q31_t)0xB31EFFCB,
+	(q31_t)0x99C6FBDE, (q31_t)0xB2F6D54F, (q31_t)0x99E5443A,
+	(q31_t)0xB2CEB6B5, (q31_t)0x9A039C56, (q31_t)0xB2A6A401,
+	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A407BB8,
+	(q31_t)0xB256A26A, (q31_t)0x9A5F02F5, (q31_t)0xB22EB392,
+	(q31_t)0x9A7D99DD, (q31_t)0xB206D0BA, (q31_t)0x9A9C406D,
+	(q31_t)0xB1DEF9E8, (q31_t)0x9ABAF6A0, (q31_t)0xB1B72F23,
+	(q31_t)0x9AD9BC71, (q31_t)0xB18F7070, (q31_t)0x9AF891DB,
+	(q31_t)0xB167BDD6, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
+	(q31_t)0x9B366B67, (q31_t)0xB1187D05, (q31_t)0x9B556F80,
+	(q31_t)0xB0F0EEDA, (q31_t)0x9B748320, (q31_t)0xB0C96CDF,
+	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9BB2D8DD,
+	(q31_t)0xB07A8D97, (q31_t)0x9BD21AF2, (q31_t)0xB0533055,
+	(q31_t)0x9BF16C7A, (q31_t)0xB02BDF5C, (q31_t)0x9C10CD70,
+	(q31_t)0xB0049AB2, (q31_t)0x9C303DCF, (q31_t)0xAFDD625F,
+	(q31_t)0x9C4FBD92, (q31_t)0xAFB63667, (q31_t)0x9C6F4CB5,
+	(q31_t)0xAF8F16D0, (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1,
+	(q31_t)0x9CAE9907, (q31_t)0xAF40FCE0, (q31_t)0x9CCE562B,
+	(q31_t)0xAF1A0293, (q31_t)0x9CEE229C, (q31_t)0xAEF314BF,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D2DE94D,
+	(q31_t)0xAEA55E9D, (q31_t)0x9D4DE384, (q31_t)0xAE7E965B,
+	(q31_t)0x9D6DECF4, (q31_t)0xAE57DAAA, (q31_t)0x9D8E0596,
+	(q31_t)0xAE312B91, (q31_t)0x9DAE2D68, (q31_t)0xAE0A8916,
+	(q31_t)0x9DCE6462, (q31_t)0xADE3F33E, (q31_t)0x9DEEAA82,
+	(q31_t)0xADBD6A10, (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91,
+	(q31_t)0x9E2F641A, (q31_t)0xAD707DC8, (q31_t)0x9E4FD789,
+	(q31_t)0xAD4A1ABA, (q31_t)0x9E705A09, (q31_t)0xAD23C46D,
+	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9EB18C26,
+	(q31_t)0xACD73E30, (q31_t)0x9ED23BB9, (q31_t)0xACB10E4A,
+	(q31_t)0x9EF2FA48, (q31_t)0xAC8AEB3E, (q31_t)0x9F13C7D0,
+	(q31_t)0xAC64D510, (q31_t)0x9F34A449, (q31_t)0xAC3ECBC7,
+	(q31_t)0x9F558FB0, (q31_t)0xAC18CF68, (q31_t)0x9F7689FF,
+	(q31_t)0xABF2DFFA, (q31_t)0x9F979331, (q31_t)0xABCCFD82,
+	(q31_t)0x9FB8AB41, (q31_t)0xABA72806, (q31_t)0x9FD9D22A,
+	(q31_t)0xAB815F8C, (q31_t)0x9FFB07E7, (q31_t)0xAB5BA41A,
+	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA03D9FC7,
+	(q31_t)0xAB105464, (q31_t)0xA05F01E1, (q31_t)0xAAEAC02B,
+	(q31_t)0xA08072BA, (q31_t)0xAAC53912, (q31_t)0xA0A1F24C,
+	(q31_t)0xAA9FBF1D, (q31_t)0xA0C38094, (q31_t)0xAA7A5253,
+	(q31_t)0xA0E51D8C, (q31_t)0xAA54F2B9, (q31_t)0xA106C92E,
+	(q31_t)0xAA2FA055, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
+	(q31_t)0xA14A4C5E, (q31_t)0xA9E52347, (q31_t)0xA16C23E1,
+	(q31_t)0xA9BFF8A8, (q31_t)0xA18E09F9, (q31_t)0xA99ADB56,
+	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA1D201D7,
+	(q31_t)0xA950C8AF, (q31_t)0xA1F41391, (q31_t)0xA92BD366,
+	(q31_t)0xA21633CD, (q31_t)0xA906EB81, (q31_t)0xA2386283,
+	(q31_t)0xA8E21106, (q31_t)0xA25A9FB1, (q31_t)0xA8BD43FA,
+	(q31_t)0xA27CEB4F, (q31_t)0xA8988463, (q31_t)0xA29F4559,
+	(q31_t)0xA873D246, (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9,
+	(q31_t)0xA2E4249A, (q31_t)0xA82A9693, (q31_t)0xA306A9C7,
+	(q31_t)0xA8060D08, (q31_t)0xA3293D4B, (q31_t)0xA7E1910E,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA36E8F40,
+	(q31_t)0xA798C1E4, (q31_t)0xA3914DA7, (q31_t)0xA7746EC0,
+	(q31_t)0xA3B41A4F, (q31_t)0xA7502943, (q31_t)0xA3D6F533,
+	(q31_t)0xA72BF173, (q31_t)0xA3F9DE4D, (q31_t)0xA707C756,
+	(q31_t)0xA41CD598, (q31_t)0xA6E3AAF2, (q31_t)0xA43FDB0F,
+	(q31_t)0xA6BF9C4B, (q31_t)0xA462EEAC, (q31_t)0xA69B9B68,
+	(q31_t)0xA4861069, (q31_t)0xA677A84E, (q31_t)0xA4A94042,
+	(q31_t)0xA653C302, (q31_t)0xA4CC7E31, (q31_t)0xA62FEB8B,
+	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA513243B,
+	(q31_t)0xA5E8662F, (q31_t)0xA5368C4B, (q31_t)0xA5C4B855,
+	(q31_t)0xA55A025B, (q31_t)0xA5A11865, (q31_t)0xA57D8666,
+	(q31_t)0xA57D8666, (q31_t)0xA5A11865, (q31_t)0xA55A025B,
+	(q31_t)0xA5C4B855, (q31_t)0xA5368C4B, (q31_t)0xA5E8662F,
+	(q31_t)0xA513243B, (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31,
+	(q31_t)0xA62FEB8B, (q31_t)0xA4CC7E31, (q31_t)0xA653C302,
+	(q31_t)0xA4A94042, (q31_t)0xA677A84E, (q31_t)0xA4861069,
+	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6BF9C4B,
+	(q31_t)0xA43FDB0F, (q31_t)0xA6E3AAF2, (q31_t)0xA41CD598,
+	(q31_t)0xA707C756, (q31_t)0xA3F9DE4D, (q31_t)0xA72BF173,
+	(q31_t)0xA3D6F533, (q31_t)0xA7502943, (q31_t)0xA3B41A4F,
+	(q31_t)0xA7746EC0, (q31_t)0xA3914DA7, (q31_t)0xA798C1E4,
+	(q31_t)0xA36E8F40, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
+	(q31_t)0xA7E1910E, (q31_t)0xA3293D4B, (q31_t)0xA8060D08,
+	(q31_t)0xA306A9C7, (q31_t)0xA82A9693, (q31_t)0xA2E4249A,
+	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA873D246,
+	(q31_t)0xA29F4559, (q31_t)0xA8988463, (q31_t)0xA27CEB4F,
+	(q31_t)0xA8BD43FA, (q31_t)0xA25A9FB1, (q31_t)0xA8E21106,
+	(q31_t)0xA2386283, (q31_t)0xA906EB81, (q31_t)0xA21633CD,
+	(q31_t)0xA92BD366, (q31_t)0xA1F41391, (q31_t)0xA950C8AF,
+	(q31_t)0xA1D201D7, (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2,
+	(q31_t)0xA99ADB56, (q31_t)0xA18E09F9, (q31_t)0xA9BFF8A8,
+	(q31_t)0xA16C23E1, (q31_t)0xA9E52347, (q31_t)0xA14A4C5E,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA2FA055,
+	(q31_t)0xA106C92E, (q31_t)0xAA54F2B9, (q31_t)0xA0E51D8C,
+	(q31_t)0xAA7A5253, (q31_t)0xA0C38094, (q31_t)0xAA9FBF1D,
+	(q31_t)0xA0A1F24C, (q31_t)0xAAC53912, (q31_t)0xA08072BA,
+	(q31_t)0xAAEAC02B, (q31_t)0xA05F01E1, (q31_t)0xAB105464,
+	(q31_t)0xA03D9FC7, (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72,
+	(q31_t)0xAB5BA41A, (q31_t)0x9FFB07E7, (q31_t)0xAB815F8C,
+	(q31_t)0x9FD9D22A, (q31_t)0xABA72806, (q31_t)0x9FB8AB41,
+	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xABF2DFFA,
+	(q31_t)0x9F7689FF, (q31_t)0xAC18CF68, (q31_t)0x9F558FB0,
+	(q31_t)0xAC3ECBC7, (q31_t)0x9F34A449, (q31_t)0xAC64D510,
+	(q31_t)0x9F13C7D0, (q31_t)0xAC8AEB3E, (q31_t)0x9EF2FA48,
+	(q31_t)0xACB10E4A, (q31_t)0x9ED23BB9, (q31_t)0xACD73E30,
+	(q31_t)0x9EB18C26, (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94,
+	(q31_t)0xAD23C46D, (q31_t)0x9E705A09, (q31_t)0xAD4A1ABA,
+	(q31_t)0x9E4FD789, (q31_t)0xAD707DC8, (q31_t)0x9E2F641A,
+	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADBD6A10,
+	(q31_t)0x9DEEAA82, (q31_t)0xADE3F33E, (q31_t)0x9DCE6462,
+	(q31_t)0xAE0A8916, (q31_t)0x9DAE2D68, (q31_t)0xAE312B91,
+	(q31_t)0x9D8E0596, (q31_t)0xAE57DAAA, (q31_t)0x9D6DECF4,
+	(q31_t)0xAE7E965B, (q31_t)0x9D4DE384, (q31_t)0xAEA55E9D,
+	(q31_t)0x9D2DE94D, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
+	(q31_t)0xAEF314BF, (q31_t)0x9CEE229C, (q31_t)0xAF1A0293,
+	(q31_t)0x9CCE562B, (q31_t)0xAF40FCE0, (q31_t)0x9CAE9907,
+	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAF8F16D0,
+	(q31_t)0x9C6F4CB5, (q31_t)0xAFB63667, (q31_t)0x9C4FBD92,
+	(q31_t)0xAFDD625F, (q31_t)0x9C303DCF, (q31_t)0xB0049AB2,
+	(q31_t)0x9C10CD70, (q31_t)0xB02BDF5C, (q31_t)0x9BF16C7A,
+	(q31_t)0xB0533055, (q31_t)0x9BD21AF2, (q31_t)0xB07A8D97,
+	(q31_t)0x9BB2D8DD, (q31_t)0xB0A1F71C, (q31_t)0x9B93A640,
+	(q31_t)0xB0C96CDF, (q31_t)0x9B748320, (q31_t)0xB0F0EEDA,
+	(q31_t)0x9B556F80, (q31_t)0xB1187D05, (q31_t)0x9B366B67,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB167BDD6,
+	(q31_t)0x9AF891DB, (q31_t)0xB18F7070, (q31_t)0x9AD9BC71,
+	(q31_t)0xB1B72F23, (q31_t)0x9ABAF6A0, (q31_t)0xB1DEF9E8,
+	(q31_t)0x9A9C406D, (q31_t)0xB206D0BA, (q31_t)0x9A7D99DD,
+	(q31_t)0xB22EB392, (q31_t)0x9A5F02F5, (q31_t)0xB256A26A,
+	(q31_t)0x9A407BB8, (q31_t)0xB27E9D3B, (q31_t)0x9A22042C,
+	(q31_t)0xB2A6A401, (q31_t)0x9A039C56, (q31_t)0xB2CEB6B5,
+	(q31_t)0x99E5443A, (q31_t)0xB2F6D54F, (q31_t)0x99C6FBDE,
+	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB3473622,
+	(q31_t)0x998A9A73, (q31_t)0xB36F784E, (q31_t)0x996C816F,
+	(q31_t)0xB397C649, (q31_t)0x994E783C, (q31_t)0xB3C0200C,
+	(q31_t)0x99307EE0, (q31_t)0xB3E88591, (q31_t)0x9912955E,
+	(q31_t)0xB410F6D2, (q31_t)0x98F4BBBC, (q31_t)0xB43973C9,
+	(q31_t)0x98D6F1FE, (q31_t)0xB461FC70, (q31_t)0x98B93828,
+	(q31_t)0xB48A90C0, (q31_t)0x989B8E3F, (q31_t)0xB4B330B2,
+	(q31_t)0x987DF449, (q31_t)0xB4DBDC42, (q31_t)0x98606A48,
+	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB52D561E,
+	(q31_t)0x9825863D, (q31_t)0xB556245E, (q31_t)0x98082C3B,
+	(q31_t)0xB57EFE21, (q31_t)0x97EAE241, (q31_t)0xB5A7E362,
+	(q31_t)0x97CDA855, (q31_t)0xB5D0D41A, (q31_t)0x97B07E7A,
+	(q31_t)0xB5F9D042, (q31_t)0x979364B5, (q31_t)0xB622D7D5,
+	(q31_t)0x97765B0A, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
+	(q31_t)0xB6750921, (q31_t)0x973C7816, (q31_t)0xB69E32CD,
+	(q31_t)0x971F9ED6, (q31_t)0xB6C767CA, (q31_t)0x9702D5C2,
+	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB719F39D,
+	(q31_t)0x96C97431, (q31_t)0xB7434A67, (q31_t)0x96ACDBBD,
+	(q31_t)0xB76CAC68, (q31_t)0x96905387, (q31_t)0xB796199B,
+	(q31_t)0x9673DB94, (q31_t)0xB7BF91F8, (q31_t)0x965773E7,
+	(q31_t)0xB7E9157A, (q31_t)0x963B1C85, (q31_t)0xB812A419,
+	(q31_t)0x961ED573, (q31_t)0xB83C3DD1, (q31_t)0x96029EB5,
+	(q31_t)0xB865E299, (q31_t)0x95E6784F, (q31_t)0xB88F926C,
+	(q31_t)0x95CA6246, (q31_t)0xB8B94D44, (q31_t)0x95AE5C9E,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB90CE3E6,
+	(q31_t)0x95768282, (q31_t)0xB936BFA3, (q31_t)0x955AAE17,
+	(q31_t)0xB960A64B, (q31_t)0x953EEA1E, (q31_t)0xB98A97D8,
+	(q31_t)0x9523369B, (q31_t)0xB9B49442, (q31_t)0x95079393,
+	(q31_t)0xB9DE9B83, (q31_t)0x94EC010B, (q31_t)0xBA08AD94,
+	(q31_t)0x94D07F05, (q31_t)0xBA32CA70, (q31_t)0x94B50D87,
+	(q31_t)0xBA5CF210, (q31_t)0x9499AC95, (q31_t)0xBA87246C,
+	(q31_t)0x947E5C32, (q31_t)0xBAB1617F, (q31_t)0x94631C64,
+	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB05FBB0,
+	(q31_t)0x942CCE95, (q31_t)0xBB3058C0, (q31_t)0x9411C09D,
+	(q31_t)0xBB5AC06C, (q31_t)0x93F6C34A, (q31_t)0xBB8532AF,
+	(q31_t)0x93DBD69F, (q31_t)0xBBAFAF81, (q31_t)0x93C0FAA2,
+	(q31_t)0xBBDA36DC, (q31_t)0x93A62F56, (q31_t)0xBC04C8BA,
+	(q31_t)0x938B74C0, (q31_t)0xBC2F6513, (q31_t)0x9370CAE4,
+	(q31_t)0xBC5A0BE1, (q31_t)0x935631C5, (q31_t)0xBC84BD1E,
+	(q31_t)0x933BA968, (q31_t)0xBCAF78C3, (q31_t)0x932131D1,
+	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD050F2C,
+	(q31_t)0x92EC7505, (q31_t)0xBD2FE9E1, (q31_t)0x92D22FD8,
+	(q31_t)0xBD5ACEE5, (q31_t)0x92B7FB82, (q31_t)0xBD85BE2F,
+	(q31_t)0x929DD805, (q31_t)0xBDB0B7BA, (q31_t)0x9283C567,
+	(q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC, (q31_t)0xBE06C977,
+	(q31_t)0x924FD2D6, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
+	(q31_t)0xBE5D03E5, (q31_t)0x921C23EE, (q31_t)0xBE88304F,
+	(q31_t)0x920265E4, (q31_t)0xBEB366D1, (q31_t)0x91E8B8D0,
+	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF09F204,
+	(q31_t)0x91B5919A, (q31_t)0xBF3546A8, (q31_t)0x919C1780,
+	(q31_t)0xBF60A54A, (q31_t)0x9182AE6C, (q31_t)0xBF8C0DE2,
+	(q31_t)0x91695663, (q31_t)0xBFB7806C, (q31_t)0x91500F67,
+	(q31_t)0xBFE2FCDF, (q31_t)0x9136D97D, (q31_t)0xC00E8335,
+	(q31_t)0x911DB4A8, (q31_t)0xC03A1368, (q31_t)0x9104A0ED,
+	(q31_t)0xC065AD70, (q31_t)0x90EB9E50, (q31_t)0xC0915147,
+	(q31_t)0x90D2ACD3, (q31_t)0xC0BCFEE7, (q31_t)0x90B9CC7C,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1147763,
+	(q31_t)0x90883F4C, (q31_t)0xC1404233, (q31_t)0x906F927B,
+	(q31_t)0xC16C16B0, (q31_t)0x9056F6DF, (q31_t)0xC197F4D3,
+	(q31_t)0x903E6C7A, (q31_t)0xC1C3DC96, (q31_t)0x9025F352,
+	(q31_t)0xC1EFCDF2, (q31_t)0x900D8B69, (q31_t)0xC21BC8E0,
+	(q31_t)0x8FF534C4, (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66,
+	(q31_t)0xC273DB58, (q31_t)0x8FC4BB53, (q31_t)0xC29FF2D4,
+	(q31_t)0x8FAC988E, (q31_t)0xC2CC13C7, (q31_t)0x8F94871D,
+	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC32471F6,
+	(q31_t)0x8F64983F, (q31_t)0xC350AF25, (q31_t)0x8F4CBADB,
+	(q31_t)0xC37CF5B0, (q31_t)0x8F34EED8, (q31_t)0xC3A9458F,
+	(q31_t)0x8F1D343A, (q31_t)0xC3D59EBD, (q31_t)0x8F058B04,
+	(q31_t)0xC4020132, (q31_t)0x8EEDF33B, (q31_t)0xC42E6CE8,
+	(q31_t)0x8ED66CE1, (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB,
+	(q31_t)0xC4875FF8, (q31_t)0x8EA7948C, (q31_t)0xC4B3E746,
+	(q31_t)0x8E904298, (q31_t)0xC4E077B8, (q31_t)0x8E790222,
+	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC539B3F0,
+	(q31_t)0x8E4AB5BF, (q31_t)0xC5665FA8, (q31_t)0x8E33A9D9,
+	(q31_t)0xC593146A, (q31_t)0x8E1CAF80, (q31_t)0xC5BFD22E,
+	(q31_t)0x8E05C6B7, (q31_t)0xC5EC98ED, (q31_t)0x8DEEEF82,
+	(q31_t)0xC61968A2, (q31_t)0x8DD829E4, (q31_t)0xC6464144,
+	(q31_t)0x8DC175E0, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
+	(q31_t)0xC6A00D36, (q31_t)0x8D9442B7, (q31_t)0xC6CD0079,
+	(q31_t)0x8D7DC399, (q31_t)0xC6F9FC8D, (q31_t)0x8D675623,
+	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7540F10,
+	(q31_t)0x8D3AB03F, (q31_t)0xC7812571, (q31_t)0x8D2477D8,
+	(q31_t)0xC7AE4489, (q31_t)0x8D0E5127, (q31_t)0xC7DB6C50,
+	(q31_t)0x8CF83C30, (q31_t)0xC8089CBF, (q31_t)0x8CE238F6,
+	(q31_t)0xC835D5D0, (q31_t)0x8CCC477D, (q31_t)0xC863177B,
+	(q31_t)0x8CB667C7, (q31_t)0xC89061BA, (q31_t)0x8CA099D9,
+	(q31_t)0xC8BDB485, (q31_t)0x8C8ADDB6, (q31_t)0xC8EB0FD6,
+	(q31_t)0x8C753361, (q31_t)0xC91873A5, (q31_t)0x8C5F9ADD,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC97354A3,
+	(q31_t)0x8C349F58, (q31_t)0xC9A0D1C4, (q31_t)0x8C1F3C5C,
+	(q31_t)0xC9CE5748, (q31_t)0x8C09EB40, (q31_t)0xC9FBE527,
+	(q31_t)0x8BF4AC05, (q31_t)0xCA297B5A, (q31_t)0x8BDF7EAF,
+	(q31_t)0xCA5719DB, (q31_t)0x8BCA6342, (q31_t)0xCA84C0A2,
+	(q31_t)0x8BB559C1, (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F,
+	(q31_t)0xCAE026E8, (q31_t)0x8B8B7C8F, (q31_t)0xCB0DE658,
+	(q31_t)0x8B76A8E4, (q31_t)0xCB3BADF2, (q31_t)0x8B61E732,
+	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCB975589,
+	(q31_t)0x8B3899C5, (q31_t)0xCBC53578, (q31_t)0x8B240E10,
+	(q31_t)0xCBF31D75, (q31_t)0x8B0F9461, (q31_t)0xCC210D78,
+	(q31_t)0x8AFB2CBA, (q31_t)0xCC4F057B, (q31_t)0x8AE6D71F,
+	(q31_t)0xCC7D0577, (q31_t)0x8AD29393, (q31_t)0xCCAB0D65,
+	(q31_t)0x8ABE6219, (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4,
+	(q31_t)0xCD0734F8, (q31_t)0x8A963567, (q31_t)0xCD355490,
+	(q31_t)0x8A823A35, (q31_t)0xCD637BFD, (q31_t)0x8A6E5122,
+	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDBFE23A,
+	(q31_t)0x8A46B563, (q31_t)0xCDEE20FC, (q31_t)0x8A3302BD,
+	(q31_t)0xCE1C6776, (q31_t)0x8A1F6242, (q31_t)0xCE4AB5A2,
+	(q31_t)0x8A0BD3F5, (q31_t)0xCE790B78, (q31_t)0x89F857D8,
+	(q31_t)0xCEA768F2, (q31_t)0x89E4EDEE, (q31_t)0xCED5CE08,
+	(q31_t)0x89D1963C, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+	(q31_t)0xCF32AEEB, (q31_t)0x89AB1D86, (q31_t)0xCF612AAA,
+	(q31_t)0x8997FC89, (q31_t)0xCF8FADE8, (q31_t)0x8984EDCF,
+	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xCFECCAC7,
+	(q31_t)0x895F072D, (q31_t)0xD01B6459, (q31_t)0x894C2F4C,
+	(q31_t)0xD04A054D, (q31_t)0x893969B9, (q31_t)0xD078AD9D,
+	(q31_t)0x8926B677, (q31_t)0xD0A75D42, (q31_t)0x89141589,
+	(q31_t)0xD0D61433, (q31_t)0x890186F1, (q31_t)0xD104D26B,
+	(q31_t)0x88EF0AB4, (q31_t)0xD13397E1, (q31_t)0x88DCA0D3,
+	(q31_t)0xD162648F, (q31_t)0x88CA4951, (q31_t)0xD191386D,
+	(q31_t)0x88B80431, (q31_t)0xD1C01374, (q31_t)0x88A5D177,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD21DDEE1,
+	(q31_t)0x8881A33C, (q31_t)0xD24CCF38, (q31_t)0x886FA7C2,
+	(q31_t)0xD27BC69C, (q31_t)0x885DBEB7, (q31_t)0xD2AAC504,
+	(q31_t)0x884BE820, (q31_t)0xD2D9CA6A, (q31_t)0x883A23FE,
+	(q31_t)0xD308D6C6, (q31_t)0x88287255, (q31_t)0xD337EA12,
+	(q31_t)0x8816D327, (q31_t)0xD3670445, (q31_t)0x88054677,
+	(q31_t)0xD3962559, (q31_t)0x87F3CC47, (q31_t)0xD3C54D46,
+	(q31_t)0x87E2649B, (q31_t)0xD3F47C06, (q31_t)0x87D10F75,
+	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD452EDDE,
+	(q31_t)0x87AE9CC5, (q31_t)0xD48230E8, (q31_t)0x879D7F40,
+	(q31_t)0xD4B17AA7, (q31_t)0x878C744C, (q31_t)0xD4E0CB14,
+	(q31_t)0x877B7BEC, (q31_t)0xD5102227, (q31_t)0x876A9621,
+	(q31_t)0xD53F7FDA, (q31_t)0x8759C2EF, (q31_t)0xD56EE424,
+	(q31_t)0x87490257, (q31_t)0xD59E4EFE, (q31_t)0x8738545E,
+	(q31_t)0xD5CDC062, (q31_t)0x8727B904, (q31_t)0xD5FD3847,
+	(q31_t)0x8717304E, (q31_t)0xD62CB6A7, (q31_t)0x8706BA3C,
+	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD68BC6BA,
+	(q31_t)0x86E60614, (q31_t)0xD6BB585D, (q31_t)0x86D5C802,
+	(q31_t)0xD6EAF05E, (q31_t)0x86C59C9F, (q31_t)0xD71A8EB5,
+	(q31_t)0x86B583EE, (q31_t)0xD74A335A, (q31_t)0x86A57DF1,
+	(q31_t)0xD779DE46, (q31_t)0x86958AAB, (q31_t)0xD7A98F73,
+	(q31_t)0x8685AA1F, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
+	(q31_t)0xD809046D, (q31_t)0x8666213C, (q31_t)0xD838C82D,
+	(q31_t)0x865678EA, (q31_t)0xD868920F, (q31_t)0x8646E35B,
+	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8C8381C,
+	(q31_t)0x8627F090, (q31_t)0xD8F81439, (q31_t)0x86189359,
+	(q31_t)0xD927F65B, (q31_t)0x860948EE, (q31_t)0xD957DE7A,
+	(q31_t)0x85FA1152, (q31_t)0xD987CC8F, (q31_t)0x85EAEC88,
+	(q31_t)0xD9B7C093, (q31_t)0x85DBDA91, (q31_t)0xD9E7BA7E,
+	(q31_t)0x85CCDB70, (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27,
+	(q31_t)0xDA47BFED, (q31_t)0x85AF15B9, (q31_t)0xDA77CB62,
+	(q31_t)0x85A04F28, (q31_t)0xDAA7DCA1, (q31_t)0x85919B75,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB08105E,
+	(q31_t)0x85746CB7, (q31_t)0xDB3832CD, (q31_t)0x8565F1B0,
+	(q31_t)0xDB685AE8, (q31_t)0x85578991, (q31_t)0xDB9888A8,
+	(q31_t)0x8549345C, (q31_t)0xDBC8BC05, (q31_t)0x853AF214,
+	(q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA, (q31_t)0xDC293379,
+	(q31_t)0x851EA652, (q31_t)0xDC597781, (q31_t)0x85109CDC,
+	(q31_t)0xDC89C108, (q31_t)0x8502A65C, (q31_t)0xDCBA1008,
+	(q31_t)0x84F4C2D3, (q31_t)0xDCEA6478, (q31_t)0x84E6F244,
+	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD4B1D8B,
+	(q31_t)0x84CB8A1B, (q31_t)0xDD7B8220, (q31_t)0x84BDF285,
+	(q31_t)0xDDABEC07, (q31_t)0x84B06DF1, (q31_t)0xDDDC5B3A,
+	(q31_t)0x84A2FC62, (q31_t)0xDE0CCFB1, (q31_t)0x84959DD9,
+	(q31_t)0xDE3D4963, (q31_t)0x84885257, (q31_t)0xDE6DC84B,
+	(q31_t)0x847B19E1, (q31_t)0xDE9E4C60, (q31_t)0x846DF476,
+	(q31_t)0xDECED59B, (q31_t)0x8460E21A, (q31_t)0xDEFF63F4,
+	(q31_t)0x8453E2CE, (q31_t)0xDF2FF764, (q31_t)0x8446F695,
+	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDF912D6A,
+	(q31_t)0x842D5761, (q31_t)0xDFC1CFF2, (q31_t)0x8420A46B,
+	(q31_t)0xDFF27773, (q31_t)0x8414048F, (q31_t)0xE02323E5,
+	(q31_t)0x840777CF, (q31_t)0xE053D541, (q31_t)0x83FAFE2E,
+	(q31_t)0xE0848B7F, (q31_t)0x83EE97AC, (q31_t)0xE0B54698,
+	(q31_t)0x83E2444D, (q31_t)0xE0E60684, (q31_t)0x83D60411,
+	(q31_t)0xE116CB3D, (q31_t)0x83C9D6FB, (q31_t)0xE14794B9,
+	(q31_t)0x83BDBD0D, (q31_t)0xE17862F3, (q31_t)0x83B1B649,
+	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE1DA0D7E,
+	(q31_t)0x8399E244, (q31_t)0xE20AE9C1, (q31_t)0x838E1507,
+	(q31_t)0xE23BCAA2, (q31_t)0x83825AFB, (q31_t)0xE26CB01A,
+	(q31_t)0x8376B422, (q31_t)0xE29D9A22, (q31_t)0x836B207D,
+	(q31_t)0xE2CE88B2, (q31_t)0x835FA00E, (q31_t)0xE2FF7BC3,
+	(q31_t)0x835432D8, (q31_t)0xE330734C, (q31_t)0x8348D8DB,
+	(q31_t)0xE3616F47, (q31_t)0x833D921A, (q31_t)0xE3926FAC,
+	(q31_t)0x83325E97, (q31_t)0xE3C37473, (q31_t)0x83273E52,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4258B0A,
+	(q31_t)0x8311378C, (q31_t)0xE4569CCB, (q31_t)0x8306510F,
+	(q31_t)0xE487B2CF, (q31_t)0x82FB7DD8, (q31_t)0xE4B8CD10,
+	(q31_t)0x82F0BDE8, (q31_t)0xE4E9EB86, (q31_t)0x82E61141,
+	(q31_t)0xE51B0E2A, (q31_t)0x82DB77E5, (q31_t)0xE54C34F3,
+	(q31_t)0x82D0F1D5, (q31_t)0xE57D5FDA, (q31_t)0x82C67F13,
+	(q31_t)0xE5AE8ED8, (q31_t)0x82BC1FA1, (q31_t)0xE5DFC1E4,
+	(q31_t)0x82B1D381, (q31_t)0xE610F8F9, (q31_t)0x82A79AB3,
+	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6737319,
+	(q31_t)0x82936316, (q31_t)0xE6A4B616, (q31_t)0x8289644A,
+	(q31_t)0xE6D5FCFC, (q31_t)0x827F78D8, (q31_t)0xE70747C3,
+	(q31_t)0x8275A0C0, (q31_t)0xE7389664, (q31_t)0x826BDC04,
+	(q31_t)0xE769E8D8, (q31_t)0x82622AA5, (q31_t)0xE79B3F16,
+	(q31_t)0x82588CA6, (q31_t)0xE7CC9917, (q31_t)0x824F0208,
+	(q31_t)0xE7FDF6D3, (q31_t)0x82458ACB, (q31_t)0xE82F5844,
+	(q31_t)0x823C26F2, (q31_t)0xE860BD60, (q31_t)0x8232D67E,
+	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8C3927F,
+	(q31_t)0x82206FCB, (q31_t)0xE8F50273, (q31_t)0x8217598F,
+	(q31_t)0xE92675F4, (q31_t)0x820E56BE, (q31_t)0xE957ECFB,
+	(q31_t)0x82056758, (q31_t)0xE9896780, (q31_t)0x81FC8B60,
+	(q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7, (q31_t)0xE9EC66E8,
+	(q31_t)0x81EB0DBD, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
+	(q31_t)0xEA4F73EE, (q31_t)0x81D9DDE1, (q31_t)0xEA80FF79,
+	(q31_t)0x81D16320, (q31_t)0xEAB28E55, (q31_t)0x81C8FBD5,
+	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB15B5E0,
+	(q31_t)0x81B867A4, (q31_t)0xEB474E80, (q31_t)0x81B03AC1,
+	(q31_t)0xEB78EA52, (q31_t)0x81A82159, (q31_t)0xEBAA894E,
+	(q31_t)0x81A01B6C, (q31_t)0xEBDC2B6D, (q31_t)0x819828FD,
+	(q31_t)0xEC0DD0A8, (q31_t)0x81904A0C, (q31_t)0xEC3F78F5,
+	(q31_t)0x81887E9A, (q31_t)0xEC71244F, (q31_t)0x8180C6A9,
+	(q31_t)0xECA2D2AC, (q31_t)0x8179223A, (q31_t)0xECD48406,
+	(q31_t)0x8171914E, (q31_t)0xED063855, (q31_t)0x816A13E6,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED69A9B2,
+	(q31_t)0x815B53A8, (q31_t)0xED9B66B2, (q31_t)0x815410D3,
+	(q31_t)0xEDCD2687, (q31_t)0x814CE188, (q31_t)0xEDFEE92B,
+	(q31_t)0x8145C5C6, (q31_t)0xEE30AE95, (q31_t)0x813EBD90,
+	(q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEE9441A0,
+	(q31_t)0x8130E7C8, (q31_t)0xEEC60F31, (q31_t)0x812A1A39,
+	(q31_t)0xEEF7DF6A, (q31_t)0x81236039, (q31_t)0xEF29B243,
+	(q31_t)0x811CB9CA, (q31_t)0xEF5B87B5, (q31_t)0x811626EC,
+	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFBF3A44,
+	(q31_t)0x81093BE8, (q31_t)0xEFF11752, (q31_t)0x8102E3C3,
+	(q31_t)0xF022F6DA, (q31_t)0x80FC9F35, (q31_t)0xF054D8D4,
+	(q31_t)0x80F66E3C, (q31_t)0xF086BD39, (q31_t)0x80F050DB,
+	(q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF0EA8D23,
+	(q31_t)0x80E450E2, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C,
+	(q31_t)0xF14E665C, (q31_t)0x80D89F51, (q31_t)0xF1805662,
+	(q31_t)0x80D2E3F1, (q31_t)0xF1B248A5, (q31_t)0x80CD3C2F,
+	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF21633C0,
+	(q31_t)0x80C22783, (q31_t)0xF2482C89, (q31_t)0x80BCBA9C,
+	(q31_t)0xF27A2770, (q31_t)0x80B76155, (q31_t)0xF2AC246D,
+	(q31_t)0x80B21BAF, (q31_t)0xF2DE2378, (q31_t)0x80ACE9AB,
+	(q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF342279A,
+	(q31_t)0x80A2C08B, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
+	(q31_t)0xF3A63398, (q31_t)0x8098E5FB, (q31_t)0xF3D83C76,
+	(q31_t)0x8094162B, (q31_t)0xF40A4734, (q31_t)0x808F5A02,
+	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF46E6231,
+	(q31_t)0x80861CA5, (q31_t)0xF4A07260, (q31_t)0x80819B74,
+	(q31_t)0xF4D28451, (q31_t)0x807D2DEB, (q31_t)0xF50497FA,
+	(q31_t)0x8078D40D, (q31_t)0xF536AD55, (q31_t)0x80748DD9,
+	(q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF59ADD01,
+	(q31_t)0x806C3C73, (q31_t)0xF5CCF743, (q31_t)0x80683143,
+	(q31_t)0xF5FF1317, (q31_t)0x806439C0, (q31_t)0xF6313076,
+	(q31_t)0x806055EA, (q31_t)0xF6634F58, (q31_t)0x805C85C3,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6C79188,
+	(q31_t)0x80552083, (q31_t)0xF6F9B4C5, (q31_t)0x80518B6B,
+	(q31_t)0xF72BD967, (q31_t)0x804E0A03, (q31_t)0xF75DFF65,
+	(q31_t)0x804A9C4D, (q31_t)0xF79026B8, (q31_t)0x80474248,
+	(q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF7F4793E,
+	(q31_t)0x8040C956, (q31_t)0xF826A461, (q31_t)0x803DAA69,
+	(q31_t)0xF858D0BA, (q31_t)0x803A9F31, (q31_t)0xF88AFE41,
+	(q31_t)0x8037A7AC, (q31_t)0xF8BD2CEF, (q31_t)0x8034C3DC,
+	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9218D9E,
+	(q31_t)0x802F375C, (q31_t)0xF953BF90, (q31_t)0x802C8EAD,
+	(q31_t)0xF985F28A, (q31_t)0x8029F9B4, (q31_t)0xF9B82683,
+	(q31_t)0x80277872, (q31_t)0xF9EA5B75, (q31_t)0x80250AE7,
+	(q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA4EC820,
+	(q31_t)0x80206AF8, (q31_t)0xFA80FFCB, (q31_t)0x801E3894,
+	(q31_t)0xFAB3384F, (q31_t)0x801C19E9, (q31_t)0xFAE571A4,
+	(q31_t)0x801A0EF7, (q31_t)0xFB17ABC2, (q31_t)0x801817BF,
+	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFB7C223C,
+	(q31_t)0x8014647A, (q31_t)0xFBAE5E89, (q31_t)0x8012A86F,
+	(q31_t)0xFBE09B80, (q31_t)0x8011001E, (q31_t)0xFC12D919,
+	(q31_t)0x800F6B88, (q31_t)0xFC45174E, (q31_t)0x800DEAAC,
+	(q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCA99569,
+	(q31_t)0x800B2427, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D,
+	(q31_t)0xFD0E1594, (q31_t)0x8008AC90, (q31_t)0xFD40565B,
+	(q31_t)0x80078E5E, (q31_t)0xFD72978F, (q31_t)0x800683E8,
+	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFDD71B1E,
+	(q31_t)0x8004AA31, (q31_t)0xFE095D69, (q31_t)0x8003DAF0,
+	(q31_t)0xFE3BA001, (q31_t)0x80031F6C, (q31_t)0xFE6DE2E0,
+	(q31_t)0x800277A5, (q31_t)0xFEA025FC, (q31_t)0x8001E39B,
+	(q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF04ACD0,
+	(q31_t)0x8000F6BD, (q31_t)0xFF36F078, (q31_t)0x80009DE9,
+	(q31_t)0xFF69343E, (q31_t)0x800058D3, (q31_t)0xFF9B781D,
+	(q31_t)0x8000277A, (q31_t)0xFFCDBC0A, (q31_t)0x800009DE
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+/**
+  @brief  q15 Twiddle factors Table
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
+
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
fori = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_16_q15[24] = {
+    (q15_t)0x7FFF, (q15_t)0x0000,
+    (q15_t)0x7641, (q15_t)0x30FB,
+    (q15_t)0x5A82, (q15_t)0x5A82,
+    (q15_t)0x30FB, (q15_t)0x7641,
+    (q15_t)0x0000, (q15_t)0x7FFF,
+    (q15_t)0xCF04, (q15_t)0x7641,
+    (q15_t)0xA57D, (q15_t)0x5A82,
+    (q15_t)0x89BE, (q15_t)0x30FB,
+    (q15_t)0x8000, (q15_t)0x0000,
+    (q15_t)0x89BE, (q15_t)0xCF04,
+    (q15_t)0xA57D, (q15_t)0xA57D,
+    (q15_t)0xCF04, (q15_t)0x89BE
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_32_q15[48] = {
+    (q15_t)0x7FFF, (q15_t)0x0000,
+    (q15_t)0x7D8A, (q15_t)0x18F8,
+    (q15_t)0x7641, (q15_t)0x30FB,
+    (q15_t)0x6A6D, (q15_t)0x471C,
+    (q15_t)0x5A82, (q15_t)0x5A82,
+    (q15_t)0x471C, (q15_t)0x6A6D,
+    (q15_t)0x30FB, (q15_t)0x7641,
+    (q15_t)0x18F8, (q15_t)0x7D8A,
+    (q15_t)0x0000, (q15_t)0x7FFF,
+    (q15_t)0xE707, (q15_t)0x7D8A,
+    (q15_t)0xCF04, (q15_t)0x7641,
+    (q15_t)0xB8E3, (q15_t)0x6A6D,
+    (q15_t)0xA57D, (q15_t)0x5A82,
+    (q15_t)0x9592, (q15_t)0x471C,
+    (q15_t)0x89BE, (q15_t)0x30FB,
+    (q15_t)0x8275, (q15_t)0x18F8,
+    (q15_t)0x8000, (q15_t)0x0000,
+    (q15_t)0x8275, (q15_t)0xE707,
+    (q15_t)0x89BE, (q15_t)0xCF04,
+    (q15_t)0x9592, (q15_t)0xB8E3,
+    (q15_t)0xA57D, (q15_t)0xA57D,
+    (q15_t)0xB8E3, (q15_t)0x9592,
+    (q15_t)0xCF04, (q15_t)0x89BE,
+    (q15_t)0xE707, (q15_t)0x8275
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_64_q15[96] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7F62, (q15_t)0x0C8B,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7A7D, (q15_t)0x2528,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x70E2, (q15_t)0x3C56,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x62F2, (q15_t)0x5133,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5133, (q15_t)0x62F2,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x3C56, (q15_t)0x70E2,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2528, (q15_t)0x7A7D,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x0C8B, (q15_t)0x7F62,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF374, (q15_t)0x7F62,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xDAD7, (q15_t)0x7A7D,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC3A9, (q15_t)0x70E2,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xAECC, (q15_t)0x62F2,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0x9D0D, (q15_t)0x5133,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x8F1D, (q15_t)0x3C56,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8582, (q15_t)0x2528,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x809D, (q15_t)0x0C8B,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x809D, (q15_t)0xF374,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x8582, (q15_t)0xDAD7,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8F1D, (q15_t)0xC3A9,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9D0D, (q15_t)0xAECC,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAECC, (q15_t)0x9D0D,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xC3A9, (q15_t)0x8F1D,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xDAD7, (q15_t)0x8582,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xF374, (q15_t)0x809D
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_128_q15[192] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FD8, (q15_t)0x0647,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7E9D, (q15_t)0x12C8,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7C29, (q15_t)0x1F19,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7884, (q15_t)0x2B1F,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x73B5, (q15_t)0x36BA,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6DCA, (q15_t)0x41CE,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x66CF, (q15_t)0x4C3F,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x5ED7, (q15_t)0x55F5,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x55F5, (q15_t)0x5ED7,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4C3F, (q15_t)0x66CF,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x41CE, (q15_t)0x6DCA,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x36BA, (q15_t)0x73B5,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2B1F, (q15_t)0x7884,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x1F19, (q15_t)0x7C29,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x12C8, (q15_t)0x7E9D,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0647, (q15_t)0x7FD8,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF9B8, (q15_t)0x7FD8,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xED37, (q15_t)0x7E9D,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE0E6, (q15_t)0x7C29,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD4E0, (q15_t)0x7884,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC945, (q15_t)0x73B5,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xBE31, (q15_t)0x6DCA,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB3C0, (q15_t)0x66CF,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAA0A, (q15_t)0x5ED7,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA128, (q15_t)0x55F5,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9930, (q15_t)0x4C3F,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9235, (q15_t)0x41CE,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8C4A, (q15_t)0x36BA,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x877B, (q15_t)0x2B1F,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x83D6, (q15_t)0x1F19,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8162, (q15_t)0x12C8,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8027, (q15_t)0x0647,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8027, (q15_t)0xF9B8,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x8162, (q15_t)0xED37,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x83D6, (q15_t)0xE0E6,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x877B, (q15_t)0xD4E0,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8C4A, (q15_t)0xC945,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x9235, (q15_t)0xBE31,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9930, (q15_t)0xB3C0,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0xA128, (q15_t)0xAA0A,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAA0A, (q15_t)0xA128,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB3C0, (q15_t)0x9930,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBE31, (q15_t)0x9235,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC945, (q15_t)0x8C4A,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD4E0, (q15_t)0x877B,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xE0E6, (q15_t)0x83D6,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xED37, (q15_t)0x8162,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF9B8, (q15_t)0x8027
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_256_q15[384] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FF6, (q15_t)0x0324,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FA7, (q15_t)0x096A,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F09, (q15_t)0x0FAB,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E1D, (q15_t)0x15E2,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7CE3, (q15_t)0x1C0B,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7B5D, (q15_t)0x2223,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x798A, (q15_t)0x2826,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x776C, (q15_t)0x2E11,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x7504, (q15_t)0x33DE,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7255, (q15_t)0x398C,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6F5F, (q15_t)0x3F17,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6C24, (q15_t)0x447A,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x68A6, (q15_t)0x49B4,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x64E8, (q15_t)0x4EBF,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x60EC, (q15_t)0x539B,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5CB4, (q15_t)0x5842,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5842, (q15_t)0x5CB4,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x539B, (q15_t)0x60EC,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4EBF, (q15_t)0x64E8,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x49B4, (q15_t)0x68A6,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x447A, (q15_t)0x6C24,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x3F17, (q15_t)0x6F5F,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x398C, (q15_t)0x7255,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x33DE, (q15_t)0x7504,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2E11, (q15_t)0x776C,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2826, (q15_t)0x798A,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2223, (q15_t)0x7B5D,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1C0B, (q15_t)0x7CE3,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x15E2, (q15_t)0x7E1D,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x0FAB, (q15_t)0x7F09,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x096A, (q15_t)0x7FA7,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x0324, (q15_t)0x7FF6,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFCDB, (q15_t)0x7FF6,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF695, (q15_t)0x7FA7,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF054, (q15_t)0x7F09,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEA1D, (q15_t)0x7E1D,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE3F4, (q15_t)0x7CE3,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDDDC, (q15_t)0x7B5D,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD7D9, (q15_t)0x798A,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD1EE, (q15_t)0x776C,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCC21, (q15_t)0x7504,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC673, (q15_t)0x7255,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC0E8, (q15_t)0x6F5F,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBB85, (q15_t)0x6C24,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB64B, (q15_t)0x68A6,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB140, (q15_t)0x64E8,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAC64, (q15_t)0x60EC,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA7BD, (q15_t)0x5CB4,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA34B, (q15_t)0x5842,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0x9F13, (q15_t)0x539B,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9B17, (q15_t)0x4EBF,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9759, (q15_t)0x49B4,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x93DB, (q15_t)0x447A,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x90A0, (q15_t)0x3F17,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8DAA, (q15_t)0x398C,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8AFB, (q15_t)0x33DE,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8893, (q15_t)0x2E11,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8675, (q15_t)0x2826,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x84A2, (q15_t)0x2223,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x831C, (q15_t)0x1C0B,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x81E2, (q15_t)0x15E2,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x80F6, (q15_t)0x0FAB,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8058, (q15_t)0x096A,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8009, (q15_t)0x0324,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8009, (q15_t)0xFCDB,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8058, (q15_t)0xF695,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80F6, (q15_t)0xF054,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81E2, (q15_t)0xEA1D,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x831C, (q15_t)0xE3F4,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x84A2, (q15_t)0xDDDC,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8675, (q15_t)0xD7D9,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x8893, (q15_t)0xD1EE,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8AFB, (q15_t)0xCC21,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8DAA, (q15_t)0xC673,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x90A0, (q15_t)0xC0E8,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x93DB, (q15_t)0xBB85,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9759, (q15_t)0xB64B,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9B17, (q15_t)0xB140,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9F13, (q15_t)0xAC64,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA34B, (q15_t)0xA7BD,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA7BD, (q15_t)0xA34B,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAC64, (q15_t)0x9F13,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB140, (q15_t)0x9B17,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB64B, (q15_t)0x9759,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBB85, (q15_t)0x93DB,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xC0E8, (q15_t)0x90A0,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC673, (q15_t)0x8DAA,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCC21, (q15_t)0x8AFB,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD1EE, (q15_t)0x8893,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD7D9, (q15_t)0x8675,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDDDC, (q15_t)0x84A2,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE3F4, (q15_t)0x831C,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xEA1D, (q15_t)0x81E2,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xF054, (q15_t)0x80F6,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF695, (q15_t)0x8058,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFCDB, (q15_t)0x8009
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_512_q15[768] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFD, (q15_t)0x0192,
+	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FE9, (q15_t)0x04B6,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FC2, (q15_t)0x07D9,
+	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F87, (q15_t)0x0AFB,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F38, (q15_t)0x0E1B,
+	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7ED5, (q15_t)0x1139,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E5F, (q15_t)0x1455,
+	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DD6, (q15_t)0x176D,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D39, (q15_t)0x1A82,
+	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7C89, (q15_t)0x1D93,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BC5, (q15_t)0x209F,
+	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7AEF, (q15_t)0x23A6,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A05, (q15_t)0x26A8,
+	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x7909, (q15_t)0x29A3,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x77FA, (q15_t)0x2C98,
+	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x76D9, (q15_t)0x2F87,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x75A5, (q15_t)0x326E,
+	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x745F, (q15_t)0x354D,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7307, (q15_t)0x3824,
+	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x719E, (q15_t)0x3AF2,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7023, (q15_t)0x3DB8,
+	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6E96, (q15_t)0x4073,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6CF9, (q15_t)0x4325,
+	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6B4A, (q15_t)0x45CD,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x698C, (q15_t)0x4869,
+	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x67BD, (q15_t)0x4AFB,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x65DD, (q15_t)0x4D81,
+	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x63EF, (q15_t)0x4FFB,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x61F1, (q15_t)0x5269,
+	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x5FE3, (q15_t)0x54CA,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5DC7, (q15_t)0x571D,
+	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5B9D, (q15_t)0x5964,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5964, (q15_t)0x5B9D,
+	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x571D, (q15_t)0x5DC7,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x54CA, (q15_t)0x5FE3,
+	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5269, (q15_t)0x61F1,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4FFB, (q15_t)0x63EF,
+	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4D81, (q15_t)0x65DD,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4AFB, (q15_t)0x67BD,
+	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x4869, (q15_t)0x698C,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x45CD, (q15_t)0x6B4A,
+	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4325, (q15_t)0x6CF9,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4073, (q15_t)0x6E96,
+	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3DB8, (q15_t)0x7023,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3AF2, (q15_t)0x719E,
+	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3824, (q15_t)0x7307,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x354D, (q15_t)0x745F,
+	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x326E, (q15_t)0x75A5,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2F87, (q15_t)0x76D9,
+	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2C98, (q15_t)0x77FA,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x29A3, (q15_t)0x7909,
+	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x26A8, (q15_t)0x7A05,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x23A6, (q15_t)0x7AEF,
+	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x209F, (q15_t)0x7BC5,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1D93, (q15_t)0x7C89,
+	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1A82, (q15_t)0x7D39,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x176D, (q15_t)0x7DD6,
+	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x1455, (q15_t)0x7E5F,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1139, (q15_t)0x7ED5,
+	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0E1B, (q15_t)0x7F38,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0AFB, (q15_t)0x7F87,
+	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x07D9, (q15_t)0x7FC2,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x04B6, (q15_t)0x7FE9,
+	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x0192, (q15_t)0x7FFD,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFE6D, (q15_t)0x7FFD,
+	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFB49, (q15_t)0x7FE9,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF826, (q15_t)0x7FC2,
+	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF504, (q15_t)0x7F87,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF1E4, (q15_t)0x7F38,
+	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEEC6, (q15_t)0x7ED5,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEBAA, (q15_t)0x7E5F,
+	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE892, (q15_t)0x7DD6,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE57D, (q15_t)0x7D39,
+	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE26C, (q15_t)0x7C89,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDF60, (q15_t)0x7BC5,
+	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDC59, (q15_t)0x7AEF,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD957, (q15_t)0x7A05,
+	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD65C, (q15_t)0x7909,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD367, (q15_t)0x77FA,
+	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD078, (q15_t)0x76D9,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCD91, (q15_t)0x75A5,
+	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCAB2, (q15_t)0x745F,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC7DB, (q15_t)0x7307,
+	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC50D, (q15_t)0x719E,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC247, (q15_t)0x7023,
+	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xBF8C, (q15_t)0x6E96,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBCDA, (q15_t)0x6CF9,
+	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBA32, (q15_t)0x6B4A,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB796, (q15_t)0x698C,
+	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB504, (q15_t)0x67BD,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB27E, (q15_t)0x65DD,
+	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB004, (q15_t)0x63EF,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAD96, (q15_t)0x61F1,
+	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAB35, (q15_t)0x5FE3,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA8E2, (q15_t)0x5DC7,
+	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA69B, (q15_t)0x5B9D,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA462, (q15_t)0x5964,
+	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA238, (q15_t)0x571D,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA01C, (q15_t)0x54CA,
+	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E0E, (q15_t)0x5269,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C10, (q15_t)0x4FFB,
+	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9A22, (q15_t)0x4D81,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9842, (q15_t)0x4AFB,
+	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x9673, (q15_t)0x4869,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x94B5, (q15_t)0x45CD,
+	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9306, (q15_t)0x4325,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x9169, (q15_t)0x4073,
+	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x8FDC, (q15_t)0x3DB8,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8E61, (q15_t)0x3AF2,
+	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8CF8, (q15_t)0x3824,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BA0, (q15_t)0x354D,
+	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8A5A, (q15_t)0x326E,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8926, (q15_t)0x2F87,
+	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8805, (q15_t)0x2C98,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x86F6, (q15_t)0x29A3,
+	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x85FA, (q15_t)0x26A8,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8510, (q15_t)0x23A6,
+	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x843A, (q15_t)0x209F,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x8376, (q15_t)0x1D93,
+	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82C6, (q15_t)0x1A82,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8229, (q15_t)0x176D,
+	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81A0, (q15_t)0x1455,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x812A, (q15_t)0x1139,
+	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80C7, (q15_t)0x0E1B,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8078, (q15_t)0x0AFB,
+	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x803D, (q15_t)0x07D9,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8016, (q15_t)0x04B6,
+	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8002, (q15_t)0x0192,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8002, (q15_t)0xFE6D,
+	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x8016, (q15_t)0xFB49,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x803D, (q15_t)0xF826,
+	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8078, (q15_t)0xF504,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80C7, (q15_t)0xF1E4,
+	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x812A, (q15_t)0xEEC6,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81A0, (q15_t)0xEBAA,
+	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8229, (q15_t)0xE892,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x82C6, (q15_t)0xE57D,
+	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8376, (q15_t)0xE26C,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x843A, (q15_t)0xDF60,
+	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x8510, (q15_t)0xDC59,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85FA, (q15_t)0xD957,
+	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x86F6, (q15_t)0xD65C,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x8805, (q15_t)0xD367,
+	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x8926, (q15_t)0xD078,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A5A, (q15_t)0xCD91,
+	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8BA0, (q15_t)0xCAB2,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8CF8, (q15_t)0xC7DB,
+	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E61, (q15_t)0xC50D,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8FDC, (q15_t)0xC247,
+	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9169, (q15_t)0xBF8C,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9306, (q15_t)0xBCDA,
+	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x94B5, (q15_t)0xBA32,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9673, (q15_t)0xB796,
+	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9842, (q15_t)0xB504,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9A22, (q15_t)0xB27E,
+	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9C10, (q15_t)0xB004,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9E0E, (q15_t)0xAD96,
+	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0xA01C, (q15_t)0xAB35,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA238, (q15_t)0xA8E2,
+	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA462, (q15_t)0xA69B,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA69B, (q15_t)0xA462,
+	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA8E2, (q15_t)0xA238,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAB35, (q15_t)0xA01C,
+	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAD96, (q15_t)0x9E0E,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB004, (q15_t)0x9C10,
+	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB27E, (q15_t)0x9A22,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB504, (q15_t)0x9842,
+	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB796, (q15_t)0x9673,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBA32, (q15_t)0x94B5,
+	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBCDA, (q15_t)0x9306,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBF8C, (q15_t)0x9169,
+	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC247, (q15_t)0x8FDC,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC50D, (q15_t)0x8E61,
+	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC7DB, (q15_t)0x8CF8,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCAB2, (q15_t)0x8BA0,
+	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCD91, (q15_t)0x8A5A,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD078, (q15_t)0x8926,
+	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD367, (q15_t)0x8805,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD65C, (q15_t)0x86F6,
+	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD957, (q15_t)0x85FA,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDC59, (q15_t)0x8510,
+	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDF60, (q15_t)0x843A,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE26C, (q15_t)0x8376,
+	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE57D, (q15_t)0x82C6,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE892, (q15_t)0x8229,
+	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEBAA, (q15_t)0x81A0,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xEEC6, (q15_t)0x812A,
+	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF1E4, (q15_t)0x80C7,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF504, (q15_t)0x8078,
+	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF826, (q15_t)0x803D,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFB49, (q15_t)0x8016,
+	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFE6D, (q15_t)0x8002
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ 
+ */
+const q15_t twiddleCoef_1024_q15[1536] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x00C9,
+	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFA, (q15_t)0x025B,
+	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF0, (q15_t)0x03ED,
+	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE1, (q15_t)0x057F,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FCE, (q15_t)0x0710,
+	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FB5, (q15_t)0x08A2,
+	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F97, (q15_t)0x0A33,
+	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F75, (q15_t)0x0BC3,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F4D, (q15_t)0x0D53,
+	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F21, (q15_t)0x0EE3,
+	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EF0, (q15_t)0x1072,
+	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7EBA, (q15_t)0x1201,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E7F, (q15_t)0x138E,
+	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E3F, (q15_t)0x151B,
+	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DFA, (q15_t)0x16A8,
+	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DB0, (q15_t)0x1833,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D62, (q15_t)0x19BD,
+	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D0F, (q15_t)0x1B47,
+	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CB7, (q15_t)0x1CCF,
+	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C5A, (q15_t)0x1E56,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BF8, (q15_t)0x1FDC,
+	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7B92, (q15_t)0x2161,
+	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B26, (q15_t)0x22E5,
+	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AB6, (q15_t)0x2467,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A42, (q15_t)0x25E8,
+	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79C8, (q15_t)0x2767,
+	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x794A, (q15_t)0x28E5,
+	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78C7, (q15_t)0x2A61,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7840, (q15_t)0x2BDC,
+	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77B4, (q15_t)0x2D55,
+	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7723, (q15_t)0x2ECC,
+	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x768E, (q15_t)0x3041,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x75F4, (q15_t)0x31B5,
+	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7555, (q15_t)0x3326,
+	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74B2, (q15_t)0x3496,
+	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x740B, (q15_t)0x3604,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x735F, (q15_t)0x376F,
+	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72AF, (q15_t)0x38D8,
+	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x71FA, (q15_t)0x3A40,
+	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x7141, (q15_t)0x3BA5,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7083, (q15_t)0x3D07,
+	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x6FC1, (q15_t)0x3E68,
+	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6EFB, (q15_t)0x3FC5,
+	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E30, (q15_t)0x4121,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D62, (q15_t)0x427A,
+	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6C8F, (q15_t)0x43D0,
+	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6BB8, (q15_t)0x4524,
+	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6ADC, (q15_t)0x4675,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x69FD, (q15_t)0x47C3,
+	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6919, (q15_t)0x490F,
+	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6832, (q15_t)0x4A58,
+	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x6746, (q15_t)0x4B9E,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x6657, (q15_t)0x4CE1,
+	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x6563, (q15_t)0x4E21,
+	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x646C, (q15_t)0x4F5E,
+	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x6371, (q15_t)0x5097,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x6271, (q15_t)0x51CE,
+	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x616F, (q15_t)0x5302,
+	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x6068, (q15_t)0x5433,
+	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5F5E, (q15_t)0x5560,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E50, (q15_t)0x568A,
+	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5D3E, (q15_t)0x57B0,
+	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C29, (q15_t)0x58D4,
+	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B10, (q15_t)0x59F3,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x59F3, (q15_t)0x5B10,
+	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x58D4, (q15_t)0x5C29,
+	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x57B0, (q15_t)0x5D3E,
+	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x568A, (q15_t)0x5E50,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x5560, (q15_t)0x5F5E,
+	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x5433, (q15_t)0x6068,
+	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5302, (q15_t)0x616F,
+	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x51CE, (q15_t)0x6271,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x5097, (q15_t)0x6371,
+	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4F5E, (q15_t)0x646C,
+	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E21, (q15_t)0x6563,
+	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4CE1, (q15_t)0x6657,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4B9E, (q15_t)0x6746,
+	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4A58, (q15_t)0x6832,
+	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x490F, (q15_t)0x6919,
+	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x47C3, (q15_t)0x69FD,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x4675, (q15_t)0x6ADC,
+	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x4524, (q15_t)0x6BB8,
+	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x43D0, (q15_t)0x6C8F,
+	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x427A, (q15_t)0x6D62,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4121, (q15_t)0x6E30,
+	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x3FC5, (q15_t)0x6EFB,
+	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3E68, (q15_t)0x6FC1,
+	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D07, (q15_t)0x7083,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3BA5, (q15_t)0x7141,
+	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A40, (q15_t)0x71FA,
+	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x38D8, (q15_t)0x72AF,
+	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x376F, (q15_t)0x735F,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x3604, (q15_t)0x740B,
+	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x3496, (q15_t)0x74B2,
+	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3326, (q15_t)0x7555,
+	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x31B5, (q15_t)0x75F4,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x3041, (q15_t)0x768E,
+	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2ECC, (q15_t)0x7723,
+	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2D55, (q15_t)0x77B4,
+	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2BDC, (q15_t)0x7840,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2A61, (q15_t)0x78C7,
+	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x28E5, (q15_t)0x794A,
+	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x2767, (q15_t)0x79C8,
+	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x25E8, (q15_t)0x7A42,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2467, (q15_t)0x7AB6,
+	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x22E5, (q15_t)0x7B26,
+	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x2161, (q15_t)0x7B92,
+	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x1FDC, (q15_t)0x7BF8,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1E56, (q15_t)0x7C5A,
+	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1CCF, (q15_t)0x7CB7,
+	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1B47, (q15_t)0x7D0F,
+	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x19BD, (q15_t)0x7D62,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x1833, (q15_t)0x7DB0,
+	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x16A8, (q15_t)0x7DFA,
+	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x151B, (q15_t)0x7E3F,
+	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x138E, (q15_t)0x7E7F,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1201, (q15_t)0x7EBA,
+	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x1072, (q15_t)0x7EF0,
+	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0EE3, (q15_t)0x7F21,
+	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0D53, (q15_t)0x7F4D,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0BC3, (q15_t)0x7F75,
+	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0A33, (q15_t)0x7F97,
+	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x08A2, (q15_t)0x7FB5,
+	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0710, (q15_t)0x7FCE,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x057F, (q15_t)0x7FE1,
+	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x03ED, (q15_t)0x7FF0,
+	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x025B, (q15_t)0x7FFA,
+	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x00C9, (q15_t)0x7FFF,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFF36, (q15_t)0x7FFF,
+	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFDA4, (q15_t)0x7FFA,
+	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC12, (q15_t)0x7FF0,
+	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFA80, (q15_t)0x7FE1,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF8EF, (q15_t)0x7FCE,
+	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF75D, (q15_t)0x7FB5,
+	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF5CC, (q15_t)0x7F97,
+	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF43C, (q15_t)0x7F75,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF2AC, (q15_t)0x7F4D,
+	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF11C, (q15_t)0x7F21,
+	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEF8D, (q15_t)0x7EF0,
+	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEDFE, (q15_t)0x7EBA,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEC71, (q15_t)0x7E7F,
+	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEAE4, (q15_t)0x7E3F,
+	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE957, (q15_t)0x7DFA,
+	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE7CC, (q15_t)0x7DB0,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE642, (q15_t)0x7D62,
+	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE4B8, (q15_t)0x7D0F,
+	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE330, (q15_t)0x7CB7,
+	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE1A9, (q15_t)0x7C5A,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE023, (q15_t)0x7BF8,
+	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDE9E, (q15_t)0x7B92,
+	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD1A, (q15_t)0x7B26,
+	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDB98, (q15_t)0x7AB6,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDA17, (q15_t)0x7A42,
+	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD898, (q15_t)0x79C8,
+	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD71A, (q15_t)0x794A,
+	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD59E, (q15_t)0x78C7,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD423, (q15_t)0x7840,
+	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD2AA, (q15_t)0x77B4,
+	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD133, (q15_t)0x7723,
+	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xCFBE, (q15_t)0x768E,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCE4A, (q15_t)0x75F4,
+	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCCD9, (q15_t)0x7555,
+	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCB69, (q15_t)0x74B2,
+	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xC9FB, (q15_t)0x740B,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC890, (q15_t)0x735F,
+	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC727, (q15_t)0x72AF,
+	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC5BF, (q15_t)0x71FA,
+	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC45A, (q15_t)0x7141,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC2F8, (q15_t)0x7083,
+	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC197, (q15_t)0x6FC1,
+	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC03A, (q15_t)0x6EFB,
+	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBEDE, (q15_t)0x6E30,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBD85, (q15_t)0x6D62,
+	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBC2F, (q15_t)0x6C8F,
+	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBADB, (q15_t)0x6BB8,
+	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB98A, (q15_t)0x6ADC,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB83C, (q15_t)0x69FD,
+	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB6F0, (q15_t)0x6919,
+	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB5A7, (q15_t)0x6832,
+	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB461, (q15_t)0x6746,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB31E, (q15_t)0x6657,
+	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB1DE, (q15_t)0x6563,
+	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB0A1, (q15_t)0x646C,
+	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAF68, (q15_t)0x6371,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAE31, (q15_t)0x6271,
+	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xACFD, (q15_t)0x616F,
+	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xABCC, (q15_t)0x6068,
+	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAA9F, (q15_t)0x5F5E,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA975, (q15_t)0x5E50,
+	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA84F, (q15_t)0x5D3E,
+	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA72B, (q15_t)0x5C29,
+	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA60C, (q15_t)0x5B10,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA4EF, (q15_t)0x59F3,
+	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA3D6, (q15_t)0x58D4,
+	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA2C1, (q15_t)0x57B0,
+	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA1AF, (q15_t)0x568A,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA0A1, (q15_t)0x5560,
+	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9F97, (q15_t)0x5433,
+	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E90, (q15_t)0x5302,
+	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9D8E, (q15_t)0x51CE,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C8E, (q15_t)0x5097,
+	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9B93, (q15_t)0x4F5E,
+	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9A9C, (q15_t)0x4E21,
+	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x99A8, (q15_t)0x4CE1,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x98B9, (q15_t)0x4B9E,
+	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x97CD, (q15_t)0x4A58,
+	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x96E6, (q15_t)0x490F,
+	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x9602, (q15_t)0x47C3,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9523, (q15_t)0x4675,
+	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x9447, (q15_t)0x4524,
+	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9370, (q15_t)0x43D0,
+	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x929D, (q15_t)0x427A,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x91CF, (q15_t)0x4121,
+	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9104, (q15_t)0x3FC5,
+	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x903E, (q15_t)0x3E68,
+	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8F7C, (q15_t)0x3D07,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8EBE, (q15_t)0x3BA5,
+	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E05, (q15_t)0x3A40,
+	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D50, (q15_t)0x38D8,
+	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CA0, (q15_t)0x376F,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BF4, (q15_t)0x3604,
+	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B4D, (q15_t)0x3496,
+	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AAA, (q15_t)0x3326,
+	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A0B, (q15_t)0x31B5,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8971, (q15_t)0x3041,
+	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x88DC, (q15_t)0x2ECC,
+	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x884B, (q15_t)0x2D55,
+	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87BF, (q15_t)0x2BDC,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8738, (q15_t)0x2A61,
+	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86B5, (q15_t)0x28E5,
+	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8637, (q15_t)0x2767,
+	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85BD, (q15_t)0x25E8,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8549, (q15_t)0x2467,
+	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x84D9, (q15_t)0x22E5,
+	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x846D, (q15_t)0x2161,
+	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x8407, (q15_t)0x1FDC,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83A5, (q15_t)0x1E56,
+	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x8348, (q15_t)0x1CCF,
+	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82F0, (q15_t)0x1B47,
+	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x829D, (q15_t)0x19BD,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x824F, (q15_t)0x1833,
+	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8205, (q15_t)0x16A8,
+	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81C0, (q15_t)0x151B,
+	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8180, (q15_t)0x138E,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x8145, (q15_t)0x1201,
+	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x810F, (q15_t)0x1072,
+	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80DE, (q15_t)0x0EE3,
+	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80B2, (q15_t)0x0D53,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x808A, (q15_t)0x0BC3,
+	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8068, (q15_t)0x0A33,
+	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x804A, (q15_t)0x08A2,
+	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x8031, (q15_t)0x0710,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x801E, (q15_t)0x057F,
+	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x800F, (q15_t)0x03ED,
+	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8005, (q15_t)0x025B,
+	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8000, (q15_t)0x00C9,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFF36,
+	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8005, (q15_t)0xFDA4,
+	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800F, (q15_t)0xFC12,
+	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x801E, (q15_t)0xFA80,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8031, (q15_t)0xF8EF,
+	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x804A, (q15_t)0xF75D,
+	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8068, (q15_t)0xF5CC,
+	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x808A, (q15_t)0xF43C,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80B2, (q15_t)0xF2AC,
+	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80DE, (q15_t)0xF11C,
+	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x810F, (q15_t)0xEF8D,
+	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8145, (q15_t)0xEDFE,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x8180, (q15_t)0xEC71,
+	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81C0, (q15_t)0xEAE4,
+	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8205, (q15_t)0xE957,
+	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x824F, (q15_t)0xE7CC,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x829D, (q15_t)0xE642,
+	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82F0, (q15_t)0xE4B8,
+	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8348, (q15_t)0xE330,
+	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x83A5, (q15_t)0xE1A9,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x8407, (q15_t)0xE023,
+	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x846D, (q15_t)0xDE9E,
+	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84D9, (q15_t)0xDD1A,
+	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x8549, (q15_t)0xDB98,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85BD, (q15_t)0xDA17,
+	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8637, (q15_t)0xD898,
+	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x86B5, (q15_t)0xD71A,
+	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8738, (q15_t)0xD59E,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x87BF, (q15_t)0xD423,
+	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x884B, (q15_t)0xD2AA,
+	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88DC, (q15_t)0xD133,
+	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x8971, (q15_t)0xCFBE,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A0B, (q15_t)0xCE4A,
+	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8AAA, (q15_t)0xCCD9,
+	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B4D, (q15_t)0xCB69,
+	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BF4, (q15_t)0xC9FB,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8CA0, (q15_t)0xC890,
+	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D50, (q15_t)0xC727,
+	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E05, (q15_t)0xC5BF,
+	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8EBE, (q15_t)0xC45A,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F7C, (q15_t)0xC2F8,
+	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x903E, (q15_t)0xC197,
+	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9104, (q15_t)0xC03A,
+	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x91CF, (q15_t)0xBEDE,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x929D, (q15_t)0xBD85,
+	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x9370, (q15_t)0xBC2F,
+	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9447, (q15_t)0xBADB,
+	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x9523, (q15_t)0xB98A,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9602, (q15_t)0xB83C,
+	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96E6, (q15_t)0xB6F0,
+	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x97CD, (q15_t)0xB5A7,
+	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x98B9, (q15_t)0xB461,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x99A8, (q15_t)0xB31E,
+	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A9C, (q15_t)0xB1DE,
+	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B93, (q15_t)0xB0A1,
+	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C8E, (q15_t)0xAF68,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D8E, (q15_t)0xAE31,
+	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E90, (q15_t)0xACFD,
+	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F97, (q15_t)0xABCC,
+	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA0A1, (q15_t)0xAA9F,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA1AF, (q15_t)0xA975,
+	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA2C1, (q15_t)0xA84F,
+	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA3D6, (q15_t)0xA72B,
+	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4EF, (q15_t)0xA60C,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA60C, (q15_t)0xA4EF,
+	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA72B, (q15_t)0xA3D6,
+	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA84F, (q15_t)0xA2C1,
+	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA975, (q15_t)0xA1AF,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA9F, (q15_t)0xA0A1,
+	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xABCC, (q15_t)0x9F97,
+	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xACFD, (q15_t)0x9E90,
+	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xAE31, (q15_t)0x9D8E,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF68, (q15_t)0x9C8E,
+	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB0A1, (q15_t)0x9B93,
+	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB1DE, (q15_t)0x9A9C,
+	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB31E, (q15_t)0x99A8,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB461, (q15_t)0x98B9,
+	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB5A7, (q15_t)0x97CD,
+	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB6F0, (q15_t)0x96E6,
+	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB83C, (q15_t)0x9602,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB98A, (q15_t)0x9523,
+	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBADB, (q15_t)0x9447,
+	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBC2F, (q15_t)0x9370,
+	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD85, (q15_t)0x929D,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBEDE, (q15_t)0x91CF,
+	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xC03A, (q15_t)0x9104,
+	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC197, (q15_t)0x903E,
+	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC2F8, (q15_t)0x8F7C,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC45A, (q15_t)0x8EBE,
+	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC5BF, (q15_t)0x8E05,
+	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC727, (q15_t)0x8D50,
+	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC890, (q15_t)0x8CA0,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9FB, (q15_t)0x8BF4,
+	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB69, (q15_t)0x8B4D,
+	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCCD9, (q15_t)0x8AAA,
+	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCE4A, (q15_t)0x8A0B,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCFBE, (q15_t)0x8971,
+	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD133, (q15_t)0x88DC,
+	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD2AA, (q15_t)0x884B,
+	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD423, (q15_t)0x87BF,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD59E, (q15_t)0x8738,
+	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD71A, (q15_t)0x86B5,
+	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD898, (q15_t)0x8637,
+	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xDA17, (q15_t)0x85BD,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB98, (q15_t)0x8549,
+	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDD1A, (q15_t)0x84D9,
+	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE9E, (q15_t)0x846D,
+	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xE023, (q15_t)0x8407,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE1A9, (q15_t)0x83A5,
+	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE330, (q15_t)0x8348,
+	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE4B8, (q15_t)0x82F0,
+	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE642, (q15_t)0x829D,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE7CC, (q15_t)0x824F,
+	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE957, (q15_t)0x8205,
+	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEAE4, (q15_t)0x81C0,
+	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEC71, (q15_t)0x8180,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xEDFE, (q15_t)0x8145,
+	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF8D, (q15_t)0x810F,
+	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF11C, (q15_t)0x80DE,
+	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF2AC, (q15_t)0x80B2,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF43C, (q15_t)0x808A,
+	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF5CC, (q15_t)0x8068,
+	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF75D, (q15_t)0x804A,
+	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF8EF, (q15_t)0x8031,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA80, (q15_t)0x801E,
+	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFC12, (q15_t)0x800F,
+	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFDA4, (q15_t)0x8005,
+	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFF36, (q15_t)0x8000
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_2048_q15[3072] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0064,
+	(q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFE, (q15_t)0x012D,
+	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01F6,
+	(q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF8, (q15_t)0x02BF,
+	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF3, (q15_t)0x0388,
+	(q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FED, (q15_t)0x0451,
+	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE5, (q15_t)0x051A,
+	(q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDD, (q15_t)0x05E3,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD3, (q15_t)0x06AC,
+	(q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FC8, (q15_t)0x0775,
+	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBC, (q15_t)0x083D,
+	(q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FAE, (q15_t)0x0906,
+	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F9F, (q15_t)0x09CE,
+	(q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F8F, (q15_t)0x0A97,
+	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F7E, (q15_t)0x0B5F,
+	(q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F6B, (q15_t)0x0C27,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F58, (q15_t)0x0CEF,
+	(q15_t)0x7F4D, (q15_t)0x0D53, (q15_t)0x7F43, (q15_t)0x0DB7,
+	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F2D, (q15_t)0x0E7F,
+	(q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F15, (q15_t)0x0F47,
+	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EFD, (q15_t)0x100E,
+	(q15_t)0x7EF0, (q15_t)0x1072, (q15_t)0x7EE3, (q15_t)0x10D6,
+	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7EC8, (q15_t)0x119D,
+	(q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7EAB, (q15_t)0x1264,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E8E, (q15_t)0x132B,
+	(q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E6F, (q15_t)0x13F2,
+	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E4F, (q15_t)0x14B8,
+	(q15_t)0x7E3F, (q15_t)0x151B, (q15_t)0x7E2E, (q15_t)0x157F,
+	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7E0C, (q15_t)0x1645,
+	(q15_t)0x7DFA, (q15_t)0x16A8, (q15_t)0x7DE8, (q15_t)0x170A,
+	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DC3, (q15_t)0x17D0,
+	(q15_t)0x7DB0, (q15_t)0x1833, (q15_t)0x7D9D, (q15_t)0x1896,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D76, (q15_t)0x195B,
+	(q15_t)0x7D62, (q15_t)0x19BD, (q15_t)0x7D4E, (q15_t)0x1A20,
+	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D24, (q15_t)0x1AE4,
+	(q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7CF9, (q15_t)0x1BA9,
+	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CCD, (q15_t)0x1C6D,
+	(q15_t)0x7CB7, (q15_t)0x1CCF, (q15_t)0x7CA0, (q15_t)0x1D31,
+	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C71, (q15_t)0x1DF5,
+	(q15_t)0x7C5A, (q15_t)0x1E56, (q15_t)0x7C42, (q15_t)0x1EB8,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7C11, (q15_t)0x1F7B,
+	(q15_t)0x7BF8, (q15_t)0x1FDC, (q15_t)0x7BDF, (q15_t)0x203E,
+	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7BAC, (q15_t)0x2100,
+	(q15_t)0x7B92, (q15_t)0x2161, (q15_t)0x7B77, (q15_t)0x21C2,
+	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B42, (q15_t)0x2284,
+	(q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7B0B, (q15_t)0x2345,
+	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AD3, (q15_t)0x2407,
+	(q15_t)0x7AB6, (q15_t)0x2467, (q15_t)0x7A9A, (q15_t)0x24C7,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A5F, (q15_t)0x2588,
+	(q15_t)0x7A42, (q15_t)0x25E8, (q15_t)0x7A24, (q15_t)0x2648,
+	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79E7, (q15_t)0x2707,
+	(q15_t)0x79C8, (q15_t)0x2767, (q15_t)0x79A9, (q15_t)0x27C7,
+	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x796A, (q15_t)0x2886,
+	(q15_t)0x794A, (q15_t)0x28E5, (q15_t)0x792A, (q15_t)0x2944,
+	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78E8, (q15_t)0x2A02,
+	(q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x78A6, (q15_t)0x2AC0,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7862, (q15_t)0x2B7D,
+	(q15_t)0x7840, (q15_t)0x2BDC, (q15_t)0x781D, (q15_t)0x2C3A,
+	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77D7, (q15_t)0x2CF7,
+	(q15_t)0x77B4, (q15_t)0x2D55, (q15_t)0x7790, (q15_t)0x2DB3,
+	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7747, (q15_t)0x2E6E,
+	(q15_t)0x7723, (q15_t)0x2ECC, (q15_t)0x76FE, (q15_t)0x2F29,
+	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x76B3, (q15_t)0x2FE4,
+	(q15_t)0x768E, (q15_t)0x3041, (q15_t)0x7668, (q15_t)0x309E,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x761B, (q15_t)0x3158,
+	(q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75CC, (q15_t)0x3211,
+	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x757D, (q15_t)0x32CA,
+	(q15_t)0x7555, (q15_t)0x3326, (q15_t)0x752D, (q15_t)0x3382,
+	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74DB, (q15_t)0x343A,
+	(q15_t)0x74B2, (q15_t)0x3496, (q15_t)0x7489, (q15_t)0x34F2,
+	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x7435, (q15_t)0x35A8,
+	(q15_t)0x740B, (q15_t)0x3604, (q15_t)0x73E0, (q15_t)0x365F,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x738A, (q15_t)0x3714,
+	(q15_t)0x735F, (q15_t)0x376F, (q15_t)0x7333, (q15_t)0x37CA,
+	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72DB, (q15_t)0x387E,
+	(q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7282, (q15_t)0x3932,
+	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x7227, (q15_t)0x39E6,
+	(q15_t)0x71FA, (q15_t)0x3A40, (q15_t)0x71CC, (q15_t)0x3A99,
+	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x716F, (q15_t)0x3B4C,
+	(q15_t)0x7141, (q15_t)0x3BA5, (q15_t)0x7112, (q15_t)0x3BFD,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x70B3, (q15_t)0x3CAF,
+	(q15_t)0x7083, (q15_t)0x3D07, (q15_t)0x7053, (q15_t)0x3D60,
+	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x6FF2, (q15_t)0x3E10,
+	(q15_t)0x6FC1, (q15_t)0x3E68, (q15_t)0x6F90, (q15_t)0x3EBF,
+	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6F2D, (q15_t)0x3F6E,
+	(q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6EC9, (q15_t)0x401D,
+	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E63, (q15_t)0x40CA,
+	(q15_t)0x6E30, (q15_t)0x4121, (q15_t)0x6DFD, (q15_t)0x4177,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D96, (q15_t)0x4224,
+	(q15_t)0x6D62, (q15_t)0x427A, (q15_t)0x6D2D, (q15_t)0x42D0,
+	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6CC4, (q15_t)0x437B,
+	(q15_t)0x6C8F, (q15_t)0x43D0, (q15_t)0x6C59, (q15_t)0x4425,
+	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6BEE, (q15_t)0x44CF,
+	(q15_t)0x6BB8, (q15_t)0x4524, (q15_t)0x6B81, (q15_t)0x4578,
+	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6B13, (q15_t)0x4621,
+	(q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6AA5, (q15_t)0x46C9,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x6A35, (q15_t)0x4770,
+	(q15_t)0x69FD, (q15_t)0x47C3, (q15_t)0x69C4, (q15_t)0x4816,
+	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6953, (q15_t)0x48BC,
+	(q15_t)0x6919, (q15_t)0x490F, (q15_t)0x68E0, (q15_t)0x4961,
+	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x686C, (q15_t)0x4A06,
+	(q15_t)0x6832, (q15_t)0x4A58, (q15_t)0x67F7, (q15_t)0x4AA9,
+	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x6782, (q15_t)0x4B4C,
+	(q15_t)0x6746, (q15_t)0x4B9E, (q15_t)0x670B, (q15_t)0x4BEF,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x6693, (q15_t)0x4C90,
+	(q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x661A, (q15_t)0x4D31,
+	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x65A0, (q15_t)0x4DD1,
+	(q15_t)0x6563, (q15_t)0x4E21, (q15_t)0x6526, (q15_t)0x4E70,
+	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x64AA, (q15_t)0x4F0F,
+	(q15_t)0x646C, (q15_t)0x4F5E, (q15_t)0x642D, (q15_t)0x4FAC,
+	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x63B0, (q15_t)0x5049,
+	(q15_t)0x6371, (q15_t)0x5097, (q15_t)0x6331, (q15_t)0x50E5,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x62B2, (q15_t)0x5181,
+	(q15_t)0x6271, (q15_t)0x51CE, (q15_t)0x6231, (q15_t)0x521C,
+	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x61B0, (q15_t)0x52B5,
+	(q15_t)0x616F, (q15_t)0x5302, (q15_t)0x612D, (q15_t)0x534E,
+	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x60AA, (q15_t)0x53E7,
+	(q15_t)0x6068, (q15_t)0x5433, (q15_t)0x6026, (q15_t)0x547E,
+	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5FA0, (q15_t)0x5515,
+	(q15_t)0x5F5E, (q15_t)0x5560, (q15_t)0x5F1A, (q15_t)0x55AB,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E93, (q15_t)0x5640,
+	(q15_t)0x5E50, (q15_t)0x568A, (q15_t)0x5E0B, (q15_t)0x56D4,
+	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5D83, (q15_t)0x5767,
+	(q15_t)0x5D3E, (q15_t)0x57B0, (q15_t)0x5CF9, (q15_t)0x57F9,
+	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C6E, (q15_t)0x588B,
+	(q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5BE3, (q15_t)0x591C,
+	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B56, (q15_t)0x59AC,
+	(q15_t)0x5B10, (q15_t)0x59F3, (q15_t)0x5AC9, (q15_t)0x5A3B,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5A3B, (q15_t)0x5AC9,
+	(q15_t)0x59F3, (q15_t)0x5B10, (q15_t)0x59AC, (q15_t)0x5B56,
+	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x591C, (q15_t)0x5BE3,
+	(q15_t)0x58D4, (q15_t)0x5C29, (q15_t)0x588B, (q15_t)0x5C6E,
+	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x57F9, (q15_t)0x5CF9,
+	(q15_t)0x57B0, (q15_t)0x5D3E, (q15_t)0x5767, (q15_t)0x5D83,
+	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x56D4, (q15_t)0x5E0B,
+	(q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x5640, (q15_t)0x5E93,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x55AB, (q15_t)0x5F1A,
+	(q15_t)0x5560, (q15_t)0x5F5E, (q15_t)0x5515, (q15_t)0x5FA0,
+	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x547E, (q15_t)0x6026,
+	(q15_t)0x5433, (q15_t)0x6068, (q15_t)0x53E7, (q15_t)0x60AA,
+	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x534E, (q15_t)0x612D,
+	(q15_t)0x5302, (q15_t)0x616F, (q15_t)0x52B5, (q15_t)0x61B0,
+	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x521C, (q15_t)0x6231,
+	(q15_t)0x51CE, (q15_t)0x6271, (q15_t)0x5181, (q15_t)0x62B2,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x50E5, (q15_t)0x6331,
+	(q15_t)0x5097, (q15_t)0x6371, (q15_t)0x5049, (q15_t)0x63B0,
+	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4FAC, (q15_t)0x642D,
+	(q15_t)0x4F5E, (q15_t)0x646C, (q15_t)0x4F0F, (q15_t)0x64AA,
+	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E70, (q15_t)0x6526,
+	(q15_t)0x4E21, (q15_t)0x6563, (q15_t)0x4DD1, (q15_t)0x65A0,
+	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4D31, (q15_t)0x661A,
+	(q15_t)0x4CE1, (q15_t)0x6657, (q15_t)0x4C90, (q15_t)0x6693,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4BEF, (q15_t)0x670B,
+	(q15_t)0x4B9E, (q15_t)0x6746, (q15_t)0x4B4C, (q15_t)0x6782,
+	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4AA9, (q15_t)0x67F7,
+	(q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x4A06, (q15_t)0x686C,
+	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x4961, (q15_t)0x68E0,
+	(q15_t)0x490F, (q15_t)0x6919, (q15_t)0x48BC, (q15_t)0x6953,
+	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x4816, (q15_t)0x69C4,
+	(q15_t)0x47C3, (q15_t)0x69FD, (q15_t)0x4770, (q15_t)0x6A35,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x46C9, (q15_t)0x6AA5,
+	(q15_t)0x4675, (q15_t)0x6ADC, (q15_t)0x4621, (q15_t)0x6B13,
+	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x4578, (q15_t)0x6B81,
+	(q15_t)0x4524, (q15_t)0x6BB8, (q15_t)0x44CF, (q15_t)0x6BEE,
+	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4425, (q15_t)0x6C59,
+	(q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x437B, (q15_t)0x6CC4,
+	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x42D0, (q15_t)0x6D2D,
+	(q15_t)0x427A, (q15_t)0x6D62, (q15_t)0x4224, (q15_t)0x6D96,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4177, (q15_t)0x6DFD,
+	(q15_t)0x4121, (q15_t)0x6E30, (q15_t)0x40CA, (q15_t)0x6E63,
+	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x401D, (q15_t)0x6EC9,
+	(q15_t)0x3FC5, (q15_t)0x6EFB, (q15_t)0x3F6E, (q15_t)0x6F2D,
+	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3EBF, (q15_t)0x6F90,
+	(q15_t)0x3E68, (q15_t)0x6FC1, (q15_t)0x3E10, (q15_t)0x6FF2,
+	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D60, (q15_t)0x7053,
+	(q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3CAF, (q15_t)0x70B3,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3BFD, (q15_t)0x7112,
+	(q15_t)0x3BA5, (q15_t)0x7141, (q15_t)0x3B4C, (q15_t)0x716F,
+	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A99, (q15_t)0x71CC,
+	(q15_t)0x3A40, (q15_t)0x71FA, (q15_t)0x39E6, (q15_t)0x7227,
+	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3932, (q15_t)0x7282,
+	(q15_t)0x38D8, (q15_t)0x72AF, (q15_t)0x387E, (q15_t)0x72DB,
+	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x37CA, (q15_t)0x7333,
+	(q15_t)0x376F, (q15_t)0x735F, (q15_t)0x3714, (q15_t)0x738A,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x365F, (q15_t)0x73E0,
+	(q15_t)0x3604, (q15_t)0x740B, (q15_t)0x35A8, (q15_t)0x7435,
+	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x34F2, (q15_t)0x7489,
+	(q15_t)0x3496, (q15_t)0x74B2, (q15_t)0x343A, (q15_t)0x74DB,
+	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3382, (q15_t)0x752D,
+	(q15_t)0x3326, (q15_t)0x7555, (q15_t)0x32CA, (q15_t)0x757D,
+	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x3211, (q15_t)0x75CC,
+	(q15_t)0x31B5, (q15_t)0x75F4, (q15_t)0x3158, (q15_t)0x761B,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x309E, (q15_t)0x7668,
+	(q15_t)0x3041, (q15_t)0x768E, (q15_t)0x2FE4, (q15_t)0x76B3,
+	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2F29, (q15_t)0x76FE,
+	(q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E6E, (q15_t)0x7747,
+	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2DB3, (q15_t)0x7790,
+	(q15_t)0x2D55, (q15_t)0x77B4, (q15_t)0x2CF7, (q15_t)0x77D7,
+	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2C3A, (q15_t)0x781D,
+	(q15_t)0x2BDC, (q15_t)0x7840, (q15_t)0x2B7D, (q15_t)0x7862,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2AC0, (q15_t)0x78A6,
+	(q15_t)0x2A61, (q15_t)0x78C7, (q15_t)0x2A02, (q15_t)0x78E8,
+	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x2944, (q15_t)0x792A,
+	(q15_t)0x28E5, (q15_t)0x794A, (q15_t)0x2886, (q15_t)0x796A,
+	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x27C7, (q15_t)0x79A9,
+	(q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x2707, (q15_t)0x79E7,
+	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x2648, (q15_t)0x7A24,
+	(q15_t)0x25E8, (q15_t)0x7A42, (q15_t)0x2588, (q15_t)0x7A5F,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x24C7, (q15_t)0x7A9A,
+	(q15_t)0x2467, (q15_t)0x7AB6, (q15_t)0x2407, (q15_t)0x7AD3,
+	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2345, (q15_t)0x7B0B,
+	(q15_t)0x22E5, (q15_t)0x7B26, (q15_t)0x2284, (q15_t)0x7B42,
+	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x21C2, (q15_t)0x7B77,
+	(q15_t)0x2161, (q15_t)0x7B92, (q15_t)0x2100, (q15_t)0x7BAC,
+	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x203E, (q15_t)0x7BDF,
+	(q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1F7B, (q15_t)0x7C11,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1EB8, (q15_t)0x7C42,
+	(q15_t)0x1E56, (q15_t)0x7C5A, (q15_t)0x1DF5, (q15_t)0x7C71,
+	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1D31, (q15_t)0x7CA0,
+	(q15_t)0x1CCF, (q15_t)0x7CB7, (q15_t)0x1C6D, (q15_t)0x7CCD,
+	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1BA9, (q15_t)0x7CF9,
+	(q15_t)0x1B47, (q15_t)0x7D0F, (q15_t)0x1AE4, (q15_t)0x7D24,
+	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x1A20, (q15_t)0x7D4E,
+	(q15_t)0x19BD, (q15_t)0x7D62, (q15_t)0x195B, (q15_t)0x7D76,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x1896, (q15_t)0x7D9D,
+	(q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x17D0, (q15_t)0x7DC3,
+	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x170A, (q15_t)0x7DE8,
+	(q15_t)0x16A8, (q15_t)0x7DFA, (q15_t)0x1645, (q15_t)0x7E0C,
+	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x157F, (q15_t)0x7E2E,
+	(q15_t)0x151B, (q15_t)0x7E3F, (q15_t)0x14B8, (q15_t)0x7E4F,
+	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x13F2, (q15_t)0x7E6F,
+	(q15_t)0x138E, (q15_t)0x7E7F, (q15_t)0x132B, (q15_t)0x7E8E,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1264, (q15_t)0x7EAB,
+	(q15_t)0x1201, (q15_t)0x7EBA, (q15_t)0x119D, (q15_t)0x7EC8,
+	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x10D6, (q15_t)0x7EE3,
+	(q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x100E, (q15_t)0x7EFD,
+	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0F47, (q15_t)0x7F15,
+	(q15_t)0x0EE3, (q15_t)0x7F21, (q15_t)0x0E7F, (q15_t)0x7F2D,
+	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0DB7, (q15_t)0x7F43,
+	(q15_t)0x0D53, (q15_t)0x7F4D, (q15_t)0x0CEF, (q15_t)0x7F58,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0C27, (q15_t)0x7F6B,
+	(q15_t)0x0BC3, (q15_t)0x7F75, (q15_t)0x0B5F, (q15_t)0x7F7E,
+	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0A97, (q15_t)0x7F8F,
+	(q15_t)0x0A33, (q15_t)0x7F97, (q15_t)0x09CE, (q15_t)0x7F9F,
+	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0906, (q15_t)0x7FAE,
+	(q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x083D, (q15_t)0x7FBC,
+	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0775, (q15_t)0x7FC8,
+	(q15_t)0x0710, (q15_t)0x7FCE, (q15_t)0x06AC, (q15_t)0x7FD3,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x05E3, (q15_t)0x7FDD,
+	(q15_t)0x057F, (q15_t)0x7FE1, (q15_t)0x051A, (q15_t)0x7FE5,
+	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0451, (q15_t)0x7FED,
+	(q15_t)0x03ED, (q15_t)0x7FF0, (q15_t)0x0388, (q15_t)0x7FF3,
+	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x02BF, (q15_t)0x7FF8,
+	(q15_t)0x025B, (q15_t)0x7FFA, (q15_t)0x01F6, (q15_t)0x7FFC,
+	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x012D, (q15_t)0x7FFE,
+	(q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFF9B, (q15_t)0x7FFF,
+	(q15_t)0xFF36, (q15_t)0x7FFF, (q15_t)0xFED2, (q15_t)0x7FFE,
+	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFE09, (q15_t)0x7FFC,
+	(q15_t)0xFDA4, (q15_t)0x7FFA, (q15_t)0xFD40, (q15_t)0x7FF8,
+	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC77, (q15_t)0x7FF3,
+	(q15_t)0xFC12, (q15_t)0x7FF0, (q15_t)0xFBAE, (q15_t)0x7FED,
+	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFAE5, (q15_t)0x7FE5,
+	(q15_t)0xFA80, (q15_t)0x7FE1, (q15_t)0xFA1C, (q15_t)0x7FDD,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF953, (q15_t)0x7FD3,
+	(q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF88A, (q15_t)0x7FC8,
+	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF7C2, (q15_t)0x7FBC,
+	(q15_t)0xF75D, (q15_t)0x7FB5, (q15_t)0xF6F9, (q15_t)0x7FAE,
+	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF631, (q15_t)0x7F9F,
+	(q15_t)0xF5CC, (q15_t)0x7F97, (q15_t)0xF568, (q15_t)0x7F8F,
+	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF4A0, (q15_t)0x7F7E,
+	(q15_t)0xF43C, (q15_t)0x7F75, (q15_t)0xF3D8, (q15_t)0x7F6B,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF310, (q15_t)0x7F58,
+	(q15_t)0xF2AC, (q15_t)0x7F4D, (q15_t)0xF248, (q15_t)0x7F43,
+	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF180, (q15_t)0x7F2D,
+	(q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF0B8, (q15_t)0x7F15,
+	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEFF1, (q15_t)0x7EFD,
+	(q15_t)0xEF8D, (q15_t)0x7EF0, (q15_t)0xEF29, (q15_t)0x7EE3,
+	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEE62, (q15_t)0x7EC8,
+	(q15_t)0xEDFE, (q15_t)0x7EBA, (q15_t)0xED9B, (q15_t)0x7EAB,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xECD4, (q15_t)0x7E8E,
+	(q15_t)0xEC71, (q15_t)0x7E7F, (q15_t)0xEC0D, (q15_t)0x7E6F,
+	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEB47, (q15_t)0x7E4F,
+	(q15_t)0xEAE4, (q15_t)0x7E3F, (q15_t)0xEA80, (q15_t)0x7E2E,
+	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE9BA, (q15_t)0x7E0C,
+	(q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE8F5, (q15_t)0x7DE8,
+	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE82F, (q15_t)0x7DC3,
+	(q15_t)0xE7CC, (q15_t)0x7DB0, (q15_t)0xE769, (q15_t)0x7D9D,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE6A4, (q15_t)0x7D76,
+	(q15_t)0xE642, (q15_t)0x7D62, (q15_t)0xE5DF, (q15_t)0x7D4E,
+	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE51B, (q15_t)0x7D24,
+	(q15_t)0xE4B8, (q15_t)0x7D0F, (q15_t)0xE456, (q15_t)0x7CF9,
+	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE392, (q15_t)0x7CCD,
+	(q15_t)0xE330, (q15_t)0x7CB7, (q15_t)0xE2CE, (q15_t)0x7CA0,
+	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE20A, (q15_t)0x7C71,
+	(q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE147, (q15_t)0x7C42,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE084, (q15_t)0x7C11,
+	(q15_t)0xE023, (q15_t)0x7BF8, (q15_t)0xDFC1, (q15_t)0x7BDF,
+	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDEFF, (q15_t)0x7BAC,
+	(q15_t)0xDE9E, (q15_t)0x7B92, (q15_t)0xDE3D, (q15_t)0x7B77,
+	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD7B, (q15_t)0x7B42,
+	(q15_t)0xDD1A, (q15_t)0x7B26, (q15_t)0xDCBA, (q15_t)0x7B0B,
+	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDBF8, (q15_t)0x7AD3,
+	(q15_t)0xDB98, (q15_t)0x7AB6, (q15_t)0xDB38, (q15_t)0x7A9A,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDA77, (q15_t)0x7A5F,
+	(q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD9B7, (q15_t)0x7A24,
+	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD8F8, (q15_t)0x79E7,
+	(q15_t)0xD898, (q15_t)0x79C8, (q15_t)0xD838, (q15_t)0x79A9,
+	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD779, (q15_t)0x796A,
+	(q15_t)0xD71A, (q15_t)0x794A, (q15_t)0xD6BB, (q15_t)0x792A,
+	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD5FD, (q15_t)0x78E8,
+	(q15_t)0xD59E, (q15_t)0x78C7, (q15_t)0xD53F, (q15_t)0x78A6,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD482, (q15_t)0x7862,
+	(q15_t)0xD423, (q15_t)0x7840, (q15_t)0xD3C5, (q15_t)0x781D,
+	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD308, (q15_t)0x77D7,
+	(q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD24C, (q15_t)0x7790,
+	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD191, (q15_t)0x7747,
+	(q15_t)0xD133, (q15_t)0x7723, (q15_t)0xD0D6, (q15_t)0x76FE,
+	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xD01B, (q15_t)0x76B3,
+	(q15_t)0xCFBE, (q15_t)0x768E, (q15_t)0xCF61, (q15_t)0x7668,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCEA7, (q15_t)0x761B,
+	(q15_t)0xCE4A, (q15_t)0x75F4, (q15_t)0xCDEE, (q15_t)0x75CC,
+	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCD35, (q15_t)0x757D,
+	(q15_t)0xCCD9, (q15_t)0x7555, (q15_t)0xCC7D, (q15_t)0x752D,
+	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCBC5, (q15_t)0x74DB,
+	(q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCB0D, (q15_t)0x7489,
+	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xCA57, (q15_t)0x7435,
+	(q15_t)0xC9FB, (q15_t)0x740B, (q15_t)0xC9A0, (q15_t)0x73E0,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC8EB, (q15_t)0x738A,
+	(q15_t)0xC890, (q15_t)0x735F, (q15_t)0xC835, (q15_t)0x7333,
+	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC781, (q15_t)0x72DB,
+	(q15_t)0xC727, (q15_t)0x72AF, (q15_t)0xC6CD, (q15_t)0x7282,
+	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC619, (q15_t)0x7227,
+	(q15_t)0xC5BF, (q15_t)0x71FA, (q15_t)0xC566, (q15_t)0x71CC,
+	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC4B3, (q15_t)0x716F,
+	(q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC402, (q15_t)0x7112,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC350, (q15_t)0x70B3,
+	(q15_t)0xC2F8, (q15_t)0x7083, (q15_t)0xC29F, (q15_t)0x7053,
+	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC1EF, (q15_t)0x6FF2,
+	(q15_t)0xC197, (q15_t)0x6FC1, (q15_t)0xC140, (q15_t)0x6F90,
+	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC091, (q15_t)0x6F2D,
+	(q15_t)0xC03A, (q15_t)0x6EFB, (q15_t)0xBFE2, (q15_t)0x6EC9,
+	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBF35, (q15_t)0x6E63,
+	(q15_t)0xBEDE, (q15_t)0x6E30, (q15_t)0xBE88, (q15_t)0x6DFD,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBDDB, (q15_t)0x6D96,
+	(q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBD2F, (q15_t)0x6D2D,
+	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBC84, (q15_t)0x6CC4,
+	(q15_t)0xBC2F, (q15_t)0x6C8F, (q15_t)0xBBDA, (q15_t)0x6C59,
+	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBB30, (q15_t)0x6BEE,
+	(q15_t)0xBADB, (q15_t)0x6BB8, (q15_t)0xBA87, (q15_t)0x6B81,
+	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB9DE, (q15_t)0x6B13,
+	(q15_t)0xB98A, (q15_t)0x6ADC, (q15_t)0xB936, (q15_t)0x6AA5,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB88F, (q15_t)0x6A35,
+	(q15_t)0xB83C, (q15_t)0x69FD, (q15_t)0xB7E9, (q15_t)0x69C4,
+	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB743, (q15_t)0x6953,
+	(q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB69E, (q15_t)0x68E0,
+	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB5F9, (q15_t)0x686C,
+	(q15_t)0xB5A7, (q15_t)0x6832, (q15_t)0xB556, (q15_t)0x67F7,
+	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB4B3, (q15_t)0x6782,
+	(q15_t)0xB461, (q15_t)0x6746, (q15_t)0xB410, (q15_t)0x670B,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB36F, (q15_t)0x6693,
+	(q15_t)0xB31E, (q15_t)0x6657, (q15_t)0xB2CE, (q15_t)0x661A,
+	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB22E, (q15_t)0x65A0,
+	(q15_t)0xB1DE, (q15_t)0x6563, (q15_t)0xB18F, (q15_t)0x6526,
+	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB0F0, (q15_t)0x64AA,
+	(q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB053, (q15_t)0x642D,
+	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAFB6, (q15_t)0x63B0,
+	(q15_t)0xAF68, (q15_t)0x6371, (q15_t)0xAF1A, (q15_t)0x6331,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAE7E, (q15_t)0x62B2,
+	(q15_t)0xAE31, (q15_t)0x6271, (q15_t)0xADE3, (q15_t)0x6231,
+	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAD4A, (q15_t)0x61B0,
+	(q15_t)0xACFD, (q15_t)0x616F, (q15_t)0xACB1, (q15_t)0x612D,
+	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAC18, (q15_t)0x60AA,
+	(q15_t)0xABCC, (q15_t)0x6068, (q15_t)0xAB81, (q15_t)0x6026,
+	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAAEA, (q15_t)0x5FA0,
+	(q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA54, (q15_t)0x5F1A,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA9BF, (q15_t)0x5E93,
+	(q15_t)0xA975, (q15_t)0x5E50, (q15_t)0xA92B, (q15_t)0x5E0B,
+	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA898, (q15_t)0x5D83,
+	(q15_t)0xA84F, (q15_t)0x5D3E, (q15_t)0xA806, (q15_t)0x5CF9,
+	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA774, (q15_t)0x5C6E,
+	(q15_t)0xA72B, (q15_t)0x5C29, (q15_t)0xA6E3, (q15_t)0x5BE3,
+	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA653, (q15_t)0x5B56,
+	(q15_t)0xA60C, (q15_t)0x5B10, (q15_t)0xA5C4, (q15_t)0x5AC9,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA536, (q15_t)0x5A3B,
+	(q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA4A9, (q15_t)0x59AC,
+	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA41C, (q15_t)0x591C,
+	(q15_t)0xA3D6, (q15_t)0x58D4, (q15_t)0xA391, (q15_t)0x588B,
+	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA306, (q15_t)0x57F9,
+	(q15_t)0xA2C1, (q15_t)0x57B0, (q15_t)0xA27C, (q15_t)0x5767,
+	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA1F4, (q15_t)0x56D4,
+	(q15_t)0xA1AF, (q15_t)0x568A, (q15_t)0xA16C, (q15_t)0x5640,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA0E5, (q15_t)0x55AB,
+	(q15_t)0xA0A1, (q15_t)0x5560, (q15_t)0xA05F, (q15_t)0x5515,
+	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9FD9, (q15_t)0x547E,
+	(q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F55, (q15_t)0x53E7,
+	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9ED2, (q15_t)0x534E,
+	(q15_t)0x9E90, (q15_t)0x5302, (q15_t)0x9E4F, (q15_t)0x52B5,
+	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9DCE, (q15_t)0x521C,
+	(q15_t)0x9D8E, (q15_t)0x51CE, (q15_t)0x9D4D, (q15_t)0x5181,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9CCE, (q15_t)0x50E5,
+	(q15_t)0x9C8E, (q15_t)0x5097, (q15_t)0x9C4F, (q15_t)0x5049,
+	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9BD2, (q15_t)0x4FAC,
+	(q15_t)0x9B93, (q15_t)0x4F5E, (q15_t)0x9B55, (q15_t)0x4F0F,
+	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9AD9, (q15_t)0x4E70,
+	(q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A5F, (q15_t)0x4DD1,
+	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x99E5, (q15_t)0x4D31,
+	(q15_t)0x99A8, (q15_t)0x4CE1, (q15_t)0x996C, (q15_t)0x4C90,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x98F4, (q15_t)0x4BEF,
+	(q15_t)0x98B9, (q15_t)0x4B9E, (q15_t)0x987D, (q15_t)0x4B4C,
+	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9808, (q15_t)0x4AA9,
+	(q15_t)0x97CD, (q15_t)0x4A58, (q15_t)0x9793, (q15_t)0x4A06,
+	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x971F, (q15_t)0x4961,
+	(q15_t)0x96E6, (q15_t)0x490F, (q15_t)0x96AC, (q15_t)0x48BC,
+	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x963B, (q15_t)0x4816,
+	(q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x95CA, (q15_t)0x4770,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x955A, (q15_t)0x46C9,
+	(q15_t)0x9523, (q15_t)0x4675, (q15_t)0x94EC, (q15_t)0x4621,
+	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x947E, (q15_t)0x4578,
+	(q15_t)0x9447, (q15_t)0x4524, (q15_t)0x9411, (q15_t)0x44CF,
+	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x93A6, (q15_t)0x4425,
+	(q15_t)0x9370, (q15_t)0x43D0, (q15_t)0x933B, (q15_t)0x437B,
+	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x92D2, (q15_t)0x42D0,
+	(q15_t)0x929D, (q15_t)0x427A, (q15_t)0x9269, (q15_t)0x4224,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x9202, (q15_t)0x4177,
+	(q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x919C, (q15_t)0x40CA,
+	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9136, (q15_t)0x401D,
+	(q15_t)0x9104, (q15_t)0x3FC5, (q15_t)0x90D2, (q15_t)0x3F6E,
+	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x906F, (q15_t)0x3EBF,
+	(q15_t)0x903E, (q15_t)0x3E68, (q15_t)0x900D, (q15_t)0x3E10,
+	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8FAC, (q15_t)0x3D60,
+	(q15_t)0x8F7C, (q15_t)0x3D07, (q15_t)0x8F4C, (q15_t)0x3CAF,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8EED, (q15_t)0x3BFD,
+	(q15_t)0x8EBE, (q15_t)0x3BA5, (q15_t)0x8E90, (q15_t)0x3B4C,
+	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E33, (q15_t)0x3A99,
+	(q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DD8, (q15_t)0x39E6,
+	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D7D, (q15_t)0x3932,
+	(q15_t)0x8D50, (q15_t)0x38D8, (q15_t)0x8D24, (q15_t)0x387E,
+	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CCC, (q15_t)0x37CA,
+	(q15_t)0x8CA0, (q15_t)0x376F, (q15_t)0x8C75, (q15_t)0x3714,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8C1F, (q15_t)0x365F,
+	(q15_t)0x8BF4, (q15_t)0x3604, (q15_t)0x8BCA, (q15_t)0x35A8,
+	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B76, (q15_t)0x34F2,
+	(q15_t)0x8B4D, (q15_t)0x3496, (q15_t)0x8B24, (q15_t)0x343A,
+	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AD2, (q15_t)0x3382,
+	(q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A82, (q15_t)0x32CA,
+	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A33, (q15_t)0x3211,
+	(q15_t)0x8A0B, (q15_t)0x31B5, (q15_t)0x89E4, (q15_t)0x3158,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8997, (q15_t)0x309E,
+	(q15_t)0x8971, (q15_t)0x3041, (q15_t)0x894C, (q15_t)0x2FE4,
+	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8901, (q15_t)0x2F29,
+	(q15_t)0x88DC, (q15_t)0x2ECC, (q15_t)0x88B8, (q15_t)0x2E6E,
+	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x886F, (q15_t)0x2DB3,
+	(q15_t)0x884B, (q15_t)0x2D55, (q15_t)0x8828, (q15_t)0x2CF7,
+	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87E2, (q15_t)0x2C3A,
+	(q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x879D, (q15_t)0x2B7D,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8759, (q15_t)0x2AC0,
+	(q15_t)0x8738, (q15_t)0x2A61, (q15_t)0x8717, (q15_t)0x2A02,
+	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86D5, (q15_t)0x2944,
+	(q15_t)0x86B5, (q15_t)0x28E5, (q15_t)0x8695, (q15_t)0x2886,
+	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8656, (q15_t)0x27C7,
+	(q15_t)0x8637, (q15_t)0x2767, (q15_t)0x8618, (q15_t)0x2707,
+	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85DB, (q15_t)0x2648,
+	(q15_t)0x85BD, (q15_t)0x25E8, (q15_t)0x85A0, (q15_t)0x2588,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8565, (q15_t)0x24C7,
+	(q15_t)0x8549, (q15_t)0x2467, (q15_t)0x852C, (q15_t)0x2407,
+	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x84F4, (q15_t)0x2345,
+	(q15_t)0x84D9, (q15_t)0x22E5, (q15_t)0x84BD, (q15_t)0x2284,
+	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x8488, (q15_t)0x21C2,
+	(q15_t)0x846D, (q15_t)0x2161, (q15_t)0x8453, (q15_t)0x2100,
+	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x8420, (q15_t)0x203E,
+	(q15_t)0x8407, (q15_t)0x1FDC, (q15_t)0x83EE, (q15_t)0x1F7B,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83BD, (q15_t)0x1EB8,
+	(q15_t)0x83A5, (q15_t)0x1E56, (q15_t)0x838E, (q15_t)0x1DF5,
+	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x835F, (q15_t)0x1D31,
+	(q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x8332, (q15_t)0x1C6D,
+	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x8306, (q15_t)0x1BA9,
+	(q15_t)0x82F0, (q15_t)0x1B47, (q15_t)0x82DB, (q15_t)0x1AE4,
+	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x82B1, (q15_t)0x1A20,
+	(q15_t)0x829D, (q15_t)0x19BD, (q15_t)0x8289, (q15_t)0x195B,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8262, (q15_t)0x1896,
+	(q15_t)0x824F, (q15_t)0x1833, (q15_t)0x823C, (q15_t)0x17D0,
+	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8217, (q15_t)0x170A,
+	(q15_t)0x8205, (q15_t)0x16A8, (q15_t)0x81F3, (q15_t)0x1645,
+	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81D1, (q15_t)0x157F,
+	(q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81B0, (q15_t)0x14B8,
+	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8190, (q15_t)0x13F2,
+	(q15_t)0x8180, (q15_t)0x138E, (q15_t)0x8171, (q15_t)0x132B,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x8154, (q15_t)0x1264,
+	(q15_t)0x8145, (q15_t)0x1201, (q15_t)0x8137, (q15_t)0x119D,
+	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x811C, (q15_t)0x10D6,
+	(q15_t)0x810F, (q15_t)0x1072, (q15_t)0x8102, (q15_t)0x100E,
+	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80EA, (q15_t)0x0F47,
+	(q15_t)0x80DE, (q15_t)0x0EE3, (q15_t)0x80D2, (q15_t)0x0E7F,
+	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80BC, (q15_t)0x0DB7,
+	(q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x80A7, (q15_t)0x0CEF,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8094, (q15_t)0x0C27,
+	(q15_t)0x808A, (q15_t)0x0BC3, (q15_t)0x8081, (q15_t)0x0B5F,
+	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8070, (q15_t)0x0A97,
+	(q15_t)0x8068, (q15_t)0x0A33, (q15_t)0x8060, (q15_t)0x09CE,
+	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8051, (q15_t)0x0906,
+	(q15_t)0x804A, (q15_t)0x08A2, (q15_t)0x8043, (q15_t)0x083D,
+	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x8037, (q15_t)0x0775,
+	(q15_t)0x8031, (q15_t)0x0710, (q15_t)0x802C, (q15_t)0x06AC,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8022, (q15_t)0x05E3,
+	(q15_t)0x801E, (q15_t)0x057F, (q15_t)0x801A, (q15_t)0x051A,
+	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x8012, (q15_t)0x0451,
+	(q15_t)0x800F, (q15_t)0x03ED, (q15_t)0x800C, (q15_t)0x0388,
+	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8007, (q15_t)0x02BF,
+	(q15_t)0x8005, (q15_t)0x025B, (q15_t)0x8003, (q15_t)0x01F6,
+	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8001, (q15_t)0x012D,
+	(q15_t)0x8000, (q15_t)0x00C9, (q15_t)0x8000, (q15_t)0x0064,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFF9B,
+	(q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8001, (q15_t)0xFED2,
+	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8003, (q15_t)0xFE09,
+	(q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8007, (q15_t)0xFD40,
+	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800C, (q15_t)0xFC77,
+	(q15_t)0x800F, (q15_t)0xFC12, (q15_t)0x8012, (q15_t)0xFBAE,
+	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x801A, (q15_t)0xFAE5,
+	(q15_t)0x801E, (q15_t)0xFA80, (q15_t)0x8022, (q15_t)0xFA1C,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x802C, (q15_t)0xF953,
+	(q15_t)0x8031, (q15_t)0xF8EF, (q15_t)0x8037, (q15_t)0xF88A,
+	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x8043, (q15_t)0xF7C2,
+	(q15_t)0x804A, (q15_t)0xF75D, (q15_t)0x8051, (q15_t)0xF6F9,
+	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8060, (q15_t)0xF631,
+	(q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x8070, (q15_t)0xF568,
+	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x8081, (q15_t)0xF4A0,
+	(q15_t)0x808A, (q15_t)0xF43C, (q15_t)0x8094, (q15_t)0xF3D8,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80A7, (q15_t)0xF310,
+	(q15_t)0x80B2, (q15_t)0xF2AC, (q15_t)0x80BC, (q15_t)0xF248,
+	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80D2, (q15_t)0xF180,
+	(q15_t)0x80DE, (q15_t)0xF11C, (q15_t)0x80EA, (q15_t)0xF0B8,
+	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x8102, (q15_t)0xEFF1,
+	(q15_t)0x810F, (q15_t)0xEF8D, (q15_t)0x811C, (q15_t)0xEF29,
+	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8137, (q15_t)0xEE62,
+	(q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x8154, (q15_t)0xED9B,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x8171, (q15_t)0xECD4,
+	(q15_t)0x8180, (q15_t)0xEC71, (q15_t)0x8190, (q15_t)0xEC0D,
+	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81B0, (q15_t)0xEB47,
+	(q15_t)0x81C0, (q15_t)0xEAE4, (q15_t)0x81D1, (q15_t)0xEA80,
+	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x81F3, (q15_t)0xE9BA,
+	(q15_t)0x8205, (q15_t)0xE957, (q15_t)0x8217, (q15_t)0xE8F5,
+	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x823C, (q15_t)0xE82F,
+	(q15_t)0x824F, (q15_t)0xE7CC, (q15_t)0x8262, (q15_t)0xE769,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x8289, (q15_t)0xE6A4,
+	(q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82B1, (q15_t)0xE5DF,
+	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82DB, (q15_t)0xE51B,
+	(q15_t)0x82F0, (q15_t)0xE4B8, (q15_t)0x8306, (q15_t)0xE456,
+	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8332, (q15_t)0xE392,
+	(q15_t)0x8348, (q15_t)0xE330, (q15_t)0x835F, (q15_t)0xE2CE,
+	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x838E, (q15_t)0xE20A,
+	(q15_t)0x83A5, (q15_t)0xE1A9, (q15_t)0x83BD, (q15_t)0xE147,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x83EE, (q15_t)0xE084,
+	(q15_t)0x8407, (q15_t)0xE023, (q15_t)0x8420, (q15_t)0xDFC1,
+	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x8453, (q15_t)0xDEFF,
+	(q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x8488, (q15_t)0xDE3D,
+	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84BD, (q15_t)0xDD7B,
+	(q15_t)0x84D9, (q15_t)0xDD1A, (q15_t)0x84F4, (q15_t)0xDCBA,
+	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x852C, (q15_t)0xDBF8,
+	(q15_t)0x8549, (q15_t)0xDB98, (q15_t)0x8565, (q15_t)0xDB38,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85A0, (q15_t)0xDA77,
+	(q15_t)0x85BD, (q15_t)0xDA17, (q15_t)0x85DB, (q15_t)0xD9B7,
+	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8618, (q15_t)0xD8F8,
+	(q15_t)0x8637, (q15_t)0xD898, (q15_t)0x8656, (q15_t)0xD838,
+	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x8695, (q15_t)0xD779,
+	(q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86D5, (q15_t)0xD6BB,
+	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8717, (q15_t)0xD5FD,
+	(q15_t)0x8738, (q15_t)0xD59E, (q15_t)0x8759, (q15_t)0xD53F,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x879D, (q15_t)0xD482,
+	(q15_t)0x87BF, (q15_t)0xD423, (q15_t)0x87E2, (q15_t)0xD3C5,
+	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8828, (q15_t)0xD308,
+	(q15_t)0x884B, (q15_t)0xD2AA, (q15_t)0x886F, (q15_t)0xD24C,
+	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88B8, (q15_t)0xD191,
+	(q15_t)0x88DC, (q15_t)0xD133, (q15_t)0x8901, (q15_t)0xD0D6,
+	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x894C, (q15_t)0xD01B,
+	(q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x8997, (q15_t)0xCF61,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x89E4, (q15_t)0xCEA7,
+	(q15_t)0x8A0B, (q15_t)0xCE4A, (q15_t)0x8A33, (q15_t)0xCDEE,
+	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8A82, (q15_t)0xCD35,
+	(q15_t)0x8AAA, (q15_t)0xCCD9, (q15_t)0x8AD2, (q15_t)0xCC7D,
+	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B24, (q15_t)0xCBC5,
+	(q15_t)0x8B4D, (q15_t)0xCB69, (q15_t)0x8B76, (q15_t)0xCB0D,
+	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BCA, (q15_t)0xCA57,
+	(q15_t)0x8BF4, (q15_t)0xC9FB, (q15_t)0x8C1F, (q15_t)0xC9A0,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8C75, (q15_t)0xC8EB,
+	(q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CCC, (q15_t)0xC835,
+	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D24, (q15_t)0xC781,
+	(q15_t)0x8D50, (q15_t)0xC727, (q15_t)0x8D7D, (q15_t)0xC6CD,
+	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8DD8, (q15_t)0xC619,
+	(q15_t)0x8E05, (q15_t)0xC5BF, (q15_t)0x8E33, (q15_t)0xC566,
+	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8E90, (q15_t)0xC4B3,
+	(q15_t)0x8EBE, (q15_t)0xC45A, (q15_t)0x8EED, (q15_t)0xC402,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F4C, (q15_t)0xC350,
+	(q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8FAC, (q15_t)0xC29F,
+	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x900D, (q15_t)0xC1EF,
+	(q15_t)0x903E, (q15_t)0xC197, (q15_t)0x906F, (q15_t)0xC140,
+	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x90D2, (q15_t)0xC091,
+	(q15_t)0x9104, (q15_t)0xC03A, (q15_t)0x9136, (q15_t)0xBFE2,
+	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x919C, (q15_t)0xBF35,
+	(q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x9202, (q15_t)0xBE88,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9269, (q15_t)0xBDDB,
+	(q15_t)0x929D, (q15_t)0xBD85, (q15_t)0x92D2, (q15_t)0xBD2F,
+	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x933B, (q15_t)0xBC84,
+	(q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x93A6, (q15_t)0xBBDA,
+	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9411, (q15_t)0xBB30,
+	(q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x947E, (q15_t)0xBA87,
+	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x94EC, (q15_t)0xB9DE,
+	(q15_t)0x9523, (q15_t)0xB98A, (q15_t)0x955A, (q15_t)0xB936,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x95CA, (q15_t)0xB88F,
+	(q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x963B, (q15_t)0xB7E9,
+	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96AC, (q15_t)0xB743,
+	(q15_t)0x96E6, (q15_t)0xB6F0, (q15_t)0x971F, (q15_t)0xB69E,
+	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9793, (q15_t)0xB5F9,
+	(q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x9808, (q15_t)0xB556,
+	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x987D, (q15_t)0xB4B3,
+	(q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98F4, (q15_t)0xB410,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x996C, (q15_t)0xB36F,
+	(q15_t)0x99A8, (q15_t)0xB31E, (q15_t)0x99E5, (q15_t)0xB2CE,
+	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A5F, (q15_t)0xB22E,
+	(q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9AD9, (q15_t)0xB18F,
+	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B55, (q15_t)0xB0F0,
+	(q15_t)0x9B93, (q15_t)0xB0A1, (q15_t)0x9BD2, (q15_t)0xB053,
+	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C4F, (q15_t)0xAFB6,
+	(q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9CCE, (q15_t)0xAF1A,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D4D, (q15_t)0xAE7E,
+	(q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DCE, (q15_t)0xADE3,
+	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E4F, (q15_t)0xAD4A,
+	(q15_t)0x9E90, (q15_t)0xACFD, (q15_t)0x9ED2, (q15_t)0xACB1,
+	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F55, (q15_t)0xAC18,
+	(q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FD9, (q15_t)0xAB81,
+	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA05F, (q15_t)0xAAEA,
+	(q15_t)0xA0A1, (q15_t)0xAA9F, (q15_t)0xA0E5, (q15_t)0xAA54,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA16C, (q15_t)0xA9BF,
+	(q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA1F4, (q15_t)0xA92B,
+	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA27C, (q15_t)0xA898,
+	(q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA306, (q15_t)0xA806,
+	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA391, (q15_t)0xA774,
+	(q15_t)0xA3D6, (q15_t)0xA72B, (q15_t)0xA41C, (q15_t)0xA6E3,
+	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4A9, (q15_t)0xA653,
+	(q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA536, (q15_t)0xA5C4,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5C4, (q15_t)0xA536,
+	(q15_t)0xA60C, (q15_t)0xA4EF, (q15_t)0xA653, (q15_t)0xA4A9,
+	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA6E3, (q15_t)0xA41C,
+	(q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA774, (q15_t)0xA391,
+	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA806, (q15_t)0xA306,
+	(q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA898, (q15_t)0xA27C,
+	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA92B, (q15_t)0xA1F4,
+	(q15_t)0xA975, (q15_t)0xA1AF, (q15_t)0xA9BF, (q15_t)0xA16C,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA54, (q15_t)0xA0E5,
+	(q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAEA, (q15_t)0xA05F,
+	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB81, (q15_t)0x9FD9,
+	(q15_t)0xABCC, (q15_t)0x9F97, (q15_t)0xAC18, (q15_t)0x9F55,
+	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xACB1, (q15_t)0x9ED2,
+	(q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD4A, (q15_t)0x9E4F,
+	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADE3, (q15_t)0x9DCE,
+	(q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE7E, (q15_t)0x9D4D,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF1A, (q15_t)0x9CCE,
+	(q15_t)0xAF68, (q15_t)0x9C8E, (q15_t)0xAFB6, (q15_t)0x9C4F,
+	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB053, (q15_t)0x9BD2,
+	(q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0F0, (q15_t)0x9B55,
+	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB18F, (q15_t)0x9AD9,
+	(q15_t)0xB1DE, (q15_t)0x9A9C, (q15_t)0xB22E, (q15_t)0x9A5F,
+	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB2CE, (q15_t)0x99E5,
+	(q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB36F, (q15_t)0x996C,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB410, (q15_t)0x98F4,
+	(q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB4B3, (q15_t)0x987D,
+	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB556, (q15_t)0x9808,
+	(q15_t)0xB5A7, (q15_t)0x97CD, (q15_t)0xB5F9, (q15_t)0x9793,
+	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB69E, (q15_t)0x971F,
+	(q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB743, (q15_t)0x96AC,
+	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7E9, (q15_t)0x963B,
+	(q15_t)0xB83C, (q15_t)0x9602, (q15_t)0xB88F, (q15_t)0x95CA,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB936, (q15_t)0x955A,
+	(q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xB9DE, (q15_t)0x94EC,
+	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA87, (q15_t)0x947E,
+	(q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB30, (q15_t)0x9411,
+	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBBDA, (q15_t)0x93A6,
+	(q15_t)0xBC2F, (q15_t)0x9370, (q15_t)0xBC84, (q15_t)0x933B,
+	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD2F, (q15_t)0x92D2,
+	(q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDDB, (q15_t)0x9269,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE88, (q15_t)0x9202,
+	(q15_t)0xBEDE, (q15_t)0x91CF, (q15_t)0xBF35, (q15_t)0x919C,
+	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xBFE2, (q15_t)0x9136,
+	(q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC091, (q15_t)0x90D2,
+	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC140, (q15_t)0x906F,
+	(q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1EF, (q15_t)0x900D,
+	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC29F, (q15_t)0x8FAC,
+	(q15_t)0xC2F8, (q15_t)0x8F7C, (q15_t)0xC350, (q15_t)0x8F4C,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC402, (q15_t)0x8EED,
+	(q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC4B3, (q15_t)0x8E90,
+	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC566, (q15_t)0x8E33,
+	(q15_t)0xC5BF, (q15_t)0x8E05, (q15_t)0xC619, (q15_t)0x8DD8,
+	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC6CD, (q15_t)0x8D7D,
+	(q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC781, (q15_t)0x8D24,
+	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC835, (q15_t)0x8CCC,
+	(q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8EB, (q15_t)0x8C75,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9A0, (q15_t)0x8C1F,
+	(q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA57, (q15_t)0x8BCA,
+	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB0D, (q15_t)0x8B76,
+	(q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCBC5, (q15_t)0x8B24,
+	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC7D, (q15_t)0x8AD2,
+	(q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD35, (q15_t)0x8A82,
+	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDEE, (q15_t)0x8A33,
+	(q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCEA7, (q15_t)0x89E4,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF61, (q15_t)0x8997,
+	(q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xD01B, (q15_t)0x894C,
+	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD0D6, (q15_t)0x8901,
+	(q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD191, (q15_t)0x88B8,
+	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD24C, (q15_t)0x886F,
+	(q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD308, (q15_t)0x8828,
+	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD3C5, (q15_t)0x87E2,
+	(q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD482, (q15_t)0x879D,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD53F, (q15_t)0x8759,
+	(q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5FD, (q15_t)0x8717,
+	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD6BB, (q15_t)0x86D5,
+	(q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD779, (q15_t)0x8695,
+	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD838, (q15_t)0x8656,
+	(q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8F8, (q15_t)0x8618,
+	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD9B7, (q15_t)0x85DB,
+	(q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA77, (q15_t)0x85A0,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB38, (q15_t)0x8565,
+	(q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDBF8, (q15_t)0x852C,
+	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDCBA, (q15_t)0x84F4,
+	(q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD7B, (q15_t)0x84BD,
+	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE3D, (q15_t)0x8488,
+	(q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDEFF, (q15_t)0x8453,
+	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xDFC1, (q15_t)0x8420,
+	(q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE084, (q15_t)0x83EE,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE147, (q15_t)0x83BD,
+	(q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE20A, (q15_t)0x838E,
+	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE2CE, (q15_t)0x835F,
+	(q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE392, (q15_t)0x8332,
+	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE456, (q15_t)0x8306,
+	(q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE51B, (q15_t)0x82DB,
+	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5DF, (q15_t)0x82B1,
+	(q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE6A4, (q15_t)0x8289,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE769, (q15_t)0x8262,
+	(q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE82F, (q15_t)0x823C,
+	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8F5, (q15_t)0x8217,
+	(q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE9BA, (q15_t)0x81F3,
+	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA80, (q15_t)0x81D1,
+	(q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEB47, (q15_t)0x81B0,
+	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEC0D, (q15_t)0x8190,
+	(q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECD4, (q15_t)0x8171,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED9B, (q15_t)0x8154,
+	(q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE62, (q15_t)0x8137,
+	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF29, (q15_t)0x811C,
+	(q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFF1, (q15_t)0x8102,
+	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF0B8, (q15_t)0x80EA,
+	(q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF180, (q15_t)0x80D2,
+	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF248, (q15_t)0x80BC,
+	(q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF310, (q15_t)0x80A7,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3D8, (q15_t)0x8094,
+	(q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF4A0, (q15_t)0x8081,
+	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF568, (q15_t)0x8070,
+	(q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF631, (q15_t)0x8060,
+	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF6F9, (q15_t)0x8051,
+	(q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF7C2, (q15_t)0x8043,
+	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF88A, (q15_t)0x8037,
+	(q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF953, (q15_t)0x802C,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA1C, (q15_t)0x8022,
+	(q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFAE5, (q15_t)0x801A,
+	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFBAE, (q15_t)0x8012,
+	(q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC77, (q15_t)0x800C,
+	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD40, (q15_t)0x8007,
+	(q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFE09, (q15_t)0x8003,
+	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFED2, (q15_t)0x8001,
+	(q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  
for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } 

+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_4096_q15[6144] =
+{
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0032,
+	(q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0096,
+	(q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x00FB,
+	(q15_t)0x7FFE, (q15_t)0x012D, (q15_t)0x7FFE, (q15_t)0x015F,
+	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01C4,
+	(q15_t)0x7FFC, (q15_t)0x01F6, (q15_t)0x7FFB, (q15_t)0x0228,
+	(q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF9, (q15_t)0x028D,
+	(q15_t)0x7FF8, (q15_t)0x02BF, (q15_t)0x7FF7, (q15_t)0x02F1,
+	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF4, (q15_t)0x0356,
+	(q15_t)0x7FF3, (q15_t)0x0388, (q15_t)0x7FF2, (q15_t)0x03BA,
+	(q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FEE, (q15_t)0x041F,
+	(q15_t)0x7FED, (q15_t)0x0451, (q15_t)0x7FEB, (q15_t)0x0483,
+	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE7, (q15_t)0x04E8,
+	(q15_t)0x7FE5, (q15_t)0x051A, (q15_t)0x7FE3, (q15_t)0x054C,
+	(q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDF, (q15_t)0x05B1,
+	(q15_t)0x7FDD, (q15_t)0x05E3, (q15_t)0x7FDA, (q15_t)0x0615,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD6, (q15_t)0x067A,
+	(q15_t)0x7FD3, (q15_t)0x06AC, (q15_t)0x7FD0, (q15_t)0x06DE,
+	(q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FCB, (q15_t)0x0742,
+	(q15_t)0x7FC8, (q15_t)0x0775, (q15_t)0x7FC5, (q15_t)0x07A7,
+	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBF, (q15_t)0x080B,
+	(q15_t)0x7FBC, (q15_t)0x083D, (q15_t)0x7FB8, (q15_t)0x086F,
+	(q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FB1, (q15_t)0x08D4,
+	(q15_t)0x7FAE, (q15_t)0x0906, (q15_t)0x7FAA, (q15_t)0x0938,
+	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7FA3, (q15_t)0x099C,
+	(q15_t)0x7F9F, (q15_t)0x09CE, (q15_t)0x7F9B, (q15_t)0x0A00,
+	(q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F93, (q15_t)0x0A65,
+	(q15_t)0x7F8F, (q15_t)0x0A97, (q15_t)0x7F8B, (q15_t)0x0AC9,
+	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F82, (q15_t)0x0B2D,
+	(q15_t)0x7F7E, (q15_t)0x0B5F, (q15_t)0x7F79, (q15_t)0x0B91,
+	(q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F70, (q15_t)0x0BF5,
+	(q15_t)0x7F6B, (q15_t)0x0C27, (q15_t)0x7F67, (q15_t)0x0C59,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F5D, (q15_t)0x0CBD,
+	(q15_t)0x7F58, (q15_t)0x0CEF, (q15_t)0x7F53, (q15_t)0x0D21,
+	(q15_t)0x7F4D, (q15_t)0x0D53, (q15_t)0x7F48, (q15_t)0x0D85,
+	(q15_t)0x7F43, (q15_t)0x0DB7, (q15_t)0x7F3D, (q15_t)0x0DE9,
+	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F32, (q15_t)0x0E4D,
+	(q15_t)0x7F2D, (q15_t)0x0E7F, (q15_t)0x7F27, (q15_t)0x0EB1,
+	(q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F1B, (q15_t)0x0F15,
+	(q15_t)0x7F15, (q15_t)0x0F47, (q15_t)0x7F0F, (q15_t)0x0F79,
+	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7F03, (q15_t)0x0FDD,
+	(q15_t)0x7EFD, (q15_t)0x100E, (q15_t)0x7EF6, (q15_t)0x1040,
+	(q15_t)0x7EF0, (q15_t)0x1072, (q15_t)0x7EE9, (q15_t)0x10A4,
+	(q15_t)0x7EE3, (q15_t)0x10D6, (q15_t)0x7EDC, (q15_t)0x1108,
+	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7ECF, (q15_t)0x116B,
+	(q15_t)0x7EC8, (q15_t)0x119D, (q15_t)0x7EC1, (q15_t)0x11CF,
+	(q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7EB3, (q15_t)0x1232,
+	(q15_t)0x7EAB, (q15_t)0x1264, (q15_t)0x7EA4, (q15_t)0x1296,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E95, (q15_t)0x12F9,
+	(q15_t)0x7E8E, (q15_t)0x132B, (q15_t)0x7E86, (q15_t)0x135D,
+	(q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E77, (q15_t)0x13C0,
+	(q15_t)0x7E6F, (q15_t)0x13F2, (q15_t)0x7E67, (q15_t)0x1423,
+	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E57, (q15_t)0x1487,
+	(q15_t)0x7E4F, (q15_t)0x14B8, (q15_t)0x7E47, (q15_t)0x14EA,
+	(q15_t)0x7E3F, (q15_t)0x151B, (q15_t)0x7E37, (q15_t)0x154D,
+	(q15_t)0x7E2E, (q15_t)0x157F, (q15_t)0x7E26, (q15_t)0x15B0,
+	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7E14, (q15_t)0x1613,
+	(q15_t)0x7E0C, (q15_t)0x1645, (q15_t)0x7E03, (q15_t)0x1676,
+	(q15_t)0x7DFA, (q15_t)0x16A8, (q15_t)0x7DF1, (q15_t)0x16D9,
+	(q15_t)0x7DE8, (q15_t)0x170A, (q15_t)0x7DDF, (q15_t)0x173C,
+	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DCD, (q15_t)0x179F,
+	(q15_t)0x7DC3, (q15_t)0x17D0, (q15_t)0x7DBA, (q15_t)0x1802,
+	(q15_t)0x7DB0, (q15_t)0x1833, (q15_t)0x7DA7, (q15_t)0x1864,
+	(q15_t)0x7D9D, (q15_t)0x1896, (q15_t)0x7D94, (q15_t)0x18C7,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D80, (q15_t)0x192A,
+	(q15_t)0x7D76, (q15_t)0x195B, (q15_t)0x7D6C, (q15_t)0x198C,
+	(q15_t)0x7D62, (q15_t)0x19BD, (q15_t)0x7D58, (q15_t)0x19EF,
+	(q15_t)0x7D4E, (q15_t)0x1A20, (q15_t)0x7D43, (q15_t)0x1A51,
+	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D2F, (q15_t)0x1AB3,
+	(q15_t)0x7D24, (q15_t)0x1AE4, (q15_t)0x7D19, (q15_t)0x1B16,
+	(q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7D04, (q15_t)0x1B78,
+	(q15_t)0x7CF9, (q15_t)0x1BA9, (q15_t)0x7CEE, (q15_t)0x1BDA,
+	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CD8, (q15_t)0x1C3C,
+	(q15_t)0x7CCD, (q15_t)0x1C6D, (q15_t)0x7CC2, (q15_t)0x1C9E,
+	(q15_t)0x7CB7, (q15_t)0x1CCF, (q15_t)0x7CAB, (q15_t)0x1D00,
+	(q15_t)0x7CA0, (q15_t)0x1D31, (q15_t)0x7C94, (q15_t)0x1D62,
+	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C7D, (q15_t)0x1DC4,
+	(q15_t)0x7C71, (q15_t)0x1DF5, (q15_t)0x7C66, (q15_t)0x1E25,
+	(q15_t)0x7C5A, (q15_t)0x1E56, (q15_t)0x7C4E, (q15_t)0x1E87,
+	(q15_t)0x7C42, (q15_t)0x1EB8, (q15_t)0x7C36, (q15_t)0x1EE9,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7C1D, (q15_t)0x1F4A,
+	(q15_t)0x7C11, (q15_t)0x1F7B, (q15_t)0x7C05, (q15_t)0x1FAC,
+	(q15_t)0x7BF8, (q15_t)0x1FDC, (q15_t)0x7BEB, (q15_t)0x200D,
+	(q15_t)0x7BDF, (q15_t)0x203E, (q15_t)0x7BD2, (q15_t)0x206E,
+	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7BB9, (q15_t)0x20D0,
+	(q15_t)0x7BAC, (q15_t)0x2100, (q15_t)0x7B9F, (q15_t)0x2131,
+	(q15_t)0x7B92, (q15_t)0x2161, (q15_t)0x7B84, (q15_t)0x2192,
+	(q15_t)0x7B77, (q15_t)0x21C2, (q15_t)0x7B6A, (q15_t)0x21F3,
+	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B4F, (q15_t)0x2254,
+	(q15_t)0x7B42, (q15_t)0x2284, (q15_t)0x7B34, (q15_t)0x22B4,
+	(q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7B19, (q15_t)0x2315,
+	(q15_t)0x7B0B, (q15_t)0x2345, (q15_t)0x7AFD, (q15_t)0x2376,
+	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AE1, (q15_t)0x23D6,
+	(q15_t)0x7AD3, (q15_t)0x2407, (q15_t)0x7AC5, (q15_t)0x2437,
+	(q15_t)0x7AB6, (q15_t)0x2467, (q15_t)0x7AA8, (q15_t)0x2497,
+	(q15_t)0x7A9A, (q15_t)0x24C7, (q15_t)0x7A8B, (q15_t)0x24F7,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A6E, (q15_t)0x2558,
+	(q15_t)0x7A5F, (q15_t)0x2588, (q15_t)0x7A50, (q15_t)0x25B8,
+	(q15_t)0x7A42, (q15_t)0x25E8, (q15_t)0x7A33, (q15_t)0x2618,
+	(q15_t)0x7A24, (q15_t)0x2648, (q15_t)0x7A15, (q15_t)0x2678,
+	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79F6, (q15_t)0x26D8,
+	(q15_t)0x79E7, (q15_t)0x2707, (q15_t)0x79D8, (q15_t)0x2737,
+	(q15_t)0x79C8, (q15_t)0x2767, (q15_t)0x79B9, (q15_t)0x2797,
+	(q15_t)0x79A9, (q15_t)0x27C7, (q15_t)0x7999, (q15_t)0x27F6,
+	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x797A, (q15_t)0x2856,
+	(q15_t)0x796A, (q15_t)0x2886, (q15_t)0x795A, (q15_t)0x28B5,
+	(q15_t)0x794A, (q15_t)0x28E5, (q15_t)0x793A, (q15_t)0x2915,
+	(q15_t)0x792A, (q15_t)0x2944, (q15_t)0x7919, (q15_t)0x2974,
+	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78F9, (q15_t)0x29D3,
+	(q15_t)0x78E8, (q15_t)0x2A02, (q15_t)0x78D8, (q15_t)0x2A32,
+	(q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x78B6, (q15_t)0x2A91,
+	(q15_t)0x78A6, (q15_t)0x2AC0, (q15_t)0x7895, (q15_t)0x2AEF,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7873, (q15_t)0x2B4E,
+	(q15_t)0x7862, (q15_t)0x2B7D, (q15_t)0x7851, (q15_t)0x2BAD,
+	(q15_t)0x7840, (q15_t)0x2BDC, (q15_t)0x782E, (q15_t)0x2C0B,
+	(q15_t)0x781D, (q15_t)0x2C3A, (q15_t)0x780C, (q15_t)0x2C69,
+	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77E9, (q15_t)0x2CC8,
+	(q15_t)0x77D7, (q15_t)0x2CF7, (q15_t)0x77C5, (q15_t)0x2D26,
+	(q15_t)0x77B4, (q15_t)0x2D55, (q15_t)0x77A2, (q15_t)0x2D84,
+	(q15_t)0x7790, (q15_t)0x2DB3, (q15_t)0x777E, (q15_t)0x2DE2,
+	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x775A, (q15_t)0x2E3F,
+	(q15_t)0x7747, (q15_t)0x2E6E, (q15_t)0x7735, (q15_t)0x2E9D,
+	(q15_t)0x7723, (q15_t)0x2ECC, (q15_t)0x7710, (q15_t)0x2EFB,
+	(q15_t)0x76FE, (q15_t)0x2F29, (q15_t)0x76EB, (q15_t)0x2F58,
+	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x76C6, (q15_t)0x2FB5,
+	(q15_t)0x76B3, (q15_t)0x2FE4, (q15_t)0x76A0, (q15_t)0x3013,
+	(q15_t)0x768E, (q15_t)0x3041, (q15_t)0x767B, (q15_t)0x3070,
+	(q15_t)0x7668, (q15_t)0x309E, (q15_t)0x7654, (q15_t)0x30CD,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x762E, (q15_t)0x312A,
+	(q15_t)0x761B, (q15_t)0x3158, (q15_t)0x7607, (q15_t)0x3186,
+	(q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75E0, (q15_t)0x31E3,
+	(q15_t)0x75CC, (q15_t)0x3211, (q15_t)0x75B9, (q15_t)0x3240,
+	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7591, (q15_t)0x329C,
+	(q15_t)0x757D, (q15_t)0x32CA, (q15_t)0x7569, (q15_t)0x32F8,
+	(q15_t)0x7555, (q15_t)0x3326, (q15_t)0x7541, (q15_t)0x3354,
+	(q15_t)0x752D, (q15_t)0x3382, (q15_t)0x7519, (q15_t)0x33B0,
+	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74F0, (q15_t)0x340C,
+	(q15_t)0x74DB, (q15_t)0x343A, (q15_t)0x74C7, (q15_t)0x3468,
+	(q15_t)0x74B2, (q15_t)0x3496, (q15_t)0x749E, (q15_t)0x34C4,
+	(q15_t)0x7489, (q15_t)0x34F2, (q15_t)0x7474, (q15_t)0x351F,
+	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x744A, (q15_t)0x357B,
+	(q15_t)0x7435, (q15_t)0x35A8, (q15_t)0x7420, (q15_t)0x35D6,
+	(q15_t)0x740B, (q15_t)0x3604, (q15_t)0x73F6, (q15_t)0x3631,
+	(q15_t)0x73E0, (q15_t)0x365F, (q15_t)0x73CB, (q15_t)0x368C,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x73A0, (q15_t)0x36E7,
+	(q15_t)0x738A, (q15_t)0x3714, (q15_t)0x7375, (q15_t)0x3742,
+	(q15_t)0x735F, (q15_t)0x376F, (q15_t)0x7349, (q15_t)0x379C,
+	(q15_t)0x7333, (q15_t)0x37CA, (q15_t)0x731D, (q15_t)0x37F7,
+	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72F1, (q15_t)0x3851,
+	(q15_t)0x72DB, (q15_t)0x387E, (q15_t)0x72C5, (q15_t)0x38AB,
+	(q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7298, (q15_t)0x3906,
+	(q15_t)0x7282, (q15_t)0x3932, (q15_t)0x726B, (q15_t)0x395F,
+	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x723E, (q15_t)0x39B9,
+	(q15_t)0x7227, (q15_t)0x39E6, (q15_t)0x7211, (q15_t)0x3A13,
+	(q15_t)0x71FA, (q15_t)0x3A40, (q15_t)0x71E3, (q15_t)0x3A6C,
+	(q15_t)0x71CC, (q15_t)0x3A99, (q15_t)0x71B5, (q15_t)0x3AC6,
+	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x7186, (q15_t)0x3B1F,
+	(q15_t)0x716F, (q15_t)0x3B4C, (q15_t)0x7158, (q15_t)0x3B78,
+	(q15_t)0x7141, (q15_t)0x3BA5, (q15_t)0x7129, (q15_t)0x3BD1,
+	(q15_t)0x7112, (q15_t)0x3BFD, (q15_t)0x70FA, (q15_t)0x3C2A,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x70CB, (q15_t)0x3C83,
+	(q15_t)0x70B3, (q15_t)0x3CAF, (q15_t)0x709B, (q15_t)0x3CDB,
+	(q15_t)0x7083, (q15_t)0x3D07, (q15_t)0x706B, (q15_t)0x3D33,
+	(q15_t)0x7053, (q15_t)0x3D60, (q15_t)0x703B, (q15_t)0x3D8C,
+	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x700A, (q15_t)0x3DE4,
+	(q15_t)0x6FF2, (q15_t)0x3E10, (q15_t)0x6FDA, (q15_t)0x3E3C,
+	(q15_t)0x6FC1, (q15_t)0x3E68, (q15_t)0x6FA9, (q15_t)0x3E93,
+	(q15_t)0x6F90, (q15_t)0x3EBF, (q15_t)0x6F77, (q15_t)0x3EEB,
+	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6F46, (q15_t)0x3F43,
+	(q15_t)0x6F2D, (q15_t)0x3F6E, (q15_t)0x6F14, (q15_t)0x3F9A,
+	(q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6EE2, (q15_t)0x3FF1,
+	(q15_t)0x6EC9, (q15_t)0x401D, (q15_t)0x6EAF, (q15_t)0x4048,
+	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E7D, (q15_t)0x409F,
+	(q15_t)0x6E63, (q15_t)0x40CA, (q15_t)0x6E4A, (q15_t)0x40F6,
+	(q15_t)0x6E30, (q15_t)0x4121, (q15_t)0x6E17, (q15_t)0x414C,
+	(q15_t)0x6DFD, (q15_t)0x4177, (q15_t)0x6DE3, (q15_t)0x41A2,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6DB0, (q15_t)0x41F9,
+	(q15_t)0x6D96, (q15_t)0x4224, (q15_t)0x6D7C, (q15_t)0x424F,
+	(q15_t)0x6D62, (q15_t)0x427A, (q15_t)0x6D48, (q15_t)0x42A5,
+	(q15_t)0x6D2D, (q15_t)0x42D0, (q15_t)0x6D13, (q15_t)0x42FA,
+	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6CDE, (q15_t)0x4350,
+	(q15_t)0x6CC4, (q15_t)0x437B, (q15_t)0x6CA9, (q15_t)0x43A5,
+	(q15_t)0x6C8F, (q15_t)0x43D0, (q15_t)0x6C74, (q15_t)0x43FB,
+	(q15_t)0x6C59, (q15_t)0x4425, (q15_t)0x6C3F, (q15_t)0x4450,
+	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6C09, (q15_t)0x44A5,
+	(q15_t)0x6BEE, (q15_t)0x44CF, (q15_t)0x6BD3, (q15_t)0x44FA,
+	(q15_t)0x6BB8, (q15_t)0x4524, (q15_t)0x6B9C, (q15_t)0x454E,
+	(q15_t)0x6B81, (q15_t)0x4578, (q15_t)0x6B66, (q15_t)0x45A3,
+	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6B2F, (q15_t)0x45F7,
+	(q15_t)0x6B13, (q15_t)0x4621, (q15_t)0x6AF8, (q15_t)0x464B,
+	(q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6AC1, (q15_t)0x469F,
+	(q15_t)0x6AA5, (q15_t)0x46C9, (q15_t)0x6A89, (q15_t)0x46F3,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x6A51, (q15_t)0x4746,
+	(q15_t)0x6A35, (q15_t)0x4770, (q15_t)0x6A19, (q15_t)0x479A,
+	(q15_t)0x69FD, (q15_t)0x47C3, (q15_t)0x69E1, (q15_t)0x47ED,
+	(q15_t)0x69C4, (q15_t)0x4816, (q15_t)0x69A8, (q15_t)0x4840,
+	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x696F, (q15_t)0x4893,
+	(q15_t)0x6953, (q15_t)0x48BC, (q15_t)0x6936, (q15_t)0x48E6,
+	(q15_t)0x6919, (q15_t)0x490F, (q15_t)0x68FD, (q15_t)0x4938,
+	(q15_t)0x68E0, (q15_t)0x4961, (q15_t)0x68C3, (q15_t)0x498A,
+	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6889, (q15_t)0x49DD,
+	(q15_t)0x686C, (q15_t)0x4A06, (q15_t)0x684F, (q15_t)0x4A2F,
+	(q15_t)0x6832, (q15_t)0x4A58, (q15_t)0x6815, (q15_t)0x4A81,
+	(q15_t)0x67F7, (q15_t)0x4AA9, (q15_t)0x67DA, (q15_t)0x4AD2,
+	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x679F, (q15_t)0x4B24,
+	(q15_t)0x6782, (q15_t)0x4B4C, (q15_t)0x6764, (q15_t)0x4B75,
+	(q15_t)0x6746, (q15_t)0x4B9E, (q15_t)0x6729, (q15_t)0x4BC6,
+	(q15_t)0x670B, (q15_t)0x4BEF, (q15_t)0x66ED, (q15_t)0x4C17,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x66B1, (q15_t)0x4C68,
+	(q15_t)0x6693, (q15_t)0x4C90, (q15_t)0x6675, (q15_t)0x4CB8,
+	(q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x6639, (q15_t)0x4D09,
+	(q15_t)0x661A, (q15_t)0x4D31, (q15_t)0x65FC, (q15_t)0x4D59,
+	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x65BF, (q15_t)0x4DA9,
+	(q15_t)0x65A0, (q15_t)0x4DD1, (q15_t)0x6582, (q15_t)0x4DF9,
+	(q15_t)0x6563, (q15_t)0x4E21, (q15_t)0x6545, (q15_t)0x4E48,
+	(q15_t)0x6526, (q15_t)0x4E70, (q15_t)0x6507, (q15_t)0x4E98,
+	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x64C9, (q15_t)0x4EE7,
+	(q15_t)0x64AA, (q15_t)0x4F0F, (q15_t)0x648B, (q15_t)0x4F36,
+	(q15_t)0x646C, (q15_t)0x4F5E, (q15_t)0x644D, (q15_t)0x4F85,
+	(q15_t)0x642D, (q15_t)0x4FAC, (q15_t)0x640E, (q15_t)0x4FD4,
+	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x63CF, (q15_t)0x5022,
+	(q15_t)0x63B0, (q15_t)0x5049, (q15_t)0x6390, (q15_t)0x5070,
+	(q15_t)0x6371, (q15_t)0x5097, (q15_t)0x6351, (q15_t)0x50BF,
+	(q15_t)0x6331, (q15_t)0x50E5, (q15_t)0x6311, (q15_t)0x510C,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x62D2, (q15_t)0x515A,
+	(q15_t)0x62B2, (q15_t)0x5181, (q15_t)0x6292, (q15_t)0x51A8,
+	(q15_t)0x6271, (q15_t)0x51CE, (q15_t)0x6251, (q15_t)0x51F5,
+	(q15_t)0x6231, (q15_t)0x521C, (q15_t)0x6211, (q15_t)0x5242,
+	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x61D0, (q15_t)0x528F,
+	(q15_t)0x61B0, (q15_t)0x52B5, (q15_t)0x618F, (q15_t)0x52DC,
+	(q15_t)0x616F, (q15_t)0x5302, (q15_t)0x614E, (q15_t)0x5328,
+	(q15_t)0x612D, (q15_t)0x534E, (q15_t)0x610D, (q15_t)0x5375,
+	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x60CB, (q15_t)0x53C1,
+	(q15_t)0x60AA, (q15_t)0x53E7, (q15_t)0x6089, (q15_t)0x540D,
+	(q15_t)0x6068, (q15_t)0x5433, (q15_t)0x6047, (q15_t)0x5458,
+	(q15_t)0x6026, (q15_t)0x547E, (q15_t)0x6004, (q15_t)0x54A4,
+	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5FC2, (q15_t)0x54EF,
+	(q15_t)0x5FA0, (q15_t)0x5515, (q15_t)0x5F7F, (q15_t)0x553A,
+	(q15_t)0x5F5E, (q15_t)0x5560, (q15_t)0x5F3C, (q15_t)0x5585,
+	(q15_t)0x5F1A, (q15_t)0x55AB, (q15_t)0x5EF9, (q15_t)0x55D0,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5EB5, (q15_t)0x561A,
+	(q15_t)0x5E93, (q15_t)0x5640, (q15_t)0x5E71, (q15_t)0x5665,
+	(q15_t)0x5E50, (q15_t)0x568A, (q15_t)0x5E2D, (q15_t)0x56AF,
+	(q15_t)0x5E0B, (q15_t)0x56D4, (q15_t)0x5DE9, (q15_t)0x56F9,
+	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5DA5, (q15_t)0x5742,
+	(q15_t)0x5D83, (q15_t)0x5767, (q15_t)0x5D60, (q15_t)0x578C,
+	(q15_t)0x5D3E, (q15_t)0x57B0, (q15_t)0x5D1B, (q15_t)0x57D5,
+	(q15_t)0x5CF9, (q15_t)0x57F9, (q15_t)0x5CD6, (q15_t)0x581E,
+	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C91, (q15_t)0x5867,
+	(q15_t)0x5C6E, (q15_t)0x588B, (q15_t)0x5C4B, (q15_t)0x58AF,
+	(q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5C06, (q15_t)0x58F8,
+	(q15_t)0x5BE3, (q15_t)0x591C, (q15_t)0x5BC0, (q15_t)0x5940,
+	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B79, (q15_t)0x5988,
+	(q15_t)0x5B56, (q15_t)0x59AC, (q15_t)0x5B33, (q15_t)0x59D0,
+	(q15_t)0x5B10, (q15_t)0x59F3, (q15_t)0x5AEC, (q15_t)0x5A17,
+	(q15_t)0x5AC9, (q15_t)0x5A3B, (q15_t)0x5AA5, (q15_t)0x5A5E,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5A5E, (q15_t)0x5AA5,
+	(q15_t)0x5A3B, (q15_t)0x5AC9, (q15_t)0x5A17, (q15_t)0x5AEC,
+	(q15_t)0x59F3, (q15_t)0x5B10, (q15_t)0x59D0, (q15_t)0x5B33,
+	(q15_t)0x59AC, (q15_t)0x5B56, (q15_t)0x5988, (q15_t)0x5B79,
+	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x5940, (q15_t)0x5BC0,
+	(q15_t)0x591C, (q15_t)0x5BE3, (q15_t)0x58F8, (q15_t)0x5C06,
+	(q15_t)0x58D4, (q15_t)0x5C29, (q15_t)0x58AF, (q15_t)0x5C4B,
+	(q15_t)0x588B, (q15_t)0x5C6E, (q15_t)0x5867, (q15_t)0x5C91,
+	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x581E, (q15_t)0x5CD6,
+	(q15_t)0x57F9, (q15_t)0x5CF9, (q15_t)0x57D5, (q15_t)0x5D1B,
+	(q15_t)0x57B0, (q15_t)0x5D3E, (q15_t)0x578C, (q15_t)0x5D60,
+	(q15_t)0x5767, (q15_t)0x5D83, (q15_t)0x5742, (q15_t)0x5DA5,
+	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x56F9, (q15_t)0x5DE9,
+	(q15_t)0x56D4, (q15_t)0x5E0B, (q15_t)0x56AF, (q15_t)0x5E2D,
+	(q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x5665, (q15_t)0x5E71,
+	(q15_t)0x5640, (q15_t)0x5E93, (q15_t)0x561A, (q15_t)0x5EB5,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x55D0, (q15_t)0x5EF9,
+	(q15_t)0x55AB, (q15_t)0x5F1A, (q15_t)0x5585, (q15_t)0x5F3C,
+	(q15_t)0x5560, (q15_t)0x5F5E, (q15_t)0x553A, (q15_t)0x5F7F,
+	(q15_t)0x5515, (q15_t)0x5FA0, (q15_t)0x54EF, (q15_t)0x5FC2,
+	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x54A4, (q15_t)0x6004,
+	(q15_t)0x547E, (q15_t)0x6026, (q15_t)0x5458, (q15_t)0x6047,
+	(q15_t)0x5433, (q15_t)0x6068, (q15_t)0x540D, (q15_t)0x6089,
+	(q15_t)0x53E7, (q15_t)0x60AA, (q15_t)0x53C1, (q15_t)0x60CB,
+	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5375, (q15_t)0x610D,
+	(q15_t)0x534E, (q15_t)0x612D, (q15_t)0x5328, (q15_t)0x614E,
+	(q15_t)0x5302, (q15_t)0x616F, (q15_t)0x52DC, (q15_t)0x618F,
+	(q15_t)0x52B5, (q15_t)0x61B0, (q15_t)0x528F, (q15_t)0x61D0,
+	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x5242, (q15_t)0x6211,
+	(q15_t)0x521C, (q15_t)0x6231, (q15_t)0x51F5, (q15_t)0x6251,
+	(q15_t)0x51CE, (q15_t)0x6271, (q15_t)0x51A8, (q15_t)0x6292,
+	(q15_t)0x5181, (q15_t)0x62B2, (q15_t)0x515A, (q15_t)0x62D2,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x510C, (q15_t)0x6311,
+	(q15_t)0x50E5, (q15_t)0x6331, (q15_t)0x50BF, (q15_t)0x6351,
+	(q15_t)0x5097, (q15_t)0x6371, (q15_t)0x5070, (q15_t)0x6390,
+	(q15_t)0x5049, (q15_t)0x63B0, (q15_t)0x5022, (q15_t)0x63CF,
+	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4FD4, (q15_t)0x640E,
+	(q15_t)0x4FAC, (q15_t)0x642D, (q15_t)0x4F85, (q15_t)0x644D,
+	(q15_t)0x4F5E, (q15_t)0x646C, (q15_t)0x4F36, (q15_t)0x648B,
+	(q15_t)0x4F0F, (q15_t)0x64AA, (q15_t)0x4EE7, (q15_t)0x64C9,
+	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E98, (q15_t)0x6507,
+	(q15_t)0x4E70, (q15_t)0x6526, (q15_t)0x4E48, (q15_t)0x6545,
+	(q15_t)0x4E21, (q15_t)0x6563, (q15_t)0x4DF9, (q15_t)0x6582,
+	(q15_t)0x4DD1, (q15_t)0x65A0, (q15_t)0x4DA9, (q15_t)0x65BF,
+	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4D59, (q15_t)0x65FC,
+	(q15_t)0x4D31, (q15_t)0x661A, (q15_t)0x4D09, (q15_t)0x6639,
+	(q15_t)0x4CE1, (q15_t)0x6657, (q15_t)0x4CB8, (q15_t)0x6675,
+	(q15_t)0x4C90, (q15_t)0x6693, (q15_t)0x4C68, (q15_t)0x66B1,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4C17, (q15_t)0x66ED,
+	(q15_t)0x4BEF, (q15_t)0x670B, (q15_t)0x4BC6, (q15_t)0x6729,
+	(q15_t)0x4B9E, (q15_t)0x6746, (q15_t)0x4B75, (q15_t)0x6764,
+	(q15_t)0x4B4C, (q15_t)0x6782, (q15_t)0x4B24, (q15_t)0x679F,
+	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4AD2, (q15_t)0x67DA,
+	(q15_t)0x4AA9, (q15_t)0x67F7, (q15_t)0x4A81, (q15_t)0x6815,
+	(q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x4A2F, (q15_t)0x684F,
+	(q15_t)0x4A06, (q15_t)0x686C, (q15_t)0x49DD, (q15_t)0x6889,
+	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x498A, (q15_t)0x68C3,
+	(q15_t)0x4961, (q15_t)0x68E0, (q15_t)0x4938, (q15_t)0x68FD,
+	(q15_t)0x490F, (q15_t)0x6919, (q15_t)0x48E6, (q15_t)0x6936,
+	(q15_t)0x48BC, (q15_t)0x6953, (q15_t)0x4893, (q15_t)0x696F,
+	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x4840, (q15_t)0x69A8,
+	(q15_t)0x4816, (q15_t)0x69C4, (q15_t)0x47ED, (q15_t)0x69E1,
+	(q15_t)0x47C3, (q15_t)0x69FD, (q15_t)0x479A, (q15_t)0x6A19,
+	(q15_t)0x4770, (q15_t)0x6A35, (q15_t)0x4746, (q15_t)0x6A51,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x46F3, (q15_t)0x6A89,
+	(q15_t)0x46C9, (q15_t)0x6AA5, (q15_t)0x469F, (q15_t)0x6AC1,
+	(q15_t)0x4675, (q15_t)0x6ADC, (q15_t)0x464B, (q15_t)0x6AF8,
+	(q15_t)0x4621, (q15_t)0x6B13, (q15_t)0x45F7, (q15_t)0x6B2F,
+	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x45A3, (q15_t)0x6B66,
+	(q15_t)0x4578, (q15_t)0x6B81, (q15_t)0x454E, (q15_t)0x6B9C,
+	(q15_t)0x4524, (q15_t)0x6BB8, (q15_t)0x44FA, (q15_t)0x6BD3,
+	(q15_t)0x44CF, (q15_t)0x6BEE, (q15_t)0x44A5, (q15_t)0x6C09,
+	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4450, (q15_t)0x6C3F,
+	(q15_t)0x4425, (q15_t)0x6C59, (q15_t)0x43FB, (q15_t)0x6C74,
+	(q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x43A5, (q15_t)0x6CA9,
+	(q15_t)0x437B, (q15_t)0x6CC4, (q15_t)0x4350, (q15_t)0x6CDE,
+	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x42FA, (q15_t)0x6D13,
+	(q15_t)0x42D0, (q15_t)0x6D2D, (q15_t)0x42A5, (q15_t)0x6D48,
+	(q15_t)0x427A, (q15_t)0x6D62, (q15_t)0x424F, (q15_t)0x6D7C,
+	(q15_t)0x4224, (q15_t)0x6D96, (q15_t)0x41F9, (q15_t)0x6DB0,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x41A2, (q15_t)0x6DE3,
+	(q15_t)0x4177, (q15_t)0x6DFD, (q15_t)0x414C, (q15_t)0x6E17,
+	(q15_t)0x4121, (q15_t)0x6E30, (q15_t)0x40F6, (q15_t)0x6E4A,
+	(q15_t)0x40CA, (q15_t)0x6E63, (q15_t)0x409F, (q15_t)0x6E7D,
+	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x4048, (q15_t)0x6EAF,
+	(q15_t)0x401D, (q15_t)0x6EC9, (q15_t)0x3FF1, (q15_t)0x6EE2,
+	(q15_t)0x3FC5, (q15_t)0x6EFB, (q15_t)0x3F9A, (q15_t)0x6F14,
+	(q15_t)0x3F6E, (q15_t)0x6F2D, (q15_t)0x3F43, (q15_t)0x6F46,
+	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3EEB, (q15_t)0x6F77,
+	(q15_t)0x3EBF, (q15_t)0x6F90, (q15_t)0x3E93, (q15_t)0x6FA9,
+	(q15_t)0x3E68, (q15_t)0x6FC1, (q15_t)0x3E3C, (q15_t)0x6FDA,
+	(q15_t)0x3E10, (q15_t)0x6FF2, (q15_t)0x3DE4, (q15_t)0x700A,
+	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D8C, (q15_t)0x703B,
+	(q15_t)0x3D60, (q15_t)0x7053, (q15_t)0x3D33, (q15_t)0x706B,
+	(q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3CDB, (q15_t)0x709B,
+	(q15_t)0x3CAF, (q15_t)0x70B3, (q15_t)0x3C83, (q15_t)0x70CB,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3C2A, (q15_t)0x70FA,
+	(q15_t)0x3BFD, (q15_t)0x7112, (q15_t)0x3BD1, (q15_t)0x7129,
+	(q15_t)0x3BA5, (q15_t)0x7141, (q15_t)0x3B78, (q15_t)0x7158,
+	(q15_t)0x3B4C, (q15_t)0x716F, (q15_t)0x3B1F, (q15_t)0x7186,
+	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3AC6, (q15_t)0x71B5,
+	(q15_t)0x3A99, (q15_t)0x71CC, (q15_t)0x3A6C, (q15_t)0x71E3,
+	(q15_t)0x3A40, (q15_t)0x71FA, (q15_t)0x3A13, (q15_t)0x7211,
+	(q15_t)0x39E6, (q15_t)0x7227, (q15_t)0x39B9, (q15_t)0x723E,
+	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x395F, (q15_t)0x726B,
+	(q15_t)0x3932, (q15_t)0x7282, (q15_t)0x3906, (q15_t)0x7298,
+	(q15_t)0x38D8, (q15_t)0x72AF, (q15_t)0x38AB, (q15_t)0x72C5,
+	(q15_t)0x387E, (q15_t)0x72DB, (q15_t)0x3851, (q15_t)0x72F1,
+	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x37F7, (q15_t)0x731D,
+	(q15_t)0x37CA, (q15_t)0x7333, (q15_t)0x379C, (q15_t)0x7349,
+	(q15_t)0x376F, (q15_t)0x735F, (q15_t)0x3742, (q15_t)0x7375,
+	(q15_t)0x3714, (q15_t)0x738A, (q15_t)0x36E7, (q15_t)0x73A0,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x368C, (q15_t)0x73CB,
+	(q15_t)0x365F, (q15_t)0x73E0, (q15_t)0x3631, (q15_t)0x73F6,
+	(q15_t)0x3604, (q15_t)0x740B, (q15_t)0x35D6, (q15_t)0x7420,
+	(q15_t)0x35A8, (q15_t)0x7435, (q15_t)0x357B, (q15_t)0x744A,
+	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x351F, (q15_t)0x7474,
+	(q15_t)0x34F2, (q15_t)0x7489, (q15_t)0x34C4, (q15_t)0x749E,
+	(q15_t)0x3496, (q15_t)0x74B2, (q15_t)0x3468, (q15_t)0x74C7,
+	(q15_t)0x343A, (q15_t)0x74DB, (q15_t)0x340C, (q15_t)0x74F0,
+	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x33B0, (q15_t)0x7519,
+	(q15_t)0x3382, (q15_t)0x752D, (q15_t)0x3354, (q15_t)0x7541,
+	(q15_t)0x3326, (q15_t)0x7555, (q15_t)0x32F8, (q15_t)0x7569,
+	(q15_t)0x32CA, (q15_t)0x757D, (q15_t)0x329C, (q15_t)0x7591,
+	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x3240, (q15_t)0x75B9,
+	(q15_t)0x3211, (q15_t)0x75CC, (q15_t)0x31E3, (q15_t)0x75E0,
+	(q15_t)0x31B5, (q15_t)0x75F4, (q15_t)0x3186, (q15_t)0x7607,
+	(q15_t)0x3158, (q15_t)0x761B, (q15_t)0x312A, (q15_t)0x762E,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x30CD, (q15_t)0x7654,
+	(q15_t)0x309E, (q15_t)0x7668, (q15_t)0x3070, (q15_t)0x767B,
+	(q15_t)0x3041, (q15_t)0x768E, (q15_t)0x3013, (q15_t)0x76A0,
+	(q15_t)0x2FE4, (q15_t)0x76B3, (q15_t)0x2FB5, (q15_t)0x76C6,
+	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2F58, (q15_t)0x76EB,
+	(q15_t)0x2F29, (q15_t)0x76FE, (q15_t)0x2EFB, (q15_t)0x7710,
+	(q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E9D, (q15_t)0x7735,
+	(q15_t)0x2E6E, (q15_t)0x7747, (q15_t)0x2E3F, (q15_t)0x775A,
+	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2DE2, (q15_t)0x777E,
+	(q15_t)0x2DB3, (q15_t)0x7790, (q15_t)0x2D84, (q15_t)0x77A2,
+	(q15_t)0x2D55, (q15_t)0x77B4, (q15_t)0x2D26, (q15_t)0x77C5,
+	(q15_t)0x2CF7, (q15_t)0x77D7, (q15_t)0x2CC8, (q15_t)0x77E9,
+	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2C69, (q15_t)0x780C,
+	(q15_t)0x2C3A, (q15_t)0x781D, (q15_t)0x2C0B, (q15_t)0x782E,
+	(q15_t)0x2BDC, (q15_t)0x7840, (q15_t)0x2BAD, (q15_t)0x7851,
+	(q15_t)0x2B7D, (q15_t)0x7862, (q15_t)0x2B4E, (q15_t)0x7873,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2AEF, (q15_t)0x7895,
+	(q15_t)0x2AC0, (q15_t)0x78A6, (q15_t)0x2A91, (q15_t)0x78B6,
+	(q15_t)0x2A61, (q15_t)0x78C7, (q15_t)0x2A32, (q15_t)0x78D8,
+	(q15_t)0x2A02, (q15_t)0x78E8, (q15_t)0x29D3, (q15_t)0x78F9,
+	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x2974, (q15_t)0x7919,
+	(q15_t)0x2944, (q15_t)0x792A, (q15_t)0x2915, (q15_t)0x793A,
+	(q15_t)0x28E5, (q15_t)0x794A, (q15_t)0x28B5, (q15_t)0x795A,
+	(q15_t)0x2886, (q15_t)0x796A, (q15_t)0x2856, (q15_t)0x797A,
+	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x27F6, (q15_t)0x7999,
+	(q15_t)0x27C7, (q15_t)0x79A9, (q15_t)0x2797, (q15_t)0x79B9,
+	(q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x2737, (q15_t)0x79D8,
+	(q15_t)0x2707, (q15_t)0x79E7, (q15_t)0x26D8, (q15_t)0x79F6,
+	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x2678, (q15_t)0x7A15,
+	(q15_t)0x2648, (q15_t)0x7A24, (q15_t)0x2618, (q15_t)0x7A33,
+	(q15_t)0x25E8, (q15_t)0x7A42, (q15_t)0x25B8, (q15_t)0x7A50,
+	(q15_t)0x2588, (q15_t)0x7A5F, (q15_t)0x2558, (q15_t)0x7A6E,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x24F7, (q15_t)0x7A8B,
+	(q15_t)0x24C7, (q15_t)0x7A9A, (q15_t)0x2497, (q15_t)0x7AA8,
+	(q15_t)0x2467, (q15_t)0x7AB6, (q15_t)0x2437, (q15_t)0x7AC5,
+	(q15_t)0x2407, (q15_t)0x7AD3, (q15_t)0x23D6, (q15_t)0x7AE1,
+	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2376, (q15_t)0x7AFD,
+	(q15_t)0x2345, (q15_t)0x7B0B, (q15_t)0x2315, (q15_t)0x7B19,
+	(q15_t)0x22E5, (q15_t)0x7B26, (q15_t)0x22B4, (q15_t)0x7B34,
+	(q15_t)0x2284, (q15_t)0x7B42, (q15_t)0x2254, (q15_t)0x7B4F,
+	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x21F3, (q15_t)0x7B6A,
+	(q15_t)0x21C2, (q15_t)0x7B77, (q15_t)0x2192, (q15_t)0x7B84,
+	(q15_t)0x2161, (q15_t)0x7B92, (q15_t)0x2131, (q15_t)0x7B9F,
+	(q15_t)0x2100, (q15_t)0x7BAC, (q15_t)0x20D0, (q15_t)0x7BB9,
+	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x206E, (q15_t)0x7BD2,
+	(q15_t)0x203E, (q15_t)0x7BDF, (q15_t)0x200D, (q15_t)0x7BEB,
+	(q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1FAC, (q15_t)0x7C05,
+	(q15_t)0x1F7B, (q15_t)0x7C11, (q15_t)0x1F4A, (q15_t)0x7C1D,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1EE9, (q15_t)0x7C36,
+	(q15_t)0x1EB8, (q15_t)0x7C42, (q15_t)0x1E87, (q15_t)0x7C4E,
+	(q15_t)0x1E56, (q15_t)0x7C5A, (q15_t)0x1E25, (q15_t)0x7C66,
+	(q15_t)0x1DF5, (q15_t)0x7C71, (q15_t)0x1DC4, (q15_t)0x7C7D,
+	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1D62, (q15_t)0x7C94,
+	(q15_t)0x1D31, (q15_t)0x7CA0, (q15_t)0x1D00, (q15_t)0x7CAB,
+	(q15_t)0x1CCF, (q15_t)0x7CB7, (q15_t)0x1C9E, (q15_t)0x7CC2,
+	(q15_t)0x1C6D, (q15_t)0x7CCD, (q15_t)0x1C3C, (q15_t)0x7CD8,
+	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1BDA, (q15_t)0x7CEE,
+	(q15_t)0x1BA9, (q15_t)0x7CF9, (q15_t)0x1B78, (q15_t)0x7D04,
+	(q15_t)0x1B47, (q15_t)0x7D0F, (q15_t)0x1B16, (q15_t)0x7D19,
+	(q15_t)0x1AE4, (q15_t)0x7D24, (q15_t)0x1AB3, (q15_t)0x7D2F,
+	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x1A51, (q15_t)0x7D43,
+	(q15_t)0x1A20, (q15_t)0x7D4E, (q15_t)0x19EF, (q15_t)0x7D58,
+	(q15_t)0x19BD, (q15_t)0x7D62, (q15_t)0x198C, (q15_t)0x7D6C,
+	(q15_t)0x195B, (q15_t)0x7D76, (q15_t)0x192A, (q15_t)0x7D80,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x18C7, (q15_t)0x7D94,
+	(q15_t)0x1896, (q15_t)0x7D9D, (q15_t)0x1864, (q15_t)0x7DA7,
+	(q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x1802, (q15_t)0x7DBA,
+	(q15_t)0x17D0, (q15_t)0x7DC3, (q15_t)0x179F, (q15_t)0x7DCD,
+	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x173C, (q15_t)0x7DDF,
+	(q15_t)0x170A, (q15_t)0x7DE8, (q15_t)0x16D9, (q15_t)0x7DF1,
+	(q15_t)0x16A8, (q15_t)0x7DFA, (q15_t)0x1676, (q15_t)0x7E03,
+	(q15_t)0x1645, (q15_t)0x7E0C, (q15_t)0x1613, (q15_t)0x7E14,
+	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x15B0, (q15_t)0x7E26,
+	(q15_t)0x157F, (q15_t)0x7E2E, (q15_t)0x154D, (q15_t)0x7E37,
+	(q15_t)0x151B, (q15_t)0x7E3F, (q15_t)0x14EA, (q15_t)0x7E47,
+	(q15_t)0x14B8, (q15_t)0x7E4F, (q15_t)0x1487, (q15_t)0x7E57,
+	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x1423, (q15_t)0x7E67,
+	(q15_t)0x13F2, (q15_t)0x7E6F, (q15_t)0x13C0, (q15_t)0x7E77,
+	(q15_t)0x138E, (q15_t)0x7E7F, (q15_t)0x135D, (q15_t)0x7E86,
+	(q15_t)0x132B, (q15_t)0x7E8E, (q15_t)0x12F9, (q15_t)0x7E95,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1296, (q15_t)0x7EA4,
+	(q15_t)0x1264, (q15_t)0x7EAB, (q15_t)0x1232, (q15_t)0x7EB3,
+	(q15_t)0x1201, (q15_t)0x7EBA, (q15_t)0x11CF, (q15_t)0x7EC1,
+	(q15_t)0x119D, (q15_t)0x7EC8, (q15_t)0x116B, (q15_t)0x7ECF,
+	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x1108, (q15_t)0x7EDC,
+	(q15_t)0x10D6, (q15_t)0x7EE3, (q15_t)0x10A4, (q15_t)0x7EE9,
+	(q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x1040, (q15_t)0x7EF6,
+	(q15_t)0x100E, (q15_t)0x7EFD, (q15_t)0x0FDD, (q15_t)0x7F03,
+	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0F79, (q15_t)0x7F0F,
+	(q15_t)0x0F47, (q15_t)0x7F15, (q15_t)0x0F15, (q15_t)0x7F1B,
+	(q15_t)0x0EE3, (q15_t)0x7F21, (q15_t)0x0EB1, (q15_t)0x7F27,
+	(q15_t)0x0E7F, (q15_t)0x7F2D, (q15_t)0x0E4D, (q15_t)0x7F32,
+	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0DE9, (q15_t)0x7F3D,
+	(q15_t)0x0DB7, (q15_t)0x7F43, (q15_t)0x0D85, (q15_t)0x7F48,
+	(q15_t)0x0D53, (q15_t)0x7F4D, (q15_t)0x0D21, (q15_t)0x7F53,
+	(q15_t)0x0CEF, (q15_t)0x7F58, (q15_t)0x0CBD, (q15_t)0x7F5D,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0C59, (q15_t)0x7F67,
+	(q15_t)0x0C27, (q15_t)0x7F6B, (q15_t)0x0BF5, (q15_t)0x7F70,
+	(q15_t)0x0BC3, (q15_t)0x7F75, (q15_t)0x0B91, (q15_t)0x7F79,
+	(q15_t)0x0B5F, (q15_t)0x7F7E, (q15_t)0x0B2D, (q15_t)0x7F82,
+	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0AC9, (q15_t)0x7F8B,
+	(q15_t)0x0A97, (q15_t)0x7F8F, (q15_t)0x0A65, (q15_t)0x7F93,
+	(q15_t)0x0A33, (q15_t)0x7F97, (q15_t)0x0A00, (q15_t)0x7F9B,
+	(q15_t)0x09CE, (q15_t)0x7F9F, (q15_t)0x099C, (q15_t)0x7FA3,
+	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0938, (q15_t)0x7FAA,
+	(q15_t)0x0906, (q15_t)0x7FAE, (q15_t)0x08D4, (q15_t)0x7FB1,
+	(q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x086F, (q15_t)0x7FB8,
+	(q15_t)0x083D, (q15_t)0x7FBC, (q15_t)0x080B, (q15_t)0x7FBF,
+	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x07A7, (q15_t)0x7FC5,
+	(q15_t)0x0775, (q15_t)0x7FC8, (q15_t)0x0742, (q15_t)0x7FCB,
+	(q15_t)0x0710, (q15_t)0x7FCE, (q15_t)0x06DE, (q15_t)0x7FD0,
+	(q15_t)0x06AC, (q15_t)0x7FD3, (q15_t)0x067A, (q15_t)0x7FD6,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x0615, (q15_t)0x7FDA,
+	(q15_t)0x05E3, (q15_t)0x7FDD, (q15_t)0x05B1, (q15_t)0x7FDF,
+	(q15_t)0x057F, (q15_t)0x7FE1, (q15_t)0x054C, (q15_t)0x7FE3,
+	(q15_t)0x051A, (q15_t)0x7FE5, (q15_t)0x04E8, (q15_t)0x7FE7,
+	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0483, (q15_t)0x7FEB,
+	(q15_t)0x0451, (q15_t)0x7FED, (q15_t)0x041F, (q15_t)0x7FEE,
+	(q15_t)0x03ED, (q15_t)0x7FF0, (q15_t)0x03BA, (q15_t)0x7FF2,
+	(q15_t)0x0388, (q15_t)0x7FF3, (q15_t)0x0356, (q15_t)0x7FF4,
+	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x02F1, (q15_t)0x7FF7,
+	(q15_t)0x02BF, (q15_t)0x7FF8, (q15_t)0x028D, (q15_t)0x7FF9,
+	(q15_t)0x025B, (q15_t)0x7FFA, (q15_t)0x0228, (q15_t)0x7FFB,
+	(q15_t)0x01F6, (q15_t)0x7FFC, (q15_t)0x01C4, (q15_t)0x7FFC,
+	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x015F, (q15_t)0x7FFE,
+	(q15_t)0x012D, (q15_t)0x7FFE, (q15_t)0x00FB, (q15_t)0x7FFF,
+	(q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0096, (q15_t)0x7FFF,
+	(q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0032, (q15_t)0x7FFF,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFFCD, (q15_t)0x7FFF,
+	(q15_t)0xFF9B, (q15_t)0x7FFF, (q15_t)0xFF69, (q15_t)0x7FFF,
+	(q15_t)0xFF36, (q15_t)0x7FFF, (q15_t)0xFF04, (q15_t)0x7FFF,
+	(q15_t)0xFED2, (q15_t)0x7FFE, (q15_t)0xFEA0, (q15_t)0x7FFE,
+	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFE3B, (q15_t)0x7FFC,
+	(q15_t)0xFE09, (q15_t)0x7FFC, (q15_t)0xFDD7, (q15_t)0x7FFB,
+	(q15_t)0xFDA4, (q15_t)0x7FFA, (q15_t)0xFD72, (q15_t)0x7FF9,
+	(q15_t)0xFD40, (q15_t)0x7FF8, (q15_t)0xFD0E, (q15_t)0x7FF7,
+	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFCA9, (q15_t)0x7FF4,
+	(q15_t)0xFC77, (q15_t)0x7FF3, (q15_t)0xFC45, (q15_t)0x7FF2,
+	(q15_t)0xFC12, (q15_t)0x7FF0, (q15_t)0xFBE0, (q15_t)0x7FEE,
+	(q15_t)0xFBAE, (q15_t)0x7FED, (q15_t)0xFB7C, (q15_t)0x7FEB,
+	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFB17, (q15_t)0x7FE7,
+	(q15_t)0xFAE5, (q15_t)0x7FE5, (q15_t)0xFAB3, (q15_t)0x7FE3,
+	(q15_t)0xFA80, (q15_t)0x7FE1, (q15_t)0xFA4E, (q15_t)0x7FDF,
+	(q15_t)0xFA1C, (q15_t)0x7FDD, (q15_t)0xF9EA, (q15_t)0x7FDA,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF985, (q15_t)0x7FD6,
+	(q15_t)0xF953, (q15_t)0x7FD3, (q15_t)0xF921, (q15_t)0x7FD0,
+	(q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF8BD, (q15_t)0x7FCB,
+	(q15_t)0xF88A, (q15_t)0x7FC8, (q15_t)0xF858, (q15_t)0x7FC5,
+	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF7F4, (q15_t)0x7FBF,
+	(q15_t)0xF7C2, (q15_t)0x7FBC, (q15_t)0xF790, (q15_t)0x7FB8,
+	(q15_t)0xF75D, (q15_t)0x7FB5, (q15_t)0xF72B, (q15_t)0x7FB1,
+	(q15_t)0xF6F9, (q15_t)0x7FAE, (q15_t)0xF6C7, (q15_t)0x7FAA,
+	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF663, (q15_t)0x7FA3,
+	(q15_t)0xF631, (q15_t)0x7F9F, (q15_t)0xF5FF, (q15_t)0x7F9B,
+	(q15_t)0xF5CC, (q15_t)0x7F97, (q15_t)0xF59A, (q15_t)0x7F93,
+	(q15_t)0xF568, (q15_t)0x7F8F, (q15_t)0xF536, (q15_t)0x7F8B,
+	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF4D2, (q15_t)0x7F82,
+	(q15_t)0xF4A0, (q15_t)0x7F7E, (q15_t)0xF46E, (q15_t)0x7F79,
+	(q15_t)0xF43C, (q15_t)0x7F75, (q15_t)0xF40A, (q15_t)0x7F70,
+	(q15_t)0xF3D8, (q15_t)0x7F6B, (q15_t)0xF3A6, (q15_t)0x7F67,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF342, (q15_t)0x7F5D,
+	(q15_t)0xF310, (q15_t)0x7F58, (q15_t)0xF2DE, (q15_t)0x7F53,
+	(q15_t)0xF2AC, (q15_t)0x7F4D, (q15_t)0xF27A, (q15_t)0x7F48,
+	(q15_t)0xF248, (q15_t)0x7F43, (q15_t)0xF216, (q15_t)0x7F3D,
+	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF1B2, (q15_t)0x7F32,
+	(q15_t)0xF180, (q15_t)0x7F2D, (q15_t)0xF14E, (q15_t)0x7F27,
+	(q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF0EA, (q15_t)0x7F1B,
+	(q15_t)0xF0B8, (q15_t)0x7F15, (q15_t)0xF086, (q15_t)0x7F0F,
+	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xF022, (q15_t)0x7F03,
+	(q15_t)0xEFF1, (q15_t)0x7EFD, (q15_t)0xEFBF, (q15_t)0x7EF6,
+	(q15_t)0xEF8D, (q15_t)0x7EF0, (q15_t)0xEF5B, (q15_t)0x7EE9,
+	(q15_t)0xEF29, (q15_t)0x7EE3, (q15_t)0xEEF7, (q15_t)0x7EDC,
+	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEE94, (q15_t)0x7ECF,
+	(q15_t)0xEE62, (q15_t)0x7EC8, (q15_t)0xEE30, (q15_t)0x7EC1,
+	(q15_t)0xEDFE, (q15_t)0x7EBA, (q15_t)0xEDCD, (q15_t)0x7EB3,
+	(q15_t)0xED9B, (q15_t)0x7EAB, (q15_t)0xED69, (q15_t)0x7EA4,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xED06, (q15_t)0x7E95,
+	(q15_t)0xECD4, (q15_t)0x7E8E, (q15_t)0xECA2, (q15_t)0x7E86,
+	(q15_t)0xEC71, (q15_t)0x7E7F, (q15_t)0xEC3F, (q15_t)0x7E77,
+	(q15_t)0xEC0D, (q15_t)0x7E6F, (q15_t)0xEBDC, (q15_t)0x7E67,
+	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEB78, (q15_t)0x7E57,
+	(q15_t)0xEB47, (q15_t)0x7E4F, (q15_t)0xEB15, (q15_t)0x7E47,
+	(q15_t)0xEAE4, (q15_t)0x7E3F, (q15_t)0xEAB2, (q15_t)0x7E37,
+	(q15_t)0xEA80, (q15_t)0x7E2E, (q15_t)0xEA4F, (q15_t)0x7E26,
+	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE9EC, (q15_t)0x7E14,
+	(q15_t)0xE9BA, (q15_t)0x7E0C, (q15_t)0xE989, (q15_t)0x7E03,
+	(q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE926, (q15_t)0x7DF1,
+	(q15_t)0xE8F5, (q15_t)0x7DE8, (q15_t)0xE8C3, (q15_t)0x7DDF,
+	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE860, (q15_t)0x7DCD,
+	(q15_t)0xE82F, (q15_t)0x7DC3, (q15_t)0xE7FD, (q15_t)0x7DBA,
+	(q15_t)0xE7CC, (q15_t)0x7DB0, (q15_t)0xE79B, (q15_t)0x7DA7,
+	(q15_t)0xE769, (q15_t)0x7D9D, (q15_t)0xE738, (q15_t)0x7D94,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE6D5, (q15_t)0x7D80,
+	(q15_t)0xE6A4, (q15_t)0x7D76, (q15_t)0xE673, (q15_t)0x7D6C,
+	(q15_t)0xE642, (q15_t)0x7D62, (q15_t)0xE610, (q15_t)0x7D58,
+	(q15_t)0xE5DF, (q15_t)0x7D4E, (q15_t)0xE5AE, (q15_t)0x7D43,
+	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE54C, (q15_t)0x7D2F,
+	(q15_t)0xE51B, (q15_t)0x7D24, (q15_t)0xE4E9, (q15_t)0x7D19,
+	(q15_t)0xE4B8, (q15_t)0x7D0F, (q15_t)0xE487, (q15_t)0x7D04,
+	(q15_t)0xE456, (q15_t)0x7CF9, (q15_t)0xE425, (q15_t)0x7CEE,
+	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE3C3, (q15_t)0x7CD8,
+	(q15_t)0xE392, (q15_t)0x7CCD, (q15_t)0xE361, (q15_t)0x7CC2,
+	(q15_t)0xE330, (q15_t)0x7CB7, (q15_t)0xE2FF, (q15_t)0x7CAB,
+	(q15_t)0xE2CE, (q15_t)0x7CA0, (q15_t)0xE29D, (q15_t)0x7C94,
+	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE23B, (q15_t)0x7C7D,
+	(q15_t)0xE20A, (q15_t)0x7C71, (q15_t)0xE1DA, (q15_t)0x7C66,
+	(q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE178, (q15_t)0x7C4E,
+	(q15_t)0xE147, (q15_t)0x7C42, (q15_t)0xE116, (q15_t)0x7C36,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE0B5, (q15_t)0x7C1D,
+	(q15_t)0xE084, (q15_t)0x7C11, (q15_t)0xE053, (q15_t)0x7C05,
+	(q15_t)0xE023, (q15_t)0x7BF8, (q15_t)0xDFF2, (q15_t)0x7BEB,
+	(q15_t)0xDFC1, (q15_t)0x7BDF, (q15_t)0xDF91, (q15_t)0x7BD2,
+	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDF2F, (q15_t)0x7BB9,
+	(q15_t)0xDEFF, (q15_t)0x7BAC, (q15_t)0xDECE, (q15_t)0x7B9F,
+	(q15_t)0xDE9E, (q15_t)0x7B92, (q15_t)0xDE6D, (q15_t)0x7B84,
+	(q15_t)0xDE3D, (q15_t)0x7B77, (q15_t)0xDE0C, (q15_t)0x7B6A,
+	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDDAB, (q15_t)0x7B4F,
+	(q15_t)0xDD7B, (q15_t)0x7B42, (q15_t)0xDD4B, (q15_t)0x7B34,
+	(q15_t)0xDD1A, (q15_t)0x7B26, (q15_t)0xDCEA, (q15_t)0x7B19,
+	(q15_t)0xDCBA, (q15_t)0x7B0B, (q15_t)0xDC89, (q15_t)0x7AFD,
+	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDC29, (q15_t)0x7AE1,
+	(q15_t)0xDBF8, (q15_t)0x7AD3, (q15_t)0xDBC8, (q15_t)0x7AC5,
+	(q15_t)0xDB98, (q15_t)0x7AB6, (q15_t)0xDB68, (q15_t)0x7AA8,
+	(q15_t)0xDB38, (q15_t)0x7A9A, (q15_t)0xDB08, (q15_t)0x7A8B,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDAA7, (q15_t)0x7A6E,
+	(q15_t)0xDA77, (q15_t)0x7A5F, (q15_t)0xDA47, (q15_t)0x7A50,
+	(q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD9E7, (q15_t)0x7A33,
+	(q15_t)0xD9B7, (q15_t)0x7A24, (q15_t)0xD987, (q15_t)0x7A15,
+	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD927, (q15_t)0x79F6,
+	(q15_t)0xD8F8, (q15_t)0x79E7, (q15_t)0xD8C8, (q15_t)0x79D8,
+	(q15_t)0xD898, (q15_t)0x79C8, (q15_t)0xD868, (q15_t)0x79B9,
+	(q15_t)0xD838, (q15_t)0x79A9, (q15_t)0xD809, (q15_t)0x7999,
+	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD7A9, (q15_t)0x797A,
+	(q15_t)0xD779, (q15_t)0x796A, (q15_t)0xD74A, (q15_t)0x795A,
+	(q15_t)0xD71A, (q15_t)0x794A, (q15_t)0xD6EA, (q15_t)0x793A,
+	(q15_t)0xD6BB, (q15_t)0x792A, (q15_t)0xD68B, (q15_t)0x7919,
+	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD62C, (q15_t)0x78F9,
+	(q15_t)0xD5FD, (q15_t)0x78E8, (q15_t)0xD5CD, (q15_t)0x78D8,
+	(q15_t)0xD59E, (q15_t)0x78C7, (q15_t)0xD56E, (q15_t)0x78B6,
+	(q15_t)0xD53F, (q15_t)0x78A6, (q15_t)0xD510, (q15_t)0x7895,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD4B1, (q15_t)0x7873,
+	(q15_t)0xD482, (q15_t)0x7862, (q15_t)0xD452, (q15_t)0x7851,
+	(q15_t)0xD423, (q15_t)0x7840, (q15_t)0xD3F4, (q15_t)0x782E,
+	(q15_t)0xD3C5, (q15_t)0x781D, (q15_t)0xD396, (q15_t)0x780C,
+	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD337, (q15_t)0x77E9,
+	(q15_t)0xD308, (q15_t)0x77D7, (q15_t)0xD2D9, (q15_t)0x77C5,
+	(q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD27B, (q15_t)0x77A2,
+	(q15_t)0xD24C, (q15_t)0x7790, (q15_t)0xD21D, (q15_t)0x777E,
+	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD1C0, (q15_t)0x775A,
+	(q15_t)0xD191, (q15_t)0x7747, (q15_t)0xD162, (q15_t)0x7735,
+	(q15_t)0xD133, (q15_t)0x7723, (q15_t)0xD104, (q15_t)0x7710,
+	(q15_t)0xD0D6, (q15_t)0x76FE, (q15_t)0xD0A7, (q15_t)0x76EB,
+	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xD04A, (q15_t)0x76C6,
+	(q15_t)0xD01B, (q15_t)0x76B3, (q15_t)0xCFEC, (q15_t)0x76A0,
+	(q15_t)0xCFBE, (q15_t)0x768E, (q15_t)0xCF8F, (q15_t)0x767B,
+	(q15_t)0xCF61, (q15_t)0x7668, (q15_t)0xCF32, (q15_t)0x7654,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCED5, (q15_t)0x762E,
+	(q15_t)0xCEA7, (q15_t)0x761B, (q15_t)0xCE79, (q15_t)0x7607,
+	(q15_t)0xCE4A, (q15_t)0x75F4, (q15_t)0xCE1C, (q15_t)0x75E0,
+	(q15_t)0xCDEE, (q15_t)0x75CC, (q15_t)0xCDBF, (q15_t)0x75B9,
+	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCD63, (q15_t)0x7591,
+	(q15_t)0xCD35, (q15_t)0x757D, (q15_t)0xCD07, (q15_t)0x7569,
+	(q15_t)0xCCD9, (q15_t)0x7555, (q15_t)0xCCAB, (q15_t)0x7541,
+	(q15_t)0xCC7D, (q15_t)0x752D, (q15_t)0xCC4F, (q15_t)0x7519,
+	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCBF3, (q15_t)0x74F0,
+	(q15_t)0xCBC5, (q15_t)0x74DB, (q15_t)0xCB97, (q15_t)0x74C7,
+	(q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCB3B, (q15_t)0x749E,
+	(q15_t)0xCB0D, (q15_t)0x7489, (q15_t)0xCAE0, (q15_t)0x7474,
+	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xCA84, (q15_t)0x744A,
+	(q15_t)0xCA57, (q15_t)0x7435, (q15_t)0xCA29, (q15_t)0x7420,
+	(q15_t)0xC9FB, (q15_t)0x740B, (q15_t)0xC9CE, (q15_t)0x73F6,
+	(q15_t)0xC9A0, (q15_t)0x73E0, (q15_t)0xC973, (q15_t)0x73CB,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC918, (q15_t)0x73A0,
+	(q15_t)0xC8EB, (q15_t)0x738A, (q15_t)0xC8BD, (q15_t)0x7375,
+	(q15_t)0xC890, (q15_t)0x735F, (q15_t)0xC863, (q15_t)0x7349,
+	(q15_t)0xC835, (q15_t)0x7333, (q15_t)0xC808, (q15_t)0x731D,
+	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC7AE, (q15_t)0x72F1,
+	(q15_t)0xC781, (q15_t)0x72DB, (q15_t)0xC754, (q15_t)0x72C5,
+	(q15_t)0xC727, (q15_t)0x72AF, (q15_t)0xC6F9, (q15_t)0x7298,
+	(q15_t)0xC6CD, (q15_t)0x7282, (q15_t)0xC6A0, (q15_t)0x726B,
+	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC646, (q15_t)0x723E,
+	(q15_t)0xC619, (q15_t)0x7227, (q15_t)0xC5EC, (q15_t)0x7211,
+	(q15_t)0xC5BF, (q15_t)0x71FA, (q15_t)0xC593, (q15_t)0x71E3,
+	(q15_t)0xC566, (q15_t)0x71CC, (q15_t)0xC539, (q15_t)0x71B5,
+	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC4E0, (q15_t)0x7186,
+	(q15_t)0xC4B3, (q15_t)0x716F, (q15_t)0xC487, (q15_t)0x7158,
+	(q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC42E, (q15_t)0x7129,
+	(q15_t)0xC402, (q15_t)0x7112, (q15_t)0xC3D5, (q15_t)0x70FA,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC37C, (q15_t)0x70CB,
+	(q15_t)0xC350, (q15_t)0x70B3, (q15_t)0xC324, (q15_t)0x709B,
+	(q15_t)0xC2F8, (q15_t)0x7083, (q15_t)0xC2CC, (q15_t)0x706B,
+	(q15_t)0xC29F, (q15_t)0x7053, (q15_t)0xC273, (q15_t)0x703B,
+	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC21B, (q15_t)0x700A,
+	(q15_t)0xC1EF, (q15_t)0x6FF2, (q15_t)0xC1C3, (q15_t)0x6FDA,
+	(q15_t)0xC197, (q15_t)0x6FC1, (q15_t)0xC16C, (q15_t)0x6FA9,
+	(q15_t)0xC140, (q15_t)0x6F90, (q15_t)0xC114, (q15_t)0x6F77,
+	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC0BC, (q15_t)0x6F46,
+	(q15_t)0xC091, (q15_t)0x6F2D, (q15_t)0xC065, (q15_t)0x6F14,
+	(q15_t)0xC03A, (q15_t)0x6EFB, (q15_t)0xC00E, (q15_t)0x6EE2,
+	(q15_t)0xBFE2, (q15_t)0x6EC9, (q15_t)0xBFB7, (q15_t)0x6EAF,
+	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBF60, (q15_t)0x6E7D,
+	(q15_t)0xBF35, (q15_t)0x6E63, (q15_t)0xBF09, (q15_t)0x6E4A,
+	(q15_t)0xBEDE, (q15_t)0x6E30, (q15_t)0xBEB3, (q15_t)0x6E17,
+	(q15_t)0xBE88, (q15_t)0x6DFD, (q15_t)0xBE5D, (q15_t)0x6DE3,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBE06, (q15_t)0x6DB0,
+	(q15_t)0xBDDB, (q15_t)0x6D96, (q15_t)0xBDB0, (q15_t)0x6D7C,
+	(q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBD5A, (q15_t)0x6D48,
+	(q15_t)0xBD2F, (q15_t)0x6D2D, (q15_t)0xBD05, (q15_t)0x6D13,
+	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBCAF, (q15_t)0x6CDE,
+	(q15_t)0xBC84, (q15_t)0x6CC4, (q15_t)0xBC5A, (q15_t)0x6CA9,
+	(q15_t)0xBC2F, (q15_t)0x6C8F, (q15_t)0xBC04, (q15_t)0x6C74,
+	(q15_t)0xBBDA, (q15_t)0x6C59, (q15_t)0xBBAF, (q15_t)0x6C3F,
+	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBB5A, (q15_t)0x6C09,
+	(q15_t)0xBB30, (q15_t)0x6BEE, (q15_t)0xBB05, (q15_t)0x6BD3,
+	(q15_t)0xBADB, (q15_t)0x6BB8, (q15_t)0xBAB1, (q15_t)0x6B9C,
+	(q15_t)0xBA87, (q15_t)0x6B81, (q15_t)0xBA5C, (q15_t)0x6B66,
+	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xBA08, (q15_t)0x6B2F,
+	(q15_t)0xB9DE, (q15_t)0x6B13, (q15_t)0xB9B4, (q15_t)0x6AF8,
+	(q15_t)0xB98A, (q15_t)0x6ADC, (q15_t)0xB960, (q15_t)0x6AC1,
+	(q15_t)0xB936, (q15_t)0x6AA5, (q15_t)0xB90C, (q15_t)0x6A89,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB8B9, (q15_t)0x6A51,
+	(q15_t)0xB88F, (q15_t)0x6A35, (q15_t)0xB865, (q15_t)0x6A19,
+	(q15_t)0xB83C, (q15_t)0x69FD, (q15_t)0xB812, (q15_t)0x69E1,
+	(q15_t)0xB7E9, (q15_t)0x69C4, (q15_t)0xB7BF, (q15_t)0x69A8,
+	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB76C, (q15_t)0x696F,
+	(q15_t)0xB743, (q15_t)0x6953, (q15_t)0xB719, (q15_t)0x6936,
+	(q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB6C7, (q15_t)0x68FD,
+	(q15_t)0xB69E, (q15_t)0x68E0, (q15_t)0xB675, (q15_t)0x68C3,
+	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB622, (q15_t)0x6889,
+	(q15_t)0xB5F9, (q15_t)0x686C, (q15_t)0xB5D0, (q15_t)0x684F,
+	(q15_t)0xB5A7, (q15_t)0x6832, (q15_t)0xB57E, (q15_t)0x6815,
+	(q15_t)0xB556, (q15_t)0x67F7, (q15_t)0xB52D, (q15_t)0x67DA,
+	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB4DB, (q15_t)0x679F,
+	(q15_t)0xB4B3, (q15_t)0x6782, (q15_t)0xB48A, (q15_t)0x6764,
+	(q15_t)0xB461, (q15_t)0x6746, (q15_t)0xB439, (q15_t)0x6729,
+	(q15_t)0xB410, (q15_t)0x670B, (q15_t)0xB3E8, (q15_t)0x66ED,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB397, (q15_t)0x66B1,
+	(q15_t)0xB36F, (q15_t)0x6693, (q15_t)0xB347, (q15_t)0x6675,
+	(q15_t)0xB31E, (q15_t)0x6657, (q15_t)0xB2F6, (q15_t)0x6639,
+	(q15_t)0xB2CE, (q15_t)0x661A, (q15_t)0xB2A6, (q15_t)0x65FC,
+	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB256, (q15_t)0x65BF,
+	(q15_t)0xB22E, (q15_t)0x65A0, (q15_t)0xB206, (q15_t)0x6582,
+	(q15_t)0xB1DE, (q15_t)0x6563, (q15_t)0xB1B7, (q15_t)0x6545,
+	(q15_t)0xB18F, (q15_t)0x6526, (q15_t)0xB167, (q15_t)0x6507,
+	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB118, (q15_t)0x64C9,
+	(q15_t)0xB0F0, (q15_t)0x64AA, (q15_t)0xB0C9, (q15_t)0x648B,
+	(q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB07A, (q15_t)0x644D,
+	(q15_t)0xB053, (q15_t)0x642D, (q15_t)0xB02B, (q15_t)0x640E,
+	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAFDD, (q15_t)0x63CF,
+	(q15_t)0xAFB6, (q15_t)0x63B0, (q15_t)0xAF8F, (q15_t)0x6390,
+	(q15_t)0xAF68, (q15_t)0x6371, (q15_t)0xAF40, (q15_t)0x6351,
+	(q15_t)0xAF1A, (q15_t)0x6331, (q15_t)0xAEF3, (q15_t)0x6311,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAEA5, (q15_t)0x62D2,
+	(q15_t)0xAE7E, (q15_t)0x62B2, (q15_t)0xAE57, (q15_t)0x6292,
+	(q15_t)0xAE31, (q15_t)0x6271, (q15_t)0xAE0A, (q15_t)0x6251,
+	(q15_t)0xADE3, (q15_t)0x6231, (q15_t)0xADBD, (q15_t)0x6211,
+	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAD70, (q15_t)0x61D0,
+	(q15_t)0xAD4A, (q15_t)0x61B0, (q15_t)0xAD23, (q15_t)0x618F,
+	(q15_t)0xACFD, (q15_t)0x616F, (q15_t)0xACD7, (q15_t)0x614E,
+	(q15_t)0xACB1, (q15_t)0x612D, (q15_t)0xAC8A, (q15_t)0x610D,
+	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAC3E, (q15_t)0x60CB,
+	(q15_t)0xAC18, (q15_t)0x60AA, (q15_t)0xABF2, (q15_t)0x6089,
+	(q15_t)0xABCC, (q15_t)0x6068, (q15_t)0xABA7, (q15_t)0x6047,
+	(q15_t)0xAB81, (q15_t)0x6026, (q15_t)0xAB5B, (q15_t)0x6004,
+	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAB10, (q15_t)0x5FC2,
+	(q15_t)0xAAEA, (q15_t)0x5FA0, (q15_t)0xAAC5, (q15_t)0x5F7F,
+	(q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA7A, (q15_t)0x5F3C,
+	(q15_t)0xAA54, (q15_t)0x5F1A, (q15_t)0xAA2F, (q15_t)0x5EF9,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA9E5, (q15_t)0x5EB5,
+	(q15_t)0xA9BF, (q15_t)0x5E93, (q15_t)0xA99A, (q15_t)0x5E71,
+	(q15_t)0xA975, (q15_t)0x5E50, (q15_t)0xA950, (q15_t)0x5E2D,
+	(q15_t)0xA92B, (q15_t)0x5E0B, (q15_t)0xA906, (q15_t)0x5DE9,
+	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA8BD, (q15_t)0x5DA5,
+	(q15_t)0xA898, (q15_t)0x5D83, (q15_t)0xA873, (q15_t)0x5D60,
+	(q15_t)0xA84F, (q15_t)0x5D3E, (q15_t)0xA82A, (q15_t)0x5D1B,
+	(q15_t)0xA806, (q15_t)0x5CF9, (q15_t)0xA7E1, (q15_t)0x5CD6,
+	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA798, (q15_t)0x5C91,
+	(q15_t)0xA774, (q15_t)0x5C6E, (q15_t)0xA750, (q15_t)0x5C4B,
+	(q15_t)0xA72B, (q15_t)0x5C29, (q15_t)0xA707, (q15_t)0x5C06,
+	(q15_t)0xA6E3, (q15_t)0x5BE3, (q15_t)0xA6BF, (q15_t)0x5BC0,
+	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA677, (q15_t)0x5B79,
+	(q15_t)0xA653, (q15_t)0x5B56, (q15_t)0xA62F, (q15_t)0x5B33,
+	(q15_t)0xA60C, (q15_t)0x5B10, (q15_t)0xA5E8, (q15_t)0x5AEC,
+	(q15_t)0xA5C4, (q15_t)0x5AC9, (q15_t)0xA5A1, (q15_t)0x5AA5,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA55A, (q15_t)0x5A5E,
+	(q15_t)0xA536, (q15_t)0x5A3B, (q15_t)0xA513, (q15_t)0x5A17,
+	(q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA4CC, (q15_t)0x59D0,
+	(q15_t)0xA4A9, (q15_t)0x59AC, (q15_t)0xA486, (q15_t)0x5988,
+	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA43F, (q15_t)0x5940,
+	(q15_t)0xA41C, (q15_t)0x591C, (q15_t)0xA3F9, (q15_t)0x58F8,
+	(q15_t)0xA3D6, (q15_t)0x58D4, (q15_t)0xA3B4, (q15_t)0x58AF,
+	(q15_t)0xA391, (q15_t)0x588B, (q15_t)0xA36E, (q15_t)0x5867,
+	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA329, (q15_t)0x581E,
+	(q15_t)0xA306, (q15_t)0x57F9, (q15_t)0xA2E4, (q15_t)0x57D5,
+	(q15_t)0xA2C1, (q15_t)0x57B0, (q15_t)0xA29F, (q15_t)0x578C,
+	(q15_t)0xA27C, (q15_t)0x5767, (q15_t)0xA25A, (q15_t)0x5742,
+	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA216, (q15_t)0x56F9,
+	(q15_t)0xA1F4, (q15_t)0x56D4, (q15_t)0xA1D2, (q15_t)0x56AF,
+	(q15_t)0xA1AF, (q15_t)0x568A, (q15_t)0xA18E, (q15_t)0x5665,
+	(q15_t)0xA16C, (q15_t)0x5640, (q15_t)0xA14A, (q15_t)0x561A,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA106, (q15_t)0x55D0,
+	(q15_t)0xA0E5, (q15_t)0x55AB, (q15_t)0xA0C3, (q15_t)0x5585,
+	(q15_t)0xA0A1, (q15_t)0x5560, (q15_t)0xA080, (q15_t)0x553A,
+	(q15_t)0xA05F, (q15_t)0x5515, (q15_t)0xA03D, (q15_t)0x54EF,
+	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9FFB, (q15_t)0x54A4,
+	(q15_t)0x9FD9, (q15_t)0x547E, (q15_t)0x9FB8, (q15_t)0x5458,
+	(q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F76, (q15_t)0x540D,
+	(q15_t)0x9F55, (q15_t)0x53E7, (q15_t)0x9F34, (q15_t)0x53C1,
+	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9EF2, (q15_t)0x5375,
+	(q15_t)0x9ED2, (q15_t)0x534E, (q15_t)0x9EB1, (q15_t)0x5328,
+	(q15_t)0x9E90, (q15_t)0x5302, (q15_t)0x9E70, (q15_t)0x52DC,
+	(q15_t)0x9E4F, (q15_t)0x52B5, (q15_t)0x9E2F, (q15_t)0x528F,
+	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9DEE, (q15_t)0x5242,
+	(q15_t)0x9DCE, (q15_t)0x521C, (q15_t)0x9DAE, (q15_t)0x51F5,
+	(q15_t)0x9D8E, (q15_t)0x51CE, (q15_t)0x9D6D, (q15_t)0x51A8,
+	(q15_t)0x9D4D, (q15_t)0x5181, (q15_t)0x9D2D, (q15_t)0x515A,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9CEE, (q15_t)0x510C,
+	(q15_t)0x9CCE, (q15_t)0x50E5, (q15_t)0x9CAE, (q15_t)0x50BF,
+	(q15_t)0x9C8E, (q15_t)0x5097, (q15_t)0x9C6F, (q15_t)0x5070,
+	(q15_t)0x9C4F, (q15_t)0x5049, (q15_t)0x9C30, (q15_t)0x5022,
+	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9BF1, (q15_t)0x4FD4,
+	(q15_t)0x9BD2, (q15_t)0x4FAC, (q15_t)0x9BB2, (q15_t)0x4F85,
+	(q15_t)0x9B93, (q15_t)0x4F5E, (q15_t)0x9B74, (q15_t)0x4F36,
+	(q15_t)0x9B55, (q15_t)0x4F0F, (q15_t)0x9B36, (q15_t)0x4EE7,
+	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9AF8, (q15_t)0x4E98,
+	(q15_t)0x9AD9, (q15_t)0x4E70, (q15_t)0x9ABA, (q15_t)0x4E48,
+	(q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A7D, (q15_t)0x4DF9,
+	(q15_t)0x9A5F, (q15_t)0x4DD1, (q15_t)0x9A40, (q15_t)0x4DA9,
+	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x9A03, (q15_t)0x4D59,
+	(q15_t)0x99E5, (q15_t)0x4D31, (q15_t)0x99C6, (q15_t)0x4D09,
+	(q15_t)0x99A8, (q15_t)0x4CE1, (q15_t)0x998A, (q15_t)0x4CB8,
+	(q15_t)0x996C, (q15_t)0x4C90, (q15_t)0x994E, (q15_t)0x4C68,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9912, (q15_t)0x4C17,
+	(q15_t)0x98F4, (q15_t)0x4BEF, (q15_t)0x98D6, (q15_t)0x4BC6,
+	(q15_t)0x98B9, (q15_t)0x4B9E, (q15_t)0x989B, (q15_t)0x4B75,
+	(q15_t)0x987D, (q15_t)0x4B4C, (q15_t)0x9860, (q15_t)0x4B24,
+	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9825, (q15_t)0x4AD2,
+	(q15_t)0x9808, (q15_t)0x4AA9, (q15_t)0x97EA, (q15_t)0x4A81,
+	(q15_t)0x97CD, (q15_t)0x4A58, (q15_t)0x97B0, (q15_t)0x4A2F,
+	(q15_t)0x9793, (q15_t)0x4A06, (q15_t)0x9776, (q15_t)0x49DD,
+	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x973C, (q15_t)0x498A,
+	(q15_t)0x971F, (q15_t)0x4961, (q15_t)0x9702, (q15_t)0x4938,
+	(q15_t)0x96E6, (q15_t)0x490F, (q15_t)0x96C9, (q15_t)0x48E6,
+	(q15_t)0x96AC, (q15_t)0x48BC, (q15_t)0x9690, (q15_t)0x4893,
+	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x9657, (q15_t)0x4840,
+	(q15_t)0x963B, (q15_t)0x4816, (q15_t)0x961E, (q15_t)0x47ED,
+	(q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x95E6, (q15_t)0x479A,
+	(q15_t)0x95CA, (q15_t)0x4770, (q15_t)0x95AE, (q15_t)0x4746,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9576, (q15_t)0x46F3,
+	(q15_t)0x955A, (q15_t)0x46C9, (q15_t)0x953E, (q15_t)0x469F,
+	(q15_t)0x9523, (q15_t)0x4675, (q15_t)0x9507, (q15_t)0x464B,
+	(q15_t)0x94EC, (q15_t)0x4621, (q15_t)0x94D0, (q15_t)0x45F7,
+	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x9499, (q15_t)0x45A3,
+	(q15_t)0x947E, (q15_t)0x4578, (q15_t)0x9463, (q15_t)0x454E,
+	(q15_t)0x9447, (q15_t)0x4524, (q15_t)0x942C, (q15_t)0x44FA,
+	(q15_t)0x9411, (q15_t)0x44CF, (q15_t)0x93F6, (q15_t)0x44A5,
+	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x93C0, (q15_t)0x4450,
+	(q15_t)0x93A6, (q15_t)0x4425, (q15_t)0x938B, (q15_t)0x43FB,
+	(q15_t)0x9370, (q15_t)0x43D0, (q15_t)0x9356, (q15_t)0x43A5,
+	(q15_t)0x933B, (q15_t)0x437B, (q15_t)0x9321, (q15_t)0x4350,
+	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x92EC, (q15_t)0x42FA,
+	(q15_t)0x92D2, (q15_t)0x42D0, (q15_t)0x92B7, (q15_t)0x42A5,
+	(q15_t)0x929D, (q15_t)0x427A, (q15_t)0x9283, (q15_t)0x424F,
+	(q15_t)0x9269, (q15_t)0x4224, (q15_t)0x924F, (q15_t)0x41F9,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x921C, (q15_t)0x41A2,
+	(q15_t)0x9202, (q15_t)0x4177, (q15_t)0x91E8, (q15_t)0x414C,
+	(q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x91B5, (q15_t)0x40F6,
+	(q15_t)0x919C, (q15_t)0x40CA, (q15_t)0x9182, (q15_t)0x409F,
+	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9150, (q15_t)0x4048,
+	(q15_t)0x9136, (q15_t)0x401D, (q15_t)0x911D, (q15_t)0x3FF1,
+	(q15_t)0x9104, (q15_t)0x3FC5, (q15_t)0x90EB, (q15_t)0x3F9A,
+	(q15_t)0x90D2, (q15_t)0x3F6E, (q15_t)0x90B9, (q15_t)0x3F43,
+	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x9088, (q15_t)0x3EEB,
+	(q15_t)0x906F, (q15_t)0x3EBF, (q15_t)0x9056, (q15_t)0x3E93,
+	(q15_t)0x903E, (q15_t)0x3E68, (q15_t)0x9025, (q15_t)0x3E3C,
+	(q15_t)0x900D, (q15_t)0x3E10, (q15_t)0x8FF5, (q15_t)0x3DE4,
+	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8FC4, (q15_t)0x3D8C,
+	(q15_t)0x8FAC, (q15_t)0x3D60, (q15_t)0x8F94, (q15_t)0x3D33,
+	(q15_t)0x8F7C, (q15_t)0x3D07, (q15_t)0x8F64, (q15_t)0x3CDB,
+	(q15_t)0x8F4C, (q15_t)0x3CAF, (q15_t)0x8F34, (q15_t)0x3C83,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8F05, (q15_t)0x3C2A,
+	(q15_t)0x8EED, (q15_t)0x3BFD, (q15_t)0x8ED6, (q15_t)0x3BD1,
+	(q15_t)0x8EBE, (q15_t)0x3BA5, (q15_t)0x8EA7, (q15_t)0x3B78,
+	(q15_t)0x8E90, (q15_t)0x3B4C, (q15_t)0x8E79, (q15_t)0x3B1F,
+	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E4A, (q15_t)0x3AC6,
+	(q15_t)0x8E33, (q15_t)0x3A99, (q15_t)0x8E1C, (q15_t)0x3A6C,
+	(q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DEE, (q15_t)0x3A13,
+	(q15_t)0x8DD8, (q15_t)0x39E6, (q15_t)0x8DC1, (q15_t)0x39B9,
+	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D94, (q15_t)0x395F,
+	(q15_t)0x8D7D, (q15_t)0x3932, (q15_t)0x8D67, (q15_t)0x3906,
+	(q15_t)0x8D50, (q15_t)0x38D8, (q15_t)0x8D3A, (q15_t)0x38AB,
+	(q15_t)0x8D24, (q15_t)0x387E, (q15_t)0x8D0E, (q15_t)0x3851,
+	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CE2, (q15_t)0x37F7,
+	(q15_t)0x8CCC, (q15_t)0x37CA, (q15_t)0x8CB6, (q15_t)0x379C,
+	(q15_t)0x8CA0, (q15_t)0x376F, (q15_t)0x8C8A, (q15_t)0x3742,
+	(q15_t)0x8C75, (q15_t)0x3714, (q15_t)0x8C5F, (q15_t)0x36E7,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8C34, (q15_t)0x368C,
+	(q15_t)0x8C1F, (q15_t)0x365F, (q15_t)0x8C09, (q15_t)0x3631,
+	(q15_t)0x8BF4, (q15_t)0x3604, (q15_t)0x8BDF, (q15_t)0x35D6,
+	(q15_t)0x8BCA, (q15_t)0x35A8, (q15_t)0x8BB5, (q15_t)0x357B,
+	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B8B, (q15_t)0x351F,
+	(q15_t)0x8B76, (q15_t)0x34F2, (q15_t)0x8B61, (q15_t)0x34C4,
+	(q15_t)0x8B4D, (q15_t)0x3496, (q15_t)0x8B38, (q15_t)0x3468,
+	(q15_t)0x8B24, (q15_t)0x343A, (q15_t)0x8B0F, (q15_t)0x340C,
+	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AE6, (q15_t)0x33B0,
+	(q15_t)0x8AD2, (q15_t)0x3382, (q15_t)0x8ABE, (q15_t)0x3354,
+	(q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A96, (q15_t)0x32F8,
+	(q15_t)0x8A82, (q15_t)0x32CA, (q15_t)0x8A6E, (q15_t)0x329C,
+	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A46, (q15_t)0x3240,
+	(q15_t)0x8A33, (q15_t)0x3211, (q15_t)0x8A1F, (q15_t)0x31E3,
+	(q15_t)0x8A0B, (q15_t)0x31B5, (q15_t)0x89F8, (q15_t)0x3186,
+	(q15_t)0x89E4, (q15_t)0x3158, (q15_t)0x89D1, (q15_t)0x312A,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x89AB, (q15_t)0x30CD,
+	(q15_t)0x8997, (q15_t)0x309E, (q15_t)0x8984, (q15_t)0x3070,
+	(q15_t)0x8971, (q15_t)0x3041, (q15_t)0x895F, (q15_t)0x3013,
+	(q15_t)0x894C, (q15_t)0x2FE4, (q15_t)0x8939, (q15_t)0x2FB5,
+	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8914, (q15_t)0x2F58,
+	(q15_t)0x8901, (q15_t)0x2F29, (q15_t)0x88EF, (q15_t)0x2EFB,
+	(q15_t)0x88DC, (q15_t)0x2ECC, (q15_t)0x88CA, (q15_t)0x2E9D,
+	(q15_t)0x88B8, (q15_t)0x2E6E, (q15_t)0x88A5, (q15_t)0x2E3F,
+	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8881, (q15_t)0x2DE2,
+	(q15_t)0x886F, (q15_t)0x2DB3, (q15_t)0x885D, (q15_t)0x2D84,
+	(q15_t)0x884B, (q15_t)0x2D55, (q15_t)0x883A, (q15_t)0x2D26,
+	(q15_t)0x8828, (q15_t)0x2CF7, (q15_t)0x8816, (q15_t)0x2CC8,
+	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87F3, (q15_t)0x2C69,
+	(q15_t)0x87E2, (q15_t)0x2C3A, (q15_t)0x87D1, (q15_t)0x2C0B,
+	(q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x87AE, (q15_t)0x2BAD,
+	(q15_t)0x879D, (q15_t)0x2B7D, (q15_t)0x878C, (q15_t)0x2B4E,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x876A, (q15_t)0x2AEF,
+	(q15_t)0x8759, (q15_t)0x2AC0, (q15_t)0x8749, (q15_t)0x2A91,
+	(q15_t)0x8738, (q15_t)0x2A61, (q15_t)0x8727, (q15_t)0x2A32,
+	(q15_t)0x8717, (q15_t)0x2A02, (q15_t)0x8706, (q15_t)0x29D3,
+	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86E6, (q15_t)0x2974,
+	(q15_t)0x86D5, (q15_t)0x2944, (q15_t)0x86C5, (q15_t)0x2915,
+	(q15_t)0x86B5, (q15_t)0x28E5, (q15_t)0x86A5, (q15_t)0x28B5,
+	(q15_t)0x8695, (q15_t)0x2886, (q15_t)0x8685, (q15_t)0x2856,
+	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8666, (q15_t)0x27F6,
+	(q15_t)0x8656, (q15_t)0x27C7, (q15_t)0x8646, (q15_t)0x2797,
+	(q15_t)0x8637, (q15_t)0x2767, (q15_t)0x8627, (q15_t)0x2737,
+	(q15_t)0x8618, (q15_t)0x2707, (q15_t)0x8609, (q15_t)0x26D8,
+	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85EA, (q15_t)0x2678,
+	(q15_t)0x85DB, (q15_t)0x2648, (q15_t)0x85CC, (q15_t)0x2618,
+	(q15_t)0x85BD, (q15_t)0x25E8, (q15_t)0x85AF, (q15_t)0x25B8,
+	(q15_t)0x85A0, (q15_t)0x2588, (q15_t)0x8591, (q15_t)0x2558,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8574, (q15_t)0x24F7,
+	(q15_t)0x8565, (q15_t)0x24C7, (q15_t)0x8557, (q15_t)0x2497,
+	(q15_t)0x8549, (q15_t)0x2467, (q15_t)0x853A, (q15_t)0x2437,
+	(q15_t)0x852C, (q15_t)0x2407, (q15_t)0x851E, (q15_t)0x23D6,
+	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x8502, (q15_t)0x2376,
+	(q15_t)0x84F4, (q15_t)0x2345, (q15_t)0x84E6, (q15_t)0x2315,
+	(q15_t)0x84D9, (q15_t)0x22E5, (q15_t)0x84CB, (q15_t)0x22B4,
+	(q15_t)0x84BD, (q15_t)0x2284, (q15_t)0x84B0, (q15_t)0x2254,
+	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x8495, (q15_t)0x21F3,
+	(q15_t)0x8488, (q15_t)0x21C2, (q15_t)0x847B, (q15_t)0x2192,
+	(q15_t)0x846D, (q15_t)0x2161, (q15_t)0x8460, (q15_t)0x2131,
+	(q15_t)0x8453, (q15_t)0x2100, (q15_t)0x8446, (q15_t)0x20D0,
+	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x842D, (q15_t)0x206E,
+	(q15_t)0x8420, (q15_t)0x203E, (q15_t)0x8414, (q15_t)0x200D,
+	(q15_t)0x8407, (q15_t)0x1FDC, (q15_t)0x83FA, (q15_t)0x1FAC,
+	(q15_t)0x83EE, (q15_t)0x1F7B, (q15_t)0x83E2, (q15_t)0x1F4A,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83C9, (q15_t)0x1EE9,
+	(q15_t)0x83BD, (q15_t)0x1EB8, (q15_t)0x83B1, (q15_t)0x1E87,
+	(q15_t)0x83A5, (q15_t)0x1E56, (q15_t)0x8399, (q15_t)0x1E25,
+	(q15_t)0x838E, (q15_t)0x1DF5, (q15_t)0x8382, (q15_t)0x1DC4,
+	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x836B, (q15_t)0x1D62,
+	(q15_t)0x835F, (q15_t)0x1D31, (q15_t)0x8354, (q15_t)0x1D00,
+	(q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x833D, (q15_t)0x1C9E,
+	(q15_t)0x8332, (q15_t)0x1C6D, (q15_t)0x8327, (q15_t)0x1C3C,
+	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x8311, (q15_t)0x1BDA,
+	(q15_t)0x8306, (q15_t)0x1BA9, (q15_t)0x82FB, (q15_t)0x1B78,
+	(q15_t)0x82F0, (q15_t)0x1B47, (q15_t)0x82E6, (q15_t)0x1B16,
+	(q15_t)0x82DB, (q15_t)0x1AE4, (q15_t)0x82D0, (q15_t)0x1AB3,
+	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x82BC, (q15_t)0x1A51,
+	(q15_t)0x82B1, (q15_t)0x1A20, (q15_t)0x82A7, (q15_t)0x19EF,
+	(q15_t)0x829D, (q15_t)0x19BD, (q15_t)0x8293, (q15_t)0x198C,
+	(q15_t)0x8289, (q15_t)0x195B, (q15_t)0x827F, (q15_t)0x192A,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x826B, (q15_t)0x18C7,
+	(q15_t)0x8262, (q15_t)0x1896, (q15_t)0x8258, (q15_t)0x1864,
+	(q15_t)0x824F, (q15_t)0x1833, (q15_t)0x8245, (q15_t)0x1802,
+	(q15_t)0x823C, (q15_t)0x17D0, (q15_t)0x8232, (q15_t)0x179F,
+	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8220, (q15_t)0x173C,
+	(q15_t)0x8217, (q15_t)0x170A, (q15_t)0x820E, (q15_t)0x16D9,
+	(q15_t)0x8205, (q15_t)0x16A8, (q15_t)0x81FC, (q15_t)0x1676,
+	(q15_t)0x81F3, (q15_t)0x1645, (q15_t)0x81EB, (q15_t)0x1613,
+	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81D9, (q15_t)0x15B0,
+	(q15_t)0x81D1, (q15_t)0x157F, (q15_t)0x81C8, (q15_t)0x154D,
+	(q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81B8, (q15_t)0x14EA,
+	(q15_t)0x81B0, (q15_t)0x14B8, (q15_t)0x81A8, (q15_t)0x1487,
+	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8198, (q15_t)0x1423,
+	(q15_t)0x8190, (q15_t)0x13F2, (q15_t)0x8188, (q15_t)0x13C0,
+	(q15_t)0x8180, (q15_t)0x138E, (q15_t)0x8179, (q15_t)0x135D,
+	(q15_t)0x8171, (q15_t)0x132B, (q15_t)0x816A, (q15_t)0x12F9,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x815B, (q15_t)0x1296,
+	(q15_t)0x8154, (q15_t)0x1264, (q15_t)0x814C, (q15_t)0x1232,
+	(q15_t)0x8145, (q15_t)0x1201, (q15_t)0x813E, (q15_t)0x11CF,
+	(q15_t)0x8137, (q15_t)0x119D, (q15_t)0x8130, (q15_t)0x116B,
+	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x8123, (q15_t)0x1108,
+	(q15_t)0x811C, (q15_t)0x10D6, (q15_t)0x8116, (q15_t)0x10A4,
+	(q15_t)0x810F, (q15_t)0x1072, (q15_t)0x8109, (q15_t)0x1040,
+	(q15_t)0x8102, (q15_t)0x100E, (q15_t)0x80FC, (q15_t)0x0FDD,
+	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80F0, (q15_t)0x0F79,
+	(q15_t)0x80EA, (q15_t)0x0F47, (q15_t)0x80E4, (q15_t)0x0F15,
+	(q15_t)0x80DE, (q15_t)0x0EE3, (q15_t)0x80D8, (q15_t)0x0EB1,
+	(q15_t)0x80D2, (q15_t)0x0E7F, (q15_t)0x80CD, (q15_t)0x0E4D,
+	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80C2, (q15_t)0x0DE9,
+	(q15_t)0x80BC, (q15_t)0x0DB7, (q15_t)0x80B7, (q15_t)0x0D85,
+	(q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x80AC, (q15_t)0x0D21,
+	(q15_t)0x80A7, (q15_t)0x0CEF, (q15_t)0x80A2, (q15_t)0x0CBD,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8098, (q15_t)0x0C59,
+	(q15_t)0x8094, (q15_t)0x0C27, (q15_t)0x808F, (q15_t)0x0BF5,
+	(q15_t)0x808A, (q15_t)0x0BC3, (q15_t)0x8086, (q15_t)0x0B91,
+	(q15_t)0x8081, (q15_t)0x0B5F, (q15_t)0x807D, (q15_t)0x0B2D,
+	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8074, (q15_t)0x0AC9,
+	(q15_t)0x8070, (q15_t)0x0A97, (q15_t)0x806C, (q15_t)0x0A65,
+	(q15_t)0x8068, (q15_t)0x0A33, (q15_t)0x8064, (q15_t)0x0A00,
+	(q15_t)0x8060, (q15_t)0x09CE, (q15_t)0x805C, (q15_t)0x099C,
+	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8055, (q15_t)0x0938,
+	(q15_t)0x8051, (q15_t)0x0906, (q15_t)0x804E, (q15_t)0x08D4,
+	(q15_t)0x804A, (q15_t)0x08A2, (q15_t)0x8047, (q15_t)0x086F,
+	(q15_t)0x8043, (q15_t)0x083D, (q15_t)0x8040, (q15_t)0x080B,
+	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x803A, (q15_t)0x07A7,
+	(q15_t)0x8037, (q15_t)0x0775, (q15_t)0x8034, (q15_t)0x0742,
+	(q15_t)0x8031, (q15_t)0x0710, (q15_t)0x802F, (q15_t)0x06DE,
+	(q15_t)0x802C, (q15_t)0x06AC, (q15_t)0x8029, (q15_t)0x067A,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8025, (q15_t)0x0615,
+	(q15_t)0x8022, (q15_t)0x05E3, (q15_t)0x8020, (q15_t)0x05B1,
+	(q15_t)0x801E, (q15_t)0x057F, (q15_t)0x801C, (q15_t)0x054C,
+	(q15_t)0x801A, (q15_t)0x051A, (q15_t)0x8018, (q15_t)0x04E8,
+	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x8014, (q15_t)0x0483,
+	(q15_t)0x8012, (q15_t)0x0451, (q15_t)0x8011, (q15_t)0x041F,
+	(q15_t)0x800F, (q15_t)0x03ED, (q15_t)0x800D, (q15_t)0x03BA,
+	(q15_t)0x800C, (q15_t)0x0388, (q15_t)0x800B, (q15_t)0x0356,
+	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8008, (q15_t)0x02F1,
+	(q15_t)0x8007, (q15_t)0x02BF, (q15_t)0x8006, (q15_t)0x028D,
+	(q15_t)0x8005, (q15_t)0x025B, (q15_t)0x8004, (q15_t)0x0228,
+	(q15_t)0x8003, (q15_t)0x01F6, (q15_t)0x8003, (q15_t)0x01C4,
+	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8001, (q15_t)0x015F,
+	(q15_t)0x8001, (q15_t)0x012D, (q15_t)0x8000, (q15_t)0x00FB,
+	(q15_t)0x8000, (q15_t)0x00C9, (q15_t)0x8000, (q15_t)0x0096,
+	(q15_t)0x8000, (q15_t)0x0064, (q15_t)0x8000, (q15_t)0x0032,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFFCD,
+	(q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFF69,
+	(q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF04,
+	(q15_t)0x8001, (q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFEA0,
+	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8003, (q15_t)0xFE3B,
+	(q15_t)0x8003, (q15_t)0xFE09, (q15_t)0x8004, (q15_t)0xFDD7,
+	(q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8006, (q15_t)0xFD72,
+	(q15_t)0x8007, (q15_t)0xFD40, (q15_t)0x8008, (q15_t)0xFD0E,
+	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800B, (q15_t)0xFCA9,
+	(q15_t)0x800C, (q15_t)0xFC77, (q15_t)0x800D, (q15_t)0xFC45,
+	(q15_t)0x800F, (q15_t)0xFC12, (q15_t)0x8011, (q15_t)0xFBE0,
+	(q15_t)0x8012, (q15_t)0xFBAE, (q15_t)0x8014, (q15_t)0xFB7C,
+	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x8018, (q15_t)0xFB17,
+	(q15_t)0x801A, (q15_t)0xFAE5, (q15_t)0x801C, (q15_t)0xFAB3,
+	(q15_t)0x801E, (q15_t)0xFA80, (q15_t)0x8020, (q15_t)0xFA4E,
+	(q15_t)0x8022, (q15_t)0xFA1C, (q15_t)0x8025, (q15_t)0xF9EA,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8029, (q15_t)0xF985,
+	(q15_t)0x802C, (q15_t)0xF953, (q15_t)0x802F, (q15_t)0xF921,
+	(q15_t)0x8031, (q15_t)0xF8EF, (q15_t)0x8034, (q15_t)0xF8BD,
+	(q15_t)0x8037, (q15_t)0xF88A, (q15_t)0x803A, (q15_t)0xF858,
+	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x8040, (q15_t)0xF7F4,
+	(q15_t)0x8043, (q15_t)0xF7C2, (q15_t)0x8047, (q15_t)0xF790,
+	(q15_t)0x804A, (q15_t)0xF75D, (q15_t)0x804E, (q15_t)0xF72B,
+	(q15_t)0x8051, (q15_t)0xF6F9, (q15_t)0x8055, (q15_t)0xF6C7,
+	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x805C, (q15_t)0xF663,
+	(q15_t)0x8060, (q15_t)0xF631, (q15_t)0x8064, (q15_t)0xF5FF,
+	(q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x806C, (q15_t)0xF59A,
+	(q15_t)0x8070, (q15_t)0xF568, (q15_t)0x8074, (q15_t)0xF536,
+	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x807D, (q15_t)0xF4D2,
+	(q15_t)0x8081, (q15_t)0xF4A0, (q15_t)0x8086, (q15_t)0xF46E,
+	(q15_t)0x808A, (q15_t)0xF43C, (q15_t)0x808F, (q15_t)0xF40A,
+	(q15_t)0x8094, (q15_t)0xF3D8, (q15_t)0x8098, (q15_t)0xF3A6,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80A2, (q15_t)0xF342,
+	(q15_t)0x80A7, (q15_t)0xF310, (q15_t)0x80AC, (q15_t)0xF2DE,
+	(q15_t)0x80B2, (q15_t)0xF2AC, (q15_t)0x80B7, (q15_t)0xF27A,
+	(q15_t)0x80BC, (q15_t)0xF248, (q15_t)0x80C2, (q15_t)0xF216,
+	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80CD, (q15_t)0xF1B2,
+	(q15_t)0x80D2, (q15_t)0xF180, (q15_t)0x80D8, (q15_t)0xF14E,
+	(q15_t)0x80DE, (q15_t)0xF11C, (q15_t)0x80E4, (q15_t)0xF0EA,
+	(q15_t)0x80EA, (q15_t)0xF0B8, (q15_t)0x80F0, (q15_t)0xF086,
+	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x80FC, (q15_t)0xF022,
+	(q15_t)0x8102, (q15_t)0xEFF1, (q15_t)0x8109, (q15_t)0xEFBF,
+	(q15_t)0x810F, (q15_t)0xEF8D, (q15_t)0x8116, (q15_t)0xEF5B,
+	(q15_t)0x811C, (q15_t)0xEF29, (q15_t)0x8123, (q15_t)0xEEF7,
+	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8130, (q15_t)0xEE94,
+	(q15_t)0x8137, (q15_t)0xEE62, (q15_t)0x813E, (q15_t)0xEE30,
+	(q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x814C, (q15_t)0xEDCD,
+	(q15_t)0x8154, (q15_t)0xED9B, (q15_t)0x815B, (q15_t)0xED69,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x816A, (q15_t)0xED06,
+	(q15_t)0x8171, (q15_t)0xECD4, (q15_t)0x8179, (q15_t)0xECA2,
+	(q15_t)0x8180, (q15_t)0xEC71, (q15_t)0x8188, (q15_t)0xEC3F,
+	(q15_t)0x8190, (q15_t)0xEC0D, (q15_t)0x8198, (q15_t)0xEBDC,
+	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81A8, (q15_t)0xEB78,
+	(q15_t)0x81B0, (q15_t)0xEB47, (q15_t)0x81B8, (q15_t)0xEB15,
+	(q15_t)0x81C0, (q15_t)0xEAE4, (q15_t)0x81C8, (q15_t)0xEAB2,
+	(q15_t)0x81D1, (q15_t)0xEA80, (q15_t)0x81D9, (q15_t)0xEA4F,
+	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x81EB, (q15_t)0xE9EC,
+	(q15_t)0x81F3, (q15_t)0xE9BA, (q15_t)0x81FC, (q15_t)0xE989,
+	(q15_t)0x8205, (q15_t)0xE957, (q15_t)0x820E, (q15_t)0xE926,
+	(q15_t)0x8217, (q15_t)0xE8F5, (q15_t)0x8220, (q15_t)0xE8C3,
+	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x8232, (q15_t)0xE860,
+	(q15_t)0x823C, (q15_t)0xE82F, (q15_t)0x8245, (q15_t)0xE7FD,
+	(q15_t)0x824F, (q15_t)0xE7CC, (q15_t)0x8258, (q15_t)0xE79B,
+	(q15_t)0x8262, (q15_t)0xE769, (q15_t)0x826B, (q15_t)0xE738,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x827F, (q15_t)0xE6D5,
+	(q15_t)0x8289, (q15_t)0xE6A4, (q15_t)0x8293, (q15_t)0xE673,
+	(q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82A7, (q15_t)0xE610,
+	(q15_t)0x82B1, (q15_t)0xE5DF, (q15_t)0x82BC, (q15_t)0xE5AE,
+	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82D0, (q15_t)0xE54C,
+	(q15_t)0x82DB, (q15_t)0xE51B, (q15_t)0x82E6, (q15_t)0xE4E9,
+	(q15_t)0x82F0, (q15_t)0xE4B8, (q15_t)0x82FB, (q15_t)0xE487,
+	(q15_t)0x8306, (q15_t)0xE456, (q15_t)0x8311, (q15_t)0xE425,
+	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8327, (q15_t)0xE3C3,
+	(q15_t)0x8332, (q15_t)0xE392, (q15_t)0x833D, (q15_t)0xE361,
+	(q15_t)0x8348, (q15_t)0xE330, (q15_t)0x8354, (q15_t)0xE2FF,
+	(q15_t)0x835F, (q15_t)0xE2CE, (q15_t)0x836B, (q15_t)0xE29D,
+	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x8382, (q15_t)0xE23B,
+	(q15_t)0x838E, (q15_t)0xE20A, (q15_t)0x8399, (q15_t)0xE1DA,
+	(q15_t)0x83A5, (q15_t)0xE1A9, (q15_t)0x83B1, (q15_t)0xE178,
+	(q15_t)0x83BD, (q15_t)0xE147, (q15_t)0x83C9, (q15_t)0xE116,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x83E2, (q15_t)0xE0B5,
+	(q15_t)0x83EE, (q15_t)0xE084, (q15_t)0x83FA, (q15_t)0xE053,
+	(q15_t)0x8407, (q15_t)0xE023, (q15_t)0x8414, (q15_t)0xDFF2,
+	(q15_t)0x8420, (q15_t)0xDFC1, (q15_t)0x842D, (q15_t)0xDF91,
+	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x8446, (q15_t)0xDF2F,
+	(q15_t)0x8453, (q15_t)0xDEFF, (q15_t)0x8460, (q15_t)0xDECE,
+	(q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x847B, (q15_t)0xDE6D,
+	(q15_t)0x8488, (q15_t)0xDE3D, (q15_t)0x8495, (q15_t)0xDE0C,
+	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84B0, (q15_t)0xDDAB,
+	(q15_t)0x84BD, (q15_t)0xDD7B, (q15_t)0x84CB, (q15_t)0xDD4B,
+	(q15_t)0x84D9, (q15_t)0xDD1A, (q15_t)0x84E6, (q15_t)0xDCEA,
+	(q15_t)0x84F4, (q15_t)0xDCBA, (q15_t)0x8502, (q15_t)0xDC89,
+	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x851E, (q15_t)0xDC29,
+	(q15_t)0x852C, (q15_t)0xDBF8, (q15_t)0x853A, (q15_t)0xDBC8,
+	(q15_t)0x8549, (q15_t)0xDB98, (q15_t)0x8557, (q15_t)0xDB68,
+	(q15_t)0x8565, (q15_t)0xDB38, (q15_t)0x8574, (q15_t)0xDB08,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8591, (q15_t)0xDAA7,
+	(q15_t)0x85A0, (q15_t)0xDA77, (q15_t)0x85AF, (q15_t)0xDA47,
+	(q15_t)0x85BD, (q15_t)0xDA17, (q15_t)0x85CC, (q15_t)0xD9E7,
+	(q15_t)0x85DB, (q15_t)0xD9B7, (q15_t)0x85EA, (q15_t)0xD987,
+	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8609, (q15_t)0xD927,
+	(q15_t)0x8618, (q15_t)0xD8F8, (q15_t)0x8627, (q15_t)0xD8C8,
+	(q15_t)0x8637, (q15_t)0xD898, (q15_t)0x8646, (q15_t)0xD868,
+	(q15_t)0x8656, (q15_t)0xD838, (q15_t)0x8666, (q15_t)0xD809,
+	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x8685, (q15_t)0xD7A9,
+	(q15_t)0x8695, (q15_t)0xD779, (q15_t)0x86A5, (q15_t)0xD74A,
+	(q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86C5, (q15_t)0xD6EA,
+	(q15_t)0x86D5, (q15_t)0xD6BB, (q15_t)0x86E6, (q15_t)0xD68B,
+	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8706, (q15_t)0xD62C,
+	(q15_t)0x8717, (q15_t)0xD5FD, (q15_t)0x8727, (q15_t)0xD5CD,
+	(q15_t)0x8738, (q15_t)0xD59E, (q15_t)0x8749, (q15_t)0xD56E,
+	(q15_t)0x8759, (q15_t)0xD53F, (q15_t)0x876A, (q15_t)0xD510,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x878C, (q15_t)0xD4B1,
+	(q15_t)0x879D, (q15_t)0xD482, (q15_t)0x87AE, (q15_t)0xD452,
+	(q15_t)0x87BF, (q15_t)0xD423, (q15_t)0x87D1, (q15_t)0xD3F4,
+	(q15_t)0x87E2, (q15_t)0xD3C5, (q15_t)0x87F3, (q15_t)0xD396,
+	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8816, (q15_t)0xD337,
+	(q15_t)0x8828, (q15_t)0xD308, (q15_t)0x883A, (q15_t)0xD2D9,
+	(q15_t)0x884B, (q15_t)0xD2AA, (q15_t)0x885D, (q15_t)0xD27B,
+	(q15_t)0x886F, (q15_t)0xD24C, (q15_t)0x8881, (q15_t)0xD21D,
+	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88A5, (q15_t)0xD1C0,
+	(q15_t)0x88B8, (q15_t)0xD191, (q15_t)0x88CA, (q15_t)0xD162,
+	(q15_t)0x88DC, (q15_t)0xD133, (q15_t)0x88EF, (q15_t)0xD104,
+	(q15_t)0x8901, (q15_t)0xD0D6, (q15_t)0x8914, (q15_t)0xD0A7,
+	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x8939, (q15_t)0xD04A,
+	(q15_t)0x894C, (q15_t)0xD01B, (q15_t)0x895F, (q15_t)0xCFEC,
+	(q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x8984, (q15_t)0xCF8F,
+	(q15_t)0x8997, (q15_t)0xCF61, (q15_t)0x89AB, (q15_t)0xCF32,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x89D1, (q15_t)0xCED5,
+	(q15_t)0x89E4, (q15_t)0xCEA7, (q15_t)0x89F8, (q15_t)0xCE79,
+	(q15_t)0x8A0B, (q15_t)0xCE4A, (q15_t)0x8A1F, (q15_t)0xCE1C,
+	(q15_t)0x8A33, (q15_t)0xCDEE, (q15_t)0x8A46, (q15_t)0xCDBF,
+	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8A6E, (q15_t)0xCD63,
+	(q15_t)0x8A82, (q15_t)0xCD35, (q15_t)0x8A96, (q15_t)0xCD07,
+	(q15_t)0x8AAA, (q15_t)0xCCD9, (q15_t)0x8ABE, (q15_t)0xCCAB,
+	(q15_t)0x8AD2, (q15_t)0xCC7D, (q15_t)0x8AE6, (q15_t)0xCC4F,
+	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B0F, (q15_t)0xCBF3,
+	(q15_t)0x8B24, (q15_t)0xCBC5, (q15_t)0x8B38, (q15_t)0xCB97,
+	(q15_t)0x8B4D, (q15_t)0xCB69, (q15_t)0x8B61, (q15_t)0xCB3B,
+	(q15_t)0x8B76, (q15_t)0xCB0D, (q15_t)0x8B8B, (q15_t)0xCAE0,
+	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BB5, (q15_t)0xCA84,
+	(q15_t)0x8BCA, (q15_t)0xCA57, (q15_t)0x8BDF, (q15_t)0xCA29,
+	(q15_t)0x8BF4, (q15_t)0xC9FB, (q15_t)0x8C09, (q15_t)0xC9CE,
+	(q15_t)0x8C1F, (q15_t)0xC9A0, (q15_t)0x8C34, (q15_t)0xC973,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8C5F, (q15_t)0xC918,
+	(q15_t)0x8C75, (q15_t)0xC8EB, (q15_t)0x8C8A, (q15_t)0xC8BD,
+	(q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CB6, (q15_t)0xC863,
+	(q15_t)0x8CCC, (q15_t)0xC835, (q15_t)0x8CE2, (q15_t)0xC808,
+	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D0E, (q15_t)0xC7AE,
+	(q15_t)0x8D24, (q15_t)0xC781, (q15_t)0x8D3A, (q15_t)0xC754,
+	(q15_t)0x8D50, (q15_t)0xC727, (q15_t)0x8D67, (q15_t)0xC6F9,
+	(q15_t)0x8D7D, (q15_t)0xC6CD, (q15_t)0x8D94, (q15_t)0xC6A0,
+	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8DC1, (q15_t)0xC646,
+	(q15_t)0x8DD8, (q15_t)0xC619, (q15_t)0x8DEE, (q15_t)0xC5EC,
+	(q15_t)0x8E05, (q15_t)0xC5BF, (q15_t)0x8E1C, (q15_t)0xC593,
+	(q15_t)0x8E33, (q15_t)0xC566, (q15_t)0x8E4A, (q15_t)0xC539,
+	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8E79, (q15_t)0xC4E0,
+	(q15_t)0x8E90, (q15_t)0xC4B3, (q15_t)0x8EA7, (q15_t)0xC487,
+	(q15_t)0x8EBE, (q15_t)0xC45A, (q15_t)0x8ED6, (q15_t)0xC42E,
+	(q15_t)0x8EED, (q15_t)0xC402, (q15_t)0x8F05, (q15_t)0xC3D5,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F34, (q15_t)0xC37C,
+	(q15_t)0x8F4C, (q15_t)0xC350, (q15_t)0x8F64, (q15_t)0xC324,
+	(q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8F94, (q15_t)0xC2CC,
+	(q15_t)0x8FAC, (q15_t)0xC29F, (q15_t)0x8FC4, (q15_t)0xC273,
+	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x8FF5, (q15_t)0xC21B,
+	(q15_t)0x900D, (q15_t)0xC1EF, (q15_t)0x9025, (q15_t)0xC1C3,
+	(q15_t)0x903E, (q15_t)0xC197, (q15_t)0x9056, (q15_t)0xC16C,
+	(q15_t)0x906F, (q15_t)0xC140, (q15_t)0x9088, (q15_t)0xC114,
+	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x90B9, (q15_t)0xC0BC,
+	(q15_t)0x90D2, (q15_t)0xC091, (q15_t)0x90EB, (q15_t)0xC065,
+	(q15_t)0x9104, (q15_t)0xC03A, (q15_t)0x911D, (q15_t)0xC00E,
+	(q15_t)0x9136, (q15_t)0xBFE2, (q15_t)0x9150, (q15_t)0xBFB7,
+	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x9182, (q15_t)0xBF60,
+	(q15_t)0x919C, (q15_t)0xBF35, (q15_t)0x91B5, (q15_t)0xBF09,
+	(q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x91E8, (q15_t)0xBEB3,
+	(q15_t)0x9202, (q15_t)0xBE88, (q15_t)0x921C, (q15_t)0xBE5D,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x924F, (q15_t)0xBE06,
+	(q15_t)0x9269, (q15_t)0xBDDB, (q15_t)0x9283, (q15_t)0xBDB0,
+	(q15_t)0x929D, (q15_t)0xBD85, (q15_t)0x92B7, (q15_t)0xBD5A,
+	(q15_t)0x92D2, (q15_t)0xBD2F, (q15_t)0x92EC, (q15_t)0xBD05,
+	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x9321, (q15_t)0xBCAF,
+	(q15_t)0x933B, (q15_t)0xBC84, (q15_t)0x9356, (q15_t)0xBC5A,
+	(q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x938B, (q15_t)0xBC04,
+	(q15_t)0x93A6, (q15_t)0xBBDA, (q15_t)0x93C0, (q15_t)0xBBAF,
+	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x93F6, (q15_t)0xBB5A,
+	(q15_t)0x9411, (q15_t)0xBB30, (q15_t)0x942C, (q15_t)0xBB05,
+	(q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x9463, (q15_t)0xBAB1,
+	(q15_t)0x947E, (q15_t)0xBA87, (q15_t)0x9499, (q15_t)0xBA5C,
+	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x94D0, (q15_t)0xBA08,
+	(q15_t)0x94EC, (q15_t)0xB9DE, (q15_t)0x9507, (q15_t)0xB9B4,
+	(q15_t)0x9523, (q15_t)0xB98A, (q15_t)0x953E, (q15_t)0xB960,
+	(q15_t)0x955A, (q15_t)0xB936, (q15_t)0x9576, (q15_t)0xB90C,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x95AE, (q15_t)0xB8B9,
+	(q15_t)0x95CA, (q15_t)0xB88F, (q15_t)0x95E6, (q15_t)0xB865,
+	(q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x961E, (q15_t)0xB812,
+	(q15_t)0x963B, (q15_t)0xB7E9, (q15_t)0x9657, (q15_t)0xB7BF,
+	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x9690, (q15_t)0xB76C,
+	(q15_t)0x96AC, (q15_t)0xB743, (q15_t)0x96C9, (q15_t)0xB719,
+	(q15_t)0x96E6, (q15_t)0xB6F0, (q15_t)0x9702, (q15_t)0xB6C7,
+	(q15_t)0x971F, (q15_t)0xB69E, (q15_t)0x973C, (q15_t)0xB675,
+	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9776, (q15_t)0xB622,
+	(q15_t)0x9793, (q15_t)0xB5F9, (q15_t)0x97B0, (q15_t)0xB5D0,
+	(q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x97EA, (q15_t)0xB57E,
+	(q15_t)0x9808, (q15_t)0xB556, (q15_t)0x9825, (q15_t)0xB52D,
+	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x9860, (q15_t)0xB4DB,
+	(q15_t)0x987D, (q15_t)0xB4B3, (q15_t)0x989B, (q15_t)0xB48A,
+	(q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98D6, (q15_t)0xB439,
+	(q15_t)0x98F4, (q15_t)0xB410, (q15_t)0x9912, (q15_t)0xB3E8,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x994E, (q15_t)0xB397,
+	(q15_t)0x996C, (q15_t)0xB36F, (q15_t)0x998A, (q15_t)0xB347,
+	(q15_t)0x99A8, (q15_t)0xB31E, (q15_t)0x99C6, (q15_t)0xB2F6,
+	(q15_t)0x99E5, (q15_t)0xB2CE, (q15_t)0x9A03, (q15_t)0xB2A6,
+	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A40, (q15_t)0xB256,
+	(q15_t)0x9A5F, (q15_t)0xB22E, (q15_t)0x9A7D, (q15_t)0xB206,
+	(q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9ABA, (q15_t)0xB1B7,
+	(q15_t)0x9AD9, (q15_t)0xB18F, (q15_t)0x9AF8, (q15_t)0xB167,
+	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B36, (q15_t)0xB118,
+	(q15_t)0x9B55, (q15_t)0xB0F0, (q15_t)0x9B74, (q15_t)0xB0C9,
+	(q15_t)0x9B93, (q15_t)0xB0A1, (q15_t)0x9BB2, (q15_t)0xB07A,
+	(q15_t)0x9BD2, (q15_t)0xB053, (q15_t)0x9BF1, (q15_t)0xB02B,
+	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C30, (q15_t)0xAFDD,
+	(q15_t)0x9C4F, (q15_t)0xAFB6, (q15_t)0x9C6F, (q15_t)0xAF8F,
+	(q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9CAE, (q15_t)0xAF40,
+	(q15_t)0x9CCE, (q15_t)0xAF1A, (q15_t)0x9CEE, (q15_t)0xAEF3,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D2D, (q15_t)0xAEA5,
+	(q15_t)0x9D4D, (q15_t)0xAE7E, (q15_t)0x9D6D, (q15_t)0xAE57,
+	(q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DAE, (q15_t)0xAE0A,
+	(q15_t)0x9DCE, (q15_t)0xADE3, (q15_t)0x9DEE, (q15_t)0xADBD,
+	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E2F, (q15_t)0xAD70,
+	(q15_t)0x9E4F, (q15_t)0xAD4A, (q15_t)0x9E70, (q15_t)0xAD23,
+	(q15_t)0x9E90, (q15_t)0xACFD, (q15_t)0x9EB1, (q15_t)0xACD7,
+	(q15_t)0x9ED2, (q15_t)0xACB1, (q15_t)0x9EF2, (q15_t)0xAC8A,
+	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F34, (q15_t)0xAC3E,
+	(q15_t)0x9F55, (q15_t)0xAC18, (q15_t)0x9F76, (q15_t)0xABF2,
+	(q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FB8, (q15_t)0xABA7,
+	(q15_t)0x9FD9, (q15_t)0xAB81, (q15_t)0x9FFB, (q15_t)0xAB5B,
+	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA03D, (q15_t)0xAB10,
+	(q15_t)0xA05F, (q15_t)0xAAEA, (q15_t)0xA080, (q15_t)0xAAC5,
+	(q15_t)0xA0A1, (q15_t)0xAA9F, (q15_t)0xA0C3, (q15_t)0xAA7A,
+	(q15_t)0xA0E5, (q15_t)0xAA54, (q15_t)0xA106, (q15_t)0xAA2F,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA14A, (q15_t)0xA9E5,
+	(q15_t)0xA16C, (q15_t)0xA9BF, (q15_t)0xA18E, (q15_t)0xA99A,
+	(q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA1D2, (q15_t)0xA950,
+	(q15_t)0xA1F4, (q15_t)0xA92B, (q15_t)0xA216, (q15_t)0xA906,
+	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA25A, (q15_t)0xA8BD,
+	(q15_t)0xA27C, (q15_t)0xA898, (q15_t)0xA29F, (q15_t)0xA873,
+	(q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA2E4, (q15_t)0xA82A,
+	(q15_t)0xA306, (q15_t)0xA806, (q15_t)0xA329, (q15_t)0xA7E1,
+	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA36E, (q15_t)0xA798,
+	(q15_t)0xA391, (q15_t)0xA774, (q15_t)0xA3B4, (q15_t)0xA750,
+	(q15_t)0xA3D6, (q15_t)0xA72B, (q15_t)0xA3F9, (q15_t)0xA707,
+	(q15_t)0xA41C, (q15_t)0xA6E3, (q15_t)0xA43F, (q15_t)0xA6BF,
+	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA486, (q15_t)0xA677,
+	(q15_t)0xA4A9, (q15_t)0xA653, (q15_t)0xA4CC, (q15_t)0xA62F,
+	(q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA513, (q15_t)0xA5E8,
+	(q15_t)0xA536, (q15_t)0xA5C4, (q15_t)0xA55A, (q15_t)0xA5A1,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5A1, (q15_t)0xA55A,
+	(q15_t)0xA5C4, (q15_t)0xA536, (q15_t)0xA5E8, (q15_t)0xA513,
+	(q15_t)0xA60C, (q15_t)0xA4EF, (q15_t)0xA62F, (q15_t)0xA4CC,
+	(q15_t)0xA653, (q15_t)0xA4A9, (q15_t)0xA677, (q15_t)0xA486,
+	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA6BF, (q15_t)0xA43F,
+	(q15_t)0xA6E3, (q15_t)0xA41C, (q15_t)0xA707, (q15_t)0xA3F9,
+	(q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA750, (q15_t)0xA3B4,
+	(q15_t)0xA774, (q15_t)0xA391, (q15_t)0xA798, (q15_t)0xA36E,
+	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA7E1, (q15_t)0xA329,
+	(q15_t)0xA806, (q15_t)0xA306, (q15_t)0xA82A, (q15_t)0xA2E4,
+	(q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA873, (q15_t)0xA29F,
+	(q15_t)0xA898, (q15_t)0xA27C, (q15_t)0xA8BD, (q15_t)0xA25A,
+	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA906, (q15_t)0xA216,
+	(q15_t)0xA92B, (q15_t)0xA1F4, (q15_t)0xA950, (q15_t)0xA1D2,
+	(q15_t)0xA975, (q15_t)0xA1AF, (q15_t)0xA99A, (q15_t)0xA18E,
+	(q15_t)0xA9BF, (q15_t)0xA16C, (q15_t)0xA9E5, (q15_t)0xA14A,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA2F, (q15_t)0xA106,
+	(q15_t)0xAA54, (q15_t)0xA0E5, (q15_t)0xAA7A, (q15_t)0xA0C3,
+	(q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAC5, (q15_t)0xA080,
+	(q15_t)0xAAEA, (q15_t)0xA05F, (q15_t)0xAB10, (q15_t)0xA03D,
+	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB5B, (q15_t)0x9FFB,
+	(q15_t)0xAB81, (q15_t)0x9FD9, (q15_t)0xABA7, (q15_t)0x9FB8,
+	(q15_t)0xABCC, (q15_t)0x9F97, (q15_t)0xABF2, (q15_t)0x9F76,
+	(q15_t)0xAC18, (q15_t)0x9F55, (q15_t)0xAC3E, (q15_t)0x9F34,
+	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAC8A, (q15_t)0x9EF2,
+	(q15_t)0xACB1, (q15_t)0x9ED2, (q15_t)0xACD7, (q15_t)0x9EB1,
+	(q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD23, (q15_t)0x9E70,
+	(q15_t)0xAD4A, (q15_t)0x9E4F, (q15_t)0xAD70, (q15_t)0x9E2F,
+	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADBD, (q15_t)0x9DEE,
+	(q15_t)0xADE3, (q15_t)0x9DCE, (q15_t)0xAE0A, (q15_t)0x9DAE,
+	(q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE57, (q15_t)0x9D6D,
+	(q15_t)0xAE7E, (q15_t)0x9D4D, (q15_t)0xAEA5, (q15_t)0x9D2D,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAEF3, (q15_t)0x9CEE,
+	(q15_t)0xAF1A, (q15_t)0x9CCE, (q15_t)0xAF40, (q15_t)0x9CAE,
+	(q15_t)0xAF68, (q15_t)0x9C8E, (q15_t)0xAF8F, (q15_t)0x9C6F,
+	(q15_t)0xAFB6, (q15_t)0x9C4F, (q15_t)0xAFDD, (q15_t)0x9C30,
+	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB02B, (q15_t)0x9BF1,
+	(q15_t)0xB053, (q15_t)0x9BD2, (q15_t)0xB07A, (q15_t)0x9BB2,
+	(q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0C9, (q15_t)0x9B74,
+	(q15_t)0xB0F0, (q15_t)0x9B55, (q15_t)0xB118, (q15_t)0x9B36,
+	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB167, (q15_t)0x9AF8,
+	(q15_t)0xB18F, (q15_t)0x9AD9, (q15_t)0xB1B7, (q15_t)0x9ABA,
+	(q15_t)0xB1DE, (q15_t)0x9A9C, (q15_t)0xB206, (q15_t)0x9A7D,
+	(q15_t)0xB22E, (q15_t)0x9A5F, (q15_t)0xB256, (q15_t)0x9A40,
+	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB2A6, (q15_t)0x9A03,
+	(q15_t)0xB2CE, (q15_t)0x99E5, (q15_t)0xB2F6, (q15_t)0x99C6,
+	(q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB347, (q15_t)0x998A,
+	(q15_t)0xB36F, (q15_t)0x996C, (q15_t)0xB397, (q15_t)0x994E,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB3E8, (q15_t)0x9912,
+	(q15_t)0xB410, (q15_t)0x98F4, (q15_t)0xB439, (q15_t)0x98D6,
+	(q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB48A, (q15_t)0x989B,
+	(q15_t)0xB4B3, (q15_t)0x987D, (q15_t)0xB4DB, (q15_t)0x9860,
+	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB52D, (q15_t)0x9825,
+	(q15_t)0xB556, (q15_t)0x9808, (q15_t)0xB57E, (q15_t)0x97EA,
+	(q15_t)0xB5A7, (q15_t)0x97CD, (q15_t)0xB5D0, (q15_t)0x97B0,
+	(q15_t)0xB5F9, (q15_t)0x9793, (q15_t)0xB622, (q15_t)0x9776,
+	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB675, (q15_t)0x973C,
+	(q15_t)0xB69E, (q15_t)0x971F, (q15_t)0xB6C7, (q15_t)0x9702,
+	(q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB719, (q15_t)0x96C9,
+	(q15_t)0xB743, (q15_t)0x96AC, (q15_t)0xB76C, (q15_t)0x9690,
+	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7BF, (q15_t)0x9657,
+	(q15_t)0xB7E9, (q15_t)0x963B, (q15_t)0xB812, (q15_t)0x961E,
+	(q15_t)0xB83C, (q15_t)0x9602, (q15_t)0xB865, (q15_t)0x95E6,
+	(q15_t)0xB88F, (q15_t)0x95CA, (q15_t)0xB8B9, (q15_t)0x95AE,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB90C, (q15_t)0x9576,
+	(q15_t)0xB936, (q15_t)0x955A, (q15_t)0xB960, (q15_t)0x953E,
+	(q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xB9B4, (q15_t)0x9507,
+	(q15_t)0xB9DE, (q15_t)0x94EC, (q15_t)0xBA08, (q15_t)0x94D0,
+	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA5C, (q15_t)0x9499,
+	(q15_t)0xBA87, (q15_t)0x947E, (q15_t)0xBAB1, (q15_t)0x9463,
+	(q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB05, (q15_t)0x942C,
+	(q15_t)0xBB30, (q15_t)0x9411, (q15_t)0xBB5A, (q15_t)0x93F6,
+	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBBAF, (q15_t)0x93C0,
+	(q15_t)0xBBDA, (q15_t)0x93A6, (q15_t)0xBC04, (q15_t)0x938B,
+	(q15_t)0xBC2F, (q15_t)0x9370, (q15_t)0xBC5A, (q15_t)0x9356,
+	(q15_t)0xBC84, (q15_t)0x933B, (q15_t)0xBCAF, (q15_t)0x9321,
+	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD05, (q15_t)0x92EC,
+	(q15_t)0xBD2F, (q15_t)0x92D2, (q15_t)0xBD5A, (q15_t)0x92B7,
+	(q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDB0, (q15_t)0x9283,
+	(q15_t)0xBDDB, (q15_t)0x9269, (q15_t)0xBE06, (q15_t)0x924F,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE5D, (q15_t)0x921C,
+	(q15_t)0xBE88, (q15_t)0x9202, (q15_t)0xBEB3, (q15_t)0x91E8,
+	(q15_t)0xBEDE, (q15_t)0x91CF, (q15_t)0xBF09, (q15_t)0x91B5,
+	(q15_t)0xBF35, (q15_t)0x919C, (q15_t)0xBF60, (q15_t)0x9182,
+	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xBFB7, (q15_t)0x9150,
+	(q15_t)0xBFE2, (q15_t)0x9136, (q15_t)0xC00E, (q15_t)0x911D,
+	(q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC065, (q15_t)0x90EB,
+	(q15_t)0xC091, (q15_t)0x90D2, (q15_t)0xC0BC, (q15_t)0x90B9,
+	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC114, (q15_t)0x9088,
+	(q15_t)0xC140, (q15_t)0x906F, (q15_t)0xC16C, (q15_t)0x9056,
+	(q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1C3, (q15_t)0x9025,
+	(q15_t)0xC1EF, (q15_t)0x900D, (q15_t)0xC21B, (q15_t)0x8FF5,
+	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC273, (q15_t)0x8FC4,
+	(q15_t)0xC29F, (q15_t)0x8FAC, (q15_t)0xC2CC, (q15_t)0x8F94,
+	(q15_t)0xC2F8, (q15_t)0x8F7C, (q15_t)0xC324, (q15_t)0x8F64,
+	(q15_t)0xC350, (q15_t)0x8F4C, (q15_t)0xC37C, (q15_t)0x8F34,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC3D5, (q15_t)0x8F05,
+	(q15_t)0xC402, (q15_t)0x8EED, (q15_t)0xC42E, (q15_t)0x8ED6,
+	(q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC487, (q15_t)0x8EA7,
+	(q15_t)0xC4B3, (q15_t)0x8E90, (q15_t)0xC4E0, (q15_t)0x8E79,
+	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC539, (q15_t)0x8E4A,
+	(q15_t)0xC566, (q15_t)0x8E33, (q15_t)0xC593, (q15_t)0x8E1C,
+	(q15_t)0xC5BF, (q15_t)0x8E05, (q15_t)0xC5EC, (q15_t)0x8DEE,
+	(q15_t)0xC619, (q15_t)0x8DD8, (q15_t)0xC646, (q15_t)0x8DC1,
+	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC6A0, (q15_t)0x8D94,
+	(q15_t)0xC6CD, (q15_t)0x8D7D, (q15_t)0xC6F9, (q15_t)0x8D67,
+	(q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC754, (q15_t)0x8D3A,
+	(q15_t)0xC781, (q15_t)0x8D24, (q15_t)0xC7AE, (q15_t)0x8D0E,
+	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC808, (q15_t)0x8CE2,
+	(q15_t)0xC835, (q15_t)0x8CCC, (q15_t)0xC863, (q15_t)0x8CB6,
+	(q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8BD, (q15_t)0x8C8A,
+	(q15_t)0xC8EB, (q15_t)0x8C75, (q15_t)0xC918, (q15_t)0x8C5F,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC973, (q15_t)0x8C34,
+	(q15_t)0xC9A0, (q15_t)0x8C1F, (q15_t)0xC9CE, (q15_t)0x8C09,
+	(q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA29, (q15_t)0x8BDF,
+	(q15_t)0xCA57, (q15_t)0x8BCA, (q15_t)0xCA84, (q15_t)0x8BB5,
+	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCAE0, (q15_t)0x8B8B,
+	(q15_t)0xCB0D, (q15_t)0x8B76, (q15_t)0xCB3B, (q15_t)0x8B61,
+	(q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCB97, (q15_t)0x8B38,
+	(q15_t)0xCBC5, (q15_t)0x8B24, (q15_t)0xCBF3, (q15_t)0x8B0F,
+	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC4F, (q15_t)0x8AE6,
+	(q15_t)0xCC7D, (q15_t)0x8AD2, (q15_t)0xCCAB, (q15_t)0x8ABE,
+	(q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD07, (q15_t)0x8A96,
+	(q15_t)0xCD35, (q15_t)0x8A82, (q15_t)0xCD63, (q15_t)0x8A6E,
+	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDBF, (q15_t)0x8A46,
+	(q15_t)0xCDEE, (q15_t)0x8A33, (q15_t)0xCE1C, (q15_t)0x8A1F,
+	(q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCE79, (q15_t)0x89F8,
+	(q15_t)0xCEA7, (q15_t)0x89E4, (q15_t)0xCED5, (q15_t)0x89D1,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF32, (q15_t)0x89AB,
+	(q15_t)0xCF61, (q15_t)0x8997, (q15_t)0xCF8F, (q15_t)0x8984,
+	(q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xCFEC, (q15_t)0x895F,
+	(q15_t)0xD01B, (q15_t)0x894C, (q15_t)0xD04A, (q15_t)0x8939,
+	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD0A7, (q15_t)0x8914,
+	(q15_t)0xD0D6, (q15_t)0x8901, (q15_t)0xD104, (q15_t)0x88EF,
+	(q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD162, (q15_t)0x88CA,
+	(q15_t)0xD191, (q15_t)0x88B8, (q15_t)0xD1C0, (q15_t)0x88A5,
+	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD21D, (q15_t)0x8881,
+	(q15_t)0xD24C, (q15_t)0x886F, (q15_t)0xD27B, (q15_t)0x885D,
+	(q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD2D9, (q15_t)0x883A,
+	(q15_t)0xD308, (q15_t)0x8828, (q15_t)0xD337, (q15_t)0x8816,
+	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD396, (q15_t)0x87F3,
+	(q15_t)0xD3C5, (q15_t)0x87E2, (q15_t)0xD3F4, (q15_t)0x87D1,
+	(q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD452, (q15_t)0x87AE,
+	(q15_t)0xD482, (q15_t)0x879D, (q15_t)0xD4B1, (q15_t)0x878C,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD510, (q15_t)0x876A,
+	(q15_t)0xD53F, (q15_t)0x8759, (q15_t)0xD56E, (q15_t)0x8749,
+	(q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5CD, (q15_t)0x8727,
+	(q15_t)0xD5FD, (q15_t)0x8717, (q15_t)0xD62C, (q15_t)0x8706,
+	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD68B, (q15_t)0x86E6,
+	(q15_t)0xD6BB, (q15_t)0x86D5, (q15_t)0xD6EA, (q15_t)0x86C5,
+	(q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD74A, (q15_t)0x86A5,
+	(q15_t)0xD779, (q15_t)0x8695, (q15_t)0xD7A9, (q15_t)0x8685,
+	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD809, (q15_t)0x8666,
+	(q15_t)0xD838, (q15_t)0x8656, (q15_t)0xD868, (q15_t)0x8646,
+	(q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8C8, (q15_t)0x8627,
+	(q15_t)0xD8F8, (q15_t)0x8618, (q15_t)0xD927, (q15_t)0x8609,
+	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD987, (q15_t)0x85EA,
+	(q15_t)0xD9B7, (q15_t)0x85DB, (q15_t)0xD9E7, (q15_t)0x85CC,
+	(q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA47, (q15_t)0x85AF,
+	(q15_t)0xDA77, (q15_t)0x85A0, (q15_t)0xDAA7, (q15_t)0x8591,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB08, (q15_t)0x8574,
+	(q15_t)0xDB38, (q15_t)0x8565, (q15_t)0xDB68, (q15_t)0x8557,
+	(q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDBC8, (q15_t)0x853A,
+	(q15_t)0xDBF8, (q15_t)0x852C, (q15_t)0xDC29, (q15_t)0x851E,
+	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDC89, (q15_t)0x8502,
+	(q15_t)0xDCBA, (q15_t)0x84F4, (q15_t)0xDCEA, (q15_t)0x84E6,
+	(q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD4B, (q15_t)0x84CB,
+	(q15_t)0xDD7B, (q15_t)0x84BD, (q15_t)0xDDAB, (q15_t)0x84B0,
+	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE0C, (q15_t)0x8495,
+	(q15_t)0xDE3D, (q15_t)0x8488, (q15_t)0xDE6D, (q15_t)0x847B,
+	(q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDECE, (q15_t)0x8460,
+	(q15_t)0xDEFF, (q15_t)0x8453, (q15_t)0xDF2F, (q15_t)0x8446,
+	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xDF91, (q15_t)0x842D,
+	(q15_t)0xDFC1, (q15_t)0x8420, (q15_t)0xDFF2, (q15_t)0x8414,
+	(q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE053, (q15_t)0x83FA,
+	(q15_t)0xE084, (q15_t)0x83EE, (q15_t)0xE0B5, (q15_t)0x83E2,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE116, (q15_t)0x83C9,
+	(q15_t)0xE147, (q15_t)0x83BD, (q15_t)0xE178, (q15_t)0x83B1,
+	(q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE1DA, (q15_t)0x8399,
+	(q15_t)0xE20A, (q15_t)0x838E, (q15_t)0xE23B, (q15_t)0x8382,
+	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE29D, (q15_t)0x836B,
+	(q15_t)0xE2CE, (q15_t)0x835F, (q15_t)0xE2FF, (q15_t)0x8354,
+	(q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE361, (q15_t)0x833D,
+	(q15_t)0xE392, (q15_t)0x8332, (q15_t)0xE3C3, (q15_t)0x8327,
+	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE425, (q15_t)0x8311,
+	(q15_t)0xE456, (q15_t)0x8306, (q15_t)0xE487, (q15_t)0x82FB,
+	(q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE4E9, (q15_t)0x82E6,
+	(q15_t)0xE51B, (q15_t)0x82DB, (q15_t)0xE54C, (q15_t)0x82D0,
+	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5AE, (q15_t)0x82BC,
+	(q15_t)0xE5DF, (q15_t)0x82B1, (q15_t)0xE610, (q15_t)0x82A7,
+	(q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE673, (q15_t)0x8293,
+	(q15_t)0xE6A4, (q15_t)0x8289, (q15_t)0xE6D5, (q15_t)0x827F,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE738, (q15_t)0x826B,
+	(q15_t)0xE769, (q15_t)0x8262, (q15_t)0xE79B, (q15_t)0x8258,
+	(q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE7FD, (q15_t)0x8245,
+	(q15_t)0xE82F, (q15_t)0x823C, (q15_t)0xE860, (q15_t)0x8232,
+	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8C3, (q15_t)0x8220,
+	(q15_t)0xE8F5, (q15_t)0x8217, (q15_t)0xE926, (q15_t)0x820E,
+	(q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE989, (q15_t)0x81FC,
+	(q15_t)0xE9BA, (q15_t)0x81F3, (q15_t)0xE9EC, (q15_t)0x81EB,
+	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA4F, (q15_t)0x81D9,
+	(q15_t)0xEA80, (q15_t)0x81D1, (q15_t)0xEAB2, (q15_t)0x81C8,
+	(q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEB15, (q15_t)0x81B8,
+	(q15_t)0xEB47, (q15_t)0x81B0, (q15_t)0xEB78, (q15_t)0x81A8,
+	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEBDC, (q15_t)0x8198,
+	(q15_t)0xEC0D, (q15_t)0x8190, (q15_t)0xEC3F, (q15_t)0x8188,
+	(q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECA2, (q15_t)0x8179,
+	(q15_t)0xECD4, (q15_t)0x8171, (q15_t)0xED06, (q15_t)0x816A,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED69, (q15_t)0x815B,
+	(q15_t)0xED9B, (q15_t)0x8154, (q15_t)0xEDCD, (q15_t)0x814C,
+	(q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE30, (q15_t)0x813E,
+	(q15_t)0xEE62, (q15_t)0x8137, (q15_t)0xEE94, (q15_t)0x8130,
+	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEEF7, (q15_t)0x8123,
+	(q15_t)0xEF29, (q15_t)0x811C, (q15_t)0xEF5B, (q15_t)0x8116,
+	(q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFBF, (q15_t)0x8109,
+	(q15_t)0xEFF1, (q15_t)0x8102, (q15_t)0xF022, (q15_t)0x80FC,
+	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF086, (q15_t)0x80F0,
+	(q15_t)0xF0B8, (q15_t)0x80EA, (q15_t)0xF0EA, (q15_t)0x80E4,
+	(q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF14E, (q15_t)0x80D8,
+	(q15_t)0xF180, (q15_t)0x80D2, (q15_t)0xF1B2, (q15_t)0x80CD,
+	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF216, (q15_t)0x80C2,
+	(q15_t)0xF248, (q15_t)0x80BC, (q15_t)0xF27A, (q15_t)0x80B7,
+	(q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF2DE, (q15_t)0x80AC,
+	(q15_t)0xF310, (q15_t)0x80A7, (q15_t)0xF342, (q15_t)0x80A2,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3A6, (q15_t)0x8098,
+	(q15_t)0xF3D8, (q15_t)0x8094, (q15_t)0xF40A, (q15_t)0x808F,
+	(q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF46E, (q15_t)0x8086,
+	(q15_t)0xF4A0, (q15_t)0x8081, (q15_t)0xF4D2, (q15_t)0x807D,
+	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF536, (q15_t)0x8074,
+	(q15_t)0xF568, (q15_t)0x8070, (q15_t)0xF59A, (q15_t)0x806C,
+	(q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF5FF, (q15_t)0x8064,
+	(q15_t)0xF631, (q15_t)0x8060, (q15_t)0xF663, (q15_t)0x805C,
+	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF6C7, (q15_t)0x8055,
+	(q15_t)0xF6F9, (q15_t)0x8051, (q15_t)0xF72B, (q15_t)0x804E,
+	(q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF790, (q15_t)0x8047,
+	(q15_t)0xF7C2, (q15_t)0x8043, (q15_t)0xF7F4, (q15_t)0x8040,
+	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF858, (q15_t)0x803A,
+	(q15_t)0xF88A, (q15_t)0x8037, (q15_t)0xF8BD, (q15_t)0x8034,
+	(q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF921, (q15_t)0x802F,
+	(q15_t)0xF953, (q15_t)0x802C, (q15_t)0xF985, (q15_t)0x8029,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xF9EA, (q15_t)0x8025,
+	(q15_t)0xFA1C, (q15_t)0x8022, (q15_t)0xFA4E, (q15_t)0x8020,
+	(q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFAB3, (q15_t)0x801C,
+	(q15_t)0xFAE5, (q15_t)0x801A, (q15_t)0xFB17, (q15_t)0x8018,
+	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFB7C, (q15_t)0x8014,
+	(q15_t)0xFBAE, (q15_t)0x8012, (q15_t)0xFBE0, (q15_t)0x8011,
+	(q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC45, (q15_t)0x800D,
+	(q15_t)0xFC77, (q15_t)0x800C, (q15_t)0xFCA9, (q15_t)0x800B,
+	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD0E, (q15_t)0x8008,
+	(q15_t)0xFD40, (q15_t)0x8007, (q15_t)0xFD72, (q15_t)0x8006,
+	(q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFDD7, (q15_t)0x8004,
+	(q15_t)0xFE09, (q15_t)0x8003, (q15_t)0xFE3B, (q15_t)0x8003,
+	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFEA0, (q15_t)0x8001,
+	(q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFF04, (q15_t)0x8000,
+	(q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF69, (q15_t)0x8000,
+	(q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFFCD, (q15_t)0x8000
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+/**
+  @} end of CFFT_CIFFT group
+*/
+
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
+
+const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH] =
+{
+   /* 8x2, size 20 */
+   8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
+
+const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH] =
+{
+   /* 8x4, size 48 */
+   8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208,
+   80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208,
+   152,224, 176,208, 184,232, 216,240, 200,224, 232,240
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
+
+const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH] =
+{
+   /* radix 8, size 56 */
+   8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200,
+   96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400,
+   184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480,
+   368,424, 376,488, 440,496
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
+
+const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] =
+{
+   /* 8x2, size 208 */
+   8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768,
+   80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520,
+   144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776,
+   208,328, 216,840, 224,392, 232,904, 240,456, 248,968, 264,528, 272,320,
+   280,592, 288,768, 296,656, 304,328, 312,720, 328,784, 344,848, 352,400,
+   360,912, 368,464, 376,976, 384,576, 392,536, 400,832, 408,600, 416,584,
+   424,664, 432,840, 440,728, 448,592, 456,792, 464,848, 472,856, 480,600,
+   488,920, 496,856, 504,984, 520,544, 528,576, 536,608, 552,672, 560,608,
+   568,736, 576,768, 584,800, 592,832, 600,864, 608,800, 616,928, 624,864,
+   632,992, 648,672, 656,896, 664,928, 688,904, 696,744, 704,896, 712,808,
+   720,912, 728,872, 736,928, 744,936, 752,920, 760,1000, 776,800, 784,832,
+   792,864, 808,904, 816,864, 824,920, 840,864, 856,880, 872,944, 888,1008,
+   904,928, 912,960, 920,992, 944,968, 952,1000, 968,992, 984,1008
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
+
+const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] =
+{
+   /* 8x4, size 440 */
+   8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640,
+   80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768,
+   144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384,
+   200,896, 208,1408, 216,1920, 224,448, 232,960, 240,1472, 248,1984,
+   256,512, 264,520, 272,1032, 280,1544, 288,640, 296,584, 304,1096, 312,1608,
+   320,768, 328,648, 336,1160, 344,1672, 352,896, 360,712, 368,1224, 376,1736,
+   384,520, 392,776, 400,1288, 408,1800, 416,648, 424,840, 432,1352, 440,1864,
+   448,776, 456,904, 464,1416, 472,1928, 480,904, 488,968, 496,1480, 504,1992,
+   520,528, 512,1024, 528,1040, 536,1552, 544,1152, 552,592, 560,1104,
+   568,1616, 576,1280, 584,656, 592,1168, 600,1680, 608,1408, 616,720,
+   624,1232, 632,1744, 640,1032, 648,784, 656,1296, 664,1808, 672,1160,
+   680,848, 688,1360, 696,1872, 704,1288, 712,912, 720,1424, 728,1936,
+   736,1416, 744,976, 752,1488, 760,2000, 768,1536, 776,1552, 784,1048,
+   792,1560, 800,1664, 808,1680, 816,1112, 824,1624, 832,1792, 840,1808,
+   848,1176, 856,1688, 864,1920, 872,1936, 880,1240, 888,1752, 896,1544,
+   904,1560, 912,1304, 920,1816, 928,1672, 936,1688, 944,1368, 952,1880,
+   960,1800, 968,1816, 976,1432, 984,1944, 992,1928, 1000,1944, 1008,1496,
+   1016,2008, 1032,1152, 1040,1056, 1048,1568, 1064,1408, 1072,1120,
+   1080,1632, 1088,1536, 1096,1160, 1104,1184, 1112,1696, 1120,1552,
+   1128,1416, 1136,1248, 1144,1760, 1160,1664, 1168,1312, 1176,1824,
+   1184,1544, 1192,1920, 1200,1376, 1208,1888, 1216,1568, 1224,1672,
+   1232,1440, 1240,1952, 1248,1560, 1256,1928, 1264,1504, 1272,2016,
+   1288,1312, 1296,1408, 1304,1576, 1320,1424, 1328,1416, 1336,1640,
+   1344,1792, 1352,1824, 1360,1920, 1368,1704, 1376,1800, 1384,1432,
+   1392,1928, 1400,1768, 1416,1680, 1432,1832, 1440,1576, 1448,1936,
+   1456,1832, 1464,1896, 1472,1808, 1480,1688, 1488,1936, 1496,1960,
+   1504,1816, 1512,1944, 1520,1944, 1528,2024, 1560,1584, 1592,1648,
+   1600,1792, 1608,1920, 1616,1800, 1624,1712, 1632,1808, 1640,1936,
+   1648,1816, 1656,1776, 1672,1696, 1688,1840, 1704,1952, 1712,1928,
+   1720,1904, 1728,1824, 1736,1952, 1744,1832, 1752,1968, 1760,1840,
+   1768,1960, 1776,1944, 1784,2032, 1864,1872, 1848,1944, 1872,1888,
+   1880,1904, 1888,1984, 1896,2000, 1912,2032, 1904,2016, 1976,2032,
+   1960,1968, 2008,2032, 1992,2016, 2024,2032
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
+
+const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] =
+{
+   /* radix 8, size 448 */
+   8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576,
+   80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152,
+   152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216,
+   216,1728, 224,2240, 232,2752, 240,3264, 248,3776, 264,768, 272,1280,
+   280,1792, 288,2304, 296,2816, 304,3328, 312,3840, 328,832, 336,1344,
+   344,1856, 352,2368, 360,2880, 368,3392, 376,3904, 392,896, 400,1408,
+   408,1920, 416,2432, 424,2944, 432,3456, 440,3968, 456,960, 464,1472,
+   472,1984, 480,2496, 488,3008, 496,3520, 504,4032, 528,1032, 536,1544,
+   544,2056, 552,2568, 560,3080, 568,3592, 592,1096, 600,1608, 608,2120,
+   616,2632, 624,3144, 632,3656, 656,1160, 664,1672, 672,2184, 680,2696,
+   688,3208, 696,3720, 720,1224, 728,1736, 736,2248, 744,2760, 752,3272,
+   760,3784, 784,1288, 792,1800, 800,2312, 808,2824, 816,3336, 824,3848,
+   848,1352, 856,1864, 864,2376, 872,2888, 880,3400, 888,3912, 912,1416,
+   920,1928, 928,2440, 936,2952, 944,3464, 952,3976, 976,1480, 984,1992,
+   992,2504, 1000,3016, 1008,3528, 1016,4040, 1048,1552, 1056,2064, 1064,2576,
+   1072,3088, 1080,3600, 1112,1616, 1120,2128, 1128,2640, 1136,3152,
+   1144,3664, 1176,1680, 1184,2192, 1192,2704, 1200,3216, 1208,3728,
+   1240,1744, 1248,2256, 1256,2768, 1264,3280, 1272,3792, 1304,1808,
+   1312,2320, 1320,2832, 1328,3344, 1336,3856, 1368,1872, 1376,2384,
+   1384,2896, 1392,3408, 1400,3920, 1432,1936, 1440,2448, 1448,2960,
+   1456,3472, 1464,3984, 1496,2000, 1504,2512, 1512,3024, 1520,3536,
+   1528,4048, 1568,2072, 1576,2584, 1584,3096, 1592,3608, 1632,2136,
+   1640,2648, 1648,3160, 1656,3672, 1696,2200, 1704,2712, 1712,3224,
+   1720,3736, 1760,2264, 1768,2776, 1776,3288, 1784,3800, 1824,2328,
+   1832,2840, 1840,3352, 1848,3864, 1888,2392, 1896,2904, 1904,3416,
+   1912,3928, 1952,2456, 1960,2968, 1968,3480, 1976,3992, 2016,2520,
+   2024,3032, 2032,3544, 2040,4056, 2088,2592, 2096,3104, 2104,3616,
+   2152,2656, 2160,3168, 2168,3680, 2216,2720, 2224,3232, 2232,3744,
+   2280,2784, 2288,3296, 2296,3808, 2344,2848, 2352,3360, 2360,3872,
+   2408,2912, 2416,3424, 2424,3936, 2472,2976, 2480,3488, 2488,4000,
+   2536,3040, 2544,3552, 2552,4064, 2608,3112, 2616,3624, 2672,3176,
+   2680,3688, 2736,3240, 2744,3752, 2800,3304, 2808,3816, 2864,3368,
+   2872,3880, 2928,3432, 2936,3944, 2992,3496, 3000,4008, 3056,3560,
+   3064,4072, 3128,3632, 3192,3696, 3256,3760, 3320,3824, 3384,3888,
+   3448,3952, 3512,4016, 3576,4080
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
+
+const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH] =
+{
+   /* 8x2, size 1800 */
+   8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048,
+   72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048,
+   136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696,
+   192,2112, 200,6208, 208,2624, 216,6720, 224,3136, 232,7232, 240,3648,
+   248,7744, 256,2048, 264,4224, 272,640, 280,4736, 288,1152, 296,5248,
+   304,1664, 312,5760, 320,2176, 328,6272, 336,2688, 344,6784, 352,3200,
+   360,7296, 368,3712, 376,7808, 384,2112, 392,4288, 400,704, 408,4800,
+   416,1216, 424,5312, 432,1728, 440,5824, 448,2240, 456,6336, 464,2752,
+   472,6848, 480,3264, 488,7360, 496,3776, 504,7872, 512,2048, 520,4352,
+   528,768, 536,4864, 544,1280, 552,5376, 560,1792, 568,5888, 576,2304,
+   584,6400, 592,2816, 600,6912, 608,3328, 616,7424, 624,3840, 632,7936,
+   640,2176, 648,4416, 656,832, 664,4928, 672,1344, 680,5440, 688,1856,
+   696,5952, 704,2368, 712,6464, 720,2880, 728,6976, 736,3392, 744,7488,
+   752,3904, 760,8000, 768,2112, 776,4480, 784,896, 792,4992, 800,1408,
+   808,5504, 816,1920, 824,6016, 832,2432, 840,6528, 848,2944, 856,7040,
+   864,3456, 872,7552, 880,3968, 888,8064, 896,2240, 904,4544, 912,960,
+   920,5056, 928,1472, 936,5568, 944,1984, 952,6080, 960,2496, 968,6592,
+   976,3008, 984,7104, 992,3520, 1000,7616, 1008,4032, 1016,8128, 1024,4096,
+   1032,4104, 1040,4352, 1048,4616, 1056,4104, 1064,5128, 1072,1544,
+   1080,5640, 1088,2056, 1096,6152, 1104,2568, 1112,6664, 1120,3080,
+   1128,7176, 1136,3592, 1144,7688, 1152,6144, 1160,4168, 1168,6400,
+   1176,4680, 1184,6152, 1192,5192, 1200,1608, 1208,5704, 1216,2120,
+   1224,6216, 1232,2632, 1240,6728, 1248,3144, 1256,7240, 1264,3656,
+   1272,7752, 1280,4160, 1288,4232, 1296,4416, 1304,4744, 1312,4168,
+   1320,5256, 1328,1672, 1336,5768, 1344,2184, 1352,6280, 1360,2696,
+   1368,6792, 1376,3208, 1384,7304, 1392,3720, 1400,7816, 1408,6208,
+   1416,4296, 1424,6464, 1432,4808, 1440,6216, 1448,5320, 1456,1736,
+   1464,5832, 1472,2248, 1480,6344, 1488,2760, 1496,6856, 1504,3272,
+   1512,7368, 1520,3784, 1528,7880, 1536,4224, 1544,4360, 1552,4480,
+   1560,4872, 1568,4232, 1576,5384, 1584,1800, 1592,5896, 1600,2312,
+   1608,6408, 1616,2824, 1624,6920, 1632,3336, 1640,7432, 1648,3848,
+   1656,7944, 1664,6272, 1672,4424, 1680,6528, 1688,4936, 1696,6280,
+   1704,5448, 1712,1864, 1720,5960, 1728,2376, 1736,6472, 1744,2888,
+   1752,6984, 1760,3400, 1768,7496, 1776,3912, 1784,8008, 1792,4288,
+   1800,4488, 1808,4544, 1816,5000, 1824,4296, 1832,5512, 1840,1928,
+   1848,6024, 1856,2440, 1864,6536, 1872,2952, 1880,7048, 1888,3464,
+   1896,7560, 1904,3976, 1912,8072, 1920,6336, 1928,4552, 1936,6592,
+   1944,5064, 1952,6344, 1960,5576, 1968,1992, 1976,6088, 1984,2504,
+   1992,6600, 2000,3016, 2008,7112, 2016,3528, 2024,7624, 2032,4040,
+   2040,8136, 2056,4112, 2064,2112, 2072,4624, 2080,4352, 2088,5136,
+   2096,4480, 2104,5648, 2120,6160, 2128,2576, 2136,6672, 2144,3088,
+   2152,7184, 2160,3600, 2168,7696, 2176,2560, 2184,4176, 2192,2816,
+   2200,4688, 2208,2568, 2216,5200, 2224,2824, 2232,5712, 2240,2576,
+   2248,6224, 2256,2640, 2264,6736, 2272,3152, 2280,7248, 2288,3664,
+   2296,7760, 2312,4240, 2320,2432, 2328,4752, 2336,6400, 2344,5264,
+   2352,6528, 2360,5776, 2368,2816, 2376,6288, 2384,2704, 2392,6800,
+   2400,3216, 2408,7312, 2416,3728, 2424,7824, 2432,2624, 2440,4304,
+   2448,2880, 2456,4816, 2464,2632, 2472,5328, 2480,2888, 2488,5840,
+   2496,2640, 2504,6352, 2512,2768, 2520,6864, 2528,3280, 2536,7376,
+   2544,3792, 2552,7888, 2568,4368, 2584,4880, 2592,4416, 2600,5392,
+   2608,4544, 2616,5904, 2632,6416, 2640,2832, 2648,6928, 2656,3344,
+   2664,7440, 2672,3856, 2680,7952, 2696,4432, 2704,2944, 2712,4944,
+   2720,4432, 2728,5456, 2736,2952, 2744,5968, 2752,2944, 2760,6480,
+   2768,2896, 2776,6992, 2784,3408, 2792,7504, 2800,3920, 2808,8016,
+   2824,4496, 2840,5008, 2848,6464, 2856,5520, 2864,6592, 2872,6032,
+   2888,6544, 2896,2960, 2904,7056, 2912,3472, 2920,7568, 2928,3984,
+   2936,8080, 2952,4560, 2960,3008, 2968,5072, 2976,6480, 2984,5584,
+   2992,3016, 3000,6096, 3016,6608, 3032,7120, 3040,3536, 3048,7632,
+   3056,4048, 3064,8144, 3072,4608, 3080,4120, 3088,4864, 3096,4632,
+   3104,4616, 3112,5144, 3120,4872, 3128,5656, 3136,4624, 3144,6168,
+   3152,4880, 3160,6680, 3168,4632, 3176,7192, 3184,3608, 3192,7704,
+   3200,6656, 3208,4184, 3216,6912, 3224,4696, 3232,6664, 3240,5208,
+   3248,6920, 3256,5720, 3264,6672, 3272,6232, 3280,6928, 3288,6744,
+   3296,6680, 3304,7256, 3312,3672, 3320,7768, 3328,4672, 3336,4248,
+   3344,4928, 3352,4760, 3360,4680, 3368,5272, 3376,4936, 3384,5784,
+   3392,4688, 3400,6296, 3408,4944, 3416,6808, 3424,4696, 3432,7320,
+   3440,3736, 3448,7832, 3456,6720, 3464,4312, 3472,6976, 3480,4824,
+   3488,6728, 3496,5336, 3504,6984, 3512,5848, 3520,6736, 3528,6360,
+   3536,6992, 3544,6872, 3552,6744, 3560,7384, 3568,3800, 3576,7896,
+   3584,4736, 3592,4376, 3600,4992, 3608,4888, 3616,4744, 3624,5400,
+   3632,5000, 3640,5912, 3648,4752, 3656,6424, 3664,5008, 3672,6936,
+   3680,4760, 3688,7448, 3696,3864, 3704,7960, 3712,6784, 3720,4440,
+   3728,7040, 3736,4952, 3744,6792, 3752,5464, 3760,7048, 3768,5976,
+   3776,6800, 3784,6488, 3792,7056, 3800,7000, 3808,6808, 3816,7512,
+   3824,3928, 3832,8024, 3840,4800, 3848,4504, 3856,5056, 3864,5016,
+   3872,4808, 3880,5528, 3888,5064, 3896,6040, 3904,4816, 3912,6552,
+   3920,5072, 3928,7064, 3936,4824, 3944,7576, 3952,3992, 3960,8088,
+   3968,6848, 3976,4568, 3984,7104, 3992,5080, 4000,6856, 4008,5592,
+   4016,7112, 4024,6104, 4032,6864, 4040,6616, 4048,7120, 4056,7128,
+   4064,6872, 4072,7640, 4080,7128, 4088,8152, 4104,4128, 4112,4160,
+   4120,4640, 4136,5152, 4144,4232, 4152,5664, 4160,4352, 4168,6176,
+   4176,4416, 4184,6688, 4192,4616, 4200,7200, 4208,4744, 4216,7712,
+   4224,4608, 4232,4616, 4240,4672, 4248,4704, 4256,4640, 4264,5216,
+   4272,4704, 4280,5728, 4288,4864, 4296,6240, 4304,4928, 4312,6752,
+   4320,4632, 4328,7264, 4336,4760, 4344,7776, 4360,4640, 4368,4416,
+   4376,4768, 4384,6152, 4392,5280, 4400,6280, 4408,5792, 4424,6304,
+   4440,6816, 4448,6664, 4456,7328, 4464,6792, 4472,7840, 4480,4624,
+   4488,4632, 4496,4688, 4504,4832, 4512,6168, 4520,5344, 4528,6296,
+   4536,5856, 4544,4880, 4552,6368, 4560,4944, 4568,6880, 4576,6680,
+   4584,7392, 4592,6808, 4600,7904, 4608,6144, 4616,6152, 4624,6208,
+   4632,4896, 4640,6176, 4648,5408, 4656,6240, 4664,5920, 4672,6400,
+   4680,6432, 4688,6464, 4696,6944, 4704,6432, 4712,7456, 4720,4808,
+   4728,7968, 4736,6656, 4744,6664, 4752,6720, 4760,4960, 4768,6688,
+   4776,5472, 4784,6752, 4792,5984, 4800,6912, 4808,6496, 4816,6976,
+   4824,7008, 4832,6944, 4840,7520, 4848,7008, 4856,8032, 4864,6160,
+   4872,6168, 4880,6224, 4888,5024, 4896,6216, 4904,5536, 4912,6344,
+   4920,6048, 4928,6416, 4936,6560, 4944,6480, 4952,7072, 4960,6728,
+   4968,7584, 4976,6856, 4984,8096, 4992,6672, 5000,6680, 5008,6736,
+   5016,5088, 5024,6232, 5032,5600, 5040,6360, 5048,6112, 5056,6928,
+   5064,6624, 5072,6992, 5080,7136, 5088,6744, 5096,7648, 5104,6872,
+   5112,8160, 5128,5152, 5136,5376, 5144,5408, 5168,5384, 5176,5672,
+   5184,5376, 5192,6184, 5200,5392, 5208,6696, 5216,5408, 5224,7208,
+   5232,5400, 5240,7720, 5248,7168, 5256,7200, 5264,7424, 5272,7456,
+   5280,7176, 5288,7208, 5296,7432, 5304,5736, 5312,7184, 5320,6248,
+   5328,7440, 5336,6760, 5344,7192, 5352,7272, 5360,7448, 5368,7784,
+   5384,5408, 5392,5440, 5400,5472, 5408,6184, 5416,7208, 5424,5448,
+   5432,5800, 5448,6312, 5464,6824, 5472,6696, 5480,7336, 5488,6824,
+   5496,7848, 5504,7232, 5512,7264, 5520,7488, 5528,7520, 5536,7240,
+   5544,7272, 5552,7496, 5560,5864, 5568,7248, 5576,6376, 5584,7504,
+   5592,6888, 5600,7256, 5608,7400, 5616,7512, 5624,7912, 5632,7168,
+   5640,7176, 5648,7232, 5656,7240, 5664,7200, 5672,7208, 5680,7264,
+   5688,5928, 5696,7424, 5704,6440, 5712,7488, 5720,6952, 5728,7456,
+   5736,7464, 5744,7520, 5752,7976, 5760,7296, 5768,7328, 5776,7552,
+   5784,7584, 5792,7304, 5800,7336, 5808,7560, 5816,5992, 5824,7312,
+   5832,6504, 5840,7568, 5848,7016, 5856,7320, 5864,7528, 5872,7576,
+   5880,8040, 5888,7184, 5896,7192, 5904,7248, 5912,7256, 5920,6248,
+   5928,7272, 5936,6376, 5944,6056, 5952,7440, 5960,6568, 5968,7504,
+   5976,7080, 5984,6760, 5992,7592, 6000,6888, 6008,8104, 6016,7360,
+   6024,7392, 6032,7616, 6040,7648, 6048,7368, 6056,7400, 6064,7624,
+   6072,6120, 6080,7376, 6088,6632, 6096,7632, 6104,7144, 6112,7384,
+   6120,7656, 6128,7640, 6136,8168, 6168,6240, 6192,6216, 6200,7264,
+   6232,6704, 6248,7216, 6256,6680, 6264,7728, 6272,6656, 6280,6664,
+   6288,6912, 6296,6496, 6304,6688, 6312,6696, 6320,6944, 6328,7520,
+   6336,6672, 6344,6680, 6352,6928, 6360,6768, 6368,6704, 6376,7280,
+   6384,6744, 6392,7792, 6408,6432, 6424,6752, 6440,7432, 6448,6536,
+   6456,7560, 6472,6944, 6488,6832, 6496,6920, 6504,7344, 6512,7048,
+   6520,7856, 6528,6720, 6536,6728, 6544,6976, 6552,7008, 6560,6752,
+   6568,7448, 6576,7008, 6584,7576, 6592,6736, 6600,6744, 6608,6992,
+   6616,6896, 6624,6936, 6632,7408, 6640,7064, 6648,7920, 6712,7280,
+   6744,6960, 6760,7472, 6768,6936, 6776,7984, 6800,6848, 6808,6856,
+   6832,6880, 6840,6888, 6848,7040, 6856,7048, 6864,7104, 6872,7024,
+   6880,7072, 6888,7536, 6896,7136, 6904,8048, 6952,7496, 6968,7624,
+   6984,7008, 7000,7088, 7016,7600, 7024,7112, 7032,8112, 7056,7104,
+   7064,7112, 7080,7512, 7088,7136, 7096,7640, 7128,7152, 7144,7664,
+   7160,8176, 7176,7200, 7192,7216, 7224,7272, 7240,7264, 7256,7280,
+   7288,7736, 7296,7680, 7304,7712, 7312,7936, 7320,7968, 7328,7688,
+   7336,7720, 7344,7944, 7352,7976, 7360,7696, 7368,7728, 7376,7952,
+   7384,7984, 7392,7704, 7400,7736, 7408,7960, 7416,7800, 7432,7456,
+   7448,7472, 7480,7592, 7496,7520, 7512,7536, 7528,7976, 7544,7864,
+   7552,7744, 7560,7776, 7568,8000, 7576,8032, 7584,7752, 7592,7784,
+   7600,8008, 7608,8040, 7616,7760, 7624,7792, 7632,8016, 7640,8048,
+   7648,7768, 7656,7800, 7664,8024, 7672,7928, 7688,7712, 7704,7728,
+   7752,7776, 7768,7792, 7800,7992, 7816,7840, 7824,8064, 7832,8096,
+   7856,8072, 7864,8104, 7872,8064, 7880,8072, 7888,8080, 7896,8112,
+   7904,8096, 7912,8104, 7920,8088, 7928,8056, 7944,7968, 7960,7984,
+   8008,8032, 8024,8048, 8056,8120, 8072,8096, 8080,8128, 8088,8160,
+   8112,8136, 8120,8168, 8136,8160, 8152,8176
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
+
+const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH] =
+{
+   /* 8x2, size 3808 */
+   8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024,
+   72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824,
+   128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752,
+   184,14848, 192,3072, 200,7168, 208,11264, 216,15360, 224,3584, 232,7680,
+   240,11776, 248,15872, 256,1024, 264,4160, 272,8256, 280,12352, 288,576,
+   296,4672, 304,8768, 312,12864, 320,1088, 328,5184, 336,9280, 344,13376,
+   352,1600, 360,5696, 368,9792, 376,13888, 384,2112, 392,6208, 400,10304,
+   408,14400, 416,2624, 424,6720, 432,10816, 440,14912, 448,3136, 456,7232,
+   464,11328, 472,15424, 480,3648, 488,7744, 496,11840, 504,15936, 512,2048,
+   520,4224, 528,8320, 536,12416, 544,640, 552,4736, 560,8832, 568,12928,
+   576,1152, 584,5248, 592,9344, 600,13440, 608,1664, 616,5760, 624,9856,
+   632,13952, 640,2176, 648,6272, 656,10368, 664,14464, 672,2688, 680,6784,
+   688,10880, 696,14976, 704,3200, 712,7296, 720,11392, 728,15488, 736,3712,
+   744,7808, 752,11904, 760,16000, 768,3072, 776,4288, 784,8384, 792,12480,
+   800,3200, 808,4800, 816,8896, 824,12992, 832,1216, 840,5312, 848,9408,
+   856,13504, 864,1728, 872,5824, 880,9920, 888,14016, 896,2240, 904,6336,
+   912,10432, 920,14528, 928,2752, 936,6848, 944,10944, 952,15040, 960,3264,
+   968,7360, 976,11456, 984,15552, 992,3776, 1000,7872, 1008,11968, 1016,16064,
+   1032,4352, 1040,8448, 1048,12544, 1056,3072, 1064,4864, 1072,8960,
+   1080,13056, 1088,1280, 1096,5376, 1104,9472, 1112,13568, 1120,1792,
+   1128,5888, 1136,9984, 1144,14080, 1152,2304, 1160,6400, 1168,10496,
+   1176,14592, 1184,2816, 1192,6912, 1200,11008, 1208,15104, 1216,3328,
+   1224,7424, 1232,11520, 1240,15616, 1248,3840, 1256,7936, 1264,12032,
+   1272,16128, 1288,4416, 1296,8512, 1304,12608, 1312,3328, 1320,4928,
+   1328,9024, 1336,13120, 1352,5440, 1360,9536, 1368,13632, 1376,1856,
+   1384,5952, 1392,10048, 1400,14144, 1408,2368, 1416,6464, 1424,10560,
+   1432,14656, 1440,2880, 1448,6976, 1456,11072, 1464,15168, 1472,3392,
+   1480,7488, 1488,11584, 1496,15680, 1504,3904, 1512,8000, 1520,12096,
+   1528,16192, 1536,2112, 1544,4480, 1552,8576, 1560,12672, 1568,2240,
+   1576,4992, 1584,9088, 1592,13184, 1600,2368, 1608,5504, 1616,9600,
+   1624,13696, 1632,1920, 1640,6016, 1648,10112, 1656,14208, 1664,2432,
+   1672,6528, 1680,10624, 1688,14720, 1696,2944, 1704,7040, 1712,11136,
+   1720,15232, 1728,3456, 1736,7552, 1744,11648, 1752,15744, 1760,3968,
+   1768,8064, 1776,12160, 1784,16256, 1792,3136, 1800,4544, 1808,8640,
+   1816,12736, 1824,3264, 1832,5056, 1840,9152, 1848,13248, 1856,3392,
+   1864,5568, 1872,9664, 1880,13760, 1888,1984, 1896,6080, 1904,10176,
+   1912,14272, 1920,2496, 1928,6592, 1936,10688, 1944,14784, 1952,3008,
+   1960,7104, 1968,11200, 1976,15296, 1984,3520, 1992,7616, 2000,11712,
+   2008,15808, 2016,4032, 2024,8128, 2032,12224, 2040,16320, 2048,4096,
+   2056,4104, 2064,8200, 2072,12296, 2080,4224, 2088,4616, 2096,8712,
+   2104,12808, 2112,4352, 2120,5128, 2128,9224, 2136,13320, 2144,4480,
+   2152,5640, 2160,9736, 2168,13832, 2176,4104, 2184,6152, 2192,10248,
+   2200,14344, 2208,2568, 2216,6664, 2224,10760, 2232,14856, 2240,3080,
+   2248,7176, 2256,11272, 2264,15368, 2272,3592, 2280,7688, 2288,11784,
+   2296,15880, 2304,5120, 2312,4168, 2320,8264, 2328,12360, 2336,5248,
+   2344,4680, 2352,8776, 2360,12872, 2368,5376, 2376,5192, 2384,9288,
+   2392,13384, 2400,5504, 2408,5704, 2416,9800, 2424,13896, 2432,5128,
+   2440,6216, 2448,10312, 2456,14408, 2464,2632, 2472,6728, 2480,10824,
+   2488,14920, 2496,3144, 2504,7240, 2512,11336, 2520,15432, 2528,3656,
+   2536,7752, 2544,11848, 2552,15944, 2560,6144, 2568,4232, 2576,8328,
+   2584,12424, 2592,6272, 2600,4744, 2608,8840, 2616,12936, 2624,6400,
+   2632,5256, 2640,9352, 2648,13448, 2656,6528, 2664,5768, 2672,9864,
+   2680,13960, 2688,6152, 2696,6280, 2704,10376, 2712,14472, 2720,6280,
+   2728,6792, 2736,10888, 2744,14984, 2752,3208, 2760,7304, 2768,11400,
+   2776,15496, 2784,3720, 2792,7816, 2800,11912, 2808,16008, 2816,7168,
+   2824,4296, 2832,8392, 2840,12488, 2848,7296, 2856,4808, 2864,8904,
+   2872,13000, 2880,7424, 2888,5320, 2896,9416, 2904,13512, 2912,7552,
+   2920,5832, 2928,9928, 2936,14024, 2944,7176, 2952,6344, 2960,10440,
+   2968,14536, 2976,7304, 2984,6856, 2992,10952, 3000,15048, 3008,3272,
+   3016,7368, 3024,11464, 3032,15560, 3040,3784, 3048,7880, 3056,11976,
+   3064,16072, 3072,4160, 3080,4360, 3088,8456, 3096,12552, 3104,4288,
+   3112,4872, 3120,8968, 3128,13064, 3136,4416, 3144,5384, 3152,9480,
+   3160,13576, 3168,4544, 3176,5896, 3184,9992, 3192,14088, 3200,4168,
+   3208,6408, 3216,10504, 3224,14600, 3232,4296, 3240,6920, 3248,11016,
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+   13144,13552, 13152,14672, 13160,14800, 13168,14680, 13176,14064,
+   13184,14624, 13192,14752, 13200,14632, 13208,14576, 13216,13464,
+   13224,14760, 13232,15512, 13240,15088, 13248,14688, 13256,14816,
+   13264,14696, 13272,15600, 13280,13720, 13288,14824, 13296,15768,
+   13304,16112, 13336,13360, 13368,14616, 13376,13568, 13384,13576,
+   13392,13584, 13400,13616, 13408,13600, 13416,13608, 13424,13592,
+   13432,14128, 13448,13472, 13464,14640, 13480,15520, 13488,14536,
+   13496,15152, 13504,13696, 13512,13536, 13520,13712, 13528,15664,
+   13536,13704, 13544,15584, 13552,14792, 13560,16176, 13592,13616,
+   13624,14680, 13656,13680, 13688,14192, 13704,13728, 13720,14704,
+   13736,15776, 13744,15560, 13752,15216, 13768,13792, 13784,15728,
+   13800,15840, 13808,15816, 13816,16240, 13824,15360, 13832,15488,
+   13840,15368, 13848,15496, 13856,15376, 13864,15504, 13872,15384,
+   13880,15512, 13888,15424, 13896,15552, 13904,15432, 13912,15560,
+   13920,15440, 13928,15568, 13936,15448, 13944,14256, 13952,15392,
+   13960,15520, 13968,15400, 13976,14768, 13984,15408, 13992,15528,
+   14000,14552, 14008,15280, 14016,15456, 14024,15584, 14032,15464,
+   14040,15792, 14048,15472, 14056,15592, 14064,14808, 14072,16304,
+   14080,15616, 14088,15744, 14096,15624, 14104,15752, 14112,15632,
+   14120,15760, 14128,15640, 14136,15768, 14144,15680, 14152,15808,
+   14160,15688, 14168,15816, 14176,15696, 14184,15824, 14192,15704,
+   14200,14320, 14208,15648, 14216,15776, 14224,15656, 14232,14832,
+   14240,15664, 14248,15784, 14256,15576, 14264,15344, 14272,15712,
+   14280,15840, 14288,15720, 14296,15856, 14304,15728, 14312,15848,
+   14320,15832, 14328,16368, 14392,14488, 14400,14592, 14408,14600,
+   14416,14608, 14424,14616, 14432,14624, 14440,14632, 14448,14640,
+   14456,15512, 14504,14512, 14520,14904, 14528,14720, 14536,14728,
+   14544,14736, 14552,15416, 14560,14752, 14568,14576, 14584,15928,
+   14576,14760, 14592,15360, 14600,15368, 14608,15376, 14616,15384,
+   14624,15392, 14632,15400, 14640,15408, 14648,15416, 14656,15616,
+   14664,15624, 14672,15632, 14680,15640, 14688,15648, 14696,15656,
+   14704,15664, 14712,15576, 14720,15488, 14728,15496, 14736,15504,
+   14744,15512, 14752,15520, 14760,14768, 14776,14968, 14768,15528,
+   14784,15744, 14792,15752, 14800,15760, 14808,15480, 14816,15776,
+   14824,14832, 14840,15992, 14832,15784, 14856,14864, 14864,14880,
+   14872,14896, 14880,14976, 14888,14992, 14896,15008, 14904,15024,
+   14912,15104, 14920,15120, 14928,15136, 14936,15152, 14944,15232,
+   14952,15248, 14960,15264, 14968,15280, 14984,15008, 15000,15024,
+   15016,15024, 15040,15112, 15048,15128, 15056,15144, 15064,15544,
+   15072,15240, 15080,15256, 15088,15272, 15096,16056, 15104,15872,
+   15112,15888, 15120,15904, 15128,15920, 15136,16000, 15144,16016,
+   15152,16032, 15160,16048, 15168,16128, 15176,16144, 15184,16160,
+   15192,16176, 15200,16256, 15208,16272, 15216,16288, 15224,16304,
+   15232,15880, 15240,15896, 15248,15912, 15256,15928, 15264,16008,
+   15272,16024, 15280,16040, 15288,16056, 15296,16136, 15304,16152,
+   15312,16168, 15320,15608, 15328,16264, 15336,16280, 15344,16296,
+   15352,16120, 15416,15512, 15424,15616, 15432,15624, 15440,15632,
+   15448,15640, 15456,15648, 15464,15656, 15472,15664, 15480,15768,
+   15528,15536, 15544,16048, 15552,15744, 15560,15752, 15568,15760,
+   15576,15672, 15584,15776, 15592,15600, 15600,15784, 15608,16184,
+   15672,15768, 15736,15832, 15784,15792, 15800,16304, 15848,15856,
+   15880,16000, 15864,16248, 15888,16000, 15896,16008, 15904,16000,
+   15912,16016, 15920,16008, 15928,16024, 15936,16128, 15944,16160,
+   15952,16256, 15960,16288, 15968,16136, 15976,16168, 15984,16264,
+   15992,16296, 16008,16032, 16024,16040, 16064,16144, 16040,16048,
+   16072,16176, 16080,16272, 16088,16304, 16096,16152, 16104,16184,
+   16112,16280, 16136,16256, 16120,16312, 16144,16256, 16152,16264,
+   16160,16256, 16168,16272, 16176,16264, 16184,16280, 16200,16208,
+   16208,16224, 16216,16240, 16224,16320, 16232,16336, 16240,16352,
+   16248,16368, 16264,16288, 16280,16296, 16296,16304, 16344,16368,
+   16328,16352, 16360,16368
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
+
+const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH] =
+{
+   /* radix 8, size 4032 */
+   8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512,
+   72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184,
+   128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600,
+   184,29696, 192,1536, 200,5632, 208,9728, 216,13824, 224,17920, 232,22016,
+   240,26112, 248,30208, 256,2048, 264,6144, 272,10240, 280,14336, 288,18432,
+   296,22528, 304,26624, 312,30720, 320,2560, 328,6656, 336,10752, 344,14848,
+   352,18944, 360,23040, 368,27136, 376,31232, 384,3072, 392,7168, 400,11264,
+   408,15360, 416,19456, 424,23552, 432,27648, 440,31744, 448,3584, 456,7680,
+   464,11776, 472,15872, 480,19968, 488,24064, 496,28160, 504,32256, 520,4160,
+   528,8256, 536,12352, 544,16448, 552,20544, 560,24640, 568,28736, 584,4672,
+   592,8768, 600,12864, 608,16960, 616,21056, 624,25152, 632,29248, 640,1088,
+   648,5184, 656,9280, 664,13376, 672,17472, 680,21568, 688,25664, 696,29760,
+   704,1600, 712,5696, 720,9792, 728,13888, 736,17984, 744,22080, 752,26176,
+   760,30272, 768,2112, 776,6208, 784,10304, 792,14400, 800,18496, 808,22592,
+   816,26688, 824,30784, 832,2624, 840,6720, 848,10816, 856,14912, 864,19008,
+   872,23104, 880,27200, 888,31296, 896,3136, 904,7232, 912,11328, 920,15424,
+   928,19520, 936,23616, 944,27712, 952,31808, 960,3648, 968,7744, 976,11840,
+   984,15936, 992,20032, 1000,24128, 1008,28224, 1016,32320, 1032,4224,
+   1040,8320, 1048,12416, 1056,16512, 1064,20608, 1072,24704, 1080,28800,
+   1096,4736, 1104,8832, 1112,12928, 1120,17024, 1128,21120, 1136,25216,
+   1144,29312, 1160,5248, 1168,9344, 1176,13440, 1184,17536, 1192,21632,
+   1200,25728, 1208,29824, 1216,1664, 1224,5760, 1232,9856, 1240,13952,
+   1248,18048, 1256,22144, 1264,26240, 1272,30336, 1280,2176, 1288,6272,
+   1296,10368, 1304,14464, 1312,18560, 1320,22656, 1328,26752, 1336,30848,
+   1344,2688, 1352,6784, 1360,10880, 1368,14976, 1376,19072, 1384,23168,
+   1392,27264, 1400,31360, 1408,3200, 1416,7296, 1424,11392, 1432,15488,
+   1440,19584, 1448,23680, 1456,27776, 1464,31872, 1472,3712, 1480,7808,
+   1488,11904, 1496,16000, 1504,20096, 1512,24192, 1520,28288, 1528,32384,
+   1544,4288, 1552,8384, 1560,12480, 1568,16576, 1576,20672, 1584,24768,
+   1592,28864, 1608,4800, 1616,8896, 1624,12992, 1632,17088, 1640,21184,
+   1648,25280, 1656,29376, 1672,5312, 1680,9408, 1688,13504, 1696,17600,
+   1704,21696, 1712,25792, 1720,29888, 1736,5824, 1744,9920, 1752,14016,
+   1760,18112, 1768,22208, 1776,26304, 1784,30400, 1792,2240, 1800,6336,
+   1808,10432, 1816,14528, 1824,18624, 1832,22720, 1840,26816, 1848,30912,
+   1856,2752, 1864,6848, 1872,10944, 1880,15040, 1888,19136, 1896,23232,
+   1904,27328, 1912,31424, 1920,3264, 1928,7360, 1936,11456, 1944,15552,
+   1952,19648, 1960,23744, 1968,27840, 1976,31936, 1984,3776, 1992,7872,
+   2000,11968, 2008,16064, 2016,20160, 2024,24256, 2032,28352, 2040,32448,
+   2056,4352, 2064,8448, 2072,12544, 2080,16640, 2088,20736, 2096,24832,
+   2104,28928, 2120,4864, 2128,8960, 2136,13056, 2144,17152, 2152,21248,
+   2160,25344, 2168,29440, 2184,5376, 2192,9472, 2200,13568, 2208,17664,
+   2216,21760, 2224,25856, 2232,29952, 2248,5888, 2256,9984, 2264,14080,
+   2272,18176, 2280,22272, 2288,26368, 2296,30464, 2312,6400, 2320,10496,
+   2328,14592, 2336,18688, 2344,22784, 2352,26880, 2360,30976, 2368,2816,
+   2376,6912, 2384,11008, 2392,15104, 2400,19200, 2408,23296, 2416,27392,
+   2424,31488, 2432,3328, 2440,7424, 2448,11520, 2456,15616, 2464,19712,
+   2472,23808, 2480,27904, 2488,32000, 2496,3840, 2504,7936, 2512,12032,
+   2520,16128, 2528,20224, 2536,24320, 2544,28416, 2552,32512, 2568,4416,
+   2576,8512, 2584,12608, 2592,16704, 2600,20800, 2608,24896, 2616,28992,
+   2632,4928, 2640,9024, 2648,13120, 2656,17216, 2664,21312, 2672,25408,
+   2680,29504, 2696,5440, 2704,9536, 2712,13632, 2720,17728, 2728,21824,
+   2736,25920, 2744,30016, 2760,5952, 2768,10048, 2776,14144, 2784,18240,
+   2792,22336, 2800,26432, 2808,30528, 2824,6464, 2832,10560, 2840,14656,
+   2848,18752, 2856,22848, 2864,26944, 2872,31040, 2888,6976, 2896,11072,
+   2904,15168, 2912,19264, 2920,23360, 2928,27456, 2936,31552, 2944,3392,
+   2952,7488, 2960,11584, 2968,15680, 2976,19776, 2984,23872, 2992,27968,
+   3000,32064, 3008,3904, 3016,8000, 3024,12096, 3032,16192, 3040,20288,
+   3048,24384, 3056,28480, 3064,32576, 3080,4480, 3088,8576, 3096,12672,
+   3104,16768, 3112,20864, 3120,24960, 3128,29056, 3144,4992, 3152,9088,
+   3160,13184, 3168,17280, 3176,21376, 3184,25472, 3192,29568, 3208,5504,
+   3216,9600, 3224,13696, 3232,17792, 3240,21888, 3248,25984, 3256,30080,
+   3272,6016, 3280,10112, 3288,14208, 3296,18304, 3304,22400, 3312,26496,
+   3320,30592, 3336,6528, 3344,10624, 3352,14720, 3360,18816, 3368,22912,
+   3376,27008, 3384,31104, 3400,7040, 3408,11136, 3416,15232, 3424,19328,
+   3432,23424, 3440,27520, 3448,31616, 3464,7552, 3472,11648, 3480,15744,
+   3488,19840, 3496,23936, 3504,28032, 3512,32128, 3520,3968, 3528,8064,
+   3536,12160, 3544,16256, 3552,20352, 3560,24448, 3568,28544, 3576,32640,
+   3592,4544, 3600,8640, 3608,12736, 3616,16832, 3624,20928, 3632,25024,
+   3640,29120, 3656,5056, 3664,9152, 3672,13248, 3680,17344, 3688,21440,
+   3696,25536, 3704,29632, 3720,5568, 3728,9664, 3736,13760, 3744,17856,
+   3752,21952, 3760,26048, 3768,30144, 3784,6080, 3792,10176, 3800,14272,
+   3808,18368, 3816,22464, 3824,26560, 3832,30656, 3848,6592, 3856,10688,
+   3864,14784, 3872,18880, 3880,22976, 3888,27072, 3896,31168, 3912,7104,
+   3920,11200, 3928,15296, 3936,19392, 3944,23488, 3952,27584, 3960,31680,
+   3976,7616, 3984,11712, 3992,15808, 4000,19904, 4008,24000, 4016,28096,
+   4024,32192, 4040,8128, 4048,12224, 4056,16320, 4064,20416, 4072,24512,
+   4080,28608, 4088,32704, 4112,8200, 4120,12296, 4128,16392, 4136,20488,
+   4144,24584, 4152,28680, 4168,4616, 4176,8712, 4184,12808, 4192,16904,
+   4200,21000, 4208,25096, 4216,29192, 4232,5128, 4240,9224, 4248,13320,
+   4256,17416, 4264,21512, 4272,25608, 4280,29704, 4296,5640, 4304,9736,
+   4312,13832, 4320,17928, 4328,22024, 4336,26120, 4344,30216, 4360,6152,
+   4368,10248, 4376,14344, 4384,18440, 4392,22536, 4400,26632, 4408,30728,
+   4424,6664, 4432,10760, 4440,14856, 4448,18952, 4456,23048, 4464,27144,
+   4472,31240, 4488,7176, 4496,11272, 4504,15368, 4512,19464, 4520,23560,
+   4528,27656, 4536,31752, 4552,7688, 4560,11784, 4568,15880, 4576,19976,
+   4584,24072, 4592,28168, 4600,32264, 4624,8264, 4632,12360, 4640,16456,
+   4648,20552, 4656,24648, 4664,28744, 4688,8776, 4696,12872, 4704,16968,
+   4712,21064, 4720,25160, 4728,29256, 4744,5192, 4752,9288, 4760,13384,
+   4768,17480, 4776,21576, 4784,25672, 4792,29768, 4808,5704, 4816,9800,
+   4824,13896, 4832,17992, 4840,22088, 4848,26184, 4856,30280, 4872,6216,
+   4880,10312, 4888,14408, 4896,18504, 4904,22600, 4912,26696, 4920,30792,
+   4936,6728, 4944,10824, 4952,14920, 4960,19016, 4968,23112, 4976,27208,
+   4984,31304, 5000,7240, 5008,11336, 5016,15432, 5024,19528, 5032,23624,
+   5040,27720, 5048,31816, 5064,7752, 5072,11848, 5080,15944, 5088,20040,
+   5096,24136, 5104,28232, 5112,32328, 5136,8328, 5144,12424, 5152,16520,
+   5160,20616, 5168,24712, 5176,28808, 5200,8840, 5208,12936, 5216,17032,
+   5224,21128, 5232,25224, 5240,29320, 5264,9352, 5272,13448, 5280,17544,
+   5288,21640, 5296,25736, 5304,29832, 5320,5768, 5328,9864, 5336,13960,
+   5344,18056, 5352,22152, 5360,26248, 5368,30344, 5384,6280, 5392,10376,
+   5400,14472, 5408,18568, 5416,22664, 5424,26760, 5432,30856, 5448,6792,
+   5456,10888, 5464,14984, 5472,19080, 5480,23176, 5488,27272, 5496,31368,
+   5512,7304, 5520,11400, 5528,15496, 5536,19592, 5544,23688, 5552,27784,
+   5560,31880, 5576,7816, 5584,11912, 5592,16008, 5600,20104, 5608,24200,
+   5616,28296, 5624,32392, 5648,8392, 5656,12488, 5664,16584, 5672,20680,
+   5680,24776, 5688,28872, 5712,8904, 5720,13000, 5728,17096, 5736,21192,
+   5744,25288, 5752,29384, 5776,9416, 5784,13512, 5792,17608, 5800,21704,
+   5808,25800, 5816,29896, 5840,9928, 5848,14024, 5856,18120, 5864,22216,
+   5872,26312, 5880,30408, 5896,6344, 5904,10440, 5912,14536, 5920,18632,
+   5928,22728, 5936,26824, 5944,30920, 5960,6856, 5968,10952, 5976,15048,
+   5984,19144, 5992,23240, 6000,27336, 6008,31432, 6024,7368, 6032,11464,
+   6040,15560, 6048,19656, 6056,23752, 6064,27848, 6072,31944, 6088,7880,
+   6096,11976, 6104,16072, 6112,20168, 6120,24264, 6128,28360, 6136,32456,
+   6160,8456, 6168,12552, 6176,16648, 6184,20744, 6192,24840, 6200,28936,
+   6224,8968, 6232,13064, 6240,17160, 6248,21256, 6256,25352, 6264,29448,
+   6288,9480, 6296,13576, 6304,17672, 6312,21768, 6320,25864, 6328,29960,
+   6352,9992, 6360,14088, 6368,18184, 6376,22280, 6384,26376, 6392,30472,
+   6416,10504, 6424,14600, 6432,18696, 6440,22792, 6448,26888, 6456,30984,
+   6472,6920, 6480,11016, 6488,15112, 6496,19208, 6504,23304, 6512,27400,
+   6520,31496, 6536,7432, 6544,11528, 6552,15624, 6560,19720, 6568,23816,
+   6576,27912, 6584,32008, 6600,7944, 6608,12040, 6616,16136, 6624,20232,
+   6632,24328, 6640,28424, 6648,32520, 6672,8520, 6680,12616, 6688,16712,
+   6696,20808, 6704,24904, 6712,29000, 6736,9032, 6744,13128, 6752,17224,
+   6760,21320, 6768,25416, 6776,29512, 6800,9544, 6808,13640, 6816,17736,
+   6824,21832, 6832,25928, 6840,30024, 6864,10056, 6872,14152, 6880,18248,
+   6888,22344, 6896,26440, 6904,30536, 6928,10568, 6936,14664, 6944,18760,
+   6952,22856, 6960,26952, 6968,31048, 6992,11080, 7000,15176, 7008,19272,
+   7016,23368, 7024,27464, 7032,31560, 7048,7496, 7056,11592, 7064,15688,
+   7072,19784, 7080,23880, 7088,27976, 7096,32072, 7112,8008, 7120,12104,
+   7128,16200, 7136,20296, 7144,24392, 7152,28488, 7160,32584, 7184,8584,
+   7192,12680, 7200,16776, 7208,20872, 7216,24968, 7224,29064, 7248,9096,
+   7256,13192, 7264,17288, 7272,21384, 7280,25480, 7288,29576, 7312,9608,
+   7320,13704, 7328,17800, 7336,21896, 7344,25992, 7352,30088, 7376,10120,
+   7384,14216, 7392,18312, 7400,22408, 7408,26504, 7416,30600, 7440,10632,
+   7448,14728, 7456,18824, 7464,22920, 7472,27016, 7480,31112, 7504,11144,
+   7512,15240, 7520,19336, 7528,23432, 7536,27528, 7544,31624, 7568,11656,
+   7576,15752, 7584,19848, 7592,23944, 7600,28040, 7608,32136, 7624,8072,
+   7632,12168, 7640,16264, 7648,20360, 7656,24456, 7664,28552, 7672,32648,
+   7696,8648, 7704,12744, 7712,16840, 7720,20936, 7728,25032, 7736,29128,
+   7760,9160, 7768,13256, 7776,17352, 7784,21448, 7792,25544, 7800,29640,
+   7824,9672, 7832,13768, 7840,17864, 7848,21960, 7856,26056, 7864,30152,
+   7888,10184, 7896,14280, 7904,18376, 7912,22472, 7920,26568, 7928,30664,
+   7952,10696, 7960,14792, 7968,18888, 7976,22984, 7984,27080, 7992,31176,
+   8016,11208, 8024,15304, 8032,19400, 8040,23496, 8048,27592, 8056,31688,
+   8080,11720, 8088,15816, 8096,19912, 8104,24008, 8112,28104, 8120,32200,
+   8144,12232, 8152,16328, 8160,20424, 8168,24520, 8176,28616, 8184,32712,
+   8216,12304, 8224,16400, 8232,20496, 8240,24592, 8248,28688, 8272,8720,
+   8280,12816, 8288,16912, 8296,21008, 8304,25104, 8312,29200, 8336,9232,
+   8344,13328, 8352,17424, 8360,21520, 8368,25616, 8376,29712, 8400,9744,
+   8408,13840, 8416,17936, 8424,22032, 8432,26128, 8440,30224, 8464,10256,
+   8472,14352, 8480,18448, 8488,22544, 8496,26640, 8504,30736, 8528,10768,
+   8536,14864, 8544,18960, 8552,23056, 8560,27152, 8568,31248, 8592,11280,
+   8600,15376, 8608,19472, 8616,23568, 8624,27664, 8632,31760, 8656,11792,
+   8664,15888, 8672,19984, 8680,24080, 8688,28176, 8696,32272, 8728,12368,
+   8736,16464, 8744,20560, 8752,24656, 8760,28752, 8792,12880, 8800,16976,
+   8808,21072, 8816,25168, 8824,29264, 8848,9296, 8856,13392, 8864,17488,
+   8872,21584, 8880,25680, 8888,29776, 8912,9808, 8920,13904, 8928,18000,
+   8936,22096, 8944,26192, 8952,30288, 8976,10320, 8984,14416, 8992,18512,
+   9000,22608, 9008,26704, 9016,30800, 9040,10832, 9048,14928, 9056,19024,
+   9064,23120, 9072,27216, 9080,31312, 9104,11344, 9112,15440, 9120,19536,
+   9128,23632, 9136,27728, 9144,31824, 9168,11856, 9176,15952, 9184,20048,
+   9192,24144, 9200,28240, 9208,32336, 9240,12432, 9248,16528, 9256,20624,
+   9264,24720, 9272,28816, 9304,12944, 9312,17040, 9320,21136, 9328,25232,
+   9336,29328, 9368,13456, 9376,17552, 9384,21648, 9392,25744, 9400,29840,
+   9424,9872, 9432,13968, 9440,18064, 9448,22160, 9456,26256, 9464,30352,
+   9488,10384, 9496,14480, 9504,18576, 9512,22672, 9520,26768, 9528,30864,
+   9552,10896, 9560,14992, 9568,19088, 9576,23184, 9584,27280, 9592,31376,
+   9616,11408, 9624,15504, 9632,19600, 9640,23696, 9648,27792, 9656,31888,
+   9680,11920, 9688,16016, 9696,20112, 9704,24208, 9712,28304, 9720,32400,
+   9752,12496, 9760,16592, 9768,20688, 9776,24784, 9784,28880, 9816,13008,
+   9824,17104, 9832,21200, 9840,25296, 9848,29392, 9880,13520, 9888,17616,
+   9896,21712, 9904,25808, 9912,29904, 9944,14032, 9952,18128, 9960,22224,
+   9968,26320, 9976,30416, 10000,10448, 10008,14544, 10016,18640, 10024,22736,
+   10032,26832, 10040,30928, 10064,10960, 10072,15056, 10080,19152,
+   10088,23248, 10096,27344, 10104,31440, 10128,11472, 10136,15568,
+   10144,19664, 10152,23760, 10160,27856, 10168,31952, 10192,11984,
+   10200,16080, 10208,20176, 10216,24272, 10224,28368, 10232,32464,
+   10264,12560, 10272,16656, 10280,20752, 10288,24848, 10296,28944,
+   10328,13072, 10336,17168, 10344,21264, 10352,25360, 10360,29456,
+   10392,13584, 10400,17680, 10408,21776, 10416,25872, 10424,29968,
+   10456,14096, 10464,18192, 10472,22288, 10480,26384, 10488,30480,
+   10520,14608, 10528,18704, 10536,22800, 10544,26896, 10552,30992,
+   10576,11024, 10584,15120, 10592,19216, 10600,23312, 10608,27408,
+   10616,31504, 10640,11536, 10648,15632, 10656,19728, 10664,23824,
+   10672,27920, 10680,32016, 10704,12048, 10712,16144, 10720,20240,
+   10728,24336, 10736,28432, 10744,32528, 10776,12624, 10784,16720,
+   10792,20816, 10800,24912, 10808,29008, 10840,13136, 10848,17232,
+   10856,21328, 10864,25424, 10872,29520, 10904,13648, 10912,17744,
+   10920,21840, 10928,25936, 10936,30032, 10968,14160, 10976,18256,
+   10984,22352, 10992,26448, 11000,30544, 11032,14672, 11040,18768,
+   11048,22864, 11056,26960, 11064,31056, 11096,15184, 11104,19280,
+   11112,23376, 11120,27472, 11128,31568, 11152,11600, 11160,15696,
+   11168,19792, 11176,23888, 11184,27984, 11192,32080, 11216,12112,
+   11224,16208, 11232,20304, 11240,24400, 11248,28496, 11256,32592,
+   11288,12688, 11296,16784, 11304,20880, 11312,24976, 11320,29072,
+   11352,13200, 11360,17296, 11368,21392, 11376,25488, 11384,29584,
+   11416,13712, 11424,17808, 11432,21904, 11440,26000, 11448,30096,
+   11480,14224, 11488,18320, 11496,22416, 11504,26512, 11512,30608,
+   11544,14736, 11552,18832, 11560,22928, 11568,27024, 11576,31120,
+   11608,15248, 11616,19344, 11624,23440, 11632,27536, 11640,31632,
+   11672,15760, 11680,19856, 11688,23952, 11696,28048, 11704,32144,
+   11728,12176, 11736,16272, 11744,20368, 11752,24464, 11760,28560,
+   11768,32656, 11800,12752, 11808,16848, 11816,20944, 11824,25040,
+   11832,29136, 11864,13264, 11872,17360, 11880,21456, 11888,25552,
+   11896,29648, 11928,13776, 11936,17872, 11944,21968, 11952,26064,
+   11960,30160, 11992,14288, 12000,18384, 12008,22480, 12016,26576,
+   12024,30672, 12056,14800, 12064,18896, 12072,22992, 12080,27088,
+   12088,31184, 12120,15312, 12128,19408, 12136,23504, 12144,27600,
+   12152,31696, 12184,15824, 12192,19920, 12200,24016, 12208,28112,
+   12216,32208, 12248,16336, 12256,20432, 12264,24528, 12272,28624,
+   12280,32720, 12320,16408, 12328,20504, 12336,24600, 12344,28696,
+   12376,12824, 12384,16920, 12392,21016, 12400,25112, 12408,29208,
+   12440,13336, 12448,17432, 12456,21528, 12464,25624, 12472,29720,
+   12504,13848, 12512,17944, 12520,22040, 12528,26136, 12536,30232,
+   12568,14360, 12576,18456, 12584,22552, 12592,26648, 12600,30744,
+   12632,14872, 12640,18968, 12648,23064, 12656,27160, 12664,31256,
+   12696,15384, 12704,19480, 12712,23576, 12720,27672, 12728,31768,
+   12760,15896, 12768,19992, 12776,24088, 12784,28184, 12792,32280,
+   12832,16472, 12840,20568, 12848,24664, 12856,28760, 12896,16984,
+   12904,21080, 12912,25176, 12920,29272, 12952,13400, 12960,17496,
+   12968,21592, 12976,25688, 12984,29784, 13016,13912, 13024,18008,
+   13032,22104, 13040,26200, 13048,30296, 13080,14424, 13088,18520,
+   13096,22616, 13104,26712, 13112,30808, 13144,14936, 13152,19032,
+   13160,23128, 13168,27224, 13176,31320, 13208,15448, 13216,19544,
+   13224,23640, 13232,27736, 13240,31832, 13272,15960, 13280,20056,
+   13288,24152, 13296,28248, 13304,32344, 13344,16536, 13352,20632,
+   13360,24728, 13368,28824, 13408,17048, 13416,21144, 13424,25240,
+   13432,29336, 13472,17560, 13480,21656, 13488,25752, 13496,29848,
+   13528,13976, 13536,18072, 13544,22168, 13552,26264, 13560,30360,
+   13592,14488, 13600,18584, 13608,22680, 13616,26776, 13624,30872,
+   13656,15000, 13664,19096, 13672,23192, 13680,27288, 13688,31384,
+   13720,15512, 13728,19608, 13736,23704, 13744,27800, 13752,31896,
+   13784,16024, 13792,20120, 13800,24216, 13808,28312, 13816,32408,
+   13856,16600, 13864,20696, 13872,24792, 13880,28888, 13920,17112,
+   13928,21208, 13936,25304, 13944,29400, 13984,17624, 13992,21720,
+   14000,25816, 14008,29912, 14048,18136, 14056,22232, 14064,26328,
+   14072,30424, 14104,14552, 14112,18648, 14120,22744, 14128,26840,
+   14136,30936, 14168,15064, 14176,19160, 14184,23256, 14192,27352,
+   14200,31448, 14232,15576, 14240,19672, 14248,23768, 14256,27864,
+   14264,31960, 14296,16088, 14304,20184, 14312,24280, 14320,28376,
+   14328,32472, 14368,16664, 14376,20760, 14384,24856, 14392,28952,
+   14432,17176, 14440,21272, 14448,25368, 14456,29464, 14496,17688,
+   14504,21784, 14512,25880, 14520,29976, 14560,18200, 14568,22296,
+   14576,26392, 14584,30488, 14624,18712, 14632,22808, 14640,26904,
+   14648,31000, 14680,15128, 14688,19224, 14696,23320, 14704,27416,
+   14712,31512, 14744,15640, 14752,19736, 14760,23832, 14768,27928,
+   14776,32024, 14808,16152, 14816,20248, 14824,24344, 14832,28440,
+   14840,32536, 14880,16728, 14888,20824, 14896,24920, 14904,29016,
+   14944,17240, 14952,21336, 14960,25432, 14968,29528, 15008,17752,
+   15016,21848, 15024,25944, 15032,30040, 15072,18264, 15080,22360,
+   15088,26456, 15096,30552, 15136,18776, 15144,22872, 15152,26968,
+   15160,31064, 15200,19288, 15208,23384, 15216,27480, 15224,31576,
+   15256,15704, 15264,19800, 15272,23896, 15280,27992, 15288,32088,
+   15320,16216, 15328,20312, 15336,24408, 15344,28504, 15352,32600,
+   15392,16792, 15400,20888, 15408,24984, 15416,29080, 15456,17304,
+   15464,21400, 15472,25496, 15480,29592, 15520,17816, 15528,21912,
+   15536,26008, 15544,30104, 15584,18328, 15592,22424, 15600,26520,
+   15608,30616, 15648,18840, 15656,22936, 15664,27032, 15672,31128,
+   15712,19352, 15720,23448, 15728,27544, 15736,31640, 15776,19864,
+   15784,23960, 15792,28056, 15800,32152, 15832,16280, 15840,20376,
+   15848,24472, 15856,28568, 15864,32664, 15904,16856, 15912,20952,
+   15920,25048, 15928,29144, 15968,17368, 15976,21464, 15984,25560,
+   15992,29656, 16032,17880, 16040,21976, 16048,26072, 16056,30168,
+   16096,18392, 16104,22488, 16112,26584, 16120,30680, 16160,18904,
+   16168,23000, 16176,27096, 16184,31192, 16224,19416, 16232,23512,
+   16240,27608, 16248,31704, 16288,19928, 16296,24024, 16304,28120,
+   16312,32216, 16352,20440, 16360,24536, 16368,28632, 16376,32728,
+   16424,20512, 16432,24608, 16440,28704, 16480,16928, 16488,21024,
+   16496,25120, 16504,29216, 16544,17440, 16552,21536, 16560,25632,
+   16568,29728, 16608,17952, 16616,22048, 16624,26144, 16632,30240,
+   16672,18464, 16680,22560, 16688,26656, 16696,30752, 16736,18976,
+   16744,23072, 16752,27168, 16760,31264, 16800,19488, 16808,23584,
+   16816,27680, 16824,31776, 16864,20000, 16872,24096, 16880,28192,
+   16888,32288, 16936,20576, 16944,24672, 16952,28768, 17000,21088,
+   17008,25184, 17016,29280, 17056,17504, 17064,21600, 17072,25696,
+   17080,29792, 17120,18016, 17128,22112, 17136,26208, 17144,30304,
+   17184,18528, 17192,22624, 17200,26720, 17208,30816, 17248,19040,
+   17256,23136, 17264,27232, 17272,31328, 17312,19552, 17320,23648,
+   17328,27744, 17336,31840, 17376,20064, 17384,24160, 17392,28256,
+   17400,32352, 17448,20640, 17456,24736, 17464,28832, 17512,21152,
+   17520,25248, 17528,29344, 17576,21664, 17584,25760, 17592,29856,
+   17632,18080, 17640,22176, 17648,26272, 17656,30368, 17696,18592,
+   17704,22688, 17712,26784, 17720,30880, 17760,19104, 17768,23200,
+   17776,27296, 17784,31392, 17824,19616, 17832,23712, 17840,27808,
+   17848,31904, 17888,20128, 17896,24224, 17904,28320, 17912,32416,
+   17960,20704, 17968,24800, 17976,28896, 18024,21216, 18032,25312,
+   18040,29408, 18088,21728, 18096,25824, 18104,29920, 18152,22240,
+   18160,26336, 18168,30432, 18208,18656, 18216,22752, 18224,26848,
+   18232,30944, 18272,19168, 18280,23264, 18288,27360, 18296,31456,
+   18336,19680, 18344,23776, 18352,27872, 18360,31968, 18400,20192,
+   18408,24288, 18416,28384, 18424,32480, 18472,20768, 18480,24864,
+   18488,28960, 18536,21280, 18544,25376, 18552,29472, 18600,21792,
+   18608,25888, 18616,29984, 18664,22304, 18672,26400, 18680,30496,
+   18728,22816, 18736,26912, 18744,31008, 18784,19232, 18792,23328,
+   18800,27424, 18808,31520, 18848,19744, 18856,23840, 18864,27936,
+   18872,32032, 18912,20256, 18920,24352, 18928,28448, 18936,32544,
+   18984,20832, 18992,24928, 19000,29024, 19048,21344, 19056,25440,
+   19064,29536, 19112,21856, 19120,25952, 19128,30048, 19176,22368,
+   19184,26464, 19192,30560, 19240,22880, 19248,26976, 19256,31072,
+   19304,23392, 19312,27488, 19320,31584, 19360,19808, 19368,23904,
+   19376,28000, 19384,32096, 19424,20320, 19432,24416, 19440,28512,
+   19448,32608, 19496,20896, 19504,24992, 19512,29088, 19560,21408,
+   19568,25504, 19576,29600, 19624,21920, 19632,26016, 19640,30112,
+   19688,22432, 19696,26528, 19704,30624, 19752,22944, 19760,27040,
+   19768,31136, 19816,23456, 19824,27552, 19832,31648, 19880,23968,
+   19888,28064, 19896,32160, 19936,20384, 19944,24480, 19952,28576,
+   19960,32672, 20008,20960, 20016,25056, 20024,29152, 20072,21472,
+   20080,25568, 20088,29664, 20136,21984, 20144,26080, 20152,30176,
+   20200,22496, 20208,26592, 20216,30688, 20264,23008, 20272,27104,
+   20280,31200, 20328,23520, 20336,27616, 20344,31712, 20392,24032,
+   20400,28128, 20408,32224, 20456,24544, 20464,28640, 20472,32736,
+   20528,24616, 20536,28712, 20584,21032, 20592,25128, 20600,29224,
+   20648,21544, 20656,25640, 20664,29736, 20712,22056, 20720,26152,
+   20728,30248, 20776,22568, 20784,26664, 20792,30760, 20840,23080,
+   20848,27176, 20856,31272, 20904,23592, 20912,27688, 20920,31784,
+   20968,24104, 20976,28200, 20984,32296, 21040,24680, 21048,28776,
+   21104,25192, 21112,29288, 21160,21608, 21168,25704, 21176,29800,
+   21224,22120, 21232,26216, 21240,30312, 21288,22632, 21296,26728,
+   21304,30824, 21352,23144, 21360,27240, 21368,31336, 21416,23656,
+   21424,27752, 21432,31848, 21480,24168, 21488,28264, 21496,32360,
+   21552,24744, 21560,28840, 21616,25256, 21624,29352, 21680,25768,
+   21688,29864, 21736,22184, 21744,26280, 21752,30376, 21800,22696,
+   21808,26792, 21816,30888, 21864,23208, 21872,27304, 21880,31400,
+   21928,23720, 21936,27816, 21944,31912, 21992,24232, 22000,28328,
+   22008,32424, 22064,24808, 22072,28904, 22128,25320, 22136,29416,
+   22192,25832, 22200,29928, 22256,26344, 22264,30440, 22312,22760,
+   22320,26856, 22328,30952, 22376,23272, 22384,27368, 22392,31464,
+   22440,23784, 22448,27880, 22456,31976, 22504,24296, 22512,28392,
+   22520,32488, 22576,24872, 22584,28968, 22640,25384, 22648,29480,
+   22704,25896, 22712,29992, 22768,26408, 22776,30504, 22832,26920,
+   22840,31016, 22888,23336, 22896,27432, 22904,31528, 22952,23848,
+   22960,27944, 22968,32040, 23016,24360, 23024,28456, 23032,32552,
+   23088,24936, 23096,29032, 23152,25448, 23160,29544, 23216,25960,
+   23224,30056, 23280,26472, 23288,30568, 23344,26984, 23352,31080,
+   23408,27496, 23416,31592, 23464,23912, 23472,28008, 23480,32104,
+   23528,24424, 23536,28520, 23544,32616, 23600,25000, 23608,29096,
+   23664,25512, 23672,29608, 23728,26024, 23736,30120, 23792,26536,
+   23800,30632, 23856,27048, 23864,31144, 23920,27560, 23928,31656,
+   23984,28072, 23992,32168, 24040,24488, 24048,28584, 24056,32680,
+   24112,25064, 24120,29160, 24176,25576, 24184,29672, 24240,26088,
+   24248,30184, 24304,26600, 24312,30696, 24368,27112, 24376,31208,
+   24432,27624, 24440,31720, 24496,28136, 24504,32232, 24560,28648,
+   24568,32744, 24632,28720, 24688,25136, 24696,29232, 24752,25648,
+   24760,29744, 24816,26160, 24824,30256, 24880,26672, 24888,30768,
+   24944,27184, 24952,31280, 25008,27696, 25016,31792, 25072,28208,
+   25080,32304, 25144,28784, 25208,29296, 25264,25712, 25272,29808,
+   25328,26224, 25336,30320, 25392,26736, 25400,30832, 25456,27248,
+   25464,31344, 25520,27760, 25528,31856, 25584,28272, 25592,32368,
+   25656,28848, 25720,29360, 25784,29872, 25840,26288, 25848,30384,
+   25904,26800, 25912,30896, 25968,27312, 25976,31408, 26032,27824,
+   26040,31920, 26096,28336, 26104,32432, 26168,28912, 26232,29424,
+   26296,29936, 26360,30448, 26416,26864, 26424,30960, 26480,27376,
+   26488,31472, 26544,27888, 26552,31984, 26608,28400, 26616,32496,
+   26680,28976, 26744,29488, 26808,30000, 26872,30512, 26936,31024,
+   26992,27440, 27000,31536, 27056,27952, 27064,32048, 27120,28464,
+   27128,32560, 27192,29040, 27256,29552, 27320,30064, 27384,30576,
+   27448,31088, 27512,31600, 27568,28016, 27576,32112, 27632,28528,
+   27640,32624, 27704,29104, 27768,29616, 27832,30128, 27896,30640,
+   27960,31152, 28024,31664, 28088,32176, 28144,28592, 28152,32688,
+   28216,29168, 28280,29680, 28344,30192, 28408,30704, 28472,31216,
+   28536,31728, 28600,32240, 28664,32752, 28792,29240, 28856,29752,
+   28920,30264, 28984,30776, 29048,31288, 29112,31800, 29176,32312,
+   29368,29816, 29432,30328, 29496,30840, 29560,31352, 29624,31864,
+   29688,32376, 29944,30392, 30008,30904, 30072,31416, 30136,31928,
+   30200,32440, 30520,30968, 30584,31480, 30648,31992, 30712,32504,
+   31096,31544, 31160,32056, 31224,32568, 31672,32120, 31736,32632,
+   32248,32696
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
+
+const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH] =
+{
+   /* radix 4, size 12 */
+   8,64, 16,32, 24,96, 40,80, 56,112, 88,104
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
+const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH] =
+{
+   /* 4x2, size 24 */
+   8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144,
+   88,208, 104,176, 120,240, 152,200, 184,232
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
+const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH] =
+{
+   /* radix 4, size 56 */
+   8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352,
+   112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432,
+   232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
+const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH] =
+{
+   /* 4x2, size 112 */
+   8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192,
+   104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608,
+   208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912,
+   328,592, 344,848, 360,720, 368,464, 376,976, 392,560, 408,816, 424,688, 440,944, 456,624,
+   472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968,
+   664,808, 696,936, 728,872, 760,1000, 824,920, 888,984
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
+const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH] =
+{
+   /* radix 4, size 240 */
+   8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640,
+   88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320,
+   168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960,
+   248,1984, 264,1056, 272,544, 280,1568, 296,1312, 304,800, 312,1824, 328,1184, 336,672,
+   344,1696, 352,416, 360,1440, 368,928, 376,1952, 392,1120, 400,608, 408,1632, 424,1376,
+   432,864, 440,1888, 456,1248, 464,736, 472,1760, 488,1504, 496,992, 504,2016, 520,1040,
+   536,1552, 552,1296, 560,784, 568,1808, 584,1168, 592,656, 600,1680, 616,1424, 624,912,
+   632,1936, 648,1104, 664,1616, 680,1360, 688,848, 696,1872, 712,1232, 728,1744, 744,1488,
+   752,976, 760,2000, 776,1072, 792,1584, 808,1328, 824,1840, 840,1200, 856,1712, 872,1456,
+   880,944, 888,1968, 904,1136, 920,1648, 936,1392, 952,1904, 968,1264, 984,1776, 1000,1520,
+   1016,2032, 1048,1544, 1064,1288, 1080,1800, 1096,1160, 1112,1672, 1128,1416, 1144,1928,
+   1176,1608, 1192,1352, 1208,1864, 1240,1736, 1256,1480, 1272,1992, 1304,1576, 1336,1832,
+   1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816,
+   1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
+const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH] =
+{
+   /* 4x2, size 480 */
+   8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280,
+   88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640,
+   168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944,
+   240,1920, 248,3968, 264,2112, 272,1088, 280,3136, 288,576, 296,2624, 304,1600, 312,3648,
+   328,2368, 336,1344, 344,3392, 352,832, 360,2880, 368,1856, 376,3904, 392,2240, 400,1216,
+   408,3264, 416,704, 424,2752, 432,1728, 440,3776, 456,2496, 464,1472, 472,3520, 480,960,
+   488,3008, 496,1984, 504,4032, 520,2080, 528,1056, 536,3104, 552,2592, 560,1568, 568,3616,
+   584,2336, 592,1312, 600,3360, 608,800, 616,2848, 624,1824, 632,3872, 648,2208, 656,1184,
+   664,3232, 680,2720, 688,1696, 696,3744, 712,2464, 720,1440, 728,3488, 736,928, 744,2976,
+   752,1952, 760,4000, 776,2144, 784,1120, 792,3168, 808,2656, 816,1632, 824,3680, 840,2400,
+   848,1376, 856,3424, 872,2912, 880,1888, 888,3936, 904,2272, 912,1248, 920,3296, 936,2784,
+   944,1760, 952,3808, 968,2528, 976,1504, 984,3552, 1000,3040, 1008,2016, 1016,4064,
+   1032,2064, 1048,3088, 1064,2576, 1072,1552, 1080,3600, 1096,2320, 1104,1296, 1112,3344,
+   1128,2832, 1136,1808, 1144,3856, 1160,2192, 1176,3216, 1192,2704, 1200,1680, 1208,3728,
+   1224,2448, 1232,1424, 1240,3472, 1256,2960, 1264,1936, 1272,3984, 1288,2128, 1304,3152,
+   1320,2640, 1328,1616, 1336,3664, 1352,2384, 1368,3408, 1384,2896, 1392,1872, 1400,3920,
+   1416,2256, 1432,3280, 1448,2768, 1456,1744, 1464,3792, 1480,2512, 1496,3536, 1512,3024,
+   1520,2000, 1528,4048, 1544,2096, 1560,3120, 1576,2608, 1592,3632, 1608,2352, 1624,3376,
+   1640,2864, 1648,1840, 1656,3888, 1672,2224, 1688,3248, 1704,2736, 1720,3760, 1736,2480,
+   1752,3504, 1768,2992, 1776,1968, 1784,4016, 1800,2160, 1816,3184, 1832,2672, 1848,3696,
+   1864,2416, 1880,3440, 1896,2928, 1912,3952, 1928,2288, 1944,3312, 1960,2800, 1976,3824,
+   1992,2544, 2008,3568, 2024,3056, 2040,4080, 2072,3080, 2088,2568, 2104,3592, 2120,2312,
+   2136,3336, 2152,2824, 2168,3848, 2200,3208, 2216,2696, 2232,3720, 2248,2440, 2264,3464,
+   2280,2952, 2296,3976, 2328,3144, 2344,2632, 2360,3656, 2392,3400, 2408,2888, 2424,3912,
+   2456,3272, 2472,2760, 2488,3784, 2520,3528, 2536,3016, 2552,4040, 2584,3112, 2616,3624,
+   2648,3368, 2664,2856, 2680,3880, 2712,3240, 2744,3752, 2776,3496, 2792,2984, 2808,4008,
+   2840,3176, 2872,3688, 2904,3432, 2936,3944, 2968,3304, 3000,3816, 3032,3560, 3064,4072,
+   3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928,
+   3512,3800, 3576,4056, 3704,3896, 3832,4024
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
+const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] =
+{
+    /* radix 4, size 992 */
+    8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608,
+    80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352,
+    144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864,
+    208,2816, 216,6912, 224,1792, 232,5888, 240,3840, 248,7936, 264,4224, 272,2176,
+    280,6272, 288,1152, 296,5248, 304,3200, 312,7296, 320,640, 328,4736, 336,2688,
+    344,6784, 352,1664, 360,5760, 368,3712, 376,7808, 392,4480, 400,2432, 408,6528,
+    416,1408, 424,5504, 432,3456, 440,7552, 448,896, 456,4992, 464,2944, 472,7040,
+    480,1920, 488,6016, 496,3968, 504,8064, 520,4160, 528,2112, 536,6208, 544,1088,
+    552,5184, 560,3136, 568,7232, 584,4672, 592,2624, 600,6720, 608,1600, 616,5696,
+    624,3648, 632,7744, 648,4416, 656,2368, 664,6464, 672,1344, 680,5440, 688,3392,
+    696,7488, 704,832, 712,4928, 720,2880, 728,6976, 736,1856, 744,5952, 752,3904,
+    760,8000, 776,4288, 784,2240, 792,6336, 800,1216, 808,5312, 816,3264, 824,7360,
+    840,4800, 848,2752, 856,6848, 864,1728, 872,5824, 880,3776, 888,7872, 904,4544,
+    912,2496, 920,6592, 928,1472, 936,5568, 944,3520, 952,7616, 968,5056, 976,3008,
+    984,7104, 992,1984, 1000,6080, 1008,4032, 1016,8128, 1032,4128, 1040,2080,
+    1048,6176, 1064,5152, 1072,3104, 1080,7200, 1096,4640, 1104,2592, 1112,6688,
+    1120,1568, 1128,5664, 1136,3616, 1144,7712, 1160,4384, 1168,2336, 1176,6432,
+    1184,1312, 1192,5408, 1200,3360, 1208,7456, 1224,4896, 1232,2848, 1240,6944,
+    1248,1824, 1256,5920, 1264,3872, 1272,7968, 1288,4256, 1296,2208, 1304,6304,
+    1320,5280, 1328,3232, 1336,7328, 1352,4768, 1360,2720, 1368,6816, 1376,1696,
+    1384,5792, 1392,3744, 1400,7840, 1416,4512, 1424,2464, 1432,6560, 1448,5536,
+    1456,3488, 1464,7584, 1480,5024, 1488,2976, 1496,7072, 1504,1952, 1512,6048,
+    1520,4000, 1528,8096, 1544,4192, 1552,2144, 1560,6240, 1576,5216, 1584,3168,
+    1592,7264, 1608,4704, 1616,2656, 1624,6752, 1640,5728, 1648,3680, 1656,7776,
+    1672,4448, 1680,2400, 1688,6496, 1704,5472, 1712,3424, 1720,7520, 1736,4960,
+    1744,2912, 1752,7008, 1760,1888, 1768,5984, 1776,3936, 1784,8032, 1800,4320,
+    1808,2272, 1816,6368, 1832,5344, 1840,3296, 1848,7392, 1864,4832, 1872,2784,
+    1880,6880, 1896,5856, 1904,3808, 1912,7904, 1928,4576, 1936,2528, 1944,6624,
+    1960,5600, 1968,3552, 1976,7648, 1992,5088, 2000,3040, 2008,7136, 2024,6112,
+    2032,4064, 2040,8160, 2056,4112, 2072,6160, 2088,5136, 2096,3088, 2104,7184,
+    2120,4624, 2128,2576, 2136,6672, 2152,5648, 2160,3600, 2168,7696, 2184,4368,
+    2192,2320, 2200,6416, 2216,5392, 2224,3344, 2232,7440, 2248,4880, 2256,2832,
+    2264,6928, 2280,5904, 2288,3856, 2296,7952, 2312,4240, 2328,6288, 2344,5264,
+    2352,3216, 2360,7312, 2376,4752, 2384,2704, 2392,6800, 2408,5776, 2416,3728,
+    2424,7824, 2440,4496, 2456,6544, 2472,5520, 2480,3472, 2488,7568, 2504,5008,
+    2512,2960, 2520,7056, 2536,6032, 2544,3984, 2552,8080, 2568,4176, 2584,6224,
+    2600,5200, 2608,3152, 2616,7248, 2632,4688, 2648,6736, 2664,5712, 2672,3664,
+    2680,7760, 2696,4432, 2712,6480, 2728,5456, 2736,3408, 2744,7504, 2760,4944,
+    2768,2896, 2776,6992, 2792,5968, 2800,3920, 2808,8016, 2824,4304, 2840,6352,
+    2856,5328, 2864,3280, 2872,7376, 2888,4816, 2904,6864, 2920,5840, 2928,3792,
+    2936,7888, 2952,4560, 2968,6608, 2984,5584, 2992,3536, 3000,7632, 3016,5072,
+    3032,7120, 3048,6096, 3056,4048, 3064,8144, 3080,4144, 3096,6192, 3112,5168,
+    3128,7216, 3144,4656, 3160,6704, 3176,5680, 3184,3632, 3192,7728, 3208,4400,
+    3224,6448, 3240,5424, 3248,3376, 3256,7472, 3272,4912, 3288,6960, 3304,5936,
+    3312,3888, 3320,7984, 3336,4272, 3352,6320, 3368,5296, 3384,7344, 3400,4784,
+    3416,6832, 3432,5808, 3440,3760, 3448,7856, 3464,4528, 3480,6576, 3496,5552,
+    3512,7600, 3528,5040, 3544,7088, 3560,6064, 3568,4016, 3576,8112, 3592,4208,
+    3608,6256, 3624,5232, 3640,7280, 3656,4720, 3672,6768, 3688,5744, 3704,7792,
+    3720,4464, 3736,6512, 3752,5488, 3768,7536, 3784,4976, 3800,7024, 3816,6000,
+    3824,3952, 3832,8048, 3848,4336, 3864,6384, 3880,5360, 3896,7408, 3912,4848,
+    3928,6896, 3944,5872, 3960,7920, 3976,4592, 3992,6640, 4008,5616, 4024,7664,
+    4040,5104, 4056,7152, 4072,6128, 4088,8176, 4120,6152, 4136,5128, 4152,7176,
+    4168,4616, 4184,6664, 4200,5640, 4216,7688, 4232,4360, 4248,6408, 4264,5384,
+    4280,7432, 4296,4872, 4312,6920, 4328,5896, 4344,7944, 4376,6280, 4392,5256,
+    4408,7304, 4424,4744, 4440,6792, 4456,5768, 4472,7816, 4504,6536, 4520,5512,
+    4536,7560, 4552,5000, 4568,7048, 4584,6024, 4600,8072, 4632,6216, 4648,5192,
+    4664,7240, 4696,6728, 4712,5704, 4728,7752, 4760,6472, 4776,5448, 4792,7496,
+    4808,4936, 4824,6984, 4840,5960, 4856,8008, 4888,6344, 4904,5320, 4920,7368,
+    4952,6856, 4968,5832, 4984,7880, 5016,6600, 5032,5576, 5048,7624, 5080,7112,
+    5096,6088, 5112,8136, 5144,6184, 5176,7208, 5208,6696, 5224,5672, 5240,7720,
+    5272,6440, 5288,5416, 5304,7464, 5336,6952, 5352,5928, 5368,7976, 5400,6312,
+    5432,7336, 5464,6824, 5480,5800, 5496,7848, 5528,6568, 5560,7592, 5592,7080,
+    5608,6056, 5624,8104, 5656,6248, 5688,7272, 5720,6760, 5752,7784, 5784,6504,
+    5816,7528, 5848,7016, 5864,5992, 5880,8040, 5912,6376, 5944,7400, 5976,6888,
+    6008,7912, 6040,6632, 6072,7656, 6104,7144, 6136,8168, 6200,7192, 6232,6680,
+    6264,7704, 6296,6424, 6328,7448, 6360,6936, 6392,7960, 6456,7320, 6488,6808,
+    6520,7832, 6584,7576, 6616,7064, 6648,8088, 6712,7256, 6776,7768, 6840,7512,
+    6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736,
+    7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
+const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] =
+{
+    /* 4x2, size 1984 */
+    8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024,
+    72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512,
+    136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848,
+    192,1536, 200,9728, 208,5632, 216,13824, 224,3584, 232,11776, 240,7680,
+    248,15872, 264,8448, 272,4352, 280,12544, 288,2304, 296,10496, 304,6400,
+    312,14592, 320,1280, 328,9472, 336,5376, 344,13568, 352,3328, 360,11520,
+    368,7424, 376,15616, 384,768, 392,8960, 400,4864, 408,13056, 416,2816,
+    424,11008, 432,6912, 440,15104, 448,1792, 456,9984, 464,5888, 472,14080,
+    480,3840, 488,12032, 496,7936, 504,16128, 520,8320, 528,4224, 536,12416,
+    544,2176, 552,10368, 560,6272, 568,14464, 576,1152, 584,9344, 592,5248,
+    600,13440, 608,3200, 616,11392, 624,7296, 632,15488, 648,8832, 656,4736,
+    664,12928, 672,2688, 680,10880, 688,6784, 696,14976, 704,1664, 712,9856,
+    720,5760, 728,13952, 736,3712, 744,11904, 752,7808, 760,16000, 776,8576,
+    784,4480, 792,12672, 800,2432, 808,10624, 816,6528, 824,14720, 832,1408,
+    840,9600, 848,5504, 856,13696, 864,3456, 872,11648, 880,7552, 888,15744,
+    904,9088, 912,4992, 920,13184, 928,2944, 936,11136, 944,7040, 952,15232,
+    960,1920, 968,10112, 976,6016, 984,14208, 992,3968, 1000,12160, 1008,8064,
+    1016,16256, 1032,8256, 1040,4160, 1048,12352, 1056,2112, 1064,10304, 1072,6208,
+    1080,14400, 1096,9280, 1104,5184, 1112,13376, 1120,3136, 1128,11328, 1136,7232,
+    1144,15424, 1160,8768, 1168,4672, 1176,12864, 1184,2624, 1192,10816, 1200,6720,
+    1208,14912, 1216,1600, 1224,9792, 1232,5696, 1240,13888, 1248,3648, 1256,11840,
+    1264,7744, 1272,15936, 1288,8512, 1296,4416, 1304,12608, 1312,2368, 1320,10560,
+    1328,6464, 1336,14656, 1352,9536, 1360,5440, 1368,13632, 1376,3392, 1384,11584,
+    1392,7488, 1400,15680, 1416,9024, 1424,4928, 1432,13120, 1440,2880, 1448,11072,
+    1456,6976, 1464,15168, 1472,1856, 1480,10048, 1488,5952, 1496,14144, 1504,3904,
+    1512,12096, 1520,8000, 1528,16192, 1544,8384, 1552,4288, 1560,12480, 1568,2240,
+    1576,10432, 1584,6336, 1592,14528, 1608,9408, 1616,5312, 1624,13504, 1632,3264,
+    1640,11456, 1648,7360, 1656,15552, 1672,8896, 1680,4800, 1688,12992, 1696,2752,
+    1704,10944, 1712,6848, 1720,15040, 1736,9920, 1744,5824, 1752,14016, 1760,3776,
+    1768,11968, 1776,7872, 1784,16064, 1800,8640, 1808,4544, 1816,12736, 1824,2496,
+    1832,10688, 1840,6592, 1848,14784, 1864,9664, 1872,5568, 1880,13760, 1888,3520,
+    1896,11712, 1904,7616, 1912,15808, 1928,9152, 1936,5056, 1944,13248, 1952,3008,
+    1960,11200, 1968,7104, 1976,15296, 1992,10176, 2000,6080, 2008,14272, 2016,4032,
+    2024,12224, 2032,8128, 2040,16320, 2056,8224, 2064,4128, 2072,12320, 2088,10272,
+    2096,6176, 2104,14368, 2120,9248, 2128,5152, 2136,13344, 2144,3104, 2152,11296,
+    2160,7200, 2168,15392, 2184,8736, 2192,4640, 2200,12832, 2208,2592, 2216,10784,
+    2224,6688, 2232,14880, 2248,9760, 2256,5664, 2264,13856, 2272,3616, 2280,11808,
+    2288,7712, 2296,15904, 2312,8480, 2320,4384, 2328,12576, 2344,10528, 2352,6432,
+    2360,14624, 2376,9504, 2384,5408, 2392,13600, 2400,3360, 2408,11552, 2416,7456,
+    2424,15648, 2440,8992, 2448,4896, 2456,13088, 2464,2848, 2472,11040, 2480,6944,
+    2488,15136, 2504,10016, 2512,5920, 2520,14112, 2528,3872, 2536,12064, 2544,7968,
+    2552,16160, 2568,8352, 2576,4256, 2584,12448, 2600,10400, 2608,6304, 2616,14496,
+    2632,9376, 2640,5280, 2648,13472, 2656,3232, 2664,11424, 2672,7328, 2680,15520,
+    2696,8864, 2704,4768, 2712,12960, 2728,10912, 2736,6816, 2744,15008, 2760,9888,
+    2768,5792, 2776,13984, 2784,3744, 2792,11936, 2800,7840, 2808,16032, 2824,8608,
+    2832,4512, 2840,12704, 2856,10656, 2864,6560, 2872,14752, 2888,9632, 2896,5536,
+    2904,13728, 2912,3488, 2920,11680, 2928,7584, 2936,15776, 2952,9120, 2960,5024,
+    2968,13216, 2984,11168, 2992,7072, 3000,15264, 3016,10144, 3024,6048,
+    3032,14240, 3040,4000, 3048,12192, 3056,8096, 3064,16288, 3080,8288, 3088,4192,
+    3096,12384, 3112,10336, 3120,6240, 3128,14432, 3144,9312, 3152,5216, 3160,13408,
+    3176,11360, 3184,7264, 3192,15456, 3208,8800, 3216,4704, 3224,12896, 3240,10848,
+    3248,6752, 3256,14944, 3272,9824, 3280,5728, 3288,13920, 3296,3680, 3304,11872,
+    3312,7776, 3320,15968, 3336,8544, 3344,4448, 3352,12640, 3368,10592, 3376,6496,
+    3384,14688, 3400,9568, 3408,5472, 3416,13664, 3432,11616, 3440,7520, 3448,15712,
+    3464,9056, 3472,4960, 3480,13152, 3496,11104, 3504,7008, 3512,15200, 3528,10080,
+    3536,5984, 3544,14176, 3552,3936, 3560,12128, 3568,8032, 3576,16224, 3592,8416,
+    3600,4320, 3608,12512, 3624,10464, 3632,6368, 3640,14560, 3656,9440, 3664,5344,
+    3672,13536, 3688,11488, 3696,7392, 3704,15584, 3720,8928, 3728,4832, 3736,13024,
+    3752,10976, 3760,6880, 3768,15072, 3784,9952, 3792,5856, 3800,14048, 3816,12000,
+    3824,7904, 3832,16096, 3848,8672, 3856,4576, 3864,12768, 3880,10720, 3888,6624,
+    3896,14816, 3912,9696, 3920,5600, 3928,13792, 3944,11744, 3952,7648, 3960,15840,
+    3976,9184, 3984,5088, 3992,13280, 4008,11232, 4016,7136, 4024,15328, 4040,10208,
+    4048,6112, 4056,14304, 4072,12256, 4080,8160, 4088,16352, 4104,8208, 4120,12304,
+    4136,10256, 4144,6160, 4152,14352, 4168,9232, 4176,5136, 4184,13328, 4200,11280,
+    4208,7184, 4216,15376, 4232,8720, 4240,4624, 4248,12816, 4264,10768, 4272,6672,
+    4280,14864, 4296,9744, 4304,5648, 4312,13840, 4328,11792, 4336,7696, 4344,15888,
+    4360,8464, 4376,12560, 4392,10512, 4400,6416, 4408,14608, 4424,9488, 4432,5392,
+    4440,13584, 4456,11536, 4464,7440, 4472,15632, 4488,8976, 4496,4880, 4504,13072,
+    4520,11024, 4528,6928, 4536,15120, 4552,10000, 4560,5904, 4568,14096,
+    4584,12048, 4592,7952, 4600,16144, 4616,8336, 4632,12432, 4648,10384, 4656,6288,
+    4664,14480, 4680,9360, 4688,5264, 4696,13456, 4712,11408, 4720,7312, 4728,15504,
+    4744,8848, 4760,12944, 4776,10896, 4784,6800, 4792,14992, 4808,9872, 4816,5776,
+    4824,13968, 4840,11920, 4848,7824, 4856,16016, 4872,8592, 4888,12688,
+    4904,10640, 4912,6544, 4920,14736, 4936,9616, 4944,5520, 4952,13712, 4968,11664,
+    4976,7568, 4984,15760, 5000,9104, 5016,13200, 5032,11152, 5040,7056, 5048,15248,
+    5064,10128, 5072,6032, 5080,14224, 5096,12176, 5104,8080, 5112,16272, 5128,8272,
+    5144,12368, 5160,10320, 5168,6224, 5176,14416, 5192,9296, 5208,13392,
+    5224,11344, 5232,7248, 5240,15440, 5256,8784, 5272,12880, 5288,10832, 5296,6736,
+    5304,14928, 5320,9808, 5328,5712, 5336,13904, 5352,11856, 5360,7760, 5368,15952,
+    5384,8528, 5400,12624, 5416,10576, 5424,6480, 5432,14672, 5448,9552, 5464,13648,
+    5480,11600, 5488,7504, 5496,15696, 5512,9040, 5528,13136, 5544,11088, 5552,6992,
+    5560,15184, 5576,10064, 5584,5968, 5592,14160, 5608,12112, 5616,8016,
+    5624,16208, 5640,8400, 5656,12496, 5672,10448, 5680,6352, 5688,14544, 5704,9424,
+    5720,13520, 5736,11472, 5744,7376, 5752,15568, 5768,8912, 5784,13008,
+    5800,10960, 5808,6864, 5816,15056, 5832,9936, 5848,14032, 5864,11984, 5872,7888,
+    5880,16080, 5896,8656, 5912,12752, 5928,10704, 5936,6608, 5944,14800, 5960,9680,
+    5976,13776, 5992,11728, 6000,7632, 6008,15824, 6024,9168, 6040,13264,
+    6056,11216, 6064,7120, 6072,15312, 6088,10192, 6104,14288, 6120,12240,
+    6128,8144, 6136,16336, 6152,8240, 6168,12336, 6184,10288, 6200,14384, 6216,9264,
+    6232,13360, 6248,11312, 6256,7216, 6264,15408, 6280,8752, 6296,12848,
+    6312,10800, 6320,6704, 6328,14896, 6344,9776, 6360,13872, 6376,11824, 6384,7728,
+    6392,15920, 6408,8496, 6424,12592, 6440,10544, 6456,14640, 6472,9520,
+    6488,13616, 6504,11568, 6512,7472, 6520,15664, 6536,9008, 6552,13104,
+    6568,11056, 6576,6960, 6584,15152, 6600,10032, 6616,14128, 6632,12080,
+    6640,7984, 6648,16176, 6664,8368, 6680,12464, 6696,10416, 6712,14512, 6728,9392,
+    6744,13488, 6760,11440, 6768,7344, 6776,15536, 6792,8880, 6808,12976,
+    6824,10928, 6840,15024, 6856,9904, 6872,14000, 6888,11952, 6896,7856,
+    6904,16048, 6920,8624, 6936,12720, 6952,10672, 6968,14768, 6984,9648,
+    7000,13744, 7016,11696, 7024,7600, 7032,15792, 7048,9136, 7064,13232,
+    7080,11184, 7096,15280, 7112,10160, 7128,14256, 7144,12208, 7152,8112,
+    7160,16304, 7176,8304, 7192,12400, 7208,10352, 7224,14448, 7240,9328,
+    7256,13424, 7272,11376, 7288,15472, 7304,8816, 7320,12912, 7336,10864,
+    7352,14960, 7368,9840, 7384,13936, 7400,11888, 7408,7792, 7416,15984, 7432,8560,
+    7448,12656, 7464,10608, 7480,14704, 7496,9584, 7512,13680, 7528,11632,
+    7544,15728, 7560,9072, 7576,13168, 7592,11120, 7608,15216, 7624,10096,
+    7640,14192, 7656,12144, 7664,8048, 7672,16240, 7688,8432, 7704,12528,
+    7720,10480, 7736,14576, 7752,9456, 7768,13552, 7784,11504, 7800,15600,
+    7816,8944, 7832,13040, 7848,10992, 7864,15088, 7880,9968, 7896,14064,
+    7912,12016, 7928,16112, 7944,8688, 7960,12784, 7976,10736, 7992,14832,
+    8008,9712, 8024,13808, 8040,11760, 8056,15856, 8072,9200, 8088,13296,
+    8104,11248, 8120,15344, 8136,10224, 8152,14320, 8168,12272, 8184,16368,
+    8216,12296, 8232,10248, 8248,14344, 8264,9224, 8280,13320, 8296,11272,
+    8312,15368, 8328,8712, 8344,12808, 8360,10760, 8376,14856, 8392,9736,
+    8408,13832, 8424,11784, 8440,15880, 8472,12552, 8488,10504, 8504,14600,
+    8520,9480, 8536,13576, 8552,11528, 8568,15624, 8584,8968, 8600,13064,
+    8616,11016, 8632,15112, 8648,9992, 8664,14088, 8680,12040, 8696,16136,
+    8728,12424, 8744,10376, 8760,14472, 8776,9352, 8792,13448, 8808,11400,
+    8824,15496, 8856,12936, 8872,10888, 8888,14984, 8904,9864, 8920,13960,
+    8936,11912, 8952,16008, 8984,12680, 9000,10632, 9016,14728, 9032,9608,
+    9048,13704, 9064,11656, 9080,15752, 9112,13192, 9128,11144, 9144,15240,
+    9160,10120, 9176,14216, 9192,12168, 9208,16264, 9240,12360, 9256,10312,
+    9272,14408, 9304,13384, 9320,11336, 9336,15432, 9368,12872, 9384,10824,
+    9400,14920, 9416,9800, 9432,13896, 9448,11848, 9464,15944, 9496,12616,
+    9512,10568, 9528,14664, 9560,13640, 9576,11592, 9592,15688, 9624,13128,
+    9640,11080, 9656,15176, 9672,10056, 9688,14152, 9704,12104, 9720,16200,
+    9752,12488, 9768,10440, 9784,14536, 9816,13512, 9832,11464, 9848,15560,
+    9880,13000, 9896,10952, 9912,15048, 9944,14024, 9960,11976, 9976,16072,
+    10008,12744, 10024,10696, 10040,14792, 10072,13768, 10088,11720, 10104,15816,
+    10136,13256, 10152,11208, 10168,15304, 10200,14280, 10216,12232, 10232,16328,
+    10264,12328, 10296,14376, 10328,13352, 10344,11304, 10360,15400, 10392,12840,
+    10408,10792, 10424,14888, 10456,13864, 10472,11816, 10488,15912, 10520,12584,
+    10552,14632, 10584,13608, 10600,11560, 10616,15656, 10648,13096, 10664,11048,
+    10680,15144, 10712,14120, 10728,12072, 10744,16168, 10776,12456, 10808,14504,
+    10840,13480, 10856,11432, 10872,15528, 10904,12968, 10936,15016, 10968,13992,
+    10984,11944, 11000,16040, 11032,12712, 11064,14760, 11096,13736, 11112,11688,
+    11128,15784, 11160,13224, 11192,15272, 11224,14248, 11240,12200, 11256,16296,
+    11288,12392, 11320,14440, 11352,13416, 11384,15464, 11416,12904, 11448,14952,
+    11480,13928, 11496,11880, 11512,15976, 11544,12648, 11576,14696, 11608,13672,
+    11640,15720, 11672,13160, 11704,15208, 11736,14184, 11752,12136, 11768,16232,
+    11800,12520, 11832,14568, 11864,13544, 11896,15592, 11928,13032, 11960,15080,
+    11992,14056, 12024,16104, 12056,12776, 12088,14824, 12120,13800, 12152,15848,
+    12184,13288, 12216,15336, 12248,14312, 12280,16360, 12344,14360, 12376,13336,
+    12408,15384, 12440,12824, 12472,14872, 12504,13848, 12536,15896, 12600,14616,
+    12632,13592, 12664,15640, 12696,13080, 12728,15128, 12760,14104, 12792,16152,
+    12856,14488, 12888,13464, 12920,15512, 12984,15000, 13016,13976, 13048,16024,
+    13112,14744, 13144,13720, 13176,15768, 13240,15256, 13272,14232, 13304,16280,
+    13368,14424, 13432,15448, 13496,14936, 13528,13912, 13560,15960, 13624,14680,
+    13688,15704, 13752,15192, 13784,14168, 13816,16216, 13880,14552, 13944,15576,
+    14008,15064, 14072,16088, 14136,14808, 14200,15832, 14264,15320, 14328,16344,
+    14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184,
+    14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
+const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] =
+{
+    /* radix 4, size 4032 */
+    8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048,
+    72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720,
+    128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312,
+    184,29696, 192,3072, 200,19456, 208,11264, 216,27648, 224,7168, 232,23552,
+    240,15360, 248,31744, 256,512, 264,16896, 272,8704, 280,25088, 288,4608,
+    296,20992, 304,12800, 312,29184, 320,2560, 328,18944, 336,10752, 344,27136,
+    352,6656, 360,23040, 368,14848, 376,31232, 384,1536, 392,17920, 400,9728,
+    408,26112, 416,5632, 424,22016, 432,13824, 440,30208, 448,3584, 456,19968,
+    464,11776, 472,28160, 480,7680, 488,24064, 496,15872, 504,32256, 520,16640,
+    528,8448, 536,24832, 544,4352, 552,20736, 560,12544, 568,28928, 576,2304,
+    584,18688, 592,10496, 600,26880, 608,6400, 616,22784, 624,14592, 632,30976,
+    640,1280, 648,17664, 656,9472, 664,25856, 672,5376, 680,21760, 688,13568,
+    696,29952, 704,3328, 712,19712, 720,11520, 728,27904, 736,7424, 744,23808,
+    752,15616, 760,32000, 776,17152, 784,8960, 792,25344, 800,4864, 808,21248,
+    816,13056, 824,29440, 832,2816, 840,19200, 848,11008, 856,27392, 864,6912,
+    872,23296, 880,15104, 888,31488, 896,1792, 904,18176, 912,9984, 920,26368,
+    928,5888, 936,22272, 944,14080, 952,30464, 960,3840, 968,20224, 976,12032,
+    984,28416, 992,7936, 1000,24320, 1008,16128, 1016,32512, 1032,16512, 1040,8320,
+    1048,24704, 1056,4224, 1064,20608, 1072,12416, 1080,28800, 1088,2176,
+    1096,18560, 1104,10368, 1112,26752, 1120,6272, 1128,22656, 1136,14464,
+    1144,30848, 1160,17536, 1168,9344, 1176,25728, 1184,5248, 1192,21632,
+    1200,13440, 1208,29824, 1216,3200, 1224,19584, 1232,11392, 1240,27776,
+    1248,7296, 1256,23680, 1264,15488, 1272,31872, 1288,17024, 1296,8832,
+    1304,25216, 1312,4736, 1320,21120, 1328,12928, 1336,29312, 1344,2688,
+    1352,19072, 1360,10880, 1368,27264, 1376,6784, 1384,23168, 1392,14976,
+    1400,31360, 1408,1664, 1416,18048, 1424,9856, 1432,26240, 1440,5760, 1448,22144,
+    1456,13952, 1464,30336, 1472,3712, 1480,20096, 1488,11904, 1496,28288,
+    1504,7808, 1512,24192, 1520,16000, 1528,32384, 1544,16768, 1552,8576,
+    1560,24960, 1568,4480, 1576,20864, 1584,12672, 1592,29056, 1600,2432,
+    1608,18816, 1616,10624, 1624,27008, 1632,6528, 1640,22912, 1648,14720,
+    1656,31104, 1672,17792, 1680,9600, 1688,25984, 1696,5504, 1704,21888,
+    1712,13696, 1720,30080, 1728,3456, 1736,19840, 1744,11648, 1752,28032,
+    1760,7552, 1768,23936, 1776,15744, 1784,32128, 1800,17280, 1808,9088,
+    1816,25472, 1824,4992, 1832,21376, 1840,13184, 1848,29568, 1856,2944,
+    1864,19328, 1872,11136, 1880,27520, 1888,7040, 1896,23424, 1904,15232,
+    1912,31616, 1928,18304, 1936,10112, 1944,26496, 1952,6016, 1960,22400,
+    1968,14208, 1976,30592, 1984,3968, 1992,20352, 2000,12160, 2008,28544,
+    2016,8064, 2024,24448, 2032,16256, 2040,32640, 2056,16448, 2064,8256,
+    2072,24640, 2080,4160, 2088,20544, 2096,12352, 2104,28736, 2120,18496,
+    2128,10304, 2136,26688, 2144,6208, 2152,22592, 2160,14400, 2168,30784,
+    2184,17472, 2192,9280, 2200,25664, 2208,5184, 2216,21568, 2224,13376,
+    2232,29760, 2240,3136, 2248,19520, 2256,11328, 2264,27712, 2272,7232,
+    2280,23616, 2288,15424, 2296,31808, 2312,16960, 2320,8768, 2328,25152,
+    2336,4672, 2344,21056, 2352,12864, 2360,29248, 2368,2624, 2376,19008,
+    2384,10816, 2392,27200, 2400,6720, 2408,23104, 2416,14912, 2424,31296,
+    2440,17984, 2448,9792, 2456,26176, 2464,5696, 2472,22080, 2480,13888,
+    2488,30272, 2496,3648, 2504,20032, 2512,11840, 2520,28224, 2528,7744,
+    2536,24128, 2544,15936, 2552,32320, 2568,16704, 2576,8512, 2584,24896,
+    2592,4416, 2600,20800, 2608,12608, 2616,28992, 2632,18752, 2640,10560,
+    2648,26944, 2656,6464, 2664,22848, 2672,14656, 2680,31040, 2696,17728,
+    2704,9536, 2712,25920, 2720,5440, 2728,21824, 2736,13632, 2744,30016, 2752,3392,
+    2760,19776, 2768,11584, 2776,27968, 2784,7488, 2792,23872, 2800,15680,
+    2808,32064, 2824,17216, 2832,9024, 2840,25408, 2848,4928, 2856,21312,
+    2864,13120, 2872,29504, 2888,19264, 2896,11072, 2904,27456, 2912,6976,
+    2920,23360, 2928,15168, 2936,31552, 2952,18240, 2960,10048, 2968,26432,
+    2976,5952, 2984,22336, 2992,14144, 3000,30528, 3008,3904, 3016,20288,
+    3024,12096, 3032,28480, 3040,8000, 3048,24384, 3056,16192, 3064,32576,
+    3080,16576, 3088,8384, 3096,24768, 3104,4288, 3112,20672, 3120,12480,
+    3128,28864, 3144,18624, 3152,10432, 3160,26816, 3168,6336, 3176,22720,
+    3184,14528, 3192,30912, 3208,17600, 3216,9408, 3224,25792, 3232,5312,
+    3240,21696, 3248,13504, 3256,29888, 3272,19648, 3280,11456, 3288,27840,
+    3296,7360, 3304,23744, 3312,15552, 3320,31936, 3336,17088, 3344,8896,
+    3352,25280, 3360,4800, 3368,21184, 3376,12992, 3384,29376, 3400,19136,
+    3408,10944, 3416,27328, 3424,6848, 3432,23232, 3440,15040, 3448,31424,
+    3464,18112, 3472,9920, 3480,26304, 3488,5824, 3496,22208, 3504,14016,
+    3512,30400, 3520,3776, 3528,20160, 3536,11968, 3544,28352, 3552,7872,
+    3560,24256, 3568,16064, 3576,32448, 3592,16832, 3600,8640, 3608,25024,
+    3616,4544, 3624,20928, 3632,12736, 3640,29120, 3656,18880, 3664,10688,
+    3672,27072, 3680,6592, 3688,22976, 3696,14784, 3704,31168, 3720,17856,
+    3728,9664, 3736,26048, 3744,5568, 3752,21952, 3760,13760, 3768,30144,
+    3784,19904, 3792,11712, 3800,28096, 3808,7616, 3816,24000, 3824,15808,
+    3832,32192, 3848,17344, 3856,9152, 3864,25536, 3872,5056, 3880,21440,
+    3888,13248, 3896,29632, 3912,19392, 3920,11200, 3928,27584, 3936,7104,
+    3944,23488, 3952,15296, 3960,31680, 3976,18368, 3984,10176, 3992,26560,
+    4000,6080, 4008,22464, 4016,14272, 4024,30656, 4040,20416, 4048,12224,
+    4056,28608, 4064,8128, 4072,24512, 4080,16320, 4088,32704, 4104,16416,
+    4112,8224, 4120,24608, 4136,20512, 4144,12320, 4152,28704, 4168,18464,
+    4176,10272, 4184,26656, 4192,6176, 4200,22560, 4208,14368, 4216,30752,
+    4232,17440, 4240,9248, 4248,25632, 4256,5152, 4264,21536, 4272,13344,
+    4280,29728, 4296,19488, 4304,11296, 4312,27680, 4320,7200, 4328,23584,
+    4336,15392, 4344,31776, 4360,16928, 4368,8736, 4376,25120, 4384,4640,
+    4392,21024, 4400,12832, 4408,29216, 4424,18976, 4432,10784, 4440,27168,
+    4448,6688, 4456,23072, 4464,14880, 4472,31264, 4488,17952, 4496,9760,
+    4504,26144, 4512,5664, 4520,22048, 4528,13856, 4536,30240, 4552,20000,
+    4560,11808, 4568,28192, 4576,7712, 4584,24096, 4592,15904, 4600,32288,
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+    20312,27592, 20328,23496, 20344,31688, 20376,26568, 20392,22472, 20408,30664,
+    20440,28616, 20456,24520, 20472,32712, 20504,24616, 20536,28712, 20568,26664,
+    20584,22568, 20600,30760, 20632,25640, 20648,21544, 20664,29736, 20696,27688,
+    20712,23592, 20728,31784, 20760,25128, 20776,21032, 20792,29224, 20824,27176,
+    20840,23080, 20856,31272, 20888,26152, 20904,22056, 20920,30248, 20952,28200,
+    20968,24104, 20984,32296, 21016,24872, 21048,28968, 21080,26920, 21096,22824,
+    21112,31016, 21144,25896, 21160,21800, 21176,29992, 21208,27944, 21224,23848,
+    21240,32040, 21272,25384, 21304,29480, 21336,27432, 21352,23336, 21368,31528,
+    21400,26408, 21416,22312, 21432,30504, 21464,28456, 21480,24360, 21496,32552,
+    21528,24744, 21560,28840, 21592,26792, 21608,22696, 21624,30888, 21656,25768,
+    21688,29864, 21720,27816, 21736,23720, 21752,31912, 21784,25256, 21816,29352,
+    21848,27304, 21864,23208, 21880,31400, 21912,26280, 21928,22184, 21944,30376,
+    21976,28328, 21992,24232, 22008,32424, 22040,25000, 22072,29096, 22104,27048,
+    22120,22952, 22136,31144, 22168,26024, 22200,30120, 22232,28072, 22248,23976,
+    22264,32168, 22296,25512, 22328,29608, 22360,27560, 22376,23464, 22392,31656,
+    22424,26536, 22456,30632, 22488,28584, 22504,24488, 22520,32680, 22552,24680,
+    22584,28776, 22616,26728, 22648,30824, 22680,25704, 22712,29800, 22744,27752,
+    22760,23656, 22776,31848, 22808,25192, 22840,29288, 22872,27240, 22888,23144,
+    22904,31336, 22936,26216, 22968,30312, 23000,28264, 23016,24168, 23032,32360,
+    23064,24936, 23096,29032, 23128,26984, 23160,31080, 23192,25960, 23224,30056,
+    23256,28008, 23272,23912, 23288,32104, 23320,25448, 23352,29544, 23384,27496,
+    23416,31592, 23448,26472, 23480,30568, 23512,28520, 23528,24424, 23544,32616,
+    23576,24808, 23608,28904, 23640,26856, 23672,30952, 23704,25832, 23736,29928,
+    23768,27880, 23800,31976, 23832,25320, 23864,29416, 23896,27368, 23928,31464,
+    23960,26344, 23992,30440, 24024,28392, 24040,24296, 24056,32488, 24088,25064,
+    24120,29160, 24152,27112, 24184,31208, 24216,26088, 24248,30184, 24280,28136,
+    24312,32232, 24344,25576, 24376,29672, 24408,27624, 24440,31720, 24472,26600,
+    24504,30696, 24536,28648, 24568,32744, 24632,28696, 24664,26648, 24696,30744,
+    24728,25624, 24760,29720, 24792,27672, 24824,31768, 24856,25112, 24888,29208,
+    24920,27160, 24952,31256, 24984,26136, 25016,30232, 25048,28184, 25080,32280,
+    25144,28952, 25176,26904, 25208,31000, 25240,25880, 25272,29976, 25304,27928,
+    25336,32024, 25400,29464, 25432,27416, 25464,31512, 25496,26392, 25528,30488,
+    25560,28440, 25592,32536, 25656,28824, 25688,26776, 25720,30872, 25784,29848,
+    25816,27800, 25848,31896, 25912,29336, 25944,27288, 25976,31384, 26008,26264,
+    26040,30360, 26072,28312, 26104,32408, 26168,29080, 26200,27032, 26232,31128,
+    26296,30104, 26328,28056, 26360,32152, 26424,29592, 26456,27544, 26488,31640,
+    26552,30616, 26584,28568, 26616,32664, 26680,28760, 26744,30808, 26808,29784,
+    26840,27736, 26872,31832, 26936,29272, 26968,27224, 27000,31320, 27064,30296,
+    27096,28248, 27128,32344, 27192,29016, 27256,31064, 27320,30040, 27352,27992,
+    27384,32088, 27448,29528, 27512,31576, 27576,30552, 27608,28504, 27640,32600,
+    27704,28888, 27768,30936, 27832,29912, 27896,31960, 27960,29400, 28024,31448,
+    28088,30424, 28120,28376, 28152,32472, 28216,29144, 28280,31192, 28344,30168,
+    28408,32216, 28472,29656, 28536,31704, 28600,30680, 28664,32728, 28792,30776,
+    28856,29752, 28920,31800, 28984,29240, 29048,31288, 29112,30264, 29176,32312,
+    29304,31032, 29368,30008, 29432,32056, 29560,31544, 29624,30520, 29688,32568,
+    29816,30904, 29944,31928, 30072,31416, 30136,30392, 30200,32440, 30328,31160,
+    30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376,
+    31480,32120, 31736,32632, 32248,32504
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
+/**
+  @par
+  Example code for Floating-point RFFT Twiddle factors Generation:
+  @par
+  
TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).' 

+  @par
+  Real and Imag values are in interleaved fashion
+*/
+const float32_t twiddleCoef_rfft_32[32] = {
+    0.000000000f,  1.000000000f,
+    0.195090322f,  0.980785280f,
+    0.382683432f,  0.923879533f,
+    0.555570233f,  0.831469612f,
+    0.707106781f,  0.707106781f,
+    0.831469612f,  0.555570233f,
+    0.923879533f,  0.382683432f,
+    0.980785280f,  0.195090322f,
+    1.000000000f,  0.000000000f,
+    0.980785280f, -0.195090322f,
+    0.923879533f, -0.382683432f,
+    0.831469612f, -0.555570233f,
+    0.707106781f, -0.707106781f,
+    0.555570233f, -0.831469612f,
+    0.382683432f, -0.923879533f,
+    0.195090322f, -0.980785280f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
+const float32_t twiddleCoef_rfft_64[64] = {
+    0.000000000000000f,  1.000000000000000f,
+    0.098017140329561f,  0.995184726672197f,
+    0.195090322016128f,  0.980785280403230f,
+    0.290284677254462f,  0.956940335732209f,
+    0.382683432365090f,  0.923879532511287f,
+    0.471396736825998f,  0.881921264348355f,
+    0.555570233019602f,  0.831469612302545f,
+    0.634393284163645f,  0.773010453362737f,
+    0.707106781186547f,  0.707106781186548f,
+    0.773010453362737f,  0.634393284163645f,
+    0.831469612302545f,  0.555570233019602f,
+    0.881921264348355f,  0.471396736825998f,
+    0.923879532511287f,  0.382683432365090f,
+    0.956940335732209f,  0.290284677254462f,
+    0.980785280403230f,  0.195090322016128f,
+    0.995184726672197f,  0.098017140329561f,
+    1.000000000000000f,  0.000000000000000f,
+    0.995184726672197f, -0.098017140329561f,
+    0.980785280403230f, -0.195090322016128f,
+    0.956940335732209f, -0.290284677254462f,
+    0.923879532511287f, -0.382683432365090f,
+    0.881921264348355f, -0.471396736825998f,
+    0.831469612302545f, -0.555570233019602f,
+    0.773010453362737f, -0.634393284163645f,
+    0.707106781186548f, -0.707106781186547f,
+    0.634393284163645f, -0.773010453362737f,
+    0.555570233019602f, -0.831469612302545f,
+    0.471396736825998f, -0.881921264348355f,
+    0.382683432365090f, -0.923879532511287f,
+    0.290284677254462f, -0.956940335732209f,
+    0.195090322016129f, -0.980785280403230f,
+    0.098017140329561f, -0.995184726672197f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
+const float32_t twiddleCoef_rfft_128[128] = {
+    0.000000000f,  1.000000000f,
+    0.049067674f,  0.998795456f,
+    0.098017140f,  0.995184727f,
+    0.146730474f,  0.989176510f,
+    0.195090322f,  0.980785280f,
+    0.242980180f,  0.970031253f,
+    0.290284677f,  0.956940336f,
+    0.336889853f,  0.941544065f,
+    0.382683432f,  0.923879533f,
+    0.427555093f,  0.903989293f,
+    0.471396737f,  0.881921264f,
+    0.514102744f,  0.857728610f,
+    0.555570233f,  0.831469612f,
+    0.595699304f,  0.803207531f,
+    0.634393284f,  0.773010453f,
+    0.671558955f,  0.740951125f,
+    0.707106781f,  0.707106781f,
+    0.740951125f,  0.671558955f,
+    0.773010453f,  0.634393284f,
+    0.803207531f,  0.595699304f,
+    0.831469612f,  0.555570233f,
+    0.857728610f,  0.514102744f,
+    0.881921264f,  0.471396737f,
+    0.903989293f,  0.427555093f,
+    0.923879533f,  0.382683432f,
+    0.941544065f,  0.336889853f,
+    0.956940336f,  0.290284677f,
+    0.970031253f,  0.242980180f,
+    0.980785280f,  0.195090322f,
+    0.989176510f,  0.146730474f,
+    0.995184727f,  0.098017140f,
+    0.998795456f,  0.049067674f,
+    1.000000000f,  0.000000000f,
+    0.998795456f, -0.049067674f,
+    0.995184727f, -0.098017140f,
+    0.989176510f, -0.146730474f,
+    0.980785280f, -0.195090322f,
+    0.970031253f, -0.242980180f,
+    0.956940336f, -0.290284677f,
+    0.941544065f, -0.336889853f,
+    0.923879533f, -0.382683432f,
+    0.903989293f, -0.427555093f,
+    0.881921264f, -0.471396737f,
+    0.857728610f, -0.514102744f,
+    0.831469612f, -0.555570233f,
+    0.803207531f, -0.595699304f,
+    0.773010453f, -0.634393284f,
+    0.740951125f, -0.671558955f,
+    0.707106781f, -0.707106781f,
+    0.671558955f, -0.740951125f,
+    0.634393284f, -0.773010453f,
+    0.595699304f, -0.803207531f,
+    0.555570233f, -0.831469612f,
+    0.514102744f, -0.857728610f,
+    0.471396737f, -0.881921264f,
+    0.427555093f, -0.903989293f,
+    0.382683432f, -0.923879533f,
+    0.336889853f, -0.941544065f,
+    0.290284677f, -0.956940336f,
+    0.242980180f, -0.970031253f,
+    0.195090322f, -0.980785280f,
+    0.146730474f, -0.989176510f,
+    0.098017140f, -0.995184727f,
+    0.049067674f, -0.998795456f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
+const float32_t twiddleCoef_rfft_256[256] = {
+    0.000000000f,  1.000000000f,
+    0.024541229f,  0.999698819f,
+    0.049067674f,  0.998795456f,
+    0.073564564f,  0.997290457f,
+    0.098017140f,  0.995184727f,
+    0.122410675f,  0.992479535f,
+    0.146730474f,  0.989176510f,
+    0.170961889f,  0.985277642f,
+    0.195090322f,  0.980785280f,
+    0.219101240f,  0.975702130f,
+    0.242980180f,  0.970031253f,
+    0.266712757f,  0.963776066f,
+    0.290284677f,  0.956940336f,
+    0.313681740f,  0.949528181f,
+    0.336889853f,  0.941544065f,
+    0.359895037f,  0.932992799f,
+    0.382683432f,  0.923879533f,
+    0.405241314f,  0.914209756f,
+    0.427555093f,  0.903989293f,
+    0.449611330f,  0.893224301f,
+    0.471396737f,  0.881921264f,
+    0.492898192f,  0.870086991f,
+    0.514102744f,  0.857728610f,
+    0.534997620f,  0.844853565f,
+    0.555570233f,  0.831469612f,
+    0.575808191f,  0.817584813f,
+    0.595699304f,  0.803207531f,
+    0.615231591f,  0.788346428f,
+    0.634393284f,  0.773010453f,
+    0.653172843f,  0.757208847f,
+    0.671558955f,  0.740951125f,
+    0.689540545f,  0.724247083f,
+    0.707106781f,  0.707106781f,
+    0.724247083f,  0.689540545f,
+    0.740951125f,  0.671558955f,
+    0.757208847f,  0.653172843f,
+    0.773010453f,  0.634393284f,
+    0.788346428f,  0.615231591f,
+    0.803207531f,  0.595699304f,
+    0.817584813f,  0.575808191f,
+    0.831469612f,  0.555570233f,
+    0.844853565f,  0.534997620f,
+    0.857728610f,  0.514102744f,
+    0.870086991f,  0.492898192f,
+    0.881921264f,  0.471396737f,
+    0.893224301f,  0.449611330f,
+    0.903989293f,  0.427555093f,
+    0.914209756f,  0.405241314f,
+    0.923879533f,  0.382683432f,
+    0.932992799f,  0.359895037f,
+    0.941544065f,  0.336889853f,
+    0.949528181f,  0.313681740f,
+    0.956940336f,  0.290284677f,
+    0.963776066f,  0.266712757f,
+    0.970031253f,  0.242980180f,
+    0.975702130f,  0.219101240f,
+    0.980785280f,  0.195090322f,
+    0.985277642f,  0.170961889f,
+    0.989176510f,  0.146730474f,
+    0.992479535f,  0.122410675f,
+    0.995184727f,  0.098017140f,
+    0.997290457f,  0.073564564f,
+    0.998795456f,  0.049067674f,
+    0.999698819f,  0.024541229f,
+    1.000000000f,  0.000000000f,
+    0.999698819f, -0.024541229f,
+    0.998795456f, -0.049067674f,
+    0.997290457f, -0.073564564f,
+    0.995184727f, -0.098017140f,
+    0.992479535f, -0.122410675f,
+    0.989176510f, -0.146730474f,
+    0.985277642f, -0.170961889f,
+    0.980785280f, -0.195090322f,
+    0.975702130f, -0.219101240f,
+    0.970031253f, -0.242980180f,
+    0.963776066f, -0.266712757f,
+    0.956940336f, -0.290284677f,
+    0.949528181f, -0.313681740f,
+    0.941544065f, -0.336889853f,
+    0.932992799f, -0.359895037f,
+    0.923879533f, -0.382683432f,
+    0.914209756f, -0.405241314f,
+    0.903989293f, -0.427555093f,
+    0.893224301f, -0.449611330f,
+    0.881921264f, -0.471396737f,
+    0.870086991f, -0.492898192f,
+    0.857728610f, -0.514102744f,
+    0.844853565f, -0.534997620f,
+    0.831469612f, -0.555570233f,
+    0.817584813f, -0.575808191f,
+    0.803207531f, -0.595699304f,
+    0.788346428f, -0.615231591f,
+    0.773010453f, -0.634393284f,
+    0.757208847f, -0.653172843f,
+    0.740951125f, -0.671558955f,
+    0.724247083f, -0.689540545f,
+    0.707106781f, -0.707106781f,
+    0.689540545f, -0.724247083f,
+    0.671558955f, -0.740951125f,
+    0.653172843f, -0.757208847f,
+    0.634393284f, -0.773010453f,
+    0.615231591f, -0.788346428f,
+    0.595699304f, -0.803207531f,
+    0.575808191f, -0.817584813f,
+    0.555570233f, -0.831469612f,
+    0.534997620f, -0.844853565f,
+    0.514102744f, -0.857728610f,
+    0.492898192f, -0.870086991f,
+    0.471396737f, -0.881921264f,
+    0.449611330f, -0.893224301f,
+    0.427555093f, -0.903989293f,
+    0.405241314f, -0.914209756f,
+    0.382683432f, -0.923879533f,
+    0.359895037f, -0.932992799f,
+    0.336889853f, -0.941544065f,
+    0.313681740f, -0.949528181f,
+    0.290284677f, -0.956940336f,
+    0.266712757f, -0.963776066f,
+    0.242980180f, -0.970031253f,
+    0.219101240f, -0.975702130f,
+    0.195090322f, -0.980785280f,
+    0.170961889f, -0.985277642f,
+    0.146730474f, -0.989176510f,
+    0.122410675f, -0.992479535f,
+    0.098017140f, -0.995184727f,
+    0.073564564f, -0.997290457f,
+    0.049067674f, -0.998795456f,
+    0.024541229f, -0.999698819f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
+const float32_t twiddleCoef_rfft_512[512] = {
+    0.000000000f,  1.000000000f,
+    0.012271538f,  0.999924702f,
+    0.024541229f,  0.999698819f,
+    0.036807223f,  0.999322385f,
+    0.049067674f,  0.998795456f,
+    0.061320736f,  0.998118113f,
+    0.073564564f,  0.997290457f,
+    0.085797312f,  0.996312612f,
+    0.098017140f,  0.995184727f,
+    0.110222207f,  0.993906970f,
+    0.122410675f,  0.992479535f,
+    0.134580709f,  0.990902635f,
+    0.146730474f,  0.989176510f,
+    0.158858143f,  0.987301418f,
+    0.170961889f,  0.985277642f,
+    0.183039888f,  0.983105487f,
+    0.195090322f,  0.980785280f,
+    0.207111376f,  0.978317371f,
+    0.219101240f,  0.975702130f,
+    0.231058108f,  0.972939952f,
+    0.242980180f,  0.970031253f,
+    0.254865660f,  0.966976471f,
+    0.266712757f,  0.963776066f,
+    0.278519689f,  0.960430519f,
+    0.290284677f,  0.956940336f,
+    0.302005949f,  0.953306040f,
+    0.313681740f,  0.949528181f,
+    0.325310292f,  0.945607325f,
+    0.336889853f,  0.941544065f,
+    0.348418680f,  0.937339012f,
+    0.359895037f,  0.932992799f,
+    0.371317194f,  0.928506080f,
+    0.382683432f,  0.923879533f,
+    0.393992040f,  0.919113852f,
+    0.405241314f,  0.914209756f,
+    0.416429560f,  0.909167983f,
+    0.427555093f,  0.903989293f,
+    0.438616239f,  0.898674466f,
+    0.449611330f,  0.893224301f,
+    0.460538711f,  0.887639620f,
+    0.471396737f,  0.881921264f,
+    0.482183772f,  0.876070094f,
+    0.492898192f,  0.870086991f,
+    0.503538384f,  0.863972856f,
+    0.514102744f,  0.857728610f,
+    0.524589683f,  0.851355193f,
+    0.534997620f,  0.844853565f,
+    0.545324988f,  0.838224706f,
+    0.555570233f,  0.831469612f,
+    0.565731811f,  0.824589303f,
+    0.575808191f,  0.817584813f,
+    0.585797857f,  0.810457198f,
+    0.595699304f,  0.803207531f,
+    0.605511041f,  0.795836905f,
+    0.615231591f,  0.788346428f,
+    0.624859488f,  0.780737229f,
+    0.634393284f,  0.773010453f,
+    0.643831543f,  0.765167266f,
+    0.653172843f,  0.757208847f,
+    0.662415778f,  0.749136395f,
+    0.671558955f,  0.740951125f,
+    0.680600998f,  0.732654272f,
+    0.689540545f,  0.724247083f,
+    0.698376249f,  0.715730825f,
+    0.707106781f,  0.707106781f,
+    0.715730825f,  0.698376249f,
+    0.724247083f,  0.689540545f,
+    0.732654272f,  0.680600998f,
+    0.740951125f,  0.671558955f,
+    0.749136395f,  0.662415778f,
+    0.757208847f,  0.653172843f,
+    0.765167266f,  0.643831543f,
+    0.773010453f,  0.634393284f,
+    0.780737229f,  0.624859488f,
+    0.788346428f,  0.615231591f,
+    0.795836905f,  0.605511041f,
+    0.803207531f,  0.595699304f,
+    0.810457198f,  0.585797857f,
+    0.817584813f,  0.575808191f,
+    0.824589303f,  0.565731811f,
+    0.831469612f,  0.555570233f,
+    0.838224706f,  0.545324988f,
+    0.844853565f,  0.534997620f,
+    0.851355193f,  0.524589683f,
+    0.857728610f,  0.514102744f,
+    0.863972856f,  0.503538384f,
+    0.870086991f,  0.492898192f,
+    0.876070094f,  0.482183772f,
+    0.881921264f,  0.471396737f,
+    0.887639620f,  0.460538711f,
+    0.893224301f,  0.449611330f,
+    0.898674466f,  0.438616239f,
+    0.903989293f,  0.427555093f,
+    0.909167983f,  0.416429560f,
+    0.914209756f,  0.405241314f,
+    0.919113852f,  0.393992040f,
+    0.923879533f,  0.382683432f,
+    0.928506080f,  0.371317194f,
+    0.932992799f,  0.359895037f,
+    0.937339012f,  0.348418680f,
+    0.941544065f,  0.336889853f,
+    0.945607325f,  0.325310292f,
+    0.949528181f,  0.313681740f,
+    0.953306040f,  0.302005949f,
+    0.956940336f,  0.290284677f,
+    0.960430519f,  0.278519689f,
+    0.963776066f,  0.266712757f,
+    0.966976471f,  0.254865660f,
+    0.970031253f,  0.242980180f,
+    0.972939952f,  0.231058108f,
+    0.975702130f,  0.219101240f,
+    0.978317371f,  0.207111376f,
+    0.980785280f,  0.195090322f,
+    0.983105487f,  0.183039888f,
+    0.985277642f,  0.170961889f,
+    0.987301418f,  0.158858143f,
+    0.989176510f,  0.146730474f,
+    0.990902635f,  0.134580709f,
+    0.992479535f,  0.122410675f,
+    0.993906970f,  0.110222207f,
+    0.995184727f,  0.098017140f,
+    0.996312612f,  0.085797312f,
+    0.997290457f,  0.073564564f,
+    0.998118113f,  0.061320736f,
+    0.998795456f,  0.049067674f,
+    0.999322385f,  0.036807223f,
+    0.999698819f,  0.024541229f,
+    0.999924702f,  0.012271538f,
+    1.000000000f,  0.000000000f,
+    0.999924702f, -0.012271538f,
+    0.999698819f, -0.024541229f,
+    0.999322385f, -0.036807223f,
+    0.998795456f, -0.049067674f,
+    0.998118113f, -0.061320736f,
+    0.997290457f, -0.073564564f,
+    0.996312612f, -0.085797312f,
+    0.995184727f, -0.098017140f,
+    0.993906970f, -0.110222207f,
+    0.992479535f, -0.122410675f,
+    0.990902635f, -0.134580709f,
+    0.989176510f, -0.146730474f,
+    0.987301418f, -0.158858143f,
+    0.985277642f, -0.170961889f,
+    0.983105487f, -0.183039888f,
+    0.980785280f, -0.195090322f,
+    0.978317371f, -0.207111376f,
+    0.975702130f, -0.219101240f,
+    0.972939952f, -0.231058108f,
+    0.970031253f, -0.242980180f,
+    0.966976471f, -0.254865660f,
+    0.963776066f, -0.266712757f,
+    0.960430519f, -0.278519689f,
+    0.956940336f, -0.290284677f,
+    0.953306040f, -0.302005949f,
+    0.949528181f, -0.313681740f,
+    0.945607325f, -0.325310292f,
+    0.941544065f, -0.336889853f,
+    0.937339012f, -0.348418680f,
+    0.932992799f, -0.359895037f,
+    0.928506080f, -0.371317194f,
+    0.923879533f, -0.382683432f,
+    0.919113852f, -0.393992040f,
+    0.914209756f, -0.405241314f,
+    0.909167983f, -0.416429560f,
+    0.903989293f, -0.427555093f,
+    0.898674466f, -0.438616239f,
+    0.893224301f, -0.449611330f,
+    0.887639620f, -0.460538711f,
+    0.881921264f, -0.471396737f,
+    0.876070094f, -0.482183772f,
+    0.870086991f, -0.492898192f,
+    0.863972856f, -0.503538384f,
+    0.857728610f, -0.514102744f,
+    0.851355193f, -0.524589683f,
+    0.844853565f, -0.534997620f,
+    0.838224706f, -0.545324988f,
+    0.831469612f, -0.555570233f,
+    0.824589303f, -0.565731811f,
+    0.817584813f, -0.575808191f,
+    0.810457198f, -0.585797857f,
+    0.803207531f, -0.595699304f,
+    0.795836905f, -0.605511041f,
+    0.788346428f, -0.615231591f,
+    0.780737229f, -0.624859488f,
+    0.773010453f, -0.634393284f,
+    0.765167266f, -0.643831543f,
+    0.757208847f, -0.653172843f,
+    0.749136395f, -0.662415778f,
+    0.740951125f, -0.671558955f,
+    0.732654272f, -0.680600998f,
+    0.724247083f, -0.689540545f,
+    0.715730825f, -0.698376249f,
+    0.707106781f, -0.707106781f,
+    0.698376249f, -0.715730825f,
+    0.689540545f, -0.724247083f,
+    0.680600998f, -0.732654272f,
+    0.671558955f, -0.740951125f,
+    0.662415778f, -0.749136395f,
+    0.653172843f, -0.757208847f,
+    0.643831543f, -0.765167266f,
+    0.634393284f, -0.773010453f,
+    0.624859488f, -0.780737229f,
+    0.615231591f, -0.788346428f,
+    0.605511041f, -0.795836905f,
+    0.595699304f, -0.803207531f,
+    0.585797857f, -0.810457198f,
+    0.575808191f, -0.817584813f,
+    0.565731811f, -0.824589303f,
+    0.555570233f, -0.831469612f,
+    0.545324988f, -0.838224706f,
+    0.534997620f, -0.844853565f,
+    0.524589683f, -0.851355193f,
+    0.514102744f, -0.857728610f,
+    0.503538384f, -0.863972856f,
+    0.492898192f, -0.870086991f,
+    0.482183772f, -0.876070094f,
+    0.471396737f, -0.881921264f,
+    0.460538711f, -0.887639620f,
+    0.449611330f, -0.893224301f,
+    0.438616239f, -0.898674466f,
+    0.427555093f, -0.903989293f,
+    0.416429560f, -0.909167983f,
+    0.405241314f, -0.914209756f,
+    0.393992040f, -0.919113852f,
+    0.382683432f, -0.923879533f,
+    0.371317194f, -0.928506080f,
+    0.359895037f, -0.932992799f,
+    0.348418680f, -0.937339012f,
+    0.336889853f, -0.941544065f,
+    0.325310292f, -0.945607325f,
+    0.313681740f, -0.949528181f,
+    0.302005949f, -0.953306040f,
+    0.290284677f, -0.956940336f,
+    0.278519689f, -0.960430519f,
+    0.266712757f, -0.963776066f,
+    0.254865660f, -0.966976471f,
+    0.242980180f, -0.970031253f,
+    0.231058108f, -0.972939952f,
+    0.219101240f, -0.975702130f,
+    0.207111376f, -0.978317371f,
+    0.195090322f, -0.980785280f,
+    0.183039888f, -0.983105487f,
+    0.170961889f, -0.985277642f,
+    0.158858143f, -0.987301418f,
+    0.146730474f, -0.989176510f,
+    0.134580709f, -0.990902635f,
+    0.122410675f, -0.992479535f,
+    0.110222207f, -0.993906970f,
+    0.098017140f, -0.995184727f,
+    0.085797312f, -0.996312612f,
+    0.073564564f, -0.997290457f,
+    0.061320736f, -0.998118113f,
+    0.049067674f, -0.998795456f,
+    0.036807223f, -0.999322385f,
+    0.024541229f, -0.999698819f,
+    0.012271538f, -0.999924702f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
+const float32_t twiddleCoef_rfft_1024[1024] = {
+    0.000000000f,  1.000000000f,
+    0.006135885f,  0.999981175f,
+    0.012271538f,  0.999924702f,
+    0.018406730f,  0.999830582f,
+    0.024541229f,  0.999698819f,
+    0.030674803f,  0.999529418f,
+    0.036807223f,  0.999322385f,
+    0.042938257f,  0.999077728f,
+    0.049067674f,  0.998795456f,
+    0.055195244f,  0.998475581f,
+    0.061320736f,  0.998118113f,
+    0.067443920f,  0.997723067f,
+    0.073564564f,  0.997290457f,
+    0.079682438f,  0.996820299f,
+    0.085797312f,  0.996312612f,
+    0.091908956f,  0.995767414f,
+    0.098017140f,  0.995184727f,
+    0.104121634f,  0.994564571f,
+    0.110222207f,  0.993906970f,
+    0.116318631f,  0.993211949f,
+    0.122410675f,  0.992479535f,
+    0.128498111f,  0.991709754f,
+    0.134580709f,  0.990902635f,
+    0.140658239f,  0.990058210f,
+    0.146730474f,  0.989176510f,
+    0.152797185f,  0.988257568f,
+    0.158858143f,  0.987301418f,
+    0.164913120f,  0.986308097f,
+    0.170961889f,  0.985277642f,
+    0.177004220f,  0.984210092f,
+    0.183039888f,  0.983105487f,
+    0.189068664f,  0.981963869f,
+    0.195090322f,  0.980785280f,
+    0.201104635f,  0.979569766f,
+    0.207111376f,  0.978317371f,
+    0.213110320f,  0.977028143f,
+    0.219101240f,  0.975702130f,
+    0.225083911f,  0.974339383f,
+    0.231058108f,  0.972939952f,
+    0.237023606f,  0.971503891f,
+    0.242980180f,  0.970031253f,
+    0.248927606f,  0.968522094f,
+    0.254865660f,  0.966976471f,
+    0.260794118f,  0.965394442f,
+    0.266712757f,  0.963776066f,
+    0.272621355f,  0.962121404f,
+    0.278519689f,  0.960430519f,
+    0.284407537f,  0.958703475f,
+    0.290284677f,  0.956940336f,
+    0.296150888f,  0.955141168f,
+    0.302005949f,  0.953306040f,
+    0.307849640f,  0.951435021f,
+    0.313681740f,  0.949528181f,
+    0.319502031f,  0.947585591f,
+    0.325310292f,  0.945607325f,
+    0.331106306f,  0.943593458f,
+    0.336889853f,  0.941544065f,
+    0.342660717f,  0.939459224f,
+    0.348418680f,  0.937339012f,
+    0.354163525f,  0.935183510f,
+    0.359895037f,  0.932992799f,
+    0.365612998f,  0.930766961f,
+    0.371317194f,  0.928506080f,
+    0.377007410f,  0.926210242f,
+    0.382683432f,  0.923879533f,
+    0.388345047f,  0.921514039f,
+    0.393992040f,  0.919113852f,
+    0.399624200f,  0.916679060f,
+    0.405241314f,  0.914209756f,
+    0.410843171f,  0.911706032f,
+    0.416429560f,  0.909167983f,
+    0.422000271f,  0.906595705f,
+    0.427555093f,  0.903989293f,
+    0.433093819f,  0.901348847f,
+    0.438616239f,  0.898674466f,
+    0.444122145f,  0.895966250f,
+    0.449611330f,  0.893224301f,
+    0.455083587f,  0.890448723f,
+    0.460538711f,  0.887639620f,
+    0.465976496f,  0.884797098f,
+    0.471396737f,  0.881921264f,
+    0.476799230f,  0.879012226f,
+    0.482183772f,  0.876070094f,
+    0.487550160f,  0.873094978f,
+    0.492898192f,  0.870086991f,
+    0.498227667f,  0.867046246f,
+    0.503538384f,  0.863972856f,
+    0.508830143f,  0.860866939f,
+    0.514102744f,  0.857728610f,
+    0.519355990f,  0.854557988f,
+    0.524589683f,  0.851355193f,
+    0.529803625f,  0.848120345f,
+    0.534997620f,  0.844853565f,
+    0.540171473f,  0.841554977f,
+    0.545324988f,  0.838224706f,
+    0.550457973f,  0.834862875f,
+    0.555570233f,  0.831469612f,
+    0.560661576f,  0.828045045f,
+    0.565731811f,  0.824589303f,
+    0.570780746f,  0.821102515f,
+    0.575808191f,  0.817584813f,
+    0.580813958f,  0.814036330f,
+    0.585797857f,  0.810457198f,
+    0.590759702f,  0.806847554f,
+    0.595699304f,  0.803207531f,
+    0.600616479f,  0.799537269f,
+    0.605511041f,  0.795836905f,
+    0.610382806f,  0.792106577f,
+    0.615231591f,  0.788346428f,
+    0.620057212f,  0.784556597f,
+    0.624859488f,  0.780737229f,
+    0.629638239f,  0.776888466f,
+    0.634393284f,  0.773010453f,
+    0.639124445f,  0.769103338f,
+    0.643831543f,  0.765167266f,
+    0.648514401f,  0.761202385f,
+    0.653172843f,  0.757208847f,
+    0.657806693f,  0.753186799f,
+    0.662415778f,  0.749136395f,
+    0.666999922f,  0.745057785f,
+    0.671558955f,  0.740951125f,
+    0.676092704f,  0.736816569f,
+    0.680600998f,  0.732654272f,
+    0.685083668f,  0.728464390f,
+    0.689540545f,  0.724247083f,
+    0.693971461f,  0.720002508f,
+    0.698376249f,  0.715730825f,
+    0.702754744f,  0.711432196f,
+    0.707106781f,  0.707106781f,
+    0.711432196f,  0.702754744f,
+    0.715730825f,  0.698376249f,
+    0.720002508f,  0.693971461f,
+    0.724247083f,  0.689540545f,
+    0.728464390f,  0.685083668f,
+    0.732654272f,  0.680600998f,
+    0.736816569f,  0.676092704f,
+    0.740951125f,  0.671558955f,
+    0.745057785f,  0.666999922f,
+    0.749136395f,  0.662415778f,
+    0.753186799f,  0.657806693f,
+    0.757208847f,  0.653172843f,
+    0.761202385f,  0.648514401f,
+    0.765167266f,  0.643831543f,
+    0.769103338f,  0.639124445f,
+    0.773010453f,  0.634393284f,
+    0.776888466f,  0.629638239f,
+    0.780737229f,  0.624859488f,
+    0.784556597f,  0.620057212f,
+    0.788346428f,  0.615231591f,
+    0.792106577f,  0.610382806f,
+    0.795836905f,  0.605511041f,
+    0.799537269f,  0.600616479f,
+    0.803207531f,  0.595699304f,
+    0.806847554f,  0.590759702f,
+    0.810457198f,  0.585797857f,
+    0.814036330f,  0.580813958f,
+    0.817584813f,  0.575808191f,
+    0.821102515f,  0.570780746f,
+    0.824589303f,  0.565731811f,
+    0.828045045f,  0.560661576f,
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+    0.834862875f,  0.550457973f,
+    0.838224706f,  0.545324988f,
+    0.841554977f,  0.540171473f,
+    0.844853565f,  0.534997620f,
+    0.848120345f,  0.529803625f,
+    0.851355193f,  0.524589683f,
+    0.854557988f,  0.519355990f,
+    0.857728610f,  0.514102744f,
+    0.860866939f,  0.508830143f,
+    0.863972856f,  0.503538384f,
+    0.867046246f,  0.498227667f,
+    0.870086991f,  0.492898192f,
+    0.873094978f,  0.487550160f,
+    0.876070094f,  0.482183772f,
+    0.879012226f,  0.476799230f,
+    0.881921264f,  0.471396737f,
+    0.884797098f,  0.465976496f,
+    0.887639620f,  0.460538711f,
+    0.890448723f,  0.455083587f,
+    0.893224301f,  0.449611330f,
+    0.895966250f,  0.444122145f,
+    0.898674466f,  0.438616239f,
+    0.901348847f,  0.433093819f,
+    0.903989293f,  0.427555093f,
+    0.906595705f,  0.422000271f,
+    0.909167983f,  0.416429560f,
+    0.911706032f,  0.410843171f,
+    0.914209756f,  0.405241314f,
+    0.916679060f,  0.399624200f,
+    0.919113852f,  0.393992040f,
+    0.921514039f,  0.388345047f,
+    0.923879533f,  0.382683432f,
+    0.926210242f,  0.377007410f,
+    0.928506080f,  0.371317194f,
+    0.930766961f,  0.365612998f,
+    0.932992799f,  0.359895037f,
+    0.935183510f,  0.354163525f,
+    0.937339012f,  0.348418680f,
+    0.939459224f,  0.342660717f,
+    0.941544065f,  0.336889853f,
+    0.943593458f,  0.331106306f,
+    0.945607325f,  0.325310292f,
+    0.947585591f,  0.319502031f,
+    0.949528181f,  0.313681740f,
+    0.951435021f,  0.307849640f,
+    0.953306040f,  0.302005949f,
+    0.955141168f,  0.296150888f,
+    0.956940336f,  0.290284677f,
+    0.958703475f,  0.284407537f,
+    0.960430519f,  0.278519689f,
+    0.962121404f,  0.272621355f,
+    0.963776066f,  0.266712757f,
+    0.965394442f,  0.260794118f,
+    0.966976471f,  0.254865660f,
+    0.968522094f,  0.248927606f,
+    0.970031253f,  0.242980180f,
+    0.971503891f,  0.237023606f,
+    0.972939952f,  0.231058108f,
+    0.974339383f,  0.225083911f,
+    0.975702130f,  0.219101240f,
+    0.977028143f,  0.213110320f,
+    0.978317371f,  0.207111376f,
+    0.979569766f,  0.201104635f,
+    0.980785280f,  0.195090322f,
+    0.981963869f,  0.189068664f,
+    0.983105487f,  0.183039888f,
+    0.984210092f,  0.177004220f,
+    0.985277642f,  0.170961889f,
+    0.986308097f,  0.164913120f,
+    0.987301418f,  0.158858143f,
+    0.988257568f,  0.152797185f,
+    0.989176510f,  0.146730474f,
+    0.990058210f,  0.140658239f,
+    0.990902635f,  0.134580709f,
+    0.991709754f,  0.128498111f,
+    0.992479535f,  0.122410675f,
+    0.993211949f,  0.116318631f,
+    0.993906970f,  0.110222207f,
+    0.994564571f,  0.104121634f,
+    0.995184727f,  0.098017140f,
+    0.995767414f,  0.091908956f,
+    0.996312612f,  0.085797312f,
+    0.996820299f,  0.079682438f,
+    0.997290457f,  0.073564564f,
+    0.997723067f,  0.067443920f,
+    0.998118113f,  0.061320736f,
+    0.998475581f,  0.055195244f,
+    0.998795456f,  0.049067674f,
+    0.999077728f,  0.042938257f,
+    0.999322385f,  0.036807223f,
+    0.999529418f,  0.030674803f,
+    0.999698819f,  0.024541229f,
+    0.999830582f,  0.018406730f,
+    0.999924702f,  0.012271538f,
+    0.999981175f,  0.006135885f,
+    1.000000000f,  0.000000000f,
+    0.999981175f, -0.006135885f,
+    0.999924702f, -0.012271538f,
+    0.999830582f, -0.018406730f,
+    0.999698819f, -0.024541229f,
+    0.999529418f, -0.030674803f,
+    0.999322385f, -0.036807223f,
+    0.999077728f, -0.042938257f,
+    0.998795456f, -0.049067674f,
+    0.998475581f, -0.055195244f,
+    0.998118113f, -0.061320736f,
+    0.997723067f, -0.067443920f,
+    0.997290457f, -0.073564564f,
+    0.996820299f, -0.079682438f,
+    0.996312612f, -0.085797312f,
+    0.995767414f, -0.091908956f,
+    0.995184727f, -0.098017140f,
+    0.994564571f, -0.104121634f,
+    0.993906970f, -0.110222207f,
+    0.993211949f, -0.116318631f,
+    0.992479535f, -0.122410675f,
+    0.991709754f, -0.128498111f,
+    0.990902635f, -0.134580709f,
+    0.990058210f, -0.140658239f,
+    0.989176510f, -0.146730474f,
+    0.988257568f, -0.152797185f,
+    0.987301418f, -0.158858143f,
+    0.986308097f, -0.164913120f,
+    0.985277642f, -0.170961889f,
+    0.984210092f, -0.177004220f,
+    0.983105487f, -0.183039888f,
+    0.981963869f, -0.189068664f,
+    0.980785280f, -0.195090322f,
+    0.979569766f, -0.201104635f,
+    0.978317371f, -0.207111376f,
+    0.977028143f, -0.213110320f,
+    0.975702130f, -0.219101240f,
+    0.974339383f, -0.225083911f,
+    0.972939952f, -0.231058108f,
+    0.971503891f, -0.237023606f,
+    0.970031253f, -0.242980180f,
+    0.968522094f, -0.248927606f,
+    0.966976471f, -0.254865660f,
+    0.965394442f, -0.260794118f,
+    0.963776066f, -0.266712757f,
+    0.962121404f, -0.272621355f,
+    0.960430519f, -0.278519689f,
+    0.958703475f, -0.284407537f,
+    0.956940336f, -0.290284677f,
+    0.955141168f, -0.296150888f,
+    0.953306040f, -0.302005949f,
+    0.951435021f, -0.307849640f,
+    0.949528181f, -0.313681740f,
+    0.947585591f, -0.319502031f,
+    0.945607325f, -0.325310292f,
+    0.943593458f, -0.331106306f,
+    0.941544065f, -0.336889853f,
+    0.939459224f, -0.342660717f,
+    0.937339012f, -0.348418680f,
+    0.935183510f, -0.354163525f,
+    0.932992799f, -0.359895037f,
+    0.930766961f, -0.365612998f,
+    0.928506080f, -0.371317194f,
+    0.926210242f, -0.377007410f,
+    0.923879533f, -0.382683432f,
+    0.921514039f, -0.388345047f,
+    0.919113852f, -0.393992040f,
+    0.916679060f, -0.399624200f,
+    0.914209756f, -0.405241314f,
+    0.911706032f, -0.410843171f,
+    0.909167983f, -0.416429560f,
+    0.906595705f, -0.422000271f,
+    0.903989293f, -0.427555093f,
+    0.901348847f, -0.433093819f,
+    0.898674466f, -0.438616239f,
+    0.895966250f, -0.444122145f,
+    0.893224301f, -0.449611330f,
+    0.890448723f, -0.455083587f,
+    0.887639620f, -0.460538711f,
+    0.884797098f, -0.465976496f,
+    0.881921264f, -0.471396737f,
+    0.879012226f, -0.476799230f,
+    0.876070094f, -0.482183772f,
+    0.873094978f, -0.487550160f,
+    0.870086991f, -0.492898192f,
+    0.867046246f, -0.498227667f,
+    0.863972856f, -0.503538384f,
+    0.860866939f, -0.508830143f,
+    0.857728610f, -0.514102744f,
+    0.854557988f, -0.519355990f,
+    0.851355193f, -0.524589683f,
+    0.848120345f, -0.529803625f,
+    0.844853565f, -0.534997620f,
+    0.841554977f, -0.540171473f,
+    0.838224706f, -0.545324988f,
+    0.834862875f, -0.550457973f,
+    0.831469612f, -0.555570233f,
+    0.828045045f, -0.560661576f,
+    0.824589303f, -0.565731811f,
+    0.821102515f, -0.570780746f,
+    0.817584813f, -0.575808191f,
+    0.814036330f, -0.580813958f,
+    0.810457198f, -0.585797857f,
+    0.806847554f, -0.590759702f,
+    0.803207531f, -0.595699304f,
+    0.799537269f, -0.600616479f,
+    0.795836905f, -0.605511041f,
+    0.792106577f, -0.610382806f,
+    0.788346428f, -0.615231591f,
+    0.784556597f, -0.620057212f,
+    0.780737229f, -0.624859488f,
+    0.776888466f, -0.629638239f,
+    0.773010453f, -0.634393284f,
+    0.769103338f, -0.639124445f,
+    0.765167266f, -0.643831543f,
+    0.761202385f, -0.648514401f,
+    0.757208847f, -0.653172843f,
+    0.753186799f, -0.657806693f,
+    0.749136395f, -0.662415778f,
+    0.745057785f, -0.666999922f,
+    0.740951125f, -0.671558955f,
+    0.736816569f, -0.676092704f,
+    0.732654272f, -0.680600998f,
+    0.728464390f, -0.685083668f,
+    0.724247083f, -0.689540545f,
+    0.720002508f, -0.693971461f,
+    0.715730825f, -0.698376249f,
+    0.711432196f, -0.702754744f,
+    0.707106781f, -0.707106781f,
+    0.702754744f, -0.711432196f,
+    0.698376249f, -0.715730825f,
+    0.693971461f, -0.720002508f,
+    0.689540545f, -0.724247083f,
+    0.685083668f, -0.728464390f,
+    0.680600998f, -0.732654272f,
+    0.676092704f, -0.736816569f,
+    0.671558955f, -0.740951125f,
+    0.666999922f, -0.745057785f,
+    0.662415778f, -0.749136395f,
+    0.657806693f, -0.753186799f,
+    0.653172843f, -0.757208847f,
+    0.648514401f, -0.761202385f,
+    0.643831543f, -0.765167266f,
+    0.639124445f, -0.769103338f,
+    0.634393284f, -0.773010453f,
+    0.629638239f, -0.776888466f,
+    0.624859488f, -0.780737229f,
+    0.620057212f, -0.784556597f,
+    0.615231591f, -0.788346428f,
+    0.610382806f, -0.792106577f,
+    0.605511041f, -0.795836905f,
+    0.600616479f, -0.799537269f,
+    0.595699304f, -0.803207531f,
+    0.590759702f, -0.806847554f,
+    0.585797857f, -0.810457198f,
+    0.580813958f, -0.814036330f,
+    0.575808191f, -0.817584813f,
+    0.570780746f, -0.821102515f,
+    0.565731811f, -0.824589303f,
+    0.560661576f, -0.828045045f,
+    0.555570233f, -0.831469612f,
+    0.550457973f, -0.834862875f,
+    0.545324988f, -0.838224706f,
+    0.540171473f, -0.841554977f,
+    0.534997620f, -0.844853565f,
+    0.529803625f, -0.848120345f,
+    0.524589683f, -0.851355193f,
+    0.519355990f, -0.854557988f,
+    0.514102744f, -0.857728610f,
+    0.508830143f, -0.860866939f,
+    0.503538384f, -0.863972856f,
+    0.498227667f, -0.867046246f,
+    0.492898192f, -0.870086991f,
+    0.487550160f, -0.873094978f,
+    0.482183772f, -0.876070094f,
+    0.476799230f, -0.879012226f,
+    0.471396737f, -0.881921264f,
+    0.465976496f, -0.884797098f,
+    0.460538711f, -0.887639620f,
+    0.455083587f, -0.890448723f,
+    0.449611330f, -0.893224301f,
+    0.444122145f, -0.895966250f,
+    0.438616239f, -0.898674466f,
+    0.433093819f, -0.901348847f,
+    0.427555093f, -0.903989293f,
+    0.422000271f, -0.906595705f,
+    0.416429560f, -0.909167983f,
+    0.410843171f, -0.911706032f,
+    0.405241314f, -0.914209756f,
+    0.399624200f, -0.916679060f,
+    0.393992040f, -0.919113852f,
+    0.388345047f, -0.921514039f,
+    0.382683432f, -0.923879533f,
+    0.377007410f, -0.926210242f,
+    0.371317194f, -0.928506080f,
+    0.365612998f, -0.930766961f,
+    0.359895037f, -0.932992799f,
+    0.354163525f, -0.935183510f,
+    0.348418680f, -0.937339012f,
+    0.342660717f, -0.939459224f,
+    0.336889853f, -0.941544065f,
+    0.331106306f, -0.943593458f,
+    0.325310292f, -0.945607325f,
+    0.319502031f, -0.947585591f,
+    0.313681740f, -0.949528181f,
+    0.307849640f, -0.951435021f,
+    0.302005949f, -0.953306040f,
+    0.296150888f, -0.955141168f,
+    0.290284677f, -0.956940336f,
+    0.284407537f, -0.958703475f,
+    0.278519689f, -0.960430519f,
+    0.272621355f, -0.962121404f,
+    0.266712757f, -0.963776066f,
+    0.260794118f, -0.965394442f,
+    0.254865660f, -0.966976471f,
+    0.248927606f, -0.968522094f,
+    0.242980180f, -0.970031253f,
+    0.237023606f, -0.971503891f,
+    0.231058108f, -0.972939952f,
+    0.225083911f, -0.974339383f,
+    0.219101240f, -0.975702130f,
+    0.213110320f, -0.977028143f,
+    0.207111376f, -0.978317371f,
+    0.201104635f, -0.979569766f,
+    0.195090322f, -0.980785280f,
+    0.189068664f, -0.981963869f,
+    0.183039888f, -0.983105487f,
+    0.177004220f, -0.984210092f,
+    0.170961889f, -0.985277642f,
+    0.164913120f, -0.986308097f,
+    0.158858143f, -0.987301418f,
+    0.152797185f, -0.988257568f,
+    0.146730474f, -0.989176510f,
+    0.140658239f, -0.990058210f,
+    0.134580709f, -0.990902635f,
+    0.128498111f, -0.991709754f,
+    0.122410675f, -0.992479535f,
+    0.116318631f, -0.993211949f,
+    0.110222207f, -0.993906970f,
+    0.104121634f, -0.994564571f,
+    0.098017140f, -0.995184727f,
+    0.091908956f, -0.995767414f,
+    0.085797312f, -0.996312612f,
+    0.079682438f, -0.996820299f,
+    0.073564564f, -0.997290457f,
+    0.067443920f, -0.997723067f,
+    0.061320736f, -0.998118113f,
+    0.055195244f, -0.998475581f,
+    0.049067674f, -0.998795456f,
+    0.042938257f, -0.999077728f,
+    0.036807223f, -0.999322385f,
+    0.030674803f, -0.999529418f,
+    0.024541229f, -0.999698819f,
+    0.018406730f, -0.999830582f,
+    0.012271538f, -0.999924702f,
+    0.006135885f, -0.999981175f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
+const float32_t twiddleCoef_rfft_2048[2048] = {
+    0.000000000f,  1.000000000f,
+    0.003067957f,  0.999995294f,
+    0.006135885f,  0.999981175f,
+    0.009203755f,  0.999957645f,
+    0.012271538f,  0.999924702f,
+    0.015339206f,  0.999882347f,
+    0.018406730f,  0.999830582f,
+    0.021474080f,  0.999769405f,
+    0.024541229f,  0.999698819f,
+    0.027608146f,  0.999618822f,
+    0.030674803f,  0.999529418f,
+    0.033741172f,  0.999430605f,
+    0.036807223f,  0.999322385f,
+    0.039872928f,  0.999204759f,
+    0.042938257f,  0.999077728f,
+    0.046003182f,  0.998941293f,
+    0.049067674f,  0.998795456f,
+    0.052131705f,  0.998640218f,
+    0.055195244f,  0.998475581f,
+    0.058258265f,  0.998301545f,
+    0.061320736f,  0.998118113f,
+    0.064382631f,  0.997925286f,
+    0.067443920f,  0.997723067f,
+    0.070504573f,  0.997511456f,
+    0.073564564f,  0.997290457f,
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+    0.610382806f, -0.792106577f,
+    0.607949785f, -0.793975478f,
+    0.605511041f, -0.795836905f,
+    0.603066599f, -0.797690841f,
+    0.600616479f, -0.799537269f,
+    0.598160707f, -0.801376172f,
+    0.595699304f, -0.803207531f,
+    0.593232295f, -0.805031331f,
+    0.590759702f, -0.806847554f,
+    0.588281548f, -0.808656182f,
+    0.585797857f, -0.810457198f,
+    0.583308653f, -0.812250587f,
+    0.580813958f, -0.814036330f,
+    0.578313796f, -0.815814411f,
+    0.575808191f, -0.817584813f,
+    0.573297167f, -0.819347520f,
+    0.570780746f, -0.821102515f,
+    0.568258953f, -0.822849781f,
+    0.565731811f, -0.824589303f,
+    0.563199344f, -0.826321063f,
+    0.560661576f, -0.828045045f,
+    0.558118531f, -0.829761234f,
+    0.555570233f, -0.831469612f,
+    0.553016706f, -0.833170165f,
+    0.550457973f, -0.834862875f,
+    0.547894059f, -0.836547727f,
+    0.545324988f, -0.838224706f,
+    0.542750785f, -0.839893794f,
+    0.540171473f, -0.841554977f,
+    0.537587076f, -0.843208240f,
+    0.534997620f, -0.844853565f,
+    0.532403128f, -0.846490939f,
+    0.529803625f, -0.848120345f,
+    0.527199135f, -0.849741768f,
+    0.524589683f, -0.851355193f,
+    0.521975293f, -0.852960605f,
+    0.519355990f, -0.854557988f,
+    0.516731799f, -0.856147328f,
+    0.514102744f, -0.857728610f,
+    0.511468850f, -0.859301818f,
+    0.508830143f, -0.860866939f,
+    0.506186645f, -0.862423956f,
+    0.503538384f, -0.863972856f,
+    0.500885383f, -0.865513624f,
+    0.498227667f, -0.867046246f,
+    0.495565262f, -0.868570706f,
+    0.492898192f, -0.870086991f,
+    0.490226483f, -0.871595087f,
+    0.487550160f, -0.873094978f,
+    0.484869248f, -0.874586652f,
+    0.482183772f, -0.876070094f,
+    0.479493758f, -0.877545290f,
+    0.476799230f, -0.879012226f,
+    0.474100215f, -0.880470889f,
+    0.471396737f, -0.881921264f,
+    0.468688822f, -0.883363339f,
+    0.465976496f, -0.884797098f,
+    0.463259784f, -0.886222530f,
+    0.460538711f, -0.887639620f,
+    0.457813304f, -0.889048356f,
+    0.455083587f, -0.890448723f,
+    0.452349587f, -0.891840709f,
+    0.449611330f, -0.893224301f,
+    0.446868840f, -0.894599486f,
+    0.444122145f, -0.895966250f,
+    0.441371269f, -0.897324581f,
+    0.438616239f, -0.898674466f,
+    0.435857080f, -0.900015892f,
+    0.433093819f, -0.901348847f,
+    0.430326481f, -0.902673318f,
+    0.427555093f, -0.903989293f,
+    0.424779681f, -0.905296759f,
+    0.422000271f, -0.906595705f,
+    0.419216888f, -0.907886116f,
+    0.416429560f, -0.909167983f,
+    0.413638312f, -0.910441292f,
+    0.410843171f, -0.911706032f,
+    0.408044163f, -0.912962190f,
+    0.405241314f, -0.914209756f,
+    0.402434651f, -0.915448716f,
+    0.399624200f, -0.916679060f,
+    0.396809987f, -0.917900776f,
+    0.393992040f, -0.919113852f,
+    0.391170384f, -0.920318277f,
+    0.388345047f, -0.921514039f,
+    0.385516054f, -0.922701128f,
+    0.382683432f, -0.923879533f,
+    0.379847209f, -0.925049241f,
+    0.377007410f, -0.926210242f,
+    0.374164063f, -0.927362526f,
+    0.371317194f, -0.928506080f,
+    0.368466830f, -0.929640896f,
+    0.365612998f, -0.930766961f,
+    0.362755724f, -0.931884266f,
+    0.359895037f, -0.932992799f,
+    0.357030961f, -0.934092550f,
+    0.354163525f, -0.935183510f,
+    0.351292756f, -0.936265667f,
+    0.348418680f, -0.937339012f,
+    0.345541325f, -0.938403534f,
+    0.342660717f, -0.939459224f,
+    0.339776884f, -0.940506071f,
+    0.336889853f, -0.941544065f,
+    0.333999651f, -0.942573198f,
+    0.331106306f, -0.943593458f,
+    0.328209844f, -0.944604837f,
+    0.325310292f, -0.945607325f,
+    0.322407679f, -0.946600913f,
+    0.319502031f, -0.947585591f,
+    0.316593376f, -0.948561350f,
+    0.313681740f, -0.949528181f,
+    0.310767153f, -0.950486074f,
+    0.307849640f, -0.951435021f,
+    0.304929230f, -0.952375013f,
+    0.302005949f, -0.953306040f,
+    0.299079826f, -0.954228095f,
+    0.296150888f, -0.955141168f,
+    0.293219163f, -0.956045251f,
+    0.290284677f, -0.956940336f,
+    0.287347460f, -0.957826413f,
+    0.284407537f, -0.958703475f,
+    0.281464938f, -0.959571513f,
+    0.278519689f, -0.960430519f,
+    0.275571819f, -0.961280486f,
+    0.272621355f, -0.962121404f,
+    0.269668326f, -0.962953267f,
+    0.266712757f, -0.963776066f,
+    0.263754679f, -0.964589793f,
+    0.260794118f, -0.965394442f,
+    0.257831102f, -0.966190003f,
+    0.254865660f, -0.966976471f,
+    0.251897818f, -0.967753837f,
+    0.248927606f, -0.968522094f,
+    0.245955050f, -0.969281235f,
+    0.242980180f, -0.970031253f,
+    0.240003022f, -0.970772141f,
+    0.237023606f, -0.971503891f,
+    0.234041959f, -0.972226497f,
+    0.231058108f, -0.972939952f,
+    0.228072083f, -0.973644250f,
+    0.225083911f, -0.974339383f,
+    0.222093621f, -0.975025345f,
+    0.219101240f, -0.975702130f,
+    0.216106797f, -0.976369731f,
+    0.213110320f, -0.977028143f,
+    0.210111837f, -0.977677358f,
+    0.207111376f, -0.978317371f,
+    0.204108966f, -0.978948175f,
+    0.201104635f, -0.979569766f,
+    0.198098411f, -0.980182136f,
+    0.195090322f, -0.980785280f,
+    0.192080397f, -0.981379193f,
+    0.189068664f, -0.981963869f,
+    0.186055152f, -0.982539302f,
+    0.183039888f, -0.983105487f,
+    0.180022901f, -0.983662419f,
+    0.177004220f, -0.984210092f,
+    0.173983873f, -0.984748502f,
+    0.170961889f, -0.985277642f,
+    0.167938295f, -0.985797509f,
+    0.164913120f, -0.986308097f,
+    0.161886394f, -0.986809402f,
+    0.158858143f, -0.987301418f,
+    0.155828398f, -0.987784142f,
+    0.152797185f, -0.988257568f,
+    0.149764535f, -0.988721692f,
+    0.146730474f, -0.989176510f,
+    0.143695033f, -0.989622017f,
+    0.140658239f, -0.990058210f,
+    0.137620122f, -0.990485084f,
+    0.134580709f, -0.990902635f,
+    0.131540029f, -0.991310860f,
+    0.128498111f, -0.991709754f,
+    0.125454983f, -0.992099313f,
+    0.122410675f, -0.992479535f,
+    0.119365215f, -0.992850414f,
+    0.116318631f, -0.993211949f,
+    0.113270952f, -0.993564136f,
+    0.110222207f, -0.993906970f,
+    0.107172425f, -0.994240449f,
+    0.104121634f, -0.994564571f,
+    0.101069863f, -0.994879331f,
+    0.098017140f, -0.995184727f,
+    0.094963495f, -0.995480755f,
+    0.091908956f, -0.995767414f,
+    0.088853553f, -0.996044701f,
+    0.085797312f, -0.996312612f,
+    0.082740265f, -0.996571146f,
+    0.079682438f, -0.996820299f,
+    0.076623861f, -0.997060070f,
+    0.073564564f, -0.997290457f,
+    0.070504573f, -0.997511456f,
+    0.067443920f, -0.997723067f,
+    0.064382631f, -0.997925286f,
+    0.061320736f, -0.998118113f,
+    0.058258265f, -0.998301545f,
+    0.055195244f, -0.998475581f,
+    0.052131705f, -0.998640218f,
+    0.049067674f, -0.998795456f,
+    0.046003182f, -0.998941293f,
+    0.042938257f, -0.999077728f,
+    0.039872928f, -0.999204759f,
+    0.036807223f, -0.999322385f,
+    0.033741172f, -0.999430605f,
+    0.030674803f, -0.999529418f,
+    0.027608146f, -0.999618822f,
+    0.024541229f, -0.999698819f,
+    0.021474080f, -0.999769405f,
+    0.018406730f, -0.999830582f,
+    0.015339206f, -0.999882347f,
+    0.012271538f, -0.999924702f,
+    0.009203755f, -0.999957645f,
+    0.006135885f, -0.999981175f,
+    0.003067957f, -0.999995294f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
+const float32_t twiddleCoef_rfft_4096[4096] = {
+    0.000000000f,  1.000000000f,
+    0.001533980f,  0.999998823f,
+    0.003067957f,  0.999995294f,
+    0.004601926f,  0.999989411f,
+    0.006135885f,  0.999981175f,
+    0.007669829f,  0.999970586f,
+    0.009203755f,  0.999957645f,
+    0.010737659f,  0.999942350f,
+    0.012271538f,  0.999924702f,
+    0.013805389f,  0.999904701f,
+    0.015339206f,  0.999882347f,
+    0.016872988f,  0.999857641f,
+    0.018406730f,  0.999830582f,
+    0.019940429f,  0.999801170f,
+    0.021474080f,  0.999769405f,
+    0.023007681f,  0.999735288f,
+    0.024541229f,  0.999698819f,
+    0.026074718f,  0.999659997f,
+    0.027608146f,  0.999618822f,
+    0.029141509f,  0.999575296f,
+    0.030674803f,  0.999529418f,
+    0.032208025f,  0.999481187f,
+    0.033741172f,  0.999430605f,
+    0.035274239f,  0.999377670f,
+    0.036807223f,  0.999322385f,
+    0.038340120f,  0.999264747f,
+    0.039872928f,  0.999204759f,
+    0.041405641f,  0.999142419f,
+    0.042938257f,  0.999077728f,
+    0.044470772f,  0.999010686f,
+    0.046003182f,  0.998941293f,
+    0.047535484f,  0.998869550f,
+    0.049067674f,  0.998795456f,
+    0.050599749f,  0.998719012f,
+    0.052131705f,  0.998640218f,
+    0.053663538f,  0.998559074f,
+    0.055195244f,  0.998475581f,
+    0.056726821f,  0.998389737f,
+    0.058258265f,  0.998301545f,
+    0.059789571f,  0.998211003f,
+    0.061320736f,  0.998118113f,
+    0.062851758f,  0.998022874f,
+    0.064382631f,  0.997925286f,
+    0.065913353f,  0.997825350f,
+    0.067443920f,  0.997723067f,
+    0.068974328f,  0.997618435f,
+    0.070504573f,  0.997511456f,
+    0.072034653f,  0.997402130f,
+    0.073564564f,  0.997290457f,
+    0.075094301f,  0.997176437f,
+    0.076623861f,  0.997060070f,
+    0.078153242f,  0.996941358f,
+    0.079682438f,  0.996820299f,
+    0.081211447f,  0.996696895f,
+    0.082740265f,  0.996571146f,
+    0.084268888f,  0.996443051f,
+    0.085797312f,  0.996312612f,
+    0.087325535f,  0.996179829f,
+    0.088853553f,  0.996044701f,
+    0.090381361f,  0.995907229f,
+    0.091908956f,  0.995767414f,
+    0.093436336f,  0.995625256f,
+    0.094963495f,  0.995480755f,
+    0.096490431f,  0.995333912f,
+    0.098017140f,  0.995184727f,
+    0.099543619f,  0.995033199f,
+    0.101069863f,  0.994879331f,
+    0.102595869f,  0.994723121f,
+    0.104121634f,  0.994564571f,
+    0.105647154f,  0.994403680f,
+    0.107172425f,  0.994240449f,
+    0.108697444f,  0.994074879f,
+    0.110222207f,  0.993906970f,
+    0.111746711f,  0.993736722f,
+    0.113270952f,  0.993564136f,
+    0.114794927f,  0.993389211f,
+    0.116318631f,  0.993211949f,
+    0.117842062f,  0.993032350f,
+    0.119365215f,  0.992850414f,
+    0.120888087f,  0.992666142f,
+    0.122410675f,  0.992479535f,
+    0.123932975f,  0.992290591f,
+    0.125454983f,  0.992099313f,
+    0.126976696f,  0.991905700f,
+    0.128498111f,  0.991709754f,
+    0.130019223f,  0.991511473f,
+    0.131540029f,  0.991310860f,
+    0.133060525f,  0.991107914f,
+    0.134580709f,  0.990902635f,
+    0.136100575f,  0.990695025f,
+    0.137620122f,  0.990485084f,
+    0.139139344f,  0.990272812f,
+    0.140658239f,  0.990058210f,
+    0.142176804f,  0.989841278f,
+    0.143695033f,  0.989622017f,
+    0.145212925f,  0.989400428f,
+    0.146730474f,  0.989176510f,
+    0.148247679f,  0.988950265f,
+    0.149764535f,  0.988721692f,
+    0.151281038f,  0.988490793f,
+    0.152797185f,  0.988257568f,
+    0.154312973f,  0.988022017f,
+    0.155828398f,  0.987784142f,
+    0.157343456f,  0.987543942f,
+    0.158858143f,  0.987301418f,
+    0.160372457f,  0.987056571f,
+    0.161886394f,  0.986809402f,
+    0.163399949f,  0.986559910f,
+    0.164913120f,  0.986308097f,
+    0.166425904f,  0.986053963f,
+    0.167938295f,  0.985797509f,
+    0.169450291f,  0.985538735f,
+    0.170961889f,  0.985277642f,
+    0.172473084f,  0.985014231f,
+    0.173983873f,  0.984748502f,
+    0.175494253f,  0.984480455f,
+    0.177004220f,  0.984210092f,
+    0.178513771f,  0.983937413f,
+    0.180022901f,  0.983662419f,
+    0.181531608f,  0.983385110f,
+    0.183039888f,  0.983105487f,
+    0.184547737f,  0.982823551f,
+    0.186055152f,  0.982539302f,
+    0.187562129f,  0.982252741f,
+    0.189068664f,  0.981963869f,
+    0.190574755f,  0.981672686f,
+    0.192080397f,  0.981379193f,
+    0.193585587f,  0.981083391f,
+    0.195090322f,  0.980785280f,
+    0.196594598f,  0.980484862f,
+    0.198098411f,  0.980182136f,
+    0.199601758f,  0.979877104f,
+    0.201104635f,  0.979569766f,
+    0.202607039f,  0.979260123f,
+    0.204108966f,  0.978948175f,
+    0.205610413f,  0.978633924f,
+    0.207111376f,  0.978317371f,
+    0.208611852f,  0.977998515f,
+    0.210111837f,  0.977677358f,
+    0.211611327f,  0.977353900f,
+    0.213110320f,  0.977028143f,
+    0.214608811f,  0.976700086f,
+    0.216106797f,  0.976369731f,
+    0.217604275f,  0.976037079f,
+    0.219101240f,  0.975702130f,
+    0.220597690f,  0.975364885f,
+    0.222093621f,  0.975025345f,
+    0.223589029f,  0.974683511f,
+    0.225083911f,  0.974339383f,
+    0.226578264f,  0.973992962f,
+    0.228072083f,  0.973644250f,
+    0.229565366f,  0.973293246f,
+    0.231058108f,  0.972939952f,
+    0.232550307f,  0.972584369f,
+    0.234041959f,  0.972226497f,
+    0.235533059f,  0.971866337f,
+    0.237023606f,  0.971503891f,
+    0.238513595f,  0.971139158f,
+    0.240003022f,  0.970772141f,
+    0.241491885f,  0.970402839f,
+    0.242980180f,  0.970031253f,
+    0.244467903f,  0.969657385f,
+    0.245955050f,  0.969281235f,
+    0.247441619f,  0.968902805f,
+    0.248927606f,  0.968522094f,
+    0.250413007f,  0.968139105f,
+    0.251897818f,  0.967753837f,
+    0.253382037f,  0.967366292f,
+    0.254865660f,  0.966976471f,
+    0.256348682f,  0.966584374f,
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+    0.456448982f, -0.889749586f,
+    0.455083587f, -0.890448723f,
+    0.453717121f, -0.891145765f,
+    0.452349587f, -0.891840709f,
+    0.450980989f, -0.892533555f,
+    0.449611330f, -0.893224301f,
+    0.448240612f, -0.893912945f,
+    0.446868840f, -0.894599486f,
+    0.445496017f, -0.895283921f,
+    0.444122145f, -0.895966250f,
+    0.442747228f, -0.896646470f,
+    0.441371269f, -0.897324581f,
+    0.439994271f, -0.898000580f,
+    0.438616239f, -0.898674466f,
+    0.437237174f, -0.899346237f,
+    0.435857080f, -0.900015892f,
+    0.434475961f, -0.900683429f,
+    0.433093819f, -0.901348847f,
+    0.431710658f, -0.902012144f,
+    0.430326481f, -0.902673318f,
+    0.428941292f, -0.903332368f,
+    0.427555093f, -0.903989293f,
+    0.426167889f, -0.904644091f,
+    0.424779681f, -0.905296759f,
+    0.423390474f, -0.905947298f,
+    0.422000271f, -0.906595705f,
+    0.420609074f, -0.907241978f,
+    0.419216888f, -0.907886116f,
+    0.417823716f, -0.908528119f,
+    0.416429560f, -0.909167983f,
+    0.415034424f, -0.909805708f,
+    0.413638312f, -0.910441292f,
+    0.412241227f, -0.911074734f,
+    0.410843171f, -0.911706032f,
+    0.409444149f, -0.912335185f,
+    0.408044163f, -0.912962190f,
+    0.406643217f, -0.913587048f,
+    0.405241314f, -0.914209756f,
+    0.403838458f, -0.914830312f,
+    0.402434651f, -0.915448716f,
+    0.401029897f, -0.916064966f,
+    0.399624200f, -0.916679060f,
+    0.398217562f, -0.917290997f,
+    0.396809987f, -0.917900776f,
+    0.395401479f, -0.918508394f,
+    0.393992040f, -0.919113852f,
+    0.392581674f, -0.919717146f,
+    0.391170384f, -0.920318277f,
+    0.389758174f, -0.920917242f,
+    0.388345047f, -0.921514039f,
+    0.386931006f, -0.922108669f,
+    0.385516054f, -0.922701128f,
+    0.384100195f, -0.923291417f,
+    0.382683432f, -0.923879533f,
+    0.381265769f, -0.924465474f,
+    0.379847209f, -0.925049241f,
+    0.378427755f, -0.925630831f,
+    0.377007410f, -0.926210242f,
+    0.375586178f, -0.926787474f,
+    0.374164063f, -0.927362526f,
+    0.372741067f, -0.927935395f,
+    0.371317194f, -0.928506080f,
+    0.369892447f, -0.929074581f,
+    0.368466830f, -0.929640896f,
+    0.367040346f, -0.930205023f,
+    0.365612998f, -0.930766961f,
+    0.364184790f, -0.931326709f,
+    0.362755724f, -0.931884266f,
+    0.361325806f, -0.932439629f,
+    0.359895037f, -0.932992799f,
+    0.358463421f, -0.933543773f,
+    0.357030961f, -0.934092550f,
+    0.355597662f, -0.934639130f,
+    0.354163525f, -0.935183510f,
+    0.352728556f, -0.935725689f,
+    0.351292756f, -0.936265667f,
+    0.349856130f, -0.936803442f,
+    0.348418680f, -0.937339012f,
+    0.346980411f, -0.937872376f,
+    0.345541325f, -0.938403534f,
+    0.344101426f, -0.938932484f,
+    0.342660717f, -0.939459224f,
+    0.341219202f, -0.939983753f,
+    0.339776884f, -0.940506071f,
+    0.338333767f, -0.941026175f,
+    0.336889853f, -0.941544065f,
+    0.335445147f, -0.942059740f,
+    0.333999651f, -0.942573198f,
+    0.332553370f, -0.943084437f,
+    0.331106306f, -0.943593458f,
+    0.329658463f, -0.944100258f,
+    0.328209844f, -0.944604837f,
+    0.326760452f, -0.945107193f,
+    0.325310292f, -0.945607325f,
+    0.323859367f, -0.946105232f,
+    0.322407679f, -0.946600913f,
+    0.320955232f, -0.947094366f,
+    0.319502031f, -0.947585591f,
+    0.318048077f, -0.948074586f,
+    0.316593376f, -0.948561350f,
+    0.315137929f, -0.949045882f,
+    0.313681740f, -0.949528181f,
+    0.312224814f, -0.950008245f,
+    0.310767153f, -0.950486074f,
+    0.309308760f, -0.950961666f,
+    0.307849640f, -0.951435021f,
+    0.306389795f, -0.951906137f,
+    0.304929230f, -0.952375013f,
+    0.303467947f, -0.952841648f,
+    0.302005949f, -0.953306040f,
+    0.300543241f, -0.953768190f,
+    0.299079826f, -0.954228095f,
+    0.297615707f, -0.954685755f,
+    0.296150888f, -0.955141168f,
+    0.294685372f, -0.955594334f,
+    0.293219163f, -0.956045251f,
+    0.291752263f, -0.956493919f,
+    0.290284677f, -0.956940336f,
+    0.288816408f, -0.957384501f,
+    0.287347460f, -0.957826413f,
+    0.285877835f, -0.958266071f,
+    0.284407537f, -0.958703475f,
+    0.282936570f, -0.959138622f,
+    0.281464938f, -0.959571513f,
+    0.279992643f, -0.960002146f,
+    0.278519689f, -0.960430519f,
+    0.277046080f, -0.960856633f,
+    0.275571819f, -0.961280486f,
+    0.274096910f, -0.961702077f,
+    0.272621355f, -0.962121404f,
+    0.271145160f, -0.962538468f,
+    0.269668326f, -0.962953267f,
+    0.268190857f, -0.963365800f,
+    0.266712757f, -0.963776066f,
+    0.265234030f, -0.964184064f,
+    0.263754679f, -0.964589793f,
+    0.262274707f, -0.964993253f,
+    0.260794118f, -0.965394442f,
+    0.259312915f, -0.965793359f,
+    0.257831102f, -0.966190003f,
+    0.256348682f, -0.966584374f,
+    0.254865660f, -0.966976471f,
+    0.253382037f, -0.967366292f,
+    0.251897818f, -0.967753837f,
+    0.250413007f, -0.968139105f,
+    0.248927606f, -0.968522094f,
+    0.247441619f, -0.968902805f,
+    0.245955050f, -0.969281235f,
+    0.244467903f, -0.969657385f,
+    0.242980180f, -0.970031253f,
+    0.241491885f, -0.970402839f,
+    0.240003022f, -0.970772141f,
+    0.238513595f, -0.971139158f,
+    0.237023606f, -0.971503891f,
+    0.235533059f, -0.971866337f,
+    0.234041959f, -0.972226497f,
+    0.232550307f, -0.972584369f,
+    0.231058108f, -0.972939952f,
+    0.229565366f, -0.973293246f,
+    0.228072083f, -0.973644250f,
+    0.226578264f, -0.973992962f,
+    0.225083911f, -0.974339383f,
+    0.223589029f, -0.974683511f,
+    0.222093621f, -0.975025345f,
+    0.220597690f, -0.975364885f,
+    0.219101240f, -0.975702130f,
+    0.217604275f, -0.976037079f,
+    0.216106797f, -0.976369731f,
+    0.214608811f, -0.976700086f,
+    0.213110320f, -0.977028143f,
+    0.211611327f, -0.977353900f,
+    0.210111837f, -0.977677358f,
+    0.208611852f, -0.977998515f,
+    0.207111376f, -0.978317371f,
+    0.205610413f, -0.978633924f,
+    0.204108966f, -0.978948175f,
+    0.202607039f, -0.979260123f,
+    0.201104635f, -0.979569766f,
+    0.199601758f, -0.979877104f,
+    0.198098411f, -0.980182136f,
+    0.196594598f, -0.980484862f,
+    0.195090322f, -0.980785280f,
+    0.193585587f, -0.981083391f,
+    0.192080397f, -0.981379193f,
+    0.190574755f, -0.981672686f,
+    0.189068664f, -0.981963869f,
+    0.187562129f, -0.982252741f,
+    0.186055152f, -0.982539302f,
+    0.184547737f, -0.982823551f,
+    0.183039888f, -0.983105487f,
+    0.181531608f, -0.983385110f,
+    0.180022901f, -0.983662419f,
+    0.178513771f, -0.983937413f,
+    0.177004220f, -0.984210092f,
+    0.175494253f, -0.984480455f,
+    0.173983873f, -0.984748502f,
+    0.172473084f, -0.985014231f,
+    0.170961889f, -0.985277642f,
+    0.169450291f, -0.985538735f,
+    0.167938295f, -0.985797509f,
+    0.166425904f, -0.986053963f,
+    0.164913120f, -0.986308097f,
+    0.163399949f, -0.986559910f,
+    0.161886394f, -0.986809402f,
+    0.160372457f, -0.987056571f,
+    0.158858143f, -0.987301418f,
+    0.157343456f, -0.987543942f,
+    0.155828398f, -0.987784142f,
+    0.154312973f, -0.988022017f,
+    0.152797185f, -0.988257568f,
+    0.151281038f, -0.988490793f,
+    0.149764535f, -0.988721692f,
+    0.148247679f, -0.988950265f,
+    0.146730474f, -0.989176510f,
+    0.145212925f, -0.989400428f,
+    0.143695033f, -0.989622017f,
+    0.142176804f, -0.989841278f,
+    0.140658239f, -0.990058210f,
+    0.139139344f, -0.990272812f,
+    0.137620122f, -0.990485084f,
+    0.136100575f, -0.990695025f,
+    0.134580709f, -0.990902635f,
+    0.133060525f, -0.991107914f,
+    0.131540029f, -0.991310860f,
+    0.130019223f, -0.991511473f,
+    0.128498111f, -0.991709754f,
+    0.126976696f, -0.991905700f,
+    0.125454983f, -0.992099313f,
+    0.123932975f, -0.992290591f,
+    0.122410675f, -0.992479535f,
+    0.120888087f, -0.992666142f,
+    0.119365215f, -0.992850414f,
+    0.117842062f, -0.993032350f,
+    0.116318631f, -0.993211949f,
+    0.114794927f, -0.993389211f,
+    0.113270952f, -0.993564136f,
+    0.111746711f, -0.993736722f,
+    0.110222207f, -0.993906970f,
+    0.108697444f, -0.994074879f,
+    0.107172425f, -0.994240449f,
+    0.105647154f, -0.994403680f,
+    0.104121634f, -0.994564571f,
+    0.102595869f, -0.994723121f,
+    0.101069863f, -0.994879331f,
+    0.099543619f, -0.995033199f,
+    0.098017140f, -0.995184727f,
+    0.096490431f, -0.995333912f,
+    0.094963495f, -0.995480755f,
+    0.093436336f, -0.995625256f,
+    0.091908956f, -0.995767414f,
+    0.090381361f, -0.995907229f,
+    0.088853553f, -0.996044701f,
+    0.087325535f, -0.996179829f,
+    0.085797312f, -0.996312612f,
+    0.084268888f, -0.996443051f,
+    0.082740265f, -0.996571146f,
+    0.081211447f, -0.996696895f,
+    0.079682438f, -0.996820299f,
+    0.078153242f, -0.996941358f,
+    0.076623861f, -0.997060070f,
+    0.075094301f, -0.997176437f,
+    0.073564564f, -0.997290457f,
+    0.072034653f, -0.997402130f,
+    0.070504573f, -0.997511456f,
+    0.068974328f, -0.997618435f,
+    0.067443920f, -0.997723067f,
+    0.065913353f, -0.997825350f,
+    0.064382631f, -0.997925286f,
+    0.062851758f, -0.998022874f,
+    0.061320736f, -0.998118113f,
+    0.059789571f, -0.998211003f,
+    0.058258265f, -0.998301545f,
+    0.056726821f, -0.998389737f,
+    0.055195244f, -0.998475581f,
+    0.053663538f, -0.998559074f,
+    0.052131705f, -0.998640218f,
+    0.050599749f, -0.998719012f,
+    0.049067674f, -0.998795456f,
+    0.047535484f, -0.998869550f,
+    0.046003182f, -0.998941293f,
+    0.044470772f, -0.999010686f,
+    0.042938257f, -0.999077728f,
+    0.041405641f, -0.999142419f,
+    0.039872928f, -0.999204759f,
+    0.038340120f, -0.999264747f,
+    0.036807223f, -0.999322385f,
+    0.035274239f, -0.999377670f,
+    0.033741172f, -0.999430605f,
+    0.032208025f, -0.999481187f,
+    0.030674803f, -0.999529418f,
+    0.029141509f, -0.999575296f,
+    0.027608146f, -0.999618822f,
+    0.026074718f, -0.999659997f,
+    0.024541229f, -0.999698819f,
+    0.023007681f, -0.999735288f,
+    0.021474080f, -0.999769405f,
+    0.019940429f, -0.999801170f,
+    0.018406730f, -0.999830582f,
+    0.016872988f, -0.999857641f,
+    0.015339206f, -0.999882347f,
+    0.013805389f, -0.999904701f,
+    0.012271538f, -0.999924702f,
+    0.010737659f, -0.999942350f,
+    0.009203755f, -0.999957645f,
+    0.007669829f, -0.999970586f,
+    0.006135885f, -0.999981175f,
+    0.004601926f, -0.999989411f,
+    0.003067957f, -0.999995294f,
+    0.001533980f, -0.999998823f
+};
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALL_TABLES) */
+
+/**
+  @ingroup RealFFT
+ */
+
+/**
+  @addtogroup RealFFT_Table Real FFT Tables
+  @{
+ */
+
+/**
+  @par
+  Generation of realCoefA array:
+  @par
+  n = 4096
+  
for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }

+ */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
+const float32_t realCoefA[8192] = {
+  0.500000000000000f, -0.500000000000000f, 0.499616503715515f, -0.499999850988388f,
+  0.499233007431030f, -0.499999403953552f, 0.498849511146545f, -0.499998688697815f,
+  0.498466014862061f, -0.499997645616531f, 0.498082518577576f, -0.499996334314346f,
+  0.497699022293091f, -0.499994695186615f, 0.497315555810928f, -0.499992787837982f,
+  0.496932059526443f, -0.499990582466125f, 0.496548563241959f, -0.499988079071045f,
+  0.496165096759796f, -0.499985307455063f, 0.495781600475311f, -0.499982208013535f,
+  0.495398133993149f, -0.499978810548782f, 0.495014637708664f, -0.499975144863129f,
+  0.494631171226501f, -0.499971181154251f, 0.494247704744339f, -0.499966919422150f,
+  0.493864238262177f, -0.499962359666824f, 0.493480771780014f, -0.499957501888275f,
+  0.493097305297852f, -0.499952346086502f, 0.492713838815689f, -0.499946922063828f,
+  0.492330402135849f, -0.499941170215607f, 0.491946935653687f, -0.499935150146484f,
+  0.491563498973846f, -0.499928832054138f, 0.491180062294006f, -0.499922215938568f,
+  0.490796625614166f, -0.499915301799774f, 0.490413218736649f, -0.499908089637756f,
+  0.490029782056808f, -0.499900579452515f, 0.489646375179291f, -0.499892801046371f,
+  0.489262968301773f, -0.499884694814682f, 0.488879561424255f, -0.499876320362091f,
+  0.488496154546738f, -0.499867647886276f, 0.488112777471542f, -0.499858677387238f,
+  0.487729400396347f, -0.499849408864975f, 0.487346023321152f, -0.499839842319489f,
+  0.486962646245956f, -0.499830007553101f, 0.486579269170761f, -0.499819844961166f,
+  0.486195921897888f, -0.499809414148331f, 0.485812574625015f, -0.499798685312271f,
+  0.485429257154465f, -0.499787658452988f, 0.485045909881592f, -0.499776333570480f,
+  0.484662592411041f, -0.499764710664749f, 0.484279274940491f, -0.499752789735794f,
+  0.483895987272263f, -0.499740600585938f, 0.483512699604034f, -0.499728083610535f,
+  0.483129411935806f, -0.499715298414230f, 0.482746154069901f, -0.499702215194702f,
+  0.482362866401672f, -0.499688833951950f, 0.481979638338089f, -0.499675154685974f,
+  0.481596380472183f, -0.499661177396774f, 0.481213152408600f, -0.499646931886673f,
+  0.480829954147339f, -0.499632388353348f, 0.480446726083755f, -0.499617516994476f,
+  0.480063527822495f, -0.499602377414703f, 0.479680359363556f, -0.499586939811707f,
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+  0.419813781976700f, 0.493528276681900f, 0.420192331075668f, 0.493589639663696f,
+  0.420570939779282f, 0.493650704622269f, 0.420949578285217f, 0.493711471557617f,
+  0.421328276395798f, 0.493771970272064f, 0.421707004308701f, 0.493832170963287f,
+  0.422085791826248f, 0.493892073631287f, 0.422464638948441f, 0.493951678276062f,
+  0.422843515872955f, 0.494011014699936f, 0.423222452402115f, 0.494070053100586f,
+  0.423601418733597f, 0.494128793478012f, 0.423980414867401f, 0.494187235832214f,
+  0.424359470605850f, 0.494245409965515f, 0.424738585948944f, 0.494303256273270f,
+  0.425117731094360f, 0.494360834360123f, 0.425496935844421f, 0.494418144226074f,
+  0.425876170396805f, 0.494475126266479f, 0.426255434751511f, 0.494531840085983f,
+  0.426634758710861f, 0.494588255882263f, 0.427014142274857f, 0.494644373655319f,
+  0.427393525838852f, 0.494700223207474f, 0.427772998809814f, 0.494755744934082f,
+  0.428152471780777f, 0.494810998439789f, 0.428532034158707f, 0.494865983724594f,
+  0.428911596536636f, 0.494920641183853f, 0.429291218519211f, 0.494975030422211f,
+  0.429670870304108f, 0.495029091835022f, 0.430050581693649f, 0.495082914829254f,
+  0.430430322885513f, 0.495136409997940f, 0.430810123682022f, 0.495189607143402f,
+  0.431189924478531f, 0.495242536067963f, 0.431569814682007f, 0.495295166969299f,
+  0.431949704885483f, 0.495347499847412f, 0.432329654693604f, 0.495399564504623f,
+  0.432709634304047f, 0.495451331138611f, 0.433089673519135f, 0.495502769947052f,
+  0.433469742536545f, 0.495553970336914f, 0.433849841356277f, 0.495604842901230f,
+  0.434229999780655f, 0.495655417442322f, 0.434610158205032f, 0.495705723762512f,
+  0.434990376234055f, 0.495755732059479f, 0.435370653867722f, 0.495805442333221f,
+  0.435750931501389f, 0.495854884386063f, 0.436131268739700f, 0.495903998613358f,
+  0.436511665582657f, 0.495952844619751f, 0.436892062425613f, 0.496001392602921f,
+  0.437272518873215f, 0.496049642562866f, 0.437653005123138f, 0.496097624301910f,
+  0.438033521175385f, 0.496145308017731f, 0.438414067029953f, 0.496192663908005f,
+  0.438794672489166f, 0.496239781379700f, 0.439175277948380f, 0.496286571025848f,
+  0.439555943012238f, 0.496333062648773f, 0.439936667680740f, 0.496379286050797f,
+  0.440317392349243f, 0.496425211429596f, 0.440698176622391f, 0.496470838785172f,
+  0.441078960895538f, 0.496516168117523f, 0.441459804773331f, 0.496561229228973f,
+  0.441840678453445f, 0.496605962514877f, 0.442221581935883f, 0.496650427579880f,
+  0.442602545022964f, 0.496694594621658f, 0.442983508110046f, 0.496738493442535f,
+  0.443364530801773f, 0.496782064437866f, 0.443745553493500f, 0.496825367212296f,
+  0.444126635789871f, 0.496868371963501f, 0.444507747888565f, 0.496911078691483f,
+  0.444888889789581f, 0.496953487396240f, 0.445270061492920f, 0.496995598077774f,
+  0.445651292800903f, 0.497037440538406f, 0.446032524108887f, 0.497078984975815f,
+  0.446413785219193f, 0.497120231389999f, 0.446795076131821f, 0.497161179780960f,
+  0.447176426649094f, 0.497201830148697f, 0.447557777166367f, 0.497242212295532f,
+  0.447939187288284f, 0.497282296419144f, 0.448320597410202f, 0.497322082519531f,
+  0.448702067136765f, 0.497361570596695f, 0.449083566665649f, 0.497400760650635f,
+  0.449465066194534f, 0.497439652681351f, 0.449846625328064f, 0.497478276491165f,
+  0.450228184461594f, 0.497516602277756f, 0.450609803199768f, 0.497554630041122f,
+  0.450991421937943f, 0.497592359781265f, 0.451373100280762f, 0.497629791498184f,
+  0.451754778623581f, 0.497666954994202f, 0.452136516571045f, 0.497703820466995f,
+  0.452518254518509f, 0.497740387916565f, 0.452900022268295f, 0.497776657342911f,
+  0.453281819820404f, 0.497812628746033f, 0.453663676977158f, 0.497848302125931f,
+  0.454045534133911f, 0.497883707284927f, 0.454427421092987f, 0.497918814420700f,
+  0.454809308052063f, 0.497953623533249f, 0.455191254615784f, 0.497988134622574f,
+  0.455573230981827f, 0.498022347688675f, 0.455955207347870f, 0.498056292533875f,
+  0.456337243318558f, 0.498089909553528f, 0.456719279289246f, 0.498123258352280f,
+  0.457101345062256f, 0.498156309127808f, 0.457483440637589f, 0.498189061880112f,
+  0.457865566015244f, 0.498221516609192f, 0.458247691392899f, 0.498253703117371f,
+  0.458629876375198f, 0.498285561800003f, 0.459012061357498f, 0.498317152261734f,
+  0.459394276142120f, 0.498348444700241f, 0.459776520729065f, 0.498379439115524f,
+  0.460158795118332f, 0.498410135507584f, 0.460541069507599f, 0.498440563678741f,
+  0.460923373699188f, 0.498470664024353f, 0.461305707693100f, 0.498500496149063f,
+  0.461688071489334f, 0.498530030250549f, 0.462070435285568f, 0.498559266328812f,
+  0.462452858686447f, 0.498588204383850f, 0.462835282087326f, 0.498616874217987f,
+  0.463217705488205f, 0.498645216226578f, 0.463600188493729f, 0.498673290014267f,
+  0.463982671499252f, 0.498701065778732f, 0.464365184307098f, 0.498728543519974f,
+  0.464747726917267f, 0.498755723237991f, 0.465130269527435f, 0.498782604932785f,
+  0.465512841939926f, 0.498809218406677f, 0.465895414352417f, 0.498835533857346f,
+  0.466278046369553f, 0.498861521482468f, 0.466660678386688f, 0.498887240886688f,
+  0.467043310403824f, 0.498912662267685f, 0.467426002025604f, 0.498937815427780f,
+  0.467808693647385f, 0.498962640762329f, 0.468191385269165f, 0.498987197875977f,
+  0.468574106693268f, 0.499011427164078f, 0.468956857919693f, 0.499035388231277f,
+  0.469339638948441f, 0.499059051275253f, 0.469722419977188f, 0.499082416296005f,
+  0.470105201005936f, 0.499105513095856f, 0.470488041639328f, 0.499128282070160f,
+  0.470870882272720f, 0.499150782823563f, 0.471253722906113f, 0.499172955751419f,
+  0.471636593341827f, 0.499194860458374f, 0.472019463777542f, 0.499216467142105f,
+  0.472402364015579f, 0.499237775802612f, 0.472785294055939f, 0.499258816242218f,
+  0.473168224096298f, 0.499279528856277f, 0.473551183938980f, 0.499299973249435f,
+  0.473934143781662f, 0.499320119619370f, 0.474317133426666f, 0.499339967966080f,
+  0.474700123071671f, 0.499359518289566f, 0.475083142518997f, 0.499378770589828f,
+  0.475466161966324f, 0.499397724866867f, 0.475849211215973f, 0.499416410923004f,
+  0.476232260465622f, 0.499434769153595f, 0.476615339517593f, 0.499452859163284f,
+  0.476998418569565f, 0.499470651149750f, 0.477381497621536f, 0.499488145112991f,
+  0.477764606475830f, 0.499505341053009f, 0.478147745132446f, 0.499522238969803f,
+  0.478530883789063f, 0.499538868665695f, 0.478914022445679f, 0.499555170536041f,
+  0.479297190904617f, 0.499571204185486f, 0.479680359363556f, 0.499586939811707f,
+  0.480063527822495f, 0.499602377414703f, 0.480446726083755f, 0.499617516994476f,
+  0.480829954147339f, 0.499632388353348f, 0.481213152408600f, 0.499646931886673f,
+  0.481596380472183f, 0.499661177396774f, 0.481979638338089f, 0.499675154685974f,
+  0.482362866401672f, 0.499688833951950f, 0.482746154069901f, 0.499702215194702f,
+  0.483129411935806f, 0.499715298414230f, 0.483512699604034f, 0.499728083610535f,
+  0.483895987272263f, 0.499740600585938f, 0.484279274940491f, 0.499752789735794f,
+  0.484662592411041f, 0.499764710664749f, 0.485045909881592f, 0.499776333570480f,
+  0.485429257154465f, 0.499787658452988f, 0.485812574625015f, 0.499798685312271f,
+  0.486195921897888f, 0.499809414148331f, 0.486579269170761f, 0.499819844961166f,
+  0.486962646245956f, 0.499830007553101f, 0.487346023321152f, 0.499839842319489f,
+  0.487729400396347f, 0.499849408864975f, 0.488112777471542f, 0.499858677387238f,
+  0.488496154546738f, 0.499867647886276f, 0.488879561424255f, 0.499876320362091f,
+  0.489262968301773f, 0.499884694814682f, 0.489646375179291f, 0.499892801046371f,
+  0.490029782056808f, 0.499900579452515f, 0.490413218736649f, 0.499908089637756f,
+  0.490796625614166f, 0.499915301799774f, 0.491180062294006f, 0.499922215938568f,
+  0.491563498973846f, 0.499928832054138f, 0.491946935653687f, 0.499935150146484f,
+  0.492330402135849f, 0.499941170215607f, 0.492713838815689f, 0.499946922063828f,
+  0.493097305297852f, 0.499952346086502f, 0.493480771780014f, 0.499957501888275f,
+  0.493864238262177f, 0.499962359666824f, 0.494247704744339f, 0.499966919422150f,
+  0.494631171226501f, 0.499971181154251f, 0.495014637708664f, 0.499975144863129f,
+  0.495398133993149f, 0.499978810548782f, 0.495781600475311f, 0.499982208013535f,
+  0.496165096759796f, 0.499985307455063f, 0.496548563241959f, 0.499988079071045f,
+  0.496932059526443f, 0.499990582466125f, 0.497315555810928f, 0.499992787837982f,
+  0.497699022293091f, 0.499994695186615f, 0.498082518577576f, 0.499996334314346f,
+  0.498466014862061f, 0.499997645616531f, 0.498849511146545f, 0.499998688697815f,
+  0.499233007431030f, 0.499999403953552f, 0.499616503715515f, 0.499999850988388f,
+};
+
+
+/**
+  @par
+  Generation of realCoefB array:
+  @par
+  n = 4096
+  
for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }

+ */
+
+const float32_t realCoefB[8192] = {
+  0.500000000000000f, 0.500000000000000f, 0.500383496284485f, 0.499999850988388f,
+  0.500766992568970f, 0.499999403953552f, 0.501150488853455f, 0.499998688697815f,
+  0.501533985137939f, 0.499997645616531f, 0.501917481422424f, 0.499996334314346f,
+  0.502300977706909f, 0.499994695186615f, 0.502684473991394f, 0.499992787837982f,
+  0.503067970275879f, 0.499990582466125f, 0.503451406955719f, 0.499988079071045f,
+  0.503834903240204f, 0.499985307455063f, 0.504218399524689f, 0.499982208013535f,
+  0.504601895809174f, 0.499978810548782f, 0.504985332489014f, 0.499975144863129f,
+  0.505368828773499f, 0.499971181154251f, 0.505752325057983f, 0.499966919422150f,
+  0.506135761737823f, 0.499962359666824f, 0.506519258022308f, 0.499957501888275f,
+  0.506902694702148f, 0.499952346086502f, 0.507286131381989f, 0.499946922063828f,
+  0.507669627666473f, 0.499941170215607f, 0.508053064346313f, 0.499935150146484f,
+  0.508436501026154f, 0.499928832054138f, 0.508819937705994f, 0.499922215938568f,
+  0.509203374385834f, 0.499915301799774f, 0.509586811065674f, 0.499908089637756f,
+  0.509970188140869f, 0.499900579452515f, 0.510353624820709f, 0.499892801046371f,
+  0.510737061500549f, 0.499884694814682f, 0.511120438575745f, 0.499876320362091f,
+  0.511503815650940f, 0.499867647886276f, 0.511887252330780f, 0.499858677387238f,
+  0.512270629405975f, 0.499849408864975f, 0.512654006481171f, 0.499839842319489f,
+  0.513037383556366f, 0.499830007553101f, 0.513420701026917f, 0.499819844961166f,
+  0.513804078102112f, 0.499809414148331f, 0.514187395572662f, 0.499798685312271f,
+  0.514570772647858f, 0.499787658452988f, 0.514954090118408f, 0.499776333570480f,
+  0.515337407588959f, 0.499764710664749f, 0.515720725059509f, 0.499752789735794f,
+  0.516103982925415f, 0.499740600585938f, 0.516487300395966f, 0.499728083610535f,
+  0.516870558261871f, 0.499715298414230f, 0.517253875732422f, 0.499702215194702f,
+  0.517637133598328f, 0.499688833951950f, 0.518020391464233f, 0.499675154685974f,
+  0.518403589725494f, 0.499661177396774f, 0.518786847591400f, 0.499646931886673f,
+  0.519170045852661f, 0.499632388353348f, 0.519553244113922f, 0.499617516994476f,
+  0.519936442375183f, 0.499602377414703f, 0.520319640636444f, 0.499586939811707f,
+  0.520702838897705f, 0.499571204185486f, 0.521085977554321f, 0.499555170536041f,
+  0.521469116210938f, 0.499538868665695f, 0.521852254867554f, 0.499522238969803f,
+  0.522235393524170f, 0.499505341053009f, 0.522618472576141f, 0.499488145112991f,
+  0.523001611232758f, 0.499470651149750f, 0.523384690284729f, 0.499452859163284f,
+  0.523767769336700f, 0.499434769153595f, 0.524150788784027f, 0.499416410923004f,
+  0.524533808231354f, 0.499397724866867f, 0.524916887283325f, 0.499378770589828f,
+  0.525299847126007f, 0.499359518289566f, 0.525682866573334f, 0.499339967966080f,
+  0.526065826416016f, 0.499320119619370f, 0.526448845863342f, 0.499299973249435f,
+  0.526831746101379f, 0.499279528856277f, 0.527214705944061f, 0.499258816242218f,
+  0.527597606182098f, 0.499237775802612f, 0.527980506420136f, 0.499216467142105f,
+  0.528363406658173f, 0.499194860458374f, 0.528746306896210f, 0.499172955751419f,
+  0.529129147529602f, 0.499150782823563f, 0.529511988162994f, 0.499128282070160f,
+  0.529894769191742f, 0.499105513095856f, 0.530277609825134f, 0.499082416296005f,
+  0.530660390853882f, 0.499059051275253f, 0.531043112277985f, 0.499035388231277f,
+  0.531425893306732f, 0.499011427164078f, 0.531808614730835f, 0.498987197875977f,
+  0.532191336154938f, 0.498962640762329f, 0.532573997974396f, 0.498937815427780f,
+  0.532956659793854f, 0.498912662267685f, 0.533339321613312f, 0.498887240886688f,
+  0.533721983432770f, 0.498861521482468f, 0.534104585647583f, 0.498835533857346f,
+  0.534487187862396f, 0.498809218406677f, 0.534869730472565f, 0.498782604932785f,
+  0.535252273082733f, 0.498755723237991f, 0.535634815692902f, 0.498728543519974f,
+  0.536017298698425f, 0.498701065778732f, 0.536399841308594f, 0.498673290014267f,
+  0.536782264709473f, 0.498645216226578f, 0.537164747714996f, 0.498616874217987f,
+  0.537547171115875f, 0.498588204383850f, 0.537929534912109f, 0.498559266328812f,
+  0.538311958312988f, 0.498530030250549f, 0.538694262504578f, 0.498500496149063f,
+  0.539076626300812f, 0.498470664024353f, 0.539458930492401f, 0.498440563678741f,
+  0.539841234683990f, 0.498410135507584f, 0.540223479270935f, 0.498379439115524f,
+  0.540605723857880f, 0.498348444700241f, 0.540987968444824f, 0.498317152261734f,
+  0.541370153427124f, 0.498285561800003f, 0.541752278804779f, 0.498253703117371f,
+  0.542134463787079f, 0.498221516609192f, 0.542516589164734f, 0.498189061880112f,
+  0.542898654937744f, 0.498156309127808f, 0.543280720710754f, 0.498123258352280f,
+  0.543662786483765f, 0.498089909553528f, 0.544044792652130f, 0.498056292533875f,
+  0.544426798820496f, 0.498022347688675f, 0.544808745384216f, 0.497988134622574f,
+  0.545190691947937f, 0.497953623533249f, 0.545572578907013f, 0.497918814420700f,
+  0.545954465866089f, 0.497883707284927f, 0.546336352825165f, 0.497848302125931f,
+  0.546718180179596f, 0.497812628746033f, 0.547099947929382f, 0.497776657342911f,
+  0.547481775283813f, 0.497740387916565f, 0.547863483428955f, 0.497703820466995f,
+  0.548245191574097f, 0.497666954994202f, 0.548626899719238f, 0.497629791498184f,
+  0.549008548259735f, 0.497592359781265f, 0.549390196800232f, 0.497554630041122f,
+  0.549771785736084f, 0.497516602277756f, 0.550153374671936f, 0.497478276491165f,
+  0.550534904003143f, 0.497439652681351f, 0.550916433334351f, 0.497400760650635f,
+  0.551297962665558f, 0.497361570596695f, 0.551679372787476f, 0.497322082519531f,
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+  0.560444056987762f, -0.496333062648773f, 0.560063362121582f, -0.496379286050797f,
+  0.559682607650757f, -0.496425211429596f, 0.559301853179932f, -0.496470838785172f,
+  0.558921039104462f, -0.496516168117523f, 0.558540165424347f, -0.496561229228973f,
+  0.558159291744232f, -0.496605962514877f, 0.557778418064117f, -0.496650427579880f,
+  0.557397484779358f, -0.496694594621658f, 0.557016491889954f, -0.496738493442535f,
+  0.556635499000549f, -0.496782064437866f, 0.556254446506500f, -0.496825367212296f,
+  0.555873334407806f, -0.496868371963501f, 0.555492222309113f, -0.496911078691483f,
+  0.555111110210419f, -0.496953487396240f, 0.554729938507080f, -0.496995598077774f,
+  0.554348707199097f, -0.497037440538406f, 0.553967475891113f, -0.497078984975815f,
+  0.553586184978485f, -0.497120231389999f, 0.553204894065857f, -0.497161179780960f,
+  0.552823603153229f, -0.497201830148697f, 0.552442193031311f, -0.497242212295532f,
+  0.552060842514038f, -0.497282296419144f, 0.551679372787476f, -0.497322082519531f,
+  0.551297962665558f, -0.497361570596695f, 0.550916433334351f, -0.497400760650635f,
+  0.550534904003143f, -0.497439652681351f, 0.550153374671936f, -0.497478276491165f,
+  0.549771785736084f, -0.497516602277756f, 0.549390196800232f, -0.497554630041122f,
+  0.549008548259735f, -0.497592359781265f, 0.548626899719238f, -0.497629791498184f,
+  0.548245191574097f, -0.497666954994202f, 0.547863483428955f, -0.497703820466995f,
+  0.547481775283813f, -0.497740387916565f, 0.547099947929382f, -0.497776657342911f,
+  0.546718180179596f, -0.497812628746033f, 0.546336352825165f, -0.497848302125931f,
+  0.545954465866089f, -0.497883707284927f, 0.545572578907013f, -0.497918814420700f,
+  0.545190691947937f, -0.497953623533249f, 0.544808745384216f, -0.497988134622574f,
+  0.544426798820496f, -0.498022347688675f, 0.544044792652130f, -0.498056292533875f,
+  0.543662786483765f, -0.498089909553528f, 0.543280720710754f, -0.498123258352280f,
+  0.542898654937744f, -0.498156309127808f, 0.542516589164734f, -0.498189061880112f,
+  0.542134463787079f, -0.498221516609192f, 0.541752278804779f, -0.498253703117371f,
+  0.541370153427124f, -0.498285561800003f, 0.540987968444824f, -0.498317152261734f,
+  0.540605723857880f, -0.498348444700241f, 0.540223479270935f, -0.498379439115524f,
+  0.539841234683990f, -0.498410135507584f, 0.539458930492401f, -0.498440563678741f,
+  0.539076626300812f, -0.498470664024353f, 0.538694262504578f, -0.498500496149063f,
+  0.538311958312988f, -0.498530030250549f, 0.537929534912109f, -0.498559266328812f,
+  0.537547171115875f, -0.498588204383850f, 0.537164747714996f, -0.498616874217987f,
+  0.536782264709473f, -0.498645216226578f, 0.536399841308594f, -0.498673290014267f,
+  0.536017298698425f, -0.498701065778732f, 0.535634815692902f, -0.498728543519974f,
+  0.535252273082733f, -0.498755723237991f, 0.534869730472565f, -0.498782604932785f,
+  0.534487187862396f, -0.498809218406677f, 0.534104585647583f, -0.498835533857346f,
+  0.533721983432770f, -0.498861521482468f, 0.533339321613312f, -0.498887240886688f,
+  0.532956659793854f, -0.498912662267685f, 0.532573997974396f, -0.498937815427780f,
+  0.532191336154938f, -0.498962640762329f, 0.531808614730835f, -0.498987197875977f,
+  0.531425893306732f, -0.499011427164078f, 0.531043112277985f, -0.499035388231277f,
+  0.530660390853882f, -0.499059051275253f, 0.530277609825134f, -0.499082416296005f,
+  0.529894769191742f, -0.499105513095856f, 0.529511988162994f, -0.499128282070160f,
+  0.529129147529602f, -0.499150782823563f, 0.528746306896210f, -0.499172955751419f,
+  0.528363406658173f, -0.499194860458374f, 0.527980506420136f, -0.499216467142105f,
+  0.527597606182098f, -0.499237775802612f, 0.527214705944061f, -0.499258816242218f,
+  0.526831746101379f, -0.499279528856277f, 0.526448845863342f, -0.499299973249435f,
+  0.526065826416016f, -0.499320119619370f, 0.525682866573334f, -0.499339967966080f,
+  0.525299847126007f, -0.499359518289566f, 0.524916887283325f, -0.499378770589828f,
+  0.524533808231354f, -0.499397724866867f, 0.524150788784027f, -0.499416410923004f,
+  0.523767769336700f, -0.499434769153595f, 0.523384690284729f, -0.499452859163284f,
+  0.523001611232758f, -0.499470651149750f, 0.522618472576141f, -0.499488145112991f,
+  0.522235393524170f, -0.499505341053009f, 0.521852254867554f, -0.499522238969803f,
+  0.521469116210938f, -0.499538868665695f, 0.521085977554321f, -0.499555170536041f,
+  0.520702838897705f, -0.499571204185486f, 0.520319640636444f, -0.499586939811707f,
+  0.519936442375183f, -0.499602377414703f, 0.519553244113922f, -0.499617516994476f,
+  0.519170045852661f, -0.499632388353348f, 0.518786847591400f, -0.499646931886673f,
+  0.518403589725494f, -0.499661177396774f, 0.518020391464233f, -0.499675154685974f,
+  0.517637133598328f, -0.499688833951950f, 0.517253875732422f, -0.499702215194702f,
+  0.516870558261871f, -0.499715298414230f, 0.516487300395966f, -0.499728083610535f,
+  0.516103982925415f, -0.499740600585938f, 0.515720725059509f, -0.499752789735794f,
+  0.515337407588959f, -0.499764710664749f, 0.514954090118408f, -0.499776333570480f,
+  0.514570772647858f, -0.499787658452988f, 0.514187395572662f, -0.499798685312271f,
+  0.513804078102112f, -0.499809414148331f, 0.513420701026917f, -0.499819844961166f,
+  0.513037383556366f, -0.499830007553101f, 0.512654006481171f, -0.499839842319489f,
+  0.512270629405975f, -0.499849408864975f, 0.511887252330780f, -0.499858677387238f,
+  0.511503815650940f, -0.499867647886276f, 0.511120438575745f, -0.499876320362091f,
+  0.510737061500549f, -0.499884694814682f, 0.510353624820709f, -0.499892801046371f,
+  0.509970188140869f, -0.499900579452515f, 0.509586811065674f, -0.499908089637756f,
+  0.509203374385834f, -0.499915301799774f, 0.508819937705994f, -0.499922215938568f,
+  0.508436501026154f, -0.499928832054138f, 0.508053064346313f, -0.499935150146484f,
+  0.507669627666473f, -0.499941170215607f, 0.507286131381989f, -0.499946922063828f,
+  0.506902694702148f, -0.499952346086502f, 0.506519258022308f, -0.499957501888275f,
+  0.506135761737823f, -0.499962359666824f, 0.505752325057983f, -0.499966919422150f,
+  0.505368828773499f, -0.499971181154251f, 0.504985332489014f, -0.499975144863129f,
+  0.504601895809174f, -0.499978810548782f, 0.504218399524689f, -0.499982208013535f,
+  0.503834903240204f, -0.499985307455063f, 0.503451406955719f, -0.499988079071045f,
+  0.503067970275879f, -0.499990582466125f, 0.502684473991394f, -0.499992787837982f,
+  0.502300977706909f, -0.499994695186615f, 0.501917481422424f, -0.499996334314346f,
+  0.501533985137939f, -0.499997645616531f, 0.501150488853455f, -0.499998688697815f,
+  0.500766992568970f, -0.499999403953552f, 0.500383496284485f, -0.499999850988388f,
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
+/**
+  @par
+  Generation fixed-point realCoefAQ31 array in Q31 format:
+  @par
+  n = 4096
+  
for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }

+  @par
+  Convert to fixed point Q31 format
+      round(pATable[i] * pow(2, 31))
+*/
+const q31_t realCoefAQ31[8192] = {
+    (q31_t)0x40000000, (q31_t)0xc0000000, (q31_t)0x3ff36f02, (q31_t)0xc000013c,
+    (q31_t)0x3fe6de05, (q31_t)0xc00004ef, (q31_t)0x3fda4d09, (q31_t)0xc0000b1a,
+    (q31_t)0x3fcdbc0f, (q31_t)0xc00013bd, (q31_t)0x3fc12b16, (q31_t)0xc0001ed8,
+    (q31_t)0x3fb49a1f, (q31_t)0xc0002c6a, (q31_t)0x3fa8092c, (q31_t)0xc0003c74,
+    (q31_t)0x3f9b783c, (q31_t)0xc0004ef5, (q31_t)0x3f8ee750, (q31_t)0xc00063ee,
+    (q31_t)0x3f825668, (q31_t)0xc0007b5f, (q31_t)0x3f75c585, (q31_t)0xc0009547,
+    (q31_t)0x3f6934a8, (q31_t)0xc000b1a7, (q31_t)0x3f5ca3d0, (q31_t)0xc000d07e,
+    (q31_t)0x3f5012fe, (q31_t)0xc000f1ce, (q31_t)0x3f438234, (q31_t)0xc0011594,
+    (q31_t)0x3f36f170, (q31_t)0xc0013bd3, (q31_t)0x3f2a60b4, (q31_t)0xc0016489,
+    (q31_t)0x3f1dd001, (q31_t)0xc0018fb6, (q31_t)0x3f113f56, (q31_t)0xc001bd5c,
+    (q31_t)0x3f04aeb5, (q31_t)0xc001ed78, (q31_t)0x3ef81e1d, (q31_t)0xc002200d,
+    (q31_t)0x3eeb8d8f, (q31_t)0xc0025519, (q31_t)0x3edefd0c, (q31_t)0xc0028c9c,
+    (q31_t)0x3ed26c94, (q31_t)0xc002c697, (q31_t)0x3ec5dc28, (q31_t)0xc003030a,
+    (q31_t)0x3eb94bc8, (q31_t)0xc00341f4, (q31_t)0x3eacbb74, (q31_t)0xc0038356,
+    (q31_t)0x3ea02b2e, (q31_t)0xc003c72f, (q31_t)0x3e939af5, (q31_t)0xc0040d80,
+    (q31_t)0x3e870aca, (q31_t)0xc0045648, (q31_t)0x3e7a7aae, (q31_t)0xc004a188,
+    (q31_t)0x3e6deaa1, (q31_t)0xc004ef3f, (q31_t)0x3e615aa3, (q31_t)0xc0053f6e,
+    (q31_t)0x3e54cab5, (q31_t)0xc0059214, (q31_t)0x3e483ad8, (q31_t)0xc005e731,
+    (q31_t)0x3e3bab0b, (q31_t)0xc0063ec6, (q31_t)0x3e2f1b50, (q31_t)0xc00698d3,
+    (q31_t)0x3e228ba7, (q31_t)0xc006f556, (q31_t)0x3e15fc11, (q31_t)0xc0075452,
+    (q31_t)0x3e096c8d, (q31_t)0xc007b5c4, (q31_t)0x3dfcdd1d, (q31_t)0xc00819ae,
+    (q31_t)0x3df04dc0, (q31_t)0xc008800f, (q31_t)0x3de3be78, (q31_t)0xc008e8e8,
+    (q31_t)0x3dd72f45, (q31_t)0xc0095438, (q31_t)0x3dcaa027, (q31_t)0xc009c1ff,
+    (q31_t)0x3dbe111e, (q31_t)0xc00a323d, (q31_t)0x3db1822c, (q31_t)0xc00aa4f3,
+    (q31_t)0x3da4f351, (q31_t)0xc00b1a20, (q31_t)0x3d98648d, (q31_t)0xc00b91c4,
+    (q31_t)0x3d8bd5e1, (q31_t)0xc00c0be0, (q31_t)0x3d7f474d, (q31_t)0xc00c8872,
+    (q31_t)0x3d72b8d2, (q31_t)0xc00d077c, (q31_t)0x3d662a70, (q31_t)0xc00d88fd,
+    (q31_t)0x3d599c28, (q31_t)0xc00e0cf5, (q31_t)0x3d4d0df9, (q31_t)0xc00e9364,
+    (q31_t)0x3d407fe6, (q31_t)0xc00f1c4a, (q31_t)0x3d33f1ed, (q31_t)0xc00fa7a8,
+    (q31_t)0x3d276410, (q31_t)0xc010357c, (q31_t)0x3d1ad650, (q31_t)0xc010c5c7,
+    (q31_t)0x3d0e48ab, (q31_t)0xc011588a, (q31_t)0x3d01bb24, (q31_t)0xc011edc3,
+    (q31_t)0x3cf52dbb, (q31_t)0xc0128574, (q31_t)0x3ce8a06f, (q31_t)0xc0131f9b,
+    (q31_t)0x3cdc1342, (q31_t)0xc013bc39, (q31_t)0x3ccf8634, (q31_t)0xc0145b4e,
+    (q31_t)0x3cc2f945, (q31_t)0xc014fcda, (q31_t)0x3cb66c77, (q31_t)0xc015a0dd,
+    (q31_t)0x3ca9dfc8, (q31_t)0xc0164757, (q31_t)0x3c9d533b, (q31_t)0xc016f047,
+    (q31_t)0x3c90c6cf, (q31_t)0xc0179bae, (q31_t)0x3c843a85, (q31_t)0xc018498c,
+    (q31_t)0x3c77ae5e, (q31_t)0xc018f9e1, (q31_t)0x3c6b2259, (q31_t)0xc019acac,
+    (q31_t)0x3c5e9678, (q31_t)0xc01a61ee, (q31_t)0x3c520aba, (q31_t)0xc01b19a7,
+    (q31_t)0x3c457f21, (q31_t)0xc01bd3d6, (q31_t)0x3c38f3ac, (q31_t)0xc01c907c,
+    (q31_t)0x3c2c685d, (q31_t)0xc01d4f99, (q31_t)0x3c1fdd34, (q31_t)0xc01e112b,
+    (q31_t)0x3c135231, (q31_t)0xc01ed535, (q31_t)0x3c06c754, (q31_t)0xc01f9bb5,
+    (q31_t)0x3bfa3c9f, (q31_t)0xc02064ab, (q31_t)0x3bedb212, (q31_t)0xc0213018,
+    (q31_t)0x3be127ac, (q31_t)0xc021fdfb, (q31_t)0x3bd49d70, (q31_t)0xc022ce54,
+    (q31_t)0x3bc8135c, (q31_t)0xc023a124, (q31_t)0x3bbb8973, (q31_t)0xc024766a,
+    (q31_t)0x3baeffb3, (q31_t)0xc0254e27, (q31_t)0x3ba2761e, (q31_t)0xc0262859,
+    (q31_t)0x3b95ecb4, (q31_t)0xc0270502, (q31_t)0x3b896375, (q31_t)0xc027e421,
+    (q31_t)0x3b7cda63, (q31_t)0xc028c5b6, (q31_t)0x3b70517d, (q31_t)0xc029a9c1,
+    (q31_t)0x3b63c8c4, (q31_t)0xc02a9042, (q31_t)0x3b574039, (q31_t)0xc02b7939,
+    (q31_t)0x3b4ab7db, (q31_t)0xc02c64a6, (q31_t)0x3b3e2fac, (q31_t)0xc02d5289,
+    (q31_t)0x3b31a7ac, (q31_t)0xc02e42e2, (q31_t)0x3b251fdc, (q31_t)0xc02f35b1,
+    (q31_t)0x3b18983b, (q31_t)0xc0302af5, (q31_t)0x3b0c10cb, (q31_t)0xc03122b0,
+    (q31_t)0x3aff898c, (q31_t)0xc0321ce0, (q31_t)0x3af3027e, (q31_t)0xc0331986,
+    (q31_t)0x3ae67ba2, (q31_t)0xc03418a2, (q31_t)0x3ad9f4f8, (q31_t)0xc0351a33,
+    (q31_t)0x3acd6e81, (q31_t)0xc0361e3a, (q31_t)0x3ac0e83d, (q31_t)0xc03724b6,
+    (q31_t)0x3ab4622d, (q31_t)0xc0382da8, (q31_t)0x3aa7dc52, (q31_t)0xc0393910,
+    (q31_t)0x3a9b56ab, (q31_t)0xc03a46ed, (q31_t)0x3a8ed139, (q31_t)0xc03b573f,
+    (q31_t)0x3a824bfd, (q31_t)0xc03c6a07, (q31_t)0x3a75c6f8, (q31_t)0xc03d7f44,
+    (q31_t)0x3a694229, (q31_t)0xc03e96f6, (q31_t)0x3a5cbd91, (q31_t)0xc03fb11d,
+    (q31_t)0x3a503930, (q31_t)0xc040cdba, (q31_t)0x3a43b508, (q31_t)0xc041eccc,
+    (q31_t)0x3a373119, (q31_t)0xc0430e53, (q31_t)0x3a2aad62, (q31_t)0xc044324f,
+    (q31_t)0x3a1e29e5, (q31_t)0xc04558c0, (q31_t)0x3a11a6a3, (q31_t)0xc04681a6,
+    (q31_t)0x3a05239a, (q31_t)0xc047ad01, (q31_t)0x39f8a0cd, (q31_t)0xc048dad1,
+    (q31_t)0x39ec1e3b, (q31_t)0xc04a0b16, (q31_t)0x39df9be6, (q31_t)0xc04b3dcf,
+    (q31_t)0x39d319cc, (q31_t)0xc04c72fe, (q31_t)0x39c697f0, (q31_t)0xc04daaa1,
+    (q31_t)0x39ba1651, (q31_t)0xc04ee4b8, (q31_t)0x39ad94f0, (q31_t)0xc0502145,
+    (q31_t)0x39a113cd, (q31_t)0xc0516045, (q31_t)0x399492ea, (q31_t)0xc052a1bb,
+    (q31_t)0x39881245, (q31_t)0xc053e5a5, (q31_t)0x397b91e1, (q31_t)0xc0552c03,
+    (q31_t)0x396f11bc, (q31_t)0xc05674d6, (q31_t)0x396291d9, (q31_t)0xc057c01d,
+    (q31_t)0x39561237, (q31_t)0xc0590dd8, (q31_t)0x394992d7, (q31_t)0xc05a5e07,
+    (q31_t)0x393d13b8, (q31_t)0xc05bb0ab, (q31_t)0x393094dd, (q31_t)0xc05d05c3,
+    (q31_t)0x39241645, (q31_t)0xc05e5d4e, (q31_t)0x391797f0, (q31_t)0xc05fb74e,
+    (q31_t)0x390b19e0, (q31_t)0xc06113c2, (q31_t)0x38fe9c15, (q31_t)0xc06272aa,
+    (q31_t)0x38f21e8e, (q31_t)0xc063d405, (q31_t)0x38e5a14d, (q31_t)0xc06537d4,
+    (q31_t)0x38d92452, (q31_t)0xc0669e18, (q31_t)0x38cca79e, (q31_t)0xc06806ce,
+    (q31_t)0x38c02b31, (q31_t)0xc06971f9, (q31_t)0x38b3af0c, (q31_t)0xc06adf97,
+    (q31_t)0x38a7332e, (q31_t)0xc06c4fa8, (q31_t)0x389ab799, (q31_t)0xc06dc22e,
+    (q31_t)0x388e3c4d, (q31_t)0xc06f3726, (q31_t)0x3881c14b, (q31_t)0xc070ae92,
+    (q31_t)0x38754692, (q31_t)0xc0722871, (q31_t)0x3868cc24, (q31_t)0xc073a4c3,
+    (q31_t)0x385c5201, (q31_t)0xc0752389, (q31_t)0x384fd829, (q31_t)0xc076a4c2,
+    (q31_t)0x38435e9d, (q31_t)0xc078286e, (q31_t)0x3836e55d, (q31_t)0xc079ae8c,
+    (q31_t)0x382a6c6a, (q31_t)0xc07b371e, (q31_t)0x381df3c5, (q31_t)0xc07cc223,
+    (q31_t)0x38117b6d, (q31_t)0xc07e4f9b, (q31_t)0x38050364, (q31_t)0xc07fdf85,
+    (q31_t)0x37f88ba9, (q31_t)0xc08171e2, (q31_t)0x37ec143e, (q31_t)0xc08306b2,
+    (q31_t)0x37df9d22, (q31_t)0xc0849df4, (q31_t)0x37d32657, (q31_t)0xc08637a9,
+    (q31_t)0x37c6afdc, (q31_t)0xc087d3d0, (q31_t)0x37ba39b3, (q31_t)0xc089726a,
+    (q31_t)0x37adc3db, (q31_t)0xc08b1376, (q31_t)0x37a14e55, (q31_t)0xc08cb6f5,
+    (q31_t)0x3794d922, (q31_t)0xc08e5ce5, (q31_t)0x37886442, (q31_t)0xc0900548,
+    (q31_t)0x377befb5, (q31_t)0xc091b01d, (q31_t)0x376f7b7d, (q31_t)0xc0935d64,
+    (q31_t)0x37630799, (q31_t)0xc0950d1d, (q31_t)0x3756940a, (q31_t)0xc096bf48,
+    (q31_t)0x374a20d0, (q31_t)0xc09873e4, (q31_t)0x373daded, (q31_t)0xc09a2af3,
+    (q31_t)0x37313b60, (q31_t)0xc09be473, (q31_t)0x3724c92a, (q31_t)0xc09da065,
+    (q31_t)0x3718574b, (q31_t)0xc09f5ec8, (q31_t)0x370be5c4, (q31_t)0xc0a11f9d,
+    (q31_t)0x36ff7496, (q31_t)0xc0a2e2e3, (q31_t)0x36f303c0, (q31_t)0xc0a4a89b,
+    (q31_t)0x36e69344, (q31_t)0xc0a670c4, (q31_t)0x36da2321, (q31_t)0xc0a83b5e,
+    (q31_t)0x36cdb359, (q31_t)0xc0aa086a, (q31_t)0x36c143ec, (q31_t)0xc0abd7e6,
+    (q31_t)0x36b4d4d9, (q31_t)0xc0ada9d4, (q31_t)0x36a86623, (q31_t)0xc0af7e33,
+    (q31_t)0x369bf7c9, (q31_t)0xc0b15502, (q31_t)0x368f89cb, (q31_t)0xc0b32e42,
+    (q31_t)0x36831c2b, (q31_t)0xc0b509f3, (q31_t)0x3676aee8, (q31_t)0xc0b6e815,
+    (q31_t)0x366a4203, (q31_t)0xc0b8c8a7, (q31_t)0x365dd57d, (q31_t)0xc0baabaa,
+    (q31_t)0x36516956, (q31_t)0xc0bc911d, (q31_t)0x3644fd8f, (q31_t)0xc0be7901,
+    (q31_t)0x36389228, (q31_t)0xc0c06355, (q31_t)0x362c2721, (q31_t)0xc0c25019,
+    (q31_t)0x361fbc7b, (q31_t)0xc0c43f4d, (q31_t)0x36135237, (q31_t)0xc0c630f2,
+    (q31_t)0x3606e854, (q31_t)0xc0c82506, (q31_t)0x35fa7ed4, (q31_t)0xc0ca1b8a,
+    (q31_t)0x35ee15b7, (q31_t)0xc0cc147f, (q31_t)0x35e1acfd, (q31_t)0xc0ce0fe3,
+    (q31_t)0x35d544a7, (q31_t)0xc0d00db6, (q31_t)0x35c8dcb6, (q31_t)0xc0d20dfa,
+    (q31_t)0x35bc7529, (q31_t)0xc0d410ad, (q31_t)0x35b00e02, (q31_t)0xc0d615cf,
+    (q31_t)0x35a3a740, (q31_t)0xc0d81d61, (q31_t)0x359740e5, (q31_t)0xc0da2762,
+    (q31_t)0x358adaf0, (q31_t)0xc0dc33d2, (q31_t)0x357e7563, (q31_t)0xc0de42b2,
+    (q31_t)0x3572103d, (q31_t)0xc0e05401, (q31_t)0x3565ab80, (q31_t)0xc0e267be,
+    (q31_t)0x3559472b, (q31_t)0xc0e47deb, (q31_t)0x354ce33f, (q31_t)0xc0e69686,
+    (q31_t)0x35407fbd, (q31_t)0xc0e8b190, (q31_t)0x35341ca5, (q31_t)0xc0eacf09,
+    (q31_t)0x3527b9f7, (q31_t)0xc0eceef1, (q31_t)0x351b57b5, (q31_t)0xc0ef1147,
+    (q31_t)0x350ef5de, (q31_t)0xc0f1360b, (q31_t)0x35029473, (q31_t)0xc0f35d3e,
+    (q31_t)0x34f63374, (q31_t)0xc0f586df, (q31_t)0x34e9d2e3, (q31_t)0xc0f7b2ee,
+    (q31_t)0x34dd72be, (q31_t)0xc0f9e16b, (q31_t)0x34d11308, (q31_t)0xc0fc1257,
+    (q31_t)0x34c4b3c0, (q31_t)0xc0fe45b0, (q31_t)0x34b854e7, (q31_t)0xc1007b77,
+    (q31_t)0x34abf67e, (q31_t)0xc102b3ac, (q31_t)0x349f9884, (q31_t)0xc104ee4f,
+    (q31_t)0x34933afa, (q31_t)0xc1072b5f, (q31_t)0x3486dde1, (q31_t)0xc1096add,
+    (q31_t)0x347a8139, (q31_t)0xc10bacc8, (q31_t)0x346e2504, (q31_t)0xc10df120,
+    (q31_t)0x3461c940, (q31_t)0xc11037e6, (q31_t)0x34556def, (q31_t)0xc1128119,
+    (q31_t)0x34491311, (q31_t)0xc114ccb9, (q31_t)0x343cb8a7, (q31_t)0xc1171ac6,
+    (q31_t)0x34305eb0, (q31_t)0xc1196b3f, (q31_t)0x3424052f, (q31_t)0xc11bbe26,
+    (q31_t)0x3417ac22, (q31_t)0xc11e1379, (q31_t)0x340b538b, (q31_t)0xc1206b39,
+    (q31_t)0x33fefb6a, (q31_t)0xc122c566, (q31_t)0x33f2a3bf, (q31_t)0xc12521ff,
+    (q31_t)0x33e64c8c, (q31_t)0xc1278104, (q31_t)0x33d9f5cf, (q31_t)0xc129e276,
+    (q31_t)0x33cd9f8b, (q31_t)0xc12c4653, (q31_t)0x33c149bf, (q31_t)0xc12eac9d,
+    (q31_t)0x33b4f46c, (q31_t)0xc1311553, (q31_t)0x33a89f92, (q31_t)0xc1338075,
+    (q31_t)0x339c4b32, (q31_t)0xc135ee02, (q31_t)0x338ff74d, (q31_t)0xc1385dfb,
+    (q31_t)0x3383a3e2, (q31_t)0xc13ad060, (q31_t)0x337750f2, (q31_t)0xc13d4530,
+    (q31_t)0x336afe7e, (q31_t)0xc13fbc6c, (q31_t)0x335eac86, (q31_t)0xc1423613,
+    (q31_t)0x33525b0b, (q31_t)0xc144b225, (q31_t)0x33460a0d, (q31_t)0xc14730a3,
+    (q31_t)0x3339b98d, (q31_t)0xc149b18b, (q31_t)0x332d698a, (q31_t)0xc14c34df,
+    (q31_t)0x33211a07, (q31_t)0xc14eba9d, (q31_t)0x3314cb02, (q31_t)0xc15142c6,
+    (q31_t)0x33087c7d, (q31_t)0xc153cd5a, (q31_t)0x32fc2e77, (q31_t)0xc1565a58,
+    (q31_t)0x32efe0f2, (q31_t)0xc158e9c1, (q31_t)0x32e393ef, (q31_t)0xc15b7b94,
+    (q31_t)0x32d7476c, (q31_t)0xc15e0fd1, (q31_t)0x32cafb6b, (q31_t)0xc160a678,
+    (q31_t)0x32beafed, (q31_t)0xc1633f8a, (q31_t)0x32b264f2, (q31_t)0xc165db05,
+    (q31_t)0x32a61a7a, (q31_t)0xc16878eb, (q31_t)0x3299d085, (q31_t)0xc16b193a,
+    (q31_t)0x328d8715, (q31_t)0xc16dbbf3, (q31_t)0x32813e2a, (q31_t)0xc1706115,
+    (q31_t)0x3274f5c3, (q31_t)0xc17308a1, (q31_t)0x3268ade3, (q31_t)0xc175b296,
+    (q31_t)0x325c6688, (q31_t)0xc1785ef4, (q31_t)0x32501fb5, (q31_t)0xc17b0dbb,
+    (q31_t)0x3243d968, (q31_t)0xc17dbeec, (q31_t)0x323793a3, (q31_t)0xc1807285,
+    (q31_t)0x322b4e66, (q31_t)0xc1832888, (q31_t)0x321f09b1, (q31_t)0xc185e0f3,
+    (q31_t)0x3212c585, (q31_t)0xc1889bc6, (q31_t)0x320681e3, (q31_t)0xc18b5903,
+    (q31_t)0x31fa3ecb, (q31_t)0xc18e18a7, (q31_t)0x31edfc3d, (q31_t)0xc190dab4,
+    (q31_t)0x31e1ba3a, (q31_t)0xc1939f29, (q31_t)0x31d578c2, (q31_t)0xc1966606,
+    (q31_t)0x31c937d6, (q31_t)0xc1992f4c, (q31_t)0x31bcf777, (q31_t)0xc19bfaf9,
+    (q31_t)0x31b0b7a4, (q31_t)0xc19ec90d, (q31_t)0x31a4785e, (q31_t)0xc1a1998a,
+    (q31_t)0x319839a6, (q31_t)0xc1a46c6e, (q31_t)0x318bfb7d, (q31_t)0xc1a741b9,
+    (q31_t)0x317fbde2, (q31_t)0xc1aa196c, (q31_t)0x317380d6, (q31_t)0xc1acf386,
+    (q31_t)0x31674459, (q31_t)0xc1afd007, (q31_t)0x315b086d, (q31_t)0xc1b2aef0,
+    (q31_t)0x314ecd11, (q31_t)0xc1b5903f, (q31_t)0x31429247, (q31_t)0xc1b873f5,
+    (q31_t)0x3136580d, (q31_t)0xc1bb5a11, (q31_t)0x312a1e66, (q31_t)0xc1be4294,
+    (q31_t)0x311de551, (q31_t)0xc1c12d7e, (q31_t)0x3111accf, (q31_t)0xc1c41ace,
+    (q31_t)0x310574e0, (q31_t)0xc1c70a84, (q31_t)0x30f93d86, (q31_t)0xc1c9fca0,
+    (q31_t)0x30ed06bf, (q31_t)0xc1ccf122, (q31_t)0x30e0d08d, (q31_t)0xc1cfe80a,
+    (q31_t)0x30d49af1, (q31_t)0xc1d2e158, (q31_t)0x30c865ea, (q31_t)0xc1d5dd0c,
+    (q31_t)0x30bc317a, (q31_t)0xc1d8db25, (q31_t)0x30affda0, (q31_t)0xc1dbdba3,
+    (q31_t)0x30a3ca5d, (q31_t)0xc1dede87, (q31_t)0x309797b2, (q31_t)0xc1e1e3d0,
+    (q31_t)0x308b659f, (q31_t)0xc1e4eb7e, (q31_t)0x307f3424, (q31_t)0xc1e7f591,
+    (q31_t)0x30730342, (q31_t)0xc1eb0209, (q31_t)0x3066d2fa, (q31_t)0xc1ee10e5,
+    (q31_t)0x305aa34c, (q31_t)0xc1f12227, (q31_t)0x304e7438, (q31_t)0xc1f435cc,
+    (q31_t)0x304245c0, (q31_t)0xc1f74bd6, (q31_t)0x303617e2, (q31_t)0xc1fa6445,
+    (q31_t)0x3029eaa1, (q31_t)0xc1fd7f17, (q31_t)0x301dbdfb, (q31_t)0xc2009c4e,
+    (q31_t)0x301191f3, (q31_t)0xc203bbe8, (q31_t)0x30056687, (q31_t)0xc206dde6,
+    (q31_t)0x2ff93bba, (q31_t)0xc20a0248, (q31_t)0x2fed118a, (q31_t)0xc20d290d,
+    (q31_t)0x2fe0e7f9, (q31_t)0xc2105236, (q31_t)0x2fd4bf08, (q31_t)0xc2137dc2,
+    (q31_t)0x2fc896b5, (q31_t)0xc216abb1, (q31_t)0x2fbc6f03, (q31_t)0xc219dc03,
+    (q31_t)0x2fb047f2, (q31_t)0xc21d0eb8, (q31_t)0x2fa42181, (q31_t)0xc22043d0,
+    (q31_t)0x2f97fbb2, (q31_t)0xc2237b4b, (q31_t)0x2f8bd685, (q31_t)0xc226b528,
+    (q31_t)0x2f7fb1fa, (q31_t)0xc229f167, (q31_t)0x2f738e12, (q31_t)0xc22d3009,
+    (q31_t)0x2f676ace, (q31_t)0xc230710d, (q31_t)0x2f5b482d, (q31_t)0xc233b473,
+    (q31_t)0x2f4f2630, (q31_t)0xc236fa3b, (q31_t)0x2f4304d8, (q31_t)0xc23a4265,
+    (q31_t)0x2f36e426, (q31_t)0xc23d8cf1, (q31_t)0x2f2ac419, (q31_t)0xc240d9de,
+    (q31_t)0x2f1ea4b2, (q31_t)0xc244292c, (q31_t)0x2f1285f2, (q31_t)0xc2477adc,
+    (q31_t)0x2f0667d9, (q31_t)0xc24aceed, (q31_t)0x2efa4a67, (q31_t)0xc24e255e,
+    (q31_t)0x2eee2d9d, (q31_t)0xc2517e31, (q31_t)0x2ee2117c, (q31_t)0xc254d965,
+    (q31_t)0x2ed5f604, (q31_t)0xc25836f9, (q31_t)0x2ec9db35, (q31_t)0xc25b96ee,
+    (q31_t)0x2ebdc110, (q31_t)0xc25ef943, (q31_t)0x2eb1a796, (q31_t)0xc2625df8,
+    (q31_t)0x2ea58ec6, (q31_t)0xc265c50e, (q31_t)0x2e9976a1, (q31_t)0xc2692e83,
+    (q31_t)0x2e8d5f29, (q31_t)0xc26c9a58, (q31_t)0x2e81485c, (q31_t)0xc270088e,
+    (q31_t)0x2e75323c, (q31_t)0xc2737922, (q31_t)0x2e691cc9, (q31_t)0xc276ec16,
+    (q31_t)0x2e5d0804, (q31_t)0xc27a616a, (q31_t)0x2e50f3ed, (q31_t)0xc27dd91c,
+    (q31_t)0x2e44e084, (q31_t)0xc281532e, (q31_t)0x2e38cdcb, (q31_t)0xc284cf9f,
+    (q31_t)0x2e2cbbc1, (q31_t)0xc2884e6e, (q31_t)0x2e20aa67, (q31_t)0xc28bcf9c,
+    (q31_t)0x2e1499bd, (q31_t)0xc28f5329, (q31_t)0x2e0889c4, (q31_t)0xc292d914,
+    (q31_t)0x2dfc7a7c, (q31_t)0xc296615d, (q31_t)0x2df06be6, (q31_t)0xc299ec05,
+    (q31_t)0x2de45e03, (q31_t)0xc29d790a, (q31_t)0x2dd850d2, (q31_t)0xc2a1086d,
+    (q31_t)0x2dcc4454, (q31_t)0xc2a49a2e, (q31_t)0x2dc0388a, (q31_t)0xc2a82e4d,
+    (q31_t)0x2db42d74, (q31_t)0xc2abc4c9, (q31_t)0x2da82313, (q31_t)0xc2af5da2,
+    (q31_t)0x2d9c1967, (q31_t)0xc2b2f8d8, (q31_t)0x2d901070, (q31_t)0xc2b6966c,
+    (q31_t)0x2d84082f, (q31_t)0xc2ba365c, (q31_t)0x2d7800a5, (q31_t)0xc2bdd8a9,
+    (q31_t)0x2d6bf9d1, (q31_t)0xc2c17d52, (q31_t)0x2d5ff3b5, (q31_t)0xc2c52459,
+    (q31_t)0x2d53ee51, (q31_t)0xc2c8cdbb, (q31_t)0x2d47e9a5, (q31_t)0xc2cc7979,
+    (q31_t)0x2d3be5b1, (q31_t)0xc2d02794, (q31_t)0x2d2fe277, (q31_t)0xc2d3d80a,
+    (q31_t)0x2d23dff7, (q31_t)0xc2d78add, (q31_t)0x2d17de31, (q31_t)0xc2db400a,
+    (q31_t)0x2d0bdd25, (q31_t)0xc2def794, (q31_t)0x2cffdcd4, (q31_t)0xc2e2b178,
+    (q31_t)0x2cf3dd3f, (q31_t)0xc2e66db8, (q31_t)0x2ce7de66, (q31_t)0xc2ea2c53,
+    (q31_t)0x2cdbe04a, (q31_t)0xc2eded49, (q31_t)0x2ccfe2ea, (q31_t)0xc2f1b099,
+    (q31_t)0x2cc3e648, (q31_t)0xc2f57644, (q31_t)0x2cb7ea63, (q31_t)0xc2f93e4a,
+    (q31_t)0x2cabef3d, (q31_t)0xc2fd08a9, (q31_t)0x2c9ff4d6, (q31_t)0xc300d563,
+    (q31_t)0x2c93fb2e, (q31_t)0xc304a477, (q31_t)0x2c880245, (q31_t)0xc30875e5,
+    (q31_t)0x2c7c0a1d, (q31_t)0xc30c49ad, (q31_t)0x2c7012b5, (q31_t)0xc3101fce,
+    (q31_t)0x2c641c0e, (q31_t)0xc313f848, (q31_t)0x2c582629, (q31_t)0xc317d31c,
+    (q31_t)0x2c4c3106, (q31_t)0xc31bb049, (q31_t)0x2c403ca5, (q31_t)0xc31f8fcf,
+    (q31_t)0x2c344908, (q31_t)0xc32371ae, (q31_t)0x2c28562d, (q31_t)0xc32755e5,
+    (q31_t)0x2c1c6417, (q31_t)0xc32b3c75, (q31_t)0x2c1072c4, (q31_t)0xc32f255e,
+    (q31_t)0x2c048237, (q31_t)0xc333109e, (q31_t)0x2bf8926f, (q31_t)0xc336fe37,
+    (q31_t)0x2beca36c, (q31_t)0xc33aee27, (q31_t)0x2be0b52f, (q31_t)0xc33ee070,
+    (q31_t)0x2bd4c7ba, (q31_t)0xc342d510, (q31_t)0x2bc8db0b, (q31_t)0xc346cc07,
+    (q31_t)0x2bbcef23, (q31_t)0xc34ac556, (q31_t)0x2bb10404, (q31_t)0xc34ec0fc,
+    (q31_t)0x2ba519ad, (q31_t)0xc352bef9, (q31_t)0x2b99301f, (q31_t)0xc356bf4d,
+    (q31_t)0x2b8d475b, (q31_t)0xc35ac1f7, (q31_t)0x2b815f60, (q31_t)0xc35ec6f8,
+    (q31_t)0x2b75782f, (q31_t)0xc362ce50, (q31_t)0x2b6991ca, (q31_t)0xc366d7fd,
+    (q31_t)0x2b5dac2f, (q31_t)0xc36ae401, (q31_t)0x2b51c760, (q31_t)0xc36ef25b,
+    (q31_t)0x2b45e35d, (q31_t)0xc373030a, (q31_t)0x2b3a0027, (q31_t)0xc377160f,
+    (q31_t)0x2b2e1dbe, (q31_t)0xc37b2b6a, (q31_t)0x2b223c22, (q31_t)0xc37f4319,
+    (q31_t)0x2b165b54, (q31_t)0xc3835d1e, (q31_t)0x2b0a7b54, (q31_t)0xc3877978,
+    (q31_t)0x2afe9c24, (q31_t)0xc38b9827, (q31_t)0x2af2bdc3, (q31_t)0xc38fb92a,
+    (q31_t)0x2ae6e031, (q31_t)0xc393dc82, (q31_t)0x2adb0370, (q31_t)0xc398022f,
+    (q31_t)0x2acf277f, (q31_t)0xc39c2a2f, (q31_t)0x2ac34c60, (q31_t)0xc3a05484,
+    (q31_t)0x2ab77212, (q31_t)0xc3a4812c, (q31_t)0x2aab9896, (q31_t)0xc3a8b028,
+    (q31_t)0x2a9fbfed, (q31_t)0xc3ace178, (q31_t)0x2a93e817, (q31_t)0xc3b1151b,
+    (q31_t)0x2a881114, (q31_t)0xc3b54b11, (q31_t)0x2a7c3ae5, (q31_t)0xc3b9835a,
+    (q31_t)0x2a70658a, (q31_t)0xc3bdbdf6, (q31_t)0x2a649105, (q31_t)0xc3c1fae5,
+    (q31_t)0x2a58bd54, (q31_t)0xc3c63a26, (q31_t)0x2a4cea79, (q31_t)0xc3ca7bba,
+    (q31_t)0x2a411874, (q31_t)0xc3cebfa0, (q31_t)0x2a354746, (q31_t)0xc3d305d8,
+    (q31_t)0x2a2976ef, (q31_t)0xc3d74e62, (q31_t)0x2a1da770, (q31_t)0xc3db993e,
+    (q31_t)0x2a11d8c8, (q31_t)0xc3dfe66c, (q31_t)0x2a060af9, (q31_t)0xc3e435ea,
+    (q31_t)0x29fa3e03, (q31_t)0xc3e887bb, (q31_t)0x29ee71e6, (q31_t)0xc3ecdbdc,
+    (q31_t)0x29e2a6a3, (q31_t)0xc3f1324e, (q31_t)0x29d6dc3b, (q31_t)0xc3f58b10,
+    (q31_t)0x29cb12ad, (q31_t)0xc3f9e624, (q31_t)0x29bf49fa, (q31_t)0xc3fe4388,
+    (q31_t)0x29b38223, (q31_t)0xc402a33c, (q31_t)0x29a7bb28, (q31_t)0xc4070540,
+    (q31_t)0x299bf509, (q31_t)0xc40b6994, (q31_t)0x29902fc7, (q31_t)0xc40fd037,
+    (q31_t)0x29846b63, (q31_t)0xc414392b, (q31_t)0x2978a7dd, (q31_t)0xc418a46d,
+    (q31_t)0x296ce535, (q31_t)0xc41d11ff, (q31_t)0x2961236c, (q31_t)0xc42181e0,
+    (q31_t)0x29556282, (q31_t)0xc425f410, (q31_t)0x2949a278, (q31_t)0xc42a688f,
+    (q31_t)0x293de34e, (q31_t)0xc42edf5c, (q31_t)0x29322505, (q31_t)0xc4335877,
+    (q31_t)0x2926679c, (q31_t)0xc437d3e1, (q31_t)0x291aab16, (q31_t)0xc43c5199,
+    (q31_t)0x290eef71, (q31_t)0xc440d19e, (q31_t)0x290334af, (q31_t)0xc44553f2,
+    (q31_t)0x28f77acf, (q31_t)0xc449d892, (q31_t)0x28ebc1d3, (q31_t)0xc44e5f80,
+    (q31_t)0x28e009ba, (q31_t)0xc452e8bc, (q31_t)0x28d45286, (q31_t)0xc4577444,
+    (q31_t)0x28c89c37, (q31_t)0xc45c0219, (q31_t)0x28bce6cd, (q31_t)0xc460923b,
+    (q31_t)0x28b13248, (q31_t)0xc46524a9, (q31_t)0x28a57ea9, (q31_t)0xc469b963,
+    (q31_t)0x2899cbf1, (q31_t)0xc46e5069, (q31_t)0x288e1a20, (q31_t)0xc472e9bc,
+    (q31_t)0x28826936, (q31_t)0xc477855a, (q31_t)0x2876b934, (q31_t)0xc47c2344,
+    (q31_t)0x286b0a1a, (q31_t)0xc480c379, (q31_t)0x285f5be9, (q31_t)0xc48565f9,
+    (q31_t)0x2853aea1, (q31_t)0xc48a0ac4, (q31_t)0x28480243, (q31_t)0xc48eb1db,
+    (q31_t)0x283c56cf, (q31_t)0xc4935b3c, (q31_t)0x2830ac45, (q31_t)0xc49806e7,
+    (q31_t)0x282502a7, (q31_t)0xc49cb4dd, (q31_t)0x281959f4, (q31_t)0xc4a1651c,
+    (q31_t)0x280db22d, (q31_t)0xc4a617a6, (q31_t)0x28020b52, (q31_t)0xc4aacc7a,
+    (q31_t)0x27f66564, (q31_t)0xc4af8397, (q31_t)0x27eac063, (q31_t)0xc4b43cfd,
+    (q31_t)0x27df1c50, (q31_t)0xc4b8f8ad, (q31_t)0x27d3792b, (q31_t)0xc4bdb6a6,
+    (q31_t)0x27c7d6f4, (q31_t)0xc4c276e8, (q31_t)0x27bc35ad, (q31_t)0xc4c73972,
+    (q31_t)0x27b09555, (q31_t)0xc4cbfe45, (q31_t)0x27a4f5ed, (q31_t)0xc4d0c560,
+    (q31_t)0x27995776, (q31_t)0xc4d58ec3, (q31_t)0x278db9ef, (q31_t)0xc4da5a6f,
+    (q31_t)0x27821d59, (q31_t)0xc4df2862, (q31_t)0x277681b6, (q31_t)0xc4e3f89c,
+    (q31_t)0x276ae704, (q31_t)0xc4e8cb1e, (q31_t)0x275f4d45, (q31_t)0xc4ed9fe7,
+    (q31_t)0x2753b479, (q31_t)0xc4f276f7, (q31_t)0x27481ca1, (q31_t)0xc4f7504e,
+    (q31_t)0x273c85bc, (q31_t)0xc4fc2bec, (q31_t)0x2730efcc, (q31_t)0xc50109d0,
+    (q31_t)0x27255ad1, (q31_t)0xc505e9fb, (q31_t)0x2719c6cb, (q31_t)0xc50acc6b,
+    (q31_t)0x270e33bb, (q31_t)0xc50fb121, (q31_t)0x2702a1a1, (q31_t)0xc514981d,
+    (q31_t)0x26f7107e, (q31_t)0xc519815f, (q31_t)0x26eb8052, (q31_t)0xc51e6ce6,
+    (q31_t)0x26dff11d, (q31_t)0xc5235ab2, (q31_t)0x26d462e1, (q31_t)0xc5284ac3,
+    (q31_t)0x26c8d59c, (q31_t)0xc52d3d18, (q31_t)0x26bd4951, (q31_t)0xc53231b3,
+    (q31_t)0x26b1bdff, (q31_t)0xc5372891, (q31_t)0x26a633a6, (q31_t)0xc53c21b4,
+    (q31_t)0x269aaa48, (q31_t)0xc5411d1b, (q31_t)0x268f21e5, (q31_t)0xc5461ac6,
+    (q31_t)0x26839a7c, (q31_t)0xc54b1ab4, (q31_t)0x26781410, (q31_t)0xc5501ce5,
+    (q31_t)0x266c8e9f, (q31_t)0xc555215a, (q31_t)0x26610a2a, (q31_t)0xc55a2812,
+    (q31_t)0x265586b3, (q31_t)0xc55f310d, (q31_t)0x264a0438, (q31_t)0xc5643c4a,
+    (q31_t)0x263e82bc, (q31_t)0xc56949ca, (q31_t)0x2633023e, (q31_t)0xc56e598c,
+    (q31_t)0x262782be, (q31_t)0xc5736b90, (q31_t)0x261c043d, (q31_t)0xc5787fd6,
+    (q31_t)0x261086bc, (q31_t)0xc57d965d, (q31_t)0x26050a3b, (q31_t)0xc582af26,
+    (q31_t)0x25f98ebb, (q31_t)0xc587ca31, (q31_t)0x25ee143b, (q31_t)0xc58ce77c,
+    (q31_t)0x25e29abc, (q31_t)0xc5920708, (q31_t)0x25d72240, (q31_t)0xc59728d5,
+    (q31_t)0x25cbaac5, (q31_t)0xc59c4ce3, (q31_t)0x25c0344d, (q31_t)0xc5a17330,
+    (q31_t)0x25b4bed8, (q31_t)0xc5a69bbe, (q31_t)0x25a94a67, (q31_t)0xc5abc68c,
+    (q31_t)0x259dd6f9, (q31_t)0xc5b0f399, (q31_t)0x25926490, (q31_t)0xc5b622e6,
+    (q31_t)0x2586f32c, (q31_t)0xc5bb5472, (q31_t)0x257b82cd, (q31_t)0xc5c0883d,
+    (q31_t)0x25701374, (q31_t)0xc5c5be47, (q31_t)0x2564a521, (q31_t)0xc5caf690,
+    (q31_t)0x255937d5, (q31_t)0xc5d03118, (q31_t)0x254dcb8f, (q31_t)0xc5d56ddd,
+    (q31_t)0x25426051, (q31_t)0xc5daace1, (q31_t)0x2536f61b, (q31_t)0xc5dfee22,
+    (q31_t)0x252b8cee, (q31_t)0xc5e531a1, (q31_t)0x252024c9, (q31_t)0xc5ea775e,
+    (q31_t)0x2514bdad, (q31_t)0xc5efbf58, (q31_t)0x2509579b, (q31_t)0xc5f5098f,
+    (q31_t)0x24fdf294, (q31_t)0xc5fa5603, (q31_t)0x24f28e96, (q31_t)0xc5ffa4b3,
+    (q31_t)0x24e72ba4, (q31_t)0xc604f5a0, (q31_t)0x24dbc9bd, (q31_t)0xc60a48c9,
+    (q31_t)0x24d068e2, (q31_t)0xc60f9e2e, (q31_t)0x24c50914, (q31_t)0xc614f5cf,
+    (q31_t)0x24b9aa52, (q31_t)0xc61a4fac, (q31_t)0x24ae4c9d, (q31_t)0xc61fabc4,
+    (q31_t)0x24a2eff6, (q31_t)0xc6250a18, (q31_t)0x2497945d, (q31_t)0xc62a6aa6,
+    (q31_t)0x248c39d3, (q31_t)0xc62fcd6f, (q31_t)0x2480e057, (q31_t)0xc6353273,
+    (q31_t)0x247587eb, (q31_t)0xc63a99b1, (q31_t)0x246a308f, (q31_t)0xc6400329,
+    (q31_t)0x245eda43, (q31_t)0xc6456edb, (q31_t)0x24538507, (q31_t)0xc64adcc7,
+    (q31_t)0x244830dd, (q31_t)0xc6504ced, (q31_t)0x243cddc4, (q31_t)0xc655bf4c,
+    (q31_t)0x24318bbe, (q31_t)0xc65b33e4, (q31_t)0x24263ac9, (q31_t)0xc660aab5,
+    (q31_t)0x241aeae8, (q31_t)0xc66623be, (q31_t)0x240f9c1a, (q31_t)0xc66b9f01,
+    (q31_t)0x24044e60, (q31_t)0xc6711c7b, (q31_t)0x23f901ba, (q31_t)0xc6769c2e,
+    (q31_t)0x23edb628, (q31_t)0xc67c1e18, (q31_t)0x23e26bac, (q31_t)0xc681a23a,
+    (q31_t)0x23d72245, (q31_t)0xc6872894, (q31_t)0x23cbd9f4, (q31_t)0xc68cb124,
+    (q31_t)0x23c092b9, (q31_t)0xc6923bec, (q31_t)0x23b54c95, (q31_t)0xc697c8eb,
+    (q31_t)0x23aa0788, (q31_t)0xc69d5820, (q31_t)0x239ec393, (q31_t)0xc6a2e98b,
+    (q31_t)0x239380b6, (q31_t)0xc6a87d2d, (q31_t)0x23883ef2, (q31_t)0xc6ae1304,
+    (q31_t)0x237cfe47, (q31_t)0xc6b3ab12, (q31_t)0x2371beb5, (q31_t)0xc6b94554,
+    (q31_t)0x2366803c, (q31_t)0xc6bee1cd, (q31_t)0x235b42df, (q31_t)0xc6c4807a,
+    (q31_t)0x2350069b, (q31_t)0xc6ca215c, (q31_t)0x2344cb73, (q31_t)0xc6cfc472,
+    (q31_t)0x23399167, (q31_t)0xc6d569be, (q31_t)0x232e5876, (q31_t)0xc6db113d,
+    (q31_t)0x232320a2, (q31_t)0xc6e0baf0, (q31_t)0x2317e9eb, (q31_t)0xc6e666d7,
+    (q31_t)0x230cb451, (q31_t)0xc6ec14f2, (q31_t)0x23017fd5, (q31_t)0xc6f1c540,
+    (q31_t)0x22f64c77, (q31_t)0xc6f777c1, (q31_t)0x22eb1a37, (q31_t)0xc6fd2c75,
+    (q31_t)0x22dfe917, (q31_t)0xc702e35c, (q31_t)0x22d4b916, (q31_t)0xc7089c75,
+    (q31_t)0x22c98a35, (q31_t)0xc70e57c0, (q31_t)0x22be5c74, (q31_t)0xc714153e,
+    (q31_t)0x22b32fd4, (q31_t)0xc719d4ed, (q31_t)0x22a80456, (q31_t)0xc71f96ce,
+    (q31_t)0x229cd9f8, (q31_t)0xc7255ae0, (q31_t)0x2291b0bd, (q31_t)0xc72b2123,
+    (q31_t)0x228688a4, (q31_t)0xc730e997, (q31_t)0x227b61af, (q31_t)0xc736b43c,
+    (q31_t)0x22703bdc, (q31_t)0xc73c8111, (q31_t)0x2265172e, (q31_t)0xc7425016,
+    (q31_t)0x2259f3a3, (q31_t)0xc748214c, (q31_t)0x224ed13d, (q31_t)0xc74df4b1,
+    (q31_t)0x2243affc, (q31_t)0xc753ca46, (q31_t)0x22388fe1, (q31_t)0xc759a20a,
+    (q31_t)0x222d70eb, (q31_t)0xc75f7bfe, (q31_t)0x2222531c, (q31_t)0xc7655820,
+    (q31_t)0x22173674, (q31_t)0xc76b3671, (q31_t)0x220c1af3, (q31_t)0xc77116f0,
+    (q31_t)0x22010099, (q31_t)0xc776f99d, (q31_t)0x21f5e768, (q31_t)0xc77cde79,
+    (q31_t)0x21eacf5f, (q31_t)0xc782c582, (q31_t)0x21dfb87f, (q31_t)0xc788aeb9,
+    (q31_t)0x21d4a2c8, (q31_t)0xc78e9a1d, (q31_t)0x21c98e3b, (q31_t)0xc79487ae,
+    (q31_t)0x21be7ad8, (q31_t)0xc79a776c, (q31_t)0x21b368a0, (q31_t)0xc7a06957,
+    (q31_t)0x21a85793, (q31_t)0xc7a65d6e, (q31_t)0x219d47b1, (q31_t)0xc7ac53b1,
+    (q31_t)0x219238fb, (q31_t)0xc7b24c20, (q31_t)0x21872b72, (q31_t)0xc7b846ba,
+    (q31_t)0x217c1f15, (q31_t)0xc7be4381, (q31_t)0x217113e5, (q31_t)0xc7c44272,
+    (q31_t)0x216609e3, (q31_t)0xc7ca438f, (q31_t)0x215b0110, (q31_t)0xc7d046d6,
+    (q31_t)0x214ff96a, (q31_t)0xc7d64c47, (q31_t)0x2144f2f3, (q31_t)0xc7dc53e3,
+    (q31_t)0x2139edac, (q31_t)0xc7e25daa, (q31_t)0x212ee995, (q31_t)0xc7e8699a,
+    (q31_t)0x2123e6ad, (q31_t)0xc7ee77b3, (q31_t)0x2118e4f6, (q31_t)0xc7f487f6,
+    (q31_t)0x210de470, (q31_t)0xc7fa9a62, (q31_t)0x2102e51c, (q31_t)0xc800aef7,
+    (q31_t)0x20f7e6f9, (q31_t)0xc806c5b5, (q31_t)0x20ecea09, (q31_t)0xc80cde9b,
+    (q31_t)0x20e1ee4b, (q31_t)0xc812f9a9, (q31_t)0x20d6f3c1, (q31_t)0xc81916df,
+    (q31_t)0x20cbfa6a, (q31_t)0xc81f363d, (q31_t)0x20c10247, (q31_t)0xc82557c3,
+    (q31_t)0x20b60b58, (q31_t)0xc82b7b70, (q31_t)0x20ab159e, (q31_t)0xc831a143,
+    (q31_t)0x20a0211a, (q31_t)0xc837c93e, (q31_t)0x20952dcb, (q31_t)0xc83df35f,
+    (q31_t)0x208a3bb2, (q31_t)0xc8441fa6, (q31_t)0x207f4acf, (q31_t)0xc84a4e14,
+    (q31_t)0x20745b24, (q31_t)0xc8507ea7, (q31_t)0x20696cb0, (q31_t)0xc856b160,
+    (q31_t)0x205e7f74, (q31_t)0xc85ce63e, (q31_t)0x2053936f, (q31_t)0xc8631d42,
+    (q31_t)0x2048a8a4, (q31_t)0xc869566a, (q31_t)0x203dbf11, (q31_t)0xc86f91b7,
+    (q31_t)0x2032d6b8, (q31_t)0xc875cf28, (q31_t)0x2027ef99, (q31_t)0xc87c0ebd,
+    (q31_t)0x201d09b4, (q31_t)0xc8825077, (q31_t)0x2012250a, (q31_t)0xc8889454,
+    (q31_t)0x2007419b, (q31_t)0xc88eda54, (q31_t)0x1ffc5f67, (q31_t)0xc8952278,
+    (q31_t)0x1ff17e70, (q31_t)0xc89b6cbf, (q31_t)0x1fe69eb4, (q31_t)0xc8a1b928,
+    (q31_t)0x1fdbc036, (q31_t)0xc8a807b4, (q31_t)0x1fd0e2f5, (q31_t)0xc8ae5862,
+    (q31_t)0x1fc606f1, (q31_t)0xc8b4ab32, (q31_t)0x1fbb2c2c, (q31_t)0xc8bb0023,
+    (q31_t)0x1fb052a5, (q31_t)0xc8c15736, (q31_t)0x1fa57a5d, (q31_t)0xc8c7b06b,
+    (q31_t)0x1f9aa354, (q31_t)0xc8ce0bc0, (q31_t)0x1f8fcd8b, (q31_t)0xc8d46936,
+    (q31_t)0x1f84f902, (q31_t)0xc8dac8cd, (q31_t)0x1f7a25ba, (q31_t)0xc8e12a84,
+    (q31_t)0x1f6f53b3, (q31_t)0xc8e78e5b, (q31_t)0x1f6482ed, (q31_t)0xc8edf452,
+    (q31_t)0x1f59b369, (q31_t)0xc8f45c68, (q31_t)0x1f4ee527, (q31_t)0xc8fac69e,
+    (q31_t)0x1f441828, (q31_t)0xc90132f2, (q31_t)0x1f394c6b, (q31_t)0xc907a166,
+    (q31_t)0x1f2e81f3, (q31_t)0xc90e11f7, (q31_t)0x1f23b8be, (q31_t)0xc91484a8,
+    (q31_t)0x1f18f0ce, (q31_t)0xc91af976, (q31_t)0x1f0e2a22, (q31_t)0xc9217062,
+    (q31_t)0x1f0364bc, (q31_t)0xc927e96b, (q31_t)0x1ef8a09b, (q31_t)0xc92e6492,
+    (q31_t)0x1eedddc0, (q31_t)0xc934e1d6, (q31_t)0x1ee31c2b, (q31_t)0xc93b6137,
+    (q31_t)0x1ed85bdd, (q31_t)0xc941e2b4, (q31_t)0x1ecd9cd7, (q31_t)0xc948664d,
+    (q31_t)0x1ec2df18, (q31_t)0xc94eec03, (q31_t)0x1eb822a1, (q31_t)0xc95573d4,
+    (q31_t)0x1ead6773, (q31_t)0xc95bfdc1, (q31_t)0x1ea2ad8d, (q31_t)0xc96289c9,
+    (q31_t)0x1e97f4f1, (q31_t)0xc96917ec, (q31_t)0x1e8d3d9e, (q31_t)0xc96fa82a,
+    (q31_t)0x1e828796, (q31_t)0xc9763a83, (q31_t)0x1e77d2d8, (q31_t)0xc97ccef5,
+    (q31_t)0x1e6d1f65, (q31_t)0xc9836582, (q31_t)0x1e626d3e, (q31_t)0xc989fe29,
+    (q31_t)0x1e57bc62, (q31_t)0xc99098e9, (q31_t)0x1e4d0cd2, (q31_t)0xc99735c2,
+    (q31_t)0x1e425e8f, (q31_t)0xc99dd4b4, (q31_t)0x1e37b199, (q31_t)0xc9a475bf,
+    (q31_t)0x1e2d05f1, (q31_t)0xc9ab18e3, (q31_t)0x1e225b96, (q31_t)0xc9b1be1e,
+    (q31_t)0x1e17b28a, (q31_t)0xc9b86572, (q31_t)0x1e0d0acc, (q31_t)0xc9bf0edd,
+    (q31_t)0x1e02645d, (q31_t)0xc9c5ba60, (q31_t)0x1df7bf3e, (q31_t)0xc9cc67fa,
+    (q31_t)0x1ded1b6e, (q31_t)0xc9d317ab, (q31_t)0x1de278ef, (q31_t)0xc9d9c973,
+    (q31_t)0x1dd7d7c1, (q31_t)0xc9e07d51, (q31_t)0x1dcd37e4, (q31_t)0xc9e73346,
+    (q31_t)0x1dc29958, (q31_t)0xc9edeb50, (q31_t)0x1db7fc1e, (q31_t)0xc9f4a570,
+    (q31_t)0x1dad6036, (q31_t)0xc9fb61a5, (q31_t)0x1da2c5a2, (q31_t)0xca021fef,
+    (q31_t)0x1d982c60, (q31_t)0xca08e04f, (q31_t)0x1d8d9472, (q31_t)0xca0fa2c3,
+    (q31_t)0x1d82fdd8, (q31_t)0xca16674b, (q31_t)0x1d786892, (q31_t)0xca1d2de7,
+    (q31_t)0x1d6dd4a2, (q31_t)0xca23f698, (q31_t)0x1d634206, (q31_t)0xca2ac15b,
+    (q31_t)0x1d58b0c0, (q31_t)0xca318e32, (q31_t)0x1d4e20d0, (q31_t)0xca385d1d,
+    (q31_t)0x1d439236, (q31_t)0xca3f2e19, (q31_t)0x1d3904f4, (q31_t)0xca460129,
+    (q31_t)0x1d2e7908, (q31_t)0xca4cd64b, (q31_t)0x1d23ee74, (q31_t)0xca53ad7e,
+    (q31_t)0x1d196538, (q31_t)0xca5a86c4, (q31_t)0x1d0edd55, (q31_t)0xca61621b,
+    (q31_t)0x1d0456ca, (q31_t)0xca683f83, (q31_t)0x1cf9d199, (q31_t)0xca6f1efc,
+    (q31_t)0x1cef4dc2, (q31_t)0xca760086, (q31_t)0x1ce4cb44, (q31_t)0xca7ce420,
+    (q31_t)0x1cda4a21, (q31_t)0xca83c9ca, (q31_t)0x1ccfca59, (q31_t)0xca8ab184,
+    (q31_t)0x1cc54bec, (q31_t)0xca919b4e, (q31_t)0x1cbacedb, (q31_t)0xca988727,
+    (q31_t)0x1cb05326, (q31_t)0xca9f750f, (q31_t)0x1ca5d8cd, (q31_t)0xcaa66506,
+    (q31_t)0x1c9b5fd2, (q31_t)0xcaad570c, (q31_t)0x1c90e834, (q31_t)0xcab44b1f,
+    (q31_t)0x1c8671f3, (q31_t)0xcabb4141, (q31_t)0x1c7bfd11, (q31_t)0xcac23971,
+    (q31_t)0x1c71898d, (q31_t)0xcac933ae, (q31_t)0x1c671768, (q31_t)0xcad02ff8,
+    (q31_t)0x1c5ca6a2, (q31_t)0xcad72e4f, (q31_t)0x1c52373c, (q31_t)0xcade2eb3,
+    (q31_t)0x1c47c936, (q31_t)0xcae53123, (q31_t)0x1c3d5c91, (q31_t)0xcaec35a0,
+    (q31_t)0x1c32f14d, (q31_t)0xcaf33c28, (q31_t)0x1c28876a, (q31_t)0xcafa44bc,
+    (q31_t)0x1c1e1ee9, (q31_t)0xcb014f5b, (q31_t)0x1c13b7c9, (q31_t)0xcb085c05,
+    (q31_t)0x1c09520d, (q31_t)0xcb0f6aba, (q31_t)0x1bfeedb3, (q31_t)0xcb167b79,
+    (q31_t)0x1bf48abd, (q31_t)0xcb1d8e43, (q31_t)0x1bea292b, (q31_t)0xcb24a316,
+    (q31_t)0x1bdfc8fc, (q31_t)0xcb2bb9f4, (q31_t)0x1bd56a32, (q31_t)0xcb32d2da,
+    (q31_t)0x1bcb0cce, (q31_t)0xcb39edca, (q31_t)0x1bc0b0ce, (q31_t)0xcb410ac3,
+    (q31_t)0x1bb65634, (q31_t)0xcb4829c4, (q31_t)0x1babfd01, (q31_t)0xcb4f4acd,
+    (q31_t)0x1ba1a534, (q31_t)0xcb566ddf, (q31_t)0x1b974ece, (q31_t)0xcb5d92f8,
+    (q31_t)0x1b8cf9cf, (q31_t)0xcb64ba19, (q31_t)0x1b82a638, (q31_t)0xcb6be341,
+    (q31_t)0x1b785409, (q31_t)0xcb730e70, (q31_t)0x1b6e0342, (q31_t)0xcb7a3ba5,
+    (q31_t)0x1b63b3e5, (q31_t)0xcb816ae1, (q31_t)0x1b5965f1, (q31_t)0xcb889c23,
+    (q31_t)0x1b4f1967, (q31_t)0xcb8fcf6b, (q31_t)0x1b44ce46, (q31_t)0xcb9704b9,
+    (q31_t)0x1b3a8491, (q31_t)0xcb9e3c0b, (q31_t)0x1b303c46, (q31_t)0xcba57563,
+    (q31_t)0x1b25f566, (q31_t)0xcbacb0bf, (q31_t)0x1b1baff2, (q31_t)0xcbb3ee20,
+    (q31_t)0x1b116beb, (q31_t)0xcbbb2d85, (q31_t)0x1b072950, (q31_t)0xcbc26eee,
+    (q31_t)0x1afce821, (q31_t)0xcbc9b25a, (q31_t)0x1af2a860, (q31_t)0xcbd0f7ca,
+    (q31_t)0x1ae86a0d, (q31_t)0xcbd83f3d, (q31_t)0x1ade2d28, (q31_t)0xcbdf88b3,
+    (q31_t)0x1ad3f1b1, (q31_t)0xcbe6d42b, (q31_t)0x1ac9b7a9, (q31_t)0xcbee21a5,
+    (q31_t)0x1abf7f11, (q31_t)0xcbf57121, (q31_t)0x1ab547e8, (q31_t)0xcbfcc29f,
+    (q31_t)0x1aab122f, (q31_t)0xcc04161e, (q31_t)0x1aa0dde7, (q31_t)0xcc0b6b9e,
+    (q31_t)0x1a96ab0f, (q31_t)0xcc12c31f, (q31_t)0x1a8c79a9, (q31_t)0xcc1a1ca0,
+    (q31_t)0x1a8249b4, (q31_t)0xcc217822, (q31_t)0x1a781b31, (q31_t)0xcc28d5a3,
+    (q31_t)0x1a6dee21, (q31_t)0xcc303524, (q31_t)0x1a63c284, (q31_t)0xcc3796a5,
+    (q31_t)0x1a599859, (q31_t)0xcc3efa25, (q31_t)0x1a4f6fa3, (q31_t)0xcc465fa3,
+    (q31_t)0x1a454860, (q31_t)0xcc4dc720, (q31_t)0x1a3b2292, (q31_t)0xcc55309b,
+    (q31_t)0x1a30fe38, (q31_t)0xcc5c9c14, (q31_t)0x1a26db54, (q31_t)0xcc64098b,
+    (q31_t)0x1a1cb9e5, (q31_t)0xcc6b78ff, (q31_t)0x1a1299ec, (q31_t)0xcc72ea70,
+    (q31_t)0x1a087b69, (q31_t)0xcc7a5dde, (q31_t)0x19fe5e5e, (q31_t)0xcc81d349,
+    (q31_t)0x19f442c9, (q31_t)0xcc894aaf, (q31_t)0x19ea28ac, (q31_t)0xcc90c412,
+    (q31_t)0x19e01006, (q31_t)0xcc983f70, (q31_t)0x19d5f8d9, (q31_t)0xcc9fbcca,
+    (q31_t)0x19cbe325, (q31_t)0xcca73c1e, (q31_t)0x19c1cee9, (q31_t)0xccaebd6e,
+    (q31_t)0x19b7bc27, (q31_t)0xccb640b8, (q31_t)0x19adaadf, (q31_t)0xccbdc5fc,
+    (q31_t)0x19a39b11, (q31_t)0xccc54d3a, (q31_t)0x19998cbe, (q31_t)0xccccd671,
+    (q31_t)0x198f7fe6, (q31_t)0xccd461a2, (q31_t)0x19857489, (q31_t)0xccdbeecc,
+    (q31_t)0x197b6aa8, (q31_t)0xcce37def, (q31_t)0x19716243, (q31_t)0xcceb0f0a,
+    (q31_t)0x19675b5a, (q31_t)0xccf2a21d, (q31_t)0x195d55ef, (q31_t)0xccfa3729,
+    (q31_t)0x19535201, (q31_t)0xcd01ce2b, (q31_t)0x19494f90, (q31_t)0xcd096725,
+    (q31_t)0x193f4e9e, (q31_t)0xcd110216, (q31_t)0x19354f2a, (q31_t)0xcd189efe,
+    (q31_t)0x192b5135, (q31_t)0xcd203ddc, (q31_t)0x192154bf, (q31_t)0xcd27deb0,
+    (q31_t)0x191759c9, (q31_t)0xcd2f817b, (q31_t)0x190d6053, (q31_t)0xcd37263a,
+    (q31_t)0x1903685d, (q31_t)0xcd3eccef, (q31_t)0x18f971e8, (q31_t)0xcd467599,
+    (q31_t)0x18ef7cf4, (q31_t)0xcd4e2037, (q31_t)0x18e58982, (q31_t)0xcd55ccca,
+    (q31_t)0x18db9792, (q31_t)0xcd5d7b50, (q31_t)0x18d1a724, (q31_t)0xcd652bcb,
+    (q31_t)0x18c7b838, (q31_t)0xcd6cde39, (q31_t)0x18bdcad0, (q31_t)0xcd74929a,
+    (q31_t)0x18b3deeb, (q31_t)0xcd7c48ee, (q31_t)0x18a9f48a, (q31_t)0xcd840134,
+    (q31_t)0x18a00bae, (q31_t)0xcd8bbb6d, (q31_t)0x18962456, (q31_t)0xcd937798,
+    (q31_t)0x188c3e83, (q31_t)0xcd9b35b4, (q31_t)0x18825a35, (q31_t)0xcda2f5c2,
+    (q31_t)0x1878776d, (q31_t)0xcdaab7c0, (q31_t)0x186e962b, (q31_t)0xcdb27bb0,
+    (q31_t)0x1864b670, (q31_t)0xcdba4190, (q31_t)0x185ad83c, (q31_t)0xcdc20960,
+    (q31_t)0x1850fb8e, (q31_t)0xcdc9d320, (q31_t)0x18472069, (q31_t)0xcdd19ed0,
+    (q31_t)0x183d46cc, (q31_t)0xcdd96c6f, (q31_t)0x18336eb7, (q31_t)0xcde13bfd,
+    (q31_t)0x1829982b, (q31_t)0xcde90d79, (q31_t)0x181fc328, (q31_t)0xcdf0e0e4,
+    (q31_t)0x1815efae, (q31_t)0xcdf8b63d, (q31_t)0x180c1dbf, (q31_t)0xce008d84,
+    (q31_t)0x18024d59, (q31_t)0xce0866b8, (q31_t)0x17f87e7f, (q31_t)0xce1041d9,
+    (q31_t)0x17eeb130, (q31_t)0xce181ee8, (q31_t)0x17e4e56c, (q31_t)0xce1ffde2,
+    (q31_t)0x17db1b34, (q31_t)0xce27dec9, (q31_t)0x17d15288, (q31_t)0xce2fc19c,
+    (q31_t)0x17c78b68, (q31_t)0xce37a65b, (q31_t)0x17bdc5d6, (q31_t)0xce3f8d05,
+    (q31_t)0x17b401d1, (q31_t)0xce47759a, (q31_t)0x17aa3f5a, (q31_t)0xce4f6019,
+    (q31_t)0x17a07e70, (q31_t)0xce574c84, (q31_t)0x1796bf16, (q31_t)0xce5f3ad8,
+    (q31_t)0x178d014a, (q31_t)0xce672b16, (q31_t)0x1783450d, (q31_t)0xce6f1d3d,
+    (q31_t)0x17798a60, (q31_t)0xce77114e, (q31_t)0x176fd143, (q31_t)0xce7f0748,
+    (q31_t)0x176619b6, (q31_t)0xce86ff2a, (q31_t)0x175c63ba, (q31_t)0xce8ef8f4,
+    (q31_t)0x1752af4f, (q31_t)0xce96f4a7, (q31_t)0x1748fc75, (q31_t)0xce9ef241,
+    (q31_t)0x173f4b2e, (q31_t)0xcea6f1c2, (q31_t)0x17359b78, (q31_t)0xceaef32b,
+    (q31_t)0x172bed55, (q31_t)0xceb6f67a, (q31_t)0x172240c5, (q31_t)0xcebefbb0,
+    (q31_t)0x171895c9, (q31_t)0xcec702cb, (q31_t)0x170eec60, (q31_t)0xcecf0bcd,
+    (q31_t)0x1705448b, (q31_t)0xced716b4, (q31_t)0x16fb9e4b, (q31_t)0xcedf2380,
+    (q31_t)0x16f1f99f, (q31_t)0xcee73231, (q31_t)0x16e85689, (q31_t)0xceef42c7,
+    (q31_t)0x16deb508, (q31_t)0xcef75541, (q31_t)0x16d5151d, (q31_t)0xceff699f,
+    (q31_t)0x16cb76c9, (q31_t)0xcf077fe1, (q31_t)0x16c1da0b, (q31_t)0xcf0f9805,
+    (q31_t)0x16b83ee4, (q31_t)0xcf17b20d, (q31_t)0x16aea555, (q31_t)0xcf1fcdf8,
+    (q31_t)0x16a50d5d, (q31_t)0xcf27ebc5, (q31_t)0x169b76fe, (q31_t)0xcf300b74,
+    (q31_t)0x1691e237, (q31_t)0xcf382d05, (q31_t)0x16884f09, (q31_t)0xcf405077,
+    (q31_t)0x167ebd74, (q31_t)0xcf4875ca, (q31_t)0x16752d79, (q31_t)0xcf509cfe,
+    (q31_t)0x166b9f18, (q31_t)0xcf58c613, (q31_t)0x16621251, (q31_t)0xcf60f108,
+    (q31_t)0x16588725, (q31_t)0xcf691ddd, (q31_t)0x164efd94, (q31_t)0xcf714c91,
+    (q31_t)0x1645759f, (q31_t)0xcf797d24, (q31_t)0x163bef46, (q31_t)0xcf81af97,
+    (q31_t)0x16326a88, (q31_t)0xcf89e3e8, (q31_t)0x1628e767, (q31_t)0xcf921a17,
+    (q31_t)0x161f65e4, (q31_t)0xcf9a5225, (q31_t)0x1615e5fd, (q31_t)0xcfa28c10,
+    (q31_t)0x160c67b4, (q31_t)0xcfaac7d8, (q31_t)0x1602eb0a, (q31_t)0xcfb3057d,
+    (q31_t)0x15f96ffd, (q31_t)0xcfbb4500, (q31_t)0x15eff690, (q31_t)0xcfc3865e,
+    (q31_t)0x15e67ec1, (q31_t)0xcfcbc999, (q31_t)0x15dd0892, (q31_t)0xcfd40eaf,
+    (q31_t)0x15d39403, (q31_t)0xcfdc55a1, (q31_t)0x15ca2115, (q31_t)0xcfe49e6d,
+    (q31_t)0x15c0afc6, (q31_t)0xcfece915, (q31_t)0x15b74019, (q31_t)0xcff53597,
+    (q31_t)0x15add20d, (q31_t)0xcffd83f4, (q31_t)0x15a465a3, (q31_t)0xd005d42a,
+    (q31_t)0x159afadb, (q31_t)0xd00e2639, (q31_t)0x159191b5, (q31_t)0xd0167a22,
+    (q31_t)0x15882a32, (q31_t)0xd01ecfe4, (q31_t)0x157ec452, (q31_t)0xd027277e,
+    (q31_t)0x15756016, (q31_t)0xd02f80f1, (q31_t)0x156bfd7d, (q31_t)0xd037dc3b,
+    (q31_t)0x15629c89, (q31_t)0xd040395d, (q31_t)0x15593d3a, (q31_t)0xd0489856,
+    (q31_t)0x154fdf8f, (q31_t)0xd050f926, (q31_t)0x15468389, (q31_t)0xd0595bcd,
+    (q31_t)0x153d292a, (q31_t)0xd061c04a, (q31_t)0x1533d070, (q31_t)0xd06a269d,
+    (q31_t)0x152a795d, (q31_t)0xd0728ec6, (q31_t)0x152123f0, (q31_t)0xd07af8c4,
+    (q31_t)0x1517d02b, (q31_t)0xd0836497, (q31_t)0x150e7e0d, (q31_t)0xd08bd23f,
+    (q31_t)0x15052d97, (q31_t)0xd09441bb, (q31_t)0x14fbdec9, (q31_t)0xd09cb30b,
+    (q31_t)0x14f291a4, (q31_t)0xd0a5262f, (q31_t)0x14e94627, (q31_t)0xd0ad9b26,
+    (q31_t)0x14dffc54, (q31_t)0xd0b611f1, (q31_t)0x14d6b42b, (q31_t)0xd0be8a8d,
+    (q31_t)0x14cd6dab, (q31_t)0xd0c704fd, (q31_t)0x14c428d6, (q31_t)0xd0cf813e,
+    (q31_t)0x14bae5ab, (q31_t)0xd0d7ff51, (q31_t)0x14b1a42c, (q31_t)0xd0e07f36,
+    (q31_t)0x14a86458, (q31_t)0xd0e900ec, (q31_t)0x149f2630, (q31_t)0xd0f18472,
+    (q31_t)0x1495e9b3, (q31_t)0xd0fa09c9, (q31_t)0x148caee4, (q31_t)0xd10290f0,
+    (q31_t)0x148375c1, (q31_t)0xd10b19e7, (q31_t)0x147a3e4b, (q31_t)0xd113a4ad,
+    (q31_t)0x14710883, (q31_t)0xd11c3142, (q31_t)0x1467d469, (q31_t)0xd124bfa6,
+    (q31_t)0x145ea1fd, (q31_t)0xd12d4fd9, (q31_t)0x14557140, (q31_t)0xd135e1d9,
+    (q31_t)0x144c4232, (q31_t)0xd13e75a8, (q31_t)0x144314d3, (q31_t)0xd1470b44,
+    (q31_t)0x1439e923, (q31_t)0xd14fa2ad, (q31_t)0x1430bf24, (q31_t)0xd1583be2,
+    (q31_t)0x142796d5, (q31_t)0xd160d6e5, (q31_t)0x141e7037, (q31_t)0xd16973b3,
+    (q31_t)0x14154b4a, (q31_t)0xd172124d, (q31_t)0x140c280e, (q31_t)0xd17ab2b3,
+    (q31_t)0x14030684, (q31_t)0xd18354e4, (q31_t)0x13f9e6ad, (q31_t)0xd18bf8e0,
+    (q31_t)0x13f0c887, (q31_t)0xd1949ea6, (q31_t)0x13e7ac15, (q31_t)0xd19d4636,
+    (q31_t)0x13de9156, (q31_t)0xd1a5ef90, (q31_t)0x13d5784a, (q31_t)0xd1ae9ab4,
+    (q31_t)0x13cc60f2, (q31_t)0xd1b747a0, (q31_t)0x13c34b4f, (q31_t)0xd1bff656,
+    (q31_t)0x13ba3760, (q31_t)0xd1c8a6d4, (q31_t)0x13b12526, (q31_t)0xd1d1591a,
+    (q31_t)0x13a814a2, (q31_t)0xd1da0d28, (q31_t)0x139f05d3, (q31_t)0xd1e2c2fd,
+    (q31_t)0x1395f8ba, (q31_t)0xd1eb7a9a, (q31_t)0x138ced57, (q31_t)0xd1f433fd,
+    (q31_t)0x1383e3ab, (q31_t)0xd1fcef27, (q31_t)0x137adbb6, (q31_t)0xd205ac17,
+    (q31_t)0x1371d579, (q31_t)0xd20e6acc, (q31_t)0x1368d0f3, (q31_t)0xd2172b48,
+    (q31_t)0x135fce26, (q31_t)0xd21fed88, (q31_t)0x1356cd11, (q31_t)0xd228b18d,
+    (q31_t)0x134dcdb4, (q31_t)0xd2317756, (q31_t)0x1344d011, (q31_t)0xd23a3ee4,
+    (q31_t)0x133bd427, (q31_t)0xd2430835, (q31_t)0x1332d9f7, (q31_t)0xd24bd34a,
+    (q31_t)0x1329e181, (q31_t)0xd254a021, (q31_t)0x1320eac6, (q31_t)0xd25d6ebc,
+    (q31_t)0x1317f5c6, (q31_t)0xd2663f19, (q31_t)0x130f0280, (q31_t)0xd26f1138,
+    (q31_t)0x130610f7, (q31_t)0xd277e518, (q31_t)0x12fd2129, (q31_t)0xd280babb,
+    (q31_t)0x12f43318, (q31_t)0xd289921e, (q31_t)0x12eb46c3, (q31_t)0xd2926b41,
+    (q31_t)0x12e25c2b, (q31_t)0xd29b4626, (q31_t)0x12d97350, (q31_t)0xd2a422ca,
+    (q31_t)0x12d08c33, (q31_t)0xd2ad012e, (q31_t)0x12c7a6d4, (q31_t)0xd2b5e151,
+    (q31_t)0x12bec333, (q31_t)0xd2bec333, (q31_t)0x12b5e151, (q31_t)0xd2c7a6d4,
+    (q31_t)0x12ad012e, (q31_t)0xd2d08c33, (q31_t)0x12a422ca, (q31_t)0xd2d97350,
+    (q31_t)0x129b4626, (q31_t)0xd2e25c2b, (q31_t)0x12926b41, (q31_t)0xd2eb46c3,
+    (q31_t)0x1289921e, (q31_t)0xd2f43318, (q31_t)0x1280babb, (q31_t)0xd2fd2129,
+    (q31_t)0x1277e518, (q31_t)0xd30610f7, (q31_t)0x126f1138, (q31_t)0xd30f0280,
+    (q31_t)0x12663f19, (q31_t)0xd317f5c6, (q31_t)0x125d6ebc, (q31_t)0xd320eac6,
+    (q31_t)0x1254a021, (q31_t)0xd329e181, (q31_t)0x124bd34a, (q31_t)0xd332d9f7,
+    (q31_t)0x12430835, (q31_t)0xd33bd427, (q31_t)0x123a3ee4, (q31_t)0xd344d011,
+    (q31_t)0x12317756, (q31_t)0xd34dcdb4, (q31_t)0x1228b18d, (q31_t)0xd356cd11,
+    (q31_t)0x121fed88, (q31_t)0xd35fce26, (q31_t)0x12172b48, (q31_t)0xd368d0f3,
+    (q31_t)0x120e6acc, (q31_t)0xd371d579, (q31_t)0x1205ac17, (q31_t)0xd37adbb6,
+    (q31_t)0x11fcef27, (q31_t)0xd383e3ab, (q31_t)0x11f433fd, (q31_t)0xd38ced57,
+    (q31_t)0x11eb7a9a, (q31_t)0xd395f8ba, (q31_t)0x11e2c2fd, (q31_t)0xd39f05d3,
+    (q31_t)0x11da0d28, (q31_t)0xd3a814a2, (q31_t)0x11d1591a, (q31_t)0xd3b12526,
+    (q31_t)0x11c8a6d4, (q31_t)0xd3ba3760, (q31_t)0x11bff656, (q31_t)0xd3c34b4f,
+    (q31_t)0x11b747a0, (q31_t)0xd3cc60f2, (q31_t)0x11ae9ab4, (q31_t)0xd3d5784a,
+    (q31_t)0x11a5ef90, (q31_t)0xd3de9156, (q31_t)0x119d4636, (q31_t)0xd3e7ac15,
+    (q31_t)0x11949ea6, (q31_t)0xd3f0c887, (q31_t)0x118bf8e0, (q31_t)0xd3f9e6ad,
+    (q31_t)0x118354e4, (q31_t)0xd4030684, (q31_t)0x117ab2b3, (q31_t)0xd40c280e,
+    (q31_t)0x1172124d, (q31_t)0xd4154b4a, (q31_t)0x116973b3, (q31_t)0xd41e7037,
+    (q31_t)0x1160d6e5, (q31_t)0xd42796d5, (q31_t)0x11583be2, (q31_t)0xd430bf24,
+    (q31_t)0x114fa2ad, (q31_t)0xd439e923, (q31_t)0x11470b44, (q31_t)0xd44314d3,
+    (q31_t)0x113e75a8, (q31_t)0xd44c4232, (q31_t)0x1135e1d9, (q31_t)0xd4557140,
+    (q31_t)0x112d4fd9, (q31_t)0xd45ea1fd, (q31_t)0x1124bfa6, (q31_t)0xd467d469,
+    (q31_t)0x111c3142, (q31_t)0xd4710883, (q31_t)0x1113a4ad, (q31_t)0xd47a3e4b,
+    (q31_t)0x110b19e7, (q31_t)0xd48375c1, (q31_t)0x110290f0, (q31_t)0xd48caee4,
+    (q31_t)0x10fa09c9, (q31_t)0xd495e9b3, (q31_t)0x10f18472, (q31_t)0xd49f2630,
+    (q31_t)0x10e900ec, (q31_t)0xd4a86458, (q31_t)0x10e07f36, (q31_t)0xd4b1a42c,
+    (q31_t)0x10d7ff51, (q31_t)0xd4bae5ab, (q31_t)0x10cf813e, (q31_t)0xd4c428d6,
+    (q31_t)0x10c704fd, (q31_t)0xd4cd6dab, (q31_t)0x10be8a8d, (q31_t)0xd4d6b42b,
+    (q31_t)0x10b611f1, (q31_t)0xd4dffc54, (q31_t)0x10ad9b26, (q31_t)0xd4e94627,
+    (q31_t)0x10a5262f, (q31_t)0xd4f291a4, (q31_t)0x109cb30b, (q31_t)0xd4fbdec9,
+    (q31_t)0x109441bb, (q31_t)0xd5052d97, (q31_t)0x108bd23f, (q31_t)0xd50e7e0d,
+    (q31_t)0x10836497, (q31_t)0xd517d02b, (q31_t)0x107af8c4, (q31_t)0xd52123f0,
+    (q31_t)0x10728ec6, (q31_t)0xd52a795d, (q31_t)0x106a269d, (q31_t)0xd533d070,
+    (q31_t)0x1061c04a, (q31_t)0xd53d292a, (q31_t)0x10595bcd, (q31_t)0xd5468389,
+    (q31_t)0x1050f926, (q31_t)0xd54fdf8f, (q31_t)0x10489856, (q31_t)0xd5593d3a,
+    (q31_t)0x1040395d, (q31_t)0xd5629c89, (q31_t)0x1037dc3b, (q31_t)0xd56bfd7d,
+    (q31_t)0x102f80f1, (q31_t)0xd5756016, (q31_t)0x1027277e, (q31_t)0xd57ec452,
+    (q31_t)0x101ecfe4, (q31_t)0xd5882a32, (q31_t)0x10167a22, (q31_t)0xd59191b5,
+    (q31_t)0x100e2639, (q31_t)0xd59afadb, (q31_t)0x1005d42a, (q31_t)0xd5a465a3,
+    (q31_t)0xffd83f4, (q31_t)0xd5add20d, (q31_t)0xff53597, (q31_t)0xd5b74019,
+    (q31_t)0xfece915, (q31_t)0xd5c0afc6, (q31_t)0xfe49e6d, (q31_t)0xd5ca2115,
+    (q31_t)0xfdc55a1, (q31_t)0xd5d39403, (q31_t)0xfd40eaf, (q31_t)0xd5dd0892,
+    (q31_t)0xfcbc999, (q31_t)0xd5e67ec1, (q31_t)0xfc3865e, (q31_t)0xd5eff690,
+    (q31_t)0xfbb4500, (q31_t)0xd5f96ffd, (q31_t)0xfb3057d, (q31_t)0xd602eb0a,
+    (q31_t)0xfaac7d8, (q31_t)0xd60c67b4, (q31_t)0xfa28c10, (q31_t)0xd615e5fd,
+    (q31_t)0xf9a5225, (q31_t)0xd61f65e4, (q31_t)0xf921a17, (q31_t)0xd628e767,
+    (q31_t)0xf89e3e8, (q31_t)0xd6326a88, (q31_t)0xf81af97, (q31_t)0xd63bef46,
+    (q31_t)0xf797d24, (q31_t)0xd645759f, (q31_t)0xf714c91, (q31_t)0xd64efd94,
+    (q31_t)0xf691ddd, (q31_t)0xd6588725, (q31_t)0xf60f108, (q31_t)0xd6621251,
+    (q31_t)0xf58c613, (q31_t)0xd66b9f18, (q31_t)0xf509cfe, (q31_t)0xd6752d79,
+    (q31_t)0xf4875ca, (q31_t)0xd67ebd74, (q31_t)0xf405077, (q31_t)0xd6884f09,
+    (q31_t)0xf382d05, (q31_t)0xd691e237, (q31_t)0xf300b74, (q31_t)0xd69b76fe,
+    (q31_t)0xf27ebc5, (q31_t)0xd6a50d5d, (q31_t)0xf1fcdf8, (q31_t)0xd6aea555,
+    (q31_t)0xf17b20d, (q31_t)0xd6b83ee4, (q31_t)0xf0f9805, (q31_t)0xd6c1da0b,
+    (q31_t)0xf077fe1, (q31_t)0xd6cb76c9, (q31_t)0xeff699f, (q31_t)0xd6d5151d,
+    (q31_t)0xef75541, (q31_t)0xd6deb508, (q31_t)0xeef42c7, (q31_t)0xd6e85689,
+    (q31_t)0xee73231, (q31_t)0xd6f1f99f, (q31_t)0xedf2380, (q31_t)0xd6fb9e4b,
+    (q31_t)0xed716b4, (q31_t)0xd705448b, (q31_t)0xecf0bcd, (q31_t)0xd70eec60,
+    (q31_t)0xec702cb, (q31_t)0xd71895c9, (q31_t)0xebefbb0, (q31_t)0xd72240c5,
+    (q31_t)0xeb6f67a, (q31_t)0xd72bed55, (q31_t)0xeaef32b, (q31_t)0xd7359b78,
+    (q31_t)0xea6f1c2, (q31_t)0xd73f4b2e, (q31_t)0xe9ef241, (q31_t)0xd748fc75,
+    (q31_t)0xe96f4a7, (q31_t)0xd752af4f, (q31_t)0xe8ef8f4, (q31_t)0xd75c63ba,
+    (q31_t)0xe86ff2a, (q31_t)0xd76619b6, (q31_t)0xe7f0748, (q31_t)0xd76fd143,
+    (q31_t)0xe77114e, (q31_t)0xd7798a60, (q31_t)0xe6f1d3d, (q31_t)0xd783450d,
+    (q31_t)0xe672b16, (q31_t)0xd78d014a, (q31_t)0xe5f3ad8, (q31_t)0xd796bf16,
+    (q31_t)0xe574c84, (q31_t)0xd7a07e70, (q31_t)0xe4f6019, (q31_t)0xd7aa3f5a,
+    (q31_t)0xe47759a, (q31_t)0xd7b401d1, (q31_t)0xe3f8d05, (q31_t)0xd7bdc5d6,
+    (q31_t)0xe37a65b, (q31_t)0xd7c78b68, (q31_t)0xe2fc19c, (q31_t)0xd7d15288,
+    (q31_t)0xe27dec9, (q31_t)0xd7db1b34, (q31_t)0xe1ffde2, (q31_t)0xd7e4e56c,
+    (q31_t)0xe181ee8, (q31_t)0xd7eeb130, (q31_t)0xe1041d9, (q31_t)0xd7f87e7f,
+    (q31_t)0xe0866b8, (q31_t)0xd8024d59, (q31_t)0xe008d84, (q31_t)0xd80c1dbf,
+    (q31_t)0xdf8b63d, (q31_t)0xd815efae, (q31_t)0xdf0e0e4, (q31_t)0xd81fc328,
+    (q31_t)0xde90d79, (q31_t)0xd829982b, (q31_t)0xde13bfd, (q31_t)0xd8336eb7,
+    (q31_t)0xdd96c6f, (q31_t)0xd83d46cc, (q31_t)0xdd19ed0, (q31_t)0xd8472069,
+    (q31_t)0xdc9d320, (q31_t)0xd850fb8e, (q31_t)0xdc20960, (q31_t)0xd85ad83c,
+    (q31_t)0xdba4190, (q31_t)0xd864b670, (q31_t)0xdb27bb0, (q31_t)0xd86e962b,
+    (q31_t)0xdaab7c0, (q31_t)0xd878776d, (q31_t)0xda2f5c2, (q31_t)0xd8825a35,
+    (q31_t)0xd9b35b4, (q31_t)0xd88c3e83, (q31_t)0xd937798, (q31_t)0xd8962456,
+    (q31_t)0xd8bbb6d, (q31_t)0xd8a00bae, (q31_t)0xd840134, (q31_t)0xd8a9f48a,
+    (q31_t)0xd7c48ee, (q31_t)0xd8b3deeb, (q31_t)0xd74929a, (q31_t)0xd8bdcad0,
+    (q31_t)0xd6cde39, (q31_t)0xd8c7b838, (q31_t)0xd652bcb, (q31_t)0xd8d1a724,
+    (q31_t)0xd5d7b50, (q31_t)0xd8db9792, (q31_t)0xd55ccca, (q31_t)0xd8e58982,
+    (q31_t)0xd4e2037, (q31_t)0xd8ef7cf4, (q31_t)0xd467599, (q31_t)0xd8f971e8,
+    (q31_t)0xd3eccef, (q31_t)0xd903685d, (q31_t)0xd37263a, (q31_t)0xd90d6053,
+    (q31_t)0xd2f817b, (q31_t)0xd91759c9, (q31_t)0xd27deb0, (q31_t)0xd92154bf,
+    (q31_t)0xd203ddc, (q31_t)0xd92b5135, (q31_t)0xd189efe, (q31_t)0xd9354f2a,
+    (q31_t)0xd110216, (q31_t)0xd93f4e9e, (q31_t)0xd096725, (q31_t)0xd9494f90,
+    (q31_t)0xd01ce2b, (q31_t)0xd9535201, (q31_t)0xcfa3729, (q31_t)0xd95d55ef,
+    (q31_t)0xcf2a21d, (q31_t)0xd9675b5a, (q31_t)0xceb0f0a, (q31_t)0xd9716243,
+    (q31_t)0xce37def, (q31_t)0xd97b6aa8, (q31_t)0xcdbeecc, (q31_t)0xd9857489,
+    (q31_t)0xcd461a2, (q31_t)0xd98f7fe6, (q31_t)0xcccd671, (q31_t)0xd9998cbe,
+    (q31_t)0xcc54d3a, (q31_t)0xd9a39b11, (q31_t)0xcbdc5fc, (q31_t)0xd9adaadf,
+    (q31_t)0xcb640b8, (q31_t)0xd9b7bc27, (q31_t)0xcaebd6e, (q31_t)0xd9c1cee9,
+    (q31_t)0xca73c1e, (q31_t)0xd9cbe325, (q31_t)0xc9fbcca, (q31_t)0xd9d5f8d9,
+    (q31_t)0xc983f70, (q31_t)0xd9e01006, (q31_t)0xc90c412, (q31_t)0xd9ea28ac,
+    (q31_t)0xc894aaf, (q31_t)0xd9f442c9, (q31_t)0xc81d349, (q31_t)0xd9fe5e5e,
+    (q31_t)0xc7a5dde, (q31_t)0xda087b69, (q31_t)0xc72ea70, (q31_t)0xda1299ec,
+    (q31_t)0xc6b78ff, (q31_t)0xda1cb9e5, (q31_t)0xc64098b, (q31_t)0xda26db54,
+    (q31_t)0xc5c9c14, (q31_t)0xda30fe38, (q31_t)0xc55309b, (q31_t)0xda3b2292,
+    (q31_t)0xc4dc720, (q31_t)0xda454860, (q31_t)0xc465fa3, (q31_t)0xda4f6fa3,
+    (q31_t)0xc3efa25, (q31_t)0xda599859, (q31_t)0xc3796a5, (q31_t)0xda63c284,
+    (q31_t)0xc303524, (q31_t)0xda6dee21, (q31_t)0xc28d5a3, (q31_t)0xda781b31,
+    (q31_t)0xc217822, (q31_t)0xda8249b4, (q31_t)0xc1a1ca0, (q31_t)0xda8c79a9,
+    (q31_t)0xc12c31f, (q31_t)0xda96ab0f, (q31_t)0xc0b6b9e, (q31_t)0xdaa0dde7,
+    (q31_t)0xc04161e, (q31_t)0xdaab122f, (q31_t)0xbfcc29f, (q31_t)0xdab547e8,
+    (q31_t)0xbf57121, (q31_t)0xdabf7f11, (q31_t)0xbee21a5, (q31_t)0xdac9b7a9,
+    (q31_t)0xbe6d42b, (q31_t)0xdad3f1b1, (q31_t)0xbdf88b3, (q31_t)0xdade2d28,
+    (q31_t)0xbd83f3d, (q31_t)0xdae86a0d, (q31_t)0xbd0f7ca, (q31_t)0xdaf2a860,
+    (q31_t)0xbc9b25a, (q31_t)0xdafce821, (q31_t)0xbc26eee, (q31_t)0xdb072950,
+    (q31_t)0xbbb2d85, (q31_t)0xdb116beb, (q31_t)0xbb3ee20, (q31_t)0xdb1baff2,
+    (q31_t)0xbacb0bf, (q31_t)0xdb25f566, (q31_t)0xba57563, (q31_t)0xdb303c46,
+    (q31_t)0xb9e3c0b, (q31_t)0xdb3a8491, (q31_t)0xb9704b9, (q31_t)0xdb44ce46,
+    (q31_t)0xb8fcf6b, (q31_t)0xdb4f1967, (q31_t)0xb889c23, (q31_t)0xdb5965f1,
+    (q31_t)0xb816ae1, (q31_t)0xdb63b3e5, (q31_t)0xb7a3ba5, (q31_t)0xdb6e0342,
+    (q31_t)0xb730e70, (q31_t)0xdb785409, (q31_t)0xb6be341, (q31_t)0xdb82a638,
+    (q31_t)0xb64ba19, (q31_t)0xdb8cf9cf, (q31_t)0xb5d92f8, (q31_t)0xdb974ece,
+    (q31_t)0xb566ddf, (q31_t)0xdba1a534, (q31_t)0xb4f4acd, (q31_t)0xdbabfd01,
+    (q31_t)0xb4829c4, (q31_t)0xdbb65634, (q31_t)0xb410ac3, (q31_t)0xdbc0b0ce,
+    (q31_t)0xb39edca, (q31_t)0xdbcb0cce, (q31_t)0xb32d2da, (q31_t)0xdbd56a32,
+    (q31_t)0xb2bb9f4, (q31_t)0xdbdfc8fc, (q31_t)0xb24a316, (q31_t)0xdbea292b,
+    (q31_t)0xb1d8e43, (q31_t)0xdbf48abd, (q31_t)0xb167b79, (q31_t)0xdbfeedb3,
+    (q31_t)0xb0f6aba, (q31_t)0xdc09520d, (q31_t)0xb085c05, (q31_t)0xdc13b7c9,
+    (q31_t)0xb014f5b, (q31_t)0xdc1e1ee9, (q31_t)0xafa44bc, (q31_t)0xdc28876a,
+    (q31_t)0xaf33c28, (q31_t)0xdc32f14d, (q31_t)0xaec35a0, (q31_t)0xdc3d5c91,
+    (q31_t)0xae53123, (q31_t)0xdc47c936, (q31_t)0xade2eb3, (q31_t)0xdc52373c,
+    (q31_t)0xad72e4f, (q31_t)0xdc5ca6a2, (q31_t)0xad02ff8, (q31_t)0xdc671768,
+    (q31_t)0xac933ae, (q31_t)0xdc71898d, (q31_t)0xac23971, (q31_t)0xdc7bfd11,
+    (q31_t)0xabb4141, (q31_t)0xdc8671f3, (q31_t)0xab44b1f, (q31_t)0xdc90e834,
+    (q31_t)0xaad570c, (q31_t)0xdc9b5fd2, (q31_t)0xaa66506, (q31_t)0xdca5d8cd,
+    (q31_t)0xa9f750f, (q31_t)0xdcb05326, (q31_t)0xa988727, (q31_t)0xdcbacedb,
+    (q31_t)0xa919b4e, (q31_t)0xdcc54bec, (q31_t)0xa8ab184, (q31_t)0xdccfca59,
+    (q31_t)0xa83c9ca, (q31_t)0xdcda4a21, (q31_t)0xa7ce420, (q31_t)0xdce4cb44,
+    (q31_t)0xa760086, (q31_t)0xdcef4dc2, (q31_t)0xa6f1efc, (q31_t)0xdcf9d199,
+    (q31_t)0xa683f83, (q31_t)0xdd0456ca, (q31_t)0xa61621b, (q31_t)0xdd0edd55,
+    (q31_t)0xa5a86c4, (q31_t)0xdd196538, (q31_t)0xa53ad7e, (q31_t)0xdd23ee74,
+    (q31_t)0xa4cd64b, (q31_t)0xdd2e7908, (q31_t)0xa460129, (q31_t)0xdd3904f4,
+    (q31_t)0xa3f2e19, (q31_t)0xdd439236, (q31_t)0xa385d1d, (q31_t)0xdd4e20d0,
+    (q31_t)0xa318e32, (q31_t)0xdd58b0c0, (q31_t)0xa2ac15b, (q31_t)0xdd634206,
+    (q31_t)0xa23f698, (q31_t)0xdd6dd4a2, (q31_t)0xa1d2de7, (q31_t)0xdd786892,
+    (q31_t)0xa16674b, (q31_t)0xdd82fdd8, (q31_t)0xa0fa2c3, (q31_t)0xdd8d9472,
+    (q31_t)0xa08e04f, (q31_t)0xdd982c60, (q31_t)0xa021fef, (q31_t)0xdda2c5a2,
+    (q31_t)0x9fb61a5, (q31_t)0xddad6036, (q31_t)0x9f4a570, (q31_t)0xddb7fc1e,
+    (q31_t)0x9edeb50, (q31_t)0xddc29958, (q31_t)0x9e73346, (q31_t)0xddcd37e4,
+    (q31_t)0x9e07d51, (q31_t)0xddd7d7c1, (q31_t)0x9d9c973, (q31_t)0xdde278ef,
+    (q31_t)0x9d317ab, (q31_t)0xdded1b6e, (q31_t)0x9cc67fa, (q31_t)0xddf7bf3e,
+    (q31_t)0x9c5ba60, (q31_t)0xde02645d, (q31_t)0x9bf0edd, (q31_t)0xde0d0acc,
+    (q31_t)0x9b86572, (q31_t)0xde17b28a, (q31_t)0x9b1be1e, (q31_t)0xde225b96,
+    (q31_t)0x9ab18e3, (q31_t)0xde2d05f1, (q31_t)0x9a475bf, (q31_t)0xde37b199,
+    (q31_t)0x99dd4b4, (q31_t)0xde425e8f, (q31_t)0x99735c2, (q31_t)0xde4d0cd2,
+    (q31_t)0x99098e9, (q31_t)0xde57bc62, (q31_t)0x989fe29, (q31_t)0xde626d3e,
+    (q31_t)0x9836582, (q31_t)0xde6d1f65, (q31_t)0x97ccef5, (q31_t)0xde77d2d8,
+    (q31_t)0x9763a83, (q31_t)0xde828796, (q31_t)0x96fa82a, (q31_t)0xde8d3d9e,
+    (q31_t)0x96917ec, (q31_t)0xde97f4f1, (q31_t)0x96289c9, (q31_t)0xdea2ad8d,
+    (q31_t)0x95bfdc1, (q31_t)0xdead6773, (q31_t)0x95573d4, (q31_t)0xdeb822a1,
+    (q31_t)0x94eec03, (q31_t)0xdec2df18, (q31_t)0x948664d, (q31_t)0xdecd9cd7,
+    (q31_t)0x941e2b4, (q31_t)0xded85bdd, (q31_t)0x93b6137, (q31_t)0xdee31c2b,
+    (q31_t)0x934e1d6, (q31_t)0xdeedddc0, (q31_t)0x92e6492, (q31_t)0xdef8a09b,
+    (q31_t)0x927e96b, (q31_t)0xdf0364bc, (q31_t)0x9217062, (q31_t)0xdf0e2a22,
+    (q31_t)0x91af976, (q31_t)0xdf18f0ce, (q31_t)0x91484a8, (q31_t)0xdf23b8be,
+    (q31_t)0x90e11f7, (q31_t)0xdf2e81f3, (q31_t)0x907a166, (q31_t)0xdf394c6b,
+    (q31_t)0x90132f2, (q31_t)0xdf441828, (q31_t)0x8fac69e, (q31_t)0xdf4ee527,
+    (q31_t)0x8f45c68, (q31_t)0xdf59b369, (q31_t)0x8edf452, (q31_t)0xdf6482ed,
+    (q31_t)0x8e78e5b, (q31_t)0xdf6f53b3, (q31_t)0x8e12a84, (q31_t)0xdf7a25ba,
+    (q31_t)0x8dac8cd, (q31_t)0xdf84f902, (q31_t)0x8d46936, (q31_t)0xdf8fcd8b,
+    (q31_t)0x8ce0bc0, (q31_t)0xdf9aa354, (q31_t)0x8c7b06b, (q31_t)0xdfa57a5d,
+    (q31_t)0x8c15736, (q31_t)0xdfb052a5, (q31_t)0x8bb0023, (q31_t)0xdfbb2c2c,
+    (q31_t)0x8b4ab32, (q31_t)0xdfc606f1, (q31_t)0x8ae5862, (q31_t)0xdfd0e2f5,
+    (q31_t)0x8a807b4, (q31_t)0xdfdbc036, (q31_t)0x8a1b928, (q31_t)0xdfe69eb4,
+    (q31_t)0x89b6cbf, (q31_t)0xdff17e70, (q31_t)0x8952278, (q31_t)0xdffc5f67,
+    (q31_t)0x88eda54, (q31_t)0xe007419b, (q31_t)0x8889454, (q31_t)0xe012250a,
+    (q31_t)0x8825077, (q31_t)0xe01d09b4, (q31_t)0x87c0ebd, (q31_t)0xe027ef99,
+    (q31_t)0x875cf28, (q31_t)0xe032d6b8, (q31_t)0x86f91b7, (q31_t)0xe03dbf11,
+    (q31_t)0x869566a, (q31_t)0xe048a8a4, (q31_t)0x8631d42, (q31_t)0xe053936f,
+    (q31_t)0x85ce63e, (q31_t)0xe05e7f74, (q31_t)0x856b160, (q31_t)0xe0696cb0,
+    (q31_t)0x8507ea7, (q31_t)0xe0745b24, (q31_t)0x84a4e14, (q31_t)0xe07f4acf,
+    (q31_t)0x8441fa6, (q31_t)0xe08a3bb2, (q31_t)0x83df35f, (q31_t)0xe0952dcb,
+    (q31_t)0x837c93e, (q31_t)0xe0a0211a, (q31_t)0x831a143, (q31_t)0xe0ab159e,
+    (q31_t)0x82b7b70, (q31_t)0xe0b60b58, (q31_t)0x82557c3, (q31_t)0xe0c10247,
+    (q31_t)0x81f363d, (q31_t)0xe0cbfa6a, (q31_t)0x81916df, (q31_t)0xe0d6f3c1,
+    (q31_t)0x812f9a9, (q31_t)0xe0e1ee4b, (q31_t)0x80cde9b, (q31_t)0xe0ecea09,
+    (q31_t)0x806c5b5, (q31_t)0xe0f7e6f9, (q31_t)0x800aef7, (q31_t)0xe102e51c,
+    (q31_t)0x7fa9a62, (q31_t)0xe10de470, (q31_t)0x7f487f6, (q31_t)0xe118e4f6,
+    (q31_t)0x7ee77b3, (q31_t)0xe123e6ad, (q31_t)0x7e8699a, (q31_t)0xe12ee995,
+    (q31_t)0x7e25daa, (q31_t)0xe139edac, (q31_t)0x7dc53e3, (q31_t)0xe144f2f3,
+    (q31_t)0x7d64c47, (q31_t)0xe14ff96a, (q31_t)0x7d046d6, (q31_t)0xe15b0110,
+    (q31_t)0x7ca438f, (q31_t)0xe16609e3, (q31_t)0x7c44272, (q31_t)0xe17113e5,
+    (q31_t)0x7be4381, (q31_t)0xe17c1f15, (q31_t)0x7b846ba, (q31_t)0xe1872b72,
+    (q31_t)0x7b24c20, (q31_t)0xe19238fb, (q31_t)0x7ac53b1, (q31_t)0xe19d47b1,
+    (q31_t)0x7a65d6e, (q31_t)0xe1a85793, (q31_t)0x7a06957, (q31_t)0xe1b368a0,
+    (q31_t)0x79a776c, (q31_t)0xe1be7ad8, (q31_t)0x79487ae, (q31_t)0xe1c98e3b,
+    (q31_t)0x78e9a1d, (q31_t)0xe1d4a2c8, (q31_t)0x788aeb9, (q31_t)0xe1dfb87f,
+    (q31_t)0x782c582, (q31_t)0xe1eacf5f, (q31_t)0x77cde79, (q31_t)0xe1f5e768,
+    (q31_t)0x776f99d, (q31_t)0xe2010099, (q31_t)0x77116f0, (q31_t)0xe20c1af3,
+    (q31_t)0x76b3671, (q31_t)0xe2173674, (q31_t)0x7655820, (q31_t)0xe222531c,
+    (q31_t)0x75f7bfe, (q31_t)0xe22d70eb, (q31_t)0x759a20a, (q31_t)0xe2388fe1,
+    (q31_t)0x753ca46, (q31_t)0xe243affc, (q31_t)0x74df4b1, (q31_t)0xe24ed13d,
+    (q31_t)0x748214c, (q31_t)0xe259f3a3, (q31_t)0x7425016, (q31_t)0xe265172e,
+    (q31_t)0x73c8111, (q31_t)0xe2703bdc, (q31_t)0x736b43c, (q31_t)0xe27b61af,
+    (q31_t)0x730e997, (q31_t)0xe28688a4, (q31_t)0x72b2123, (q31_t)0xe291b0bd,
+    (q31_t)0x7255ae0, (q31_t)0xe29cd9f8, (q31_t)0x71f96ce, (q31_t)0xe2a80456,
+    (q31_t)0x719d4ed, (q31_t)0xe2b32fd4, (q31_t)0x714153e, (q31_t)0xe2be5c74,
+    (q31_t)0x70e57c0, (q31_t)0xe2c98a35, (q31_t)0x7089c75, (q31_t)0xe2d4b916,
+    (q31_t)0x702e35c, (q31_t)0xe2dfe917, (q31_t)0x6fd2c75, (q31_t)0xe2eb1a37,
+    (q31_t)0x6f777c1, (q31_t)0xe2f64c77, (q31_t)0x6f1c540, (q31_t)0xe3017fd5,
+    (q31_t)0x6ec14f2, (q31_t)0xe30cb451, (q31_t)0x6e666d7, (q31_t)0xe317e9eb,
+    (q31_t)0x6e0baf0, (q31_t)0xe32320a2, (q31_t)0x6db113d, (q31_t)0xe32e5876,
+    (q31_t)0x6d569be, (q31_t)0xe3399167, (q31_t)0x6cfc472, (q31_t)0xe344cb73,
+    (q31_t)0x6ca215c, (q31_t)0xe350069b, (q31_t)0x6c4807a, (q31_t)0xe35b42df,
+    (q31_t)0x6bee1cd, (q31_t)0xe366803c, (q31_t)0x6b94554, (q31_t)0xe371beb5,
+    (q31_t)0x6b3ab12, (q31_t)0xe37cfe47, (q31_t)0x6ae1304, (q31_t)0xe3883ef2,
+    (q31_t)0x6a87d2d, (q31_t)0xe39380b6, (q31_t)0x6a2e98b, (q31_t)0xe39ec393,
+    (q31_t)0x69d5820, (q31_t)0xe3aa0788, (q31_t)0x697c8eb, (q31_t)0xe3b54c95,
+    (q31_t)0x6923bec, (q31_t)0xe3c092b9, (q31_t)0x68cb124, (q31_t)0xe3cbd9f4,
+    (q31_t)0x6872894, (q31_t)0xe3d72245, (q31_t)0x681a23a, (q31_t)0xe3e26bac,
+    (q31_t)0x67c1e18, (q31_t)0xe3edb628, (q31_t)0x6769c2e, (q31_t)0xe3f901ba,
+    (q31_t)0x6711c7b, (q31_t)0xe4044e60, (q31_t)0x66b9f01, (q31_t)0xe40f9c1a,
+    (q31_t)0x66623be, (q31_t)0xe41aeae8, (q31_t)0x660aab5, (q31_t)0xe4263ac9,
+    (q31_t)0x65b33e4, (q31_t)0xe4318bbe, (q31_t)0x655bf4c, (q31_t)0xe43cddc4,
+    (q31_t)0x6504ced, (q31_t)0xe44830dd, (q31_t)0x64adcc7, (q31_t)0xe4538507,
+    (q31_t)0x6456edb, (q31_t)0xe45eda43, (q31_t)0x6400329, (q31_t)0xe46a308f,
+    (q31_t)0x63a99b1, (q31_t)0xe47587eb, (q31_t)0x6353273, (q31_t)0xe480e057,
+    (q31_t)0x62fcd6f, (q31_t)0xe48c39d3, (q31_t)0x62a6aa6, (q31_t)0xe497945d,
+    (q31_t)0x6250a18, (q31_t)0xe4a2eff6, (q31_t)0x61fabc4, (q31_t)0xe4ae4c9d,
+    (q31_t)0x61a4fac, (q31_t)0xe4b9aa52, (q31_t)0x614f5cf, (q31_t)0xe4c50914,
+    (q31_t)0x60f9e2e, (q31_t)0xe4d068e2, (q31_t)0x60a48c9, (q31_t)0xe4dbc9bd,
+    (q31_t)0x604f5a0, (q31_t)0xe4e72ba4, (q31_t)0x5ffa4b3, (q31_t)0xe4f28e96,
+    (q31_t)0x5fa5603, (q31_t)0xe4fdf294, (q31_t)0x5f5098f, (q31_t)0xe509579b,
+    (q31_t)0x5efbf58, (q31_t)0xe514bdad, (q31_t)0x5ea775e, (q31_t)0xe52024c9,
+    (q31_t)0x5e531a1, (q31_t)0xe52b8cee, (q31_t)0x5dfee22, (q31_t)0xe536f61b,
+    (q31_t)0x5daace1, (q31_t)0xe5426051, (q31_t)0x5d56ddd, (q31_t)0xe54dcb8f,
+    (q31_t)0x5d03118, (q31_t)0xe55937d5, (q31_t)0x5caf690, (q31_t)0xe564a521,
+    (q31_t)0x5c5be47, (q31_t)0xe5701374, (q31_t)0x5c0883d, (q31_t)0xe57b82cd,
+    (q31_t)0x5bb5472, (q31_t)0xe586f32c, (q31_t)0x5b622e6, (q31_t)0xe5926490,
+    (q31_t)0x5b0f399, (q31_t)0xe59dd6f9, (q31_t)0x5abc68c, (q31_t)0xe5a94a67,
+    (q31_t)0x5a69bbe, (q31_t)0xe5b4bed8, (q31_t)0x5a17330, (q31_t)0xe5c0344d,
+    (q31_t)0x59c4ce3, (q31_t)0xe5cbaac5, (q31_t)0x59728d5, (q31_t)0xe5d72240,
+    (q31_t)0x5920708, (q31_t)0xe5e29abc, (q31_t)0x58ce77c, (q31_t)0xe5ee143b,
+    (q31_t)0x587ca31, (q31_t)0xe5f98ebb, (q31_t)0x582af26, (q31_t)0xe6050a3b,
+    (q31_t)0x57d965d, (q31_t)0xe61086bc, (q31_t)0x5787fd6, (q31_t)0xe61c043d,
+    (q31_t)0x5736b90, (q31_t)0xe62782be, (q31_t)0x56e598c, (q31_t)0xe633023e,
+    (q31_t)0x56949ca, (q31_t)0xe63e82bc, (q31_t)0x5643c4a, (q31_t)0xe64a0438,
+    (q31_t)0x55f310d, (q31_t)0xe65586b3, (q31_t)0x55a2812, (q31_t)0xe6610a2a,
+    (q31_t)0x555215a, (q31_t)0xe66c8e9f, (q31_t)0x5501ce5, (q31_t)0xe6781410,
+    (q31_t)0x54b1ab4, (q31_t)0xe6839a7c, (q31_t)0x5461ac6, (q31_t)0xe68f21e5,
+    (q31_t)0x5411d1b, (q31_t)0xe69aaa48, (q31_t)0x53c21b4, (q31_t)0xe6a633a6,
+    (q31_t)0x5372891, (q31_t)0xe6b1bdff, (q31_t)0x53231b3, (q31_t)0xe6bd4951,
+    (q31_t)0x52d3d18, (q31_t)0xe6c8d59c, (q31_t)0x5284ac3, (q31_t)0xe6d462e1,
+    (q31_t)0x5235ab2, (q31_t)0xe6dff11d, (q31_t)0x51e6ce6, (q31_t)0xe6eb8052,
+    (q31_t)0x519815f, (q31_t)0xe6f7107e, (q31_t)0x514981d, (q31_t)0xe702a1a1,
+    (q31_t)0x50fb121, (q31_t)0xe70e33bb, (q31_t)0x50acc6b, (q31_t)0xe719c6cb,
+    (q31_t)0x505e9fb, (q31_t)0xe7255ad1, (q31_t)0x50109d0, (q31_t)0xe730efcc,
+    (q31_t)0x4fc2bec, (q31_t)0xe73c85bc, (q31_t)0x4f7504e, (q31_t)0xe7481ca1,
+    (q31_t)0x4f276f7, (q31_t)0xe753b479, (q31_t)0x4ed9fe7, (q31_t)0xe75f4d45,
+    (q31_t)0x4e8cb1e, (q31_t)0xe76ae704, (q31_t)0x4e3f89c, (q31_t)0xe77681b6,
+    (q31_t)0x4df2862, (q31_t)0xe7821d59, (q31_t)0x4da5a6f, (q31_t)0xe78db9ef,
+    (q31_t)0x4d58ec3, (q31_t)0xe7995776, (q31_t)0x4d0c560, (q31_t)0xe7a4f5ed,
+    (q31_t)0x4cbfe45, (q31_t)0xe7b09555, (q31_t)0x4c73972, (q31_t)0xe7bc35ad,
+    (q31_t)0x4c276e8, (q31_t)0xe7c7d6f4, (q31_t)0x4bdb6a6, (q31_t)0xe7d3792b,
+    (q31_t)0x4b8f8ad, (q31_t)0xe7df1c50, (q31_t)0x4b43cfd, (q31_t)0xe7eac063,
+    (q31_t)0x4af8397, (q31_t)0xe7f66564, (q31_t)0x4aacc7a, (q31_t)0xe8020b52,
+    (q31_t)0x4a617a6, (q31_t)0xe80db22d, (q31_t)0x4a1651c, (q31_t)0xe81959f4,
+    (q31_t)0x49cb4dd, (q31_t)0xe82502a7, (q31_t)0x49806e7, (q31_t)0xe830ac45,
+    (q31_t)0x4935b3c, (q31_t)0xe83c56cf, (q31_t)0x48eb1db, (q31_t)0xe8480243,
+    (q31_t)0x48a0ac4, (q31_t)0xe853aea1, (q31_t)0x48565f9, (q31_t)0xe85f5be9,
+    (q31_t)0x480c379, (q31_t)0xe86b0a1a, (q31_t)0x47c2344, (q31_t)0xe876b934,
+    (q31_t)0x477855a, (q31_t)0xe8826936, (q31_t)0x472e9bc, (q31_t)0xe88e1a20,
+    (q31_t)0x46e5069, (q31_t)0xe899cbf1, (q31_t)0x469b963, (q31_t)0xe8a57ea9,
+    (q31_t)0x46524a9, (q31_t)0xe8b13248, (q31_t)0x460923b, (q31_t)0xe8bce6cd,
+    (q31_t)0x45c0219, (q31_t)0xe8c89c37, (q31_t)0x4577444, (q31_t)0xe8d45286,
+    (q31_t)0x452e8bc, (q31_t)0xe8e009ba, (q31_t)0x44e5f80, (q31_t)0xe8ebc1d3,
+    (q31_t)0x449d892, (q31_t)0xe8f77acf, (q31_t)0x44553f2, (q31_t)0xe90334af,
+    (q31_t)0x440d19e, (q31_t)0xe90eef71, (q31_t)0x43c5199, (q31_t)0xe91aab16,
+    (q31_t)0x437d3e1, (q31_t)0xe926679c, (q31_t)0x4335877, (q31_t)0xe9322505,
+    (q31_t)0x42edf5c, (q31_t)0xe93de34e, (q31_t)0x42a688f, (q31_t)0xe949a278,
+    (q31_t)0x425f410, (q31_t)0xe9556282, (q31_t)0x42181e0, (q31_t)0xe961236c,
+    (q31_t)0x41d11ff, (q31_t)0xe96ce535, (q31_t)0x418a46d, (q31_t)0xe978a7dd,
+    (q31_t)0x414392b, (q31_t)0xe9846b63, (q31_t)0x40fd037, (q31_t)0xe9902fc7,
+    (q31_t)0x40b6994, (q31_t)0xe99bf509, (q31_t)0x4070540, (q31_t)0xe9a7bb28,
+    (q31_t)0x402a33c, (q31_t)0xe9b38223, (q31_t)0x3fe4388, (q31_t)0xe9bf49fa,
+    (q31_t)0x3f9e624, (q31_t)0xe9cb12ad, (q31_t)0x3f58b10, (q31_t)0xe9d6dc3b,
+    (q31_t)0x3f1324e, (q31_t)0xe9e2a6a3, (q31_t)0x3ecdbdc, (q31_t)0xe9ee71e6,
+    (q31_t)0x3e887bb, (q31_t)0xe9fa3e03, (q31_t)0x3e435ea, (q31_t)0xea060af9,
+    (q31_t)0x3dfe66c, (q31_t)0xea11d8c8, (q31_t)0x3db993e, (q31_t)0xea1da770,
+    (q31_t)0x3d74e62, (q31_t)0xea2976ef, (q31_t)0x3d305d8, (q31_t)0xea354746,
+    (q31_t)0x3cebfa0, (q31_t)0xea411874, (q31_t)0x3ca7bba, (q31_t)0xea4cea79,
+    (q31_t)0x3c63a26, (q31_t)0xea58bd54, (q31_t)0x3c1fae5, (q31_t)0xea649105,
+    (q31_t)0x3bdbdf6, (q31_t)0xea70658a, (q31_t)0x3b9835a, (q31_t)0xea7c3ae5,
+    (q31_t)0x3b54b11, (q31_t)0xea881114, (q31_t)0x3b1151b, (q31_t)0xea93e817,
+    (q31_t)0x3ace178, (q31_t)0xea9fbfed, (q31_t)0x3a8b028, (q31_t)0xeaab9896,
+    (q31_t)0x3a4812c, (q31_t)0xeab77212, (q31_t)0x3a05484, (q31_t)0xeac34c60,
+    (q31_t)0x39c2a2f, (q31_t)0xeacf277f, (q31_t)0x398022f, (q31_t)0xeadb0370,
+    (q31_t)0x393dc82, (q31_t)0xeae6e031, (q31_t)0x38fb92a, (q31_t)0xeaf2bdc3,
+    (q31_t)0x38b9827, (q31_t)0xeafe9c24, (q31_t)0x3877978, (q31_t)0xeb0a7b54,
+    (q31_t)0x3835d1e, (q31_t)0xeb165b54, (q31_t)0x37f4319, (q31_t)0xeb223c22,
+    (q31_t)0x37b2b6a, (q31_t)0xeb2e1dbe, (q31_t)0x377160f, (q31_t)0xeb3a0027,
+    (q31_t)0x373030a, (q31_t)0xeb45e35d, (q31_t)0x36ef25b, (q31_t)0xeb51c760,
+    (q31_t)0x36ae401, (q31_t)0xeb5dac2f, (q31_t)0x366d7fd, (q31_t)0xeb6991ca,
+    (q31_t)0x362ce50, (q31_t)0xeb75782f, (q31_t)0x35ec6f8, (q31_t)0xeb815f60,
+    (q31_t)0x35ac1f7, (q31_t)0xeb8d475b, (q31_t)0x356bf4d, (q31_t)0xeb99301f,
+    (q31_t)0x352bef9, (q31_t)0xeba519ad, (q31_t)0x34ec0fc, (q31_t)0xebb10404,
+    (q31_t)0x34ac556, (q31_t)0xebbcef23, (q31_t)0x346cc07, (q31_t)0xebc8db0b,
+    (q31_t)0x342d510, (q31_t)0xebd4c7ba, (q31_t)0x33ee070, (q31_t)0xebe0b52f,
+    (q31_t)0x33aee27, (q31_t)0xebeca36c, (q31_t)0x336fe37, (q31_t)0xebf8926f,
+    (q31_t)0x333109e, (q31_t)0xec048237, (q31_t)0x32f255e, (q31_t)0xec1072c4,
+    (q31_t)0x32b3c75, (q31_t)0xec1c6417, (q31_t)0x32755e5, (q31_t)0xec28562d,
+    (q31_t)0x32371ae, (q31_t)0xec344908, (q31_t)0x31f8fcf, (q31_t)0xec403ca5,
+    (q31_t)0x31bb049, (q31_t)0xec4c3106, (q31_t)0x317d31c, (q31_t)0xec582629,
+    (q31_t)0x313f848, (q31_t)0xec641c0e, (q31_t)0x3101fce, (q31_t)0xec7012b5,
+    (q31_t)0x30c49ad, (q31_t)0xec7c0a1d, (q31_t)0x30875e5, (q31_t)0xec880245,
+    (q31_t)0x304a477, (q31_t)0xec93fb2e, (q31_t)0x300d563, (q31_t)0xec9ff4d6,
+    (q31_t)0x2fd08a9, (q31_t)0xecabef3d, (q31_t)0x2f93e4a, (q31_t)0xecb7ea63,
+    (q31_t)0x2f57644, (q31_t)0xecc3e648, (q31_t)0x2f1b099, (q31_t)0xeccfe2ea,
+    (q31_t)0x2eded49, (q31_t)0xecdbe04a, (q31_t)0x2ea2c53, (q31_t)0xece7de66,
+    (q31_t)0x2e66db8, (q31_t)0xecf3dd3f, (q31_t)0x2e2b178, (q31_t)0xecffdcd4,
+    (q31_t)0x2def794, (q31_t)0xed0bdd25, (q31_t)0x2db400a, (q31_t)0xed17de31,
+    (q31_t)0x2d78add, (q31_t)0xed23dff7, (q31_t)0x2d3d80a, (q31_t)0xed2fe277,
+    (q31_t)0x2d02794, (q31_t)0xed3be5b1, (q31_t)0x2cc7979, (q31_t)0xed47e9a5,
+    (q31_t)0x2c8cdbb, (q31_t)0xed53ee51, (q31_t)0x2c52459, (q31_t)0xed5ff3b5,
+    (q31_t)0x2c17d52, (q31_t)0xed6bf9d1, (q31_t)0x2bdd8a9, (q31_t)0xed7800a5,
+    (q31_t)0x2ba365c, (q31_t)0xed84082f, (q31_t)0x2b6966c, (q31_t)0xed901070,
+    (q31_t)0x2b2f8d8, (q31_t)0xed9c1967, (q31_t)0x2af5da2, (q31_t)0xeda82313,
+    (q31_t)0x2abc4c9, (q31_t)0xedb42d74, (q31_t)0x2a82e4d, (q31_t)0xedc0388a,
+    (q31_t)0x2a49a2e, (q31_t)0xedcc4454, (q31_t)0x2a1086d, (q31_t)0xedd850d2,
+    (q31_t)0x29d790a, (q31_t)0xede45e03, (q31_t)0x299ec05, (q31_t)0xedf06be6,
+    (q31_t)0x296615d, (q31_t)0xedfc7a7c, (q31_t)0x292d914, (q31_t)0xee0889c4,
+    (q31_t)0x28f5329, (q31_t)0xee1499bd, (q31_t)0x28bcf9c, (q31_t)0xee20aa67,
+    (q31_t)0x2884e6e, (q31_t)0xee2cbbc1, (q31_t)0x284cf9f, (q31_t)0xee38cdcb,
+    (q31_t)0x281532e, (q31_t)0xee44e084, (q31_t)0x27dd91c, (q31_t)0xee50f3ed,
+    (q31_t)0x27a616a, (q31_t)0xee5d0804, (q31_t)0x276ec16, (q31_t)0xee691cc9,
+    (q31_t)0x2737922, (q31_t)0xee75323c, (q31_t)0x270088e, (q31_t)0xee81485c,
+    (q31_t)0x26c9a58, (q31_t)0xee8d5f29, (q31_t)0x2692e83, (q31_t)0xee9976a1,
+    (q31_t)0x265c50e, (q31_t)0xeea58ec6, (q31_t)0x2625df8, (q31_t)0xeeb1a796,
+    (q31_t)0x25ef943, (q31_t)0xeebdc110, (q31_t)0x25b96ee, (q31_t)0xeec9db35,
+    (q31_t)0x25836f9, (q31_t)0xeed5f604, (q31_t)0x254d965, (q31_t)0xeee2117c,
+    (q31_t)0x2517e31, (q31_t)0xeeee2d9d, (q31_t)0x24e255e, (q31_t)0xeefa4a67,
+    (q31_t)0x24aceed, (q31_t)0xef0667d9, (q31_t)0x2477adc, (q31_t)0xef1285f2,
+    (q31_t)0x244292c, (q31_t)0xef1ea4b2, (q31_t)0x240d9de, (q31_t)0xef2ac419,
+    (q31_t)0x23d8cf1, (q31_t)0xef36e426, (q31_t)0x23a4265, (q31_t)0xef4304d8,
+    (q31_t)0x236fa3b, (q31_t)0xef4f2630, (q31_t)0x233b473, (q31_t)0xef5b482d,
+    (q31_t)0x230710d, (q31_t)0xef676ace, (q31_t)0x22d3009, (q31_t)0xef738e12,
+    (q31_t)0x229f167, (q31_t)0xef7fb1fa, (q31_t)0x226b528, (q31_t)0xef8bd685,
+    (q31_t)0x2237b4b, (q31_t)0xef97fbb2, (q31_t)0x22043d0, (q31_t)0xefa42181,
+    (q31_t)0x21d0eb8, (q31_t)0xefb047f2, (q31_t)0x219dc03, (q31_t)0xefbc6f03,
+    (q31_t)0x216abb1, (q31_t)0xefc896b5, (q31_t)0x2137dc2, (q31_t)0xefd4bf08,
+    (q31_t)0x2105236, (q31_t)0xefe0e7f9, (q31_t)0x20d290d, (q31_t)0xefed118a,
+    (q31_t)0x20a0248, (q31_t)0xeff93bba, (q31_t)0x206dde6, (q31_t)0xf0056687,
+    (q31_t)0x203bbe8, (q31_t)0xf01191f3, (q31_t)0x2009c4e, (q31_t)0xf01dbdfb,
+    (q31_t)0x1fd7f17, (q31_t)0xf029eaa1, (q31_t)0x1fa6445, (q31_t)0xf03617e2,
+    (q31_t)0x1f74bd6, (q31_t)0xf04245c0, (q31_t)0x1f435cc, (q31_t)0xf04e7438,
+    (q31_t)0x1f12227, (q31_t)0xf05aa34c, (q31_t)0x1ee10e5, (q31_t)0xf066d2fa,
+    (q31_t)0x1eb0209, (q31_t)0xf0730342, (q31_t)0x1e7f591, (q31_t)0xf07f3424,
+    (q31_t)0x1e4eb7e, (q31_t)0xf08b659f, (q31_t)0x1e1e3d0, (q31_t)0xf09797b2,
+    (q31_t)0x1dede87, (q31_t)0xf0a3ca5d, (q31_t)0x1dbdba3, (q31_t)0xf0affda0,
+    (q31_t)0x1d8db25, (q31_t)0xf0bc317a, (q31_t)0x1d5dd0c, (q31_t)0xf0c865ea,
+    (q31_t)0x1d2e158, (q31_t)0xf0d49af1, (q31_t)0x1cfe80a, (q31_t)0xf0e0d08d,
+    (q31_t)0x1ccf122, (q31_t)0xf0ed06bf, (q31_t)0x1c9fca0, (q31_t)0xf0f93d86,
+    (q31_t)0x1c70a84, (q31_t)0xf10574e0, (q31_t)0x1c41ace, (q31_t)0xf111accf,
+    (q31_t)0x1c12d7e, (q31_t)0xf11de551, (q31_t)0x1be4294, (q31_t)0xf12a1e66,
+    (q31_t)0x1bb5a11, (q31_t)0xf136580d, (q31_t)0x1b873f5, (q31_t)0xf1429247,
+    (q31_t)0x1b5903f, (q31_t)0xf14ecd11, (q31_t)0x1b2aef0, (q31_t)0xf15b086d,
+    (q31_t)0x1afd007, (q31_t)0xf1674459, (q31_t)0x1acf386, (q31_t)0xf17380d6,
+    (q31_t)0x1aa196c, (q31_t)0xf17fbde2, (q31_t)0x1a741b9, (q31_t)0xf18bfb7d,
+    (q31_t)0x1a46c6e, (q31_t)0xf19839a6, (q31_t)0x1a1998a, (q31_t)0xf1a4785e,
+    (q31_t)0x19ec90d, (q31_t)0xf1b0b7a4, (q31_t)0x19bfaf9, (q31_t)0xf1bcf777,
+    (q31_t)0x1992f4c, (q31_t)0xf1c937d6, (q31_t)0x1966606, (q31_t)0xf1d578c2,
+    (q31_t)0x1939f29, (q31_t)0xf1e1ba3a, (q31_t)0x190dab4, (q31_t)0xf1edfc3d,
+    (q31_t)0x18e18a7, (q31_t)0xf1fa3ecb, (q31_t)0x18b5903, (q31_t)0xf20681e3,
+    (q31_t)0x1889bc6, (q31_t)0xf212c585, (q31_t)0x185e0f3, (q31_t)0xf21f09b1,
+    (q31_t)0x1832888, (q31_t)0xf22b4e66, (q31_t)0x1807285, (q31_t)0xf23793a3,
+    (q31_t)0x17dbeec, (q31_t)0xf243d968, (q31_t)0x17b0dbb, (q31_t)0xf2501fb5,
+    (q31_t)0x1785ef4, (q31_t)0xf25c6688, (q31_t)0x175b296, (q31_t)0xf268ade3,
+    (q31_t)0x17308a1, (q31_t)0xf274f5c3, (q31_t)0x1706115, (q31_t)0xf2813e2a,
+    (q31_t)0x16dbbf3, (q31_t)0xf28d8715, (q31_t)0x16b193a, (q31_t)0xf299d085,
+    (q31_t)0x16878eb, (q31_t)0xf2a61a7a, (q31_t)0x165db05, (q31_t)0xf2b264f2,
+    (q31_t)0x1633f8a, (q31_t)0xf2beafed, (q31_t)0x160a678, (q31_t)0xf2cafb6b,
+    (q31_t)0x15e0fd1, (q31_t)0xf2d7476c, (q31_t)0x15b7b94, (q31_t)0xf2e393ef,
+    (q31_t)0x158e9c1, (q31_t)0xf2efe0f2, (q31_t)0x1565a58, (q31_t)0xf2fc2e77,
+    (q31_t)0x153cd5a, (q31_t)0xf3087c7d, (q31_t)0x15142c6, (q31_t)0xf314cb02,
+    (q31_t)0x14eba9d, (q31_t)0xf3211a07, (q31_t)0x14c34df, (q31_t)0xf32d698a,
+    (q31_t)0x149b18b, (q31_t)0xf339b98d, (q31_t)0x14730a3, (q31_t)0xf3460a0d,
+    (q31_t)0x144b225, (q31_t)0xf3525b0b, (q31_t)0x1423613, (q31_t)0xf35eac86,
+    (q31_t)0x13fbc6c, (q31_t)0xf36afe7e, (q31_t)0x13d4530, (q31_t)0xf37750f2,
+    (q31_t)0x13ad060, (q31_t)0xf383a3e2, (q31_t)0x1385dfb, (q31_t)0xf38ff74d,
+    (q31_t)0x135ee02, (q31_t)0xf39c4b32, (q31_t)0x1338075, (q31_t)0xf3a89f92,
+    (q31_t)0x1311553, (q31_t)0xf3b4f46c, (q31_t)0x12eac9d, (q31_t)0xf3c149bf,
+    (q31_t)0x12c4653, (q31_t)0xf3cd9f8b, (q31_t)0x129e276, (q31_t)0xf3d9f5cf,
+    (q31_t)0x1278104, (q31_t)0xf3e64c8c, (q31_t)0x12521ff, (q31_t)0xf3f2a3bf,
+    (q31_t)0x122c566, (q31_t)0xf3fefb6a, (q31_t)0x1206b39, (q31_t)0xf40b538b,
+    (q31_t)0x11e1379, (q31_t)0xf417ac22, (q31_t)0x11bbe26, (q31_t)0xf424052f,
+    (q31_t)0x1196b3f, (q31_t)0xf4305eb0, (q31_t)0x1171ac6, (q31_t)0xf43cb8a7,
+    (q31_t)0x114ccb9, (q31_t)0xf4491311, (q31_t)0x1128119, (q31_t)0xf4556def,
+    (q31_t)0x11037e6, (q31_t)0xf461c940, (q31_t)0x10df120, (q31_t)0xf46e2504,
+    (q31_t)0x10bacc8, (q31_t)0xf47a8139, (q31_t)0x1096add, (q31_t)0xf486dde1,
+    (q31_t)0x1072b5f, (q31_t)0xf4933afa, (q31_t)0x104ee4f, (q31_t)0xf49f9884,
+    (q31_t)0x102b3ac, (q31_t)0xf4abf67e, (q31_t)0x1007b77, (q31_t)0xf4b854e7,
+    (q31_t)0xfe45b0, (q31_t)0xf4c4b3c0, (q31_t)0xfc1257, (q31_t)0xf4d11308,
+    (q31_t)0xf9e16b, (q31_t)0xf4dd72be, (q31_t)0xf7b2ee, (q31_t)0xf4e9d2e3,
+    (q31_t)0xf586df, (q31_t)0xf4f63374, (q31_t)0xf35d3e, (q31_t)0xf5029473,
+    (q31_t)0xf1360b, (q31_t)0xf50ef5de, (q31_t)0xef1147, (q31_t)0xf51b57b5,
+    (q31_t)0xeceef1, (q31_t)0xf527b9f7, (q31_t)0xeacf09, (q31_t)0xf5341ca5,
+    (q31_t)0xe8b190, (q31_t)0xf5407fbd, (q31_t)0xe69686, (q31_t)0xf54ce33f,
+    (q31_t)0xe47deb, (q31_t)0xf559472b, (q31_t)0xe267be, (q31_t)0xf565ab80,
+    (q31_t)0xe05401, (q31_t)0xf572103d, (q31_t)0xde42b2, (q31_t)0xf57e7563,
+    (q31_t)0xdc33d2, (q31_t)0xf58adaf0, (q31_t)0xda2762, (q31_t)0xf59740e5,
+    (q31_t)0xd81d61, (q31_t)0xf5a3a740, (q31_t)0xd615cf, (q31_t)0xf5b00e02,
+    (q31_t)0xd410ad, (q31_t)0xf5bc7529, (q31_t)0xd20dfa, (q31_t)0xf5c8dcb6,
+    (q31_t)0xd00db6, (q31_t)0xf5d544a7, (q31_t)0xce0fe3, (q31_t)0xf5e1acfd,
+    (q31_t)0xcc147f, (q31_t)0xf5ee15b7, (q31_t)0xca1b8a, (q31_t)0xf5fa7ed4,
+    (q31_t)0xc82506, (q31_t)0xf606e854, (q31_t)0xc630f2, (q31_t)0xf6135237,
+    (q31_t)0xc43f4d, (q31_t)0xf61fbc7b, (q31_t)0xc25019, (q31_t)0xf62c2721,
+    (q31_t)0xc06355, (q31_t)0xf6389228, (q31_t)0xbe7901, (q31_t)0xf644fd8f,
+    (q31_t)0xbc911d, (q31_t)0xf6516956, (q31_t)0xbaabaa, (q31_t)0xf65dd57d,
+    (q31_t)0xb8c8a7, (q31_t)0xf66a4203, (q31_t)0xb6e815, (q31_t)0xf676aee8,
+    (q31_t)0xb509f3, (q31_t)0xf6831c2b, (q31_t)0xb32e42, (q31_t)0xf68f89cb,
+    (q31_t)0xb15502, (q31_t)0xf69bf7c9, (q31_t)0xaf7e33, (q31_t)0xf6a86623,
+    (q31_t)0xada9d4, (q31_t)0xf6b4d4d9, (q31_t)0xabd7e6, (q31_t)0xf6c143ec,
+    (q31_t)0xaa086a, (q31_t)0xf6cdb359, (q31_t)0xa83b5e, (q31_t)0xf6da2321,
+    (q31_t)0xa670c4, (q31_t)0xf6e69344, (q31_t)0xa4a89b, (q31_t)0xf6f303c0,
+    (q31_t)0xa2e2e3, (q31_t)0xf6ff7496, (q31_t)0xa11f9d, (q31_t)0xf70be5c4,
+    (q31_t)0x9f5ec8, (q31_t)0xf718574b, (q31_t)0x9da065, (q31_t)0xf724c92a,
+    (q31_t)0x9be473, (q31_t)0xf7313b60, (q31_t)0x9a2af3, (q31_t)0xf73daded,
+    (q31_t)0x9873e4, (q31_t)0xf74a20d0, (q31_t)0x96bf48, (q31_t)0xf756940a,
+    (q31_t)0x950d1d, (q31_t)0xf7630799, (q31_t)0x935d64, (q31_t)0xf76f7b7d,
+    (q31_t)0x91b01d, (q31_t)0xf77befb5, (q31_t)0x900548, (q31_t)0xf7886442,
+    (q31_t)0x8e5ce5, (q31_t)0xf794d922, (q31_t)0x8cb6f5, (q31_t)0xf7a14e55,
+    (q31_t)0x8b1376, (q31_t)0xf7adc3db, (q31_t)0x89726a, (q31_t)0xf7ba39b3,
+    (q31_t)0x87d3d0, (q31_t)0xf7c6afdc, (q31_t)0x8637a9, (q31_t)0xf7d32657,
+    (q31_t)0x849df4, (q31_t)0xf7df9d22, (q31_t)0x8306b2, (q31_t)0xf7ec143e,
+    (q31_t)0x8171e2, (q31_t)0xf7f88ba9, (q31_t)0x7fdf85, (q31_t)0xf8050364,
+    (q31_t)0x7e4f9b, (q31_t)0xf8117b6d, (q31_t)0x7cc223, (q31_t)0xf81df3c5,
+    (q31_t)0x7b371e, (q31_t)0xf82a6c6a, (q31_t)0x79ae8c, (q31_t)0xf836e55d,
+    (q31_t)0x78286e, (q31_t)0xf8435e9d, (q31_t)0x76a4c2, (q31_t)0xf84fd829,
+    (q31_t)0x752389, (q31_t)0xf85c5201, (q31_t)0x73a4c3, (q31_t)0xf868cc24,
+    (q31_t)0x722871, (q31_t)0xf8754692, (q31_t)0x70ae92, (q31_t)0xf881c14b,
+    (q31_t)0x6f3726, (q31_t)0xf88e3c4d, (q31_t)0x6dc22e, (q31_t)0xf89ab799,
+    (q31_t)0x6c4fa8, (q31_t)0xf8a7332e, (q31_t)0x6adf97, (q31_t)0xf8b3af0c,
+    (q31_t)0x6971f9, (q31_t)0xf8c02b31, (q31_t)0x6806ce, (q31_t)0xf8cca79e,
+    (q31_t)0x669e18, (q31_t)0xf8d92452, (q31_t)0x6537d4, (q31_t)0xf8e5a14d,
+    (q31_t)0x63d405, (q31_t)0xf8f21e8e, (q31_t)0x6272aa, (q31_t)0xf8fe9c15,
+    (q31_t)0x6113c2, (q31_t)0xf90b19e0, (q31_t)0x5fb74e, (q31_t)0xf91797f0,
+    (q31_t)0x5e5d4e, (q31_t)0xf9241645, (q31_t)0x5d05c3, (q31_t)0xf93094dd,
+    (q31_t)0x5bb0ab, (q31_t)0xf93d13b8, (q31_t)0x5a5e07, (q31_t)0xf94992d7,
+    (q31_t)0x590dd8, (q31_t)0xf9561237, (q31_t)0x57c01d, (q31_t)0xf96291d9,
+    (q31_t)0x5674d6, (q31_t)0xf96f11bc, (q31_t)0x552c03, (q31_t)0xf97b91e1,
+    (q31_t)0x53e5a5, (q31_t)0xf9881245, (q31_t)0x52a1bb, (q31_t)0xf99492ea,
+    (q31_t)0x516045, (q31_t)0xf9a113cd, (q31_t)0x502145, (q31_t)0xf9ad94f0,
+    (q31_t)0x4ee4b8, (q31_t)0xf9ba1651, (q31_t)0x4daaa1, (q31_t)0xf9c697f0,
+    (q31_t)0x4c72fe, (q31_t)0xf9d319cc, (q31_t)0x4b3dcf, (q31_t)0xf9df9be6,
+    (q31_t)0x4a0b16, (q31_t)0xf9ec1e3b, (q31_t)0x48dad1, (q31_t)0xf9f8a0cd,
+    (q31_t)0x47ad01, (q31_t)0xfa05239a, (q31_t)0x4681a6, (q31_t)0xfa11a6a3,
+    (q31_t)0x4558c0, (q31_t)0xfa1e29e5, (q31_t)0x44324f, (q31_t)0xfa2aad62,
+    (q31_t)0x430e53, (q31_t)0xfa373119, (q31_t)0x41eccc, (q31_t)0xfa43b508,
+    (q31_t)0x40cdba, (q31_t)0xfa503930, (q31_t)0x3fb11d, (q31_t)0xfa5cbd91,
+    (q31_t)0x3e96f6, (q31_t)0xfa694229, (q31_t)0x3d7f44, (q31_t)0xfa75c6f8,
+    (q31_t)0x3c6a07, (q31_t)0xfa824bfd, (q31_t)0x3b573f, (q31_t)0xfa8ed139,
+    (q31_t)0x3a46ed, (q31_t)0xfa9b56ab, (q31_t)0x393910, (q31_t)0xfaa7dc52,
+    (q31_t)0x382da8, (q31_t)0xfab4622d, (q31_t)0x3724b6, (q31_t)0xfac0e83d,
+    (q31_t)0x361e3a, (q31_t)0xfacd6e81, (q31_t)0x351a33, (q31_t)0xfad9f4f8,
+    (q31_t)0x3418a2, (q31_t)0xfae67ba2, (q31_t)0x331986, (q31_t)0xfaf3027e,
+    (q31_t)0x321ce0, (q31_t)0xfaff898c, (q31_t)0x3122b0, (q31_t)0xfb0c10cb,
+    (q31_t)0x302af5, (q31_t)0xfb18983b, (q31_t)0x2f35b1, (q31_t)0xfb251fdc,
+    (q31_t)0x2e42e2, (q31_t)0xfb31a7ac, (q31_t)0x2d5289, (q31_t)0xfb3e2fac,
+    (q31_t)0x2c64a6, (q31_t)0xfb4ab7db, (q31_t)0x2b7939, (q31_t)0xfb574039,
+    (q31_t)0x2a9042, (q31_t)0xfb63c8c4, (q31_t)0x29a9c1, (q31_t)0xfb70517d,
+    (q31_t)0x28c5b6, (q31_t)0xfb7cda63, (q31_t)0x27e421, (q31_t)0xfb896375,
+    (q31_t)0x270502, (q31_t)0xfb95ecb4, (q31_t)0x262859, (q31_t)0xfba2761e,
+    (q31_t)0x254e27, (q31_t)0xfbaeffb3, (q31_t)0x24766a, (q31_t)0xfbbb8973,
+    (q31_t)0x23a124, (q31_t)0xfbc8135c, (q31_t)0x22ce54, (q31_t)0xfbd49d70,
+    (q31_t)0x21fdfb, (q31_t)0xfbe127ac, (q31_t)0x213018, (q31_t)0xfbedb212,
+    (q31_t)0x2064ab, (q31_t)0xfbfa3c9f, (q31_t)0x1f9bb5, (q31_t)0xfc06c754,
+    (q31_t)0x1ed535, (q31_t)0xfc135231, (q31_t)0x1e112b, (q31_t)0xfc1fdd34,
+    (q31_t)0x1d4f99, (q31_t)0xfc2c685d, (q31_t)0x1c907c, (q31_t)0xfc38f3ac,
+    (q31_t)0x1bd3d6, (q31_t)0xfc457f21, (q31_t)0x1b19a7, (q31_t)0xfc520aba,
+    (q31_t)0x1a61ee, (q31_t)0xfc5e9678, (q31_t)0x19acac, (q31_t)0xfc6b2259,
+    (q31_t)0x18f9e1, (q31_t)0xfc77ae5e, (q31_t)0x18498c, (q31_t)0xfc843a85,
+    (q31_t)0x179bae, (q31_t)0xfc90c6cf, (q31_t)0x16f047, (q31_t)0xfc9d533b,
+    (q31_t)0x164757, (q31_t)0xfca9dfc8, (q31_t)0x15a0dd, (q31_t)0xfcb66c77,
+    (q31_t)0x14fcda, (q31_t)0xfcc2f945, (q31_t)0x145b4e, (q31_t)0xfccf8634,
+    (q31_t)0x13bc39, (q31_t)0xfcdc1342, (q31_t)0x131f9b, (q31_t)0xfce8a06f,
+    (q31_t)0x128574, (q31_t)0xfcf52dbb, (q31_t)0x11edc3, (q31_t)0xfd01bb24,
+    (q31_t)0x11588a, (q31_t)0xfd0e48ab, (q31_t)0x10c5c7, (q31_t)0xfd1ad650,
+    (q31_t)0x10357c, (q31_t)0xfd276410, (q31_t)0xfa7a8, (q31_t)0xfd33f1ed,
+    (q31_t)0xf1c4a, (q31_t)0xfd407fe6, (q31_t)0xe9364, (q31_t)0xfd4d0df9,
+    (q31_t)0xe0cf5, (q31_t)0xfd599c28, (q31_t)0xd88fd, (q31_t)0xfd662a70,
+    (q31_t)0xd077c, (q31_t)0xfd72b8d2, (q31_t)0xc8872, (q31_t)0xfd7f474d,
+    (q31_t)0xc0be0, (q31_t)0xfd8bd5e1, (q31_t)0xb91c4, (q31_t)0xfd98648d,
+    (q31_t)0xb1a20, (q31_t)0xfda4f351, (q31_t)0xaa4f3, (q31_t)0xfdb1822c,
+    (q31_t)0xa323d, (q31_t)0xfdbe111e, (q31_t)0x9c1ff, (q31_t)0xfdcaa027,
+    (q31_t)0x95438, (q31_t)0xfdd72f45, (q31_t)0x8e8e8, (q31_t)0xfde3be78,
+    (q31_t)0x8800f, (q31_t)0xfdf04dc0, (q31_t)0x819ae, (q31_t)0xfdfcdd1d,
+    (q31_t)0x7b5c4, (q31_t)0xfe096c8d, (q31_t)0x75452, (q31_t)0xfe15fc11,
+    (q31_t)0x6f556, (q31_t)0xfe228ba7, (q31_t)0x698d3, (q31_t)0xfe2f1b50,
+    (q31_t)0x63ec6, (q31_t)0xfe3bab0b, (q31_t)0x5e731, (q31_t)0xfe483ad8,
+    (q31_t)0x59214, (q31_t)0xfe54cab5, (q31_t)0x53f6e, (q31_t)0xfe615aa3,
+    (q31_t)0x4ef3f, (q31_t)0xfe6deaa1, (q31_t)0x4a188, (q31_t)0xfe7a7aae,
+    (q31_t)0x45648, (q31_t)0xfe870aca, (q31_t)0x40d80, (q31_t)0xfe939af5,
+    (q31_t)0x3c72f, (q31_t)0xfea02b2e, (q31_t)0x38356, (q31_t)0xfeacbb74,
+    (q31_t)0x341f4, (q31_t)0xfeb94bc8, (q31_t)0x3030a, (q31_t)0xfec5dc28,
+    (q31_t)0x2c697, (q31_t)0xfed26c94, (q31_t)0x28c9c, (q31_t)0xfedefd0c,
+    (q31_t)0x25519, (q31_t)0xfeeb8d8f, (q31_t)0x2200d, (q31_t)0xfef81e1d,
+    (q31_t)0x1ed78, (q31_t)0xff04aeb5, (q31_t)0x1bd5c, (q31_t)0xff113f56,
+    (q31_t)0x18fb6, (q31_t)0xff1dd001, (q31_t)0x16489, (q31_t)0xff2a60b4,
+    (q31_t)0x13bd3, (q31_t)0xff36f170, (q31_t)0x11594, (q31_t)0xff438234,
+    (q31_t)0xf1ce, (q31_t)0xff5012fe, (q31_t)0xd07e, (q31_t)0xff5ca3d0,
+    (q31_t)0xb1a7, (q31_t)0xff6934a8, (q31_t)0x9547, (q31_t)0xff75c585,
+    (q31_t)0x7b5f, (q31_t)0xff825668, (q31_t)0x63ee, (q31_t)0xff8ee750,
+    (q31_t)0x4ef5, (q31_t)0xff9b783c, (q31_t)0x3c74, (q31_t)0xffa8092c,
+    (q31_t)0x2c6a, (q31_t)0xffb49a1f, (q31_t)0x1ed8, (q31_t)0xffc12b16,
+    (q31_t)0x13bd, (q31_t)0xffcdbc0f, (q31_t)0xb1a, (q31_t)0xffda4d09,
+    (q31_t)0x4ef, (q31_t)0xffe6de05, (q31_t)0x13c, (q31_t)0xfff36f02,
+    (q31_t)0x0, (q31_t)0x0, (q31_t)0x13c, (q31_t)0xc90fe,
+    (q31_t)0x4ef, (q31_t)0x1921fb, (q31_t)0xb1a, (q31_t)0x25b2f7,
+    (q31_t)0x13bd, (q31_t)0x3243f1, (q31_t)0x1ed8, (q31_t)0x3ed4ea,
+    (q31_t)0x2c6a, (q31_t)0x4b65e1, (q31_t)0x3c74, (q31_t)0x57f6d4,
+    (q31_t)0x4ef5, (q31_t)0x6487c4, (q31_t)0x63ee, (q31_t)0x7118b0,
+    (q31_t)0x7b5f, (q31_t)0x7da998, (q31_t)0x9547, (q31_t)0x8a3a7b,
+    (q31_t)0xb1a7, (q31_t)0x96cb58, (q31_t)0xd07e, (q31_t)0xa35c30,
+    (q31_t)0xf1ce, (q31_t)0xafed02, (q31_t)0x11594, (q31_t)0xbc7dcc,
+    (q31_t)0x13bd3, (q31_t)0xc90e90, (q31_t)0x16489, (q31_t)0xd59f4c,
+    (q31_t)0x18fb6, (q31_t)0xe22fff, (q31_t)0x1bd5c, (q31_t)0xeec0aa,
+    (q31_t)0x1ed78, (q31_t)0xfb514b, (q31_t)0x2200d, (q31_t)0x107e1e3,
+    (q31_t)0x25519, (q31_t)0x1147271, (q31_t)0x28c9c, (q31_t)0x12102f4,
+    (q31_t)0x2c697, (q31_t)0x12d936c, (q31_t)0x3030a, (q31_t)0x13a23d8,
+    (q31_t)0x341f4, (q31_t)0x146b438, (q31_t)0x38356, (q31_t)0x153448c,
+    (q31_t)0x3c72f, (q31_t)0x15fd4d2, (q31_t)0x40d80, (q31_t)0x16c650b,
+    (q31_t)0x45648, (q31_t)0x178f536, (q31_t)0x4a188, (q31_t)0x1858552,
+    (q31_t)0x4ef3f, (q31_t)0x192155f, (q31_t)0x53f6e, (q31_t)0x19ea55d,
+    (q31_t)0x59214, (q31_t)0x1ab354b, (q31_t)0x5e731, (q31_t)0x1b7c528,
+    (q31_t)0x63ec6, (q31_t)0x1c454f5, (q31_t)0x698d3, (q31_t)0x1d0e4b0,
+    (q31_t)0x6f556, (q31_t)0x1dd7459, (q31_t)0x75452, (q31_t)0x1ea03ef,
+    (q31_t)0x7b5c4, (q31_t)0x1f69373, (q31_t)0x819ae, (q31_t)0x20322e3,
+    (q31_t)0x8800f, (q31_t)0x20fb240, (q31_t)0x8e8e8, (q31_t)0x21c4188,
+    (q31_t)0x95438, (q31_t)0x228d0bb, (q31_t)0x9c1ff, (q31_t)0x2355fd9,
+    (q31_t)0xa323d, (q31_t)0x241eee2, (q31_t)0xaa4f3, (q31_t)0x24e7dd4,
+    (q31_t)0xb1a20, (q31_t)0x25b0caf, (q31_t)0xb91c4, (q31_t)0x2679b73,
+    (q31_t)0xc0be0, (q31_t)0x2742a1f, (q31_t)0xc8872, (q31_t)0x280b8b3,
+    (q31_t)0xd077c, (q31_t)0x28d472e, (q31_t)0xd88fd, (q31_t)0x299d590,
+    (q31_t)0xe0cf5, (q31_t)0x2a663d8, (q31_t)0xe9364, (q31_t)0x2b2f207,
+    (q31_t)0xf1c4a, (q31_t)0x2bf801a, (q31_t)0xfa7a8, (q31_t)0x2cc0e13,
+    (q31_t)0x10357c, (q31_t)0x2d89bf0, (q31_t)0x10c5c7, (q31_t)0x2e529b0,
+    (q31_t)0x11588a, (q31_t)0x2f1b755, (q31_t)0x11edc3, (q31_t)0x2fe44dc,
+    (q31_t)0x128574, (q31_t)0x30ad245, (q31_t)0x131f9b, (q31_t)0x3175f91,
+    (q31_t)0x13bc39, (q31_t)0x323ecbe, (q31_t)0x145b4e, (q31_t)0x33079cc,
+    (q31_t)0x14fcda, (q31_t)0x33d06bb, (q31_t)0x15a0dd, (q31_t)0x3499389,
+    (q31_t)0x164757, (q31_t)0x3562038, (q31_t)0x16f047, (q31_t)0x362acc5,
+    (q31_t)0x179bae, (q31_t)0x36f3931, (q31_t)0x18498c, (q31_t)0x37bc57b,
+    (q31_t)0x18f9e1, (q31_t)0x38851a2, (q31_t)0x19acac, (q31_t)0x394dda7,
+    (q31_t)0x1a61ee, (q31_t)0x3a16988, (q31_t)0x1b19a7, (q31_t)0x3adf546,
+    (q31_t)0x1bd3d6, (q31_t)0x3ba80df, (q31_t)0x1c907c, (q31_t)0x3c70c54,
+    (q31_t)0x1d4f99, (q31_t)0x3d397a3, (q31_t)0x1e112b, (q31_t)0x3e022cc,
+    (q31_t)0x1ed535, (q31_t)0x3ecadcf, (q31_t)0x1f9bb5, (q31_t)0x3f938ac,
+    (q31_t)0x2064ab, (q31_t)0x405c361, (q31_t)0x213018, (q31_t)0x4124dee,
+    (q31_t)0x21fdfb, (q31_t)0x41ed854, (q31_t)0x22ce54, (q31_t)0x42b6290,
+    (q31_t)0x23a124, (q31_t)0x437eca4, (q31_t)0x24766a, (q31_t)0x444768d,
+    (q31_t)0x254e27, (q31_t)0x451004d, (q31_t)0x262859, (q31_t)0x45d89e2,
+    (q31_t)0x270502, (q31_t)0x46a134c, (q31_t)0x27e421, (q31_t)0x4769c8b,
+    (q31_t)0x28c5b6, (q31_t)0x483259d, (q31_t)0x29a9c1, (q31_t)0x48fae83,
+    (q31_t)0x2a9042, (q31_t)0x49c373c, (q31_t)0x2b7939, (q31_t)0x4a8bfc7,
+    (q31_t)0x2c64a6, (q31_t)0x4b54825, (q31_t)0x2d5289, (q31_t)0x4c1d054,
+    (q31_t)0x2e42e2, (q31_t)0x4ce5854, (q31_t)0x2f35b1, (q31_t)0x4dae024,
+    (q31_t)0x302af5, (q31_t)0x4e767c5, (q31_t)0x3122b0, (q31_t)0x4f3ef35,
+    (q31_t)0x321ce0, (q31_t)0x5007674, (q31_t)0x331986, (q31_t)0x50cfd82,
+    (q31_t)0x3418a2, (q31_t)0x519845e, (q31_t)0x351a33, (q31_t)0x5260b08,
+    (q31_t)0x361e3a, (q31_t)0x532917f, (q31_t)0x3724b6, (q31_t)0x53f17c3,
+    (q31_t)0x382da8, (q31_t)0x54b9dd3, (q31_t)0x393910, (q31_t)0x55823ae,
+    (q31_t)0x3a46ed, (q31_t)0x564a955, (q31_t)0x3b573f, (q31_t)0x5712ec7,
+    (q31_t)0x3c6a07, (q31_t)0x57db403, (q31_t)0x3d7f44, (q31_t)0x58a3908,
+    (q31_t)0x3e96f6, (q31_t)0x596bdd7, (q31_t)0x3fb11d, (q31_t)0x5a3426f,
+    (q31_t)0x40cdba, (q31_t)0x5afc6d0, (q31_t)0x41eccc, (q31_t)0x5bc4af8,
+    (q31_t)0x430e53, (q31_t)0x5c8cee7, (q31_t)0x44324f, (q31_t)0x5d5529e,
+    (q31_t)0x4558c0, (q31_t)0x5e1d61b, (q31_t)0x4681a6, (q31_t)0x5ee595d,
+    (q31_t)0x47ad01, (q31_t)0x5fadc66, (q31_t)0x48dad1, (q31_t)0x6075f33,
+    (q31_t)0x4a0b16, (q31_t)0x613e1c5, (q31_t)0x4b3dcf, (q31_t)0x620641a,
+    (q31_t)0x4c72fe, (q31_t)0x62ce634, (q31_t)0x4daaa1, (q31_t)0x6396810,
+    (q31_t)0x4ee4b8, (q31_t)0x645e9af, (q31_t)0x502145, (q31_t)0x6526b10,
+    (q31_t)0x516045, (q31_t)0x65eec33, (q31_t)0x52a1bb, (q31_t)0x66b6d16,
+    (q31_t)0x53e5a5, (q31_t)0x677edbb, (q31_t)0x552c03, (q31_t)0x6846e1f,
+    (q31_t)0x5674d6, (q31_t)0x690ee44, (q31_t)0x57c01d, (q31_t)0x69d6e27,
+    (q31_t)0x590dd8, (q31_t)0x6a9edc9, (q31_t)0x5a5e07, (q31_t)0x6b66d29,
+    (q31_t)0x5bb0ab, (q31_t)0x6c2ec48, (q31_t)0x5d05c3, (q31_t)0x6cf6b23,
+    (q31_t)0x5e5d4e, (q31_t)0x6dbe9bb, (q31_t)0x5fb74e, (q31_t)0x6e86810,
+    (q31_t)0x6113c2, (q31_t)0x6f4e620, (q31_t)0x6272aa, (q31_t)0x70163eb,
+    (q31_t)0x63d405, (q31_t)0x70de172, (q31_t)0x6537d4, (q31_t)0x71a5eb3,
+    (q31_t)0x669e18, (q31_t)0x726dbae, (q31_t)0x6806ce, (q31_t)0x7335862,
+    (q31_t)0x6971f9, (q31_t)0x73fd4cf, (q31_t)0x6adf97, (q31_t)0x74c50f4,
+    (q31_t)0x6c4fa8, (q31_t)0x758ccd2, (q31_t)0x6dc22e, (q31_t)0x7654867,
+    (q31_t)0x6f3726, (q31_t)0x771c3b3, (q31_t)0x70ae92, (q31_t)0x77e3eb5,
+    (q31_t)0x722871, (q31_t)0x78ab96e, (q31_t)0x73a4c3, (q31_t)0x79733dc,
+    (q31_t)0x752389, (q31_t)0x7a3adff, (q31_t)0x76a4c2, (q31_t)0x7b027d7,
+    (q31_t)0x78286e, (q31_t)0x7bca163, (q31_t)0x79ae8c, (q31_t)0x7c91aa3,
+    (q31_t)0x7b371e, (q31_t)0x7d59396, (q31_t)0x7cc223, (q31_t)0x7e20c3b,
+    (q31_t)0x7e4f9b, (q31_t)0x7ee8493, (q31_t)0x7fdf85, (q31_t)0x7fafc9c,
+    (q31_t)0x8171e2, (q31_t)0x8077457, (q31_t)0x8306b2, (q31_t)0x813ebc2,
+    (q31_t)0x849df4, (q31_t)0x82062de, (q31_t)0x8637a9, (q31_t)0x82cd9a9,
+    (q31_t)0x87d3d0, (q31_t)0x8395024, (q31_t)0x89726a, (q31_t)0x845c64d,
+    (q31_t)0x8b1376, (q31_t)0x8523c25, (q31_t)0x8cb6f5, (q31_t)0x85eb1ab,
+    (q31_t)0x8e5ce5, (q31_t)0x86b26de, (q31_t)0x900548, (q31_t)0x8779bbe,
+    (q31_t)0x91b01d, (q31_t)0x884104b, (q31_t)0x935d64, (q31_t)0x8908483,
+    (q31_t)0x950d1d, (q31_t)0x89cf867, (q31_t)0x96bf48, (q31_t)0x8a96bf6,
+    (q31_t)0x9873e4, (q31_t)0x8b5df30, (q31_t)0x9a2af3, (q31_t)0x8c25213,
+    (q31_t)0x9be473, (q31_t)0x8cec4a0, (q31_t)0x9da065, (q31_t)0x8db36d6,
+    (q31_t)0x9f5ec8, (q31_t)0x8e7a8b5, (q31_t)0xa11f9d, (q31_t)0x8f41a3c,
+    (q31_t)0xa2e2e3, (q31_t)0x9008b6a, (q31_t)0xa4a89b, (q31_t)0x90cfc40,
+    (q31_t)0xa670c4, (q31_t)0x9196cbc, (q31_t)0xa83b5e, (q31_t)0x925dcdf,
+    (q31_t)0xaa086a, (q31_t)0x9324ca7, (q31_t)0xabd7e6, (q31_t)0x93ebc14,
+    (q31_t)0xada9d4, (q31_t)0x94b2b27, (q31_t)0xaf7e33, (q31_t)0x95799dd,
+    (q31_t)0xb15502, (q31_t)0x9640837, (q31_t)0xb32e42, (q31_t)0x9707635,
+    (q31_t)0xb509f3, (q31_t)0x97ce3d5, (q31_t)0xb6e815, (q31_t)0x9895118,
+    (q31_t)0xb8c8a7, (q31_t)0x995bdfd, (q31_t)0xbaabaa, (q31_t)0x9a22a83,
+    (q31_t)0xbc911d, (q31_t)0x9ae96aa, (q31_t)0xbe7901, (q31_t)0x9bb0271,
+    (q31_t)0xc06355, (q31_t)0x9c76dd8, (q31_t)0xc25019, (q31_t)0x9d3d8df,
+    (q31_t)0xc43f4d, (q31_t)0x9e04385, (q31_t)0xc630f2, (q31_t)0x9ecadc9,
+    (q31_t)0xc82506, (q31_t)0x9f917ac, (q31_t)0xca1b8a, (q31_t)0xa05812c,
+    (q31_t)0xcc147f, (q31_t)0xa11ea49, (q31_t)0xce0fe3, (q31_t)0xa1e5303,
+    (q31_t)0xd00db6, (q31_t)0xa2abb59, (q31_t)0xd20dfa, (q31_t)0xa37234a,
+    (q31_t)0xd410ad, (q31_t)0xa438ad7, (q31_t)0xd615cf, (q31_t)0xa4ff1fe,
+    (q31_t)0xd81d61, (q31_t)0xa5c58c0, (q31_t)0xda2762, (q31_t)0xa68bf1b,
+    (q31_t)0xdc33d2, (q31_t)0xa752510, (q31_t)0xde42b2, (q31_t)0xa818a9d,
+    (q31_t)0xe05401, (q31_t)0xa8defc3, (q31_t)0xe267be, (q31_t)0xa9a5480,
+    (q31_t)0xe47deb, (q31_t)0xaa6b8d5, (q31_t)0xe69686, (q31_t)0xab31cc1,
+    (q31_t)0xe8b190, (q31_t)0xabf8043, (q31_t)0xeacf09, (q31_t)0xacbe35b,
+    (q31_t)0xeceef1, (q31_t)0xad84609, (q31_t)0xef1147, (q31_t)0xae4a84b,
+    (q31_t)0xf1360b, (q31_t)0xaf10a22, (q31_t)0xf35d3e, (q31_t)0xafd6b8d,
+    (q31_t)0xf586df, (q31_t)0xb09cc8c, (q31_t)0xf7b2ee, (q31_t)0xb162d1d,
+    (q31_t)0xf9e16b, (q31_t)0xb228d42, (q31_t)0xfc1257, (q31_t)0xb2eecf8,
+    (q31_t)0xfe45b0, (q31_t)0xb3b4c40, (q31_t)0x1007b77, (q31_t)0xb47ab19,
+    (q31_t)0x102b3ac, (q31_t)0xb540982, (q31_t)0x104ee4f, (q31_t)0xb60677c,
+    (q31_t)0x1072b5f, (q31_t)0xb6cc506, (q31_t)0x1096add, (q31_t)0xb79221f,
+    (q31_t)0x10bacc8, (q31_t)0xb857ec7, (q31_t)0x10df120, (q31_t)0xb91dafc,
+    (q31_t)0x11037e6, (q31_t)0xb9e36c0, (q31_t)0x1128119, (q31_t)0xbaa9211,
+    (q31_t)0x114ccb9, (q31_t)0xbb6ecef, (q31_t)0x1171ac6, (q31_t)0xbc34759,
+    (q31_t)0x1196b3f, (q31_t)0xbcfa150, (q31_t)0x11bbe26, (q31_t)0xbdbfad1,
+    (q31_t)0x11e1379, (q31_t)0xbe853de, (q31_t)0x1206b39, (q31_t)0xbf4ac75,
+    (q31_t)0x122c566, (q31_t)0xc010496, (q31_t)0x12521ff, (q31_t)0xc0d5c41,
+    (q31_t)0x1278104, (q31_t)0xc19b374, (q31_t)0x129e276, (q31_t)0xc260a31,
+    (q31_t)0x12c4653, (q31_t)0xc326075, (q31_t)0x12eac9d, (q31_t)0xc3eb641,
+    (q31_t)0x1311553, (q31_t)0xc4b0b94, (q31_t)0x1338075, (q31_t)0xc57606e,
+    (q31_t)0x135ee02, (q31_t)0xc63b4ce, (q31_t)0x1385dfb, (q31_t)0xc7008b3,
+    (q31_t)0x13ad060, (q31_t)0xc7c5c1e, (q31_t)0x13d4530, (q31_t)0xc88af0e,
+    (q31_t)0x13fbc6c, (q31_t)0xc950182, (q31_t)0x1423613, (q31_t)0xca1537a,
+    (q31_t)0x144b225, (q31_t)0xcada4f5, (q31_t)0x14730a3, (q31_t)0xcb9f5f3,
+    (q31_t)0x149b18b, (q31_t)0xcc64673, (q31_t)0x14c34df, (q31_t)0xcd29676,
+    (q31_t)0x14eba9d, (q31_t)0xcdee5f9, (q31_t)0x15142c6, (q31_t)0xceb34fe,
+    (q31_t)0x153cd5a, (q31_t)0xcf78383, (q31_t)0x1565a58, (q31_t)0xd03d189,
+    (q31_t)0x158e9c1, (q31_t)0xd101f0e, (q31_t)0x15b7b94, (q31_t)0xd1c6c11,
+    (q31_t)0x15e0fd1, (q31_t)0xd28b894, (q31_t)0x160a678, (q31_t)0xd350495,
+    (q31_t)0x1633f8a, (q31_t)0xd415013, (q31_t)0x165db05, (q31_t)0xd4d9b0e,
+    (q31_t)0x16878eb, (q31_t)0xd59e586, (q31_t)0x16b193a, (q31_t)0xd662f7b,
+    (q31_t)0x16dbbf3, (q31_t)0xd7278eb, (q31_t)0x1706115, (q31_t)0xd7ec1d6,
+    (q31_t)0x17308a1, (q31_t)0xd8b0a3d, (q31_t)0x175b296, (q31_t)0xd97521d,
+    (q31_t)0x1785ef4, (q31_t)0xda39978, (q31_t)0x17b0dbb, (q31_t)0xdafe04b,
+    (q31_t)0x17dbeec, (q31_t)0xdbc2698, (q31_t)0x1807285, (q31_t)0xdc86c5d,
+    (q31_t)0x1832888, (q31_t)0xdd4b19a, (q31_t)0x185e0f3, (q31_t)0xde0f64f,
+    (q31_t)0x1889bc6, (q31_t)0xded3a7b, (q31_t)0x18b5903, (q31_t)0xdf97e1d,
+    (q31_t)0x18e18a7, (q31_t)0xe05c135, (q31_t)0x190dab4, (q31_t)0xe1203c3,
+    (q31_t)0x1939f29, (q31_t)0xe1e45c6, (q31_t)0x1966606, (q31_t)0xe2a873e,
+    (q31_t)0x1992f4c, (q31_t)0xe36c82a, (q31_t)0x19bfaf9, (q31_t)0xe430889,
+    (q31_t)0x19ec90d, (q31_t)0xe4f485c, (q31_t)0x1a1998a, (q31_t)0xe5b87a2,
+    (q31_t)0x1a46c6e, (q31_t)0xe67c65a, (q31_t)0x1a741b9, (q31_t)0xe740483,
+    (q31_t)0x1aa196c, (q31_t)0xe80421e, (q31_t)0x1acf386, (q31_t)0xe8c7f2a,
+    (q31_t)0x1afd007, (q31_t)0xe98bba7, (q31_t)0x1b2aef0, (q31_t)0xea4f793,
+    (q31_t)0x1b5903f, (q31_t)0xeb132ef, (q31_t)0x1b873f5, (q31_t)0xebd6db9,
+    (q31_t)0x1bb5a11, (q31_t)0xec9a7f3, (q31_t)0x1be4294, (q31_t)0xed5e19a,
+    (q31_t)0x1c12d7e, (q31_t)0xee21aaf, (q31_t)0x1c41ace, (q31_t)0xeee5331,
+    (q31_t)0x1c70a84, (q31_t)0xefa8b20, (q31_t)0x1c9fca0, (q31_t)0xf06c27a,
+    (q31_t)0x1ccf122, (q31_t)0xf12f941, (q31_t)0x1cfe80a, (q31_t)0xf1f2f73,
+    (q31_t)0x1d2e158, (q31_t)0xf2b650f, (q31_t)0x1d5dd0c, (q31_t)0xf379a16,
+    (q31_t)0x1d8db25, (q31_t)0xf43ce86, (q31_t)0x1dbdba3, (q31_t)0xf500260,
+    (q31_t)0x1dede87, (q31_t)0xf5c35a3, (q31_t)0x1e1e3d0, (q31_t)0xf68684e,
+    (q31_t)0x1e4eb7e, (q31_t)0xf749a61, (q31_t)0x1e7f591, (q31_t)0xf80cbdc,
+    (q31_t)0x1eb0209, (q31_t)0xf8cfcbe, (q31_t)0x1ee10e5, (q31_t)0xf992d06,
+    (q31_t)0x1f12227, (q31_t)0xfa55cb4, (q31_t)0x1f435cc, (q31_t)0xfb18bc8,
+    (q31_t)0x1f74bd6, (q31_t)0xfbdba40, (q31_t)0x1fa6445, (q31_t)0xfc9e81e,
+    (q31_t)0x1fd7f17, (q31_t)0xfd6155f, (q31_t)0x2009c4e, (q31_t)0xfe24205,
+    (q31_t)0x203bbe8, (q31_t)0xfee6e0d, (q31_t)0x206dde6, (q31_t)0xffa9979,
+    (q31_t)0x20a0248, (q31_t)0x1006c446, (q31_t)0x20d290d, (q31_t)0x1012ee76,
+    (q31_t)0x2105236, (q31_t)0x101f1807, (q31_t)0x2137dc2, (q31_t)0x102b40f8,
+    (q31_t)0x216abb1, (q31_t)0x1037694b, (q31_t)0x219dc03, (q31_t)0x104390fd,
+    (q31_t)0x21d0eb8, (q31_t)0x104fb80e, (q31_t)0x22043d0, (q31_t)0x105bde7f,
+    (q31_t)0x2237b4b, (q31_t)0x1068044e, (q31_t)0x226b528, (q31_t)0x1074297b,
+    (q31_t)0x229f167, (q31_t)0x10804e06, (q31_t)0x22d3009, (q31_t)0x108c71ee,
+    (q31_t)0x230710d, (q31_t)0x10989532, (q31_t)0x233b473, (q31_t)0x10a4b7d3,
+    (q31_t)0x236fa3b, (q31_t)0x10b0d9d0, (q31_t)0x23a4265, (q31_t)0x10bcfb28,
+    (q31_t)0x23d8cf1, (q31_t)0x10c91bda, (q31_t)0x240d9de, (q31_t)0x10d53be7,
+    (q31_t)0x244292c, (q31_t)0x10e15b4e, (q31_t)0x2477adc, (q31_t)0x10ed7a0e,
+    (q31_t)0x24aceed, (q31_t)0x10f99827, (q31_t)0x24e255e, (q31_t)0x1105b599,
+    (q31_t)0x2517e31, (q31_t)0x1111d263, (q31_t)0x254d965, (q31_t)0x111dee84,
+    (q31_t)0x25836f9, (q31_t)0x112a09fc, (q31_t)0x25b96ee, (q31_t)0x113624cb,
+    (q31_t)0x25ef943, (q31_t)0x11423ef0, (q31_t)0x2625df8, (q31_t)0x114e586a,
+    (q31_t)0x265c50e, (q31_t)0x115a713a, (q31_t)0x2692e83, (q31_t)0x1166895f,
+    (q31_t)0x26c9a58, (q31_t)0x1172a0d7, (q31_t)0x270088e, (q31_t)0x117eb7a4,
+    (q31_t)0x2737922, (q31_t)0x118acdc4, (q31_t)0x276ec16, (q31_t)0x1196e337,
+    (q31_t)0x27a616a, (q31_t)0x11a2f7fc, (q31_t)0x27dd91c, (q31_t)0x11af0c13,
+    (q31_t)0x281532e, (q31_t)0x11bb1f7c, (q31_t)0x284cf9f, (q31_t)0x11c73235,
+    (q31_t)0x2884e6e, (q31_t)0x11d3443f, (q31_t)0x28bcf9c, (q31_t)0x11df5599,
+    (q31_t)0x28f5329, (q31_t)0x11eb6643, (q31_t)0x292d914, (q31_t)0x11f7763c,
+    (q31_t)0x296615d, (q31_t)0x12038584, (q31_t)0x299ec05, (q31_t)0x120f941a,
+    (q31_t)0x29d790a, (q31_t)0x121ba1fd, (q31_t)0x2a1086d, (q31_t)0x1227af2e,
+    (q31_t)0x2a49a2e, (q31_t)0x1233bbac, (q31_t)0x2a82e4d, (q31_t)0x123fc776,
+    (q31_t)0x2abc4c9, (q31_t)0x124bd28c, (q31_t)0x2af5da2, (q31_t)0x1257dced,
+    (q31_t)0x2b2f8d8, (q31_t)0x1263e699, (q31_t)0x2b6966c, (q31_t)0x126fef90,
+    (q31_t)0x2ba365c, (q31_t)0x127bf7d1, (q31_t)0x2bdd8a9, (q31_t)0x1287ff5b,
+    (q31_t)0x2c17d52, (q31_t)0x1294062f, (q31_t)0x2c52459, (q31_t)0x12a00c4b,
+    (q31_t)0x2c8cdbb, (q31_t)0x12ac11af, (q31_t)0x2cc7979, (q31_t)0x12b8165b,
+    (q31_t)0x2d02794, (q31_t)0x12c41a4f, (q31_t)0x2d3d80a, (q31_t)0x12d01d89,
+    (q31_t)0x2d78add, (q31_t)0x12dc2009, (q31_t)0x2db400a, (q31_t)0x12e821cf,
+    (q31_t)0x2def794, (q31_t)0x12f422db, (q31_t)0x2e2b178, (q31_t)0x1300232c,
+    (q31_t)0x2e66db8, (q31_t)0x130c22c1, (q31_t)0x2ea2c53, (q31_t)0x1318219a,
+    (q31_t)0x2eded49, (q31_t)0x13241fb6, (q31_t)0x2f1b099, (q31_t)0x13301d16,
+    (q31_t)0x2f57644, (q31_t)0x133c19b8, (q31_t)0x2f93e4a, (q31_t)0x1348159d,
+    (q31_t)0x2fd08a9, (q31_t)0x135410c3, (q31_t)0x300d563, (q31_t)0x13600b2a,
+    (q31_t)0x304a477, (q31_t)0x136c04d2, (q31_t)0x30875e5, (q31_t)0x1377fdbb,
+    (q31_t)0x30c49ad, (q31_t)0x1383f5e3, (q31_t)0x3101fce, (q31_t)0x138fed4b,
+    (q31_t)0x313f848, (q31_t)0x139be3f2, (q31_t)0x317d31c, (q31_t)0x13a7d9d7,
+    (q31_t)0x31bb049, (q31_t)0x13b3cefa, (q31_t)0x31f8fcf, (q31_t)0x13bfc35b,
+    (q31_t)0x32371ae, (q31_t)0x13cbb6f8, (q31_t)0x32755e5, (q31_t)0x13d7a9d3,
+    (q31_t)0x32b3c75, (q31_t)0x13e39be9, (q31_t)0x32f255e, (q31_t)0x13ef8d3c,
+    (q31_t)0x333109e, (q31_t)0x13fb7dc9, (q31_t)0x336fe37, (q31_t)0x14076d91,
+    (q31_t)0x33aee27, (q31_t)0x14135c94, (q31_t)0x33ee070, (q31_t)0x141f4ad1,
+    (q31_t)0x342d510, (q31_t)0x142b3846, (q31_t)0x346cc07, (q31_t)0x143724f5,
+    (q31_t)0x34ac556, (q31_t)0x144310dd, (q31_t)0x34ec0fc, (q31_t)0x144efbfc,
+    (q31_t)0x352bef9, (q31_t)0x145ae653, (q31_t)0x356bf4d, (q31_t)0x1466cfe1,
+    (q31_t)0x35ac1f7, (q31_t)0x1472b8a5, (q31_t)0x35ec6f8, (q31_t)0x147ea0a0,
+    (q31_t)0x362ce50, (q31_t)0x148a87d1, (q31_t)0x366d7fd, (q31_t)0x14966e36,
+    (q31_t)0x36ae401, (q31_t)0x14a253d1, (q31_t)0x36ef25b, (q31_t)0x14ae38a0,
+    (q31_t)0x373030a, (q31_t)0x14ba1ca3, (q31_t)0x377160f, (q31_t)0x14c5ffd9,
+    (q31_t)0x37b2b6a, (q31_t)0x14d1e242, (q31_t)0x37f4319, (q31_t)0x14ddc3de,
+    (q31_t)0x3835d1e, (q31_t)0x14e9a4ac, (q31_t)0x3877978, (q31_t)0x14f584ac,
+    (q31_t)0x38b9827, (q31_t)0x150163dc, (q31_t)0x38fb92a, (q31_t)0x150d423d,
+    (q31_t)0x393dc82, (q31_t)0x15191fcf, (q31_t)0x398022f, (q31_t)0x1524fc90,
+    (q31_t)0x39c2a2f, (q31_t)0x1530d881, (q31_t)0x3a05484, (q31_t)0x153cb3a0,
+    (q31_t)0x3a4812c, (q31_t)0x15488dee, (q31_t)0x3a8b028, (q31_t)0x1554676a,
+    (q31_t)0x3ace178, (q31_t)0x15604013, (q31_t)0x3b1151b, (q31_t)0x156c17e9,
+    (q31_t)0x3b54b11, (q31_t)0x1577eeec, (q31_t)0x3b9835a, (q31_t)0x1583c51b,
+    (q31_t)0x3bdbdf6, (q31_t)0x158f9a76, (q31_t)0x3c1fae5, (q31_t)0x159b6efb,
+    (q31_t)0x3c63a26, (q31_t)0x15a742ac, (q31_t)0x3ca7bba, (q31_t)0x15b31587,
+    (q31_t)0x3cebfa0, (q31_t)0x15bee78c, (q31_t)0x3d305d8, (q31_t)0x15cab8ba,
+    (q31_t)0x3d74e62, (q31_t)0x15d68911, (q31_t)0x3db993e, (q31_t)0x15e25890,
+    (q31_t)0x3dfe66c, (q31_t)0x15ee2738, (q31_t)0x3e435ea, (q31_t)0x15f9f507,
+    (q31_t)0x3e887bb, (q31_t)0x1605c1fd, (q31_t)0x3ecdbdc, (q31_t)0x16118e1a,
+    (q31_t)0x3f1324e, (q31_t)0x161d595d, (q31_t)0x3f58b10, (q31_t)0x162923c5,
+    (q31_t)0x3f9e624, (q31_t)0x1634ed53, (q31_t)0x3fe4388, (q31_t)0x1640b606,
+    (q31_t)0x402a33c, (q31_t)0x164c7ddd, (q31_t)0x4070540, (q31_t)0x165844d8,
+    (q31_t)0x40b6994, (q31_t)0x16640af7, (q31_t)0x40fd037, (q31_t)0x166fd039,
+    (q31_t)0x414392b, (q31_t)0x167b949d, (q31_t)0x418a46d, (q31_t)0x16875823,
+    (q31_t)0x41d11ff, (q31_t)0x16931acb, (q31_t)0x42181e0, (q31_t)0x169edc94,
+    (q31_t)0x425f410, (q31_t)0x16aa9d7e, (q31_t)0x42a688f, (q31_t)0x16b65d88,
+    (q31_t)0x42edf5c, (q31_t)0x16c21cb2, (q31_t)0x4335877, (q31_t)0x16cddafb,
+    (q31_t)0x437d3e1, (q31_t)0x16d99864, (q31_t)0x43c5199, (q31_t)0x16e554ea,
+    (q31_t)0x440d19e, (q31_t)0x16f1108f, (q31_t)0x44553f2, (q31_t)0x16fccb51,
+    (q31_t)0x449d892, (q31_t)0x17088531, (q31_t)0x44e5f80, (q31_t)0x17143e2d,
+    (q31_t)0x452e8bc, (q31_t)0x171ff646, (q31_t)0x4577444, (q31_t)0x172bad7a,
+    (q31_t)0x45c0219, (q31_t)0x173763c9, (q31_t)0x460923b, (q31_t)0x17431933,
+    (q31_t)0x46524a9, (q31_t)0x174ecdb8, (q31_t)0x469b963, (q31_t)0x175a8157,
+    (q31_t)0x46e5069, (q31_t)0x1766340f, (q31_t)0x472e9bc, (q31_t)0x1771e5e0,
+    (q31_t)0x477855a, (q31_t)0x177d96ca, (q31_t)0x47c2344, (q31_t)0x178946cc,
+    (q31_t)0x480c379, (q31_t)0x1794f5e6, (q31_t)0x48565f9, (q31_t)0x17a0a417,
+    (q31_t)0x48a0ac4, (q31_t)0x17ac515f, (q31_t)0x48eb1db, (q31_t)0x17b7fdbd,
+    (q31_t)0x4935b3c, (q31_t)0x17c3a931, (q31_t)0x49806e7, (q31_t)0x17cf53bb,
+    (q31_t)0x49cb4dd, (q31_t)0x17dafd59, (q31_t)0x4a1651c, (q31_t)0x17e6a60c,
+    (q31_t)0x4a617a6, (q31_t)0x17f24dd3, (q31_t)0x4aacc7a, (q31_t)0x17fdf4ae,
+    (q31_t)0x4af8397, (q31_t)0x18099a9c, (q31_t)0x4b43cfd, (q31_t)0x18153f9d,
+    (q31_t)0x4b8f8ad, (q31_t)0x1820e3b0, (q31_t)0x4bdb6a6, (q31_t)0x182c86d5,
+    (q31_t)0x4c276e8, (q31_t)0x1838290c, (q31_t)0x4c73972, (q31_t)0x1843ca53,
+    (q31_t)0x4cbfe45, (q31_t)0x184f6aab, (q31_t)0x4d0c560, (q31_t)0x185b0a13,
+    (q31_t)0x4d58ec3, (q31_t)0x1866a88a, (q31_t)0x4da5a6f, (q31_t)0x18724611,
+    (q31_t)0x4df2862, (q31_t)0x187de2a7, (q31_t)0x4e3f89c, (q31_t)0x18897e4a,
+    (q31_t)0x4e8cb1e, (q31_t)0x189518fc, (q31_t)0x4ed9fe7, (q31_t)0x18a0b2bb,
+    (q31_t)0x4f276f7, (q31_t)0x18ac4b87, (q31_t)0x4f7504e, (q31_t)0x18b7e35f,
+    (q31_t)0x4fc2bec, (q31_t)0x18c37a44, (q31_t)0x50109d0, (q31_t)0x18cf1034,
+    (q31_t)0x505e9fb, (q31_t)0x18daa52f, (q31_t)0x50acc6b, (q31_t)0x18e63935,
+    (q31_t)0x50fb121, (q31_t)0x18f1cc45, (q31_t)0x514981d, (q31_t)0x18fd5e5f,
+    (q31_t)0x519815f, (q31_t)0x1908ef82, (q31_t)0x51e6ce6, (q31_t)0x19147fae,
+    (q31_t)0x5235ab2, (q31_t)0x19200ee3, (q31_t)0x5284ac3, (q31_t)0x192b9d1f,
+    (q31_t)0x52d3d18, (q31_t)0x19372a64, (q31_t)0x53231b3, (q31_t)0x1942b6af,
+    (q31_t)0x5372891, (q31_t)0x194e4201, (q31_t)0x53c21b4, (q31_t)0x1959cc5a,
+    (q31_t)0x5411d1b, (q31_t)0x196555b8, (q31_t)0x5461ac6, (q31_t)0x1970de1b,
+    (q31_t)0x54b1ab4, (q31_t)0x197c6584, (q31_t)0x5501ce5, (q31_t)0x1987ebf0,
+    (q31_t)0x555215a, (q31_t)0x19937161, (q31_t)0x55a2812, (q31_t)0x199ef5d6,
+    (q31_t)0x55f310d, (q31_t)0x19aa794d, (q31_t)0x5643c4a, (q31_t)0x19b5fbc8,
+    (q31_t)0x56949ca, (q31_t)0x19c17d44, (q31_t)0x56e598c, (q31_t)0x19ccfdc2,
+    (q31_t)0x5736b90, (q31_t)0x19d87d42, (q31_t)0x5787fd6, (q31_t)0x19e3fbc3,
+    (q31_t)0x57d965d, (q31_t)0x19ef7944, (q31_t)0x582af26, (q31_t)0x19faf5c5,
+    (q31_t)0x587ca31, (q31_t)0x1a067145, (q31_t)0x58ce77c, (q31_t)0x1a11ebc5,
+    (q31_t)0x5920708, (q31_t)0x1a1d6544, (q31_t)0x59728d5, (q31_t)0x1a28ddc0,
+    (q31_t)0x59c4ce3, (q31_t)0x1a34553b, (q31_t)0x5a17330, (q31_t)0x1a3fcbb3,
+    (q31_t)0x5a69bbe, (q31_t)0x1a4b4128, (q31_t)0x5abc68c, (q31_t)0x1a56b599,
+    (q31_t)0x5b0f399, (q31_t)0x1a622907, (q31_t)0x5b622e6, (q31_t)0x1a6d9b70,
+    (q31_t)0x5bb5472, (q31_t)0x1a790cd4, (q31_t)0x5c0883d, (q31_t)0x1a847d33,
+    (q31_t)0x5c5be47, (q31_t)0x1a8fec8c, (q31_t)0x5caf690, (q31_t)0x1a9b5adf,
+    (q31_t)0x5d03118, (q31_t)0x1aa6c82b, (q31_t)0x5d56ddd, (q31_t)0x1ab23471,
+    (q31_t)0x5daace1, (q31_t)0x1abd9faf, (q31_t)0x5dfee22, (q31_t)0x1ac909e5,
+    (q31_t)0x5e531a1, (q31_t)0x1ad47312, (q31_t)0x5ea775e, (q31_t)0x1adfdb37,
+    (q31_t)0x5efbf58, (q31_t)0x1aeb4253, (q31_t)0x5f5098f, (q31_t)0x1af6a865,
+    (q31_t)0x5fa5603, (q31_t)0x1b020d6c, (q31_t)0x5ffa4b3, (q31_t)0x1b0d716a,
+    (q31_t)0x604f5a0, (q31_t)0x1b18d45c, (q31_t)0x60a48c9, (q31_t)0x1b243643,
+    (q31_t)0x60f9e2e, (q31_t)0x1b2f971e, (q31_t)0x614f5cf, (q31_t)0x1b3af6ec,
+    (q31_t)0x61a4fac, (q31_t)0x1b4655ae, (q31_t)0x61fabc4, (q31_t)0x1b51b363,
+    (q31_t)0x6250a18, (q31_t)0x1b5d100a, (q31_t)0x62a6aa6, (q31_t)0x1b686ba3,
+    (q31_t)0x62fcd6f, (q31_t)0x1b73c62d, (q31_t)0x6353273, (q31_t)0x1b7f1fa9,
+    (q31_t)0x63a99b1, (q31_t)0x1b8a7815, (q31_t)0x6400329, (q31_t)0x1b95cf71,
+    (q31_t)0x6456edb, (q31_t)0x1ba125bd, (q31_t)0x64adcc7, (q31_t)0x1bac7af9,
+    (q31_t)0x6504ced, (q31_t)0x1bb7cf23, (q31_t)0x655bf4c, (q31_t)0x1bc3223c,
+    (q31_t)0x65b33e4, (q31_t)0x1bce7442, (q31_t)0x660aab5, (q31_t)0x1bd9c537,
+    (q31_t)0x66623be, (q31_t)0x1be51518, (q31_t)0x66b9f01, (q31_t)0x1bf063e6,
+    (q31_t)0x6711c7b, (q31_t)0x1bfbb1a0, (q31_t)0x6769c2e, (q31_t)0x1c06fe46,
+    (q31_t)0x67c1e18, (q31_t)0x1c1249d8, (q31_t)0x681a23a, (q31_t)0x1c1d9454,
+    (q31_t)0x6872894, (q31_t)0x1c28ddbb, (q31_t)0x68cb124, (q31_t)0x1c34260c,
+    (q31_t)0x6923bec, (q31_t)0x1c3f6d47, (q31_t)0x697c8eb, (q31_t)0x1c4ab36b,
+    (q31_t)0x69d5820, (q31_t)0x1c55f878, (q31_t)0x6a2e98b, (q31_t)0x1c613c6d,
+    (q31_t)0x6a87d2d, (q31_t)0x1c6c7f4a, (q31_t)0x6ae1304, (q31_t)0x1c77c10e,
+    (q31_t)0x6b3ab12, (q31_t)0x1c8301b9, (q31_t)0x6b94554, (q31_t)0x1c8e414b,
+    (q31_t)0x6bee1cd, (q31_t)0x1c997fc4, (q31_t)0x6c4807a, (q31_t)0x1ca4bd21,
+    (q31_t)0x6ca215c, (q31_t)0x1caff965, (q31_t)0x6cfc472, (q31_t)0x1cbb348d,
+    (q31_t)0x6d569be, (q31_t)0x1cc66e99, (q31_t)0x6db113d, (q31_t)0x1cd1a78a,
+    (q31_t)0x6e0baf0, (q31_t)0x1cdcdf5e, (q31_t)0x6e666d7, (q31_t)0x1ce81615,
+    (q31_t)0x6ec14f2, (q31_t)0x1cf34baf, (q31_t)0x6f1c540, (q31_t)0x1cfe802b,
+    (q31_t)0x6f777c1, (q31_t)0x1d09b389, (q31_t)0x6fd2c75, (q31_t)0x1d14e5c9,
+    (q31_t)0x702e35c, (q31_t)0x1d2016e9, (q31_t)0x7089c75, (q31_t)0x1d2b46ea,
+    (q31_t)0x70e57c0, (q31_t)0x1d3675cb, (q31_t)0x714153e, (q31_t)0x1d41a38c,
+    (q31_t)0x719d4ed, (q31_t)0x1d4cd02c, (q31_t)0x71f96ce, (q31_t)0x1d57fbaa,
+    (q31_t)0x7255ae0, (q31_t)0x1d632608, (q31_t)0x72b2123, (q31_t)0x1d6e4f43,
+    (q31_t)0x730e997, (q31_t)0x1d79775c, (q31_t)0x736b43c, (q31_t)0x1d849e51,
+    (q31_t)0x73c8111, (q31_t)0x1d8fc424, (q31_t)0x7425016, (q31_t)0x1d9ae8d2,
+    (q31_t)0x748214c, (q31_t)0x1da60c5d, (q31_t)0x74df4b1, (q31_t)0x1db12ec3,
+    (q31_t)0x753ca46, (q31_t)0x1dbc5004, (q31_t)0x759a20a, (q31_t)0x1dc7701f,
+    (q31_t)0x75f7bfe, (q31_t)0x1dd28f15, (q31_t)0x7655820, (q31_t)0x1dddace4,
+    (q31_t)0x76b3671, (q31_t)0x1de8c98c, (q31_t)0x77116f0, (q31_t)0x1df3e50d,
+    (q31_t)0x776f99d, (q31_t)0x1dfeff67, (q31_t)0x77cde79, (q31_t)0x1e0a1898,
+    (q31_t)0x782c582, (q31_t)0x1e1530a1, (q31_t)0x788aeb9, (q31_t)0x1e204781,
+    (q31_t)0x78e9a1d, (q31_t)0x1e2b5d38, (q31_t)0x79487ae, (q31_t)0x1e3671c5,
+    (q31_t)0x79a776c, (q31_t)0x1e418528, (q31_t)0x7a06957, (q31_t)0x1e4c9760,
+    (q31_t)0x7a65d6e, (q31_t)0x1e57a86d, (q31_t)0x7ac53b1, (q31_t)0x1e62b84f,
+    (q31_t)0x7b24c20, (q31_t)0x1e6dc705, (q31_t)0x7b846ba, (q31_t)0x1e78d48e,
+    (q31_t)0x7be4381, (q31_t)0x1e83e0eb, (q31_t)0x7c44272, (q31_t)0x1e8eec1b,
+    (q31_t)0x7ca438f, (q31_t)0x1e99f61d, (q31_t)0x7d046d6, (q31_t)0x1ea4fef0,
+    (q31_t)0x7d64c47, (q31_t)0x1eb00696, (q31_t)0x7dc53e3, (q31_t)0x1ebb0d0d,
+    (q31_t)0x7e25daa, (q31_t)0x1ec61254, (q31_t)0x7e8699a, (q31_t)0x1ed1166b,
+    (q31_t)0x7ee77b3, (q31_t)0x1edc1953, (q31_t)0x7f487f6, (q31_t)0x1ee71b0a,
+    (q31_t)0x7fa9a62, (q31_t)0x1ef21b90, (q31_t)0x800aef7, (q31_t)0x1efd1ae4,
+    (q31_t)0x806c5b5, (q31_t)0x1f081907, (q31_t)0x80cde9b, (q31_t)0x1f1315f7,
+    (q31_t)0x812f9a9, (q31_t)0x1f1e11b5, (q31_t)0x81916df, (q31_t)0x1f290c3f,
+    (q31_t)0x81f363d, (q31_t)0x1f340596, (q31_t)0x82557c3, (q31_t)0x1f3efdb9,
+    (q31_t)0x82b7b70, (q31_t)0x1f49f4a8, (q31_t)0x831a143, (q31_t)0x1f54ea62,
+    (q31_t)0x837c93e, (q31_t)0x1f5fdee6, (q31_t)0x83df35f, (q31_t)0x1f6ad235,
+    (q31_t)0x8441fa6, (q31_t)0x1f75c44e, (q31_t)0x84a4e14, (q31_t)0x1f80b531,
+    (q31_t)0x8507ea7, (q31_t)0x1f8ba4dc, (q31_t)0x856b160, (q31_t)0x1f969350,
+    (q31_t)0x85ce63e, (q31_t)0x1fa1808c, (q31_t)0x8631d42, (q31_t)0x1fac6c91,
+    (q31_t)0x869566a, (q31_t)0x1fb7575c, (q31_t)0x86f91b7, (q31_t)0x1fc240ef,
+    (q31_t)0x875cf28, (q31_t)0x1fcd2948, (q31_t)0x87c0ebd, (q31_t)0x1fd81067,
+    (q31_t)0x8825077, (q31_t)0x1fe2f64c, (q31_t)0x8889454, (q31_t)0x1feddaf6,
+    (q31_t)0x88eda54, (q31_t)0x1ff8be65, (q31_t)0x8952278, (q31_t)0x2003a099,
+    (q31_t)0x89b6cbf, (q31_t)0x200e8190, (q31_t)0x8a1b928, (q31_t)0x2019614c,
+    (q31_t)0x8a807b4, (q31_t)0x20243fca, (q31_t)0x8ae5862, (q31_t)0x202f1d0b,
+    (q31_t)0x8b4ab32, (q31_t)0x2039f90f, (q31_t)0x8bb0023, (q31_t)0x2044d3d4,
+    (q31_t)0x8c15736, (q31_t)0x204fad5b, (q31_t)0x8c7b06b, (q31_t)0x205a85a3,
+    (q31_t)0x8ce0bc0, (q31_t)0x20655cac, (q31_t)0x8d46936, (q31_t)0x20703275,
+    (q31_t)0x8dac8cd, (q31_t)0x207b06fe, (q31_t)0x8e12a84, (q31_t)0x2085da46,
+    (q31_t)0x8e78e5b, (q31_t)0x2090ac4d, (q31_t)0x8edf452, (q31_t)0x209b7d13,
+    (q31_t)0x8f45c68, (q31_t)0x20a64c97, (q31_t)0x8fac69e, (q31_t)0x20b11ad9,
+    (q31_t)0x90132f2, (q31_t)0x20bbe7d8, (q31_t)0x907a166, (q31_t)0x20c6b395,
+    (q31_t)0x90e11f7, (q31_t)0x20d17e0d, (q31_t)0x91484a8, (q31_t)0x20dc4742,
+    (q31_t)0x91af976, (q31_t)0x20e70f32, (q31_t)0x9217062, (q31_t)0x20f1d5de,
+    (q31_t)0x927e96b, (q31_t)0x20fc9b44, (q31_t)0x92e6492, (q31_t)0x21075f65,
+    (q31_t)0x934e1d6, (q31_t)0x21122240, (q31_t)0x93b6137, (q31_t)0x211ce3d5,
+    (q31_t)0x941e2b4, (q31_t)0x2127a423, (q31_t)0x948664d, (q31_t)0x21326329,
+    (q31_t)0x94eec03, (q31_t)0x213d20e8, (q31_t)0x95573d4, (q31_t)0x2147dd5f,
+    (q31_t)0x95bfdc1, (q31_t)0x2152988d, (q31_t)0x96289c9, (q31_t)0x215d5273,
+    (q31_t)0x96917ec, (q31_t)0x21680b0f, (q31_t)0x96fa82a, (q31_t)0x2172c262,
+    (q31_t)0x9763a83, (q31_t)0x217d786a, (q31_t)0x97ccef5, (q31_t)0x21882d28,
+    (q31_t)0x9836582, (q31_t)0x2192e09b, (q31_t)0x989fe29, (q31_t)0x219d92c2,
+    (q31_t)0x99098e9, (q31_t)0x21a8439e, (q31_t)0x99735c2, (q31_t)0x21b2f32e,
+    (q31_t)0x99dd4b4, (q31_t)0x21bda171, (q31_t)0x9a475bf, (q31_t)0x21c84e67,
+    (q31_t)0x9ab18e3, (q31_t)0x21d2fa0f, (q31_t)0x9b1be1e, (q31_t)0x21dda46a,
+    (q31_t)0x9b86572, (q31_t)0x21e84d76, (q31_t)0x9bf0edd, (q31_t)0x21f2f534,
+    (q31_t)0x9c5ba60, (q31_t)0x21fd9ba3, (q31_t)0x9cc67fa, (q31_t)0x220840c2,
+    (q31_t)0x9d317ab, (q31_t)0x2212e492, (q31_t)0x9d9c973, (q31_t)0x221d8711,
+    (q31_t)0x9e07d51, (q31_t)0x2228283f, (q31_t)0x9e73346, (q31_t)0x2232c81c,
+    (q31_t)0x9edeb50, (q31_t)0x223d66a8, (q31_t)0x9f4a570, (q31_t)0x224803e2,
+    (q31_t)0x9fb61a5, (q31_t)0x22529fca, (q31_t)0xa021fef, (q31_t)0x225d3a5e,
+    (q31_t)0xa08e04f, (q31_t)0x2267d3a0, (q31_t)0xa0fa2c3, (q31_t)0x22726b8e,
+    (q31_t)0xa16674b, (q31_t)0x227d0228, (q31_t)0xa1d2de7, (q31_t)0x2287976e,
+    (q31_t)0xa23f698, (q31_t)0x22922b5e, (q31_t)0xa2ac15b, (q31_t)0x229cbdfa,
+    (q31_t)0xa318e32, (q31_t)0x22a74f40, (q31_t)0xa385d1d, (q31_t)0x22b1df30,
+    (q31_t)0xa3f2e19, (q31_t)0x22bc6dca, (q31_t)0xa460129, (q31_t)0x22c6fb0c,
+    (q31_t)0xa4cd64b, (q31_t)0x22d186f8, (q31_t)0xa53ad7e, (q31_t)0x22dc118c,
+    (q31_t)0xa5a86c4, (q31_t)0x22e69ac8, (q31_t)0xa61621b, (q31_t)0x22f122ab,
+    (q31_t)0xa683f83, (q31_t)0x22fba936, (q31_t)0xa6f1efc, (q31_t)0x23062e67,
+    (q31_t)0xa760086, (q31_t)0x2310b23e, (q31_t)0xa7ce420, (q31_t)0x231b34bc,
+    (q31_t)0xa83c9ca, (q31_t)0x2325b5df, (q31_t)0xa8ab184, (q31_t)0x233035a7,
+    (q31_t)0xa919b4e, (q31_t)0x233ab414, (q31_t)0xa988727, (q31_t)0x23453125,
+    (q31_t)0xa9f750f, (q31_t)0x234facda, (q31_t)0xaa66506, (q31_t)0x235a2733,
+    (q31_t)0xaad570c, (q31_t)0x2364a02e, (q31_t)0xab44b1f, (q31_t)0x236f17cc,
+    (q31_t)0xabb4141, (q31_t)0x23798e0d, (q31_t)0xac23971, (q31_t)0x238402ef,
+    (q31_t)0xac933ae, (q31_t)0x238e7673, (q31_t)0xad02ff8, (q31_t)0x2398e898,
+    (q31_t)0xad72e4f, (q31_t)0x23a3595e, (q31_t)0xade2eb3, (q31_t)0x23adc8c4,
+    (q31_t)0xae53123, (q31_t)0x23b836ca, (q31_t)0xaec35a0, (q31_t)0x23c2a36f,
+    (q31_t)0xaf33c28, (q31_t)0x23cd0eb3, (q31_t)0xafa44bc, (q31_t)0x23d77896,
+    (q31_t)0xb014f5b, (q31_t)0x23e1e117, (q31_t)0xb085c05, (q31_t)0x23ec4837,
+    (q31_t)0xb0f6aba, (q31_t)0x23f6adf3, (q31_t)0xb167b79, (q31_t)0x2401124d,
+    (q31_t)0xb1d8e43, (q31_t)0x240b7543, (q31_t)0xb24a316, (q31_t)0x2415d6d5,
+    (q31_t)0xb2bb9f4, (q31_t)0x24203704, (q31_t)0xb32d2da, (q31_t)0x242a95ce,
+    (q31_t)0xb39edca, (q31_t)0x2434f332, (q31_t)0xb410ac3, (q31_t)0x243f4f32,
+    (q31_t)0xb4829c4, (q31_t)0x2449a9cc, (q31_t)0xb4f4acd, (q31_t)0x245402ff,
+    (q31_t)0xb566ddf, (q31_t)0x245e5acc, (q31_t)0xb5d92f8, (q31_t)0x2468b132,
+    (q31_t)0xb64ba19, (q31_t)0x24730631, (q31_t)0xb6be341, (q31_t)0x247d59c8,
+    (q31_t)0xb730e70, (q31_t)0x2487abf7, (q31_t)0xb7a3ba5, (q31_t)0x2491fcbe,
+    (q31_t)0xb816ae1, (q31_t)0x249c4c1b, (q31_t)0xb889c23, (q31_t)0x24a69a0f,
+    (q31_t)0xb8fcf6b, (q31_t)0x24b0e699, (q31_t)0xb9704b9, (q31_t)0x24bb31ba,
+    (q31_t)0xb9e3c0b, (q31_t)0x24c57b6f, (q31_t)0xba57563, (q31_t)0x24cfc3ba,
+    (q31_t)0xbacb0bf, (q31_t)0x24da0a9a, (q31_t)0xbb3ee20, (q31_t)0x24e4500e,
+    (q31_t)0xbbb2d85, (q31_t)0x24ee9415, (q31_t)0xbc26eee, (q31_t)0x24f8d6b0,
+    (q31_t)0xbc9b25a, (q31_t)0x250317df, (q31_t)0xbd0f7ca, (q31_t)0x250d57a0,
+    (q31_t)0xbd83f3d, (q31_t)0x251795f3, (q31_t)0xbdf88b3, (q31_t)0x2521d2d8,
+    (q31_t)0xbe6d42b, (q31_t)0x252c0e4f, (q31_t)0xbee21a5, (q31_t)0x25364857,
+    (q31_t)0xbf57121, (q31_t)0x254080ef, (q31_t)0xbfcc29f, (q31_t)0x254ab818,
+    (q31_t)0xc04161e, (q31_t)0x2554edd1, (q31_t)0xc0b6b9e, (q31_t)0x255f2219,
+    (q31_t)0xc12c31f, (q31_t)0x256954f1, (q31_t)0xc1a1ca0, (q31_t)0x25738657,
+    (q31_t)0xc217822, (q31_t)0x257db64c, (q31_t)0xc28d5a3, (q31_t)0x2587e4cf,
+    (q31_t)0xc303524, (q31_t)0x259211df, (q31_t)0xc3796a5, (q31_t)0x259c3d7c,
+    (q31_t)0xc3efa25, (q31_t)0x25a667a7, (q31_t)0xc465fa3, (q31_t)0x25b0905d,
+    (q31_t)0xc4dc720, (q31_t)0x25bab7a0, (q31_t)0xc55309b, (q31_t)0x25c4dd6e,
+    (q31_t)0xc5c9c14, (q31_t)0x25cf01c8, (q31_t)0xc64098b, (q31_t)0x25d924ac,
+    (q31_t)0xc6b78ff, (q31_t)0x25e3461b, (q31_t)0xc72ea70, (q31_t)0x25ed6614,
+    (q31_t)0xc7a5dde, (q31_t)0x25f78497, (q31_t)0xc81d349, (q31_t)0x2601a1a2,
+    (q31_t)0xc894aaf, (q31_t)0x260bbd37, (q31_t)0xc90c412, (q31_t)0x2615d754,
+    (q31_t)0xc983f70, (q31_t)0x261feffa, (q31_t)0xc9fbcca, (q31_t)0x262a0727,
+    (q31_t)0xca73c1e, (q31_t)0x26341cdb, (q31_t)0xcaebd6e, (q31_t)0x263e3117,
+    (q31_t)0xcb640b8, (q31_t)0x264843d9, (q31_t)0xcbdc5fc, (q31_t)0x26525521,
+    (q31_t)0xcc54d3a, (q31_t)0x265c64ef, (q31_t)0xcccd671, (q31_t)0x26667342,
+    (q31_t)0xcd461a2, (q31_t)0x2670801a, (q31_t)0xcdbeecc, (q31_t)0x267a8b77,
+    (q31_t)0xce37def, (q31_t)0x26849558, (q31_t)0xceb0f0a, (q31_t)0x268e9dbd,
+    (q31_t)0xcf2a21d, (q31_t)0x2698a4a6, (q31_t)0xcfa3729, (q31_t)0x26a2aa11,
+    (q31_t)0xd01ce2b, (q31_t)0x26acadff, (q31_t)0xd096725, (q31_t)0x26b6b070,
+    (q31_t)0xd110216, (q31_t)0x26c0b162, (q31_t)0xd189efe, (q31_t)0x26cab0d6,
+    (q31_t)0xd203ddc, (q31_t)0x26d4aecb, (q31_t)0xd27deb0, (q31_t)0x26deab41,
+    (q31_t)0xd2f817b, (q31_t)0x26e8a637, (q31_t)0xd37263a, (q31_t)0x26f29fad,
+    (q31_t)0xd3eccef, (q31_t)0x26fc97a3, (q31_t)0xd467599, (q31_t)0x27068e18,
+    (q31_t)0xd4e2037, (q31_t)0x2710830c, (q31_t)0xd55ccca, (q31_t)0x271a767e,
+    (q31_t)0xd5d7b50, (q31_t)0x2724686e, (q31_t)0xd652bcb, (q31_t)0x272e58dc,
+    (q31_t)0xd6cde39, (q31_t)0x273847c8, (q31_t)0xd74929a, (q31_t)0x27423530,
+    (q31_t)0xd7c48ee, (q31_t)0x274c2115, (q31_t)0xd840134, (q31_t)0x27560b76,
+    (q31_t)0xd8bbb6d, (q31_t)0x275ff452, (q31_t)0xd937798, (q31_t)0x2769dbaa,
+    (q31_t)0xd9b35b4, (q31_t)0x2773c17d, (q31_t)0xda2f5c2, (q31_t)0x277da5cb,
+    (q31_t)0xdaab7c0, (q31_t)0x27878893, (q31_t)0xdb27bb0, (q31_t)0x279169d5,
+    (q31_t)0xdba4190, (q31_t)0x279b4990, (q31_t)0xdc20960, (q31_t)0x27a527c4,
+    (q31_t)0xdc9d320, (q31_t)0x27af0472, (q31_t)0xdd19ed0, (q31_t)0x27b8df97,
+    (q31_t)0xdd96c6f, (q31_t)0x27c2b934, (q31_t)0xde13bfd, (q31_t)0x27cc9149,
+    (q31_t)0xde90d79, (q31_t)0x27d667d5, (q31_t)0xdf0e0e4, (q31_t)0x27e03cd8,
+    (q31_t)0xdf8b63d, (q31_t)0x27ea1052, (q31_t)0xe008d84, (q31_t)0x27f3e241,
+    (q31_t)0xe0866b8, (q31_t)0x27fdb2a7, (q31_t)0xe1041d9, (q31_t)0x28078181,
+    (q31_t)0xe181ee8, (q31_t)0x28114ed0, (q31_t)0xe1ffde2, (q31_t)0x281b1a94,
+    (q31_t)0xe27dec9, (q31_t)0x2824e4cc, (q31_t)0xe2fc19c, (q31_t)0x282ead78,
+    (q31_t)0xe37a65b, (q31_t)0x28387498, (q31_t)0xe3f8d05, (q31_t)0x28423a2a,
+    (q31_t)0xe47759a, (q31_t)0x284bfe2f, (q31_t)0xe4f6019, (q31_t)0x2855c0a6,
+    (q31_t)0xe574c84, (q31_t)0x285f8190, (q31_t)0xe5f3ad8, (q31_t)0x286940ea,
+    (q31_t)0xe672b16, (q31_t)0x2872feb6, (q31_t)0xe6f1d3d, (q31_t)0x287cbaf3,
+    (q31_t)0xe77114e, (q31_t)0x288675a0, (q31_t)0xe7f0748, (q31_t)0x28902ebd,
+    (q31_t)0xe86ff2a, (q31_t)0x2899e64a, (q31_t)0xe8ef8f4, (q31_t)0x28a39c46,
+    (q31_t)0xe96f4a7, (q31_t)0x28ad50b1, (q31_t)0xe9ef241, (q31_t)0x28b7038b,
+    (q31_t)0xea6f1c2, (q31_t)0x28c0b4d2, (q31_t)0xeaef32b, (q31_t)0x28ca6488,
+    (q31_t)0xeb6f67a, (q31_t)0x28d412ab, (q31_t)0xebefbb0, (q31_t)0x28ddbf3b,
+    (q31_t)0xec702cb, (q31_t)0x28e76a37, (q31_t)0xecf0bcd, (q31_t)0x28f113a0,
+    (q31_t)0xed716b4, (q31_t)0x28fabb75, (q31_t)0xedf2380, (q31_t)0x290461b5,
+    (q31_t)0xee73231, (q31_t)0x290e0661, (q31_t)0xeef42c7, (q31_t)0x2917a977,
+    (q31_t)0xef75541, (q31_t)0x29214af8, (q31_t)0xeff699f, (q31_t)0x292aeae3,
+    (q31_t)0xf077fe1, (q31_t)0x29348937, (q31_t)0xf0f9805, (q31_t)0x293e25f5,
+    (q31_t)0xf17b20d, (q31_t)0x2947c11c, (q31_t)0xf1fcdf8, (q31_t)0x29515aab,
+    (q31_t)0xf27ebc5, (q31_t)0x295af2a3, (q31_t)0xf300b74, (q31_t)0x29648902,
+    (q31_t)0xf382d05, (q31_t)0x296e1dc9, (q31_t)0xf405077, (q31_t)0x2977b0f7,
+    (q31_t)0xf4875ca, (q31_t)0x2981428c, (q31_t)0xf509cfe, (q31_t)0x298ad287,
+    (q31_t)0xf58c613, (q31_t)0x299460e8, (q31_t)0xf60f108, (q31_t)0x299dedaf,
+    (q31_t)0xf691ddd, (q31_t)0x29a778db, (q31_t)0xf714c91, (q31_t)0x29b1026c,
+    (q31_t)0xf797d24, (q31_t)0x29ba8a61, (q31_t)0xf81af97, (q31_t)0x29c410ba,
+    (q31_t)0xf89e3e8, (q31_t)0x29cd9578, (q31_t)0xf921a17, (q31_t)0x29d71899,
+    (q31_t)0xf9a5225, (q31_t)0x29e09a1c, (q31_t)0xfa28c10, (q31_t)0x29ea1a03,
+    (q31_t)0xfaac7d8, (q31_t)0x29f3984c, (q31_t)0xfb3057d, (q31_t)0x29fd14f6,
+    (q31_t)0xfbb4500, (q31_t)0x2a069003, (q31_t)0xfc3865e, (q31_t)0x2a100970,
+    (q31_t)0xfcbc999, (q31_t)0x2a19813f, (q31_t)0xfd40eaf, (q31_t)0x2a22f76e,
+    (q31_t)0xfdc55a1, (q31_t)0x2a2c6bfd, (q31_t)0xfe49e6d, (q31_t)0x2a35deeb,
+    (q31_t)0xfece915, (q31_t)0x2a3f503a, (q31_t)0xff53597, (q31_t)0x2a48bfe7,
+    (q31_t)0xffd83f4, (q31_t)0x2a522df3, (q31_t)0x1005d42a, (q31_t)0x2a5b9a5d,
+    (q31_t)0x100e2639, (q31_t)0x2a650525, (q31_t)0x10167a22, (q31_t)0x2a6e6e4b,
+    (q31_t)0x101ecfe4, (q31_t)0x2a77d5ce, (q31_t)0x1027277e, (q31_t)0x2a813bae,
+    (q31_t)0x102f80f1, (q31_t)0x2a8a9fea, (q31_t)0x1037dc3b, (q31_t)0x2a940283,
+    (q31_t)0x1040395d, (q31_t)0x2a9d6377, (q31_t)0x10489856, (q31_t)0x2aa6c2c6,
+    (q31_t)0x1050f926, (q31_t)0x2ab02071, (q31_t)0x10595bcd, (q31_t)0x2ab97c77,
+    (q31_t)0x1061c04a, (q31_t)0x2ac2d6d6, (q31_t)0x106a269d, (q31_t)0x2acc2f90,
+    (q31_t)0x10728ec6, (q31_t)0x2ad586a3, (q31_t)0x107af8c4, (q31_t)0x2adedc10,
+    (q31_t)0x10836497, (q31_t)0x2ae82fd5, (q31_t)0x108bd23f, (q31_t)0x2af181f3,
+    (q31_t)0x109441bb, (q31_t)0x2afad269, (q31_t)0x109cb30b, (q31_t)0x2b042137,
+    (q31_t)0x10a5262f, (q31_t)0x2b0d6e5c, (q31_t)0x10ad9b26, (q31_t)0x2b16b9d9,
+    (q31_t)0x10b611f1, (q31_t)0x2b2003ac, (q31_t)0x10be8a8d, (q31_t)0x2b294bd5,
+    (q31_t)0x10c704fd, (q31_t)0x2b329255, (q31_t)0x10cf813e, (q31_t)0x2b3bd72a,
+    (q31_t)0x10d7ff51, (q31_t)0x2b451a55, (q31_t)0x10e07f36, (q31_t)0x2b4e5bd4,
+    (q31_t)0x10e900ec, (q31_t)0x2b579ba8, (q31_t)0x10f18472, (q31_t)0x2b60d9d0,
+    (q31_t)0x10fa09c9, (q31_t)0x2b6a164d, (q31_t)0x110290f0, (q31_t)0x2b73511c,
+    (q31_t)0x110b19e7, (q31_t)0x2b7c8a3f, (q31_t)0x1113a4ad, (q31_t)0x2b85c1b5,
+    (q31_t)0x111c3142, (q31_t)0x2b8ef77d, (q31_t)0x1124bfa6, (q31_t)0x2b982b97,
+    (q31_t)0x112d4fd9, (q31_t)0x2ba15e03, (q31_t)0x1135e1d9, (q31_t)0x2baa8ec0,
+    (q31_t)0x113e75a8, (q31_t)0x2bb3bdce, (q31_t)0x11470b44, (q31_t)0x2bbceb2d,
+    (q31_t)0x114fa2ad, (q31_t)0x2bc616dd, (q31_t)0x11583be2, (q31_t)0x2bcf40dc,
+    (q31_t)0x1160d6e5, (q31_t)0x2bd8692b, (q31_t)0x116973b3, (q31_t)0x2be18fc9,
+    (q31_t)0x1172124d, (q31_t)0x2beab4b6, (q31_t)0x117ab2b3, (q31_t)0x2bf3d7f2,
+    (q31_t)0x118354e4, (q31_t)0x2bfcf97c, (q31_t)0x118bf8e0, (q31_t)0x2c061953,
+    (q31_t)0x11949ea6, (q31_t)0x2c0f3779, (q31_t)0x119d4636, (q31_t)0x2c1853eb,
+    (q31_t)0x11a5ef90, (q31_t)0x2c216eaa, (q31_t)0x11ae9ab4, (q31_t)0x2c2a87b6,
+    (q31_t)0x11b747a0, (q31_t)0x2c339f0e, (q31_t)0x11bff656, (q31_t)0x2c3cb4b1,
+    (q31_t)0x11c8a6d4, (q31_t)0x2c45c8a0, (q31_t)0x11d1591a, (q31_t)0x2c4edada,
+    (q31_t)0x11da0d28, (q31_t)0x2c57eb5e, (q31_t)0x11e2c2fd, (q31_t)0x2c60fa2d,
+    (q31_t)0x11eb7a9a, (q31_t)0x2c6a0746, (q31_t)0x11f433fd, (q31_t)0x2c7312a9,
+    (q31_t)0x11fcef27, (q31_t)0x2c7c1c55, (q31_t)0x1205ac17, (q31_t)0x2c85244a,
+    (q31_t)0x120e6acc, (q31_t)0x2c8e2a87, (q31_t)0x12172b48, (q31_t)0x2c972f0d,
+    (q31_t)0x121fed88, (q31_t)0x2ca031da, (q31_t)0x1228b18d, (q31_t)0x2ca932ef,
+    (q31_t)0x12317756, (q31_t)0x2cb2324c, (q31_t)0x123a3ee4, (q31_t)0x2cbb2fef,
+    (q31_t)0x12430835, (q31_t)0x2cc42bd9, (q31_t)0x124bd34a, (q31_t)0x2ccd2609,
+    (q31_t)0x1254a021, (q31_t)0x2cd61e7f, (q31_t)0x125d6ebc, (q31_t)0x2cdf153a,
+    (q31_t)0x12663f19, (q31_t)0x2ce80a3a, (q31_t)0x126f1138, (q31_t)0x2cf0fd80,
+    (q31_t)0x1277e518, (q31_t)0x2cf9ef09, (q31_t)0x1280babb, (q31_t)0x2d02ded7,
+    (q31_t)0x1289921e, (q31_t)0x2d0bcce8, (q31_t)0x12926b41, (q31_t)0x2d14b93d,
+    (q31_t)0x129b4626, (q31_t)0x2d1da3d5, (q31_t)0x12a422ca, (q31_t)0x2d268cb0,
+    (q31_t)0x12ad012e, (q31_t)0x2d2f73cd, (q31_t)0x12b5e151, (q31_t)0x2d38592c,
+    (q31_t)0x12bec333, (q31_t)0x2d413ccd, (q31_t)0x12c7a6d4, (q31_t)0x2d4a1eaf,
+    (q31_t)0x12d08c33, (q31_t)0x2d52fed2, (q31_t)0x12d97350, (q31_t)0x2d5bdd36,
+    (q31_t)0x12e25c2b, (q31_t)0x2d64b9da, (q31_t)0x12eb46c3, (q31_t)0x2d6d94bf,
+    (q31_t)0x12f43318, (q31_t)0x2d766de2, (q31_t)0x12fd2129, (q31_t)0x2d7f4545,
+    (q31_t)0x130610f7, (q31_t)0x2d881ae8, (q31_t)0x130f0280, (q31_t)0x2d90eec8,
+    (q31_t)0x1317f5c6, (q31_t)0x2d99c0e7, (q31_t)0x1320eac6, (q31_t)0x2da29144,
+    (q31_t)0x1329e181, (q31_t)0x2dab5fdf, (q31_t)0x1332d9f7, (q31_t)0x2db42cb6,
+    (q31_t)0x133bd427, (q31_t)0x2dbcf7cb, (q31_t)0x1344d011, (q31_t)0x2dc5c11c,
+    (q31_t)0x134dcdb4, (q31_t)0x2dce88aa, (q31_t)0x1356cd11, (q31_t)0x2dd74e73,
+    (q31_t)0x135fce26, (q31_t)0x2de01278, (q31_t)0x1368d0f3, (q31_t)0x2de8d4b8,
+    (q31_t)0x1371d579, (q31_t)0x2df19534, (q31_t)0x137adbb6, (q31_t)0x2dfa53e9,
+    (q31_t)0x1383e3ab, (q31_t)0x2e0310d9, (q31_t)0x138ced57, (q31_t)0x2e0bcc03,
+    (q31_t)0x1395f8ba, (q31_t)0x2e148566, (q31_t)0x139f05d3, (q31_t)0x2e1d3d03,
+    (q31_t)0x13a814a2, (q31_t)0x2e25f2d8, (q31_t)0x13b12526, (q31_t)0x2e2ea6e6,
+    (q31_t)0x13ba3760, (q31_t)0x2e37592c, (q31_t)0x13c34b4f, (q31_t)0x2e4009aa,
+    (q31_t)0x13cc60f2, (q31_t)0x2e48b860, (q31_t)0x13d5784a, (q31_t)0x2e51654c,
+    (q31_t)0x13de9156, (q31_t)0x2e5a1070, (q31_t)0x13e7ac15, (q31_t)0x2e62b9ca,
+    (q31_t)0x13f0c887, (q31_t)0x2e6b615a, (q31_t)0x13f9e6ad, (q31_t)0x2e740720,
+    (q31_t)0x14030684, (q31_t)0x2e7cab1c, (q31_t)0x140c280e, (q31_t)0x2e854d4d,
+    (q31_t)0x14154b4a, (q31_t)0x2e8dedb3, (q31_t)0x141e7037, (q31_t)0x2e968c4d,
+    (q31_t)0x142796d5, (q31_t)0x2e9f291b, (q31_t)0x1430bf24, (q31_t)0x2ea7c41e,
+    (q31_t)0x1439e923, (q31_t)0x2eb05d53, (q31_t)0x144314d3, (q31_t)0x2eb8f4bc,
+    (q31_t)0x144c4232, (q31_t)0x2ec18a58, (q31_t)0x14557140, (q31_t)0x2eca1e27,
+    (q31_t)0x145ea1fd, (q31_t)0x2ed2b027, (q31_t)0x1467d469, (q31_t)0x2edb405a,
+    (q31_t)0x14710883, (q31_t)0x2ee3cebe, (q31_t)0x147a3e4b, (q31_t)0x2eec5b53,
+    (q31_t)0x148375c1, (q31_t)0x2ef4e619, (q31_t)0x148caee4, (q31_t)0x2efd6f10,
+    (q31_t)0x1495e9b3, (q31_t)0x2f05f637, (q31_t)0x149f2630, (q31_t)0x2f0e7b8e,
+    (q31_t)0x14a86458, (q31_t)0x2f16ff14, (q31_t)0x14b1a42c, (q31_t)0x2f1f80ca,
+    (q31_t)0x14bae5ab, (q31_t)0x2f2800af, (q31_t)0x14c428d6, (q31_t)0x2f307ec2,
+    (q31_t)0x14cd6dab, (q31_t)0x2f38fb03, (q31_t)0x14d6b42b, (q31_t)0x2f417573,
+    (q31_t)0x14dffc54, (q31_t)0x2f49ee0f, (q31_t)0x14e94627, (q31_t)0x2f5264da,
+    (q31_t)0x14f291a4, (q31_t)0x2f5ad9d1, (q31_t)0x14fbdec9, (q31_t)0x2f634cf5,
+    (q31_t)0x15052d97, (q31_t)0x2f6bbe45, (q31_t)0x150e7e0d, (q31_t)0x2f742dc1,
+    (q31_t)0x1517d02b, (q31_t)0x2f7c9b69, (q31_t)0x152123f0, (q31_t)0x2f85073c,
+    (q31_t)0x152a795d, (q31_t)0x2f8d713a, (q31_t)0x1533d070, (q31_t)0x2f95d963,
+    (q31_t)0x153d292a, (q31_t)0x2f9e3fb6, (q31_t)0x15468389, (q31_t)0x2fa6a433,
+    (q31_t)0x154fdf8f, (q31_t)0x2faf06da, (q31_t)0x15593d3a, (q31_t)0x2fb767aa,
+    (q31_t)0x15629c89, (q31_t)0x2fbfc6a3, (q31_t)0x156bfd7d, (q31_t)0x2fc823c5,
+    (q31_t)0x15756016, (q31_t)0x2fd07f0f, (q31_t)0x157ec452, (q31_t)0x2fd8d882,
+    (q31_t)0x15882a32, (q31_t)0x2fe1301c, (q31_t)0x159191b5, (q31_t)0x2fe985de,
+    (q31_t)0x159afadb, (q31_t)0x2ff1d9c7, (q31_t)0x15a465a3, (q31_t)0x2ffa2bd6,
+    (q31_t)0x15add20d, (q31_t)0x30027c0c, (q31_t)0x15b74019, (q31_t)0x300aca69,
+    (q31_t)0x15c0afc6, (q31_t)0x301316eb, (q31_t)0x15ca2115, (q31_t)0x301b6193,
+    (q31_t)0x15d39403, (q31_t)0x3023aa5f, (q31_t)0x15dd0892, (q31_t)0x302bf151,
+    (q31_t)0x15e67ec1, (q31_t)0x30343667, (q31_t)0x15eff690, (q31_t)0x303c79a2,
+    (q31_t)0x15f96ffd, (q31_t)0x3044bb00, (q31_t)0x1602eb0a, (q31_t)0x304cfa83,
+    (q31_t)0x160c67b4, (q31_t)0x30553828, (q31_t)0x1615e5fd, (q31_t)0x305d73f0,
+    (q31_t)0x161f65e4, (q31_t)0x3065addb, (q31_t)0x1628e767, (q31_t)0x306de5e9,
+    (q31_t)0x16326a88, (q31_t)0x30761c18, (q31_t)0x163bef46, (q31_t)0x307e5069,
+    (q31_t)0x1645759f, (q31_t)0x308682dc, (q31_t)0x164efd94, (q31_t)0x308eb36f,
+    (q31_t)0x16588725, (q31_t)0x3096e223, (q31_t)0x16621251, (q31_t)0x309f0ef8,
+    (q31_t)0x166b9f18, (q31_t)0x30a739ed, (q31_t)0x16752d79, (q31_t)0x30af6302,
+    (q31_t)0x167ebd74, (q31_t)0x30b78a36, (q31_t)0x16884f09, (q31_t)0x30bfaf89,
+    (q31_t)0x1691e237, (q31_t)0x30c7d2fb, (q31_t)0x169b76fe, (q31_t)0x30cff48c,
+    (q31_t)0x16a50d5d, (q31_t)0x30d8143b, (q31_t)0x16aea555, (q31_t)0x30e03208,
+    (q31_t)0x16b83ee4, (q31_t)0x30e84df3, (q31_t)0x16c1da0b, (q31_t)0x30f067fb,
+    (q31_t)0x16cb76c9, (q31_t)0x30f8801f, (q31_t)0x16d5151d, (q31_t)0x31009661,
+    (q31_t)0x16deb508, (q31_t)0x3108aabf, (q31_t)0x16e85689, (q31_t)0x3110bd39,
+    (q31_t)0x16f1f99f, (q31_t)0x3118cdcf, (q31_t)0x16fb9e4b, (q31_t)0x3120dc80,
+    (q31_t)0x1705448b, (q31_t)0x3128e94c, (q31_t)0x170eec60, (q31_t)0x3130f433,
+    (q31_t)0x171895c9, (q31_t)0x3138fd35, (q31_t)0x172240c5, (q31_t)0x31410450,
+    (q31_t)0x172bed55, (q31_t)0x31490986, (q31_t)0x17359b78, (q31_t)0x31510cd5,
+    (q31_t)0x173f4b2e, (q31_t)0x31590e3e, (q31_t)0x1748fc75, (q31_t)0x31610dbf,
+    (q31_t)0x1752af4f, (q31_t)0x31690b59, (q31_t)0x175c63ba, (q31_t)0x3171070c,
+    (q31_t)0x176619b6, (q31_t)0x317900d6, (q31_t)0x176fd143, (q31_t)0x3180f8b8,
+    (q31_t)0x17798a60, (q31_t)0x3188eeb2, (q31_t)0x1783450d, (q31_t)0x3190e2c3,
+    (q31_t)0x178d014a, (q31_t)0x3198d4ea, (q31_t)0x1796bf16, (q31_t)0x31a0c528,
+    (q31_t)0x17a07e70, (q31_t)0x31a8b37c, (q31_t)0x17aa3f5a, (q31_t)0x31b09fe7,
+    (q31_t)0x17b401d1, (q31_t)0x31b88a66, (q31_t)0x17bdc5d6, (q31_t)0x31c072fb,
+    (q31_t)0x17c78b68, (q31_t)0x31c859a5, (q31_t)0x17d15288, (q31_t)0x31d03e64,
+    (q31_t)0x17db1b34, (q31_t)0x31d82137, (q31_t)0x17e4e56c, (q31_t)0x31e0021e,
+    (q31_t)0x17eeb130, (q31_t)0x31e7e118, (q31_t)0x17f87e7f, (q31_t)0x31efbe27,
+    (q31_t)0x18024d59, (q31_t)0x31f79948, (q31_t)0x180c1dbf, (q31_t)0x31ff727c,
+    (q31_t)0x1815efae, (q31_t)0x320749c3, (q31_t)0x181fc328, (q31_t)0x320f1f1c,
+    (q31_t)0x1829982b, (q31_t)0x3216f287, (q31_t)0x18336eb7, (q31_t)0x321ec403,
+    (q31_t)0x183d46cc, (q31_t)0x32269391, (q31_t)0x18472069, (q31_t)0x322e6130,
+    (q31_t)0x1850fb8e, (q31_t)0x32362ce0, (q31_t)0x185ad83c, (q31_t)0x323df6a0,
+    (q31_t)0x1864b670, (q31_t)0x3245be70, (q31_t)0x186e962b, (q31_t)0x324d8450,
+    (q31_t)0x1878776d, (q31_t)0x32554840, (q31_t)0x18825a35, (q31_t)0x325d0a3e,
+    (q31_t)0x188c3e83, (q31_t)0x3264ca4c, (q31_t)0x18962456, (q31_t)0x326c8868,
+    (q31_t)0x18a00bae, (q31_t)0x32744493, (q31_t)0x18a9f48a, (q31_t)0x327bfecc,
+    (q31_t)0x18b3deeb, (q31_t)0x3283b712, (q31_t)0x18bdcad0, (q31_t)0x328b6d66,
+    (q31_t)0x18c7b838, (q31_t)0x329321c7, (q31_t)0x18d1a724, (q31_t)0x329ad435,
+    (q31_t)0x18db9792, (q31_t)0x32a284b0, (q31_t)0x18e58982, (q31_t)0x32aa3336,
+    (q31_t)0x18ef7cf4, (q31_t)0x32b1dfc9, (q31_t)0x18f971e8, (q31_t)0x32b98a67,
+    (q31_t)0x1903685d, (q31_t)0x32c13311, (q31_t)0x190d6053, (q31_t)0x32c8d9c6,
+    (q31_t)0x191759c9, (q31_t)0x32d07e85, (q31_t)0x192154bf, (q31_t)0x32d82150,
+    (q31_t)0x192b5135, (q31_t)0x32dfc224, (q31_t)0x19354f2a, (q31_t)0x32e76102,
+    (q31_t)0x193f4e9e, (q31_t)0x32eefdea, (q31_t)0x19494f90, (q31_t)0x32f698db,
+    (q31_t)0x19535201, (q31_t)0x32fe31d5, (q31_t)0x195d55ef, (q31_t)0x3305c8d7,
+    (q31_t)0x19675b5a, (q31_t)0x330d5de3, (q31_t)0x19716243, (q31_t)0x3314f0f6,
+    (q31_t)0x197b6aa8, (q31_t)0x331c8211, (q31_t)0x19857489, (q31_t)0x33241134,
+    (q31_t)0x198f7fe6, (q31_t)0x332b9e5e, (q31_t)0x19998cbe, (q31_t)0x3333298f,
+    (q31_t)0x19a39b11, (q31_t)0x333ab2c6, (q31_t)0x19adaadf, (q31_t)0x33423a04,
+    (q31_t)0x19b7bc27, (q31_t)0x3349bf48, (q31_t)0x19c1cee9, (q31_t)0x33514292,
+    (q31_t)0x19cbe325, (q31_t)0x3358c3e2, (q31_t)0x19d5f8d9, (q31_t)0x33604336,
+    (q31_t)0x19e01006, (q31_t)0x3367c090, (q31_t)0x19ea28ac, (q31_t)0x336f3bee,
+    (q31_t)0x19f442c9, (q31_t)0x3376b551, (q31_t)0x19fe5e5e, (q31_t)0x337e2cb7,
+    (q31_t)0x1a087b69, (q31_t)0x3385a222, (q31_t)0x1a1299ec, (q31_t)0x338d1590,
+    (q31_t)0x1a1cb9e5, (q31_t)0x33948701, (q31_t)0x1a26db54, (q31_t)0x339bf675,
+    (q31_t)0x1a30fe38, (q31_t)0x33a363ec, (q31_t)0x1a3b2292, (q31_t)0x33aacf65,
+    (q31_t)0x1a454860, (q31_t)0x33b238e0, (q31_t)0x1a4f6fa3, (q31_t)0x33b9a05d,
+    (q31_t)0x1a599859, (q31_t)0x33c105db, (q31_t)0x1a63c284, (q31_t)0x33c8695b,
+    (q31_t)0x1a6dee21, (q31_t)0x33cfcadc, (q31_t)0x1a781b31, (q31_t)0x33d72a5d,
+    (q31_t)0x1a8249b4, (q31_t)0x33de87de, (q31_t)0x1a8c79a9, (q31_t)0x33e5e360,
+    (q31_t)0x1a96ab0f, (q31_t)0x33ed3ce1, (q31_t)0x1aa0dde7, (q31_t)0x33f49462,
+    (q31_t)0x1aab122f, (q31_t)0x33fbe9e2, (q31_t)0x1ab547e8, (q31_t)0x34033d61,
+    (q31_t)0x1abf7f11, (q31_t)0x340a8edf, (q31_t)0x1ac9b7a9, (q31_t)0x3411de5b,
+    (q31_t)0x1ad3f1b1, (q31_t)0x34192bd5, (q31_t)0x1ade2d28, (q31_t)0x3420774d,
+    (q31_t)0x1ae86a0d, (q31_t)0x3427c0c3, (q31_t)0x1af2a860, (q31_t)0x342f0836,
+    (q31_t)0x1afce821, (q31_t)0x34364da6, (q31_t)0x1b072950, (q31_t)0x343d9112,
+    (q31_t)0x1b116beb, (q31_t)0x3444d27b, (q31_t)0x1b1baff2, (q31_t)0x344c11e0,
+    (q31_t)0x1b25f566, (q31_t)0x34534f41, (q31_t)0x1b303c46, (q31_t)0x345a8a9d,
+    (q31_t)0x1b3a8491, (q31_t)0x3461c3f5, (q31_t)0x1b44ce46, (q31_t)0x3468fb47,
+    (q31_t)0x1b4f1967, (q31_t)0x34703095, (q31_t)0x1b5965f1, (q31_t)0x347763dd,
+    (q31_t)0x1b63b3e5, (q31_t)0x347e951f, (q31_t)0x1b6e0342, (q31_t)0x3485c45b,
+    (q31_t)0x1b785409, (q31_t)0x348cf190, (q31_t)0x1b82a638, (q31_t)0x34941cbf,
+    (q31_t)0x1b8cf9cf, (q31_t)0x349b45e7, (q31_t)0x1b974ece, (q31_t)0x34a26d08,
+    (q31_t)0x1ba1a534, (q31_t)0x34a99221, (q31_t)0x1babfd01, (q31_t)0x34b0b533,
+    (q31_t)0x1bb65634, (q31_t)0x34b7d63c, (q31_t)0x1bc0b0ce, (q31_t)0x34bef53d,
+    (q31_t)0x1bcb0cce, (q31_t)0x34c61236, (q31_t)0x1bd56a32, (q31_t)0x34cd2d26,
+    (q31_t)0x1bdfc8fc, (q31_t)0x34d4460c, (q31_t)0x1bea292b, (q31_t)0x34db5cea,
+    (q31_t)0x1bf48abd, (q31_t)0x34e271bd, (q31_t)0x1bfeedb3, (q31_t)0x34e98487,
+    (q31_t)0x1c09520d, (q31_t)0x34f09546, (q31_t)0x1c13b7c9, (q31_t)0x34f7a3fb,
+    (q31_t)0x1c1e1ee9, (q31_t)0x34feb0a5, (q31_t)0x1c28876a, (q31_t)0x3505bb44,
+    (q31_t)0x1c32f14d, (q31_t)0x350cc3d8, (q31_t)0x1c3d5c91, (q31_t)0x3513ca60,
+    (q31_t)0x1c47c936, (q31_t)0x351acedd, (q31_t)0x1c52373c, (q31_t)0x3521d14d,
+    (q31_t)0x1c5ca6a2, (q31_t)0x3528d1b1, (q31_t)0x1c671768, (q31_t)0x352fd008,
+    (q31_t)0x1c71898d, (q31_t)0x3536cc52, (q31_t)0x1c7bfd11, (q31_t)0x353dc68f,
+    (q31_t)0x1c8671f3, (q31_t)0x3544bebf, (q31_t)0x1c90e834, (q31_t)0x354bb4e1,
+    (q31_t)0x1c9b5fd2, (q31_t)0x3552a8f4, (q31_t)0x1ca5d8cd, (q31_t)0x35599afa,
+    (q31_t)0x1cb05326, (q31_t)0x35608af1, (q31_t)0x1cbacedb, (q31_t)0x356778d9,
+    (q31_t)0x1cc54bec, (q31_t)0x356e64b2, (q31_t)0x1ccfca59, (q31_t)0x35754e7c,
+    (q31_t)0x1cda4a21, (q31_t)0x357c3636, (q31_t)0x1ce4cb44, (q31_t)0x35831be0,
+    (q31_t)0x1cef4dc2, (q31_t)0x3589ff7a, (q31_t)0x1cf9d199, (q31_t)0x3590e104,
+    (q31_t)0x1d0456ca, (q31_t)0x3597c07d, (q31_t)0x1d0edd55, (q31_t)0x359e9de5,
+    (q31_t)0x1d196538, (q31_t)0x35a5793c, (q31_t)0x1d23ee74, (q31_t)0x35ac5282,
+    (q31_t)0x1d2e7908, (q31_t)0x35b329b5, (q31_t)0x1d3904f4, (q31_t)0x35b9fed7,
+    (q31_t)0x1d439236, (q31_t)0x35c0d1e7, (q31_t)0x1d4e20d0, (q31_t)0x35c7a2e3,
+    (q31_t)0x1d58b0c0, (q31_t)0x35ce71ce, (q31_t)0x1d634206, (q31_t)0x35d53ea5,
+    (q31_t)0x1d6dd4a2, (q31_t)0x35dc0968, (q31_t)0x1d786892, (q31_t)0x35e2d219,
+    (q31_t)0x1d82fdd8, (q31_t)0x35e998b5, (q31_t)0x1d8d9472, (q31_t)0x35f05d3d,
+    (q31_t)0x1d982c60, (q31_t)0x35f71fb1, (q31_t)0x1da2c5a2, (q31_t)0x35fde011,
+    (q31_t)0x1dad6036, (q31_t)0x36049e5b, (q31_t)0x1db7fc1e, (q31_t)0x360b5a90,
+    (q31_t)0x1dc29958, (q31_t)0x361214b0, (q31_t)0x1dcd37e4, (q31_t)0x3618ccba,
+    (q31_t)0x1dd7d7c1, (q31_t)0x361f82af, (q31_t)0x1de278ef, (q31_t)0x3626368d,
+    (q31_t)0x1ded1b6e, (q31_t)0x362ce855, (q31_t)0x1df7bf3e, (q31_t)0x36339806,
+    (q31_t)0x1e02645d, (q31_t)0x363a45a0, (q31_t)0x1e0d0acc, (q31_t)0x3640f123,
+    (q31_t)0x1e17b28a, (q31_t)0x36479a8e, (q31_t)0x1e225b96, (q31_t)0x364e41e2,
+    (q31_t)0x1e2d05f1, (q31_t)0x3654e71d, (q31_t)0x1e37b199, (q31_t)0x365b8a41,
+    (q31_t)0x1e425e8f, (q31_t)0x36622b4c, (q31_t)0x1e4d0cd2, (q31_t)0x3668ca3e,
+    (q31_t)0x1e57bc62, (q31_t)0x366f6717, (q31_t)0x1e626d3e, (q31_t)0x367601d7,
+    (q31_t)0x1e6d1f65, (q31_t)0x367c9a7e, (q31_t)0x1e77d2d8, (q31_t)0x3683310b,
+    (q31_t)0x1e828796, (q31_t)0x3689c57d, (q31_t)0x1e8d3d9e, (q31_t)0x369057d6,
+    (q31_t)0x1e97f4f1, (q31_t)0x3696e814, (q31_t)0x1ea2ad8d, (q31_t)0x369d7637,
+    (q31_t)0x1ead6773, (q31_t)0x36a4023f, (q31_t)0x1eb822a1, (q31_t)0x36aa8c2c,
+    (q31_t)0x1ec2df18, (q31_t)0x36b113fd, (q31_t)0x1ecd9cd7, (q31_t)0x36b799b3,
+    (q31_t)0x1ed85bdd, (q31_t)0x36be1d4c, (q31_t)0x1ee31c2b, (q31_t)0x36c49ec9,
+    (q31_t)0x1eedddc0, (q31_t)0x36cb1e2a, (q31_t)0x1ef8a09b, (q31_t)0x36d19b6e,
+    (q31_t)0x1f0364bc, (q31_t)0x36d81695, (q31_t)0x1f0e2a22, (q31_t)0x36de8f9e,
+    (q31_t)0x1f18f0ce, (q31_t)0x36e5068a, (q31_t)0x1f23b8be, (q31_t)0x36eb7b58,
+    (q31_t)0x1f2e81f3, (q31_t)0x36f1ee09, (q31_t)0x1f394c6b, (q31_t)0x36f85e9a,
+    (q31_t)0x1f441828, (q31_t)0x36fecd0e, (q31_t)0x1f4ee527, (q31_t)0x37053962,
+    (q31_t)0x1f59b369, (q31_t)0x370ba398, (q31_t)0x1f6482ed, (q31_t)0x37120bae,
+    (q31_t)0x1f6f53b3, (q31_t)0x371871a5, (q31_t)0x1f7a25ba, (q31_t)0x371ed57c,
+    (q31_t)0x1f84f902, (q31_t)0x37253733, (q31_t)0x1f8fcd8b, (q31_t)0x372b96ca,
+    (q31_t)0x1f9aa354, (q31_t)0x3731f440, (q31_t)0x1fa57a5d, (q31_t)0x37384f95,
+    (q31_t)0x1fb052a5, (q31_t)0x373ea8ca, (q31_t)0x1fbb2c2c, (q31_t)0x3744ffdd,
+    (q31_t)0x1fc606f1, (q31_t)0x374b54ce, (q31_t)0x1fd0e2f5, (q31_t)0x3751a79e,
+    (q31_t)0x1fdbc036, (q31_t)0x3757f84c, (q31_t)0x1fe69eb4, (q31_t)0x375e46d8,
+    (q31_t)0x1ff17e70, (q31_t)0x37649341, (q31_t)0x1ffc5f67, (q31_t)0x376add88,
+    (q31_t)0x2007419b, (q31_t)0x377125ac, (q31_t)0x2012250a, (q31_t)0x37776bac,
+    (q31_t)0x201d09b4, (q31_t)0x377daf89, (q31_t)0x2027ef99, (q31_t)0x3783f143,
+    (q31_t)0x2032d6b8, (q31_t)0x378a30d8, (q31_t)0x203dbf11, (q31_t)0x37906e49,
+    (q31_t)0x2048a8a4, (q31_t)0x3796a996, (q31_t)0x2053936f, (q31_t)0x379ce2be,
+    (q31_t)0x205e7f74, (q31_t)0x37a319c2, (q31_t)0x20696cb0, (q31_t)0x37a94ea0,
+    (q31_t)0x20745b24, (q31_t)0x37af8159, (q31_t)0x207f4acf, (q31_t)0x37b5b1ec,
+    (q31_t)0x208a3bb2, (q31_t)0x37bbe05a, (q31_t)0x20952dcb, (q31_t)0x37c20ca1,
+    (q31_t)0x20a0211a, (q31_t)0x37c836c2, (q31_t)0x20ab159e, (q31_t)0x37ce5ebd,
+    (q31_t)0x20b60b58, (q31_t)0x37d48490, (q31_t)0x20c10247, (q31_t)0x37daa83d,
+    (q31_t)0x20cbfa6a, (q31_t)0x37e0c9c3, (q31_t)0x20d6f3c1, (q31_t)0x37e6e921,
+    (q31_t)0x20e1ee4b, (q31_t)0x37ed0657, (q31_t)0x20ecea09, (q31_t)0x37f32165,
+    (q31_t)0x20f7e6f9, (q31_t)0x37f93a4b, (q31_t)0x2102e51c, (q31_t)0x37ff5109,
+    (q31_t)0x210de470, (q31_t)0x3805659e, (q31_t)0x2118e4f6, (q31_t)0x380b780a,
+    (q31_t)0x2123e6ad, (q31_t)0x3811884d, (q31_t)0x212ee995, (q31_t)0x38179666,
+    (q31_t)0x2139edac, (q31_t)0x381da256, (q31_t)0x2144f2f3, (q31_t)0x3823ac1d,
+    (q31_t)0x214ff96a, (q31_t)0x3829b3b9, (q31_t)0x215b0110, (q31_t)0x382fb92a,
+    (q31_t)0x216609e3, (q31_t)0x3835bc71, (q31_t)0x217113e5, (q31_t)0x383bbd8e,
+    (q31_t)0x217c1f15, (q31_t)0x3841bc7f, (q31_t)0x21872b72, (q31_t)0x3847b946,
+    (q31_t)0x219238fb, (q31_t)0x384db3e0, (q31_t)0x219d47b1, (q31_t)0x3853ac4f,
+    (q31_t)0x21a85793, (q31_t)0x3859a292, (q31_t)0x21b368a0, (q31_t)0x385f96a9,
+    (q31_t)0x21be7ad8, (q31_t)0x38658894, (q31_t)0x21c98e3b, (q31_t)0x386b7852,
+    (q31_t)0x21d4a2c8, (q31_t)0x387165e3, (q31_t)0x21dfb87f, (q31_t)0x38775147,
+    (q31_t)0x21eacf5f, (q31_t)0x387d3a7e, (q31_t)0x21f5e768, (q31_t)0x38832187,
+    (q31_t)0x22010099, (q31_t)0x38890663, (q31_t)0x220c1af3, (q31_t)0x388ee910,
+    (q31_t)0x22173674, (q31_t)0x3894c98f, (q31_t)0x2222531c, (q31_t)0x389aa7e0,
+    (q31_t)0x222d70eb, (q31_t)0x38a08402, (q31_t)0x22388fe1, (q31_t)0x38a65df6,
+    (q31_t)0x2243affc, (q31_t)0x38ac35ba, (q31_t)0x224ed13d, (q31_t)0x38b20b4f,
+    (q31_t)0x2259f3a3, (q31_t)0x38b7deb4, (q31_t)0x2265172e, (q31_t)0x38bdafea,
+    (q31_t)0x22703bdc, (q31_t)0x38c37eef, (q31_t)0x227b61af, (q31_t)0x38c94bc4,
+    (q31_t)0x228688a4, (q31_t)0x38cf1669, (q31_t)0x2291b0bd, (q31_t)0x38d4dedd,
+    (q31_t)0x229cd9f8, (q31_t)0x38daa520, (q31_t)0x22a80456, (q31_t)0x38e06932,
+    (q31_t)0x22b32fd4, (q31_t)0x38e62b13, (q31_t)0x22be5c74, (q31_t)0x38ebeac2,
+    (q31_t)0x22c98a35, (q31_t)0x38f1a840, (q31_t)0x22d4b916, (q31_t)0x38f7638b,
+    (q31_t)0x22dfe917, (q31_t)0x38fd1ca4, (q31_t)0x22eb1a37, (q31_t)0x3902d38b,
+    (q31_t)0x22f64c77, (q31_t)0x3908883f, (q31_t)0x23017fd5, (q31_t)0x390e3ac0,
+    (q31_t)0x230cb451, (q31_t)0x3913eb0e, (q31_t)0x2317e9eb, (q31_t)0x39199929,
+    (q31_t)0x232320a2, (q31_t)0x391f4510, (q31_t)0x232e5876, (q31_t)0x3924eec3,
+    (q31_t)0x23399167, (q31_t)0x392a9642, (q31_t)0x2344cb73, (q31_t)0x39303b8e,
+    (q31_t)0x2350069b, (q31_t)0x3935dea4, (q31_t)0x235b42df, (q31_t)0x393b7f86,
+    (q31_t)0x2366803c, (q31_t)0x39411e33, (q31_t)0x2371beb5, (q31_t)0x3946baac,
+    (q31_t)0x237cfe47, (q31_t)0x394c54ee, (q31_t)0x23883ef2, (q31_t)0x3951ecfc,
+    (q31_t)0x239380b6, (q31_t)0x395782d3, (q31_t)0x239ec393, (q31_t)0x395d1675,
+    (q31_t)0x23aa0788, (q31_t)0x3962a7e0, (q31_t)0x23b54c95, (q31_t)0x39683715,
+    (q31_t)0x23c092b9, (q31_t)0x396dc414, (q31_t)0x23cbd9f4, (q31_t)0x39734edc,
+    (q31_t)0x23d72245, (q31_t)0x3978d76c, (q31_t)0x23e26bac, (q31_t)0x397e5dc6,
+    (q31_t)0x23edb628, (q31_t)0x3983e1e8, (q31_t)0x23f901ba, (q31_t)0x398963d2,
+    (q31_t)0x24044e60, (q31_t)0x398ee385, (q31_t)0x240f9c1a, (q31_t)0x399460ff,
+    (q31_t)0x241aeae8, (q31_t)0x3999dc42, (q31_t)0x24263ac9, (q31_t)0x399f554b,
+    (q31_t)0x24318bbe, (q31_t)0x39a4cc1c, (q31_t)0x243cddc4, (q31_t)0x39aa40b4,
+    (q31_t)0x244830dd, (q31_t)0x39afb313, (q31_t)0x24538507, (q31_t)0x39b52339,
+    (q31_t)0x245eda43, (q31_t)0x39ba9125, (q31_t)0x246a308f, (q31_t)0x39bffcd7,
+    (q31_t)0x247587eb, (q31_t)0x39c5664f, (q31_t)0x2480e057, (q31_t)0x39cacd8d,
+    (q31_t)0x248c39d3, (q31_t)0x39d03291, (q31_t)0x2497945d, (q31_t)0x39d5955a,
+    (q31_t)0x24a2eff6, (q31_t)0x39daf5e8, (q31_t)0x24ae4c9d, (q31_t)0x39e0543c,
+    (q31_t)0x24b9aa52, (q31_t)0x39e5b054, (q31_t)0x24c50914, (q31_t)0x39eb0a31,
+    (q31_t)0x24d068e2, (q31_t)0x39f061d2, (q31_t)0x24dbc9bd, (q31_t)0x39f5b737,
+    (q31_t)0x24e72ba4, (q31_t)0x39fb0a60, (q31_t)0x24f28e96, (q31_t)0x3a005b4d,
+    (q31_t)0x24fdf294, (q31_t)0x3a05a9fd, (q31_t)0x2509579b, (q31_t)0x3a0af671,
+    (q31_t)0x2514bdad, (q31_t)0x3a1040a8, (q31_t)0x252024c9, (q31_t)0x3a1588a2,
+    (q31_t)0x252b8cee, (q31_t)0x3a1ace5f, (q31_t)0x2536f61b, (q31_t)0x3a2011de,
+    (q31_t)0x25426051, (q31_t)0x3a25531f, (q31_t)0x254dcb8f, (q31_t)0x3a2a9223,
+    (q31_t)0x255937d5, (q31_t)0x3a2fcee8, (q31_t)0x2564a521, (q31_t)0x3a350970,
+    (q31_t)0x25701374, (q31_t)0x3a3a41b9, (q31_t)0x257b82cd, (q31_t)0x3a3f77c3,
+    (q31_t)0x2586f32c, (q31_t)0x3a44ab8e, (q31_t)0x25926490, (q31_t)0x3a49dd1a,
+    (q31_t)0x259dd6f9, (q31_t)0x3a4f0c67, (q31_t)0x25a94a67, (q31_t)0x3a543974,
+    (q31_t)0x25b4bed8, (q31_t)0x3a596442, (q31_t)0x25c0344d, (q31_t)0x3a5e8cd0,
+    (q31_t)0x25cbaac5, (q31_t)0x3a63b31d, (q31_t)0x25d72240, (q31_t)0x3a68d72b,
+    (q31_t)0x25e29abc, (q31_t)0x3a6df8f8, (q31_t)0x25ee143b, (q31_t)0x3a731884,
+    (q31_t)0x25f98ebb, (q31_t)0x3a7835cf, (q31_t)0x26050a3b, (q31_t)0x3a7d50da,
+    (q31_t)0x261086bc, (q31_t)0x3a8269a3, (q31_t)0x261c043d, (q31_t)0x3a87802a,
+    (q31_t)0x262782be, (q31_t)0x3a8c9470, (q31_t)0x2633023e, (q31_t)0x3a91a674,
+    (q31_t)0x263e82bc, (q31_t)0x3a96b636, (q31_t)0x264a0438, (q31_t)0x3a9bc3b6,
+    (q31_t)0x265586b3, (q31_t)0x3aa0cef3, (q31_t)0x26610a2a, (q31_t)0x3aa5d7ee,
+    (q31_t)0x266c8e9f, (q31_t)0x3aaadea6, (q31_t)0x26781410, (q31_t)0x3aafe31b,
+    (q31_t)0x26839a7c, (q31_t)0x3ab4e54c, (q31_t)0x268f21e5, (q31_t)0x3ab9e53a,
+    (q31_t)0x269aaa48, (q31_t)0x3abee2e5, (q31_t)0x26a633a6, (q31_t)0x3ac3de4c,
+    (q31_t)0x26b1bdff, (q31_t)0x3ac8d76f, (q31_t)0x26bd4951, (q31_t)0x3acdce4d,
+    (q31_t)0x26c8d59c, (q31_t)0x3ad2c2e8, (q31_t)0x26d462e1, (q31_t)0x3ad7b53d,
+    (q31_t)0x26dff11d, (q31_t)0x3adca54e, (q31_t)0x26eb8052, (q31_t)0x3ae1931a,
+    (q31_t)0x26f7107e, (q31_t)0x3ae67ea1, (q31_t)0x2702a1a1, (q31_t)0x3aeb67e3,
+    (q31_t)0x270e33bb, (q31_t)0x3af04edf, (q31_t)0x2719c6cb, (q31_t)0x3af53395,
+    (q31_t)0x27255ad1, (q31_t)0x3afa1605, (q31_t)0x2730efcc, (q31_t)0x3afef630,
+    (q31_t)0x273c85bc, (q31_t)0x3b03d414, (q31_t)0x27481ca1, (q31_t)0x3b08afb2,
+    (q31_t)0x2753b479, (q31_t)0x3b0d8909, (q31_t)0x275f4d45, (q31_t)0x3b126019,
+    (q31_t)0x276ae704, (q31_t)0x3b1734e2, (q31_t)0x277681b6, (q31_t)0x3b1c0764,
+    (q31_t)0x27821d59, (q31_t)0x3b20d79e, (q31_t)0x278db9ef, (q31_t)0x3b25a591,
+    (q31_t)0x27995776, (q31_t)0x3b2a713d, (q31_t)0x27a4f5ed, (q31_t)0x3b2f3aa0,
+    (q31_t)0x27b09555, (q31_t)0x3b3401bb, (q31_t)0x27bc35ad, (q31_t)0x3b38c68e,
+    (q31_t)0x27c7d6f4, (q31_t)0x3b3d8918, (q31_t)0x27d3792b, (q31_t)0x3b42495a,
+    (q31_t)0x27df1c50, (q31_t)0x3b470753, (q31_t)0x27eac063, (q31_t)0x3b4bc303,
+    (q31_t)0x27f66564, (q31_t)0x3b507c69, (q31_t)0x28020b52, (q31_t)0x3b553386,
+    (q31_t)0x280db22d, (q31_t)0x3b59e85a, (q31_t)0x281959f4, (q31_t)0x3b5e9ae4,
+    (q31_t)0x282502a7, (q31_t)0x3b634b23, (q31_t)0x2830ac45, (q31_t)0x3b67f919,
+    (q31_t)0x283c56cf, (q31_t)0x3b6ca4c4, (q31_t)0x28480243, (q31_t)0x3b714e25,
+    (q31_t)0x2853aea1, (q31_t)0x3b75f53c, (q31_t)0x285f5be9, (q31_t)0x3b7a9a07,
+    (q31_t)0x286b0a1a, (q31_t)0x3b7f3c87, (q31_t)0x2876b934, (q31_t)0x3b83dcbc,
+    (q31_t)0x28826936, (q31_t)0x3b887aa6, (q31_t)0x288e1a20, (q31_t)0x3b8d1644,
+    (q31_t)0x2899cbf1, (q31_t)0x3b91af97, (q31_t)0x28a57ea9, (q31_t)0x3b96469d,
+    (q31_t)0x28b13248, (q31_t)0x3b9adb57, (q31_t)0x28bce6cd, (q31_t)0x3b9f6dc5,
+    (q31_t)0x28c89c37, (q31_t)0x3ba3fde7, (q31_t)0x28d45286, (q31_t)0x3ba88bbc,
+    (q31_t)0x28e009ba, (q31_t)0x3bad1744, (q31_t)0x28ebc1d3, (q31_t)0x3bb1a080,
+    (q31_t)0x28f77acf, (q31_t)0x3bb6276e, (q31_t)0x290334af, (q31_t)0x3bbaac0e,
+    (q31_t)0x290eef71, (q31_t)0x3bbf2e62, (q31_t)0x291aab16, (q31_t)0x3bc3ae67,
+    (q31_t)0x2926679c, (q31_t)0x3bc82c1f, (q31_t)0x29322505, (q31_t)0x3bcca789,
+    (q31_t)0x293de34e, (q31_t)0x3bd120a4, (q31_t)0x2949a278, (q31_t)0x3bd59771,
+    (q31_t)0x29556282, (q31_t)0x3bda0bf0, (q31_t)0x2961236c, (q31_t)0x3bde7e20,
+    (q31_t)0x296ce535, (q31_t)0x3be2ee01, (q31_t)0x2978a7dd, (q31_t)0x3be75b93,
+    (q31_t)0x29846b63, (q31_t)0x3bebc6d5, (q31_t)0x29902fc7, (q31_t)0x3bf02fc9,
+    (q31_t)0x299bf509, (q31_t)0x3bf4966c, (q31_t)0x29a7bb28, (q31_t)0x3bf8fac0,
+    (q31_t)0x29b38223, (q31_t)0x3bfd5cc4, (q31_t)0x29bf49fa, (q31_t)0x3c01bc78,
+    (q31_t)0x29cb12ad, (q31_t)0x3c0619dc, (q31_t)0x29d6dc3b, (q31_t)0x3c0a74f0,
+    (q31_t)0x29e2a6a3, (q31_t)0x3c0ecdb2, (q31_t)0x29ee71e6, (q31_t)0x3c132424,
+    (q31_t)0x29fa3e03, (q31_t)0x3c177845, (q31_t)0x2a060af9, (q31_t)0x3c1bca16,
+    (q31_t)0x2a11d8c8, (q31_t)0x3c201994, (q31_t)0x2a1da770, (q31_t)0x3c2466c2,
+    (q31_t)0x2a2976ef, (q31_t)0x3c28b19e, (q31_t)0x2a354746, (q31_t)0x3c2cfa28,
+    (q31_t)0x2a411874, (q31_t)0x3c314060, (q31_t)0x2a4cea79, (q31_t)0x3c358446,
+    (q31_t)0x2a58bd54, (q31_t)0x3c39c5da, (q31_t)0x2a649105, (q31_t)0x3c3e051b,
+    (q31_t)0x2a70658a, (q31_t)0x3c42420a, (q31_t)0x2a7c3ae5, (q31_t)0x3c467ca6,
+    (q31_t)0x2a881114, (q31_t)0x3c4ab4ef, (q31_t)0x2a93e817, (q31_t)0x3c4eeae5,
+    (q31_t)0x2a9fbfed, (q31_t)0x3c531e88, (q31_t)0x2aab9896, (q31_t)0x3c574fd8,
+    (q31_t)0x2ab77212, (q31_t)0x3c5b7ed4, (q31_t)0x2ac34c60, (q31_t)0x3c5fab7c,
+    (q31_t)0x2acf277f, (q31_t)0x3c63d5d1, (q31_t)0x2adb0370, (q31_t)0x3c67fdd1,
+    (q31_t)0x2ae6e031, (q31_t)0x3c6c237e, (q31_t)0x2af2bdc3, (q31_t)0x3c7046d6,
+    (q31_t)0x2afe9c24, (q31_t)0x3c7467d9, (q31_t)0x2b0a7b54, (q31_t)0x3c788688,
+    (q31_t)0x2b165b54, (q31_t)0x3c7ca2e2, (q31_t)0x2b223c22, (q31_t)0x3c80bce7,
+    (q31_t)0x2b2e1dbe, (q31_t)0x3c84d496, (q31_t)0x2b3a0027, (q31_t)0x3c88e9f1,
+    (q31_t)0x2b45e35d, (q31_t)0x3c8cfcf6, (q31_t)0x2b51c760, (q31_t)0x3c910da5,
+    (q31_t)0x2b5dac2f, (q31_t)0x3c951bff, (q31_t)0x2b6991ca, (q31_t)0x3c992803,
+    (q31_t)0x2b75782f, (q31_t)0x3c9d31b0, (q31_t)0x2b815f60, (q31_t)0x3ca13908,
+    (q31_t)0x2b8d475b, (q31_t)0x3ca53e09, (q31_t)0x2b99301f, (q31_t)0x3ca940b3,
+    (q31_t)0x2ba519ad, (q31_t)0x3cad4107, (q31_t)0x2bb10404, (q31_t)0x3cb13f04,
+    (q31_t)0x2bbcef23, (q31_t)0x3cb53aaa, (q31_t)0x2bc8db0b, (q31_t)0x3cb933f9,
+    (q31_t)0x2bd4c7ba, (q31_t)0x3cbd2af0, (q31_t)0x2be0b52f, (q31_t)0x3cc11f90,
+    (q31_t)0x2beca36c, (q31_t)0x3cc511d9, (q31_t)0x2bf8926f, (q31_t)0x3cc901c9,
+    (q31_t)0x2c048237, (q31_t)0x3cccef62, (q31_t)0x2c1072c4, (q31_t)0x3cd0daa2,
+    (q31_t)0x2c1c6417, (q31_t)0x3cd4c38b, (q31_t)0x2c28562d, (q31_t)0x3cd8aa1b,
+    (q31_t)0x2c344908, (q31_t)0x3cdc8e52, (q31_t)0x2c403ca5, (q31_t)0x3ce07031,
+    (q31_t)0x2c4c3106, (q31_t)0x3ce44fb7, (q31_t)0x2c582629, (q31_t)0x3ce82ce4,
+    (q31_t)0x2c641c0e, (q31_t)0x3cec07b8, (q31_t)0x2c7012b5, (q31_t)0x3cefe032,
+    (q31_t)0x2c7c0a1d, (q31_t)0x3cf3b653, (q31_t)0x2c880245, (q31_t)0x3cf78a1b,
+    (q31_t)0x2c93fb2e, (q31_t)0x3cfb5b89, (q31_t)0x2c9ff4d6, (q31_t)0x3cff2a9d,
+    (q31_t)0x2cabef3d, (q31_t)0x3d02f757, (q31_t)0x2cb7ea63, (q31_t)0x3d06c1b6,
+    (q31_t)0x2cc3e648, (q31_t)0x3d0a89bc, (q31_t)0x2ccfe2ea, (q31_t)0x3d0e4f67,
+    (q31_t)0x2cdbe04a, (q31_t)0x3d1212b7, (q31_t)0x2ce7de66, (q31_t)0x3d15d3ad,
+    (q31_t)0x2cf3dd3f, (q31_t)0x3d199248, (q31_t)0x2cffdcd4, (q31_t)0x3d1d4e88,
+    (q31_t)0x2d0bdd25, (q31_t)0x3d21086c, (q31_t)0x2d17de31, (q31_t)0x3d24bff6,
+    (q31_t)0x2d23dff7, (q31_t)0x3d287523, (q31_t)0x2d2fe277, (q31_t)0x3d2c27f6,
+    (q31_t)0x2d3be5b1, (q31_t)0x3d2fd86c, (q31_t)0x2d47e9a5, (q31_t)0x3d338687,
+    (q31_t)0x2d53ee51, (q31_t)0x3d373245, (q31_t)0x2d5ff3b5, (q31_t)0x3d3adba7,
+    (q31_t)0x2d6bf9d1, (q31_t)0x3d3e82ae, (q31_t)0x2d7800a5, (q31_t)0x3d422757,
+    (q31_t)0x2d84082f, (q31_t)0x3d45c9a4, (q31_t)0x2d901070, (q31_t)0x3d496994,
+    (q31_t)0x2d9c1967, (q31_t)0x3d4d0728, (q31_t)0x2da82313, (q31_t)0x3d50a25e,
+    (q31_t)0x2db42d74, (q31_t)0x3d543b37, (q31_t)0x2dc0388a, (q31_t)0x3d57d1b3,
+    (q31_t)0x2dcc4454, (q31_t)0x3d5b65d2, (q31_t)0x2dd850d2, (q31_t)0x3d5ef793,
+    (q31_t)0x2de45e03, (q31_t)0x3d6286f6, (q31_t)0x2df06be6, (q31_t)0x3d6613fb,
+    (q31_t)0x2dfc7a7c, (q31_t)0x3d699ea3, (q31_t)0x2e0889c4, (q31_t)0x3d6d26ec,
+    (q31_t)0x2e1499bd, (q31_t)0x3d70acd7, (q31_t)0x2e20aa67, (q31_t)0x3d743064,
+    (q31_t)0x2e2cbbc1, (q31_t)0x3d77b192, (q31_t)0x2e38cdcb, (q31_t)0x3d7b3061,
+    (q31_t)0x2e44e084, (q31_t)0x3d7eacd2, (q31_t)0x2e50f3ed, (q31_t)0x3d8226e4,
+    (q31_t)0x2e5d0804, (q31_t)0x3d859e96, (q31_t)0x2e691cc9, (q31_t)0x3d8913ea,
+    (q31_t)0x2e75323c, (q31_t)0x3d8c86de, (q31_t)0x2e81485c, (q31_t)0x3d8ff772,
+    (q31_t)0x2e8d5f29, (q31_t)0x3d9365a8, (q31_t)0x2e9976a1, (q31_t)0x3d96d17d,
+    (q31_t)0x2ea58ec6, (q31_t)0x3d9a3af2, (q31_t)0x2eb1a796, (q31_t)0x3d9da208,
+    (q31_t)0x2ebdc110, (q31_t)0x3da106bd, (q31_t)0x2ec9db35, (q31_t)0x3da46912,
+    (q31_t)0x2ed5f604, (q31_t)0x3da7c907, (q31_t)0x2ee2117c, (q31_t)0x3dab269b,
+    (q31_t)0x2eee2d9d, (q31_t)0x3dae81cf, (q31_t)0x2efa4a67, (q31_t)0x3db1daa2,
+    (q31_t)0x2f0667d9, (q31_t)0x3db53113, (q31_t)0x2f1285f2, (q31_t)0x3db88524,
+    (q31_t)0x2f1ea4b2, (q31_t)0x3dbbd6d4, (q31_t)0x2f2ac419, (q31_t)0x3dbf2622,
+    (q31_t)0x2f36e426, (q31_t)0x3dc2730f, (q31_t)0x2f4304d8, (q31_t)0x3dc5bd9b,
+    (q31_t)0x2f4f2630, (q31_t)0x3dc905c5, (q31_t)0x2f5b482d, (q31_t)0x3dcc4b8d,
+    (q31_t)0x2f676ace, (q31_t)0x3dcf8ef3, (q31_t)0x2f738e12, (q31_t)0x3dd2cff7,
+    (q31_t)0x2f7fb1fa, (q31_t)0x3dd60e99, (q31_t)0x2f8bd685, (q31_t)0x3dd94ad8,
+    (q31_t)0x2f97fbb2, (q31_t)0x3ddc84b5, (q31_t)0x2fa42181, (q31_t)0x3ddfbc30,
+    (q31_t)0x2fb047f2, (q31_t)0x3de2f148, (q31_t)0x2fbc6f03, (q31_t)0x3de623fd,
+    (q31_t)0x2fc896b5, (q31_t)0x3de9544f, (q31_t)0x2fd4bf08, (q31_t)0x3dec823e,
+    (q31_t)0x2fe0e7f9, (q31_t)0x3defadca, (q31_t)0x2fed118a, (q31_t)0x3df2d6f3,
+    (q31_t)0x2ff93bba, (q31_t)0x3df5fdb8, (q31_t)0x30056687, (q31_t)0x3df9221a,
+    (q31_t)0x301191f3, (q31_t)0x3dfc4418, (q31_t)0x301dbdfb, (q31_t)0x3dff63b2,
+    (q31_t)0x3029eaa1, (q31_t)0x3e0280e9, (q31_t)0x303617e2, (q31_t)0x3e059bbb,
+    (q31_t)0x304245c0, (q31_t)0x3e08b42a, (q31_t)0x304e7438, (q31_t)0x3e0bca34,
+    (q31_t)0x305aa34c, (q31_t)0x3e0eddd9, (q31_t)0x3066d2fa, (q31_t)0x3e11ef1b,
+    (q31_t)0x30730342, (q31_t)0x3e14fdf7, (q31_t)0x307f3424, (q31_t)0x3e180a6f,
+    (q31_t)0x308b659f, (q31_t)0x3e1b1482, (q31_t)0x309797b2, (q31_t)0x3e1e1c30,
+    (q31_t)0x30a3ca5d, (q31_t)0x3e212179, (q31_t)0x30affda0, (q31_t)0x3e24245d,
+    (q31_t)0x30bc317a, (q31_t)0x3e2724db, (q31_t)0x30c865ea, (q31_t)0x3e2a22f4,
+    (q31_t)0x30d49af1, (q31_t)0x3e2d1ea8, (q31_t)0x30e0d08d, (q31_t)0x3e3017f6,
+    (q31_t)0x30ed06bf, (q31_t)0x3e330ede, (q31_t)0x30f93d86, (q31_t)0x3e360360,
+    (q31_t)0x310574e0, (q31_t)0x3e38f57c, (q31_t)0x3111accf, (q31_t)0x3e3be532,
+    (q31_t)0x311de551, (q31_t)0x3e3ed282, (q31_t)0x312a1e66, (q31_t)0x3e41bd6c,
+    (q31_t)0x3136580d, (q31_t)0x3e44a5ef, (q31_t)0x31429247, (q31_t)0x3e478c0b,
+    (q31_t)0x314ecd11, (q31_t)0x3e4a6fc1, (q31_t)0x315b086d, (q31_t)0x3e4d5110,
+    (q31_t)0x31674459, (q31_t)0x3e502ff9, (q31_t)0x317380d6, (q31_t)0x3e530c7a,
+    (q31_t)0x317fbde2, (q31_t)0x3e55e694, (q31_t)0x318bfb7d, (q31_t)0x3e58be47,
+    (q31_t)0x319839a6, (q31_t)0x3e5b9392, (q31_t)0x31a4785e, (q31_t)0x3e5e6676,
+    (q31_t)0x31b0b7a4, (q31_t)0x3e6136f3, (q31_t)0x31bcf777, (q31_t)0x3e640507,
+    (q31_t)0x31c937d6, (q31_t)0x3e66d0b4, (q31_t)0x31d578c2, (q31_t)0x3e6999fa,
+    (q31_t)0x31e1ba3a, (q31_t)0x3e6c60d7, (q31_t)0x31edfc3d, (q31_t)0x3e6f254c,
+    (q31_t)0x31fa3ecb, (q31_t)0x3e71e759, (q31_t)0x320681e3, (q31_t)0x3e74a6fd,
+    (q31_t)0x3212c585, (q31_t)0x3e77643a, (q31_t)0x321f09b1, (q31_t)0x3e7a1f0d,
+    (q31_t)0x322b4e66, (q31_t)0x3e7cd778, (q31_t)0x323793a3, (q31_t)0x3e7f8d7b,
+    (q31_t)0x3243d968, (q31_t)0x3e824114, (q31_t)0x32501fb5, (q31_t)0x3e84f245,
+    (q31_t)0x325c6688, (q31_t)0x3e87a10c, (q31_t)0x3268ade3, (q31_t)0x3e8a4d6a,
+    (q31_t)0x3274f5c3, (q31_t)0x3e8cf75f, (q31_t)0x32813e2a, (q31_t)0x3e8f9eeb,
+    (q31_t)0x328d8715, (q31_t)0x3e92440d, (q31_t)0x3299d085, (q31_t)0x3e94e6c6,
+    (q31_t)0x32a61a7a, (q31_t)0x3e978715, (q31_t)0x32b264f2, (q31_t)0x3e9a24fb,
+    (q31_t)0x32beafed, (q31_t)0x3e9cc076, (q31_t)0x32cafb6b, (q31_t)0x3e9f5988,
+    (q31_t)0x32d7476c, (q31_t)0x3ea1f02f, (q31_t)0x32e393ef, (q31_t)0x3ea4846c,
+    (q31_t)0x32efe0f2, (q31_t)0x3ea7163f, (q31_t)0x32fc2e77, (q31_t)0x3ea9a5a8,
+    (q31_t)0x33087c7d, (q31_t)0x3eac32a6, (q31_t)0x3314cb02, (q31_t)0x3eaebd3a,
+    (q31_t)0x33211a07, (q31_t)0x3eb14563, (q31_t)0x332d698a, (q31_t)0x3eb3cb21,
+    (q31_t)0x3339b98d, (q31_t)0x3eb64e75, (q31_t)0x33460a0d, (q31_t)0x3eb8cf5d,
+    (q31_t)0x33525b0b, (q31_t)0x3ebb4ddb, (q31_t)0x335eac86, (q31_t)0x3ebdc9ed,
+    (q31_t)0x336afe7e, (q31_t)0x3ec04394, (q31_t)0x337750f2, (q31_t)0x3ec2bad0,
+    (q31_t)0x3383a3e2, (q31_t)0x3ec52fa0, (q31_t)0x338ff74d, (q31_t)0x3ec7a205,
+    (q31_t)0x339c4b32, (q31_t)0x3eca11fe, (q31_t)0x33a89f92, (q31_t)0x3ecc7f8b,
+    (q31_t)0x33b4f46c, (q31_t)0x3eceeaad, (q31_t)0x33c149bf, (q31_t)0x3ed15363,
+    (q31_t)0x33cd9f8b, (q31_t)0x3ed3b9ad, (q31_t)0x33d9f5cf, (q31_t)0x3ed61d8a,
+    (q31_t)0x33e64c8c, (q31_t)0x3ed87efc, (q31_t)0x33f2a3bf, (q31_t)0x3edade01,
+    (q31_t)0x33fefb6a, (q31_t)0x3edd3a9a, (q31_t)0x340b538b, (q31_t)0x3edf94c7,
+    (q31_t)0x3417ac22, (q31_t)0x3ee1ec87, (q31_t)0x3424052f, (q31_t)0x3ee441da,
+    (q31_t)0x34305eb0, (q31_t)0x3ee694c1, (q31_t)0x343cb8a7, (q31_t)0x3ee8e53a,
+    (q31_t)0x34491311, (q31_t)0x3eeb3347, (q31_t)0x34556def, (q31_t)0x3eed7ee7,
+    (q31_t)0x3461c940, (q31_t)0x3eefc81a, (q31_t)0x346e2504, (q31_t)0x3ef20ee0,
+    (q31_t)0x347a8139, (q31_t)0x3ef45338, (q31_t)0x3486dde1, (q31_t)0x3ef69523,
+    (q31_t)0x34933afa, (q31_t)0x3ef8d4a1, (q31_t)0x349f9884, (q31_t)0x3efb11b1,
+    (q31_t)0x34abf67e, (q31_t)0x3efd4c54, (q31_t)0x34b854e7, (q31_t)0x3eff8489,
+    (q31_t)0x34c4b3c0, (q31_t)0x3f01ba50, (q31_t)0x34d11308, (q31_t)0x3f03eda9,
+    (q31_t)0x34dd72be, (q31_t)0x3f061e95, (q31_t)0x34e9d2e3, (q31_t)0x3f084d12,
+    (q31_t)0x34f63374, (q31_t)0x3f0a7921, (q31_t)0x35029473, (q31_t)0x3f0ca2c2,
+    (q31_t)0x350ef5de, (q31_t)0x3f0ec9f5, (q31_t)0x351b57b5, (q31_t)0x3f10eeb9,
+    (q31_t)0x3527b9f7, (q31_t)0x3f13110f, (q31_t)0x35341ca5, (q31_t)0x3f1530f7,
+    (q31_t)0x35407fbd, (q31_t)0x3f174e70, (q31_t)0x354ce33f, (q31_t)0x3f19697a,
+    (q31_t)0x3559472b, (q31_t)0x3f1b8215, (q31_t)0x3565ab80, (q31_t)0x3f1d9842,
+    (q31_t)0x3572103d, (q31_t)0x3f1fabff, (q31_t)0x357e7563, (q31_t)0x3f21bd4e,
+    (q31_t)0x358adaf0, (q31_t)0x3f23cc2e, (q31_t)0x359740e5, (q31_t)0x3f25d89e,
+    (q31_t)0x35a3a740, (q31_t)0x3f27e29f, (q31_t)0x35b00e02, (q31_t)0x3f29ea31,
+    (q31_t)0x35bc7529, (q31_t)0x3f2bef53, (q31_t)0x35c8dcb6, (q31_t)0x3f2df206,
+    (q31_t)0x35d544a7, (q31_t)0x3f2ff24a, (q31_t)0x35e1acfd, (q31_t)0x3f31f01d,
+    (q31_t)0x35ee15b7, (q31_t)0x3f33eb81, (q31_t)0x35fa7ed4, (q31_t)0x3f35e476,
+    (q31_t)0x3606e854, (q31_t)0x3f37dafa, (q31_t)0x36135237, (q31_t)0x3f39cf0e,
+    (q31_t)0x361fbc7b, (q31_t)0x3f3bc0b3, (q31_t)0x362c2721, (q31_t)0x3f3dafe7,
+    (q31_t)0x36389228, (q31_t)0x3f3f9cab, (q31_t)0x3644fd8f, (q31_t)0x3f4186ff,
+    (q31_t)0x36516956, (q31_t)0x3f436ee3, (q31_t)0x365dd57d, (q31_t)0x3f455456,
+    (q31_t)0x366a4203, (q31_t)0x3f473759, (q31_t)0x3676aee8, (q31_t)0x3f4917eb,
+    (q31_t)0x36831c2b, (q31_t)0x3f4af60d, (q31_t)0x368f89cb, (q31_t)0x3f4cd1be,
+    (q31_t)0x369bf7c9, (q31_t)0x3f4eaafe, (q31_t)0x36a86623, (q31_t)0x3f5081cd,
+    (q31_t)0x36b4d4d9, (q31_t)0x3f52562c, (q31_t)0x36c143ec, (q31_t)0x3f54281a,
+    (q31_t)0x36cdb359, (q31_t)0x3f55f796, (q31_t)0x36da2321, (q31_t)0x3f57c4a2,
+    (q31_t)0x36e69344, (q31_t)0x3f598f3c, (q31_t)0x36f303c0, (q31_t)0x3f5b5765,
+    (q31_t)0x36ff7496, (q31_t)0x3f5d1d1d, (q31_t)0x370be5c4, (q31_t)0x3f5ee063,
+    (q31_t)0x3718574b, (q31_t)0x3f60a138, (q31_t)0x3724c92a, (q31_t)0x3f625f9b,
+    (q31_t)0x37313b60, (q31_t)0x3f641b8d, (q31_t)0x373daded, (q31_t)0x3f65d50d,
+    (q31_t)0x374a20d0, (q31_t)0x3f678c1c, (q31_t)0x3756940a, (q31_t)0x3f6940b8,
+    (q31_t)0x37630799, (q31_t)0x3f6af2e3, (q31_t)0x376f7b7d, (q31_t)0x3f6ca29c,
+    (q31_t)0x377befb5, (q31_t)0x3f6e4fe3, (q31_t)0x37886442, (q31_t)0x3f6ffab8,
+    (q31_t)0x3794d922, (q31_t)0x3f71a31b, (q31_t)0x37a14e55, (q31_t)0x3f73490b,
+    (q31_t)0x37adc3db, (q31_t)0x3f74ec8a, (q31_t)0x37ba39b3, (q31_t)0x3f768d96,
+    (q31_t)0x37c6afdc, (q31_t)0x3f782c30, (q31_t)0x37d32657, (q31_t)0x3f79c857,
+    (q31_t)0x37df9d22, (q31_t)0x3f7b620c, (q31_t)0x37ec143e, (q31_t)0x3f7cf94e,
+    (q31_t)0x37f88ba9, (q31_t)0x3f7e8e1e, (q31_t)0x38050364, (q31_t)0x3f80207b,
+    (q31_t)0x38117b6d, (q31_t)0x3f81b065, (q31_t)0x381df3c5, (q31_t)0x3f833ddd,
+    (q31_t)0x382a6c6a, (q31_t)0x3f84c8e2, (q31_t)0x3836e55d, (q31_t)0x3f865174,
+    (q31_t)0x38435e9d, (q31_t)0x3f87d792, (q31_t)0x384fd829, (q31_t)0x3f895b3e,
+    (q31_t)0x385c5201, (q31_t)0x3f8adc77, (q31_t)0x3868cc24, (q31_t)0x3f8c5b3d,
+    (q31_t)0x38754692, (q31_t)0x3f8dd78f, (q31_t)0x3881c14b, (q31_t)0x3f8f516e,
+    (q31_t)0x388e3c4d, (q31_t)0x3f90c8da, (q31_t)0x389ab799, (q31_t)0x3f923dd2,
+    (q31_t)0x38a7332e, (q31_t)0x3f93b058, (q31_t)0x38b3af0c, (q31_t)0x3f952069,
+    (q31_t)0x38c02b31, (q31_t)0x3f968e07, (q31_t)0x38cca79e, (q31_t)0x3f97f932,
+    (q31_t)0x38d92452, (q31_t)0x3f9961e8, (q31_t)0x38e5a14d, (q31_t)0x3f9ac82c,
+    (q31_t)0x38f21e8e, (q31_t)0x3f9c2bfb, (q31_t)0x38fe9c15, (q31_t)0x3f9d8d56,
+    (q31_t)0x390b19e0, (q31_t)0x3f9eec3e, (q31_t)0x391797f0, (q31_t)0x3fa048b2,
+    (q31_t)0x39241645, (q31_t)0x3fa1a2b2, (q31_t)0x393094dd, (q31_t)0x3fa2fa3d,
+    (q31_t)0x393d13b8, (q31_t)0x3fa44f55, (q31_t)0x394992d7, (q31_t)0x3fa5a1f9,
+    (q31_t)0x39561237, (q31_t)0x3fa6f228, (q31_t)0x396291d9, (q31_t)0x3fa83fe3,
+    (q31_t)0x396f11bc, (q31_t)0x3fa98b2a, (q31_t)0x397b91e1, (q31_t)0x3faad3fd,
+    (q31_t)0x39881245, (q31_t)0x3fac1a5b, (q31_t)0x399492ea, (q31_t)0x3fad5e45,
+    (q31_t)0x39a113cd, (q31_t)0x3fae9fbb, (q31_t)0x39ad94f0, (q31_t)0x3fafdebb,
+    (q31_t)0x39ba1651, (q31_t)0x3fb11b48, (q31_t)0x39c697f0, (q31_t)0x3fb2555f,
+    (q31_t)0x39d319cc, (q31_t)0x3fb38d02, (q31_t)0x39df9be6, (q31_t)0x3fb4c231,
+    (q31_t)0x39ec1e3b, (q31_t)0x3fb5f4ea, (q31_t)0x39f8a0cd, (q31_t)0x3fb7252f,
+    (q31_t)0x3a05239a, (q31_t)0x3fb852ff, (q31_t)0x3a11a6a3, (q31_t)0x3fb97e5a,
+    (q31_t)0x3a1e29e5, (q31_t)0x3fbaa740, (q31_t)0x3a2aad62, (q31_t)0x3fbbcdb1,
+    (q31_t)0x3a373119, (q31_t)0x3fbcf1ad, (q31_t)0x3a43b508, (q31_t)0x3fbe1334,
+    (q31_t)0x3a503930, (q31_t)0x3fbf3246, (q31_t)0x3a5cbd91, (q31_t)0x3fc04ee3,
+    (q31_t)0x3a694229, (q31_t)0x3fc1690a, (q31_t)0x3a75c6f8, (q31_t)0x3fc280bc,
+    (q31_t)0x3a824bfd, (q31_t)0x3fc395f9, (q31_t)0x3a8ed139, (q31_t)0x3fc4a8c1,
+    (q31_t)0x3a9b56ab, (q31_t)0x3fc5b913, (q31_t)0x3aa7dc52, (q31_t)0x3fc6c6f0,
+    (q31_t)0x3ab4622d, (q31_t)0x3fc7d258, (q31_t)0x3ac0e83d, (q31_t)0x3fc8db4a,
+    (q31_t)0x3acd6e81, (q31_t)0x3fc9e1c6, (q31_t)0x3ad9f4f8, (q31_t)0x3fcae5cd,
+    (q31_t)0x3ae67ba2, (q31_t)0x3fcbe75e, (q31_t)0x3af3027e, (q31_t)0x3fcce67a,
+    (q31_t)0x3aff898c, (q31_t)0x3fcde320, (q31_t)0x3b0c10cb, (q31_t)0x3fcedd50,
+    (q31_t)0x3b18983b, (q31_t)0x3fcfd50b, (q31_t)0x3b251fdc, (q31_t)0x3fd0ca4f,
+    (q31_t)0x3b31a7ac, (q31_t)0x3fd1bd1e, (q31_t)0x3b3e2fac, (q31_t)0x3fd2ad77,
+    (q31_t)0x3b4ab7db, (q31_t)0x3fd39b5a, (q31_t)0x3b574039, (q31_t)0x3fd486c7,
+    (q31_t)0x3b63c8c4, (q31_t)0x3fd56fbe, (q31_t)0x3b70517d, (q31_t)0x3fd6563f,
+    (q31_t)0x3b7cda63, (q31_t)0x3fd73a4a, (q31_t)0x3b896375, (q31_t)0x3fd81bdf,
+    (q31_t)0x3b95ecb4, (q31_t)0x3fd8fafe, (q31_t)0x3ba2761e, (q31_t)0x3fd9d7a7,
+    (q31_t)0x3baeffb3, (q31_t)0x3fdab1d9, (q31_t)0x3bbb8973, (q31_t)0x3fdb8996,
+    (q31_t)0x3bc8135c, (q31_t)0x3fdc5edc, (q31_t)0x3bd49d70, (q31_t)0x3fdd31ac,
+    (q31_t)0x3be127ac, (q31_t)0x3fde0205, (q31_t)0x3bedb212, (q31_t)0x3fdecfe8,
+    (q31_t)0x3bfa3c9f, (q31_t)0x3fdf9b55, (q31_t)0x3c06c754, (q31_t)0x3fe0644b,
+    (q31_t)0x3c135231, (q31_t)0x3fe12acb, (q31_t)0x3c1fdd34, (q31_t)0x3fe1eed5,
+    (q31_t)0x3c2c685d, (q31_t)0x3fe2b067, (q31_t)0x3c38f3ac, (q31_t)0x3fe36f84,
+    (q31_t)0x3c457f21, (q31_t)0x3fe42c2a, (q31_t)0x3c520aba, (q31_t)0x3fe4e659,
+    (q31_t)0x3c5e9678, (q31_t)0x3fe59e12, (q31_t)0x3c6b2259, (q31_t)0x3fe65354,
+    (q31_t)0x3c77ae5e, (q31_t)0x3fe7061f, (q31_t)0x3c843a85, (q31_t)0x3fe7b674,
+    (q31_t)0x3c90c6cf, (q31_t)0x3fe86452, (q31_t)0x3c9d533b, (q31_t)0x3fe90fb9,
+    (q31_t)0x3ca9dfc8, (q31_t)0x3fe9b8a9, (q31_t)0x3cb66c77, (q31_t)0x3fea5f23,
+    (q31_t)0x3cc2f945, (q31_t)0x3feb0326, (q31_t)0x3ccf8634, (q31_t)0x3feba4b2,
+    (q31_t)0x3cdc1342, (q31_t)0x3fec43c7, (q31_t)0x3ce8a06f, (q31_t)0x3fece065,
+    (q31_t)0x3cf52dbb, (q31_t)0x3fed7a8c, (q31_t)0x3d01bb24, (q31_t)0x3fee123d,
+    (q31_t)0x3d0e48ab, (q31_t)0x3feea776, (q31_t)0x3d1ad650, (q31_t)0x3fef3a39,
+    (q31_t)0x3d276410, (q31_t)0x3fefca84, (q31_t)0x3d33f1ed, (q31_t)0x3ff05858,
+    (q31_t)0x3d407fe6, (q31_t)0x3ff0e3b6, (q31_t)0x3d4d0df9, (q31_t)0x3ff16c9c,
+    (q31_t)0x3d599c28, (q31_t)0x3ff1f30b, (q31_t)0x3d662a70, (q31_t)0x3ff27703,
+    (q31_t)0x3d72b8d2, (q31_t)0x3ff2f884, (q31_t)0x3d7f474d, (q31_t)0x3ff3778e,
+    (q31_t)0x3d8bd5e1, (q31_t)0x3ff3f420, (q31_t)0x3d98648d, (q31_t)0x3ff46e3c,
+    (q31_t)0x3da4f351, (q31_t)0x3ff4e5e0, (q31_t)0x3db1822c, (q31_t)0x3ff55b0d,
+    (q31_t)0x3dbe111e, (q31_t)0x3ff5cdc3, (q31_t)0x3dcaa027, (q31_t)0x3ff63e01,
+    (q31_t)0x3dd72f45, (q31_t)0x3ff6abc8, (q31_t)0x3de3be78, (q31_t)0x3ff71718,
+    (q31_t)0x3df04dc0, (q31_t)0x3ff77ff1, (q31_t)0x3dfcdd1d, (q31_t)0x3ff7e652,
+    (q31_t)0x3e096c8d, (q31_t)0x3ff84a3c, (q31_t)0x3e15fc11, (q31_t)0x3ff8abae,
+    (q31_t)0x3e228ba7, (q31_t)0x3ff90aaa, (q31_t)0x3e2f1b50, (q31_t)0x3ff9672d,
+    (q31_t)0x3e3bab0b, (q31_t)0x3ff9c13a, (q31_t)0x3e483ad8, (q31_t)0x3ffa18cf,
+    (q31_t)0x3e54cab5, (q31_t)0x3ffa6dec, (q31_t)0x3e615aa3, (q31_t)0x3ffac092,
+    (q31_t)0x3e6deaa1, (q31_t)0x3ffb10c1, (q31_t)0x3e7a7aae, (q31_t)0x3ffb5e78,
+    (q31_t)0x3e870aca, (q31_t)0x3ffba9b8, (q31_t)0x3e939af5, (q31_t)0x3ffbf280,
+    (q31_t)0x3ea02b2e, (q31_t)0x3ffc38d1, (q31_t)0x3eacbb74, (q31_t)0x3ffc7caa,
+    (q31_t)0x3eb94bc8, (q31_t)0x3ffcbe0c, (q31_t)0x3ec5dc28, (q31_t)0x3ffcfcf6,
+    (q31_t)0x3ed26c94, (q31_t)0x3ffd3969, (q31_t)0x3edefd0c, (q31_t)0x3ffd7364,
+    (q31_t)0x3eeb8d8f, (q31_t)0x3ffdaae7, (q31_t)0x3ef81e1d, (q31_t)0x3ffddff3,
+    (q31_t)0x3f04aeb5, (q31_t)0x3ffe1288, (q31_t)0x3f113f56, (q31_t)0x3ffe42a4,
+    (q31_t)0x3f1dd001, (q31_t)0x3ffe704a, (q31_t)0x3f2a60b4, (q31_t)0x3ffe9b77,
+    (q31_t)0x3f36f170, (q31_t)0x3ffec42d, (q31_t)0x3f438234, (q31_t)0x3ffeea6c,
+    (q31_t)0x3f5012fe, (q31_t)0x3fff0e32, (q31_t)0x3f5ca3d0, (q31_t)0x3fff2f82,
+    (q31_t)0x3f6934a8, (q31_t)0x3fff4e59, (q31_t)0x3f75c585, (q31_t)0x3fff6ab9,
+    (q31_t)0x3f825668, (q31_t)0x3fff84a1, (q31_t)0x3f8ee750, (q31_t)0x3fff9c12,
+    (q31_t)0x3f9b783c, (q31_t)0x3fffb10b, (q31_t)0x3fa8092c, (q31_t)0x3fffc38c,
+    (q31_t)0x3fb49a1f, (q31_t)0x3fffd396, (q31_t)0x3fc12b16, (q31_t)0x3fffe128,
+    (q31_t)0x3fcdbc0f, (q31_t)0x3fffec43, (q31_t)0x3fda4d09, (q31_t)0x3ffff4e6,
+    (q31_t)0x3fe6de05, (q31_t)0x3ffffb11, (q31_t)0x3ff36f02, (q31_t)0x3ffffec4,
+};
+
+
+/**
+  @par
+  Generation of realCoefBQ31 array:
+  @par
+   n = 4096
+  
for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  } 

+  @par
+  Convert to fixed point Q31 format
+      round(pBTable[i] * pow(2, 31))
+ */
+
+const q31_t realCoefBQ31[8192] = {
+    (q31_t)0x40000000, (q31_t)0x40000000, (q31_t)0x400c90fe, (q31_t)0x3ffffec4,
+    (q31_t)0x401921fb, (q31_t)0x3ffffb11, (q31_t)0x4025b2f7, (q31_t)0x3ffff4e6,
+    (q31_t)0x403243f1, (q31_t)0x3fffec43, (q31_t)0x403ed4ea, (q31_t)0x3fffe128,
+    (q31_t)0x404b65e1, (q31_t)0x3fffd396, (q31_t)0x4057f6d4, (q31_t)0x3fffc38c,
+    (q31_t)0x406487c4, (q31_t)0x3fffb10b, (q31_t)0x407118b0, (q31_t)0x3fff9c12,
+    (q31_t)0x407da998, (q31_t)0x3fff84a1, (q31_t)0x408a3a7b, (q31_t)0x3fff6ab9,
+    (q31_t)0x4096cb58, (q31_t)0x3fff4e59, (q31_t)0x40a35c30, (q31_t)0x3fff2f82,
+    (q31_t)0x40afed02, (q31_t)0x3fff0e32, (q31_t)0x40bc7dcc, (q31_t)0x3ffeea6c,
+    (q31_t)0x40c90e90, (q31_t)0x3ffec42d, (q31_t)0x40d59f4c, (q31_t)0x3ffe9b77,
+    (q31_t)0x40e22fff, (q31_t)0x3ffe704a, (q31_t)0x40eec0aa, (q31_t)0x3ffe42a4,
+    (q31_t)0x40fb514b, (q31_t)0x3ffe1288, (q31_t)0x4107e1e3, (q31_t)0x3ffddff3,
+    (q31_t)0x41147271, (q31_t)0x3ffdaae7, (q31_t)0x412102f4, (q31_t)0x3ffd7364,
+    (q31_t)0x412d936c, (q31_t)0x3ffd3969, (q31_t)0x413a23d8, (q31_t)0x3ffcfcf6,
+    (q31_t)0x4146b438, (q31_t)0x3ffcbe0c, (q31_t)0x4153448c, (q31_t)0x3ffc7caa,
+    (q31_t)0x415fd4d2, (q31_t)0x3ffc38d1, (q31_t)0x416c650b, (q31_t)0x3ffbf280,
+    (q31_t)0x4178f536, (q31_t)0x3ffba9b8, (q31_t)0x41858552, (q31_t)0x3ffb5e78,
+    (q31_t)0x4192155f, (q31_t)0x3ffb10c1, (q31_t)0x419ea55d, (q31_t)0x3ffac092,
+    (q31_t)0x41ab354b, (q31_t)0x3ffa6dec, (q31_t)0x41b7c528, (q31_t)0x3ffa18cf,
+    (q31_t)0x41c454f5, (q31_t)0x3ff9c13a, (q31_t)0x41d0e4b0, (q31_t)0x3ff9672d,
+    (q31_t)0x41dd7459, (q31_t)0x3ff90aaa, (q31_t)0x41ea03ef, (q31_t)0x3ff8abae,
+    (q31_t)0x41f69373, (q31_t)0x3ff84a3c, (q31_t)0x420322e3, (q31_t)0x3ff7e652,
+    (q31_t)0x420fb240, (q31_t)0x3ff77ff1, (q31_t)0x421c4188, (q31_t)0x3ff71718,
+    (q31_t)0x4228d0bb, (q31_t)0x3ff6abc8, (q31_t)0x42355fd9, (q31_t)0x3ff63e01,
+    (q31_t)0x4241eee2, (q31_t)0x3ff5cdc3, (q31_t)0x424e7dd4, (q31_t)0x3ff55b0d,
+    (q31_t)0x425b0caf, (q31_t)0x3ff4e5e0, (q31_t)0x42679b73, (q31_t)0x3ff46e3c,
+    (q31_t)0x42742a1f, (q31_t)0x3ff3f420, (q31_t)0x4280b8b3, (q31_t)0x3ff3778e,
+    (q31_t)0x428d472e, (q31_t)0x3ff2f884, (q31_t)0x4299d590, (q31_t)0x3ff27703,
+    (q31_t)0x42a663d8, (q31_t)0x3ff1f30b, (q31_t)0x42b2f207, (q31_t)0x3ff16c9c,
+    (q31_t)0x42bf801a, (q31_t)0x3ff0e3b6, (q31_t)0x42cc0e13, (q31_t)0x3ff05858,
+    (q31_t)0x42d89bf0, (q31_t)0x3fefca84, (q31_t)0x42e529b0, (q31_t)0x3fef3a39,
+    (q31_t)0x42f1b755, (q31_t)0x3feea776, (q31_t)0x42fe44dc, (q31_t)0x3fee123d,
+    (q31_t)0x430ad245, (q31_t)0x3fed7a8c, (q31_t)0x43175f91, (q31_t)0x3fece065,
+    (q31_t)0x4323ecbe, (q31_t)0x3fec43c7, (q31_t)0x433079cc, (q31_t)0x3feba4b2,
+    (q31_t)0x433d06bb, (q31_t)0x3feb0326, (q31_t)0x43499389, (q31_t)0x3fea5f23,
+    (q31_t)0x43562038, (q31_t)0x3fe9b8a9, (q31_t)0x4362acc5, (q31_t)0x3fe90fb9,
+    (q31_t)0x436f3931, (q31_t)0x3fe86452, (q31_t)0x437bc57b, (q31_t)0x3fe7b674,
+    (q31_t)0x438851a2, (q31_t)0x3fe7061f, (q31_t)0x4394dda7, (q31_t)0x3fe65354,
+    (q31_t)0x43a16988, (q31_t)0x3fe59e12, (q31_t)0x43adf546, (q31_t)0x3fe4e659,
+    (q31_t)0x43ba80df, (q31_t)0x3fe42c2a, (q31_t)0x43c70c54, (q31_t)0x3fe36f84,
+    (q31_t)0x43d397a3, (q31_t)0x3fe2b067, (q31_t)0x43e022cc, (q31_t)0x3fe1eed5,
+    (q31_t)0x43ecadcf, (q31_t)0x3fe12acb, (q31_t)0x43f938ac, (q31_t)0x3fe0644b,
+    (q31_t)0x4405c361, (q31_t)0x3fdf9b55, (q31_t)0x44124dee, (q31_t)0x3fdecfe8,
+    (q31_t)0x441ed854, (q31_t)0x3fde0205, (q31_t)0x442b6290, (q31_t)0x3fdd31ac,
+    (q31_t)0x4437eca4, (q31_t)0x3fdc5edc, (q31_t)0x4444768d, (q31_t)0x3fdb8996,
+    (q31_t)0x4451004d, (q31_t)0x3fdab1d9, (q31_t)0x445d89e2, (q31_t)0x3fd9d7a7,
+    (q31_t)0x446a134c, (q31_t)0x3fd8fafe, (q31_t)0x44769c8b, (q31_t)0x3fd81bdf,
+    (q31_t)0x4483259d, (q31_t)0x3fd73a4a, (q31_t)0x448fae83, (q31_t)0x3fd6563f,
+    (q31_t)0x449c373c, (q31_t)0x3fd56fbe, (q31_t)0x44a8bfc7, (q31_t)0x3fd486c7,
+    (q31_t)0x44b54825, (q31_t)0x3fd39b5a, (q31_t)0x44c1d054, (q31_t)0x3fd2ad77,
+    (q31_t)0x44ce5854, (q31_t)0x3fd1bd1e, (q31_t)0x44dae024, (q31_t)0x3fd0ca4f,
+    (q31_t)0x44e767c5, (q31_t)0x3fcfd50b, (q31_t)0x44f3ef35, (q31_t)0x3fcedd50,
+    (q31_t)0x45007674, (q31_t)0x3fcde320, (q31_t)0x450cfd82, (q31_t)0x3fcce67a,
+    (q31_t)0x4519845e, (q31_t)0x3fcbe75e, (q31_t)0x45260b08, (q31_t)0x3fcae5cd,
+    (q31_t)0x4532917f, (q31_t)0x3fc9e1c6, (q31_t)0x453f17c3, (q31_t)0x3fc8db4a,
+    (q31_t)0x454b9dd3, (q31_t)0x3fc7d258, (q31_t)0x455823ae, (q31_t)0x3fc6c6f0,
+    (q31_t)0x4564a955, (q31_t)0x3fc5b913, (q31_t)0x45712ec7, (q31_t)0x3fc4a8c1,
+    (q31_t)0x457db403, (q31_t)0x3fc395f9, (q31_t)0x458a3908, (q31_t)0x3fc280bc,
+    (q31_t)0x4596bdd7, (q31_t)0x3fc1690a, (q31_t)0x45a3426f, (q31_t)0x3fc04ee3,
+    (q31_t)0x45afc6d0, (q31_t)0x3fbf3246, (q31_t)0x45bc4af8, (q31_t)0x3fbe1334,
+    (q31_t)0x45c8cee7, (q31_t)0x3fbcf1ad, (q31_t)0x45d5529e, (q31_t)0x3fbbcdb1,
+    (q31_t)0x45e1d61b, (q31_t)0x3fbaa740, (q31_t)0x45ee595d, (q31_t)0x3fb97e5a,
+    (q31_t)0x45fadc66, (q31_t)0x3fb852ff, (q31_t)0x46075f33, (q31_t)0x3fb7252f,
+    (q31_t)0x4613e1c5, (q31_t)0x3fb5f4ea, (q31_t)0x4620641a, (q31_t)0x3fb4c231,
+    (q31_t)0x462ce634, (q31_t)0x3fb38d02, (q31_t)0x46396810, (q31_t)0x3fb2555f,
+    (q31_t)0x4645e9af, (q31_t)0x3fb11b48, (q31_t)0x46526b10, (q31_t)0x3fafdebb,
+    (q31_t)0x465eec33, (q31_t)0x3fae9fbb, (q31_t)0x466b6d16, (q31_t)0x3fad5e45,
+    (q31_t)0x4677edbb, (q31_t)0x3fac1a5b, (q31_t)0x46846e1f, (q31_t)0x3faad3fd,
+    (q31_t)0x4690ee44, (q31_t)0x3fa98b2a, (q31_t)0x469d6e27, (q31_t)0x3fa83fe3,
+    (q31_t)0x46a9edc9, (q31_t)0x3fa6f228, (q31_t)0x46b66d29, (q31_t)0x3fa5a1f9,
+    (q31_t)0x46c2ec48, (q31_t)0x3fa44f55, (q31_t)0x46cf6b23, (q31_t)0x3fa2fa3d,
+    (q31_t)0x46dbe9bb, (q31_t)0x3fa1a2b2, (q31_t)0x46e86810, (q31_t)0x3fa048b2,
+    (q31_t)0x46f4e620, (q31_t)0x3f9eec3e, (q31_t)0x470163eb, (q31_t)0x3f9d8d56,
+    (q31_t)0x470de172, (q31_t)0x3f9c2bfb, (q31_t)0x471a5eb3, (q31_t)0x3f9ac82c,
+    (q31_t)0x4726dbae, (q31_t)0x3f9961e8, (q31_t)0x47335862, (q31_t)0x3f97f932,
+    (q31_t)0x473fd4cf, (q31_t)0x3f968e07, (q31_t)0x474c50f4, (q31_t)0x3f952069,
+    (q31_t)0x4758ccd2, (q31_t)0x3f93b058, (q31_t)0x47654867, (q31_t)0x3f923dd2,
+    (q31_t)0x4771c3b3, (q31_t)0x3f90c8da, (q31_t)0x477e3eb5, (q31_t)0x3f8f516e,
+    (q31_t)0x478ab96e, (q31_t)0x3f8dd78f, (q31_t)0x479733dc, (q31_t)0x3f8c5b3d,
+    (q31_t)0x47a3adff, (q31_t)0x3f8adc77, (q31_t)0x47b027d7, (q31_t)0x3f895b3e,
+    (q31_t)0x47bca163, (q31_t)0x3f87d792, (q31_t)0x47c91aa3, (q31_t)0x3f865174,
+    (q31_t)0x47d59396, (q31_t)0x3f84c8e2, (q31_t)0x47e20c3b, (q31_t)0x3f833ddd,
+    (q31_t)0x47ee8493, (q31_t)0x3f81b065, (q31_t)0x47fafc9c, (q31_t)0x3f80207b,
+    (q31_t)0x48077457, (q31_t)0x3f7e8e1e, (q31_t)0x4813ebc2, (q31_t)0x3f7cf94e,
+    (q31_t)0x482062de, (q31_t)0x3f7b620c, (q31_t)0x482cd9a9, (q31_t)0x3f79c857,
+    (q31_t)0x48395024, (q31_t)0x3f782c30, (q31_t)0x4845c64d, (q31_t)0x3f768d96,
+    (q31_t)0x48523c25, (q31_t)0x3f74ec8a, (q31_t)0x485eb1ab, (q31_t)0x3f73490b,
+    (q31_t)0x486b26de, (q31_t)0x3f71a31b, (q31_t)0x48779bbe, (q31_t)0x3f6ffab8,
+    (q31_t)0x4884104b, (q31_t)0x3f6e4fe3, (q31_t)0x48908483, (q31_t)0x3f6ca29c,
+    (q31_t)0x489cf867, (q31_t)0x3f6af2e3, (q31_t)0x48a96bf6, (q31_t)0x3f6940b8,
+    (q31_t)0x48b5df30, (q31_t)0x3f678c1c, (q31_t)0x48c25213, (q31_t)0x3f65d50d,
+    (q31_t)0x48cec4a0, (q31_t)0x3f641b8d, (q31_t)0x48db36d6, (q31_t)0x3f625f9b,
+    (q31_t)0x48e7a8b5, (q31_t)0x3f60a138, (q31_t)0x48f41a3c, (q31_t)0x3f5ee063,
+    (q31_t)0x49008b6a, (q31_t)0x3f5d1d1d, (q31_t)0x490cfc40, (q31_t)0x3f5b5765,
+    (q31_t)0x49196cbc, (q31_t)0x3f598f3c, (q31_t)0x4925dcdf, (q31_t)0x3f57c4a2,
+    (q31_t)0x49324ca7, (q31_t)0x3f55f796, (q31_t)0x493ebc14, (q31_t)0x3f54281a,
+    (q31_t)0x494b2b27, (q31_t)0x3f52562c, (q31_t)0x495799dd, (q31_t)0x3f5081cd,
+    (q31_t)0x49640837, (q31_t)0x3f4eaafe, (q31_t)0x49707635, (q31_t)0x3f4cd1be,
+    (q31_t)0x497ce3d5, (q31_t)0x3f4af60d, (q31_t)0x49895118, (q31_t)0x3f4917eb,
+    (q31_t)0x4995bdfd, (q31_t)0x3f473759, (q31_t)0x49a22a83, (q31_t)0x3f455456,
+    (q31_t)0x49ae96aa, (q31_t)0x3f436ee3, (q31_t)0x49bb0271, (q31_t)0x3f4186ff,
+    (q31_t)0x49c76dd8, (q31_t)0x3f3f9cab, (q31_t)0x49d3d8df, (q31_t)0x3f3dafe7,
+    (q31_t)0x49e04385, (q31_t)0x3f3bc0b3, (q31_t)0x49ecadc9, (q31_t)0x3f39cf0e,
+    (q31_t)0x49f917ac, (q31_t)0x3f37dafa, (q31_t)0x4a05812c, (q31_t)0x3f35e476,
+    (q31_t)0x4a11ea49, (q31_t)0x3f33eb81, (q31_t)0x4a1e5303, (q31_t)0x3f31f01d,
+    (q31_t)0x4a2abb59, (q31_t)0x3f2ff24a, (q31_t)0x4a37234a, (q31_t)0x3f2df206,
+    (q31_t)0x4a438ad7, (q31_t)0x3f2bef53, (q31_t)0x4a4ff1fe, (q31_t)0x3f29ea31,
+    (q31_t)0x4a5c58c0, (q31_t)0x3f27e29f, (q31_t)0x4a68bf1b, (q31_t)0x3f25d89e,
+    (q31_t)0x4a752510, (q31_t)0x3f23cc2e, (q31_t)0x4a818a9d, (q31_t)0x3f21bd4e,
+    (q31_t)0x4a8defc3, (q31_t)0x3f1fabff, (q31_t)0x4a9a5480, (q31_t)0x3f1d9842,
+    (q31_t)0x4aa6b8d5, (q31_t)0x3f1b8215, (q31_t)0x4ab31cc1, (q31_t)0x3f19697a,
+    (q31_t)0x4abf8043, (q31_t)0x3f174e70, (q31_t)0x4acbe35b, (q31_t)0x3f1530f7,
+    (q31_t)0x4ad84609, (q31_t)0x3f13110f, (q31_t)0x4ae4a84b, (q31_t)0x3f10eeb9,
+    (q31_t)0x4af10a22, (q31_t)0x3f0ec9f5, (q31_t)0x4afd6b8d, (q31_t)0x3f0ca2c2,
+    (q31_t)0x4b09cc8c, (q31_t)0x3f0a7921, (q31_t)0x4b162d1d, (q31_t)0x3f084d12,
+    (q31_t)0x4b228d42, (q31_t)0x3f061e95, (q31_t)0x4b2eecf8, (q31_t)0x3f03eda9,
+    (q31_t)0x4b3b4c40, (q31_t)0x3f01ba50, (q31_t)0x4b47ab19, (q31_t)0x3eff8489,
+    (q31_t)0x4b540982, (q31_t)0x3efd4c54, (q31_t)0x4b60677c, (q31_t)0x3efb11b1,
+    (q31_t)0x4b6cc506, (q31_t)0x3ef8d4a1, (q31_t)0x4b79221f, (q31_t)0x3ef69523,
+    (q31_t)0x4b857ec7, (q31_t)0x3ef45338, (q31_t)0x4b91dafc, (q31_t)0x3ef20ee0,
+    (q31_t)0x4b9e36c0, (q31_t)0x3eefc81a, (q31_t)0x4baa9211, (q31_t)0x3eed7ee7,
+    (q31_t)0x4bb6ecef, (q31_t)0x3eeb3347, (q31_t)0x4bc34759, (q31_t)0x3ee8e53a,
+    (q31_t)0x4bcfa150, (q31_t)0x3ee694c1, (q31_t)0x4bdbfad1, (q31_t)0x3ee441da,
+    (q31_t)0x4be853de, (q31_t)0x3ee1ec87, (q31_t)0x4bf4ac75, (q31_t)0x3edf94c7,
+    (q31_t)0x4c010496, (q31_t)0x3edd3a9a, (q31_t)0x4c0d5c41, (q31_t)0x3edade01,
+    (q31_t)0x4c19b374, (q31_t)0x3ed87efc, (q31_t)0x4c260a31, (q31_t)0x3ed61d8a,
+    (q31_t)0x4c326075, (q31_t)0x3ed3b9ad, (q31_t)0x4c3eb641, (q31_t)0x3ed15363,
+    (q31_t)0x4c4b0b94, (q31_t)0x3eceeaad, (q31_t)0x4c57606e, (q31_t)0x3ecc7f8b,
+    (q31_t)0x4c63b4ce, (q31_t)0x3eca11fe, (q31_t)0x4c7008b3, (q31_t)0x3ec7a205,
+    (q31_t)0x4c7c5c1e, (q31_t)0x3ec52fa0, (q31_t)0x4c88af0e, (q31_t)0x3ec2bad0,
+    (q31_t)0x4c950182, (q31_t)0x3ec04394, (q31_t)0x4ca1537a, (q31_t)0x3ebdc9ed,
+    (q31_t)0x4cada4f5, (q31_t)0x3ebb4ddb, (q31_t)0x4cb9f5f3, (q31_t)0x3eb8cf5d,
+    (q31_t)0x4cc64673, (q31_t)0x3eb64e75, (q31_t)0x4cd29676, (q31_t)0x3eb3cb21,
+    (q31_t)0x4cdee5f9, (q31_t)0x3eb14563, (q31_t)0x4ceb34fe, (q31_t)0x3eaebd3a,
+    (q31_t)0x4cf78383, (q31_t)0x3eac32a6, (q31_t)0x4d03d189, (q31_t)0x3ea9a5a8,
+    (q31_t)0x4d101f0e, (q31_t)0x3ea7163f, (q31_t)0x4d1c6c11, (q31_t)0x3ea4846c,
+    (q31_t)0x4d28b894, (q31_t)0x3ea1f02f, (q31_t)0x4d350495, (q31_t)0x3e9f5988,
+    (q31_t)0x4d415013, (q31_t)0x3e9cc076, (q31_t)0x4d4d9b0e, (q31_t)0x3e9a24fb,
+    (q31_t)0x4d59e586, (q31_t)0x3e978715, (q31_t)0x4d662f7b, (q31_t)0x3e94e6c6,
+    (q31_t)0x4d7278eb, (q31_t)0x3e92440d, (q31_t)0x4d7ec1d6, (q31_t)0x3e8f9eeb,
+    (q31_t)0x4d8b0a3d, (q31_t)0x3e8cf75f, (q31_t)0x4d97521d, (q31_t)0x3e8a4d6a,
+    (q31_t)0x4da39978, (q31_t)0x3e87a10c, (q31_t)0x4dafe04b, (q31_t)0x3e84f245,
+    (q31_t)0x4dbc2698, (q31_t)0x3e824114, (q31_t)0x4dc86c5d, (q31_t)0x3e7f8d7b,
+    (q31_t)0x4dd4b19a, (q31_t)0x3e7cd778, (q31_t)0x4de0f64f, (q31_t)0x3e7a1f0d,
+    (q31_t)0x4ded3a7b, (q31_t)0x3e77643a, (q31_t)0x4df97e1d, (q31_t)0x3e74a6fd,
+    (q31_t)0x4e05c135, (q31_t)0x3e71e759, (q31_t)0x4e1203c3, (q31_t)0x3e6f254c,
+    (q31_t)0x4e1e45c6, (q31_t)0x3e6c60d7, (q31_t)0x4e2a873e, (q31_t)0x3e6999fa,
+    (q31_t)0x4e36c82a, (q31_t)0x3e66d0b4, (q31_t)0x4e430889, (q31_t)0x3e640507,
+    (q31_t)0x4e4f485c, (q31_t)0x3e6136f3, (q31_t)0x4e5b87a2, (q31_t)0x3e5e6676,
+    (q31_t)0x4e67c65a, (q31_t)0x3e5b9392, (q31_t)0x4e740483, (q31_t)0x3e58be47,
+    (q31_t)0x4e80421e, (q31_t)0x3e55e694, (q31_t)0x4e8c7f2a, (q31_t)0x3e530c7a,
+    (q31_t)0x4e98bba7, (q31_t)0x3e502ff9, (q31_t)0x4ea4f793, (q31_t)0x3e4d5110,
+    (q31_t)0x4eb132ef, (q31_t)0x3e4a6fc1, (q31_t)0x4ebd6db9, (q31_t)0x3e478c0b,
+    (q31_t)0x4ec9a7f3, (q31_t)0x3e44a5ef, (q31_t)0x4ed5e19a, (q31_t)0x3e41bd6c,
+    (q31_t)0x4ee21aaf, (q31_t)0x3e3ed282, (q31_t)0x4eee5331, (q31_t)0x3e3be532,
+    (q31_t)0x4efa8b20, (q31_t)0x3e38f57c, (q31_t)0x4f06c27a, (q31_t)0x3e360360,
+    (q31_t)0x4f12f941, (q31_t)0x3e330ede, (q31_t)0x4f1f2f73, (q31_t)0x3e3017f6,
+    (q31_t)0x4f2b650f, (q31_t)0x3e2d1ea8, (q31_t)0x4f379a16, (q31_t)0x3e2a22f4,
+    (q31_t)0x4f43ce86, (q31_t)0x3e2724db, (q31_t)0x4f500260, (q31_t)0x3e24245d,
+    (q31_t)0x4f5c35a3, (q31_t)0x3e212179, (q31_t)0x4f68684e, (q31_t)0x3e1e1c30,
+    (q31_t)0x4f749a61, (q31_t)0x3e1b1482, (q31_t)0x4f80cbdc, (q31_t)0x3e180a6f,
+    (q31_t)0x4f8cfcbe, (q31_t)0x3e14fdf7, (q31_t)0x4f992d06, (q31_t)0x3e11ef1b,
+    (q31_t)0x4fa55cb4, (q31_t)0x3e0eddd9, (q31_t)0x4fb18bc8, (q31_t)0x3e0bca34,
+    (q31_t)0x4fbdba40, (q31_t)0x3e08b42a, (q31_t)0x4fc9e81e, (q31_t)0x3e059bbb,
+    (q31_t)0x4fd6155f, (q31_t)0x3e0280e9, (q31_t)0x4fe24205, (q31_t)0x3dff63b2,
+    (q31_t)0x4fee6e0d, (q31_t)0x3dfc4418, (q31_t)0x4ffa9979, (q31_t)0x3df9221a,
+    (q31_t)0x5006c446, (q31_t)0x3df5fdb8, (q31_t)0x5012ee76, (q31_t)0x3df2d6f3,
+    (q31_t)0x501f1807, (q31_t)0x3defadca, (q31_t)0x502b40f8, (q31_t)0x3dec823e,
+    (q31_t)0x5037694b, (q31_t)0x3de9544f, (q31_t)0x504390fd, (q31_t)0x3de623fd,
+    (q31_t)0x504fb80e, (q31_t)0x3de2f148, (q31_t)0x505bde7f, (q31_t)0x3ddfbc30,
+    (q31_t)0x5068044e, (q31_t)0x3ddc84b5, (q31_t)0x5074297b, (q31_t)0x3dd94ad8,
+    (q31_t)0x50804e06, (q31_t)0x3dd60e99, (q31_t)0x508c71ee, (q31_t)0x3dd2cff7,
+    (q31_t)0x50989532, (q31_t)0x3dcf8ef3, (q31_t)0x50a4b7d3, (q31_t)0x3dcc4b8d,
+    (q31_t)0x50b0d9d0, (q31_t)0x3dc905c5, (q31_t)0x50bcfb28, (q31_t)0x3dc5bd9b,
+    (q31_t)0x50c91bda, (q31_t)0x3dc2730f, (q31_t)0x50d53be7, (q31_t)0x3dbf2622,
+    (q31_t)0x50e15b4e, (q31_t)0x3dbbd6d4, (q31_t)0x50ed7a0e, (q31_t)0x3db88524,
+    (q31_t)0x50f99827, (q31_t)0x3db53113, (q31_t)0x5105b599, (q31_t)0x3db1daa2,
+    (q31_t)0x5111d263, (q31_t)0x3dae81cf, (q31_t)0x511dee84, (q31_t)0x3dab269b,
+    (q31_t)0x512a09fc, (q31_t)0x3da7c907, (q31_t)0x513624cb, (q31_t)0x3da46912,
+    (q31_t)0x51423ef0, (q31_t)0x3da106bd, (q31_t)0x514e586a, (q31_t)0x3d9da208,
+    (q31_t)0x515a713a, (q31_t)0x3d9a3af2, (q31_t)0x5166895f, (q31_t)0x3d96d17d,
+    (q31_t)0x5172a0d7, (q31_t)0x3d9365a8, (q31_t)0x517eb7a4, (q31_t)0x3d8ff772,
+    (q31_t)0x518acdc4, (q31_t)0x3d8c86de, (q31_t)0x5196e337, (q31_t)0x3d8913ea,
+    (q31_t)0x51a2f7fc, (q31_t)0x3d859e96, (q31_t)0x51af0c13, (q31_t)0x3d8226e4,
+    (q31_t)0x51bb1f7c, (q31_t)0x3d7eacd2, (q31_t)0x51c73235, (q31_t)0x3d7b3061,
+    (q31_t)0x51d3443f, (q31_t)0x3d77b192, (q31_t)0x51df5599, (q31_t)0x3d743064,
+    (q31_t)0x51eb6643, (q31_t)0x3d70acd7, (q31_t)0x51f7763c, (q31_t)0x3d6d26ec,
+    (q31_t)0x52038584, (q31_t)0x3d699ea3, (q31_t)0x520f941a, (q31_t)0x3d6613fb,
+    (q31_t)0x521ba1fd, (q31_t)0x3d6286f6, (q31_t)0x5227af2e, (q31_t)0x3d5ef793,
+    (q31_t)0x5233bbac, (q31_t)0x3d5b65d2, (q31_t)0x523fc776, (q31_t)0x3d57d1b3,
+    (q31_t)0x524bd28c, (q31_t)0x3d543b37, (q31_t)0x5257dced, (q31_t)0x3d50a25e,
+    (q31_t)0x5263e699, (q31_t)0x3d4d0728, (q31_t)0x526fef90, (q31_t)0x3d496994,
+    (q31_t)0x527bf7d1, (q31_t)0x3d45c9a4, (q31_t)0x5287ff5b, (q31_t)0x3d422757,
+    (q31_t)0x5294062f, (q31_t)0x3d3e82ae, (q31_t)0x52a00c4b, (q31_t)0x3d3adba7,
+    (q31_t)0x52ac11af, (q31_t)0x3d373245, (q31_t)0x52b8165b, (q31_t)0x3d338687,
+    (q31_t)0x52c41a4f, (q31_t)0x3d2fd86c, (q31_t)0x52d01d89, (q31_t)0x3d2c27f6,
+    (q31_t)0x52dc2009, (q31_t)0x3d287523, (q31_t)0x52e821cf, (q31_t)0x3d24bff6,
+    (q31_t)0x52f422db, (q31_t)0x3d21086c, (q31_t)0x5300232c, (q31_t)0x3d1d4e88,
+    (q31_t)0x530c22c1, (q31_t)0x3d199248, (q31_t)0x5318219a, (q31_t)0x3d15d3ad,
+    (q31_t)0x53241fb6, (q31_t)0x3d1212b7, (q31_t)0x53301d16, (q31_t)0x3d0e4f67,
+    (q31_t)0x533c19b8, (q31_t)0x3d0a89bc, (q31_t)0x5348159d, (q31_t)0x3d06c1b6,
+    (q31_t)0x535410c3, (q31_t)0x3d02f757, (q31_t)0x53600b2a, (q31_t)0x3cff2a9d,
+    (q31_t)0x536c04d2, (q31_t)0x3cfb5b89, (q31_t)0x5377fdbb, (q31_t)0x3cf78a1b,
+    (q31_t)0x5383f5e3, (q31_t)0x3cf3b653, (q31_t)0x538fed4b, (q31_t)0x3cefe032,
+    (q31_t)0x539be3f2, (q31_t)0x3cec07b8, (q31_t)0x53a7d9d7, (q31_t)0x3ce82ce4,
+    (q31_t)0x53b3cefa, (q31_t)0x3ce44fb7, (q31_t)0x53bfc35b, (q31_t)0x3ce07031,
+    (q31_t)0x53cbb6f8, (q31_t)0x3cdc8e52, (q31_t)0x53d7a9d3, (q31_t)0x3cd8aa1b,
+    (q31_t)0x53e39be9, (q31_t)0x3cd4c38b, (q31_t)0x53ef8d3c, (q31_t)0x3cd0daa2,
+    (q31_t)0x53fb7dc9, (q31_t)0x3cccef62, (q31_t)0x54076d91, (q31_t)0x3cc901c9,
+    (q31_t)0x54135c94, (q31_t)0x3cc511d9, (q31_t)0x541f4ad1, (q31_t)0x3cc11f90,
+    (q31_t)0x542b3846, (q31_t)0x3cbd2af0, (q31_t)0x543724f5, (q31_t)0x3cb933f9,
+    (q31_t)0x544310dd, (q31_t)0x3cb53aaa, (q31_t)0x544efbfc, (q31_t)0x3cb13f04,
+    (q31_t)0x545ae653, (q31_t)0x3cad4107, (q31_t)0x5466cfe1, (q31_t)0x3ca940b3,
+    (q31_t)0x5472b8a5, (q31_t)0x3ca53e09, (q31_t)0x547ea0a0, (q31_t)0x3ca13908,
+    (q31_t)0x548a87d1, (q31_t)0x3c9d31b0, (q31_t)0x54966e36, (q31_t)0x3c992803,
+    (q31_t)0x54a253d1, (q31_t)0x3c951bff, (q31_t)0x54ae38a0, (q31_t)0x3c910da5,
+    (q31_t)0x54ba1ca3, (q31_t)0x3c8cfcf6, (q31_t)0x54c5ffd9, (q31_t)0x3c88e9f1,
+    (q31_t)0x54d1e242, (q31_t)0x3c84d496, (q31_t)0x54ddc3de, (q31_t)0x3c80bce7,
+    (q31_t)0x54e9a4ac, (q31_t)0x3c7ca2e2, (q31_t)0x54f584ac, (q31_t)0x3c788688,
+    (q31_t)0x550163dc, (q31_t)0x3c7467d9, (q31_t)0x550d423d, (q31_t)0x3c7046d6,
+    (q31_t)0x55191fcf, (q31_t)0x3c6c237e, (q31_t)0x5524fc90, (q31_t)0x3c67fdd1,
+    (q31_t)0x5530d881, (q31_t)0x3c63d5d1, (q31_t)0x553cb3a0, (q31_t)0x3c5fab7c,
+    (q31_t)0x55488dee, (q31_t)0x3c5b7ed4, (q31_t)0x5554676a, (q31_t)0x3c574fd8,
+    (q31_t)0x55604013, (q31_t)0x3c531e88, (q31_t)0x556c17e9, (q31_t)0x3c4eeae5,
+    (q31_t)0x5577eeec, (q31_t)0x3c4ab4ef, (q31_t)0x5583c51b, (q31_t)0x3c467ca6,
+    (q31_t)0x558f9a76, (q31_t)0x3c42420a, (q31_t)0x559b6efb, (q31_t)0x3c3e051b,
+    (q31_t)0x55a742ac, (q31_t)0x3c39c5da, (q31_t)0x55b31587, (q31_t)0x3c358446,
+    (q31_t)0x55bee78c, (q31_t)0x3c314060, (q31_t)0x55cab8ba, (q31_t)0x3c2cfa28,
+    (q31_t)0x55d68911, (q31_t)0x3c28b19e, (q31_t)0x55e25890, (q31_t)0x3c2466c2,
+    (q31_t)0x55ee2738, (q31_t)0x3c201994, (q31_t)0x55f9f507, (q31_t)0x3c1bca16,
+    (q31_t)0x5605c1fd, (q31_t)0x3c177845, (q31_t)0x56118e1a, (q31_t)0x3c132424,
+    (q31_t)0x561d595d, (q31_t)0x3c0ecdb2, (q31_t)0x562923c5, (q31_t)0x3c0a74f0,
+    (q31_t)0x5634ed53, (q31_t)0x3c0619dc, (q31_t)0x5640b606, (q31_t)0x3c01bc78,
+    (q31_t)0x564c7ddd, (q31_t)0x3bfd5cc4, (q31_t)0x565844d8, (q31_t)0x3bf8fac0,
+    (q31_t)0x56640af7, (q31_t)0x3bf4966c, (q31_t)0x566fd039, (q31_t)0x3bf02fc9,
+    (q31_t)0x567b949d, (q31_t)0x3bebc6d5, (q31_t)0x56875823, (q31_t)0x3be75b93,
+    (q31_t)0x56931acb, (q31_t)0x3be2ee01, (q31_t)0x569edc94, (q31_t)0x3bde7e20,
+    (q31_t)0x56aa9d7e, (q31_t)0x3bda0bf0, (q31_t)0x56b65d88, (q31_t)0x3bd59771,
+    (q31_t)0x56c21cb2, (q31_t)0x3bd120a4, (q31_t)0x56cddafb, (q31_t)0x3bcca789,
+    (q31_t)0x56d99864, (q31_t)0x3bc82c1f, (q31_t)0x56e554ea, (q31_t)0x3bc3ae67,
+    (q31_t)0x56f1108f, (q31_t)0x3bbf2e62, (q31_t)0x56fccb51, (q31_t)0x3bbaac0e,
+    (q31_t)0x57088531, (q31_t)0x3bb6276e, (q31_t)0x57143e2d, (q31_t)0x3bb1a080,
+    (q31_t)0x571ff646, (q31_t)0x3bad1744, (q31_t)0x572bad7a, (q31_t)0x3ba88bbc,
+    (q31_t)0x573763c9, (q31_t)0x3ba3fde7, (q31_t)0x57431933, (q31_t)0x3b9f6dc5,
+    (q31_t)0x574ecdb8, (q31_t)0x3b9adb57, (q31_t)0x575a8157, (q31_t)0x3b96469d,
+    (q31_t)0x5766340f, (q31_t)0x3b91af97, (q31_t)0x5771e5e0, (q31_t)0x3b8d1644,
+    (q31_t)0x577d96ca, (q31_t)0x3b887aa6, (q31_t)0x578946cc, (q31_t)0x3b83dcbc,
+    (q31_t)0x5794f5e6, (q31_t)0x3b7f3c87, (q31_t)0x57a0a417, (q31_t)0x3b7a9a07,
+    (q31_t)0x57ac515f, (q31_t)0x3b75f53c, (q31_t)0x57b7fdbd, (q31_t)0x3b714e25,
+    (q31_t)0x57c3a931, (q31_t)0x3b6ca4c4, (q31_t)0x57cf53bb, (q31_t)0x3b67f919,
+    (q31_t)0x57dafd59, (q31_t)0x3b634b23, (q31_t)0x57e6a60c, (q31_t)0x3b5e9ae4,
+    (q31_t)0x57f24dd3, (q31_t)0x3b59e85a, (q31_t)0x57fdf4ae, (q31_t)0x3b553386,
+    (q31_t)0x58099a9c, (q31_t)0x3b507c69, (q31_t)0x58153f9d, (q31_t)0x3b4bc303,
+    (q31_t)0x5820e3b0, (q31_t)0x3b470753, (q31_t)0x582c86d5, (q31_t)0x3b42495a,
+    (q31_t)0x5838290c, (q31_t)0x3b3d8918, (q31_t)0x5843ca53, (q31_t)0x3b38c68e,
+    (q31_t)0x584f6aab, (q31_t)0x3b3401bb, (q31_t)0x585b0a13, (q31_t)0x3b2f3aa0,
+    (q31_t)0x5866a88a, (q31_t)0x3b2a713d, (q31_t)0x58724611, (q31_t)0x3b25a591,
+    (q31_t)0x587de2a7, (q31_t)0x3b20d79e, (q31_t)0x58897e4a, (q31_t)0x3b1c0764,
+    (q31_t)0x589518fc, (q31_t)0x3b1734e2, (q31_t)0x58a0b2bb, (q31_t)0x3b126019,
+    (q31_t)0x58ac4b87, (q31_t)0x3b0d8909, (q31_t)0x58b7e35f, (q31_t)0x3b08afb2,
+    (q31_t)0x58c37a44, (q31_t)0x3b03d414, (q31_t)0x58cf1034, (q31_t)0x3afef630,
+    (q31_t)0x58daa52f, (q31_t)0x3afa1605, (q31_t)0x58e63935, (q31_t)0x3af53395,
+    (q31_t)0x58f1cc45, (q31_t)0x3af04edf, (q31_t)0x58fd5e5f, (q31_t)0x3aeb67e3,
+    (q31_t)0x5908ef82, (q31_t)0x3ae67ea1, (q31_t)0x59147fae, (q31_t)0x3ae1931a,
+    (q31_t)0x59200ee3, (q31_t)0x3adca54e, (q31_t)0x592b9d1f, (q31_t)0x3ad7b53d,
+    (q31_t)0x59372a64, (q31_t)0x3ad2c2e8, (q31_t)0x5942b6af, (q31_t)0x3acdce4d,
+    (q31_t)0x594e4201, (q31_t)0x3ac8d76f, (q31_t)0x5959cc5a, (q31_t)0x3ac3de4c,
+    (q31_t)0x596555b8, (q31_t)0x3abee2e5, (q31_t)0x5970de1b, (q31_t)0x3ab9e53a,
+    (q31_t)0x597c6584, (q31_t)0x3ab4e54c, (q31_t)0x5987ebf0, (q31_t)0x3aafe31b,
+    (q31_t)0x59937161, (q31_t)0x3aaadea6, (q31_t)0x599ef5d6, (q31_t)0x3aa5d7ee,
+    (q31_t)0x59aa794d, (q31_t)0x3aa0cef3, (q31_t)0x59b5fbc8, (q31_t)0x3a9bc3b6,
+    (q31_t)0x59c17d44, (q31_t)0x3a96b636, (q31_t)0x59ccfdc2, (q31_t)0x3a91a674,
+    (q31_t)0x59d87d42, (q31_t)0x3a8c9470, (q31_t)0x59e3fbc3, (q31_t)0x3a87802a,
+    (q31_t)0x59ef7944, (q31_t)0x3a8269a3, (q31_t)0x59faf5c5, (q31_t)0x3a7d50da,
+    (q31_t)0x5a067145, (q31_t)0x3a7835cf, (q31_t)0x5a11ebc5, (q31_t)0x3a731884,
+    (q31_t)0x5a1d6544, (q31_t)0x3a6df8f8, (q31_t)0x5a28ddc0, (q31_t)0x3a68d72b,
+    (q31_t)0x5a34553b, (q31_t)0x3a63b31d, (q31_t)0x5a3fcbb3, (q31_t)0x3a5e8cd0,
+    (q31_t)0x5a4b4128, (q31_t)0x3a596442, (q31_t)0x5a56b599, (q31_t)0x3a543974,
+    (q31_t)0x5a622907, (q31_t)0x3a4f0c67, (q31_t)0x5a6d9b70, (q31_t)0x3a49dd1a,
+    (q31_t)0x5a790cd4, (q31_t)0x3a44ab8e, (q31_t)0x5a847d33, (q31_t)0x3a3f77c3,
+    (q31_t)0x5a8fec8c, (q31_t)0x3a3a41b9, (q31_t)0x5a9b5adf, (q31_t)0x3a350970,
+    (q31_t)0x5aa6c82b, (q31_t)0x3a2fcee8, (q31_t)0x5ab23471, (q31_t)0x3a2a9223,
+    (q31_t)0x5abd9faf, (q31_t)0x3a25531f, (q31_t)0x5ac909e5, (q31_t)0x3a2011de,
+    (q31_t)0x5ad47312, (q31_t)0x3a1ace5f, (q31_t)0x5adfdb37, (q31_t)0x3a1588a2,
+    (q31_t)0x5aeb4253, (q31_t)0x3a1040a8, (q31_t)0x5af6a865, (q31_t)0x3a0af671,
+    (q31_t)0x5b020d6c, (q31_t)0x3a05a9fd, (q31_t)0x5b0d716a, (q31_t)0x3a005b4d,
+    (q31_t)0x5b18d45c, (q31_t)0x39fb0a60, (q31_t)0x5b243643, (q31_t)0x39f5b737,
+    (q31_t)0x5b2f971e, (q31_t)0x39f061d2, (q31_t)0x5b3af6ec, (q31_t)0x39eb0a31,
+    (q31_t)0x5b4655ae, (q31_t)0x39e5b054, (q31_t)0x5b51b363, (q31_t)0x39e0543c,
+    (q31_t)0x5b5d100a, (q31_t)0x39daf5e8, (q31_t)0x5b686ba3, (q31_t)0x39d5955a,
+    (q31_t)0x5b73c62d, (q31_t)0x39d03291, (q31_t)0x5b7f1fa9, (q31_t)0x39cacd8d,
+    (q31_t)0x5b8a7815, (q31_t)0x39c5664f, (q31_t)0x5b95cf71, (q31_t)0x39bffcd7,
+    (q31_t)0x5ba125bd, (q31_t)0x39ba9125, (q31_t)0x5bac7af9, (q31_t)0x39b52339,
+    (q31_t)0x5bb7cf23, (q31_t)0x39afb313, (q31_t)0x5bc3223c, (q31_t)0x39aa40b4,
+    (q31_t)0x5bce7442, (q31_t)0x39a4cc1c, (q31_t)0x5bd9c537, (q31_t)0x399f554b,
+    (q31_t)0x5be51518, (q31_t)0x3999dc42, (q31_t)0x5bf063e6, (q31_t)0x399460ff,
+    (q31_t)0x5bfbb1a0, (q31_t)0x398ee385, (q31_t)0x5c06fe46, (q31_t)0x398963d2,
+    (q31_t)0x5c1249d8, (q31_t)0x3983e1e8, (q31_t)0x5c1d9454, (q31_t)0x397e5dc6,
+    (q31_t)0x5c28ddbb, (q31_t)0x3978d76c, (q31_t)0x5c34260c, (q31_t)0x39734edc,
+    (q31_t)0x5c3f6d47, (q31_t)0x396dc414, (q31_t)0x5c4ab36b, (q31_t)0x39683715,
+    (q31_t)0x5c55f878, (q31_t)0x3962a7e0, (q31_t)0x5c613c6d, (q31_t)0x395d1675,
+    (q31_t)0x5c6c7f4a, (q31_t)0x395782d3, (q31_t)0x5c77c10e, (q31_t)0x3951ecfc,
+    (q31_t)0x5c8301b9, (q31_t)0x394c54ee, (q31_t)0x5c8e414b, (q31_t)0x3946baac,
+    (q31_t)0x5c997fc4, (q31_t)0x39411e33, (q31_t)0x5ca4bd21, (q31_t)0x393b7f86,
+    (q31_t)0x5caff965, (q31_t)0x3935dea4, (q31_t)0x5cbb348d, (q31_t)0x39303b8e,
+    (q31_t)0x5cc66e99, (q31_t)0x392a9642, (q31_t)0x5cd1a78a, (q31_t)0x3924eec3,
+    (q31_t)0x5cdcdf5e, (q31_t)0x391f4510, (q31_t)0x5ce81615, (q31_t)0x39199929,
+    (q31_t)0x5cf34baf, (q31_t)0x3913eb0e, (q31_t)0x5cfe802b, (q31_t)0x390e3ac0,
+    (q31_t)0x5d09b389, (q31_t)0x3908883f, (q31_t)0x5d14e5c9, (q31_t)0x3902d38b,
+    (q31_t)0x5d2016e9, (q31_t)0x38fd1ca4, (q31_t)0x5d2b46ea, (q31_t)0x38f7638b,
+    (q31_t)0x5d3675cb, (q31_t)0x38f1a840, (q31_t)0x5d41a38c, (q31_t)0x38ebeac2,
+    (q31_t)0x5d4cd02c, (q31_t)0x38e62b13, (q31_t)0x5d57fbaa, (q31_t)0x38e06932,
+    (q31_t)0x5d632608, (q31_t)0x38daa520, (q31_t)0x5d6e4f43, (q31_t)0x38d4dedd,
+    (q31_t)0x5d79775c, (q31_t)0x38cf1669, (q31_t)0x5d849e51, (q31_t)0x38c94bc4,
+    (q31_t)0x5d8fc424, (q31_t)0x38c37eef, (q31_t)0x5d9ae8d2, (q31_t)0x38bdafea,
+    (q31_t)0x5da60c5d, (q31_t)0x38b7deb4, (q31_t)0x5db12ec3, (q31_t)0x38b20b4f,
+    (q31_t)0x5dbc5004, (q31_t)0x38ac35ba, (q31_t)0x5dc7701f, (q31_t)0x38a65df6,
+    (q31_t)0x5dd28f15, (q31_t)0x38a08402, (q31_t)0x5dddace4, (q31_t)0x389aa7e0,
+    (q31_t)0x5de8c98c, (q31_t)0x3894c98f, (q31_t)0x5df3e50d, (q31_t)0x388ee910,
+    (q31_t)0x5dfeff67, (q31_t)0x38890663, (q31_t)0x5e0a1898, (q31_t)0x38832187,
+    (q31_t)0x5e1530a1, (q31_t)0x387d3a7e, (q31_t)0x5e204781, (q31_t)0x38775147,
+    (q31_t)0x5e2b5d38, (q31_t)0x387165e3, (q31_t)0x5e3671c5, (q31_t)0x386b7852,
+    (q31_t)0x5e418528, (q31_t)0x38658894, (q31_t)0x5e4c9760, (q31_t)0x385f96a9,
+    (q31_t)0x5e57a86d, (q31_t)0x3859a292, (q31_t)0x5e62b84f, (q31_t)0x3853ac4f,
+    (q31_t)0x5e6dc705, (q31_t)0x384db3e0, (q31_t)0x5e78d48e, (q31_t)0x3847b946,
+    (q31_t)0x5e83e0eb, (q31_t)0x3841bc7f, (q31_t)0x5e8eec1b, (q31_t)0x383bbd8e,
+    (q31_t)0x5e99f61d, (q31_t)0x3835bc71, (q31_t)0x5ea4fef0, (q31_t)0x382fb92a,
+    (q31_t)0x5eb00696, (q31_t)0x3829b3b9, (q31_t)0x5ebb0d0d, (q31_t)0x3823ac1d,
+    (q31_t)0x5ec61254, (q31_t)0x381da256, (q31_t)0x5ed1166b, (q31_t)0x38179666,
+    (q31_t)0x5edc1953, (q31_t)0x3811884d, (q31_t)0x5ee71b0a, (q31_t)0x380b780a,
+    (q31_t)0x5ef21b90, (q31_t)0x3805659e, (q31_t)0x5efd1ae4, (q31_t)0x37ff5109,
+    (q31_t)0x5f081907, (q31_t)0x37f93a4b, (q31_t)0x5f1315f7, (q31_t)0x37f32165,
+    (q31_t)0x5f1e11b5, (q31_t)0x37ed0657, (q31_t)0x5f290c3f, (q31_t)0x37e6e921,
+    (q31_t)0x5f340596, (q31_t)0x37e0c9c3, (q31_t)0x5f3efdb9, (q31_t)0x37daa83d,
+    (q31_t)0x5f49f4a8, (q31_t)0x37d48490, (q31_t)0x5f54ea62, (q31_t)0x37ce5ebd,
+    (q31_t)0x5f5fdee6, (q31_t)0x37c836c2, (q31_t)0x5f6ad235, (q31_t)0x37c20ca1,
+    (q31_t)0x5f75c44e, (q31_t)0x37bbe05a, (q31_t)0x5f80b531, (q31_t)0x37b5b1ec,
+    (q31_t)0x5f8ba4dc, (q31_t)0x37af8159, (q31_t)0x5f969350, (q31_t)0x37a94ea0,
+    (q31_t)0x5fa1808c, (q31_t)0x37a319c2, (q31_t)0x5fac6c91, (q31_t)0x379ce2be,
+    (q31_t)0x5fb7575c, (q31_t)0x3796a996, (q31_t)0x5fc240ef, (q31_t)0x37906e49,
+    (q31_t)0x5fcd2948, (q31_t)0x378a30d8, (q31_t)0x5fd81067, (q31_t)0x3783f143,
+    (q31_t)0x5fe2f64c, (q31_t)0x377daf89, (q31_t)0x5feddaf6, (q31_t)0x37776bac,
+    (q31_t)0x5ff8be65, (q31_t)0x377125ac, (q31_t)0x6003a099, (q31_t)0x376add88,
+    (q31_t)0x600e8190, (q31_t)0x37649341, (q31_t)0x6019614c, (q31_t)0x375e46d8,
+    (q31_t)0x60243fca, (q31_t)0x3757f84c, (q31_t)0x602f1d0b, (q31_t)0x3751a79e,
+    (q31_t)0x6039f90f, (q31_t)0x374b54ce, (q31_t)0x6044d3d4, (q31_t)0x3744ffdd,
+    (q31_t)0x604fad5b, (q31_t)0x373ea8ca, (q31_t)0x605a85a3, (q31_t)0x37384f95,
+    (q31_t)0x60655cac, (q31_t)0x3731f440, (q31_t)0x60703275, (q31_t)0x372b96ca,
+    (q31_t)0x607b06fe, (q31_t)0x37253733, (q31_t)0x6085da46, (q31_t)0x371ed57c,
+    (q31_t)0x6090ac4d, (q31_t)0x371871a5, (q31_t)0x609b7d13, (q31_t)0x37120bae,
+    (q31_t)0x60a64c97, (q31_t)0x370ba398, (q31_t)0x60b11ad9, (q31_t)0x37053962,
+    (q31_t)0x60bbe7d8, (q31_t)0x36fecd0e, (q31_t)0x60c6b395, (q31_t)0x36f85e9a,
+    (q31_t)0x60d17e0d, (q31_t)0x36f1ee09, (q31_t)0x60dc4742, (q31_t)0x36eb7b58,
+    (q31_t)0x60e70f32, (q31_t)0x36e5068a, (q31_t)0x60f1d5de, (q31_t)0x36de8f9e,
+    (q31_t)0x60fc9b44, (q31_t)0x36d81695, (q31_t)0x61075f65, (q31_t)0x36d19b6e,
+    (q31_t)0x61122240, (q31_t)0x36cb1e2a, (q31_t)0x611ce3d5, (q31_t)0x36c49ec9,
+    (q31_t)0x6127a423, (q31_t)0x36be1d4c, (q31_t)0x61326329, (q31_t)0x36b799b3,
+    (q31_t)0x613d20e8, (q31_t)0x36b113fd, (q31_t)0x6147dd5f, (q31_t)0x36aa8c2c,
+    (q31_t)0x6152988d, (q31_t)0x36a4023f, (q31_t)0x615d5273, (q31_t)0x369d7637,
+    (q31_t)0x61680b0f, (q31_t)0x3696e814, (q31_t)0x6172c262, (q31_t)0x369057d6,
+    (q31_t)0x617d786a, (q31_t)0x3689c57d, (q31_t)0x61882d28, (q31_t)0x3683310b,
+    (q31_t)0x6192e09b, (q31_t)0x367c9a7e, (q31_t)0x619d92c2, (q31_t)0x367601d7,
+    (q31_t)0x61a8439e, (q31_t)0x366f6717, (q31_t)0x61b2f32e, (q31_t)0x3668ca3e,
+    (q31_t)0x61bda171, (q31_t)0x36622b4c, (q31_t)0x61c84e67, (q31_t)0x365b8a41,
+    (q31_t)0x61d2fa0f, (q31_t)0x3654e71d, (q31_t)0x61dda46a, (q31_t)0x364e41e2,
+    (q31_t)0x61e84d76, (q31_t)0x36479a8e, (q31_t)0x61f2f534, (q31_t)0x3640f123,
+    (q31_t)0x61fd9ba3, (q31_t)0x363a45a0, (q31_t)0x620840c2, (q31_t)0x36339806,
+    (q31_t)0x6212e492, (q31_t)0x362ce855, (q31_t)0x621d8711, (q31_t)0x3626368d,
+    (q31_t)0x6228283f, (q31_t)0x361f82af, (q31_t)0x6232c81c, (q31_t)0x3618ccba,
+    (q31_t)0x623d66a8, (q31_t)0x361214b0, (q31_t)0x624803e2, (q31_t)0x360b5a90,
+    (q31_t)0x62529fca, (q31_t)0x36049e5b, (q31_t)0x625d3a5e, (q31_t)0x35fde011,
+    (q31_t)0x6267d3a0, (q31_t)0x35f71fb1, (q31_t)0x62726b8e, (q31_t)0x35f05d3d,
+    (q31_t)0x627d0228, (q31_t)0x35e998b5, (q31_t)0x6287976e, (q31_t)0x35e2d219,
+    (q31_t)0x62922b5e, (q31_t)0x35dc0968, (q31_t)0x629cbdfa, (q31_t)0x35d53ea5,
+    (q31_t)0x62a74f40, (q31_t)0x35ce71ce, (q31_t)0x62b1df30, (q31_t)0x35c7a2e3,
+    (q31_t)0x62bc6dca, (q31_t)0x35c0d1e7, (q31_t)0x62c6fb0c, (q31_t)0x35b9fed7,
+    (q31_t)0x62d186f8, (q31_t)0x35b329b5, (q31_t)0x62dc118c, (q31_t)0x35ac5282,
+    (q31_t)0x62e69ac8, (q31_t)0x35a5793c, (q31_t)0x62f122ab, (q31_t)0x359e9de5,
+    (q31_t)0x62fba936, (q31_t)0x3597c07d, (q31_t)0x63062e67, (q31_t)0x3590e104,
+    (q31_t)0x6310b23e, (q31_t)0x3589ff7a, (q31_t)0x631b34bc, (q31_t)0x35831be0,
+    (q31_t)0x6325b5df, (q31_t)0x357c3636, (q31_t)0x633035a7, (q31_t)0x35754e7c,
+    (q31_t)0x633ab414, (q31_t)0x356e64b2, (q31_t)0x63453125, (q31_t)0x356778d9,
+    (q31_t)0x634facda, (q31_t)0x35608af1, (q31_t)0x635a2733, (q31_t)0x35599afa,
+    (q31_t)0x6364a02e, (q31_t)0x3552a8f4, (q31_t)0x636f17cc, (q31_t)0x354bb4e1,
+    (q31_t)0x63798e0d, (q31_t)0x3544bebf, (q31_t)0x638402ef, (q31_t)0x353dc68f,
+    (q31_t)0x638e7673, (q31_t)0x3536cc52, (q31_t)0x6398e898, (q31_t)0x352fd008,
+    (q31_t)0x63a3595e, (q31_t)0x3528d1b1, (q31_t)0x63adc8c4, (q31_t)0x3521d14d,
+    (q31_t)0x63b836ca, (q31_t)0x351acedd, (q31_t)0x63c2a36f, (q31_t)0x3513ca60,
+    (q31_t)0x63cd0eb3, (q31_t)0x350cc3d8, (q31_t)0x63d77896, (q31_t)0x3505bb44,
+    (q31_t)0x63e1e117, (q31_t)0x34feb0a5, (q31_t)0x63ec4837, (q31_t)0x34f7a3fb,
+    (q31_t)0x63f6adf3, (q31_t)0x34f09546, (q31_t)0x6401124d, (q31_t)0x34e98487,
+    (q31_t)0x640b7543, (q31_t)0x34e271bd, (q31_t)0x6415d6d5, (q31_t)0x34db5cea,
+    (q31_t)0x64203704, (q31_t)0x34d4460c, (q31_t)0x642a95ce, (q31_t)0x34cd2d26,
+    (q31_t)0x6434f332, (q31_t)0x34c61236, (q31_t)0x643f4f32, (q31_t)0x34bef53d,
+    (q31_t)0x6449a9cc, (q31_t)0x34b7d63c, (q31_t)0x645402ff, (q31_t)0x34b0b533,
+    (q31_t)0x645e5acc, (q31_t)0x34a99221, (q31_t)0x6468b132, (q31_t)0x34a26d08,
+    (q31_t)0x64730631, (q31_t)0x349b45e7, (q31_t)0x647d59c8, (q31_t)0x34941cbf,
+    (q31_t)0x6487abf7, (q31_t)0x348cf190, (q31_t)0x6491fcbe, (q31_t)0x3485c45b,
+    (q31_t)0x649c4c1b, (q31_t)0x347e951f, (q31_t)0x64a69a0f, (q31_t)0x347763dd,
+    (q31_t)0x64b0e699, (q31_t)0x34703095, (q31_t)0x64bb31ba, (q31_t)0x3468fb47,
+    (q31_t)0x64c57b6f, (q31_t)0x3461c3f5, (q31_t)0x64cfc3ba, (q31_t)0x345a8a9d,
+    (q31_t)0x64da0a9a, (q31_t)0x34534f41, (q31_t)0x64e4500e, (q31_t)0x344c11e0,
+    (q31_t)0x64ee9415, (q31_t)0x3444d27b, (q31_t)0x64f8d6b0, (q31_t)0x343d9112,
+    (q31_t)0x650317df, (q31_t)0x34364da6, (q31_t)0x650d57a0, (q31_t)0x342f0836,
+    (q31_t)0x651795f3, (q31_t)0x3427c0c3, (q31_t)0x6521d2d8, (q31_t)0x3420774d,
+    (q31_t)0x652c0e4f, (q31_t)0x34192bd5, (q31_t)0x65364857, (q31_t)0x3411de5b,
+    (q31_t)0x654080ef, (q31_t)0x340a8edf, (q31_t)0x654ab818, (q31_t)0x34033d61,
+    (q31_t)0x6554edd1, (q31_t)0x33fbe9e2, (q31_t)0x655f2219, (q31_t)0x33f49462,
+    (q31_t)0x656954f1, (q31_t)0x33ed3ce1, (q31_t)0x65738657, (q31_t)0x33e5e360,
+    (q31_t)0x657db64c, (q31_t)0x33de87de, (q31_t)0x6587e4cf, (q31_t)0x33d72a5d,
+    (q31_t)0x659211df, (q31_t)0x33cfcadc, (q31_t)0x659c3d7c, (q31_t)0x33c8695b,
+    (q31_t)0x65a667a7, (q31_t)0x33c105db, (q31_t)0x65b0905d, (q31_t)0x33b9a05d,
+    (q31_t)0x65bab7a0, (q31_t)0x33b238e0, (q31_t)0x65c4dd6e, (q31_t)0x33aacf65,
+    (q31_t)0x65cf01c8, (q31_t)0x33a363ec, (q31_t)0x65d924ac, (q31_t)0x339bf675,
+    (q31_t)0x65e3461b, (q31_t)0x33948701, (q31_t)0x65ed6614, (q31_t)0x338d1590,
+    (q31_t)0x65f78497, (q31_t)0x3385a222, (q31_t)0x6601a1a2, (q31_t)0x337e2cb7,
+    (q31_t)0x660bbd37, (q31_t)0x3376b551, (q31_t)0x6615d754, (q31_t)0x336f3bee,
+    (q31_t)0x661feffa, (q31_t)0x3367c090, (q31_t)0x662a0727, (q31_t)0x33604336,
+    (q31_t)0x66341cdb, (q31_t)0x3358c3e2, (q31_t)0x663e3117, (q31_t)0x33514292,
+    (q31_t)0x664843d9, (q31_t)0x3349bf48, (q31_t)0x66525521, (q31_t)0x33423a04,
+    (q31_t)0x665c64ef, (q31_t)0x333ab2c6, (q31_t)0x66667342, (q31_t)0x3333298f,
+    (q31_t)0x6670801a, (q31_t)0x332b9e5e, (q31_t)0x667a8b77, (q31_t)0x33241134,
+    (q31_t)0x66849558, (q31_t)0x331c8211, (q31_t)0x668e9dbd, (q31_t)0x3314f0f6,
+    (q31_t)0x6698a4a6, (q31_t)0x330d5de3, (q31_t)0x66a2aa11, (q31_t)0x3305c8d7,
+    (q31_t)0x66acadff, (q31_t)0x32fe31d5, (q31_t)0x66b6b070, (q31_t)0x32f698db,
+    (q31_t)0x66c0b162, (q31_t)0x32eefdea, (q31_t)0x66cab0d6, (q31_t)0x32e76102,
+    (q31_t)0x66d4aecb, (q31_t)0x32dfc224, (q31_t)0x66deab41, (q31_t)0x32d82150,
+    (q31_t)0x66e8a637, (q31_t)0x32d07e85, (q31_t)0x66f29fad, (q31_t)0x32c8d9c6,
+    (q31_t)0x66fc97a3, (q31_t)0x32c13311, (q31_t)0x67068e18, (q31_t)0x32b98a67,
+    (q31_t)0x6710830c, (q31_t)0x32b1dfc9, (q31_t)0x671a767e, (q31_t)0x32aa3336,
+    (q31_t)0x6724686e, (q31_t)0x32a284b0, (q31_t)0x672e58dc, (q31_t)0x329ad435,
+    (q31_t)0x673847c8, (q31_t)0x329321c7, (q31_t)0x67423530, (q31_t)0x328b6d66,
+    (q31_t)0x674c2115, (q31_t)0x3283b712, (q31_t)0x67560b76, (q31_t)0x327bfecc,
+    (q31_t)0x675ff452, (q31_t)0x32744493, (q31_t)0x6769dbaa, (q31_t)0x326c8868,
+    (q31_t)0x6773c17d, (q31_t)0x3264ca4c, (q31_t)0x677da5cb, (q31_t)0x325d0a3e,
+    (q31_t)0x67878893, (q31_t)0x32554840, (q31_t)0x679169d5, (q31_t)0x324d8450,
+    (q31_t)0x679b4990, (q31_t)0x3245be70, (q31_t)0x67a527c4, (q31_t)0x323df6a0,
+    (q31_t)0x67af0472, (q31_t)0x32362ce0, (q31_t)0x67b8df97, (q31_t)0x322e6130,
+    (q31_t)0x67c2b934, (q31_t)0x32269391, (q31_t)0x67cc9149, (q31_t)0x321ec403,
+    (q31_t)0x67d667d5, (q31_t)0x3216f287, (q31_t)0x67e03cd8, (q31_t)0x320f1f1c,
+    (q31_t)0x67ea1052, (q31_t)0x320749c3, (q31_t)0x67f3e241, (q31_t)0x31ff727c,
+    (q31_t)0x67fdb2a7, (q31_t)0x31f79948, (q31_t)0x68078181, (q31_t)0x31efbe27,
+    (q31_t)0x68114ed0, (q31_t)0x31e7e118, (q31_t)0x681b1a94, (q31_t)0x31e0021e,
+    (q31_t)0x6824e4cc, (q31_t)0x31d82137, (q31_t)0x682ead78, (q31_t)0x31d03e64,
+    (q31_t)0x68387498, (q31_t)0x31c859a5, (q31_t)0x68423a2a, (q31_t)0x31c072fb,
+    (q31_t)0x684bfe2f, (q31_t)0x31b88a66, (q31_t)0x6855c0a6, (q31_t)0x31b09fe7,
+    (q31_t)0x685f8190, (q31_t)0x31a8b37c, (q31_t)0x686940ea, (q31_t)0x31a0c528,
+    (q31_t)0x6872feb6, (q31_t)0x3198d4ea, (q31_t)0x687cbaf3, (q31_t)0x3190e2c3,
+    (q31_t)0x688675a0, (q31_t)0x3188eeb2, (q31_t)0x68902ebd, (q31_t)0x3180f8b8,
+    (q31_t)0x6899e64a, (q31_t)0x317900d6, (q31_t)0x68a39c46, (q31_t)0x3171070c,
+    (q31_t)0x68ad50b1, (q31_t)0x31690b59, (q31_t)0x68b7038b, (q31_t)0x31610dbf,
+    (q31_t)0x68c0b4d2, (q31_t)0x31590e3e, (q31_t)0x68ca6488, (q31_t)0x31510cd5,
+    (q31_t)0x68d412ab, (q31_t)0x31490986, (q31_t)0x68ddbf3b, (q31_t)0x31410450,
+    (q31_t)0x68e76a37, (q31_t)0x3138fd35, (q31_t)0x68f113a0, (q31_t)0x3130f433,
+    (q31_t)0x68fabb75, (q31_t)0x3128e94c, (q31_t)0x690461b5, (q31_t)0x3120dc80,
+    (q31_t)0x690e0661, (q31_t)0x3118cdcf, (q31_t)0x6917a977, (q31_t)0x3110bd39,
+    (q31_t)0x69214af8, (q31_t)0x3108aabf, (q31_t)0x692aeae3, (q31_t)0x31009661,
+    (q31_t)0x69348937, (q31_t)0x30f8801f, (q31_t)0x693e25f5, (q31_t)0x30f067fb,
+    (q31_t)0x6947c11c, (q31_t)0x30e84df3, (q31_t)0x69515aab, (q31_t)0x30e03208,
+    (q31_t)0x695af2a3, (q31_t)0x30d8143b, (q31_t)0x69648902, (q31_t)0x30cff48c,
+    (q31_t)0x696e1dc9, (q31_t)0x30c7d2fb, (q31_t)0x6977b0f7, (q31_t)0x30bfaf89,
+    (q31_t)0x6981428c, (q31_t)0x30b78a36, (q31_t)0x698ad287, (q31_t)0x30af6302,
+    (q31_t)0x699460e8, (q31_t)0x30a739ed, (q31_t)0x699dedaf, (q31_t)0x309f0ef8,
+    (q31_t)0x69a778db, (q31_t)0x3096e223, (q31_t)0x69b1026c, (q31_t)0x308eb36f,
+    (q31_t)0x69ba8a61, (q31_t)0x308682dc, (q31_t)0x69c410ba, (q31_t)0x307e5069,
+    (q31_t)0x69cd9578, (q31_t)0x30761c18, (q31_t)0x69d71899, (q31_t)0x306de5e9,
+    (q31_t)0x69e09a1c, (q31_t)0x3065addb, (q31_t)0x69ea1a03, (q31_t)0x305d73f0,
+    (q31_t)0x69f3984c, (q31_t)0x30553828, (q31_t)0x69fd14f6, (q31_t)0x304cfa83,
+    (q31_t)0x6a069003, (q31_t)0x3044bb00, (q31_t)0x6a100970, (q31_t)0x303c79a2,
+    (q31_t)0x6a19813f, (q31_t)0x30343667, (q31_t)0x6a22f76e, (q31_t)0x302bf151,
+    (q31_t)0x6a2c6bfd, (q31_t)0x3023aa5f, (q31_t)0x6a35deeb, (q31_t)0x301b6193,
+    (q31_t)0x6a3f503a, (q31_t)0x301316eb, (q31_t)0x6a48bfe7, (q31_t)0x300aca69,
+    (q31_t)0x6a522df3, (q31_t)0x30027c0c, (q31_t)0x6a5b9a5d, (q31_t)0x2ffa2bd6,
+    (q31_t)0x6a650525, (q31_t)0x2ff1d9c7, (q31_t)0x6a6e6e4b, (q31_t)0x2fe985de,
+    (q31_t)0x6a77d5ce, (q31_t)0x2fe1301c, (q31_t)0x6a813bae, (q31_t)0x2fd8d882,
+    (q31_t)0x6a8a9fea, (q31_t)0x2fd07f0f, (q31_t)0x6a940283, (q31_t)0x2fc823c5,
+    (q31_t)0x6a9d6377, (q31_t)0x2fbfc6a3, (q31_t)0x6aa6c2c6, (q31_t)0x2fb767aa,
+    (q31_t)0x6ab02071, (q31_t)0x2faf06da, (q31_t)0x6ab97c77, (q31_t)0x2fa6a433,
+    (q31_t)0x6ac2d6d6, (q31_t)0x2f9e3fb6, (q31_t)0x6acc2f90, (q31_t)0x2f95d963,
+    (q31_t)0x6ad586a3, (q31_t)0x2f8d713a, (q31_t)0x6adedc10, (q31_t)0x2f85073c,
+    (q31_t)0x6ae82fd5, (q31_t)0x2f7c9b69, (q31_t)0x6af181f3, (q31_t)0x2f742dc1,
+    (q31_t)0x6afad269, (q31_t)0x2f6bbe45, (q31_t)0x6b042137, (q31_t)0x2f634cf5,
+    (q31_t)0x6b0d6e5c, (q31_t)0x2f5ad9d1, (q31_t)0x6b16b9d9, (q31_t)0x2f5264da,
+    (q31_t)0x6b2003ac, (q31_t)0x2f49ee0f, (q31_t)0x6b294bd5, (q31_t)0x2f417573,
+    (q31_t)0x6b329255, (q31_t)0x2f38fb03, (q31_t)0x6b3bd72a, (q31_t)0x2f307ec2,
+    (q31_t)0x6b451a55, (q31_t)0x2f2800af, (q31_t)0x6b4e5bd4, (q31_t)0x2f1f80ca,
+    (q31_t)0x6b579ba8, (q31_t)0x2f16ff14, (q31_t)0x6b60d9d0, (q31_t)0x2f0e7b8e,
+    (q31_t)0x6b6a164d, (q31_t)0x2f05f637, (q31_t)0x6b73511c, (q31_t)0x2efd6f10,
+    (q31_t)0x6b7c8a3f, (q31_t)0x2ef4e619, (q31_t)0x6b85c1b5, (q31_t)0x2eec5b53,
+    (q31_t)0x6b8ef77d, (q31_t)0x2ee3cebe, (q31_t)0x6b982b97, (q31_t)0x2edb405a,
+    (q31_t)0x6ba15e03, (q31_t)0x2ed2b027, (q31_t)0x6baa8ec0, (q31_t)0x2eca1e27,
+    (q31_t)0x6bb3bdce, (q31_t)0x2ec18a58, (q31_t)0x6bbceb2d, (q31_t)0x2eb8f4bc,
+    (q31_t)0x6bc616dd, (q31_t)0x2eb05d53, (q31_t)0x6bcf40dc, (q31_t)0x2ea7c41e,
+    (q31_t)0x6bd8692b, (q31_t)0x2e9f291b, (q31_t)0x6be18fc9, (q31_t)0x2e968c4d,
+    (q31_t)0x6beab4b6, (q31_t)0x2e8dedb3, (q31_t)0x6bf3d7f2, (q31_t)0x2e854d4d,
+    (q31_t)0x6bfcf97c, (q31_t)0x2e7cab1c, (q31_t)0x6c061953, (q31_t)0x2e740720,
+    (q31_t)0x6c0f3779, (q31_t)0x2e6b615a, (q31_t)0x6c1853eb, (q31_t)0x2e62b9ca,
+    (q31_t)0x6c216eaa, (q31_t)0x2e5a1070, (q31_t)0x6c2a87b6, (q31_t)0x2e51654c,
+    (q31_t)0x6c339f0e, (q31_t)0x2e48b860, (q31_t)0x6c3cb4b1, (q31_t)0x2e4009aa,
+    (q31_t)0x6c45c8a0, (q31_t)0x2e37592c, (q31_t)0x6c4edada, (q31_t)0x2e2ea6e6,
+    (q31_t)0x6c57eb5e, (q31_t)0x2e25f2d8, (q31_t)0x6c60fa2d, (q31_t)0x2e1d3d03,
+    (q31_t)0x6c6a0746, (q31_t)0x2e148566, (q31_t)0x6c7312a9, (q31_t)0x2e0bcc03,
+    (q31_t)0x6c7c1c55, (q31_t)0x2e0310d9, (q31_t)0x6c85244a, (q31_t)0x2dfa53e9,
+    (q31_t)0x6c8e2a87, (q31_t)0x2df19534, (q31_t)0x6c972f0d, (q31_t)0x2de8d4b8,
+    (q31_t)0x6ca031da, (q31_t)0x2de01278, (q31_t)0x6ca932ef, (q31_t)0x2dd74e73,
+    (q31_t)0x6cb2324c, (q31_t)0x2dce88aa, (q31_t)0x6cbb2fef, (q31_t)0x2dc5c11c,
+    (q31_t)0x6cc42bd9, (q31_t)0x2dbcf7cb, (q31_t)0x6ccd2609, (q31_t)0x2db42cb6,
+    (q31_t)0x6cd61e7f, (q31_t)0x2dab5fdf, (q31_t)0x6cdf153a, (q31_t)0x2da29144,
+    (q31_t)0x6ce80a3a, (q31_t)0x2d99c0e7, (q31_t)0x6cf0fd80, (q31_t)0x2d90eec8,
+    (q31_t)0x6cf9ef09, (q31_t)0x2d881ae8, (q31_t)0x6d02ded7, (q31_t)0x2d7f4545,
+    (q31_t)0x6d0bcce8, (q31_t)0x2d766de2, (q31_t)0x6d14b93d, (q31_t)0x2d6d94bf,
+    (q31_t)0x6d1da3d5, (q31_t)0x2d64b9da, (q31_t)0x6d268cb0, (q31_t)0x2d5bdd36,
+    (q31_t)0x6d2f73cd, (q31_t)0x2d52fed2, (q31_t)0x6d38592c, (q31_t)0x2d4a1eaf,
+    (q31_t)0x6d413ccd, (q31_t)0x2d413ccd, (q31_t)0x6d4a1eaf, (q31_t)0x2d38592c,
+    (q31_t)0x6d52fed2, (q31_t)0x2d2f73cd, (q31_t)0x6d5bdd36, (q31_t)0x2d268cb0,
+    (q31_t)0x6d64b9da, (q31_t)0x2d1da3d5, (q31_t)0x6d6d94bf, (q31_t)0x2d14b93d,
+    (q31_t)0x6d766de2, (q31_t)0x2d0bcce8, (q31_t)0x6d7f4545, (q31_t)0x2d02ded7,
+    (q31_t)0x6d881ae8, (q31_t)0x2cf9ef09, (q31_t)0x6d90eec8, (q31_t)0x2cf0fd80,
+    (q31_t)0x6d99c0e7, (q31_t)0x2ce80a3a, (q31_t)0x6da29144, (q31_t)0x2cdf153a,
+    (q31_t)0x6dab5fdf, (q31_t)0x2cd61e7f, (q31_t)0x6db42cb6, (q31_t)0x2ccd2609,
+    (q31_t)0x6dbcf7cb, (q31_t)0x2cc42bd9, (q31_t)0x6dc5c11c, (q31_t)0x2cbb2fef,
+    (q31_t)0x6dce88aa, (q31_t)0x2cb2324c, (q31_t)0x6dd74e73, (q31_t)0x2ca932ef,
+    (q31_t)0x6de01278, (q31_t)0x2ca031da, (q31_t)0x6de8d4b8, (q31_t)0x2c972f0d,
+    (q31_t)0x6df19534, (q31_t)0x2c8e2a87, (q31_t)0x6dfa53e9, (q31_t)0x2c85244a,
+    (q31_t)0x6e0310d9, (q31_t)0x2c7c1c55, (q31_t)0x6e0bcc03, (q31_t)0x2c7312a9,
+    (q31_t)0x6e148566, (q31_t)0x2c6a0746, (q31_t)0x6e1d3d03, (q31_t)0x2c60fa2d,
+    (q31_t)0x6e25f2d8, (q31_t)0x2c57eb5e, (q31_t)0x6e2ea6e6, (q31_t)0x2c4edada,
+    (q31_t)0x6e37592c, (q31_t)0x2c45c8a0, (q31_t)0x6e4009aa, (q31_t)0x2c3cb4b1,
+    (q31_t)0x6e48b860, (q31_t)0x2c339f0e, (q31_t)0x6e51654c, (q31_t)0x2c2a87b6,
+    (q31_t)0x6e5a1070, (q31_t)0x2c216eaa, (q31_t)0x6e62b9ca, (q31_t)0x2c1853eb,
+    (q31_t)0x6e6b615a, (q31_t)0x2c0f3779, (q31_t)0x6e740720, (q31_t)0x2c061953,
+    (q31_t)0x6e7cab1c, (q31_t)0x2bfcf97c, (q31_t)0x6e854d4d, (q31_t)0x2bf3d7f2,
+    (q31_t)0x6e8dedb3, (q31_t)0x2beab4b6, (q31_t)0x6e968c4d, (q31_t)0x2be18fc9,
+    (q31_t)0x6e9f291b, (q31_t)0x2bd8692b, (q31_t)0x6ea7c41e, (q31_t)0x2bcf40dc,
+    (q31_t)0x6eb05d53, (q31_t)0x2bc616dd, (q31_t)0x6eb8f4bc, (q31_t)0x2bbceb2d,
+    (q31_t)0x6ec18a58, (q31_t)0x2bb3bdce, (q31_t)0x6eca1e27, (q31_t)0x2baa8ec0,
+    (q31_t)0x6ed2b027, (q31_t)0x2ba15e03, (q31_t)0x6edb405a, (q31_t)0x2b982b97,
+    (q31_t)0x6ee3cebe, (q31_t)0x2b8ef77d, (q31_t)0x6eec5b53, (q31_t)0x2b85c1b5,
+    (q31_t)0x6ef4e619, (q31_t)0x2b7c8a3f, (q31_t)0x6efd6f10, (q31_t)0x2b73511c,
+    (q31_t)0x6f05f637, (q31_t)0x2b6a164d, (q31_t)0x6f0e7b8e, (q31_t)0x2b60d9d0,
+    (q31_t)0x6f16ff14, (q31_t)0x2b579ba8, (q31_t)0x6f1f80ca, (q31_t)0x2b4e5bd4,
+    (q31_t)0x6f2800af, (q31_t)0x2b451a55, (q31_t)0x6f307ec2, (q31_t)0x2b3bd72a,
+    (q31_t)0x6f38fb03, (q31_t)0x2b329255, (q31_t)0x6f417573, (q31_t)0x2b294bd5,
+    (q31_t)0x6f49ee0f, (q31_t)0x2b2003ac, (q31_t)0x6f5264da, (q31_t)0x2b16b9d9,
+    (q31_t)0x6f5ad9d1, (q31_t)0x2b0d6e5c, (q31_t)0x6f634cf5, (q31_t)0x2b042137,
+    (q31_t)0x6f6bbe45, (q31_t)0x2afad269, (q31_t)0x6f742dc1, (q31_t)0x2af181f3,
+    (q31_t)0x6f7c9b69, (q31_t)0x2ae82fd5, (q31_t)0x6f85073c, (q31_t)0x2adedc10,
+    (q31_t)0x6f8d713a, (q31_t)0x2ad586a3, (q31_t)0x6f95d963, (q31_t)0x2acc2f90,
+    (q31_t)0x6f9e3fb6, (q31_t)0x2ac2d6d6, (q31_t)0x6fa6a433, (q31_t)0x2ab97c77,
+    (q31_t)0x6faf06da, (q31_t)0x2ab02071, (q31_t)0x6fb767aa, (q31_t)0x2aa6c2c6,
+    (q31_t)0x6fbfc6a3, (q31_t)0x2a9d6377, (q31_t)0x6fc823c5, (q31_t)0x2a940283,
+    (q31_t)0x6fd07f0f, (q31_t)0x2a8a9fea, (q31_t)0x6fd8d882, (q31_t)0x2a813bae,
+    (q31_t)0x6fe1301c, (q31_t)0x2a77d5ce, (q31_t)0x6fe985de, (q31_t)0x2a6e6e4b,
+    (q31_t)0x6ff1d9c7, (q31_t)0x2a650525, (q31_t)0x6ffa2bd6, (q31_t)0x2a5b9a5d,
+    (q31_t)0x70027c0c, (q31_t)0x2a522df3, (q31_t)0x700aca69, (q31_t)0x2a48bfe7,
+    (q31_t)0x701316eb, (q31_t)0x2a3f503a, (q31_t)0x701b6193, (q31_t)0x2a35deeb,
+    (q31_t)0x7023aa5f, (q31_t)0x2a2c6bfd, (q31_t)0x702bf151, (q31_t)0x2a22f76e,
+    (q31_t)0x70343667, (q31_t)0x2a19813f, (q31_t)0x703c79a2, (q31_t)0x2a100970,
+    (q31_t)0x7044bb00, (q31_t)0x2a069003, (q31_t)0x704cfa83, (q31_t)0x29fd14f6,
+    (q31_t)0x70553828, (q31_t)0x29f3984c, (q31_t)0x705d73f0, (q31_t)0x29ea1a03,
+    (q31_t)0x7065addb, (q31_t)0x29e09a1c, (q31_t)0x706de5e9, (q31_t)0x29d71899,
+    (q31_t)0x70761c18, (q31_t)0x29cd9578, (q31_t)0x707e5069, (q31_t)0x29c410ba,
+    (q31_t)0x708682dc, (q31_t)0x29ba8a61, (q31_t)0x708eb36f, (q31_t)0x29b1026c,
+    (q31_t)0x7096e223, (q31_t)0x29a778db, (q31_t)0x709f0ef8, (q31_t)0x299dedaf,
+    (q31_t)0x70a739ed, (q31_t)0x299460e8, (q31_t)0x70af6302, (q31_t)0x298ad287,
+    (q31_t)0x70b78a36, (q31_t)0x2981428c, (q31_t)0x70bfaf89, (q31_t)0x2977b0f7,
+    (q31_t)0x70c7d2fb, (q31_t)0x296e1dc9, (q31_t)0x70cff48c, (q31_t)0x29648902,
+    (q31_t)0x70d8143b, (q31_t)0x295af2a3, (q31_t)0x70e03208, (q31_t)0x29515aab,
+    (q31_t)0x70e84df3, (q31_t)0x2947c11c, (q31_t)0x70f067fb, (q31_t)0x293e25f5,
+    (q31_t)0x70f8801f, (q31_t)0x29348937, (q31_t)0x71009661, (q31_t)0x292aeae3,
+    (q31_t)0x7108aabf, (q31_t)0x29214af8, (q31_t)0x7110bd39, (q31_t)0x2917a977,
+    (q31_t)0x7118cdcf, (q31_t)0x290e0661, (q31_t)0x7120dc80, (q31_t)0x290461b5,
+    (q31_t)0x7128e94c, (q31_t)0x28fabb75, (q31_t)0x7130f433, (q31_t)0x28f113a0,
+    (q31_t)0x7138fd35, (q31_t)0x28e76a37, (q31_t)0x71410450, (q31_t)0x28ddbf3b,
+    (q31_t)0x71490986, (q31_t)0x28d412ab, (q31_t)0x71510cd5, (q31_t)0x28ca6488,
+    (q31_t)0x71590e3e, (q31_t)0x28c0b4d2, (q31_t)0x71610dbf, (q31_t)0x28b7038b,
+    (q31_t)0x71690b59, (q31_t)0x28ad50b1, (q31_t)0x7171070c, (q31_t)0x28a39c46,
+    (q31_t)0x717900d6, (q31_t)0x2899e64a, (q31_t)0x7180f8b8, (q31_t)0x28902ebd,
+    (q31_t)0x7188eeb2, (q31_t)0x288675a0, (q31_t)0x7190e2c3, (q31_t)0x287cbaf3,
+    (q31_t)0x7198d4ea, (q31_t)0x2872feb6, (q31_t)0x71a0c528, (q31_t)0x286940ea,
+    (q31_t)0x71a8b37c, (q31_t)0x285f8190, (q31_t)0x71b09fe7, (q31_t)0x2855c0a6,
+    (q31_t)0x71b88a66, (q31_t)0x284bfe2f, (q31_t)0x71c072fb, (q31_t)0x28423a2a,
+    (q31_t)0x71c859a5, (q31_t)0x28387498, (q31_t)0x71d03e64, (q31_t)0x282ead78,
+    (q31_t)0x71d82137, (q31_t)0x2824e4cc, (q31_t)0x71e0021e, (q31_t)0x281b1a94,
+    (q31_t)0x71e7e118, (q31_t)0x28114ed0, (q31_t)0x71efbe27, (q31_t)0x28078181,
+    (q31_t)0x71f79948, (q31_t)0x27fdb2a7, (q31_t)0x71ff727c, (q31_t)0x27f3e241,
+    (q31_t)0x720749c3, (q31_t)0x27ea1052, (q31_t)0x720f1f1c, (q31_t)0x27e03cd8,
+    (q31_t)0x7216f287, (q31_t)0x27d667d5, (q31_t)0x721ec403, (q31_t)0x27cc9149,
+    (q31_t)0x72269391, (q31_t)0x27c2b934, (q31_t)0x722e6130, (q31_t)0x27b8df97,
+    (q31_t)0x72362ce0, (q31_t)0x27af0472, (q31_t)0x723df6a0, (q31_t)0x27a527c4,
+    (q31_t)0x7245be70, (q31_t)0x279b4990, (q31_t)0x724d8450, (q31_t)0x279169d5,
+    (q31_t)0x72554840, (q31_t)0x27878893, (q31_t)0x725d0a3e, (q31_t)0x277da5cb,
+    (q31_t)0x7264ca4c, (q31_t)0x2773c17d, (q31_t)0x726c8868, (q31_t)0x2769dbaa,
+    (q31_t)0x72744493, (q31_t)0x275ff452, (q31_t)0x727bfecc, (q31_t)0x27560b76,
+    (q31_t)0x7283b712, (q31_t)0x274c2115, (q31_t)0x728b6d66, (q31_t)0x27423530,
+    (q31_t)0x729321c7, (q31_t)0x273847c8, (q31_t)0x729ad435, (q31_t)0x272e58dc,
+    (q31_t)0x72a284b0, (q31_t)0x2724686e, (q31_t)0x72aa3336, (q31_t)0x271a767e,
+    (q31_t)0x72b1dfc9, (q31_t)0x2710830c, (q31_t)0x72b98a67, (q31_t)0x27068e18,
+    (q31_t)0x72c13311, (q31_t)0x26fc97a3, (q31_t)0x72c8d9c6, (q31_t)0x26f29fad,
+    (q31_t)0x72d07e85, (q31_t)0x26e8a637, (q31_t)0x72d82150, (q31_t)0x26deab41,
+    (q31_t)0x72dfc224, (q31_t)0x26d4aecb, (q31_t)0x72e76102, (q31_t)0x26cab0d6,
+    (q31_t)0x72eefdea, (q31_t)0x26c0b162, (q31_t)0x72f698db, (q31_t)0x26b6b070,
+    (q31_t)0x72fe31d5, (q31_t)0x26acadff, (q31_t)0x7305c8d7, (q31_t)0x26a2aa11,
+    (q31_t)0x730d5de3, (q31_t)0x2698a4a6, (q31_t)0x7314f0f6, (q31_t)0x268e9dbd,
+    (q31_t)0x731c8211, (q31_t)0x26849558, (q31_t)0x73241134, (q31_t)0x267a8b77,
+    (q31_t)0x732b9e5e, (q31_t)0x2670801a, (q31_t)0x7333298f, (q31_t)0x26667342,
+    (q31_t)0x733ab2c6, (q31_t)0x265c64ef, (q31_t)0x73423a04, (q31_t)0x26525521,
+    (q31_t)0x7349bf48, (q31_t)0x264843d9, (q31_t)0x73514292, (q31_t)0x263e3117,
+    (q31_t)0x7358c3e2, (q31_t)0x26341cdb, (q31_t)0x73604336, (q31_t)0x262a0727,
+    (q31_t)0x7367c090, (q31_t)0x261feffa, (q31_t)0x736f3bee, (q31_t)0x2615d754,
+    (q31_t)0x7376b551, (q31_t)0x260bbd37, (q31_t)0x737e2cb7, (q31_t)0x2601a1a2,
+    (q31_t)0x7385a222, (q31_t)0x25f78497, (q31_t)0x738d1590, (q31_t)0x25ed6614,
+    (q31_t)0x73948701, (q31_t)0x25e3461b, (q31_t)0x739bf675, (q31_t)0x25d924ac,
+    (q31_t)0x73a363ec, (q31_t)0x25cf01c8, (q31_t)0x73aacf65, (q31_t)0x25c4dd6e,
+    (q31_t)0x73b238e0, (q31_t)0x25bab7a0, (q31_t)0x73b9a05d, (q31_t)0x25b0905d,
+    (q31_t)0x73c105db, (q31_t)0x25a667a7, (q31_t)0x73c8695b, (q31_t)0x259c3d7c,
+    (q31_t)0x73cfcadc, (q31_t)0x259211df, (q31_t)0x73d72a5d, (q31_t)0x2587e4cf,
+    (q31_t)0x73de87de, (q31_t)0x257db64c, (q31_t)0x73e5e360, (q31_t)0x25738657,
+    (q31_t)0x73ed3ce1, (q31_t)0x256954f1, (q31_t)0x73f49462, (q31_t)0x255f2219,
+    (q31_t)0x73fbe9e2, (q31_t)0x2554edd1, (q31_t)0x74033d61, (q31_t)0x254ab818,
+    (q31_t)0x740a8edf, (q31_t)0x254080ef, (q31_t)0x7411de5b, (q31_t)0x25364857,
+    (q31_t)0x74192bd5, (q31_t)0x252c0e4f, (q31_t)0x7420774d, (q31_t)0x2521d2d8,
+    (q31_t)0x7427c0c3, (q31_t)0x251795f3, (q31_t)0x742f0836, (q31_t)0x250d57a0,
+    (q31_t)0x74364da6, (q31_t)0x250317df, (q31_t)0x743d9112, (q31_t)0x24f8d6b0,
+    (q31_t)0x7444d27b, (q31_t)0x24ee9415, (q31_t)0x744c11e0, (q31_t)0x24e4500e,
+    (q31_t)0x74534f41, (q31_t)0x24da0a9a, (q31_t)0x745a8a9d, (q31_t)0x24cfc3ba,
+    (q31_t)0x7461c3f5, (q31_t)0x24c57b6f, (q31_t)0x7468fb47, (q31_t)0x24bb31ba,
+    (q31_t)0x74703095, (q31_t)0x24b0e699, (q31_t)0x747763dd, (q31_t)0x24a69a0f,
+    (q31_t)0x747e951f, (q31_t)0x249c4c1b, (q31_t)0x7485c45b, (q31_t)0x2491fcbe,
+    (q31_t)0x748cf190, (q31_t)0x2487abf7, (q31_t)0x74941cbf, (q31_t)0x247d59c8,
+    (q31_t)0x749b45e7, (q31_t)0x24730631, (q31_t)0x74a26d08, (q31_t)0x2468b132,
+    (q31_t)0x74a99221, (q31_t)0x245e5acc, (q31_t)0x74b0b533, (q31_t)0x245402ff,
+    (q31_t)0x74b7d63c, (q31_t)0x2449a9cc, (q31_t)0x74bef53d, (q31_t)0x243f4f32,
+    (q31_t)0x74c61236, (q31_t)0x2434f332, (q31_t)0x74cd2d26, (q31_t)0x242a95ce,
+    (q31_t)0x74d4460c, (q31_t)0x24203704, (q31_t)0x74db5cea, (q31_t)0x2415d6d5,
+    (q31_t)0x74e271bd, (q31_t)0x240b7543, (q31_t)0x74e98487, (q31_t)0x2401124d,
+    (q31_t)0x74f09546, (q31_t)0x23f6adf3, (q31_t)0x74f7a3fb, (q31_t)0x23ec4837,
+    (q31_t)0x74feb0a5, (q31_t)0x23e1e117, (q31_t)0x7505bb44, (q31_t)0x23d77896,
+    (q31_t)0x750cc3d8, (q31_t)0x23cd0eb3, (q31_t)0x7513ca60, (q31_t)0x23c2a36f,
+    (q31_t)0x751acedd, (q31_t)0x23b836ca, (q31_t)0x7521d14d, (q31_t)0x23adc8c4,
+    (q31_t)0x7528d1b1, (q31_t)0x23a3595e, (q31_t)0x752fd008, (q31_t)0x2398e898,
+    (q31_t)0x7536cc52, (q31_t)0x238e7673, (q31_t)0x753dc68f, (q31_t)0x238402ef,
+    (q31_t)0x7544bebf, (q31_t)0x23798e0d, (q31_t)0x754bb4e1, (q31_t)0x236f17cc,
+    (q31_t)0x7552a8f4, (q31_t)0x2364a02e, (q31_t)0x75599afa, (q31_t)0x235a2733,
+    (q31_t)0x75608af1, (q31_t)0x234facda, (q31_t)0x756778d9, (q31_t)0x23453125,
+    (q31_t)0x756e64b2, (q31_t)0x233ab414, (q31_t)0x75754e7c, (q31_t)0x233035a7,
+    (q31_t)0x757c3636, (q31_t)0x2325b5df, (q31_t)0x75831be0, (q31_t)0x231b34bc,
+    (q31_t)0x7589ff7a, (q31_t)0x2310b23e, (q31_t)0x7590e104, (q31_t)0x23062e67,
+    (q31_t)0x7597c07d, (q31_t)0x22fba936, (q31_t)0x759e9de5, (q31_t)0x22f122ab,
+    (q31_t)0x75a5793c, (q31_t)0x22e69ac8, (q31_t)0x75ac5282, (q31_t)0x22dc118c,
+    (q31_t)0x75b329b5, (q31_t)0x22d186f8, (q31_t)0x75b9fed7, (q31_t)0x22c6fb0c,
+    (q31_t)0x75c0d1e7, (q31_t)0x22bc6dca, (q31_t)0x75c7a2e3, (q31_t)0x22b1df30,
+    (q31_t)0x75ce71ce, (q31_t)0x22a74f40, (q31_t)0x75d53ea5, (q31_t)0x229cbdfa,
+    (q31_t)0x75dc0968, (q31_t)0x22922b5e, (q31_t)0x75e2d219, (q31_t)0x2287976e,
+    (q31_t)0x75e998b5, (q31_t)0x227d0228, (q31_t)0x75f05d3d, (q31_t)0x22726b8e,
+    (q31_t)0x75f71fb1, (q31_t)0x2267d3a0, (q31_t)0x75fde011, (q31_t)0x225d3a5e,
+    (q31_t)0x76049e5b, (q31_t)0x22529fca, (q31_t)0x760b5a90, (q31_t)0x224803e2,
+    (q31_t)0x761214b0, (q31_t)0x223d66a8, (q31_t)0x7618ccba, (q31_t)0x2232c81c,
+    (q31_t)0x761f82af, (q31_t)0x2228283f, (q31_t)0x7626368d, (q31_t)0x221d8711,
+    (q31_t)0x762ce855, (q31_t)0x2212e492, (q31_t)0x76339806, (q31_t)0x220840c2,
+    (q31_t)0x763a45a0, (q31_t)0x21fd9ba3, (q31_t)0x7640f123, (q31_t)0x21f2f534,
+    (q31_t)0x76479a8e, (q31_t)0x21e84d76, (q31_t)0x764e41e2, (q31_t)0x21dda46a,
+    (q31_t)0x7654e71d, (q31_t)0x21d2fa0f, (q31_t)0x765b8a41, (q31_t)0x21c84e67,
+    (q31_t)0x76622b4c, (q31_t)0x21bda171, (q31_t)0x7668ca3e, (q31_t)0x21b2f32e,
+    (q31_t)0x766f6717, (q31_t)0x21a8439e, (q31_t)0x767601d7, (q31_t)0x219d92c2,
+    (q31_t)0x767c9a7e, (q31_t)0x2192e09b, (q31_t)0x7683310b, (q31_t)0x21882d28,
+    (q31_t)0x7689c57d, (q31_t)0x217d786a, (q31_t)0x769057d6, (q31_t)0x2172c262,
+    (q31_t)0x7696e814, (q31_t)0x21680b0f, (q31_t)0x769d7637, (q31_t)0x215d5273,
+    (q31_t)0x76a4023f, (q31_t)0x2152988d, (q31_t)0x76aa8c2c, (q31_t)0x2147dd5f,
+    (q31_t)0x76b113fd, (q31_t)0x213d20e8, (q31_t)0x76b799b3, (q31_t)0x21326329,
+    (q31_t)0x76be1d4c, (q31_t)0x2127a423, (q31_t)0x76c49ec9, (q31_t)0x211ce3d5,
+    (q31_t)0x76cb1e2a, (q31_t)0x21122240, (q31_t)0x76d19b6e, (q31_t)0x21075f65,
+    (q31_t)0x76d81695, (q31_t)0x20fc9b44, (q31_t)0x76de8f9e, (q31_t)0x20f1d5de,
+    (q31_t)0x76e5068a, (q31_t)0x20e70f32, (q31_t)0x76eb7b58, (q31_t)0x20dc4742,
+    (q31_t)0x76f1ee09, (q31_t)0x20d17e0d, (q31_t)0x76f85e9a, (q31_t)0x20c6b395,
+    (q31_t)0x76fecd0e, (q31_t)0x20bbe7d8, (q31_t)0x77053962, (q31_t)0x20b11ad9,
+    (q31_t)0x770ba398, (q31_t)0x20a64c97, (q31_t)0x77120bae, (q31_t)0x209b7d13,
+    (q31_t)0x771871a5, (q31_t)0x2090ac4d, (q31_t)0x771ed57c, (q31_t)0x2085da46,
+    (q31_t)0x77253733, (q31_t)0x207b06fe, (q31_t)0x772b96ca, (q31_t)0x20703275,
+    (q31_t)0x7731f440, (q31_t)0x20655cac, (q31_t)0x77384f95, (q31_t)0x205a85a3,
+    (q31_t)0x773ea8ca, (q31_t)0x204fad5b, (q31_t)0x7744ffdd, (q31_t)0x2044d3d4,
+    (q31_t)0x774b54ce, (q31_t)0x2039f90f, (q31_t)0x7751a79e, (q31_t)0x202f1d0b,
+    (q31_t)0x7757f84c, (q31_t)0x20243fca, (q31_t)0x775e46d8, (q31_t)0x2019614c,
+    (q31_t)0x77649341, (q31_t)0x200e8190, (q31_t)0x776add88, (q31_t)0x2003a099,
+    (q31_t)0x777125ac, (q31_t)0x1ff8be65, (q31_t)0x77776bac, (q31_t)0x1feddaf6,
+    (q31_t)0x777daf89, (q31_t)0x1fe2f64c, (q31_t)0x7783f143, (q31_t)0x1fd81067,
+    (q31_t)0x778a30d8, (q31_t)0x1fcd2948, (q31_t)0x77906e49, (q31_t)0x1fc240ef,
+    (q31_t)0x7796a996, (q31_t)0x1fb7575c, (q31_t)0x779ce2be, (q31_t)0x1fac6c91,
+    (q31_t)0x77a319c2, (q31_t)0x1fa1808c, (q31_t)0x77a94ea0, (q31_t)0x1f969350,
+    (q31_t)0x77af8159, (q31_t)0x1f8ba4dc, (q31_t)0x77b5b1ec, (q31_t)0x1f80b531,
+    (q31_t)0x77bbe05a, (q31_t)0x1f75c44e, (q31_t)0x77c20ca1, (q31_t)0x1f6ad235,
+    (q31_t)0x77c836c2, (q31_t)0x1f5fdee6, (q31_t)0x77ce5ebd, (q31_t)0x1f54ea62,
+    (q31_t)0x77d48490, (q31_t)0x1f49f4a8, (q31_t)0x77daa83d, (q31_t)0x1f3efdb9,
+    (q31_t)0x77e0c9c3, (q31_t)0x1f340596, (q31_t)0x77e6e921, (q31_t)0x1f290c3f,
+    (q31_t)0x77ed0657, (q31_t)0x1f1e11b5, (q31_t)0x77f32165, (q31_t)0x1f1315f7,
+    (q31_t)0x77f93a4b, (q31_t)0x1f081907, (q31_t)0x77ff5109, (q31_t)0x1efd1ae4,
+    (q31_t)0x7805659e, (q31_t)0x1ef21b90, (q31_t)0x780b780a, (q31_t)0x1ee71b0a,
+    (q31_t)0x7811884d, (q31_t)0x1edc1953, (q31_t)0x78179666, (q31_t)0x1ed1166b,
+    (q31_t)0x781da256, (q31_t)0x1ec61254, (q31_t)0x7823ac1d, (q31_t)0x1ebb0d0d,
+    (q31_t)0x7829b3b9, (q31_t)0x1eb00696, (q31_t)0x782fb92a, (q31_t)0x1ea4fef0,
+    (q31_t)0x7835bc71, (q31_t)0x1e99f61d, (q31_t)0x783bbd8e, (q31_t)0x1e8eec1b,
+    (q31_t)0x7841bc7f, (q31_t)0x1e83e0eb, (q31_t)0x7847b946, (q31_t)0x1e78d48e,
+    (q31_t)0x784db3e0, (q31_t)0x1e6dc705, (q31_t)0x7853ac4f, (q31_t)0x1e62b84f,
+    (q31_t)0x7859a292, (q31_t)0x1e57a86d, (q31_t)0x785f96a9, (q31_t)0x1e4c9760,
+    (q31_t)0x78658894, (q31_t)0x1e418528, (q31_t)0x786b7852, (q31_t)0x1e3671c5,
+    (q31_t)0x787165e3, (q31_t)0x1e2b5d38, (q31_t)0x78775147, (q31_t)0x1e204781,
+    (q31_t)0x787d3a7e, (q31_t)0x1e1530a1, (q31_t)0x78832187, (q31_t)0x1e0a1898,
+    (q31_t)0x78890663, (q31_t)0x1dfeff67, (q31_t)0x788ee910, (q31_t)0x1df3e50d,
+    (q31_t)0x7894c98f, (q31_t)0x1de8c98c, (q31_t)0x789aa7e0, (q31_t)0x1dddace4,
+    (q31_t)0x78a08402, (q31_t)0x1dd28f15, (q31_t)0x78a65df6, (q31_t)0x1dc7701f,
+    (q31_t)0x78ac35ba, (q31_t)0x1dbc5004, (q31_t)0x78b20b4f, (q31_t)0x1db12ec3,
+    (q31_t)0x78b7deb4, (q31_t)0x1da60c5d, (q31_t)0x78bdafea, (q31_t)0x1d9ae8d2,
+    (q31_t)0x78c37eef, (q31_t)0x1d8fc424, (q31_t)0x78c94bc4, (q31_t)0x1d849e51,
+    (q31_t)0x78cf1669, (q31_t)0x1d79775c, (q31_t)0x78d4dedd, (q31_t)0x1d6e4f43,
+    (q31_t)0x78daa520, (q31_t)0x1d632608, (q31_t)0x78e06932, (q31_t)0x1d57fbaa,
+    (q31_t)0x78e62b13, (q31_t)0x1d4cd02c, (q31_t)0x78ebeac2, (q31_t)0x1d41a38c,
+    (q31_t)0x78f1a840, (q31_t)0x1d3675cb, (q31_t)0x78f7638b, (q31_t)0x1d2b46ea,
+    (q31_t)0x78fd1ca4, (q31_t)0x1d2016e9, (q31_t)0x7902d38b, (q31_t)0x1d14e5c9,
+    (q31_t)0x7908883f, (q31_t)0x1d09b389, (q31_t)0x790e3ac0, (q31_t)0x1cfe802b,
+    (q31_t)0x7913eb0e, (q31_t)0x1cf34baf, (q31_t)0x79199929, (q31_t)0x1ce81615,
+    (q31_t)0x791f4510, (q31_t)0x1cdcdf5e, (q31_t)0x7924eec3, (q31_t)0x1cd1a78a,
+    (q31_t)0x792a9642, (q31_t)0x1cc66e99, (q31_t)0x79303b8e, (q31_t)0x1cbb348d,
+    (q31_t)0x7935dea4, (q31_t)0x1caff965, (q31_t)0x793b7f86, (q31_t)0x1ca4bd21,
+    (q31_t)0x79411e33, (q31_t)0x1c997fc4, (q31_t)0x7946baac, (q31_t)0x1c8e414b,
+    (q31_t)0x794c54ee, (q31_t)0x1c8301b9, (q31_t)0x7951ecfc, (q31_t)0x1c77c10e,
+    (q31_t)0x795782d3, (q31_t)0x1c6c7f4a, (q31_t)0x795d1675, (q31_t)0x1c613c6d,
+    (q31_t)0x7962a7e0, (q31_t)0x1c55f878, (q31_t)0x79683715, (q31_t)0x1c4ab36b,
+    (q31_t)0x796dc414, (q31_t)0x1c3f6d47, (q31_t)0x79734edc, (q31_t)0x1c34260c,
+    (q31_t)0x7978d76c, (q31_t)0x1c28ddbb, (q31_t)0x797e5dc6, (q31_t)0x1c1d9454,
+    (q31_t)0x7983e1e8, (q31_t)0x1c1249d8, (q31_t)0x798963d2, (q31_t)0x1c06fe46,
+    (q31_t)0x798ee385, (q31_t)0x1bfbb1a0, (q31_t)0x799460ff, (q31_t)0x1bf063e6,
+    (q31_t)0x7999dc42, (q31_t)0x1be51518, (q31_t)0x799f554b, (q31_t)0x1bd9c537,
+    (q31_t)0x79a4cc1c, (q31_t)0x1bce7442, (q31_t)0x79aa40b4, (q31_t)0x1bc3223c,
+    (q31_t)0x79afb313, (q31_t)0x1bb7cf23, (q31_t)0x79b52339, (q31_t)0x1bac7af9,
+    (q31_t)0x79ba9125, (q31_t)0x1ba125bd, (q31_t)0x79bffcd7, (q31_t)0x1b95cf71,
+    (q31_t)0x79c5664f, (q31_t)0x1b8a7815, (q31_t)0x79cacd8d, (q31_t)0x1b7f1fa9,
+    (q31_t)0x79d03291, (q31_t)0x1b73c62d, (q31_t)0x79d5955a, (q31_t)0x1b686ba3,
+    (q31_t)0x79daf5e8, (q31_t)0x1b5d100a, (q31_t)0x79e0543c, (q31_t)0x1b51b363,
+    (q31_t)0x79e5b054, (q31_t)0x1b4655ae, (q31_t)0x79eb0a31, (q31_t)0x1b3af6ec,
+    (q31_t)0x79f061d2, (q31_t)0x1b2f971e, (q31_t)0x79f5b737, (q31_t)0x1b243643,
+    (q31_t)0x79fb0a60, (q31_t)0x1b18d45c, (q31_t)0x7a005b4d, (q31_t)0x1b0d716a,
+    (q31_t)0x7a05a9fd, (q31_t)0x1b020d6c, (q31_t)0x7a0af671, (q31_t)0x1af6a865,
+    (q31_t)0x7a1040a8, (q31_t)0x1aeb4253, (q31_t)0x7a1588a2, (q31_t)0x1adfdb37,
+    (q31_t)0x7a1ace5f, (q31_t)0x1ad47312, (q31_t)0x7a2011de, (q31_t)0x1ac909e5,
+    (q31_t)0x7a25531f, (q31_t)0x1abd9faf, (q31_t)0x7a2a9223, (q31_t)0x1ab23471,
+    (q31_t)0x7a2fcee8, (q31_t)0x1aa6c82b, (q31_t)0x7a350970, (q31_t)0x1a9b5adf,
+    (q31_t)0x7a3a41b9, (q31_t)0x1a8fec8c, (q31_t)0x7a3f77c3, (q31_t)0x1a847d33,
+    (q31_t)0x7a44ab8e, (q31_t)0x1a790cd4, (q31_t)0x7a49dd1a, (q31_t)0x1a6d9b70,
+    (q31_t)0x7a4f0c67, (q31_t)0x1a622907, (q31_t)0x7a543974, (q31_t)0x1a56b599,
+    (q31_t)0x7a596442, (q31_t)0x1a4b4128, (q31_t)0x7a5e8cd0, (q31_t)0x1a3fcbb3,
+    (q31_t)0x7a63b31d, (q31_t)0x1a34553b, (q31_t)0x7a68d72b, (q31_t)0x1a28ddc0,
+    (q31_t)0x7a6df8f8, (q31_t)0x1a1d6544, (q31_t)0x7a731884, (q31_t)0x1a11ebc5,
+    (q31_t)0x7a7835cf, (q31_t)0x1a067145, (q31_t)0x7a7d50da, (q31_t)0x19faf5c5,
+    (q31_t)0x7a8269a3, (q31_t)0x19ef7944, (q31_t)0x7a87802a, (q31_t)0x19e3fbc3,
+    (q31_t)0x7a8c9470, (q31_t)0x19d87d42, (q31_t)0x7a91a674, (q31_t)0x19ccfdc2,
+    (q31_t)0x7a96b636, (q31_t)0x19c17d44, (q31_t)0x7a9bc3b6, (q31_t)0x19b5fbc8,
+    (q31_t)0x7aa0cef3, (q31_t)0x19aa794d, (q31_t)0x7aa5d7ee, (q31_t)0x199ef5d6,
+    (q31_t)0x7aaadea6, (q31_t)0x19937161, (q31_t)0x7aafe31b, (q31_t)0x1987ebf0,
+    (q31_t)0x7ab4e54c, (q31_t)0x197c6584, (q31_t)0x7ab9e53a, (q31_t)0x1970de1b,
+    (q31_t)0x7abee2e5, (q31_t)0x196555b8, (q31_t)0x7ac3de4c, (q31_t)0x1959cc5a,
+    (q31_t)0x7ac8d76f, (q31_t)0x194e4201, (q31_t)0x7acdce4d, (q31_t)0x1942b6af,
+    (q31_t)0x7ad2c2e8, (q31_t)0x19372a64, (q31_t)0x7ad7b53d, (q31_t)0x192b9d1f,
+    (q31_t)0x7adca54e, (q31_t)0x19200ee3, (q31_t)0x7ae1931a, (q31_t)0x19147fae,
+    (q31_t)0x7ae67ea1, (q31_t)0x1908ef82, (q31_t)0x7aeb67e3, (q31_t)0x18fd5e5f,
+    (q31_t)0x7af04edf, (q31_t)0x18f1cc45, (q31_t)0x7af53395, (q31_t)0x18e63935,
+    (q31_t)0x7afa1605, (q31_t)0x18daa52f, (q31_t)0x7afef630, (q31_t)0x18cf1034,
+    (q31_t)0x7b03d414, (q31_t)0x18c37a44, (q31_t)0x7b08afb2, (q31_t)0x18b7e35f,
+    (q31_t)0x7b0d8909, (q31_t)0x18ac4b87, (q31_t)0x7b126019, (q31_t)0x18a0b2bb,
+    (q31_t)0x7b1734e2, (q31_t)0x189518fc, (q31_t)0x7b1c0764, (q31_t)0x18897e4a,
+    (q31_t)0x7b20d79e, (q31_t)0x187de2a7, (q31_t)0x7b25a591, (q31_t)0x18724611,
+    (q31_t)0x7b2a713d, (q31_t)0x1866a88a, (q31_t)0x7b2f3aa0, (q31_t)0x185b0a13,
+    (q31_t)0x7b3401bb, (q31_t)0x184f6aab, (q31_t)0x7b38c68e, (q31_t)0x1843ca53,
+    (q31_t)0x7b3d8918, (q31_t)0x1838290c, (q31_t)0x7b42495a, (q31_t)0x182c86d5,
+    (q31_t)0x7b470753, (q31_t)0x1820e3b0, (q31_t)0x7b4bc303, (q31_t)0x18153f9d,
+    (q31_t)0x7b507c69, (q31_t)0x18099a9c, (q31_t)0x7b553386, (q31_t)0x17fdf4ae,
+    (q31_t)0x7b59e85a, (q31_t)0x17f24dd3, (q31_t)0x7b5e9ae4, (q31_t)0x17e6a60c,
+    (q31_t)0x7b634b23, (q31_t)0x17dafd59, (q31_t)0x7b67f919, (q31_t)0x17cf53bb,
+    (q31_t)0x7b6ca4c4, (q31_t)0x17c3a931, (q31_t)0x7b714e25, (q31_t)0x17b7fdbd,
+    (q31_t)0x7b75f53c, (q31_t)0x17ac515f, (q31_t)0x7b7a9a07, (q31_t)0x17a0a417,
+    (q31_t)0x7b7f3c87, (q31_t)0x1794f5e6, (q31_t)0x7b83dcbc, (q31_t)0x178946cc,
+    (q31_t)0x7b887aa6, (q31_t)0x177d96ca, (q31_t)0x7b8d1644, (q31_t)0x1771e5e0,
+    (q31_t)0x7b91af97, (q31_t)0x1766340f, (q31_t)0x7b96469d, (q31_t)0x175a8157,
+    (q31_t)0x7b9adb57, (q31_t)0x174ecdb8, (q31_t)0x7b9f6dc5, (q31_t)0x17431933,
+    (q31_t)0x7ba3fde7, (q31_t)0x173763c9, (q31_t)0x7ba88bbc, (q31_t)0x172bad7a,
+    (q31_t)0x7bad1744, (q31_t)0x171ff646, (q31_t)0x7bb1a080, (q31_t)0x17143e2d,
+    (q31_t)0x7bb6276e, (q31_t)0x17088531, (q31_t)0x7bbaac0e, (q31_t)0x16fccb51,
+    (q31_t)0x7bbf2e62, (q31_t)0x16f1108f, (q31_t)0x7bc3ae67, (q31_t)0x16e554ea,
+    (q31_t)0x7bc82c1f, (q31_t)0x16d99864, (q31_t)0x7bcca789, (q31_t)0x16cddafb,
+    (q31_t)0x7bd120a4, (q31_t)0x16c21cb2, (q31_t)0x7bd59771, (q31_t)0x16b65d88,
+    (q31_t)0x7bda0bf0, (q31_t)0x16aa9d7e, (q31_t)0x7bde7e20, (q31_t)0x169edc94,
+    (q31_t)0x7be2ee01, (q31_t)0x16931acb, (q31_t)0x7be75b93, (q31_t)0x16875823,
+    (q31_t)0x7bebc6d5, (q31_t)0x167b949d, (q31_t)0x7bf02fc9, (q31_t)0x166fd039,
+    (q31_t)0x7bf4966c, (q31_t)0x16640af7, (q31_t)0x7bf8fac0, (q31_t)0x165844d8,
+    (q31_t)0x7bfd5cc4, (q31_t)0x164c7ddd, (q31_t)0x7c01bc78, (q31_t)0x1640b606,
+    (q31_t)0x7c0619dc, (q31_t)0x1634ed53, (q31_t)0x7c0a74f0, (q31_t)0x162923c5,
+    (q31_t)0x7c0ecdb2, (q31_t)0x161d595d, (q31_t)0x7c132424, (q31_t)0x16118e1a,
+    (q31_t)0x7c177845, (q31_t)0x1605c1fd, (q31_t)0x7c1bca16, (q31_t)0x15f9f507,
+    (q31_t)0x7c201994, (q31_t)0x15ee2738, (q31_t)0x7c2466c2, (q31_t)0x15e25890,
+    (q31_t)0x7c28b19e, (q31_t)0x15d68911, (q31_t)0x7c2cfa28, (q31_t)0x15cab8ba,
+    (q31_t)0x7c314060, (q31_t)0x15bee78c, (q31_t)0x7c358446, (q31_t)0x15b31587,
+    (q31_t)0x7c39c5da, (q31_t)0x15a742ac, (q31_t)0x7c3e051b, (q31_t)0x159b6efb,
+    (q31_t)0x7c42420a, (q31_t)0x158f9a76, (q31_t)0x7c467ca6, (q31_t)0x1583c51b,
+    (q31_t)0x7c4ab4ef, (q31_t)0x1577eeec, (q31_t)0x7c4eeae5, (q31_t)0x156c17e9,
+    (q31_t)0x7c531e88, (q31_t)0x15604013, (q31_t)0x7c574fd8, (q31_t)0x1554676a,
+    (q31_t)0x7c5b7ed4, (q31_t)0x15488dee, (q31_t)0x7c5fab7c, (q31_t)0x153cb3a0,
+    (q31_t)0x7c63d5d1, (q31_t)0x1530d881, (q31_t)0x7c67fdd1, (q31_t)0x1524fc90,
+    (q31_t)0x7c6c237e, (q31_t)0x15191fcf, (q31_t)0x7c7046d6, (q31_t)0x150d423d,
+    (q31_t)0x7c7467d9, (q31_t)0x150163dc, (q31_t)0x7c788688, (q31_t)0x14f584ac,
+    (q31_t)0x7c7ca2e2, (q31_t)0x14e9a4ac, (q31_t)0x7c80bce7, (q31_t)0x14ddc3de,
+    (q31_t)0x7c84d496, (q31_t)0x14d1e242, (q31_t)0x7c88e9f1, (q31_t)0x14c5ffd9,
+    (q31_t)0x7c8cfcf6, (q31_t)0x14ba1ca3, (q31_t)0x7c910da5, (q31_t)0x14ae38a0,
+    (q31_t)0x7c951bff, (q31_t)0x14a253d1, (q31_t)0x7c992803, (q31_t)0x14966e36,
+    (q31_t)0x7c9d31b0, (q31_t)0x148a87d1, (q31_t)0x7ca13908, (q31_t)0x147ea0a0,
+    (q31_t)0x7ca53e09, (q31_t)0x1472b8a5, (q31_t)0x7ca940b3, (q31_t)0x1466cfe1,
+    (q31_t)0x7cad4107, (q31_t)0x145ae653, (q31_t)0x7cb13f04, (q31_t)0x144efbfc,
+    (q31_t)0x7cb53aaa, (q31_t)0x144310dd, (q31_t)0x7cb933f9, (q31_t)0x143724f5,
+    (q31_t)0x7cbd2af0, (q31_t)0x142b3846, (q31_t)0x7cc11f90, (q31_t)0x141f4ad1,
+    (q31_t)0x7cc511d9, (q31_t)0x14135c94, (q31_t)0x7cc901c9, (q31_t)0x14076d91,
+    (q31_t)0x7cccef62, (q31_t)0x13fb7dc9, (q31_t)0x7cd0daa2, (q31_t)0x13ef8d3c,
+    (q31_t)0x7cd4c38b, (q31_t)0x13e39be9, (q31_t)0x7cd8aa1b, (q31_t)0x13d7a9d3,
+    (q31_t)0x7cdc8e52, (q31_t)0x13cbb6f8, (q31_t)0x7ce07031, (q31_t)0x13bfc35b,
+    (q31_t)0x7ce44fb7, (q31_t)0x13b3cefa, (q31_t)0x7ce82ce4, (q31_t)0x13a7d9d7,
+    (q31_t)0x7cec07b8, (q31_t)0x139be3f2, (q31_t)0x7cefe032, (q31_t)0x138fed4b,
+    (q31_t)0x7cf3b653, (q31_t)0x1383f5e3, (q31_t)0x7cf78a1b, (q31_t)0x1377fdbb,
+    (q31_t)0x7cfb5b89, (q31_t)0x136c04d2, (q31_t)0x7cff2a9d, (q31_t)0x13600b2a,
+    (q31_t)0x7d02f757, (q31_t)0x135410c3, (q31_t)0x7d06c1b6, (q31_t)0x1348159d,
+    (q31_t)0x7d0a89bc, (q31_t)0x133c19b8, (q31_t)0x7d0e4f67, (q31_t)0x13301d16,
+    (q31_t)0x7d1212b7, (q31_t)0x13241fb6, (q31_t)0x7d15d3ad, (q31_t)0x1318219a,
+    (q31_t)0x7d199248, (q31_t)0x130c22c1, (q31_t)0x7d1d4e88, (q31_t)0x1300232c,
+    (q31_t)0x7d21086c, (q31_t)0x12f422db, (q31_t)0x7d24bff6, (q31_t)0x12e821cf,
+    (q31_t)0x7d287523, (q31_t)0x12dc2009, (q31_t)0x7d2c27f6, (q31_t)0x12d01d89,
+    (q31_t)0x7d2fd86c, (q31_t)0x12c41a4f, (q31_t)0x7d338687, (q31_t)0x12b8165b,
+    (q31_t)0x7d373245, (q31_t)0x12ac11af, (q31_t)0x7d3adba7, (q31_t)0x12a00c4b,
+    (q31_t)0x7d3e82ae, (q31_t)0x1294062f, (q31_t)0x7d422757, (q31_t)0x1287ff5b,
+    (q31_t)0x7d45c9a4, (q31_t)0x127bf7d1, (q31_t)0x7d496994, (q31_t)0x126fef90,
+    (q31_t)0x7d4d0728, (q31_t)0x1263e699, (q31_t)0x7d50a25e, (q31_t)0x1257dced,
+    (q31_t)0x7d543b37, (q31_t)0x124bd28c, (q31_t)0x7d57d1b3, (q31_t)0x123fc776,
+    (q31_t)0x7d5b65d2, (q31_t)0x1233bbac, (q31_t)0x7d5ef793, (q31_t)0x1227af2e,
+    (q31_t)0x7d6286f6, (q31_t)0x121ba1fd, (q31_t)0x7d6613fb, (q31_t)0x120f941a,
+    (q31_t)0x7d699ea3, (q31_t)0x12038584, (q31_t)0x7d6d26ec, (q31_t)0x11f7763c,
+    (q31_t)0x7d70acd7, (q31_t)0x11eb6643, (q31_t)0x7d743064, (q31_t)0x11df5599,
+    (q31_t)0x7d77b192, (q31_t)0x11d3443f, (q31_t)0x7d7b3061, (q31_t)0x11c73235,
+    (q31_t)0x7d7eacd2, (q31_t)0x11bb1f7c, (q31_t)0x7d8226e4, (q31_t)0x11af0c13,
+    (q31_t)0x7d859e96, (q31_t)0x11a2f7fc, (q31_t)0x7d8913ea, (q31_t)0x1196e337,
+    (q31_t)0x7d8c86de, (q31_t)0x118acdc4, (q31_t)0x7d8ff772, (q31_t)0x117eb7a4,
+    (q31_t)0x7d9365a8, (q31_t)0x1172a0d7, (q31_t)0x7d96d17d, (q31_t)0x1166895f,
+    (q31_t)0x7d9a3af2, (q31_t)0x115a713a, (q31_t)0x7d9da208, (q31_t)0x114e586a,
+    (q31_t)0x7da106bd, (q31_t)0x11423ef0, (q31_t)0x7da46912, (q31_t)0x113624cb,
+    (q31_t)0x7da7c907, (q31_t)0x112a09fc, (q31_t)0x7dab269b, (q31_t)0x111dee84,
+    (q31_t)0x7dae81cf, (q31_t)0x1111d263, (q31_t)0x7db1daa2, (q31_t)0x1105b599,
+    (q31_t)0x7db53113, (q31_t)0x10f99827, (q31_t)0x7db88524, (q31_t)0x10ed7a0e,
+    (q31_t)0x7dbbd6d4, (q31_t)0x10e15b4e, (q31_t)0x7dbf2622, (q31_t)0x10d53be7,
+    (q31_t)0x7dc2730f, (q31_t)0x10c91bda, (q31_t)0x7dc5bd9b, (q31_t)0x10bcfb28,
+    (q31_t)0x7dc905c5, (q31_t)0x10b0d9d0, (q31_t)0x7dcc4b8d, (q31_t)0x10a4b7d3,
+    (q31_t)0x7dcf8ef3, (q31_t)0x10989532, (q31_t)0x7dd2cff7, (q31_t)0x108c71ee,
+    (q31_t)0x7dd60e99, (q31_t)0x10804e06, (q31_t)0x7dd94ad8, (q31_t)0x1074297b,
+    (q31_t)0x7ddc84b5, (q31_t)0x1068044e, (q31_t)0x7ddfbc30, (q31_t)0x105bde7f,
+    (q31_t)0x7de2f148, (q31_t)0x104fb80e, (q31_t)0x7de623fd, (q31_t)0x104390fd,
+    (q31_t)0x7de9544f, (q31_t)0x1037694b, (q31_t)0x7dec823e, (q31_t)0x102b40f8,
+    (q31_t)0x7defadca, (q31_t)0x101f1807, (q31_t)0x7df2d6f3, (q31_t)0x1012ee76,
+    (q31_t)0x7df5fdb8, (q31_t)0x1006c446, (q31_t)0x7df9221a, (q31_t)0xffa9979,
+    (q31_t)0x7dfc4418, (q31_t)0xfee6e0d, (q31_t)0x7dff63b2, (q31_t)0xfe24205,
+    (q31_t)0x7e0280e9, (q31_t)0xfd6155f, (q31_t)0x7e059bbb, (q31_t)0xfc9e81e,
+    (q31_t)0x7e08b42a, (q31_t)0xfbdba40, (q31_t)0x7e0bca34, (q31_t)0xfb18bc8,
+    (q31_t)0x7e0eddd9, (q31_t)0xfa55cb4, (q31_t)0x7e11ef1b, (q31_t)0xf992d06,
+    (q31_t)0x7e14fdf7, (q31_t)0xf8cfcbe, (q31_t)0x7e180a6f, (q31_t)0xf80cbdc,
+    (q31_t)0x7e1b1482, (q31_t)0xf749a61, (q31_t)0x7e1e1c30, (q31_t)0xf68684e,
+    (q31_t)0x7e212179, (q31_t)0xf5c35a3, (q31_t)0x7e24245d, (q31_t)0xf500260,
+    (q31_t)0x7e2724db, (q31_t)0xf43ce86, (q31_t)0x7e2a22f4, (q31_t)0xf379a16,
+    (q31_t)0x7e2d1ea8, (q31_t)0xf2b650f, (q31_t)0x7e3017f6, (q31_t)0xf1f2f73,
+    (q31_t)0x7e330ede, (q31_t)0xf12f941, (q31_t)0x7e360360, (q31_t)0xf06c27a,
+    (q31_t)0x7e38f57c, (q31_t)0xefa8b20, (q31_t)0x7e3be532, (q31_t)0xeee5331,
+    (q31_t)0x7e3ed282, (q31_t)0xee21aaf, (q31_t)0x7e41bd6c, (q31_t)0xed5e19a,
+    (q31_t)0x7e44a5ef, (q31_t)0xec9a7f3, (q31_t)0x7e478c0b, (q31_t)0xebd6db9,
+    (q31_t)0x7e4a6fc1, (q31_t)0xeb132ef, (q31_t)0x7e4d5110, (q31_t)0xea4f793,
+    (q31_t)0x7e502ff9, (q31_t)0xe98bba7, (q31_t)0x7e530c7a, (q31_t)0xe8c7f2a,
+    (q31_t)0x7e55e694, (q31_t)0xe80421e, (q31_t)0x7e58be47, (q31_t)0xe740483,
+    (q31_t)0x7e5b9392, (q31_t)0xe67c65a, (q31_t)0x7e5e6676, (q31_t)0xe5b87a2,
+    (q31_t)0x7e6136f3, (q31_t)0xe4f485c, (q31_t)0x7e640507, (q31_t)0xe430889,
+    (q31_t)0x7e66d0b4, (q31_t)0xe36c82a, (q31_t)0x7e6999fa, (q31_t)0xe2a873e,
+    (q31_t)0x7e6c60d7, (q31_t)0xe1e45c6, (q31_t)0x7e6f254c, (q31_t)0xe1203c3,
+    (q31_t)0x7e71e759, (q31_t)0xe05c135, (q31_t)0x7e74a6fd, (q31_t)0xdf97e1d,
+    (q31_t)0x7e77643a, (q31_t)0xded3a7b, (q31_t)0x7e7a1f0d, (q31_t)0xde0f64f,
+    (q31_t)0x7e7cd778, (q31_t)0xdd4b19a, (q31_t)0x7e7f8d7b, (q31_t)0xdc86c5d,
+    (q31_t)0x7e824114, (q31_t)0xdbc2698, (q31_t)0x7e84f245, (q31_t)0xdafe04b,
+    (q31_t)0x7e87a10c, (q31_t)0xda39978, (q31_t)0x7e8a4d6a, (q31_t)0xd97521d,
+    (q31_t)0x7e8cf75f, (q31_t)0xd8b0a3d, (q31_t)0x7e8f9eeb, (q31_t)0xd7ec1d6,
+    (q31_t)0x7e92440d, (q31_t)0xd7278eb, (q31_t)0x7e94e6c6, (q31_t)0xd662f7b,
+    (q31_t)0x7e978715, (q31_t)0xd59e586, (q31_t)0x7e9a24fb, (q31_t)0xd4d9b0e,
+    (q31_t)0x7e9cc076, (q31_t)0xd415013, (q31_t)0x7e9f5988, (q31_t)0xd350495,
+    (q31_t)0x7ea1f02f, (q31_t)0xd28b894, (q31_t)0x7ea4846c, (q31_t)0xd1c6c11,
+    (q31_t)0x7ea7163f, (q31_t)0xd101f0e, (q31_t)0x7ea9a5a8, (q31_t)0xd03d189,
+    (q31_t)0x7eac32a6, (q31_t)0xcf78383, (q31_t)0x7eaebd3a, (q31_t)0xceb34fe,
+    (q31_t)0x7eb14563, (q31_t)0xcdee5f9, (q31_t)0x7eb3cb21, (q31_t)0xcd29676,
+    (q31_t)0x7eb64e75, (q31_t)0xcc64673, (q31_t)0x7eb8cf5d, (q31_t)0xcb9f5f3,
+    (q31_t)0x7ebb4ddb, (q31_t)0xcada4f5, (q31_t)0x7ebdc9ed, (q31_t)0xca1537a,
+    (q31_t)0x7ec04394, (q31_t)0xc950182, (q31_t)0x7ec2bad0, (q31_t)0xc88af0e,
+    (q31_t)0x7ec52fa0, (q31_t)0xc7c5c1e, (q31_t)0x7ec7a205, (q31_t)0xc7008b3,
+    (q31_t)0x7eca11fe, (q31_t)0xc63b4ce, (q31_t)0x7ecc7f8b, (q31_t)0xc57606e,
+    (q31_t)0x7eceeaad, (q31_t)0xc4b0b94, (q31_t)0x7ed15363, (q31_t)0xc3eb641,
+    (q31_t)0x7ed3b9ad, (q31_t)0xc326075, (q31_t)0x7ed61d8a, (q31_t)0xc260a31,
+    (q31_t)0x7ed87efc, (q31_t)0xc19b374, (q31_t)0x7edade01, (q31_t)0xc0d5c41,
+    (q31_t)0x7edd3a9a, (q31_t)0xc010496, (q31_t)0x7edf94c7, (q31_t)0xbf4ac75,
+    (q31_t)0x7ee1ec87, (q31_t)0xbe853de, (q31_t)0x7ee441da, (q31_t)0xbdbfad1,
+    (q31_t)0x7ee694c1, (q31_t)0xbcfa150, (q31_t)0x7ee8e53a, (q31_t)0xbc34759,
+    (q31_t)0x7eeb3347, (q31_t)0xbb6ecef, (q31_t)0x7eed7ee7, (q31_t)0xbaa9211,
+    (q31_t)0x7eefc81a, (q31_t)0xb9e36c0, (q31_t)0x7ef20ee0, (q31_t)0xb91dafc,
+    (q31_t)0x7ef45338, (q31_t)0xb857ec7, (q31_t)0x7ef69523, (q31_t)0xb79221f,
+    (q31_t)0x7ef8d4a1, (q31_t)0xb6cc506, (q31_t)0x7efb11b1, (q31_t)0xb60677c,
+    (q31_t)0x7efd4c54, (q31_t)0xb540982, (q31_t)0x7eff8489, (q31_t)0xb47ab19,
+    (q31_t)0x7f01ba50, (q31_t)0xb3b4c40, (q31_t)0x7f03eda9, (q31_t)0xb2eecf8,
+    (q31_t)0x7f061e95, (q31_t)0xb228d42, (q31_t)0x7f084d12, (q31_t)0xb162d1d,
+    (q31_t)0x7f0a7921, (q31_t)0xb09cc8c, (q31_t)0x7f0ca2c2, (q31_t)0xafd6b8d,
+    (q31_t)0x7f0ec9f5, (q31_t)0xaf10a22, (q31_t)0x7f10eeb9, (q31_t)0xae4a84b,
+    (q31_t)0x7f13110f, (q31_t)0xad84609, (q31_t)0x7f1530f7, (q31_t)0xacbe35b,
+    (q31_t)0x7f174e70, (q31_t)0xabf8043, (q31_t)0x7f19697a, (q31_t)0xab31cc1,
+    (q31_t)0x7f1b8215, (q31_t)0xaa6b8d5, (q31_t)0x7f1d9842, (q31_t)0xa9a5480,
+    (q31_t)0x7f1fabff, (q31_t)0xa8defc3, (q31_t)0x7f21bd4e, (q31_t)0xa818a9d,
+    (q31_t)0x7f23cc2e, (q31_t)0xa752510, (q31_t)0x7f25d89e, (q31_t)0xa68bf1b,
+    (q31_t)0x7f27e29f, (q31_t)0xa5c58c0, (q31_t)0x7f29ea31, (q31_t)0xa4ff1fe,
+    (q31_t)0x7f2bef53, (q31_t)0xa438ad7, (q31_t)0x7f2df206, (q31_t)0xa37234a,
+    (q31_t)0x7f2ff24a, (q31_t)0xa2abb59, (q31_t)0x7f31f01d, (q31_t)0xa1e5303,
+    (q31_t)0x7f33eb81, (q31_t)0xa11ea49, (q31_t)0x7f35e476, (q31_t)0xa05812c,
+    (q31_t)0x7f37dafa, (q31_t)0x9f917ac, (q31_t)0x7f39cf0e, (q31_t)0x9ecadc9,
+    (q31_t)0x7f3bc0b3, (q31_t)0x9e04385, (q31_t)0x7f3dafe7, (q31_t)0x9d3d8df,
+    (q31_t)0x7f3f9cab, (q31_t)0x9c76dd8, (q31_t)0x7f4186ff, (q31_t)0x9bb0271,
+    (q31_t)0x7f436ee3, (q31_t)0x9ae96aa, (q31_t)0x7f455456, (q31_t)0x9a22a83,
+    (q31_t)0x7f473759, (q31_t)0x995bdfd, (q31_t)0x7f4917eb, (q31_t)0x9895118,
+    (q31_t)0x7f4af60d, (q31_t)0x97ce3d5, (q31_t)0x7f4cd1be, (q31_t)0x9707635,
+    (q31_t)0x7f4eaafe, (q31_t)0x9640837, (q31_t)0x7f5081cd, (q31_t)0x95799dd,
+    (q31_t)0x7f52562c, (q31_t)0x94b2b27, (q31_t)0x7f54281a, (q31_t)0x93ebc14,
+    (q31_t)0x7f55f796, (q31_t)0x9324ca7, (q31_t)0x7f57c4a2, (q31_t)0x925dcdf,
+    (q31_t)0x7f598f3c, (q31_t)0x9196cbc, (q31_t)0x7f5b5765, (q31_t)0x90cfc40,
+    (q31_t)0x7f5d1d1d, (q31_t)0x9008b6a, (q31_t)0x7f5ee063, (q31_t)0x8f41a3c,
+    (q31_t)0x7f60a138, (q31_t)0x8e7a8b5, (q31_t)0x7f625f9b, (q31_t)0x8db36d6,
+    (q31_t)0x7f641b8d, (q31_t)0x8cec4a0, (q31_t)0x7f65d50d, (q31_t)0x8c25213,
+    (q31_t)0x7f678c1c, (q31_t)0x8b5df30, (q31_t)0x7f6940b8, (q31_t)0x8a96bf6,
+    (q31_t)0x7f6af2e3, (q31_t)0x89cf867, (q31_t)0x7f6ca29c, (q31_t)0x8908483,
+    (q31_t)0x7f6e4fe3, (q31_t)0x884104b, (q31_t)0x7f6ffab8, (q31_t)0x8779bbe,
+    (q31_t)0x7f71a31b, (q31_t)0x86b26de, (q31_t)0x7f73490b, (q31_t)0x85eb1ab,
+    (q31_t)0x7f74ec8a, (q31_t)0x8523c25, (q31_t)0x7f768d96, (q31_t)0x845c64d,
+    (q31_t)0x7f782c30, (q31_t)0x8395024, (q31_t)0x7f79c857, (q31_t)0x82cd9a9,
+    (q31_t)0x7f7b620c, (q31_t)0x82062de, (q31_t)0x7f7cf94e, (q31_t)0x813ebc2,
+    (q31_t)0x7f7e8e1e, (q31_t)0x8077457, (q31_t)0x7f80207b, (q31_t)0x7fafc9c,
+    (q31_t)0x7f81b065, (q31_t)0x7ee8493, (q31_t)0x7f833ddd, (q31_t)0x7e20c3b,
+    (q31_t)0x7f84c8e2, (q31_t)0x7d59396, (q31_t)0x7f865174, (q31_t)0x7c91aa3,
+    (q31_t)0x7f87d792, (q31_t)0x7bca163, (q31_t)0x7f895b3e, (q31_t)0x7b027d7,
+    (q31_t)0x7f8adc77, (q31_t)0x7a3adff, (q31_t)0x7f8c5b3d, (q31_t)0x79733dc,
+    (q31_t)0x7f8dd78f, (q31_t)0x78ab96e, (q31_t)0x7f8f516e, (q31_t)0x77e3eb5,
+    (q31_t)0x7f90c8da, (q31_t)0x771c3b3, (q31_t)0x7f923dd2, (q31_t)0x7654867,
+    (q31_t)0x7f93b058, (q31_t)0x758ccd2, (q31_t)0x7f952069, (q31_t)0x74c50f4,
+    (q31_t)0x7f968e07, (q31_t)0x73fd4cf, (q31_t)0x7f97f932, (q31_t)0x7335862,
+    (q31_t)0x7f9961e8, (q31_t)0x726dbae, (q31_t)0x7f9ac82c, (q31_t)0x71a5eb3,
+    (q31_t)0x7f9c2bfb, (q31_t)0x70de172, (q31_t)0x7f9d8d56, (q31_t)0x70163eb,
+    (q31_t)0x7f9eec3e, (q31_t)0x6f4e620, (q31_t)0x7fa048b2, (q31_t)0x6e86810,
+    (q31_t)0x7fa1a2b2, (q31_t)0x6dbe9bb, (q31_t)0x7fa2fa3d, (q31_t)0x6cf6b23,
+    (q31_t)0x7fa44f55, (q31_t)0x6c2ec48, (q31_t)0x7fa5a1f9, (q31_t)0x6b66d29,
+    (q31_t)0x7fa6f228, (q31_t)0x6a9edc9, (q31_t)0x7fa83fe3, (q31_t)0x69d6e27,
+    (q31_t)0x7fa98b2a, (q31_t)0x690ee44, (q31_t)0x7faad3fd, (q31_t)0x6846e1f,
+    (q31_t)0x7fac1a5b, (q31_t)0x677edbb, (q31_t)0x7fad5e45, (q31_t)0x66b6d16,
+    (q31_t)0x7fae9fbb, (q31_t)0x65eec33, (q31_t)0x7fafdebb, (q31_t)0x6526b10,
+    (q31_t)0x7fb11b48, (q31_t)0x645e9af, (q31_t)0x7fb2555f, (q31_t)0x6396810,
+    (q31_t)0x7fb38d02, (q31_t)0x62ce634, (q31_t)0x7fb4c231, (q31_t)0x620641a,
+    (q31_t)0x7fb5f4ea, (q31_t)0x613e1c5, (q31_t)0x7fb7252f, (q31_t)0x6075f33,
+    (q31_t)0x7fb852ff, (q31_t)0x5fadc66, (q31_t)0x7fb97e5a, (q31_t)0x5ee595d,
+    (q31_t)0x7fbaa740, (q31_t)0x5e1d61b, (q31_t)0x7fbbcdb1, (q31_t)0x5d5529e,
+    (q31_t)0x7fbcf1ad, (q31_t)0x5c8cee7, (q31_t)0x7fbe1334, (q31_t)0x5bc4af8,
+    (q31_t)0x7fbf3246, (q31_t)0x5afc6d0, (q31_t)0x7fc04ee3, (q31_t)0x5a3426f,
+    (q31_t)0x7fc1690a, (q31_t)0x596bdd7, (q31_t)0x7fc280bc, (q31_t)0x58a3908,
+    (q31_t)0x7fc395f9, (q31_t)0x57db403, (q31_t)0x7fc4a8c1, (q31_t)0x5712ec7,
+    (q31_t)0x7fc5b913, (q31_t)0x564a955, (q31_t)0x7fc6c6f0, (q31_t)0x55823ae,
+    (q31_t)0x7fc7d258, (q31_t)0x54b9dd3, (q31_t)0x7fc8db4a, (q31_t)0x53f17c3,
+    (q31_t)0x7fc9e1c6, (q31_t)0x532917f, (q31_t)0x7fcae5cd, (q31_t)0x5260b08,
+    (q31_t)0x7fcbe75e, (q31_t)0x519845e, (q31_t)0x7fcce67a, (q31_t)0x50cfd82,
+    (q31_t)0x7fcde320, (q31_t)0x5007674, (q31_t)0x7fcedd50, (q31_t)0x4f3ef35,
+    (q31_t)0x7fcfd50b, (q31_t)0x4e767c5, (q31_t)0x7fd0ca4f, (q31_t)0x4dae024,
+    (q31_t)0x7fd1bd1e, (q31_t)0x4ce5854, (q31_t)0x7fd2ad77, (q31_t)0x4c1d054,
+    (q31_t)0x7fd39b5a, (q31_t)0x4b54825, (q31_t)0x7fd486c7, (q31_t)0x4a8bfc7,
+    (q31_t)0x7fd56fbe, (q31_t)0x49c373c, (q31_t)0x7fd6563f, (q31_t)0x48fae83,
+    (q31_t)0x7fd73a4a, (q31_t)0x483259d, (q31_t)0x7fd81bdf, (q31_t)0x4769c8b,
+    (q31_t)0x7fd8fafe, (q31_t)0x46a134c, (q31_t)0x7fd9d7a7, (q31_t)0x45d89e2,
+    (q31_t)0x7fdab1d9, (q31_t)0x451004d, (q31_t)0x7fdb8996, (q31_t)0x444768d,
+    (q31_t)0x7fdc5edc, (q31_t)0x437eca4, (q31_t)0x7fdd31ac, (q31_t)0x42b6290,
+    (q31_t)0x7fde0205, (q31_t)0x41ed854, (q31_t)0x7fdecfe8, (q31_t)0x4124dee,
+    (q31_t)0x7fdf9b55, (q31_t)0x405c361, (q31_t)0x7fe0644b, (q31_t)0x3f938ac,
+    (q31_t)0x7fe12acb, (q31_t)0x3ecadcf, (q31_t)0x7fe1eed5, (q31_t)0x3e022cc,
+    (q31_t)0x7fe2b067, (q31_t)0x3d397a3, (q31_t)0x7fe36f84, (q31_t)0x3c70c54,
+    (q31_t)0x7fe42c2a, (q31_t)0x3ba80df, (q31_t)0x7fe4e659, (q31_t)0x3adf546,
+    (q31_t)0x7fe59e12, (q31_t)0x3a16988, (q31_t)0x7fe65354, (q31_t)0x394dda7,
+    (q31_t)0x7fe7061f, (q31_t)0x38851a2, (q31_t)0x7fe7b674, (q31_t)0x37bc57b,
+    (q31_t)0x7fe86452, (q31_t)0x36f3931, (q31_t)0x7fe90fb9, (q31_t)0x362acc5,
+    (q31_t)0x7fe9b8a9, (q31_t)0x3562038, (q31_t)0x7fea5f23, (q31_t)0x3499389,
+    (q31_t)0x7feb0326, (q31_t)0x33d06bb, (q31_t)0x7feba4b2, (q31_t)0x33079cc,
+    (q31_t)0x7fec43c7, (q31_t)0x323ecbe, (q31_t)0x7fece065, (q31_t)0x3175f91,
+    (q31_t)0x7fed7a8c, (q31_t)0x30ad245, (q31_t)0x7fee123d, (q31_t)0x2fe44dc,
+    (q31_t)0x7feea776, (q31_t)0x2f1b755, (q31_t)0x7fef3a39, (q31_t)0x2e529b0,
+    (q31_t)0x7fefca84, (q31_t)0x2d89bf0, (q31_t)0x7ff05858, (q31_t)0x2cc0e13,
+    (q31_t)0x7ff0e3b6, (q31_t)0x2bf801a, (q31_t)0x7ff16c9c, (q31_t)0x2b2f207,
+    (q31_t)0x7ff1f30b, (q31_t)0x2a663d8, (q31_t)0x7ff27703, (q31_t)0x299d590,
+    (q31_t)0x7ff2f884, (q31_t)0x28d472e, (q31_t)0x7ff3778e, (q31_t)0x280b8b3,
+    (q31_t)0x7ff3f420, (q31_t)0x2742a1f, (q31_t)0x7ff46e3c, (q31_t)0x2679b73,
+    (q31_t)0x7ff4e5e0, (q31_t)0x25b0caf, (q31_t)0x7ff55b0d, (q31_t)0x24e7dd4,
+    (q31_t)0x7ff5cdc3, (q31_t)0x241eee2, (q31_t)0x7ff63e01, (q31_t)0x2355fd9,
+    (q31_t)0x7ff6abc8, (q31_t)0x228d0bb, (q31_t)0x7ff71718, (q31_t)0x21c4188,
+    (q31_t)0x7ff77ff1, (q31_t)0x20fb240, (q31_t)0x7ff7e652, (q31_t)0x20322e3,
+    (q31_t)0x7ff84a3c, (q31_t)0x1f69373, (q31_t)0x7ff8abae, (q31_t)0x1ea03ef,
+    (q31_t)0x7ff90aaa, (q31_t)0x1dd7459, (q31_t)0x7ff9672d, (q31_t)0x1d0e4b0,
+    (q31_t)0x7ff9c13a, (q31_t)0x1c454f5, (q31_t)0x7ffa18cf, (q31_t)0x1b7c528,
+    (q31_t)0x7ffa6dec, (q31_t)0x1ab354b, (q31_t)0x7ffac092, (q31_t)0x19ea55d,
+    (q31_t)0x7ffb10c1, (q31_t)0x192155f, (q31_t)0x7ffb5e78, (q31_t)0x1858552,
+    (q31_t)0x7ffba9b8, (q31_t)0x178f536, (q31_t)0x7ffbf280, (q31_t)0x16c650b,
+    (q31_t)0x7ffc38d1, (q31_t)0x15fd4d2, (q31_t)0x7ffc7caa, (q31_t)0x153448c,
+    (q31_t)0x7ffcbe0c, (q31_t)0x146b438, (q31_t)0x7ffcfcf6, (q31_t)0x13a23d8,
+    (q31_t)0x7ffd3969, (q31_t)0x12d936c, (q31_t)0x7ffd7364, (q31_t)0x12102f4,
+    (q31_t)0x7ffdaae7, (q31_t)0x1147271, (q31_t)0x7ffddff3, (q31_t)0x107e1e3,
+    (q31_t)0x7ffe1288, (q31_t)0xfb514b, (q31_t)0x7ffe42a4, (q31_t)0xeec0aa,
+    (q31_t)0x7ffe704a, (q31_t)0xe22fff, (q31_t)0x7ffe9b77, (q31_t)0xd59f4c,
+    (q31_t)0x7ffec42d, (q31_t)0xc90e90, (q31_t)0x7ffeea6c, (q31_t)0xbc7dcc,
+    (q31_t)0x7fff0e32, (q31_t)0xafed02, (q31_t)0x7fff2f82, (q31_t)0xa35c30,
+    (q31_t)0x7fff4e59, (q31_t)0x96cb58, (q31_t)0x7fff6ab9, (q31_t)0x8a3a7b,
+    (q31_t)0x7fff84a1, (q31_t)0x7da998, (q31_t)0x7fff9c12, (q31_t)0x7118b0,
+    (q31_t)0x7fffb10b, (q31_t)0x6487c4, (q31_t)0x7fffc38c, (q31_t)0x57f6d4,
+    (q31_t)0x7fffd396, (q31_t)0x4b65e1, (q31_t)0x7fffe128, (q31_t)0x3ed4ea,
+    (q31_t)0x7fffec43, (q31_t)0x3243f1, (q31_t)0x7ffff4e6, (q31_t)0x25b2f7,
+    (q31_t)0x7ffffb11, (q31_t)0x1921fb, (q31_t)0x7ffffec4, (q31_t)0xc90fe,
+    (q31_t)0x7fffffff, (q31_t)0x0, (q31_t)0x7ffffec4, (q31_t)0xfff36f02,
+    (q31_t)0x7ffffb11, (q31_t)0xffe6de05, (q31_t)0x7ffff4e6, (q31_t)0xffda4d09,
+    (q31_t)0x7fffec43, (q31_t)0xffcdbc0f, (q31_t)0x7fffe128, (q31_t)0xffc12b16,
+    (q31_t)0x7fffd396, (q31_t)0xffb49a1f, (q31_t)0x7fffc38c, (q31_t)0xffa8092c,
+    (q31_t)0x7fffb10b, (q31_t)0xff9b783c, (q31_t)0x7fff9c12, (q31_t)0xff8ee750,
+    (q31_t)0x7fff84a1, (q31_t)0xff825668, (q31_t)0x7fff6ab9, (q31_t)0xff75c585,
+    (q31_t)0x7fff4e59, (q31_t)0xff6934a8, (q31_t)0x7fff2f82, (q31_t)0xff5ca3d0,
+    (q31_t)0x7fff0e32, (q31_t)0xff5012fe, (q31_t)0x7ffeea6c, (q31_t)0xff438234,
+    (q31_t)0x7ffec42d, (q31_t)0xff36f170, (q31_t)0x7ffe9b77, (q31_t)0xff2a60b4,
+    (q31_t)0x7ffe704a, (q31_t)0xff1dd001, (q31_t)0x7ffe42a4, (q31_t)0xff113f56,
+    (q31_t)0x7ffe1288, (q31_t)0xff04aeb5, (q31_t)0x7ffddff3, (q31_t)0xfef81e1d,
+    (q31_t)0x7ffdaae7, (q31_t)0xfeeb8d8f, (q31_t)0x7ffd7364, (q31_t)0xfedefd0c,
+    (q31_t)0x7ffd3969, (q31_t)0xfed26c94, (q31_t)0x7ffcfcf6, (q31_t)0xfec5dc28,
+    (q31_t)0x7ffcbe0c, (q31_t)0xfeb94bc8, (q31_t)0x7ffc7caa, (q31_t)0xfeacbb74,
+    (q31_t)0x7ffc38d1, (q31_t)0xfea02b2e, (q31_t)0x7ffbf280, (q31_t)0xfe939af5,
+    (q31_t)0x7ffba9b8, (q31_t)0xfe870aca, (q31_t)0x7ffb5e78, (q31_t)0xfe7a7aae,
+    (q31_t)0x7ffb10c1, (q31_t)0xfe6deaa1, (q31_t)0x7ffac092, (q31_t)0xfe615aa3,
+    (q31_t)0x7ffa6dec, (q31_t)0xfe54cab5, (q31_t)0x7ffa18cf, (q31_t)0xfe483ad8,
+    (q31_t)0x7ff9c13a, (q31_t)0xfe3bab0b, (q31_t)0x7ff9672d, (q31_t)0xfe2f1b50,
+    (q31_t)0x7ff90aaa, (q31_t)0xfe228ba7, (q31_t)0x7ff8abae, (q31_t)0xfe15fc11,
+    (q31_t)0x7ff84a3c, (q31_t)0xfe096c8d, (q31_t)0x7ff7e652, (q31_t)0xfdfcdd1d,
+    (q31_t)0x7ff77ff1, (q31_t)0xfdf04dc0, (q31_t)0x7ff71718, (q31_t)0xfde3be78,
+    (q31_t)0x7ff6abc8, (q31_t)0xfdd72f45, (q31_t)0x7ff63e01, (q31_t)0xfdcaa027,
+    (q31_t)0x7ff5cdc3, (q31_t)0xfdbe111e, (q31_t)0x7ff55b0d, (q31_t)0xfdb1822c,
+    (q31_t)0x7ff4e5e0, (q31_t)0xfda4f351, (q31_t)0x7ff46e3c, (q31_t)0xfd98648d,
+    (q31_t)0x7ff3f420, (q31_t)0xfd8bd5e1, (q31_t)0x7ff3778e, (q31_t)0xfd7f474d,
+    (q31_t)0x7ff2f884, (q31_t)0xfd72b8d2, (q31_t)0x7ff27703, (q31_t)0xfd662a70,
+    (q31_t)0x7ff1f30b, (q31_t)0xfd599c28, (q31_t)0x7ff16c9c, (q31_t)0xfd4d0df9,
+    (q31_t)0x7ff0e3b6, (q31_t)0xfd407fe6, (q31_t)0x7ff05858, (q31_t)0xfd33f1ed,
+    (q31_t)0x7fefca84, (q31_t)0xfd276410, (q31_t)0x7fef3a39, (q31_t)0xfd1ad650,
+    (q31_t)0x7feea776, (q31_t)0xfd0e48ab, (q31_t)0x7fee123d, (q31_t)0xfd01bb24,
+    (q31_t)0x7fed7a8c, (q31_t)0xfcf52dbb, (q31_t)0x7fece065, (q31_t)0xfce8a06f,
+    (q31_t)0x7fec43c7, (q31_t)0xfcdc1342, (q31_t)0x7feba4b2, (q31_t)0xfccf8634,
+    (q31_t)0x7feb0326, (q31_t)0xfcc2f945, (q31_t)0x7fea5f23, (q31_t)0xfcb66c77,
+    (q31_t)0x7fe9b8a9, (q31_t)0xfca9dfc8, (q31_t)0x7fe90fb9, (q31_t)0xfc9d533b,
+    (q31_t)0x7fe86452, (q31_t)0xfc90c6cf, (q31_t)0x7fe7b674, (q31_t)0xfc843a85,
+    (q31_t)0x7fe7061f, (q31_t)0xfc77ae5e, (q31_t)0x7fe65354, (q31_t)0xfc6b2259,
+    (q31_t)0x7fe59e12, (q31_t)0xfc5e9678, (q31_t)0x7fe4e659, (q31_t)0xfc520aba,
+    (q31_t)0x7fe42c2a, (q31_t)0xfc457f21, (q31_t)0x7fe36f84, (q31_t)0xfc38f3ac,
+    (q31_t)0x7fe2b067, (q31_t)0xfc2c685d, (q31_t)0x7fe1eed5, (q31_t)0xfc1fdd34,
+    (q31_t)0x7fe12acb, (q31_t)0xfc135231, (q31_t)0x7fe0644b, (q31_t)0xfc06c754,
+    (q31_t)0x7fdf9b55, (q31_t)0xfbfa3c9f, (q31_t)0x7fdecfe8, (q31_t)0xfbedb212,
+    (q31_t)0x7fde0205, (q31_t)0xfbe127ac, (q31_t)0x7fdd31ac, (q31_t)0xfbd49d70,
+    (q31_t)0x7fdc5edc, (q31_t)0xfbc8135c, (q31_t)0x7fdb8996, (q31_t)0xfbbb8973,
+    (q31_t)0x7fdab1d9, (q31_t)0xfbaeffb3, (q31_t)0x7fd9d7a7, (q31_t)0xfba2761e,
+    (q31_t)0x7fd8fafe, (q31_t)0xfb95ecb4, (q31_t)0x7fd81bdf, (q31_t)0xfb896375,
+    (q31_t)0x7fd73a4a, (q31_t)0xfb7cda63, (q31_t)0x7fd6563f, (q31_t)0xfb70517d,
+    (q31_t)0x7fd56fbe, (q31_t)0xfb63c8c4, (q31_t)0x7fd486c7, (q31_t)0xfb574039,
+    (q31_t)0x7fd39b5a, (q31_t)0xfb4ab7db, (q31_t)0x7fd2ad77, (q31_t)0xfb3e2fac,
+    (q31_t)0x7fd1bd1e, (q31_t)0xfb31a7ac, (q31_t)0x7fd0ca4f, (q31_t)0xfb251fdc,
+    (q31_t)0x7fcfd50b, (q31_t)0xfb18983b, (q31_t)0x7fcedd50, (q31_t)0xfb0c10cb,
+    (q31_t)0x7fcde320, (q31_t)0xfaff898c, (q31_t)0x7fcce67a, (q31_t)0xfaf3027e,
+    (q31_t)0x7fcbe75e, (q31_t)0xfae67ba2, (q31_t)0x7fcae5cd, (q31_t)0xfad9f4f8,
+    (q31_t)0x7fc9e1c6, (q31_t)0xfacd6e81, (q31_t)0x7fc8db4a, (q31_t)0xfac0e83d,
+    (q31_t)0x7fc7d258, (q31_t)0xfab4622d, (q31_t)0x7fc6c6f0, (q31_t)0xfaa7dc52,
+    (q31_t)0x7fc5b913, (q31_t)0xfa9b56ab, (q31_t)0x7fc4a8c1, (q31_t)0xfa8ed139,
+    (q31_t)0x7fc395f9, (q31_t)0xfa824bfd, (q31_t)0x7fc280bc, (q31_t)0xfa75c6f8,
+    (q31_t)0x7fc1690a, (q31_t)0xfa694229, (q31_t)0x7fc04ee3, (q31_t)0xfa5cbd91,
+    (q31_t)0x7fbf3246, (q31_t)0xfa503930, (q31_t)0x7fbe1334, (q31_t)0xfa43b508,
+    (q31_t)0x7fbcf1ad, (q31_t)0xfa373119, (q31_t)0x7fbbcdb1, (q31_t)0xfa2aad62,
+    (q31_t)0x7fbaa740, (q31_t)0xfa1e29e5, (q31_t)0x7fb97e5a, (q31_t)0xfa11a6a3,
+    (q31_t)0x7fb852ff, (q31_t)0xfa05239a, (q31_t)0x7fb7252f, (q31_t)0xf9f8a0cd,
+    (q31_t)0x7fb5f4ea, (q31_t)0xf9ec1e3b, (q31_t)0x7fb4c231, (q31_t)0xf9df9be6,
+    (q31_t)0x7fb38d02, (q31_t)0xf9d319cc, (q31_t)0x7fb2555f, (q31_t)0xf9c697f0,
+    (q31_t)0x7fb11b48, (q31_t)0xf9ba1651, (q31_t)0x7fafdebb, (q31_t)0xf9ad94f0,
+    (q31_t)0x7fae9fbb, (q31_t)0xf9a113cd, (q31_t)0x7fad5e45, (q31_t)0xf99492ea,
+    (q31_t)0x7fac1a5b, (q31_t)0xf9881245, (q31_t)0x7faad3fd, (q31_t)0xf97b91e1,
+    (q31_t)0x7fa98b2a, (q31_t)0xf96f11bc, (q31_t)0x7fa83fe3, (q31_t)0xf96291d9,
+    (q31_t)0x7fa6f228, (q31_t)0xf9561237, (q31_t)0x7fa5a1f9, (q31_t)0xf94992d7,
+    (q31_t)0x7fa44f55, (q31_t)0xf93d13b8, (q31_t)0x7fa2fa3d, (q31_t)0xf93094dd,
+    (q31_t)0x7fa1a2b2, (q31_t)0xf9241645, (q31_t)0x7fa048b2, (q31_t)0xf91797f0,
+    (q31_t)0x7f9eec3e, (q31_t)0xf90b19e0, (q31_t)0x7f9d8d56, (q31_t)0xf8fe9c15,
+    (q31_t)0x7f9c2bfb, (q31_t)0xf8f21e8e, (q31_t)0x7f9ac82c, (q31_t)0xf8e5a14d,
+    (q31_t)0x7f9961e8, (q31_t)0xf8d92452, (q31_t)0x7f97f932, (q31_t)0xf8cca79e,
+    (q31_t)0x7f968e07, (q31_t)0xf8c02b31, (q31_t)0x7f952069, (q31_t)0xf8b3af0c,
+    (q31_t)0x7f93b058, (q31_t)0xf8a7332e, (q31_t)0x7f923dd2, (q31_t)0xf89ab799,
+    (q31_t)0x7f90c8da, (q31_t)0xf88e3c4d, (q31_t)0x7f8f516e, (q31_t)0xf881c14b,
+    (q31_t)0x7f8dd78f, (q31_t)0xf8754692, (q31_t)0x7f8c5b3d, (q31_t)0xf868cc24,
+    (q31_t)0x7f8adc77, (q31_t)0xf85c5201, (q31_t)0x7f895b3e, (q31_t)0xf84fd829,
+    (q31_t)0x7f87d792, (q31_t)0xf8435e9d, (q31_t)0x7f865174, (q31_t)0xf836e55d,
+    (q31_t)0x7f84c8e2, (q31_t)0xf82a6c6a, (q31_t)0x7f833ddd, (q31_t)0xf81df3c5,
+    (q31_t)0x7f81b065, (q31_t)0xf8117b6d, (q31_t)0x7f80207b, (q31_t)0xf8050364,
+    (q31_t)0x7f7e8e1e, (q31_t)0xf7f88ba9, (q31_t)0x7f7cf94e, (q31_t)0xf7ec143e,
+    (q31_t)0x7f7b620c, (q31_t)0xf7df9d22, (q31_t)0x7f79c857, (q31_t)0xf7d32657,
+    (q31_t)0x7f782c30, (q31_t)0xf7c6afdc, (q31_t)0x7f768d96, (q31_t)0xf7ba39b3,
+    (q31_t)0x7f74ec8a, (q31_t)0xf7adc3db, (q31_t)0x7f73490b, (q31_t)0xf7a14e55,
+    (q31_t)0x7f71a31b, (q31_t)0xf794d922, (q31_t)0x7f6ffab8, (q31_t)0xf7886442,
+    (q31_t)0x7f6e4fe3, (q31_t)0xf77befb5, (q31_t)0x7f6ca29c, (q31_t)0xf76f7b7d,
+    (q31_t)0x7f6af2e3, (q31_t)0xf7630799, (q31_t)0x7f6940b8, (q31_t)0xf756940a,
+    (q31_t)0x7f678c1c, (q31_t)0xf74a20d0, (q31_t)0x7f65d50d, (q31_t)0xf73daded,
+    (q31_t)0x7f641b8d, (q31_t)0xf7313b60, (q31_t)0x7f625f9b, (q31_t)0xf724c92a,
+    (q31_t)0x7f60a138, (q31_t)0xf718574b, (q31_t)0x7f5ee063, (q31_t)0xf70be5c4,
+    (q31_t)0x7f5d1d1d, (q31_t)0xf6ff7496, (q31_t)0x7f5b5765, (q31_t)0xf6f303c0,
+    (q31_t)0x7f598f3c, (q31_t)0xf6e69344, (q31_t)0x7f57c4a2, (q31_t)0xf6da2321,
+    (q31_t)0x7f55f796, (q31_t)0xf6cdb359, (q31_t)0x7f54281a, (q31_t)0xf6c143ec,
+    (q31_t)0x7f52562c, (q31_t)0xf6b4d4d9, (q31_t)0x7f5081cd, (q31_t)0xf6a86623,
+    (q31_t)0x7f4eaafe, (q31_t)0xf69bf7c9, (q31_t)0x7f4cd1be, (q31_t)0xf68f89cb,
+    (q31_t)0x7f4af60d, (q31_t)0xf6831c2b, (q31_t)0x7f4917eb, (q31_t)0xf676aee8,
+    (q31_t)0x7f473759, (q31_t)0xf66a4203, (q31_t)0x7f455456, (q31_t)0xf65dd57d,
+    (q31_t)0x7f436ee3, (q31_t)0xf6516956, (q31_t)0x7f4186ff, (q31_t)0xf644fd8f,
+    (q31_t)0x7f3f9cab, (q31_t)0xf6389228, (q31_t)0x7f3dafe7, (q31_t)0xf62c2721,
+    (q31_t)0x7f3bc0b3, (q31_t)0xf61fbc7b, (q31_t)0x7f39cf0e, (q31_t)0xf6135237,
+    (q31_t)0x7f37dafa, (q31_t)0xf606e854, (q31_t)0x7f35e476, (q31_t)0xf5fa7ed4,
+    (q31_t)0x7f33eb81, (q31_t)0xf5ee15b7, (q31_t)0x7f31f01d, (q31_t)0xf5e1acfd,
+    (q31_t)0x7f2ff24a, (q31_t)0xf5d544a7, (q31_t)0x7f2df206, (q31_t)0xf5c8dcb6,
+    (q31_t)0x7f2bef53, (q31_t)0xf5bc7529, (q31_t)0x7f29ea31, (q31_t)0xf5b00e02,
+    (q31_t)0x7f27e29f, (q31_t)0xf5a3a740, (q31_t)0x7f25d89e, (q31_t)0xf59740e5,
+    (q31_t)0x7f23cc2e, (q31_t)0xf58adaf0, (q31_t)0x7f21bd4e, (q31_t)0xf57e7563,
+    (q31_t)0x7f1fabff, (q31_t)0xf572103d, (q31_t)0x7f1d9842, (q31_t)0xf565ab80,
+    (q31_t)0x7f1b8215, (q31_t)0xf559472b, (q31_t)0x7f19697a, (q31_t)0xf54ce33f,
+    (q31_t)0x7f174e70, (q31_t)0xf5407fbd, (q31_t)0x7f1530f7, (q31_t)0xf5341ca5,
+    (q31_t)0x7f13110f, (q31_t)0xf527b9f7, (q31_t)0x7f10eeb9, (q31_t)0xf51b57b5,
+    (q31_t)0x7f0ec9f5, (q31_t)0xf50ef5de, (q31_t)0x7f0ca2c2, (q31_t)0xf5029473,
+    (q31_t)0x7f0a7921, (q31_t)0xf4f63374, (q31_t)0x7f084d12, (q31_t)0xf4e9d2e3,
+    (q31_t)0x7f061e95, (q31_t)0xf4dd72be, (q31_t)0x7f03eda9, (q31_t)0xf4d11308,
+    (q31_t)0x7f01ba50, (q31_t)0xf4c4b3c0, (q31_t)0x7eff8489, (q31_t)0xf4b854e7,
+    (q31_t)0x7efd4c54, (q31_t)0xf4abf67e, (q31_t)0x7efb11b1, (q31_t)0xf49f9884,
+    (q31_t)0x7ef8d4a1, (q31_t)0xf4933afa, (q31_t)0x7ef69523, (q31_t)0xf486dde1,
+    (q31_t)0x7ef45338, (q31_t)0xf47a8139, (q31_t)0x7ef20ee0, (q31_t)0xf46e2504,
+    (q31_t)0x7eefc81a, (q31_t)0xf461c940, (q31_t)0x7eed7ee7, (q31_t)0xf4556def,
+    (q31_t)0x7eeb3347, (q31_t)0xf4491311, (q31_t)0x7ee8e53a, (q31_t)0xf43cb8a7,
+    (q31_t)0x7ee694c1, (q31_t)0xf4305eb0, (q31_t)0x7ee441da, (q31_t)0xf424052f,
+    (q31_t)0x7ee1ec87, (q31_t)0xf417ac22, (q31_t)0x7edf94c7, (q31_t)0xf40b538b,
+    (q31_t)0x7edd3a9a, (q31_t)0xf3fefb6a, (q31_t)0x7edade01, (q31_t)0xf3f2a3bf,
+    (q31_t)0x7ed87efc, (q31_t)0xf3e64c8c, (q31_t)0x7ed61d8a, (q31_t)0xf3d9f5cf,
+    (q31_t)0x7ed3b9ad, (q31_t)0xf3cd9f8b, (q31_t)0x7ed15363, (q31_t)0xf3c149bf,
+    (q31_t)0x7eceeaad, (q31_t)0xf3b4f46c, (q31_t)0x7ecc7f8b, (q31_t)0xf3a89f92,
+    (q31_t)0x7eca11fe, (q31_t)0xf39c4b32, (q31_t)0x7ec7a205, (q31_t)0xf38ff74d,
+    (q31_t)0x7ec52fa0, (q31_t)0xf383a3e2, (q31_t)0x7ec2bad0, (q31_t)0xf37750f2,
+    (q31_t)0x7ec04394, (q31_t)0xf36afe7e, (q31_t)0x7ebdc9ed, (q31_t)0xf35eac86,
+    (q31_t)0x7ebb4ddb, (q31_t)0xf3525b0b, (q31_t)0x7eb8cf5d, (q31_t)0xf3460a0d,
+    (q31_t)0x7eb64e75, (q31_t)0xf339b98d, (q31_t)0x7eb3cb21, (q31_t)0xf32d698a,
+    (q31_t)0x7eb14563, (q31_t)0xf3211a07, (q31_t)0x7eaebd3a, (q31_t)0xf314cb02,
+    (q31_t)0x7eac32a6, (q31_t)0xf3087c7d, (q31_t)0x7ea9a5a8, (q31_t)0xf2fc2e77,
+    (q31_t)0x7ea7163f, (q31_t)0xf2efe0f2, (q31_t)0x7ea4846c, (q31_t)0xf2e393ef,
+    (q31_t)0x7ea1f02f, (q31_t)0xf2d7476c, (q31_t)0x7e9f5988, (q31_t)0xf2cafb6b,
+    (q31_t)0x7e9cc076, (q31_t)0xf2beafed, (q31_t)0x7e9a24fb, (q31_t)0xf2b264f2,
+    (q31_t)0x7e978715, (q31_t)0xf2a61a7a, (q31_t)0x7e94e6c6, (q31_t)0xf299d085,
+    (q31_t)0x7e92440d, (q31_t)0xf28d8715, (q31_t)0x7e8f9eeb, (q31_t)0xf2813e2a,
+    (q31_t)0x7e8cf75f, (q31_t)0xf274f5c3, (q31_t)0x7e8a4d6a, (q31_t)0xf268ade3,
+    (q31_t)0x7e87a10c, (q31_t)0xf25c6688, (q31_t)0x7e84f245, (q31_t)0xf2501fb5,
+    (q31_t)0x7e824114, (q31_t)0xf243d968, (q31_t)0x7e7f8d7b, (q31_t)0xf23793a3,
+    (q31_t)0x7e7cd778, (q31_t)0xf22b4e66, (q31_t)0x7e7a1f0d, (q31_t)0xf21f09b1,
+    (q31_t)0x7e77643a, (q31_t)0xf212c585, (q31_t)0x7e74a6fd, (q31_t)0xf20681e3,
+    (q31_t)0x7e71e759, (q31_t)0xf1fa3ecb, (q31_t)0x7e6f254c, (q31_t)0xf1edfc3d,
+    (q31_t)0x7e6c60d7, (q31_t)0xf1e1ba3a, (q31_t)0x7e6999fa, (q31_t)0xf1d578c2,
+    (q31_t)0x7e66d0b4, (q31_t)0xf1c937d6, (q31_t)0x7e640507, (q31_t)0xf1bcf777,
+    (q31_t)0x7e6136f3, (q31_t)0xf1b0b7a4, (q31_t)0x7e5e6676, (q31_t)0xf1a4785e,
+    (q31_t)0x7e5b9392, (q31_t)0xf19839a6, (q31_t)0x7e58be47, (q31_t)0xf18bfb7d,
+    (q31_t)0x7e55e694, (q31_t)0xf17fbde2, (q31_t)0x7e530c7a, (q31_t)0xf17380d6,
+    (q31_t)0x7e502ff9, (q31_t)0xf1674459, (q31_t)0x7e4d5110, (q31_t)0xf15b086d,
+    (q31_t)0x7e4a6fc1, (q31_t)0xf14ecd11, (q31_t)0x7e478c0b, (q31_t)0xf1429247,
+    (q31_t)0x7e44a5ef, (q31_t)0xf136580d, (q31_t)0x7e41bd6c, (q31_t)0xf12a1e66,
+    (q31_t)0x7e3ed282, (q31_t)0xf11de551, (q31_t)0x7e3be532, (q31_t)0xf111accf,
+    (q31_t)0x7e38f57c, (q31_t)0xf10574e0, (q31_t)0x7e360360, (q31_t)0xf0f93d86,
+    (q31_t)0x7e330ede, (q31_t)0xf0ed06bf, (q31_t)0x7e3017f6, (q31_t)0xf0e0d08d,
+    (q31_t)0x7e2d1ea8, (q31_t)0xf0d49af1, (q31_t)0x7e2a22f4, (q31_t)0xf0c865ea,
+    (q31_t)0x7e2724db, (q31_t)0xf0bc317a, (q31_t)0x7e24245d, (q31_t)0xf0affda0,
+    (q31_t)0x7e212179, (q31_t)0xf0a3ca5d, (q31_t)0x7e1e1c30, (q31_t)0xf09797b2,
+    (q31_t)0x7e1b1482, (q31_t)0xf08b659f, (q31_t)0x7e180a6f, (q31_t)0xf07f3424,
+    (q31_t)0x7e14fdf7, (q31_t)0xf0730342, (q31_t)0x7e11ef1b, (q31_t)0xf066d2fa,
+    (q31_t)0x7e0eddd9, (q31_t)0xf05aa34c, (q31_t)0x7e0bca34, (q31_t)0xf04e7438,
+    (q31_t)0x7e08b42a, (q31_t)0xf04245c0, (q31_t)0x7e059bbb, (q31_t)0xf03617e2,
+    (q31_t)0x7e0280e9, (q31_t)0xf029eaa1, (q31_t)0x7dff63b2, (q31_t)0xf01dbdfb,
+    (q31_t)0x7dfc4418, (q31_t)0xf01191f3, (q31_t)0x7df9221a, (q31_t)0xf0056687,
+    (q31_t)0x7df5fdb8, (q31_t)0xeff93bba, (q31_t)0x7df2d6f3, (q31_t)0xefed118a,
+    (q31_t)0x7defadca, (q31_t)0xefe0e7f9, (q31_t)0x7dec823e, (q31_t)0xefd4bf08,
+    (q31_t)0x7de9544f, (q31_t)0xefc896b5, (q31_t)0x7de623fd, (q31_t)0xefbc6f03,
+    (q31_t)0x7de2f148, (q31_t)0xefb047f2, (q31_t)0x7ddfbc30, (q31_t)0xefa42181,
+    (q31_t)0x7ddc84b5, (q31_t)0xef97fbb2, (q31_t)0x7dd94ad8, (q31_t)0xef8bd685,
+    (q31_t)0x7dd60e99, (q31_t)0xef7fb1fa, (q31_t)0x7dd2cff7, (q31_t)0xef738e12,
+    (q31_t)0x7dcf8ef3, (q31_t)0xef676ace, (q31_t)0x7dcc4b8d, (q31_t)0xef5b482d,
+    (q31_t)0x7dc905c5, (q31_t)0xef4f2630, (q31_t)0x7dc5bd9b, (q31_t)0xef4304d8,
+    (q31_t)0x7dc2730f, (q31_t)0xef36e426, (q31_t)0x7dbf2622, (q31_t)0xef2ac419,
+    (q31_t)0x7dbbd6d4, (q31_t)0xef1ea4b2, (q31_t)0x7db88524, (q31_t)0xef1285f2,
+    (q31_t)0x7db53113, (q31_t)0xef0667d9, (q31_t)0x7db1daa2, (q31_t)0xeefa4a67,
+    (q31_t)0x7dae81cf, (q31_t)0xeeee2d9d, (q31_t)0x7dab269b, (q31_t)0xeee2117c,
+    (q31_t)0x7da7c907, (q31_t)0xeed5f604, (q31_t)0x7da46912, (q31_t)0xeec9db35,
+    (q31_t)0x7da106bd, (q31_t)0xeebdc110, (q31_t)0x7d9da208, (q31_t)0xeeb1a796,
+    (q31_t)0x7d9a3af2, (q31_t)0xeea58ec6, (q31_t)0x7d96d17d, (q31_t)0xee9976a1,
+    (q31_t)0x7d9365a8, (q31_t)0xee8d5f29, (q31_t)0x7d8ff772, (q31_t)0xee81485c,
+    (q31_t)0x7d8c86de, (q31_t)0xee75323c, (q31_t)0x7d8913ea, (q31_t)0xee691cc9,
+    (q31_t)0x7d859e96, (q31_t)0xee5d0804, (q31_t)0x7d8226e4, (q31_t)0xee50f3ed,
+    (q31_t)0x7d7eacd2, (q31_t)0xee44e084, (q31_t)0x7d7b3061, (q31_t)0xee38cdcb,
+    (q31_t)0x7d77b192, (q31_t)0xee2cbbc1, (q31_t)0x7d743064, (q31_t)0xee20aa67,
+    (q31_t)0x7d70acd7, (q31_t)0xee1499bd, (q31_t)0x7d6d26ec, (q31_t)0xee0889c4,
+    (q31_t)0x7d699ea3, (q31_t)0xedfc7a7c, (q31_t)0x7d6613fb, (q31_t)0xedf06be6,
+    (q31_t)0x7d6286f6, (q31_t)0xede45e03, (q31_t)0x7d5ef793, (q31_t)0xedd850d2,
+    (q31_t)0x7d5b65d2, (q31_t)0xedcc4454, (q31_t)0x7d57d1b3, (q31_t)0xedc0388a,
+    (q31_t)0x7d543b37, (q31_t)0xedb42d74, (q31_t)0x7d50a25e, (q31_t)0xeda82313,
+    (q31_t)0x7d4d0728, (q31_t)0xed9c1967, (q31_t)0x7d496994, (q31_t)0xed901070,
+    (q31_t)0x7d45c9a4, (q31_t)0xed84082f, (q31_t)0x7d422757, (q31_t)0xed7800a5,
+    (q31_t)0x7d3e82ae, (q31_t)0xed6bf9d1, (q31_t)0x7d3adba7, (q31_t)0xed5ff3b5,
+    (q31_t)0x7d373245, (q31_t)0xed53ee51, (q31_t)0x7d338687, (q31_t)0xed47e9a5,
+    (q31_t)0x7d2fd86c, (q31_t)0xed3be5b1, (q31_t)0x7d2c27f6, (q31_t)0xed2fe277,
+    (q31_t)0x7d287523, (q31_t)0xed23dff7, (q31_t)0x7d24bff6, (q31_t)0xed17de31,
+    (q31_t)0x7d21086c, (q31_t)0xed0bdd25, (q31_t)0x7d1d4e88, (q31_t)0xecffdcd4,
+    (q31_t)0x7d199248, (q31_t)0xecf3dd3f, (q31_t)0x7d15d3ad, (q31_t)0xece7de66,
+    (q31_t)0x7d1212b7, (q31_t)0xecdbe04a, (q31_t)0x7d0e4f67, (q31_t)0xeccfe2ea,
+    (q31_t)0x7d0a89bc, (q31_t)0xecc3e648, (q31_t)0x7d06c1b6, (q31_t)0xecb7ea63,
+    (q31_t)0x7d02f757, (q31_t)0xecabef3d, (q31_t)0x7cff2a9d, (q31_t)0xec9ff4d6,
+    (q31_t)0x7cfb5b89, (q31_t)0xec93fb2e, (q31_t)0x7cf78a1b, (q31_t)0xec880245,
+    (q31_t)0x7cf3b653, (q31_t)0xec7c0a1d, (q31_t)0x7cefe032, (q31_t)0xec7012b5,
+    (q31_t)0x7cec07b8, (q31_t)0xec641c0e, (q31_t)0x7ce82ce4, (q31_t)0xec582629,
+    (q31_t)0x7ce44fb7, (q31_t)0xec4c3106, (q31_t)0x7ce07031, (q31_t)0xec403ca5,
+    (q31_t)0x7cdc8e52, (q31_t)0xec344908, (q31_t)0x7cd8aa1b, (q31_t)0xec28562d,
+    (q31_t)0x7cd4c38b, (q31_t)0xec1c6417, (q31_t)0x7cd0daa2, (q31_t)0xec1072c4,
+    (q31_t)0x7cccef62, (q31_t)0xec048237, (q31_t)0x7cc901c9, (q31_t)0xebf8926f,
+    (q31_t)0x7cc511d9, (q31_t)0xebeca36c, (q31_t)0x7cc11f90, (q31_t)0xebe0b52f,
+    (q31_t)0x7cbd2af0, (q31_t)0xebd4c7ba, (q31_t)0x7cb933f9, (q31_t)0xebc8db0b,
+    (q31_t)0x7cb53aaa, (q31_t)0xebbcef23, (q31_t)0x7cb13f04, (q31_t)0xebb10404,
+    (q31_t)0x7cad4107, (q31_t)0xeba519ad, (q31_t)0x7ca940b3, (q31_t)0xeb99301f,
+    (q31_t)0x7ca53e09, (q31_t)0xeb8d475b, (q31_t)0x7ca13908, (q31_t)0xeb815f60,
+    (q31_t)0x7c9d31b0, (q31_t)0xeb75782f, (q31_t)0x7c992803, (q31_t)0xeb6991ca,
+    (q31_t)0x7c951bff, (q31_t)0xeb5dac2f, (q31_t)0x7c910da5, (q31_t)0xeb51c760,
+    (q31_t)0x7c8cfcf6, (q31_t)0xeb45e35d, (q31_t)0x7c88e9f1, (q31_t)0xeb3a0027,
+    (q31_t)0x7c84d496, (q31_t)0xeb2e1dbe, (q31_t)0x7c80bce7, (q31_t)0xeb223c22,
+    (q31_t)0x7c7ca2e2, (q31_t)0xeb165b54, (q31_t)0x7c788688, (q31_t)0xeb0a7b54,
+    (q31_t)0x7c7467d9, (q31_t)0xeafe9c24, (q31_t)0x7c7046d6, (q31_t)0xeaf2bdc3,
+    (q31_t)0x7c6c237e, (q31_t)0xeae6e031, (q31_t)0x7c67fdd1, (q31_t)0xeadb0370,
+    (q31_t)0x7c63d5d1, (q31_t)0xeacf277f, (q31_t)0x7c5fab7c, (q31_t)0xeac34c60,
+    (q31_t)0x7c5b7ed4, (q31_t)0xeab77212, (q31_t)0x7c574fd8, (q31_t)0xeaab9896,
+    (q31_t)0x7c531e88, (q31_t)0xea9fbfed, (q31_t)0x7c4eeae5, (q31_t)0xea93e817,
+    (q31_t)0x7c4ab4ef, (q31_t)0xea881114, (q31_t)0x7c467ca6, (q31_t)0xea7c3ae5,
+    (q31_t)0x7c42420a, (q31_t)0xea70658a, (q31_t)0x7c3e051b, (q31_t)0xea649105,
+    (q31_t)0x7c39c5da, (q31_t)0xea58bd54, (q31_t)0x7c358446, (q31_t)0xea4cea79,
+    (q31_t)0x7c314060, (q31_t)0xea411874, (q31_t)0x7c2cfa28, (q31_t)0xea354746,
+    (q31_t)0x7c28b19e, (q31_t)0xea2976ef, (q31_t)0x7c2466c2, (q31_t)0xea1da770,
+    (q31_t)0x7c201994, (q31_t)0xea11d8c8, (q31_t)0x7c1bca16, (q31_t)0xea060af9,
+    (q31_t)0x7c177845, (q31_t)0xe9fa3e03, (q31_t)0x7c132424, (q31_t)0xe9ee71e6,
+    (q31_t)0x7c0ecdb2, (q31_t)0xe9e2a6a3, (q31_t)0x7c0a74f0, (q31_t)0xe9d6dc3b,
+    (q31_t)0x7c0619dc, (q31_t)0xe9cb12ad, (q31_t)0x7c01bc78, (q31_t)0xe9bf49fa,
+    (q31_t)0x7bfd5cc4, (q31_t)0xe9b38223, (q31_t)0x7bf8fac0, (q31_t)0xe9a7bb28,
+    (q31_t)0x7bf4966c, (q31_t)0xe99bf509, (q31_t)0x7bf02fc9, (q31_t)0xe9902fc7,
+    (q31_t)0x7bebc6d5, (q31_t)0xe9846b63, (q31_t)0x7be75b93, (q31_t)0xe978a7dd,
+    (q31_t)0x7be2ee01, (q31_t)0xe96ce535, (q31_t)0x7bde7e20, (q31_t)0xe961236c,
+    (q31_t)0x7bda0bf0, (q31_t)0xe9556282, (q31_t)0x7bd59771, (q31_t)0xe949a278,
+    (q31_t)0x7bd120a4, (q31_t)0xe93de34e, (q31_t)0x7bcca789, (q31_t)0xe9322505,
+    (q31_t)0x7bc82c1f, (q31_t)0xe926679c, (q31_t)0x7bc3ae67, (q31_t)0xe91aab16,
+    (q31_t)0x7bbf2e62, (q31_t)0xe90eef71, (q31_t)0x7bbaac0e, (q31_t)0xe90334af,
+    (q31_t)0x7bb6276e, (q31_t)0xe8f77acf, (q31_t)0x7bb1a080, (q31_t)0xe8ebc1d3,
+    (q31_t)0x7bad1744, (q31_t)0xe8e009ba, (q31_t)0x7ba88bbc, (q31_t)0xe8d45286,
+    (q31_t)0x7ba3fde7, (q31_t)0xe8c89c37, (q31_t)0x7b9f6dc5, (q31_t)0xe8bce6cd,
+    (q31_t)0x7b9adb57, (q31_t)0xe8b13248, (q31_t)0x7b96469d, (q31_t)0xe8a57ea9,
+    (q31_t)0x7b91af97, (q31_t)0xe899cbf1, (q31_t)0x7b8d1644, (q31_t)0xe88e1a20,
+    (q31_t)0x7b887aa6, (q31_t)0xe8826936, (q31_t)0x7b83dcbc, (q31_t)0xe876b934,
+    (q31_t)0x7b7f3c87, (q31_t)0xe86b0a1a, (q31_t)0x7b7a9a07, (q31_t)0xe85f5be9,
+    (q31_t)0x7b75f53c, (q31_t)0xe853aea1, (q31_t)0x7b714e25, (q31_t)0xe8480243,
+    (q31_t)0x7b6ca4c4, (q31_t)0xe83c56cf, (q31_t)0x7b67f919, (q31_t)0xe830ac45,
+    (q31_t)0x7b634b23, (q31_t)0xe82502a7, (q31_t)0x7b5e9ae4, (q31_t)0xe81959f4,
+    (q31_t)0x7b59e85a, (q31_t)0xe80db22d, (q31_t)0x7b553386, (q31_t)0xe8020b52,
+    (q31_t)0x7b507c69, (q31_t)0xe7f66564, (q31_t)0x7b4bc303, (q31_t)0xe7eac063,
+    (q31_t)0x7b470753, (q31_t)0xe7df1c50, (q31_t)0x7b42495a, (q31_t)0xe7d3792b,
+    (q31_t)0x7b3d8918, (q31_t)0xe7c7d6f4, (q31_t)0x7b38c68e, (q31_t)0xe7bc35ad,
+    (q31_t)0x7b3401bb, (q31_t)0xe7b09555, (q31_t)0x7b2f3aa0, (q31_t)0xe7a4f5ed,
+    (q31_t)0x7b2a713d, (q31_t)0xe7995776, (q31_t)0x7b25a591, (q31_t)0xe78db9ef,
+    (q31_t)0x7b20d79e, (q31_t)0xe7821d59, (q31_t)0x7b1c0764, (q31_t)0xe77681b6,
+    (q31_t)0x7b1734e2, (q31_t)0xe76ae704, (q31_t)0x7b126019, (q31_t)0xe75f4d45,
+    (q31_t)0x7b0d8909, (q31_t)0xe753b479, (q31_t)0x7b08afb2, (q31_t)0xe7481ca1,
+    (q31_t)0x7b03d414, (q31_t)0xe73c85bc, (q31_t)0x7afef630, (q31_t)0xe730efcc,
+    (q31_t)0x7afa1605, (q31_t)0xe7255ad1, (q31_t)0x7af53395, (q31_t)0xe719c6cb,
+    (q31_t)0x7af04edf, (q31_t)0xe70e33bb, (q31_t)0x7aeb67e3, (q31_t)0xe702a1a1,
+    (q31_t)0x7ae67ea1, (q31_t)0xe6f7107e, (q31_t)0x7ae1931a, (q31_t)0xe6eb8052,
+    (q31_t)0x7adca54e, (q31_t)0xe6dff11d, (q31_t)0x7ad7b53d, (q31_t)0xe6d462e1,
+    (q31_t)0x7ad2c2e8, (q31_t)0xe6c8d59c, (q31_t)0x7acdce4d, (q31_t)0xe6bd4951,
+    (q31_t)0x7ac8d76f, (q31_t)0xe6b1bdff, (q31_t)0x7ac3de4c, (q31_t)0xe6a633a6,
+    (q31_t)0x7abee2e5, (q31_t)0xe69aaa48, (q31_t)0x7ab9e53a, (q31_t)0xe68f21e5,
+    (q31_t)0x7ab4e54c, (q31_t)0xe6839a7c, (q31_t)0x7aafe31b, (q31_t)0xe6781410,
+    (q31_t)0x7aaadea6, (q31_t)0xe66c8e9f, (q31_t)0x7aa5d7ee, (q31_t)0xe6610a2a,
+    (q31_t)0x7aa0cef3, (q31_t)0xe65586b3, (q31_t)0x7a9bc3b6, (q31_t)0xe64a0438,
+    (q31_t)0x7a96b636, (q31_t)0xe63e82bc, (q31_t)0x7a91a674, (q31_t)0xe633023e,
+    (q31_t)0x7a8c9470, (q31_t)0xe62782be, (q31_t)0x7a87802a, (q31_t)0xe61c043d,
+    (q31_t)0x7a8269a3, (q31_t)0xe61086bc, (q31_t)0x7a7d50da, (q31_t)0xe6050a3b,
+    (q31_t)0x7a7835cf, (q31_t)0xe5f98ebb, (q31_t)0x7a731884, (q31_t)0xe5ee143b,
+    (q31_t)0x7a6df8f8, (q31_t)0xe5e29abc, (q31_t)0x7a68d72b, (q31_t)0xe5d72240,
+    (q31_t)0x7a63b31d, (q31_t)0xe5cbaac5, (q31_t)0x7a5e8cd0, (q31_t)0xe5c0344d,
+    (q31_t)0x7a596442, (q31_t)0xe5b4bed8, (q31_t)0x7a543974, (q31_t)0xe5a94a67,
+    (q31_t)0x7a4f0c67, (q31_t)0xe59dd6f9, (q31_t)0x7a49dd1a, (q31_t)0xe5926490,
+    (q31_t)0x7a44ab8e, (q31_t)0xe586f32c, (q31_t)0x7a3f77c3, (q31_t)0xe57b82cd,
+    (q31_t)0x7a3a41b9, (q31_t)0xe5701374, (q31_t)0x7a350970, (q31_t)0xe564a521,
+    (q31_t)0x7a2fcee8, (q31_t)0xe55937d5, (q31_t)0x7a2a9223, (q31_t)0xe54dcb8f,
+    (q31_t)0x7a25531f, (q31_t)0xe5426051, (q31_t)0x7a2011de, (q31_t)0xe536f61b,
+    (q31_t)0x7a1ace5f, (q31_t)0xe52b8cee, (q31_t)0x7a1588a2, (q31_t)0xe52024c9,
+    (q31_t)0x7a1040a8, (q31_t)0xe514bdad, (q31_t)0x7a0af671, (q31_t)0xe509579b,
+    (q31_t)0x7a05a9fd, (q31_t)0xe4fdf294, (q31_t)0x7a005b4d, (q31_t)0xe4f28e96,
+    (q31_t)0x79fb0a60, (q31_t)0xe4e72ba4, (q31_t)0x79f5b737, (q31_t)0xe4dbc9bd,
+    (q31_t)0x79f061d2, (q31_t)0xe4d068e2, (q31_t)0x79eb0a31, (q31_t)0xe4c50914,
+    (q31_t)0x79e5b054, (q31_t)0xe4b9aa52, (q31_t)0x79e0543c, (q31_t)0xe4ae4c9d,
+    (q31_t)0x79daf5e8, (q31_t)0xe4a2eff6, (q31_t)0x79d5955a, (q31_t)0xe497945d,
+    (q31_t)0x79d03291, (q31_t)0xe48c39d3, (q31_t)0x79cacd8d, (q31_t)0xe480e057,
+    (q31_t)0x79c5664f, (q31_t)0xe47587eb, (q31_t)0x79bffcd7, (q31_t)0xe46a308f,
+    (q31_t)0x79ba9125, (q31_t)0xe45eda43, (q31_t)0x79b52339, (q31_t)0xe4538507,
+    (q31_t)0x79afb313, (q31_t)0xe44830dd, (q31_t)0x79aa40b4, (q31_t)0xe43cddc4,
+    (q31_t)0x79a4cc1c, (q31_t)0xe4318bbe, (q31_t)0x799f554b, (q31_t)0xe4263ac9,
+    (q31_t)0x7999dc42, (q31_t)0xe41aeae8, (q31_t)0x799460ff, (q31_t)0xe40f9c1a,
+    (q31_t)0x798ee385, (q31_t)0xe4044e60, (q31_t)0x798963d2, (q31_t)0xe3f901ba,
+    (q31_t)0x7983e1e8, (q31_t)0xe3edb628, (q31_t)0x797e5dc6, (q31_t)0xe3e26bac,
+    (q31_t)0x7978d76c, (q31_t)0xe3d72245, (q31_t)0x79734edc, (q31_t)0xe3cbd9f4,
+    (q31_t)0x796dc414, (q31_t)0xe3c092b9, (q31_t)0x79683715, (q31_t)0xe3b54c95,
+    (q31_t)0x7962a7e0, (q31_t)0xe3aa0788, (q31_t)0x795d1675, (q31_t)0xe39ec393,
+    (q31_t)0x795782d3, (q31_t)0xe39380b6, (q31_t)0x7951ecfc, (q31_t)0xe3883ef2,
+    (q31_t)0x794c54ee, (q31_t)0xe37cfe47, (q31_t)0x7946baac, (q31_t)0xe371beb5,
+    (q31_t)0x79411e33, (q31_t)0xe366803c, (q31_t)0x793b7f86, (q31_t)0xe35b42df,
+    (q31_t)0x7935dea4, (q31_t)0xe350069b, (q31_t)0x79303b8e, (q31_t)0xe344cb73,
+    (q31_t)0x792a9642, (q31_t)0xe3399167, (q31_t)0x7924eec3, (q31_t)0xe32e5876,
+    (q31_t)0x791f4510, (q31_t)0xe32320a2, (q31_t)0x79199929, (q31_t)0xe317e9eb,
+    (q31_t)0x7913eb0e, (q31_t)0xe30cb451, (q31_t)0x790e3ac0, (q31_t)0xe3017fd5,
+    (q31_t)0x7908883f, (q31_t)0xe2f64c77, (q31_t)0x7902d38b, (q31_t)0xe2eb1a37,
+    (q31_t)0x78fd1ca4, (q31_t)0xe2dfe917, (q31_t)0x78f7638b, (q31_t)0xe2d4b916,
+    (q31_t)0x78f1a840, (q31_t)0xe2c98a35, (q31_t)0x78ebeac2, (q31_t)0xe2be5c74,
+    (q31_t)0x78e62b13, (q31_t)0xe2b32fd4, (q31_t)0x78e06932, (q31_t)0xe2a80456,
+    (q31_t)0x78daa520, (q31_t)0xe29cd9f8, (q31_t)0x78d4dedd, (q31_t)0xe291b0bd,
+    (q31_t)0x78cf1669, (q31_t)0xe28688a4, (q31_t)0x78c94bc4, (q31_t)0xe27b61af,
+    (q31_t)0x78c37eef, (q31_t)0xe2703bdc, (q31_t)0x78bdafea, (q31_t)0xe265172e,
+    (q31_t)0x78b7deb4, (q31_t)0xe259f3a3, (q31_t)0x78b20b4f, (q31_t)0xe24ed13d,
+    (q31_t)0x78ac35ba, (q31_t)0xe243affc, (q31_t)0x78a65df6, (q31_t)0xe2388fe1,
+    (q31_t)0x78a08402, (q31_t)0xe22d70eb, (q31_t)0x789aa7e0, (q31_t)0xe222531c,
+    (q31_t)0x7894c98f, (q31_t)0xe2173674, (q31_t)0x788ee910, (q31_t)0xe20c1af3,
+    (q31_t)0x78890663, (q31_t)0xe2010099, (q31_t)0x78832187, (q31_t)0xe1f5e768,
+    (q31_t)0x787d3a7e, (q31_t)0xe1eacf5f, (q31_t)0x78775147, (q31_t)0xe1dfb87f,
+    (q31_t)0x787165e3, (q31_t)0xe1d4a2c8, (q31_t)0x786b7852, (q31_t)0xe1c98e3b,
+    (q31_t)0x78658894, (q31_t)0xe1be7ad8, (q31_t)0x785f96a9, (q31_t)0xe1b368a0,
+    (q31_t)0x7859a292, (q31_t)0xe1a85793, (q31_t)0x7853ac4f, (q31_t)0xe19d47b1,
+    (q31_t)0x784db3e0, (q31_t)0xe19238fb, (q31_t)0x7847b946, (q31_t)0xe1872b72,
+    (q31_t)0x7841bc7f, (q31_t)0xe17c1f15, (q31_t)0x783bbd8e, (q31_t)0xe17113e5,
+    (q31_t)0x7835bc71, (q31_t)0xe16609e3, (q31_t)0x782fb92a, (q31_t)0xe15b0110,
+    (q31_t)0x7829b3b9, (q31_t)0xe14ff96a, (q31_t)0x7823ac1d, (q31_t)0xe144f2f3,
+    (q31_t)0x781da256, (q31_t)0xe139edac, (q31_t)0x78179666, (q31_t)0xe12ee995,
+    (q31_t)0x7811884d, (q31_t)0xe123e6ad, (q31_t)0x780b780a, (q31_t)0xe118e4f6,
+    (q31_t)0x7805659e, (q31_t)0xe10de470, (q31_t)0x77ff5109, (q31_t)0xe102e51c,
+    (q31_t)0x77f93a4b, (q31_t)0xe0f7e6f9, (q31_t)0x77f32165, (q31_t)0xe0ecea09,
+    (q31_t)0x77ed0657, (q31_t)0xe0e1ee4b, (q31_t)0x77e6e921, (q31_t)0xe0d6f3c1,
+    (q31_t)0x77e0c9c3, (q31_t)0xe0cbfa6a, (q31_t)0x77daa83d, (q31_t)0xe0c10247,
+    (q31_t)0x77d48490, (q31_t)0xe0b60b58, (q31_t)0x77ce5ebd, (q31_t)0xe0ab159e,
+    (q31_t)0x77c836c2, (q31_t)0xe0a0211a, (q31_t)0x77c20ca1, (q31_t)0xe0952dcb,
+    (q31_t)0x77bbe05a, (q31_t)0xe08a3bb2, (q31_t)0x77b5b1ec, (q31_t)0xe07f4acf,
+    (q31_t)0x77af8159, (q31_t)0xe0745b24, (q31_t)0x77a94ea0, (q31_t)0xe0696cb0,
+    (q31_t)0x77a319c2, (q31_t)0xe05e7f74, (q31_t)0x779ce2be, (q31_t)0xe053936f,
+    (q31_t)0x7796a996, (q31_t)0xe048a8a4, (q31_t)0x77906e49, (q31_t)0xe03dbf11,
+    (q31_t)0x778a30d8, (q31_t)0xe032d6b8, (q31_t)0x7783f143, (q31_t)0xe027ef99,
+    (q31_t)0x777daf89, (q31_t)0xe01d09b4, (q31_t)0x77776bac, (q31_t)0xe012250a,
+    (q31_t)0x777125ac, (q31_t)0xe007419b, (q31_t)0x776add88, (q31_t)0xdffc5f67,
+    (q31_t)0x77649341, (q31_t)0xdff17e70, (q31_t)0x775e46d8, (q31_t)0xdfe69eb4,
+    (q31_t)0x7757f84c, (q31_t)0xdfdbc036, (q31_t)0x7751a79e, (q31_t)0xdfd0e2f5,
+    (q31_t)0x774b54ce, (q31_t)0xdfc606f1, (q31_t)0x7744ffdd, (q31_t)0xdfbb2c2c,
+    (q31_t)0x773ea8ca, (q31_t)0xdfb052a5, (q31_t)0x77384f95, (q31_t)0xdfa57a5d,
+    (q31_t)0x7731f440, (q31_t)0xdf9aa354, (q31_t)0x772b96ca, (q31_t)0xdf8fcd8b,
+    (q31_t)0x77253733, (q31_t)0xdf84f902, (q31_t)0x771ed57c, (q31_t)0xdf7a25ba,
+    (q31_t)0x771871a5, (q31_t)0xdf6f53b3, (q31_t)0x77120bae, (q31_t)0xdf6482ed,
+    (q31_t)0x770ba398, (q31_t)0xdf59b369, (q31_t)0x77053962, (q31_t)0xdf4ee527,
+    (q31_t)0x76fecd0e, (q31_t)0xdf441828, (q31_t)0x76f85e9a, (q31_t)0xdf394c6b,
+    (q31_t)0x76f1ee09, (q31_t)0xdf2e81f3, (q31_t)0x76eb7b58, (q31_t)0xdf23b8be,
+    (q31_t)0x76e5068a, (q31_t)0xdf18f0ce, (q31_t)0x76de8f9e, (q31_t)0xdf0e2a22,
+    (q31_t)0x76d81695, (q31_t)0xdf0364bc, (q31_t)0x76d19b6e, (q31_t)0xdef8a09b,
+    (q31_t)0x76cb1e2a, (q31_t)0xdeedddc0, (q31_t)0x76c49ec9, (q31_t)0xdee31c2b,
+    (q31_t)0x76be1d4c, (q31_t)0xded85bdd, (q31_t)0x76b799b3, (q31_t)0xdecd9cd7,
+    (q31_t)0x76b113fd, (q31_t)0xdec2df18, (q31_t)0x76aa8c2c, (q31_t)0xdeb822a1,
+    (q31_t)0x76a4023f, (q31_t)0xdead6773, (q31_t)0x769d7637, (q31_t)0xdea2ad8d,
+    (q31_t)0x7696e814, (q31_t)0xde97f4f1, (q31_t)0x769057d6, (q31_t)0xde8d3d9e,
+    (q31_t)0x7689c57d, (q31_t)0xde828796, (q31_t)0x7683310b, (q31_t)0xde77d2d8,
+    (q31_t)0x767c9a7e, (q31_t)0xde6d1f65, (q31_t)0x767601d7, (q31_t)0xde626d3e,
+    (q31_t)0x766f6717, (q31_t)0xde57bc62, (q31_t)0x7668ca3e, (q31_t)0xde4d0cd2,
+    (q31_t)0x76622b4c, (q31_t)0xde425e8f, (q31_t)0x765b8a41, (q31_t)0xde37b199,
+    (q31_t)0x7654e71d, (q31_t)0xde2d05f1, (q31_t)0x764e41e2, (q31_t)0xde225b96,
+    (q31_t)0x76479a8e, (q31_t)0xde17b28a, (q31_t)0x7640f123, (q31_t)0xde0d0acc,
+    (q31_t)0x763a45a0, (q31_t)0xde02645d, (q31_t)0x76339806, (q31_t)0xddf7bf3e,
+    (q31_t)0x762ce855, (q31_t)0xdded1b6e, (q31_t)0x7626368d, (q31_t)0xdde278ef,
+    (q31_t)0x761f82af, (q31_t)0xddd7d7c1, (q31_t)0x7618ccba, (q31_t)0xddcd37e4,
+    (q31_t)0x761214b0, (q31_t)0xddc29958, (q31_t)0x760b5a90, (q31_t)0xddb7fc1e,
+    (q31_t)0x76049e5b, (q31_t)0xddad6036, (q31_t)0x75fde011, (q31_t)0xdda2c5a2,
+    (q31_t)0x75f71fb1, (q31_t)0xdd982c60, (q31_t)0x75f05d3d, (q31_t)0xdd8d9472,
+    (q31_t)0x75e998b5, (q31_t)0xdd82fdd8, (q31_t)0x75e2d219, (q31_t)0xdd786892,
+    (q31_t)0x75dc0968, (q31_t)0xdd6dd4a2, (q31_t)0x75d53ea5, (q31_t)0xdd634206,
+    (q31_t)0x75ce71ce, (q31_t)0xdd58b0c0, (q31_t)0x75c7a2e3, (q31_t)0xdd4e20d0,
+    (q31_t)0x75c0d1e7, (q31_t)0xdd439236, (q31_t)0x75b9fed7, (q31_t)0xdd3904f4,
+    (q31_t)0x75b329b5, (q31_t)0xdd2e7908, (q31_t)0x75ac5282, (q31_t)0xdd23ee74,
+    (q31_t)0x75a5793c, (q31_t)0xdd196538, (q31_t)0x759e9de5, (q31_t)0xdd0edd55,
+    (q31_t)0x7597c07d, (q31_t)0xdd0456ca, (q31_t)0x7590e104, (q31_t)0xdcf9d199,
+    (q31_t)0x7589ff7a, (q31_t)0xdcef4dc2, (q31_t)0x75831be0, (q31_t)0xdce4cb44,
+    (q31_t)0x757c3636, (q31_t)0xdcda4a21, (q31_t)0x75754e7c, (q31_t)0xdccfca59,
+    (q31_t)0x756e64b2, (q31_t)0xdcc54bec, (q31_t)0x756778d9, (q31_t)0xdcbacedb,
+    (q31_t)0x75608af1, (q31_t)0xdcb05326, (q31_t)0x75599afa, (q31_t)0xdca5d8cd,
+    (q31_t)0x7552a8f4, (q31_t)0xdc9b5fd2, (q31_t)0x754bb4e1, (q31_t)0xdc90e834,
+    (q31_t)0x7544bebf, (q31_t)0xdc8671f3, (q31_t)0x753dc68f, (q31_t)0xdc7bfd11,
+    (q31_t)0x7536cc52, (q31_t)0xdc71898d, (q31_t)0x752fd008, (q31_t)0xdc671768,
+    (q31_t)0x7528d1b1, (q31_t)0xdc5ca6a2, (q31_t)0x7521d14d, (q31_t)0xdc52373c,
+    (q31_t)0x751acedd, (q31_t)0xdc47c936, (q31_t)0x7513ca60, (q31_t)0xdc3d5c91,
+    (q31_t)0x750cc3d8, (q31_t)0xdc32f14d, (q31_t)0x7505bb44, (q31_t)0xdc28876a,
+    (q31_t)0x74feb0a5, (q31_t)0xdc1e1ee9, (q31_t)0x74f7a3fb, (q31_t)0xdc13b7c9,
+    (q31_t)0x74f09546, (q31_t)0xdc09520d, (q31_t)0x74e98487, (q31_t)0xdbfeedb3,
+    (q31_t)0x74e271bd, (q31_t)0xdbf48abd, (q31_t)0x74db5cea, (q31_t)0xdbea292b,
+    (q31_t)0x74d4460c, (q31_t)0xdbdfc8fc, (q31_t)0x74cd2d26, (q31_t)0xdbd56a32,
+    (q31_t)0x74c61236, (q31_t)0xdbcb0cce, (q31_t)0x74bef53d, (q31_t)0xdbc0b0ce,
+    (q31_t)0x74b7d63c, (q31_t)0xdbb65634, (q31_t)0x74b0b533, (q31_t)0xdbabfd01,
+    (q31_t)0x74a99221, (q31_t)0xdba1a534, (q31_t)0x74a26d08, (q31_t)0xdb974ece,
+    (q31_t)0x749b45e7, (q31_t)0xdb8cf9cf, (q31_t)0x74941cbf, (q31_t)0xdb82a638,
+    (q31_t)0x748cf190, (q31_t)0xdb785409, (q31_t)0x7485c45b, (q31_t)0xdb6e0342,
+    (q31_t)0x747e951f, (q31_t)0xdb63b3e5, (q31_t)0x747763dd, (q31_t)0xdb5965f1,
+    (q31_t)0x74703095, (q31_t)0xdb4f1967, (q31_t)0x7468fb47, (q31_t)0xdb44ce46,
+    (q31_t)0x7461c3f5, (q31_t)0xdb3a8491, (q31_t)0x745a8a9d, (q31_t)0xdb303c46,
+    (q31_t)0x74534f41, (q31_t)0xdb25f566, (q31_t)0x744c11e0, (q31_t)0xdb1baff2,
+    (q31_t)0x7444d27b, (q31_t)0xdb116beb, (q31_t)0x743d9112, (q31_t)0xdb072950,
+    (q31_t)0x74364da6, (q31_t)0xdafce821, (q31_t)0x742f0836, (q31_t)0xdaf2a860,
+    (q31_t)0x7427c0c3, (q31_t)0xdae86a0d, (q31_t)0x7420774d, (q31_t)0xdade2d28,
+    (q31_t)0x74192bd5, (q31_t)0xdad3f1b1, (q31_t)0x7411de5b, (q31_t)0xdac9b7a9,
+    (q31_t)0x740a8edf, (q31_t)0xdabf7f11, (q31_t)0x74033d61, (q31_t)0xdab547e8,
+    (q31_t)0x73fbe9e2, (q31_t)0xdaab122f, (q31_t)0x73f49462, (q31_t)0xdaa0dde7,
+    (q31_t)0x73ed3ce1, (q31_t)0xda96ab0f, (q31_t)0x73e5e360, (q31_t)0xda8c79a9,
+    (q31_t)0x73de87de, (q31_t)0xda8249b4, (q31_t)0x73d72a5d, (q31_t)0xda781b31,
+    (q31_t)0x73cfcadc, (q31_t)0xda6dee21, (q31_t)0x73c8695b, (q31_t)0xda63c284,
+    (q31_t)0x73c105db, (q31_t)0xda599859, (q31_t)0x73b9a05d, (q31_t)0xda4f6fa3,
+    (q31_t)0x73b238e0, (q31_t)0xda454860, (q31_t)0x73aacf65, (q31_t)0xda3b2292,
+    (q31_t)0x73a363ec, (q31_t)0xda30fe38, (q31_t)0x739bf675, (q31_t)0xda26db54,
+    (q31_t)0x73948701, (q31_t)0xda1cb9e5, (q31_t)0x738d1590, (q31_t)0xda1299ec,
+    (q31_t)0x7385a222, (q31_t)0xda087b69, (q31_t)0x737e2cb7, (q31_t)0xd9fe5e5e,
+    (q31_t)0x7376b551, (q31_t)0xd9f442c9, (q31_t)0x736f3bee, (q31_t)0xd9ea28ac,
+    (q31_t)0x7367c090, (q31_t)0xd9e01006, (q31_t)0x73604336, (q31_t)0xd9d5f8d9,
+    (q31_t)0x7358c3e2, (q31_t)0xd9cbe325, (q31_t)0x73514292, (q31_t)0xd9c1cee9,
+    (q31_t)0x7349bf48, (q31_t)0xd9b7bc27, (q31_t)0x73423a04, (q31_t)0xd9adaadf,
+    (q31_t)0x733ab2c6, (q31_t)0xd9a39b11, (q31_t)0x7333298f, (q31_t)0xd9998cbe,
+    (q31_t)0x732b9e5e, (q31_t)0xd98f7fe6, (q31_t)0x73241134, (q31_t)0xd9857489,
+    (q31_t)0x731c8211, (q31_t)0xd97b6aa8, (q31_t)0x7314f0f6, (q31_t)0xd9716243,
+    (q31_t)0x730d5de3, (q31_t)0xd9675b5a, (q31_t)0x7305c8d7, (q31_t)0xd95d55ef,
+    (q31_t)0x72fe31d5, (q31_t)0xd9535201, (q31_t)0x72f698db, (q31_t)0xd9494f90,
+    (q31_t)0x72eefdea, (q31_t)0xd93f4e9e, (q31_t)0x72e76102, (q31_t)0xd9354f2a,
+    (q31_t)0x72dfc224, (q31_t)0xd92b5135, (q31_t)0x72d82150, (q31_t)0xd92154bf,
+    (q31_t)0x72d07e85, (q31_t)0xd91759c9, (q31_t)0x72c8d9c6, (q31_t)0xd90d6053,
+    (q31_t)0x72c13311, (q31_t)0xd903685d, (q31_t)0x72b98a67, (q31_t)0xd8f971e8,
+    (q31_t)0x72b1dfc9, (q31_t)0xd8ef7cf4, (q31_t)0x72aa3336, (q31_t)0xd8e58982,
+    (q31_t)0x72a284b0, (q31_t)0xd8db9792, (q31_t)0x729ad435, (q31_t)0xd8d1a724,
+    (q31_t)0x729321c7, (q31_t)0xd8c7b838, (q31_t)0x728b6d66, (q31_t)0xd8bdcad0,
+    (q31_t)0x7283b712, (q31_t)0xd8b3deeb, (q31_t)0x727bfecc, (q31_t)0xd8a9f48a,
+    (q31_t)0x72744493, (q31_t)0xd8a00bae, (q31_t)0x726c8868, (q31_t)0xd8962456,
+    (q31_t)0x7264ca4c, (q31_t)0xd88c3e83, (q31_t)0x725d0a3e, (q31_t)0xd8825a35,
+    (q31_t)0x72554840, (q31_t)0xd878776d, (q31_t)0x724d8450, (q31_t)0xd86e962b,
+    (q31_t)0x7245be70, (q31_t)0xd864b670, (q31_t)0x723df6a0, (q31_t)0xd85ad83c,
+    (q31_t)0x72362ce0, (q31_t)0xd850fb8e, (q31_t)0x722e6130, (q31_t)0xd8472069,
+    (q31_t)0x72269391, (q31_t)0xd83d46cc, (q31_t)0x721ec403, (q31_t)0xd8336eb7,
+    (q31_t)0x7216f287, (q31_t)0xd829982b, (q31_t)0x720f1f1c, (q31_t)0xd81fc328,
+    (q31_t)0x720749c3, (q31_t)0xd815efae, (q31_t)0x71ff727c, (q31_t)0xd80c1dbf,
+    (q31_t)0x71f79948, (q31_t)0xd8024d59, (q31_t)0x71efbe27, (q31_t)0xd7f87e7f,
+    (q31_t)0x71e7e118, (q31_t)0xd7eeb130, (q31_t)0x71e0021e, (q31_t)0xd7e4e56c,
+    (q31_t)0x71d82137, (q31_t)0xd7db1b34, (q31_t)0x71d03e64, (q31_t)0xd7d15288,
+    (q31_t)0x71c859a5, (q31_t)0xd7c78b68, (q31_t)0x71c072fb, (q31_t)0xd7bdc5d6,
+    (q31_t)0x71b88a66, (q31_t)0xd7b401d1, (q31_t)0x71b09fe7, (q31_t)0xd7aa3f5a,
+    (q31_t)0x71a8b37c, (q31_t)0xd7a07e70, (q31_t)0x71a0c528, (q31_t)0xd796bf16,
+    (q31_t)0x7198d4ea, (q31_t)0xd78d014a, (q31_t)0x7190e2c3, (q31_t)0xd783450d,
+    (q31_t)0x7188eeb2, (q31_t)0xd7798a60, (q31_t)0x7180f8b8, (q31_t)0xd76fd143,
+    (q31_t)0x717900d6, (q31_t)0xd76619b6, (q31_t)0x7171070c, (q31_t)0xd75c63ba,
+    (q31_t)0x71690b59, (q31_t)0xd752af4f, (q31_t)0x71610dbf, (q31_t)0xd748fc75,
+    (q31_t)0x71590e3e, (q31_t)0xd73f4b2e, (q31_t)0x71510cd5, (q31_t)0xd7359b78,
+    (q31_t)0x71490986, (q31_t)0xd72bed55, (q31_t)0x71410450, (q31_t)0xd72240c5,
+    (q31_t)0x7138fd35, (q31_t)0xd71895c9, (q31_t)0x7130f433, (q31_t)0xd70eec60,
+    (q31_t)0x7128e94c, (q31_t)0xd705448b, (q31_t)0x7120dc80, (q31_t)0xd6fb9e4b,
+    (q31_t)0x7118cdcf, (q31_t)0xd6f1f99f, (q31_t)0x7110bd39, (q31_t)0xd6e85689,
+    (q31_t)0x7108aabf, (q31_t)0xd6deb508, (q31_t)0x71009661, (q31_t)0xd6d5151d,
+    (q31_t)0x70f8801f, (q31_t)0xd6cb76c9, (q31_t)0x70f067fb, (q31_t)0xd6c1da0b,
+    (q31_t)0x70e84df3, (q31_t)0xd6b83ee4, (q31_t)0x70e03208, (q31_t)0xd6aea555,
+    (q31_t)0x70d8143b, (q31_t)0xd6a50d5d, (q31_t)0x70cff48c, (q31_t)0xd69b76fe,
+    (q31_t)0x70c7d2fb, (q31_t)0xd691e237, (q31_t)0x70bfaf89, (q31_t)0xd6884f09,
+    (q31_t)0x70b78a36, (q31_t)0xd67ebd74, (q31_t)0x70af6302, (q31_t)0xd6752d79,
+    (q31_t)0x70a739ed, (q31_t)0xd66b9f18, (q31_t)0x709f0ef8, (q31_t)0xd6621251,
+    (q31_t)0x7096e223, (q31_t)0xd6588725, (q31_t)0x708eb36f, (q31_t)0xd64efd94,
+    (q31_t)0x708682dc, (q31_t)0xd645759f, (q31_t)0x707e5069, (q31_t)0xd63bef46,
+    (q31_t)0x70761c18, (q31_t)0xd6326a88, (q31_t)0x706de5e9, (q31_t)0xd628e767,
+    (q31_t)0x7065addb, (q31_t)0xd61f65e4, (q31_t)0x705d73f0, (q31_t)0xd615e5fd,
+    (q31_t)0x70553828, (q31_t)0xd60c67b4, (q31_t)0x704cfa83, (q31_t)0xd602eb0a,
+    (q31_t)0x7044bb00, (q31_t)0xd5f96ffd, (q31_t)0x703c79a2, (q31_t)0xd5eff690,
+    (q31_t)0x70343667, (q31_t)0xd5e67ec1, (q31_t)0x702bf151, (q31_t)0xd5dd0892,
+    (q31_t)0x7023aa5f, (q31_t)0xd5d39403, (q31_t)0x701b6193, (q31_t)0xd5ca2115,
+    (q31_t)0x701316eb, (q31_t)0xd5c0afc6, (q31_t)0x700aca69, (q31_t)0xd5b74019,
+    (q31_t)0x70027c0c, (q31_t)0xd5add20d, (q31_t)0x6ffa2bd6, (q31_t)0xd5a465a3,
+    (q31_t)0x6ff1d9c7, (q31_t)0xd59afadb, (q31_t)0x6fe985de, (q31_t)0xd59191b5,
+    (q31_t)0x6fe1301c, (q31_t)0xd5882a32, (q31_t)0x6fd8d882, (q31_t)0xd57ec452,
+    (q31_t)0x6fd07f0f, (q31_t)0xd5756016, (q31_t)0x6fc823c5, (q31_t)0xd56bfd7d,
+    (q31_t)0x6fbfc6a3, (q31_t)0xd5629c89, (q31_t)0x6fb767aa, (q31_t)0xd5593d3a,
+    (q31_t)0x6faf06da, (q31_t)0xd54fdf8f, (q31_t)0x6fa6a433, (q31_t)0xd5468389,
+    (q31_t)0x6f9e3fb6, (q31_t)0xd53d292a, (q31_t)0x6f95d963, (q31_t)0xd533d070,
+    (q31_t)0x6f8d713a, (q31_t)0xd52a795d, (q31_t)0x6f85073c, (q31_t)0xd52123f0,
+    (q31_t)0x6f7c9b69, (q31_t)0xd517d02b, (q31_t)0x6f742dc1, (q31_t)0xd50e7e0d,
+    (q31_t)0x6f6bbe45, (q31_t)0xd5052d97, (q31_t)0x6f634cf5, (q31_t)0xd4fbdec9,
+    (q31_t)0x6f5ad9d1, (q31_t)0xd4f291a4, (q31_t)0x6f5264da, (q31_t)0xd4e94627,
+    (q31_t)0x6f49ee0f, (q31_t)0xd4dffc54, (q31_t)0x6f417573, (q31_t)0xd4d6b42b,
+    (q31_t)0x6f38fb03, (q31_t)0xd4cd6dab, (q31_t)0x6f307ec2, (q31_t)0xd4c428d6,
+    (q31_t)0x6f2800af, (q31_t)0xd4bae5ab, (q31_t)0x6f1f80ca, (q31_t)0xd4b1a42c,
+    (q31_t)0x6f16ff14, (q31_t)0xd4a86458, (q31_t)0x6f0e7b8e, (q31_t)0xd49f2630,
+    (q31_t)0x6f05f637, (q31_t)0xd495e9b3, (q31_t)0x6efd6f10, (q31_t)0xd48caee4,
+    (q31_t)0x6ef4e619, (q31_t)0xd48375c1, (q31_t)0x6eec5b53, (q31_t)0xd47a3e4b,
+    (q31_t)0x6ee3cebe, (q31_t)0xd4710883, (q31_t)0x6edb405a, (q31_t)0xd467d469,
+    (q31_t)0x6ed2b027, (q31_t)0xd45ea1fd, (q31_t)0x6eca1e27, (q31_t)0xd4557140,
+    (q31_t)0x6ec18a58, (q31_t)0xd44c4232, (q31_t)0x6eb8f4bc, (q31_t)0xd44314d3,
+    (q31_t)0x6eb05d53, (q31_t)0xd439e923, (q31_t)0x6ea7c41e, (q31_t)0xd430bf24,
+    (q31_t)0x6e9f291b, (q31_t)0xd42796d5, (q31_t)0x6e968c4d, (q31_t)0xd41e7037,
+    (q31_t)0x6e8dedb3, (q31_t)0xd4154b4a, (q31_t)0x6e854d4d, (q31_t)0xd40c280e,
+    (q31_t)0x6e7cab1c, (q31_t)0xd4030684, (q31_t)0x6e740720, (q31_t)0xd3f9e6ad,
+    (q31_t)0x6e6b615a, (q31_t)0xd3f0c887, (q31_t)0x6e62b9ca, (q31_t)0xd3e7ac15,
+    (q31_t)0x6e5a1070, (q31_t)0xd3de9156, (q31_t)0x6e51654c, (q31_t)0xd3d5784a,
+    (q31_t)0x6e48b860, (q31_t)0xd3cc60f2, (q31_t)0x6e4009aa, (q31_t)0xd3c34b4f,
+    (q31_t)0x6e37592c, (q31_t)0xd3ba3760, (q31_t)0x6e2ea6e6, (q31_t)0xd3b12526,
+    (q31_t)0x6e25f2d8, (q31_t)0xd3a814a2, (q31_t)0x6e1d3d03, (q31_t)0xd39f05d3,
+    (q31_t)0x6e148566, (q31_t)0xd395f8ba, (q31_t)0x6e0bcc03, (q31_t)0xd38ced57,
+    (q31_t)0x6e0310d9, (q31_t)0xd383e3ab, (q31_t)0x6dfa53e9, (q31_t)0xd37adbb6,
+    (q31_t)0x6df19534, (q31_t)0xd371d579, (q31_t)0x6de8d4b8, (q31_t)0xd368d0f3,
+    (q31_t)0x6de01278, (q31_t)0xd35fce26, (q31_t)0x6dd74e73, (q31_t)0xd356cd11,
+    (q31_t)0x6dce88aa, (q31_t)0xd34dcdb4, (q31_t)0x6dc5c11c, (q31_t)0xd344d011,
+    (q31_t)0x6dbcf7cb, (q31_t)0xd33bd427, (q31_t)0x6db42cb6, (q31_t)0xd332d9f7,
+    (q31_t)0x6dab5fdf, (q31_t)0xd329e181, (q31_t)0x6da29144, (q31_t)0xd320eac6,
+    (q31_t)0x6d99c0e7, (q31_t)0xd317f5c6, (q31_t)0x6d90eec8, (q31_t)0xd30f0280,
+    (q31_t)0x6d881ae8, (q31_t)0xd30610f7, (q31_t)0x6d7f4545, (q31_t)0xd2fd2129,
+    (q31_t)0x6d766de2, (q31_t)0xd2f43318, (q31_t)0x6d6d94bf, (q31_t)0xd2eb46c3,
+    (q31_t)0x6d64b9da, (q31_t)0xd2e25c2b, (q31_t)0x6d5bdd36, (q31_t)0xd2d97350,
+    (q31_t)0x6d52fed2, (q31_t)0xd2d08c33, (q31_t)0x6d4a1eaf, (q31_t)0xd2c7a6d4,
+    (q31_t)0x6d413ccd, (q31_t)0xd2bec333, (q31_t)0x6d38592c, (q31_t)0xd2b5e151,
+    (q31_t)0x6d2f73cd, (q31_t)0xd2ad012e, (q31_t)0x6d268cb0, (q31_t)0xd2a422ca,
+    (q31_t)0x6d1da3d5, (q31_t)0xd29b4626, (q31_t)0x6d14b93d, (q31_t)0xd2926b41,
+    (q31_t)0x6d0bcce8, (q31_t)0xd289921e, (q31_t)0x6d02ded7, (q31_t)0xd280babb,
+    (q31_t)0x6cf9ef09, (q31_t)0xd277e518, (q31_t)0x6cf0fd80, (q31_t)0xd26f1138,
+    (q31_t)0x6ce80a3a, (q31_t)0xd2663f19, (q31_t)0x6cdf153a, (q31_t)0xd25d6ebc,
+    (q31_t)0x6cd61e7f, (q31_t)0xd254a021, (q31_t)0x6ccd2609, (q31_t)0xd24bd34a,
+    (q31_t)0x6cc42bd9, (q31_t)0xd2430835, (q31_t)0x6cbb2fef, (q31_t)0xd23a3ee4,
+    (q31_t)0x6cb2324c, (q31_t)0xd2317756, (q31_t)0x6ca932ef, (q31_t)0xd228b18d,
+    (q31_t)0x6ca031da, (q31_t)0xd21fed88, (q31_t)0x6c972f0d, (q31_t)0xd2172b48,
+    (q31_t)0x6c8e2a87, (q31_t)0xd20e6acc, (q31_t)0x6c85244a, (q31_t)0xd205ac17,
+    (q31_t)0x6c7c1c55, (q31_t)0xd1fcef27, (q31_t)0x6c7312a9, (q31_t)0xd1f433fd,
+    (q31_t)0x6c6a0746, (q31_t)0xd1eb7a9a, (q31_t)0x6c60fa2d, (q31_t)0xd1e2c2fd,
+    (q31_t)0x6c57eb5e, (q31_t)0xd1da0d28, (q31_t)0x6c4edada, (q31_t)0xd1d1591a,
+    (q31_t)0x6c45c8a0, (q31_t)0xd1c8a6d4, (q31_t)0x6c3cb4b1, (q31_t)0xd1bff656,
+    (q31_t)0x6c339f0e, (q31_t)0xd1b747a0, (q31_t)0x6c2a87b6, (q31_t)0xd1ae9ab4,
+    (q31_t)0x6c216eaa, (q31_t)0xd1a5ef90, (q31_t)0x6c1853eb, (q31_t)0xd19d4636,
+    (q31_t)0x6c0f3779, (q31_t)0xd1949ea6, (q31_t)0x6c061953, (q31_t)0xd18bf8e0,
+    (q31_t)0x6bfcf97c, (q31_t)0xd18354e4, (q31_t)0x6bf3d7f2, (q31_t)0xd17ab2b3,
+    (q31_t)0x6beab4b6, (q31_t)0xd172124d, (q31_t)0x6be18fc9, (q31_t)0xd16973b3,
+    (q31_t)0x6bd8692b, (q31_t)0xd160d6e5, (q31_t)0x6bcf40dc, (q31_t)0xd1583be2,
+    (q31_t)0x6bc616dd, (q31_t)0xd14fa2ad, (q31_t)0x6bbceb2d, (q31_t)0xd1470b44,
+    (q31_t)0x6bb3bdce, (q31_t)0xd13e75a8, (q31_t)0x6baa8ec0, (q31_t)0xd135e1d9,
+    (q31_t)0x6ba15e03, (q31_t)0xd12d4fd9, (q31_t)0x6b982b97, (q31_t)0xd124bfa6,
+    (q31_t)0x6b8ef77d, (q31_t)0xd11c3142, (q31_t)0x6b85c1b5, (q31_t)0xd113a4ad,
+    (q31_t)0x6b7c8a3f, (q31_t)0xd10b19e7, (q31_t)0x6b73511c, (q31_t)0xd10290f0,
+    (q31_t)0x6b6a164d, (q31_t)0xd0fa09c9, (q31_t)0x6b60d9d0, (q31_t)0xd0f18472,
+    (q31_t)0x6b579ba8, (q31_t)0xd0e900ec, (q31_t)0x6b4e5bd4, (q31_t)0xd0e07f36,
+    (q31_t)0x6b451a55, (q31_t)0xd0d7ff51, (q31_t)0x6b3bd72a, (q31_t)0xd0cf813e,
+    (q31_t)0x6b329255, (q31_t)0xd0c704fd, (q31_t)0x6b294bd5, (q31_t)0xd0be8a8d,
+    (q31_t)0x6b2003ac, (q31_t)0xd0b611f1, (q31_t)0x6b16b9d9, (q31_t)0xd0ad9b26,
+    (q31_t)0x6b0d6e5c, (q31_t)0xd0a5262f, (q31_t)0x6b042137, (q31_t)0xd09cb30b,
+    (q31_t)0x6afad269, (q31_t)0xd09441bb, (q31_t)0x6af181f3, (q31_t)0xd08bd23f,
+    (q31_t)0x6ae82fd5, (q31_t)0xd0836497, (q31_t)0x6adedc10, (q31_t)0xd07af8c4,
+    (q31_t)0x6ad586a3, (q31_t)0xd0728ec6, (q31_t)0x6acc2f90, (q31_t)0xd06a269d,
+    (q31_t)0x6ac2d6d6, (q31_t)0xd061c04a, (q31_t)0x6ab97c77, (q31_t)0xd0595bcd,
+    (q31_t)0x6ab02071, (q31_t)0xd050f926, (q31_t)0x6aa6c2c6, (q31_t)0xd0489856,
+    (q31_t)0x6a9d6377, (q31_t)0xd040395d, (q31_t)0x6a940283, (q31_t)0xd037dc3b,
+    (q31_t)0x6a8a9fea, (q31_t)0xd02f80f1, (q31_t)0x6a813bae, (q31_t)0xd027277e,
+    (q31_t)0x6a77d5ce, (q31_t)0xd01ecfe4, (q31_t)0x6a6e6e4b, (q31_t)0xd0167a22,
+    (q31_t)0x6a650525, (q31_t)0xd00e2639, (q31_t)0x6a5b9a5d, (q31_t)0xd005d42a,
+    (q31_t)0x6a522df3, (q31_t)0xcffd83f4, (q31_t)0x6a48bfe7, (q31_t)0xcff53597,
+    (q31_t)0x6a3f503a, (q31_t)0xcfece915, (q31_t)0x6a35deeb, (q31_t)0xcfe49e6d,
+    (q31_t)0x6a2c6bfd, (q31_t)0xcfdc55a1, (q31_t)0x6a22f76e, (q31_t)0xcfd40eaf,
+    (q31_t)0x6a19813f, (q31_t)0xcfcbc999, (q31_t)0x6a100970, (q31_t)0xcfc3865e,
+    (q31_t)0x6a069003, (q31_t)0xcfbb4500, (q31_t)0x69fd14f6, (q31_t)0xcfb3057d,
+    (q31_t)0x69f3984c, (q31_t)0xcfaac7d8, (q31_t)0x69ea1a03, (q31_t)0xcfa28c10,
+    (q31_t)0x69e09a1c, (q31_t)0xcf9a5225, (q31_t)0x69d71899, (q31_t)0xcf921a17,
+    (q31_t)0x69cd9578, (q31_t)0xcf89e3e8, (q31_t)0x69c410ba, (q31_t)0xcf81af97,
+    (q31_t)0x69ba8a61, (q31_t)0xcf797d24, (q31_t)0x69b1026c, (q31_t)0xcf714c91,
+    (q31_t)0x69a778db, (q31_t)0xcf691ddd, (q31_t)0x699dedaf, (q31_t)0xcf60f108,
+    (q31_t)0x699460e8, (q31_t)0xcf58c613, (q31_t)0x698ad287, (q31_t)0xcf509cfe,
+    (q31_t)0x6981428c, (q31_t)0xcf4875ca, (q31_t)0x6977b0f7, (q31_t)0xcf405077,
+    (q31_t)0x696e1dc9, (q31_t)0xcf382d05, (q31_t)0x69648902, (q31_t)0xcf300b74,
+    (q31_t)0x695af2a3, (q31_t)0xcf27ebc5, (q31_t)0x69515aab, (q31_t)0xcf1fcdf8,
+    (q31_t)0x6947c11c, (q31_t)0xcf17b20d, (q31_t)0x693e25f5, (q31_t)0xcf0f9805,
+    (q31_t)0x69348937, (q31_t)0xcf077fe1, (q31_t)0x692aeae3, (q31_t)0xceff699f,
+    (q31_t)0x69214af8, (q31_t)0xcef75541, (q31_t)0x6917a977, (q31_t)0xceef42c7,
+    (q31_t)0x690e0661, (q31_t)0xcee73231, (q31_t)0x690461b5, (q31_t)0xcedf2380,
+    (q31_t)0x68fabb75, (q31_t)0xced716b4, (q31_t)0x68f113a0, (q31_t)0xcecf0bcd,
+    (q31_t)0x68e76a37, (q31_t)0xcec702cb, (q31_t)0x68ddbf3b, (q31_t)0xcebefbb0,
+    (q31_t)0x68d412ab, (q31_t)0xceb6f67a, (q31_t)0x68ca6488, (q31_t)0xceaef32b,
+    (q31_t)0x68c0b4d2, (q31_t)0xcea6f1c2, (q31_t)0x68b7038b, (q31_t)0xce9ef241,
+    (q31_t)0x68ad50b1, (q31_t)0xce96f4a7, (q31_t)0x68a39c46, (q31_t)0xce8ef8f4,
+    (q31_t)0x6899e64a, (q31_t)0xce86ff2a, (q31_t)0x68902ebd, (q31_t)0xce7f0748,
+    (q31_t)0x688675a0, (q31_t)0xce77114e, (q31_t)0x687cbaf3, (q31_t)0xce6f1d3d,
+    (q31_t)0x6872feb6, (q31_t)0xce672b16, (q31_t)0x686940ea, (q31_t)0xce5f3ad8,
+    (q31_t)0x685f8190, (q31_t)0xce574c84, (q31_t)0x6855c0a6, (q31_t)0xce4f6019,
+    (q31_t)0x684bfe2f, (q31_t)0xce47759a, (q31_t)0x68423a2a, (q31_t)0xce3f8d05,
+    (q31_t)0x68387498, (q31_t)0xce37a65b, (q31_t)0x682ead78, (q31_t)0xce2fc19c,
+    (q31_t)0x6824e4cc, (q31_t)0xce27dec9, (q31_t)0x681b1a94, (q31_t)0xce1ffde2,
+    (q31_t)0x68114ed0, (q31_t)0xce181ee8, (q31_t)0x68078181, (q31_t)0xce1041d9,
+    (q31_t)0x67fdb2a7, (q31_t)0xce0866b8, (q31_t)0x67f3e241, (q31_t)0xce008d84,
+    (q31_t)0x67ea1052, (q31_t)0xcdf8b63d, (q31_t)0x67e03cd8, (q31_t)0xcdf0e0e4,
+    (q31_t)0x67d667d5, (q31_t)0xcde90d79, (q31_t)0x67cc9149, (q31_t)0xcde13bfd,
+    (q31_t)0x67c2b934, (q31_t)0xcdd96c6f, (q31_t)0x67b8df97, (q31_t)0xcdd19ed0,
+    (q31_t)0x67af0472, (q31_t)0xcdc9d320, (q31_t)0x67a527c4, (q31_t)0xcdc20960,
+    (q31_t)0x679b4990, (q31_t)0xcdba4190, (q31_t)0x679169d5, (q31_t)0xcdb27bb0,
+    (q31_t)0x67878893, (q31_t)0xcdaab7c0, (q31_t)0x677da5cb, (q31_t)0xcda2f5c2,
+    (q31_t)0x6773c17d, (q31_t)0xcd9b35b4, (q31_t)0x6769dbaa, (q31_t)0xcd937798,
+    (q31_t)0x675ff452, (q31_t)0xcd8bbb6d, (q31_t)0x67560b76, (q31_t)0xcd840134,
+    (q31_t)0x674c2115, (q31_t)0xcd7c48ee, (q31_t)0x67423530, (q31_t)0xcd74929a,
+    (q31_t)0x673847c8, (q31_t)0xcd6cde39, (q31_t)0x672e58dc, (q31_t)0xcd652bcb,
+    (q31_t)0x6724686e, (q31_t)0xcd5d7b50, (q31_t)0x671a767e, (q31_t)0xcd55ccca,
+    (q31_t)0x6710830c, (q31_t)0xcd4e2037, (q31_t)0x67068e18, (q31_t)0xcd467599,
+    (q31_t)0x66fc97a3, (q31_t)0xcd3eccef, (q31_t)0x66f29fad, (q31_t)0xcd37263a,
+    (q31_t)0x66e8a637, (q31_t)0xcd2f817b, (q31_t)0x66deab41, (q31_t)0xcd27deb0,
+    (q31_t)0x66d4aecb, (q31_t)0xcd203ddc, (q31_t)0x66cab0d6, (q31_t)0xcd189efe,
+    (q31_t)0x66c0b162, (q31_t)0xcd110216, (q31_t)0x66b6b070, (q31_t)0xcd096725,
+    (q31_t)0x66acadff, (q31_t)0xcd01ce2b, (q31_t)0x66a2aa11, (q31_t)0xccfa3729,
+    (q31_t)0x6698a4a6, (q31_t)0xccf2a21d, (q31_t)0x668e9dbd, (q31_t)0xcceb0f0a,
+    (q31_t)0x66849558, (q31_t)0xcce37def, (q31_t)0x667a8b77, (q31_t)0xccdbeecc,
+    (q31_t)0x6670801a, (q31_t)0xccd461a2, (q31_t)0x66667342, (q31_t)0xccccd671,
+    (q31_t)0x665c64ef, (q31_t)0xccc54d3a, (q31_t)0x66525521, (q31_t)0xccbdc5fc,
+    (q31_t)0x664843d9, (q31_t)0xccb640b8, (q31_t)0x663e3117, (q31_t)0xccaebd6e,
+    (q31_t)0x66341cdb, (q31_t)0xcca73c1e, (q31_t)0x662a0727, (q31_t)0xcc9fbcca,
+    (q31_t)0x661feffa, (q31_t)0xcc983f70, (q31_t)0x6615d754, (q31_t)0xcc90c412,
+    (q31_t)0x660bbd37, (q31_t)0xcc894aaf, (q31_t)0x6601a1a2, (q31_t)0xcc81d349,
+    (q31_t)0x65f78497, (q31_t)0xcc7a5dde, (q31_t)0x65ed6614, (q31_t)0xcc72ea70,
+    (q31_t)0x65e3461b, (q31_t)0xcc6b78ff, (q31_t)0x65d924ac, (q31_t)0xcc64098b,
+    (q31_t)0x65cf01c8, (q31_t)0xcc5c9c14, (q31_t)0x65c4dd6e, (q31_t)0xcc55309b,
+    (q31_t)0x65bab7a0, (q31_t)0xcc4dc720, (q31_t)0x65b0905d, (q31_t)0xcc465fa3,
+    (q31_t)0x65a667a7, (q31_t)0xcc3efa25, (q31_t)0x659c3d7c, (q31_t)0xcc3796a5,
+    (q31_t)0x659211df, (q31_t)0xcc303524, (q31_t)0x6587e4cf, (q31_t)0xcc28d5a3,
+    (q31_t)0x657db64c, (q31_t)0xcc217822, (q31_t)0x65738657, (q31_t)0xcc1a1ca0,
+    (q31_t)0x656954f1, (q31_t)0xcc12c31f, (q31_t)0x655f2219, (q31_t)0xcc0b6b9e,
+    (q31_t)0x6554edd1, (q31_t)0xcc04161e, (q31_t)0x654ab818, (q31_t)0xcbfcc29f,
+    (q31_t)0x654080ef, (q31_t)0xcbf57121, (q31_t)0x65364857, (q31_t)0xcbee21a5,
+    (q31_t)0x652c0e4f, (q31_t)0xcbe6d42b, (q31_t)0x6521d2d8, (q31_t)0xcbdf88b3,
+    (q31_t)0x651795f3, (q31_t)0xcbd83f3d, (q31_t)0x650d57a0, (q31_t)0xcbd0f7ca,
+    (q31_t)0x650317df, (q31_t)0xcbc9b25a, (q31_t)0x64f8d6b0, (q31_t)0xcbc26eee,
+    (q31_t)0x64ee9415, (q31_t)0xcbbb2d85, (q31_t)0x64e4500e, (q31_t)0xcbb3ee20,
+    (q31_t)0x64da0a9a, (q31_t)0xcbacb0bf, (q31_t)0x64cfc3ba, (q31_t)0xcba57563,
+    (q31_t)0x64c57b6f, (q31_t)0xcb9e3c0b, (q31_t)0x64bb31ba, (q31_t)0xcb9704b9,
+    (q31_t)0x64b0e699, (q31_t)0xcb8fcf6b, (q31_t)0x64a69a0f, (q31_t)0xcb889c23,
+    (q31_t)0x649c4c1b, (q31_t)0xcb816ae1, (q31_t)0x6491fcbe, (q31_t)0xcb7a3ba5,
+    (q31_t)0x6487abf7, (q31_t)0xcb730e70, (q31_t)0x647d59c8, (q31_t)0xcb6be341,
+    (q31_t)0x64730631, (q31_t)0xcb64ba19, (q31_t)0x6468b132, (q31_t)0xcb5d92f8,
+    (q31_t)0x645e5acc, (q31_t)0xcb566ddf, (q31_t)0x645402ff, (q31_t)0xcb4f4acd,
+    (q31_t)0x6449a9cc, (q31_t)0xcb4829c4, (q31_t)0x643f4f32, (q31_t)0xcb410ac3,
+    (q31_t)0x6434f332, (q31_t)0xcb39edca, (q31_t)0x642a95ce, (q31_t)0xcb32d2da,
+    (q31_t)0x64203704, (q31_t)0xcb2bb9f4, (q31_t)0x6415d6d5, (q31_t)0xcb24a316,
+    (q31_t)0x640b7543, (q31_t)0xcb1d8e43, (q31_t)0x6401124d, (q31_t)0xcb167b79,
+    (q31_t)0x63f6adf3, (q31_t)0xcb0f6aba, (q31_t)0x63ec4837, (q31_t)0xcb085c05,
+    (q31_t)0x63e1e117, (q31_t)0xcb014f5b, (q31_t)0x63d77896, (q31_t)0xcafa44bc,
+    (q31_t)0x63cd0eb3, (q31_t)0xcaf33c28, (q31_t)0x63c2a36f, (q31_t)0xcaec35a0,
+    (q31_t)0x63b836ca, (q31_t)0xcae53123, (q31_t)0x63adc8c4, (q31_t)0xcade2eb3,
+    (q31_t)0x63a3595e, (q31_t)0xcad72e4f, (q31_t)0x6398e898, (q31_t)0xcad02ff8,
+    (q31_t)0x638e7673, (q31_t)0xcac933ae, (q31_t)0x638402ef, (q31_t)0xcac23971,
+    (q31_t)0x63798e0d, (q31_t)0xcabb4141, (q31_t)0x636f17cc, (q31_t)0xcab44b1f,
+    (q31_t)0x6364a02e, (q31_t)0xcaad570c, (q31_t)0x635a2733, (q31_t)0xcaa66506,
+    (q31_t)0x634facda, (q31_t)0xca9f750f, (q31_t)0x63453125, (q31_t)0xca988727,
+    (q31_t)0x633ab414, (q31_t)0xca919b4e, (q31_t)0x633035a7, (q31_t)0xca8ab184,
+    (q31_t)0x6325b5df, (q31_t)0xca83c9ca, (q31_t)0x631b34bc, (q31_t)0xca7ce420,
+    (q31_t)0x6310b23e, (q31_t)0xca760086, (q31_t)0x63062e67, (q31_t)0xca6f1efc,
+    (q31_t)0x62fba936, (q31_t)0xca683f83, (q31_t)0x62f122ab, (q31_t)0xca61621b,
+    (q31_t)0x62e69ac8, (q31_t)0xca5a86c4, (q31_t)0x62dc118c, (q31_t)0xca53ad7e,
+    (q31_t)0x62d186f8, (q31_t)0xca4cd64b, (q31_t)0x62c6fb0c, (q31_t)0xca460129,
+    (q31_t)0x62bc6dca, (q31_t)0xca3f2e19, (q31_t)0x62b1df30, (q31_t)0xca385d1d,
+    (q31_t)0x62a74f40, (q31_t)0xca318e32, (q31_t)0x629cbdfa, (q31_t)0xca2ac15b,
+    (q31_t)0x62922b5e, (q31_t)0xca23f698, (q31_t)0x6287976e, (q31_t)0xca1d2de7,
+    (q31_t)0x627d0228, (q31_t)0xca16674b, (q31_t)0x62726b8e, (q31_t)0xca0fa2c3,
+    (q31_t)0x6267d3a0, (q31_t)0xca08e04f, (q31_t)0x625d3a5e, (q31_t)0xca021fef,
+    (q31_t)0x62529fca, (q31_t)0xc9fb61a5, (q31_t)0x624803e2, (q31_t)0xc9f4a570,
+    (q31_t)0x623d66a8, (q31_t)0xc9edeb50, (q31_t)0x6232c81c, (q31_t)0xc9e73346,
+    (q31_t)0x6228283f, (q31_t)0xc9e07d51, (q31_t)0x621d8711, (q31_t)0xc9d9c973,
+    (q31_t)0x6212e492, (q31_t)0xc9d317ab, (q31_t)0x620840c2, (q31_t)0xc9cc67fa,
+    (q31_t)0x61fd9ba3, (q31_t)0xc9c5ba60, (q31_t)0x61f2f534, (q31_t)0xc9bf0edd,
+    (q31_t)0x61e84d76, (q31_t)0xc9b86572, (q31_t)0x61dda46a, (q31_t)0xc9b1be1e,
+    (q31_t)0x61d2fa0f, (q31_t)0xc9ab18e3, (q31_t)0x61c84e67, (q31_t)0xc9a475bf,
+    (q31_t)0x61bda171, (q31_t)0xc99dd4b4, (q31_t)0x61b2f32e, (q31_t)0xc99735c2,
+    (q31_t)0x61a8439e, (q31_t)0xc99098e9, (q31_t)0x619d92c2, (q31_t)0xc989fe29,
+    (q31_t)0x6192e09b, (q31_t)0xc9836582, (q31_t)0x61882d28, (q31_t)0xc97ccef5,
+    (q31_t)0x617d786a, (q31_t)0xc9763a83, (q31_t)0x6172c262, (q31_t)0xc96fa82a,
+    (q31_t)0x61680b0f, (q31_t)0xc96917ec, (q31_t)0x615d5273, (q31_t)0xc96289c9,
+    (q31_t)0x6152988d, (q31_t)0xc95bfdc1, (q31_t)0x6147dd5f, (q31_t)0xc95573d4,
+    (q31_t)0x613d20e8, (q31_t)0xc94eec03, (q31_t)0x61326329, (q31_t)0xc948664d,
+    (q31_t)0x6127a423, (q31_t)0xc941e2b4, (q31_t)0x611ce3d5, (q31_t)0xc93b6137,
+    (q31_t)0x61122240, (q31_t)0xc934e1d6, (q31_t)0x61075f65, (q31_t)0xc92e6492,
+    (q31_t)0x60fc9b44, (q31_t)0xc927e96b, (q31_t)0x60f1d5de, (q31_t)0xc9217062,
+    (q31_t)0x60e70f32, (q31_t)0xc91af976, (q31_t)0x60dc4742, (q31_t)0xc91484a8,
+    (q31_t)0x60d17e0d, (q31_t)0xc90e11f7, (q31_t)0x60c6b395, (q31_t)0xc907a166,
+    (q31_t)0x60bbe7d8, (q31_t)0xc90132f2, (q31_t)0x60b11ad9, (q31_t)0xc8fac69e,
+    (q31_t)0x60a64c97, (q31_t)0xc8f45c68, (q31_t)0x609b7d13, (q31_t)0xc8edf452,
+    (q31_t)0x6090ac4d, (q31_t)0xc8e78e5b, (q31_t)0x6085da46, (q31_t)0xc8e12a84,
+    (q31_t)0x607b06fe, (q31_t)0xc8dac8cd, (q31_t)0x60703275, (q31_t)0xc8d46936,
+    (q31_t)0x60655cac, (q31_t)0xc8ce0bc0, (q31_t)0x605a85a3, (q31_t)0xc8c7b06b,
+    (q31_t)0x604fad5b, (q31_t)0xc8c15736, (q31_t)0x6044d3d4, (q31_t)0xc8bb0023,
+    (q31_t)0x6039f90f, (q31_t)0xc8b4ab32, (q31_t)0x602f1d0b, (q31_t)0xc8ae5862,
+    (q31_t)0x60243fca, (q31_t)0xc8a807b4, (q31_t)0x6019614c, (q31_t)0xc8a1b928,
+    (q31_t)0x600e8190, (q31_t)0xc89b6cbf, (q31_t)0x6003a099, (q31_t)0xc8952278,
+    (q31_t)0x5ff8be65, (q31_t)0xc88eda54, (q31_t)0x5feddaf6, (q31_t)0xc8889454,
+    (q31_t)0x5fe2f64c, (q31_t)0xc8825077, (q31_t)0x5fd81067, (q31_t)0xc87c0ebd,
+    (q31_t)0x5fcd2948, (q31_t)0xc875cf28, (q31_t)0x5fc240ef, (q31_t)0xc86f91b7,
+    (q31_t)0x5fb7575c, (q31_t)0xc869566a, (q31_t)0x5fac6c91, (q31_t)0xc8631d42,
+    (q31_t)0x5fa1808c, (q31_t)0xc85ce63e, (q31_t)0x5f969350, (q31_t)0xc856b160,
+    (q31_t)0x5f8ba4dc, (q31_t)0xc8507ea7, (q31_t)0x5f80b531, (q31_t)0xc84a4e14,
+    (q31_t)0x5f75c44e, (q31_t)0xc8441fa6, (q31_t)0x5f6ad235, (q31_t)0xc83df35f,
+    (q31_t)0x5f5fdee6, (q31_t)0xc837c93e, (q31_t)0x5f54ea62, (q31_t)0xc831a143,
+    (q31_t)0x5f49f4a8, (q31_t)0xc82b7b70, (q31_t)0x5f3efdb9, (q31_t)0xc82557c3,
+    (q31_t)0x5f340596, (q31_t)0xc81f363d, (q31_t)0x5f290c3f, (q31_t)0xc81916df,
+    (q31_t)0x5f1e11b5, (q31_t)0xc812f9a9, (q31_t)0x5f1315f7, (q31_t)0xc80cde9b,
+    (q31_t)0x5f081907, (q31_t)0xc806c5b5, (q31_t)0x5efd1ae4, (q31_t)0xc800aef7,
+    (q31_t)0x5ef21b90, (q31_t)0xc7fa9a62, (q31_t)0x5ee71b0a, (q31_t)0xc7f487f6,
+    (q31_t)0x5edc1953, (q31_t)0xc7ee77b3, (q31_t)0x5ed1166b, (q31_t)0xc7e8699a,
+    (q31_t)0x5ec61254, (q31_t)0xc7e25daa, (q31_t)0x5ebb0d0d, (q31_t)0xc7dc53e3,
+    (q31_t)0x5eb00696, (q31_t)0xc7d64c47, (q31_t)0x5ea4fef0, (q31_t)0xc7d046d6,
+    (q31_t)0x5e99f61d, (q31_t)0xc7ca438f, (q31_t)0x5e8eec1b, (q31_t)0xc7c44272,
+    (q31_t)0x5e83e0eb, (q31_t)0xc7be4381, (q31_t)0x5e78d48e, (q31_t)0xc7b846ba,
+    (q31_t)0x5e6dc705, (q31_t)0xc7b24c20, (q31_t)0x5e62b84f, (q31_t)0xc7ac53b1,
+    (q31_t)0x5e57a86d, (q31_t)0xc7a65d6e, (q31_t)0x5e4c9760, (q31_t)0xc7a06957,
+    (q31_t)0x5e418528, (q31_t)0xc79a776c, (q31_t)0x5e3671c5, (q31_t)0xc79487ae,
+    (q31_t)0x5e2b5d38, (q31_t)0xc78e9a1d, (q31_t)0x5e204781, (q31_t)0xc788aeb9,
+    (q31_t)0x5e1530a1, (q31_t)0xc782c582, (q31_t)0x5e0a1898, (q31_t)0xc77cde79,
+    (q31_t)0x5dfeff67, (q31_t)0xc776f99d, (q31_t)0x5df3e50d, (q31_t)0xc77116f0,
+    (q31_t)0x5de8c98c, (q31_t)0xc76b3671, (q31_t)0x5dddace4, (q31_t)0xc7655820,
+    (q31_t)0x5dd28f15, (q31_t)0xc75f7bfe, (q31_t)0x5dc7701f, (q31_t)0xc759a20a,
+    (q31_t)0x5dbc5004, (q31_t)0xc753ca46, (q31_t)0x5db12ec3, (q31_t)0xc74df4b1,
+    (q31_t)0x5da60c5d, (q31_t)0xc748214c, (q31_t)0x5d9ae8d2, (q31_t)0xc7425016,
+    (q31_t)0x5d8fc424, (q31_t)0xc73c8111, (q31_t)0x5d849e51, (q31_t)0xc736b43c,
+    (q31_t)0x5d79775c, (q31_t)0xc730e997, (q31_t)0x5d6e4f43, (q31_t)0xc72b2123,
+    (q31_t)0x5d632608, (q31_t)0xc7255ae0, (q31_t)0x5d57fbaa, (q31_t)0xc71f96ce,
+    (q31_t)0x5d4cd02c, (q31_t)0xc719d4ed, (q31_t)0x5d41a38c, (q31_t)0xc714153e,
+    (q31_t)0x5d3675cb, (q31_t)0xc70e57c0, (q31_t)0x5d2b46ea, (q31_t)0xc7089c75,
+    (q31_t)0x5d2016e9, (q31_t)0xc702e35c, (q31_t)0x5d14e5c9, (q31_t)0xc6fd2c75,
+    (q31_t)0x5d09b389, (q31_t)0xc6f777c1, (q31_t)0x5cfe802b, (q31_t)0xc6f1c540,
+    (q31_t)0x5cf34baf, (q31_t)0xc6ec14f2, (q31_t)0x5ce81615, (q31_t)0xc6e666d7,
+    (q31_t)0x5cdcdf5e, (q31_t)0xc6e0baf0, (q31_t)0x5cd1a78a, (q31_t)0xc6db113d,
+    (q31_t)0x5cc66e99, (q31_t)0xc6d569be, (q31_t)0x5cbb348d, (q31_t)0xc6cfc472,
+    (q31_t)0x5caff965, (q31_t)0xc6ca215c, (q31_t)0x5ca4bd21, (q31_t)0xc6c4807a,
+    (q31_t)0x5c997fc4, (q31_t)0xc6bee1cd, (q31_t)0x5c8e414b, (q31_t)0xc6b94554,
+    (q31_t)0x5c8301b9, (q31_t)0xc6b3ab12, (q31_t)0x5c77c10e, (q31_t)0xc6ae1304,
+    (q31_t)0x5c6c7f4a, (q31_t)0xc6a87d2d, (q31_t)0x5c613c6d, (q31_t)0xc6a2e98b,
+    (q31_t)0x5c55f878, (q31_t)0xc69d5820, (q31_t)0x5c4ab36b, (q31_t)0xc697c8eb,
+    (q31_t)0x5c3f6d47, (q31_t)0xc6923bec, (q31_t)0x5c34260c, (q31_t)0xc68cb124,
+    (q31_t)0x5c28ddbb, (q31_t)0xc6872894, (q31_t)0x5c1d9454, (q31_t)0xc681a23a,
+    (q31_t)0x5c1249d8, (q31_t)0xc67c1e18, (q31_t)0x5c06fe46, (q31_t)0xc6769c2e,
+    (q31_t)0x5bfbb1a0, (q31_t)0xc6711c7b, (q31_t)0x5bf063e6, (q31_t)0xc66b9f01,
+    (q31_t)0x5be51518, (q31_t)0xc66623be, (q31_t)0x5bd9c537, (q31_t)0xc660aab5,
+    (q31_t)0x5bce7442, (q31_t)0xc65b33e4, (q31_t)0x5bc3223c, (q31_t)0xc655bf4c,
+    (q31_t)0x5bb7cf23, (q31_t)0xc6504ced, (q31_t)0x5bac7af9, (q31_t)0xc64adcc7,
+    (q31_t)0x5ba125bd, (q31_t)0xc6456edb, (q31_t)0x5b95cf71, (q31_t)0xc6400329,
+    (q31_t)0x5b8a7815, (q31_t)0xc63a99b1, (q31_t)0x5b7f1fa9, (q31_t)0xc6353273,
+    (q31_t)0x5b73c62d, (q31_t)0xc62fcd6f, (q31_t)0x5b686ba3, (q31_t)0xc62a6aa6,
+    (q31_t)0x5b5d100a, (q31_t)0xc6250a18, (q31_t)0x5b51b363, (q31_t)0xc61fabc4,
+    (q31_t)0x5b4655ae, (q31_t)0xc61a4fac, (q31_t)0x5b3af6ec, (q31_t)0xc614f5cf,
+    (q31_t)0x5b2f971e, (q31_t)0xc60f9e2e, (q31_t)0x5b243643, (q31_t)0xc60a48c9,
+    (q31_t)0x5b18d45c, (q31_t)0xc604f5a0, (q31_t)0x5b0d716a, (q31_t)0xc5ffa4b3,
+    (q31_t)0x5b020d6c, (q31_t)0xc5fa5603, (q31_t)0x5af6a865, (q31_t)0xc5f5098f,
+    (q31_t)0x5aeb4253, (q31_t)0xc5efbf58, (q31_t)0x5adfdb37, (q31_t)0xc5ea775e,
+    (q31_t)0x5ad47312, (q31_t)0xc5e531a1, (q31_t)0x5ac909e5, (q31_t)0xc5dfee22,
+    (q31_t)0x5abd9faf, (q31_t)0xc5daace1, (q31_t)0x5ab23471, (q31_t)0xc5d56ddd,
+    (q31_t)0x5aa6c82b, (q31_t)0xc5d03118, (q31_t)0x5a9b5adf, (q31_t)0xc5caf690,
+    (q31_t)0x5a8fec8c, (q31_t)0xc5c5be47, (q31_t)0x5a847d33, (q31_t)0xc5c0883d,
+    (q31_t)0x5a790cd4, (q31_t)0xc5bb5472, (q31_t)0x5a6d9b70, (q31_t)0xc5b622e6,
+    (q31_t)0x5a622907, (q31_t)0xc5b0f399, (q31_t)0x5a56b599, (q31_t)0xc5abc68c,
+    (q31_t)0x5a4b4128, (q31_t)0xc5a69bbe, (q31_t)0x5a3fcbb3, (q31_t)0xc5a17330,
+    (q31_t)0x5a34553b, (q31_t)0xc59c4ce3, (q31_t)0x5a28ddc0, (q31_t)0xc59728d5,
+    (q31_t)0x5a1d6544, (q31_t)0xc5920708, (q31_t)0x5a11ebc5, (q31_t)0xc58ce77c,
+    (q31_t)0x5a067145, (q31_t)0xc587ca31, (q31_t)0x59faf5c5, (q31_t)0xc582af26,
+    (q31_t)0x59ef7944, (q31_t)0xc57d965d, (q31_t)0x59e3fbc3, (q31_t)0xc5787fd6,
+    (q31_t)0x59d87d42, (q31_t)0xc5736b90, (q31_t)0x59ccfdc2, (q31_t)0xc56e598c,
+    (q31_t)0x59c17d44, (q31_t)0xc56949ca, (q31_t)0x59b5fbc8, (q31_t)0xc5643c4a,
+    (q31_t)0x59aa794d, (q31_t)0xc55f310d, (q31_t)0x599ef5d6, (q31_t)0xc55a2812,
+    (q31_t)0x59937161, (q31_t)0xc555215a, (q31_t)0x5987ebf0, (q31_t)0xc5501ce5,
+    (q31_t)0x597c6584, (q31_t)0xc54b1ab4, (q31_t)0x5970de1b, (q31_t)0xc5461ac6,
+    (q31_t)0x596555b8, (q31_t)0xc5411d1b, (q31_t)0x5959cc5a, (q31_t)0xc53c21b4,
+    (q31_t)0x594e4201, (q31_t)0xc5372891, (q31_t)0x5942b6af, (q31_t)0xc53231b3,
+    (q31_t)0x59372a64, (q31_t)0xc52d3d18, (q31_t)0x592b9d1f, (q31_t)0xc5284ac3,
+    (q31_t)0x59200ee3, (q31_t)0xc5235ab2, (q31_t)0x59147fae, (q31_t)0xc51e6ce6,
+    (q31_t)0x5908ef82, (q31_t)0xc519815f, (q31_t)0x58fd5e5f, (q31_t)0xc514981d,
+    (q31_t)0x58f1cc45, (q31_t)0xc50fb121, (q31_t)0x58e63935, (q31_t)0xc50acc6b,
+    (q31_t)0x58daa52f, (q31_t)0xc505e9fb, (q31_t)0x58cf1034, (q31_t)0xc50109d0,
+    (q31_t)0x58c37a44, (q31_t)0xc4fc2bec, (q31_t)0x58b7e35f, (q31_t)0xc4f7504e,
+    (q31_t)0x58ac4b87, (q31_t)0xc4f276f7, (q31_t)0x58a0b2bb, (q31_t)0xc4ed9fe7,
+    (q31_t)0x589518fc, (q31_t)0xc4e8cb1e, (q31_t)0x58897e4a, (q31_t)0xc4e3f89c,
+    (q31_t)0x587de2a7, (q31_t)0xc4df2862, (q31_t)0x58724611, (q31_t)0xc4da5a6f,
+    (q31_t)0x5866a88a, (q31_t)0xc4d58ec3, (q31_t)0x585b0a13, (q31_t)0xc4d0c560,
+    (q31_t)0x584f6aab, (q31_t)0xc4cbfe45, (q31_t)0x5843ca53, (q31_t)0xc4c73972,
+    (q31_t)0x5838290c, (q31_t)0xc4c276e8, (q31_t)0x582c86d5, (q31_t)0xc4bdb6a6,
+    (q31_t)0x5820e3b0, (q31_t)0xc4b8f8ad, (q31_t)0x58153f9d, (q31_t)0xc4b43cfd,
+    (q31_t)0x58099a9c, (q31_t)0xc4af8397, (q31_t)0x57fdf4ae, (q31_t)0xc4aacc7a,
+    (q31_t)0x57f24dd3, (q31_t)0xc4a617a6, (q31_t)0x57e6a60c, (q31_t)0xc4a1651c,
+    (q31_t)0x57dafd59, (q31_t)0xc49cb4dd, (q31_t)0x57cf53bb, (q31_t)0xc49806e7,
+    (q31_t)0x57c3a931, (q31_t)0xc4935b3c, (q31_t)0x57b7fdbd, (q31_t)0xc48eb1db,
+    (q31_t)0x57ac515f, (q31_t)0xc48a0ac4, (q31_t)0x57a0a417, (q31_t)0xc48565f9,
+    (q31_t)0x5794f5e6, (q31_t)0xc480c379, (q31_t)0x578946cc, (q31_t)0xc47c2344,
+    (q31_t)0x577d96ca, (q31_t)0xc477855a, (q31_t)0x5771e5e0, (q31_t)0xc472e9bc,
+    (q31_t)0x5766340f, (q31_t)0xc46e5069, (q31_t)0x575a8157, (q31_t)0xc469b963,
+    (q31_t)0x574ecdb8, (q31_t)0xc46524a9, (q31_t)0x57431933, (q31_t)0xc460923b,
+    (q31_t)0x573763c9, (q31_t)0xc45c0219, (q31_t)0x572bad7a, (q31_t)0xc4577444,
+    (q31_t)0x571ff646, (q31_t)0xc452e8bc, (q31_t)0x57143e2d, (q31_t)0xc44e5f80,
+    (q31_t)0x57088531, (q31_t)0xc449d892, (q31_t)0x56fccb51, (q31_t)0xc44553f2,
+    (q31_t)0x56f1108f, (q31_t)0xc440d19e, (q31_t)0x56e554ea, (q31_t)0xc43c5199,
+    (q31_t)0x56d99864, (q31_t)0xc437d3e1, (q31_t)0x56cddafb, (q31_t)0xc4335877,
+    (q31_t)0x56c21cb2, (q31_t)0xc42edf5c, (q31_t)0x56b65d88, (q31_t)0xc42a688f,
+    (q31_t)0x56aa9d7e, (q31_t)0xc425f410, (q31_t)0x569edc94, (q31_t)0xc42181e0,
+    (q31_t)0x56931acb, (q31_t)0xc41d11ff, (q31_t)0x56875823, (q31_t)0xc418a46d,
+    (q31_t)0x567b949d, (q31_t)0xc414392b, (q31_t)0x566fd039, (q31_t)0xc40fd037,
+    (q31_t)0x56640af7, (q31_t)0xc40b6994, (q31_t)0x565844d8, (q31_t)0xc4070540,
+    (q31_t)0x564c7ddd, (q31_t)0xc402a33c, (q31_t)0x5640b606, (q31_t)0xc3fe4388,
+    (q31_t)0x5634ed53, (q31_t)0xc3f9e624, (q31_t)0x562923c5, (q31_t)0xc3f58b10,
+    (q31_t)0x561d595d, (q31_t)0xc3f1324e, (q31_t)0x56118e1a, (q31_t)0xc3ecdbdc,
+    (q31_t)0x5605c1fd, (q31_t)0xc3e887bb, (q31_t)0x55f9f507, (q31_t)0xc3e435ea,
+    (q31_t)0x55ee2738, (q31_t)0xc3dfe66c, (q31_t)0x55e25890, (q31_t)0xc3db993e,
+    (q31_t)0x55d68911, (q31_t)0xc3d74e62, (q31_t)0x55cab8ba, (q31_t)0xc3d305d8,
+    (q31_t)0x55bee78c, (q31_t)0xc3cebfa0, (q31_t)0x55b31587, (q31_t)0xc3ca7bba,
+    (q31_t)0x55a742ac, (q31_t)0xc3c63a26, (q31_t)0x559b6efb, (q31_t)0xc3c1fae5,
+    (q31_t)0x558f9a76, (q31_t)0xc3bdbdf6, (q31_t)0x5583c51b, (q31_t)0xc3b9835a,
+    (q31_t)0x5577eeec, (q31_t)0xc3b54b11, (q31_t)0x556c17e9, (q31_t)0xc3b1151b,
+    (q31_t)0x55604013, (q31_t)0xc3ace178, (q31_t)0x5554676a, (q31_t)0xc3a8b028,
+    (q31_t)0x55488dee, (q31_t)0xc3a4812c, (q31_t)0x553cb3a0, (q31_t)0xc3a05484,
+    (q31_t)0x5530d881, (q31_t)0xc39c2a2f, (q31_t)0x5524fc90, (q31_t)0xc398022f,
+    (q31_t)0x55191fcf, (q31_t)0xc393dc82, (q31_t)0x550d423d, (q31_t)0xc38fb92a,
+    (q31_t)0x550163dc, (q31_t)0xc38b9827, (q31_t)0x54f584ac, (q31_t)0xc3877978,
+    (q31_t)0x54e9a4ac, (q31_t)0xc3835d1e, (q31_t)0x54ddc3de, (q31_t)0xc37f4319,
+    (q31_t)0x54d1e242, (q31_t)0xc37b2b6a, (q31_t)0x54c5ffd9, (q31_t)0xc377160f,
+    (q31_t)0x54ba1ca3, (q31_t)0xc373030a, (q31_t)0x54ae38a0, (q31_t)0xc36ef25b,
+    (q31_t)0x54a253d1, (q31_t)0xc36ae401, (q31_t)0x54966e36, (q31_t)0xc366d7fd,
+    (q31_t)0x548a87d1, (q31_t)0xc362ce50, (q31_t)0x547ea0a0, (q31_t)0xc35ec6f8,
+    (q31_t)0x5472b8a5, (q31_t)0xc35ac1f7, (q31_t)0x5466cfe1, (q31_t)0xc356bf4d,
+    (q31_t)0x545ae653, (q31_t)0xc352bef9, (q31_t)0x544efbfc, (q31_t)0xc34ec0fc,
+    (q31_t)0x544310dd, (q31_t)0xc34ac556, (q31_t)0x543724f5, (q31_t)0xc346cc07,
+    (q31_t)0x542b3846, (q31_t)0xc342d510, (q31_t)0x541f4ad1, (q31_t)0xc33ee070,
+    (q31_t)0x54135c94, (q31_t)0xc33aee27, (q31_t)0x54076d91, (q31_t)0xc336fe37,
+    (q31_t)0x53fb7dc9, (q31_t)0xc333109e, (q31_t)0x53ef8d3c, (q31_t)0xc32f255e,
+    (q31_t)0x53e39be9, (q31_t)0xc32b3c75, (q31_t)0x53d7a9d3, (q31_t)0xc32755e5,
+    (q31_t)0x53cbb6f8, (q31_t)0xc32371ae, (q31_t)0x53bfc35b, (q31_t)0xc31f8fcf,
+    (q31_t)0x53b3cefa, (q31_t)0xc31bb049, (q31_t)0x53a7d9d7, (q31_t)0xc317d31c,
+    (q31_t)0x539be3f2, (q31_t)0xc313f848, (q31_t)0x538fed4b, (q31_t)0xc3101fce,
+    (q31_t)0x5383f5e3, (q31_t)0xc30c49ad, (q31_t)0x5377fdbb, (q31_t)0xc30875e5,
+    (q31_t)0x536c04d2, (q31_t)0xc304a477, (q31_t)0x53600b2a, (q31_t)0xc300d563,
+    (q31_t)0x535410c3, (q31_t)0xc2fd08a9, (q31_t)0x5348159d, (q31_t)0xc2f93e4a,
+    (q31_t)0x533c19b8, (q31_t)0xc2f57644, (q31_t)0x53301d16, (q31_t)0xc2f1b099,
+    (q31_t)0x53241fb6, (q31_t)0xc2eded49, (q31_t)0x5318219a, (q31_t)0xc2ea2c53,
+    (q31_t)0x530c22c1, (q31_t)0xc2e66db8, (q31_t)0x5300232c, (q31_t)0xc2e2b178,
+    (q31_t)0x52f422db, (q31_t)0xc2def794, (q31_t)0x52e821cf, (q31_t)0xc2db400a,
+    (q31_t)0x52dc2009, (q31_t)0xc2d78add, (q31_t)0x52d01d89, (q31_t)0xc2d3d80a,
+    (q31_t)0x52c41a4f, (q31_t)0xc2d02794, (q31_t)0x52b8165b, (q31_t)0xc2cc7979,
+    (q31_t)0x52ac11af, (q31_t)0xc2c8cdbb, (q31_t)0x52a00c4b, (q31_t)0xc2c52459,
+    (q31_t)0x5294062f, (q31_t)0xc2c17d52, (q31_t)0x5287ff5b, (q31_t)0xc2bdd8a9,
+    (q31_t)0x527bf7d1, (q31_t)0xc2ba365c, (q31_t)0x526fef90, (q31_t)0xc2b6966c,
+    (q31_t)0x5263e699, (q31_t)0xc2b2f8d8, (q31_t)0x5257dced, (q31_t)0xc2af5da2,
+    (q31_t)0x524bd28c, (q31_t)0xc2abc4c9, (q31_t)0x523fc776, (q31_t)0xc2a82e4d,
+    (q31_t)0x5233bbac, (q31_t)0xc2a49a2e, (q31_t)0x5227af2e, (q31_t)0xc2a1086d,
+    (q31_t)0x521ba1fd, (q31_t)0xc29d790a, (q31_t)0x520f941a, (q31_t)0xc299ec05,
+    (q31_t)0x52038584, (q31_t)0xc296615d, (q31_t)0x51f7763c, (q31_t)0xc292d914,
+    (q31_t)0x51eb6643, (q31_t)0xc28f5329, (q31_t)0x51df5599, (q31_t)0xc28bcf9c,
+    (q31_t)0x51d3443f, (q31_t)0xc2884e6e, (q31_t)0x51c73235, (q31_t)0xc284cf9f,
+    (q31_t)0x51bb1f7c, (q31_t)0xc281532e, (q31_t)0x51af0c13, (q31_t)0xc27dd91c,
+    (q31_t)0x51a2f7fc, (q31_t)0xc27a616a, (q31_t)0x5196e337, (q31_t)0xc276ec16,
+    (q31_t)0x518acdc4, (q31_t)0xc2737922, (q31_t)0x517eb7a4, (q31_t)0xc270088e,
+    (q31_t)0x5172a0d7, (q31_t)0xc26c9a58, (q31_t)0x5166895f, (q31_t)0xc2692e83,
+    (q31_t)0x515a713a, (q31_t)0xc265c50e, (q31_t)0x514e586a, (q31_t)0xc2625df8,
+    (q31_t)0x51423ef0, (q31_t)0xc25ef943, (q31_t)0x513624cb, (q31_t)0xc25b96ee,
+    (q31_t)0x512a09fc, (q31_t)0xc25836f9, (q31_t)0x511dee84, (q31_t)0xc254d965,
+    (q31_t)0x5111d263, (q31_t)0xc2517e31, (q31_t)0x5105b599, (q31_t)0xc24e255e,
+    (q31_t)0x50f99827, (q31_t)0xc24aceed, (q31_t)0x50ed7a0e, (q31_t)0xc2477adc,
+    (q31_t)0x50e15b4e, (q31_t)0xc244292c, (q31_t)0x50d53be7, (q31_t)0xc240d9de,
+    (q31_t)0x50c91bda, (q31_t)0xc23d8cf1, (q31_t)0x50bcfb28, (q31_t)0xc23a4265,
+    (q31_t)0x50b0d9d0, (q31_t)0xc236fa3b, (q31_t)0x50a4b7d3, (q31_t)0xc233b473,
+    (q31_t)0x50989532, (q31_t)0xc230710d, (q31_t)0x508c71ee, (q31_t)0xc22d3009,
+    (q31_t)0x50804e06, (q31_t)0xc229f167, (q31_t)0x5074297b, (q31_t)0xc226b528,
+    (q31_t)0x5068044e, (q31_t)0xc2237b4b, (q31_t)0x505bde7f, (q31_t)0xc22043d0,
+    (q31_t)0x504fb80e, (q31_t)0xc21d0eb8, (q31_t)0x504390fd, (q31_t)0xc219dc03,
+    (q31_t)0x5037694b, (q31_t)0xc216abb1, (q31_t)0x502b40f8, (q31_t)0xc2137dc2,
+    (q31_t)0x501f1807, (q31_t)0xc2105236, (q31_t)0x5012ee76, (q31_t)0xc20d290d,
+    (q31_t)0x5006c446, (q31_t)0xc20a0248, (q31_t)0x4ffa9979, (q31_t)0xc206dde6,
+    (q31_t)0x4fee6e0d, (q31_t)0xc203bbe8, (q31_t)0x4fe24205, (q31_t)0xc2009c4e,
+    (q31_t)0x4fd6155f, (q31_t)0xc1fd7f17, (q31_t)0x4fc9e81e, (q31_t)0xc1fa6445,
+    (q31_t)0x4fbdba40, (q31_t)0xc1f74bd6, (q31_t)0x4fb18bc8, (q31_t)0xc1f435cc,
+    (q31_t)0x4fa55cb4, (q31_t)0xc1f12227, (q31_t)0x4f992d06, (q31_t)0xc1ee10e5,
+    (q31_t)0x4f8cfcbe, (q31_t)0xc1eb0209, (q31_t)0x4f80cbdc, (q31_t)0xc1e7f591,
+    (q31_t)0x4f749a61, (q31_t)0xc1e4eb7e, (q31_t)0x4f68684e, (q31_t)0xc1e1e3d0,
+    (q31_t)0x4f5c35a3, (q31_t)0xc1dede87, (q31_t)0x4f500260, (q31_t)0xc1dbdba3,
+    (q31_t)0x4f43ce86, (q31_t)0xc1d8db25, (q31_t)0x4f379a16, (q31_t)0xc1d5dd0c,
+    (q31_t)0x4f2b650f, (q31_t)0xc1d2e158, (q31_t)0x4f1f2f73, (q31_t)0xc1cfe80a,
+    (q31_t)0x4f12f941, (q31_t)0xc1ccf122, (q31_t)0x4f06c27a, (q31_t)0xc1c9fca0,
+    (q31_t)0x4efa8b20, (q31_t)0xc1c70a84, (q31_t)0x4eee5331, (q31_t)0xc1c41ace,
+    (q31_t)0x4ee21aaf, (q31_t)0xc1c12d7e, (q31_t)0x4ed5e19a, (q31_t)0xc1be4294,
+    (q31_t)0x4ec9a7f3, (q31_t)0xc1bb5a11, (q31_t)0x4ebd6db9, (q31_t)0xc1b873f5,
+    (q31_t)0x4eb132ef, (q31_t)0xc1b5903f, (q31_t)0x4ea4f793, (q31_t)0xc1b2aef0,
+    (q31_t)0x4e98bba7, (q31_t)0xc1afd007, (q31_t)0x4e8c7f2a, (q31_t)0xc1acf386,
+    (q31_t)0x4e80421e, (q31_t)0xc1aa196c, (q31_t)0x4e740483, (q31_t)0xc1a741b9,
+    (q31_t)0x4e67c65a, (q31_t)0xc1a46c6e, (q31_t)0x4e5b87a2, (q31_t)0xc1a1998a,
+    (q31_t)0x4e4f485c, (q31_t)0xc19ec90d, (q31_t)0x4e430889, (q31_t)0xc19bfaf9,
+    (q31_t)0x4e36c82a, (q31_t)0xc1992f4c, (q31_t)0x4e2a873e, (q31_t)0xc1966606,
+    (q31_t)0x4e1e45c6, (q31_t)0xc1939f29, (q31_t)0x4e1203c3, (q31_t)0xc190dab4,
+    (q31_t)0x4e05c135, (q31_t)0xc18e18a7, (q31_t)0x4df97e1d, (q31_t)0xc18b5903,
+    (q31_t)0x4ded3a7b, (q31_t)0xc1889bc6, (q31_t)0x4de0f64f, (q31_t)0xc185e0f3,
+    (q31_t)0x4dd4b19a, (q31_t)0xc1832888, (q31_t)0x4dc86c5d, (q31_t)0xc1807285,
+    (q31_t)0x4dbc2698, (q31_t)0xc17dbeec, (q31_t)0x4dafe04b, (q31_t)0xc17b0dbb,
+    (q31_t)0x4da39978, (q31_t)0xc1785ef4, (q31_t)0x4d97521d, (q31_t)0xc175b296,
+    (q31_t)0x4d8b0a3d, (q31_t)0xc17308a1, (q31_t)0x4d7ec1d6, (q31_t)0xc1706115,
+    (q31_t)0x4d7278eb, (q31_t)0xc16dbbf3, (q31_t)0x4d662f7b, (q31_t)0xc16b193a,
+    (q31_t)0x4d59e586, (q31_t)0xc16878eb, (q31_t)0x4d4d9b0e, (q31_t)0xc165db05,
+    (q31_t)0x4d415013, (q31_t)0xc1633f8a, (q31_t)0x4d350495, (q31_t)0xc160a678,
+    (q31_t)0x4d28b894, (q31_t)0xc15e0fd1, (q31_t)0x4d1c6c11, (q31_t)0xc15b7b94,
+    (q31_t)0x4d101f0e, (q31_t)0xc158e9c1, (q31_t)0x4d03d189, (q31_t)0xc1565a58,
+    (q31_t)0x4cf78383, (q31_t)0xc153cd5a, (q31_t)0x4ceb34fe, (q31_t)0xc15142c6,
+    (q31_t)0x4cdee5f9, (q31_t)0xc14eba9d, (q31_t)0x4cd29676, (q31_t)0xc14c34df,
+    (q31_t)0x4cc64673, (q31_t)0xc149b18b, (q31_t)0x4cb9f5f3, (q31_t)0xc14730a3,
+    (q31_t)0x4cada4f5, (q31_t)0xc144b225, (q31_t)0x4ca1537a, (q31_t)0xc1423613,
+    (q31_t)0x4c950182, (q31_t)0xc13fbc6c, (q31_t)0x4c88af0e, (q31_t)0xc13d4530,
+    (q31_t)0x4c7c5c1e, (q31_t)0xc13ad060, (q31_t)0x4c7008b3, (q31_t)0xc1385dfb,
+    (q31_t)0x4c63b4ce, (q31_t)0xc135ee02, (q31_t)0x4c57606e, (q31_t)0xc1338075,
+    (q31_t)0x4c4b0b94, (q31_t)0xc1311553, (q31_t)0x4c3eb641, (q31_t)0xc12eac9d,
+    (q31_t)0x4c326075, (q31_t)0xc12c4653, (q31_t)0x4c260a31, (q31_t)0xc129e276,
+    (q31_t)0x4c19b374, (q31_t)0xc1278104, (q31_t)0x4c0d5c41, (q31_t)0xc12521ff,
+    (q31_t)0x4c010496, (q31_t)0xc122c566, (q31_t)0x4bf4ac75, (q31_t)0xc1206b39,
+    (q31_t)0x4be853de, (q31_t)0xc11e1379, (q31_t)0x4bdbfad1, (q31_t)0xc11bbe26,
+    (q31_t)0x4bcfa150, (q31_t)0xc1196b3f, (q31_t)0x4bc34759, (q31_t)0xc1171ac6,
+    (q31_t)0x4bb6ecef, (q31_t)0xc114ccb9, (q31_t)0x4baa9211, (q31_t)0xc1128119,
+    (q31_t)0x4b9e36c0, (q31_t)0xc11037e6, (q31_t)0x4b91dafc, (q31_t)0xc10df120,
+    (q31_t)0x4b857ec7, (q31_t)0xc10bacc8, (q31_t)0x4b79221f, (q31_t)0xc1096add,
+    (q31_t)0x4b6cc506, (q31_t)0xc1072b5f, (q31_t)0x4b60677c, (q31_t)0xc104ee4f,
+    (q31_t)0x4b540982, (q31_t)0xc102b3ac, (q31_t)0x4b47ab19, (q31_t)0xc1007b77,
+    (q31_t)0x4b3b4c40, (q31_t)0xc0fe45b0, (q31_t)0x4b2eecf8, (q31_t)0xc0fc1257,
+    (q31_t)0x4b228d42, (q31_t)0xc0f9e16b, (q31_t)0x4b162d1d, (q31_t)0xc0f7b2ee,
+    (q31_t)0x4b09cc8c, (q31_t)0xc0f586df, (q31_t)0x4afd6b8d, (q31_t)0xc0f35d3e,
+    (q31_t)0x4af10a22, (q31_t)0xc0f1360b, (q31_t)0x4ae4a84b, (q31_t)0xc0ef1147,
+    (q31_t)0x4ad84609, (q31_t)0xc0eceef1, (q31_t)0x4acbe35b, (q31_t)0xc0eacf09,
+    (q31_t)0x4abf8043, (q31_t)0xc0e8b190, (q31_t)0x4ab31cc1, (q31_t)0xc0e69686,
+    (q31_t)0x4aa6b8d5, (q31_t)0xc0e47deb, (q31_t)0x4a9a5480, (q31_t)0xc0e267be,
+    (q31_t)0x4a8defc3, (q31_t)0xc0e05401, (q31_t)0x4a818a9d, (q31_t)0xc0de42b2,
+    (q31_t)0x4a752510, (q31_t)0xc0dc33d2, (q31_t)0x4a68bf1b, (q31_t)0xc0da2762,
+    (q31_t)0x4a5c58c0, (q31_t)0xc0d81d61, (q31_t)0x4a4ff1fe, (q31_t)0xc0d615cf,
+    (q31_t)0x4a438ad7, (q31_t)0xc0d410ad, (q31_t)0x4a37234a, (q31_t)0xc0d20dfa,
+    (q31_t)0x4a2abb59, (q31_t)0xc0d00db6, (q31_t)0x4a1e5303, (q31_t)0xc0ce0fe3,
+    (q31_t)0x4a11ea49, (q31_t)0xc0cc147f, (q31_t)0x4a05812c, (q31_t)0xc0ca1b8a,
+    (q31_t)0x49f917ac, (q31_t)0xc0c82506, (q31_t)0x49ecadc9, (q31_t)0xc0c630f2,
+    (q31_t)0x49e04385, (q31_t)0xc0c43f4d, (q31_t)0x49d3d8df, (q31_t)0xc0c25019,
+    (q31_t)0x49c76dd8, (q31_t)0xc0c06355, (q31_t)0x49bb0271, (q31_t)0xc0be7901,
+    (q31_t)0x49ae96aa, (q31_t)0xc0bc911d, (q31_t)0x49a22a83, (q31_t)0xc0baabaa,
+    (q31_t)0x4995bdfd, (q31_t)0xc0b8c8a7, (q31_t)0x49895118, (q31_t)0xc0b6e815,
+    (q31_t)0x497ce3d5, (q31_t)0xc0b509f3, (q31_t)0x49707635, (q31_t)0xc0b32e42,
+    (q31_t)0x49640837, (q31_t)0xc0b15502, (q31_t)0x495799dd, (q31_t)0xc0af7e33,
+    (q31_t)0x494b2b27, (q31_t)0xc0ada9d4, (q31_t)0x493ebc14, (q31_t)0xc0abd7e6,
+    (q31_t)0x49324ca7, (q31_t)0xc0aa086a, (q31_t)0x4925dcdf, (q31_t)0xc0a83b5e,
+    (q31_t)0x49196cbc, (q31_t)0xc0a670c4, (q31_t)0x490cfc40, (q31_t)0xc0a4a89b,
+    (q31_t)0x49008b6a, (q31_t)0xc0a2e2e3, (q31_t)0x48f41a3c, (q31_t)0xc0a11f9d,
+    (q31_t)0x48e7a8b5, (q31_t)0xc09f5ec8, (q31_t)0x48db36d6, (q31_t)0xc09da065,
+    (q31_t)0x48cec4a0, (q31_t)0xc09be473, (q31_t)0x48c25213, (q31_t)0xc09a2af3,
+    (q31_t)0x48b5df30, (q31_t)0xc09873e4, (q31_t)0x48a96bf6, (q31_t)0xc096bf48,
+    (q31_t)0x489cf867, (q31_t)0xc0950d1d, (q31_t)0x48908483, (q31_t)0xc0935d64,
+    (q31_t)0x4884104b, (q31_t)0xc091b01d, (q31_t)0x48779bbe, (q31_t)0xc0900548,
+    (q31_t)0x486b26de, (q31_t)0xc08e5ce5, (q31_t)0x485eb1ab, (q31_t)0xc08cb6f5,
+    (q31_t)0x48523c25, (q31_t)0xc08b1376, (q31_t)0x4845c64d, (q31_t)0xc089726a,
+    (q31_t)0x48395024, (q31_t)0xc087d3d0, (q31_t)0x482cd9a9, (q31_t)0xc08637a9,
+    (q31_t)0x482062de, (q31_t)0xc0849df4, (q31_t)0x4813ebc2, (q31_t)0xc08306b2,
+    (q31_t)0x48077457, (q31_t)0xc08171e2, (q31_t)0x47fafc9c, (q31_t)0xc07fdf85,
+    (q31_t)0x47ee8493, (q31_t)0xc07e4f9b, (q31_t)0x47e20c3b, (q31_t)0xc07cc223,
+    (q31_t)0x47d59396, (q31_t)0xc07b371e, (q31_t)0x47c91aa3, (q31_t)0xc079ae8c,
+    (q31_t)0x47bca163, (q31_t)0xc078286e, (q31_t)0x47b027d7, (q31_t)0xc076a4c2,
+    (q31_t)0x47a3adff, (q31_t)0xc0752389, (q31_t)0x479733dc, (q31_t)0xc073a4c3,
+    (q31_t)0x478ab96e, (q31_t)0xc0722871, (q31_t)0x477e3eb5, (q31_t)0xc070ae92,
+    (q31_t)0x4771c3b3, (q31_t)0xc06f3726, (q31_t)0x47654867, (q31_t)0xc06dc22e,
+    (q31_t)0x4758ccd2, (q31_t)0xc06c4fa8, (q31_t)0x474c50f4, (q31_t)0xc06adf97,
+    (q31_t)0x473fd4cf, (q31_t)0xc06971f9, (q31_t)0x47335862, (q31_t)0xc06806ce,
+    (q31_t)0x4726dbae, (q31_t)0xc0669e18, (q31_t)0x471a5eb3, (q31_t)0xc06537d4,
+    (q31_t)0x470de172, (q31_t)0xc063d405, (q31_t)0x470163eb, (q31_t)0xc06272aa,
+    (q31_t)0x46f4e620, (q31_t)0xc06113c2, (q31_t)0x46e86810, (q31_t)0xc05fb74e,
+    (q31_t)0x46dbe9bb, (q31_t)0xc05e5d4e, (q31_t)0x46cf6b23, (q31_t)0xc05d05c3,
+    (q31_t)0x46c2ec48, (q31_t)0xc05bb0ab, (q31_t)0x46b66d29, (q31_t)0xc05a5e07,
+    (q31_t)0x46a9edc9, (q31_t)0xc0590dd8, (q31_t)0x469d6e27, (q31_t)0xc057c01d,
+    (q31_t)0x4690ee44, (q31_t)0xc05674d6, (q31_t)0x46846e1f, (q31_t)0xc0552c03,
+    (q31_t)0x4677edbb, (q31_t)0xc053e5a5, (q31_t)0x466b6d16, (q31_t)0xc052a1bb,
+    (q31_t)0x465eec33, (q31_t)0xc0516045, (q31_t)0x46526b10, (q31_t)0xc0502145,
+    (q31_t)0x4645e9af, (q31_t)0xc04ee4b8, (q31_t)0x46396810, (q31_t)0xc04daaa1,
+    (q31_t)0x462ce634, (q31_t)0xc04c72fe, (q31_t)0x4620641a, (q31_t)0xc04b3dcf,
+    (q31_t)0x4613e1c5, (q31_t)0xc04a0b16, (q31_t)0x46075f33, (q31_t)0xc048dad1,
+    (q31_t)0x45fadc66, (q31_t)0xc047ad01, (q31_t)0x45ee595d, (q31_t)0xc04681a6,
+    (q31_t)0x45e1d61b, (q31_t)0xc04558c0, (q31_t)0x45d5529e, (q31_t)0xc044324f,
+    (q31_t)0x45c8cee7, (q31_t)0xc0430e53, (q31_t)0x45bc4af8, (q31_t)0xc041eccc,
+    (q31_t)0x45afc6d0, (q31_t)0xc040cdba, (q31_t)0x45a3426f, (q31_t)0xc03fb11d,
+    (q31_t)0x4596bdd7, (q31_t)0xc03e96f6, (q31_t)0x458a3908, (q31_t)0xc03d7f44,
+    (q31_t)0x457db403, (q31_t)0xc03c6a07, (q31_t)0x45712ec7, (q31_t)0xc03b573f,
+    (q31_t)0x4564a955, (q31_t)0xc03a46ed, (q31_t)0x455823ae, (q31_t)0xc0393910,
+    (q31_t)0x454b9dd3, (q31_t)0xc0382da8, (q31_t)0x453f17c3, (q31_t)0xc03724b6,
+    (q31_t)0x4532917f, (q31_t)0xc0361e3a, (q31_t)0x45260b08, (q31_t)0xc0351a33,
+    (q31_t)0x4519845e, (q31_t)0xc03418a2, (q31_t)0x450cfd82, (q31_t)0xc0331986,
+    (q31_t)0x45007674, (q31_t)0xc0321ce0, (q31_t)0x44f3ef35, (q31_t)0xc03122b0,
+    (q31_t)0x44e767c5, (q31_t)0xc0302af5, (q31_t)0x44dae024, (q31_t)0xc02f35b1,
+    (q31_t)0x44ce5854, (q31_t)0xc02e42e2, (q31_t)0x44c1d054, (q31_t)0xc02d5289,
+    (q31_t)0x44b54825, (q31_t)0xc02c64a6, (q31_t)0x44a8bfc7, (q31_t)0xc02b7939,
+    (q31_t)0x449c373c, (q31_t)0xc02a9042, (q31_t)0x448fae83, (q31_t)0xc029a9c1,
+    (q31_t)0x4483259d, (q31_t)0xc028c5b6, (q31_t)0x44769c8b, (q31_t)0xc027e421,
+    (q31_t)0x446a134c, (q31_t)0xc0270502, (q31_t)0x445d89e2, (q31_t)0xc0262859,
+    (q31_t)0x4451004d, (q31_t)0xc0254e27, (q31_t)0x4444768d, (q31_t)0xc024766a,
+    (q31_t)0x4437eca4, (q31_t)0xc023a124, (q31_t)0x442b6290, (q31_t)0xc022ce54,
+    (q31_t)0x441ed854, (q31_t)0xc021fdfb, (q31_t)0x44124dee, (q31_t)0xc0213018,
+    (q31_t)0x4405c361, (q31_t)0xc02064ab, (q31_t)0x43f938ac, (q31_t)0xc01f9bb5,
+    (q31_t)0x43ecadcf, (q31_t)0xc01ed535, (q31_t)0x43e022cc, (q31_t)0xc01e112b,
+    (q31_t)0x43d397a3, (q31_t)0xc01d4f99, (q31_t)0x43c70c54, (q31_t)0xc01c907c,
+    (q31_t)0x43ba80df, (q31_t)0xc01bd3d6, (q31_t)0x43adf546, (q31_t)0xc01b19a7,
+    (q31_t)0x43a16988, (q31_t)0xc01a61ee, (q31_t)0x4394dda7, (q31_t)0xc019acac,
+    (q31_t)0x438851a2, (q31_t)0xc018f9e1, (q31_t)0x437bc57b, (q31_t)0xc018498c,
+    (q31_t)0x436f3931, (q31_t)0xc0179bae, (q31_t)0x4362acc5, (q31_t)0xc016f047,
+    (q31_t)0x43562038, (q31_t)0xc0164757, (q31_t)0x43499389, (q31_t)0xc015a0dd,
+    (q31_t)0x433d06bb, (q31_t)0xc014fcda, (q31_t)0x433079cc, (q31_t)0xc0145b4e,
+    (q31_t)0x4323ecbe, (q31_t)0xc013bc39, (q31_t)0x43175f91, (q31_t)0xc0131f9b,
+    (q31_t)0x430ad245, (q31_t)0xc0128574, (q31_t)0x42fe44dc, (q31_t)0xc011edc3,
+    (q31_t)0x42f1b755, (q31_t)0xc011588a, (q31_t)0x42e529b0, (q31_t)0xc010c5c7,
+    (q31_t)0x42d89bf0, (q31_t)0xc010357c, (q31_t)0x42cc0e13, (q31_t)0xc00fa7a8,
+    (q31_t)0x42bf801a, (q31_t)0xc00f1c4a, (q31_t)0x42b2f207, (q31_t)0xc00e9364,
+    (q31_t)0x42a663d8, (q31_t)0xc00e0cf5, (q31_t)0x4299d590, (q31_t)0xc00d88fd,
+    (q31_t)0x428d472e, (q31_t)0xc00d077c, (q31_t)0x4280b8b3, (q31_t)0xc00c8872,
+    (q31_t)0x42742a1f, (q31_t)0xc00c0be0, (q31_t)0x42679b73, (q31_t)0xc00b91c4,
+    (q31_t)0x425b0caf, (q31_t)0xc00b1a20, (q31_t)0x424e7dd4, (q31_t)0xc00aa4f3,
+    (q31_t)0x4241eee2, (q31_t)0xc00a323d, (q31_t)0x42355fd9, (q31_t)0xc009c1ff,
+    (q31_t)0x4228d0bb, (q31_t)0xc0095438, (q31_t)0x421c4188, (q31_t)0xc008e8e8,
+    (q31_t)0x420fb240, (q31_t)0xc008800f, (q31_t)0x420322e3, (q31_t)0xc00819ae,
+    (q31_t)0x41f69373, (q31_t)0xc007b5c4, (q31_t)0x41ea03ef, (q31_t)0xc0075452,
+    (q31_t)0x41dd7459, (q31_t)0xc006f556, (q31_t)0x41d0e4b0, (q31_t)0xc00698d3,
+    (q31_t)0x41c454f5, (q31_t)0xc0063ec6, (q31_t)0x41b7c528, (q31_t)0xc005e731,
+    (q31_t)0x41ab354b, (q31_t)0xc0059214, (q31_t)0x419ea55d, (q31_t)0xc0053f6e,
+    (q31_t)0x4192155f, (q31_t)0xc004ef3f, (q31_t)0x41858552, (q31_t)0xc004a188,
+    (q31_t)0x4178f536, (q31_t)0xc0045648, (q31_t)0x416c650b, (q31_t)0xc0040d80,
+    (q31_t)0x415fd4d2, (q31_t)0xc003c72f, (q31_t)0x4153448c, (q31_t)0xc0038356,
+    (q31_t)0x4146b438, (q31_t)0xc00341f4, (q31_t)0x413a23d8, (q31_t)0xc003030a,
+    (q31_t)0x412d936c, (q31_t)0xc002c697, (q31_t)0x412102f4, (q31_t)0xc0028c9c,
+    (q31_t)0x41147271, (q31_t)0xc0025519, (q31_t)0x4107e1e3, (q31_t)0xc002200d,
+    (q31_t)0x40fb514b, (q31_t)0xc001ed78, (q31_t)0x40eec0aa, (q31_t)0xc001bd5c,
+    (q31_t)0x40e22fff, (q31_t)0xc0018fb6, (q31_t)0x40d59f4c, (q31_t)0xc0016489,
+    (q31_t)0x40c90e90, (q31_t)0xc0013bd3, (q31_t)0x40bc7dcc, (q31_t)0xc0011594,
+    (q31_t)0x40afed02, (q31_t)0xc000f1ce, (q31_t)0x40a35c30, (q31_t)0xc000d07e,
+    (q31_t)0x4096cb58, (q31_t)0xc000b1a7, (q31_t)0x408a3a7b, (q31_t)0xc0009547,
+    (q31_t)0x407da998, (q31_t)0xc0007b5f, (q31_t)0x407118b0, (q31_t)0xc00063ee,
+    (q31_t)0x406487c4, (q31_t)0xc0004ef5, (q31_t)0x4057f6d4, (q31_t)0xc0003c74,
+    (q31_t)0x404b65e1, (q31_t)0xc0002c6a, (q31_t)0x403ed4ea, (q31_t)0xc0001ed8,
+    (q31_t)0x403243f1, (q31_t)0xc00013bd, (q31_t)0x4025b2f7, (q31_t)0xc0000b1a,
+    (q31_t)0x401921fb, (q31_t)0xc00004ef, (q31_t)0x400c90fe, (q31_t)0xc000013c,
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
+/**
+  @par
+  Generation fixed-point realCoefAQ15 array in Q15 format:
+  @par
+  n = 4096
+  
for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }

+  @par
+  Convert to fixed point Q15 format
+        round(pATable[i] * pow(2, 15))
+ */
+const q15_t __ALIGNED(4) realCoefAQ15[8192] = {
+    (q15_t)0x4000, (q15_t)0xc000, (q15_t)0x3ff3, (q15_t)0xc000, (q15_t)0x3fe7, (q15_t)0xc000, (q15_t)0x3fda, (q15_t)0xc000,
+    (q15_t)0x3fce, (q15_t)0xc000, (q15_t)0x3fc1, (q15_t)0xc000, (q15_t)0x3fb5, (q15_t)0xc000, (q15_t)0x3fa8, (q15_t)0xc000,
+    (q15_t)0x3f9b, (q15_t)0xc000, (q15_t)0x3f8f, (q15_t)0xc000, (q15_t)0x3f82, (q15_t)0xc000, (q15_t)0x3f76, (q15_t)0xc001,
+    (q15_t)0x3f69, (q15_t)0xc001, (q15_t)0x3f5d, (q15_t)0xc001, (q15_t)0x3f50, (q15_t)0xc001, (q15_t)0x3f44, (q15_t)0xc001,
+    (q15_t)0x3f37, (q15_t)0xc001, (q15_t)0x3f2a, (q15_t)0xc001, (q15_t)0x3f1e, (q15_t)0xc002, (q15_t)0x3f11, (q15_t)0xc002,
+    (q15_t)0x3f05, (q15_t)0xc002, (q15_t)0x3ef8, (q15_t)0xc002, (q15_t)0x3eec, (q15_t)0xc002, (q15_t)0x3edf, (q15_t)0xc003,
+    (q15_t)0x3ed2, (q15_t)0xc003, (q15_t)0x3ec6, (q15_t)0xc003, (q15_t)0x3eb9, (q15_t)0xc003, (q15_t)0x3ead, (q15_t)0xc004,
+    (q15_t)0x3ea0, (q15_t)0xc004, (q15_t)0x3e94, (q15_t)0xc004, (q15_t)0x3e87, (q15_t)0xc004, (q15_t)0x3e7a, (q15_t)0xc005,
+    (q15_t)0x3e6e, (q15_t)0xc005, (q15_t)0x3e61, (q15_t)0xc005, (q15_t)0x3e55, (q15_t)0xc006, (q15_t)0x3e48, (q15_t)0xc006,
+    (q15_t)0x3e3c, (q15_t)0xc006, (q15_t)0x3e2f, (q15_t)0xc007, (q15_t)0x3e23, (q15_t)0xc007, (q15_t)0x3e16, (q15_t)0xc007,
+    (q15_t)0x3e09, (q15_t)0xc008, (q15_t)0x3dfd, (q15_t)0xc008, (q15_t)0x3df0, (q15_t)0xc009, (q15_t)0x3de4, (q15_t)0xc009,
+    (q15_t)0x3dd7, (q15_t)0xc009, (q15_t)0x3dcb, (q15_t)0xc00a, (q15_t)0x3dbe, (q15_t)0xc00a, (q15_t)0x3db2, (q15_t)0xc00b,
+    (q15_t)0x3da5, (q15_t)0xc00b, (q15_t)0x3d98, (q15_t)0xc00c, (q15_t)0x3d8c, (q15_t)0xc00c, (q15_t)0x3d7f, (q15_t)0xc00d,
+    (q15_t)0x3d73, (q15_t)0xc00d, (q15_t)0x3d66, (q15_t)0xc00e, (q15_t)0x3d5a, (q15_t)0xc00e, (q15_t)0x3d4d, (q15_t)0xc00f,
+    (q15_t)0x3d40, (q15_t)0xc00f, (q15_t)0x3d34, (q15_t)0xc010, (q15_t)0x3d27, (q15_t)0xc010, (q15_t)0x3d1b, (q15_t)0xc011,
+    (q15_t)0x3d0e, (q15_t)0xc011, (q15_t)0x3d02, (q15_t)0xc012, (q15_t)0x3cf5, (q15_t)0xc013, (q15_t)0x3ce9, (q15_t)0xc013,
+    (q15_t)0x3cdc, (q15_t)0xc014, (q15_t)0x3cd0, (q15_t)0xc014, (q15_t)0x3cc3, (q15_t)0xc015, (q15_t)0x3cb6, (q15_t)0xc016,
+    (q15_t)0x3caa, (q15_t)0xc016, (q15_t)0x3c9d, (q15_t)0xc017, (q15_t)0x3c91, (q15_t)0xc018, (q15_t)0x3c84, (q15_t)0xc018,
+    (q15_t)0x3c78, (q15_t)0xc019, (q15_t)0x3c6b, (q15_t)0xc01a, (q15_t)0x3c5f, (q15_t)0xc01a, (q15_t)0x3c52, (q15_t)0xc01b,
+    (q15_t)0x3c45, (q15_t)0xc01c, (q15_t)0x3c39, (q15_t)0xc01d, (q15_t)0x3c2c, (q15_t)0xc01d, (q15_t)0x3c20, (q15_t)0xc01e,
+    (q15_t)0x3c13, (q15_t)0xc01f, (q15_t)0x3c07, (q15_t)0xc020, (q15_t)0x3bfa, (q15_t)0xc020, (q15_t)0x3bee, (q15_t)0xc021,
+    (q15_t)0x3be1, (q15_t)0xc022, (q15_t)0x3bd5, (q15_t)0xc023, (q15_t)0x3bc8, (q15_t)0xc024, (q15_t)0x3bbc, (q15_t)0xc024,
+    (q15_t)0x3baf, (q15_t)0xc025, (q15_t)0x3ba2, (q15_t)0xc026, (q15_t)0x3b96, (q15_t)0xc027, (q15_t)0x3b89, (q15_t)0xc028,
+    (q15_t)0x3b7d, (q15_t)0xc029, (q15_t)0x3b70, (q15_t)0xc02a, (q15_t)0x3b64, (q15_t)0xc02b, (q15_t)0x3b57, (q15_t)0xc02b,
+    (q15_t)0x3b4b, (q15_t)0xc02c, (q15_t)0x3b3e, (q15_t)0xc02d, (q15_t)0x3b32, (q15_t)0xc02e, (q15_t)0x3b25, (q15_t)0xc02f,
+    (q15_t)0x3b19, (q15_t)0xc030, (q15_t)0x3b0c, (q15_t)0xc031, (q15_t)0x3b00, (q15_t)0xc032, (q15_t)0x3af3, (q15_t)0xc033,
+    (q15_t)0x3ae6, (q15_t)0xc034, (q15_t)0x3ada, (q15_t)0xc035, (q15_t)0x3acd, (q15_t)0xc036, (q15_t)0x3ac1, (q15_t)0xc037,
+    (q15_t)0x3ab4, (q15_t)0xc038, (q15_t)0x3aa8, (q15_t)0xc039, (q15_t)0x3a9b, (q15_t)0xc03a, (q15_t)0x3a8f, (q15_t)0xc03b,
+    (q15_t)0x3a82, (q15_t)0xc03c, (q15_t)0x3a76, (q15_t)0xc03d, (q15_t)0x3a69, (q15_t)0xc03f, (q15_t)0x3a5d, (q15_t)0xc040,
+    (q15_t)0x3a50, (q15_t)0xc041, (q15_t)0x3a44, (q15_t)0xc042, (q15_t)0x3a37, (q15_t)0xc043, (q15_t)0x3a2b, (q15_t)0xc044,
+    (q15_t)0x3a1e, (q15_t)0xc045, (q15_t)0x3a12, (q15_t)0xc047, (q15_t)0x3a05, (q15_t)0xc048, (q15_t)0x39f9, (q15_t)0xc049,
+    (q15_t)0x39ec, (q15_t)0xc04a, (q15_t)0x39e0, (q15_t)0xc04b, (q15_t)0x39d3, (q15_t)0xc04c, (q15_t)0x39c7, (q15_t)0xc04e,
+    (q15_t)0x39ba, (q15_t)0xc04f, (q15_t)0x39ae, (q15_t)0xc050, (q15_t)0x39a1, (q15_t)0xc051, (q15_t)0x3995, (q15_t)0xc053,
+    (q15_t)0x3988, (q15_t)0xc054, (q15_t)0x397c, (q15_t)0xc055, (q15_t)0x396f, (q15_t)0xc056, (q15_t)0x3963, (q15_t)0xc058,
+    (q15_t)0x3956, (q15_t)0xc059, (q15_t)0x394a, (q15_t)0xc05a, (q15_t)0x393d, (q15_t)0xc05c, (q15_t)0x3931, (q15_t)0xc05d,
+    (q15_t)0x3924, (q15_t)0xc05e, (q15_t)0x3918, (q15_t)0xc060, (q15_t)0x390b, (q15_t)0xc061, (q15_t)0x38ff, (q15_t)0xc062,
+    (q15_t)0x38f2, (q15_t)0xc064, (q15_t)0x38e6, (q15_t)0xc065, (q15_t)0x38d9, (q15_t)0xc067, (q15_t)0x38cd, (q15_t)0xc068,
+    (q15_t)0x38c0, (q15_t)0xc069, (q15_t)0x38b4, (q15_t)0xc06b, (q15_t)0x38a7, (q15_t)0xc06c, (q15_t)0x389b, (q15_t)0xc06e,
+    (q15_t)0x388e, (q15_t)0xc06f, (q15_t)0x3882, (q15_t)0xc071, (q15_t)0x3875, (q15_t)0xc072, (q15_t)0x3869, (q15_t)0xc074,
+    (q15_t)0x385c, (q15_t)0xc075, (q15_t)0x3850, (q15_t)0xc077, (q15_t)0x3843, (q15_t)0xc078, (q15_t)0x3837, (q15_t)0xc07a,
+    (q15_t)0x382a, (q15_t)0xc07b, (q15_t)0x381e, (q15_t)0xc07d, (q15_t)0x3811, (q15_t)0xc07e, (q15_t)0x3805, (q15_t)0xc080,
+    (q15_t)0x37f9, (q15_t)0xc081, (q15_t)0x37ec, (q15_t)0xc083, (q15_t)0x37e0, (q15_t)0xc085, (q15_t)0x37d3, (q15_t)0xc086,
+    (q15_t)0x37c7, (q15_t)0xc088, (q15_t)0x37ba, (q15_t)0xc089, (q15_t)0x37ae, (q15_t)0xc08b, (q15_t)0x37a1, (q15_t)0xc08d,
+    (q15_t)0x3795, (q15_t)0xc08e, (q15_t)0x3788, (q15_t)0xc090, (q15_t)0x377c, (q15_t)0xc092, (q15_t)0x376f, (q15_t)0xc093,
+    (q15_t)0x3763, (q15_t)0xc095, (q15_t)0x3757, (q15_t)0xc097, (q15_t)0x374a, (q15_t)0xc098, (q15_t)0x373e, (q15_t)0xc09a,
+    (q15_t)0x3731, (q15_t)0xc09c, (q15_t)0x3725, (q15_t)0xc09e, (q15_t)0x3718, (q15_t)0xc09f, (q15_t)0x370c, (q15_t)0xc0a1,
+    (q15_t)0x36ff, (q15_t)0xc0a3, (q15_t)0x36f3, (q15_t)0xc0a5, (q15_t)0x36e7, (q15_t)0xc0a6, (q15_t)0x36da, (q15_t)0xc0a8,
+    (q15_t)0x36ce, (q15_t)0xc0aa, (q15_t)0x36c1, (q15_t)0xc0ac, (q15_t)0x36b5, (q15_t)0xc0ae, (q15_t)0x36a8, (q15_t)0xc0af,
+    (q15_t)0x369c, (q15_t)0xc0b1, (q15_t)0x3690, (q15_t)0xc0b3, (q15_t)0x3683, (q15_t)0xc0b5, (q15_t)0x3677, (q15_t)0xc0b7,
+    (q15_t)0x366a, (q15_t)0xc0b9, (q15_t)0x365e, (q15_t)0xc0bb, (q15_t)0x3651, (q15_t)0xc0bd, (q15_t)0x3645, (q15_t)0xc0be,
+    (q15_t)0x3639, (q15_t)0xc0c0, (q15_t)0x362c, (q15_t)0xc0c2, (q15_t)0x3620, (q15_t)0xc0c4, (q15_t)0x3613, (q15_t)0xc0c6,
+    (q15_t)0x3607, (q15_t)0xc0c8, (q15_t)0x35fa, (q15_t)0xc0ca, (q15_t)0x35ee, (q15_t)0xc0cc, (q15_t)0x35e2, (q15_t)0xc0ce,
+    (q15_t)0x35d5, (q15_t)0xc0d0, (q15_t)0x35c9, (q15_t)0xc0d2, (q15_t)0x35bc, (q15_t)0xc0d4, (q15_t)0x35b0, (q15_t)0xc0d6,
+    (q15_t)0x35a4, (q15_t)0xc0d8, (q15_t)0x3597, (q15_t)0xc0da, (q15_t)0x358b, (q15_t)0xc0dc, (q15_t)0x357e, (q15_t)0xc0de,
+    (q15_t)0x3572, (q15_t)0xc0e0, (q15_t)0x3566, (q15_t)0xc0e2, (q15_t)0x3559, (q15_t)0xc0e4, (q15_t)0x354d, (q15_t)0xc0e7,
+    (q15_t)0x3540, (q15_t)0xc0e9, (q15_t)0x3534, (q15_t)0xc0eb, (q15_t)0x3528, (q15_t)0xc0ed, (q15_t)0x351b, (q15_t)0xc0ef,
+    (q15_t)0x350f, (q15_t)0xc0f1, (q15_t)0x3503, (q15_t)0xc0f3, (q15_t)0x34f6, (q15_t)0xc0f6, (q15_t)0x34ea, (q15_t)0xc0f8,
+    (q15_t)0x34dd, (q15_t)0xc0fa, (q15_t)0x34d1, (q15_t)0xc0fc, (q15_t)0x34c5, (q15_t)0xc0fe, (q15_t)0x34b8, (q15_t)0xc100,
+    (q15_t)0x34ac, (q15_t)0xc103, (q15_t)0x34a0, (q15_t)0xc105, (q15_t)0x3493, (q15_t)0xc107, (q15_t)0x3487, (q15_t)0xc109,
+    (q15_t)0x347b, (q15_t)0xc10c, (q15_t)0x346e, (q15_t)0xc10e, (q15_t)0x3462, (q15_t)0xc110, (q15_t)0x3455, (q15_t)0xc113,
+    (q15_t)0x3449, (q15_t)0xc115, (q15_t)0x343d, (q15_t)0xc117, (q15_t)0x3430, (q15_t)0xc119, (q15_t)0x3424, (q15_t)0xc11c,
+    (q15_t)0x3418, (q15_t)0xc11e, (q15_t)0x340b, (q15_t)0xc120, (q15_t)0x33ff, (q15_t)0xc123, (q15_t)0x33f3, (q15_t)0xc125,
+    (q15_t)0x33e6, (q15_t)0xc128, (q15_t)0x33da, (q15_t)0xc12a, (q15_t)0x33ce, (q15_t)0xc12c, (q15_t)0x33c1, (q15_t)0xc12f,
+    (q15_t)0x33b5, (q15_t)0xc131, (q15_t)0x33a9, (q15_t)0xc134, (q15_t)0x339c, (q15_t)0xc136, (q15_t)0x3390, (q15_t)0xc138,
+    (q15_t)0x3384, (q15_t)0xc13b, (q15_t)0x3377, (q15_t)0xc13d, (q15_t)0x336b, (q15_t)0xc140, (q15_t)0x335f, (q15_t)0xc142,
+    (q15_t)0x3352, (q15_t)0xc145, (q15_t)0x3346, (q15_t)0xc147, (q15_t)0x333a, (q15_t)0xc14a, (q15_t)0x332d, (q15_t)0xc14c,
+    (q15_t)0x3321, (q15_t)0xc14f, (q15_t)0x3315, (q15_t)0xc151, (q15_t)0x3308, (q15_t)0xc154, (q15_t)0x32fc, (q15_t)0xc156,
+    (q15_t)0x32f0, (q15_t)0xc159, (q15_t)0x32e4, (q15_t)0xc15b, (q15_t)0x32d7, (q15_t)0xc15e, (q15_t)0x32cb, (q15_t)0xc161,
+    (q15_t)0x32bf, (q15_t)0xc163, (q15_t)0x32b2, (q15_t)0xc166, (q15_t)0x32a6, (q15_t)0xc168, (q15_t)0x329a, (q15_t)0xc16b,
+    (q15_t)0x328e, (q15_t)0xc16e, (q15_t)0x3281, (q15_t)0xc170, (q15_t)0x3275, (q15_t)0xc173, (q15_t)0x3269, (q15_t)0xc176,
+    (q15_t)0x325c, (q15_t)0xc178, (q15_t)0x3250, (q15_t)0xc17b, (q15_t)0x3244, (q15_t)0xc17e, (q15_t)0x3238, (q15_t)0xc180,
+    (q15_t)0x322b, (q15_t)0xc183, (q15_t)0x321f, (q15_t)0xc186, (q15_t)0x3213, (q15_t)0xc189, (q15_t)0x3207, (q15_t)0xc18b,
+    (q15_t)0x31fa, (q15_t)0xc18e, (q15_t)0x31ee, (q15_t)0xc191, (q15_t)0x31e2, (q15_t)0xc194, (q15_t)0x31d5, (q15_t)0xc196,
+    (q15_t)0x31c9, (q15_t)0xc199, (q15_t)0x31bd, (q15_t)0xc19c, (q15_t)0x31b1, (q15_t)0xc19f, (q15_t)0x31a4, (q15_t)0xc1a2,
+    (q15_t)0x3198, (q15_t)0xc1a4, (q15_t)0x318c, (q15_t)0xc1a7, (q15_t)0x3180, (q15_t)0xc1aa, (q15_t)0x3174, (q15_t)0xc1ad,
+    (q15_t)0x3167, (q15_t)0xc1b0, (q15_t)0x315b, (q15_t)0xc1b3, (q15_t)0x314f, (q15_t)0xc1b6, (q15_t)0x3143, (q15_t)0xc1b8,
+    (q15_t)0x3136, (q15_t)0xc1bb, (q15_t)0x312a, (q15_t)0xc1be, (q15_t)0x311e, (q15_t)0xc1c1, (q15_t)0x3112, (q15_t)0xc1c4,
+    (q15_t)0x3105, (q15_t)0xc1c7, (q15_t)0x30f9, (q15_t)0xc1ca, (q15_t)0x30ed, (q15_t)0xc1cd, (q15_t)0x30e1, (q15_t)0xc1d0,
+    (q15_t)0x30d5, (q15_t)0xc1d3, (q15_t)0x30c8, (q15_t)0xc1d6, (q15_t)0x30bc, (q15_t)0xc1d9, (q15_t)0x30b0, (q15_t)0xc1dc,
+    (q15_t)0x30a4, (q15_t)0xc1df, (q15_t)0x3098, (q15_t)0xc1e2, (q15_t)0x308b, (q15_t)0xc1e5, (q15_t)0x307f, (q15_t)0xc1e8,
+    (q15_t)0x3073, (q15_t)0xc1eb, (q15_t)0x3067, (q15_t)0xc1ee, (q15_t)0x305b, (q15_t)0xc1f1, (q15_t)0x304e, (q15_t)0xc1f4,
+    (q15_t)0x3042, (q15_t)0xc1f7, (q15_t)0x3036, (q15_t)0xc1fa, (q15_t)0x302a, (q15_t)0xc1fd, (q15_t)0x301e, (q15_t)0xc201,
+    (q15_t)0x3012, (q15_t)0xc204, (q15_t)0x3005, (q15_t)0xc207, (q15_t)0x2ff9, (q15_t)0xc20a, (q15_t)0x2fed, (q15_t)0xc20d,
+    (q15_t)0x2fe1, (q15_t)0xc210, (q15_t)0x2fd5, (q15_t)0xc213, (q15_t)0x2fc9, (q15_t)0xc217, (q15_t)0x2fbc, (q15_t)0xc21a,
+    (q15_t)0x2fb0, (q15_t)0xc21d, (q15_t)0x2fa4, (q15_t)0xc220, (q15_t)0x2f98, (q15_t)0xc223, (q15_t)0x2f8c, (q15_t)0xc227,
+    (q15_t)0x2f80, (q15_t)0xc22a, (q15_t)0x2f74, (q15_t)0xc22d, (q15_t)0x2f67, (q15_t)0xc230, (q15_t)0x2f5b, (q15_t)0xc234,
+    (q15_t)0x2f4f, (q15_t)0xc237, (q15_t)0x2f43, (q15_t)0xc23a, (q15_t)0x2f37, (q15_t)0xc23e, (q15_t)0x2f2b, (q15_t)0xc241,
+    (q15_t)0x2f1f, (q15_t)0xc244, (q15_t)0x2f13, (q15_t)0xc247, (q15_t)0x2f06, (q15_t)0xc24b, (q15_t)0x2efa, (q15_t)0xc24e,
+    (q15_t)0x2eee, (q15_t)0xc251, (q15_t)0x2ee2, (q15_t)0xc255, (q15_t)0x2ed6, (q15_t)0xc258, (q15_t)0x2eca, (q15_t)0xc25c,
+    (q15_t)0x2ebe, (q15_t)0xc25f, (q15_t)0x2eb2, (q15_t)0xc262, (q15_t)0x2ea6, (q15_t)0xc266, (q15_t)0x2e99, (q15_t)0xc269,
+    (q15_t)0x2e8d, (q15_t)0xc26d, (q15_t)0x2e81, (q15_t)0xc270, (q15_t)0x2e75, (q15_t)0xc273, (q15_t)0x2e69, (q15_t)0xc277,
+    (q15_t)0x2e5d, (q15_t)0xc27a, (q15_t)0x2e51, (q15_t)0xc27e, (q15_t)0x2e45, (q15_t)0xc281, (q15_t)0x2e39, (q15_t)0xc285,
+    (q15_t)0x2e2d, (q15_t)0xc288, (q15_t)0x2e21, (q15_t)0xc28c, (q15_t)0x2e15, (q15_t)0xc28f, (q15_t)0x2e09, (q15_t)0xc293,
+    (q15_t)0x2dfc, (q15_t)0xc296, (q15_t)0x2df0, (q15_t)0xc29a, (q15_t)0x2de4, (q15_t)0xc29d, (q15_t)0x2dd8, (q15_t)0xc2a1,
+    (q15_t)0x2dcc, (q15_t)0xc2a5, (q15_t)0x2dc0, (q15_t)0xc2a8, (q15_t)0x2db4, (q15_t)0xc2ac, (q15_t)0x2da8, (q15_t)0xc2af,
+    (q15_t)0x2d9c, (q15_t)0xc2b3, (q15_t)0x2d90, (q15_t)0xc2b7, (q15_t)0x2d84, (q15_t)0xc2ba, (q15_t)0x2d78, (q15_t)0xc2be,
+    (q15_t)0x2d6c, (q15_t)0xc2c1, (q15_t)0x2d60, (q15_t)0xc2c5, (q15_t)0x2d54, (q15_t)0xc2c9, (q15_t)0x2d48, (q15_t)0xc2cc,
+    (q15_t)0x2d3c, (q15_t)0xc2d0, (q15_t)0x2d30, (q15_t)0xc2d4, (q15_t)0x2d24, (q15_t)0xc2d8, (q15_t)0x2d18, (q15_t)0xc2db,
+    (q15_t)0x2d0c, (q15_t)0xc2df, (q15_t)0x2d00, (q15_t)0xc2e3, (q15_t)0x2cf4, (q15_t)0xc2e6, (q15_t)0x2ce8, (q15_t)0xc2ea,
+    (q15_t)0x2cdc, (q15_t)0xc2ee, (q15_t)0x2cd0, (q15_t)0xc2f2, (q15_t)0x2cc4, (q15_t)0xc2f5, (q15_t)0x2cb8, (q15_t)0xc2f9,
+    (q15_t)0x2cac, (q15_t)0xc2fd, (q15_t)0x2ca0, (q15_t)0xc301, (q15_t)0x2c94, (q15_t)0xc305, (q15_t)0x2c88, (q15_t)0xc308,
+    (q15_t)0x2c7c, (q15_t)0xc30c, (q15_t)0x2c70, (q15_t)0xc310, (q15_t)0x2c64, (q15_t)0xc314, (q15_t)0x2c58, (q15_t)0xc318,
+    (q15_t)0x2c4c, (q15_t)0xc31c, (q15_t)0x2c40, (q15_t)0xc320, (q15_t)0x2c34, (q15_t)0xc323, (q15_t)0x2c28, (q15_t)0xc327,
+    (q15_t)0x2c1c, (q15_t)0xc32b, (q15_t)0x2c10, (q15_t)0xc32f, (q15_t)0x2c05, (q15_t)0xc333, (q15_t)0x2bf9, (q15_t)0xc337,
+    (q15_t)0x2bed, (q15_t)0xc33b, (q15_t)0x2be1, (q15_t)0xc33f, (q15_t)0x2bd5, (q15_t)0xc343, (q15_t)0x2bc9, (q15_t)0xc347,
+    (q15_t)0x2bbd, (q15_t)0xc34b, (q15_t)0x2bb1, (q15_t)0xc34f, (q15_t)0x2ba5, (q15_t)0xc353, (q15_t)0x2b99, (q15_t)0xc357,
+    (q15_t)0x2b8d, (q15_t)0xc35b, (q15_t)0x2b81, (q15_t)0xc35f, (q15_t)0x2b75, (q15_t)0xc363, (q15_t)0x2b6a, (q15_t)0xc367,
+    (q15_t)0x2b5e, (q15_t)0xc36b, (q15_t)0x2b52, (q15_t)0xc36f, (q15_t)0x2b46, (q15_t)0xc373, (q15_t)0x2b3a, (q15_t)0xc377,
+    (q15_t)0x2b2e, (q15_t)0xc37b, (q15_t)0x2b22, (q15_t)0xc37f, (q15_t)0x2b16, (q15_t)0xc383, (q15_t)0x2b0a, (q15_t)0xc387,
+    (q15_t)0x2aff, (q15_t)0xc38c, (q15_t)0x2af3, (q15_t)0xc390, (q15_t)0x2ae7, (q15_t)0xc394, (q15_t)0x2adb, (q15_t)0xc398,
+    (q15_t)0x2acf, (q15_t)0xc39c, (q15_t)0x2ac3, (q15_t)0xc3a0, (q15_t)0x2ab7, (q15_t)0xc3a5, (q15_t)0x2aac, (q15_t)0xc3a9,
+    (q15_t)0x2aa0, (q15_t)0xc3ad, (q15_t)0x2a94, (q15_t)0xc3b1, (q15_t)0x2a88, (q15_t)0xc3b5, (q15_t)0x2a7c, (q15_t)0xc3ba,
+    (q15_t)0x2a70, (q15_t)0xc3be, (q15_t)0x2a65, (q15_t)0xc3c2, (q15_t)0x2a59, (q15_t)0xc3c6, (q15_t)0x2a4d, (q15_t)0xc3ca,
+    (q15_t)0x2a41, (q15_t)0xc3cf, (q15_t)0x2a35, (q15_t)0xc3d3, (q15_t)0x2a29, (q15_t)0xc3d7, (q15_t)0x2a1e, (q15_t)0xc3dc,
+    (q15_t)0x2a12, (q15_t)0xc3e0, (q15_t)0x2a06, (q15_t)0xc3e4, (q15_t)0x29fa, (q15_t)0xc3e9, (q15_t)0x29ee, (q15_t)0xc3ed,
+    (q15_t)0x29e3, (q15_t)0xc3f1, (q15_t)0x29d7, (q15_t)0xc3f6, (q15_t)0x29cb, (q15_t)0xc3fa, (q15_t)0x29bf, (q15_t)0xc3fe,
+    (q15_t)0x29b4, (q15_t)0xc403, (q15_t)0x29a8, (q15_t)0xc407, (q15_t)0x299c, (q15_t)0xc40b, (q15_t)0x2990, (q15_t)0xc410,
+    (q15_t)0x2984, (q15_t)0xc414, (q15_t)0x2979, (q15_t)0xc419, (q15_t)0x296d, (q15_t)0xc41d, (q15_t)0x2961, (q15_t)0xc422,
+    (q15_t)0x2955, (q15_t)0xc426, (q15_t)0x294a, (q15_t)0xc42a, (q15_t)0x293e, (q15_t)0xc42f, (q15_t)0x2932, (q15_t)0xc433,
+    (q15_t)0x2926, (q15_t)0xc438, (q15_t)0x291b, (q15_t)0xc43c, (q15_t)0x290f, (q15_t)0xc441, (q15_t)0x2903, (q15_t)0xc445,
+    (q15_t)0x28f7, (q15_t)0xc44a, (q15_t)0x28ec, (q15_t)0xc44e, (q15_t)0x28e0, (q15_t)0xc453, (q15_t)0x28d4, (q15_t)0xc457,
+    (q15_t)0x28c9, (q15_t)0xc45c, (q15_t)0x28bd, (q15_t)0xc461, (q15_t)0x28b1, (q15_t)0xc465, (q15_t)0x28a5, (q15_t)0xc46a,
+    (q15_t)0x289a, (q15_t)0xc46e, (q15_t)0x288e, (q15_t)0xc473, (q15_t)0x2882, (q15_t)0xc478, (q15_t)0x2877, (q15_t)0xc47c,
+    (q15_t)0x286b, (q15_t)0xc481, (q15_t)0x285f, (q15_t)0xc485, (q15_t)0x2854, (q15_t)0xc48a, (q15_t)0x2848, (q15_t)0xc48f,
+    (q15_t)0x283c, (q15_t)0xc493, (q15_t)0x2831, (q15_t)0xc498, (q15_t)0x2825, (q15_t)0xc49d, (q15_t)0x2819, (q15_t)0xc4a1,
+    (q15_t)0x280e, (q15_t)0xc4a6, (q15_t)0x2802, (q15_t)0xc4ab, (q15_t)0x27f6, (q15_t)0xc4b0, (q15_t)0x27eb, (q15_t)0xc4b4,
+    (q15_t)0x27df, (q15_t)0xc4b9, (q15_t)0x27d3, (q15_t)0xc4be, (q15_t)0x27c8, (q15_t)0xc4c2, (q15_t)0x27bc, (q15_t)0xc4c7,
+    (q15_t)0x27b1, (q15_t)0xc4cc, (q15_t)0x27a5, (q15_t)0xc4d1, (q15_t)0x2799, (q15_t)0xc4d6, (q15_t)0x278e, (q15_t)0xc4da,
+    (q15_t)0x2782, (q15_t)0xc4df, (q15_t)0x2777, (q15_t)0xc4e4, (q15_t)0x276b, (q15_t)0xc4e9, (q15_t)0x275f, (q15_t)0xc4ee,
+    (q15_t)0x2754, (q15_t)0xc4f2, (q15_t)0x2748, (q15_t)0xc4f7, (q15_t)0x273d, (q15_t)0xc4fc, (q15_t)0x2731, (q15_t)0xc501,
+    (q15_t)0x2725, (q15_t)0xc506, (q15_t)0x271a, (q15_t)0xc50b, (q15_t)0x270e, (q15_t)0xc510, (q15_t)0x2703, (q15_t)0xc515,
+    (q15_t)0x26f7, (q15_t)0xc51a, (q15_t)0x26ec, (q15_t)0xc51e, (q15_t)0x26e0, (q15_t)0xc523, (q15_t)0x26d4, (q15_t)0xc528,
+    (q15_t)0x26c9, (q15_t)0xc52d, (q15_t)0x26bd, (q15_t)0xc532, (q15_t)0x26b2, (q15_t)0xc537, (q15_t)0x26a6, (q15_t)0xc53c,
+    (q15_t)0x269b, (q15_t)0xc541, (q15_t)0x268f, (q15_t)0xc546, (q15_t)0x2684, (q15_t)0xc54b, (q15_t)0x2678, (q15_t)0xc550,
+    (q15_t)0x266d, (q15_t)0xc555, (q15_t)0x2661, (q15_t)0xc55a, (q15_t)0x2656, (q15_t)0xc55f, (q15_t)0x264a, (q15_t)0xc564,
+    (q15_t)0x263f, (q15_t)0xc569, (q15_t)0x2633, (q15_t)0xc56e, (q15_t)0x2628, (q15_t)0xc573, (q15_t)0x261c, (q15_t)0xc578,
+    (q15_t)0x2611, (q15_t)0xc57e, (q15_t)0x2605, (q15_t)0xc583, (q15_t)0x25fa, (q15_t)0xc588, (q15_t)0x25ee, (q15_t)0xc58d,
+    (q15_t)0x25e3, (q15_t)0xc592, (q15_t)0x25d7, (q15_t)0xc597, (q15_t)0x25cc, (q15_t)0xc59c, (q15_t)0x25c0, (q15_t)0xc5a1,
+    (q15_t)0x25b5, (q15_t)0xc5a7, (q15_t)0x25a9, (q15_t)0xc5ac, (q15_t)0x259e, (q15_t)0xc5b1, (q15_t)0x2592, (q15_t)0xc5b6,
+    (q15_t)0x2587, (q15_t)0xc5bb, (q15_t)0x257c, (q15_t)0xc5c1, (q15_t)0x2570, (q15_t)0xc5c6, (q15_t)0x2565, (q15_t)0xc5cb,
+    (q15_t)0x2559, (q15_t)0xc5d0, (q15_t)0x254e, (q15_t)0xc5d5, (q15_t)0x2542, (q15_t)0xc5db, (q15_t)0x2537, (q15_t)0xc5e0,
+    (q15_t)0x252c, (q15_t)0xc5e5, (q15_t)0x2520, (q15_t)0xc5ea, (q15_t)0x2515, (q15_t)0xc5f0, (q15_t)0x2509, (q15_t)0xc5f5,
+    (q15_t)0x24fe, (q15_t)0xc5fa, (q15_t)0x24f3, (q15_t)0xc600, (q15_t)0x24e7, (q15_t)0xc605, (q15_t)0x24dc, (q15_t)0xc60a,
+    (q15_t)0x24d0, (q15_t)0xc610, (q15_t)0x24c5, (q15_t)0xc615, (q15_t)0x24ba, (q15_t)0xc61a, (q15_t)0x24ae, (q15_t)0xc620,
+    (q15_t)0x24a3, (q15_t)0xc625, (q15_t)0x2498, (q15_t)0xc62a, (q15_t)0x248c, (q15_t)0xc630, (q15_t)0x2481, (q15_t)0xc635,
+    (q15_t)0x2476, (q15_t)0xc63b, (q15_t)0x246a, (q15_t)0xc640, (q15_t)0x245f, (q15_t)0xc645, (q15_t)0x2454, (q15_t)0xc64b,
+    (q15_t)0x2448, (q15_t)0xc650, (q15_t)0x243d, (q15_t)0xc656, (q15_t)0x2432, (q15_t)0xc65b, (q15_t)0x2426, (q15_t)0xc661,
+    (q15_t)0x241b, (q15_t)0xc666, (q15_t)0x2410, (q15_t)0xc66c, (q15_t)0x2404, (q15_t)0xc671, (q15_t)0x23f9, (q15_t)0xc677,
+    (q15_t)0x23ee, (q15_t)0xc67c, (q15_t)0x23e2, (q15_t)0xc682, (q15_t)0x23d7, (q15_t)0xc687, (q15_t)0x23cc, (q15_t)0xc68d,
+    (q15_t)0x23c1, (q15_t)0xc692, (q15_t)0x23b5, (q15_t)0xc698, (q15_t)0x23aa, (q15_t)0xc69d, (q15_t)0x239f, (q15_t)0xc6a3,
+    (q15_t)0x2394, (q15_t)0xc6a8, (q15_t)0x2388, (q15_t)0xc6ae, (q15_t)0x237d, (q15_t)0xc6b4, (q15_t)0x2372, (q15_t)0xc6b9,
+    (q15_t)0x2367, (q15_t)0xc6bf, (q15_t)0x235b, (q15_t)0xc6c5, (q15_t)0x2350, (q15_t)0xc6ca, (q15_t)0x2345, (q15_t)0xc6d0,
+    (q15_t)0x233a, (q15_t)0xc6d5, (q15_t)0x232e, (q15_t)0xc6db, (q15_t)0x2323, (q15_t)0xc6e1, (q15_t)0x2318, (q15_t)0xc6e6,
+    (q15_t)0x230d, (q15_t)0xc6ec, (q15_t)0x2301, (q15_t)0xc6f2, (q15_t)0x22f6, (q15_t)0xc6f7, (q15_t)0x22eb, (q15_t)0xc6fd,
+    (q15_t)0x22e0, (q15_t)0xc703, (q15_t)0x22d5, (q15_t)0xc709, (q15_t)0x22ca, (q15_t)0xc70e, (q15_t)0x22be, (q15_t)0xc714,
+    (q15_t)0x22b3, (q15_t)0xc71a, (q15_t)0x22a8, (q15_t)0xc720, (q15_t)0x229d, (q15_t)0xc725, (q15_t)0x2292, (q15_t)0xc72b,
+    (q15_t)0x2287, (q15_t)0xc731, (q15_t)0x227b, (q15_t)0xc737, (q15_t)0x2270, (q15_t)0xc73d, (q15_t)0x2265, (q15_t)0xc742,
+    (q15_t)0x225a, (q15_t)0xc748, (q15_t)0x224f, (q15_t)0xc74e, (q15_t)0x2244, (q15_t)0xc754, (q15_t)0x2239, (q15_t)0xc75a,
+    (q15_t)0x222d, (q15_t)0xc75f, (q15_t)0x2222, (q15_t)0xc765, (q15_t)0x2217, (q15_t)0xc76b, (q15_t)0x220c, (q15_t)0xc771,
+    (q15_t)0x2201, (q15_t)0xc777, (q15_t)0x21f6, (q15_t)0xc77d, (q15_t)0x21eb, (q15_t)0xc783, (q15_t)0x21e0, (q15_t)0xc789,
+    (q15_t)0x21d5, (q15_t)0xc78f, (q15_t)0x21ca, (q15_t)0xc795, (q15_t)0x21be, (q15_t)0xc79a, (q15_t)0x21b3, (q15_t)0xc7a0,
+    (q15_t)0x21a8, (q15_t)0xc7a6, (q15_t)0x219d, (q15_t)0xc7ac, (q15_t)0x2192, (q15_t)0xc7b2, (q15_t)0x2187, (q15_t)0xc7b8,
+    (q15_t)0x217c, (q15_t)0xc7be, (q15_t)0x2171, (q15_t)0xc7c4, (q15_t)0x2166, (q15_t)0xc7ca, (q15_t)0x215b, (q15_t)0xc7d0,
+    (q15_t)0x2150, (q15_t)0xc7d6, (q15_t)0x2145, (q15_t)0xc7dc, (q15_t)0x213a, (q15_t)0xc7e2, (q15_t)0x212f, (q15_t)0xc7e8,
+    (q15_t)0x2124, (q15_t)0xc7ee, (q15_t)0x2119, (q15_t)0xc7f5, (q15_t)0x210e, (q15_t)0xc7fb, (q15_t)0x2103, (q15_t)0xc801,
+    (q15_t)0x20f8, (q15_t)0xc807, (q15_t)0x20ed, (q15_t)0xc80d, (q15_t)0x20e2, (q15_t)0xc813, (q15_t)0x20d7, (q15_t)0xc819,
+    (q15_t)0x20cc, (q15_t)0xc81f, (q15_t)0x20c1, (q15_t)0xc825, (q15_t)0x20b6, (q15_t)0xc82b, (q15_t)0x20ab, (q15_t)0xc832,
+    (q15_t)0x20a0, (q15_t)0xc838, (q15_t)0x2095, (q15_t)0xc83e, (q15_t)0x208a, (q15_t)0xc844, (q15_t)0x207f, (q15_t)0xc84a,
+    (q15_t)0x2074, (q15_t)0xc850, (q15_t)0x2069, (q15_t)0xc857, (q15_t)0x205e, (q15_t)0xc85d, (q15_t)0x2054, (q15_t)0xc863,
+    (q15_t)0x2049, (q15_t)0xc869, (q15_t)0x203e, (q15_t)0xc870, (q15_t)0x2033, (q15_t)0xc876, (q15_t)0x2028, (q15_t)0xc87c,
+    (q15_t)0x201d, (q15_t)0xc882, (q15_t)0x2012, (q15_t)0xc889, (q15_t)0x2007, (q15_t)0xc88f, (q15_t)0x1ffc, (q15_t)0xc895,
+    (q15_t)0x1ff1, (q15_t)0xc89b, (q15_t)0x1fe7, (q15_t)0xc8a2, (q15_t)0x1fdc, (q15_t)0xc8a8, (q15_t)0x1fd1, (q15_t)0xc8ae,
+    (q15_t)0x1fc6, (q15_t)0xc8b5, (q15_t)0x1fbb, (q15_t)0xc8bb, (q15_t)0x1fb0, (q15_t)0xc8c1, (q15_t)0x1fa5, (q15_t)0xc8c8,
+    (q15_t)0x1f9b, (q15_t)0xc8ce, (q15_t)0x1f90, (q15_t)0xc8d4, (q15_t)0x1f85, (q15_t)0xc8db, (q15_t)0x1f7a, (q15_t)0xc8e1,
+    (q15_t)0x1f6f, (q15_t)0xc8e8, (q15_t)0x1f65, (q15_t)0xc8ee, (q15_t)0x1f5a, (q15_t)0xc8f4, (q15_t)0x1f4f, (q15_t)0xc8fb,
+    (q15_t)0x1f44, (q15_t)0xc901, (q15_t)0x1f39, (q15_t)0xc908, (q15_t)0x1f2f, (q15_t)0xc90e, (q15_t)0x1f24, (q15_t)0xc915,
+    (q15_t)0x1f19, (q15_t)0xc91b, (q15_t)0x1f0e, (q15_t)0xc921, (q15_t)0x1f03, (q15_t)0xc928, (q15_t)0x1ef9, (q15_t)0xc92e,
+    (q15_t)0x1eee, (q15_t)0xc935, (q15_t)0x1ee3, (q15_t)0xc93b, (q15_t)0x1ed8, (q15_t)0xc942, (q15_t)0x1ece, (q15_t)0xc948,
+    (q15_t)0x1ec3, (q15_t)0xc94f, (q15_t)0x1eb8, (q15_t)0xc955, (q15_t)0x1ead, (q15_t)0xc95c, (q15_t)0x1ea3, (q15_t)0xc963,
+    (q15_t)0x1e98, (q15_t)0xc969, (q15_t)0x1e8d, (q15_t)0xc970, (q15_t)0x1e83, (q15_t)0xc976, (q15_t)0x1e78, (q15_t)0xc97d,
+    (q15_t)0x1e6d, (q15_t)0xc983, (q15_t)0x1e62, (q15_t)0xc98a, (q15_t)0x1e58, (q15_t)0xc991, (q15_t)0x1e4d, (q15_t)0xc997,
+    (q15_t)0x1e42, (q15_t)0xc99e, (q15_t)0x1e38, (q15_t)0xc9a4, (q15_t)0x1e2d, (q15_t)0xc9ab, (q15_t)0x1e22, (q15_t)0xc9b2,
+    (q15_t)0x1e18, (q15_t)0xc9b8, (q15_t)0x1e0d, (q15_t)0xc9bf, (q15_t)0x1e02, (q15_t)0xc9c6, (q15_t)0x1df8, (q15_t)0xc9cc,
+    (q15_t)0x1ded, (q15_t)0xc9d3, (q15_t)0x1de2, (q15_t)0xc9da, (q15_t)0x1dd8, (q15_t)0xc9e0, (q15_t)0x1dcd, (q15_t)0xc9e7,
+    (q15_t)0x1dc3, (q15_t)0xc9ee, (q15_t)0x1db8, (q15_t)0xc9f5, (q15_t)0x1dad, (q15_t)0xc9fb, (q15_t)0x1da3, (q15_t)0xca02,
+    (q15_t)0x1d98, (q15_t)0xca09, (q15_t)0x1d8e, (q15_t)0xca10, (q15_t)0x1d83, (q15_t)0xca16, (q15_t)0x1d78, (q15_t)0xca1d,
+    (q15_t)0x1d6e, (q15_t)0xca24, (q15_t)0x1d63, (q15_t)0xca2b, (q15_t)0x1d59, (q15_t)0xca32, (q15_t)0x1d4e, (q15_t)0xca38,
+    (q15_t)0x1d44, (q15_t)0xca3f, (q15_t)0x1d39, (q15_t)0xca46, (q15_t)0x1d2e, (q15_t)0xca4d, (q15_t)0x1d24, (q15_t)0xca54,
+    (q15_t)0x1d19, (q15_t)0xca5b, (q15_t)0x1d0f, (q15_t)0xca61, (q15_t)0x1d04, (q15_t)0xca68, (q15_t)0x1cfa, (q15_t)0xca6f,
+    (q15_t)0x1cef, (q15_t)0xca76, (q15_t)0x1ce5, (q15_t)0xca7d, (q15_t)0x1cda, (q15_t)0xca84, (q15_t)0x1cd0, (q15_t)0xca8b,
+    (q15_t)0x1cc5, (q15_t)0xca92, (q15_t)0x1cbb, (q15_t)0xca99, (q15_t)0x1cb0, (q15_t)0xca9f, (q15_t)0x1ca6, (q15_t)0xcaa6,
+    (q15_t)0x1c9b, (q15_t)0xcaad, (q15_t)0x1c91, (q15_t)0xcab4, (q15_t)0x1c86, (q15_t)0xcabb, (q15_t)0x1c7c, (q15_t)0xcac2,
+    (q15_t)0x1c72, (q15_t)0xcac9, (q15_t)0x1c67, (q15_t)0xcad0, (q15_t)0x1c5d, (q15_t)0xcad7, (q15_t)0x1c52, (q15_t)0xcade,
+    (q15_t)0x1c48, (q15_t)0xcae5, (q15_t)0x1c3d, (q15_t)0xcaec, (q15_t)0x1c33, (q15_t)0xcaf3, (q15_t)0x1c29, (q15_t)0xcafa,
+    (q15_t)0x1c1e, (q15_t)0xcb01, (q15_t)0x1c14, (q15_t)0xcb08, (q15_t)0x1c09, (q15_t)0xcb0f, (q15_t)0x1bff, (q15_t)0xcb16,
+    (q15_t)0x1bf5, (q15_t)0xcb1e, (q15_t)0x1bea, (q15_t)0xcb25, (q15_t)0x1be0, (q15_t)0xcb2c, (q15_t)0x1bd5, (q15_t)0xcb33,
+    (q15_t)0x1bcb, (q15_t)0xcb3a, (q15_t)0x1bc1, (q15_t)0xcb41, (q15_t)0x1bb6, (q15_t)0xcb48, (q15_t)0x1bac, (q15_t)0xcb4f,
+    (q15_t)0x1ba2, (q15_t)0xcb56, (q15_t)0x1b97, (q15_t)0xcb5e, (q15_t)0x1b8d, (q15_t)0xcb65, (q15_t)0x1b83, (q15_t)0xcb6c,
+    (q15_t)0x1b78, (q15_t)0xcb73, (q15_t)0x1b6e, (q15_t)0xcb7a, (q15_t)0x1b64, (q15_t)0xcb81, (q15_t)0x1b59, (q15_t)0xcb89,
+    (q15_t)0x1b4f, (q15_t)0xcb90, (q15_t)0x1b45, (q15_t)0xcb97, (q15_t)0x1b3b, (q15_t)0xcb9e, (q15_t)0x1b30, (q15_t)0xcba5,
+    (q15_t)0x1b26, (q15_t)0xcbad, (q15_t)0x1b1c, (q15_t)0xcbb4, (q15_t)0x1b11, (q15_t)0xcbbb, (q15_t)0x1b07, (q15_t)0xcbc2,
+    (q15_t)0x1afd, (q15_t)0xcbca, (q15_t)0x1af3, (q15_t)0xcbd1, (q15_t)0x1ae8, (q15_t)0xcbd8, (q15_t)0x1ade, (q15_t)0xcbe0,
+    (q15_t)0x1ad4, (q15_t)0xcbe7, (q15_t)0x1aca, (q15_t)0xcbee, (q15_t)0x1abf, (q15_t)0xcbf5, (q15_t)0x1ab5, (q15_t)0xcbfd,
+    (q15_t)0x1aab, (q15_t)0xcc04, (q15_t)0x1aa1, (q15_t)0xcc0b, (q15_t)0x1a97, (q15_t)0xcc13, (q15_t)0x1a8c, (q15_t)0xcc1a,
+    (q15_t)0x1a82, (q15_t)0xcc21, (q15_t)0x1a78, (q15_t)0xcc29, (q15_t)0x1a6e, (q15_t)0xcc30, (q15_t)0x1a64, (q15_t)0xcc38,
+    (q15_t)0x1a5a, (q15_t)0xcc3f, (q15_t)0x1a4f, (q15_t)0xcc46, (q15_t)0x1a45, (q15_t)0xcc4e, (q15_t)0x1a3b, (q15_t)0xcc55,
+    (q15_t)0x1a31, (q15_t)0xcc5d, (q15_t)0x1a27, (q15_t)0xcc64, (q15_t)0x1a1d, (q15_t)0xcc6b, (q15_t)0x1a13, (q15_t)0xcc73,
+    (q15_t)0x1a08, (q15_t)0xcc7a, (q15_t)0x19fe, (q15_t)0xcc82, (q15_t)0x19f4, (q15_t)0xcc89, (q15_t)0x19ea, (q15_t)0xcc91,
+    (q15_t)0x19e0, (q15_t)0xcc98, (q15_t)0x19d6, (q15_t)0xcca0, (q15_t)0x19cc, (q15_t)0xcca7, (q15_t)0x19c2, (q15_t)0xccaf,
+    (q15_t)0x19b8, (q15_t)0xccb6, (q15_t)0x19ae, (q15_t)0xccbe, (q15_t)0x19a4, (q15_t)0xccc5, (q15_t)0x199a, (q15_t)0xcccd,
+    (q15_t)0x198f, (q15_t)0xccd4, (q15_t)0x1985, (q15_t)0xccdc, (q15_t)0x197b, (q15_t)0xcce3, (q15_t)0x1971, (q15_t)0xcceb,
+    (q15_t)0x1967, (q15_t)0xccf3, (q15_t)0x195d, (q15_t)0xccfa, (q15_t)0x1953, (q15_t)0xcd02, (q15_t)0x1949, (q15_t)0xcd09,
+    (q15_t)0x193f, (q15_t)0xcd11, (q15_t)0x1935, (q15_t)0xcd19, (q15_t)0x192b, (q15_t)0xcd20, (q15_t)0x1921, (q15_t)0xcd28,
+    (q15_t)0x1917, (q15_t)0xcd30, (q15_t)0x190d, (q15_t)0xcd37, (q15_t)0x1903, (q15_t)0xcd3f, (q15_t)0x18f9, (q15_t)0xcd46,
+    (q15_t)0x18ef, (q15_t)0xcd4e, (q15_t)0x18e6, (q15_t)0xcd56, (q15_t)0x18dc, (q15_t)0xcd5d, (q15_t)0x18d2, (q15_t)0xcd65,
+    (q15_t)0x18c8, (q15_t)0xcd6d, (q15_t)0x18be, (q15_t)0xcd75, (q15_t)0x18b4, (q15_t)0xcd7c, (q15_t)0x18aa, (q15_t)0xcd84,
+    (q15_t)0x18a0, (q15_t)0xcd8c, (q15_t)0x1896, (q15_t)0xcd93, (q15_t)0x188c, (q15_t)0xcd9b, (q15_t)0x1882, (q15_t)0xcda3,
+    (q15_t)0x1878, (q15_t)0xcdab, (q15_t)0x186f, (q15_t)0xcdb2, (q15_t)0x1865, (q15_t)0xcdba, (q15_t)0x185b, (q15_t)0xcdc2,
+    (q15_t)0x1851, (q15_t)0xcdca, (q15_t)0x1847, (q15_t)0xcdd2, (q15_t)0x183d, (q15_t)0xcdd9, (q15_t)0x1833, (q15_t)0xcde1,
+    (q15_t)0x182a, (q15_t)0xcde9, (q15_t)0x1820, (q15_t)0xcdf1, (q15_t)0x1816, (q15_t)0xcdf9, (q15_t)0x180c, (q15_t)0xce01,
+    (q15_t)0x1802, (q15_t)0xce08, (q15_t)0x17f8, (q15_t)0xce10, (q15_t)0x17ef, (q15_t)0xce18, (q15_t)0x17e5, (q15_t)0xce20,
+    (q15_t)0x17db, (q15_t)0xce28, (q15_t)0x17d1, (q15_t)0xce30, (q15_t)0x17c8, (q15_t)0xce38, (q15_t)0x17be, (q15_t)0xce40,
+    (q15_t)0x17b4, (q15_t)0xce47, (q15_t)0x17aa, (q15_t)0xce4f, (q15_t)0x17a0, (q15_t)0xce57, (q15_t)0x1797, (q15_t)0xce5f,
+    (q15_t)0x178d, (q15_t)0xce67, (q15_t)0x1783, (q15_t)0xce6f, (q15_t)0x177a, (q15_t)0xce77, (q15_t)0x1770, (q15_t)0xce7f,
+    (q15_t)0x1766, (q15_t)0xce87, (q15_t)0x175c, (q15_t)0xce8f, (q15_t)0x1753, (q15_t)0xce97, (q15_t)0x1749, (q15_t)0xce9f,
+    (q15_t)0x173f, (q15_t)0xcea7, (q15_t)0x1736, (q15_t)0xceaf, (q15_t)0x172c, (q15_t)0xceb7, (q15_t)0x1722, (q15_t)0xcebf,
+    (q15_t)0x1719, (q15_t)0xcec7, (q15_t)0x170f, (q15_t)0xcecf, (q15_t)0x1705, (q15_t)0xced7, (q15_t)0x16fc, (q15_t)0xcedf,
+    (q15_t)0x16f2, (q15_t)0xcee7, (q15_t)0x16e8, (q15_t)0xceef, (q15_t)0x16df, (q15_t)0xcef7, (q15_t)0x16d5, (q15_t)0xceff,
+    (q15_t)0x16cb, (q15_t)0xcf07, (q15_t)0x16c2, (q15_t)0xcf10, (q15_t)0x16b8, (q15_t)0xcf18, (q15_t)0x16af, (q15_t)0xcf20,
+    (q15_t)0x16a5, (q15_t)0xcf28, (q15_t)0x169b, (q15_t)0xcf30, (q15_t)0x1692, (q15_t)0xcf38, (q15_t)0x1688, (q15_t)0xcf40,
+    (q15_t)0x167f, (q15_t)0xcf48, (q15_t)0x1675, (q15_t)0xcf51, (q15_t)0x166c, (q15_t)0xcf59, (q15_t)0x1662, (q15_t)0xcf61,
+    (q15_t)0x1659, (q15_t)0xcf69, (q15_t)0x164f, (q15_t)0xcf71, (q15_t)0x1645, (q15_t)0xcf79, (q15_t)0x163c, (q15_t)0xcf82,
+    (q15_t)0x1632, (q15_t)0xcf8a, (q15_t)0x1629, (q15_t)0xcf92, (q15_t)0x161f, (q15_t)0xcf9a, (q15_t)0x1616, (q15_t)0xcfa3,
+    (q15_t)0x160c, (q15_t)0xcfab, (q15_t)0x1603, (q15_t)0xcfb3, (q15_t)0x15f9, (q15_t)0xcfbb, (q15_t)0x15f0, (q15_t)0xcfc4,
+    (q15_t)0x15e6, (q15_t)0xcfcc, (q15_t)0x15dd, (q15_t)0xcfd4, (q15_t)0x15d4, (q15_t)0xcfdc, (q15_t)0x15ca, (q15_t)0xcfe5,
+    (q15_t)0x15c1, (q15_t)0xcfed, (q15_t)0x15b7, (q15_t)0xcff5, (q15_t)0x15ae, (q15_t)0xcffe, (q15_t)0x15a4, (q15_t)0xd006,
+    (q15_t)0x159b, (q15_t)0xd00e, (q15_t)0x1592, (q15_t)0xd016, (q15_t)0x1588, (q15_t)0xd01f, (q15_t)0x157f, (q15_t)0xd027,
+    (q15_t)0x1575, (q15_t)0xd030, (q15_t)0x156c, (q15_t)0xd038, (q15_t)0x1563, (q15_t)0xd040, (q15_t)0x1559, (q15_t)0xd049,
+    (q15_t)0x1550, (q15_t)0xd051, (q15_t)0x1547, (q15_t)0xd059, (q15_t)0x153d, (q15_t)0xd062, (q15_t)0x1534, (q15_t)0xd06a,
+    (q15_t)0x152a, (q15_t)0xd073, (q15_t)0x1521, (q15_t)0xd07b, (q15_t)0x1518, (q15_t)0xd083, (q15_t)0x150e, (q15_t)0xd08c,
+    (q15_t)0x1505, (q15_t)0xd094, (q15_t)0x14fc, (q15_t)0xd09d, (q15_t)0x14f3, (q15_t)0xd0a5, (q15_t)0x14e9, (q15_t)0xd0ae,
+    (q15_t)0x14e0, (q15_t)0xd0b6, (q15_t)0x14d7, (q15_t)0xd0bf, (q15_t)0x14cd, (q15_t)0xd0c7, (q15_t)0x14c4, (q15_t)0xd0d0,
+    (q15_t)0x14bb, (q15_t)0xd0d8, (q15_t)0x14b2, (q15_t)0xd0e0, (q15_t)0x14a8, (q15_t)0xd0e9, (q15_t)0x149f, (q15_t)0xd0f2,
+    (q15_t)0x1496, (q15_t)0xd0fa, (q15_t)0x148d, (q15_t)0xd103, (q15_t)0x1483, (q15_t)0xd10b, (q15_t)0x147a, (q15_t)0xd114,
+    (q15_t)0x1471, (q15_t)0xd11c, (q15_t)0x1468, (q15_t)0xd125, (q15_t)0x145f, (q15_t)0xd12d, (q15_t)0x1455, (q15_t)0xd136,
+    (q15_t)0x144c, (q15_t)0xd13e, (q15_t)0x1443, (q15_t)0xd147, (q15_t)0x143a, (q15_t)0xd150, (q15_t)0x1431, (q15_t)0xd158,
+    (q15_t)0x1428, (q15_t)0xd161, (q15_t)0x141e, (q15_t)0xd169, (q15_t)0x1415, (q15_t)0xd172, (q15_t)0x140c, (q15_t)0xd17b,
+    (q15_t)0x1403, (q15_t)0xd183, (q15_t)0x13fa, (q15_t)0xd18c, (q15_t)0x13f1, (q15_t)0xd195, (q15_t)0x13e8, (q15_t)0xd19d,
+    (q15_t)0x13df, (q15_t)0xd1a6, (q15_t)0x13d5, (q15_t)0xd1af, (q15_t)0x13cc, (q15_t)0xd1b7, (q15_t)0x13c3, (q15_t)0xd1c0,
+    (q15_t)0x13ba, (q15_t)0xd1c9, (q15_t)0x13b1, (q15_t)0xd1d1, (q15_t)0x13a8, (q15_t)0xd1da, (q15_t)0x139f, (q15_t)0xd1e3,
+    (q15_t)0x1396, (q15_t)0xd1eb, (q15_t)0x138d, (q15_t)0xd1f4, (q15_t)0x1384, (q15_t)0xd1fd, (q15_t)0x137b, (q15_t)0xd206,
+    (q15_t)0x1372, (q15_t)0xd20e, (q15_t)0x1369, (q15_t)0xd217, (q15_t)0x1360, (q15_t)0xd220, (q15_t)0x1357, (q15_t)0xd229,
+    (q15_t)0x134e, (q15_t)0xd231, (q15_t)0x1345, (q15_t)0xd23a, (q15_t)0x133c, (q15_t)0xd243, (q15_t)0x1333, (q15_t)0xd24c,
+    (q15_t)0x132a, (q15_t)0xd255, (q15_t)0x1321, (q15_t)0xd25d, (q15_t)0x1318, (q15_t)0xd266, (q15_t)0x130f, (q15_t)0xd26f,
+    (q15_t)0x1306, (q15_t)0xd278, (q15_t)0x12fd, (q15_t)0xd281, (q15_t)0x12f4, (q15_t)0xd28a, (q15_t)0x12eb, (q15_t)0xd292,
+    (q15_t)0x12e2, (q15_t)0xd29b, (q15_t)0x12d9, (q15_t)0xd2a4, (q15_t)0x12d1, (q15_t)0xd2ad, (q15_t)0x12c8, (q15_t)0xd2b6,
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+    (q15_t)0x129b, (q15_t)0xd2e2, (q15_t)0x1292, (q15_t)0xd2eb, (q15_t)0x128a, (q15_t)0xd2f4, (q15_t)0x1281, (q15_t)0xd2fd,
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+    (q15_t)0x1231, (q15_t)0xd34e, (q15_t)0x1229, (q15_t)0xd357, (q15_t)0x1220, (q15_t)0xd360, (q15_t)0x1217, (q15_t)0xd369,
+    (q15_t)0x120e, (q15_t)0xd372, (q15_t)0x1206, (q15_t)0xd37b, (q15_t)0x11fd, (q15_t)0xd384, (q15_t)0x11f4, (q15_t)0xd38d,
+    (q15_t)0x11eb, (q15_t)0xd396, (q15_t)0x11e3, (q15_t)0xd39f, (q15_t)0x11da, (q15_t)0xd3a8, (q15_t)0x11d1, (q15_t)0xd3b1,
+    (q15_t)0x11c9, (q15_t)0xd3ba, (q15_t)0x11c0, (q15_t)0xd3c3, (q15_t)0x11b7, (q15_t)0xd3cc, (q15_t)0x11af, (q15_t)0xd3d5,
+    (q15_t)0x11a6, (q15_t)0xd3df, (q15_t)0x119d, (q15_t)0xd3e8, (q15_t)0x1195, (q15_t)0xd3f1, (q15_t)0x118c, (q15_t)0xd3fa,
+    (q15_t)0x1183, (q15_t)0xd403, (q15_t)0x117b, (q15_t)0xd40c, (q15_t)0x1172, (q15_t)0xd415, (q15_t)0x1169, (q15_t)0xd41e,
+    (q15_t)0x1161, (q15_t)0xd428, (q15_t)0x1158, (q15_t)0xd431, (q15_t)0x1150, (q15_t)0xd43a, (q15_t)0x1147, (q15_t)0xd443,
+    (q15_t)0x113e, (q15_t)0xd44c, (q15_t)0x1136, (q15_t)0xd455, (q15_t)0x112d, (q15_t)0xd45f, (q15_t)0x1125, (q15_t)0xd468,
+    (q15_t)0x111c, (q15_t)0xd471, (q15_t)0x1114, (q15_t)0xd47a, (q15_t)0x110b, (q15_t)0xd483, (q15_t)0x1103, (q15_t)0xd48d,
+    (q15_t)0x10fa, (q15_t)0xd496, (q15_t)0x10f2, (q15_t)0xd49f, (q15_t)0x10e9, (q15_t)0xd4a8, (q15_t)0x10e0, (q15_t)0xd4b2,
+    (q15_t)0x10d8, (q15_t)0xd4bb, (q15_t)0x10d0, (q15_t)0xd4c4, (q15_t)0x10c7, (q15_t)0xd4cd, (q15_t)0x10bf, (q15_t)0xd4d7,
+    (q15_t)0x10b6, (q15_t)0xd4e0, (q15_t)0x10ae, (q15_t)0xd4e9, (q15_t)0x10a5, (q15_t)0xd4f3, (q15_t)0x109d, (q15_t)0xd4fc,
+    (q15_t)0x1094, (q15_t)0xd505, (q15_t)0x108c, (q15_t)0xd50e, (q15_t)0x1083, (q15_t)0xd518, (q15_t)0x107b, (q15_t)0xd521,
+    (q15_t)0x1073, (q15_t)0xd52a, (q15_t)0x106a, (q15_t)0xd534, (q15_t)0x1062, (q15_t)0xd53d, (q15_t)0x1059, (q15_t)0xd547,
+    (q15_t)0x1051, (q15_t)0xd550, (q15_t)0x1049, (q15_t)0xd559, (q15_t)0x1040, (q15_t)0xd563, (q15_t)0x1038, (q15_t)0xd56c,
+    (q15_t)0x1030, (q15_t)0xd575, (q15_t)0x1027, (q15_t)0xd57f, (q15_t)0x101f, (q15_t)0xd588, (q15_t)0x1016, (q15_t)0xd592,
+    (q15_t)0x100e, (q15_t)0xd59b, (q15_t)0x1006, (q15_t)0xd5a4, (q15_t)0xffe, (q15_t)0xd5ae, (q15_t)0xff5, (q15_t)0xd5b7,
+    (q15_t)0xfed, (q15_t)0xd5c1, (q15_t)0xfe5, (q15_t)0xd5ca, (q15_t)0xfdc, (q15_t)0xd5d4, (q15_t)0xfd4, (q15_t)0xd5dd,
+    (q15_t)0xfcc, (q15_t)0xd5e6, (q15_t)0xfc4, (q15_t)0xd5f0, (q15_t)0xfbb, (q15_t)0xd5f9, (q15_t)0xfb3, (q15_t)0xd603,
+    (q15_t)0xfab, (q15_t)0xd60c, (q15_t)0xfa3, (q15_t)0xd616, (q15_t)0xf9a, (q15_t)0xd61f, (q15_t)0xf92, (q15_t)0xd629,
+    (q15_t)0xf8a, (q15_t)0xd632, (q15_t)0xf82, (q15_t)0xd63c, (q15_t)0xf79, (q15_t)0xd645, (q15_t)0xf71, (q15_t)0xd64f,
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+    (q15_t)0xf48, (q15_t)0xd67f, (q15_t)0xf40, (q15_t)0xd688, (q15_t)0xf38, (q15_t)0xd692, (q15_t)0xf30, (q15_t)0xd69b,
+    (q15_t)0xf28, (q15_t)0xd6a5, (q15_t)0xf20, (q15_t)0xd6af, (q15_t)0xf18, (q15_t)0xd6b8, (q15_t)0xf10, (q15_t)0xd6c2,
+    (q15_t)0xf07, (q15_t)0xd6cb, (q15_t)0xeff, (q15_t)0xd6d5, (q15_t)0xef7, (q15_t)0xd6df, (q15_t)0xeef, (q15_t)0xd6e8,
+    (q15_t)0xee7, (q15_t)0xd6f2, (q15_t)0xedf, (q15_t)0xd6fc, (q15_t)0xed7, (q15_t)0xd705, (q15_t)0xecf, (q15_t)0xd70f,
+    (q15_t)0xec7, (q15_t)0xd719, (q15_t)0xebf, (q15_t)0xd722, (q15_t)0xeb7, (q15_t)0xd72c, (q15_t)0xeaf, (q15_t)0xd736,
+    (q15_t)0xea7, (q15_t)0xd73f, (q15_t)0xe9f, (q15_t)0xd749, (q15_t)0xe97, (q15_t)0xd753, (q15_t)0xe8f, (q15_t)0xd75c,
+    (q15_t)0xe87, (q15_t)0xd766, (q15_t)0xe7f, (q15_t)0xd770, (q15_t)0xe77, (q15_t)0xd77a, (q15_t)0xe6f, (q15_t)0xd783,
+    (q15_t)0xe67, (q15_t)0xd78d, (q15_t)0xe5f, (q15_t)0xd797, (q15_t)0xe57, (q15_t)0xd7a0, (q15_t)0xe4f, (q15_t)0xd7aa,
+    (q15_t)0xe47, (q15_t)0xd7b4, (q15_t)0xe40, (q15_t)0xd7be, (q15_t)0xe38, (q15_t)0xd7c8, (q15_t)0xe30, (q15_t)0xd7d1,
+    (q15_t)0xe28, (q15_t)0xd7db, (q15_t)0xe20, (q15_t)0xd7e5, (q15_t)0xe18, (q15_t)0xd7ef, (q15_t)0xe10, (q15_t)0xd7f8,
+    (q15_t)0xe08, (q15_t)0xd802, (q15_t)0xe01, (q15_t)0xd80c, (q15_t)0xdf9, (q15_t)0xd816, (q15_t)0xdf1, (q15_t)0xd820,
+    (q15_t)0xde9, (q15_t)0xd82a, (q15_t)0xde1, (q15_t)0xd833, (q15_t)0xdd9, (q15_t)0xd83d, (q15_t)0xdd2, (q15_t)0xd847,
+    (q15_t)0xdca, (q15_t)0xd851, (q15_t)0xdc2, (q15_t)0xd85b, (q15_t)0xdba, (q15_t)0xd865, (q15_t)0xdb2, (q15_t)0xd86f,
+    (q15_t)0xdab, (q15_t)0xd878, (q15_t)0xda3, (q15_t)0xd882, (q15_t)0xd9b, (q15_t)0xd88c, (q15_t)0xd93, (q15_t)0xd896,
+    (q15_t)0xd8c, (q15_t)0xd8a0, (q15_t)0xd84, (q15_t)0xd8aa, (q15_t)0xd7c, (q15_t)0xd8b4, (q15_t)0xd75, (q15_t)0xd8be,
+    (q15_t)0xd6d, (q15_t)0xd8c8, (q15_t)0xd65, (q15_t)0xd8d2, (q15_t)0xd5d, (q15_t)0xd8dc, (q15_t)0xd56, (q15_t)0xd8e6,
+    (q15_t)0xd4e, (q15_t)0xd8ef, (q15_t)0xd46, (q15_t)0xd8f9, (q15_t)0xd3f, (q15_t)0xd903, (q15_t)0xd37, (q15_t)0xd90d,
+    (q15_t)0xd30, (q15_t)0xd917, (q15_t)0xd28, (q15_t)0xd921, (q15_t)0xd20, (q15_t)0xd92b, (q15_t)0xd19, (q15_t)0xd935,
+    (q15_t)0xd11, (q15_t)0xd93f, (q15_t)0xd09, (q15_t)0xd949, (q15_t)0xd02, (q15_t)0xd953, (q15_t)0xcfa, (q15_t)0xd95d,
+    (q15_t)0xcf3, (q15_t)0xd967, (q15_t)0xceb, (q15_t)0xd971, (q15_t)0xce3, (q15_t)0xd97b, (q15_t)0xcdc, (q15_t)0xd985,
+    (q15_t)0xcd4, (q15_t)0xd98f, (q15_t)0xccd, (q15_t)0xd99a, (q15_t)0xcc5, (q15_t)0xd9a4, (q15_t)0xcbe, (q15_t)0xd9ae,
+    (q15_t)0xcb6, (q15_t)0xd9b8, (q15_t)0xcaf, (q15_t)0xd9c2, (q15_t)0xca7, (q15_t)0xd9cc, (q15_t)0xca0, (q15_t)0xd9d6,
+    (q15_t)0xc98, (q15_t)0xd9e0, (q15_t)0xc91, (q15_t)0xd9ea, (q15_t)0xc89, (q15_t)0xd9f4, (q15_t)0xc82, (q15_t)0xd9fe,
+    (q15_t)0xc7a, (q15_t)0xda08, (q15_t)0xc73, (q15_t)0xda13, (q15_t)0xc6b, (q15_t)0xda1d, (q15_t)0xc64, (q15_t)0xda27,
+    (q15_t)0xc5d, (q15_t)0xda31, (q15_t)0xc55, (q15_t)0xda3b, (q15_t)0xc4e, (q15_t)0xda45, (q15_t)0xc46, (q15_t)0xda4f,
+    (q15_t)0xc3f, (q15_t)0xda5a, (q15_t)0xc38, (q15_t)0xda64, (q15_t)0xc30, (q15_t)0xda6e, (q15_t)0xc29, (q15_t)0xda78,
+    (q15_t)0xc21, (q15_t)0xda82, (q15_t)0xc1a, (q15_t)0xda8c, (q15_t)0xc13, (q15_t)0xda97, (q15_t)0xc0b, (q15_t)0xdaa1,
+    (q15_t)0xc04, (q15_t)0xdaab, (q15_t)0xbfd, (q15_t)0xdab5, (q15_t)0xbf5, (q15_t)0xdabf, (q15_t)0xbee, (q15_t)0xdaca,
+    (q15_t)0xbe7, (q15_t)0xdad4, (q15_t)0xbe0, (q15_t)0xdade, (q15_t)0xbd8, (q15_t)0xdae8, (q15_t)0xbd1, (q15_t)0xdaf3,
+    (q15_t)0xbca, (q15_t)0xdafd, (q15_t)0xbc2, (q15_t)0xdb07, (q15_t)0xbbb, (q15_t)0xdb11, (q15_t)0xbb4, (q15_t)0xdb1c,
+    (q15_t)0xbad, (q15_t)0xdb26, (q15_t)0xba5, (q15_t)0xdb30, (q15_t)0xb9e, (q15_t)0xdb3b, (q15_t)0xb97, (q15_t)0xdb45,
+    (q15_t)0xb90, (q15_t)0xdb4f, (q15_t)0xb89, (q15_t)0xdb59, (q15_t)0xb81, (q15_t)0xdb64, (q15_t)0xb7a, (q15_t)0xdb6e,
+    (q15_t)0xb73, (q15_t)0xdb78, (q15_t)0xb6c, (q15_t)0xdb83, (q15_t)0xb65, (q15_t)0xdb8d, (q15_t)0xb5e, (q15_t)0xdb97,
+    (q15_t)0xb56, (q15_t)0xdba2, (q15_t)0xb4f, (q15_t)0xdbac, (q15_t)0xb48, (q15_t)0xdbb6, (q15_t)0xb41, (q15_t)0xdbc1,
+    (q15_t)0xb3a, (q15_t)0xdbcb, (q15_t)0xb33, (q15_t)0xdbd5, (q15_t)0xb2c, (q15_t)0xdbe0, (q15_t)0xb25, (q15_t)0xdbea,
+    (q15_t)0xb1e, (q15_t)0xdbf5, (q15_t)0xb16, (q15_t)0xdbff, (q15_t)0xb0f, (q15_t)0xdc09, (q15_t)0xb08, (q15_t)0xdc14,
+    (q15_t)0xb01, (q15_t)0xdc1e, (q15_t)0xafa, (q15_t)0xdc29, (q15_t)0xaf3, (q15_t)0xdc33, (q15_t)0xaec, (q15_t)0xdc3d,
+    (q15_t)0xae5, (q15_t)0xdc48, (q15_t)0xade, (q15_t)0xdc52, (q15_t)0xad7, (q15_t)0xdc5d, (q15_t)0xad0, (q15_t)0xdc67,
+    (q15_t)0xac9, (q15_t)0xdc72, (q15_t)0xac2, (q15_t)0xdc7c, (q15_t)0xabb, (q15_t)0xdc86, (q15_t)0xab4, (q15_t)0xdc91,
+    (q15_t)0xaad, (q15_t)0xdc9b, (q15_t)0xaa6, (q15_t)0xdca6, (q15_t)0xa9f, (q15_t)0xdcb0, (q15_t)0xa99, (q15_t)0xdcbb,
+    (q15_t)0xa92, (q15_t)0xdcc5, (q15_t)0xa8b, (q15_t)0xdcd0, (q15_t)0xa84, (q15_t)0xdcda, (q15_t)0xa7d, (q15_t)0xdce5,
+    (q15_t)0xa76, (q15_t)0xdcef, (q15_t)0xa6f, (q15_t)0xdcfa, (q15_t)0xa68, (q15_t)0xdd04, (q15_t)0xa61, (q15_t)0xdd0f,
+    (q15_t)0xa5b, (q15_t)0xdd19, (q15_t)0xa54, (q15_t)0xdd24, (q15_t)0xa4d, (q15_t)0xdd2e, (q15_t)0xa46, (q15_t)0xdd39,
+    (q15_t)0xa3f, (q15_t)0xdd44, (q15_t)0xa38, (q15_t)0xdd4e, (q15_t)0xa32, (q15_t)0xdd59, (q15_t)0xa2b, (q15_t)0xdd63,
+    (q15_t)0xa24, (q15_t)0xdd6e, (q15_t)0xa1d, (q15_t)0xdd78, (q15_t)0xa16, (q15_t)0xdd83, (q15_t)0xa10, (q15_t)0xdd8e,
+    (q15_t)0xa09, (q15_t)0xdd98, (q15_t)0xa02, (q15_t)0xdda3, (q15_t)0x9fb, (q15_t)0xddad, (q15_t)0x9f5, (q15_t)0xddb8,
+    (q15_t)0x9ee, (q15_t)0xddc3, (q15_t)0x9e7, (q15_t)0xddcd, (q15_t)0x9e0, (q15_t)0xddd8, (q15_t)0x9da, (q15_t)0xdde2,
+    (q15_t)0x9d3, (q15_t)0xdded, (q15_t)0x9cc, (q15_t)0xddf8, (q15_t)0x9c6, (q15_t)0xde02, (q15_t)0x9bf, (q15_t)0xde0d,
+    (q15_t)0x9b8, (q15_t)0xde18, (q15_t)0x9b2, (q15_t)0xde22, (q15_t)0x9ab, (q15_t)0xde2d, (q15_t)0x9a4, (q15_t)0xde38,
+    (q15_t)0x99e, (q15_t)0xde42, (q15_t)0x997, (q15_t)0xde4d, (q15_t)0x991, (q15_t)0xde58, (q15_t)0x98a, (q15_t)0xde62,
+    (q15_t)0x983, (q15_t)0xde6d, (q15_t)0x97d, (q15_t)0xde78, (q15_t)0x976, (q15_t)0xde83, (q15_t)0x970, (q15_t)0xde8d,
+    (q15_t)0x969, (q15_t)0xde98, (q15_t)0x963, (q15_t)0xdea3, (q15_t)0x95c, (q15_t)0xdead, (q15_t)0x955, (q15_t)0xdeb8,
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+    (q15_t)0x91b, (q15_t)0xdf19, (q15_t)0x915, (q15_t)0xdf24, (q15_t)0x90e, (q15_t)0xdf2f, (q15_t)0x908, (q15_t)0xdf39,
+    (q15_t)0x901, (q15_t)0xdf44, (q15_t)0x8fb, (q15_t)0xdf4f, (q15_t)0x8f4, (q15_t)0xdf5a, (q15_t)0x8ee, (q15_t)0xdf65,
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+    (q15_t)0x869, (q15_t)0xe049, (q15_t)0x863, (q15_t)0xe054, (q15_t)0x85d, (q15_t)0xe05e, (q15_t)0x857, (q15_t)0xe069,
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+    (q15_t)0x7d6, (q15_t)0xe150, (q15_t)0x7d0, (q15_t)0xe15b, (q15_t)0x7ca, (q15_t)0xe166, (q15_t)0x7c4, (q15_t)0xe171,
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+    (q15_t)0x71a, (q15_t)0xe2b3, (q15_t)0x714, (q15_t)0xe2be, (q15_t)0x70e, (q15_t)0xe2ca, (q15_t)0x709, (q15_t)0xe2d5,
+    (q15_t)0x703, (q15_t)0xe2e0, (q15_t)0x6fd, (q15_t)0xe2eb, (q15_t)0x6f7, (q15_t)0xe2f6, (q15_t)0x6f2, (q15_t)0xe301,
+    (q15_t)0x6ec, (q15_t)0xe30d, (q15_t)0x6e6, (q15_t)0xe318, (q15_t)0x6e1, (q15_t)0xe323, (q15_t)0x6db, (q15_t)0xe32e,
+    (q15_t)0x6d5, (q15_t)0xe33a, (q15_t)0x6d0, (q15_t)0xe345, (q15_t)0x6ca, (q15_t)0xe350, (q15_t)0x6c5, (q15_t)0xe35b,
+    (q15_t)0x6bf, (q15_t)0xe367, (q15_t)0x6b9, (q15_t)0xe372, (q15_t)0x6b4, (q15_t)0xe37d, (q15_t)0x6ae, (q15_t)0xe388,
+    (q15_t)0x6a8, (q15_t)0xe394, (q15_t)0x6a3, (q15_t)0xe39f, (q15_t)0x69d, (q15_t)0xe3aa, (q15_t)0x698, (q15_t)0xe3b5,
+    (q15_t)0x692, (q15_t)0xe3c1, (q15_t)0x68d, (q15_t)0xe3cc, (q15_t)0x687, (q15_t)0xe3d7, (q15_t)0x682, (q15_t)0xe3e2,
+    (q15_t)0x67c, (q15_t)0xe3ee, (q15_t)0x677, (q15_t)0xe3f9, (q15_t)0x671, (q15_t)0xe404, (q15_t)0x66c, (q15_t)0xe410,
+    (q15_t)0x666, (q15_t)0xe41b, (q15_t)0x661, (q15_t)0xe426, (q15_t)0x65b, (q15_t)0xe432, (q15_t)0x656, (q15_t)0xe43d,
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+    (q15_t)0x63b, (q15_t)0xe476, (q15_t)0x635, (q15_t)0xe481, (q15_t)0x630, (q15_t)0xe48c, (q15_t)0x62a, (q15_t)0xe498,
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+    (q15_t)0x610, (q15_t)0xe4d0, (q15_t)0x60a, (q15_t)0xe4dc, (q15_t)0x605, (q15_t)0xe4e7, (q15_t)0x600, (q15_t)0xe4f3,
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+    (q15_t)0x5e5, (q15_t)0xe52c, (q15_t)0x5e0, (q15_t)0xe537, (q15_t)0x5db, (q15_t)0xe542, (q15_t)0x5d5, (q15_t)0xe54e,
+    (q15_t)0x5d0, (q15_t)0xe559, (q15_t)0x5cb, (q15_t)0xe565, (q15_t)0x5c6, (q15_t)0xe570, (q15_t)0x5c1, (q15_t)0xe57c,
+    (q15_t)0x5bb, (q15_t)0xe587, (q15_t)0x5b6, (q15_t)0xe592, (q15_t)0x5b1, (q15_t)0xe59e, (q15_t)0x5ac, (q15_t)0xe5a9,
+    (q15_t)0x5a7, (q15_t)0xe5b5, (q15_t)0x5a1, (q15_t)0xe5c0, (q15_t)0x59c, (q15_t)0xe5cc, (q15_t)0x597, (q15_t)0xe5d7,
+    (q15_t)0x592, (q15_t)0xe5e3, (q15_t)0x58d, (q15_t)0xe5ee, (q15_t)0x588, (q15_t)0xe5fa, (q15_t)0x583, (q15_t)0xe605,
+    (q15_t)0x57e, (q15_t)0xe611, (q15_t)0x578, (q15_t)0xe61c, (q15_t)0x573, (q15_t)0xe628, (q15_t)0x56e, (q15_t)0xe633,
+    (q15_t)0x569, (q15_t)0xe63f, (q15_t)0x564, (q15_t)0xe64a, (q15_t)0x55f, (q15_t)0xe656, (q15_t)0x55a, (q15_t)0xe661,
+    (q15_t)0x555, (q15_t)0xe66d, (q15_t)0x550, (q15_t)0xe678, (q15_t)0x54b, (q15_t)0xe684, (q15_t)0x546, (q15_t)0xe68f,
+    (q15_t)0x541, (q15_t)0xe69b, (q15_t)0x53c, (q15_t)0xe6a6, (q15_t)0x537, (q15_t)0xe6b2, (q15_t)0x532, (q15_t)0xe6bd,
+    (q15_t)0x52d, (q15_t)0xe6c9, (q15_t)0x528, (q15_t)0xe6d4, (q15_t)0x523, (q15_t)0xe6e0, (q15_t)0x51e, (q15_t)0xe6ec,
+    (q15_t)0x51a, (q15_t)0xe6f7, (q15_t)0x515, (q15_t)0xe703, (q15_t)0x510, (q15_t)0xe70e, (q15_t)0x50b, (q15_t)0xe71a,
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+    (q15_t)0x7b, (q15_t)0xf82a, (q15_t)0x7a, (q15_t)0xf837, (q15_t)0x78, (q15_t)0xf843, (q15_t)0x77, (q15_t)0xf850,
+    (q15_t)0x75, (q15_t)0xf85c, (q15_t)0x74, (q15_t)0xf869, (q15_t)0x72, (q15_t)0xf875, (q15_t)0x71, (q15_t)0xf882,
+    (q15_t)0x6f, (q15_t)0xf88e, (q15_t)0x6e, (q15_t)0xf89b, (q15_t)0x6c, (q15_t)0xf8a7, (q15_t)0x6b, (q15_t)0xf8b4,
+    (q15_t)0x69, (q15_t)0xf8c0, (q15_t)0x68, (q15_t)0xf8cd, (q15_t)0x67, (q15_t)0xf8d9, (q15_t)0x65, (q15_t)0xf8e6,
+    (q15_t)0x64, (q15_t)0xf8f2, (q15_t)0x62, (q15_t)0xf8ff, (q15_t)0x61, (q15_t)0xf90b, (q15_t)0x60, (q15_t)0xf918,
+    (q15_t)0x5e, (q15_t)0xf924, (q15_t)0x5d, (q15_t)0xf931, (q15_t)0x5c, (q15_t)0xf93d, (q15_t)0x5a, (q15_t)0xf94a,
+    (q15_t)0x59, (q15_t)0xf956, (q15_t)0x58, (q15_t)0xf963, (q15_t)0x56, (q15_t)0xf96f, (q15_t)0x55, (q15_t)0xf97c,
+    (q15_t)0x54, (q15_t)0xf988, (q15_t)0x53, (q15_t)0xf995, (q15_t)0x51, (q15_t)0xf9a1, (q15_t)0x50, (q15_t)0xf9ae,
+    (q15_t)0x4f, (q15_t)0xf9ba, (q15_t)0x4e, (q15_t)0xf9c7, (q15_t)0x4c, (q15_t)0xf9d3, (q15_t)0x4b, (q15_t)0xf9e0,
+    (q15_t)0x4a, (q15_t)0xf9ec, (q15_t)0x49, (q15_t)0xf9f9, (q15_t)0x48, (q15_t)0xfa05, (q15_t)0x47, (q15_t)0xfa12,
+    (q15_t)0x45, (q15_t)0xfa1e, (q15_t)0x44, (q15_t)0xfa2b, (q15_t)0x43, (q15_t)0xfa37, (q15_t)0x42, (q15_t)0xfa44,
+    (q15_t)0x41, (q15_t)0xfa50, (q15_t)0x40, (q15_t)0xfa5d, (q15_t)0x3f, (q15_t)0xfa69, (q15_t)0x3d, (q15_t)0xfa76,
+    (q15_t)0x3c, (q15_t)0xfa82, (q15_t)0x3b, (q15_t)0xfa8f, (q15_t)0x3a, (q15_t)0xfa9b, (q15_t)0x39, (q15_t)0xfaa8,
+    (q15_t)0x38, (q15_t)0xfab4, (q15_t)0x37, (q15_t)0xfac1, (q15_t)0x36, (q15_t)0xfacd, (q15_t)0x35, (q15_t)0xfada,
+    (q15_t)0x34, (q15_t)0xfae6, (q15_t)0x33, (q15_t)0xfaf3, (q15_t)0x32, (q15_t)0xfb00, (q15_t)0x31, (q15_t)0xfb0c,
+    (q15_t)0x30, (q15_t)0xfb19, (q15_t)0x2f, (q15_t)0xfb25, (q15_t)0x2e, (q15_t)0xfb32, (q15_t)0x2d, (q15_t)0xfb3e,
+    (q15_t)0x2c, (q15_t)0xfb4b, (q15_t)0x2b, (q15_t)0xfb57, (q15_t)0x2b, (q15_t)0xfb64, (q15_t)0x2a, (q15_t)0xfb70,
+    (q15_t)0x29, (q15_t)0xfb7d, (q15_t)0x28, (q15_t)0xfb89, (q15_t)0x27, (q15_t)0xfb96, (q15_t)0x26, (q15_t)0xfba2,
+    (q15_t)0x25, (q15_t)0xfbaf, (q15_t)0x24, (q15_t)0xfbbc, (q15_t)0x24, (q15_t)0xfbc8, (q15_t)0x23, (q15_t)0xfbd5,
+    (q15_t)0x22, (q15_t)0xfbe1, (q15_t)0x21, (q15_t)0xfbee, (q15_t)0x20, (q15_t)0xfbfa, (q15_t)0x20, (q15_t)0xfc07,
+    (q15_t)0x1f, (q15_t)0xfc13, (q15_t)0x1e, (q15_t)0xfc20, (q15_t)0x1d, (q15_t)0xfc2c, (q15_t)0x1d, (q15_t)0xfc39,
+    (q15_t)0x1c, (q15_t)0xfc45, (q15_t)0x1b, (q15_t)0xfc52, (q15_t)0x1a, (q15_t)0xfc5f, (q15_t)0x1a, (q15_t)0xfc6b,
+    (q15_t)0x19, (q15_t)0xfc78, (q15_t)0x18, (q15_t)0xfc84, (q15_t)0x18, (q15_t)0xfc91, (q15_t)0x17, (q15_t)0xfc9d,
+    (q15_t)0x16, (q15_t)0xfcaa, (q15_t)0x16, (q15_t)0xfcb6, (q15_t)0x15, (q15_t)0xfcc3, (q15_t)0x14, (q15_t)0xfcd0,
+    (q15_t)0x14, (q15_t)0xfcdc, (q15_t)0x13, (q15_t)0xfce9, (q15_t)0x13, (q15_t)0xfcf5, (q15_t)0x12, (q15_t)0xfd02,
+    (q15_t)0x11, (q15_t)0xfd0e, (q15_t)0x11, (q15_t)0xfd1b, (q15_t)0x10, (q15_t)0xfd27, (q15_t)0x10, (q15_t)0xfd34,
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+    (q15_t)0x9, (q15_t)0xfdd7, (q15_t)0x9, (q15_t)0xfde4, (q15_t)0x9, (q15_t)0xfdf0, (q15_t)0x8, (q15_t)0xfdfd,
+    (q15_t)0x8, (q15_t)0xfe09, (q15_t)0x7, (q15_t)0xfe16, (q15_t)0x7, (q15_t)0xfe23, (q15_t)0x7, (q15_t)0xfe2f,
+    (q15_t)0x6, (q15_t)0xfe3c, (q15_t)0x6, (q15_t)0xfe48, (q15_t)0x6, (q15_t)0xfe55, (q15_t)0x5, (q15_t)0xfe61,
+    (q15_t)0x5, (q15_t)0xfe6e, (q15_t)0x5, (q15_t)0xfe7a, (q15_t)0x4, (q15_t)0xfe87, (q15_t)0x4, (q15_t)0xfe94,
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+    (q15_t)0x3, (q15_t)0xfed2, (q15_t)0x3, (q15_t)0xfedf, (q15_t)0x2, (q15_t)0xfeec, (q15_t)0x2, (q15_t)0xfef8,
+    (q15_t)0x2, (q15_t)0xff05, (q15_t)0x2, (q15_t)0xff11, (q15_t)0x2, (q15_t)0xff1e, (q15_t)0x1, (q15_t)0xff2a,
+    (q15_t)0x1, (q15_t)0xff37, (q15_t)0x1, (q15_t)0xff44, (q15_t)0x1, (q15_t)0xff50, (q15_t)0x1, (q15_t)0xff5d,
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+    (q15_t)0x0, (q15_t)0xff9b, (q15_t)0x0, (q15_t)0xffa8, (q15_t)0x0, (q15_t)0xffb5, (q15_t)0x0, (q15_t)0xffc1,
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+    (q15_t)0x3, (q15_t)0x12e, (q15_t)0x3, (q15_t)0x13a, (q15_t)0x3, (q15_t)0x147, (q15_t)0x4, (q15_t)0x153,
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+    (q15_t)0x5, (q15_t)0x192, (q15_t)0x5, (q15_t)0x19f, (q15_t)0x6, (q15_t)0x1ab, (q15_t)0x6, (q15_t)0x1b8,
+    (q15_t)0x6, (q15_t)0x1c4, (q15_t)0x7, (q15_t)0x1d1, (q15_t)0x7, (q15_t)0x1dd, (q15_t)0x7, (q15_t)0x1ea,
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+    (q15_t)0x9, (q15_t)0x229, (q15_t)0xa, (q15_t)0x235, (q15_t)0xa, (q15_t)0x242, (q15_t)0xb, (q15_t)0x24e,
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+    (q15_t)0x16, (q15_t)0x356, (q15_t)0x17, (q15_t)0x363, (q15_t)0x18, (q15_t)0x36f, (q15_t)0x18, (q15_t)0x37c,
+    (q15_t)0x19, (q15_t)0x388, (q15_t)0x1a, (q15_t)0x395, (q15_t)0x1a, (q15_t)0x3a1, (q15_t)0x1b, (q15_t)0x3ae,
+    (q15_t)0x1c, (q15_t)0x3bb, (q15_t)0x1d, (q15_t)0x3c7, (q15_t)0x1d, (q15_t)0x3d4, (q15_t)0x1e, (q15_t)0x3e0,
+    (q15_t)0x1f, (q15_t)0x3ed, (q15_t)0x20, (q15_t)0x3f9, (q15_t)0x20, (q15_t)0x406, (q15_t)0x21, (q15_t)0x412,
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+    (q15_t)0x25, (q15_t)0x451, (q15_t)0x26, (q15_t)0x45e, (q15_t)0x27, (q15_t)0x46a, (q15_t)0x28, (q15_t)0x477,
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+    (q15_t)0x2c, (q15_t)0x4b5, (q15_t)0x2d, (q15_t)0x4c2, (q15_t)0x2e, (q15_t)0x4ce, (q15_t)0x2f, (q15_t)0x4db,
+    (q15_t)0x30, (q15_t)0x4e7, (q15_t)0x31, (q15_t)0x4f4, (q15_t)0x32, (q15_t)0x500, (q15_t)0x33, (q15_t)0x50d,
+    (q15_t)0x34, (q15_t)0x51a, (q15_t)0x35, (q15_t)0x526, (q15_t)0x36, (q15_t)0x533, (q15_t)0x37, (q15_t)0x53f,
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+    (q15_t)0x3c, (q15_t)0x57e, (q15_t)0x3d, (q15_t)0x58a, (q15_t)0x3f, (q15_t)0x597, (q15_t)0x40, (q15_t)0x5a3,
+    (q15_t)0x41, (q15_t)0x5b0, (q15_t)0x42, (q15_t)0x5bc, (q15_t)0x43, (q15_t)0x5c9, (q15_t)0x44, (q15_t)0x5d5,
+    (q15_t)0x45, (q15_t)0x5e2, (q15_t)0x47, (q15_t)0x5ee, (q15_t)0x48, (q15_t)0x5fb, (q15_t)0x49, (q15_t)0x607,
+    (q15_t)0x4a, (q15_t)0x614, (q15_t)0x4b, (q15_t)0x620, (q15_t)0x4c, (q15_t)0x62d, (q15_t)0x4e, (q15_t)0x639,
+    (q15_t)0x4f, (q15_t)0x646, (q15_t)0x50, (q15_t)0x652, (q15_t)0x51, (q15_t)0x65f, (q15_t)0x53, (q15_t)0x66b,
+    (q15_t)0x54, (q15_t)0x678, (q15_t)0x55, (q15_t)0x684, (q15_t)0x56, (q15_t)0x691, (q15_t)0x58, (q15_t)0x69d,
+    (q15_t)0x59, (q15_t)0x6aa, (q15_t)0x5a, (q15_t)0x6b6, (q15_t)0x5c, (q15_t)0x6c3, (q15_t)0x5d, (q15_t)0x6cf,
+    (q15_t)0x5e, (q15_t)0x6dc, (q15_t)0x60, (q15_t)0x6e8, (q15_t)0x61, (q15_t)0x6f5, (q15_t)0x62, (q15_t)0x701,
+    (q15_t)0x64, (q15_t)0x70e, (q15_t)0x65, (q15_t)0x71a, (q15_t)0x67, (q15_t)0x727, (q15_t)0x68, (q15_t)0x733,
+    (q15_t)0x69, (q15_t)0x740, (q15_t)0x6b, (q15_t)0x74c, (q15_t)0x6c, (q15_t)0x759, (q15_t)0x6e, (q15_t)0x765,
+    (q15_t)0x6f, (q15_t)0x772, (q15_t)0x71, (q15_t)0x77e, (q15_t)0x72, (q15_t)0x78b, (q15_t)0x74, (q15_t)0x797,
+    (q15_t)0x75, (q15_t)0x7a4, (q15_t)0x77, (q15_t)0x7b0, (q15_t)0x78, (q15_t)0x7bd, (q15_t)0x7a, (q15_t)0x7c9,
+    (q15_t)0x7b, (q15_t)0x7d6, (q15_t)0x7d, (q15_t)0x7e2, (q15_t)0x7e, (q15_t)0x7ef, (q15_t)0x80, (q15_t)0x7fb,
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+    (q15_t)0x8e, (q15_t)0x86b, (q15_t)0x90, (q15_t)0x878, (q15_t)0x92, (q15_t)0x884, (q15_t)0x93, (q15_t)0x891,
+    (q15_t)0x95, (q15_t)0x89d, (q15_t)0x97, (q15_t)0x8a9, (q15_t)0x98, (q15_t)0x8b6, (q15_t)0x9a, (q15_t)0x8c2,
+    (q15_t)0x9c, (q15_t)0x8cf, (q15_t)0x9e, (q15_t)0x8db, (q15_t)0x9f, (q15_t)0x8e8, (q15_t)0xa1, (q15_t)0x8f4,
+    (q15_t)0xa3, (q15_t)0x901, (q15_t)0xa5, (q15_t)0x90d, (q15_t)0xa6, (q15_t)0x919, (q15_t)0xa8, (q15_t)0x926,
+    (q15_t)0xaa, (q15_t)0x932, (q15_t)0xac, (q15_t)0x93f, (q15_t)0xae, (q15_t)0x94b, (q15_t)0xaf, (q15_t)0x958,
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+    (q15_t)0x5a7, (q15_t)0x1a4b, (q15_t)0x5ac, (q15_t)0x1a57, (q15_t)0x5b1, (q15_t)0x1a62, (q15_t)0x5b6, (q15_t)0x1a6e,
+    (q15_t)0x5bb, (q15_t)0x1a79, (q15_t)0x5c1, (q15_t)0x1a84, (q15_t)0x5c6, (q15_t)0x1a90, (q15_t)0x5cb, (q15_t)0x1a9b,
+    (q15_t)0x5d0, (q15_t)0x1aa7, (q15_t)0x5d5, (q15_t)0x1ab2, (q15_t)0x5db, (q15_t)0x1abe, (q15_t)0x5e0, (q15_t)0x1ac9,
+    (q15_t)0x5e5, (q15_t)0x1ad4, (q15_t)0x5ea, (q15_t)0x1ae0, (q15_t)0x5f0, (q15_t)0x1aeb, (q15_t)0x5f5, (q15_t)0x1af7,
+    (q15_t)0x5fa, (q15_t)0x1b02, (q15_t)0x600, (q15_t)0x1b0d, (q15_t)0x605, (q15_t)0x1b19, (q15_t)0x60a, (q15_t)0x1b24,
+    (q15_t)0x610, (q15_t)0x1b30, (q15_t)0x615, (q15_t)0x1b3b, (q15_t)0x61a, (q15_t)0x1b46, (q15_t)0x620, (q15_t)0x1b52,
+    (q15_t)0x625, (q15_t)0x1b5d, (q15_t)0x62a, (q15_t)0x1b68, (q15_t)0x630, (q15_t)0x1b74, (q15_t)0x635, (q15_t)0x1b7f,
+    (q15_t)0x63b, (q15_t)0x1b8a, (q15_t)0x640, (q15_t)0x1b96, (q15_t)0x645, (q15_t)0x1ba1, (q15_t)0x64b, (q15_t)0x1bac,
+    (q15_t)0x650, (q15_t)0x1bb8, (q15_t)0x656, (q15_t)0x1bc3, (q15_t)0x65b, (q15_t)0x1bce, (q15_t)0x661, (q15_t)0x1bda,
+    (q15_t)0x666, (q15_t)0x1be5, (q15_t)0x66c, (q15_t)0x1bf0, (q15_t)0x671, (q15_t)0x1bfc, (q15_t)0x677, (q15_t)0x1c07,
+    (q15_t)0x67c, (q15_t)0x1c12, (q15_t)0x682, (q15_t)0x1c1e, (q15_t)0x687, (q15_t)0x1c29, (q15_t)0x68d, (q15_t)0x1c34,
+    (q15_t)0x692, (q15_t)0x1c3f, (q15_t)0x698, (q15_t)0x1c4b, (q15_t)0x69d, (q15_t)0x1c56, (q15_t)0x6a3, (q15_t)0x1c61,
+    (q15_t)0x6a8, (q15_t)0x1c6c, (q15_t)0x6ae, (q15_t)0x1c78, (q15_t)0x6b4, (q15_t)0x1c83, (q15_t)0x6b9, (q15_t)0x1c8e,
+    (q15_t)0x6bf, (q15_t)0x1c99, (q15_t)0x6c5, (q15_t)0x1ca5, (q15_t)0x6ca, (q15_t)0x1cb0, (q15_t)0x6d0, (q15_t)0x1cbb,
+    (q15_t)0x6d5, (q15_t)0x1cc6, (q15_t)0x6db, (q15_t)0x1cd2, (q15_t)0x6e1, (q15_t)0x1cdd, (q15_t)0x6e6, (q15_t)0x1ce8,
+    (q15_t)0x6ec, (q15_t)0x1cf3, (q15_t)0x6f2, (q15_t)0x1cff, (q15_t)0x6f7, (q15_t)0x1d0a, (q15_t)0x6fd, (q15_t)0x1d15,
+    (q15_t)0x703, (q15_t)0x1d20, (q15_t)0x709, (q15_t)0x1d2b, (q15_t)0x70e, (q15_t)0x1d36, (q15_t)0x714, (q15_t)0x1d42,
+    (q15_t)0x71a, (q15_t)0x1d4d, (q15_t)0x720, (q15_t)0x1d58, (q15_t)0x725, (q15_t)0x1d63, (q15_t)0x72b, (q15_t)0x1d6e,
+    (q15_t)0x731, (q15_t)0x1d79, (q15_t)0x737, (q15_t)0x1d85, (q15_t)0x73d, (q15_t)0x1d90, (q15_t)0x742, (q15_t)0x1d9b,
+    (q15_t)0x748, (q15_t)0x1da6, (q15_t)0x74e, (q15_t)0x1db1, (q15_t)0x754, (q15_t)0x1dbc, (q15_t)0x75a, (q15_t)0x1dc7,
+    (q15_t)0x75f, (q15_t)0x1dd3, (q15_t)0x765, (q15_t)0x1dde, (q15_t)0x76b, (q15_t)0x1de9, (q15_t)0x771, (q15_t)0x1df4,
+    (q15_t)0x777, (q15_t)0x1dff, (q15_t)0x77d, (q15_t)0x1e0a, (q15_t)0x783, (q15_t)0x1e15, (q15_t)0x789, (q15_t)0x1e20,
+    (q15_t)0x78f, (q15_t)0x1e2b, (q15_t)0x795, (q15_t)0x1e36, (q15_t)0x79a, (q15_t)0x1e42, (q15_t)0x7a0, (q15_t)0x1e4d,
+    (q15_t)0x7a6, (q15_t)0x1e58, (q15_t)0x7ac, (q15_t)0x1e63, (q15_t)0x7b2, (q15_t)0x1e6e, (q15_t)0x7b8, (q15_t)0x1e79,
+    (q15_t)0x7be, (q15_t)0x1e84, (q15_t)0x7c4, (q15_t)0x1e8f, (q15_t)0x7ca, (q15_t)0x1e9a, (q15_t)0x7d0, (q15_t)0x1ea5,
+    (q15_t)0x7d6, (q15_t)0x1eb0, (q15_t)0x7dc, (q15_t)0x1ebb, (q15_t)0x7e2, (q15_t)0x1ec6, (q15_t)0x7e8, (q15_t)0x1ed1,
+    (q15_t)0x7ee, (q15_t)0x1edc, (q15_t)0x7f5, (q15_t)0x1ee7, (q15_t)0x7fb, (q15_t)0x1ef2, (q15_t)0x801, (q15_t)0x1efd,
+    (q15_t)0x807, (q15_t)0x1f08, (q15_t)0x80d, (q15_t)0x1f13, (q15_t)0x813, (q15_t)0x1f1e, (q15_t)0x819, (q15_t)0x1f29,
+    (q15_t)0x81f, (q15_t)0x1f34, (q15_t)0x825, (q15_t)0x1f3f, (q15_t)0x82b, (q15_t)0x1f4a, (q15_t)0x832, (q15_t)0x1f55,
+    (q15_t)0x838, (q15_t)0x1f60, (q15_t)0x83e, (q15_t)0x1f6b, (q15_t)0x844, (q15_t)0x1f76, (q15_t)0x84a, (q15_t)0x1f81,
+    (q15_t)0x850, (q15_t)0x1f8c, (q15_t)0x857, (q15_t)0x1f97, (q15_t)0x85d, (q15_t)0x1fa2, (q15_t)0x863, (q15_t)0x1fac,
+    (q15_t)0x869, (q15_t)0x1fb7, (q15_t)0x870, (q15_t)0x1fc2, (q15_t)0x876, (q15_t)0x1fcd, (q15_t)0x87c, (q15_t)0x1fd8,
+    (q15_t)0x882, (q15_t)0x1fe3, (q15_t)0x889, (q15_t)0x1fee, (q15_t)0x88f, (q15_t)0x1ff9, (q15_t)0x895, (q15_t)0x2004,
+    (q15_t)0x89b, (q15_t)0x200f, (q15_t)0x8a2, (q15_t)0x2019, (q15_t)0x8a8, (q15_t)0x2024, (q15_t)0x8ae, (q15_t)0x202f,
+    (q15_t)0x8b5, (q15_t)0x203a, (q15_t)0x8bb, (q15_t)0x2045, (q15_t)0x8c1, (q15_t)0x2050, (q15_t)0x8c8, (q15_t)0x205b,
+    (q15_t)0x8ce, (q15_t)0x2065, (q15_t)0x8d4, (q15_t)0x2070, (q15_t)0x8db, (q15_t)0x207b, (q15_t)0x8e1, (q15_t)0x2086,
+    (q15_t)0x8e8, (q15_t)0x2091, (q15_t)0x8ee, (q15_t)0x209b, (q15_t)0x8f4, (q15_t)0x20a6, (q15_t)0x8fb, (q15_t)0x20b1,
+    (q15_t)0x901, (q15_t)0x20bc, (q15_t)0x908, (q15_t)0x20c7, (q15_t)0x90e, (q15_t)0x20d1, (q15_t)0x915, (q15_t)0x20dc,
+    (q15_t)0x91b, (q15_t)0x20e7, (q15_t)0x921, (q15_t)0x20f2, (q15_t)0x928, (q15_t)0x20fd, (q15_t)0x92e, (q15_t)0x2107,
+    (q15_t)0x935, (q15_t)0x2112, (q15_t)0x93b, (q15_t)0x211d, (q15_t)0x942, (q15_t)0x2128, (q15_t)0x948, (q15_t)0x2132,
+    (q15_t)0x94f, (q15_t)0x213d, (q15_t)0x955, (q15_t)0x2148, (q15_t)0x95c, (q15_t)0x2153, (q15_t)0x963, (q15_t)0x215d,
+    (q15_t)0x969, (q15_t)0x2168, (q15_t)0x970, (q15_t)0x2173, (q15_t)0x976, (q15_t)0x217d, (q15_t)0x97d, (q15_t)0x2188,
+    (q15_t)0x983, (q15_t)0x2193, (q15_t)0x98a, (q15_t)0x219e, (q15_t)0x991, (q15_t)0x21a8, (q15_t)0x997, (q15_t)0x21b3,
+    (q15_t)0x99e, (q15_t)0x21be, (q15_t)0x9a4, (q15_t)0x21c8, (q15_t)0x9ab, (q15_t)0x21d3, (q15_t)0x9b2, (q15_t)0x21de,
+    (q15_t)0x9b8, (q15_t)0x21e8, (q15_t)0x9bf, (q15_t)0x21f3, (q15_t)0x9c6, (q15_t)0x21fe, (q15_t)0x9cc, (q15_t)0x2208,
+    (q15_t)0x9d3, (q15_t)0x2213, (q15_t)0x9da, (q15_t)0x221e, (q15_t)0x9e0, (q15_t)0x2228, (q15_t)0x9e7, (q15_t)0x2233,
+    (q15_t)0x9ee, (q15_t)0x223d, (q15_t)0x9f5, (q15_t)0x2248, (q15_t)0x9fb, (q15_t)0x2253, (q15_t)0xa02, (q15_t)0x225d,
+    (q15_t)0xa09, (q15_t)0x2268, (q15_t)0xa10, (q15_t)0x2272, (q15_t)0xa16, (q15_t)0x227d, (q15_t)0xa1d, (q15_t)0x2288,
+    (q15_t)0xa24, (q15_t)0x2292, (q15_t)0xa2b, (q15_t)0x229d, (q15_t)0xa32, (q15_t)0x22a7, (q15_t)0xa38, (q15_t)0x22b2,
+    (q15_t)0xa3f, (q15_t)0x22bc, (q15_t)0xa46, (q15_t)0x22c7, (q15_t)0xa4d, (q15_t)0x22d2, (q15_t)0xa54, (q15_t)0x22dc,
+    (q15_t)0xa5b, (q15_t)0x22e7, (q15_t)0xa61, (q15_t)0x22f1, (q15_t)0xa68, (q15_t)0x22fc, (q15_t)0xa6f, (q15_t)0x2306,
+    (q15_t)0xa76, (q15_t)0x2311, (q15_t)0xa7d, (q15_t)0x231b, (q15_t)0xa84, (q15_t)0x2326, (q15_t)0xa8b, (q15_t)0x2330,
+    (q15_t)0xa92, (q15_t)0x233b, (q15_t)0xa99, (q15_t)0x2345, (q15_t)0xa9f, (q15_t)0x2350, (q15_t)0xaa6, (q15_t)0x235a,
+    (q15_t)0xaad, (q15_t)0x2365, (q15_t)0xab4, (q15_t)0x236f, (q15_t)0xabb, (q15_t)0x237a, (q15_t)0xac2, (q15_t)0x2384,
+    (q15_t)0xac9, (q15_t)0x238e, (q15_t)0xad0, (q15_t)0x2399, (q15_t)0xad7, (q15_t)0x23a3, (q15_t)0xade, (q15_t)0x23ae,
+    (q15_t)0xae5, (q15_t)0x23b8, (q15_t)0xaec, (q15_t)0x23c3, (q15_t)0xaf3, (q15_t)0x23cd, (q15_t)0xafa, (q15_t)0x23d7,
+    (q15_t)0xb01, (q15_t)0x23e2, (q15_t)0xb08, (q15_t)0x23ec, (q15_t)0xb0f, (q15_t)0x23f7, (q15_t)0xb16, (q15_t)0x2401,
+    (q15_t)0xb1e, (q15_t)0x240b, (q15_t)0xb25, (q15_t)0x2416, (q15_t)0xb2c, (q15_t)0x2420, (q15_t)0xb33, (q15_t)0x242b,
+    (q15_t)0xb3a, (q15_t)0x2435, (q15_t)0xb41, (q15_t)0x243f, (q15_t)0xb48, (q15_t)0x244a, (q15_t)0xb4f, (q15_t)0x2454,
+    (q15_t)0xb56, (q15_t)0x245e, (q15_t)0xb5e, (q15_t)0x2469, (q15_t)0xb65, (q15_t)0x2473, (q15_t)0xb6c, (q15_t)0x247d,
+    (q15_t)0xb73, (q15_t)0x2488, (q15_t)0xb7a, (q15_t)0x2492, (q15_t)0xb81, (q15_t)0x249c, (q15_t)0xb89, (q15_t)0x24a7,
+    (q15_t)0xb90, (q15_t)0x24b1, (q15_t)0xb97, (q15_t)0x24bb, (q15_t)0xb9e, (q15_t)0x24c5, (q15_t)0xba5, (q15_t)0x24d0,
+    (q15_t)0xbad, (q15_t)0x24da, (q15_t)0xbb4, (q15_t)0x24e4, (q15_t)0xbbb, (q15_t)0x24ef, (q15_t)0xbc2, (q15_t)0x24f9,
+    (q15_t)0xbca, (q15_t)0x2503, (q15_t)0xbd1, (q15_t)0x250d, (q15_t)0xbd8, (q15_t)0x2518, (q15_t)0xbe0, (q15_t)0x2522,
+    (q15_t)0xbe7, (q15_t)0x252c, (q15_t)0xbee, (q15_t)0x2536, (q15_t)0xbf5, (q15_t)0x2541, (q15_t)0xbfd, (q15_t)0x254b,
+    (q15_t)0xc04, (q15_t)0x2555, (q15_t)0xc0b, (q15_t)0x255f, (q15_t)0xc13, (q15_t)0x2569, (q15_t)0xc1a, (q15_t)0x2574,
+    (q15_t)0xc21, (q15_t)0x257e, (q15_t)0xc29, (q15_t)0x2588, (q15_t)0xc30, (q15_t)0x2592, (q15_t)0xc38, (q15_t)0x259c,
+    (q15_t)0xc3f, (q15_t)0x25a6, (q15_t)0xc46, (q15_t)0x25b1, (q15_t)0xc4e, (q15_t)0x25bb, (q15_t)0xc55, (q15_t)0x25c5,
+    (q15_t)0xc5d, (q15_t)0x25cf, (q15_t)0xc64, (q15_t)0x25d9, (q15_t)0xc6b, (q15_t)0x25e3, (q15_t)0xc73, (q15_t)0x25ed,
+    (q15_t)0xc7a, (q15_t)0x25f8, (q15_t)0xc82, (q15_t)0x2602, (q15_t)0xc89, (q15_t)0x260c, (q15_t)0xc91, (q15_t)0x2616,
+    (q15_t)0xc98, (q15_t)0x2620, (q15_t)0xca0, (q15_t)0x262a, (q15_t)0xca7, (q15_t)0x2634, (q15_t)0xcaf, (q15_t)0x263e,
+    (q15_t)0xcb6, (q15_t)0x2648, (q15_t)0xcbe, (q15_t)0x2652, (q15_t)0xcc5, (q15_t)0x265c, (q15_t)0xccd, (q15_t)0x2666,
+    (q15_t)0xcd4, (q15_t)0x2671, (q15_t)0xcdc, (q15_t)0x267b, (q15_t)0xce3, (q15_t)0x2685, (q15_t)0xceb, (q15_t)0x268f,
+    (q15_t)0xcf3, (q15_t)0x2699, (q15_t)0xcfa, (q15_t)0x26a3, (q15_t)0xd02, (q15_t)0x26ad, (q15_t)0xd09, (q15_t)0x26b7,
+    (q15_t)0xd11, (q15_t)0x26c1, (q15_t)0xd19, (q15_t)0x26cb, (q15_t)0xd20, (q15_t)0x26d5, (q15_t)0xd28, (q15_t)0x26df,
+    (q15_t)0xd30, (q15_t)0x26e9, (q15_t)0xd37, (q15_t)0x26f3, (q15_t)0xd3f, (q15_t)0x26fd, (q15_t)0xd46, (q15_t)0x2707,
+    (q15_t)0xd4e, (q15_t)0x2711, (q15_t)0xd56, (q15_t)0x271a, (q15_t)0xd5d, (q15_t)0x2724, (q15_t)0xd65, (q15_t)0x272e,
+    (q15_t)0xd6d, (q15_t)0x2738, (q15_t)0xd75, (q15_t)0x2742, (q15_t)0xd7c, (q15_t)0x274c, (q15_t)0xd84, (q15_t)0x2756,
+    (q15_t)0xd8c, (q15_t)0x2760, (q15_t)0xd93, (q15_t)0x276a, (q15_t)0xd9b, (q15_t)0x2774, (q15_t)0xda3, (q15_t)0x277e,
+    (q15_t)0xdab, (q15_t)0x2788, (q15_t)0xdb2, (q15_t)0x2791, (q15_t)0xdba, (q15_t)0x279b, (q15_t)0xdc2, (q15_t)0x27a5,
+    (q15_t)0xdca, (q15_t)0x27af, (q15_t)0xdd2, (q15_t)0x27b9, (q15_t)0xdd9, (q15_t)0x27c3, (q15_t)0xde1, (q15_t)0x27cd,
+    (q15_t)0xde9, (q15_t)0x27d6, (q15_t)0xdf1, (q15_t)0x27e0, (q15_t)0xdf9, (q15_t)0x27ea, (q15_t)0xe01, (q15_t)0x27f4,
+    (q15_t)0xe08, (q15_t)0x27fe, (q15_t)0xe10, (q15_t)0x2808, (q15_t)0xe18, (q15_t)0x2811, (q15_t)0xe20, (q15_t)0x281b,
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+    (q15_t)0xe47, (q15_t)0x284c, (q15_t)0xe4f, (q15_t)0x2856, (q15_t)0xe57, (q15_t)0x2860, (q15_t)0xe5f, (q15_t)0x2869,
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+    (q15_t)0x1a31, (q15_t)0x33a3, (q15_t)0x1a3b, (q15_t)0x33ab, (q15_t)0x1a45, (q15_t)0x33b2, (q15_t)0x1a4f, (q15_t)0x33ba,
+    (q15_t)0x1a5a, (q15_t)0x33c1, (q15_t)0x1a64, (q15_t)0x33c8, (q15_t)0x1a6e, (q15_t)0x33d0, (q15_t)0x1a78, (q15_t)0x33d7,
+    (q15_t)0x1a82, (q15_t)0x33df, (q15_t)0x1a8c, (q15_t)0x33e6, (q15_t)0x1a97, (q15_t)0x33ed, (q15_t)0x1aa1, (q15_t)0x33f5,
+    (q15_t)0x1aab, (q15_t)0x33fc, (q15_t)0x1ab5, (q15_t)0x3403, (q15_t)0x1abf, (q15_t)0x340b, (q15_t)0x1aca, (q15_t)0x3412,
+    (q15_t)0x1ad4, (q15_t)0x3419, (q15_t)0x1ade, (q15_t)0x3420, (q15_t)0x1ae8, (q15_t)0x3428, (q15_t)0x1af3, (q15_t)0x342f,
+    (q15_t)0x1afd, (q15_t)0x3436, (q15_t)0x1b07, (q15_t)0x343e, (q15_t)0x1b11, (q15_t)0x3445, (q15_t)0x1b1c, (q15_t)0x344c,
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+    (q15_t)0x1b4f, (q15_t)0x3470, (q15_t)0x1b59, (q15_t)0x3477, (q15_t)0x1b64, (q15_t)0x347f, (q15_t)0x1b6e, (q15_t)0x3486,
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+    (q15_t)0x1ba2, (q15_t)0x34aa, (q15_t)0x1bac, (q15_t)0x34b1, (q15_t)0x1bb6, (q15_t)0x34b8, (q15_t)0x1bc1, (q15_t)0x34bf,
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+    (q15_t)0x2394, (q15_t)0x3958, (q15_t)0x239f, (q15_t)0x395d, (q15_t)0x23aa, (q15_t)0x3963, (q15_t)0x23b5, (q15_t)0x3968,
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+    (q15_t)0x23ee, (q15_t)0x3984, (q15_t)0x23f9, (q15_t)0x3989, (q15_t)0x2404, (q15_t)0x398f, (q15_t)0x2410, (q15_t)0x3994,
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+    (q15_t)0x269b, (q15_t)0x3abf, (q15_t)0x26a6, (q15_t)0x3ac4, (q15_t)0x26b2, (q15_t)0x3ac9, (q15_t)0x26bd, (q15_t)0x3ace,
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+    (q15_t)0x27df, (q15_t)0x3b47, (q15_t)0x27eb, (q15_t)0x3b4c, (q15_t)0x27f6, (q15_t)0x3b50, (q15_t)0x2802, (q15_t)0x3b55,
+    (q15_t)0x280e, (q15_t)0x3b5a, (q15_t)0x2819, (q15_t)0x3b5f, (q15_t)0x2825, (q15_t)0x3b63, (q15_t)0x2831, (q15_t)0x3b68,
+    (q15_t)0x283c, (q15_t)0x3b6d, (q15_t)0x2848, (q15_t)0x3b71, (q15_t)0x2854, (q15_t)0x3b76, (q15_t)0x285f, (q15_t)0x3b7b,
+    (q15_t)0x286b, (q15_t)0x3b7f, (q15_t)0x2877, (q15_t)0x3b84, (q15_t)0x2882, (q15_t)0x3b88, (q15_t)0x288e, (q15_t)0x3b8d,
+    (q15_t)0x289a, (q15_t)0x3b92, (q15_t)0x28a5, (q15_t)0x3b96, (q15_t)0x28b1, (q15_t)0x3b9b, (q15_t)0x28bd, (q15_t)0x3b9f,
+    (q15_t)0x28c9, (q15_t)0x3ba4, (q15_t)0x28d4, (q15_t)0x3ba9, (q15_t)0x28e0, (q15_t)0x3bad, (q15_t)0x28ec, (q15_t)0x3bb2,
+    (q15_t)0x28f7, (q15_t)0x3bb6, (q15_t)0x2903, (q15_t)0x3bbb, (q15_t)0x290f, (q15_t)0x3bbf, (q15_t)0x291b, (q15_t)0x3bc4,
+    (q15_t)0x2926, (q15_t)0x3bc8, (q15_t)0x2932, (q15_t)0x3bcd, (q15_t)0x293e, (q15_t)0x3bd1, (q15_t)0x294a, (q15_t)0x3bd6,
+    (q15_t)0x2955, (q15_t)0x3bda, (q15_t)0x2961, (q15_t)0x3bde, (q15_t)0x296d, (q15_t)0x3be3, (q15_t)0x2979, (q15_t)0x3be7,
+    (q15_t)0x2984, (q15_t)0x3bec, (q15_t)0x2990, (q15_t)0x3bf0, (q15_t)0x299c, (q15_t)0x3bf5, (q15_t)0x29a8, (q15_t)0x3bf9,
+    (q15_t)0x29b4, (q15_t)0x3bfd, (q15_t)0x29bf, (q15_t)0x3c02, (q15_t)0x29cb, (q15_t)0x3c06, (q15_t)0x29d7, (q15_t)0x3c0a,
+    (q15_t)0x29e3, (q15_t)0x3c0f, (q15_t)0x29ee, (q15_t)0x3c13, (q15_t)0x29fa, (q15_t)0x3c17, (q15_t)0x2a06, (q15_t)0x3c1c,
+    (q15_t)0x2a12, (q15_t)0x3c20, (q15_t)0x2a1e, (q15_t)0x3c24, (q15_t)0x2a29, (q15_t)0x3c29, (q15_t)0x2a35, (q15_t)0x3c2d,
+    (q15_t)0x2a41, (q15_t)0x3c31, (q15_t)0x2a4d, (q15_t)0x3c36, (q15_t)0x2a59, (q15_t)0x3c3a, (q15_t)0x2a65, (q15_t)0x3c3e,
+    (q15_t)0x2a70, (q15_t)0x3c42, (q15_t)0x2a7c, (q15_t)0x3c46, (q15_t)0x2a88, (q15_t)0x3c4b, (q15_t)0x2a94, (q15_t)0x3c4f,
+    (q15_t)0x2aa0, (q15_t)0x3c53, (q15_t)0x2aac, (q15_t)0x3c57, (q15_t)0x2ab7, (q15_t)0x3c5b, (q15_t)0x2ac3, (q15_t)0x3c60,
+    (q15_t)0x2acf, (q15_t)0x3c64, (q15_t)0x2adb, (q15_t)0x3c68, (q15_t)0x2ae7, (q15_t)0x3c6c, (q15_t)0x2af3, (q15_t)0x3c70,
+    (q15_t)0x2aff, (q15_t)0x3c74, (q15_t)0x2b0a, (q15_t)0x3c79, (q15_t)0x2b16, (q15_t)0x3c7d, (q15_t)0x2b22, (q15_t)0x3c81,
+    (q15_t)0x2b2e, (q15_t)0x3c85, (q15_t)0x2b3a, (q15_t)0x3c89, (q15_t)0x2b46, (q15_t)0x3c8d, (q15_t)0x2b52, (q15_t)0x3c91,
+    (q15_t)0x2b5e, (q15_t)0x3c95, (q15_t)0x2b6a, (q15_t)0x3c99, (q15_t)0x2b75, (q15_t)0x3c9d, (q15_t)0x2b81, (q15_t)0x3ca1,
+    (q15_t)0x2b8d, (q15_t)0x3ca5, (q15_t)0x2b99, (q15_t)0x3ca9, (q15_t)0x2ba5, (q15_t)0x3cad, (q15_t)0x2bb1, (q15_t)0x3cb1,
+    (q15_t)0x2bbd, (q15_t)0x3cb5, (q15_t)0x2bc9, (q15_t)0x3cb9, (q15_t)0x2bd5, (q15_t)0x3cbd, (q15_t)0x2be1, (q15_t)0x3cc1,
+    (q15_t)0x2bed, (q15_t)0x3cc5, (q15_t)0x2bf9, (q15_t)0x3cc9, (q15_t)0x2c05, (q15_t)0x3ccd, (q15_t)0x2c10, (q15_t)0x3cd1,
+    (q15_t)0x2c1c, (q15_t)0x3cd5, (q15_t)0x2c28, (q15_t)0x3cd9, (q15_t)0x2c34, (q15_t)0x3cdd, (q15_t)0x2c40, (q15_t)0x3ce0,
+    (q15_t)0x2c4c, (q15_t)0x3ce4, (q15_t)0x2c58, (q15_t)0x3ce8, (q15_t)0x2c64, (q15_t)0x3cec, (q15_t)0x2c70, (q15_t)0x3cf0,
+    (q15_t)0x2c7c, (q15_t)0x3cf4, (q15_t)0x2c88, (q15_t)0x3cf8, (q15_t)0x2c94, (q15_t)0x3cfb, (q15_t)0x2ca0, (q15_t)0x3cff,
+    (q15_t)0x2cac, (q15_t)0x3d03, (q15_t)0x2cb8, (q15_t)0x3d07, (q15_t)0x2cc4, (q15_t)0x3d0b, (q15_t)0x2cd0, (q15_t)0x3d0e,
+    (q15_t)0x2cdc, (q15_t)0x3d12, (q15_t)0x2ce8, (q15_t)0x3d16, (q15_t)0x2cf4, (q15_t)0x3d1a, (q15_t)0x2d00, (q15_t)0x3d1d,
+    (q15_t)0x2d0c, (q15_t)0x3d21, (q15_t)0x2d18, (q15_t)0x3d25, (q15_t)0x2d24, (q15_t)0x3d28, (q15_t)0x2d30, (q15_t)0x3d2c,
+    (q15_t)0x2d3c, (q15_t)0x3d30, (q15_t)0x2d48, (q15_t)0x3d34, (q15_t)0x2d54, (q15_t)0x3d37, (q15_t)0x2d60, (q15_t)0x3d3b,
+    (q15_t)0x2d6c, (q15_t)0x3d3f, (q15_t)0x2d78, (q15_t)0x3d42, (q15_t)0x2d84, (q15_t)0x3d46, (q15_t)0x2d90, (q15_t)0x3d49,
+    (q15_t)0x2d9c, (q15_t)0x3d4d, (q15_t)0x2da8, (q15_t)0x3d51, (q15_t)0x2db4, (q15_t)0x3d54, (q15_t)0x2dc0, (q15_t)0x3d58,
+    (q15_t)0x2dcc, (q15_t)0x3d5b, (q15_t)0x2dd8, (q15_t)0x3d5f, (q15_t)0x2de4, (q15_t)0x3d63, (q15_t)0x2df0, (q15_t)0x3d66,
+    (q15_t)0x2dfc, (q15_t)0x3d6a, (q15_t)0x2e09, (q15_t)0x3d6d, (q15_t)0x2e15, (q15_t)0x3d71, (q15_t)0x2e21, (q15_t)0x3d74,
+    (q15_t)0x2e2d, (q15_t)0x3d78, (q15_t)0x2e39, (q15_t)0x3d7b, (q15_t)0x2e45, (q15_t)0x3d7f, (q15_t)0x2e51, (q15_t)0x3d82,
+    (q15_t)0x2e5d, (q15_t)0x3d86, (q15_t)0x2e69, (q15_t)0x3d89, (q15_t)0x2e75, (q15_t)0x3d8d, (q15_t)0x2e81, (q15_t)0x3d90,
+    (q15_t)0x2e8d, (q15_t)0x3d93, (q15_t)0x2e99, (q15_t)0x3d97, (q15_t)0x2ea6, (q15_t)0x3d9a, (q15_t)0x2eb2, (q15_t)0x3d9e,
+    (q15_t)0x2ebe, (q15_t)0x3da1, (q15_t)0x2eca, (q15_t)0x3da4, (q15_t)0x2ed6, (q15_t)0x3da8, (q15_t)0x2ee2, (q15_t)0x3dab,
+    (q15_t)0x2eee, (q15_t)0x3daf, (q15_t)0x2efa, (q15_t)0x3db2, (q15_t)0x2f06, (q15_t)0x3db5, (q15_t)0x2f13, (q15_t)0x3db9,
+    (q15_t)0x2f1f, (q15_t)0x3dbc, (q15_t)0x2f2b, (q15_t)0x3dbf, (q15_t)0x2f37, (q15_t)0x3dc2, (q15_t)0x2f43, (q15_t)0x3dc6,
+    (q15_t)0x2f4f, (q15_t)0x3dc9, (q15_t)0x2f5b, (q15_t)0x3dcc, (q15_t)0x2f67, (q15_t)0x3dd0, (q15_t)0x2f74, (q15_t)0x3dd3,
+    (q15_t)0x2f80, (q15_t)0x3dd6, (q15_t)0x2f8c, (q15_t)0x3dd9, (q15_t)0x2f98, (q15_t)0x3ddd, (q15_t)0x2fa4, (q15_t)0x3de0,
+    (q15_t)0x2fb0, (q15_t)0x3de3, (q15_t)0x2fbc, (q15_t)0x3de6, (q15_t)0x2fc9, (q15_t)0x3de9, (q15_t)0x2fd5, (q15_t)0x3ded,
+    (q15_t)0x2fe1, (q15_t)0x3df0, (q15_t)0x2fed, (q15_t)0x3df3, (q15_t)0x2ff9, (q15_t)0x3df6, (q15_t)0x3005, (q15_t)0x3df9,
+    (q15_t)0x3012, (q15_t)0x3dfc, (q15_t)0x301e, (q15_t)0x3dff, (q15_t)0x302a, (q15_t)0x3e03, (q15_t)0x3036, (q15_t)0x3e06,
+    (q15_t)0x3042, (q15_t)0x3e09, (q15_t)0x304e, (q15_t)0x3e0c, (q15_t)0x305b, (q15_t)0x3e0f, (q15_t)0x3067, (q15_t)0x3e12,
+    (q15_t)0x3073, (q15_t)0x3e15, (q15_t)0x307f, (q15_t)0x3e18, (q15_t)0x308b, (q15_t)0x3e1b, (q15_t)0x3098, (q15_t)0x3e1e,
+    (q15_t)0x30a4, (q15_t)0x3e21, (q15_t)0x30b0, (q15_t)0x3e24, (q15_t)0x30bc, (q15_t)0x3e27, (q15_t)0x30c8, (q15_t)0x3e2a,
+    (q15_t)0x30d5, (q15_t)0x3e2d, (q15_t)0x30e1, (q15_t)0x3e30, (q15_t)0x30ed, (q15_t)0x3e33, (q15_t)0x30f9, (q15_t)0x3e36,
+    (q15_t)0x3105, (q15_t)0x3e39, (q15_t)0x3112, (q15_t)0x3e3c, (q15_t)0x311e, (q15_t)0x3e3f, (q15_t)0x312a, (q15_t)0x3e42,
+    (q15_t)0x3136, (q15_t)0x3e45, (q15_t)0x3143, (q15_t)0x3e48, (q15_t)0x314f, (q15_t)0x3e4a, (q15_t)0x315b, (q15_t)0x3e4d,
+    (q15_t)0x3167, (q15_t)0x3e50, (q15_t)0x3174, (q15_t)0x3e53, (q15_t)0x3180, (q15_t)0x3e56, (q15_t)0x318c, (q15_t)0x3e59,
+    (q15_t)0x3198, (q15_t)0x3e5c, (q15_t)0x31a4, (q15_t)0x3e5e, (q15_t)0x31b1, (q15_t)0x3e61, (q15_t)0x31bd, (q15_t)0x3e64,
+    (q15_t)0x31c9, (q15_t)0x3e67, (q15_t)0x31d5, (q15_t)0x3e6a, (q15_t)0x31e2, (q15_t)0x3e6c, (q15_t)0x31ee, (q15_t)0x3e6f,
+    (q15_t)0x31fa, (q15_t)0x3e72, (q15_t)0x3207, (q15_t)0x3e75, (q15_t)0x3213, (q15_t)0x3e77, (q15_t)0x321f, (q15_t)0x3e7a,
+    (q15_t)0x322b, (q15_t)0x3e7d, (q15_t)0x3238, (q15_t)0x3e80, (q15_t)0x3244, (q15_t)0x3e82, (q15_t)0x3250, (q15_t)0x3e85,
+    (q15_t)0x325c, (q15_t)0x3e88, (q15_t)0x3269, (q15_t)0x3e8a, (q15_t)0x3275, (q15_t)0x3e8d, (q15_t)0x3281, (q15_t)0x3e90,
+    (q15_t)0x328e, (q15_t)0x3e92, (q15_t)0x329a, (q15_t)0x3e95, (q15_t)0x32a6, (q15_t)0x3e98, (q15_t)0x32b2, (q15_t)0x3e9a,
+    (q15_t)0x32bf, (q15_t)0x3e9d, (q15_t)0x32cb, (q15_t)0x3e9f, (q15_t)0x32d7, (q15_t)0x3ea2, (q15_t)0x32e4, (q15_t)0x3ea5,
+    (q15_t)0x32f0, (q15_t)0x3ea7, (q15_t)0x32fc, (q15_t)0x3eaa, (q15_t)0x3308, (q15_t)0x3eac, (q15_t)0x3315, (q15_t)0x3eaf,
+    (q15_t)0x3321, (q15_t)0x3eb1, (q15_t)0x332d, (q15_t)0x3eb4, (q15_t)0x333a, (q15_t)0x3eb6, (q15_t)0x3346, (q15_t)0x3eb9,
+    (q15_t)0x3352, (q15_t)0x3ebb, (q15_t)0x335f, (q15_t)0x3ebe, (q15_t)0x336b, (q15_t)0x3ec0, (q15_t)0x3377, (q15_t)0x3ec3,
+    (q15_t)0x3384, (q15_t)0x3ec5, (q15_t)0x3390, (q15_t)0x3ec8, (q15_t)0x339c, (q15_t)0x3eca, (q15_t)0x33a9, (q15_t)0x3ecc,
+    (q15_t)0x33b5, (q15_t)0x3ecf, (q15_t)0x33c1, (q15_t)0x3ed1, (q15_t)0x33ce, (q15_t)0x3ed4, (q15_t)0x33da, (q15_t)0x3ed6,
+    (q15_t)0x33e6, (q15_t)0x3ed8, (q15_t)0x33f3, (q15_t)0x3edb, (q15_t)0x33ff, (q15_t)0x3edd, (q15_t)0x340b, (q15_t)0x3ee0,
+    (q15_t)0x3418, (q15_t)0x3ee2, (q15_t)0x3424, (q15_t)0x3ee4, (q15_t)0x3430, (q15_t)0x3ee7, (q15_t)0x343d, (q15_t)0x3ee9,
+    (q15_t)0x3449, (q15_t)0x3eeb, (q15_t)0x3455, (q15_t)0x3eed, (q15_t)0x3462, (q15_t)0x3ef0, (q15_t)0x346e, (q15_t)0x3ef2,
+    (q15_t)0x347b, (q15_t)0x3ef4, (q15_t)0x3487, (q15_t)0x3ef7, (q15_t)0x3493, (q15_t)0x3ef9, (q15_t)0x34a0, (q15_t)0x3efb,
+    (q15_t)0x34ac, (q15_t)0x3efd, (q15_t)0x34b8, (q15_t)0x3f00, (q15_t)0x34c5, (q15_t)0x3f02, (q15_t)0x34d1, (q15_t)0x3f04,
+    (q15_t)0x34dd, (q15_t)0x3f06, (q15_t)0x34ea, (q15_t)0x3f08, (q15_t)0x34f6, (q15_t)0x3f0a, (q15_t)0x3503, (q15_t)0x3f0d,
+    (q15_t)0x350f, (q15_t)0x3f0f, (q15_t)0x351b, (q15_t)0x3f11, (q15_t)0x3528, (q15_t)0x3f13, (q15_t)0x3534, (q15_t)0x3f15,
+    (q15_t)0x3540, (q15_t)0x3f17, (q15_t)0x354d, (q15_t)0x3f19, (q15_t)0x3559, (q15_t)0x3f1c, (q15_t)0x3566, (q15_t)0x3f1e,
+    (q15_t)0x3572, (q15_t)0x3f20, (q15_t)0x357e, (q15_t)0x3f22, (q15_t)0x358b, (q15_t)0x3f24, (q15_t)0x3597, (q15_t)0x3f26,
+    (q15_t)0x35a4, (q15_t)0x3f28, (q15_t)0x35b0, (q15_t)0x3f2a, (q15_t)0x35bc, (q15_t)0x3f2c, (q15_t)0x35c9, (q15_t)0x3f2e,
+    (q15_t)0x35d5, (q15_t)0x3f30, (q15_t)0x35e2, (q15_t)0x3f32, (q15_t)0x35ee, (q15_t)0x3f34, (q15_t)0x35fa, (q15_t)0x3f36,
+    (q15_t)0x3607, (q15_t)0x3f38, (q15_t)0x3613, (q15_t)0x3f3a, (q15_t)0x3620, (q15_t)0x3f3c, (q15_t)0x362c, (q15_t)0x3f3e,
+    (q15_t)0x3639, (q15_t)0x3f40, (q15_t)0x3645, (q15_t)0x3f42, (q15_t)0x3651, (q15_t)0x3f43, (q15_t)0x365e, (q15_t)0x3f45,
+    (q15_t)0x366a, (q15_t)0x3f47, (q15_t)0x3677, (q15_t)0x3f49, (q15_t)0x3683, (q15_t)0x3f4b, (q15_t)0x3690, (q15_t)0x3f4d,
+    (q15_t)0x369c, (q15_t)0x3f4f, (q15_t)0x36a8, (q15_t)0x3f51, (q15_t)0x36b5, (q15_t)0x3f52, (q15_t)0x36c1, (q15_t)0x3f54,
+    (q15_t)0x36ce, (q15_t)0x3f56, (q15_t)0x36da, (q15_t)0x3f58, (q15_t)0x36e7, (q15_t)0x3f5a, (q15_t)0x36f3, (q15_t)0x3f5b,
+    (q15_t)0x36ff, (q15_t)0x3f5d, (q15_t)0x370c, (q15_t)0x3f5f, (q15_t)0x3718, (q15_t)0x3f61, (q15_t)0x3725, (q15_t)0x3f62,
+    (q15_t)0x3731, (q15_t)0x3f64, (q15_t)0x373e, (q15_t)0x3f66, (q15_t)0x374a, (q15_t)0x3f68, (q15_t)0x3757, (q15_t)0x3f69,
+    (q15_t)0x3763, (q15_t)0x3f6b, (q15_t)0x376f, (q15_t)0x3f6d, (q15_t)0x377c, (q15_t)0x3f6e, (q15_t)0x3788, (q15_t)0x3f70,
+    (q15_t)0x3795, (q15_t)0x3f72, (q15_t)0x37a1, (q15_t)0x3f73, (q15_t)0x37ae, (q15_t)0x3f75, (q15_t)0x37ba, (q15_t)0x3f77,
+    (q15_t)0x37c7, (q15_t)0x3f78, (q15_t)0x37d3, (q15_t)0x3f7a, (q15_t)0x37e0, (q15_t)0x3f7b, (q15_t)0x37ec, (q15_t)0x3f7d,
+    (q15_t)0x37f9, (q15_t)0x3f7f, (q15_t)0x3805, (q15_t)0x3f80, (q15_t)0x3811, (q15_t)0x3f82, (q15_t)0x381e, (q15_t)0x3f83,
+    (q15_t)0x382a, (q15_t)0x3f85, (q15_t)0x3837, (q15_t)0x3f86, (q15_t)0x3843, (q15_t)0x3f88, (q15_t)0x3850, (q15_t)0x3f89,
+    (q15_t)0x385c, (q15_t)0x3f8b, (q15_t)0x3869, (q15_t)0x3f8c, (q15_t)0x3875, (q15_t)0x3f8e, (q15_t)0x3882, (q15_t)0x3f8f,
+    (q15_t)0x388e, (q15_t)0x3f91, (q15_t)0x389b, (q15_t)0x3f92, (q15_t)0x38a7, (q15_t)0x3f94, (q15_t)0x38b4, (q15_t)0x3f95,
+    (q15_t)0x38c0, (q15_t)0x3f97, (q15_t)0x38cd, (q15_t)0x3f98, (q15_t)0x38d9, (q15_t)0x3f99, (q15_t)0x38e6, (q15_t)0x3f9b,
+    (q15_t)0x38f2, (q15_t)0x3f9c, (q15_t)0x38ff, (q15_t)0x3f9e, (q15_t)0x390b, (q15_t)0x3f9f, (q15_t)0x3918, (q15_t)0x3fa0,
+    (q15_t)0x3924, (q15_t)0x3fa2, (q15_t)0x3931, (q15_t)0x3fa3, (q15_t)0x393d, (q15_t)0x3fa4, (q15_t)0x394a, (q15_t)0x3fa6,
+    (q15_t)0x3956, (q15_t)0x3fa7, (q15_t)0x3963, (q15_t)0x3fa8, (q15_t)0x396f, (q15_t)0x3faa, (q15_t)0x397c, (q15_t)0x3fab,
+    (q15_t)0x3988, (q15_t)0x3fac, (q15_t)0x3995, (q15_t)0x3fad, (q15_t)0x39a1, (q15_t)0x3faf, (q15_t)0x39ae, (q15_t)0x3fb0,
+    (q15_t)0x39ba, (q15_t)0x3fb1, (q15_t)0x39c7, (q15_t)0x3fb2, (q15_t)0x39d3, (q15_t)0x3fb4, (q15_t)0x39e0, (q15_t)0x3fb5,
+    (q15_t)0x39ec, (q15_t)0x3fb6, (q15_t)0x39f9, (q15_t)0x3fb7, (q15_t)0x3a05, (q15_t)0x3fb8, (q15_t)0x3a12, (q15_t)0x3fb9,
+    (q15_t)0x3a1e, (q15_t)0x3fbb, (q15_t)0x3a2b, (q15_t)0x3fbc, (q15_t)0x3a37, (q15_t)0x3fbd, (q15_t)0x3a44, (q15_t)0x3fbe,
+    (q15_t)0x3a50, (q15_t)0x3fbf, (q15_t)0x3a5d, (q15_t)0x3fc0, (q15_t)0x3a69, (q15_t)0x3fc1, (q15_t)0x3a76, (q15_t)0x3fc3,
+    (q15_t)0x3a82, (q15_t)0x3fc4, (q15_t)0x3a8f, (q15_t)0x3fc5, (q15_t)0x3a9b, (q15_t)0x3fc6, (q15_t)0x3aa8, (q15_t)0x3fc7,
+    (q15_t)0x3ab4, (q15_t)0x3fc8, (q15_t)0x3ac1, (q15_t)0x3fc9, (q15_t)0x3acd, (q15_t)0x3fca, (q15_t)0x3ada, (q15_t)0x3fcb,
+    (q15_t)0x3ae6, (q15_t)0x3fcc, (q15_t)0x3af3, (q15_t)0x3fcd, (q15_t)0x3b00, (q15_t)0x3fce, (q15_t)0x3b0c, (q15_t)0x3fcf,
+    (q15_t)0x3b19, (q15_t)0x3fd0, (q15_t)0x3b25, (q15_t)0x3fd1, (q15_t)0x3b32, (q15_t)0x3fd2, (q15_t)0x3b3e, (q15_t)0x3fd3,
+    (q15_t)0x3b4b, (q15_t)0x3fd4, (q15_t)0x3b57, (q15_t)0x3fd5, (q15_t)0x3b64, (q15_t)0x3fd5, (q15_t)0x3b70, (q15_t)0x3fd6,
+    (q15_t)0x3b7d, (q15_t)0x3fd7, (q15_t)0x3b89, (q15_t)0x3fd8, (q15_t)0x3b96, (q15_t)0x3fd9, (q15_t)0x3ba2, (q15_t)0x3fda,
+    (q15_t)0x3baf, (q15_t)0x3fdb, (q15_t)0x3bbc, (q15_t)0x3fdc, (q15_t)0x3bc8, (q15_t)0x3fdc, (q15_t)0x3bd5, (q15_t)0x3fdd,
+    (q15_t)0x3be1, (q15_t)0x3fde, (q15_t)0x3bee, (q15_t)0x3fdf, (q15_t)0x3bfa, (q15_t)0x3fe0, (q15_t)0x3c07, (q15_t)0x3fe0,
+    (q15_t)0x3c13, (q15_t)0x3fe1, (q15_t)0x3c20, (q15_t)0x3fe2, (q15_t)0x3c2c, (q15_t)0x3fe3, (q15_t)0x3c39, (q15_t)0x3fe3,
+    (q15_t)0x3c45, (q15_t)0x3fe4, (q15_t)0x3c52, (q15_t)0x3fe5, (q15_t)0x3c5f, (q15_t)0x3fe6, (q15_t)0x3c6b, (q15_t)0x3fe6,
+    (q15_t)0x3c78, (q15_t)0x3fe7, (q15_t)0x3c84, (q15_t)0x3fe8, (q15_t)0x3c91, (q15_t)0x3fe8, (q15_t)0x3c9d, (q15_t)0x3fe9,
+    (q15_t)0x3caa, (q15_t)0x3fea, (q15_t)0x3cb6, (q15_t)0x3fea, (q15_t)0x3cc3, (q15_t)0x3feb, (q15_t)0x3cd0, (q15_t)0x3fec,
+    (q15_t)0x3cdc, (q15_t)0x3fec, (q15_t)0x3ce9, (q15_t)0x3fed, (q15_t)0x3cf5, (q15_t)0x3fed, (q15_t)0x3d02, (q15_t)0x3fee,
+    (q15_t)0x3d0e, (q15_t)0x3fef, (q15_t)0x3d1b, (q15_t)0x3fef, (q15_t)0x3d27, (q15_t)0x3ff0, (q15_t)0x3d34, (q15_t)0x3ff0,
+    (q15_t)0x3d40, (q15_t)0x3ff1, (q15_t)0x3d4d, (q15_t)0x3ff1, (q15_t)0x3d5a, (q15_t)0x3ff2, (q15_t)0x3d66, (q15_t)0x3ff2,
+    (q15_t)0x3d73, (q15_t)0x3ff3, (q15_t)0x3d7f, (q15_t)0x3ff3, (q15_t)0x3d8c, (q15_t)0x3ff4, (q15_t)0x3d98, (q15_t)0x3ff4,
+    (q15_t)0x3da5, (q15_t)0x3ff5, (q15_t)0x3db2, (q15_t)0x3ff5, (q15_t)0x3dbe, (q15_t)0x3ff6, (q15_t)0x3dcb, (q15_t)0x3ff6,
+    (q15_t)0x3dd7, (q15_t)0x3ff7, (q15_t)0x3de4, (q15_t)0x3ff7, (q15_t)0x3df0, (q15_t)0x3ff7, (q15_t)0x3dfd, (q15_t)0x3ff8,
+    (q15_t)0x3e09, (q15_t)0x3ff8, (q15_t)0x3e16, (q15_t)0x3ff9, (q15_t)0x3e23, (q15_t)0x3ff9, (q15_t)0x3e2f, (q15_t)0x3ff9,
+    (q15_t)0x3e3c, (q15_t)0x3ffa, (q15_t)0x3e48, (q15_t)0x3ffa, (q15_t)0x3e55, (q15_t)0x3ffa, (q15_t)0x3e61, (q15_t)0x3ffb,
+    (q15_t)0x3e6e, (q15_t)0x3ffb, (q15_t)0x3e7a, (q15_t)0x3ffb, (q15_t)0x3e87, (q15_t)0x3ffc, (q15_t)0x3e94, (q15_t)0x3ffc,
+    (q15_t)0x3ea0, (q15_t)0x3ffc, (q15_t)0x3ead, (q15_t)0x3ffc, (q15_t)0x3eb9, (q15_t)0x3ffd, (q15_t)0x3ec6, (q15_t)0x3ffd,
+    (q15_t)0x3ed2, (q15_t)0x3ffd, (q15_t)0x3edf, (q15_t)0x3ffd, (q15_t)0x3eec, (q15_t)0x3ffe, (q15_t)0x3ef8, (q15_t)0x3ffe,
+    (q15_t)0x3f05, (q15_t)0x3ffe, (q15_t)0x3f11, (q15_t)0x3ffe, (q15_t)0x3f1e, (q15_t)0x3ffe, (q15_t)0x3f2a, (q15_t)0x3fff,
+    (q15_t)0x3f37, (q15_t)0x3fff, (q15_t)0x3f44, (q15_t)0x3fff, (q15_t)0x3f50, (q15_t)0x3fff, (q15_t)0x3f5d, (q15_t)0x3fff,
+    (q15_t)0x3f69, (q15_t)0x3fff, (q15_t)0x3f76, (q15_t)0x3fff, (q15_t)0x3f82, (q15_t)0x4000, (q15_t)0x3f8f, (q15_t)0x4000,
+    (q15_t)0x3f9b, (q15_t)0x4000, (q15_t)0x3fa8, (q15_t)0x4000, (q15_t)0x3fb5, (q15_t)0x4000, (q15_t)0x3fc1, (q15_t)0x4000,
+    (q15_t)0x3fce, (q15_t)0x4000, (q15_t)0x3fda, (q15_t)0x4000, (q15_t)0x3fe7, (q15_t)0x4000, (q15_t)0x3ff3, (q15_t)0x4000,
+};
+
+/**
+  @par
+  Generation of real_CoefB array:
+  @par
+  n = 4096
+  
for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }

+  @par
+  Convert to fixed point Q15 format
+        round(pBTable[i] * pow(2, 15))
+*/
+const q15_t __ALIGNED(4) realCoefBQ15[8192] = {
+    (q15_t)0x4000, (q15_t)0x4000, (q15_t)0x400d, (q15_t)0x4000, (q15_t)0x4019, (q15_t)0x4000, (q15_t)0x4026, (q15_t)0x4000,
+    (q15_t)0x4032, (q15_t)0x4000, (q15_t)0x403f, (q15_t)0x4000, (q15_t)0x404b, (q15_t)0x4000, (q15_t)0x4058, (q15_t)0x4000,
+    (q15_t)0x4065, (q15_t)0x4000, (q15_t)0x4071, (q15_t)0x4000, (q15_t)0x407e, (q15_t)0x4000, (q15_t)0x408a, (q15_t)0x3fff,
+    (q15_t)0x4097, (q15_t)0x3fff, (q15_t)0x40a3, (q15_t)0x3fff, (q15_t)0x40b0, (q15_t)0x3fff, (q15_t)0x40bc, (q15_t)0x3fff,
+    (q15_t)0x40c9, (q15_t)0x3fff, (q15_t)0x40d6, (q15_t)0x3fff, (q15_t)0x40e2, (q15_t)0x3ffe, (q15_t)0x40ef, (q15_t)0x3ffe,
+    (q15_t)0x40fb, (q15_t)0x3ffe, (q15_t)0x4108, (q15_t)0x3ffe, (q15_t)0x4114, (q15_t)0x3ffe, (q15_t)0x4121, (q15_t)0x3ffd,
+    (q15_t)0x412e, (q15_t)0x3ffd, (q15_t)0x413a, (q15_t)0x3ffd, (q15_t)0x4147, (q15_t)0x3ffd, (q15_t)0x4153, (q15_t)0x3ffc,
+    (q15_t)0x4160, (q15_t)0x3ffc, (q15_t)0x416c, (q15_t)0x3ffc, (q15_t)0x4179, (q15_t)0x3ffc, (q15_t)0x4186, (q15_t)0x3ffb,
+    (q15_t)0x4192, (q15_t)0x3ffb, (q15_t)0x419f, (q15_t)0x3ffb, (q15_t)0x41ab, (q15_t)0x3ffa, (q15_t)0x41b8, (q15_t)0x3ffa,
+    (q15_t)0x41c4, (q15_t)0x3ffa, (q15_t)0x41d1, (q15_t)0x3ff9, (q15_t)0x41dd, (q15_t)0x3ff9, (q15_t)0x41ea, (q15_t)0x3ff9,
+    (q15_t)0x41f7, (q15_t)0x3ff8, (q15_t)0x4203, (q15_t)0x3ff8, (q15_t)0x4210, (q15_t)0x3ff7, (q15_t)0x421c, (q15_t)0x3ff7,
+    (q15_t)0x4229, (q15_t)0x3ff7, (q15_t)0x4235, (q15_t)0x3ff6, (q15_t)0x4242, (q15_t)0x3ff6, (q15_t)0x424e, (q15_t)0x3ff5,
+    (q15_t)0x425b, (q15_t)0x3ff5, (q15_t)0x4268, (q15_t)0x3ff4, (q15_t)0x4274, (q15_t)0x3ff4, (q15_t)0x4281, (q15_t)0x3ff3,
+    (q15_t)0x428d, (q15_t)0x3ff3, (q15_t)0x429a, (q15_t)0x3ff2, (q15_t)0x42a6, (q15_t)0x3ff2, (q15_t)0x42b3, (q15_t)0x3ff1,
+    (q15_t)0x42c0, (q15_t)0x3ff1, (q15_t)0x42cc, (q15_t)0x3ff0, (q15_t)0x42d9, (q15_t)0x3ff0, (q15_t)0x42e5, (q15_t)0x3fef,
+    (q15_t)0x42f2, (q15_t)0x3fef, (q15_t)0x42fe, (q15_t)0x3fee, (q15_t)0x430b, (q15_t)0x3fed, (q15_t)0x4317, (q15_t)0x3fed,
+    (q15_t)0x4324, (q15_t)0x3fec, (q15_t)0x4330, (q15_t)0x3fec, (q15_t)0x433d, (q15_t)0x3feb, (q15_t)0x434a, (q15_t)0x3fea,
+    (q15_t)0x4356, (q15_t)0x3fea, (q15_t)0x4363, (q15_t)0x3fe9, (q15_t)0x436f, (q15_t)0x3fe8, (q15_t)0x437c, (q15_t)0x3fe8,
+    (q15_t)0x4388, (q15_t)0x3fe7, (q15_t)0x4395, (q15_t)0x3fe6, (q15_t)0x43a1, (q15_t)0x3fe6, (q15_t)0x43ae, (q15_t)0x3fe5,
+    (q15_t)0x43bb, (q15_t)0x3fe4, (q15_t)0x43c7, (q15_t)0x3fe3, (q15_t)0x43d4, (q15_t)0x3fe3, (q15_t)0x43e0, (q15_t)0x3fe2,
+    (q15_t)0x43ed, (q15_t)0x3fe1, (q15_t)0x43f9, (q15_t)0x3fe0, (q15_t)0x4406, (q15_t)0x3fe0, (q15_t)0x4412, (q15_t)0x3fdf,
+    (q15_t)0x441f, (q15_t)0x3fde, (q15_t)0x442b, (q15_t)0x3fdd, (q15_t)0x4438, (q15_t)0x3fdc, (q15_t)0x4444, (q15_t)0x3fdc,
+    (q15_t)0x4451, (q15_t)0x3fdb, (q15_t)0x445e, (q15_t)0x3fda, (q15_t)0x446a, (q15_t)0x3fd9, (q15_t)0x4477, (q15_t)0x3fd8,
+    (q15_t)0x4483, (q15_t)0x3fd7, (q15_t)0x4490, (q15_t)0x3fd6, (q15_t)0x449c, (q15_t)0x3fd5, (q15_t)0x44a9, (q15_t)0x3fd5,
+    (q15_t)0x44b5, (q15_t)0x3fd4, (q15_t)0x44c2, (q15_t)0x3fd3, (q15_t)0x44ce, (q15_t)0x3fd2, (q15_t)0x44db, (q15_t)0x3fd1,
+    (q15_t)0x44e7, (q15_t)0x3fd0, (q15_t)0x44f4, (q15_t)0x3fcf, (q15_t)0x4500, (q15_t)0x3fce, (q15_t)0x450d, (q15_t)0x3fcd,
+    (q15_t)0x451a, (q15_t)0x3fcc, (q15_t)0x4526, (q15_t)0x3fcb, (q15_t)0x4533, (q15_t)0x3fca, (q15_t)0x453f, (q15_t)0x3fc9,
+    (q15_t)0x454c, (q15_t)0x3fc8, (q15_t)0x4558, (q15_t)0x3fc7, (q15_t)0x4565, (q15_t)0x3fc6, (q15_t)0x4571, (q15_t)0x3fc5,
+    (q15_t)0x457e, (q15_t)0x3fc4, (q15_t)0x458a, (q15_t)0x3fc3, (q15_t)0x4597, (q15_t)0x3fc1, (q15_t)0x45a3, (q15_t)0x3fc0,
+    (q15_t)0x45b0, (q15_t)0x3fbf, (q15_t)0x45bc, (q15_t)0x3fbe, (q15_t)0x45c9, (q15_t)0x3fbd, (q15_t)0x45d5, (q15_t)0x3fbc,
+    (q15_t)0x45e2, (q15_t)0x3fbb, (q15_t)0x45ee, (q15_t)0x3fb9, (q15_t)0x45fb, (q15_t)0x3fb8, (q15_t)0x4607, (q15_t)0x3fb7,
+    (q15_t)0x4614, (q15_t)0x3fb6, (q15_t)0x4620, (q15_t)0x3fb5, (q15_t)0x462d, (q15_t)0x3fb4, (q15_t)0x4639, (q15_t)0x3fb2,
+    (q15_t)0x4646, (q15_t)0x3fb1, (q15_t)0x4652, (q15_t)0x3fb0, (q15_t)0x465f, (q15_t)0x3faf, (q15_t)0x466b, (q15_t)0x3fad,
+    (q15_t)0x4678, (q15_t)0x3fac, (q15_t)0x4684, (q15_t)0x3fab, (q15_t)0x4691, (q15_t)0x3faa, (q15_t)0x469d, (q15_t)0x3fa8,
+    (q15_t)0x46aa, (q15_t)0x3fa7, (q15_t)0x46b6, (q15_t)0x3fa6, (q15_t)0x46c3, (q15_t)0x3fa4, (q15_t)0x46cf, (q15_t)0x3fa3,
+    (q15_t)0x46dc, (q15_t)0x3fa2, (q15_t)0x46e8, (q15_t)0x3fa0, (q15_t)0x46f5, (q15_t)0x3f9f, (q15_t)0x4701, (q15_t)0x3f9e,
+    (q15_t)0x470e, (q15_t)0x3f9c, (q15_t)0x471a, (q15_t)0x3f9b, (q15_t)0x4727, (q15_t)0x3f99, (q15_t)0x4733, (q15_t)0x3f98,
+    (q15_t)0x4740, (q15_t)0x3f97, (q15_t)0x474c, (q15_t)0x3f95, (q15_t)0x4759, (q15_t)0x3f94, (q15_t)0x4765, (q15_t)0x3f92,
+    (q15_t)0x4772, (q15_t)0x3f91, (q15_t)0x477e, (q15_t)0x3f8f, (q15_t)0x478b, (q15_t)0x3f8e, (q15_t)0x4797, (q15_t)0x3f8c,
+    (q15_t)0x47a4, (q15_t)0x3f8b, (q15_t)0x47b0, (q15_t)0x3f89, (q15_t)0x47bd, (q15_t)0x3f88, (q15_t)0x47c9, (q15_t)0x3f86,
+    (q15_t)0x47d6, (q15_t)0x3f85, (q15_t)0x47e2, (q15_t)0x3f83, (q15_t)0x47ef, (q15_t)0x3f82, (q15_t)0x47fb, (q15_t)0x3f80,
+    (q15_t)0x4807, (q15_t)0x3f7f, (q15_t)0x4814, (q15_t)0x3f7d, (q15_t)0x4820, (q15_t)0x3f7b, (q15_t)0x482d, (q15_t)0x3f7a,
+    (q15_t)0x4839, (q15_t)0x3f78, (q15_t)0x4846, (q15_t)0x3f77, (q15_t)0x4852, (q15_t)0x3f75, (q15_t)0x485f, (q15_t)0x3f73,
+    (q15_t)0x486b, (q15_t)0x3f72, (q15_t)0x4878, (q15_t)0x3f70, (q15_t)0x4884, (q15_t)0x3f6e, (q15_t)0x4891, (q15_t)0x3f6d,
+    (q15_t)0x489d, (q15_t)0x3f6b, (q15_t)0x48a9, (q15_t)0x3f69, (q15_t)0x48b6, (q15_t)0x3f68, (q15_t)0x48c2, (q15_t)0x3f66,
+    (q15_t)0x48cf, (q15_t)0x3f64, (q15_t)0x48db, (q15_t)0x3f62, (q15_t)0x48e8, (q15_t)0x3f61, (q15_t)0x48f4, (q15_t)0x3f5f,
+    (q15_t)0x4901, (q15_t)0x3f5d, (q15_t)0x490d, (q15_t)0x3f5b, (q15_t)0x4919, (q15_t)0x3f5a, (q15_t)0x4926, (q15_t)0x3f58,
+    (q15_t)0x4932, (q15_t)0x3f56, (q15_t)0x493f, (q15_t)0x3f54, (q15_t)0x494b, (q15_t)0x3f52, (q15_t)0x4958, (q15_t)0x3f51,
+    (q15_t)0x4964, (q15_t)0x3f4f, (q15_t)0x4970, (q15_t)0x3f4d, (q15_t)0x497d, (q15_t)0x3f4b, (q15_t)0x4989, (q15_t)0x3f49,
+    (q15_t)0x4996, (q15_t)0x3f47, (q15_t)0x49a2, (q15_t)0x3f45, (q15_t)0x49af, (q15_t)0x3f43, (q15_t)0x49bb, (q15_t)0x3f42,
+    (q15_t)0x49c7, (q15_t)0x3f40, (q15_t)0x49d4, (q15_t)0x3f3e, (q15_t)0x49e0, (q15_t)0x3f3c, (q15_t)0x49ed, (q15_t)0x3f3a,
+    (q15_t)0x49f9, (q15_t)0x3f38, (q15_t)0x4a06, (q15_t)0x3f36, (q15_t)0x4a12, (q15_t)0x3f34, (q15_t)0x4a1e, (q15_t)0x3f32,
+    (q15_t)0x4a2b, (q15_t)0x3f30, (q15_t)0x4a37, (q15_t)0x3f2e, (q15_t)0x4a44, (q15_t)0x3f2c, (q15_t)0x4a50, (q15_t)0x3f2a,
+    (q15_t)0x4a5c, (q15_t)0x3f28, (q15_t)0x4a69, (q15_t)0x3f26, (q15_t)0x4a75, (q15_t)0x3f24, (q15_t)0x4a82, (q15_t)0x3f22,
+    (q15_t)0x4a8e, (q15_t)0x3f20, (q15_t)0x4a9a, (q15_t)0x3f1e, (q15_t)0x4aa7, (q15_t)0x3f1c, (q15_t)0x4ab3, (q15_t)0x3f19,
+    (q15_t)0x4ac0, (q15_t)0x3f17, (q15_t)0x4acc, (q15_t)0x3f15, (q15_t)0x4ad8, (q15_t)0x3f13, (q15_t)0x4ae5, (q15_t)0x3f11,
+    (q15_t)0x4af1, (q15_t)0x3f0f, (q15_t)0x4afd, (q15_t)0x3f0d, (q15_t)0x4b0a, (q15_t)0x3f0a, (q15_t)0x4b16, (q15_t)0x3f08,
+    (q15_t)0x4b23, (q15_t)0x3f06, (q15_t)0x4b2f, (q15_t)0x3f04, (q15_t)0x4b3b, (q15_t)0x3f02, (q15_t)0x4b48, (q15_t)0x3f00,
+    (q15_t)0x4b54, (q15_t)0x3efd, (q15_t)0x4b60, (q15_t)0x3efb, (q15_t)0x4b6d, (q15_t)0x3ef9, (q15_t)0x4b79, (q15_t)0x3ef7,
+    (q15_t)0x4b85, (q15_t)0x3ef4, (q15_t)0x4b92, (q15_t)0x3ef2, (q15_t)0x4b9e, (q15_t)0x3ef0, (q15_t)0x4bab, (q15_t)0x3eed,
+    (q15_t)0x4bb7, (q15_t)0x3eeb, (q15_t)0x4bc3, (q15_t)0x3ee9, (q15_t)0x4bd0, (q15_t)0x3ee7, (q15_t)0x4bdc, (q15_t)0x3ee4,
+    (q15_t)0x4be8, (q15_t)0x3ee2, (q15_t)0x4bf5, (q15_t)0x3ee0, (q15_t)0x4c01, (q15_t)0x3edd, (q15_t)0x4c0d, (q15_t)0x3edb,
+    (q15_t)0x4c1a, (q15_t)0x3ed8, (q15_t)0x4c26, (q15_t)0x3ed6, (q15_t)0x4c32, (q15_t)0x3ed4, (q15_t)0x4c3f, (q15_t)0x3ed1,
+    (q15_t)0x4c4b, (q15_t)0x3ecf, (q15_t)0x4c57, (q15_t)0x3ecc, (q15_t)0x4c64, (q15_t)0x3eca, (q15_t)0x4c70, (q15_t)0x3ec8,
+    (q15_t)0x4c7c, (q15_t)0x3ec5, (q15_t)0x4c89, (q15_t)0x3ec3, (q15_t)0x4c95, (q15_t)0x3ec0, (q15_t)0x4ca1, (q15_t)0x3ebe,
+    (q15_t)0x4cae, (q15_t)0x3ebb, (q15_t)0x4cba, (q15_t)0x3eb9, (q15_t)0x4cc6, (q15_t)0x3eb6, (q15_t)0x4cd3, (q15_t)0x3eb4,
+    (q15_t)0x4cdf, (q15_t)0x3eb1, (q15_t)0x4ceb, (q15_t)0x3eaf, (q15_t)0x4cf8, (q15_t)0x3eac, (q15_t)0x4d04, (q15_t)0x3eaa,
+    (q15_t)0x4d10, (q15_t)0x3ea7, (q15_t)0x4d1c, (q15_t)0x3ea5, (q15_t)0x4d29, (q15_t)0x3ea2, (q15_t)0x4d35, (q15_t)0x3e9f,
+    (q15_t)0x4d41, (q15_t)0x3e9d, (q15_t)0x4d4e, (q15_t)0x3e9a, (q15_t)0x4d5a, (q15_t)0x3e98, (q15_t)0x4d66, (q15_t)0x3e95,
+    (q15_t)0x4d72, (q15_t)0x3e92, (q15_t)0x4d7f, (q15_t)0x3e90, (q15_t)0x4d8b, (q15_t)0x3e8d, (q15_t)0x4d97, (q15_t)0x3e8a,
+    (q15_t)0x4da4, (q15_t)0x3e88, (q15_t)0x4db0, (q15_t)0x3e85, (q15_t)0x4dbc, (q15_t)0x3e82, (q15_t)0x4dc8, (q15_t)0x3e80,
+    (q15_t)0x4dd5, (q15_t)0x3e7d, (q15_t)0x4de1, (q15_t)0x3e7a, (q15_t)0x4ded, (q15_t)0x3e77, (q15_t)0x4df9, (q15_t)0x3e75,
+    (q15_t)0x4e06, (q15_t)0x3e72, (q15_t)0x4e12, (q15_t)0x3e6f, (q15_t)0x4e1e, (q15_t)0x3e6c, (q15_t)0x4e2b, (q15_t)0x3e6a,
+    (q15_t)0x4e37, (q15_t)0x3e67, (q15_t)0x4e43, (q15_t)0x3e64, (q15_t)0x4e4f, (q15_t)0x3e61, (q15_t)0x4e5c, (q15_t)0x3e5e,
+    (q15_t)0x4e68, (q15_t)0x3e5c, (q15_t)0x4e74, (q15_t)0x3e59, (q15_t)0x4e80, (q15_t)0x3e56, (q15_t)0x4e8c, (q15_t)0x3e53,
+    (q15_t)0x4e99, (q15_t)0x3e50, (q15_t)0x4ea5, (q15_t)0x3e4d, (q15_t)0x4eb1, (q15_t)0x3e4a, (q15_t)0x4ebd, (q15_t)0x3e48,
+    (q15_t)0x4eca, (q15_t)0x3e45, (q15_t)0x4ed6, (q15_t)0x3e42, (q15_t)0x4ee2, (q15_t)0x3e3f, (q15_t)0x4eee, (q15_t)0x3e3c,
+    (q15_t)0x4efb, (q15_t)0x3e39, (q15_t)0x4f07, (q15_t)0x3e36, (q15_t)0x4f13, (q15_t)0x3e33, (q15_t)0x4f1f, (q15_t)0x3e30,
+    (q15_t)0x4f2b, (q15_t)0x3e2d, (q15_t)0x4f38, (q15_t)0x3e2a, (q15_t)0x4f44, (q15_t)0x3e27, (q15_t)0x4f50, (q15_t)0x3e24,
+    (q15_t)0x4f5c, (q15_t)0x3e21, (q15_t)0x4f68, (q15_t)0x3e1e, (q15_t)0x4f75, (q15_t)0x3e1b, (q15_t)0x4f81, (q15_t)0x3e18,
+    (q15_t)0x4f8d, (q15_t)0x3e15, (q15_t)0x4f99, (q15_t)0x3e12, (q15_t)0x4fa5, (q15_t)0x3e0f, (q15_t)0x4fb2, (q15_t)0x3e0c,
+    (q15_t)0x4fbe, (q15_t)0x3e09, (q15_t)0x4fca, (q15_t)0x3e06, (q15_t)0x4fd6, (q15_t)0x3e03, (q15_t)0x4fe2, (q15_t)0x3dff,
+    (q15_t)0x4fee, (q15_t)0x3dfc, (q15_t)0x4ffb, (q15_t)0x3df9, (q15_t)0x5007, (q15_t)0x3df6, (q15_t)0x5013, (q15_t)0x3df3,
+    (q15_t)0x501f, (q15_t)0x3df0, (q15_t)0x502b, (q15_t)0x3ded, (q15_t)0x5037, (q15_t)0x3de9, (q15_t)0x5044, (q15_t)0x3de6,
+    (q15_t)0x5050, (q15_t)0x3de3, (q15_t)0x505c, (q15_t)0x3de0, (q15_t)0x5068, (q15_t)0x3ddd, (q15_t)0x5074, (q15_t)0x3dd9,
+    (q15_t)0x5080, (q15_t)0x3dd6, (q15_t)0x508c, (q15_t)0x3dd3, (q15_t)0x5099, (q15_t)0x3dd0, (q15_t)0x50a5, (q15_t)0x3dcc,
+    (q15_t)0x50b1, (q15_t)0x3dc9, (q15_t)0x50bd, (q15_t)0x3dc6, (q15_t)0x50c9, (q15_t)0x3dc2, (q15_t)0x50d5, (q15_t)0x3dbf,
+    (q15_t)0x50e1, (q15_t)0x3dbc, (q15_t)0x50ed, (q15_t)0x3db9, (q15_t)0x50fa, (q15_t)0x3db5, (q15_t)0x5106, (q15_t)0x3db2,
+    (q15_t)0x5112, (q15_t)0x3daf, (q15_t)0x511e, (q15_t)0x3dab, (q15_t)0x512a, (q15_t)0x3da8, (q15_t)0x5136, (q15_t)0x3da4,
+    (q15_t)0x5142, (q15_t)0x3da1, (q15_t)0x514e, (q15_t)0x3d9e, (q15_t)0x515a, (q15_t)0x3d9a, (q15_t)0x5167, (q15_t)0x3d97,
+    (q15_t)0x5173, (q15_t)0x3d93, (q15_t)0x517f, (q15_t)0x3d90, (q15_t)0x518b, (q15_t)0x3d8d, (q15_t)0x5197, (q15_t)0x3d89,
+    (q15_t)0x51a3, (q15_t)0x3d86, (q15_t)0x51af, (q15_t)0x3d82, (q15_t)0x51bb, (q15_t)0x3d7f, (q15_t)0x51c7, (q15_t)0x3d7b,
+    (q15_t)0x51d3, (q15_t)0x3d78, (q15_t)0x51df, (q15_t)0x3d74, (q15_t)0x51eb, (q15_t)0x3d71, (q15_t)0x51f7, (q15_t)0x3d6d,
+    (q15_t)0x5204, (q15_t)0x3d6a, (q15_t)0x5210, (q15_t)0x3d66, (q15_t)0x521c, (q15_t)0x3d63, (q15_t)0x5228, (q15_t)0x3d5f,
+    (q15_t)0x5234, (q15_t)0x3d5b, (q15_t)0x5240, (q15_t)0x3d58, (q15_t)0x524c, (q15_t)0x3d54, (q15_t)0x5258, (q15_t)0x3d51,
+    (q15_t)0x5264, (q15_t)0x3d4d, (q15_t)0x5270, (q15_t)0x3d49, (q15_t)0x527c, (q15_t)0x3d46, (q15_t)0x5288, (q15_t)0x3d42,
+    (q15_t)0x5294, (q15_t)0x3d3f, (q15_t)0x52a0, (q15_t)0x3d3b, (q15_t)0x52ac, (q15_t)0x3d37, (q15_t)0x52b8, (q15_t)0x3d34,
+    (q15_t)0x52c4, (q15_t)0x3d30, (q15_t)0x52d0, (q15_t)0x3d2c, (q15_t)0x52dc, (q15_t)0x3d28, (q15_t)0x52e8, (q15_t)0x3d25,
+    (q15_t)0x52f4, (q15_t)0x3d21, (q15_t)0x5300, (q15_t)0x3d1d, (q15_t)0x530c, (q15_t)0x3d1a, (q15_t)0x5318, (q15_t)0x3d16,
+    (q15_t)0x5324, (q15_t)0x3d12, (q15_t)0x5330, (q15_t)0x3d0e, (q15_t)0x533c, (q15_t)0x3d0b, (q15_t)0x5348, (q15_t)0x3d07,
+    (q15_t)0x5354, (q15_t)0x3d03, (q15_t)0x5360, (q15_t)0x3cff, (q15_t)0x536c, (q15_t)0x3cfb, (q15_t)0x5378, (q15_t)0x3cf8,
+    (q15_t)0x5384, (q15_t)0x3cf4, (q15_t)0x5390, (q15_t)0x3cf0, (q15_t)0x539c, (q15_t)0x3cec, (q15_t)0x53a8, (q15_t)0x3ce8,
+    (q15_t)0x53b4, (q15_t)0x3ce4, (q15_t)0x53c0, (q15_t)0x3ce0, (q15_t)0x53cc, (q15_t)0x3cdd, (q15_t)0x53d8, (q15_t)0x3cd9,
+    (q15_t)0x53e4, (q15_t)0x3cd5, (q15_t)0x53f0, (q15_t)0x3cd1, (q15_t)0x53fb, (q15_t)0x3ccd, (q15_t)0x5407, (q15_t)0x3cc9,
+    (q15_t)0x5413, (q15_t)0x3cc5, (q15_t)0x541f, (q15_t)0x3cc1, (q15_t)0x542b, (q15_t)0x3cbd, (q15_t)0x5437, (q15_t)0x3cb9,
+    (q15_t)0x5443, (q15_t)0x3cb5, (q15_t)0x544f, (q15_t)0x3cb1, (q15_t)0x545b, (q15_t)0x3cad, (q15_t)0x5467, (q15_t)0x3ca9,
+    (q15_t)0x5473, (q15_t)0x3ca5, (q15_t)0x547f, (q15_t)0x3ca1, (q15_t)0x548b, (q15_t)0x3c9d, (q15_t)0x5496, (q15_t)0x3c99,
+    (q15_t)0x54a2, (q15_t)0x3c95, (q15_t)0x54ae, (q15_t)0x3c91, (q15_t)0x54ba, (q15_t)0x3c8d, (q15_t)0x54c6, (q15_t)0x3c89,
+    (q15_t)0x54d2, (q15_t)0x3c85, (q15_t)0x54de, (q15_t)0x3c81, (q15_t)0x54ea, (q15_t)0x3c7d, (q15_t)0x54f6, (q15_t)0x3c79,
+    (q15_t)0x5501, (q15_t)0x3c74, (q15_t)0x550d, (q15_t)0x3c70, (q15_t)0x5519, (q15_t)0x3c6c, (q15_t)0x5525, (q15_t)0x3c68,
+    (q15_t)0x5531, (q15_t)0x3c64, (q15_t)0x553d, (q15_t)0x3c60, (q15_t)0x5549, (q15_t)0x3c5b, (q15_t)0x5554, (q15_t)0x3c57,
+    (q15_t)0x5560, (q15_t)0x3c53, (q15_t)0x556c, (q15_t)0x3c4f, (q15_t)0x5578, (q15_t)0x3c4b, (q15_t)0x5584, (q15_t)0x3c46,
+    (q15_t)0x5590, (q15_t)0x3c42, (q15_t)0x559b, (q15_t)0x3c3e, (q15_t)0x55a7, (q15_t)0x3c3a, (q15_t)0x55b3, (q15_t)0x3c36,
+    (q15_t)0x55bf, (q15_t)0x3c31, (q15_t)0x55cb, (q15_t)0x3c2d, (q15_t)0x55d7, (q15_t)0x3c29, (q15_t)0x55e2, (q15_t)0x3c24,
+    (q15_t)0x55ee, (q15_t)0x3c20, (q15_t)0x55fa, (q15_t)0x3c1c, (q15_t)0x5606, (q15_t)0x3c17, (q15_t)0x5612, (q15_t)0x3c13,
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+    (q15_t)0x640b, (q15_t)0x34e2, (q15_t)0x6416, (q15_t)0x34db, (q15_t)0x6420, (q15_t)0x34d4, (q15_t)0x642b, (q15_t)0x34cd,
+    (q15_t)0x6435, (q15_t)0x34c6, (q15_t)0x643f, (q15_t)0x34bf, (q15_t)0x644a, (q15_t)0x34b8, (q15_t)0x6454, (q15_t)0x34b1,
+    (q15_t)0x645e, (q15_t)0x34aa, (q15_t)0x6469, (q15_t)0x34a2, (q15_t)0x6473, (q15_t)0x349b, (q15_t)0x647d, (q15_t)0x3494,
+    (q15_t)0x6488, (q15_t)0x348d, (q15_t)0x6492, (q15_t)0x3486, (q15_t)0x649c, (q15_t)0x347f, (q15_t)0x64a7, (q15_t)0x3477,
+    (q15_t)0x64b1, (q15_t)0x3470, (q15_t)0x64bb, (q15_t)0x3469, (q15_t)0x64c5, (q15_t)0x3462, (q15_t)0x64d0, (q15_t)0x345b,
+    (q15_t)0x64da, (q15_t)0x3453, (q15_t)0x64e4, (q15_t)0x344c, (q15_t)0x64ef, (q15_t)0x3445, (q15_t)0x64f9, (q15_t)0x343e,
+    (q15_t)0x6503, (q15_t)0x3436, (q15_t)0x650d, (q15_t)0x342f, (q15_t)0x6518, (q15_t)0x3428, (q15_t)0x6522, (q15_t)0x3420,
+    (q15_t)0x652c, (q15_t)0x3419, (q15_t)0x6536, (q15_t)0x3412, (q15_t)0x6541, (q15_t)0x340b, (q15_t)0x654b, (q15_t)0x3403,
+    (q15_t)0x6555, (q15_t)0x33fc, (q15_t)0x655f, (q15_t)0x33f5, (q15_t)0x6569, (q15_t)0x33ed, (q15_t)0x6574, (q15_t)0x33e6,
+    (q15_t)0x657e, (q15_t)0x33df, (q15_t)0x6588, (q15_t)0x33d7, (q15_t)0x6592, (q15_t)0x33d0, (q15_t)0x659c, (q15_t)0x33c8,
+    (q15_t)0x65a6, (q15_t)0x33c1, (q15_t)0x65b1, (q15_t)0x33ba, (q15_t)0x65bb, (q15_t)0x33b2, (q15_t)0x65c5, (q15_t)0x33ab,
+    (q15_t)0x65cf, (q15_t)0x33a3, (q15_t)0x65d9, (q15_t)0x339c, (q15_t)0x65e3, (q15_t)0x3395, (q15_t)0x65ed, (q15_t)0x338d,
+    (q15_t)0x65f8, (q15_t)0x3386, (q15_t)0x6602, (q15_t)0x337e, (q15_t)0x660c, (q15_t)0x3377, (q15_t)0x6616, (q15_t)0x336f,
+    (q15_t)0x6620, (q15_t)0x3368, (q15_t)0x662a, (q15_t)0x3360, (q15_t)0x6634, (q15_t)0x3359, (q15_t)0x663e, (q15_t)0x3351,
+    (q15_t)0x6648, (q15_t)0x334a, (q15_t)0x6652, (q15_t)0x3342, (q15_t)0x665c, (q15_t)0x333b, (q15_t)0x6666, (q15_t)0x3333,
+    (q15_t)0x6671, (q15_t)0x332c, (q15_t)0x667b, (q15_t)0x3324, (q15_t)0x6685, (q15_t)0x331d, (q15_t)0x668f, (q15_t)0x3315,
+    (q15_t)0x6699, (q15_t)0x330d, (q15_t)0x66a3, (q15_t)0x3306, (q15_t)0x66ad, (q15_t)0x32fe, (q15_t)0x66b7, (q15_t)0x32f7,
+    (q15_t)0x66c1, (q15_t)0x32ef, (q15_t)0x66cb, (q15_t)0x32e7, (q15_t)0x66d5, (q15_t)0x32e0, (q15_t)0x66df, (q15_t)0x32d8,
+    (q15_t)0x66e9, (q15_t)0x32d0, (q15_t)0x66f3, (q15_t)0x32c9, (q15_t)0x66fd, (q15_t)0x32c1, (q15_t)0x6707, (q15_t)0x32ba,
+    (q15_t)0x6711, (q15_t)0x32b2, (q15_t)0x671a, (q15_t)0x32aa, (q15_t)0x6724, (q15_t)0x32a3, (q15_t)0x672e, (q15_t)0x329b,
+    (q15_t)0x6738, (q15_t)0x3293, (q15_t)0x6742, (q15_t)0x328b, (q15_t)0x674c, (q15_t)0x3284, (q15_t)0x6756, (q15_t)0x327c,
+    (q15_t)0x6760, (q15_t)0x3274, (q15_t)0x676a, (q15_t)0x326d, (q15_t)0x6774, (q15_t)0x3265, (q15_t)0x677e, (q15_t)0x325d,
+    (q15_t)0x6788, (q15_t)0x3255, (q15_t)0x6791, (q15_t)0x324e, (q15_t)0x679b, (q15_t)0x3246, (q15_t)0x67a5, (q15_t)0x323e,
+    (q15_t)0x67af, (q15_t)0x3236, (q15_t)0x67b9, (q15_t)0x322e, (q15_t)0x67c3, (q15_t)0x3227, (q15_t)0x67cd, (q15_t)0x321f,
+    (q15_t)0x67d6, (q15_t)0x3217, (q15_t)0x67e0, (q15_t)0x320f, (q15_t)0x67ea, (q15_t)0x3207, (q15_t)0x67f4, (q15_t)0x31ff,
+    (q15_t)0x67fe, (q15_t)0x31f8, (q15_t)0x6808, (q15_t)0x31f0, (q15_t)0x6811, (q15_t)0x31e8, (q15_t)0x681b, (q15_t)0x31e0,
+    (q15_t)0x6825, (q15_t)0x31d8, (q15_t)0x682f, (q15_t)0x31d0, (q15_t)0x6838, (q15_t)0x31c8, (q15_t)0x6842, (q15_t)0x31c0,
+    (q15_t)0x684c, (q15_t)0x31b9, (q15_t)0x6856, (q15_t)0x31b1, (q15_t)0x6860, (q15_t)0x31a9, (q15_t)0x6869, (q15_t)0x31a1,
+    (q15_t)0x6873, (q15_t)0x3199, (q15_t)0x687d, (q15_t)0x3191, (q15_t)0x6886, (q15_t)0x3189, (q15_t)0x6890, (q15_t)0x3181,
+    (q15_t)0x689a, (q15_t)0x3179, (q15_t)0x68a4, (q15_t)0x3171, (q15_t)0x68ad, (q15_t)0x3169, (q15_t)0x68b7, (q15_t)0x3161,
+    (q15_t)0x68c1, (q15_t)0x3159, (q15_t)0x68ca, (q15_t)0x3151, (q15_t)0x68d4, (q15_t)0x3149, (q15_t)0x68de, (q15_t)0x3141,
+    (q15_t)0x68e7, (q15_t)0x3139, (q15_t)0x68f1, (q15_t)0x3131, (q15_t)0x68fb, (q15_t)0x3129, (q15_t)0x6904, (q15_t)0x3121,
+    (q15_t)0x690e, (q15_t)0x3119, (q15_t)0x6918, (q15_t)0x3111, (q15_t)0x6921, (q15_t)0x3109, (q15_t)0x692b, (q15_t)0x3101,
+    (q15_t)0x6935, (q15_t)0x30f9, (q15_t)0x693e, (q15_t)0x30f0, (q15_t)0x6948, (q15_t)0x30e8, (q15_t)0x6951, (q15_t)0x30e0,
+    (q15_t)0x695b, (q15_t)0x30d8, (q15_t)0x6965, (q15_t)0x30d0, (q15_t)0x696e, (q15_t)0x30c8, (q15_t)0x6978, (q15_t)0x30c0,
+    (q15_t)0x6981, (q15_t)0x30b8, (q15_t)0x698b, (q15_t)0x30af, (q15_t)0x6994, (q15_t)0x30a7, (q15_t)0x699e, (q15_t)0x309f,
+    (q15_t)0x69a7, (q15_t)0x3097, (q15_t)0x69b1, (q15_t)0x308f, (q15_t)0x69bb, (q15_t)0x3087, (q15_t)0x69c4, (q15_t)0x307e,
+    (q15_t)0x69ce, (q15_t)0x3076, (q15_t)0x69d7, (q15_t)0x306e, (q15_t)0x69e1, (q15_t)0x3066, (q15_t)0x69ea, (q15_t)0x305d,
+    (q15_t)0x69f4, (q15_t)0x3055, (q15_t)0x69fd, (q15_t)0x304d, (q15_t)0x6a07, (q15_t)0x3045, (q15_t)0x6a10, (q15_t)0x303c,
+    (q15_t)0x6a1a, (q15_t)0x3034, (q15_t)0x6a23, (q15_t)0x302c, (q15_t)0x6a2c, (q15_t)0x3024, (q15_t)0x6a36, (q15_t)0x301b,
+    (q15_t)0x6a3f, (q15_t)0x3013, (q15_t)0x6a49, (q15_t)0x300b, (q15_t)0x6a52, (q15_t)0x3002, (q15_t)0x6a5c, (q15_t)0x2ffa,
+    (q15_t)0x6a65, (q15_t)0x2ff2, (q15_t)0x6a6e, (q15_t)0x2fea, (q15_t)0x6a78, (q15_t)0x2fe1, (q15_t)0x6a81, (q15_t)0x2fd9,
+    (q15_t)0x6a8b, (q15_t)0x2fd0, (q15_t)0x6a94, (q15_t)0x2fc8, (q15_t)0x6a9d, (q15_t)0x2fc0, (q15_t)0x6aa7, (q15_t)0x2fb7,
+    (q15_t)0x6ab0, (q15_t)0x2faf, (q15_t)0x6ab9, (q15_t)0x2fa7, (q15_t)0x6ac3, (q15_t)0x2f9e, (q15_t)0x6acc, (q15_t)0x2f96,
+    (q15_t)0x6ad6, (q15_t)0x2f8d, (q15_t)0x6adf, (q15_t)0x2f85, (q15_t)0x6ae8, (q15_t)0x2f7d, (q15_t)0x6af2, (q15_t)0x2f74,
+    (q15_t)0x6afb, (q15_t)0x2f6c, (q15_t)0x6b04, (q15_t)0x2f63, (q15_t)0x6b0d, (q15_t)0x2f5b, (q15_t)0x6b17, (q15_t)0x2f52,
+    (q15_t)0x6b20, (q15_t)0x2f4a, (q15_t)0x6b29, (q15_t)0x2f41, (q15_t)0x6b33, (q15_t)0x2f39, (q15_t)0x6b3c, (q15_t)0x2f30,
+    (q15_t)0x6b45, (q15_t)0x2f28, (q15_t)0x6b4e, (q15_t)0x2f20, (q15_t)0x6b58, (q15_t)0x2f17, (q15_t)0x6b61, (q15_t)0x2f0e,
+    (q15_t)0x6b6a, (q15_t)0x2f06, (q15_t)0x6b73, (q15_t)0x2efd, (q15_t)0x6b7d, (q15_t)0x2ef5, (q15_t)0x6b86, (q15_t)0x2eec,
+    (q15_t)0x6b8f, (q15_t)0x2ee4, (q15_t)0x6b98, (q15_t)0x2edb, (q15_t)0x6ba1, (q15_t)0x2ed3, (q15_t)0x6bab, (q15_t)0x2eca,
+    (q15_t)0x6bb4, (q15_t)0x2ec2, (q15_t)0x6bbd, (q15_t)0x2eb9, (q15_t)0x6bc6, (q15_t)0x2eb0, (q15_t)0x6bcf, (q15_t)0x2ea8,
+    (q15_t)0x6bd8, (q15_t)0x2e9f, (q15_t)0x6be2, (q15_t)0x2e97, (q15_t)0x6beb, (q15_t)0x2e8e, (q15_t)0x6bf4, (q15_t)0x2e85,
+    (q15_t)0x6bfd, (q15_t)0x2e7d, (q15_t)0x6c06, (q15_t)0x2e74, (q15_t)0x6c0f, (q15_t)0x2e6b, (q15_t)0x6c18, (q15_t)0x2e63,
+    (q15_t)0x6c21, (q15_t)0x2e5a, (q15_t)0x6c2b, (q15_t)0x2e51, (q15_t)0x6c34, (q15_t)0x2e49, (q15_t)0x6c3d, (q15_t)0x2e40,
+    (q15_t)0x6c46, (q15_t)0x2e37, (q15_t)0x6c4f, (q15_t)0x2e2f, (q15_t)0x6c58, (q15_t)0x2e26, (q15_t)0x6c61, (q15_t)0x2e1d,
+    (q15_t)0x6c6a, (q15_t)0x2e15, (q15_t)0x6c73, (q15_t)0x2e0c, (q15_t)0x6c7c, (q15_t)0x2e03, (q15_t)0x6c85, (q15_t)0x2dfa,
+    (q15_t)0x6c8e, (q15_t)0x2df2, (q15_t)0x6c97, (q15_t)0x2de9, (q15_t)0x6ca0, (q15_t)0x2de0, (q15_t)0x6ca9, (q15_t)0x2dd7,
+    (q15_t)0x6cb2, (q15_t)0x2dcf, (q15_t)0x6cbb, (q15_t)0x2dc6, (q15_t)0x6cc4, (q15_t)0x2dbd, (q15_t)0x6ccd, (q15_t)0x2db4,
+    (q15_t)0x6cd6, (q15_t)0x2dab, (q15_t)0x6cdf, (q15_t)0x2da3, (q15_t)0x6ce8, (q15_t)0x2d9a, (q15_t)0x6cf1, (q15_t)0x2d91,
+    (q15_t)0x6cfa, (q15_t)0x2d88, (q15_t)0x6d03, (q15_t)0x2d7f, (q15_t)0x6d0c, (q15_t)0x2d76, (q15_t)0x6d15, (q15_t)0x2d6e,
+    (q15_t)0x6d1e, (q15_t)0x2d65, (q15_t)0x6d27, (q15_t)0x2d5c, (q15_t)0x6d2f, (q15_t)0x2d53, (q15_t)0x6d38, (q15_t)0x2d4a,
+    (q15_t)0x6d41, (q15_t)0x2d41, (q15_t)0x6d4a, (q15_t)0x2d38, (q15_t)0x6d53, (q15_t)0x2d2f, (q15_t)0x6d5c, (q15_t)0x2d27,
+    (q15_t)0x6d65, (q15_t)0x2d1e, (q15_t)0x6d6e, (q15_t)0x2d15, (q15_t)0x6d76, (q15_t)0x2d0c, (q15_t)0x6d7f, (q15_t)0x2d03,
+    (q15_t)0x6d88, (q15_t)0x2cfa, (q15_t)0x6d91, (q15_t)0x2cf1, (q15_t)0x6d9a, (q15_t)0x2ce8, (q15_t)0x6da3, (q15_t)0x2cdf,
+    (q15_t)0x6dab, (q15_t)0x2cd6, (q15_t)0x6db4, (q15_t)0x2ccd, (q15_t)0x6dbd, (q15_t)0x2cc4, (q15_t)0x6dc6, (q15_t)0x2cbb,
+    (q15_t)0x6dcf, (q15_t)0x2cb2, (q15_t)0x6dd7, (q15_t)0x2ca9, (q15_t)0x6de0, (q15_t)0x2ca0, (q15_t)0x6de9, (q15_t)0x2c97,
+    (q15_t)0x6df2, (q15_t)0x2c8e, (q15_t)0x6dfa, (q15_t)0x2c85, (q15_t)0x6e03, (q15_t)0x2c7c, (q15_t)0x6e0c, (q15_t)0x2c73,
+    (q15_t)0x6e15, (q15_t)0x2c6a, (q15_t)0x6e1d, (q15_t)0x2c61, (q15_t)0x6e26, (q15_t)0x2c58, (q15_t)0x6e2f, (q15_t)0x2c4f,
+    (q15_t)0x6e37, (q15_t)0x2c46, (q15_t)0x6e40, (q15_t)0x2c3d, (q15_t)0x6e49, (q15_t)0x2c34, (q15_t)0x6e51, (q15_t)0x2c2b,
+    (q15_t)0x6e5a, (q15_t)0x2c21, (q15_t)0x6e63, (q15_t)0x2c18, (q15_t)0x6e6b, (q15_t)0x2c0f, (q15_t)0x6e74, (q15_t)0x2c06,
+    (q15_t)0x6e7d, (q15_t)0x2bfd, (q15_t)0x6e85, (q15_t)0x2bf4, (q15_t)0x6e8e, (q15_t)0x2beb, (q15_t)0x6e97, (q15_t)0x2be2,
+    (q15_t)0x6e9f, (q15_t)0x2bd8, (q15_t)0x6ea8, (q15_t)0x2bcf, (q15_t)0x6eb0, (q15_t)0x2bc6, (q15_t)0x6eb9, (q15_t)0x2bbd,
+    (q15_t)0x6ec2, (q15_t)0x2bb4, (q15_t)0x6eca, (q15_t)0x2bab, (q15_t)0x6ed3, (q15_t)0x2ba1, (q15_t)0x6edb, (q15_t)0x2b98,
+    (q15_t)0x6ee4, (q15_t)0x2b8f, (q15_t)0x6eec, (q15_t)0x2b86, (q15_t)0x6ef5, (q15_t)0x2b7d, (q15_t)0x6efd, (q15_t)0x2b73,
+    (q15_t)0x6f06, (q15_t)0x2b6a, (q15_t)0x6f0e, (q15_t)0x2b61, (q15_t)0x6f17, (q15_t)0x2b58, (q15_t)0x6f20, (q15_t)0x2b4e,
+    (q15_t)0x6f28, (q15_t)0x2b45, (q15_t)0x6f30, (q15_t)0x2b3c, (q15_t)0x6f39, (q15_t)0x2b33, (q15_t)0x6f41, (q15_t)0x2b29,
+    (q15_t)0x6f4a, (q15_t)0x2b20, (q15_t)0x6f52, (q15_t)0x2b17, (q15_t)0x6f5b, (q15_t)0x2b0d, (q15_t)0x6f63, (q15_t)0x2b04,
+    (q15_t)0x6f6c, (q15_t)0x2afb, (q15_t)0x6f74, (q15_t)0x2af2, (q15_t)0x6f7d, (q15_t)0x2ae8, (q15_t)0x6f85, (q15_t)0x2adf,
+    (q15_t)0x6f8d, (q15_t)0x2ad6, (q15_t)0x6f96, (q15_t)0x2acc, (q15_t)0x6f9e, (q15_t)0x2ac3, (q15_t)0x6fa7, (q15_t)0x2ab9,
+    (q15_t)0x6faf, (q15_t)0x2ab0, (q15_t)0x6fb7, (q15_t)0x2aa7, (q15_t)0x6fc0, (q15_t)0x2a9d, (q15_t)0x6fc8, (q15_t)0x2a94,
+    (q15_t)0x6fd0, (q15_t)0x2a8b, (q15_t)0x6fd9, (q15_t)0x2a81, (q15_t)0x6fe1, (q15_t)0x2a78, (q15_t)0x6fea, (q15_t)0x2a6e,
+    (q15_t)0x6ff2, (q15_t)0x2a65, (q15_t)0x6ffa, (q15_t)0x2a5c, (q15_t)0x7002, (q15_t)0x2a52, (q15_t)0x700b, (q15_t)0x2a49,
+    (q15_t)0x7013, (q15_t)0x2a3f, (q15_t)0x701b, (q15_t)0x2a36, (q15_t)0x7024, (q15_t)0x2a2c, (q15_t)0x702c, (q15_t)0x2a23,
+    (q15_t)0x7034, (q15_t)0x2a1a, (q15_t)0x703c, (q15_t)0x2a10, (q15_t)0x7045, (q15_t)0x2a07, (q15_t)0x704d, (q15_t)0x29fd,
+    (q15_t)0x7055, (q15_t)0x29f4, (q15_t)0x705d, (q15_t)0x29ea, (q15_t)0x7066, (q15_t)0x29e1, (q15_t)0x706e, (q15_t)0x29d7,
+    (q15_t)0x7076, (q15_t)0x29ce, (q15_t)0x707e, (q15_t)0x29c4, (q15_t)0x7087, (q15_t)0x29bb, (q15_t)0x708f, (q15_t)0x29b1,
+    (q15_t)0x7097, (q15_t)0x29a7, (q15_t)0x709f, (q15_t)0x299e, (q15_t)0x70a7, (q15_t)0x2994, (q15_t)0x70af, (q15_t)0x298b,
+    (q15_t)0x70b8, (q15_t)0x2981, (q15_t)0x70c0, (q15_t)0x2978, (q15_t)0x70c8, (q15_t)0x296e, (q15_t)0x70d0, (q15_t)0x2965,
+    (q15_t)0x70d8, (q15_t)0x295b, (q15_t)0x70e0, (q15_t)0x2951, (q15_t)0x70e8, (q15_t)0x2948, (q15_t)0x70f0, (q15_t)0x293e,
+    (q15_t)0x70f9, (q15_t)0x2935, (q15_t)0x7101, (q15_t)0x292b, (q15_t)0x7109, (q15_t)0x2921, (q15_t)0x7111, (q15_t)0x2918,
+    (q15_t)0x7119, (q15_t)0x290e, (q15_t)0x7121, (q15_t)0x2904, (q15_t)0x7129, (q15_t)0x28fb, (q15_t)0x7131, (q15_t)0x28f1,
+    (q15_t)0x7139, (q15_t)0x28e7, (q15_t)0x7141, (q15_t)0x28de, (q15_t)0x7149, (q15_t)0x28d4, (q15_t)0x7151, (q15_t)0x28ca,
+    (q15_t)0x7159, (q15_t)0x28c1, (q15_t)0x7161, (q15_t)0x28b7, (q15_t)0x7169, (q15_t)0x28ad, (q15_t)0x7171, (q15_t)0x28a4,
+    (q15_t)0x7179, (q15_t)0x289a, (q15_t)0x7181, (q15_t)0x2890, (q15_t)0x7189, (q15_t)0x2886, (q15_t)0x7191, (q15_t)0x287d,
+    (q15_t)0x7199, (q15_t)0x2873, (q15_t)0x71a1, (q15_t)0x2869, (q15_t)0x71a9, (q15_t)0x2860, (q15_t)0x71b1, (q15_t)0x2856,
+    (q15_t)0x71b9, (q15_t)0x284c, (q15_t)0x71c0, (q15_t)0x2842, (q15_t)0x71c8, (q15_t)0x2838, (q15_t)0x71d0, (q15_t)0x282f,
+    (q15_t)0x71d8, (q15_t)0x2825, (q15_t)0x71e0, (q15_t)0x281b, (q15_t)0x71e8, (q15_t)0x2811, (q15_t)0x71f0, (q15_t)0x2808,
+    (q15_t)0x71f8, (q15_t)0x27fe, (q15_t)0x71ff, (q15_t)0x27f4, (q15_t)0x7207, (q15_t)0x27ea, (q15_t)0x720f, (q15_t)0x27e0,
+    (q15_t)0x7217, (q15_t)0x27d6, (q15_t)0x721f, (q15_t)0x27cd, (q15_t)0x7227, (q15_t)0x27c3, (q15_t)0x722e, (q15_t)0x27b9,
+    (q15_t)0x7236, (q15_t)0x27af, (q15_t)0x723e, (q15_t)0x27a5, (q15_t)0x7246, (q15_t)0x279b, (q15_t)0x724e, (q15_t)0x2791,
+    (q15_t)0x7255, (q15_t)0x2788, (q15_t)0x725d, (q15_t)0x277e, (q15_t)0x7265, (q15_t)0x2774, (q15_t)0x726d, (q15_t)0x276a,
+    (q15_t)0x7274, (q15_t)0x2760, (q15_t)0x727c, (q15_t)0x2756, (q15_t)0x7284, (q15_t)0x274c, (q15_t)0x728b, (q15_t)0x2742,
+    (q15_t)0x7293, (q15_t)0x2738, (q15_t)0x729b, (q15_t)0x272e, (q15_t)0x72a3, (q15_t)0x2724, (q15_t)0x72aa, (q15_t)0x271a,
+    (q15_t)0x72b2, (q15_t)0x2711, (q15_t)0x72ba, (q15_t)0x2707, (q15_t)0x72c1, (q15_t)0x26fd, (q15_t)0x72c9, (q15_t)0x26f3,
+    (q15_t)0x72d0, (q15_t)0x26e9, (q15_t)0x72d8, (q15_t)0x26df, (q15_t)0x72e0, (q15_t)0x26d5, (q15_t)0x72e7, (q15_t)0x26cb,
+    (q15_t)0x72ef, (q15_t)0x26c1, (q15_t)0x72f7, (q15_t)0x26b7, (q15_t)0x72fe, (q15_t)0x26ad, (q15_t)0x7306, (q15_t)0x26a3,
+    (q15_t)0x730d, (q15_t)0x2699, (q15_t)0x7315, (q15_t)0x268f, (q15_t)0x731d, (q15_t)0x2685, (q15_t)0x7324, (q15_t)0x267b,
+    (q15_t)0x732c, (q15_t)0x2671, (q15_t)0x7333, (q15_t)0x2666, (q15_t)0x733b, (q15_t)0x265c, (q15_t)0x7342, (q15_t)0x2652,
+    (q15_t)0x734a, (q15_t)0x2648, (q15_t)0x7351, (q15_t)0x263e, (q15_t)0x7359, (q15_t)0x2634, (q15_t)0x7360, (q15_t)0x262a,
+    (q15_t)0x7368, (q15_t)0x2620, (q15_t)0x736f, (q15_t)0x2616, (q15_t)0x7377, (q15_t)0x260c, (q15_t)0x737e, (q15_t)0x2602,
+    (q15_t)0x7386, (q15_t)0x25f8, (q15_t)0x738d, (q15_t)0x25ed, (q15_t)0x7395, (q15_t)0x25e3, (q15_t)0x739c, (q15_t)0x25d9,
+    (q15_t)0x73a3, (q15_t)0x25cf, (q15_t)0x73ab, (q15_t)0x25c5, (q15_t)0x73b2, (q15_t)0x25bb, (q15_t)0x73ba, (q15_t)0x25b1,
+    (q15_t)0x73c1, (q15_t)0x25a6, (q15_t)0x73c8, (q15_t)0x259c, (q15_t)0x73d0, (q15_t)0x2592, (q15_t)0x73d7, (q15_t)0x2588,
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+    (q15_t)0x73fc, (q15_t)0x2555, (q15_t)0x7403, (q15_t)0x254b, (q15_t)0x740b, (q15_t)0x2541, (q15_t)0x7412, (q15_t)0x2536,
+    (q15_t)0x7419, (q15_t)0x252c, (q15_t)0x7420, (q15_t)0x2522, (q15_t)0x7428, (q15_t)0x2518, (q15_t)0x742f, (q15_t)0x250d,
+    (q15_t)0x7436, (q15_t)0x2503, (q15_t)0x743e, (q15_t)0x24f9, (q15_t)0x7445, (q15_t)0x24ef, (q15_t)0x744c, (q15_t)0x24e4,
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+    (q15_t)0x74e2, (q15_t)0x240b, (q15_t)0x74ea, (q15_t)0x2401, (q15_t)0x74f1, (q15_t)0x23f7, (q15_t)0x74f8, (q15_t)0x23ec,
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+    (q15_t)0x751b, (q15_t)0x23b8, (q15_t)0x7522, (q15_t)0x23ae, (q15_t)0x7529, (q15_t)0x23a3, (q15_t)0x7530, (q15_t)0x2399,
+    (q15_t)0x7537, (q15_t)0x238e, (q15_t)0x753e, (q15_t)0x2384, (q15_t)0x7545, (q15_t)0x237a, (q15_t)0x754c, (q15_t)0x236f,
+    (q15_t)0x7553, (q15_t)0x2365, (q15_t)0x755a, (q15_t)0x235a, (q15_t)0x7561, (q15_t)0x2350, (q15_t)0x7567, (q15_t)0x2345,
+    (q15_t)0x756e, (q15_t)0x233b, (q15_t)0x7575, (q15_t)0x2330, (q15_t)0x757c, (q15_t)0x2326, (q15_t)0x7583, (q15_t)0x231b,
+    (q15_t)0x758a, (q15_t)0x2311, (q15_t)0x7591, (q15_t)0x2306, (q15_t)0x7598, (q15_t)0x22fc, (q15_t)0x759f, (q15_t)0x22f1,
+    (q15_t)0x75a5, (q15_t)0x22e7, (q15_t)0x75ac, (q15_t)0x22dc, (q15_t)0x75b3, (q15_t)0x22d2, (q15_t)0x75ba, (q15_t)0x22c7,
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+    (q15_t)0x7612, (q15_t)0x223d, (q15_t)0x7619, (q15_t)0x2233, (q15_t)0x7620, (q15_t)0x2228, (q15_t)0x7626, (q15_t)0x221e,
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+    (q15_t)0x7648, (q15_t)0x21e8, (q15_t)0x764e, (q15_t)0x21de, (q15_t)0x7655, (q15_t)0x21d3, (q15_t)0x765c, (q15_t)0x21c8,
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+    (q15_t)0x767d, (q15_t)0x2193, (q15_t)0x7683, (q15_t)0x2188, (q15_t)0x768a, (q15_t)0x217d, (q15_t)0x7690, (q15_t)0x2173,
+    (q15_t)0x7697, (q15_t)0x2168, (q15_t)0x769d, (q15_t)0x215d, (q15_t)0x76a4, (q15_t)0x2153, (q15_t)0x76ab, (q15_t)0x2148,
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+    (q15_t)0x76e5, (q15_t)0x20e7, (q15_t)0x76eb, (q15_t)0x20dc, (q15_t)0x76f2, (q15_t)0x20d1, (q15_t)0x76f8, (q15_t)0x20c7,
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+    (q15_t)0x7718, (q15_t)0x2091, (q15_t)0x771f, (q15_t)0x2086, (q15_t)0x7725, (q15_t)0x207b, (q15_t)0x772c, (q15_t)0x2070,
+    (q15_t)0x7732, (q15_t)0x2065, (q15_t)0x7738, (q15_t)0x205b, (q15_t)0x773f, (q15_t)0x2050, (q15_t)0x7745, (q15_t)0x2045,
+    (q15_t)0x774b, (q15_t)0x203a, (q15_t)0x7752, (q15_t)0x202f, (q15_t)0x7758, (q15_t)0x2024, (q15_t)0x775e, (q15_t)0x2019,
+    (q15_t)0x7765, (q15_t)0x200f, (q15_t)0x776b, (q15_t)0x2004, (q15_t)0x7771, (q15_t)0x1ff9, (q15_t)0x7777, (q15_t)0x1fee,
+    (q15_t)0x777e, (q15_t)0x1fe3, (q15_t)0x7784, (q15_t)0x1fd8, (q15_t)0x778a, (q15_t)0x1fcd, (q15_t)0x7790, (q15_t)0x1fc2,
+    (q15_t)0x7797, (q15_t)0x1fb7, (q15_t)0x779d, (q15_t)0x1fac, (q15_t)0x77a3, (q15_t)0x1fa2, (q15_t)0x77a9, (q15_t)0x1f97,
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+    (q15_t)0x77e1, (q15_t)0x1f34, (q15_t)0x77e7, (q15_t)0x1f29, (q15_t)0x77ed, (q15_t)0x1f1e, (q15_t)0x77f3, (q15_t)0x1f13,
+    (q15_t)0x77f9, (q15_t)0x1f08, (q15_t)0x77ff, (q15_t)0x1efd, (q15_t)0x7805, (q15_t)0x1ef2, (q15_t)0x780b, (q15_t)0x1ee7,
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+    (q15_t)0x7842, (q15_t)0x1e84, (q15_t)0x7848, (q15_t)0x1e79, (q15_t)0x784e, (q15_t)0x1e6e, (q15_t)0x7854, (q15_t)0x1e63,
+    (q15_t)0x785a, (q15_t)0x1e58, (q15_t)0x7860, (q15_t)0x1e4d, (q15_t)0x7866, (q15_t)0x1e42, (q15_t)0x786b, (q15_t)0x1e36,
+    (q15_t)0x7871, (q15_t)0x1e2b, (q15_t)0x7877, (q15_t)0x1e20, (q15_t)0x787d, (q15_t)0x1e15, (q15_t)0x7883, (q15_t)0x1e0a,
+    (q15_t)0x7889, (q15_t)0x1dff, (q15_t)0x788f, (q15_t)0x1df4, (q15_t)0x7895, (q15_t)0x1de9, (q15_t)0x789b, (q15_t)0x1dde,
+    (q15_t)0x78a1, (q15_t)0x1dd3, (q15_t)0x78a6, (q15_t)0x1dc7, (q15_t)0x78ac, (q15_t)0x1dbc, (q15_t)0x78b2, (q15_t)0x1db1,
+    (q15_t)0x78b8, (q15_t)0x1da6, (q15_t)0x78be, (q15_t)0x1d9b, (q15_t)0x78c3, (q15_t)0x1d90, (q15_t)0x78c9, (q15_t)0x1d85,
+    (q15_t)0x78cf, (q15_t)0x1d79, (q15_t)0x78d5, (q15_t)0x1d6e, (q15_t)0x78db, (q15_t)0x1d63, (q15_t)0x78e0, (q15_t)0x1d58,
+    (q15_t)0x78e6, (q15_t)0x1d4d, (q15_t)0x78ec, (q15_t)0x1d42, (q15_t)0x78f2, (q15_t)0x1d36, (q15_t)0x78f7, (q15_t)0x1d2b,
+    (q15_t)0x78fd, (q15_t)0x1d20, (q15_t)0x7903, (q15_t)0x1d15, (q15_t)0x7909, (q15_t)0x1d0a, (q15_t)0x790e, (q15_t)0x1cff,
+    (q15_t)0x7914, (q15_t)0x1cf3, (q15_t)0x791a, (q15_t)0x1ce8, (q15_t)0x791f, (q15_t)0x1cdd, (q15_t)0x7925, (q15_t)0x1cd2,
+    (q15_t)0x792b, (q15_t)0x1cc6, (q15_t)0x7930, (q15_t)0x1cbb, (q15_t)0x7936, (q15_t)0x1cb0, (q15_t)0x793b, (q15_t)0x1ca5,
+    (q15_t)0x7941, (q15_t)0x1c99, (q15_t)0x7947, (q15_t)0x1c8e, (q15_t)0x794c, (q15_t)0x1c83, (q15_t)0x7952, (q15_t)0x1c78,
+    (q15_t)0x7958, (q15_t)0x1c6c, (q15_t)0x795d, (q15_t)0x1c61, (q15_t)0x7963, (q15_t)0x1c56, (q15_t)0x7968, (q15_t)0x1c4b,
+    (q15_t)0x796e, (q15_t)0x1c3f, (q15_t)0x7973, (q15_t)0x1c34, (q15_t)0x7979, (q15_t)0x1c29, (q15_t)0x797e, (q15_t)0x1c1e,
+    (q15_t)0x7984, (q15_t)0x1c12, (q15_t)0x7989, (q15_t)0x1c07, (q15_t)0x798f, (q15_t)0x1bfc, (q15_t)0x7994, (q15_t)0x1bf0,
+    (q15_t)0x799a, (q15_t)0x1be5, (q15_t)0x799f, (q15_t)0x1bda, (q15_t)0x79a5, (q15_t)0x1bce, (q15_t)0x79aa, (q15_t)0x1bc3,
+    (q15_t)0x79b0, (q15_t)0x1bb8, (q15_t)0x79b5, (q15_t)0x1bac, (q15_t)0x79bb, (q15_t)0x1ba1, (q15_t)0x79c0, (q15_t)0x1b96,
+    (q15_t)0x79c5, (q15_t)0x1b8a, (q15_t)0x79cb, (q15_t)0x1b7f, (q15_t)0x79d0, (q15_t)0x1b74, (q15_t)0x79d6, (q15_t)0x1b68,
+    (q15_t)0x79db, (q15_t)0x1b5d, (q15_t)0x79e0, (q15_t)0x1b52, (q15_t)0x79e6, (q15_t)0x1b46, (q15_t)0x79eb, (q15_t)0x1b3b,
+    (q15_t)0x79f0, (q15_t)0x1b30, (q15_t)0x79f6, (q15_t)0x1b24, (q15_t)0x79fb, (q15_t)0x1b19, (q15_t)0x7a00, (q15_t)0x1b0d,
+    (q15_t)0x7a06, (q15_t)0x1b02, (q15_t)0x7a0b, (q15_t)0x1af7, (q15_t)0x7a10, (q15_t)0x1aeb, (q15_t)0x7a16, (q15_t)0x1ae0,
+    (q15_t)0x7a1b, (q15_t)0x1ad4, (q15_t)0x7a20, (q15_t)0x1ac9, (q15_t)0x7a25, (q15_t)0x1abe, (q15_t)0x7a2b, (q15_t)0x1ab2,
+    (q15_t)0x7a30, (q15_t)0x1aa7, (q15_t)0x7a35, (q15_t)0x1a9b, (q15_t)0x7a3a, (q15_t)0x1a90, (q15_t)0x7a3f, (q15_t)0x1a84,
+    (q15_t)0x7a45, (q15_t)0x1a79, (q15_t)0x7a4a, (q15_t)0x1a6e, (q15_t)0x7a4f, (q15_t)0x1a62, (q15_t)0x7a54, (q15_t)0x1a57,
+    (q15_t)0x7a59, (q15_t)0x1a4b, (q15_t)0x7a5f, (q15_t)0x1a40, (q15_t)0x7a64, (q15_t)0x1a34, (q15_t)0x7a69, (q15_t)0x1a29,
+    (q15_t)0x7a6e, (q15_t)0x1a1d, (q15_t)0x7a73, (q15_t)0x1a12, (q15_t)0x7a78, (q15_t)0x1a06, (q15_t)0x7a7d, (q15_t)0x19fb,
+    (q15_t)0x7a82, (q15_t)0x19ef, (q15_t)0x7a88, (q15_t)0x19e4, (q15_t)0x7a8d, (q15_t)0x19d8, (q15_t)0x7a92, (q15_t)0x19cd,
+    (q15_t)0x7a97, (q15_t)0x19c1, (q15_t)0x7a9c, (q15_t)0x19b6, (q15_t)0x7aa1, (q15_t)0x19aa, (q15_t)0x7aa6, (q15_t)0x199f,
+    (q15_t)0x7aab, (q15_t)0x1993, (q15_t)0x7ab0, (q15_t)0x1988, (q15_t)0x7ab5, (q15_t)0x197c, (q15_t)0x7aba, (q15_t)0x1971,
+    (q15_t)0x7abf, (q15_t)0x1965, (q15_t)0x7ac4, (q15_t)0x195a, (q15_t)0x7ac9, (q15_t)0x194e, (q15_t)0x7ace, (q15_t)0x1943,
+    (q15_t)0x7ad3, (q15_t)0x1937, (q15_t)0x7ad8, (q15_t)0x192c, (q15_t)0x7add, (q15_t)0x1920, (q15_t)0x7ae2, (q15_t)0x1914,
+    (q15_t)0x7ae6, (q15_t)0x1909, (q15_t)0x7aeb, (q15_t)0x18fd, (q15_t)0x7af0, (q15_t)0x18f2, (q15_t)0x7af5, (q15_t)0x18e6,
+    (q15_t)0x7afa, (q15_t)0x18db, (q15_t)0x7aff, (q15_t)0x18cf, (q15_t)0x7b04, (q15_t)0x18c3, (q15_t)0x7b09, (q15_t)0x18b8,
+    (q15_t)0x7b0e, (q15_t)0x18ac, (q15_t)0x7b12, (q15_t)0x18a1, (q15_t)0x7b17, (q15_t)0x1895, (q15_t)0x7b1c, (q15_t)0x1889,
+    (q15_t)0x7b21, (q15_t)0x187e, (q15_t)0x7b26, (q15_t)0x1872, (q15_t)0x7b2a, (q15_t)0x1867, (q15_t)0x7b2f, (q15_t)0x185b,
+    (q15_t)0x7b34, (q15_t)0x184f, (q15_t)0x7b39, (q15_t)0x1844, (q15_t)0x7b3e, (q15_t)0x1838, (q15_t)0x7b42, (q15_t)0x182d,
+    (q15_t)0x7b47, (q15_t)0x1821, (q15_t)0x7b4c, (q15_t)0x1815, (q15_t)0x7b50, (q15_t)0x180a, (q15_t)0x7b55, (q15_t)0x17fe,
+    (q15_t)0x7b5a, (q15_t)0x17f2, (q15_t)0x7b5f, (q15_t)0x17e7, (q15_t)0x7b63, (q15_t)0x17db, (q15_t)0x7b68, (q15_t)0x17cf,
+    (q15_t)0x7b6d, (q15_t)0x17c4, (q15_t)0x7b71, (q15_t)0x17b8, (q15_t)0x7b76, (q15_t)0x17ac, (q15_t)0x7b7b, (q15_t)0x17a1,
+    (q15_t)0x7b7f, (q15_t)0x1795, (q15_t)0x7b84, (q15_t)0x1789, (q15_t)0x7b88, (q15_t)0x177e, (q15_t)0x7b8d, (q15_t)0x1772,
+    (q15_t)0x7b92, (q15_t)0x1766, (q15_t)0x7b96, (q15_t)0x175b, (q15_t)0x7b9b, (q15_t)0x174f, (q15_t)0x7b9f, (q15_t)0x1743,
+    (q15_t)0x7ba4, (q15_t)0x1737, (q15_t)0x7ba9, (q15_t)0x172c, (q15_t)0x7bad, (q15_t)0x1720, (q15_t)0x7bb2, (q15_t)0x1714,
+    (q15_t)0x7bb6, (q15_t)0x1709, (q15_t)0x7bbb, (q15_t)0x16fd, (q15_t)0x7bbf, (q15_t)0x16f1, (q15_t)0x7bc4, (q15_t)0x16e5,
+    (q15_t)0x7bc8, (q15_t)0x16da, (q15_t)0x7bcd, (q15_t)0x16ce, (q15_t)0x7bd1, (q15_t)0x16c2, (q15_t)0x7bd6, (q15_t)0x16b6,
+    (q15_t)0x7bda, (q15_t)0x16ab, (q15_t)0x7bde, (q15_t)0x169f, (q15_t)0x7be3, (q15_t)0x1693, (q15_t)0x7be7, (q15_t)0x1687,
+    (q15_t)0x7bec, (q15_t)0x167c, (q15_t)0x7bf0, (q15_t)0x1670, (q15_t)0x7bf5, (q15_t)0x1664, (q15_t)0x7bf9, (q15_t)0x1658,
+    (q15_t)0x7bfd, (q15_t)0x164c, (q15_t)0x7c02, (q15_t)0x1641, (q15_t)0x7c06, (q15_t)0x1635, (q15_t)0x7c0a, (q15_t)0x1629,
+    (q15_t)0x7c0f, (q15_t)0x161d, (q15_t)0x7c13, (q15_t)0x1612, (q15_t)0x7c17, (q15_t)0x1606, (q15_t)0x7c1c, (q15_t)0x15fa,
+    (q15_t)0x7c20, (q15_t)0x15ee, (q15_t)0x7c24, (q15_t)0x15e2, (q15_t)0x7c29, (q15_t)0x15d7, (q15_t)0x7c2d, (q15_t)0x15cb,
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+    (q15_t)0x7c42, (q15_t)0x1590, (q15_t)0x7c46, (q15_t)0x1584, (q15_t)0x7c4b, (q15_t)0x1578, (q15_t)0x7c4f, (q15_t)0x156c,
+    (q15_t)0x7c53, (q15_t)0x1560, (q15_t)0x7c57, (q15_t)0x1554, (q15_t)0x7c5b, (q15_t)0x1549, (q15_t)0x7c60, (q15_t)0x153d,
+    (q15_t)0x7c64, (q15_t)0x1531, (q15_t)0x7c68, (q15_t)0x1525, (q15_t)0x7c6c, (q15_t)0x1519, (q15_t)0x7c70, (q15_t)0x150d,
+    (q15_t)0x7c74, (q15_t)0x1501, (q15_t)0x7c79, (q15_t)0x14f6, (q15_t)0x7c7d, (q15_t)0x14ea, (q15_t)0x7c81, (q15_t)0x14de,
+    (q15_t)0x7c85, (q15_t)0x14d2, (q15_t)0x7c89, (q15_t)0x14c6, (q15_t)0x7c8d, (q15_t)0x14ba, (q15_t)0x7c91, (q15_t)0x14ae,
+    (q15_t)0x7c95, (q15_t)0x14a2, (q15_t)0x7c99, (q15_t)0x1496, (q15_t)0x7c9d, (q15_t)0x148b, (q15_t)0x7ca1, (q15_t)0x147f,
+    (q15_t)0x7ca5, (q15_t)0x1473, (q15_t)0x7ca9, (q15_t)0x1467, (q15_t)0x7cad, (q15_t)0x145b, (q15_t)0x7cb1, (q15_t)0x144f,
+    (q15_t)0x7cb5, (q15_t)0x1443, (q15_t)0x7cb9, (q15_t)0x1437, (q15_t)0x7cbd, (q15_t)0x142b, (q15_t)0x7cc1, (q15_t)0x141f,
+    (q15_t)0x7cc5, (q15_t)0x1413, (q15_t)0x7cc9, (q15_t)0x1407, (q15_t)0x7ccd, (q15_t)0x13fb, (q15_t)0x7cd1, (q15_t)0x13f0,
+    (q15_t)0x7cd5, (q15_t)0x13e4, (q15_t)0x7cd9, (q15_t)0x13d8, (q15_t)0x7cdd, (q15_t)0x13cc, (q15_t)0x7ce0, (q15_t)0x13c0,
+    (q15_t)0x7ce4, (q15_t)0x13b4, (q15_t)0x7ce8, (q15_t)0x13a8, (q15_t)0x7cec, (q15_t)0x139c, (q15_t)0x7cf0, (q15_t)0x1390,
+    (q15_t)0x7cf4, (q15_t)0x1384, (q15_t)0x7cf8, (q15_t)0x1378, (q15_t)0x7cfb, (q15_t)0x136c, (q15_t)0x7cff, (q15_t)0x1360,
+    (q15_t)0x7d03, (q15_t)0x1354, (q15_t)0x7d07, (q15_t)0x1348, (q15_t)0x7d0b, (q15_t)0x133c, (q15_t)0x7d0e, (q15_t)0x1330,
+    (q15_t)0x7d12, (q15_t)0x1324, (q15_t)0x7d16, (q15_t)0x1318, (q15_t)0x7d1a, (q15_t)0x130c, (q15_t)0x7d1d, (q15_t)0x1300,
+    (q15_t)0x7d21, (q15_t)0x12f4, (q15_t)0x7d25, (q15_t)0x12e8, (q15_t)0x7d28, (q15_t)0x12dc, (q15_t)0x7d2c, (q15_t)0x12d0,
+    (q15_t)0x7d30, (q15_t)0x12c4, (q15_t)0x7d34, (q15_t)0x12b8, (q15_t)0x7d37, (q15_t)0x12ac, (q15_t)0x7d3b, (q15_t)0x12a0,
+    (q15_t)0x7d3f, (q15_t)0x1294, (q15_t)0x7d42, (q15_t)0x1288, (q15_t)0x7d46, (q15_t)0x127c, (q15_t)0x7d49, (q15_t)0x1270,
+    (q15_t)0x7d4d, (q15_t)0x1264, (q15_t)0x7d51, (q15_t)0x1258, (q15_t)0x7d54, (q15_t)0x124c, (q15_t)0x7d58, (q15_t)0x1240,
+    (q15_t)0x7d5b, (q15_t)0x1234, (q15_t)0x7d5f, (q15_t)0x1228, (q15_t)0x7d63, (q15_t)0x121c, (q15_t)0x7d66, (q15_t)0x1210,
+    (q15_t)0x7d6a, (q15_t)0x1204, (q15_t)0x7d6d, (q15_t)0x11f7, (q15_t)0x7d71, (q15_t)0x11eb, (q15_t)0x7d74, (q15_t)0x11df,
+    (q15_t)0x7d78, (q15_t)0x11d3, (q15_t)0x7d7b, (q15_t)0x11c7, (q15_t)0x7d7f, (q15_t)0x11bb, (q15_t)0x7d82, (q15_t)0x11af,
+    (q15_t)0x7d86, (q15_t)0x11a3, (q15_t)0x7d89, (q15_t)0x1197, (q15_t)0x7d8d, (q15_t)0x118b, (q15_t)0x7d90, (q15_t)0x117f,
+    (q15_t)0x7d93, (q15_t)0x1173, (q15_t)0x7d97, (q15_t)0x1167, (q15_t)0x7d9a, (q15_t)0x115a, (q15_t)0x7d9e, (q15_t)0x114e,
+    (q15_t)0x7da1, (q15_t)0x1142, (q15_t)0x7da4, (q15_t)0x1136, (q15_t)0x7da8, (q15_t)0x112a, (q15_t)0x7dab, (q15_t)0x111e,
+    (q15_t)0x7daf, (q15_t)0x1112, (q15_t)0x7db2, (q15_t)0x1106, (q15_t)0x7db5, (q15_t)0x10fa, (q15_t)0x7db9, (q15_t)0x10ed,
+    (q15_t)0x7dbc, (q15_t)0x10e1, (q15_t)0x7dbf, (q15_t)0x10d5, (q15_t)0x7dc2, (q15_t)0x10c9, (q15_t)0x7dc6, (q15_t)0x10bd,
+    (q15_t)0x7dc9, (q15_t)0x10b1, (q15_t)0x7dcc, (q15_t)0x10a5, (q15_t)0x7dd0, (q15_t)0x1099, (q15_t)0x7dd3, (q15_t)0x108c,
+    (q15_t)0x7dd6, (q15_t)0x1080, (q15_t)0x7dd9, (q15_t)0x1074, (q15_t)0x7ddd, (q15_t)0x1068, (q15_t)0x7de0, (q15_t)0x105c,
+    (q15_t)0x7de3, (q15_t)0x1050, (q15_t)0x7de6, (q15_t)0x1044, (q15_t)0x7de9, (q15_t)0x1037, (q15_t)0x7ded, (q15_t)0x102b,
+    (q15_t)0x7df0, (q15_t)0x101f, (q15_t)0x7df3, (q15_t)0x1013, (q15_t)0x7df6, (q15_t)0x1007, (q15_t)0x7df9, (q15_t)0xffb,
+    (q15_t)0x7dfc, (q15_t)0xfee, (q15_t)0x7dff, (q15_t)0xfe2, (q15_t)0x7e03, (q15_t)0xfd6, (q15_t)0x7e06, (q15_t)0xfca,
+    (q15_t)0x7e09, (q15_t)0xfbe, (q15_t)0x7e0c, (q15_t)0xfb2, (q15_t)0x7e0f, (q15_t)0xfa5, (q15_t)0x7e12, (q15_t)0xf99,
+    (q15_t)0x7e15, (q15_t)0xf8d, (q15_t)0x7e18, (q15_t)0xf81, (q15_t)0x7e1b, (q15_t)0xf75, (q15_t)0x7e1e, (q15_t)0xf68,
+    (q15_t)0x7e21, (q15_t)0xf5c, (q15_t)0x7e24, (q15_t)0xf50, (q15_t)0x7e27, (q15_t)0xf44, (q15_t)0x7e2a, (q15_t)0xf38,
+    (q15_t)0x7e2d, (q15_t)0xf2b, (q15_t)0x7e30, (q15_t)0xf1f, (q15_t)0x7e33, (q15_t)0xf13, (q15_t)0x7e36, (q15_t)0xf07,
+    (q15_t)0x7e39, (q15_t)0xefb, (q15_t)0x7e3c, (q15_t)0xeee, (q15_t)0x7e3f, (q15_t)0xee2, (q15_t)0x7e42, (q15_t)0xed6,
+    (q15_t)0x7e45, (q15_t)0xeca, (q15_t)0x7e48, (q15_t)0xebd, (q15_t)0x7e4a, (q15_t)0xeb1, (q15_t)0x7e4d, (q15_t)0xea5,
+    (q15_t)0x7e50, (q15_t)0xe99, (q15_t)0x7e53, (q15_t)0xe8c, (q15_t)0x7e56, (q15_t)0xe80, (q15_t)0x7e59, (q15_t)0xe74,
+    (q15_t)0x7e5c, (q15_t)0xe68, (q15_t)0x7e5e, (q15_t)0xe5c, (q15_t)0x7e61, (q15_t)0xe4f, (q15_t)0x7e64, (q15_t)0xe43,
+    (q15_t)0x7e67, (q15_t)0xe37, (q15_t)0x7e6a, (q15_t)0xe2b, (q15_t)0x7e6c, (q15_t)0xe1e, (q15_t)0x7e6f, (q15_t)0xe12,
+    (q15_t)0x7e72, (q15_t)0xe06, (q15_t)0x7e75, (q15_t)0xdf9, (q15_t)0x7e77, (q15_t)0xded, (q15_t)0x7e7a, (q15_t)0xde1,
+    (q15_t)0x7e7d, (q15_t)0xdd5, (q15_t)0x7e80, (q15_t)0xdc8, (q15_t)0x7e82, (q15_t)0xdbc, (q15_t)0x7e85, (q15_t)0xdb0,
+    (q15_t)0x7e88, (q15_t)0xda4, (q15_t)0x7e8a, (q15_t)0xd97, (q15_t)0x7e8d, (q15_t)0xd8b, (q15_t)0x7e90, (q15_t)0xd7f,
+    (q15_t)0x7e92, (q15_t)0xd72, (q15_t)0x7e95, (q15_t)0xd66, (q15_t)0x7e98, (q15_t)0xd5a, (q15_t)0x7e9a, (q15_t)0xd4e,
+    (q15_t)0x7e9d, (q15_t)0xd41, (q15_t)0x7e9f, (q15_t)0xd35, (q15_t)0x7ea2, (q15_t)0xd29, (q15_t)0x7ea5, (q15_t)0xd1c,
+    (q15_t)0x7ea7, (q15_t)0xd10, (q15_t)0x7eaa, (q15_t)0xd04, (q15_t)0x7eac, (q15_t)0xcf8, (q15_t)0x7eaf, (q15_t)0xceb,
+    (q15_t)0x7eb1, (q15_t)0xcdf, (q15_t)0x7eb4, (q15_t)0xcd3, (q15_t)0x7eb6, (q15_t)0xcc6, (q15_t)0x7eb9, (q15_t)0xcba,
+    (q15_t)0x7ebb, (q15_t)0xcae, (q15_t)0x7ebe, (q15_t)0xca1, (q15_t)0x7ec0, (q15_t)0xc95, (q15_t)0x7ec3, (q15_t)0xc89,
+    (q15_t)0x7ec5, (q15_t)0xc7c, (q15_t)0x7ec8, (q15_t)0xc70, (q15_t)0x7eca, (q15_t)0xc64, (q15_t)0x7ecc, (q15_t)0xc57,
+    (q15_t)0x7ecf, (q15_t)0xc4b, (q15_t)0x7ed1, (q15_t)0xc3f, (q15_t)0x7ed4, (q15_t)0xc32, (q15_t)0x7ed6, (q15_t)0xc26,
+    (q15_t)0x7ed8, (q15_t)0xc1a, (q15_t)0x7edb, (q15_t)0xc0d, (q15_t)0x7edd, (q15_t)0xc01, (q15_t)0x7ee0, (q15_t)0xbf5,
+    (q15_t)0x7ee2, (q15_t)0xbe8, (q15_t)0x7ee4, (q15_t)0xbdc, (q15_t)0x7ee7, (q15_t)0xbd0, (q15_t)0x7ee9, (q15_t)0xbc3,
+    (q15_t)0x7eeb, (q15_t)0xbb7, (q15_t)0x7eed, (q15_t)0xbab, (q15_t)0x7ef0, (q15_t)0xb9e, (q15_t)0x7ef2, (q15_t)0xb92,
+    (q15_t)0x7ef4, (q15_t)0xb85, (q15_t)0x7ef7, (q15_t)0xb79, (q15_t)0x7ef9, (q15_t)0xb6d, (q15_t)0x7efb, (q15_t)0xb60,
+    (q15_t)0x7efd, (q15_t)0xb54, (q15_t)0x7f00, (q15_t)0xb48, (q15_t)0x7f02, (q15_t)0xb3b, (q15_t)0x7f04, (q15_t)0xb2f,
+    (q15_t)0x7f06, (q15_t)0xb23, (q15_t)0x7f08, (q15_t)0xb16, (q15_t)0x7f0a, (q15_t)0xb0a, (q15_t)0x7f0d, (q15_t)0xafd,
+    (q15_t)0x7f0f, (q15_t)0xaf1, (q15_t)0x7f11, (q15_t)0xae5, (q15_t)0x7f13, (q15_t)0xad8, (q15_t)0x7f15, (q15_t)0xacc,
+    (q15_t)0x7f17, (q15_t)0xac0, (q15_t)0x7f19, (q15_t)0xab3, (q15_t)0x7f1c, (q15_t)0xaa7, (q15_t)0x7f1e, (q15_t)0xa9a,
+    (q15_t)0x7f20, (q15_t)0xa8e, (q15_t)0x7f22, (q15_t)0xa82, (q15_t)0x7f24, (q15_t)0xa75, (q15_t)0x7f26, (q15_t)0xa69,
+    (q15_t)0x7f28, (q15_t)0xa5c, (q15_t)0x7f2a, (q15_t)0xa50, (q15_t)0x7f2c, (q15_t)0xa44, (q15_t)0x7f2e, (q15_t)0xa37,
+    (q15_t)0x7f30, (q15_t)0xa2b, (q15_t)0x7f32, (q15_t)0xa1e, (q15_t)0x7f34, (q15_t)0xa12, (q15_t)0x7f36, (q15_t)0xa06,
+    (q15_t)0x7f38, (q15_t)0x9f9, (q15_t)0x7f3a, (q15_t)0x9ed, (q15_t)0x7f3c, (q15_t)0x9e0, (q15_t)0x7f3e, (q15_t)0x9d4,
+    (q15_t)0x7f40, (q15_t)0x9c7, (q15_t)0x7f42, (q15_t)0x9bb, (q15_t)0x7f43, (q15_t)0x9af, (q15_t)0x7f45, (q15_t)0x9a2,
+    (q15_t)0x7f47, (q15_t)0x996, (q15_t)0x7f49, (q15_t)0x989, (q15_t)0x7f4b, (q15_t)0x97d, (q15_t)0x7f4d, (q15_t)0x970,
+    (q15_t)0x7f4f, (q15_t)0x964, (q15_t)0x7f51, (q15_t)0x958, (q15_t)0x7f52, (q15_t)0x94b, (q15_t)0x7f54, (q15_t)0x93f,
+    (q15_t)0x7f56, (q15_t)0x932, (q15_t)0x7f58, (q15_t)0x926, (q15_t)0x7f5a, (q15_t)0x919, (q15_t)0x7f5b, (q15_t)0x90d,
+    (q15_t)0x7f5d, (q15_t)0x901, (q15_t)0x7f5f, (q15_t)0x8f4, (q15_t)0x7f61, (q15_t)0x8e8, (q15_t)0x7f62, (q15_t)0x8db,
+    (q15_t)0x7f64, (q15_t)0x8cf, (q15_t)0x7f66, (q15_t)0x8c2, (q15_t)0x7f68, (q15_t)0x8b6, (q15_t)0x7f69, (q15_t)0x8a9,
+    (q15_t)0x7f6b, (q15_t)0x89d, (q15_t)0x7f6d, (q15_t)0x891, (q15_t)0x7f6e, (q15_t)0x884, (q15_t)0x7f70, (q15_t)0x878,
+    (q15_t)0x7f72, (q15_t)0x86b, (q15_t)0x7f73, (q15_t)0x85f, (q15_t)0x7f75, (q15_t)0x852, (q15_t)0x7f77, (q15_t)0x846,
+    (q15_t)0x7f78, (q15_t)0x839, (q15_t)0x7f7a, (q15_t)0x82d, (q15_t)0x7f7b, (q15_t)0x820, (q15_t)0x7f7d, (q15_t)0x814,
+    (q15_t)0x7f7f, (q15_t)0x807, (q15_t)0x7f80, (q15_t)0x7fb, (q15_t)0x7f82, (q15_t)0x7ef, (q15_t)0x7f83, (q15_t)0x7e2,
+    (q15_t)0x7f85, (q15_t)0x7d6, (q15_t)0x7f86, (q15_t)0x7c9, (q15_t)0x7f88, (q15_t)0x7bd, (q15_t)0x7f89, (q15_t)0x7b0,
+    (q15_t)0x7f8b, (q15_t)0x7a4, (q15_t)0x7f8c, (q15_t)0x797, (q15_t)0x7f8e, (q15_t)0x78b, (q15_t)0x7f8f, (q15_t)0x77e,
+    (q15_t)0x7f91, (q15_t)0x772, (q15_t)0x7f92, (q15_t)0x765, (q15_t)0x7f94, (q15_t)0x759, (q15_t)0x7f95, (q15_t)0x74c,
+    (q15_t)0x7f97, (q15_t)0x740, (q15_t)0x7f98, (q15_t)0x733, (q15_t)0x7f99, (q15_t)0x727, (q15_t)0x7f9b, (q15_t)0x71a,
+    (q15_t)0x7f9c, (q15_t)0x70e, (q15_t)0x7f9e, (q15_t)0x701, (q15_t)0x7f9f, (q15_t)0x6f5, (q15_t)0x7fa0, (q15_t)0x6e8,
+    (q15_t)0x7fa2, (q15_t)0x6dc, (q15_t)0x7fa3, (q15_t)0x6cf, (q15_t)0x7fa4, (q15_t)0x6c3, (q15_t)0x7fa6, (q15_t)0x6b6,
+    (q15_t)0x7fa7, (q15_t)0x6aa, (q15_t)0x7fa8, (q15_t)0x69d, (q15_t)0x7faa, (q15_t)0x691, (q15_t)0x7fab, (q15_t)0x684,
+    (q15_t)0x7fac, (q15_t)0x678, (q15_t)0x7fad, (q15_t)0x66b, (q15_t)0x7faf, (q15_t)0x65f, (q15_t)0x7fb0, (q15_t)0x652,
+    (q15_t)0x7fb1, (q15_t)0x646, (q15_t)0x7fb2, (q15_t)0x639, (q15_t)0x7fb4, (q15_t)0x62d, (q15_t)0x7fb5, (q15_t)0x620,
+    (q15_t)0x7fb6, (q15_t)0x614, (q15_t)0x7fb7, (q15_t)0x607, (q15_t)0x7fb8, (q15_t)0x5fb, (q15_t)0x7fb9, (q15_t)0x5ee,
+    (q15_t)0x7fbb, (q15_t)0x5e2, (q15_t)0x7fbc, (q15_t)0x5d5, (q15_t)0x7fbd, (q15_t)0x5c9, (q15_t)0x7fbe, (q15_t)0x5bc,
+    (q15_t)0x7fbf, (q15_t)0x5b0, (q15_t)0x7fc0, (q15_t)0x5a3, (q15_t)0x7fc1, (q15_t)0x597, (q15_t)0x7fc3, (q15_t)0x58a,
+    (q15_t)0x7fc4, (q15_t)0x57e, (q15_t)0x7fc5, (q15_t)0x571, (q15_t)0x7fc6, (q15_t)0x565, (q15_t)0x7fc7, (q15_t)0x558,
+    (q15_t)0x7fc8, (q15_t)0x54c, (q15_t)0x7fc9, (q15_t)0x53f, (q15_t)0x7fca, (q15_t)0x533, (q15_t)0x7fcb, (q15_t)0x526,
+    (q15_t)0x7fcc, (q15_t)0x51a, (q15_t)0x7fcd, (q15_t)0x50d, (q15_t)0x7fce, (q15_t)0x500, (q15_t)0x7fcf, (q15_t)0x4f4,
+    (q15_t)0x7fd0, (q15_t)0x4e7, (q15_t)0x7fd1, (q15_t)0x4db, (q15_t)0x7fd2, (q15_t)0x4ce, (q15_t)0x7fd3, (q15_t)0x4c2,
+    (q15_t)0x7fd4, (q15_t)0x4b5, (q15_t)0x7fd5, (q15_t)0x4a9, (q15_t)0x7fd5, (q15_t)0x49c, (q15_t)0x7fd6, (q15_t)0x490,
+    (q15_t)0x7fd7, (q15_t)0x483, (q15_t)0x7fd8, (q15_t)0x477, (q15_t)0x7fd9, (q15_t)0x46a, (q15_t)0x7fda, (q15_t)0x45e,
+    (q15_t)0x7fdb, (q15_t)0x451, (q15_t)0x7fdc, (q15_t)0x444, (q15_t)0x7fdc, (q15_t)0x438, (q15_t)0x7fdd, (q15_t)0x42b,
+    (q15_t)0x7fde, (q15_t)0x41f, (q15_t)0x7fdf, (q15_t)0x412, (q15_t)0x7fe0, (q15_t)0x406, (q15_t)0x7fe0, (q15_t)0x3f9,
+    (q15_t)0x7fe1, (q15_t)0x3ed, (q15_t)0x7fe2, (q15_t)0x3e0, (q15_t)0x7fe3, (q15_t)0x3d4, (q15_t)0x7fe3, (q15_t)0x3c7,
+    (q15_t)0x7fe4, (q15_t)0x3bb, (q15_t)0x7fe5, (q15_t)0x3ae, (q15_t)0x7fe6, (q15_t)0x3a1, (q15_t)0x7fe6, (q15_t)0x395,
+    (q15_t)0x7fe7, (q15_t)0x388, (q15_t)0x7fe8, (q15_t)0x37c, (q15_t)0x7fe8, (q15_t)0x36f, (q15_t)0x7fe9, (q15_t)0x363,
+    (q15_t)0x7fea, (q15_t)0x356, (q15_t)0x7fea, (q15_t)0x34a, (q15_t)0x7feb, (q15_t)0x33d, (q15_t)0x7fec, (q15_t)0x330,
+    (q15_t)0x7fec, (q15_t)0x324, (q15_t)0x7fed, (q15_t)0x317, (q15_t)0x7fed, (q15_t)0x30b, (q15_t)0x7fee, (q15_t)0x2fe,
+    (q15_t)0x7fef, (q15_t)0x2f2, (q15_t)0x7fef, (q15_t)0x2e5, (q15_t)0x7ff0, (q15_t)0x2d9, (q15_t)0x7ff0, (q15_t)0x2cc,
+    (q15_t)0x7ff1, (q15_t)0x2c0, (q15_t)0x7ff1, (q15_t)0x2b3, (q15_t)0x7ff2, (q15_t)0x2a6, (q15_t)0x7ff2, (q15_t)0x29a,
+    (q15_t)0x7ff3, (q15_t)0x28d, (q15_t)0x7ff3, (q15_t)0x281, (q15_t)0x7ff4, (q15_t)0x274, (q15_t)0x7ff4, (q15_t)0x268,
+    (q15_t)0x7ff5, (q15_t)0x25b, (q15_t)0x7ff5, (q15_t)0x24e, (q15_t)0x7ff6, (q15_t)0x242, (q15_t)0x7ff6, (q15_t)0x235,
+    (q15_t)0x7ff7, (q15_t)0x229, (q15_t)0x7ff7, (q15_t)0x21c, (q15_t)0x7ff7, (q15_t)0x210, (q15_t)0x7ff8, (q15_t)0x203,
+    (q15_t)0x7ff8, (q15_t)0x1f7, (q15_t)0x7ff9, (q15_t)0x1ea, (q15_t)0x7ff9, (q15_t)0x1dd, (q15_t)0x7ff9, (q15_t)0x1d1,
+    (q15_t)0x7ffa, (q15_t)0x1c4, (q15_t)0x7ffa, (q15_t)0x1b8, (q15_t)0x7ffa, (q15_t)0x1ab, (q15_t)0x7ffb, (q15_t)0x19f,
+    (q15_t)0x7ffb, (q15_t)0x192, (q15_t)0x7ffb, (q15_t)0x186, (q15_t)0x7ffc, (q15_t)0x179, (q15_t)0x7ffc, (q15_t)0x16c,
+    (q15_t)0x7ffc, (q15_t)0x160, (q15_t)0x7ffc, (q15_t)0x153, (q15_t)0x7ffd, (q15_t)0x147, (q15_t)0x7ffd, (q15_t)0x13a,
+    (q15_t)0x7ffd, (q15_t)0x12e, (q15_t)0x7ffd, (q15_t)0x121, (q15_t)0x7ffe, (q15_t)0x114, (q15_t)0x7ffe, (q15_t)0x108,
+    (q15_t)0x7ffe, (q15_t)0xfb, (q15_t)0x7ffe, (q15_t)0xef, (q15_t)0x7ffe, (q15_t)0xe2, (q15_t)0x7fff, (q15_t)0xd6,
+    (q15_t)0x7fff, (q15_t)0xc9, (q15_t)0x7fff, (q15_t)0xbc, (q15_t)0x7fff, (q15_t)0xb0, (q15_t)0x7fff, (q15_t)0xa3,
+    (q15_t)0x7fff, (q15_t)0x97, (q15_t)0x7fff, (q15_t)0x8a, (q15_t)0x7fff, (q15_t)0x7e, (q15_t)0x7fff, (q15_t)0x71,
+    (q15_t)0x7fff, (q15_t)0x65, (q15_t)0x7fff, (q15_t)0x58, (q15_t)0x7fff, (q15_t)0x4b, (q15_t)0x7fff, (q15_t)0x3f,
+    (q15_t)0x7fff, (q15_t)0x32, (q15_t)0x7fff, (q15_t)0x26, (q15_t)0x7fff, (q15_t)0x19, (q15_t)0x7fff, (q15_t)0xd,
+    (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfff3, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffda,
+    (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc1, (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffa8,
+    (q15_t)0x7fff, (q15_t)0xff9b, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff82, (q15_t)0x7fff, (q15_t)0xff76,
+    (q15_t)0x7fff, (q15_t)0xff69, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff50, (q15_t)0x7fff, (q15_t)0xff44,
+    (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff2a, (q15_t)0x7ffe, (q15_t)0xff1e, (q15_t)0x7ffe, (q15_t)0xff11,
+    (q15_t)0x7ffe, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfef8, (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffd, (q15_t)0xfedf,
+    (q15_t)0x7ffd, (q15_t)0xfed2, (q15_t)0x7ffd, (q15_t)0xfec6, (q15_t)0x7ffd, (q15_t)0xfeb9, (q15_t)0x7ffc, (q15_t)0xfead,
+    (q15_t)0x7ffc, (q15_t)0xfea0, (q15_t)0x7ffc, (q15_t)0xfe94, (q15_t)0x7ffc, (q15_t)0xfe87, (q15_t)0x7ffb, (q15_t)0xfe7a,
+    (q15_t)0x7ffb, (q15_t)0xfe6e, (q15_t)0x7ffb, (q15_t)0xfe61, (q15_t)0x7ffa, (q15_t)0xfe55, (q15_t)0x7ffa, (q15_t)0xfe48,
+    (q15_t)0x7ffa, (q15_t)0xfe3c, (q15_t)0x7ff9, (q15_t)0xfe2f, (q15_t)0x7ff9, (q15_t)0xfe23, (q15_t)0x7ff9, (q15_t)0xfe16,
+    (q15_t)0x7ff8, (q15_t)0xfe09, (q15_t)0x7ff8, (q15_t)0xfdfd, (q15_t)0x7ff7, (q15_t)0xfdf0, (q15_t)0x7ff7, (q15_t)0xfde4,
+    (q15_t)0x7ff7, (q15_t)0xfdd7, (q15_t)0x7ff6, (q15_t)0xfdcb, (q15_t)0x7ff6, (q15_t)0xfdbe, (q15_t)0x7ff5, (q15_t)0xfdb2,
+    (q15_t)0x7ff5, (q15_t)0xfda5, (q15_t)0x7ff4, (q15_t)0xfd98, (q15_t)0x7ff4, (q15_t)0xfd8c, (q15_t)0x7ff3, (q15_t)0xfd7f,
+    (q15_t)0x7ff3, (q15_t)0xfd73, (q15_t)0x7ff2, (q15_t)0xfd66, (q15_t)0x7ff2, (q15_t)0xfd5a, (q15_t)0x7ff1, (q15_t)0xfd4d,
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+    (q15_t)0x7fe4, (q15_t)0xfc45, (q15_t)0x7fe3, (q15_t)0xfc39, (q15_t)0x7fe3, (q15_t)0xfc2c, (q15_t)0x7fe2, (q15_t)0xfc20,
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+    (q15_t)0x7fde, (q15_t)0xfbe1, (q15_t)0x7fdd, (q15_t)0xfbd5, (q15_t)0x7fdc, (q15_t)0xfbc8, (q15_t)0x7fdc, (q15_t)0xfbbc,
+    (q15_t)0x7fdb, (q15_t)0xfbaf, (q15_t)0x7fda, (q15_t)0xfba2, (q15_t)0x7fd9, (q15_t)0xfb96, (q15_t)0x7fd8, (q15_t)0xfb89,
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+    (q15_t)0x7fd4, (q15_t)0xfb4b, (q15_t)0x7fd3, (q15_t)0xfb3e, (q15_t)0x7fd2, (q15_t)0xfb32, (q15_t)0x7fd1, (q15_t)0xfb25,
+    (q15_t)0x7fd0, (q15_t)0xfb19, (q15_t)0x7fcf, (q15_t)0xfb0c, (q15_t)0x7fce, (q15_t)0xfb00, (q15_t)0x7fcd, (q15_t)0xfaf3,
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+    (q15_t)0x7fac, (q15_t)0xf988, (q15_t)0x7fab, (q15_t)0xf97c, (q15_t)0x7faa, (q15_t)0xf96f, (q15_t)0x7fa8, (q15_t)0xf963,
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+    (q15_t)0x7fa2, (q15_t)0xf924, (q15_t)0x7fa0, (q15_t)0xf918, (q15_t)0x7f9f, (q15_t)0xf90b, (q15_t)0x7f9e, (q15_t)0xf8ff,
+    (q15_t)0x7f9c, (q15_t)0xf8f2, (q15_t)0x7f9b, (q15_t)0xf8e6, (q15_t)0x7f99, (q15_t)0xf8d9, (q15_t)0x7f98, (q15_t)0xf8cd,
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+    (q15_t)0x7e45, (q15_t)0xf136, (q15_t)0x7e42, (q15_t)0xf12a, (q15_t)0x7e3f, (q15_t)0xf11e, (q15_t)0x7e3c, (q15_t)0xf112,
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+    (q15_t)0x7dfc, (q15_t)0xf012, (q15_t)0x7df9, (q15_t)0xf005, (q15_t)0x7df6, (q15_t)0xeff9, (q15_t)0x7df3, (q15_t)0xefed,
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+    (q15_t)0x7dbc, (q15_t)0xef1f, (q15_t)0x7db9, (q15_t)0xef13, (q15_t)0x7db5, (q15_t)0xef06, (q15_t)0x7db2, (q15_t)0xeefa,
+    (q15_t)0x7daf, (q15_t)0xeeee, (q15_t)0x7dab, (q15_t)0xeee2, (q15_t)0x7da8, (q15_t)0xeed6, (q15_t)0x7da4, (q15_t)0xeeca,
+    (q15_t)0x7da1, (q15_t)0xeebe, (q15_t)0x7d9e, (q15_t)0xeeb2, (q15_t)0x7d9a, (q15_t)0xeea6, (q15_t)0x7d97, (q15_t)0xee99,
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+    (q15_t)0x7697, (q15_t)0xde98, (q15_t)0x7690, (q15_t)0xde8d, (q15_t)0x768a, (q15_t)0xde83, (q15_t)0x7683, (q15_t)0xde78,
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+    (q15_t)0x7662, (q15_t)0xde42, (q15_t)0x765c, (q15_t)0xde38, (q15_t)0x7655, (q15_t)0xde2d, (q15_t)0x764e, (q15_t)0xde22,
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+    (q15_t)0x758a, (q15_t)0xdcef, (q15_t)0x7583, (q15_t)0xdce5, (q15_t)0x757c, (q15_t)0xdcda, (q15_t)0x7575, (q15_t)0xdcd0,
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+    (q15_t)0x6cfa, (q15_t)0xd278, (q15_t)0x6cf1, (q15_t)0xd26f, (q15_t)0x6ce8, (q15_t)0xd266, (q15_t)0x6cdf, (q15_t)0xd25d,
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+    (q15_t)0x6c8e, (q15_t)0xd20e, (q15_t)0x6c85, (q15_t)0xd206, (q15_t)0x6c7c, (q15_t)0xd1fd, (q15_t)0x6c73, (q15_t)0xd1f4,
+    (q15_t)0x6c6a, (q15_t)0xd1eb, (q15_t)0x6c61, (q15_t)0xd1e3, (q15_t)0x6c58, (q15_t)0xd1da, (q15_t)0x6c4f, (q15_t)0xd1d1,
+    (q15_t)0x6c46, (q15_t)0xd1c9, (q15_t)0x6c3d, (q15_t)0xd1c0, (q15_t)0x6c34, (q15_t)0xd1b7, (q15_t)0x6c2b, (q15_t)0xd1af,
+    (q15_t)0x6c21, (q15_t)0xd1a6, (q15_t)0x6c18, (q15_t)0xd19d, (q15_t)0x6c0f, (q15_t)0xd195, (q15_t)0x6c06, (q15_t)0xd18c,
+    (q15_t)0x6bfd, (q15_t)0xd183, (q15_t)0x6bf4, (q15_t)0xd17b, (q15_t)0x6beb, (q15_t)0xd172, (q15_t)0x6be2, (q15_t)0xd169,
+    (q15_t)0x6bd8, (q15_t)0xd161, (q15_t)0x6bcf, (q15_t)0xd158, (q15_t)0x6bc6, (q15_t)0xd150, (q15_t)0x6bbd, (q15_t)0xd147,
+    (q15_t)0x6bb4, (q15_t)0xd13e, (q15_t)0x6bab, (q15_t)0xd136, (q15_t)0x6ba1, (q15_t)0xd12d, (q15_t)0x6b98, (q15_t)0xd125,
+    (q15_t)0x6b8f, (q15_t)0xd11c, (q15_t)0x6b86, (q15_t)0xd114, (q15_t)0x6b7d, (q15_t)0xd10b, (q15_t)0x6b73, (q15_t)0xd103,
+    (q15_t)0x6b6a, (q15_t)0xd0fa, (q15_t)0x6b61, (q15_t)0xd0f2, (q15_t)0x6b58, (q15_t)0xd0e9, (q15_t)0x6b4e, (q15_t)0xd0e0,
+    (q15_t)0x6b45, (q15_t)0xd0d8, (q15_t)0x6b3c, (q15_t)0xd0d0, (q15_t)0x6b33, (q15_t)0xd0c7, (q15_t)0x6b29, (q15_t)0xd0bf,
+    (q15_t)0x6b20, (q15_t)0xd0b6, (q15_t)0x6b17, (q15_t)0xd0ae, (q15_t)0x6b0d, (q15_t)0xd0a5, (q15_t)0x6b04, (q15_t)0xd09d,
+    (q15_t)0x6afb, (q15_t)0xd094, (q15_t)0x6af2, (q15_t)0xd08c, (q15_t)0x6ae8, (q15_t)0xd083, (q15_t)0x6adf, (q15_t)0xd07b,
+    (q15_t)0x6ad6, (q15_t)0xd073, (q15_t)0x6acc, (q15_t)0xd06a, (q15_t)0x6ac3, (q15_t)0xd062, (q15_t)0x6ab9, (q15_t)0xd059,
+    (q15_t)0x6ab0, (q15_t)0xd051, (q15_t)0x6aa7, (q15_t)0xd049, (q15_t)0x6a9d, (q15_t)0xd040, (q15_t)0x6a94, (q15_t)0xd038,
+    (q15_t)0x6a8b, (q15_t)0xd030, (q15_t)0x6a81, (q15_t)0xd027, (q15_t)0x6a78, (q15_t)0xd01f, (q15_t)0x6a6e, (q15_t)0xd016,
+    (q15_t)0x6a65, (q15_t)0xd00e, (q15_t)0x6a5c, (q15_t)0xd006, (q15_t)0x6a52, (q15_t)0xcffe, (q15_t)0x6a49, (q15_t)0xcff5,
+    (q15_t)0x6a3f, (q15_t)0xcfed, (q15_t)0x6a36, (q15_t)0xcfe5, (q15_t)0x6a2c, (q15_t)0xcfdc, (q15_t)0x6a23, (q15_t)0xcfd4,
+    (q15_t)0x6a1a, (q15_t)0xcfcc, (q15_t)0x6a10, (q15_t)0xcfc4, (q15_t)0x6a07, (q15_t)0xcfbb, (q15_t)0x69fd, (q15_t)0xcfb3,
+    (q15_t)0x69f4, (q15_t)0xcfab, (q15_t)0x69ea, (q15_t)0xcfa3, (q15_t)0x69e1, (q15_t)0xcf9a, (q15_t)0x69d7, (q15_t)0xcf92,
+    (q15_t)0x69ce, (q15_t)0xcf8a, (q15_t)0x69c4, (q15_t)0xcf82, (q15_t)0x69bb, (q15_t)0xcf79, (q15_t)0x69b1, (q15_t)0xcf71,
+    (q15_t)0x69a7, (q15_t)0xcf69, (q15_t)0x699e, (q15_t)0xcf61, (q15_t)0x6994, (q15_t)0xcf59, (q15_t)0x698b, (q15_t)0xcf51,
+    (q15_t)0x6981, (q15_t)0xcf48, (q15_t)0x6978, (q15_t)0xcf40, (q15_t)0x696e, (q15_t)0xcf38, (q15_t)0x6965, (q15_t)0xcf30,
+    (q15_t)0x695b, (q15_t)0xcf28, (q15_t)0x6951, (q15_t)0xcf20, (q15_t)0x6948, (q15_t)0xcf18, (q15_t)0x693e, (q15_t)0xcf10,
+    (q15_t)0x6935, (q15_t)0xcf07, (q15_t)0x692b, (q15_t)0xceff, (q15_t)0x6921, (q15_t)0xcef7, (q15_t)0x6918, (q15_t)0xceef,
+    (q15_t)0x690e, (q15_t)0xcee7, (q15_t)0x6904, (q15_t)0xcedf, (q15_t)0x68fb, (q15_t)0xced7, (q15_t)0x68f1, (q15_t)0xcecf,
+    (q15_t)0x68e7, (q15_t)0xcec7, (q15_t)0x68de, (q15_t)0xcebf, (q15_t)0x68d4, (q15_t)0xceb7, (q15_t)0x68ca, (q15_t)0xceaf,
+    (q15_t)0x68c1, (q15_t)0xcea7, (q15_t)0x68b7, (q15_t)0xce9f, (q15_t)0x68ad, (q15_t)0xce97, (q15_t)0x68a4, (q15_t)0xce8f,
+    (q15_t)0x689a, (q15_t)0xce87, (q15_t)0x6890, (q15_t)0xce7f, (q15_t)0x6886, (q15_t)0xce77, (q15_t)0x687d, (q15_t)0xce6f,
+    (q15_t)0x6873, (q15_t)0xce67, (q15_t)0x6869, (q15_t)0xce5f, (q15_t)0x6860, (q15_t)0xce57, (q15_t)0x6856, (q15_t)0xce4f,
+    (q15_t)0x684c, (q15_t)0xce47, (q15_t)0x6842, (q15_t)0xce40, (q15_t)0x6838, (q15_t)0xce38, (q15_t)0x682f, (q15_t)0xce30,
+    (q15_t)0x6825, (q15_t)0xce28, (q15_t)0x681b, (q15_t)0xce20, (q15_t)0x6811, (q15_t)0xce18, (q15_t)0x6808, (q15_t)0xce10,
+    (q15_t)0x67fe, (q15_t)0xce08, (q15_t)0x67f4, (q15_t)0xce01, (q15_t)0x67ea, (q15_t)0xcdf9, (q15_t)0x67e0, (q15_t)0xcdf1,
+    (q15_t)0x67d6, (q15_t)0xcde9, (q15_t)0x67cd, (q15_t)0xcde1, (q15_t)0x67c3, (q15_t)0xcdd9, (q15_t)0x67b9, (q15_t)0xcdd2,
+    (q15_t)0x67af, (q15_t)0xcdca, (q15_t)0x67a5, (q15_t)0xcdc2, (q15_t)0x679b, (q15_t)0xcdba, (q15_t)0x6791, (q15_t)0xcdb2,
+    (q15_t)0x6788, (q15_t)0xcdab, (q15_t)0x677e, (q15_t)0xcda3, (q15_t)0x6774, (q15_t)0xcd9b, (q15_t)0x676a, (q15_t)0xcd93,
+    (q15_t)0x6760, (q15_t)0xcd8c, (q15_t)0x6756, (q15_t)0xcd84, (q15_t)0x674c, (q15_t)0xcd7c, (q15_t)0x6742, (q15_t)0xcd75,
+    (q15_t)0x6738, (q15_t)0xcd6d, (q15_t)0x672e, (q15_t)0xcd65, (q15_t)0x6724, (q15_t)0xcd5d, (q15_t)0x671a, (q15_t)0xcd56,
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+    (q15_t)0x66e9, (q15_t)0xcd30, (q15_t)0x66df, (q15_t)0xcd28, (q15_t)0x66d5, (q15_t)0xcd20, (q15_t)0x66cb, (q15_t)0xcd19,
+    (q15_t)0x66c1, (q15_t)0xcd11, (q15_t)0x66b7, (q15_t)0xcd09, (q15_t)0x66ad, (q15_t)0xcd02, (q15_t)0x66a3, (q15_t)0xccfa,
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+    (q15_t)0x6648, (q15_t)0xccb6, (q15_t)0x663e, (q15_t)0xccaf, (q15_t)0x6634, (q15_t)0xcca7, (q15_t)0x662a, (q15_t)0xcca0,
+    (q15_t)0x6620, (q15_t)0xcc98, (q15_t)0x6616, (q15_t)0xcc91, (q15_t)0x660c, (q15_t)0xcc89, (q15_t)0x6602, (q15_t)0xcc82,
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+    (q15_t)0x65cf, (q15_t)0xcc5d, (q15_t)0x65c5, (q15_t)0xcc55, (q15_t)0x65bb, (q15_t)0xcc4e, (q15_t)0x65b1, (q15_t)0xcc46,
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+    (q15_t)0x657e, (q15_t)0xcc21, (q15_t)0x6574, (q15_t)0xcc1a, (q15_t)0x6569, (q15_t)0xcc13, (q15_t)0x655f, (q15_t)0xcc0b,
+    (q15_t)0x6555, (q15_t)0xcc04, (q15_t)0x654b, (q15_t)0xcbfd, (q15_t)0x6541, (q15_t)0xcbf5, (q15_t)0x6536, (q15_t)0xcbee,
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+    (q15_t)0x638e, (q15_t)0xcac9, (q15_t)0x6384, (q15_t)0xcac2, (q15_t)0x637a, (q15_t)0xcabb, (q15_t)0x636f, (q15_t)0xcab4,
+    (q15_t)0x6365, (q15_t)0xcaad, (q15_t)0x635a, (q15_t)0xcaa6, (q15_t)0x6350, (q15_t)0xca9f, (q15_t)0x6345, (q15_t)0xca99,
+    (q15_t)0x633b, (q15_t)0xca92, (q15_t)0x6330, (q15_t)0xca8b, (q15_t)0x6326, (q15_t)0xca84, (q15_t)0x631b, (q15_t)0xca7d,
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+    (q15_t)0x6292, (q15_t)0xca24, (q15_t)0x6288, (q15_t)0xca1d, (q15_t)0x627d, (q15_t)0xca16, (q15_t)0x6272, (q15_t)0xca10,
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+    (q15_t)0x6193, (q15_t)0xc983, (q15_t)0x6188, (q15_t)0xc97d, (q15_t)0x617d, (q15_t)0xc976, (q15_t)0x6173, (q15_t)0xc970,
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+    (q15_t)0x6112, (q15_t)0xc935, (q15_t)0x6107, (q15_t)0xc92e, (q15_t)0x60fd, (q15_t)0xc928, (q15_t)0x60f2, (q15_t)0xc921,
+    (q15_t)0x60e7, (q15_t)0xc91b, (q15_t)0x60dc, (q15_t)0xc915, (q15_t)0x60d1, (q15_t)0xc90e, (q15_t)0x60c7, (q15_t)0xc908,
+    (q15_t)0x60bc, (q15_t)0xc901, (q15_t)0x60b1, (q15_t)0xc8fb, (q15_t)0x60a6, (q15_t)0xc8f4, (q15_t)0x609b, (q15_t)0xc8ee,
+    (q15_t)0x6091, (q15_t)0xc8e8, (q15_t)0x6086, (q15_t)0xc8e1, (q15_t)0x607b, (q15_t)0xc8db, (q15_t)0x6070, (q15_t)0xc8d4,
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+    (q15_t)0x5fe3, (q15_t)0xc882, (q15_t)0x5fd8, (q15_t)0xc87c, (q15_t)0x5fcd, (q15_t)0xc876, (q15_t)0x5fc2, (q15_t)0xc870,
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+    (q15_t)0x5f60, (q15_t)0xc838, (q15_t)0x5f55, (q15_t)0xc832, (q15_t)0x5f4a, (q15_t)0xc82b, (q15_t)0x5f3f, (q15_t)0xc825,
+    (q15_t)0x5f34, (q15_t)0xc81f, (q15_t)0x5f29, (q15_t)0xc819, (q15_t)0x5f1e, (q15_t)0xc813, (q15_t)0x5f13, (q15_t)0xc80d,
+    (q15_t)0x5f08, (q15_t)0xc807, (q15_t)0x5efd, (q15_t)0xc801, (q15_t)0x5ef2, (q15_t)0xc7fb, (q15_t)0x5ee7, (q15_t)0xc7f5,
+    (q15_t)0x5edc, (q15_t)0xc7ee, (q15_t)0x5ed1, (q15_t)0xc7e8, (q15_t)0x5ec6, (q15_t)0xc7e2, (q15_t)0x5ebb, (q15_t)0xc7dc,
+    (q15_t)0x5eb0, (q15_t)0xc7d6, (q15_t)0x5ea5, (q15_t)0xc7d0, (q15_t)0x5e9a, (q15_t)0xc7ca, (q15_t)0x5e8f, (q15_t)0xc7c4,
+    (q15_t)0x5e84, (q15_t)0xc7be, (q15_t)0x5e79, (q15_t)0xc7b8, (q15_t)0x5e6e, (q15_t)0xc7b2, (q15_t)0x5e63, (q15_t)0xc7ac,
+    (q15_t)0x5e58, (q15_t)0xc7a6, (q15_t)0x5e4d, (q15_t)0xc7a0, (q15_t)0x5e42, (q15_t)0xc79a, (q15_t)0x5e36, (q15_t)0xc795,
+    (q15_t)0x5e2b, (q15_t)0xc78f, (q15_t)0x5e20, (q15_t)0xc789, (q15_t)0x5e15, (q15_t)0xc783, (q15_t)0x5e0a, (q15_t)0xc77d,
+    (q15_t)0x5dff, (q15_t)0xc777, (q15_t)0x5df4, (q15_t)0xc771, (q15_t)0x5de9, (q15_t)0xc76b, (q15_t)0x5dde, (q15_t)0xc765,
+    (q15_t)0x5dd3, (q15_t)0xc75f, (q15_t)0x5dc7, (q15_t)0xc75a, (q15_t)0x5dbc, (q15_t)0xc754, (q15_t)0x5db1, (q15_t)0xc74e,
+    (q15_t)0x5da6, (q15_t)0xc748, (q15_t)0x5d9b, (q15_t)0xc742, (q15_t)0x5d90, (q15_t)0xc73d, (q15_t)0x5d85, (q15_t)0xc737,
+    (q15_t)0x5d79, (q15_t)0xc731, (q15_t)0x5d6e, (q15_t)0xc72b, (q15_t)0x5d63, (q15_t)0xc725, (q15_t)0x5d58, (q15_t)0xc720,
+    (q15_t)0x5d4d, (q15_t)0xc71a, (q15_t)0x5d42, (q15_t)0xc714, (q15_t)0x5d36, (q15_t)0xc70e, (q15_t)0x5d2b, (q15_t)0xc709,
+    (q15_t)0x5d20, (q15_t)0xc703, (q15_t)0x5d15, (q15_t)0xc6fd, (q15_t)0x5d0a, (q15_t)0xc6f7, (q15_t)0x5cff, (q15_t)0xc6f2,
+    (q15_t)0x5cf3, (q15_t)0xc6ec, (q15_t)0x5ce8, (q15_t)0xc6e6, (q15_t)0x5cdd, (q15_t)0xc6e1, (q15_t)0x5cd2, (q15_t)0xc6db,
+    (q15_t)0x5cc6, (q15_t)0xc6d5, (q15_t)0x5cbb, (q15_t)0xc6d0, (q15_t)0x5cb0, (q15_t)0xc6ca, (q15_t)0x5ca5, (q15_t)0xc6c5,
+    (q15_t)0x5c99, (q15_t)0xc6bf, (q15_t)0x5c8e, (q15_t)0xc6b9, (q15_t)0x5c83, (q15_t)0xc6b4, (q15_t)0x5c78, (q15_t)0xc6ae,
+    (q15_t)0x5c6c, (q15_t)0xc6a8, (q15_t)0x5c61, (q15_t)0xc6a3, (q15_t)0x5c56, (q15_t)0xc69d, (q15_t)0x5c4b, (q15_t)0xc698,
+    (q15_t)0x5c3f, (q15_t)0xc692, (q15_t)0x5c34, (q15_t)0xc68d, (q15_t)0x5c29, (q15_t)0xc687, (q15_t)0x5c1e, (q15_t)0xc682,
+    (q15_t)0x5c12, (q15_t)0xc67c, (q15_t)0x5c07, (q15_t)0xc677, (q15_t)0x5bfc, (q15_t)0xc671, (q15_t)0x5bf0, (q15_t)0xc66c,
+    (q15_t)0x5be5, (q15_t)0xc666, (q15_t)0x5bda, (q15_t)0xc661, (q15_t)0x5bce, (q15_t)0xc65b, (q15_t)0x5bc3, (q15_t)0xc656,
+    (q15_t)0x5bb8, (q15_t)0xc650, (q15_t)0x5bac, (q15_t)0xc64b, (q15_t)0x5ba1, (q15_t)0xc645, (q15_t)0x5b96, (q15_t)0xc640,
+    (q15_t)0x5b8a, (q15_t)0xc63b, (q15_t)0x5b7f, (q15_t)0xc635, (q15_t)0x5b74, (q15_t)0xc630, (q15_t)0x5b68, (q15_t)0xc62a,
+    (q15_t)0x5b5d, (q15_t)0xc625, (q15_t)0x5b52, (q15_t)0xc620, (q15_t)0x5b46, (q15_t)0xc61a, (q15_t)0x5b3b, (q15_t)0xc615,
+    (q15_t)0x5b30, (q15_t)0xc610, (q15_t)0x5b24, (q15_t)0xc60a, (q15_t)0x5b19, (q15_t)0xc605, (q15_t)0x5b0d, (q15_t)0xc600,
+    (q15_t)0x5b02, (q15_t)0xc5fa, (q15_t)0x5af7, (q15_t)0xc5f5, (q15_t)0x5aeb, (q15_t)0xc5f0, (q15_t)0x5ae0, (q15_t)0xc5ea,
+    (q15_t)0x5ad4, (q15_t)0xc5e5, (q15_t)0x5ac9, (q15_t)0xc5e0, (q15_t)0x5abe, (q15_t)0xc5db, (q15_t)0x5ab2, (q15_t)0xc5d5,
+    (q15_t)0x5aa7, (q15_t)0xc5d0, (q15_t)0x5a9b, (q15_t)0xc5cb, (q15_t)0x5a90, (q15_t)0xc5c6, (q15_t)0x5a84, (q15_t)0xc5c1,
+    (q15_t)0x5a79, (q15_t)0xc5bb, (q15_t)0x5a6e, (q15_t)0xc5b6, (q15_t)0x5a62, (q15_t)0xc5b1, (q15_t)0x5a57, (q15_t)0xc5ac,
+    (q15_t)0x5a4b, (q15_t)0xc5a7, (q15_t)0x5a40, (q15_t)0xc5a1, (q15_t)0x5a34, (q15_t)0xc59c, (q15_t)0x5a29, (q15_t)0xc597,
+    (q15_t)0x5a1d, (q15_t)0xc592, (q15_t)0x5a12, (q15_t)0xc58d, (q15_t)0x5a06, (q15_t)0xc588, (q15_t)0x59fb, (q15_t)0xc583,
+    (q15_t)0x59ef, (q15_t)0xc57e, (q15_t)0x59e4, (q15_t)0xc578, (q15_t)0x59d8, (q15_t)0xc573, (q15_t)0x59cd, (q15_t)0xc56e,
+    (q15_t)0x59c1, (q15_t)0xc569, (q15_t)0x59b6, (q15_t)0xc564, (q15_t)0x59aa, (q15_t)0xc55f, (q15_t)0x599f, (q15_t)0xc55a,
+    (q15_t)0x5993, (q15_t)0xc555, (q15_t)0x5988, (q15_t)0xc550, (q15_t)0x597c, (q15_t)0xc54b, (q15_t)0x5971, (q15_t)0xc546,
+    (q15_t)0x5965, (q15_t)0xc541, (q15_t)0x595a, (q15_t)0xc53c, (q15_t)0x594e, (q15_t)0xc537, (q15_t)0x5943, (q15_t)0xc532,
+    (q15_t)0x5937, (q15_t)0xc52d, (q15_t)0x592c, (q15_t)0xc528, (q15_t)0x5920, (q15_t)0xc523, (q15_t)0x5914, (q15_t)0xc51e,
+    (q15_t)0x5909, (q15_t)0xc51a, (q15_t)0x58fd, (q15_t)0xc515, (q15_t)0x58f2, (q15_t)0xc510, (q15_t)0x58e6, (q15_t)0xc50b,
+    (q15_t)0x58db, (q15_t)0xc506, (q15_t)0x58cf, (q15_t)0xc501, (q15_t)0x58c3, (q15_t)0xc4fc, (q15_t)0x58b8, (q15_t)0xc4f7,
+    (q15_t)0x58ac, (q15_t)0xc4f2, (q15_t)0x58a1, (q15_t)0xc4ee, (q15_t)0x5895, (q15_t)0xc4e9, (q15_t)0x5889, (q15_t)0xc4e4,
+    (q15_t)0x587e, (q15_t)0xc4df, (q15_t)0x5872, (q15_t)0xc4da, (q15_t)0x5867, (q15_t)0xc4d6, (q15_t)0x585b, (q15_t)0xc4d1,
+    (q15_t)0x584f, (q15_t)0xc4cc, (q15_t)0x5844, (q15_t)0xc4c7, (q15_t)0x5838, (q15_t)0xc4c2, (q15_t)0x582d, (q15_t)0xc4be,
+    (q15_t)0x5821, (q15_t)0xc4b9, (q15_t)0x5815, (q15_t)0xc4b4, (q15_t)0x580a, (q15_t)0xc4b0, (q15_t)0x57fe, (q15_t)0xc4ab,
+    (q15_t)0x57f2, (q15_t)0xc4a6, (q15_t)0x57e7, (q15_t)0xc4a1, (q15_t)0x57db, (q15_t)0xc49d, (q15_t)0x57cf, (q15_t)0xc498,
+    (q15_t)0x57c4, (q15_t)0xc493, (q15_t)0x57b8, (q15_t)0xc48f, (q15_t)0x57ac, (q15_t)0xc48a, (q15_t)0x57a1, (q15_t)0xc485,
+    (q15_t)0x5795, (q15_t)0xc481, (q15_t)0x5789, (q15_t)0xc47c, (q15_t)0x577e, (q15_t)0xc478, (q15_t)0x5772, (q15_t)0xc473,
+    (q15_t)0x5766, (q15_t)0xc46e, (q15_t)0x575b, (q15_t)0xc46a, (q15_t)0x574f, (q15_t)0xc465, (q15_t)0x5743, (q15_t)0xc461,
+    (q15_t)0x5737, (q15_t)0xc45c, (q15_t)0x572c, (q15_t)0xc457, (q15_t)0x5720, (q15_t)0xc453, (q15_t)0x5714, (q15_t)0xc44e,
+    (q15_t)0x5709, (q15_t)0xc44a, (q15_t)0x56fd, (q15_t)0xc445, (q15_t)0x56f1, (q15_t)0xc441, (q15_t)0x56e5, (q15_t)0xc43c,
+    (q15_t)0x56da, (q15_t)0xc438, (q15_t)0x56ce, (q15_t)0xc433, (q15_t)0x56c2, (q15_t)0xc42f, (q15_t)0x56b6, (q15_t)0xc42a,
+    (q15_t)0x56ab, (q15_t)0xc426, (q15_t)0x569f, (q15_t)0xc422, (q15_t)0x5693, (q15_t)0xc41d, (q15_t)0x5687, (q15_t)0xc419,
+    (q15_t)0x567c, (q15_t)0xc414, (q15_t)0x5670, (q15_t)0xc410, (q15_t)0x5664, (q15_t)0xc40b, (q15_t)0x5658, (q15_t)0xc407,
+    (q15_t)0x564c, (q15_t)0xc403, (q15_t)0x5641, (q15_t)0xc3fe, (q15_t)0x5635, (q15_t)0xc3fa, (q15_t)0x5629, (q15_t)0xc3f6,
+    (q15_t)0x561d, (q15_t)0xc3f1, (q15_t)0x5612, (q15_t)0xc3ed, (q15_t)0x5606, (q15_t)0xc3e9, (q15_t)0x55fa, (q15_t)0xc3e4,
+    (q15_t)0x55ee, (q15_t)0xc3e0, (q15_t)0x55e2, (q15_t)0xc3dc, (q15_t)0x55d7, (q15_t)0xc3d7, (q15_t)0x55cb, (q15_t)0xc3d3,
+    (q15_t)0x55bf, (q15_t)0xc3cf, (q15_t)0x55b3, (q15_t)0xc3ca, (q15_t)0x55a7, (q15_t)0xc3c6, (q15_t)0x559b, (q15_t)0xc3c2,
+    (q15_t)0x5590, (q15_t)0xc3be, (q15_t)0x5584, (q15_t)0xc3ba, (q15_t)0x5578, (q15_t)0xc3b5, (q15_t)0x556c, (q15_t)0xc3b1,
+    (q15_t)0x5560, (q15_t)0xc3ad, (q15_t)0x5554, (q15_t)0xc3a9, (q15_t)0x5549, (q15_t)0xc3a5, (q15_t)0x553d, (q15_t)0xc3a0,
+    (q15_t)0x5531, (q15_t)0xc39c, (q15_t)0x5525, (q15_t)0xc398, (q15_t)0x5519, (q15_t)0xc394, (q15_t)0x550d, (q15_t)0xc390,
+    (q15_t)0x5501, (q15_t)0xc38c, (q15_t)0x54f6, (q15_t)0xc387, (q15_t)0x54ea, (q15_t)0xc383, (q15_t)0x54de, (q15_t)0xc37f,
+    (q15_t)0x54d2, (q15_t)0xc37b, (q15_t)0x54c6, (q15_t)0xc377, (q15_t)0x54ba, (q15_t)0xc373, (q15_t)0x54ae, (q15_t)0xc36f,
+    (q15_t)0x54a2, (q15_t)0xc36b, (q15_t)0x5496, (q15_t)0xc367, (q15_t)0x548b, (q15_t)0xc363, (q15_t)0x547f, (q15_t)0xc35f,
+    (q15_t)0x5473, (q15_t)0xc35b, (q15_t)0x5467, (q15_t)0xc357, (q15_t)0x545b, (q15_t)0xc353, (q15_t)0x544f, (q15_t)0xc34f,
+    (q15_t)0x5443, (q15_t)0xc34b, (q15_t)0x5437, (q15_t)0xc347, (q15_t)0x542b, (q15_t)0xc343, (q15_t)0x541f, (q15_t)0xc33f,
+    (q15_t)0x5413, (q15_t)0xc33b, (q15_t)0x5407, (q15_t)0xc337, (q15_t)0x53fb, (q15_t)0xc333, (q15_t)0x53f0, (q15_t)0xc32f,
+    (q15_t)0x53e4, (q15_t)0xc32b, (q15_t)0x53d8, (q15_t)0xc327, (q15_t)0x53cc, (q15_t)0xc323, (q15_t)0x53c0, (q15_t)0xc320,
+    (q15_t)0x53b4, (q15_t)0xc31c, (q15_t)0x53a8, (q15_t)0xc318, (q15_t)0x539c, (q15_t)0xc314, (q15_t)0x5390, (q15_t)0xc310,
+    (q15_t)0x5384, (q15_t)0xc30c, (q15_t)0x5378, (q15_t)0xc308, (q15_t)0x536c, (q15_t)0xc305, (q15_t)0x5360, (q15_t)0xc301,
+    (q15_t)0x5354, (q15_t)0xc2fd, (q15_t)0x5348, (q15_t)0xc2f9, (q15_t)0x533c, (q15_t)0xc2f5, (q15_t)0x5330, (q15_t)0xc2f2,
+    (q15_t)0x5324, (q15_t)0xc2ee, (q15_t)0x5318, (q15_t)0xc2ea, (q15_t)0x530c, (q15_t)0xc2e6, (q15_t)0x5300, (q15_t)0xc2e3,
+    (q15_t)0x52f4, (q15_t)0xc2df, (q15_t)0x52e8, (q15_t)0xc2db, (q15_t)0x52dc, (q15_t)0xc2d8, (q15_t)0x52d0, (q15_t)0xc2d4,
+    (q15_t)0x52c4, (q15_t)0xc2d0, (q15_t)0x52b8, (q15_t)0xc2cc, (q15_t)0x52ac, (q15_t)0xc2c9, (q15_t)0x52a0, (q15_t)0xc2c5,
+    (q15_t)0x5294, (q15_t)0xc2c1, (q15_t)0x5288, (q15_t)0xc2be, (q15_t)0x527c, (q15_t)0xc2ba, (q15_t)0x5270, (q15_t)0xc2b7,
+    (q15_t)0x5264, (q15_t)0xc2b3, (q15_t)0x5258, (q15_t)0xc2af, (q15_t)0x524c, (q15_t)0xc2ac, (q15_t)0x5240, (q15_t)0xc2a8,
+    (q15_t)0x5234, (q15_t)0xc2a5, (q15_t)0x5228, (q15_t)0xc2a1, (q15_t)0x521c, (q15_t)0xc29d, (q15_t)0x5210, (q15_t)0xc29a,
+    (q15_t)0x5204, (q15_t)0xc296, (q15_t)0x51f7, (q15_t)0xc293, (q15_t)0x51eb, (q15_t)0xc28f, (q15_t)0x51df, (q15_t)0xc28c,
+    (q15_t)0x51d3, (q15_t)0xc288, (q15_t)0x51c7, (q15_t)0xc285, (q15_t)0x51bb, (q15_t)0xc281, (q15_t)0x51af, (q15_t)0xc27e,
+    (q15_t)0x51a3, (q15_t)0xc27a, (q15_t)0x5197, (q15_t)0xc277, (q15_t)0x518b, (q15_t)0xc273, (q15_t)0x517f, (q15_t)0xc270,
+    (q15_t)0x5173, (q15_t)0xc26d, (q15_t)0x5167, (q15_t)0xc269, (q15_t)0x515a, (q15_t)0xc266, (q15_t)0x514e, (q15_t)0xc262,
+    (q15_t)0x5142, (q15_t)0xc25f, (q15_t)0x5136, (q15_t)0xc25c, (q15_t)0x512a, (q15_t)0xc258, (q15_t)0x511e, (q15_t)0xc255,
+    (q15_t)0x5112, (q15_t)0xc251, (q15_t)0x5106, (q15_t)0xc24e, (q15_t)0x50fa, (q15_t)0xc24b, (q15_t)0x50ed, (q15_t)0xc247,
+    (q15_t)0x50e1, (q15_t)0xc244, (q15_t)0x50d5, (q15_t)0xc241, (q15_t)0x50c9, (q15_t)0xc23e, (q15_t)0x50bd, (q15_t)0xc23a,
+    (q15_t)0x50b1, (q15_t)0xc237, (q15_t)0x50a5, (q15_t)0xc234, (q15_t)0x5099, (q15_t)0xc230, (q15_t)0x508c, (q15_t)0xc22d,
+    (q15_t)0x5080, (q15_t)0xc22a, (q15_t)0x5074, (q15_t)0xc227, (q15_t)0x5068, (q15_t)0xc223, (q15_t)0x505c, (q15_t)0xc220,
+    (q15_t)0x5050, (q15_t)0xc21d, (q15_t)0x5044, (q15_t)0xc21a, (q15_t)0x5037, (q15_t)0xc217, (q15_t)0x502b, (q15_t)0xc213,
+    (q15_t)0x501f, (q15_t)0xc210, (q15_t)0x5013, (q15_t)0xc20d, (q15_t)0x5007, (q15_t)0xc20a, (q15_t)0x4ffb, (q15_t)0xc207,
+    (q15_t)0x4fee, (q15_t)0xc204, (q15_t)0x4fe2, (q15_t)0xc201, (q15_t)0x4fd6, (q15_t)0xc1fd, (q15_t)0x4fca, (q15_t)0xc1fa,
+    (q15_t)0x4fbe, (q15_t)0xc1f7, (q15_t)0x4fb2, (q15_t)0xc1f4, (q15_t)0x4fa5, (q15_t)0xc1f1, (q15_t)0x4f99, (q15_t)0xc1ee,
+    (q15_t)0x4f8d, (q15_t)0xc1eb, (q15_t)0x4f81, (q15_t)0xc1e8, (q15_t)0x4f75, (q15_t)0xc1e5, (q15_t)0x4f68, (q15_t)0xc1e2,
+    (q15_t)0x4f5c, (q15_t)0xc1df, (q15_t)0x4f50, (q15_t)0xc1dc, (q15_t)0x4f44, (q15_t)0xc1d9, (q15_t)0x4f38, (q15_t)0xc1d6,
+    (q15_t)0x4f2b, (q15_t)0xc1d3, (q15_t)0x4f1f, (q15_t)0xc1d0, (q15_t)0x4f13, (q15_t)0xc1cd, (q15_t)0x4f07, (q15_t)0xc1ca,
+    (q15_t)0x4efb, (q15_t)0xc1c7, (q15_t)0x4eee, (q15_t)0xc1c4, (q15_t)0x4ee2, (q15_t)0xc1c1, (q15_t)0x4ed6, (q15_t)0xc1be,
+    (q15_t)0x4eca, (q15_t)0xc1bb, (q15_t)0x4ebd, (q15_t)0xc1b8, (q15_t)0x4eb1, (q15_t)0xc1b6, (q15_t)0x4ea5, (q15_t)0xc1b3,
+    (q15_t)0x4e99, (q15_t)0xc1b0, (q15_t)0x4e8c, (q15_t)0xc1ad, (q15_t)0x4e80, (q15_t)0xc1aa, (q15_t)0x4e74, (q15_t)0xc1a7,
+    (q15_t)0x4e68, (q15_t)0xc1a4, (q15_t)0x4e5c, (q15_t)0xc1a2, (q15_t)0x4e4f, (q15_t)0xc19f, (q15_t)0x4e43, (q15_t)0xc19c,
+    (q15_t)0x4e37, (q15_t)0xc199, (q15_t)0x4e2b, (q15_t)0xc196, (q15_t)0x4e1e, (q15_t)0xc194, (q15_t)0x4e12, (q15_t)0xc191,
+    (q15_t)0x4e06, (q15_t)0xc18e, (q15_t)0x4df9, (q15_t)0xc18b, (q15_t)0x4ded, (q15_t)0xc189, (q15_t)0x4de1, (q15_t)0xc186,
+    (q15_t)0x4dd5, (q15_t)0xc183, (q15_t)0x4dc8, (q15_t)0xc180, (q15_t)0x4dbc, (q15_t)0xc17e, (q15_t)0x4db0, (q15_t)0xc17b,
+    (q15_t)0x4da4, (q15_t)0xc178, (q15_t)0x4d97, (q15_t)0xc176, (q15_t)0x4d8b, (q15_t)0xc173, (q15_t)0x4d7f, (q15_t)0xc170,
+    (q15_t)0x4d72, (q15_t)0xc16e, (q15_t)0x4d66, (q15_t)0xc16b, (q15_t)0x4d5a, (q15_t)0xc168, (q15_t)0x4d4e, (q15_t)0xc166,
+    (q15_t)0x4d41, (q15_t)0xc163, (q15_t)0x4d35, (q15_t)0xc161, (q15_t)0x4d29, (q15_t)0xc15e, (q15_t)0x4d1c, (q15_t)0xc15b,
+    (q15_t)0x4d10, (q15_t)0xc159, (q15_t)0x4d04, (q15_t)0xc156, (q15_t)0x4cf8, (q15_t)0xc154, (q15_t)0x4ceb, (q15_t)0xc151,
+    (q15_t)0x4cdf, (q15_t)0xc14f, (q15_t)0x4cd3, (q15_t)0xc14c, (q15_t)0x4cc6, (q15_t)0xc14a, (q15_t)0x4cba, (q15_t)0xc147,
+    (q15_t)0x4cae, (q15_t)0xc145, (q15_t)0x4ca1, (q15_t)0xc142, (q15_t)0x4c95, (q15_t)0xc140, (q15_t)0x4c89, (q15_t)0xc13d,
+    (q15_t)0x4c7c, (q15_t)0xc13b, (q15_t)0x4c70, (q15_t)0xc138, (q15_t)0x4c64, (q15_t)0xc136, (q15_t)0x4c57, (q15_t)0xc134,
+    (q15_t)0x4c4b, (q15_t)0xc131, (q15_t)0x4c3f, (q15_t)0xc12f, (q15_t)0x4c32, (q15_t)0xc12c, (q15_t)0x4c26, (q15_t)0xc12a,
+    (q15_t)0x4c1a, (q15_t)0xc128, (q15_t)0x4c0d, (q15_t)0xc125, (q15_t)0x4c01, (q15_t)0xc123, (q15_t)0x4bf5, (q15_t)0xc120,
+    (q15_t)0x4be8, (q15_t)0xc11e, (q15_t)0x4bdc, (q15_t)0xc11c, (q15_t)0x4bd0, (q15_t)0xc119, (q15_t)0x4bc3, (q15_t)0xc117,
+    (q15_t)0x4bb7, (q15_t)0xc115, (q15_t)0x4bab, (q15_t)0xc113, (q15_t)0x4b9e, (q15_t)0xc110, (q15_t)0x4b92, (q15_t)0xc10e,
+    (q15_t)0x4b85, (q15_t)0xc10c, (q15_t)0x4b79, (q15_t)0xc109, (q15_t)0x4b6d, (q15_t)0xc107, (q15_t)0x4b60, (q15_t)0xc105,
+    (q15_t)0x4b54, (q15_t)0xc103, (q15_t)0x4b48, (q15_t)0xc100, (q15_t)0x4b3b, (q15_t)0xc0fe, (q15_t)0x4b2f, (q15_t)0xc0fc,
+    (q15_t)0x4b23, (q15_t)0xc0fa, (q15_t)0x4b16, (q15_t)0xc0f8, (q15_t)0x4b0a, (q15_t)0xc0f6, (q15_t)0x4afd, (q15_t)0xc0f3,
+    (q15_t)0x4af1, (q15_t)0xc0f1, (q15_t)0x4ae5, (q15_t)0xc0ef, (q15_t)0x4ad8, (q15_t)0xc0ed, (q15_t)0x4acc, (q15_t)0xc0eb,
+    (q15_t)0x4ac0, (q15_t)0xc0e9, (q15_t)0x4ab3, (q15_t)0xc0e7, (q15_t)0x4aa7, (q15_t)0xc0e4, (q15_t)0x4a9a, (q15_t)0xc0e2,
+    (q15_t)0x4a8e, (q15_t)0xc0e0, (q15_t)0x4a82, (q15_t)0xc0de, (q15_t)0x4a75, (q15_t)0xc0dc, (q15_t)0x4a69, (q15_t)0xc0da,
+    (q15_t)0x4a5c, (q15_t)0xc0d8, (q15_t)0x4a50, (q15_t)0xc0d6, (q15_t)0x4a44, (q15_t)0xc0d4, (q15_t)0x4a37, (q15_t)0xc0d2,
+    (q15_t)0x4a2b, (q15_t)0xc0d0, (q15_t)0x4a1e, (q15_t)0xc0ce, (q15_t)0x4a12, (q15_t)0xc0cc, (q15_t)0x4a06, (q15_t)0xc0ca,
+    (q15_t)0x49f9, (q15_t)0xc0c8, (q15_t)0x49ed, (q15_t)0xc0c6, (q15_t)0x49e0, (q15_t)0xc0c4, (q15_t)0x49d4, (q15_t)0xc0c2,
+    (q15_t)0x49c7, (q15_t)0xc0c0, (q15_t)0x49bb, (q15_t)0xc0be, (q15_t)0x49af, (q15_t)0xc0bd, (q15_t)0x49a2, (q15_t)0xc0bb,
+    (q15_t)0x4996, (q15_t)0xc0b9, (q15_t)0x4989, (q15_t)0xc0b7, (q15_t)0x497d, (q15_t)0xc0b5, (q15_t)0x4970, (q15_t)0xc0b3,
+    (q15_t)0x4964, (q15_t)0xc0b1, (q15_t)0x4958, (q15_t)0xc0af, (q15_t)0x494b, (q15_t)0xc0ae, (q15_t)0x493f, (q15_t)0xc0ac,
+    (q15_t)0x4932, (q15_t)0xc0aa, (q15_t)0x4926, (q15_t)0xc0a8, (q15_t)0x4919, (q15_t)0xc0a6, (q15_t)0x490d, (q15_t)0xc0a5,
+    (q15_t)0x4901, (q15_t)0xc0a3, (q15_t)0x48f4, (q15_t)0xc0a1, (q15_t)0x48e8, (q15_t)0xc09f, (q15_t)0x48db, (q15_t)0xc09e,
+    (q15_t)0x48cf, (q15_t)0xc09c, (q15_t)0x48c2, (q15_t)0xc09a, (q15_t)0x48b6, (q15_t)0xc098, (q15_t)0x48a9, (q15_t)0xc097,
+    (q15_t)0x489d, (q15_t)0xc095, (q15_t)0x4891, (q15_t)0xc093, (q15_t)0x4884, (q15_t)0xc092, (q15_t)0x4878, (q15_t)0xc090,
+    (q15_t)0x486b, (q15_t)0xc08e, (q15_t)0x485f, (q15_t)0xc08d, (q15_t)0x4852, (q15_t)0xc08b, (q15_t)0x4846, (q15_t)0xc089,
+    (q15_t)0x4839, (q15_t)0xc088, (q15_t)0x482d, (q15_t)0xc086, (q15_t)0x4820, (q15_t)0xc085, (q15_t)0x4814, (q15_t)0xc083,
+    (q15_t)0x4807, (q15_t)0xc081, (q15_t)0x47fb, (q15_t)0xc080, (q15_t)0x47ef, (q15_t)0xc07e, (q15_t)0x47e2, (q15_t)0xc07d,
+    (q15_t)0x47d6, (q15_t)0xc07b, (q15_t)0x47c9, (q15_t)0xc07a, (q15_t)0x47bd, (q15_t)0xc078, (q15_t)0x47b0, (q15_t)0xc077,
+    (q15_t)0x47a4, (q15_t)0xc075, (q15_t)0x4797, (q15_t)0xc074, (q15_t)0x478b, (q15_t)0xc072, (q15_t)0x477e, (q15_t)0xc071,
+    (q15_t)0x4772, (q15_t)0xc06f, (q15_t)0x4765, (q15_t)0xc06e, (q15_t)0x4759, (q15_t)0xc06c, (q15_t)0x474c, (q15_t)0xc06b,
+    (q15_t)0x4740, (q15_t)0xc069, (q15_t)0x4733, (q15_t)0xc068, (q15_t)0x4727, (q15_t)0xc067, (q15_t)0x471a, (q15_t)0xc065,
+    (q15_t)0x470e, (q15_t)0xc064, (q15_t)0x4701, (q15_t)0xc062, (q15_t)0x46f5, (q15_t)0xc061, (q15_t)0x46e8, (q15_t)0xc060,
+    (q15_t)0x46dc, (q15_t)0xc05e, (q15_t)0x46cf, (q15_t)0xc05d, (q15_t)0x46c3, (q15_t)0xc05c, (q15_t)0x46b6, (q15_t)0xc05a,
+    (q15_t)0x46aa, (q15_t)0xc059, (q15_t)0x469d, (q15_t)0xc058, (q15_t)0x4691, (q15_t)0xc056, (q15_t)0x4684, (q15_t)0xc055,
+    (q15_t)0x4678, (q15_t)0xc054, (q15_t)0x466b, (q15_t)0xc053, (q15_t)0x465f, (q15_t)0xc051, (q15_t)0x4652, (q15_t)0xc050,
+    (q15_t)0x4646, (q15_t)0xc04f, (q15_t)0x4639, (q15_t)0xc04e, (q15_t)0x462d, (q15_t)0xc04c, (q15_t)0x4620, (q15_t)0xc04b,
+    (q15_t)0x4614, (q15_t)0xc04a, (q15_t)0x4607, (q15_t)0xc049, (q15_t)0x45fb, (q15_t)0xc048, (q15_t)0x45ee, (q15_t)0xc047,
+    (q15_t)0x45e2, (q15_t)0xc045, (q15_t)0x45d5, (q15_t)0xc044, (q15_t)0x45c9, (q15_t)0xc043, (q15_t)0x45bc, (q15_t)0xc042,
+    (q15_t)0x45b0, (q15_t)0xc041, (q15_t)0x45a3, (q15_t)0xc040, (q15_t)0x4597, (q15_t)0xc03f, (q15_t)0x458a, (q15_t)0xc03d,
+    (q15_t)0x457e, (q15_t)0xc03c, (q15_t)0x4571, (q15_t)0xc03b, (q15_t)0x4565, (q15_t)0xc03a, (q15_t)0x4558, (q15_t)0xc039,
+    (q15_t)0x454c, (q15_t)0xc038, (q15_t)0x453f, (q15_t)0xc037, (q15_t)0x4533, (q15_t)0xc036, (q15_t)0x4526, (q15_t)0xc035,
+    (q15_t)0x451a, (q15_t)0xc034, (q15_t)0x450d, (q15_t)0xc033, (q15_t)0x4500, (q15_t)0xc032, (q15_t)0x44f4, (q15_t)0xc031,
+    (q15_t)0x44e7, (q15_t)0xc030, (q15_t)0x44db, (q15_t)0xc02f, (q15_t)0x44ce, (q15_t)0xc02e, (q15_t)0x44c2, (q15_t)0xc02d,
+    (q15_t)0x44b5, (q15_t)0xc02c, (q15_t)0x44a9, (q15_t)0xc02b, (q15_t)0x449c, (q15_t)0xc02b, (q15_t)0x4490, (q15_t)0xc02a,
+    (q15_t)0x4483, (q15_t)0xc029, (q15_t)0x4477, (q15_t)0xc028, (q15_t)0x446a, (q15_t)0xc027, (q15_t)0x445e, (q15_t)0xc026,
+    (q15_t)0x4451, (q15_t)0xc025, (q15_t)0x4444, (q15_t)0xc024, (q15_t)0x4438, (q15_t)0xc024, (q15_t)0x442b, (q15_t)0xc023,
+    (q15_t)0x441f, (q15_t)0xc022, (q15_t)0x4412, (q15_t)0xc021, (q15_t)0x4406, (q15_t)0xc020, (q15_t)0x43f9, (q15_t)0xc020,
+    (q15_t)0x43ed, (q15_t)0xc01f, (q15_t)0x43e0, (q15_t)0xc01e, (q15_t)0x43d4, (q15_t)0xc01d, (q15_t)0x43c7, (q15_t)0xc01d,
+    (q15_t)0x43bb, (q15_t)0xc01c, (q15_t)0x43ae, (q15_t)0xc01b, (q15_t)0x43a1, (q15_t)0xc01a, (q15_t)0x4395, (q15_t)0xc01a,
+    (q15_t)0x4388, (q15_t)0xc019, (q15_t)0x437c, (q15_t)0xc018, (q15_t)0x436f, (q15_t)0xc018, (q15_t)0x4363, (q15_t)0xc017,
+    (q15_t)0x4356, (q15_t)0xc016, (q15_t)0x434a, (q15_t)0xc016, (q15_t)0x433d, (q15_t)0xc015, (q15_t)0x4330, (q15_t)0xc014,
+    (q15_t)0x4324, (q15_t)0xc014, (q15_t)0x4317, (q15_t)0xc013, (q15_t)0x430b, (q15_t)0xc013, (q15_t)0x42fe, (q15_t)0xc012,
+    (q15_t)0x42f2, (q15_t)0xc011, (q15_t)0x42e5, (q15_t)0xc011, (q15_t)0x42d9, (q15_t)0xc010, (q15_t)0x42cc, (q15_t)0xc010,
+    (q15_t)0x42c0, (q15_t)0xc00f, (q15_t)0x42b3, (q15_t)0xc00f, (q15_t)0x42a6, (q15_t)0xc00e, (q15_t)0x429a, (q15_t)0xc00e,
+    (q15_t)0x428d, (q15_t)0xc00d, (q15_t)0x4281, (q15_t)0xc00d, (q15_t)0x4274, (q15_t)0xc00c, (q15_t)0x4268, (q15_t)0xc00c,
+    (q15_t)0x425b, (q15_t)0xc00b, (q15_t)0x424e, (q15_t)0xc00b, (q15_t)0x4242, (q15_t)0xc00a, (q15_t)0x4235, (q15_t)0xc00a,
+    (q15_t)0x4229, (q15_t)0xc009, (q15_t)0x421c, (q15_t)0xc009, (q15_t)0x4210, (q15_t)0xc009, (q15_t)0x4203, (q15_t)0xc008,
+    (q15_t)0x41f7, (q15_t)0xc008, (q15_t)0x41ea, (q15_t)0xc007, (q15_t)0x41dd, (q15_t)0xc007, (q15_t)0x41d1, (q15_t)0xc007,
+    (q15_t)0x41c4, (q15_t)0xc006, (q15_t)0x41b8, (q15_t)0xc006, (q15_t)0x41ab, (q15_t)0xc006, (q15_t)0x419f, (q15_t)0xc005,
+    (q15_t)0x4192, (q15_t)0xc005, (q15_t)0x4186, (q15_t)0xc005, (q15_t)0x4179, (q15_t)0xc004, (q15_t)0x416c, (q15_t)0xc004,
+    (q15_t)0x4160, (q15_t)0xc004, (q15_t)0x4153, (q15_t)0xc004, (q15_t)0x4147, (q15_t)0xc003, (q15_t)0x413a, (q15_t)0xc003,
+    (q15_t)0x412e, (q15_t)0xc003, (q15_t)0x4121, (q15_t)0xc003, (q15_t)0x4114, (q15_t)0xc002, (q15_t)0x4108, (q15_t)0xc002,
+    (q15_t)0x40fb, (q15_t)0xc002, (q15_t)0x40ef, (q15_t)0xc002, (q15_t)0x40e2, (q15_t)0xc002, (q15_t)0x40d6, (q15_t)0xc001,
+    (q15_t)0x40c9, (q15_t)0xc001, (q15_t)0x40bc, (q15_t)0xc001, (q15_t)0x40b0, (q15_t)0xc001, (q15_t)0x40a3, (q15_t)0xc001,
+    (q15_t)0x4097, (q15_t)0xc001, (q15_t)0x408a, (q15_t)0xc001, (q15_t)0x407e, (q15_t)0xc000, (q15_t)0x4071, (q15_t)0xc000,
+    (q15_t)0x4065, (q15_t)0xc000, (q15_t)0x4058, (q15_t)0xc000, (q15_t)0x404b, (q15_t)0xc000, (q15_t)0x403f, (q15_t)0xc000,
+    (q15_t)0x4032, (q15_t)0xc000, (q15_t)0x4026, (q15_t)0xc000, (q15_t)0x4019, (q15_t)0xc000, (q15_t)0x400d, (q15_t)0xc000,
+};
+
+#endif
+/**
+  @} end of RealFFT_Table group
+ */
+
+/**
+  @ingroup DCT4_IDCT4
+ */
+
+/**
+  @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
+  @{
+ */
+
+/**
+  @brief  Weights Table
+ */
+
+/**
+  @par
+  Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))

+  @par
+  C command to generate the table
+  
+  for(i = 0; i< N; i++)
+  {
+    weights[(2*i)]   =  cos (i*c);
+    weights[(2*i)+1] = -sin (i*c);
+  } 

+  @par
+  where N is the Number of weights to be calculated and c is pi/(2*N)
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is 2*N.
+ */
+
+
+/**
+  @par
+  cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))

+  @par
+  C command to generate the table
+  @par
+  
 for(i = 0; i< N; i++)
+  {
+     cos_factors[i]= 2 * cos((2*i+1)*c/2);
+  } 

+  @par
+  where N is the number of factors to generate and c is pi/(2*N)
+*/
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
+    const float32_t Weights_128[256] = {
+  1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,  -0.012271538285719925f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f, -0.036807222941358832f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f, -0.061320736302208578f,
+  0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f, -0.085797312344439894f,
+  0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f, -0.110222207293883060f,
+  0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f, -0.134580708507126170f,
+  0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f, -0.158858143333861450f,
+  0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f, -0.183039887955140950f,
+  0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f, -0.207111376192218560f,
+  0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f, -0.231058108280671110f,
+  0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f, -0.254865659604514570f,
+  0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f, -0.278519689385053060f,
+  0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f, -0.302005949319228080f,
+  0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f, -0.325310292162262930f,
+  0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f, -0.348418680249434560f,
+  0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f, -0.371317193951837540f,
+  0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f, -0.393992040061048100f,
+  0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f, -0.416429560097637150f,
+  0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f, -0.438616238538527660f,
+  0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f, -0.460538710958240010f,
+  0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f, -0.482183772079122720f,
+  0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f, -0.503538383725717580f,
+  0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f, -0.524589682678468950f,
+  0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f, -0.545324988422046460f,
+  0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f, -0.565731810783613120f,
+  0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f, -0.585797857456438860f,
+  0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f, -0.605511041404325550f,
+  0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f, -0.624859488142386340f,
+  0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f, -0.643831542889791390f,
+  0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f, -0.662415777590171780f,
+  0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f, -0.680600997795453020f,
+  0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f, -0.698376249408972920f,
+  0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f, -0.715730825283818590f,
+  0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f, -0.732654271672412820f,
+  0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f, -0.749136394523459260f,
+  0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f, -0.765167265622458960f,
+  0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f, -0.780737228572094380f,
+  0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f, -0.795836904608883460f,
+  0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f, -0.810457198252594770f,
+  0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f, -0.824589302785025290f,
+  0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f, -0.838224705554837970f,
+  0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f, -0.851355193105265200f,
+  0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f, -0.863972856121586700f,
+  0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f, -0.876070094195406600f,
+  0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f, -0.887639620402853930f,
+  0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f, -0.898674465693953820f,
+  0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f, -0.909167983090522270f,
+  0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f, -0.919113851690057770f,
+  0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f, -0.928506080473215480f,
+  0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f, -0.937339011912574960f,
+  0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f, -0.945607325380521280f,
+  0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f, -0.953306040354193750f,
+  0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f, -0.960430519415565790f,
+  0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f, -0.966976471044852070f,
+  0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f, -0.972939952205560070f,
+  0.219101240156869770f, -0.975702130038528570f, 0.207111376192218560f, -0.978317370719627650f,
+  0.195090322016128330f, -0.980785280403230430f, 0.183039887955141060f, -0.983105487431216290f,
+  0.170961888760301360f, -0.985277642388941220f, 0.158858143333861390f, -0.987301418157858430f,
+  0.146730474455361750f, -0.989176509964781010f, 0.134580708507126220f, -0.990902635427780010f,
+  0.122410675199216280f, -0.992479534598709970f, 0.110222207293883180f, -0.993906970002356060f,
+  0.098017140329560770f, -0.995184726672196820f, 0.085797312344439880f, -0.996312612182778000f,
+  0.073564563599667454f, -0.997290456678690210f, 0.061320736302208648f, -0.998118112900149180f,
+  0.049067674327418126f, -0.998795456205172410f, 0.036807222941358991f, -0.999322384588349540f,
+  0.024541228522912264f, -0.999698818696204250f, 0.012271538285719944f, -0.999924701839144500f
+};
+
+    const float32_t cos_factors_128[128] = {
+  0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f,
+  0.999077727752645360f,
+  0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f,
+  0.995767414467659820f,
+  0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f,
+  0.990058210262297120f,
+  0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f,
+  0.981963869109555240f,
+  0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f,
+  0.971503890986251780f,
+  0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f,
+  0.958703474895871600f,
+  0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f,
+  0.943593458161960390f,
+  0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f,
+  0.926210242138311380f,
+  0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f,
+  0.906595704514915330f,
+  0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f,
+  0.884797098430937790f,
+  0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f,
+  0.860866938637767310f,
+  0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f,
+  0.834862874986380010f,
+  0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,
+  0.806847553543799330f,
+  0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f,
+  0.776888465673232440f,
+  0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f,
+  0.745057785441466060f,
+  0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,
+  0.711432195745216430f,
+  0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f,
+  0.676092703575316030f,
+  0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f,
+  0.639124444863775730f,
+  0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,
+  0.600616479383868970f,
+  0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f,
+  0.560661576197336030f,
+  0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f,
+  0.519355990165589530f,
+  0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,
+  0.476799230063322250f,
+  0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f,
+  0.433093818853152010f,
+  0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f,
+  0.388345046698826300f,
+  0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,
+  0.342660717311994380f,
+  0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f,
+  0.296150888243623960f,
+  0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f,
+  0.248927605745720260f,
+  0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,
+  0.201104634842091960f,
+  0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f,
+  0.152797185258443410f,
+  0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f,
+  0.104121633872054730f,
+  0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,
+  0.055195244349690031f,
+  0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f,
+  0.006135884649154515f
+};
+
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
+    const float32_t Weights_512[1024] = {
+  1.000000000000000000f,  0.000000000000000000f, 0.999995293809576190f, -0.003067956762965976f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999957644551963900f, -0.009203754782059819f,
+  0.999924701839144500f, -0.012271538285719925f, 0.999882347454212560f, -0.015339206284988100f,
+  0.999830581795823400f, -0.018406729905804820f, 0.999769405351215280f, -0.021474080275469508f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999618822495178640f, -0.027608145778965740f,
+  0.999529417501093140f, -0.030674803176636626f, 0.999430604555461730f, -0.033741171851377580f,
+  0.999322384588349540f, -0.036807222941358832f, 0.999204758618363890f, -0.039872927587739811f,
+  0.999077727752645360f, -0.042938256934940820f, 0.998941293186856870f, -0.046003182130914623f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998640218180265270f, -0.052131704680283324f,
+  0.998475580573294770f, -0.055195244349689934f, 0.998301544933892890f, -0.058258264500435752f,
+  0.998118112900149180f, -0.061320736302208578f, 0.997925286198596000f, -0.064382630929857465f,
+  0.997723066644191640f, -0.067443919563664051f, 0.997511456140303450f, -0.070504573389613856f,
+  0.997290456678690210f, -0.073564563599667426f, 0.997060070339482960f, -0.076623861392031492f,
+  0.996820299291165670f, -0.079682437971430126f, 0.996571145790554840f, -0.082740264549375692f,
+  0.996312612182778000f, -0.085797312344439894f, 0.996044700901251970f, -0.088853552582524600f,
+  0.995767414467659820f, -0.091908956497132724f, 0.995480755491926940f, -0.094963495329638992f,
+  0.995184726672196930f, -0.098017140329560604f, 0.994879330794805620f, -0.101069862754827820f,
+  0.994564570734255420f, -0.104121633872054590f, 0.994240449453187900f, -0.107172424956808840f,
+  0.993906970002356060f, -0.110222207293883060f, 0.993564135520595300f, -0.113270952177564350f,
+  0.993211949234794500f, -0.116318630911904750f, 0.992850414459865100f, -0.119365214810991350f,
+  0.992479534598709970f, -0.122410675199216200f, 0.992099313142191800f, -0.125454983411546230f,
+  0.991709753669099530f, -0.128498110793793170f, 0.991310859846115440f, -0.131540028702883120f,
+  0.990902635427780010f, -0.134580708507126170f, 0.990485084256457090f, -0.137620121586486040f,
+  0.990058210262297120f, -0.140658239332849210f, 0.989622017463200890f, -0.143695033150294470f,
+  0.989176509964781010f, -0.146730474455361750f, 0.988721691960323780f, -0.149764534677321510f,
+  0.988257567730749460f, -0.152797185258443440f, 0.987784141644572180f, -0.155828397654265230f,
+  0.987301418157858430f, -0.158858143333861450f, 0.986809401814185530f, -0.161886393780111830f,
+  0.986308097244598670f, -0.164913120489969890f, 0.985797509167567480f, -0.167938294974731170f,
+  0.985277642388941220f, -0.170961888760301220f, 0.984748501801904210f, -0.173983873387463820f,
+  0.984210092386929030f, -0.177004220412148750f, 0.983662419211730250f, -0.180022901405699510f,
+  0.983105487431216290f, -0.183039887955140950f, 0.982539302287441240f, -0.186055151663446630f,
+  0.981963869109555240f, -0.189068664149806190f, 0.981379193313754560f, -0.192080397049892440f,
+  0.980785280403230430f, -0.195090322016128250f, 0.980182135968117430f, -0.198098410717953560f,
+  0.979569765685440520f, -0.201104634842091900f, 0.978948175319062200f, -0.204108966092816870f,
+  0.978317370719627650f, -0.207111376192218560f, 0.977677357824509930f, -0.210111836880469610f,
+  0.977028142657754390f, -0.213110319916091360f, 0.976369731330021140f, -0.216106797076219520f,
+  0.975702130038528570f, -0.219101240156869800f, 0.975025345066994120f, -0.222093620973203510f,
+  0.974339382785575860f, -0.225083911359792830f, 0.973644249650811980f, -0.228072083170885730f,
+  0.972939952205560180f, -0.231058108280671110f, 0.972226497078936270f, -0.234041958583543430f,
+  0.971503890986251780f, -0.237023605994367200f, 0.970772140728950350f, -0.240003022448741500f,
+  0.970031253194543970f, -0.242980179903263870f, 0.969281235356548530f, -0.245955050335794590f,
+  0.968522094274417380f, -0.248927605745720150f, 0.967753837093475510f, -0.251897818154216970f,
+  0.966976471044852070f, -0.254865659604514570f, 0.966190003445412500f, -0.257831102162158990f,
+  0.965394441697689400f, -0.260794117915275510f, 0.964589793289812760f, -0.263754678974831350f,
+  0.963776065795439840f, -0.266712757474898370f, 0.962953266873683880f, -0.269668325572915090f,
+  0.962121404269041580f, -0.272621355449948980f, 0.961280485811320640f, -0.275571819310958140f,
+  0.960430519415565790f, -0.278519689385053060f, 0.959571513081984520f, -0.281464937925757940f,
+  0.958703474895871600f, -0.284407537211271880f, 0.957826413027532910f, -0.287347459544729510f,
+  0.956940335732208820f, -0.290284677254462330f, 0.956045251349996410f, -0.293219162694258630f,
+  0.955141168305770780f, -0.296150888243623790f, 0.954228095109105670f, -0.299079826308040480f,
+  0.953306040354193860f, -0.302005949319228080f, 0.952375012719765880f, -0.304929229735402370f,
+  0.951435020969008340f, -0.307849640041534870f, 0.950486073949481700f, -0.310767152749611470f,
+  0.949528180593036670f, -0.313681740398891520f, 0.948561349915730270f, -0.316593375556165850f,
+  0.947585591017741090f, -0.319502030816015690f, 0.946600913083283530f, -0.322407678801069850f,
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+  0.302005949319228200f, -0.953306040354193750f, 0.299079826308040480f, -0.954228095109105670f,
+  0.296150888243623960f, -0.955141168305770670f, 0.293219162694258680f, -0.956045251349996410f,
+  0.290284677254462330f, -0.956940335732208940f, 0.287347459544729570f, -0.957826413027532910f,
+  0.284407537211271820f, -0.958703474895871600f, 0.281464937925758050f, -0.959571513081984520f,
+  0.278519689385053060f, -0.960430519415565790f, 0.275571819310958250f, -0.961280485811320640f,
+  0.272621355449948980f, -0.962121404269041580f, 0.269668325572915200f, -0.962953266873683880f,
+  0.266712757474898420f, -0.963776065795439840f, 0.263754678974831510f, -0.964589793289812650f,
+  0.260794117915275570f, -0.965394441697689400f, 0.257831102162158930f, -0.966190003445412620f,
+  0.254865659604514630f, -0.966976471044852070f, 0.251897818154216910f, -0.967753837093475510f,
+  0.248927605745720260f, -0.968522094274417270f, 0.245955050335794590f, -0.969281235356548530f,
+  0.242980179903263980f, -0.970031253194543970f, 0.240003022448741500f, -0.970772140728950350f,
+  0.237023605994367340f, -0.971503890986251780f, 0.234041958583543460f, -0.972226497078936270f,
+  0.231058108280671280f, -0.972939952205560070f, 0.228072083170885790f, -0.973644249650811870f,
+  0.225083911359792780f, -0.974339382785575860f, 0.222093620973203590f, -0.975025345066994120f,
+  0.219101240156869770f, -0.975702130038528570f, 0.216106797076219600f, -0.976369731330021140f,
+  0.213110319916091360f, -0.977028142657754390f, 0.210111836880469720f, -0.977677357824509930f,
+  0.207111376192218560f, -0.978317370719627650f, 0.204108966092817010f, -0.978948175319062200f,
+  0.201104634842091960f, -0.979569765685440520f, 0.198098410717953730f, -0.980182135968117320f,
+  0.195090322016128330f, -0.980785280403230430f, 0.192080397049892380f, -0.981379193313754560f,
+  0.189068664149806280f, -0.981963869109555240f, 0.186055151663446630f, -0.982539302287441240f,
+  0.183039887955141060f, -0.983105487431216290f, 0.180022901405699510f, -0.983662419211730250f,
+  0.177004220412148860f, -0.984210092386929030f, 0.173983873387463850f, -0.984748501801904210f,
+  0.170961888760301360f, -0.985277642388941220f, 0.167938294974731230f, -0.985797509167567370f,
+  0.164913120489970090f, -0.986308097244598670f, 0.161886393780111910f, -0.986809401814185420f,
+  0.158858143333861390f, -0.987301418157858430f, 0.155828397654265320f, -0.987784141644572180f,
+  0.152797185258443410f, -0.988257567730749460f, 0.149764534677321620f, -0.988721691960323780f,
+  0.146730474455361750f, -0.989176509964781010f, 0.143695033150294580f, -0.989622017463200780f,
+  0.140658239332849240f, -0.990058210262297120f, 0.137620121586486180f, -0.990485084256456980f,
+  0.134580708507126220f, -0.990902635427780010f, 0.131540028702883280f, -0.991310859846115440f,
+  0.128498110793793220f, -0.991709753669099530f, 0.125454983411546210f, -0.992099313142191800f,
+  0.122410675199216280f, -0.992479534598709970f, 0.119365214810991350f, -0.992850414459865100f,
+  0.116318630911904880f, -0.993211949234794500f, 0.113270952177564360f, -0.993564135520595300f,
+  0.110222207293883180f, -0.993906970002356060f, 0.107172424956808870f, -0.994240449453187900f,
+  0.104121633872054730f, -0.994564570734255420f, 0.101069862754827880f, -0.994879330794805620f,
+  0.098017140329560770f, -0.995184726672196820f, 0.094963495329639061f, -0.995480755491926940f,
+  0.091908956497132696f, -0.995767414467659820f, 0.088853552582524684f, -0.996044700901251970f,
+  0.085797312344439880f, -0.996312612182778000f, 0.082740264549375803f, -0.996571145790554840f,
+  0.079682437971430126f, -0.996820299291165670f, 0.076623861392031617f, -0.997060070339482960f,
+  0.073564563599667454f, -0.997290456678690210f, 0.070504573389614009f, -0.997511456140303450f,
+  0.067443919563664106f, -0.997723066644191640f, 0.064382630929857410f, -0.997925286198596000f,
+  0.061320736302208648f, -0.998118112900149180f, 0.058258264500435732f, -0.998301544933892890f,
+  0.055195244349690031f, -0.998475580573294770f, 0.052131704680283317f, -0.998640218180265270f,
+  0.049067674327418126f, -0.998795456205172410f, 0.046003182130914644f, -0.998941293186856870f,
+  0.042938256934940959f, -0.999077727752645360f, 0.039872927587739845f, -0.999204758618363890f,
+  0.036807222941358991f, -0.999322384588349540f, 0.033741171851377642f, -0.999430604555461730f,
+  0.030674803176636581f, -0.999529417501093140f, 0.027608145778965820f, -0.999618822495178640f,
+  0.024541228522912264f, -0.999698818696204250f, 0.021474080275469605f, -0.999769405351215280f,
+  0.018406729905804820f, -0.999830581795823400f, 0.015339206284988220f, -0.999882347454212560f,
+  0.012271538285719944f, -0.999924701839144500f, 0.009203754782059960f, -0.999957644551963900f,
+  0.006135884649154515f, -0.999981175282601110f, 0.003067956762966138f, -0.999995293809576190f
+};
+
+    const float32_t cos_factors_512[512] = {
+  0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f,
+  0.999942349676023910f,
+  0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f,
+  0.999735288260561680f,
+  0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f,
+  0.999377670388002850f,
+  0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,
+  0.998869549914283560f,
+  0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f,
+  0.998211003360478190f,
+  0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f,
+  0.997402129901275300f,
+  0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,
+  0.996443051350042630f,
+  0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f,
+  0.995333912140482280f,
+  0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f,
+  0.994074879304879370f,
+  0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,
+  0.992666142448948020f,
+  0.992290591348257370f, 0.991905700430609330f, 0.991511473318743900f,
+  0.991107913723276890f,
+  0.990695025442664630f, 0.990272812363169110f, 0.989841278458820530f,
+  0.989400427791380380f,
+  0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,
+  0.987543941794359230f,
+  0.987056571305750970f, 0.986559910264775410f, 0.986053963346195440f,
+  0.985538735312176060f,
+  0.985014231012239840f, 0.984480455383220930f, 0.983937413449218920f,
+  0.983385110321551180f,
+  0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,
+  0.981083391150486710f,
+  0.980484861773469380f, 0.979877103699517640f, 0.979260122649082020f,
+  0.978633924429423210f,
+  0.977998514934557140f, 0.977353900145199960f, 0.976700086128711840f,
+  0.976037079039039020f,
+  0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,
+  0.973293246054698250f,
+  0.972584368934732210f, 0.971866337480279400f, 0.971139158449725090f,
+  0.970402838687555500f,
+  0.969657385124292450f, 0.968902804776428870f, 0.968139104746362440f,
+  0.967366292222328510f,
+  0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,
+  0.964184063951745830f,
+  0.963365799780954050f, 0.962538468044359160f, 0.961702076529122540f,
+  0.960856633107679660f,
+  0.960002145737665960f, 0.959138622461841890f, 0.958266071408017670f,
+  0.957384500788975860f,
+  0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,
+  0.953768189885990330f,
+  0.952841647601198720f, 0.951906136807932350f, 0.950961666311575080f,
+  0.950008245001843000f,
+  0.949045881852700560f, 0.948074585922276230f, 0.947094366352777220f,
+  0.946105232370403450f,
+  0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,
+  0.942059739771017310f,
+  0.941026175050889260f, 0.939983753034014050f, 0.938932483532064600f,
+  0.937872376439989890f,
+  0.936803441735921560f, 0.935725689481080370f, 0.934639129819680780f,
+  0.933543772978836170f,
+  0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,
+  0.929074581259315860f,
+  0.927935394822617890f, 0.926787474304581750f, 0.925630830509872720f,
+  0.924465474325262600f,
+  0.923291416719527640f, 0.922108668743345180f, 0.920917241529189520f,
+  0.919717146291227360f,
+  0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,
+  0.914830312237946200f,
+  0.913587047945250810f, 0.912335184623322750f, 0.911074734055176360f,
+  0.909805708104652220f,
+  0.908528118716306120f, 0.907241977915295820f, 0.905947297807268460f,
+  0.904644090578246240f,
+  0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,
+  0.899346236979341570f,
+  0.898000579740739880f, 0.896646470178680150f, 0.895283921038557580f,
+  0.893912945145203250f,
+  0.892533555402764580f, 0.891145764794583180f, 0.889749586383072780f,
+  0.888345033309596350f,
+  0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,
+  0.882643339979562790f,
+  0.881197113471222090f, 0.879742592800047410f, 0.878279791656541580f,
+  0.876808723809145650f,
+  0.875329403104110890f, 0.873841843465366860f, 0.872346058894391540f,
+  0.870842063470078980f,
+  0.869329871348606840f, 0.867809496763303320f, 0.866280954024512990f,
+  0.864744257519462380f,
+  0.863199421712124160f, 0.861646461143081300f, 0.860085390429390140f,
+  0.858516224264442740f,
+  0.856938977417828760f, 0.855353664735196030f, 0.853760301138111410f,
+  0.852158901623919830f,
+  0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,
+  0.845673246987299070f,
+  0.844031895490066410f, 0.842382599643185850f, 0.840725374970458070f,
+  0.839060237070312740f,
+  0.837387201615661940f, 0.835706284353752600f, 0.834017501106018130f,
+  0.832320867767929680f,
+  0.830616400308846310f, 0.828904114771864870f, 0.827184027273669130f,
+  0.825456154004377550f,
+  0.823720511227391430f, 0.821977115279241550f, 0.820225982569434690f,
+  0.818467129580298660f,
+  0.816700572866827850f, 0.814926329056526620f, 0.813144414849253590f,
+  0.811354847017063730f,
+  0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,
+  0.804120377398265810f,
+  0.802292795538115720f, 0.800457662192622820f, 0.798614994634760820f,
+  0.796764810208418830f,
+  0.794907126328237010f, 0.793041960479443640f, 0.791169330217690200f,
+  0.789289253168885650f,
+  0.787401747029031430f, 0.785506829564053930f, 0.783604518609638200f,
+  0.781694832071059390f,
+  0.779777787923014550f, 0.777853404209453150f, 0.775921699043407690f,
+  0.773982690606822900f,
+  0.772036397150384520f, 0.770082836993347900f, 0.768122028523365420f,
+  0.766153990196312920f,
+  0.764178740536116670f, 0.762196298134578900f, 0.760206681651202420f,
+  0.758209909813015280f,
+  0.756206001414394540f, 0.754194975316889170f, 0.752176850449042810f,
+  0.750151645806215070f,
+  0.748119380450403600f, 0.746080073510063780f, 0.744033744179929290f,
+  0.741980411720831070f,
+  0.739920095459516200f, 0.737852814788465980f, 0.735778589165713590f,
+  0.733697438114660370f,
+  0.731609381223892630f, 0.729514438146997010f, 0.727412628602375770f,
+  0.725303972373060770f,
+  0.723188489306527460f, 0.721066199314508110f, 0.718937122372804490f,
+  0.716801278521099540f,
+  0.714658687862769090f, 0.712509370564692320f, 0.710353346857062420f,
+  0.708190637033195400f,
+  0.706021261449339740f, 0.703845240524484940f, 0.701662594740168570f,
+  0.699473344640283770f,
+  0.697277510830886630f, 0.695075113980000880f, 0.692866174817424740f,
+  0.690650714134534720f,
+  0.688428752784090550f, 0.686200311680038700f, 0.683965411797315510f,
+  0.681724074171649820f,
+  0.679476319899365080f, 0.677222170137180450f, 0.674961646102012040f,
+  0.672694769070772970f,
+  0.670421560380173090f, 0.668142041426518560f, 0.665856233665509720f,
+  0.663564158612039880f,
+  0.661265837839992270f, 0.658961292982037320f, 0.656650545729429050f,
+  0.654333617831800550f,
+  0.652010531096959500f, 0.649681307390683190f, 0.647345968636512060f,
+  0.645004536815544040f,
+  0.642657033966226860f, 0.640303482184151670f, 0.637943903621844170f,
+  0.635578320488556230f,
+  0.633206755050057190f, 0.630829229628424470f, 0.628445766601832710f,
+  0.626056388404343520f,
+  0.623661117525694640f, 0.621259976511087660f, 0.618852987960976320f,
+  0.616440174530853650f,
+  0.614021558931038490f, 0.611597163926462020f, 0.609167012336453210f,
+  0.606731127034524480f,
+  0.604289530948156070f, 0.601842247058580030f, 0.599389298400564540f,
+  0.596930708062196500f,
+  0.594466499184664540f, 0.591996694962040990f, 0.589521318641063940f,
+  0.587040393520918080f,
+  0.584553942953015330f, 0.582061990340775550f, 0.579564559139405740f,
+  0.577061672855679550f,
+  0.574553355047715760f, 0.572039629324757050f, 0.569520519346947250f,
+  0.566996048825108680f,
+  0.564466241520519500f, 0.561931121244689470f, 0.559390711859136140f,
+  0.556845037275160100f,
+  0.554294121453620110f, 0.551737988404707450f, 0.549176662187719770f,
+  0.546610166910834860f,
+  0.544038526730883930f, 0.541461765853123560f, 0.538879908531008420f,
+  0.536292979065963180f,
+  0.533701001807152960f, 0.531104001151255000f, 0.528502001542228480f,
+  0.525895027471084740f,
+  0.523283103475656430f, 0.520666254140367270f, 0.518044504095999340f,
+  0.515417878019463150f,
+  0.512786400633563070f, 0.510150096706766700f, 0.507508991052970870f,
+  0.504863108531267480f,
+  0.502212474045710900f, 0.499557112545081890f, 0.496897049022654640f,
+  0.494232308515959730f,
+  0.491562916106550060f, 0.488888896919763230f, 0.486210276124486530f,
+  0.483527078932918740f,
+  0.480839330600333900f, 0.478147056424843120f, 0.475450281747155870f,
+  0.472749031950342900f,
+  0.470043332459595620f, 0.467333208741988530f, 0.464618686306237820f,
+  0.461899790702462840f,
+  0.459176547521944150f, 0.456448982396883860f, 0.453717121000163930f,
+  0.450980989045103810f,
+  0.448240612285220000f, 0.445496016513981740f, 0.442747227564570130f,
+  0.439994271309633260f,
+  0.437237173661044200f, 0.434475960569655710f, 0.431710658025057370f,
+  0.428941292055329550f,
+  0.426167888726799620f, 0.423390474143796100f, 0.420609074448402510f,
+  0.417823715820212380f,
+  0.415034424476081630f, 0.412241226669883000f, 0.409444148692257590f,
+  0.406643216870369140f,
+  0.403838457567654130f, 0.401029897183575790f, 0.398217562153373620f,
+  0.395401478947816300f,
+  0.392581674072951530f, 0.389758174069856410f, 0.386931005514388690f,
+  0.384100195016935040f,
+  0.381265769222162490f, 0.378427754808765620f, 0.375586178489217330f,
+  0.372741067009515810f,
+  0.369892447148934270f, 0.367040345719767240f, 0.364184789567079840f,
+  0.361325805568454340f,
+  0.358463420633736540f, 0.355597661704783960f, 0.352728555755210730f,
+  0.349856129790135030f,
+  0.346980410845923680f, 0.344101425989938980f, 0.341219202320282410f,
+  0.338333766965541290f,
+  0.335445147084531660f, 0.332553369866044220f, 0.329658462528587550f,
+  0.326760452320131790f,
+  0.323859366517852960f, 0.320955232427875210f, 0.318048077385015060f,
+  0.315137928752522440f,
+  0.312224813921825050f, 0.309308760312268780f, 0.306389795370861080f,
+  0.303467946572011370f,
+  0.300543241417273400f, 0.297615707435086310f, 0.294685372180514330f,
+  0.291752263234989370f,
+  0.288816408206049480f, 0.285877834727080730f, 0.282936570457055390f,
+  0.279992643080273380f,
+  0.277046080306099950f, 0.274096909868706330f, 0.271145159526808070f,
+  0.268190857063403180f,
+  0.265234030285511900f, 0.262274707023913590f, 0.259312915132886350f,
+  0.256348682489942910f,
+  0.253382036995570270f, 0.250413006572965280f, 0.247441619167773440f,
+  0.244467902747824210f,
+  0.241491885302869300f, 0.238513594844318500f, 0.235533059404975460f,
+  0.232550307038775330f,
+  0.229565365820518870f, 0.226578263845610110f, 0.223589029229790020f,
+  0.220597690108873650f,
+  0.217604274638483670f, 0.214608810993786920f, 0.211611327369227610f,
+  0.208611851978263460f,
+  0.205610413053099320f, 0.202607038844421110f, 0.199601757621131050f,
+  0.196594597670080220f,
+  0.193585587295803750f, 0.190574754820252800f, 0.187562128582529740f,
+  0.184547736938619640f,
+  0.181531608261125130f, 0.178513770938997590f, 0.175494253377271400f,
+  0.172473083996796030f,
+  0.169450291233967930f, 0.166425903540464220f, 0.163399949382973230f,
+  0.160372457242928400f,
+  0.157343455616238280f, 0.154312973013020240f, 0.151281037957330250f,
+  0.148247678986896200f,
+  0.145212924652847520f, 0.142176803519448000f, 0.139139344163826280f,
+  0.136100575175706200f,
+  0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,
+  0.123932975118512200f,
+  0.120888087235777220f, 0.117842061508325020f, 0.114794926606510250f,
+  0.111746711211126660f,
+  0.108697444013138670f, 0.105647153713410700f, 0.102595869022436280f,
+  0.099543618660069444f,
+  0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,
+  0.087325535206192226f,
+  0.084268887593324127f, 0.081211446809592386f, 0.078153241632794315f,
+  0.075094300847921291f,
+  0.072034653246889416f, 0.068974327628266732f, 0.065913352797003930f,
+  0.062851757564161420f,
+  0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,
+  0.050599749036899337f,
+  0.047535484156959261f, 0.044470771854938744f, 0.041405640977076712f,
+  0.038340120373552791f,
+  0.035274238898213947f, 0.032208025408304704f, 0.029141508764193740f,
+  0.026074717829104040f,
+  0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,
+  0.013805388528060349f,
+  0.010737659167264572f, 0.007669828739531077f, 0.004601926120448672f,
+  0.001533980186284766f
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
+    const float32_t Weights_2048[4096] = {
+  1.000000000000000000f, 0.000000000000000000f, 0.999999705862882230f,  -0.000766990318742704f,
+  0.999998823451701880f, -0.001533980186284766f, 0.999997352766978210f,  -0.002300969151425805f,
+  0.999995293809576190f, -0.003067956762965976f, 0.999992646580707190f,  -0.003834942569706228f,
+  0.999989411081928400f, -0.004601926120448571f, 0.999985587315143200f,  -0.005368906963996343f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999976174986897610f,  -0.006902858724729756f,
+  0.999970586430974140f, -0.007669828739531097f, 0.999964409618118280f,  -0.008436794242369799f,
+  0.999957644551963900f, -0.009203754782059819f, 0.999950291236490480f,  -0.009970709907418031f,
+  0.999942349676023910f, -0.010737659167264491f, 0.999933819875236000f,  -0.011504602110422714f,
+  0.999924701839144500f, -0.012271538285719925f, 0.999914995573113470f,  -0.013038467241987334f,
+  0.999904701082852900f, -0.013805388528060391f, 0.999893818374418490f,  -0.014572301692779064f,
+  0.999882347454212560f, -0.015339206284988100f, 0.999870288328982950f,  -0.016106101853537287f,
+  0.999857641005823860f, -0.016872987947281710f, 0.999844405492175240f,  -0.017639864115082053f,
+  0.999830581795823400f, -0.018406729905804820f, 0.999816169924900410f,  -0.019173584868322623f,
+  0.999801169887884260f, -0.019940428551514441f, 0.999785581693599210f,  -0.020707260504265895f,
+  0.999769405351215280f, -0.021474080275469508f, 0.999752640870248840f,  -0.022240887414024961f,
+  0.999735288260561680f, -0.023007681468839369f, 0.999717347532362190f,  -0.023774461988827555f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999679701762987930f,  -0.025307980620024571f,
+  0.999659996743959220f, -0.026074717829103901f, 0.999639703650710200f,  -0.026841439699098531f,
+  0.999618822495178640f, -0.027608145778965740f, 0.999597353289648380f,  -0.028374835617672099f,
+  0.999575296046749220f, -0.029141508764193722f, 0.999552650779456990f,  -0.029908164767516555f,
+  0.999529417501093140f, -0.030674803176636626f, 0.999505596225325310f,  -0.031441423540560301f,
+  0.999481186966166950f, -0.032208025408304586f, 0.999456189737977340f,  -0.032974608328897335f,
+  0.999430604555461730f, -0.033741171851377580f, 0.999404431433671300f,  -0.034507715524795750f,
+  0.999377670388002850f, -0.035274238898213947f, 0.999350321434199440f,  -0.036040741520706229f,
+  0.999322384588349540f, -0.036807222941358832f, 0.999293859866887790f,  -0.037573682709270494f,
+  0.999264747286594420f, -0.038340120373552694f, 0.999235046864595850f,  -0.039106535483329888f,
+  0.999204758618363890f, -0.039872927587739811f, 0.999173882565716380f,  -0.040639296235933736f,
+  0.999142418724816910f, -0.041405640977076739f, 0.999110367114174890f,  -0.042171961360347947f,
+  0.999077727752645360f, -0.042938256934940820f, 0.999044500659429290f,  -0.043704527250063421f,
+  0.999010685854073380f, -0.044470771854938668f, 0.998976283356469820f,  -0.045236990298804590f,
+  0.998941293186856870f, -0.046003182130914623f, 0.998905715365818290f,  -0.046769346900537863f,
+  0.998869549914283560f, -0.047535484156959303f, 0.998832796853527990f,  -0.048301593449480144f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998757527991183340f,  -0.049833726340107277f,
+  0.998719012233872940f, -0.050599749036899282f, 0.998679908955899090f,  -0.051365741967162593f,
+  0.998640218180265270f, -0.052131704680283324f, 0.998599939930320370f,  -0.052897636725665324f,
+  0.998559074229759310f, -0.053663537652730520f, 0.998517621102622210f,  -0.054429407010919133f,
+  0.998475580573294770f, -0.055195244349689934f, 0.998432952666508440f,  -0.055961049218520569f,
+  0.998389737407340160f, -0.056726821166907748f, 0.998345934821212370f,  -0.057492559744367566f,
+  0.998301544933892890f, -0.058258264500435752f, 0.998256567771495180f,  -0.059023934984667931f,
+  0.998211003360478190f, -0.059789570746639868f, 0.998164851727646240f,  -0.060555171335947788f,
+  0.998118112900149180f, -0.061320736302208578f, 0.998070786905482340f,  -0.062086265195060088f,
+  0.998022873771486240f, -0.062851757564161406f, 0.997974373526346990f,  -0.063617212959193106f,
+  0.997925286198596000f, -0.064382630929857465f, 0.997875611817110150f,  -0.065148011025878833f,
+  0.997825350411111640f, -0.065913352797003805f, 0.997774502010167820f,  -0.066678655793001557f,
+  0.997723066644191640f, -0.067443919563664051f, 0.997671044343441000f,  -0.068209143658806329f,
+  0.997618435138519550f, -0.068974327628266746f, 0.997565239060375750f,  -0.069739471021907307f,
+  0.997511456140303450f, -0.070504573389613856f, 0.997457086409941910f,  -0.071269634281296401f,
+  0.997402129901275300f, -0.072034653246889332f, 0.997346586646633230f,  -0.072799629836351673f,
+  0.997290456678690210f, -0.073564563599667426f, 0.997233740030466280f,  -0.074329454086845756f,
+  0.997176436735326190f, -0.075094300847921305f, 0.997118546826979980f,  -0.075859103432954447f,
+  0.997060070339482960f, -0.076623861392031492f, 0.997001007307235290f,  -0.077388574275265049f,
+  0.996941357764982160f, -0.078153241632794232f, 0.996881121747813850f,  -0.078917863014784942f,
+  0.996820299291165670f, -0.079682437971430126f, 0.996758890430818000f,  -0.080446966052950014f,
+  0.996696895202896060f, -0.081211446809592441f, 0.996634313643869900f,  -0.081975879791633066f,
+  0.996571145790554840f, -0.082740264549375692f, 0.996507391680110820f,  -0.083504600633152432f,
+  0.996443051350042630f, -0.084268887593324071f, 0.996378124838200210f,  -0.085033124980280275f,
+  0.996312612182778000f, -0.085797312344439894f, 0.996246513422315520f,  -0.086561449236251170f,
+  0.996179828595696980f, -0.087325535206192059f, 0.996112557742151130f,  -0.088089569804770507f,
+  0.996044700901251970f, -0.088853552582524600f, 0.995976258112917790f,  -0.089617483090022959f,
+  0.995907229417411720f, -0.090381360877864983f, 0.995837614855341610f,  -0.091145185496681005f,
+  0.995767414467659820f, -0.091908956497132724f, 0.995696628295663520f,  -0.092672673429913310f,
+  0.995625256380994310f, -0.093436335845747787f, 0.995553298765638470f,  -0.094199943295393204f,
+  0.995480755491926940f, -0.094963495329638992f, 0.995407626602534900f,  -0.095726991499307162f,
+  0.995333912140482280f, -0.096490431355252593f, 0.995259612149133390f,  -0.097253814448363271f,
+  0.995184726672196930f, -0.098017140329560604f, 0.995109255753726110f,  -0.098780408549799623f,
+  0.995033199438118630f, -0.099543618660069319f, 0.994956557770116380f,  -0.100306770211392860f,
+  0.994879330794805620f, -0.101069862754827820f, 0.994801518557617110f,  -0.101832895841466530f,
+  0.994723121104325700f, -0.102595869022436280f, 0.994644138481050710f,  -0.103358781848899610f,
+  0.994564570734255420f, -0.104121633872054590f, 0.994484417910747600f,  -0.104884424643134970f,
+  0.994403680057679100f, -0.105647153713410620f, 0.994322357222545810f,  -0.106409820634187680f,
+  0.994240449453187900f, -0.107172424956808840f, 0.994157956797789730f,  -0.107934966232653650f,
+  0.994074879304879370f, -0.108697444013138720f, 0.993991217023329380f,  -0.109459857849717980f,
+  0.993906970002356060f, -0.110222207293883060f, 0.993822138291519660f,  -0.110984491897163390f,
+  0.993736721940724600f, -0.111746711211126590f, 0.993650721000219120f,  -0.112508864787378690f,
+  0.993564135520595300f, -0.113270952177564350f, 0.993476965552789190f,  -0.114032972933367200f,
+  0.993389211148080650f, -0.114794926606510080f, 0.993300872358093280f,  -0.115556812748755260f,
+  0.993211949234794500f, -0.116318630911904750f, 0.993122441830495580f,  -0.117080380647800590f,
+  0.993032350197851410f, -0.117842061508324980f, 0.992941674389860470f,  -0.118603673045400720f,
+  0.992850414459865100f, -0.119365214810991350f, 0.992758570461551140f,  -0.120126686357101500f,
+  0.992666142448948020f, -0.120888087235777080f, 0.992573130476428810f,  -0.121649416999105530f,
+  0.992479534598709970f, -0.122410675199216200f, 0.992385354870851670f,  -0.123171861388280480f,
+  0.992290591348257370f, -0.123932975118512160f, 0.992195244086673920f,  -0.124694015942167640f,
+  0.992099313142191800f, -0.125454983411546230f, 0.992002798571244520f,  -0.126215877078990350f,
+  0.991905700430609330f, -0.126976696496885870f, 0.991808018777406430f,  -0.127737441217662310f,
+  0.991709753669099530f, -0.128498110793793170f, 0.991610905163495370f,  -0.129258704777796140f,
+  0.991511473318743900f, -0.130019222722233350f, 0.991411458193338540f,  -0.130779664179711710f,
+  0.991310859846115440f, -0.131540028702883120f, 0.991209678336254060f,  -0.132300315844444650f,
+  0.991107913723276890f, -0.133060525157139060f, 0.991005566067049370f,  -0.133820656193754720f,
+  0.990902635427780010f, -0.134580708507126170f, 0.990799121866020370f,  -0.135340681650134210f,
+  0.990695025442664630f, -0.136100575175706200f, 0.990590346218950150f,  -0.136860388636816380f,
+  0.990485084256457090f, -0.137620121586486040f, 0.990379239617108160f,  -0.138379773577783890f,
+  0.990272812363169110f, -0.139139344163826200f, 0.990165802557248400f,  -0.139898832897777210f,
+  0.990058210262297120f, -0.140658239332849210f, 0.989950035541608990f,  -0.141417563022303020f,
+  0.989841278458820530f, -0.142176803519448030f, 0.989731939077910570f,  -0.142935960377642670f,
+  0.989622017463200890f, -0.143695033150294470f, 0.989511513679355190f,  -0.144454021390860470f,
+  0.989400427791380380f, -0.145212924652847460f, 0.989288759864625170f,  -0.145971742489812210f,
+  0.989176509964781010f, -0.146730474455361750f, 0.989063678157881540f,  -0.147489120103153570f,
+  0.988950264510302990f, -0.148247678986896030f, 0.988836269088763540f,  -0.149006150660348450f,
+  0.988721691960323780f, -0.149764534677321510f, 0.988606533192386450f,  -0.150522830591677400f,
+  0.988490792852696590f, -0.151281037957330220f, 0.988374471009341280f,  -0.152039156328246050f,
+  0.988257567730749460f, -0.152797185258443440f, 0.988140083085692570f,  -0.153555124301993450f,
+  0.988022017143283530f, -0.154312973013020100f, 0.987903369972977790f,  -0.155070730945700510f,
+  0.987784141644572180f, -0.155828397654265230f, 0.987664332228205710f,  -0.156585972692998430f,
+  0.987543941794359230f, -0.157343455616238250f, 0.987422970413855410f,  -0.158100845978376980f,
+  0.987301418157858430f, -0.158858143333861450f, 0.987179285097874340f,  -0.159615347237193060f,
+  0.987056571305750970f, -0.160372457242928280f, 0.986933276853677710f,  -0.161129472905678810f,
+  0.986809401814185530f, -0.161886393780111830f, 0.986684946260146690f,  -0.162643219420950310f,
+  0.986559910264775410f, -0.163399949382973230f, 0.986434293901627180f,  -0.164156583221015810f,
+  0.986308097244598670f, -0.164913120489969890f, 0.986181320367928270f,  -0.165669560744784120f,
+  0.986053963346195440f, -0.166425903540464100f, 0.985926026254321130f,  -0.167182148432072940f,
+  0.985797509167567480f, -0.167938294974731170f, 0.985668412161537550f,  -0.168694342723617330f,
+  0.985538735312176060f, -0.169450291233967960f, 0.985408478695768420f,  -0.170206140061078070f,
+  0.985277642388941220f, -0.170961888760301220f, 0.985146226468662230f,  -0.171717536887049970f,
+  0.985014231012239840f, -0.172473083996795950f, 0.984881656097323700f,  -0.173228529645070320f,
+  0.984748501801904210f, -0.173983873387463820f, 0.984614768204312600f,  -0.174739114779627200f,
+  0.984480455383220930f, -0.175494253377271430f, 0.984345563417641900f,  -0.176249288736167880f,
+  0.984210092386929030f, -0.177004220412148750f, 0.984074042370776450f,  -0.177759047961107170f,
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+  0.079682437971430126f, -0.996820299291165670f, 0.078917863014785095f,
+  -0.996881121747813850f,
+  0.078153241632794315f, -0.996941357764982160f, 0.077388574275265049f,
+  -0.997001007307235290f,
+  0.076623861392031617f, -0.997060070339482960f, 0.075859103432954503f,
+  -0.997118546826979980f,
+  0.075094300847921291f, -0.997176436735326190f, 0.074329454086845867f,
+  -0.997233740030466160f,
+  0.073564563599667454f, -0.997290456678690210f, 0.072799629836351618f,
+  -0.997346586646633230f,
+  0.072034653246889416f, -0.997402129901275300f, 0.071269634281296415f,
+  -0.997457086409941910f,
+  0.070504573389614009f, -0.997511456140303450f, 0.069739471021907376f,
+  -0.997565239060375750f,
+  0.068974327628266732f, -0.997618435138519550f, 0.068209143658806454f,
+  -0.997671044343441000f,
+  0.067443919563664106f, -0.997723066644191640f, 0.066678655793001543f,
+  -0.997774502010167820f,
+  0.065913352797003930f, -0.997825350411111640f, 0.065148011025878860f,
+  -0.997875611817110150f,
+  0.064382630929857410f, -0.997925286198596000f, 0.063617212959193190f,
+  -0.997974373526346990f,
+  0.062851757564161420f, -0.998022873771486240f, 0.062086265195060247f,
+  -0.998070786905482340f,
+  0.061320736302208648f, -0.998118112900149180f, 0.060555171335947781f,
+  -0.998164851727646240f,
+  0.059789570746640007f, -0.998211003360478190f, 0.059023934984667986f,
+  -0.998256567771495180f,
+  0.058258264500435732f, -0.998301544933892890f, 0.057492559744367684f,
+  -0.998345934821212370f,
+  0.056726821166907783f, -0.998389737407340160f, 0.055961049218520520f,
+  -0.998432952666508440f,
+  0.055195244349690031f, -0.998475580573294770f, 0.054429407010919147f,
+  -0.998517621102622210f,
+  0.053663537652730679f, -0.998559074229759310f, 0.052897636725665401f,
+  -0.998599939930320370f,
+  0.052131704680283317f, -0.998640218180265270f, 0.051365741967162731f,
+  -0.998679908955899090f,
+  0.050599749036899337f, -0.998719012233872940f, 0.049833726340107257f,
+  -0.998757527991183340f,
+  0.049067674327418126f, -0.998795456205172410f, 0.048301593449480172f,
+  -0.998832796853527990f,
+  0.047535484156959261f, -0.998869549914283560f, 0.046769346900537960f,
+  -0.998905715365818290f,
+  0.046003182130914644f, -0.998941293186856870f, 0.045236990298804750f,
+  -0.998976283356469820f,
+  0.044470771854938744f, -0.999010685854073380f, 0.043704527250063421f,
+  -0.999044500659429290f,
+  0.042938256934940959f, -0.999077727752645360f, 0.042171961360348002f,
+  -0.999110367114174890f,
+  0.041405640977076712f, -0.999142418724816910f, 0.040639296235933854f,
+  -0.999173882565716380f,
+  0.039872927587739845f, -0.999204758618363890f, 0.039106535483329839f,
+  -0.999235046864595850f,
+  0.038340120373552791f, -0.999264747286594420f, 0.037573682709270514f,
+  -0.999293859866887790f,
+  0.036807222941358991f, -0.999322384588349540f, 0.036040741520706299f,
+  -0.999350321434199440f,
+  0.035274238898213947f, -0.999377670388002850f, 0.034507715524795889f,
+  -0.999404431433671300f,
+  0.033741171851377642f, -0.999430604555461730f, 0.032974608328897315f,
+  -0.999456189737977340f,
+  0.032208025408304704f, -0.999481186966166950f, 0.031441423540560343f,
+  -0.999505596225325310f,
+  0.030674803176636581f, -0.999529417501093140f, 0.029908164767516655f,
+  -0.999552650779456990f,
+  0.029141508764193740f, -0.999575296046749220f, 0.028374835617672258f,
+  -0.999597353289648380f,
+  0.027608145778965820f, -0.999618822495178640f, 0.026841439699098527f,
+  -0.999639703650710200f,
+  0.026074717829104040f, -0.999659996743959220f, 0.025307980620024630f,
+  -0.999679701762987930f,
+  0.024541228522912264f, -0.999698818696204250f, 0.023774461988827676f,
+  -0.999717347532362190f,
+  0.023007681468839410f, -0.999735288260561680f, 0.022240887414024919f,
+  -0.999752640870248840f,
+  0.021474080275469605f, -0.999769405351215280f, 0.020707260504265912f,
+  -0.999785581693599210f,
+  0.019940428551514598f, -0.999801169887884260f, 0.019173584868322699f,
+  -0.999816169924900410f,
+  0.018406729905804820f, -0.999830581795823400f, 0.017639864115082195f,
+  -0.999844405492175240f,
+  0.016872987947281773f, -0.999857641005823860f, 0.016106101853537263f,
+  -0.999870288328982950f,
+  0.015339206284988220f, -0.999882347454212560f, 0.014572301692779104f,
+  -0.999893818374418490f,
+  0.013805388528060349f, -0.999904701082852900f, 0.013038467241987433f,
+  -0.999914995573113470f,
+  0.012271538285719944f, -0.999924701839144500f, 0.011504602110422875f,
+  -0.999933819875236000f,
+  0.010737659167264572f, -0.999942349676023910f, 0.009970709907418029f,
+  -0.999950291236490480f,
+  0.009203754782059960f, -0.999957644551963900f, 0.008436794242369860f,
+  -0.999964409618118280f,
+  0.007669828739531077f, -0.999970586430974140f, 0.006902858724729877f,
+  -0.999976174986897610f,
+  0.006135884649154515f, -0.999981175282601110f, 0.005368906963996303f,
+  -0.999985587315143200f,
+  0.004601926120448672f, -0.999989411081928400f, 0.003834942569706248f,
+  -0.999992646580707190f,
+  0.003067956762966138f, -0.999995293809576190f, 0.002300969151425887f,
+  -0.999997352766978210f,
+  0.001533980186284766f, -0.999998823451701880f, 0.000766990318742846f,
+  -0.999999705862882230f
+};
+    const float32_t cos_factors_2048[2048] = {
+  0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,
+  0.999996396822294350f,
+  0.999994043728985820f, 0.999991102364945590f, 0.999987572731904080f,
+  0.999983454831937730f,
+  0.999978748667468830f, 0.999973454241265940f, 0.999967571556443780f,
+  0.999961100616462820f,
+  0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,
+  0.999929334386276070f,
+  0.999919922234522750f, 0.999909921855641540f, 0.999899333255515390f,
+  0.999888156440373320f,
+  0.999876391416790410f, 0.999864038191687680f, 0.999851096772332190f,
+  0.999837567166337090f,
+  0.999823449381661570f, 0.999808743426610520f, 0.999793449309835270f,
+  0.999777567040332940f,
+  0.999761096627446610f, 0.999744038080865430f, 0.999726391410624470f,
+  0.999708156627104880f,
+  0.999689333741033640f, 0.999669922763483760f, 0.999649923705874240f,
+  0.999629336579970110f,
+  0.999608161397882110f, 0.999586398172067070f, 0.999564046915327740f,
+  0.999541107640812940f,
+  0.999517580362016990f, 0.999493465092780590f, 0.999468761847290050f,
+  0.999443470640077770f,
+  0.999417591486021720f, 0.999391124400346050f, 0.999364069398620550f,
+  0.999336426496761240f,
+  0.999308195711029470f, 0.999279377058032710f, 0.999249970554724420f,
+  0.999219976218403530f,
+  0.999189394066714920f, 0.999158224117649430f, 0.999126466389543390f,
+  0.999094120901079070f,
+  0.999061187671284600f, 0.999027666719533690f, 0.998993558065545680f,
+  0.998958861729386080f,
+  0.998923577731465780f, 0.998887706092541290f, 0.998851246833715180f,
+  0.998814199976435390f,
+  0.998776565542495610f, 0.998738343554035230f, 0.998699534033539280f,
+  0.998660137003838490f,
+  0.998620152488108870f, 0.998579580509872500f, 0.998538421092996730f,
+  0.998496674261694640f,
+  0.998454340040524800f, 0.998411418454391300f, 0.998367909528543820f,
+  0.998323813288577560f,
+  0.998279129760433200f, 0.998233858970396850f, 0.998188000945100300f,
+  0.998141555711520520f,
+  0.998094523296980010f, 0.998046903729146840f, 0.997998697036034390f,
+  0.997949903246001190f,
+  0.997900522387751620f, 0.997850554490335110f, 0.997799999583146470f,
+  0.997748857695925690f,
+  0.997697128858758500f, 0.997644813102075420f, 0.997591910456652630f,
+  0.997538420953611340f,
+  0.997484344624417930f, 0.997429681500884180f, 0.997374431615167150f,
+  0.997318594999768600f,
+  0.997262171687536170f, 0.997205161711661850f, 0.997147565105683480f,
+  0.997089381903483400f,
+  0.997030612139289450f, 0.996971255847674320f, 0.996911313063555740f,
+  0.996850783822196610f,
+  0.996789668159204560f, 0.996727966110532490f, 0.996665677712478160f,
+  0.996602803001684130f,
+  0.996539342015137940f, 0.996475294790172160f, 0.996410661364464100f,
+  0.996345441776035900f,
+  0.996279636063254650f, 0.996213244264832040f, 0.996146266419824620f,
+  0.996078702567633980f,
+  0.996010552748005870f, 0.995941817001031350f, 0.995872495367145730f,
+  0.995802587887129160f,
+  0.995732094602106430f, 0.995661015553546910f, 0.995589350783264600f,
+  0.995517100333418110f,
+  0.995444264246510340f, 0.995370842565388990f, 0.995296835333246090f,
+  0.995222242593618360f,
+  0.995147064390386470f, 0.995071300767776170f, 0.994994951770357020f,
+  0.994918017443043200f,
+  0.994840497831093180f, 0.994762392980109930f, 0.994683702936040250f,
+  0.994604427745175660f,
+  0.994524567454151740f, 0.994444122109948040f, 0.994363091759888570f,
+  0.994281476451641550f,
+  0.994199276233218910f, 0.994116491152977070f, 0.994033121259616400f,
+  0.993949166602181130f,
+  0.993864627230059750f, 0.993779503192984580f, 0.993693794541031790f,
+  0.993607501324621610f,
+  0.993520623594518090f, 0.993433161401829360f, 0.993345114798006910f,
+  0.993256483834846440f,
+  0.993167268564487230f, 0.993077469039412300f, 0.992987085312448390f,
+  0.992896117436765980f,
+  0.992804565465879140f, 0.992712429453645460f, 0.992619709454266140f,
+  0.992526405522286100f,
+  0.992432517712593660f, 0.992338046080420420f, 0.992242990681341700f,
+  0.992147351571276090f,
+  0.992051128806485720f, 0.991954322443575950f, 0.991856932539495470f,
+  0.991758959151536110f,
+  0.991660402337333210f, 0.991561262154865290f, 0.991461538662453790f,
+  0.991361231918763460f,
+  0.991260341982802440f, 0.991158868913921350f, 0.991056812771814340f,
+  0.990954173616518500f,
+  0.990850951508413620f, 0.990747146508222710f, 0.990642758677011570f,
+  0.990537788076188750f,
+  0.990432234767505970f, 0.990326098813057330f, 0.990219380275280000f,
+  0.990112079216953770f,
+  0.990004195701200910f, 0.989895729791486660f, 0.989786681551618640f,
+  0.989677051045747210f,
+  0.989566838338365120f, 0.989456043494307710f, 0.989344666578752640f,
+  0.989232707657220050f,
+  0.989120166795572690f, 0.989007044060015270f, 0.988893339517095130f,
+  0.988779053233701520f,
+  0.988664185277066230f, 0.988548735714763200f, 0.988432704614708340f,
+  0.988316092045159690f,
+  0.988198898074717610f, 0.988081122772324070f, 0.987962766207263420f,
+  0.987843828449161740f,
+  0.987724309567986960f, 0.987604209634049160f, 0.987483528717999710f,
+  0.987362266890832400f,
+  0.987240424223882250f, 0.987118000788826280f, 0.986994996657682980f,
+  0.986871411902812470f,
+  0.986747246596916590f, 0.986622500813038480f, 0.986497174624562880f,
+  0.986371268105216030f,
+  0.986244781329065460f, 0.986117714370520090f, 0.985990067304330140f,
+  0.985861840205586980f,
+  0.985733033149723490f, 0.985603646212513400f, 0.985473679470071810f,
+  0.985343132998854790f,
+  0.985212006875659350f, 0.985080301177623800f, 0.984948015982227030f,
+  0.984815151367289140f,
+  0.984681707410970940f, 0.984547684191773960f, 0.984413081788540700f,
+  0.984277900280454370f,
+  0.984142139747038570f, 0.984005800268157870f, 0.983868881924017220f,
+  0.983731384795162090f,
+  0.983593308962478650f, 0.983454654507193270f, 0.983315421510872810f,
+  0.983175610055424420f,
+  0.983035220223095640f, 0.982894252096474070f, 0.982752705758487830f,
+  0.982610581292404750f,
+  0.982467878781833170f, 0.982324598310721280f, 0.982180739963357090f,
+  0.982036303824369020f,
+  0.981891289978725100f, 0.981745698511732990f, 0.981599529509040720f,
+  0.981452783056635520f,
+  0.981305459240844670f, 0.981157558148334830f, 0.981009079866112630f,
+  0.980860024481523870f,
+  0.980710392082253970f, 0.980560182756327840f, 0.980409396592109910f,
+  0.980258033678303550f,
+  0.980106094103951770f, 0.979953577958436740f, 0.979800485331479790f,
+  0.979646816313141210f,
+  0.979492570993820810f, 0.979337749464256780f, 0.979182351815526930f,
+  0.979026378139047580f,
+  0.978869828526574120f, 0.978712703070200420f, 0.978555001862359550f,
+  0.978396724995823090f,
+  0.978237872563701090f, 0.978078444659442380f, 0.977918441376834370f,
+  0.977757862810002760f,
+  0.977596709053411890f, 0.977434980201864260f, 0.977272676350500860f,
+  0.977109797594800880f,
+  0.976946344030581670f, 0.976782315753998650f, 0.976617712861545640f,
+  0.976452535450054060f,
+  0.976286783616693630f, 0.976120457458971910f, 0.975953557074734300f,
+  0.975786082562163930f,
+  0.975618034019781750f, 0.975449411546446380f, 0.975280215241354220f,
+  0.975110445204038890f,
+  0.974940101534371830f, 0.974769184332561770f, 0.974597693699155050f,
+  0.974425629735034990f,
+  0.974252992541422500f, 0.974079782219875680f, 0.973905998872289570f,
+  0.973731642600896400f,
+  0.973556713508265560f, 0.973381211697303290f, 0.973205137271252800f,
+  0.973028490333694210f,
+  0.972851270988544180f, 0.972673479340056430f, 0.972495115492821190f,
+  0.972316179551765300f,
+  0.972136671622152230f, 0.971956591809581720f, 0.971775940219990140f,
+  0.971594716959650160f,
+  0.971412922135170940f, 0.971230555853497380f, 0.971047618221911100f,
+  0.970864109348029470f,
+  0.970680029339806130f, 0.970495378305530560f, 0.970310156353828110f,
+  0.970124363593660280f,
+  0.969938000134323960f, 0.969751066085452140f, 0.969563561557013180f,
+  0.969375486659311280f,
+  0.969186841502985950f, 0.968997626199012420f, 0.968807840858700970f,
+  0.968617485593697540f,
+  0.968426560515983190f, 0.968235065737874320f, 0.968043001372022260f,
+  0.967850367531413620f,
+  0.967657164329369880f, 0.967463391879547550f, 0.967269050295937790f,
+  0.967074139692867040f,
+  0.966878660184995910f, 0.966682611887320080f, 0.966485994915169840f,
+  0.966288809384209690f,
+  0.966091055410438830f, 0.965892733110190860f, 0.965693842600133690f,
+  0.965494383997269500f,
+  0.965294357418934660f, 0.965093762982799590f, 0.964892600806868890f,
+  0.964690871009481030f,
+  0.964488573709308410f, 0.964285709025357480f, 0.964082277076968140f,
+  0.963878277983814200f,
+  0.963673711865903230f, 0.963468578843575950f, 0.963262879037507070f,
+  0.963056612568704340f,
+  0.962849779558509030f, 0.962642380128595710f, 0.962434414400972100f,
+  0.962225882497979020f,
+  0.962016784542290560f, 0.961807120656913540f, 0.961596890965187860f,
+  0.961386095590786250f,
+  0.961174734657714080f, 0.960962808290309780f, 0.960750316613243950f,
+  0.960537259751520050f,
+  0.960323637830473920f, 0.960109450975773940f, 0.959894699313420530f,
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+  0.370961089033802040f, 0.370248715579966360f, 0.369536124318350760f,
+  0.368823315668153960f,
+  0.368110290048703050f, 0.367397047879452820f, 0.366683589579984930f,
+  0.365969915570008910f,
+  0.365256026269360380f, 0.364541922098002180f, 0.363827603476023610f,
+  0.363113070823639530f,
+  0.362398324561191310f, 0.361683365109145950f, 0.360968192888095290f,
+  0.360252808318756830f,
+  0.359537211821973180f, 0.358821403818710860f, 0.358105384730061760f,
+  0.357389154977241000f,
+  0.356672714981588260f, 0.355956065164567010f, 0.355239205947763370f,
+  0.354522137752887430f,
+  0.353804861001772160f, 0.353087376116372530f, 0.352369683518766630f,
+  0.351651783631154680f,
+  0.350933676875858360f, 0.350215363675321740f, 0.349496844452109600f,
+  0.348778119628908420f,
+  0.348059189628525780f, 0.347340054873889190f, 0.346620715788047320f,
+  0.345901172794169100f,
+  0.345181426315542610f, 0.344461476775576480f, 0.343741324597798600f,
+  0.343020970205855540f,
+  0.342300414023513690f, 0.341579656474657210f, 0.340858697983289440f,
+  0.340137538973531880f,
+  0.339416179869623410f, 0.338694621095921190f, 0.337972863076899830f,
+  0.337250906237150650f,
+  0.336528751001382350f, 0.335806397794420560f, 0.335083847041206580f,
+  0.334361099166798900f,
+  0.333638154596370920f, 0.332915013755212650f, 0.332191677068729320f,
+  0.331468144962440920f,
+  0.330744417861982890f, 0.330020496193105530f, 0.329296380381672800f,
+  0.328572070853663690f,
+  0.327847568035170960f, 0.327122872352400510f, 0.326397984231672660f,
+  0.325672904099419900f,
+  0.324947632382188430f, 0.324222169506637130f, 0.323496515899536760f,
+  0.322770671987770710f,
+  0.322044638198334620f, 0.321318414958334910f, 0.320592002694990330f,
+  0.319865401835630610f,
+  0.319138612807695900f, 0.318411636038737960f, 0.317684471956418020f,
+  0.316957120988508150f,
+  0.316229583562890490f, 0.315501860107556040f, 0.314773951050606070f,
+  0.314045856820250820f,
+  0.313317577844809070f, 0.312589114552708660f, 0.311860467372486130f,
+  0.311131636732785270f,
+  0.310402623062358880f, 0.309673426790066490f, 0.308944048344875710f,
+  0.308214488155861220f,
+  0.307484746652204160f, 0.306754824263192780f, 0.306024721418221900f,
+  0.305294438546791720f,
+  0.304563976078509050f, 0.303833334443086470f, 0.303102514070341060f,
+  0.302371515390196130f,
+  0.301640338832678880f, 0.300908984827921890f, 0.300177453806162120f,
+  0.299445746197739950f,
+  0.298713862433100390f, 0.297981802942791920f, 0.297249568157465890f,
+  0.296517158507877410f,
+  0.295784574424884370f, 0.295051816339446720f, 0.294318884682627570f,
+  0.293585779885591310f,
+  0.292852502379604810f, 0.292119052596036540f, 0.291385430966355720f,
+  0.290651637922133220f,
+  0.289917673895040860f, 0.289183539316850310f, 0.288449234619434170f,
+  0.287714760234765280f,
+  0.286980116594915570f, 0.286245304132057120f, 0.285510323278461380f,
+  0.284775174466498300f,
+  0.284039858128637360f, 0.283304374697445790f, 0.282568724605589740f,
+  0.281832908285833460f,
+  0.281096926171038320f, 0.280360778694163810f, 0.279624466288266700f,
+  0.278887989386500280f,
+  0.278151348422115090f, 0.277414543828458200f, 0.276677576038972420f,
+  0.275940445487197320f,
+  0.275203152606767370f, 0.274465697831413220f, 0.273728081594960650f,
+  0.272990304331329980f,
+  0.272252366474536660f, 0.271514268458690810f, 0.270776010717996010f,
+  0.270037593686750510f,
+  0.269299017799346230f, 0.268560283490267890f, 0.267821391194094320f,
+  0.267082341345496350f,
+  0.266343134379238180f, 0.265603770730176440f, 0.264864250833259320f,
+  0.264124575123527490f,
+  0.263384744036113390f, 0.262644758006240100f, 0.261904617469222560f,
+  0.261164322860466590f,
+  0.260423874615468010f, 0.259683273169813930f, 0.258942518959180580f,
+  0.258201612419334870f,
+  0.257460553986133210f, 0.256719344095520720f, 0.255977983183532380f,
+  0.255236471686291820f,
+  0.254494810040010790f, 0.253752998680989940f, 0.253011038045617980f,
+  0.252268928570370810f,
+  0.251526670691812780f, 0.250784264846594550f, 0.250041711471454650f,
+  0.249299011003218300f,
+  0.248556163878796620f, 0.247813170535187620f, 0.247070031409475370f,
+  0.246326746938829060f,
+  0.245583317560504000f, 0.244839743711840750f, 0.244096025830264210f,
+  0.243352164353284880f,
+  0.242608159718496890f, 0.241864012363579210f, 0.241119722726294730f,
+  0.240375291244489500f,
+  0.239630718356093560f, 0.238886004499120170f, 0.238141150111664870f,
+  0.237396155631906550f,
+  0.236651021498106460f, 0.235905748148607370f, 0.235160336021834860f,
+  0.234414785556295250f,
+  0.233669097190576820f, 0.232923271363349120f, 0.232177308513361770f,
+  0.231431209079445730f,
+  0.230684973500512310f, 0.229938602215552260f, 0.229192095663636740f,
+  0.228445454283916550f,
+  0.227698678515621170f, 0.226951768798059980f, 0.226204725570620270f,
+  0.225457549272768540f,
+  0.224710240344049570f, 0.223962799224085520f, 0.223215226352576960f,
+  0.222467522169301990f,
+  0.221719687114115240f, 0.220971721626949060f, 0.220223626147812460f,
+  0.219475401116790340f,
+  0.218727046974044600f, 0.217978564159812290f, 0.217229953114406790f,
+  0.216481214278216900f,
+  0.215732348091705940f, 0.214983354995412820f, 0.214234235429951100f,
+  0.213484989836008080f,
+  0.212735618654345870f, 0.211986122325800410f, 0.211236501291280710f,
+  0.210486755991769890f,
+  0.209736886868323370f, 0.208986894362070070f, 0.208236778914211470f,
+  0.207486540966020700f,
+  0.206736180958843660f, 0.205985699334098050f, 0.205235096533272380f,
+  0.204484372997927180f,
+  0.203733529169694010f, 0.202982565490274460f, 0.202231482401441620f,
+  0.201480280345037820f,
+  0.200728959762976140f, 0.199977521097239290f, 0.199225964789878890f,
+  0.198474291283016360f,
+  0.197722501018842030f, 0.196970594439614370f, 0.196218571987660850f,
+  0.195466434105377090f,
+  0.194714181235225990f, 0.193961813819739010f, 0.193209332301514080f,
+  0.192456737123216840f,
+  0.191704028727579940f, 0.190951207557401860f, 0.190198274055548120f,
+  0.189445228664950340f,
+  0.188692071828605260f, 0.187938803989575850f, 0.187185425590990440f,
+  0.186431937076041640f,
+  0.185678338887987790f, 0.184924631470150870f, 0.184170815265917720f,
+  0.183416890718739230f,
+  0.182662858272129360f, 0.181908718369666160f, 0.181154471454990920f,
+  0.180400117971807270f,
+  0.179645658363882100f, 0.178891093075044830f, 0.178136422549186320f,
+  0.177381647230260200f,
+  0.176626767562280960f, 0.175871783989325040f, 0.175116696955530060f,
+  0.174361506905093830f,
+  0.173606214282275410f, 0.172850819531394200f, 0.172095323096829040f,
+  0.171339725423019260f,
+  0.170584026954463700f, 0.169828228135719880f, 0.169072329411405180f,
+  0.168316331226194910f,
+  0.167560234024823590f, 0.166804038252083870f, 0.166047744352825850f,
+  0.165291352771957970f,
+  0.164534863954446110f, 0.163778278345312690f, 0.163021596389637810f,
+  0.162264818532558110f,
+  0.161507945219266150f, 0.160750976895011390f, 0.159993914005098350f,
+  0.159236756994887850f,
+  0.158479506309796100f, 0.157722162395293690f, 0.156964725696906750f,
+  0.156207196660216040f,
+  0.155449575730855880f, 0.154691863354515400f, 0.153934059976937460f,
+  0.153176166043917870f,
+  0.152418182001306500f, 0.151660108295005400f, 0.150901945370970040f,
+  0.150143693675208330f,
+  0.149385353653779810f, 0.148626925752796540f, 0.147868410418422360f,
+  0.147109808096871850f,
+  0.146351119234411440f, 0.145592344277358450f, 0.144833483672080240f,
+  0.144074537864995330f,
+  0.143315507302571590f, 0.142556392431327340f, 0.141797193697830530f,
+  0.141037911548697770f,
+  0.140278546430595420f, 0.139519098790238600f, 0.138759569074390380f,
+  0.137999957729862760f,
+  0.137240265203515700f, 0.136480491942256310f, 0.135720638393040080f,
+  0.134960705002868830f,
+  0.134200692218792020f, 0.133440600487905820f, 0.132680430257352130f,
+  0.131920181974319760f,
+  0.131159856086043410f, 0.130399453039802740f, 0.129638973282923540f,
+  0.128878417262776660f,
+  0.128117785426777150f, 0.127357078222385570f, 0.126596296097105960f,
+  0.125835439498487020f,
+  0.125074508874121300f, 0.124313504671644300f, 0.123552427338735370f,
+  0.122791277323116900f,
+  0.122030055072553410f, 0.121268761034852550f, 0.120507395657864240f,
+  0.119745959389479630f,
+  0.118984452677632520f, 0.118222875970297250f, 0.117461229715489990f,
+  0.116699514361267840f,
+  0.115937730355727850f, 0.115175878147008180f, 0.114413958183287050f,
+  0.113651970912781920f,
+  0.112889916783750470f, 0.112127796244489750f, 0.111365609743335190f,
+  0.110603357728661910f,
+  0.109841040648882680f, 0.109078658952449240f, 0.108316213087851300f,
+  0.107553703503615710f,
+  0.106791130648307380f, 0.106028494970528530f, 0.105265796918917650f,
+  0.104503036942150550f,
+  0.103740215488939480f, 0.102977333008032250f, 0.102214389948213370f,
+  0.101451386758302160f,
+  0.100688323887153970f, 0.099925201783659226f, 0.099162020896742573f,
+  0.098398781675363881f,
+  0.097635484568517339f, 0.096872130025230527f, 0.096108718494565468f,
+  0.095345250425617742f,
+  0.094581726267515473f, 0.093818146469420494f, 0.093054511480527333f,
+  0.092290821750062355f,
+  0.091527077727284981f, 0.090763279861485704f, 0.089999428601987341f,
+  0.089235524398144139f,
+  0.088471567699340822f, 0.087707558954993645f, 0.086943498614549489f,
+  0.086179387127484922f,
+  0.085415224943307277f, 0.084651012511553700f, 0.083886750281790226f,
+  0.083122438703613077f,
+  0.082358078226646619f, 0.081593669300544638f, 0.080829212374989468f,
+  0.080064707899690932f,
+  0.079300156324387569f, 0.078535558098845590f, 0.077770913672857989f,
+  0.077006223496245585f,
+  0.076241488018856149f, 0.075476707690563416f, 0.074711882961268378f,
+  0.073947014280897269f,
+  0.073182102099402888f, 0.072417146866763538f, 0.071652149032982254f,
+  0.070887109048087787f,
+  0.070122027362133646f, 0.069356904425197236f, 0.068591740687380900f,
+  0.067826536598810966f,
+  0.067061292609636836f, 0.066296009170032283f, 0.065530686730193397f,
+  0.064765325740339871f,
+  0.063999926650714078f, 0.063234489911580136f, 0.062469015973224969f,
+  0.061703505285957416f,
+  0.060937958300107238f, 0.060172375466026218f, 0.059406757234087247f,
+  0.058641104054683348f,
+  0.057875416378229017f, 0.057109694655158132f, 0.056343939335925283f,
+  0.055578150871004817f,
+  0.054812329710889909f, 0.054046476306093640f, 0.053280591107148056f,
+  0.052514674564603257f,
+  0.051748727129028414f, 0.050982749251010900f, 0.050216741381155325f,
+  0.049450703970084824f,
+  0.048684637468439020f, 0.047918542326875327f, 0.047152418996068000f,
+  0.046386267926707213f,
+  0.045620089569500123f, 0.044853884375169933f, 0.044087652794454979f,
+  0.043321395278109784f,
+  0.042555112276904117f, 0.041788804241622082f, 0.041022471623063397f,
+  0.040256114872041358f,
+  0.039489734439384118f, 0.038723330775933762f, 0.037956904332545366f,
+  0.037190455560088091f,
+  0.036423984909444228f, 0.035657492831508264f, 0.034890979777187955f,
+  0.034124446197403423f,
+  0.033357892543086159f, 0.032591319265180385f, 0.031824726814640963f,
+  0.031058115642434700f,
+  0.030291486199539423f, 0.029524838936943035f, 0.028758174305644590f,
+  0.027991492756653365f,
+  0.027224794740987910f, 0.026458080709677145f, 0.025691351113759395f,
+  0.024924606404281485f,
+  0.024157847032300020f, 0.023391073448879338f, 0.022624286105092803f,
+  0.021857485452021874f,
+  0.021090671940755180f, 0.020323846022389572f, 0.019557008148029204f,
+  0.018790158768784596f,
+  0.018023298335773701f, 0.017256427300120978f, 0.016489546112956454f,
+  0.015722655225417017f,
+  0.014955755088644378f, 0.014188846153786343f, 0.013421928871995907f,
+  0.012655003694430301f,
+  0.011888071072252072f, 0.011121131456628141f, 0.010354185298728884f,
+  0.009587233049729183f,
+  0.008820275160807512f, 0.008053312083144991f, 0.007286344267926684f,
+  0.006519372166339549f,
+  0.005752396229573737f, 0.004985416908821652f, 0.004218434655277024f,
+  0.003451449920135975f,
+  0.002684463154596083f, 0.001917474809855460f, 0.001150485337113809f,
+  0.000383495187571497f
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
+    const float32_t Weights_8192[16384] = {
+  1.000000000000000000f, -0.000000000000000000f, 0.999999981616429330f,
+    -0.000191747597310703f,
+  0.999999926465717890f, -0.000383495187571396f, 0.999999834547867670f,
+    -0.000575242763732066f,
+  0.999999705862882230f, -0.000766990318742704f, 0.999999540410766110f,
+    -0.000958737845553301f,
+  0.999999338191525530f, -0.001150485337113849f, 0.999999099205167830f,
+    -0.001342232786374338f,
+  0.999998823451701880f, -0.001533980186284766f, 0.999998510931137790f,
+    -0.001725727529795126f,
+  0.999998161643486980f, -0.001917474809855419f, 0.999997775588762350f,
+    -0.002109222019415644f,
+  0.999997352766978210f, -0.002300969151425805f, 0.999996893178149880f,
+    -0.002492716198835908f,
+  0.999996396822294350f, -0.002684463154595962f, 0.999995863699429940f,
+    -0.002876210011655979f,
+  0.999995293809576190f, -0.003067956762965976f, 0.999994687152754080f,
+    -0.003259703401475973f,
+  0.999994043728985820f, -0.003451449920135994f, 0.999993363538295150f,
+    -0.003643196311896068f,
+  0.999992646580707190f, -0.003834942569706228f, 0.999991892856248010f,
+    -0.004026688686516512f,
+  0.999991102364945590f, -0.004218434655276963f, 0.999990275106828920f,
+    -0.004410180468937631f,
+  0.999989411081928400f, -0.004601926120448571f, 0.999988510290275690f,
+    -0.004793671602759841f,
+  0.999987572731904080f, -0.004985416908821511f, 0.999986598406848000f,
+    -0.005177162031583651f,
+  0.999985587315143200f, -0.005368906963996343f, 0.999984539456826970f,
+    -0.005560651699009674f,
+  0.999983454831937730f, -0.005752396229573736f, 0.999982333440515350f,
+    -0.005944140548638633f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999979980358237650f,
+    -0.006327628524071378f,
+  0.999978748667468830f, -0.006519372166339468f, 0.999977480210339940f,
+    -0.006711115568908879f,
+  0.999976174986897610f, -0.006902858724729756f, 0.999974832997189810f,
+    -0.007094601626752250f,
+  0.999973454241265940f, -0.007286344267926521f, 0.999972038719176730f,
+    -0.007478086641202744f,
+  0.999970586430974140f, -0.007669828739531097f, 0.999969097376711580f,
+    -0.007861570555861772f,
+  0.999967571556443780f, -0.008053312083144972f, 0.999966008970226920f,
+    -0.008245053314330906f,
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+  0.036807222941358991f, -0.999322384588349540f, 0.036615604598527057f,
+    -0.999329423913798420f,
+  0.036423984909444228f, -0.999336426496761240f, 0.036232363881155374f,
+    -0.999343392336980220f,
+  0.036040741520706299f, -0.999350321434199440f, 0.035849117835142184f,
+    -0.999357213788164000f,
+  0.035657492831508264f, -0.999364069398620550f, 0.035465866516850478f,
+    -0.999370888265317060f,
+  0.035274238898213947f, -0.999377670388002850f, 0.035082609982644702f,
+    -0.999384415766428560f,
+  0.034890979777187955f, -0.999391124400346050f, 0.034699348288889847f,
+    -0.999397796289508640f,
+  0.034507715524795889f, -0.999404431433671300f, 0.034316081491951658f,
+    -0.999411029832589780f,
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+    -0.999424116393725640f,
+  0.033741171851377642f, -0.999430604555461730f, 0.033549532813992221f,
+    -0.999437055970991530f,
+  0.033357892543086159f, -0.999443470640077770f, 0.033166251045705968f,
+    -0.999449848562484530f,
+  0.032974608328897315f, -0.999456189737977340f, 0.032782964399706793f,
+    -0.999462494166323160f,
+  0.032591319265180385f, -0.999468761847290050f, 0.032399672932364114f,
+    -0.999474992780647780f,
+  0.032208025408304704f, -0.999481186966166950f, 0.032016376700048046f,
+    -0.999487344403620080f,
+  0.031824726814640963f, -0.999493465092780590f, 0.031633075759129645f,
+    -0.999499549033423640f,
+  0.031441423540560343f, -0.999505596225325310f, 0.031249770165979990f,
+    -0.999511606668263440f,
+  0.031058115642434700f, -0.999517580362016990f, 0.030866459976971503f,
+    -0.999523517306366350f,
+  0.030674803176636581f, -0.999529417501093140f, 0.030483145248477058f,
+    -0.999535280945980540f,
+  0.030291486199539423f, -0.999541107640812940f, 0.030099826036870208f,
+    -0.999546897585375960f,
+  0.029908164767516655f, -0.999552650779456990f, 0.029716502398525156f,
+    -0.999558367222844300f,
+  0.029524838936943035f, -0.999564046915327740f, 0.029333174389816984f,
+    -0.999569689856698580f,
+  0.029141508764193740f, -0.999575296046749220f, 0.028949842067120746f,
+    -0.999580865485273700f,
+  0.028758174305644590f, -0.999586398172067070f, 0.028566505486812797f,
+    -0.999591894106925950f,
+  0.028374835617672258f, -0.999597353289648380f, 0.028183164705269902f,
+    -0.999602775720033530f,
+  0.027991492756653365f, -0.999608161397882110f, 0.027799819778869434f,
+    -0.999613510322995950f,
+  0.027608145778965820f, -0.999618822495178640f, 0.027416470763989606f,
+    -0.999624097914234570f,
+  0.027224794740987910f, -0.999629336579970110f, 0.027033117717008563f,
+    -0.999634538492192300f,
+  0.026841439699098527f, -0.999639703650710200f, 0.026649760694305708f,
+    -0.999644832055333610f,
+  0.026458080709677145f, -0.999649923705874240f, 0.026266399752260809f,
+    -0.999654978602144690f,
+  0.026074717829104040f, -0.999659996743959220f, 0.025883034947254208f,
+    -0.999664978131133310f,
+  0.025691351113759395f, -0.999669922763483760f, 0.025499666335666818f,
+    -0.999674830640828740f,
+  0.025307980620024630f, -0.999679701762987930f, 0.025116293973880335f,
+    -0.999684536129782140f,
+  0.024924606404281485f, -0.999689333741033640f, 0.024732917918276334f,
+    -0.999694094596566000f,
+  0.024541228522912264f, -0.999698818696204250f, 0.024349538225237600f,
+    -0.999703506039774650f,
+  0.024157847032300020f, -0.999708156627104880f, 0.023966154951147241f,
+    -0.999712770458023870f,
+  0.023774461988827676f, -0.999717347532362190f, 0.023582768152388880f,
+    -0.999721887849951310f,
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+    -0.999730858214216030f,
+  0.023007681468839410f, -0.999735288260561680f, 0.022815984206405477f,
+    -0.999739681549498660f,
+  0.022624286105092803f, -0.999744038080865430f, 0.022432587171950024f,
+    -0.999748357854501780f,
+  0.022240887414024919f, -0.999752640870248840f, 0.022049186838366180f,
+    -0.999756887127949080f,
+  0.021857485452021874f, -0.999761096627446610f, 0.021665783262040089f,
+    -0.999765269368586450f,
+  0.021474080275469605f, -0.999769405351215280f, 0.021282376499358355f,
+    -0.999773504575180990f,
+  0.021090671940755180f, -0.999777567040332940f, 0.020898966606708289f,
+    -0.999781592746521670f,
+  0.020707260504265912f, -0.999785581693599210f, 0.020515553640476986f,
+    -0.999789533881418780f,
+  0.020323846022389572f, -0.999793449309835270f, 0.020132137657052664f,
+    -0.999797327978704690f,
+  0.019940428551514598f, -0.999801169887884260f, 0.019748718712823757f,
+    -0.999804975037232870f,
+  0.019557008148029204f, -0.999808743426610520f, 0.019365296864179146f,
+    -0.999812475055878780f,
+  0.019173584868322699f, -0.999816169924900410f, 0.018981872167508348f,
+    -0.999819828033539420f,
+  0.018790158768784596f, -0.999823449381661570f, 0.018598444679200642f,
+    -0.999827033969133420f,
+  0.018406729905804820f, -0.999830581795823400f, 0.018215014455646376f,
+    -0.999834092861600960f,
+  0.018023298335773701f, -0.999837567166337090f, 0.017831581553236088f,
+    -0.999841004709904000f,
+  0.017639864115082195f, -0.999844405492175240f, 0.017448146028360704f,
+    -0.999847769513025900f,
+  0.017256427300120978f, -0.999851096772332190f, 0.017064707937411529f,
+    -0.999854387269971890f,
+  0.016872987947281773f, -0.999857641005823860f, 0.016681267336780482f,
+    -0.999860857979768540f,
+  0.016489546112956454f, -0.999864038191687680f, 0.016297824282859176f,
+    -0.999867181641464380f,
+  0.016106101853537263f, -0.999870288328982950f, 0.015914378832040249f,
+    -0.999873358254129260f,
+  0.015722655225417017f, -0.999876391416790410f, 0.015530931040716478f,
+    -0.999879387816854930f,
+  0.015339206284988220f, -0.999882347454212560f, 0.015147480965280975f,
+    -0.999885270328754520f,
+  0.014955755088644378f, -0.999888156440373320f, 0.014764028662127416f,
+    -0.999891005788962950f,
+  0.014572301692779104f, -0.999893818374418490f, 0.014380574187649138f,
+    -0.999896594196636680f,
+  0.014188846153786343f, -0.999899333255515390f, 0.013997117598240459f,
+    -0.999902035550953920f,
+  0.013805388528060349f, -0.999904701082852900f, 0.013613658950295789f,
+    -0.999907329851114300f,
+  0.013421928871995907f, -0.999909921855641540f, 0.013230198300209845f,
+    -0.999912477096339240f,
+  0.013038467241987433f, -0.999914995573113470f, 0.012846735704377631f,
+    -0.999917477285871770f,
+  0.012655003694430301f, -0.999919922234522750f, 0.012463271219194662f,
+    -0.999922330418976490f,
+  0.012271538285719944f, -0.999924701839144500f, 0.012079804901056066f,
+    -0.999927036494939640f,
+  0.011888071072252072f, -0.999929334386276070f, 0.011696336806357907f,
+    -0.999931595513069200f,
+  0.011504602110422875f, -0.999933819875236000f, 0.011312866991496287f,
+    -0.999936007472694620f,
+  0.011121131456628141f, -0.999938158305364590f, 0.010929395512867561f,
+    -0.999940272373166960f,
+  0.010737659167264572f, -0.999942349676023910f, 0.010545922426868548f,
+    -0.999944390213859060f,
+  0.010354185298728884f, -0.999946393986597460f, 0.010162447789895645f,
+    -0.999948360994165400f,
+  0.009970709907418029f, -0.999950291236490480f, 0.009778971658346134f,
+    -0.999952184713501780f,
+  0.009587233049729183f, -0.999954041425129780f, 0.009395494088617302f,
+    -0.999955861371306100f,
+  0.009203754782059960f, -0.999957644551963900f, 0.009012015137106642f,
+    -0.999959390967037450f,
+  0.008820275160807512f, -0.999961100616462820f, 0.008628534860211857f,
+    -0.999962773500176930f,
+  0.008436794242369860f, -0.999964409618118280f, 0.008245053314331058f,
+    -0.999966008970226920f,
+  0.008053312083144991f, -0.999967571556443780f, 0.007861570555861883f,
+    -0.999969097376711580f,
+  0.007669828739531077f, -0.999970586430974140f, 0.007478086641202815f,
+    -0.999972038719176730f,
+  0.007286344267926684f, -0.999973454241265940f, 0.007094601626752279f,
+    -0.999974832997189810f,
+  0.006902858724729877f, -0.999976174986897610f, 0.006711115568908869f,
+    -0.999977480210339940f,
+  0.006519372166339549f, -0.999978748667468830f, 0.006327628524071549f,
+    -0.999979980358237650f,
+  0.006135884649154515f, -0.999981175282601110f, 0.005944140548638765f,
+    -0.999982333440515350f,
+  0.005752396229573737f, -0.999983454831937730f, 0.005560651699009764f,
+    -0.999984539456826970f,
+  0.005368906963996303f, -0.999985587315143200f, 0.005177162031583702f,
+    -0.999986598406848000f,
+  0.004985416908821652f, -0.999987572731904080f, 0.004793671602759852f,
+    -0.999988510290275690f,
+  0.004601926120448672f, -0.999989411081928400f, 0.004410180468937601f,
+    -0.999990275106828920f,
+  0.004218434655277024f, -0.999991102364945590f, 0.004026688686516664f,
+    -0.999991892856248010f,
+  0.003834942569706248f, -0.999992646580707190f, 0.003643196311896179f,
+    -0.999993363538295150f,
+  0.003451449920135975f, -0.999994043728985820f, 0.003259703401476044f,
+    -0.999994687152754080f,
+  0.003067956762966138f, -0.999995293809576190f, 0.002876210011656010f,
+    -0.999995863699429940f,
+  0.002684463154596083f, -0.999996396822294350f, 0.002492716198835898f,
+    -0.999996893178149880f,
+  0.002300969151425887f, -0.999997352766978210f, 0.002109222019415816f,
+    -0.999997775588762350f,
+  0.001917474809855460f, -0.999998161643486980f, 0.001725727529795258f,
+    -0.999998510931137790f,
+  0.001533980186284766f, -0.999998823451701880f, 0.001342232786374430f,
+    -0.999999099205167830f,
+  0.001150485337113809f, -0.999999338191525530f, 0.000958737845553352f,
+    -0.999999540410766110f,
+  0.000766990318742846f, -0.999999705862882230f, 0.000575242763732077f,
+    -0.999999834547867670f,
+  0.000383495187571497f, -0.999999926465717890f, 0.000191747597310674f,
+    -0.999999981616429330f
+};
+
+    const float32_t cos_factors_8192[8192] = {
+  1.999999990808214700f, 1.999999917273932200f, 1.999999770205369800f,
+    1.999999549602533100f,
+  1.999999255465430200f, 1.999998887794072000f, 1.999998446588471700f,
+    1.999997931848645600f,
+  1.999997343574612800f, 1.999996681766395000f, 1.999995946424016200f,
+    1.999995137547503600f,
+  1.999994255136887000f, 1.999993299192198700f, 1.999992269713474200f,
+    1.999991166700750800f,
+  1.999989990154069600f, 1.999988740073473500f, 1.999987416459008600f,
+    1.999986019310723500f,
+  1.999984548628669600f, 1.999983004412901000f, 1.999981386663474400f,
+    1.999979695380449400f,
+  1.999977930563888100f, 1.999976092213855400f, 1.999974180330418700f,
+    1.999972194913648900f,
+  1.999970135963618400f, 1.999968003480403000f, 1.999965797464081200f,
+    1.999963517914734100f,
+  1.999961164832445800f, 1.999958738217302300f, 1.999956238069392900f,
+    1.999953664388809800f,
+  1.999951017175647600f, 1.999948296430003500f, 1.999945502151977600f,
+    1.999942634341672600f,
+  1.999939692999193900f, 1.999936678124649700f, 1.999933589718150700f,
+    1.999930427779810900f,
+  1.999927192309745900f, 1.999923883308075200f, 1.999920500774920300f,
+    1.999917044710405500f,
+  1.999913515114657900f, 1.999909911987807200f, 1.999906235329986100f,
+    1.999902485141329400f,
+  1.999898661421975400f, 1.999894764172064600f, 1.999890793391740000f,
+    1.999886749081147800f,
+  1.999882631240436700f, 1.999878439869758200f, 1.999874174969266300f,
+    1.999869836539117700f,
+  1.999865424579472000f, 1.999860939090491600f, 1.999856380072341000f,
+    1.999851747525188200f,
+  1.999847041449203300f, 1.999842261844559700f, 1.999837408711432600f,
+    1.999832482050000900f,
+  1.999827481860445300f, 1.999822408142949900f, 1.999817260897701400f,
+    1.999812040124888700f,
+  1.999806745824704000f, 1.999801377997341800f, 1.999795936642999600f,
+    1.999790421761877400f,
+  1.999784833354177900f, 1.999779171420106700f, 1.999773435959872000f,
+    1.999767626973684400f,
+  1.999761744461757700f, 1.999755788424308200f, 1.999749758861554900f,
+    1.999743655773719400f,
+  1.999737479161026100f, 1.999731229023702200f, 1.999724905361977200f,
+    1.999718508176084000f,
+  1.999712037466257600f, 1.999705493232735800f, 1.999698875475759600f,
+    1.999692184195571900f,
+  1.999685419392419000f, 1.999678581066549400f, 1.999671669218214600f,
+    1.999664683847668800f,
+  1.999657624955168700f, 1.999650492540973900f, 1.999643286605346800f,
+    1.999636007148552400f,
+  1.999628654170857900f, 1.999621227672533800f, 1.999613727653853500f,
+    1.999606154115092500f,
+  1.999598507056529000f, 1.999590786478444600f, 1.999582992381123000f,
+    1.999575124764850800f,
+  1.999567183629917100f, 1.999559168976613900f, 1.999551080805236100f,
+    1.999542919116081000f,
+  1.999534683909448600f, 1.999526375185641800f, 1.999517992944965800f,
+    1.999509537187729200f,
+  1.999501007914242600f, 1.999492405124819700f, 1.999483728819776900f,
+    1.999474978999432800f,
+  1.999466155664109600f, 1.999457258814131500f, 1.999448288449825500f,
+    1.999439244571521700f,
+  1.999430127179552500f, 1.999420936274252800f, 1.999411671855960900f,
+    1.999402333925017300f,
+  1.999392922481765500f, 1.999383437526551300f, 1.999373879059723500f,
+    1.999364247081633500f,
+  1.999354541592635500f, 1.999344762593086500f, 1.999334910083345700f,
+    1.999324984063775700f,
+  1.999314984534741100f, 1.999304911496609700f, 1.999294764949752100f,
+    1.999284544894541100f,
+  1.999274251331352400f, 1.999263884260564600f, 1.999253443682558900f,
+    1.999242929597719200f,
+  1.999232342006432000f, 1.999221680909086400f, 1.999210946306074500f,
+    1.999200138197791100f,
+  1.999189256584633600f, 1.999178301467001900f, 1.999167272845298900f,
+    1.999156170719930100f,
+  1.999144995091303600f, 1.999133745959830600f, 1.999122423325924200f,
+    1.999111027190001000f,
+  1.999099557552479900f, 1.999088014413782800f, 1.999076397774334000f,
+    1.999064707634560700f,
+  1.999052943994892300f, 1.999041106855761900f, 1.999029196217604100f,
+    1.999017212080857400f,
+  1.999005154445962200f, 1.998993023313361700f, 1.998980818683502100f,
+    1.998968540556831800f,
+  1.998956188933802800f, 1.998943763814868800f, 1.998931265200486900f,
+    1.998918693091116200f,
+  1.998906047487219600f, 1.998893328389261400f, 1.998880535797709700f,
+    1.998867669713034500f,
+  1.998854730135709400f, 1.998841717066209400f, 1.998828630505013400f,
+    1.998815470452602400f,
+  1.998802236909460500f, 1.998788929876074100f, 1.998775549352932400f,
+    1.998762095340527400f,
+  1.998748567839354000f, 1.998734966849909000f, 1.998721292372693100f,
+    1.998707544408208700f,
+  1.998693722956961500f, 1.998679828019459300f, 1.998665859596213500f,
+    1.998651817687737300f,
+  1.998637702294547000f, 1.998623513417161700f, 1.998609251056103100f,
+    1.998594915211895600f,
+  1.998580505885066100f, 1.998566023076144600f, 1.998551466785663400f,
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+  0.111730650802029900f, 0.111347752452754000f, 0.110964850009539970f,
+    0.110581943486465610f,
+  0.110199032897608850f, 0.109816118257049110f, 0.109433199578864170f,
+    0.109050276877133770f,
+  0.108667350165936400f, 0.108284419459350770f, 0.107901484771457020f,
+    0.107518546116333660f,
+  0.107135603508061170f, 0.106752656960718350f, 0.106369706488385940f,
+    0.105986752105143480f,
+  0.105603793825070680f, 0.105220831662248700f, 0.104837865630757090f,
+    0.104454895744677270f,
+  0.104071922018089540f, 0.103688944465074300f, 0.103305963099713400f,
+    0.102922977936087120f,
+  0.102539988988277600f, 0.102156996270365800f, 0.101773999796432830f,
+    0.101390999580561250f,
+  0.101007995636832020f, 0.100624987979327970f, 0.100241976622130760f,
+    0.099858961579322170f,
+  0.099475942864985456f, 0.099092920493202258f, 0.098709894478056073f,
+    0.098326864833628791f,
+  0.097943831574004214f, 0.097560794713264939f, 0.097177754265493674f,
+    0.096794710244774623f,
+  0.096411662665190329f, 0.096028611540825232f, 0.095645556885762609f,
+    0.095262498714085819f,
+  0.094879437039879722f, 0.094496371877227495f, 0.094113303240214247f,
+    0.093730231142923864f,
+  0.093347155599440373f, 0.092964076623849271f, 0.092580994230234359f,
+    0.092197908432681386f,
+  0.091814819245274432f, 0.091431726682099479f, 0.091048630757241303f,
+    0.090665531484784803f,
+  0.090282428878816323f, 0.089899322953420582f, 0.089516213722684160f,
+    0.089133101200692441f,
+  0.088749985401530951f, 0.088366866339286629f, 0.087983744028044805f,
+    0.087600618481892656f,
+  0.087217489714916191f, 0.086834357741201490f, 0.086451222574836131f,
+    0.086068084229906014f,
+  0.085684942720498897f, 0.085301798060701386f, 0.084918650264600160f,
+    0.084535499346283349f,
+  0.084152345319837438f, 0.083769188199350780f, 0.083386027998910095f,
+    0.083002864732603973f,
+  0.082619698414519799f, 0.082236529058745025f, 0.081853356679368619f,
+    0.081470181290477811f,
+  0.081087002906161790f, 0.080703821540508452f, 0.080320637207605849f,
+    0.079937449921543474f,
+  0.079554259696409127f, 0.079171066546292510f, 0.078787870485282088f,
+    0.078404671527466441f,
+  0.078021469686935602f, 0.077638264977777913f, 0.077255057414083589f,
+    0.076871847009941652f,
+  0.076488633779441206f, 0.076105417736672773f, 0.075722198895725248f,
+    0.075338977270689375f,
+  0.074955752875654230f, 0.074572525724710764f, 0.074189295831948693f,
+    0.073806063211457842f,
+  0.073422827877329483f, 0.073039589843653177f, 0.072656349124520389f,
+    0.072273105734021334f,
+  0.071889859686246352f, 0.071506610995287156f, 0.071123359675233852f,
+    0.070740105740178361f,
+  0.070356849204211397f, 0.069973590081423773f, 0.069590328385907715f,
+    0.069207064131753759f,
+  0.068823797333054326f, 0.068440528003900616f, 0.068057256158383886f,
+    0.067673981810596848f,
+  0.067290704974630494f, 0.066907425664577733f, 0.066524143894529736f,
+    0.066140859678579578f,
+  0.065757573030819083f, 0.065374283965340146f, 0.064990992496236119f,
+    0.064607698637598646f,
+  0.064224402403521202f, 0.063841103808096086f, 0.063457802865415636f,
+    0.063074499589573618f,
+  0.062691193994662109f, 0.062307886094775049f, 0.061924575904005130f,
+    0.061541263436445129f,
+  0.061157948706189229f, 0.060774631727329942f, 0.060391312513961619f,
+    0.060007991080177375f,
+  0.059624667440070382f, 0.059241341607735261f, 0.058858013597264912f,
+    0.058474683422754095f,
+  0.058091351098295878f, 0.057708016637985186f, 0.057324680055915692f,
+    0.056941341366181127f,
+  0.056558000582876661f, 0.056174657720095743f, 0.055791312791933681f,
+    0.055407965812484541f,
+  0.055024616795842439f, 0.054641265756102911f, 0.054257912707359794f,
+    0.053874557663708772f,
+  0.053491200639244271f, 0.053107841648060788f, 0.052724480704254229f,
+    0.052341117821918783f,
+  0.051957753015150501f, 0.051574386298044173f, 0.051191017684694640f,
+    0.050807647189198162f,
+  0.050424274825649297f, 0.050040900608144430f, 0.049657524550778251f,
+    0.049274146667647289f,
+  0.048890766972846805f, 0.048507385480472134f, 0.048124002204620014f,
+    0.047740617159385448f,
+  0.047357230358865306f, 0.046973841817155179f, 0.046590451548350717f,
+    0.046207059566548990f,
+  0.045823665885845313f, 0.045440270520336883f, 0.045056873484119603f,
+    0.044673474791289434f,
+  0.044290074455943754f, 0.043906672492178188f, 0.043523268914090238f,
+    0.043139863735776100f,
+  0.042756456971332048f, 0.042373048634855741f, 0.041989638740443119f,
+    0.041606227302191955f,
+  0.041222814334198304f, 0.040839399850560058f, 0.040455983865373815f,
+    0.040072566392736257f,
+  0.039689147446745419f, 0.039305727041497644f, 0.038922305191091085f,
+    0.038538881909622631f,
+  0.038155457211189216f, 0.037772031109889144f, 0.037388603619819022f,
+    0.037005174755077273f,
+  0.036621744529761024f, 0.036238312957967478f, 0.035854880053795196f,
+    0.035471445831341021f,
+  0.035088010304703626f, 0.034704573487980395f, 0.034321135395268765f,
+    0.033937696040667535f,
+  0.033554255438273790f, 0.033170813602186440f, 0.032787370546502645f,
+    0.032403926285321405f,
+  0.032020480832740429f, 0.031637034202857461f, 0.031253586409771626f,
+    0.030870137467580314f,
+  0.030486687390382738f, 0.030103236192276818f, 0.029719783887360508f,
+    0.029336330489733147f,
+  0.028952876013492331f, 0.028569420472737472f, 0.028185963881566689f,
+    0.027802506254078142f,
+  0.027419047604371360f, 0.027035587946544135f, 0.026652127294696067f,
+    0.026268665662925468f,
+  0.025885203065330677f, 0.025501739516011413f, 0.025118275029065638f,
+    0.024734809618593138f,
+  0.024351343298691951f, 0.023967876083461924f, 0.023584407987001611f,
+    0.023200939023409587f,
+  0.022817469206785804f, 0.022433998551228459f, 0.022050527070837558f,
+    0.021667054779711814f,
+  0.021283581691949955f, 0.020900107821652084f, 0.020516633182916549f,
+    0.020133157789843505f,
+  0.019749681656531803f, 0.019366204797080316f, 0.018982727225589285f,
+    0.018599248956157190f,
+  0.018215770002884327f, 0.017832290379869671f, 0.017448810101212228f,
+    0.017065329181012358f,
+  0.016681847633368677f, 0.016298365472381587f, 0.015914882712149747f,
+    0.015531399366773606f,
+  0.015147915450352307f, 0.014764430976985016f, 0.014380945960772247f,
+    0.013997460415812761f,
+  0.013613974356207112f, 0.013230487796054543f, 0.012847000749454314f,
+    0.012463513230507034f,
+  0.012080025253311559f, 0.011696536831968529f, 0.011313047980577277f,
+    0.010929558713237145f,
+  0.010546069044048827f, 0.010162578987111254f, 0.009779088556525145f,
+    0.009395597766389905f,
+  0.009012106630804949f, 0.008628615163871038f, 0.008245123379687167f,
+    0.007861631292354124f,
+  0.007478138915970929f, 0.007094646264638386f, 0.006711153352455981f,
+    0.006327660193523208f,
+  0.005944166801940901f, 0.005560673191808128f, 0.005177179377225743f,
+    0.004793685372293270f,
+  0.004410191191110246f, 0.004026696847777542f, 0.003643202356394263f,
+    0.003259707731061291f,
+  0.002876212985878184f, 0.002492718134944503f, 0.002109223192361147f,
+    0.001725728172227238f,
+  0.001342233088643682f, 0.000958737955710053f, 0.000575242787525925f,
+    0.000191747598192208f
+};
+  #endif
+
+/**
+  @brief  Weights Table
+ */
+
+/**
+  @par
+  Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))

+  @par
+  C command to generate the table
+  
+  for(i = 0; i< N; i++)
+  { 
+    weights[(2*i)]   =  cos(i*c);
+    weights[(2*i)+1] = -sin(i*c);
+  } 

+  @par
+  where N is the Number of weights to be calculated and c is pi/(2*N)
+  @par
+  Converted the output to q15 format by multiplying with 2^31 and saturated if required.
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is 2*N.
+ */
+
+/**
+  @par
+  cosFactor tables are generated using the formula : 
 cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) 

+  @par
+  C command to generate the table
+  
+  for (i = 0; i< N; i++)
+  {
+    cos_factors[i] = 2 * cos((2*i+1)*c/2);
+  } 

+  @par
+  where N is the number of factors to generate and c is pi/(2*N)
+  @par
+  Then converted to q15 format by multiplying with 2^31 and saturated if required.
+*/
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
+    const q15_t __ALIGNED(4) WeightsQ15_128[256] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7fe9, (q15_t)0xfb4a,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f87, (q15_t)0xf505,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7ed5, (q15_t)0xeec7,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7dd6, (q15_t)0xe893,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7c89, (q15_t)0xe26d,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7aef, (q15_t)0xdc5a,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7909, (q15_t)0xd65d,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x76d9, (q15_t)0xd079,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x745f, (q15_t)0xcab3,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x719e, (q15_t)0xc50e,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6e96, (q15_t)0xbf8d,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6b4a, (q15_t)0xba33,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x67bd, (q15_t)0xb505,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x63ef, (q15_t)0xb005,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x5fe3, (q15_t)0xab36,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5b9d, (q15_t)0xa69c,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x571d, (q15_t)0xa239,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5269, (q15_t)0x9e0f,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4d81, (q15_t)0x9a23,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4869, (q15_t)0x9674,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4325, (q15_t)0x9307,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3db8, (q15_t)0x8fdd,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3824, (q15_t)0x8cf9,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x326e, (q15_t)0x8a5b,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2c98, (q15_t)0x8806,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x26a8, (q15_t)0x85fb,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x209f, (q15_t)0x843b,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1a82, (q15_t)0x82c7,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x1455, (q15_t)0x81a1,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1139, (q15_t)0x812b, (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xe1b, (q15_t)0x80c8,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xafb, (q15_t)0x8079, (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x7d9, (q15_t)0x803e,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x324, (q15_t)0x800a, (q15_t)0x192, (q15_t)0x8003
+};
+    const q15_t __ALIGNED(4) cos_factorsQ15_128[128] = {
+  (q15_t)0x7fff, (q15_t)0x7ffa, (q15_t)0x7ff0, (q15_t)0x7fe1, (q15_t)0x7fce, (q15_t)0x7fb5, (q15_t)0x7f97, (q15_t)0x7f75,
+  (q15_t)0x7f4d, (q15_t)0x7f21, (q15_t)0x7ef0, (q15_t)0x7eba, (q15_t)0x7e7f, (q15_t)0x7e3f, (q15_t)0x7dfa, (q15_t)0x7db0,
+  (q15_t)0x7d62, (q15_t)0x7d0f, (q15_t)0x7cb7, (q15_t)0x7c5a, (q15_t)0x7bf8, (q15_t)0x7b92, (q15_t)0x7b26, (q15_t)0x7ab6,
+  (q15_t)0x7a42, (q15_t)0x79c8, (q15_t)0x794a, (q15_t)0x78c7, (q15_t)0x7840, (q15_t)0x77b4, (q15_t)0x7723, (q15_t)0x768e,
+  (q15_t)0x75f4, (q15_t)0x7555, (q15_t)0x74b2, (q15_t)0x740b, (q15_t)0x735f, (q15_t)0x72af, (q15_t)0x71fa, (q15_t)0x7141,
+  (q15_t)0x7083, (q15_t)0x6fc1, (q15_t)0x6efb, (q15_t)0x6e30, (q15_t)0x6d62, (q15_t)0x6c8f, (q15_t)0x6bb8, (q15_t)0x6adc,
+  (q15_t)0x69fd, (q15_t)0x6919, (q15_t)0x6832, (q15_t)0x6746, (q15_t)0x6657, (q15_t)0x6563, (q15_t)0x646c, (q15_t)0x6371,
+  (q15_t)0x6271, (q15_t)0x616f, (q15_t)0x6068, (q15_t)0x5f5e, (q15_t)0x5e50, (q15_t)0x5d3e, (q15_t)0x5c29, (q15_t)0x5b10,
+  (q15_t)0x59f3, (q15_t)0x58d4, (q15_t)0x57b0, (q15_t)0x568a, (q15_t)0x5560, (q15_t)0x5433, (q15_t)0x5302, (q15_t)0x51ce,
+  (q15_t)0x5097, (q15_t)0x4f5e, (q15_t)0x4e21, (q15_t)0x4ce1, (q15_t)0x4b9e, (q15_t)0x4a58, (q15_t)0x490f, (q15_t)0x47c3,
+  (q15_t)0x4675, (q15_t)0x4524, (q15_t)0x43d0, (q15_t)0x427a, (q15_t)0x4121, (q15_t)0x3fc5, (q15_t)0x3e68, (q15_t)0x3d07,
+  (q15_t)0x3ba5, (q15_t)0x3a40, (q15_t)0x38d8, (q15_t)0x376f, (q15_t)0x3604, (q15_t)0x3496, (q15_t)0x3326, (q15_t)0x31b5,
+  (q15_t)0x3041, (q15_t)0x2ecc, (q15_t)0x2d55, (q15_t)0x2bdc, (q15_t)0x2a61, (q15_t)0x28e5, (q15_t)0x2767, (q15_t)0x25e8,
+  (q15_t)0x2467, (q15_t)0x22e5, (q15_t)0x2161, (q15_t)0x1fdc, (q15_t)0x1e56, (q15_t)0x1ccf, (q15_t)0x1b47, (q15_t)0x19bd,
+  (q15_t)0x1833, (q15_t)0x16a8, (q15_t)0x151b, (q15_t)0x138e, (q15_t)0x1201, (q15_t)0x1072, (q15_t)0xee3, (q15_t)0xd53,
+  (q15_t)0xbc3, (q15_t)0xa33, (q15_t)0x8a2, (q15_t)0x710, (q15_t)0x57f, (q15_t)0x3ed, (q15_t)0x25b, (q15_t)0xc9
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
+    const q15_t __ALIGNED(4) WeightsQ15_512[1024] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7ffe, (q15_t)0xfed3,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff8, (q15_t)0xfd41,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fed, (q15_t)0xfbaf,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fdd, (q15_t)0xfa1d,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fc8, (q15_t)0xf88b,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fae, (q15_t)0xf6fa,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f8f, (q15_t)0xf569,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f6b, (q15_t)0xf3d9,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f43, (q15_t)0xf249,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f15, (q15_t)0xf0b9,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7ee3, (q15_t)0xef2a,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eab, (q15_t)0xed9c,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e6f, (q15_t)0xec0e,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e2e, (q15_t)0xea81,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7de8, (q15_t)0xe8f6,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7d9d, (q15_t)0xe76a,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d4e, (q15_t)0xe5e0,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7cf9, (q15_t)0xe457,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7ca0, (q15_t)0xe2cf,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c42, (q15_t)0xe148,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bdf, (q15_t)0xdfc2,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b77, (q15_t)0xde3e,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b0b, (q15_t)0xdcbb,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7a9a, (q15_t)0xdb39,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a24, (q15_t)0xd9b8,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79a9, (q15_t)0xd839,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x792a, (q15_t)0xd6bc,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78a6, (q15_t)0xd540,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x781d, (q15_t)0xd3c6,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x7790, (q15_t)0xd24d,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x76fe, (q15_t)0xd0d7,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7668, (q15_t)0xcf62,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75cc, (q15_t)0xcdef,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x752d, (q15_t)0xcc7e,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x7489, (q15_t)0xcb0e,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x73e0, (q15_t)0xc9a1,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7333, (q15_t)0xc836,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x7282, (q15_t)0xc6ce,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71cc, (q15_t)0xc567,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7112, (q15_t)0xc403,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7053, (q15_t)0xc2a0,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6f90, (q15_t)0xc141,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ec9, (q15_t)0xbfe3,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6dfd, (q15_t)0xbe89,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d2d, (q15_t)0xbd30,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c59, (q15_t)0xbbdb,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6b81, (q15_t)0xba88,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6aa5, (q15_t)0xb937,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69c4, (q15_t)0xb7ea,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x68e0, (q15_t)0xb69f,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x67f7, (q15_t)0xb557,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x670b, (q15_t)0xb411,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x661a, (q15_t)0xb2cf,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6526, (q15_t)0xb190,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x642d, (q15_t)0xb054,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6331, (q15_t)0xaf1b,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6231, (q15_t)0xade4,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x612d, (q15_t)0xacb2,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6026, (q15_t)0xab82,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f1a, (q15_t)0xaa55,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e0b, (q15_t)0xa92c,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5cf9, (q15_t)0xa807,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5be3, (q15_t)0xa6e4,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5ac9, (q15_t)0xa5c5,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ac, (q15_t)0xa4aa,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x588b, (q15_t)0xa392,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x5767, (q15_t)0xa27d,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5640, (q15_t)0xa16d,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x5515, (q15_t)0xa060,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x53e7, (q15_t)0x9f56,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52b5, (q15_t)0x9e50,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x5181, (q15_t)0x9d4e,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5049, (q15_t)0x9c50,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f0f, (q15_t)0x9b56,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4dd1, (q15_t)0x9a60,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4c90, (q15_t)0x996d,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b4c, (q15_t)0x987e,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a06, (q15_t)0x9794,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48bc, (q15_t)0x96ad,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x4770, (q15_t)0x95cb,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4621, (q15_t)0x94ed,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x44cf, (q15_t)0x9412,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x437b, (q15_t)0x933c,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4224, (q15_t)0x926a,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x40ca, (q15_t)0x919d,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3f6e, (q15_t)0x90d3,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e10, (q15_t)0x900e,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3caf, (q15_t)0x8f4d,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b4c, (q15_t)0x8e91,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x39e6, (q15_t)0x8dd9,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x387e, (q15_t)0x8d25,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3714, (q15_t)0x8c76,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35a8, (q15_t)0x8bcb,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x343a, (q15_t)0x8b25,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x32ca, (q15_t)0x8a83,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x3158, (q15_t)0x89e5,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x2fe4, (q15_t)0x894d,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2e6e, (q15_t)0x88b9,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2cf7, (q15_t)0x8829,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2b7d, (q15_t)0x879e,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a02, (q15_t)0x8718,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x2886, (q15_t)0x8696,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2707, (q15_t)0x8619,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x2588, (q15_t)0x85a1,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2407, (q15_t)0x852d,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x2284, (q15_t)0x84be,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2100, (q15_t)0x8454,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1f7b, (q15_t)0x83ef,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1df5, (q15_t)0x838f,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1c6d, (q15_t)0x8333,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1ae4, (q15_t)0x82dc,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x195b, (q15_t)0x828a,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x17d0, (q15_t)0x823d,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x1645, (q15_t)0x81f4,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x14b8, (q15_t)0x81b1,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x132b, (q15_t)0x8172,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x119d, (q15_t)0x8138,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x100e, (q15_t)0x8103,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xe7f, (q15_t)0x80d3,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xcef, (q15_t)0x80a8,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xb5f, (q15_t)0x8082,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa33, (q15_t)0x8069, (q15_t)0x9ce, (q15_t)0x8061,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x83d, (q15_t)0x8044,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x775, (q15_t)0x8038, (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6ac, (q15_t)0x802d,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x51a, (q15_t)0x801b,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x451, (q15_t)0x8013, (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x388, (q15_t)0x800d,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x1f6, (q15_t)0x8004,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x12d, (q15_t)0x8002, (q15_t)0xc9, (q15_t)0x8001, (q15_t)0x64, (q15_t)0x8001
+};
+
+    const q15_t __ALIGNED(4) cos_factorsQ15_512[512] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ff9, (q15_t)0x7ff7,
+  (q15_t)0x7ff4, (q15_t)0x7ff2, (q15_t)0x7fee, (q15_t)0x7feb, (q15_t)0x7fe7, (q15_t)0x7fe3, (q15_t)0x7fdf, (q15_t)0x7fda,
+  (q15_t)0x7fd6, (q15_t)0x7fd0, (q15_t)0x7fcb, (q15_t)0x7fc5, (q15_t)0x7fbf, (q15_t)0x7fb8, (q15_t)0x7fb1, (q15_t)0x7faa,
+  (q15_t)0x7fa3, (q15_t)0x7f9b, (q15_t)0x7f93, (q15_t)0x7f8b, (q15_t)0x7f82, (q15_t)0x7f79, (q15_t)0x7f70, (q15_t)0x7f67,
+  (q15_t)0x7f5d, (q15_t)0x7f53, (q15_t)0x7f48, (q15_t)0x7f3d, (q15_t)0x7f32, (q15_t)0x7f27, (q15_t)0x7f1b, (q15_t)0x7f0f,
+  (q15_t)0x7f03, (q15_t)0x7ef6, (q15_t)0x7ee9, (q15_t)0x7edc, (q15_t)0x7ecf, (q15_t)0x7ec1, (q15_t)0x7eb3, (q15_t)0x7ea4,
+  (q15_t)0x7e95, (q15_t)0x7e86, (q15_t)0x7e77, (q15_t)0x7e67, (q15_t)0x7e57, (q15_t)0x7e47, (q15_t)0x7e37, (q15_t)0x7e26,
+  (q15_t)0x7e14, (q15_t)0x7e03, (q15_t)0x7df1, (q15_t)0x7ddf, (q15_t)0x7dcd, (q15_t)0x7dba, (q15_t)0x7da7, (q15_t)0x7d94,
+  (q15_t)0x7d80, (q15_t)0x7d6c, (q15_t)0x7d58, (q15_t)0x7d43, (q15_t)0x7d2f, (q15_t)0x7d19, (q15_t)0x7d04, (q15_t)0x7cee,
+  (q15_t)0x7cd8, (q15_t)0x7cc2, (q15_t)0x7cab, (q15_t)0x7c94, (q15_t)0x7c7d, (q15_t)0x7c66, (q15_t)0x7c4e, (q15_t)0x7c36,
+  (q15_t)0x7c1d, (q15_t)0x7c05, (q15_t)0x7beb, (q15_t)0x7bd2, (q15_t)0x7bb9, (q15_t)0x7b9f, (q15_t)0x7b84, (q15_t)0x7b6a,
+  (q15_t)0x7b4f, (q15_t)0x7b34, (q15_t)0x7b19, (q15_t)0x7afd, (q15_t)0x7ae1, (q15_t)0x7ac5, (q15_t)0x7aa8, (q15_t)0x7a8b,
+  (q15_t)0x7a6e, (q15_t)0x7a50, (q15_t)0x7a33, (q15_t)0x7a15, (q15_t)0x79f6, (q15_t)0x79d8, (q15_t)0x79b9, (q15_t)0x7999,
+  (q15_t)0x797a, (q15_t)0x795a, (q15_t)0x793a, (q15_t)0x7919, (q15_t)0x78f9, (q15_t)0x78d8, (q15_t)0x78b6, (q15_t)0x7895,
+  (q15_t)0x7873, (q15_t)0x7851, (q15_t)0x782e, (q15_t)0x780c, (q15_t)0x77e9, (q15_t)0x77c5, (q15_t)0x77a2, (q15_t)0x777e,
+  (q15_t)0x775a, (q15_t)0x7735, (q15_t)0x7710, (q15_t)0x76eb, (q15_t)0x76c6, (q15_t)0x76a0, (q15_t)0x767b, (q15_t)0x7654,
+  (q15_t)0x762e, (q15_t)0x7607, (q15_t)0x75e0, (q15_t)0x75b9, (q15_t)0x7591, (q15_t)0x7569, (q15_t)0x7541, (q15_t)0x7519,
+  (q15_t)0x74f0, (q15_t)0x74c7, (q15_t)0x749e, (q15_t)0x7474, (q15_t)0x744a, (q15_t)0x7420, (q15_t)0x73f6, (q15_t)0x73cb,
+  (q15_t)0x73a0, (q15_t)0x7375, (q15_t)0x7349, (q15_t)0x731d, (q15_t)0x72f1, (q15_t)0x72c5, (q15_t)0x7298, (q15_t)0x726b,
+  (q15_t)0x723e, (q15_t)0x7211, (q15_t)0x71e3, (q15_t)0x71b5, (q15_t)0x7186, (q15_t)0x7158, (q15_t)0x7129, (q15_t)0x70fa,
+  (q15_t)0x70cb, (q15_t)0x709b, (q15_t)0x706b, (q15_t)0x703b, (q15_t)0x700a, (q15_t)0x6fda, (q15_t)0x6fa9, (q15_t)0x6f77,
+  (q15_t)0x6f46, (q15_t)0x6f14, (q15_t)0x6ee2, (q15_t)0x6eaf, (q15_t)0x6e7d, (q15_t)0x6e4a, (q15_t)0x6e17, (q15_t)0x6de3,
+  (q15_t)0x6db0, (q15_t)0x6d7c, (q15_t)0x6d48, (q15_t)0x6d13, (q15_t)0x6cde, (q15_t)0x6ca9, (q15_t)0x6c74, (q15_t)0x6c3f,
+  (q15_t)0x6c09, (q15_t)0x6bd3, (q15_t)0x6b9c, (q15_t)0x6b66, (q15_t)0x6b2f, (q15_t)0x6af8, (q15_t)0x6ac1, (q15_t)0x6a89,
+  (q15_t)0x6a51, (q15_t)0x6a19, (q15_t)0x69e1, (q15_t)0x69a8, (q15_t)0x696f, (q15_t)0x6936, (q15_t)0x68fd, (q15_t)0x68c3,
+  (q15_t)0x6889, (q15_t)0x684f, (q15_t)0x6815, (q15_t)0x67da, (q15_t)0x679f, (q15_t)0x6764, (q15_t)0x6729, (q15_t)0x66ed,
+  (q15_t)0x66b1, (q15_t)0x6675, (q15_t)0x6639, (q15_t)0x65fc, (q15_t)0x65bf, (q15_t)0x6582, (q15_t)0x6545, (q15_t)0x6507,
+  (q15_t)0x64c9, (q15_t)0x648b, (q15_t)0x644d, (q15_t)0x640e, (q15_t)0x63cf, (q15_t)0x6390, (q15_t)0x6351, (q15_t)0x6311,
+  (q15_t)0x62d2, (q15_t)0x6292, (q15_t)0x6251, (q15_t)0x6211, (q15_t)0x61d0, (q15_t)0x618f, (q15_t)0x614e, (q15_t)0x610d,
+  (q15_t)0x60cb, (q15_t)0x6089, (q15_t)0x6047, (q15_t)0x6004, (q15_t)0x5fc2, (q15_t)0x5f7f, (q15_t)0x5f3c, (q15_t)0x5ef9,
+  (q15_t)0x5eb5, (q15_t)0x5e71, (q15_t)0x5e2d, (q15_t)0x5de9, (q15_t)0x5da5, (q15_t)0x5d60, (q15_t)0x5d1b, (q15_t)0x5cd6,
+  (q15_t)0x5c91, (q15_t)0x5c4b, (q15_t)0x5c06, (q15_t)0x5bc0, (q15_t)0x5b79, (q15_t)0x5b33, (q15_t)0x5aec, (q15_t)0x5aa5,
+  (q15_t)0x5a5e, (q15_t)0x5a17, (q15_t)0x59d0, (q15_t)0x5988, (q15_t)0x5940, (q15_t)0x58f8, (q15_t)0x58af, (q15_t)0x5867,
+  (q15_t)0x581e, (q15_t)0x57d5, (q15_t)0x578c, (q15_t)0x5742, (q15_t)0x56f9, (q15_t)0x56af, (q15_t)0x5665, (q15_t)0x561a,
+  (q15_t)0x55d0, (q15_t)0x5585, (q15_t)0x553a, (q15_t)0x54ef, (q15_t)0x54a4, (q15_t)0x5458, (q15_t)0x540d, (q15_t)0x53c1,
+  (q15_t)0x5375, (q15_t)0x5328, (q15_t)0x52dc, (q15_t)0x528f, (q15_t)0x5242, (q15_t)0x51f5, (q15_t)0x51a8, (q15_t)0x515a,
+  (q15_t)0x510c, (q15_t)0x50bf, (q15_t)0x5070, (q15_t)0x5022, (q15_t)0x4fd4, (q15_t)0x4f85, (q15_t)0x4f36, (q15_t)0x4ee7,
+  (q15_t)0x4e98, (q15_t)0x4e48, (q15_t)0x4df9, (q15_t)0x4da9, (q15_t)0x4d59, (q15_t)0x4d09, (q15_t)0x4cb8, (q15_t)0x4c68,
+  (q15_t)0x4c17, (q15_t)0x4bc6, (q15_t)0x4b75, (q15_t)0x4b24, (q15_t)0x4ad2, (q15_t)0x4a81, (q15_t)0x4a2f, (q15_t)0x49dd,
+  (q15_t)0x498a, (q15_t)0x4938, (q15_t)0x48e6, (q15_t)0x4893, (q15_t)0x4840, (q15_t)0x47ed, (q15_t)0x479a, (q15_t)0x4746,
+  (q15_t)0x46f3, (q15_t)0x469f, (q15_t)0x464b, (q15_t)0x45f7, (q15_t)0x45a3, (q15_t)0x454e, (q15_t)0x44fa, (q15_t)0x44a5,
+  (q15_t)0x4450, (q15_t)0x43fb, (q15_t)0x43a5, (q15_t)0x4350, (q15_t)0x42fa, (q15_t)0x42a5, (q15_t)0x424f, (q15_t)0x41f9,
+  (q15_t)0x41a2, (q15_t)0x414c, (q15_t)0x40f6, (q15_t)0x409f, (q15_t)0x4048, (q15_t)0x3ff1, (q15_t)0x3f9a, (q15_t)0x3f43,
+  (q15_t)0x3eeb, (q15_t)0x3e93, (q15_t)0x3e3c, (q15_t)0x3de4, (q15_t)0x3d8c, (q15_t)0x3d33, (q15_t)0x3cdb, (q15_t)0x3c83,
+  (q15_t)0x3c2a, (q15_t)0x3bd1, (q15_t)0x3b78, (q15_t)0x3b1f, (q15_t)0x3ac6, (q15_t)0x3a6c, (q15_t)0x3a13, (q15_t)0x39b9,
+  (q15_t)0x395f, (q15_t)0x3906, (q15_t)0x38ab, (q15_t)0x3851, (q15_t)0x37f7, (q15_t)0x379c, (q15_t)0x3742, (q15_t)0x36e7,
+  (q15_t)0x368c, (q15_t)0x3631, (q15_t)0x35d6, (q15_t)0x357b, (q15_t)0x351f, (q15_t)0x34c4, (q15_t)0x3468, (q15_t)0x340c,
+  (q15_t)0x33b0, (q15_t)0x3354, (q15_t)0x32f8, (q15_t)0x329c, (q15_t)0x3240, (q15_t)0x31e3, (q15_t)0x3186, (q15_t)0x312a,
+  (q15_t)0x30cd, (q15_t)0x3070, (q15_t)0x3013, (q15_t)0x2fb5, (q15_t)0x2f58, (q15_t)0x2efb, (q15_t)0x2e9d, (q15_t)0x2e3f,
+  (q15_t)0x2de2, (q15_t)0x2d84, (q15_t)0x2d26, (q15_t)0x2cc8, (q15_t)0x2c69, (q15_t)0x2c0b, (q15_t)0x2bad, (q15_t)0x2b4e,
+  (q15_t)0x2aef, (q15_t)0x2a91, (q15_t)0x2a32, (q15_t)0x29d3, (q15_t)0x2974, (q15_t)0x2915, (q15_t)0x28b5, (q15_t)0x2856,
+  (q15_t)0x27f6, (q15_t)0x2797, (q15_t)0x2737, (q15_t)0x26d8, (q15_t)0x2678, (q15_t)0x2618, (q15_t)0x25b8, (q15_t)0x2558,
+  (q15_t)0x24f7, (q15_t)0x2497, (q15_t)0x2437, (q15_t)0x23d6, (q15_t)0x2376, (q15_t)0x2315, (q15_t)0x22b4, (q15_t)0x2254,
+  (q15_t)0x21f3, (q15_t)0x2192, (q15_t)0x2131, (q15_t)0x20d0, (q15_t)0x206e, (q15_t)0x200d, (q15_t)0x1fac, (q15_t)0x1f4a,
+  (q15_t)0x1ee9, (q15_t)0x1e87, (q15_t)0x1e25, (q15_t)0x1dc4, (q15_t)0x1d62, (q15_t)0x1d00, (q15_t)0x1c9e, (q15_t)0x1c3c,
+  (q15_t)0x1bda, (q15_t)0x1b78, (q15_t)0x1b16, (q15_t)0x1ab3, (q15_t)0x1a51, (q15_t)0x19ef, (q15_t)0x198c, (q15_t)0x192a,
+  (q15_t)0x18c7, (q15_t)0x1864, (q15_t)0x1802, (q15_t)0x179f, (q15_t)0x173c, (q15_t)0x16d9, (q15_t)0x1676, (q15_t)0x1613,
+  (q15_t)0x15b0, (q15_t)0x154d, (q15_t)0x14ea, (q15_t)0x1487, (q15_t)0x1423, (q15_t)0x13c0, (q15_t)0x135d, (q15_t)0x12f9,
+  (q15_t)0x1296, (q15_t)0x1232, (q15_t)0x11cf, (q15_t)0x116b, (q15_t)0x1108, (q15_t)0x10a4, (q15_t)0x1040, (q15_t)0xfdd,
+  (q15_t)0xf79, (q15_t)0xf15, (q15_t)0xeb1, (q15_t)0xe4d, (q15_t)0xde9, (q15_t)0xd85, (q15_t)0xd21, (q15_t)0xcbd,
+  (q15_t)0xc59, (q15_t)0xbf5, (q15_t)0xb91, (q15_t)0xb2d, (q15_t)0xac9, (q15_t)0xa65, (q15_t)0xa00, (q15_t)0x99c,
+  (q15_t)0x938, (q15_t)0x8d4, (q15_t)0x86f, (q15_t)0x80b, (q15_t)0x7a7, (q15_t)0x742, (q15_t)0x6de, (q15_t)0x67a,
+  (q15_t)0x615, (q15_t)0x5b1, (q15_t)0x54c, (q15_t)0x4e8, (q15_t)0x483, (q15_t)0x41f, (q15_t)0x3ba, (q15_t)0x356,
+  (q15_t)0x2f1, (q15_t)0x28d, (q15_t)0x228, (q15_t)0x1c4, (q15_t)0x15f, (q15_t)0xfb, (q15_t)0x96, (q15_t)0x32
+};
+
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
+    const q15_t __ALIGNED(4) WeightsQ15_2048[4096] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffb5,
+  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff51,
+  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeec,
+  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffd, (q15_t)0xfe88,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe23,
+  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffa, (q15_t)0xfdbe,
+  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff8, (q15_t)0xfd5a,
+  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff6, (q15_t)0xfcf5,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfc91,
+  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc2c,
+  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbc8,
+  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7fea, (q15_t)0xfb64,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe6, (q15_t)0xfaff,
+  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe2, (q15_t)0xfa9b,
+  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fde, (q15_t)0xfa36,
+  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fd9, (q15_t)0xf9d2,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd4, (q15_t)0xf96d,
+  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fcf, (q15_t)0xf909,
+  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fc9, (q15_t)0xf8a5,
+  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc3, (q15_t)0xf840,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbd, (q15_t)0xf7dc,
+  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb7, (q15_t)0xf778,
+  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb0, (q15_t)0xf713,
+  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7fa9, (q15_t)0xf6af,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa1, (q15_t)0xf64b,
+  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f99, (q15_t)0xf5e7,
+  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f91, (q15_t)0xf582,
+  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f89, (q15_t)0xf51e,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f80, (q15_t)0xf4ba,
+  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f77, (q15_t)0xf456,
+  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f6e, (q15_t)0xf3f2,
+  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f64, (q15_t)0xf38e,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5a, (q15_t)0xf32a,
+  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f50, (q15_t)0xf2c6,
+  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f45, (q15_t)0xf262,
+  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3b, (q15_t)0xf1fe,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f2f, (q15_t)0xf19a,
+  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f24, (q15_t)0xf136,
+  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f18, (q15_t)0xf0d2,
+  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0c, (q15_t)0xf06e,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f00, (q15_t)0xf00b,
+  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef3, (q15_t)0xefa7,
+  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee6, (q15_t)0xef43,
+  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7ed9, (q15_t)0xeedf,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ecb, (q15_t)0xee7c,
+  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ebd, (q15_t)0xee18,
+  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eaf, (q15_t)0xedb5,
+  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea1, (q15_t)0xed51,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e92, (q15_t)0xecee,
+  (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e83, (q15_t)0xec8a,
+  (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e73, (q15_t)0xec27,
+  (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e63, (q15_t)0xebc4,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e53, (q15_t)0xeb61,
+  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e43, (q15_t)0xeafd,
+  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e32, (q15_t)0xea9a,
+  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e21, (q15_t)0xea37,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e10, (q15_t)0xe9d4,
+  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7dff, (q15_t)0xe971,
+  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7ded, (q15_t)0xe90e,
+  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dda, (q15_t)0xe8ab,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dc8, (q15_t)0xe849,
+  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db5, (q15_t)0xe7e6,
+  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da2, (q15_t)0xe783,
+  (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d8f, (q15_t)0xe720,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7b, (q15_t)0xe6be,
+  (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d67, (q15_t)0xe65b,
+  (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d53, (q15_t)0xe5f9,
+  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d3e, (q15_t)0xe596,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d29, (q15_t)0xe534,
+  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d14, (q15_t)0xe4d2,
+  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7cff, (q15_t)0xe470,
+  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ce9, (q15_t)0xe40e,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd3, (q15_t)0xe3ab,
+  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cbc, (q15_t)0xe349,
+  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7ca6, (q15_t)0xe2e8,
+  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c8f, (q15_t)0xe286,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c77, (q15_t)0xe224,
+  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c60, (q15_t)0xe1c2,
+  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c48, (q15_t)0xe160,
+  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c30, (q15_t)0xe0ff,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c17, (q15_t)0xe09d,
+  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7bfe, (q15_t)0xe03c,
+  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7be5, (q15_t)0xdfdb,
+  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bcc, (q15_t)0xdf79,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb2, (q15_t)0xdf18,
+  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b98, (q15_t)0xdeb7,
+  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b7e, (q15_t)0xde56,
+  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b63, (q15_t)0xddf5,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b48, (q15_t)0xdd94,
+  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b2d, (q15_t)0xdd33,
+  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b12, (q15_t)0xdcd3,
+  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7af6, (q15_t)0xdc72,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7ada, (q15_t)0xdc12,
+  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7abd, (q15_t)0xdbb1,
+  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa1, (q15_t)0xdb51,
+  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a84, (q15_t)0xdaf1,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a67, (q15_t)0xda90,
+  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a49, (q15_t)0xda30,
+  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a2b, (q15_t)0xd9d0,
+  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a0d, (q15_t)0xd970,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79ef, (q15_t)0xd911,
+  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d0, (q15_t)0xd8b1,
+  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b1, (q15_t)0xd851,
+  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7992, (q15_t)0xd7f2,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7972, (q15_t)0xd792,
+  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7952, (q15_t)0xd733,
+  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7932, (q15_t)0xd6d4,
+  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7911, (q15_t)0xd675,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f1, (q15_t)0xd615,
+  (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78cf, (q15_t)0xd5b7,
+  (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78ae, (q15_t)0xd558,
+  (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x788c, (q15_t)0xd4f9,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x786b, (q15_t)0xd49a,
+  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x7848, (q15_t)0xd43c,
+  (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x7826, (q15_t)0xd3dd,
+  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x7803, (q15_t)0xd37f,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e0, (q15_t)0xd321,
+  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77bc, (q15_t)0xd2c3,
+  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x7799, (q15_t)0xd265,
+  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x7775, (q15_t)0xd207,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7751, (q15_t)0xd1a9,
+  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x772c, (q15_t)0xd14b,
+  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x7707, (q15_t)0xd0ee,
+  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e2, (q15_t)0xd091,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76bd, (q15_t)0xd033,
+  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x7697, (q15_t)0xcfd6,
+  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7671, (q15_t)0xcf79,
+  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x764b, (q15_t)0xcf1c,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x7624, (q15_t)0xcebf,
+  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x75fd, (q15_t)0xce62,
+  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75d6, (q15_t)0xce06,
+  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75af, (q15_t)0xcda9,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x7587, (q15_t)0xcd4d,
+  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x755f, (q15_t)0xccf1,
+  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x7537, (q15_t)0xcc95,
+  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x750f, (q15_t)0xcc39,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74e6, (q15_t)0xcbdd,
+  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74bd, (q15_t)0xcb81,
+  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x7493, (q15_t)0xcb25,
+  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x746a, (q15_t)0xcaca,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7440, (q15_t)0xca6e,
+  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x7415, (q15_t)0xca13,
+  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73eb, (q15_t)0xc9b8,
+  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c0, (q15_t)0xc95d,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x7395, (q15_t)0xc902,
+  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x736a, (q15_t)0xc8a8,
+  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x733e, (q15_t)0xc84d,
+  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x7312, (q15_t)0xc7f3,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72e6, (q15_t)0xc798,
+  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72ba, (q15_t)0xc73e,
+  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x728d, (q15_t)0xc6e4,
+  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7260, (q15_t)0xc68a,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x7233, (q15_t)0xc630,
+  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x7205, (q15_t)0xc5d7,
+  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71d7, (q15_t)0xc57d,
+  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71a9, (q15_t)0xc524,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x717b, (q15_t)0xc4cb,
+  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x714c, (q15_t)0xc472,
+  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x711d, (q15_t)0xc419,
+  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70ee, (q15_t)0xc3c0,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70bf, (q15_t)0xc367,
+  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x708f, (q15_t)0xc30f,
+  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x705f, (q15_t)0xc2b7,
+  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x702f, (q15_t)0xc25e,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x6ffe, (q15_t)0xc206,
+  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fcd, (q15_t)0xc1ae,
+  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6f9c, (q15_t)0xc157,
+  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f6b, (q15_t)0xc0ff,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f39, (q15_t)0xc0a8,
+  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f07, (q15_t)0xc050,
+  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6ed5, (q15_t)0xbff9,
+  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6ea3, (q15_t)0xbfa2,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e70, (q15_t)0xbf4b,
+  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e3d, (q15_t)0xbef5,
+  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e0a, (q15_t)0xbe9e,
+  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6dd6, (q15_t)0xbe48,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6da3, (q15_t)0xbdf2,
+  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d6f, (q15_t)0xbd9c,
+  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d3a, (q15_t)0xbd46,
+  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d06, (q15_t)0xbcf0,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cd1, (q15_t)0xbc9b,
+  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6c9c, (q15_t)0xbc45,
+  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c67, (q15_t)0xbbf0,
+  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c31, (q15_t)0xbb9b,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6bfb, (q15_t)0xbb46,
+  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bc5, (q15_t)0xbaf1,
+  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b8f, (q15_t)0xba9d,
+  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b58, (q15_t)0xba48,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b21, (q15_t)0xb9f4,
+  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6aea, (q15_t)0xb9a0,
+  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6ab3, (q15_t)0xb94c,
+  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a7b, (q15_t)0xb8f8,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a43, (q15_t)0xb8a5,
+  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a0b, (q15_t)0xb852,
+  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69d3, (q15_t)0xb7fe,
+  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x699a, (q15_t)0xb7ab,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x6961, (q15_t)0xb758,
+  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6928, (q15_t)0xb706,
+  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68ee, (q15_t)0xb6b3,
+  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68b5, (q15_t)0xb661,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x687b, (q15_t)0xb60f,
+  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x6840, (q15_t)0xb5bd,
+  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6806, (q15_t)0xb56b,
+  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67cb, (q15_t)0xb519,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x6790, (q15_t)0xb4c8,
+  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6755, (q15_t)0xb477,
+  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x671a, (q15_t)0xb426,
+  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66de, (q15_t)0xb3d5,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66a2, (q15_t)0xb384,
+  (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6666, (q15_t)0xb334,
+  (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6629, (q15_t)0xb2e3,
+  (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65ed, (q15_t)0xb293,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65b0, (q15_t)0xb243,
+  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x6573, (q15_t)0xb1f3,
+  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6535, (q15_t)0xb1a4,
+  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x64f7, (q15_t)0xb154,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64ba, (q15_t)0xb105,
+  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x647b, (q15_t)0xb0b6,
+  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x643d, (q15_t)0xb067,
+  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x63fe, (q15_t)0xb019,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63c0, (q15_t)0xafca,
+  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x6380, (q15_t)0xaf7c,
+  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x6341, (q15_t)0xaf2e,
+  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x6301, (q15_t)0xaee0,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62c2, (q15_t)0xae92,
+  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x6282, (q15_t)0xae45,
+  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x6241, (q15_t)0xadf8,
+  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x6201, (q15_t)0xadab,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61c0, (q15_t)0xad5e,
+  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x617f, (q15_t)0xad11,
+  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x613e, (q15_t)0xacc5,
+  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x60fc, (q15_t)0xac78,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60ba, (q15_t)0xac2c,
+  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6078, (q15_t)0xabe0,
+  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6036, (q15_t)0xab95,
+  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x5ff4, (q15_t)0xab49,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fb1, (q15_t)0xaafe,
+  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f6e, (q15_t)0xaab3,
+  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f2b, (q15_t)0xaa68,
+  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ee8, (q15_t)0xaa1d,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5ea4, (q15_t)0xa9d3,
+  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e60, (q15_t)0xa989,
+  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e1c, (q15_t)0xa93f,
+  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5dd8, (q15_t)0xa8f5,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5d94, (q15_t)0xa8ab,
+  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d4f, (q15_t)0xa862,
+  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d0a, (q15_t)0xa819,
+  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cc5, (q15_t)0xa7d0,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c80, (q15_t)0xa787,
+  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c3a, (q15_t)0xa73f,
+  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5bf4, (q15_t)0xa6f6,
+  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bae, (q15_t)0xa6ae,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b68, (q15_t)0xa666,
+  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b21, (q15_t)0xa61f,
+  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5adb, (q15_t)0xa5d7,
+  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5a94, (q15_t)0xa590,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a4d, (q15_t)0xa549,
+  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a05, (q15_t)0xa502,
+  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59be, (q15_t)0xa4bb,
+  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5976, (q15_t)0xa475,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x592e, (q15_t)0xa42f,
+  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58e6, (q15_t)0xa3e9,
+  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x589d, (q15_t)0xa3a3,
+  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5855, (q15_t)0xa35e,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x580c, (q15_t)0xa318,
+  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57c3, (q15_t)0xa2d3,
+  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5779, (q15_t)0xa28f,
+  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x5730, (q15_t)0xa24a,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56e6, (q15_t)0xa206,
+  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x569c, (q15_t)0xa1c1,
+  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5652, (q15_t)0xa17e,
+  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5608, (q15_t)0xa13a,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55bd, (q15_t)0xa0f6,
+  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5572, (q15_t)0xa0b3,
+  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5528, (q15_t)0xa070,
+  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54dc, (q15_t)0xa02d,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x5491, (q15_t)0x9feb,
+  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5445, (q15_t)0x9fa9,
+  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x53fa, (q15_t)0x9f67,
+  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53ae, (q15_t)0x9f25,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5362, (q15_t)0x9ee3,
+  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5315, (q15_t)0x9ea2,
+  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52c9, (q15_t)0x9e61,
+  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x527c, (q15_t)0x9e20,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x522f, (q15_t)0x9ddf,
+  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51e2, (q15_t)0x9d9f,
+  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x5194, (q15_t)0x9d5e,
+  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5147, (q15_t)0x9d1e,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x50f9, (q15_t)0x9cdf,
+  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ab, (q15_t)0x9c9f,
+  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x505d, (q15_t)0x9c60,
+  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x500f, (q15_t)0x9c21,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fc0, (q15_t)0x9be2,
+  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f71, (q15_t)0x9ba4,
+  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f22, (q15_t)0x9b65,
+  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ed3, (q15_t)0x9b27,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e84, (q15_t)0x9aea,
+  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e34, (q15_t)0x9aac,
+  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4de5, (q15_t)0x9a6f,
+  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4d95, (q15_t)0x9a32,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d45, (q15_t)0x99f5,
+  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4cf5, (q15_t)0x99b8,
+  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4ca4, (q15_t)0x997c,
+  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c54, (q15_t)0x9940,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c03, (q15_t)0x9904,
+  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bb2, (q15_t)0x98c9,
+  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b61, (q15_t)0x988d,
+  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b0f, (q15_t)0x9852,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4abe, (q15_t)0x9817,
+  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a6c, (q15_t)0x97dd,
+  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a1a, (q15_t)0x97a2,
+  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49c8, (q15_t)0x9768,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4976, (q15_t)0x972f,
+  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4923, (q15_t)0x96f5,
+  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48d1, (q15_t)0x96bc,
+  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x487e, (q15_t)0x9683,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x482b, (q15_t)0x964a,
+  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47d8, (q15_t)0x9611,
+  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4785, (q15_t)0x95d9,
+  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4731, (q15_t)0x95a1,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46de, (q15_t)0x9569,
+  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x468a, (q15_t)0x9532,
+  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4636, (q15_t)0x94fa,
+  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45e2, (q15_t)0x94c3,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x458d, (q15_t)0x948d,
+  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4539, (q15_t)0x9456,
+  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44e4, (q15_t)0x9420,
+  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x4490, (q15_t)0x93ea,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x443b, (q15_t)0x93b4,
+  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43e5, (q15_t)0x937f,
+  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x4390, (q15_t)0x9349,
+  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x433b, (q15_t)0x9314,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42e5, (q15_t)0x92e0,
+  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x428f, (q15_t)0x92ab,
+  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4239, (q15_t)0x9277,
+  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41e3, (q15_t)0x9243,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x418d, (q15_t)0x9210,
+  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4136, (q15_t)0x91dc,
+  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40e0, (q15_t)0x91a9,
+  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4089, (q15_t)0x9177,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4032, (q15_t)0x9144,
+  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fdb, (q15_t)0x9112,
+  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f84, (q15_t)0x90e0,
+  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f2d, (q15_t)0x90ae,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ed5, (q15_t)0x907c,
+  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e7d, (q15_t)0x904b,
+  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e26, (q15_t)0x901a,
+  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dce, (q15_t)0x8fea,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d76, (q15_t)0x8fb9,
+  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d1d, (q15_t)0x8f89,
+  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cc5, (q15_t)0x8f59,
+  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c6c, (q15_t)0x8f2a,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c14, (q15_t)0x8efa,
+  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bbb, (q15_t)0x8ecb,
+  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b62, (q15_t)0x8e9c,
+  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b09, (q15_t)0x8e6e,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3aaf, (q15_t)0x8e40,
+  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a56, (q15_t)0x8e12,
+  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x39fd, (q15_t)0x8de4,
+  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39a3, (q15_t)0x8db7,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x3949, (q15_t)0x8d8a,
+  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x38ef, (q15_t)0x8d5d,
+  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x3895, (q15_t)0x8d30,
+  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x383b, (q15_t)0x8d04,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37e0, (q15_t)0x8cd8,
+  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3786, (q15_t)0x8cac,
+  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x372b, (q15_t)0x8c81,
+  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36d0, (q15_t)0x8c55,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3675, (q15_t)0x8c2a,
+  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x361a, (q15_t)0x8c00,
+  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35bf, (q15_t)0x8bd5,
+  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3564, (q15_t)0x8bab,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x3508, (q15_t)0x8b82,
+  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34ad, (q15_t)0x8b58,
+  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3451, (q15_t)0x8b2f,
+  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x33f5, (q15_t)0x8b06,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x3399, (q15_t)0x8add,
+  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x333d, (q15_t)0x8ab5,
+  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32e1, (q15_t)0x8a8d,
+  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3285, (q15_t)0x8a65,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x3228, (q15_t)0x8a3d,
+  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31cc, (q15_t)0x8a16,
+  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x316f, (q15_t)0x89ef,
+  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3112, (q15_t)0x89c8,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30b6, (q15_t)0x89a2,
+  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x3059, (q15_t)0x897c,
+  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x2ffb, (q15_t)0x8956,
+  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2f9e, (q15_t)0x8931,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f41, (q15_t)0x890b,
+  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ee3, (q15_t)0x88e6,
+  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e86, (q15_t)0x88c2,
+  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e28, (q15_t)0x889d,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2dca, (q15_t)0x8879,
+  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d6c, (q15_t)0x8855,
+  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d0e, (q15_t)0x8832,
+  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cb0, (q15_t)0x880f,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c52, (q15_t)0x87ec,
+  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2bf3, (q15_t)0x87c9,
+  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2b95, (q15_t)0x87a7,
+  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b36, (q15_t)0x8784,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ad8, (q15_t)0x8763,
+  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a79, (q15_t)0x8741,
+  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a1a, (q15_t)0x8720,
+  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29bb, (q15_t)0x86ff,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x295c, (q15_t)0x86de,
+  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x28fd, (q15_t)0x86be,
+  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x289d, (q15_t)0x869e,
+  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x283e, (q15_t)0x867e,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27df, (q15_t)0x865f,
+  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x277f, (q15_t)0x8640,
+  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x271f, (q15_t)0x8621,
+  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26c0, (q15_t)0x8602,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2660, (q15_t)0x85e4,
+  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2600, (q15_t)0x85c6,
+  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25a0, (q15_t)0x85a8,
+  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2540, (q15_t)0x858b,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24df, (q15_t)0x856e,
+  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x247f, (q15_t)0x8551,
+  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x241f, (q15_t)0x8534,
+  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23be, (q15_t)0x8518,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x235e, (q15_t)0x84fc,
+  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x22fd, (q15_t)0x84e1,
+  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x229c, (q15_t)0x84c5,
+  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x223b, (q15_t)0x84aa,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21da, (q15_t)0x848f,
+  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x2179, (q15_t)0x8475,
+  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x2118, (q15_t)0x845b,
+  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20b7, (q15_t)0x8441,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2056, (q15_t)0x8427,
+  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x1ff5, (q15_t)0x840e,
+  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1f93, (q15_t)0x83f5,
+  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f32, (q15_t)0x83dd,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ed0, (q15_t)0x83c4,
+  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e6f, (q15_t)0x83ac,
+  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e0d, (q15_t)0x8394,
+  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dab, (q15_t)0x837d,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d49, (q15_t)0x8366,
+  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1ce8, (q15_t)0x834f,
+  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c86, (q15_t)0x8338,
+  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c24, (q15_t)0x8322,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bc1, (q15_t)0x830c,
+  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b5f, (q15_t)0x82f7,
+  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1afd, (q15_t)0x82e1,
+  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1a9b, (q15_t)0x82cc,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a38, (q15_t)0x82b7,
+  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19d6, (q15_t)0x82a3,
+  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1973, (q15_t)0x828f,
+  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1911, (q15_t)0x827b,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18ae, (q15_t)0x8268,
+  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x184c, (q15_t)0x8254,
+  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17e9, (q15_t)0x8241,
+  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1786, (q15_t)0x822f,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1723, (q15_t)0x821c,
+  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16c0, (q15_t)0x820a,
+  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x165d, (q15_t)0x81f9,
+  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x15fa, (q15_t)0x81e7,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x1597, (q15_t)0x81d6,
+  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1534, (q15_t)0x81c5,
+  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14d1, (q15_t)0x81b5,
+  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x146e, (q15_t)0x81a5,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x140b, (q15_t)0x8195,
+  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13a7, (q15_t)0x8185,
+  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1344, (q15_t)0x8176,
+  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12e0, (q15_t)0x8167,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x127d, (q15_t)0x8158,
+  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x1219, (q15_t)0x814a,
+  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11b6, (q15_t)0x813c,
+  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1152, (q15_t)0x812e,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x10ef, (q15_t)0x8121,
+  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x108b, (q15_t)0x8113,
+  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x1027, (q15_t)0x8107,
+  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfc4, (q15_t)0x80fa,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf60, (q15_t)0x80ee,
+  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xefc, (q15_t)0x80e2,
+  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xe98, (q15_t)0x80d6,
+  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe34, (q15_t)0x80cb,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xdd0, (q15_t)0x80c0,
+  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd6c, (q15_t)0x80b5,
+  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd08, (q15_t)0x80ab,
+  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xca4, (q15_t)0x80a1,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc40, (q15_t)0x8097,
+  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbdc, (q15_t)0x808e,
+  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb78, (q15_t)0x8084,
+  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb14, (q15_t)0x807b,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xab0, (q15_t)0x8073,
+  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa4c, (q15_t)0x806b,
+  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9e7, (q15_t)0x8063,
+  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x983, (q15_t)0x805b,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x951, (q15_t)0x8057, (q15_t)0x938, (q15_t)0x8056, (q15_t)0x91f, (q15_t)0x8054,
+  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8bb, (q15_t)0x804d,
+  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x888, (q15_t)0x8049, (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x856, (q15_t)0x8046,
+  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x824, (q15_t)0x8043, (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x7f2, (q15_t)0x8040,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x78e, (q15_t)0x803a,
+  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x742, (q15_t)0x8035, (q15_t)0x729, (q15_t)0x8034,
+  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6c5, (q15_t)0x802e,
+  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x693, (q15_t)0x802c, (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x660, (q15_t)0x8029,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x615, (q15_t)0x8026, (q15_t)0x5fc, (q15_t)0x8024,
+  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x598, (q15_t)0x8020,
+  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x565, (q15_t)0x801e, (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x533, (q15_t)0x801c,
+  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4cf, (q15_t)0x8018,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x483, (q15_t)0x8015, (q15_t)0x46a, (q15_t)0x8014,
+  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x438, (q15_t)0x8012, (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x406, (q15_t)0x8011,
+  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3a1, (q15_t)0x800e,
+  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x356, (q15_t)0x800c, (q15_t)0x33d, (q15_t)0x800b,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2d8, (q15_t)0x8009,
+  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x274, (q15_t)0x8007,
+  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x242, (q15_t)0x8006, (q15_t)0x228, (q15_t)0x8005, (q15_t)0x20f, (q15_t)0x8005,
+  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1ab, (q15_t)0x8003,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x178, (q15_t)0x8003, (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x146, (q15_t)0x8002,
+  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x114, (q15_t)0x8002, (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xe2, (q15_t)0x8001,
+  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xaf, (q15_t)0x8001, (q15_t)0x96, (q15_t)0x8001, (q15_t)0x7d, (q15_t)0x8001,
+  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x32, (q15_t)0x8001, (q15_t)0x19, (q15_t)0x8001
+};
+    const q15_t __ALIGNED(4) cos_factorsQ15_2048[2048] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd,
+  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa,
+  (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6,
+  (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff1, (q15_t)0x7ff0,
+  (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7fea,
+  (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe3, (q15_t)0x7fe2,
+  (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fda, (q15_t)0x7fd9,
+  (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd0, (q15_t)0x7fce,
+  (q15_t)0x7fcd, (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc4, (q15_t)0x7fc3,
+  (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fbe, (q15_t)0x7fbc, (q15_t)0x7fbb, (q15_t)0x7fb9, (q15_t)0x7fb7, (q15_t)0x7fb6,
+  (q15_t)0x7fb4, (q15_t)0x7fb2, (q15_t)0x7fb1, (q15_t)0x7faf, (q15_t)0x7fad, (q15_t)0x7fab, (q15_t)0x7fa9, (q15_t)0x7fa8,
+  (q15_t)0x7fa6, (q15_t)0x7fa4, (q15_t)0x7fa2, (q15_t)0x7fa0, (q15_t)0x7f9e, (q15_t)0x7f9c, (q15_t)0x7f9a, (q15_t)0x7f98,
+  (q15_t)0x7f96, (q15_t)0x7f94, (q15_t)0x7f92, (q15_t)0x7f90, (q15_t)0x7f8e, (q15_t)0x7f8c, (q15_t)0x7f8a, (q15_t)0x7f88,
+  (q15_t)0x7f86, (q15_t)0x7f83, (q15_t)0x7f81, (q15_t)0x7f7f, (q15_t)0x7f7d, (q15_t)0x7f7b, (q15_t)0x7f78, (q15_t)0x7f76,
+  (q15_t)0x7f74, (q15_t)0x7f71, (q15_t)0x7f6f, (q15_t)0x7f6d, (q15_t)0x7f6a, (q15_t)0x7f68, (q15_t)0x7f65, (q15_t)0x7f63,
+  (q15_t)0x7f60, (q15_t)0x7f5e, (q15_t)0x7f5b, (q15_t)0x7f59, (q15_t)0x7f56, (q15_t)0x7f54, (q15_t)0x7f51, (q15_t)0x7f4f,
+  (q15_t)0x7f4c, (q15_t)0x7f49, (q15_t)0x7f47, (q15_t)0x7f44, (q15_t)0x7f41, (q15_t)0x7f3f, (q15_t)0x7f3c, (q15_t)0x7f39,
+  (q15_t)0x7f36, (q15_t)0x7f34, (q15_t)0x7f31, (q15_t)0x7f2e, (q15_t)0x7f2b, (q15_t)0x7f28, (q15_t)0x7f25, (q15_t)0x7f23,
+  (q15_t)0x7f20, (q15_t)0x7f1d, (q15_t)0x7f1a, (q15_t)0x7f17, (q15_t)0x7f14, (q15_t)0x7f11, (q15_t)0x7f0e, (q15_t)0x7f0b,
+  (q15_t)0x7f08, (q15_t)0x7f04, (q15_t)0x7f01, (q15_t)0x7efe, (q15_t)0x7efb, (q15_t)0x7ef8, (q15_t)0x7ef5, (q15_t)0x7ef1,
+  (q15_t)0x7eee, (q15_t)0x7eeb, (q15_t)0x7ee8, (q15_t)0x7ee4, (q15_t)0x7ee1, (q15_t)0x7ede, (q15_t)0x7eda, (q15_t)0x7ed7,
+  (q15_t)0x7ed4, (q15_t)0x7ed0, (q15_t)0x7ecd, (q15_t)0x7ec9, (q15_t)0x7ec6, (q15_t)0x7ec3, (q15_t)0x7ebf, (q15_t)0x7ebb,
+  (q15_t)0x7eb8, (q15_t)0x7eb4, (q15_t)0x7eb1, (q15_t)0x7ead, (q15_t)0x7eaa, (q15_t)0x7ea6, (q15_t)0x7ea2, (q15_t)0x7e9f,
+  (q15_t)0x7e9b, (q15_t)0x7e97, (q15_t)0x7e94, (q15_t)0x7e90, (q15_t)0x7e8c, (q15_t)0x7e88, (q15_t)0x7e84, (q15_t)0x7e81,
+  (q15_t)0x7e7d, (q15_t)0x7e79, (q15_t)0x7e75, (q15_t)0x7e71, (q15_t)0x7e6d, (q15_t)0x7e69, (q15_t)0x7e65, (q15_t)0x7e61,
+  (q15_t)0x7e5d, (q15_t)0x7e59, (q15_t)0x7e55, (q15_t)0x7e51, (q15_t)0x7e4d, (q15_t)0x7e49, (q15_t)0x7e45, (q15_t)0x7e41,
+  (q15_t)0x7e3d, (q15_t)0x7e39, (q15_t)0x7e34, (q15_t)0x7e30, (q15_t)0x7e2c, (q15_t)0x7e28, (q15_t)0x7e24, (q15_t)0x7e1f,
+  (q15_t)0x7e1b, (q15_t)0x7e17, (q15_t)0x7e12, (q15_t)0x7e0e, (q15_t)0x7e0a, (q15_t)0x7e05, (q15_t)0x7e01, (q15_t)0x7dfc,
+  (q15_t)0x7df8, (q15_t)0x7df3, (q15_t)0x7def, (q15_t)0x7dea, (q15_t)0x7de6, (q15_t)0x7de1, (q15_t)0x7ddd, (q15_t)0x7dd8,
+  (q15_t)0x7dd4, (q15_t)0x7dcf, (q15_t)0x7dca, (q15_t)0x7dc6, (q15_t)0x7dc1, (q15_t)0x7dbc, (q15_t)0x7db8, (q15_t)0x7db3,
+  (q15_t)0x7dae, (q15_t)0x7da9, (q15_t)0x7da5, (q15_t)0x7da0, (q15_t)0x7d9b, (q15_t)0x7d96, (q15_t)0x7d91, (q15_t)0x7d8c,
+  (q15_t)0x7d87, (q15_t)0x7d82, (q15_t)0x7d7e, (q15_t)0x7d79, (q15_t)0x7d74, (q15_t)0x7d6f, (q15_t)0x7d6a, (q15_t)0x7d65,
+  (q15_t)0x7d60, (q15_t)0x7d5a, (q15_t)0x7d55, (q15_t)0x7d50, (q15_t)0x7d4b, (q15_t)0x7d46, (q15_t)0x7d41, (q15_t)0x7d3c,
+  (q15_t)0x7d36, (q15_t)0x7d31, (q15_t)0x7d2c, (q15_t)0x7d27, (q15_t)0x7d21, (q15_t)0x7d1c, (q15_t)0x7d17, (q15_t)0x7d11,
+  (q15_t)0x7d0c, (q15_t)0x7d07, (q15_t)0x7d01, (q15_t)0x7cfc, (q15_t)0x7cf6, (q15_t)0x7cf1, (q15_t)0x7cec, (q15_t)0x7ce6,
+  (q15_t)0x7ce1, (q15_t)0x7cdb, (q15_t)0x7cd5, (q15_t)0x7cd0, (q15_t)0x7cca, (q15_t)0x7cc5, (q15_t)0x7cbf, (q15_t)0x7cb9,
+  (q15_t)0x7cb4, (q15_t)0x7cae, (q15_t)0x7ca8, (q15_t)0x7ca3, (q15_t)0x7c9d, (q15_t)0x7c97, (q15_t)0x7c91, (q15_t)0x7c8c,
+  (q15_t)0x7c86, (q15_t)0x7c80, (q15_t)0x7c7a, (q15_t)0x7c74, (q15_t)0x7c6e, (q15_t)0x7c69, (q15_t)0x7c63, (q15_t)0x7c5d,
+  (q15_t)0x7c57, (q15_t)0x7c51, (q15_t)0x7c4b, (q15_t)0x7c45, (q15_t)0x7c3f, (q15_t)0x7c39, (q15_t)0x7c33, (q15_t)0x7c2d,
+  (q15_t)0x7c26, (q15_t)0x7c20, (q15_t)0x7c1a, (q15_t)0x7c14, (q15_t)0x7c0e, (q15_t)0x7c08, (q15_t)0x7c01, (q15_t)0x7bfb,
+  (q15_t)0x7bf5, (q15_t)0x7bef, (q15_t)0x7be8, (q15_t)0x7be2, (q15_t)0x7bdc, (q15_t)0x7bd5, (q15_t)0x7bcf, (q15_t)0x7bc9,
+  (q15_t)0x7bc2, (q15_t)0x7bbc, (q15_t)0x7bb5, (q15_t)0x7baf, (q15_t)0x7ba8, (q15_t)0x7ba2, (q15_t)0x7b9b, (q15_t)0x7b95,
+  (q15_t)0x7b8e, (q15_t)0x7b88, (q15_t)0x7b81, (q15_t)0x7b7a, (q15_t)0x7b74, (q15_t)0x7b6d, (q15_t)0x7b67, (q15_t)0x7b60,
+  (q15_t)0x7b59, (q15_t)0x7b52, (q15_t)0x7b4c, (q15_t)0x7b45, (q15_t)0x7b3e, (q15_t)0x7b37, (q15_t)0x7b31, (q15_t)0x7b2a,
+  (q15_t)0x7b23, (q15_t)0x7b1c, (q15_t)0x7b15, (q15_t)0x7b0e, (q15_t)0x7b07, (q15_t)0x7b00, (q15_t)0x7af9, (q15_t)0x7af2,
+  (q15_t)0x7aeb, (q15_t)0x7ae4, (q15_t)0x7add, (q15_t)0x7ad6, (q15_t)0x7acf, (q15_t)0x7ac8, (q15_t)0x7ac1, (q15_t)0x7aba,
+  (q15_t)0x7ab3, (q15_t)0x7aac, (q15_t)0x7aa4, (q15_t)0x7a9d, (q15_t)0x7a96, (q15_t)0x7a8f, (q15_t)0x7a87, (q15_t)0x7a80,
+  (q15_t)0x7a79, (q15_t)0x7a72, (q15_t)0x7a6a, (q15_t)0x7a63, (q15_t)0x7a5c, (q15_t)0x7a54, (q15_t)0x7a4d, (q15_t)0x7a45,
+  (q15_t)0x7a3e, (q15_t)0x7a36, (q15_t)0x7a2f, (q15_t)0x7a27, (q15_t)0x7a20, (q15_t)0x7a18, (q15_t)0x7a11, (q15_t)0x7a09,
+  (q15_t)0x7a02, (q15_t)0x79fa, (q15_t)0x79f2, (q15_t)0x79eb, (q15_t)0x79e3, (q15_t)0x79db, (q15_t)0x79d4, (q15_t)0x79cc,
+  (q15_t)0x79c4, (q15_t)0x79bc, (q15_t)0x79b5, (q15_t)0x79ad, (q15_t)0x79a5, (q15_t)0x799d, (q15_t)0x7995, (q15_t)0x798e,
+  (q15_t)0x7986, (q15_t)0x797e, (q15_t)0x7976, (q15_t)0x796e, (q15_t)0x7966, (q15_t)0x795e, (q15_t)0x7956, (q15_t)0x794e,
+  (q15_t)0x7946, (q15_t)0x793e, (q15_t)0x7936, (q15_t)0x792e, (q15_t)0x7926, (q15_t)0x791e, (q15_t)0x7915, (q15_t)0x790d,
+  (q15_t)0x7905, (q15_t)0x78fd, (q15_t)0x78f5, (q15_t)0x78ec, (q15_t)0x78e4, (q15_t)0x78dc, (q15_t)0x78d4, (q15_t)0x78cb,
+  (q15_t)0x78c3, (q15_t)0x78bb, (q15_t)0x78b2, (q15_t)0x78aa, (q15_t)0x78a2, (q15_t)0x7899, (q15_t)0x7891, (q15_t)0x7888,
+  (q15_t)0x7880, (q15_t)0x7877, (q15_t)0x786f, (q15_t)0x7866, (q15_t)0x785e, (q15_t)0x7855, (q15_t)0x784d, (q15_t)0x7844,
+  (q15_t)0x783b, (q15_t)0x7833, (q15_t)0x782a, (q15_t)0x7821, (q15_t)0x7819, (q15_t)0x7810, (q15_t)0x7807, (q15_t)0x77ff,
+  (q15_t)0x77f6, (q15_t)0x77ed, (q15_t)0x77e4, (q15_t)0x77db, (q15_t)0x77d3, (q15_t)0x77ca, (q15_t)0x77c1, (q15_t)0x77b8,
+  (q15_t)0x77af, (q15_t)0x77a6, (q15_t)0x779d, (q15_t)0x7794, (q15_t)0x778b, (q15_t)0x7782, (q15_t)0x7779, (q15_t)0x7770,
+  (q15_t)0x7767, (q15_t)0x775e, (q15_t)0x7755, (q15_t)0x774c, (q15_t)0x7743, (q15_t)0x773a, (q15_t)0x7731, (q15_t)0x7727,
+  (q15_t)0x771e, (q15_t)0x7715, (q15_t)0x770c, (q15_t)0x7703, (q15_t)0x76f9, (q15_t)0x76f0, (q15_t)0x76e7, (q15_t)0x76dd,
+  (q15_t)0x76d4, (q15_t)0x76cb, (q15_t)0x76c1, (q15_t)0x76b8, (q15_t)0x76af, (q15_t)0x76a5, (q15_t)0x769c, (q15_t)0x7692,
+  (q15_t)0x7689, (q15_t)0x767f, (q15_t)0x7676, (q15_t)0x766c, (q15_t)0x7663, (q15_t)0x7659, (q15_t)0x7650, (q15_t)0x7646,
+  (q15_t)0x763c, (q15_t)0x7633, (q15_t)0x7629, (q15_t)0x761f, (q15_t)0x7616, (q15_t)0x760c, (q15_t)0x7602, (q15_t)0x75f9,
+  (q15_t)0x75ef, (q15_t)0x75e5, (q15_t)0x75db, (q15_t)0x75d1, (q15_t)0x75c8, (q15_t)0x75be, (q15_t)0x75b4, (q15_t)0x75aa,
+  (q15_t)0x75a0, (q15_t)0x7596, (q15_t)0x758c, (q15_t)0x7582, (q15_t)0x7578, (q15_t)0x756e, (q15_t)0x7564, (q15_t)0x755a,
+  (q15_t)0x7550, (q15_t)0x7546, (q15_t)0x753c, (q15_t)0x7532, (q15_t)0x7528, (q15_t)0x751e, (q15_t)0x7514, (q15_t)0x7509,
+  (q15_t)0x74ff, (q15_t)0x74f5, (q15_t)0x74eb, (q15_t)0x74e1, (q15_t)0x74d6, (q15_t)0x74cc, (q15_t)0x74c2, (q15_t)0x74b7,
+  (q15_t)0x74ad, (q15_t)0x74a3, (q15_t)0x7498, (q15_t)0x748e, (q15_t)0x7484, (q15_t)0x7479, (q15_t)0x746f, (q15_t)0x7464,
+  (q15_t)0x745a, (q15_t)0x744f, (q15_t)0x7445, (q15_t)0x743a, (q15_t)0x7430, (q15_t)0x7425, (q15_t)0x741b, (q15_t)0x7410,
+  (q15_t)0x7406, (q15_t)0x73fb, (q15_t)0x73f0, (q15_t)0x73e6, (q15_t)0x73db, (q15_t)0x73d0, (q15_t)0x73c6, (q15_t)0x73bb,
+  (q15_t)0x73b0, (q15_t)0x73a5, (q15_t)0x739b, (q15_t)0x7390, (q15_t)0x7385, (q15_t)0x737a, (q15_t)0x736f, (q15_t)0x7364,
+  (q15_t)0x7359, (q15_t)0x734f, (q15_t)0x7344, (q15_t)0x7339, (q15_t)0x732e, (q15_t)0x7323, (q15_t)0x7318, (q15_t)0x730d,
+  (q15_t)0x7302, (q15_t)0x72f7, (q15_t)0x72ec, (q15_t)0x72e1, (q15_t)0x72d5, (q15_t)0x72ca, (q15_t)0x72bf, (q15_t)0x72b4,
+  (q15_t)0x72a9, (q15_t)0x729e, (q15_t)0x7293, (q15_t)0x7287, (q15_t)0x727c, (q15_t)0x7271, (q15_t)0x7266, (q15_t)0x725a,
+  (q15_t)0x724f, (q15_t)0x7244, (q15_t)0x7238, (q15_t)0x722d, (q15_t)0x7222, (q15_t)0x7216, (q15_t)0x720b, (q15_t)0x71ff,
+  (q15_t)0x71f4, (q15_t)0x71e9, (q15_t)0x71dd, (q15_t)0x71d2, (q15_t)0x71c6, (q15_t)0x71bb, (q15_t)0x71af, (q15_t)0x71a3,
+  (q15_t)0x7198, (q15_t)0x718c, (q15_t)0x7181, (q15_t)0x7175, (q15_t)0x7169, (q15_t)0x715e, (q15_t)0x7152, (q15_t)0x7146,
+  (q15_t)0x713b, (q15_t)0x712f, (q15_t)0x7123, (q15_t)0x7117, (q15_t)0x710c, (q15_t)0x7100, (q15_t)0x70f4, (q15_t)0x70e8,
+  (q15_t)0x70dc, (q15_t)0x70d1, (q15_t)0x70c5, (q15_t)0x70b9, (q15_t)0x70ad, (q15_t)0x70a1, (q15_t)0x7095, (q15_t)0x7089,
+  (q15_t)0x707d, (q15_t)0x7071, (q15_t)0x7065, (q15_t)0x7059, (q15_t)0x704d, (q15_t)0x7041, (q15_t)0x7035, (q15_t)0x7029,
+  (q15_t)0x701d, (q15_t)0x7010, (q15_t)0x7004, (q15_t)0x6ff8, (q15_t)0x6fec, (q15_t)0x6fe0, (q15_t)0x6fd3, (q15_t)0x6fc7,
+  (q15_t)0x6fbb, (q15_t)0x6faf, (q15_t)0x6fa2, (q15_t)0x6f96, (q15_t)0x6f8a, (q15_t)0x6f7d, (q15_t)0x6f71, (q15_t)0x6f65,
+  (q15_t)0x6f58, (q15_t)0x6f4c, (q15_t)0x6f3f, (q15_t)0x6f33, (q15_t)0x6f27, (q15_t)0x6f1a, (q15_t)0x6f0e, (q15_t)0x6f01,
+  (q15_t)0x6ef5, (q15_t)0x6ee8, (q15_t)0x6edc, (q15_t)0x6ecf, (q15_t)0x6ec2, (q15_t)0x6eb6, (q15_t)0x6ea9, (q15_t)0x6e9c,
+  (q15_t)0x6e90, (q15_t)0x6e83, (q15_t)0x6e76, (q15_t)0x6e6a, (q15_t)0x6e5d, (q15_t)0x6e50, (q15_t)0x6e44, (q15_t)0x6e37,
+  (q15_t)0x6e2a, (q15_t)0x6e1d, (q15_t)0x6e10, (q15_t)0x6e04, (q15_t)0x6df7, (q15_t)0x6dea, (q15_t)0x6ddd, (q15_t)0x6dd0,
+  (q15_t)0x6dc3, (q15_t)0x6db6, (q15_t)0x6da9, (q15_t)0x6d9c, (q15_t)0x6d8f, (q15_t)0x6d82, (q15_t)0x6d75, (q15_t)0x6d68,
+  (q15_t)0x6d5b, (q15_t)0x6d4e, (q15_t)0x6d41, (q15_t)0x6d34, (q15_t)0x6d27, (q15_t)0x6d1a, (q15_t)0x6d0c, (q15_t)0x6cff,
+  (q15_t)0x6cf2, (q15_t)0x6ce5, (q15_t)0x6cd8, (q15_t)0x6cca, (q15_t)0x6cbd, (q15_t)0x6cb0, (q15_t)0x6ca3, (q15_t)0x6c95,
+  (q15_t)0x6c88, (q15_t)0x6c7b, (q15_t)0x6c6d, (q15_t)0x6c60, (q15_t)0x6c53, (q15_t)0x6c45, (q15_t)0x6c38, (q15_t)0x6c2a,
+  (q15_t)0x6c1d, (q15_t)0x6c0f, (q15_t)0x6c02, (q15_t)0x6bf5, (q15_t)0x6be7, (q15_t)0x6bd9, (q15_t)0x6bcc, (q15_t)0x6bbe,
+  (q15_t)0x6bb1, (q15_t)0x6ba3, (q15_t)0x6b96, (q15_t)0x6b88, (q15_t)0x6b7a, (q15_t)0x6b6d, (q15_t)0x6b5f, (q15_t)0x6b51,
+  (q15_t)0x6b44, (q15_t)0x6b36, (q15_t)0x6b28, (q15_t)0x6b1a, (q15_t)0x6b0d, (q15_t)0x6aff, (q15_t)0x6af1, (q15_t)0x6ae3,
+  (q15_t)0x6ad5, (q15_t)0x6ac8, (q15_t)0x6aba, (q15_t)0x6aac, (q15_t)0x6a9e, (q15_t)0x6a90, (q15_t)0x6a82, (q15_t)0x6a74,
+  (q15_t)0x6a66, (q15_t)0x6a58, (q15_t)0x6a4a, (q15_t)0x6a3c, (q15_t)0x6a2e, (q15_t)0x6a20, (q15_t)0x6a12, (q15_t)0x6a04,
+  (q15_t)0x69f6, (q15_t)0x69e8, (q15_t)0x69da, (q15_t)0x69cb, (q15_t)0x69bd, (q15_t)0x69af, (q15_t)0x69a1, (q15_t)0x6993,
+  (q15_t)0x6985, (q15_t)0x6976, (q15_t)0x6968, (q15_t)0x695a, (q15_t)0x694b, (q15_t)0x693d, (q15_t)0x692f, (q15_t)0x6921,
+  (q15_t)0x6912, (q15_t)0x6904, (q15_t)0x68f5, (q15_t)0x68e7, (q15_t)0x68d9, (q15_t)0x68ca, (q15_t)0x68bc, (q15_t)0x68ad,
+  (q15_t)0x689f, (q15_t)0x6890, (q15_t)0x6882, (q15_t)0x6873, (q15_t)0x6865, (q15_t)0x6856, (q15_t)0x6848, (q15_t)0x6839,
+  (q15_t)0x682b, (q15_t)0x681c, (q15_t)0x680d, (q15_t)0x67ff, (q15_t)0x67f0, (q15_t)0x67e1, (q15_t)0x67d3, (q15_t)0x67c4,
+  (q15_t)0x67b5, (q15_t)0x67a6, (q15_t)0x6798, (q15_t)0x6789, (q15_t)0x677a, (q15_t)0x676b, (q15_t)0x675d, (q15_t)0x674e,
+  (q15_t)0x673f, (q15_t)0x6730, (q15_t)0x6721, (q15_t)0x6712, (q15_t)0x6703, (q15_t)0x66f4, (q15_t)0x66e5, (q15_t)0x66d6,
+  (q15_t)0x66c8, (q15_t)0x66b9, (q15_t)0x66aa, (q15_t)0x669b, (q15_t)0x668b, (q15_t)0x667c, (q15_t)0x666d, (q15_t)0x665e,
+  (q15_t)0x664f, (q15_t)0x6640, (q15_t)0x6631, (q15_t)0x6622, (q15_t)0x6613, (q15_t)0x6603, (q15_t)0x65f4, (q15_t)0x65e5,
+  (q15_t)0x65d6, (q15_t)0x65c7, (q15_t)0x65b7, (q15_t)0x65a8, (q15_t)0x6599, (q15_t)0x658a, (q15_t)0x657a, (q15_t)0x656b,
+  (q15_t)0x655c, (q15_t)0x654c, (q15_t)0x653d, (q15_t)0x652d, (q15_t)0x651e, (q15_t)0x650f, (q15_t)0x64ff, (q15_t)0x64f0,
+  (q15_t)0x64e0, (q15_t)0x64d1, (q15_t)0x64c1, (q15_t)0x64b2, (q15_t)0x64a2, (q15_t)0x6493, (q15_t)0x6483, (q15_t)0x6474,
+  (q15_t)0x6464, (q15_t)0x6454, (q15_t)0x6445, (q15_t)0x6435, (q15_t)0x6426, (q15_t)0x6416, (q15_t)0x6406, (q15_t)0x63f7,
+  (q15_t)0x63e7, (q15_t)0x63d7, (q15_t)0x63c7, (q15_t)0x63b8, (q15_t)0x63a8, (q15_t)0x6398, (q15_t)0x6388, (q15_t)0x6378,
+  (q15_t)0x6369, (q15_t)0x6359, (q15_t)0x6349, (q15_t)0x6339, (q15_t)0x6329, (q15_t)0x6319, (q15_t)0x6309, (q15_t)0x62f9,
+  (q15_t)0x62ea, (q15_t)0x62da, (q15_t)0x62ca, (q15_t)0x62ba, (q15_t)0x62aa, (q15_t)0x629a, (q15_t)0x628a, (q15_t)0x627a,
+  (q15_t)0x6269, (q15_t)0x6259, (q15_t)0x6249, (q15_t)0x6239, (q15_t)0x6229, (q15_t)0x6219, (q15_t)0x6209, (q15_t)0x61f9,
+  (q15_t)0x61e8, (q15_t)0x61d8, (q15_t)0x61c8, (q15_t)0x61b8, (q15_t)0x61a8, (q15_t)0x6197, (q15_t)0x6187, (q15_t)0x6177,
+  (q15_t)0x6166, (q15_t)0x6156, (q15_t)0x6146, (q15_t)0x6135, (q15_t)0x6125, (q15_t)0x6115, (q15_t)0x6104, (q15_t)0x60f4,
+  (q15_t)0x60e4, (q15_t)0x60d3, (q15_t)0x60c3, (q15_t)0x60b2, (q15_t)0x60a2, (q15_t)0x6091, (q15_t)0x6081, (q15_t)0x6070,
+  (q15_t)0x6060, (q15_t)0x604f, (q15_t)0x603f, (q15_t)0x602e, (q15_t)0x601d, (q15_t)0x600d, (q15_t)0x5ffc, (q15_t)0x5fec,
+  (q15_t)0x5fdb, (q15_t)0x5fca, (q15_t)0x5fba, (q15_t)0x5fa9, (q15_t)0x5f98, (q15_t)0x5f87, (q15_t)0x5f77, (q15_t)0x5f66,
+  (q15_t)0x5f55, (q15_t)0x5f44, (q15_t)0x5f34, (q15_t)0x5f23, (q15_t)0x5f12, (q15_t)0x5f01, (q15_t)0x5ef0, (q15_t)0x5edf,
+  (q15_t)0x5ecf, (q15_t)0x5ebe, (q15_t)0x5ead, (q15_t)0x5e9c, (q15_t)0x5e8b, (q15_t)0x5e7a, (q15_t)0x5e69, (q15_t)0x5e58,
+  (q15_t)0x5e47, (q15_t)0x5e36, (q15_t)0x5e25, (q15_t)0x5e14, (q15_t)0x5e03, (q15_t)0x5df2, (q15_t)0x5de1, (q15_t)0x5dd0,
+  (q15_t)0x5dbf, (q15_t)0x5dad, (q15_t)0x5d9c, (q15_t)0x5d8b, (q15_t)0x5d7a, (q15_t)0x5d69, (q15_t)0x5d58, (q15_t)0x5d46,
+  (q15_t)0x5d35, (q15_t)0x5d24, (q15_t)0x5d13, (q15_t)0x5d01, (q15_t)0x5cf0, (q15_t)0x5cdf, (q15_t)0x5cce, (q15_t)0x5cbc,
+  (q15_t)0x5cab, (q15_t)0x5c9a, (q15_t)0x5c88, (q15_t)0x5c77, (q15_t)0x5c66, (q15_t)0x5c54, (q15_t)0x5c43, (q15_t)0x5c31,
+  (q15_t)0x5c20, (q15_t)0x5c0e, (q15_t)0x5bfd, (q15_t)0x5beb, (q15_t)0x5bda, (q15_t)0x5bc8, (q15_t)0x5bb7, (q15_t)0x5ba5,
+  (q15_t)0x5b94, (q15_t)0x5b82, (q15_t)0x5b71, (q15_t)0x5b5f, (q15_t)0x5b4d, (q15_t)0x5b3c, (q15_t)0x5b2a, (q15_t)0x5b19,
+  (q15_t)0x5b07, (q15_t)0x5af5, (q15_t)0x5ae4, (q15_t)0x5ad2, (q15_t)0x5ac0, (q15_t)0x5aae, (q15_t)0x5a9d, (q15_t)0x5a8b,
+  (q15_t)0x5a79, (q15_t)0x5a67, (q15_t)0x5a56, (q15_t)0x5a44, (q15_t)0x5a32, (q15_t)0x5a20, (q15_t)0x5a0e, (q15_t)0x59fc,
+  (q15_t)0x59ea, (q15_t)0x59d9, (q15_t)0x59c7, (q15_t)0x59b5, (q15_t)0x59a3, (q15_t)0x5991, (q15_t)0x597f, (q15_t)0x596d,
+  (q15_t)0x595b, (q15_t)0x5949, (q15_t)0x5937, (q15_t)0x5925, (q15_t)0x5913, (q15_t)0x5901, (q15_t)0x58ef, (q15_t)0x58dd,
+  (q15_t)0x58cb, (q15_t)0x58b8, (q15_t)0x58a6, (q15_t)0x5894, (q15_t)0x5882, (q15_t)0x5870, (q15_t)0x585e, (q15_t)0x584b,
+  (q15_t)0x5839, (q15_t)0x5827, (q15_t)0x5815, (q15_t)0x5803, (q15_t)0x57f0, (q15_t)0x57de, (q15_t)0x57cc, (q15_t)0x57b9,
+  (q15_t)0x57a7, (q15_t)0x5795, (q15_t)0x5783, (q15_t)0x5770, (q15_t)0x575e, (q15_t)0x574b, (q15_t)0x5739, (q15_t)0x5727,
+  (q15_t)0x5714, (q15_t)0x5702, (q15_t)0x56ef, (q15_t)0x56dd, (q15_t)0x56ca, (q15_t)0x56b8, (q15_t)0x56a5, (q15_t)0x5693,
+  (q15_t)0x5680, (q15_t)0x566e, (q15_t)0x565b, (q15_t)0x5649, (q15_t)0x5636, (q15_t)0x5624, (q15_t)0x5611, (q15_t)0x55fe,
+  (q15_t)0x55ec, (q15_t)0x55d9, (q15_t)0x55c7, (q15_t)0x55b4, (q15_t)0x55a1, (q15_t)0x558f, (q15_t)0x557c, (q15_t)0x5569,
+  (q15_t)0x5556, (q15_t)0x5544, (q15_t)0x5531, (q15_t)0x551e, (q15_t)0x550b, (q15_t)0x54f9, (q15_t)0x54e6, (q15_t)0x54d3,
+  (q15_t)0x54c0, (q15_t)0x54ad, (q15_t)0x549a, (q15_t)0x5488, (q15_t)0x5475, (q15_t)0x5462, (q15_t)0x544f, (q15_t)0x543c,
+  (q15_t)0x5429, (q15_t)0x5416, (q15_t)0x5403, (q15_t)0x53f0, (q15_t)0x53dd, (q15_t)0x53ca, (q15_t)0x53b7, (q15_t)0x53a4,
+  (q15_t)0x5391, (q15_t)0x537e, (q15_t)0x536b, (q15_t)0x5358, (q15_t)0x5345, (q15_t)0x5332, (q15_t)0x531f, (q15_t)0x530c,
+  (q15_t)0x52f8, (q15_t)0x52e5, (q15_t)0x52d2, (q15_t)0x52bf, (q15_t)0x52ac, (q15_t)0x5299, (q15_t)0x5285, (q15_t)0x5272,
+  (q15_t)0x525f, (q15_t)0x524c, (q15_t)0x5238, (q15_t)0x5225, (q15_t)0x5212, (q15_t)0x51ff, (q15_t)0x51eb, (q15_t)0x51d8,
+  (q15_t)0x51c5, (q15_t)0x51b1, (q15_t)0x519e, (q15_t)0x518b, (q15_t)0x5177, (q15_t)0x5164, (q15_t)0x5150, (q15_t)0x513d,
+  (q15_t)0x512a, (q15_t)0x5116, (q15_t)0x5103, (q15_t)0x50ef, (q15_t)0x50dc, (q15_t)0x50c8, (q15_t)0x50b5, (q15_t)0x50a1,
+  (q15_t)0x508e, (q15_t)0x507a, (q15_t)0x5067, (q15_t)0x5053, (q15_t)0x503f, (q15_t)0x502c, (q15_t)0x5018, (q15_t)0x5005,
+  (q15_t)0x4ff1, (q15_t)0x4fdd, (q15_t)0x4fca, (q15_t)0x4fb6, (q15_t)0x4fa2, (q15_t)0x4f8f, (q15_t)0x4f7b, (q15_t)0x4f67,
+  (q15_t)0x4f54, (q15_t)0x4f40, (q15_t)0x4f2c, (q15_t)0x4f18, (q15_t)0x4f05, (q15_t)0x4ef1, (q15_t)0x4edd, (q15_t)0x4ec9,
+  (q15_t)0x4eb6, (q15_t)0x4ea2, (q15_t)0x4e8e, (q15_t)0x4e7a, (q15_t)0x4e66, (q15_t)0x4e52, (q15_t)0x4e3e, (q15_t)0x4e2a,
+  (q15_t)0x4e17, (q15_t)0x4e03, (q15_t)0x4def, (q15_t)0x4ddb, (q15_t)0x4dc7, (q15_t)0x4db3, (q15_t)0x4d9f, (q15_t)0x4d8b,
+  (q15_t)0x4d77, (q15_t)0x4d63, (q15_t)0x4d4f, (q15_t)0x4d3b, (q15_t)0x4d27, (q15_t)0x4d13, (q15_t)0x4cff, (q15_t)0x4ceb,
+  (q15_t)0x4cd6, (q15_t)0x4cc2, (q15_t)0x4cae, (q15_t)0x4c9a, (q15_t)0x4c86, (q15_t)0x4c72, (q15_t)0x4c5e, (q15_t)0x4c49,
+  (q15_t)0x4c35, (q15_t)0x4c21, (q15_t)0x4c0d, (q15_t)0x4bf9, (q15_t)0x4be4, (q15_t)0x4bd0, (q15_t)0x4bbc, (q15_t)0x4ba8,
+  (q15_t)0x4b93, (q15_t)0x4b7f, (q15_t)0x4b6b, (q15_t)0x4b56, (q15_t)0x4b42, (q15_t)0x4b2e, (q15_t)0x4b19, (q15_t)0x4b05,
+  (q15_t)0x4af1, (q15_t)0x4adc, (q15_t)0x4ac8, (q15_t)0x4ab4, (q15_t)0x4a9f, (q15_t)0x4a8b, (q15_t)0x4a76, (q15_t)0x4a62,
+  (q15_t)0x4a4d, (q15_t)0x4a39, (q15_t)0x4a24, (q15_t)0x4a10, (q15_t)0x49fb, (q15_t)0x49e7, (q15_t)0x49d2, (q15_t)0x49be,
+  (q15_t)0x49a9, (q15_t)0x4995, (q15_t)0x4980, (q15_t)0x496c, (q15_t)0x4957, (q15_t)0x4942, (q15_t)0x492e, (q15_t)0x4919,
+  (q15_t)0x4905, (q15_t)0x48f0, (q15_t)0x48db, (q15_t)0x48c7, (q15_t)0x48b2, (q15_t)0x489d, (q15_t)0x4888, (q15_t)0x4874,
+  (q15_t)0x485f, (q15_t)0x484a, (q15_t)0x4836, (q15_t)0x4821, (q15_t)0x480c, (q15_t)0x47f7, (q15_t)0x47e2, (q15_t)0x47ce,
+  (q15_t)0x47b9, (q15_t)0x47a4, (q15_t)0x478f, (q15_t)0x477a, (q15_t)0x4765, (q15_t)0x4751, (q15_t)0x473c, (q15_t)0x4727,
+  (q15_t)0x4712, (q15_t)0x46fd, (q15_t)0x46e8, (q15_t)0x46d3, (q15_t)0x46be, (q15_t)0x46a9, (q15_t)0x4694, (q15_t)0x467f,
+  (q15_t)0x466a, (q15_t)0x4655, (q15_t)0x4640, (q15_t)0x462b, (q15_t)0x4616, (q15_t)0x4601, (q15_t)0x45ec, (q15_t)0x45d7,
+  (q15_t)0x45c2, (q15_t)0x45ad, (q15_t)0x4598, (q15_t)0x4583, (q15_t)0x456e, (q15_t)0x4559, (q15_t)0x4544, (q15_t)0x452e,
+  (q15_t)0x4519, (q15_t)0x4504, (q15_t)0x44ef, (q15_t)0x44da, (q15_t)0x44c5, (q15_t)0x44af, (q15_t)0x449a, (q15_t)0x4485,
+  (q15_t)0x4470, (q15_t)0x445a, (q15_t)0x4445, (q15_t)0x4430, (q15_t)0x441b, (q15_t)0x4405, (q15_t)0x43f0, (q15_t)0x43db,
+  (q15_t)0x43c5, (q15_t)0x43b0, (q15_t)0x439b, (q15_t)0x4385, (q15_t)0x4370, (q15_t)0x435b, (q15_t)0x4345, (q15_t)0x4330,
+  (q15_t)0x431b, (q15_t)0x4305, (q15_t)0x42f0, (q15_t)0x42da, (q15_t)0x42c5, (q15_t)0x42af, (q15_t)0x429a, (q15_t)0x4284,
+  (q15_t)0x426f, (q15_t)0x425a, (q15_t)0x4244, (q15_t)0x422f, (q15_t)0x4219, (q15_t)0x4203, (q15_t)0x41ee, (q15_t)0x41d8,
+  (q15_t)0x41c3, (q15_t)0x41ad, (q15_t)0x4198, (q15_t)0x4182, (q15_t)0x416d, (q15_t)0x4157, (q15_t)0x4141, (q15_t)0x412c,
+  (q15_t)0x4116, (q15_t)0x4100, (q15_t)0x40eb, (q15_t)0x40d5, (q15_t)0x40bf, (q15_t)0x40aa, (q15_t)0x4094, (q15_t)0x407e,
+  (q15_t)0x4069, (q15_t)0x4053, (q15_t)0x403d, (q15_t)0x4027, (q15_t)0x4012, (q15_t)0x3ffc, (q15_t)0x3fe6, (q15_t)0x3fd0,
+  (q15_t)0x3fbb, (q15_t)0x3fa5, (q15_t)0x3f8f, (q15_t)0x3f79, (q15_t)0x3f63, (q15_t)0x3f4d, (q15_t)0x3f38, (q15_t)0x3f22,
+  (q15_t)0x3f0c, (q15_t)0x3ef6, (q15_t)0x3ee0, (q15_t)0x3eca, (q15_t)0x3eb4, (q15_t)0x3e9e, (q15_t)0x3e88, (q15_t)0x3e73,
+  (q15_t)0x3e5d, (q15_t)0x3e47, (q15_t)0x3e31, (q15_t)0x3e1b, (q15_t)0x3e05, (q15_t)0x3def, (q15_t)0x3dd9, (q15_t)0x3dc3,
+  (q15_t)0x3dad, (q15_t)0x3d97, (q15_t)0x3d81, (q15_t)0x3d6b, (q15_t)0x3d55, (q15_t)0x3d3e, (q15_t)0x3d28, (q15_t)0x3d12,
+  (q15_t)0x3cfc, (q15_t)0x3ce6, (q15_t)0x3cd0, (q15_t)0x3cba, (q15_t)0x3ca4, (q15_t)0x3c8e, (q15_t)0x3c77, (q15_t)0x3c61,
+  (q15_t)0x3c4b, (q15_t)0x3c35, (q15_t)0x3c1f, (q15_t)0x3c09, (q15_t)0x3bf2, (q15_t)0x3bdc, (q15_t)0x3bc6, (q15_t)0x3bb0,
+  (q15_t)0x3b99, (q15_t)0x3b83, (q15_t)0x3b6d, (q15_t)0x3b57, (q15_t)0x3b40, (q15_t)0x3b2a, (q15_t)0x3b14, (q15_t)0x3afe,
+  (q15_t)0x3ae7, (q15_t)0x3ad1, (q15_t)0x3abb, (q15_t)0x3aa4, (q15_t)0x3a8e, (q15_t)0x3a78, (q15_t)0x3a61, (q15_t)0x3a4b,
+  (q15_t)0x3a34, (q15_t)0x3a1e, (q15_t)0x3a08, (q15_t)0x39f1, (q15_t)0x39db, (q15_t)0x39c4, (q15_t)0x39ae, (q15_t)0x3998,
+  (q15_t)0x3981, (q15_t)0x396b, (q15_t)0x3954, (q15_t)0x393e, (q15_t)0x3927, (q15_t)0x3911, (q15_t)0x38fa, (q15_t)0x38e4,
+  (q15_t)0x38cd, (q15_t)0x38b7, (q15_t)0x38a0, (q15_t)0x388a, (q15_t)0x3873, (q15_t)0x385d, (q15_t)0x3846, (q15_t)0x382f,
+  (q15_t)0x3819, (q15_t)0x3802, (q15_t)0x37ec, (q15_t)0x37d5, (q15_t)0x37be, (q15_t)0x37a8, (q15_t)0x3791, (q15_t)0x377a,
+  (q15_t)0x3764, (q15_t)0x374d, (q15_t)0x3736, (q15_t)0x3720, (q15_t)0x3709, (q15_t)0x36f2, (q15_t)0x36dc, (q15_t)0x36c5,
+  (q15_t)0x36ae, (q15_t)0x3698, (q15_t)0x3681, (q15_t)0x366a, (q15_t)0x3653, (q15_t)0x363d, (q15_t)0x3626, (q15_t)0x360f,
+  (q15_t)0x35f8, (q15_t)0x35e1, (q15_t)0x35cb, (q15_t)0x35b4, (q15_t)0x359d, (q15_t)0x3586, (q15_t)0x356f, (q15_t)0x3558,
+  (q15_t)0x3542, (q15_t)0x352b, (q15_t)0x3514, (q15_t)0x34fd, (q15_t)0x34e6, (q15_t)0x34cf, (q15_t)0x34b8, (q15_t)0x34a1,
+  (q15_t)0x348b, (q15_t)0x3474, (q15_t)0x345d, (q15_t)0x3446, (q15_t)0x342f, (q15_t)0x3418, (q15_t)0x3401, (q15_t)0x33ea,
+  (q15_t)0x33d3, (q15_t)0x33bc, (q15_t)0x33a5, (q15_t)0x338e, (q15_t)0x3377, (q15_t)0x3360, (q15_t)0x3349, (q15_t)0x3332,
+  (q15_t)0x331b, (q15_t)0x3304, (q15_t)0x32ed, (q15_t)0x32d6, (q15_t)0x32bf, (q15_t)0x32a8, (q15_t)0x3290, (q15_t)0x3279,
+  (q15_t)0x3262, (q15_t)0x324b, (q15_t)0x3234, (q15_t)0x321d, (q15_t)0x3206, (q15_t)0x31ef, (q15_t)0x31d8, (q15_t)0x31c0,
+  (q15_t)0x31a9, (q15_t)0x3192, (q15_t)0x317b, (q15_t)0x3164, (q15_t)0x314c, (q15_t)0x3135, (q15_t)0x311e, (q15_t)0x3107,
+  (q15_t)0x30f0, (q15_t)0x30d8, (q15_t)0x30c1, (q15_t)0x30aa, (q15_t)0x3093, (q15_t)0x307b, (q15_t)0x3064, (q15_t)0x304d,
+  (q15_t)0x3036, (q15_t)0x301e, (q15_t)0x3007, (q15_t)0x2ff0, (q15_t)0x2fd8, (q15_t)0x2fc1, (q15_t)0x2faa, (q15_t)0x2f92,
+  (q15_t)0x2f7b, (q15_t)0x2f64, (q15_t)0x2f4c, (q15_t)0x2f35, (q15_t)0x2f1e, (q15_t)0x2f06, (q15_t)0x2eef, (q15_t)0x2ed8,
+  (q15_t)0x2ec0, (q15_t)0x2ea9, (q15_t)0x2e91, (q15_t)0x2e7a, (q15_t)0x2e63, (q15_t)0x2e4b, (q15_t)0x2e34, (q15_t)0x2e1c,
+  (q15_t)0x2e05, (q15_t)0x2ded, (q15_t)0x2dd6, (q15_t)0x2dbe, (q15_t)0x2da7, (q15_t)0x2d8f, (q15_t)0x2d78, (q15_t)0x2d60,
+  (q15_t)0x2d49, (q15_t)0x2d31, (q15_t)0x2d1a, (q15_t)0x2d02, (q15_t)0x2ceb, (q15_t)0x2cd3, (q15_t)0x2cbc, (q15_t)0x2ca4,
+  (q15_t)0x2c8d, (q15_t)0x2c75, (q15_t)0x2c5e, (q15_t)0x2c46, (q15_t)0x2c2e, (q15_t)0x2c17, (q15_t)0x2bff, (q15_t)0x2be8,
+  (q15_t)0x2bd0, (q15_t)0x2bb8, (q15_t)0x2ba1, (q15_t)0x2b89, (q15_t)0x2b71, (q15_t)0x2b5a, (q15_t)0x2b42, (q15_t)0x2b2b,
+  (q15_t)0x2b13, (q15_t)0x2afb, (q15_t)0x2ae4, (q15_t)0x2acc, (q15_t)0x2ab4, (q15_t)0x2a9c, (q15_t)0x2a85, (q15_t)0x2a6d,
+  (q15_t)0x2a55, (q15_t)0x2a3e, (q15_t)0x2a26, (q15_t)0x2a0e, (q15_t)0x29f6, (q15_t)0x29df, (q15_t)0x29c7, (q15_t)0x29af,
+  (q15_t)0x2997, (q15_t)0x2980, (q15_t)0x2968, (q15_t)0x2950, (q15_t)0x2938, (q15_t)0x2920, (q15_t)0x2909, (q15_t)0x28f1,
+  (q15_t)0x28d9, (q15_t)0x28c1, (q15_t)0x28a9, (q15_t)0x2892, (q15_t)0x287a, (q15_t)0x2862, (q15_t)0x284a, (q15_t)0x2832,
+  (q15_t)0x281a, (q15_t)0x2802, (q15_t)0x27eb, (q15_t)0x27d3, (q15_t)0x27bb, (q15_t)0x27a3, (q15_t)0x278b, (q15_t)0x2773,
+  (q15_t)0x275b, (q15_t)0x2743, (q15_t)0x272b, (q15_t)0x2713, (q15_t)0x26fb, (q15_t)0x26e4, (q15_t)0x26cc, (q15_t)0x26b4,
+  (q15_t)0x269c, (q15_t)0x2684, (q15_t)0x266c, (q15_t)0x2654, (q15_t)0x263c, (q15_t)0x2624, (q15_t)0x260c, (q15_t)0x25f4,
+  (q15_t)0x25dc, (q15_t)0x25c4, (q15_t)0x25ac, (q15_t)0x2594, (q15_t)0x257c, (q15_t)0x2564, (q15_t)0x254c, (q15_t)0x2534,
+  (q15_t)0x251c, (q15_t)0x2503, (q15_t)0x24eb, (q15_t)0x24d3, (q15_t)0x24bb, (q15_t)0x24a3, (q15_t)0x248b, (q15_t)0x2473,
+  (q15_t)0x245b, (q15_t)0x2443, (q15_t)0x242b, (q15_t)0x2413, (q15_t)0x23fa, (q15_t)0x23e2, (q15_t)0x23ca, (q15_t)0x23b2,
+  (q15_t)0x239a, (q15_t)0x2382, (q15_t)0x236a, (q15_t)0x2352, (q15_t)0x2339, (q15_t)0x2321, (q15_t)0x2309, (q15_t)0x22f1,
+  (q15_t)0x22d9, (q15_t)0x22c0, (q15_t)0x22a8, (q15_t)0x2290, (q15_t)0x2278, (q15_t)0x2260, (q15_t)0x2247, (q15_t)0x222f,
+  (q15_t)0x2217, (q15_t)0x21ff, (q15_t)0x21e7, (q15_t)0x21ce, (q15_t)0x21b6, (q15_t)0x219e, (q15_t)0x2186, (q15_t)0x216d,
+  (q15_t)0x2155, (q15_t)0x213d, (q15_t)0x2125, (q15_t)0x210c, (q15_t)0x20f4, (q15_t)0x20dc, (q15_t)0x20c3, (q15_t)0x20ab,
+  (q15_t)0x2093, (q15_t)0x207a, (q15_t)0x2062, (q15_t)0x204a, (q15_t)0x2032, (q15_t)0x2019, (q15_t)0x2001, (q15_t)0x1fe9,
+  (q15_t)0x1fd0, (q15_t)0x1fb8, (q15_t)0x1f9f, (q15_t)0x1f87, (q15_t)0x1f6f, (q15_t)0x1f56, (q15_t)0x1f3e, (q15_t)0x1f26,
+  (q15_t)0x1f0d, (q15_t)0x1ef5, (q15_t)0x1edd, (q15_t)0x1ec4, (q15_t)0x1eac, (q15_t)0x1e93, (q15_t)0x1e7b, (q15_t)0x1e62,
+  (q15_t)0x1e4a, (q15_t)0x1e32, (q15_t)0x1e19, (q15_t)0x1e01, (q15_t)0x1de8, (q15_t)0x1dd0, (q15_t)0x1db7, (q15_t)0x1d9f,
+  (q15_t)0x1d87, (q15_t)0x1d6e, (q15_t)0x1d56, (q15_t)0x1d3d, (q15_t)0x1d25, (q15_t)0x1d0c, (q15_t)0x1cf4, (q15_t)0x1cdb,
+  (q15_t)0x1cc3, (q15_t)0x1caa, (q15_t)0x1c92, (q15_t)0x1c79, (q15_t)0x1c61, (q15_t)0x1c48, (q15_t)0x1c30, (q15_t)0x1c17,
+  (q15_t)0x1bff, (q15_t)0x1be6, (q15_t)0x1bce, (q15_t)0x1bb5, (q15_t)0x1b9d, (q15_t)0x1b84, (q15_t)0x1b6c, (q15_t)0x1b53,
+  (q15_t)0x1b3a, (q15_t)0x1b22, (q15_t)0x1b09, (q15_t)0x1af1, (q15_t)0x1ad8, (q15_t)0x1ac0, (q15_t)0x1aa7, (q15_t)0x1a8e,
+  (q15_t)0x1a76, (q15_t)0x1a5d, (q15_t)0x1a45, (q15_t)0x1a2c, (q15_t)0x1a13, (q15_t)0x19fb, (q15_t)0x19e2, (q15_t)0x19ca,
+  (q15_t)0x19b1, (q15_t)0x1998, (q15_t)0x1980, (q15_t)0x1967, (q15_t)0x194e, (q15_t)0x1936, (q15_t)0x191d, (q15_t)0x1905,
+  (q15_t)0x18ec, (q15_t)0x18d3, (q15_t)0x18bb, (q15_t)0x18a2, (q15_t)0x1889, (q15_t)0x1871, (q15_t)0x1858, (q15_t)0x183f,
+  (q15_t)0x1827, (q15_t)0x180e, (q15_t)0x17f5, (q15_t)0x17dd, (q15_t)0x17c4, (q15_t)0x17ab, (q15_t)0x1792, (q15_t)0x177a,
+  (q15_t)0x1761, (q15_t)0x1748, (q15_t)0x1730, (q15_t)0x1717, (q15_t)0x16fe, (q15_t)0x16e5, (q15_t)0x16cd, (q15_t)0x16b4,
+  (q15_t)0x169b, (q15_t)0x1682, (q15_t)0x166a, (q15_t)0x1651, (q15_t)0x1638, (q15_t)0x161f, (q15_t)0x1607, (q15_t)0x15ee,
+  (q15_t)0x15d5, (q15_t)0x15bc, (q15_t)0x15a4, (q15_t)0x158b, (q15_t)0x1572, (q15_t)0x1559, (q15_t)0x1541, (q15_t)0x1528,
+  (q15_t)0x150f, (q15_t)0x14f6, (q15_t)0x14dd, (q15_t)0x14c5, (q15_t)0x14ac, (q15_t)0x1493, (q15_t)0x147a, (q15_t)0x1461,
+  (q15_t)0x1449, (q15_t)0x1430, (q15_t)0x1417, (q15_t)0x13fe, (q15_t)0x13e5, (q15_t)0x13cc, (q15_t)0x13b4, (q15_t)0x139b,
+  (q15_t)0x1382, (q15_t)0x1369, (q15_t)0x1350, (q15_t)0x1337, (q15_t)0x131f, (q15_t)0x1306, (q15_t)0x12ed, (q15_t)0x12d4,
+  (q15_t)0x12bb, (q15_t)0x12a2, (q15_t)0x1289, (q15_t)0x1271, (q15_t)0x1258, (q15_t)0x123f, (q15_t)0x1226, (q15_t)0x120d,
+  (q15_t)0x11f4, (q15_t)0x11db, (q15_t)0x11c2, (q15_t)0x11a9, (q15_t)0x1191, (q15_t)0x1178, (q15_t)0x115f, (q15_t)0x1146,
+  (q15_t)0x112d, (q15_t)0x1114, (q15_t)0x10fb, (q15_t)0x10e2, (q15_t)0x10c9, (q15_t)0x10b0, (q15_t)0x1098, (q15_t)0x107f,
+  (q15_t)0x1066, (q15_t)0x104d, (q15_t)0x1034, (q15_t)0x101b, (q15_t)0x1002, (q15_t)0xfe9, (q15_t)0xfd0, (q15_t)0xfb7,
+  (q15_t)0xf9e, (q15_t)0xf85, (q15_t)0xf6c, (q15_t)0xf53, (q15_t)0xf3a, (q15_t)0xf21, (q15_t)0xf08, (q15_t)0xef0,
+  (q15_t)0xed7, (q15_t)0xebe, (q15_t)0xea5, (q15_t)0xe8c, (q15_t)0xe73, (q15_t)0xe5a, (q15_t)0xe41, (q15_t)0xe28,
+  (q15_t)0xe0f, (q15_t)0xdf6, (q15_t)0xddd, (q15_t)0xdc4, (q15_t)0xdab, (q15_t)0xd92, (q15_t)0xd79, (q15_t)0xd60,
+  (q15_t)0xd47, (q15_t)0xd2e, (q15_t)0xd15, (q15_t)0xcfc, (q15_t)0xce3, (q15_t)0xcca, (q15_t)0xcb1, (q15_t)0xc98,
+  (q15_t)0xc7f, (q15_t)0xc66, (q15_t)0xc4d, (q15_t)0xc34, (q15_t)0xc1b, (q15_t)0xc02, (q15_t)0xbe9, (q15_t)0xbd0,
+  (q15_t)0xbb7, (q15_t)0xb9e, (q15_t)0xb85, (q15_t)0xb6c, (q15_t)0xb53, (q15_t)0xb3a, (q15_t)0xb20, (q15_t)0xb07,
+  (q15_t)0xaee, (q15_t)0xad5, (q15_t)0xabc, (q15_t)0xaa3, (q15_t)0xa8a, (q15_t)0xa71, (q15_t)0xa58, (q15_t)0xa3f,
+  (q15_t)0xa26, (q15_t)0xa0d, (q15_t)0x9f4, (q15_t)0x9db, (q15_t)0x9c2, (q15_t)0x9a9, (q15_t)0x990, (q15_t)0x977,
+  (q15_t)0x95e, (q15_t)0x944, (q15_t)0x92b, (q15_t)0x912, (q15_t)0x8f9, (q15_t)0x8e0, (q15_t)0x8c7, (q15_t)0x8ae,
+  (q15_t)0x895, (q15_t)0x87c, (q15_t)0x863, (q15_t)0x84a, (q15_t)0x831, (q15_t)0x818, (q15_t)0x7fe, (q15_t)0x7e5,
+  (q15_t)0x7cc, (q15_t)0x7b3, (q15_t)0x79a, (q15_t)0x781, (q15_t)0x768, (q15_t)0x74f, (q15_t)0x736, (q15_t)0x71d,
+  (q15_t)0x704, (q15_t)0x6ea, (q15_t)0x6d1, (q15_t)0x6b8, (q15_t)0x69f, (q15_t)0x686, (q15_t)0x66d, (q15_t)0x654,
+  (q15_t)0x63b, (q15_t)0x622, (q15_t)0x609, (q15_t)0x5ef, (q15_t)0x5d6, (q15_t)0x5bd, (q15_t)0x5a4, (q15_t)0x58b,
+  (q15_t)0x572, (q15_t)0x559, (q15_t)0x540, (q15_t)0x527, (q15_t)0x50d, (q15_t)0x4f4, (q15_t)0x4db, (q15_t)0x4c2,
+  (q15_t)0x4a9, (q15_t)0x490, (q15_t)0x477, (q15_t)0x45e, (q15_t)0x445, (q15_t)0x42b, (q15_t)0x412, (q15_t)0x3f9,
+  (q15_t)0x3e0, (q15_t)0x3c7, (q15_t)0x3ae, (q15_t)0x395, (q15_t)0x37c, (q15_t)0x362, (q15_t)0x349, (q15_t)0x330,
+  (q15_t)0x317, (q15_t)0x2fe, (q15_t)0x2e5, (q15_t)0x2cc, (q15_t)0x2b3, (q15_t)0x299, (q15_t)0x280, (q15_t)0x267,
+  (q15_t)0x24e, (q15_t)0x235, (q15_t)0x21c, (q15_t)0x203, (q15_t)0x1ea, (q15_t)0x1d0, (q15_t)0x1b7, (q15_t)0x19e,
+  (q15_t)0x185, (q15_t)0x16c, (q15_t)0x153, (q15_t)0x13a, (q15_t)0x121, (q15_t)0x107, (q15_t)0xee, (q15_t)0xd5,
+  (q15_t)0xbc, (q15_t)0xa3, (q15_t)0x8a, (q15_t)0x71, (q15_t)0x57, (q15_t)0x3e, (q15_t)0x25, (q15_t)0xc
+
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
+    const q15_t __ALIGNED(4) WeightsQ15_8192[16384] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfffa, (q15_t)0x7fff, (q15_t)0xfff4, (q15_t)0x7fff, (q15_t)0xffee,
+  (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffe1, (q15_t)0x7fff, (q15_t)0xffdb, (q15_t)0x7fff, (q15_t)0xffd5,
+  (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc8, (q15_t)0x7fff, (q15_t)0xffc2, (q15_t)0x7fff, (q15_t)0xffbb,
+  (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffaf, (q15_t)0x7fff, (q15_t)0xffa9, (q15_t)0x7fff, (q15_t)0xffa2,
+  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff96, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff89,
+  (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff7d, (q15_t)0x7fff, (q15_t)0xff76, (q15_t)0x7fff, (q15_t)0xff70,
+  (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff63, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff57,
+  (q15_t)0x7fff, (q15_t)0xff51, (q15_t)0x7fff, (q15_t)0xff4a, (q15_t)0x7fff, (q15_t)0xff44, (q15_t)0x7fff, (q15_t)0xff3e,
+  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff31, (q15_t)0x7fff, (q15_t)0xff2b, (q15_t)0x7fff, (q15_t)0xff25,
+  (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff18, (q15_t)0x7fff, (q15_t)0xff12, (q15_t)0x7fff, (q15_t)0xff0b,
+  (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeff, (q15_t)0x7ffe, (q15_t)0xfef9, (q15_t)0x7ffe, (q15_t)0xfef2,
+  (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffe, (q15_t)0xfee6, (q15_t)0x7ffe, (q15_t)0xfedf, (q15_t)0x7ffe, (q15_t)0xfed9,
+  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfecd, (q15_t)0x7ffe, (q15_t)0xfec6, (q15_t)0x7ffe, (q15_t)0xfec0,
+  (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfeb3, (q15_t)0x7ffe, (q15_t)0xfead, (q15_t)0x7ffe, (q15_t)0xfea7,
+  (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffe, (q15_t)0xfe9a, (q15_t)0x7ffd, (q15_t)0xfe94, (q15_t)0x7ffd, (q15_t)0xfe8e,
+  (q15_t)0x7ffd, (q15_t)0xfe88, (q15_t)0x7ffd, (q15_t)0xfe81, (q15_t)0x7ffd, (q15_t)0xfe7b, (q15_t)0x7ffd, (q15_t)0xfe75,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe68, (q15_t)0x7ffd, (q15_t)0xfe62, (q15_t)0x7ffd, (q15_t)0xfe5c,
+  (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffd, (q15_t)0xfe4f, (q15_t)0x7ffd, (q15_t)0xfe49, (q15_t)0x7ffc, (q15_t)0xfe42,
+  (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe36, (q15_t)0x7ffc, (q15_t)0xfe30, (q15_t)0x7ffc, (q15_t)0xfe29,
+  (q15_t)0x7ffc, (q15_t)0xfe23, (q15_t)0x7ffc, (q15_t)0xfe1d, (q15_t)0x7ffc, (q15_t)0xfe16, (q15_t)0x7ffc, (q15_t)0xfe10,
+  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffc, (q15_t)0xfe04, (q15_t)0x7ffb, (q15_t)0xfdfd, (q15_t)0x7ffb, (q15_t)0xfdf7,
+  (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdea, (q15_t)0x7ffb, (q15_t)0xfde4, (q15_t)0x7ffb, (q15_t)0xfdde,
+  (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffb, (q15_t)0xfdd1, (q15_t)0x7ffb, (q15_t)0xfdcb, (q15_t)0x7ffb, (q15_t)0xfdc5,
+  (q15_t)0x7ffa, (q15_t)0xfdbe, (q15_t)0x7ffa, (q15_t)0xfdb8, (q15_t)0x7ffa, (q15_t)0xfdb2, (q15_t)0x7ffa, (q15_t)0xfdac,
+  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ffa, (q15_t)0xfd9f, (q15_t)0x7ffa, (q15_t)0xfd99, (q15_t)0x7ffa, (q15_t)0xfd93,
+  (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd86, (q15_t)0x7ff9, (q15_t)0xfd80, (q15_t)0x7ff9, (q15_t)0xfd79,
+  (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff9, (q15_t)0xfd6d, (q15_t)0x7ff9, (q15_t)0xfd67, (q15_t)0x7ff9, (q15_t)0xfd60,
+  (q15_t)0x7ff8, (q15_t)0xfd5a, (q15_t)0x7ff8, (q15_t)0xfd54, (q15_t)0x7ff8, (q15_t)0xfd4d, (q15_t)0x7ff8, (q15_t)0xfd47,
+  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff8, (q15_t)0xfd3b, (q15_t)0x7ff8, (q15_t)0xfd34, (q15_t)0x7ff8, (q15_t)0xfd2e,
+  (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd21, (q15_t)0x7ff7, (q15_t)0xfd1b, (q15_t)0x7ff7, (q15_t)0xfd15,
+  (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff7, (q15_t)0xfd08, (q15_t)0x7ff7, (q15_t)0xfd02, (q15_t)0x7ff6, (q15_t)0xfcfc,
+  (q15_t)0x7ff6, (q15_t)0xfcf5, (q15_t)0x7ff6, (q15_t)0xfcef, (q15_t)0x7ff6, (q15_t)0xfce9, (q15_t)0x7ff6, (q15_t)0xfce3,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcd6, (q15_t)0x7ff5, (q15_t)0xfcd0, (q15_t)0x7ff5, (q15_t)0xfcc9,
+  (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff5, (q15_t)0xfcbd, (q15_t)0x7ff5, (q15_t)0xfcb7, (q15_t)0x7ff5, (q15_t)0xfcb0,
+  (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfca4, (q15_t)0x7ff4, (q15_t)0xfc9e, (q15_t)0x7ff4, (q15_t)0xfc97,
+  (q15_t)0x7ff4, (q15_t)0xfc91, (q15_t)0x7ff4, (q15_t)0xfc8b, (q15_t)0x7ff3, (q15_t)0xfc84, (q15_t)0x7ff3, (q15_t)0xfc7e,
+  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff3, (q15_t)0xfc72, (q15_t)0x7ff3, (q15_t)0xfc6b, (q15_t)0x7ff2, (q15_t)0xfc65,
+  (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc58, (q15_t)0x7ff2, (q15_t)0xfc52, (q15_t)0x7ff2, (q15_t)0xfc4c,
+  (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc3f, (q15_t)0x7ff1, (q15_t)0xfc39, (q15_t)0x7ff1, (q15_t)0xfc33,
+  (q15_t)0x7ff1, (q15_t)0xfc2c, (q15_t)0x7ff1, (q15_t)0xfc26, (q15_t)0x7ff0, (q15_t)0xfc20, (q15_t)0x7ff0, (q15_t)0xfc1a,
+  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7ff0, (q15_t)0xfc0d, (q15_t)0x7ff0, (q15_t)0xfc07, (q15_t)0x7fef, (q15_t)0xfc01,
+  (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fef, (q15_t)0xfbf4, (q15_t)0x7fef, (q15_t)0xfbee, (q15_t)0x7fef, (q15_t)0xfbe7,
+  (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbdb, (q15_t)0x7fee, (q15_t)0xfbd5, (q15_t)0x7fee, (q15_t)0xfbce,
+  (q15_t)0x7fee, (q15_t)0xfbc8, (q15_t)0x7fed, (q15_t)0xfbc2, (q15_t)0x7fed, (q15_t)0xfbbb, (q15_t)0x7fed, (q15_t)0xfbb5,
+  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fed, (q15_t)0xfba9, (q15_t)0x7fec, (q15_t)0xfba2, (q15_t)0x7fec, (q15_t)0xfb9c,
+  (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7fec, (q15_t)0xfb8f, (q15_t)0x7fec, (q15_t)0xfb89, (q15_t)0x7feb, (q15_t)0xfb83,
+  (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7feb, (q15_t)0xfb76, (q15_t)0x7feb, (q15_t)0xfb70, (q15_t)0x7fea, (q15_t)0xfb6a,
+  (q15_t)0x7fea, (q15_t)0xfb64, (q15_t)0x7fea, (q15_t)0xfb5d, (q15_t)0x7fea, (q15_t)0xfb57, (q15_t)0x7fea, (q15_t)0xfb51,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe9, (q15_t)0xfb44, (q15_t)0x7fe9, (q15_t)0xfb3e, (q15_t)0x7fe9, (q15_t)0xfb38,
+  (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe8, (q15_t)0xfb2b, (q15_t)0x7fe8, (q15_t)0xfb25, (q15_t)0x7fe8, (q15_t)0xfb1e,
+  (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe7, (q15_t)0xfb12, (q15_t)0x7fe7, (q15_t)0xfb0c, (q15_t)0x7fe7, (q15_t)0xfb05,
+  (q15_t)0x7fe6, (q15_t)0xfaff, (q15_t)0x7fe6, (q15_t)0xfaf9, (q15_t)0x7fe6, (q15_t)0xfaf3, (q15_t)0x7fe6, (q15_t)0xfaec,
+  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe5, (q15_t)0xfae0, (q15_t)0x7fe5, (q15_t)0xfad9, (q15_t)0x7fe5, (q15_t)0xfad3,
+  (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe4, (q15_t)0xfac7, (q15_t)0x7fe4, (q15_t)0xfac0, (q15_t)0x7fe4, (q15_t)0xfaba,
+  (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe3, (q15_t)0xfaad, (q15_t)0x7fe3, (q15_t)0xfaa7, (q15_t)0x7fe3, (q15_t)0xfaa1,
+  (q15_t)0x7fe2, (q15_t)0xfa9b, (q15_t)0x7fe2, (q15_t)0xfa94, (q15_t)0x7fe2, (q15_t)0xfa8e, (q15_t)0x7fe2, (q15_t)0xfa88,
+  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe1, (q15_t)0xfa7b, (q15_t)0x7fe1, (q15_t)0xfa75, (q15_t)0x7fe0, (q15_t)0xfa6f,
+  (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fe0, (q15_t)0xfa62, (q15_t)0x7fe0, (q15_t)0xfa5c, (q15_t)0x7fdf, (q15_t)0xfa56,
+  (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fdf, (q15_t)0xfa49, (q15_t)0x7fdf, (q15_t)0xfa43, (q15_t)0x7fde, (q15_t)0xfa3c,
+  (q15_t)0x7fde, (q15_t)0xfa36, (q15_t)0x7fde, (q15_t)0xfa30, (q15_t)0x7fdd, (q15_t)0xfa2a, (q15_t)0x7fdd, (q15_t)0xfa23,
+  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdd, (q15_t)0xfa17, (q15_t)0x7fdc, (q15_t)0xfa11, (q15_t)0x7fdc, (q15_t)0xfa0a,
+  (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fdb, (q15_t)0xf9fe, (q15_t)0x7fdb, (q15_t)0xf9f7, (q15_t)0x7fdb, (q15_t)0xf9f1,
+  (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fda, (q15_t)0xf9e5, (q15_t)0x7fda, (q15_t)0xf9de, (q15_t)0x7fda, (q15_t)0xf9d8,
+  (q15_t)0x7fd9, (q15_t)0xf9d2, (q15_t)0x7fd9, (q15_t)0xf9cb, (q15_t)0x7fd9, (q15_t)0xf9c5, (q15_t)0x7fd8, (q15_t)0xf9bf,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd8, (q15_t)0xf9b2, (q15_t)0x7fd7, (q15_t)0xf9ac, (q15_t)0x7fd7, (q15_t)0xf9a6,
+  (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf999, (q15_t)0x7fd6, (q15_t)0xf993, (q15_t)0x7fd6, (q15_t)0xf98d,
+  (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd5, (q15_t)0xf980, (q15_t)0x7fd5, (q15_t)0xf97a, (q15_t)0x7fd5, (q15_t)0xf974,
+  (q15_t)0x7fd4, (q15_t)0xf96d, (q15_t)0x7fd4, (q15_t)0xf967, (q15_t)0x7fd4, (q15_t)0xf961, (q15_t)0x7fd3, (q15_t)0xf95b,
+  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd3, (q15_t)0xf94e, (q15_t)0x7fd2, (q15_t)0xf948, (q15_t)0x7fd2, (q15_t)0xf941,
+  (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd1, (q15_t)0xf935, (q15_t)0x7fd1, (q15_t)0xf92f, (q15_t)0x7fd1, (q15_t)0xf928,
+  (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fd0, (q15_t)0xf91c, (q15_t)0x7fd0, (q15_t)0xf916, (q15_t)0x7fcf, (q15_t)0xf90f,
+  (q15_t)0x7fcf, (q15_t)0xf909, (q15_t)0x7fcf, (q15_t)0xf903, (q15_t)0x7fce, (q15_t)0xf8fc, (q15_t)0x7fce, (q15_t)0xf8f6,
+  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcd, (q15_t)0xf8ea, (q15_t)0x7fcd, (q15_t)0xf8e3, (q15_t)0x7fcd, (q15_t)0xf8dd,
+  (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcc, (q15_t)0xf8d0, (q15_t)0x7fcb, (q15_t)0xf8ca, (q15_t)0x7fcb, (q15_t)0xf8c4,
+  (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fca, (q15_t)0xf8b7, (q15_t)0x7fca, (q15_t)0xf8b1, (q15_t)0x7fca, (q15_t)0xf8ab,
+  (q15_t)0x7fc9, (q15_t)0xf8a5, (q15_t)0x7fc9, (q15_t)0xf89e, (q15_t)0x7fc9, (q15_t)0xf898, (q15_t)0x7fc8, (q15_t)0xf892,
+  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc7, (q15_t)0xf885, (q15_t)0x7fc7, (q15_t)0xf87f, (q15_t)0x7fc7, (q15_t)0xf879,
+  (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc6, (q15_t)0xf86c, (q15_t)0x7fc6, (q15_t)0xf866, (q15_t)0x7fc5, (q15_t)0xf860,
+  (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc5, (q15_t)0xf853, (q15_t)0x7fc4, (q15_t)0xf84d, (q15_t)0x7fc4, (q15_t)0xf846,
+  (q15_t)0x7fc3, (q15_t)0xf840, (q15_t)0x7fc3, (q15_t)0xf83a, (q15_t)0x7fc3, (q15_t)0xf834, (q15_t)0x7fc2, (q15_t)0xf82d,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc1, (q15_t)0xf821, (q15_t)0x7fc1, (q15_t)0xf81b, (q15_t)0x7fc1, (q15_t)0xf814,
+  (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fc0, (q15_t)0xf808, (q15_t)0x7fc0, (q15_t)0xf802, (q15_t)0x7fbf, (q15_t)0xf7fb,
+  (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbe, (q15_t)0xf7ef, (q15_t)0x7fbe, (q15_t)0xf7e8, (q15_t)0x7fbe, (q15_t)0xf7e2,
+  (q15_t)0x7fbd, (q15_t)0xf7dc, (q15_t)0x7fbd, (q15_t)0xf7d6, (q15_t)0x7fbc, (q15_t)0xf7cf, (q15_t)0x7fbc, (q15_t)0xf7c9,
+  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fbb, (q15_t)0xf7bd, (q15_t)0x7fbb, (q15_t)0xf7b6, (q15_t)0x7fba, (q15_t)0xf7b0,
+  (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb9, (q15_t)0xf7a3, (q15_t)0x7fb9, (q15_t)0xf79d, (q15_t)0x7fb9, (q15_t)0xf797,
+  (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb8, (q15_t)0xf78a, (q15_t)0x7fb7, (q15_t)0xf784, (q15_t)0x7fb7, (q15_t)0xf77e,
+  (q15_t)0x7fb7, (q15_t)0xf778, (q15_t)0x7fb6, (q15_t)0xf771, (q15_t)0x7fb6, (q15_t)0xf76b, (q15_t)0x7fb5, (q15_t)0xf765,
+  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb4, (q15_t)0xf758, (q15_t)0x7fb4, (q15_t)0xf752, (q15_t)0x7fb4, (q15_t)0xf74c,
+  (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb3, (q15_t)0xf73f, (q15_t)0x7fb2, (q15_t)0xf739, (q15_t)0x7fb2, (q15_t)0xf733,
+  (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb1, (q15_t)0xf726, (q15_t)0x7fb1, (q15_t)0xf720, (q15_t)0x7fb0, (q15_t)0xf71a,
+  (q15_t)0x7fb0, (q15_t)0xf713, (q15_t)0x7faf, (q15_t)0xf70d, (q15_t)0x7faf, (q15_t)0xf707, (q15_t)0x7fae, (q15_t)0xf700,
+  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fae, (q15_t)0xf6f4, (q15_t)0x7fad, (q15_t)0xf6ee, (q15_t)0x7fad, (q15_t)0xf6e7,
+  (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7fac, (q15_t)0xf6db, (q15_t)0x7fab, (q15_t)0xf6d5, (q15_t)0x7fab, (q15_t)0xf6ce,
+  (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7faa, (q15_t)0xf6c2, (q15_t)0x7fa9, (q15_t)0xf6bc, (q15_t)0x7fa9, (q15_t)0xf6b5,
+  (q15_t)0x7fa9, (q15_t)0xf6af, (q15_t)0x7fa8, (q15_t)0xf6a9, (q15_t)0x7fa8, (q15_t)0xf6a2, (q15_t)0x7fa7, (q15_t)0xf69c,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa6, (q15_t)0xf690, (q15_t)0x7fa6, (q15_t)0xf689, (q15_t)0x7fa5, (q15_t)0xf683,
+  (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa4, (q15_t)0xf677, (q15_t)0x7fa4, (q15_t)0xf670, (q15_t)0x7fa3, (q15_t)0xf66a,
+  (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa3, (q15_t)0xf65e, (q15_t)0x7fa2, (q15_t)0xf657, (q15_t)0x7fa2, (q15_t)0xf651,
+  (q15_t)0x7fa1, (q15_t)0xf64b, (q15_t)0x7fa1, (q15_t)0xf644, (q15_t)0x7fa0, (q15_t)0xf63e, (q15_t)0x7fa0, (q15_t)0xf638,
+  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9f, (q15_t)0xf62b, (q15_t)0x7f9e, (q15_t)0xf625, (q15_t)0x7f9e, (q15_t)0xf61f,
+  (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9d, (q15_t)0xf612, (q15_t)0x7f9c, (q15_t)0xf60c, (q15_t)0x7f9c, (q15_t)0xf606,
+  (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f9b, (q15_t)0xf5f9, (q15_t)0x7f9a, (q15_t)0xf5f3, (q15_t)0x7f9a, (q15_t)0xf5ed,
+  (q15_t)0x7f99, (q15_t)0xf5e7, (q15_t)0x7f99, (q15_t)0xf5e0, (q15_t)0x7f98, (q15_t)0xf5da, (q15_t)0x7f98, (q15_t)0xf5d4,
+  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f97, (q15_t)0xf5c7, (q15_t)0x7f96, (q15_t)0xf5c1, (q15_t)0x7f96, (q15_t)0xf5bb,
+  (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f95, (q15_t)0xf5ae, (q15_t)0x7f94, (q15_t)0xf5a8, (q15_t)0x7f94, (q15_t)0xf5a2,
+  (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f93, (q15_t)0xf595, (q15_t)0x7f92, (q15_t)0xf58f, (q15_t)0x7f92, (q15_t)0xf589,
+  (q15_t)0x7f91, (q15_t)0xf582, (q15_t)0x7f91, (q15_t)0xf57c, (q15_t)0x7f90, (q15_t)0xf576, (q15_t)0x7f90, (q15_t)0xf570,
+  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8f, (q15_t)0xf563, (q15_t)0x7f8e, (q15_t)0xf55d, (q15_t)0x7f8e, (q15_t)0xf556,
+  (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8d, (q15_t)0xf54a, (q15_t)0x7f8c, (q15_t)0xf544, (q15_t)0x7f8b, (q15_t)0xf53d,
+  (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f8a, (q15_t)0xf531, (q15_t)0x7f8a, (q15_t)0xf52b, (q15_t)0x7f89, (q15_t)0xf524,
+  (q15_t)0x7f89, (q15_t)0xf51e, (q15_t)0x7f88, (q15_t)0xf518, (q15_t)0x7f88, (q15_t)0xf512, (q15_t)0x7f87, (q15_t)0xf50b,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f86, (q15_t)0xf4ff, (q15_t)0x7f86, (q15_t)0xf4f9, (q15_t)0x7f85, (q15_t)0xf4f2,
+  (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f84, (q15_t)0xf4e6, (q15_t)0x7f83, (q15_t)0xf4e0, (q15_t)0x7f83, (q15_t)0xf4d9,
+  (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f82, (q15_t)0xf4cd, (q15_t)0x7f81, (q15_t)0xf4c6, (q15_t)0x7f81, (q15_t)0xf4c0,
+  (q15_t)0x7f80, (q15_t)0xf4ba, (q15_t)0x7f80, (q15_t)0xf4b4, (q15_t)0x7f7f, (q15_t)0xf4ad, (q15_t)0x7f7e, (q15_t)0xf4a7,
+  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7d, (q15_t)0xf49b, (q15_t)0x7f7d, (q15_t)0xf494, (q15_t)0x7f7c, (q15_t)0xf48e,
+  (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f7b, (q15_t)0xf482, (q15_t)0x7f7b, (q15_t)0xf47b, (q15_t)0x7f7a, (q15_t)0xf475,
+  (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f79, (q15_t)0xf469, (q15_t)0x7f78, (q15_t)0xf462, (q15_t)0x7f78, (q15_t)0xf45c,
+  (q15_t)0x7f77, (q15_t)0xf456, (q15_t)0x7f77, (q15_t)0xf450, (q15_t)0x7f76, (q15_t)0xf449, (q15_t)0x7f75, (q15_t)0xf443,
+  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f74, (q15_t)0xf437, (q15_t)0x7f74, (q15_t)0xf430, (q15_t)0x7f73, (q15_t)0xf42a,
+  (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f72, (q15_t)0xf41e, (q15_t)0x7f71, (q15_t)0xf417, (q15_t)0x7f71, (q15_t)0xf411,
+  (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f70, (q15_t)0xf405, (q15_t)0x7f6f, (q15_t)0xf3fe, (q15_t)0x7f6e, (q15_t)0xf3f8,
+  (q15_t)0x7f6e, (q15_t)0xf3f2, (q15_t)0x7f6d, (q15_t)0xf3ec, (q15_t)0x7f6d, (q15_t)0xf3e5, (q15_t)0x7f6c, (q15_t)0xf3df,
+  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f6b, (q15_t)0xf3d2, (q15_t)0x7f6a, (q15_t)0xf3cc, (q15_t)0x7f6a, (q15_t)0xf3c6,
+  (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f68, (q15_t)0xf3b9, (q15_t)0x7f68, (q15_t)0xf3b3, (q15_t)0x7f67, (q15_t)0xf3ad,
+  (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f66, (q15_t)0xf3a0, (q15_t)0x7f65, (q15_t)0xf39a, (q15_t)0x7f65, (q15_t)0xf394,
+  (q15_t)0x7f64, (q15_t)0xf38e, (q15_t)0x7f64, (q15_t)0xf387, (q15_t)0x7f63, (q15_t)0xf381, (q15_t)0x7f62, (q15_t)0xf37b,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f61, (q15_t)0xf36e, (q15_t)0x7f60, (q15_t)0xf368, (q15_t)0x7f60, (q15_t)0xf362,
+  (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5f, (q15_t)0xf355, (q15_t)0x7f5e, (q15_t)0xf34f, (q15_t)0x7f5d, (q15_t)0xf349,
+  (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5c, (q15_t)0xf33c, (q15_t)0x7f5b, (q15_t)0xf336, (q15_t)0x7f5b, (q15_t)0xf330,
+  (q15_t)0x7f5a, (q15_t)0xf32a, (q15_t)0x7f5a, (q15_t)0xf323, (q15_t)0x7f59, (q15_t)0xf31d, (q15_t)0x7f58, (q15_t)0xf317,
+  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f57, (q15_t)0xf30a, (q15_t)0x7f56, (q15_t)0xf304, (q15_t)0x7f56, (q15_t)0xf2fe,
+  (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f55, (q15_t)0xf2f1, (q15_t)0x7f54, (q15_t)0xf2eb, (q15_t)0x7f53, (q15_t)0xf2e5,
+  (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f52, (q15_t)0xf2d8, (q15_t)0x7f51, (q15_t)0xf2d2, (q15_t)0x7f51, (q15_t)0xf2cc,
+  (q15_t)0x7f50, (q15_t)0xf2c6, (q15_t)0x7f4f, (q15_t)0xf2bf, (q15_t)0x7f4f, (q15_t)0xf2b9, (q15_t)0x7f4e, (q15_t)0xf2b3,
+  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4d, (q15_t)0xf2a6, (q15_t)0x7f4c, (q15_t)0xf2a0, (q15_t)0x7f4b, (q15_t)0xf29a,
+  (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f4a, (q15_t)0xf28d, (q15_t)0x7f49, (q15_t)0xf287, (q15_t)0x7f49, (q15_t)0xf281,
+  (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f47, (q15_t)0xf274, (q15_t)0x7f47, (q15_t)0xf26e, (q15_t)0x7f46, (q15_t)0xf268,
+  (q15_t)0x7f45, (q15_t)0xf262, (q15_t)0x7f45, (q15_t)0xf25b, (q15_t)0x7f44, (q15_t)0xf255, (q15_t)0x7f43, (q15_t)0xf24f,
+  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f42, (q15_t)0xf242, (q15_t)0x7f41, (q15_t)0xf23c, (q15_t)0x7f41, (q15_t)0xf236,
+  (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3f, (q15_t)0xf229, (q15_t)0x7f3f, (q15_t)0xf223, (q15_t)0x7f3e, (q15_t)0xf21d,
+  (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3d, (q15_t)0xf210, (q15_t)0x7f3c, (q15_t)0xf20a, (q15_t)0x7f3b, (q15_t)0xf204,
+  (q15_t)0x7f3b, (q15_t)0xf1fe, (q15_t)0x7f3a, (q15_t)0xf1f7, (q15_t)0x7f39, (q15_t)0xf1f1, (q15_t)0x7f39, (q15_t)0xf1eb,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f37, (q15_t)0xf1de, (q15_t)0x7f36, (q15_t)0xf1d8, (q15_t)0x7f36, (q15_t)0xf1d2,
+  (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f34, (q15_t)0xf1c6, (q15_t)0x7f34, (q15_t)0xf1bf, (q15_t)0x7f33, (q15_t)0xf1b9,
+  (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f32, (q15_t)0xf1ad, (q15_t)0x7f31, (q15_t)0xf1a6, (q15_t)0x7f30, (q15_t)0xf1a0,
+  (q15_t)0x7f2f, (q15_t)0xf19a, (q15_t)0x7f2f, (q15_t)0xf194, (q15_t)0x7f2e, (q15_t)0xf18d, (q15_t)0x7f2d, (q15_t)0xf187,
+  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2c, (q15_t)0xf17b, (q15_t)0x7f2b, (q15_t)0xf174, (q15_t)0x7f2a, (q15_t)0xf16e,
+  (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f29, (q15_t)0xf162, (q15_t)0x7f28, (q15_t)0xf15b, (q15_t)0x7f28, (q15_t)0xf155,
+  (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f26, (q15_t)0xf149, (q15_t)0x7f25, (q15_t)0xf142, (q15_t)0x7f25, (q15_t)0xf13c,
+  (q15_t)0x7f24, (q15_t)0xf136, (q15_t)0x7f23, (q15_t)0xf130, (q15_t)0x7f23, (q15_t)0xf129, (q15_t)0x7f22, (q15_t)0xf123,
+  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f20, (q15_t)0xf117, (q15_t)0x7f20, (q15_t)0xf110, (q15_t)0x7f1f, (q15_t)0xf10a,
+  (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1d, (q15_t)0xf0fe, (q15_t)0x7f1d, (q15_t)0xf0f8, (q15_t)0x7f1c, (q15_t)0xf0f1,
+  (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f1a, (q15_t)0xf0e5, (q15_t)0x7f1a, (q15_t)0xf0df, (q15_t)0x7f19, (q15_t)0xf0d8,
+  (q15_t)0x7f18, (q15_t)0xf0d2, (q15_t)0x7f17, (q15_t)0xf0cc, (q15_t)0x7f17, (q15_t)0xf0c6, (q15_t)0x7f16, (q15_t)0xf0bf,
+  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f14, (q15_t)0xf0b3, (q15_t)0x7f14, (q15_t)0xf0ad, (q15_t)0x7f13, (q15_t)0xf0a6,
+  (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f11, (q15_t)0xf09a, (q15_t)0x7f11, (q15_t)0xf094, (q15_t)0x7f10, (q15_t)0xf08d,
+  (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0e, (q15_t)0xf081, (q15_t)0x7f0e, (q15_t)0xf07b, (q15_t)0x7f0d, (q15_t)0xf075,
+  (q15_t)0x7f0c, (q15_t)0xf06e, (q15_t)0x7f0b, (q15_t)0xf068, (q15_t)0x7f0b, (q15_t)0xf062, (q15_t)0x7f0a, (q15_t)0xf05c,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f08, (q15_t)0xf04f, (q15_t)0x7f08, (q15_t)0xf049, (q15_t)0x7f07, (q15_t)0xf043,
+  (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f05, (q15_t)0xf036, (q15_t)0x7f04, (q15_t)0xf030, (q15_t)0x7f04, (q15_t)0xf02a,
+  (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f02, (q15_t)0xf01d, (q15_t)0x7f01, (q15_t)0xf017, (q15_t)0x7f01, (q15_t)0xf011,
+  (q15_t)0x7f00, (q15_t)0xf00b, (q15_t)0x7eff, (q15_t)0xf004, (q15_t)0x7efe, (q15_t)0xeffe, (q15_t)0x7efd, (q15_t)0xeff8,
+  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7efc, (q15_t)0xefeb, (q15_t)0x7efb, (q15_t)0xefe5, (q15_t)0x7efa, (q15_t)0xefdf,
+  (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef9, (q15_t)0xefd2, (q15_t)0x7ef8, (q15_t)0xefcc, (q15_t)0x7ef7, (q15_t)0xefc6,
+  (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef5, (q15_t)0xefb9, (q15_t)0x7ef5, (q15_t)0xefb3, (q15_t)0x7ef4, (q15_t)0xefad,
+  (q15_t)0x7ef3, (q15_t)0xefa7, (q15_t)0x7ef2, (q15_t)0xefa1, (q15_t)0x7ef1, (q15_t)0xef9a, (q15_t)0x7ef1, (q15_t)0xef94,
+  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eef, (q15_t)0xef88, (q15_t)0x7eee, (q15_t)0xef81, (q15_t)0x7eed, (q15_t)0xef7b,
+  (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7eec, (q15_t)0xef6f, (q15_t)0x7eeb, (q15_t)0xef68, (q15_t)0x7eea, (q15_t)0xef62,
+  (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee9, (q15_t)0xef56, (q15_t)0x7ee8, (q15_t)0xef50, (q15_t)0x7ee7, (q15_t)0xef49,
+  (q15_t)0x7ee6, (q15_t)0xef43, (q15_t)0x7ee5, (q15_t)0xef3d, (q15_t)0x7ee4, (q15_t)0xef37, (q15_t)0x7ee4, (q15_t)0xef30,
+  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7ee2, (q15_t)0xef24, (q15_t)0x7ee1, (q15_t)0xef1e, (q15_t)0x7ee0, (q15_t)0xef18,
+  (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edf, (q15_t)0xef0b, (q15_t)0x7ede, (q15_t)0xef05, (q15_t)0x7edd, (q15_t)0xeeff,
+  (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7edb, (q15_t)0xeef2, (q15_t)0x7eda, (q15_t)0xeeec, (q15_t)0x7eda, (q15_t)0xeee6,
+  (q15_t)0x7ed9, (q15_t)0xeedf, (q15_t)0x7ed8, (q15_t)0xeed9, (q15_t)0x7ed7, (q15_t)0xeed3, (q15_t)0x7ed6, (q15_t)0xeecd,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed5, (q15_t)0xeec0, (q15_t)0x7ed4, (q15_t)0xeeba, (q15_t)0x7ed3, (q15_t)0xeeb4,
+  (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ed1, (q15_t)0xeea7, (q15_t)0x7ed0, (q15_t)0xeea1, (q15_t)0x7ecf, (q15_t)0xee9b,
+  (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ece, (q15_t)0xee8f, (q15_t)0x7ecd, (q15_t)0xee88, (q15_t)0x7ecc, (q15_t)0xee82,
+  (q15_t)0x7ecb, (q15_t)0xee7c, (q15_t)0x7eca, (q15_t)0xee76, (q15_t)0x7ec9, (q15_t)0xee6f, (q15_t)0x7ec9, (q15_t)0xee69,
+  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec7, (q15_t)0xee5d, (q15_t)0x7ec6, (q15_t)0xee57, (q15_t)0x7ec5, (q15_t)0xee50,
+  (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec3, (q15_t)0xee44, (q15_t)0x7ec3, (q15_t)0xee3e, (q15_t)0x7ec2, (q15_t)0xee37,
+  (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ec0, (q15_t)0xee2b, (q15_t)0x7ebf, (q15_t)0xee25, (q15_t)0x7ebe, (q15_t)0xee1f,
+  (q15_t)0x7ebd, (q15_t)0xee18, (q15_t)0x7ebc, (q15_t)0xee12, (q15_t)0x7ebb, (q15_t)0xee0c, (q15_t)0x7ebb, (q15_t)0xee06,
+  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb9, (q15_t)0xedf9, (q15_t)0x7eb8, (q15_t)0xedf3, (q15_t)0x7eb7, (q15_t)0xeded,
+  (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb5, (q15_t)0xede0, (q15_t)0x7eb4, (q15_t)0xedda, (q15_t)0x7eb4, (q15_t)0xedd4,
+  (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eb2, (q15_t)0xedc7, (q15_t)0x7eb1, (q15_t)0xedc1, (q15_t)0x7eb0, (q15_t)0xedbb,
+  (q15_t)0x7eaf, (q15_t)0xedb5, (q15_t)0x7eae, (q15_t)0xedaf, (q15_t)0x7ead, (q15_t)0xeda8, (q15_t)0x7eac, (q15_t)0xeda2,
+  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7eab, (q15_t)0xed96, (q15_t)0x7eaa, (q15_t)0xed8f, (q15_t)0x7ea9, (q15_t)0xed89,
+  (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea7, (q15_t)0xed7d, (q15_t)0x7ea6, (q15_t)0xed77, (q15_t)0x7ea5, (q15_t)0xed70,
+  (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea3, (q15_t)0xed64, (q15_t)0x7ea2, (q15_t)0xed5e, (q15_t)0x7ea1, (q15_t)0xed58,
+  (q15_t)0x7ea1, (q15_t)0xed51, (q15_t)0x7ea0, (q15_t)0xed4b, (q15_t)0x7e9f, (q15_t)0xed45, (q15_t)0x7e9e, (q15_t)0xed3f,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e9c, (q15_t)0xed32, (q15_t)0x7e9b, (q15_t)0xed2c, (q15_t)0x7e9a, (q15_t)0xed26,
+  (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e98, (q15_t)0xed19, (q15_t)0x7e97, (q15_t)0xed13, (q15_t)0x7e96, (q15_t)0xed0d,
+  (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e94, (q15_t)0xed01, (q15_t)0x7e94, (q15_t)0xecfa, (q15_t)0x7e93, (q15_t)0xecf4,
+  (q15_t)0x7e92, (q15_t)0xecee, (q15_t)0x7e91, (q15_t)0xece8, (q15_t)0x7e90, (q15_t)0xece1, (q15_t)0x7e8f, (q15_t)0xecdb,
+  (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8d, (q15_t)0xeccf, (q15_t)0x7e8c, (q15_t)0xecc9, (q15_t)0x7e8b, (q15_t)0xecc2,
+  (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e89, (q15_t)0xecb6, (q15_t)0x7e88, (q15_t)0xecb0, (q15_t)0x7e87, (q15_t)0xecaa,
+  (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e85, (q15_t)0xec9d, (q15_t)0x7e84, (q15_t)0xec97, (q15_t)0x7e84, (q15_t)0xec91,
+  (q15_t)0x7e83, (q15_t)0xec8a, (q15_t)0x7e82, (q15_t)0xec84, (q15_t)0x7e81, (q15_t)0xec7e, (q15_t)0x7e80, (q15_t)0xec78,
+  (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7e, (q15_t)0xec6b, (q15_t)0x7e7d, (q15_t)0xec65, (q15_t)0x7e7c, (q15_t)0xec5f,
+  (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e7a, (q15_t)0xec53, (q15_t)0x7e79, (q15_t)0xec4c, (q15_t)0x7e78, (q15_t)0xec46,
+  (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e76, (q15_t)0xec3a, (q15_t)0x7e75, (q15_t)0xec34, (q15_t)0x7e74, (q15_t)0xec2d,
+  (q15_t)0x7e73, (q15_t)0xec27, (q15_t)0x7e72, (q15_t)0xec21, (q15_t)0x7e71, (q15_t)0xec1b, (q15_t)0x7e70, (q15_t)0xec15,
+  (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6e, (q15_t)0xec08, (q15_t)0x7e6d, (q15_t)0xec02, (q15_t)0x7e6c, (q15_t)0xebfc,
+  (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e6a, (q15_t)0xebef, (q15_t)0x7e69, (q15_t)0xebe9, (q15_t)0x7e68, (q15_t)0xebe3,
+  (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e66, (q15_t)0xebd6, (q15_t)0x7e65, (q15_t)0xebd0, (q15_t)0x7e64, (q15_t)0xebca,
+  (q15_t)0x7e63, (q15_t)0xebc4, (q15_t)0x7e62, (q15_t)0xebbe, (q15_t)0x7e61, (q15_t)0xebb7, (q15_t)0x7e60, (q15_t)0xebb1,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5e, (q15_t)0xeba5, (q15_t)0x7e5d, (q15_t)0xeb9f, (q15_t)0x7e5c, (q15_t)0xeb98,
+  (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e5a, (q15_t)0xeb8c, (q15_t)0x7e59, (q15_t)0xeb86, (q15_t)0x7e58, (q15_t)0xeb80,
+  (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e56, (q15_t)0xeb73, (q15_t)0x7e55, (q15_t)0xeb6d, (q15_t)0x7e54, (q15_t)0xeb67,
+  (q15_t)0x7e53, (q15_t)0xeb61, (q15_t)0x7e52, (q15_t)0xeb5a, (q15_t)0x7e51, (q15_t)0xeb54, (q15_t)0x7e50, (q15_t)0xeb4e,
+  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4e, (q15_t)0xeb42, (q15_t)0x7e4d, (q15_t)0xeb3b, (q15_t)0x7e4c, (q15_t)0xeb35,
+  (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e4a, (q15_t)0xeb29, (q15_t)0x7e49, (q15_t)0xeb23, (q15_t)0x7e48, (q15_t)0xeb1c,
+  (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e46, (q15_t)0xeb10, (q15_t)0x7e45, (q15_t)0xeb0a, (q15_t)0x7e44, (q15_t)0xeb04,
+  (q15_t)0x7e43, (q15_t)0xeafd, (q15_t)0x7e42, (q15_t)0xeaf7, (q15_t)0x7e41, (q15_t)0xeaf1, (q15_t)0x7e40, (q15_t)0xeaeb,
+  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3e, (q15_t)0xeade, (q15_t)0x7e3d, (q15_t)0xead8, (q15_t)0x7e3c, (q15_t)0xead2,
+  (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e3a, (q15_t)0xeac6, (q15_t)0x7e39, (q15_t)0xeabf, (q15_t)0x7e38, (q15_t)0xeab9,
+  (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e35, (q15_t)0xeaad, (q15_t)0x7e34, (q15_t)0xeaa7, (q15_t)0x7e33, (q15_t)0xeaa0,
+  (q15_t)0x7e32, (q15_t)0xea9a, (q15_t)0x7e31, (q15_t)0xea94, (q15_t)0x7e30, (q15_t)0xea8e, (q15_t)0x7e2f, (q15_t)0xea88,
+  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2d, (q15_t)0xea7b, (q15_t)0x7e2c, (q15_t)0xea75, (q15_t)0x7e2b, (q15_t)0xea6f,
+  (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e29, (q15_t)0xea63, (q15_t)0x7e28, (q15_t)0xea5c, (q15_t)0x7e27, (q15_t)0xea56,
+  (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e25, (q15_t)0xea4a, (q15_t)0x7e24, (q15_t)0xea44, (q15_t)0x7e22, (q15_t)0xea3d,
+  (q15_t)0x7e21, (q15_t)0xea37, (q15_t)0x7e20, (q15_t)0xea31, (q15_t)0x7e1f, (q15_t)0xea2b, (q15_t)0x7e1e, (q15_t)0xea25,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e1c, (q15_t)0xea18, (q15_t)0x7e1b, (q15_t)0xea12, (q15_t)0x7e1a, (q15_t)0xea0c,
+  (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e18, (q15_t)0xe9ff, (q15_t)0x7e17, (q15_t)0xe9f9, (q15_t)0x7e16, (q15_t)0xe9f3,
+  (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e13, (q15_t)0xe9e7, (q15_t)0x7e12, (q15_t)0xe9e1, (q15_t)0x7e11, (q15_t)0xe9da,
+  (q15_t)0x7e10, (q15_t)0xe9d4, (q15_t)0x7e0f, (q15_t)0xe9ce, (q15_t)0x7e0e, (q15_t)0xe9c8, (q15_t)0x7e0d, (q15_t)0xe9c2,
+  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e0b, (q15_t)0xe9b5, (q15_t)0x7e0a, (q15_t)0xe9af, (q15_t)0x7e08, (q15_t)0xe9a9,
+  (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e06, (q15_t)0xe99c, (q15_t)0x7e05, (q15_t)0xe996, (q15_t)0x7e04, (q15_t)0xe990,
+  (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7e02, (q15_t)0xe984, (q15_t)0x7e01, (q15_t)0xe97e, (q15_t)0x7e00, (q15_t)0xe977,
+  (q15_t)0x7dff, (q15_t)0xe971, (q15_t)0x7dfd, (q15_t)0xe96b, (q15_t)0x7dfc, (q15_t)0xe965, (q15_t)0x7dfb, (q15_t)0xe95f,
+  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df9, (q15_t)0xe952, (q15_t)0x7df8, (q15_t)0xe94c, (q15_t)0x7df7, (q15_t)0xe946,
+  (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df5, (q15_t)0xe93a, (q15_t)0x7df3, (q15_t)0xe933, (q15_t)0x7df2, (q15_t)0xe92d,
+  (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7df0, (q15_t)0xe921, (q15_t)0x7def, (q15_t)0xe91b, (q15_t)0x7dee, (q15_t)0xe914,
+  (q15_t)0x7ded, (q15_t)0xe90e, (q15_t)0x7dec, (q15_t)0xe908, (q15_t)0x7dea, (q15_t)0xe902, (q15_t)0x7de9, (q15_t)0xe8fc,
+  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de7, (q15_t)0xe8ef, (q15_t)0x7de6, (q15_t)0xe8e9, (q15_t)0x7de5, (q15_t)0xe8e3,
+  (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7de2, (q15_t)0xe8d7, (q15_t)0x7de1, (q15_t)0xe8d0, (q15_t)0x7de0, (q15_t)0xe8ca,
+  (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dde, (q15_t)0xe8be, (q15_t)0x7ddd, (q15_t)0xe8b8, (q15_t)0x7ddc, (q15_t)0xe8b2,
+  (q15_t)0x7dda, (q15_t)0xe8ab, (q15_t)0x7dd9, (q15_t)0xe8a5, (q15_t)0x7dd8, (q15_t)0xe89f, (q15_t)0x7dd7, (q15_t)0xe899,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd5, (q15_t)0xe88c, (q15_t)0x7dd4, (q15_t)0xe886, (q15_t)0x7dd2, (q15_t)0xe880,
+  (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dd0, (q15_t)0xe874, (q15_t)0x7dcf, (q15_t)0xe86e, (q15_t)0x7dce, (q15_t)0xe867,
+  (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dcc, (q15_t)0xe85b, (q15_t)0x7dca, (q15_t)0xe855, (q15_t)0x7dc9, (q15_t)0xe84f,
+  (q15_t)0x7dc8, (q15_t)0xe849, (q15_t)0x7dc7, (q15_t)0xe842, (q15_t)0x7dc6, (q15_t)0xe83c, (q15_t)0x7dc5, (q15_t)0xe836,
+  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dc2, (q15_t)0xe82a, (q15_t)0x7dc1, (q15_t)0xe823, (q15_t)0x7dc0, (q15_t)0xe81d,
+  (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dbd, (q15_t)0xe811, (q15_t)0x7dbc, (q15_t)0xe80b, (q15_t)0x7dbb, (q15_t)0xe805,
+  (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db9, (q15_t)0xe7f8, (q15_t)0x7db8, (q15_t)0xe7f2, (q15_t)0x7db6, (q15_t)0xe7ec,
+  (q15_t)0x7db5, (q15_t)0xe7e6, (q15_t)0x7db4, (q15_t)0xe7e0, (q15_t)0x7db3, (q15_t)0xe7d9, (q15_t)0x7db2, (q15_t)0xe7d3,
+  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7daf, (q15_t)0xe7c7, (q15_t)0x7dae, (q15_t)0xe7c1, (q15_t)0x7dad, (q15_t)0xe7bb,
+  (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7dab, (q15_t)0xe7ae, (q15_t)0x7da9, (q15_t)0xe7a8, (q15_t)0x7da8, (q15_t)0xe7a2,
+  (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da6, (q15_t)0xe796, (q15_t)0x7da5, (q15_t)0xe78f, (q15_t)0x7da3, (q15_t)0xe789,
+  (q15_t)0x7da2, (q15_t)0xe783, (q15_t)0x7da1, (q15_t)0xe77d, (q15_t)0x7da0, (q15_t)0xe777, (q15_t)0x7d9f, (q15_t)0xe771,
+  (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d9c, (q15_t)0xe764, (q15_t)0x7d9b, (q15_t)0xe75e, (q15_t)0x7d9a, (q15_t)0xe758,
+  (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d97, (q15_t)0xe74c, (q15_t)0x7d96, (q15_t)0xe745, (q15_t)0x7d95, (q15_t)0xe73f,
+  (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d92, (q15_t)0xe733, (q15_t)0x7d91, (q15_t)0xe72d, (q15_t)0x7d90, (q15_t)0xe727,
+  (q15_t)0x7d8f, (q15_t)0xe720, (q15_t)0x7d8e, (q15_t)0xe71a, (q15_t)0x7d8c, (q15_t)0xe714, (q15_t)0x7d8b, (q15_t)0xe70e,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d89, (q15_t)0xe702, (q15_t)0x7d87, (q15_t)0xe6fb, (q15_t)0x7d86, (q15_t)0xe6f5,
+  (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d84, (q15_t)0xe6e9, (q15_t)0x7d82, (q15_t)0xe6e3, (q15_t)0x7d81, (q15_t)0xe6dd,
+  (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7f, (q15_t)0xe6d0, (q15_t)0x7d7e, (q15_t)0xe6ca, (q15_t)0x7d7c, (q15_t)0xe6c4,
+  (q15_t)0x7d7b, (q15_t)0xe6be, (q15_t)0x7d7a, (q15_t)0xe6b8, (q15_t)0x7d79, (q15_t)0xe6b2, (q15_t)0x7d77, (q15_t)0xe6ab,
+  (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d75, (q15_t)0xe69f, (q15_t)0x7d74, (q15_t)0xe699, (q15_t)0x7d72, (q15_t)0xe693,
+  (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d70, (q15_t)0xe686, (q15_t)0x7d6f, (q15_t)0xe680, (q15_t)0x7d6d, (q15_t)0xe67a,
+  (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d6b, (q15_t)0xe66e, (q15_t)0x7d6a, (q15_t)0xe668, (q15_t)0x7d68, (q15_t)0xe661,
+  (q15_t)0x7d67, (q15_t)0xe65b, (q15_t)0x7d66, (q15_t)0xe655, (q15_t)0x7d65, (q15_t)0xe64f, (q15_t)0x7d63, (q15_t)0xe649,
+  (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d61, (q15_t)0xe63d, (q15_t)0x7d60, (q15_t)0xe636, (q15_t)0x7d5e, (q15_t)0xe630,
+  (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d5c, (q15_t)0xe624, (q15_t)0x7d5a, (q15_t)0xe61e, (q15_t)0x7d59, (q15_t)0xe618,
+  (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d57, (q15_t)0xe60b, (q15_t)0x7d55, (q15_t)0xe605, (q15_t)0x7d54, (q15_t)0xe5ff,
+  (q15_t)0x7d53, (q15_t)0xe5f9, (q15_t)0x7d52, (q15_t)0xe5f3, (q15_t)0x7d50, (q15_t)0xe5ed, (q15_t)0x7d4f, (q15_t)0xe5e6,
+  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d4c, (q15_t)0xe5da, (q15_t)0x7d4b, (q15_t)0xe5d4, (q15_t)0x7d4a, (q15_t)0xe5ce,
+  (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d47, (q15_t)0xe5c2, (q15_t)0x7d46, (q15_t)0xe5bb, (q15_t)0x7d45, (q15_t)0xe5b5,
+  (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d42, (q15_t)0xe5a9, (q15_t)0x7d41, (q15_t)0xe5a3, (q15_t)0x7d3f, (q15_t)0xe59d,
+  (q15_t)0x7d3e, (q15_t)0xe596, (q15_t)0x7d3d, (q15_t)0xe590, (q15_t)0x7d3c, (q15_t)0xe58a, (q15_t)0x7d3a, (q15_t)0xe584,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d38, (q15_t)0xe578, (q15_t)0x7d36, (q15_t)0xe572, (q15_t)0x7d35, (q15_t)0xe56b,
+  (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d32, (q15_t)0xe55f, (q15_t)0x7d31, (q15_t)0xe559, (q15_t)0x7d30, (q15_t)0xe553,
+  (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d2d, (q15_t)0xe547, (q15_t)0x7d2c, (q15_t)0xe540, (q15_t)0x7d2b, (q15_t)0xe53a,
+  (q15_t)0x7d29, (q15_t)0xe534, (q15_t)0x7d28, (q15_t)0xe52e, (q15_t)0x7d27, (q15_t)0xe528, (q15_t)0x7d25, (q15_t)0xe522,
+  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d23, (q15_t)0xe515, (q15_t)0x7d21, (q15_t)0xe50f, (q15_t)0x7d20, (q15_t)0xe509,
+  (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d1d, (q15_t)0xe4fd, (q15_t)0x7d1c, (q15_t)0xe4f7, (q15_t)0x7d1b, (q15_t)0xe4f1,
+  (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d18, (q15_t)0xe4e4, (q15_t)0x7d17, (q15_t)0xe4de, (q15_t)0x7d15, (q15_t)0xe4d8,
+  (q15_t)0x7d14, (q15_t)0xe4d2, (q15_t)0x7d13, (q15_t)0xe4cc, (q15_t)0x7d11, (q15_t)0xe4c6, (q15_t)0x7d10, (q15_t)0xe4bf,
+  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d0d, (q15_t)0xe4b3, (q15_t)0x7d0c, (q15_t)0xe4ad, (q15_t)0x7d0b, (q15_t)0xe4a7,
+  (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d08, (q15_t)0xe49b, (q15_t)0x7d07, (q15_t)0xe494, (q15_t)0x7d05, (q15_t)0xe48e,
+  (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7d03, (q15_t)0xe482, (q15_t)0x7d01, (q15_t)0xe47c, (q15_t)0x7d00, (q15_t)0xe476,
+  (q15_t)0x7cff, (q15_t)0xe470, (q15_t)0x7cfd, (q15_t)0xe46a, (q15_t)0x7cfc, (q15_t)0xe463, (q15_t)0x7cfb, (q15_t)0xe45d,
+  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf8, (q15_t)0xe451, (q15_t)0x7cf6, (q15_t)0xe44b, (q15_t)0x7cf5, (q15_t)0xe445,
+  (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cf2, (q15_t)0xe438, (q15_t)0x7cf1, (q15_t)0xe432, (q15_t)0x7cf0, (q15_t)0xe42c,
+  (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ced, (q15_t)0xe420, (q15_t)0x7cec, (q15_t)0xe41a, (q15_t)0x7cea, (q15_t)0xe414,
+  (q15_t)0x7ce9, (q15_t)0xe40e, (q15_t)0x7ce7, (q15_t)0xe407, (q15_t)0x7ce6, (q15_t)0xe401, (q15_t)0x7ce5, (q15_t)0xe3fb,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ce2, (q15_t)0xe3ef, (q15_t)0x7ce1, (q15_t)0xe3e9, (q15_t)0x7cdf, (q15_t)0xe3e3,
+  (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cdc, (q15_t)0xe3d6, (q15_t)0x7cdb, (q15_t)0xe3d0, (q15_t)0x7cda, (q15_t)0xe3ca,
+  (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd7, (q15_t)0xe3be, (q15_t)0x7cd5, (q15_t)0xe3b8, (q15_t)0x7cd4, (q15_t)0xe3b2,
+  (q15_t)0x7cd3, (q15_t)0xe3ab, (q15_t)0x7cd1, (q15_t)0xe3a5, (q15_t)0x7cd0, (q15_t)0xe39f, (q15_t)0x7ccf, (q15_t)0xe399,
+  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7ccc, (q15_t)0xe38d, (q15_t)0x7cca, (q15_t)0xe387, (q15_t)0x7cc9, (q15_t)0xe381,
+  (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc6, (q15_t)0xe374, (q15_t)0x7cc5, (q15_t)0xe36e, (q15_t)0x7cc3, (q15_t)0xe368,
+  (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cc1, (q15_t)0xe35c, (q15_t)0x7cbf, (q15_t)0xe356, (q15_t)0x7cbe, (q15_t)0xe350,
+  (q15_t)0x7cbc, (q15_t)0xe349, (q15_t)0x7cbb, (q15_t)0xe343, (q15_t)0x7cb9, (q15_t)0xe33d, (q15_t)0x7cb8, (q15_t)0xe337,
+  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb5, (q15_t)0xe32b, (q15_t)0x7cb4, (q15_t)0xe325, (q15_t)0x7cb2, (q15_t)0xe31f,
+  (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cb0, (q15_t)0xe312, (q15_t)0x7cae, (q15_t)0xe30c, (q15_t)0x7cad, (q15_t)0xe306,
+  (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7caa, (q15_t)0xe2fa, (q15_t)0x7ca8, (q15_t)0xe2f4, (q15_t)0x7ca7, (q15_t)0xe2ee,
+  (q15_t)0x7ca6, (q15_t)0xe2e8, (q15_t)0x7ca4, (q15_t)0xe2e1, (q15_t)0x7ca3, (q15_t)0xe2db, (q15_t)0x7ca1, (q15_t)0xe2d5,
+  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9e, (q15_t)0xe2c9, (q15_t)0x7c9d, (q15_t)0xe2c3, (q15_t)0x7c9c, (q15_t)0xe2bd,
+  (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c99, (q15_t)0xe2b0, (q15_t)0x7c97, (q15_t)0xe2aa, (q15_t)0x7c96, (q15_t)0xe2a4,
+  (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c93, (q15_t)0xe298, (q15_t)0x7c91, (q15_t)0xe292, (q15_t)0x7c90, (q15_t)0xe28c,
+  (q15_t)0x7c8f, (q15_t)0xe286, (q15_t)0x7c8d, (q15_t)0xe280, (q15_t)0x7c8c, (q15_t)0xe279, (q15_t)0x7c8a, (q15_t)0xe273,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c87, (q15_t)0xe267, (q15_t)0x7c86, (q15_t)0xe261, (q15_t)0x7c84, (q15_t)0xe25b,
+  (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c82, (q15_t)0xe24f, (q15_t)0x7c80, (q15_t)0xe249, (q15_t)0x7c7f, (q15_t)0xe242,
+  (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c7c, (q15_t)0xe236, (q15_t)0x7c7a, (q15_t)0xe230, (q15_t)0x7c79, (q15_t)0xe22a,
+  (q15_t)0x7c77, (q15_t)0xe224, (q15_t)0x7c76, (q15_t)0xe21e, (q15_t)0x7c74, (q15_t)0xe218, (q15_t)0x7c73, (q15_t)0xe212,
+  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c70, (q15_t)0xe205, (q15_t)0x7c6e, (q15_t)0xe1ff, (q15_t)0x7c6d, (q15_t)0xe1f9,
+  (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c6a, (q15_t)0xe1ed, (q15_t)0x7c69, (q15_t)0xe1e7, (q15_t)0x7c67, (q15_t)0xe1e1,
+  (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c64, (q15_t)0xe1d4, (q15_t)0x7c63, (q15_t)0xe1ce, (q15_t)0x7c61, (q15_t)0xe1c8,
+  (q15_t)0x7c60, (q15_t)0xe1c2, (q15_t)0x7c5e, (q15_t)0xe1bc, (q15_t)0x7c5d, (q15_t)0xe1b6, (q15_t)0x7c5b, (q15_t)0xe1b0,
+  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c58, (q15_t)0xe1a4, (q15_t)0x7c57, (q15_t)0xe19e, (q15_t)0x7c55, (q15_t)0xe197,
+  (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c52, (q15_t)0xe18b, (q15_t)0x7c51, (q15_t)0xe185, (q15_t)0x7c4f, (q15_t)0xe17f,
+  (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c4c, (q15_t)0xe173, (q15_t)0x7c4b, (q15_t)0xe16d, (q15_t)0x7c49, (q15_t)0xe167,
+  (q15_t)0x7c48, (q15_t)0xe160, (q15_t)0x7c46, (q15_t)0xe15a, (q15_t)0x7c45, (q15_t)0xe154, (q15_t)0x7c43, (q15_t)0xe14e,
+  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c40, (q15_t)0xe142, (q15_t)0x7c3f, (q15_t)0xe13c, (q15_t)0x7c3d, (q15_t)0xe136,
+  (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c3a, (q15_t)0xe12a, (q15_t)0x7c39, (q15_t)0xe123, (q15_t)0x7c37, (q15_t)0xe11d,
+  (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c34, (q15_t)0xe111, (q15_t)0x7c33, (q15_t)0xe10b, (q15_t)0x7c31, (q15_t)0xe105,
+  (q15_t)0x7c30, (q15_t)0xe0ff, (q15_t)0x7c2e, (q15_t)0xe0f9, (q15_t)0x7c2d, (q15_t)0xe0f3, (q15_t)0x7c2b, (q15_t)0xe0ed,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c28, (q15_t)0xe0e0, (q15_t)0x7c26, (q15_t)0xe0da, (q15_t)0x7c25, (q15_t)0xe0d4,
+  (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c22, (q15_t)0xe0c8, (q15_t)0x7c20, (q15_t)0xe0c2, (q15_t)0x7c1f, (q15_t)0xe0bc,
+  (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c1c, (q15_t)0xe0b0, (q15_t)0x7c1a, (q15_t)0xe0aa, (q15_t)0x7c19, (q15_t)0xe0a3,
+  (q15_t)0x7c17, (q15_t)0xe09d, (q15_t)0x7c16, (q15_t)0xe097, (q15_t)0x7c14, (q15_t)0xe091, (q15_t)0x7c12, (q15_t)0xe08b,
+  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0f, (q15_t)0xe07f, (q15_t)0x7c0e, (q15_t)0xe079, (q15_t)0x7c0c, (q15_t)0xe073,
+  (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c09, (q15_t)0xe067, (q15_t)0x7c08, (q15_t)0xe061, (q15_t)0x7c06, (q15_t)0xe05a,
+  (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7c03, (q15_t)0xe04e, (q15_t)0x7c01, (q15_t)0xe048, (q15_t)0x7c00, (q15_t)0xe042,
+  (q15_t)0x7bfe, (q15_t)0xe03c, (q15_t)0x7bfd, (q15_t)0xe036, (q15_t)0x7bfb, (q15_t)0xe030, (q15_t)0x7bfa, (q15_t)0xe02a,
+  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf6, (q15_t)0xe01e, (q15_t)0x7bf5, (q15_t)0xe017, (q15_t)0x7bf3, (q15_t)0xe011,
+  (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7bf0, (q15_t)0xe005, (q15_t)0x7bef, (q15_t)0xdfff, (q15_t)0x7bed, (q15_t)0xdff9,
+  (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7bea, (q15_t)0xdfed, (q15_t)0x7be8, (q15_t)0xdfe7, (q15_t)0x7be7, (q15_t)0xdfe1,
+  (q15_t)0x7be5, (q15_t)0xdfdb, (q15_t)0x7be4, (q15_t)0xdfd5, (q15_t)0x7be2, (q15_t)0xdfce, (q15_t)0x7be0, (q15_t)0xdfc8,
+  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bdd, (q15_t)0xdfbc, (q15_t)0x7bdc, (q15_t)0xdfb6, (q15_t)0x7bda, (q15_t)0xdfb0,
+  (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd7, (q15_t)0xdfa4, (q15_t)0x7bd5, (q15_t)0xdf9e, (q15_t)0x7bd4, (q15_t)0xdf98,
+  (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bd1, (q15_t)0xdf8c, (q15_t)0x7bcf, (q15_t)0xdf86, (q15_t)0x7bcd, (q15_t)0xdf7f,
+  (q15_t)0x7bcc, (q15_t)0xdf79, (q15_t)0x7bca, (q15_t)0xdf73, (q15_t)0x7bc9, (q15_t)0xdf6d, (q15_t)0x7bc7, (q15_t)0xdf67,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bc4, (q15_t)0xdf5b, (q15_t)0x7bc2, (q15_t)0xdf55, (q15_t)0x7bc1, (q15_t)0xdf4f,
+  (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bbd, (q15_t)0xdf43, (q15_t)0x7bbc, (q15_t)0xdf3d, (q15_t)0x7bba, (q15_t)0xdf37,
+  (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb7, (q15_t)0xdf2a, (q15_t)0x7bb5, (q15_t)0xdf24, (q15_t)0x7bb4, (q15_t)0xdf1e,
+  (q15_t)0x7bb2, (q15_t)0xdf18, (q15_t)0x7bb0, (q15_t)0xdf12, (q15_t)0x7baf, (q15_t)0xdf0c, (q15_t)0x7bad, (q15_t)0xdf06,
+  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7baa, (q15_t)0xdefa, (q15_t)0x7ba8, (q15_t)0xdef4, (q15_t)0x7ba7, (q15_t)0xdeee,
+  (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7ba3, (q15_t)0xdee2, (q15_t)0x7ba2, (q15_t)0xdedb, (q15_t)0x7ba0, (q15_t)0xded5,
+  (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b9d, (q15_t)0xdec9, (q15_t)0x7b9b, (q15_t)0xdec3, (q15_t)0x7b9a, (q15_t)0xdebd,
+  (q15_t)0x7b98, (q15_t)0xdeb7, (q15_t)0x7b96, (q15_t)0xdeb1, (q15_t)0x7b95, (q15_t)0xdeab, (q15_t)0x7b93, (q15_t)0xdea5,
+  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b90, (q15_t)0xde99, (q15_t)0x7b8e, (q15_t)0xde93, (q15_t)0x7b8d, (q15_t)0xde8d,
+  (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b89, (q15_t)0xde80, (q15_t)0x7b88, (q15_t)0xde7a, (q15_t)0x7b86, (q15_t)0xde74,
+  (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b83, (q15_t)0xde68, (q15_t)0x7b81, (q15_t)0xde62, (q15_t)0x7b7f, (q15_t)0xde5c,
+  (q15_t)0x7b7e, (q15_t)0xde56, (q15_t)0x7b7c, (q15_t)0xde50, (q15_t)0x7b7a, (q15_t)0xde4a, (q15_t)0x7b79, (q15_t)0xde44,
+  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b76, (q15_t)0xde38, (q15_t)0x7b74, (q15_t)0xde32, (q15_t)0x7b72, (q15_t)0xde2c,
+  (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6f, (q15_t)0xde1f, (q15_t)0x7b6d, (q15_t)0xde19, (q15_t)0x7b6c, (q15_t)0xde13,
+  (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b68, (q15_t)0xde07, (q15_t)0x7b67, (q15_t)0xde01, (q15_t)0x7b65, (q15_t)0xddfb,
+  (q15_t)0x7b63, (q15_t)0xddf5, (q15_t)0x7b62, (q15_t)0xddef, (q15_t)0x7b60, (q15_t)0xdde9, (q15_t)0x7b5e, (q15_t)0xdde3,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b5b, (q15_t)0xddd7, (q15_t)0x7b59, (q15_t)0xddd1, (q15_t)0x7b57, (q15_t)0xddcb,
+  (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b54, (q15_t)0xddbf, (q15_t)0x7b52, (q15_t)0xddb9, (q15_t)0x7b51, (q15_t)0xddb2,
+  (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b4d, (q15_t)0xdda6, (q15_t)0x7b4c, (q15_t)0xdda0, (q15_t)0x7b4a, (q15_t)0xdd9a,
+  (q15_t)0x7b48, (q15_t)0xdd94, (q15_t)0x7b47, (q15_t)0xdd8e, (q15_t)0x7b45, (q15_t)0xdd88, (q15_t)0x7b43, (q15_t)0xdd82,
+  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b40, (q15_t)0xdd76, (q15_t)0x7b3e, (q15_t)0xdd70, (q15_t)0x7b3c, (q15_t)0xdd6a,
+  (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b39, (q15_t)0xdd5e, (q15_t)0x7b37, (q15_t)0xdd58, (q15_t)0x7b36, (q15_t)0xdd52,
+  (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b32, (q15_t)0xdd46, (q15_t)0x7b31, (q15_t)0xdd40, (q15_t)0x7b2f, (q15_t)0xdd39,
+  (q15_t)0x7b2d, (q15_t)0xdd33, (q15_t)0x7b2b, (q15_t)0xdd2d, (q15_t)0x7b2a, (q15_t)0xdd27, (q15_t)0x7b28, (q15_t)0xdd21,
+  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b25, (q15_t)0xdd15, (q15_t)0x7b23, (q15_t)0xdd0f, (q15_t)0x7b21, (q15_t)0xdd09,
+  (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b1e, (q15_t)0xdcfd, (q15_t)0x7b1c, (q15_t)0xdcf7, (q15_t)0x7b1a, (q15_t)0xdcf1,
+  (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b17, (q15_t)0xdce5, (q15_t)0x7b15, (q15_t)0xdcdf, (q15_t)0x7b13, (q15_t)0xdcd9,
+  (q15_t)0x7b12, (q15_t)0xdcd3, (q15_t)0x7b10, (q15_t)0xdccd, (q15_t)0x7b0e, (q15_t)0xdcc7, (q15_t)0x7b0c, (q15_t)0xdcc1,
+  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b09, (q15_t)0xdcb5, (q15_t)0x7b07, (q15_t)0xdcae, (q15_t)0x7b06, (q15_t)0xdca8,
+  (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7b02, (q15_t)0xdc9c, (q15_t)0x7b00, (q15_t)0xdc96, (q15_t)0x7aff, (q15_t)0xdc90,
+  (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7afb, (q15_t)0xdc84, (q15_t)0x7af9, (q15_t)0xdc7e, (q15_t)0x7af8, (q15_t)0xdc78,
+  (q15_t)0x7af6, (q15_t)0xdc72, (q15_t)0x7af4, (q15_t)0xdc6c, (q15_t)0x7af2, (q15_t)0xdc66, (q15_t)0x7af1, (q15_t)0xdc60,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7aed, (q15_t)0xdc54, (q15_t)0x7aeb, (q15_t)0xdc4e, (q15_t)0x7aea, (q15_t)0xdc48,
+  (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae6, (q15_t)0xdc3c, (q15_t)0x7ae4, (q15_t)0xdc36, (q15_t)0x7ae3, (q15_t)0xdc30,
+  (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7adf, (q15_t)0xdc24, (q15_t)0x7add, (q15_t)0xdc1e, (q15_t)0x7adc, (q15_t)0xdc18,
+  (q15_t)0x7ada, (q15_t)0xdc12, (q15_t)0x7ad8, (q15_t)0xdc0c, (q15_t)0x7ad6, (q15_t)0xdc06, (q15_t)0x7ad5, (q15_t)0xdbff,
+  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ad1, (q15_t)0xdbf3, (q15_t)0x7acf, (q15_t)0xdbed, (q15_t)0x7acd, (q15_t)0xdbe7,
+  (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7aca, (q15_t)0xdbdb, (q15_t)0x7ac8, (q15_t)0xdbd5, (q15_t)0x7ac6, (q15_t)0xdbcf,
+  (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7ac3, (q15_t)0xdbc3, (q15_t)0x7ac1, (q15_t)0xdbbd, (q15_t)0x7abf, (q15_t)0xdbb7,
+  (q15_t)0x7abd, (q15_t)0xdbb1, (q15_t)0x7abc, (q15_t)0xdbab, (q15_t)0x7aba, (q15_t)0xdba5, (q15_t)0x7ab8, (q15_t)0xdb9f,
+  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7ab5, (q15_t)0xdb93, (q15_t)0x7ab3, (q15_t)0xdb8d, (q15_t)0x7ab1, (q15_t)0xdb87,
+  (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aad, (q15_t)0xdb7b, (q15_t)0x7aac, (q15_t)0xdb75, (q15_t)0x7aaa, (q15_t)0xdb6f,
+  (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa6, (q15_t)0xdb63, (q15_t)0x7aa4, (q15_t)0xdb5d, (q15_t)0x7aa3, (q15_t)0xdb57,
+  (q15_t)0x7aa1, (q15_t)0xdb51, (q15_t)0x7a9f, (q15_t)0xdb4b, (q15_t)0x7a9d, (q15_t)0xdb45, (q15_t)0x7a9b, (q15_t)0xdb3f,
+  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a98, (q15_t)0xdb33, (q15_t)0x7a96, (q15_t)0xdb2d, (q15_t)0x7a94, (q15_t)0xdb27,
+  (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a91, (q15_t)0xdb1b, (q15_t)0x7a8f, (q15_t)0xdb15, (q15_t)0x7a8d, (q15_t)0xdb0f,
+  (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a89, (q15_t)0xdb03, (q15_t)0x7a87, (q15_t)0xdafd, (q15_t)0x7a86, (q15_t)0xdaf7,
+  (q15_t)0x7a84, (q15_t)0xdaf1, (q15_t)0x7a82, (q15_t)0xdaea, (q15_t)0x7a80, (q15_t)0xdae4, (q15_t)0x7a7e, (q15_t)0xdade,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a7b, (q15_t)0xdad2, (q15_t)0x7a79, (q15_t)0xdacc, (q15_t)0x7a77, (q15_t)0xdac6,
+  (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a73, (q15_t)0xdaba, (q15_t)0x7a72, (q15_t)0xdab4, (q15_t)0x7a70, (q15_t)0xdaae,
+  (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a6c, (q15_t)0xdaa2, (q15_t)0x7a6a, (q15_t)0xda9c, (q15_t)0x7a68, (q15_t)0xda96,
+  (q15_t)0x7a67, (q15_t)0xda90, (q15_t)0x7a65, (q15_t)0xda8a, (q15_t)0x7a63, (q15_t)0xda84, (q15_t)0x7a61, (q15_t)0xda7e,
+  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a5d, (q15_t)0xda72, (q15_t)0x7a5c, (q15_t)0xda6c, (q15_t)0x7a5a, (q15_t)0xda66,
+  (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a56, (q15_t)0xda5a, (q15_t)0x7a54, (q15_t)0xda54, (q15_t)0x7a52, (q15_t)0xda4e,
+  (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a4f, (q15_t)0xda42, (q15_t)0x7a4d, (q15_t)0xda3c, (q15_t)0x7a4b, (q15_t)0xda36,
+  (q15_t)0x7a49, (q15_t)0xda30, (q15_t)0x7a47, (q15_t)0xda2a, (q15_t)0x7a45, (q15_t)0xda24, (q15_t)0x7a43, (q15_t)0xda1e,
+  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a40, (q15_t)0xda12, (q15_t)0x7a3e, (q15_t)0xda0c, (q15_t)0x7a3c, (q15_t)0xda06,
+  (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a38, (q15_t)0xd9fa, (q15_t)0x7a36, (q15_t)0xd9f4, (q15_t)0x7a35, (q15_t)0xd9ee,
+  (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a31, (q15_t)0xd9e2, (q15_t)0x7a2f, (q15_t)0xd9dc, (q15_t)0x7a2d, (q15_t)0xd9d6,
+  (q15_t)0x7a2b, (q15_t)0xd9d0, (q15_t)0x7a29, (q15_t)0xd9ca, (q15_t)0x7a27, (q15_t)0xd9c4, (q15_t)0x7a26, (q15_t)0xd9be,
+  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a22, (q15_t)0xd9b2, (q15_t)0x7a20, (q15_t)0xd9ac, (q15_t)0x7a1e, (q15_t)0xd9a6,
+  (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a1a, (q15_t)0xd99a, (q15_t)0x7a18, (q15_t)0xd994, (q15_t)0x7a16, (q15_t)0xd98e,
+  (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a13, (q15_t)0xd982, (q15_t)0x7a11, (q15_t)0xd97c, (q15_t)0x7a0f, (q15_t)0xd976,
+  (q15_t)0x7a0d, (q15_t)0xd970, (q15_t)0x7a0b, (q15_t)0xd96a, (q15_t)0x7a09, (q15_t)0xd964, (q15_t)0x7a07, (q15_t)0xd95e,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x7a04, (q15_t)0xd952, (q15_t)0x7a02, (q15_t)0xd94c, (q15_t)0x7a00, (q15_t)0xd946,
+  (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79fc, (q15_t)0xd93a, (q15_t)0x79fa, (q15_t)0xd934, (q15_t)0x79f8, (q15_t)0xd92e,
+  (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79f4, (q15_t)0xd922, (q15_t)0x79f2, (q15_t)0xd91c, (q15_t)0x79f0, (q15_t)0xd917,
+  (q15_t)0x79ef, (q15_t)0xd911, (q15_t)0x79ed, (q15_t)0xd90b, (q15_t)0x79eb, (q15_t)0xd905, (q15_t)0x79e9, (q15_t)0xd8ff,
+  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79e5, (q15_t)0xd8f3, (q15_t)0x79e3, (q15_t)0xd8ed, (q15_t)0x79e1, (q15_t)0xd8e7,
+  (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79dd, (q15_t)0xd8db, (q15_t)0x79db, (q15_t)0xd8d5, (q15_t)0x79d9, (q15_t)0xd8cf,
+  (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d6, (q15_t)0xd8c3, (q15_t)0x79d4, (q15_t)0xd8bd, (q15_t)0x79d2, (q15_t)0xd8b7,
+  (q15_t)0x79d0, (q15_t)0xd8b1, (q15_t)0x79ce, (q15_t)0xd8ab, (q15_t)0x79cc, (q15_t)0xd8a5, (q15_t)0x79ca, (q15_t)0xd89f,
+  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c6, (q15_t)0xd893, (q15_t)0x79c4, (q15_t)0xd88d, (q15_t)0x79c2, (q15_t)0xd887,
+  (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79be, (q15_t)0xd87b, (q15_t)0x79bc, (q15_t)0xd875, (q15_t)0x79bb, (q15_t)0xd86f,
+  (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b7, (q15_t)0xd863, (q15_t)0x79b5, (q15_t)0xd85d, (q15_t)0x79b3, (q15_t)0xd857,
+  (q15_t)0x79b1, (q15_t)0xd851, (q15_t)0x79af, (q15_t)0xd84b, (q15_t)0x79ad, (q15_t)0xd845, (q15_t)0x79ab, (q15_t)0xd83f,
+  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a7, (q15_t)0xd833, (q15_t)0x79a5, (q15_t)0xd82d, (q15_t)0x79a3, (q15_t)0xd827,
+  (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x799f, (q15_t)0xd81b, (q15_t)0x799d, (q15_t)0xd815, (q15_t)0x799b, (q15_t)0xd80f,
+  (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7997, (q15_t)0xd804, (q15_t)0x7995, (q15_t)0xd7fe, (q15_t)0x7993, (q15_t)0xd7f8,
+  (q15_t)0x7992, (q15_t)0xd7f2, (q15_t)0x7990, (q15_t)0xd7ec, (q15_t)0x798e, (q15_t)0xd7e6, (q15_t)0x798c, (q15_t)0xd7e0,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7988, (q15_t)0xd7d4, (q15_t)0x7986, (q15_t)0xd7ce, (q15_t)0x7984, (q15_t)0xd7c8,
+  (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x7980, (q15_t)0xd7bc, (q15_t)0x797e, (q15_t)0xd7b6, (q15_t)0x797c, (q15_t)0xd7b0,
+  (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7978, (q15_t)0xd7a4, (q15_t)0x7976, (q15_t)0xd79e, (q15_t)0x7974, (q15_t)0xd798,
+  (q15_t)0x7972, (q15_t)0xd792, (q15_t)0x7970, (q15_t)0xd78c, (q15_t)0x796e, (q15_t)0xd786, (q15_t)0x796c, (q15_t)0xd780,
+  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7968, (q15_t)0xd774, (q15_t)0x7966, (q15_t)0xd76e, (q15_t)0x7964, (q15_t)0xd768,
+  (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x7960, (q15_t)0xd75d, (q15_t)0x795e, (q15_t)0xd757, (q15_t)0x795c, (q15_t)0xd751,
+  (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7958, (q15_t)0xd745, (q15_t)0x7956, (q15_t)0xd73f, (q15_t)0x7954, (q15_t)0xd739,
+  (q15_t)0x7952, (q15_t)0xd733, (q15_t)0x7950, (q15_t)0xd72d, (q15_t)0x794e, (q15_t)0xd727, (q15_t)0x794c, (q15_t)0xd721,
+  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7948, (q15_t)0xd715, (q15_t)0x7946, (q15_t)0xd70f, (q15_t)0x7944, (q15_t)0xd709,
+  (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x7940, (q15_t)0xd6fd, (q15_t)0x793e, (q15_t)0xd6f7, (q15_t)0x793c, (q15_t)0xd6f1,
+  (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7938, (q15_t)0xd6e5, (q15_t)0x7936, (q15_t)0xd6e0, (q15_t)0x7934, (q15_t)0xd6da,
+  (q15_t)0x7932, (q15_t)0xd6d4, (q15_t)0x7930, (q15_t)0xd6ce, (q15_t)0x792e, (q15_t)0xd6c8, (q15_t)0x792c, (q15_t)0xd6c2,
+  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7928, (q15_t)0xd6b6, (q15_t)0x7926, (q15_t)0xd6b0, (q15_t)0x7924, (q15_t)0xd6aa,
+  (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7920, (q15_t)0xd69e, (q15_t)0x791e, (q15_t)0xd698, (q15_t)0x791c, (q15_t)0xd692,
+  (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7917, (q15_t)0xd686, (q15_t)0x7915, (q15_t)0xd680, (q15_t)0x7913, (q15_t)0xd67a,
+  (q15_t)0x7911, (q15_t)0xd675, (q15_t)0x790f, (q15_t)0xd66f, (q15_t)0x790d, (q15_t)0xd669, (q15_t)0x790b, (q15_t)0xd663,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7907, (q15_t)0xd657, (q15_t)0x7905, (q15_t)0xd651, (q15_t)0x7903, (q15_t)0xd64b,
+  (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78ff, (q15_t)0xd63f, (q15_t)0x78fd, (q15_t)0xd639, (q15_t)0x78fb, (q15_t)0xd633,
+  (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f7, (q15_t)0xd627, (q15_t)0x78f5, (q15_t)0xd621, (q15_t)0x78f3, (q15_t)0xd61b,
+  (q15_t)0x78f1, (q15_t)0xd615, (q15_t)0x78ee, (q15_t)0xd610, (q15_t)0x78ec, (q15_t)0xd60a, (q15_t)0x78ea, (q15_t)0xd604,
+  (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e6, (q15_t)0xd5f8, (q15_t)0x78e4, (q15_t)0xd5f2, (q15_t)0x78e2, (q15_t)0xd5ec,
+  (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78de, (q15_t)0xd5e0, (q15_t)0x78dc, (q15_t)0xd5da, (q15_t)0x78da, (q15_t)0xd5d4,
+  (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78d6, (q15_t)0xd5c8, (q15_t)0x78d4, (q15_t)0xd5c2, (q15_t)0x78d2, (q15_t)0xd5bc,
+  (q15_t)0x78cf, (q15_t)0xd5b7, (q15_t)0x78cd, (q15_t)0xd5b1, (q15_t)0x78cb, (q15_t)0xd5ab, (q15_t)0x78c9, (q15_t)0xd5a5,
+  (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78c5, (q15_t)0xd599, (q15_t)0x78c3, (q15_t)0xd593, (q15_t)0x78c1, (q15_t)0xd58d,
+  (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78bd, (q15_t)0xd581, (q15_t)0x78bb, (q15_t)0xd57b, (q15_t)0x78b9, (q15_t)0xd575,
+  (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78b4, (q15_t)0xd569, (q15_t)0x78b2, (q15_t)0xd564, (q15_t)0x78b0, (q15_t)0xd55e,
+  (q15_t)0x78ae, (q15_t)0xd558, (q15_t)0x78ac, (q15_t)0xd552, (q15_t)0x78aa, (q15_t)0xd54c, (q15_t)0x78a8, (q15_t)0xd546,
+  (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x78a4, (q15_t)0xd53a, (q15_t)0x78a2, (q15_t)0xd534, (q15_t)0x789f, (q15_t)0xd52e,
+  (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x789b, (q15_t)0xd522, (q15_t)0x7899, (q15_t)0xd51c, (q15_t)0x7897, (q15_t)0xd517,
+  (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x7893, (q15_t)0xd50b, (q15_t)0x7891, (q15_t)0xd505, (q15_t)0x788f, (q15_t)0xd4ff,
+  (q15_t)0x788c, (q15_t)0xd4f9, (q15_t)0x788a, (q15_t)0xd4f3, (q15_t)0x7888, (q15_t)0xd4ed, (q15_t)0x7886, (q15_t)0xd4e7,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7882, (q15_t)0xd4db, (q15_t)0x7880, (q15_t)0xd4d5, (q15_t)0x787e, (q15_t)0xd4d0,
+  (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7879, (q15_t)0xd4c4, (q15_t)0x7877, (q15_t)0xd4be, (q15_t)0x7875, (q15_t)0xd4b8,
+  (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x7871, (q15_t)0xd4ac, (q15_t)0x786f, (q15_t)0xd4a6, (q15_t)0x786d, (q15_t)0xd4a0,
+  (q15_t)0x786b, (q15_t)0xd49a, (q15_t)0x7868, (q15_t)0xd494, (q15_t)0x7866, (q15_t)0xd48f, (q15_t)0x7864, (q15_t)0xd489,
+  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7860, (q15_t)0xd47d, (q15_t)0x785e, (q15_t)0xd477, (q15_t)0x785c, (q15_t)0xd471,
+  (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7857, (q15_t)0xd465, (q15_t)0x7855, (q15_t)0xd45f, (q15_t)0x7853, (q15_t)0xd459,
+  (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x784f, (q15_t)0xd44e, (q15_t)0x784d, (q15_t)0xd448, (q15_t)0x784a, (q15_t)0xd442,
+  (q15_t)0x7848, (q15_t)0xd43c, (q15_t)0x7846, (q15_t)0xd436, (q15_t)0x7844, (q15_t)0xd430, (q15_t)0x7842, (q15_t)0xd42a,
+  (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x783e, (q15_t)0xd41e, (q15_t)0x783b, (q15_t)0xd418, (q15_t)0x7839, (q15_t)0xd412,
+  (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x7835, (q15_t)0xd407, (q15_t)0x7833, (q15_t)0xd401, (q15_t)0x7831, (q15_t)0xd3fb,
+  (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x782c, (q15_t)0xd3ef, (q15_t)0x782a, (q15_t)0xd3e9, (q15_t)0x7828, (q15_t)0xd3e3,
+  (q15_t)0x7826, (q15_t)0xd3dd, (q15_t)0x7824, (q15_t)0xd3d7, (q15_t)0x7821, (q15_t)0xd3d2, (q15_t)0x781f, (q15_t)0xd3cc,
+  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x781b, (q15_t)0xd3c0, (q15_t)0x7819, (q15_t)0xd3ba, (q15_t)0x7817, (q15_t)0xd3b4,
+  (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x7812, (q15_t)0xd3a8, (q15_t)0x7810, (q15_t)0xd3a2, (q15_t)0x780e, (q15_t)0xd39d,
+  (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x780a, (q15_t)0xd391, (q15_t)0x7807, (q15_t)0xd38b, (q15_t)0x7805, (q15_t)0xd385,
+  (q15_t)0x7803, (q15_t)0xd37f, (q15_t)0x7801, (q15_t)0xd379, (q15_t)0x77ff, (q15_t)0xd373, (q15_t)0x77fc, (q15_t)0xd36d,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f8, (q15_t)0xd362, (q15_t)0x77f6, (q15_t)0xd35c, (q15_t)0x77f4, (q15_t)0xd356,
+  (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77ef, (q15_t)0xd34a, (q15_t)0x77ed, (q15_t)0xd344, (q15_t)0x77eb, (q15_t)0xd33e,
+  (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e6, (q15_t)0xd333, (q15_t)0x77e4, (q15_t)0xd32d, (q15_t)0x77e2, (q15_t)0xd327,
+  (q15_t)0x77e0, (q15_t)0xd321, (q15_t)0x77de, (q15_t)0xd31b, (q15_t)0x77db, (q15_t)0xd315, (q15_t)0x77d9, (q15_t)0xd30f,
+  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77d5, (q15_t)0xd303, (q15_t)0x77d3, (q15_t)0xd2fe, (q15_t)0x77d0, (q15_t)0xd2f8,
+  (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77cc, (q15_t)0xd2ec, (q15_t)0x77ca, (q15_t)0xd2e6, (q15_t)0x77c8, (q15_t)0xd2e0,
+  (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77c3, (q15_t)0xd2d4, (q15_t)0x77c1, (q15_t)0xd2cf, (q15_t)0x77bf, (q15_t)0xd2c9,
+  (q15_t)0x77bc, (q15_t)0xd2c3, (q15_t)0x77ba, (q15_t)0xd2bd, (q15_t)0x77b8, (q15_t)0xd2b7, (q15_t)0x77b6, (q15_t)0xd2b1,
+  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77b1, (q15_t)0xd2a5, (q15_t)0x77af, (q15_t)0xd2a0, (q15_t)0x77ad, (q15_t)0xd29a,
+  (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a8, (q15_t)0xd28e, (q15_t)0x77a6, (q15_t)0xd288, (q15_t)0x77a4, (q15_t)0xd282,
+  (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x77a0, (q15_t)0xd276, (q15_t)0x779d, (q15_t)0xd271, (q15_t)0x779b, (q15_t)0xd26b,
+  (q15_t)0x7799, (q15_t)0xd265, (q15_t)0x7797, (q15_t)0xd25f, (q15_t)0x7794, (q15_t)0xd259, (q15_t)0x7792, (q15_t)0xd253,
+  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x778e, (q15_t)0xd247, (q15_t)0x778b, (q15_t)0xd242, (q15_t)0x7789, (q15_t)0xd23c,
+  (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x7785, (q15_t)0xd230, (q15_t)0x7782, (q15_t)0xd22a, (q15_t)0x7780, (q15_t)0xd224,
+  (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x777c, (q15_t)0xd219, (q15_t)0x7779, (q15_t)0xd213, (q15_t)0x7777, (q15_t)0xd20d,
+  (q15_t)0x7775, (q15_t)0xd207, (q15_t)0x7773, (q15_t)0xd201, (q15_t)0x7770, (q15_t)0xd1fb, (q15_t)0x776e, (q15_t)0xd1f5,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x776a, (q15_t)0xd1ea, (q15_t)0x7767, (q15_t)0xd1e4, (q15_t)0x7765, (q15_t)0xd1de,
+  (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x7760, (q15_t)0xd1d2, (q15_t)0x775e, (q15_t)0xd1cc, (q15_t)0x775c, (q15_t)0xd1c6,
+  (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7757, (q15_t)0xd1bb, (q15_t)0x7755, (q15_t)0xd1b5, (q15_t)0x7753, (q15_t)0xd1af,
+  (q15_t)0x7751, (q15_t)0xd1a9, (q15_t)0x774e, (q15_t)0xd1a3, (q15_t)0x774c, (q15_t)0xd19d, (q15_t)0x774a, (q15_t)0xd198,
+  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7745, (q15_t)0xd18c, (q15_t)0x7743, (q15_t)0xd186, (q15_t)0x7741, (q15_t)0xd180,
+  (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x773c, (q15_t)0xd174, (q15_t)0x773a, (q15_t)0xd16f, (q15_t)0x7738, (q15_t)0xd169,
+  (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x7733, (q15_t)0xd15d, (q15_t)0x7731, (q15_t)0xd157, (q15_t)0x772e, (q15_t)0xd151,
+  (q15_t)0x772c, (q15_t)0xd14b, (q15_t)0x772a, (q15_t)0xd146, (q15_t)0x7727, (q15_t)0xd140, (q15_t)0x7725, (q15_t)0xd13a,
+  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x7721, (q15_t)0xd12e, (q15_t)0x771e, (q15_t)0xd128, (q15_t)0x771c, (q15_t)0xd123,
+  (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7717, (q15_t)0xd117, (q15_t)0x7715, (q15_t)0xd111, (q15_t)0x7713, (q15_t)0xd10b,
+  (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x770e, (q15_t)0xd0ff, (q15_t)0x770c, (q15_t)0xd0fa, (q15_t)0x770a, (q15_t)0xd0f4,
+  (q15_t)0x7707, (q15_t)0xd0ee, (q15_t)0x7705, (q15_t)0xd0e8, (q15_t)0x7703, (q15_t)0xd0e2, (q15_t)0x7700, (q15_t)0xd0dc,
+  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76fc, (q15_t)0xd0d1, (q15_t)0x76f9, (q15_t)0xd0cb, (q15_t)0x76f7, (q15_t)0xd0c5,
+  (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76f2, (q15_t)0xd0b9, (q15_t)0x76f0, (q15_t)0xd0b4, (q15_t)0x76ee, (q15_t)0xd0ae,
+  (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e9, (q15_t)0xd0a2, (q15_t)0x76e7, (q15_t)0xd09c, (q15_t)0x76e4, (q15_t)0xd096,
+  (q15_t)0x76e2, (q15_t)0xd091, (q15_t)0x76e0, (q15_t)0xd08b, (q15_t)0x76dd, (q15_t)0xd085, (q15_t)0x76db, (q15_t)0xd07f,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76d6, (q15_t)0xd073, (q15_t)0x76d4, (q15_t)0xd06e, (q15_t)0x76d2, (q15_t)0xd068,
+  (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76cd, (q15_t)0xd05c, (q15_t)0x76cb, (q15_t)0xd056, (q15_t)0x76c8, (q15_t)0xd050,
+  (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76c4, (q15_t)0xd045, (q15_t)0x76c1, (q15_t)0xd03f, (q15_t)0x76bf, (q15_t)0xd039,
+  (q15_t)0x76bd, (q15_t)0xd033, (q15_t)0x76ba, (q15_t)0xd02d, (q15_t)0x76b8, (q15_t)0xd028, (q15_t)0x76b6, (q15_t)0xd022,
+  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76b1, (q15_t)0xd016, (q15_t)0x76af, (q15_t)0xd010, (q15_t)0x76ac, (q15_t)0xd00a,
+  (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a8, (q15_t)0xcfff, (q15_t)0x76a5, (q15_t)0xcff9, (q15_t)0x76a3, (q15_t)0xcff3,
+  (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x769e, (q15_t)0xcfe7, (q15_t)0x769c, (q15_t)0xcfe2, (q15_t)0x7699, (q15_t)0xcfdc,
+  (q15_t)0x7697, (q15_t)0xcfd6, (q15_t)0x7695, (q15_t)0xcfd0, (q15_t)0x7692, (q15_t)0xcfca, (q15_t)0x7690, (q15_t)0xcfc5,
+  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x768b, (q15_t)0xcfb9, (q15_t)0x7689, (q15_t)0xcfb3, (q15_t)0x7686, (q15_t)0xcfad,
+  (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x7682, (q15_t)0xcfa2, (q15_t)0x767f, (q15_t)0xcf9c, (q15_t)0x767d, (q15_t)0xcf96,
+  (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7678, (q15_t)0xcf8a, (q15_t)0x7676, (q15_t)0xcf85, (q15_t)0x7673, (q15_t)0xcf7f,
+  (q15_t)0x7671, (q15_t)0xcf79, (q15_t)0x766f, (q15_t)0xcf73, (q15_t)0x766c, (q15_t)0xcf6d, (q15_t)0x766a, (q15_t)0xcf67,
+  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x7665, (q15_t)0xcf5c, (q15_t)0x7663, (q15_t)0xcf56, (q15_t)0x7660, (q15_t)0xcf50,
+  (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x765c, (q15_t)0xcf45, (q15_t)0x7659, (q15_t)0xcf3f, (q15_t)0x7657, (q15_t)0xcf39,
+  (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x7652, (q15_t)0xcf2d, (q15_t)0x7650, (q15_t)0xcf28, (q15_t)0x764d, (q15_t)0xcf22,
+  (q15_t)0x764b, (q15_t)0xcf1c, (q15_t)0x7648, (q15_t)0xcf16, (q15_t)0x7646, (q15_t)0xcf10, (q15_t)0x7644, (q15_t)0xcf0b,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x763f, (q15_t)0xceff, (q15_t)0x763c, (q15_t)0xcef9, (q15_t)0x763a, (q15_t)0xcef3,
+  (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x7635, (q15_t)0xcee8, (q15_t)0x7633, (q15_t)0xcee2, (q15_t)0x7630, (q15_t)0xcedc,
+  (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x762b, (q15_t)0xced1, (q15_t)0x7629, (q15_t)0xcecb, (q15_t)0x7627, (q15_t)0xcec5,
+  (q15_t)0x7624, (q15_t)0xcebf, (q15_t)0x7622, (q15_t)0xceb9, (q15_t)0x761f, (q15_t)0xceb4, (q15_t)0x761d, (q15_t)0xceae,
+  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7618, (q15_t)0xcea2, (q15_t)0x7616, (q15_t)0xce9c, (q15_t)0x7613, (q15_t)0xce97,
+  (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x760e, (q15_t)0xce8b, (q15_t)0x760c, (q15_t)0xce85, (q15_t)0x760a, (q15_t)0xce7f,
+  (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x7605, (q15_t)0xce74, (q15_t)0x7602, (q15_t)0xce6e, (q15_t)0x7600, (q15_t)0xce68,
+  (q15_t)0x75fd, (q15_t)0xce62, (q15_t)0x75fb, (q15_t)0xce5d, (q15_t)0x75f9, (q15_t)0xce57, (q15_t)0x75f6, (q15_t)0xce51,
+  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75f1, (q15_t)0xce45, (q15_t)0x75ef, (q15_t)0xce40, (q15_t)0x75ec, (q15_t)0xce3a,
+  (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e7, (q15_t)0xce2e, (q15_t)0x75e5, (q15_t)0xce28, (q15_t)0x75e3, (q15_t)0xce23,
+  (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75de, (q15_t)0xce17, (q15_t)0x75db, (q15_t)0xce11, (q15_t)0x75d9, (q15_t)0xce0c,
+  (q15_t)0x75d6, (q15_t)0xce06, (q15_t)0x75d4, (q15_t)0xce00, (q15_t)0x75d1, (q15_t)0xcdfa, (q15_t)0x75cf, (q15_t)0xcdf4,
+  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75ca, (q15_t)0xcde9, (q15_t)0x75c8, (q15_t)0xcde3, (q15_t)0x75c5, (q15_t)0xcddd,
+  (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75c0, (q15_t)0xcdd2, (q15_t)0x75be, (q15_t)0xcdcc, (q15_t)0x75bb, (q15_t)0xcdc6,
+  (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75b6, (q15_t)0xcdbb, (q15_t)0x75b4, (q15_t)0xcdb5, (q15_t)0x75b1, (q15_t)0xcdaf,
+  (q15_t)0x75af, (q15_t)0xcda9, (q15_t)0x75ac, (q15_t)0xcda3, (q15_t)0x75aa, (q15_t)0xcd9e, (q15_t)0x75a7, (q15_t)0xcd98,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x75a3, (q15_t)0xcd8c, (q15_t)0x75a0, (q15_t)0xcd87, (q15_t)0x759e, (q15_t)0xcd81,
+  (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7599, (q15_t)0xcd75, (q15_t)0x7596, (q15_t)0xcd70, (q15_t)0x7594, (q15_t)0xcd6a,
+  (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x758f, (q15_t)0xcd5e, (q15_t)0x758c, (q15_t)0xcd58, (q15_t)0x758a, (q15_t)0xcd53,
+  (q15_t)0x7587, (q15_t)0xcd4d, (q15_t)0x7585, (q15_t)0xcd47, (q15_t)0x7582, (q15_t)0xcd41, (q15_t)0x7580, (q15_t)0xcd3c,
+  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x757b, (q15_t)0xcd30, (q15_t)0x7578, (q15_t)0xcd2a, (q15_t)0x7576, (q15_t)0xcd25,
+  (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7571, (q15_t)0xcd19, (q15_t)0x756e, (q15_t)0xcd13, (q15_t)0x756c, (q15_t)0xcd0d,
+  (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x7567, (q15_t)0xcd02, (q15_t)0x7564, (q15_t)0xccfc, (q15_t)0x7562, (q15_t)0xccf6,
+  (q15_t)0x755f, (q15_t)0xccf1, (q15_t)0x755d, (q15_t)0xcceb, (q15_t)0x755a, (q15_t)0xcce5, (q15_t)0x7558, (q15_t)0xccdf,
+  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x7553, (q15_t)0xccd4, (q15_t)0x7550, (q15_t)0xccce, (q15_t)0x754e, (q15_t)0xccc8,
+  (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7549, (q15_t)0xccbd, (q15_t)0x7546, (q15_t)0xccb7, (q15_t)0x7544, (q15_t)0xccb1,
+  (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x753f, (q15_t)0xcca6, (q15_t)0x753c, (q15_t)0xcca0, (q15_t)0x753a, (q15_t)0xcc9a,
+  (q15_t)0x7537, (q15_t)0xcc95, (q15_t)0x7535, (q15_t)0xcc8f, (q15_t)0x7532, (q15_t)0xcc89, (q15_t)0x752f, (q15_t)0xcc83,
+  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x752a, (q15_t)0xcc78, (q15_t)0x7528, (q15_t)0xcc72, (q15_t)0x7525, (q15_t)0xcc6c,
+  (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7520, (q15_t)0xcc61, (q15_t)0x751e, (q15_t)0xcc5b, (q15_t)0x751b, (q15_t)0xcc55,
+  (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x7516, (q15_t)0xcc4a, (q15_t)0x7514, (q15_t)0xcc44, (q15_t)0x7511, (q15_t)0xcc3e,
+  (q15_t)0x750f, (q15_t)0xcc39, (q15_t)0x750c, (q15_t)0xcc33, (q15_t)0x7509, (q15_t)0xcc2d, (q15_t)0x7507, (q15_t)0xcc27,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x7502, (q15_t)0xcc1c, (q15_t)0x74ff, (q15_t)0xcc16, (q15_t)0x74fd, (q15_t)0xcc10,
+  (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f8, (q15_t)0xcc05, (q15_t)0x74f5, (q15_t)0xcbff, (q15_t)0x74f2, (q15_t)0xcbf9,
+  (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74ed, (q15_t)0xcbee, (q15_t)0x74eb, (q15_t)0xcbe8, (q15_t)0x74e8, (q15_t)0xcbe2,
+  (q15_t)0x74e6, (q15_t)0xcbdd, (q15_t)0x74e3, (q15_t)0xcbd7, (q15_t)0x74e1, (q15_t)0xcbd1, (q15_t)0x74de, (q15_t)0xcbcb,
+  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d9, (q15_t)0xcbc0, (q15_t)0x74d6, (q15_t)0xcbba, (q15_t)0x74d4, (q15_t)0xcbb5,
+  (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74cf, (q15_t)0xcba9, (q15_t)0x74cc, (q15_t)0xcba3, (q15_t)0x74c9, (q15_t)0xcb9e,
+  (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74c4, (q15_t)0xcb92, (q15_t)0x74c2, (q15_t)0xcb8c, (q15_t)0x74bf, (q15_t)0xcb87,
+  (q15_t)0x74bd, (q15_t)0xcb81, (q15_t)0x74ba, (q15_t)0xcb7b, (q15_t)0x74b7, (q15_t)0xcb75, (q15_t)0x74b5, (q15_t)0xcb70,
+  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74b0, (q15_t)0xcb64, (q15_t)0x74ad, (q15_t)0xcb5f, (q15_t)0x74ab, (q15_t)0xcb59,
+  (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x74a5, (q15_t)0xcb4d, (q15_t)0x74a3, (q15_t)0xcb48, (q15_t)0x74a0, (q15_t)0xcb42,
+  (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x749b, (q15_t)0xcb36, (q15_t)0x7498, (q15_t)0xcb31, (q15_t)0x7496, (q15_t)0xcb2b,
+  (q15_t)0x7493, (q15_t)0xcb25, (q15_t)0x7491, (q15_t)0xcb20, (q15_t)0x748e, (q15_t)0xcb1a, (q15_t)0x748b, (q15_t)0xcb14,
+  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x7486, (q15_t)0xcb09, (q15_t)0x7484, (q15_t)0xcb03, (q15_t)0x7481, (q15_t)0xcafd,
+  (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x747c, (q15_t)0xcaf2, (q15_t)0x7479, (q15_t)0xcaec, (q15_t)0x7477, (q15_t)0xcae6,
+  (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x7471, (q15_t)0xcadb, (q15_t)0x746f, (q15_t)0xcad5, (q15_t)0x746c, (q15_t)0xcad0,
+  (q15_t)0x746a, (q15_t)0xcaca, (q15_t)0x7467, (q15_t)0xcac4, (q15_t)0x7464, (q15_t)0xcabe, (q15_t)0x7462, (q15_t)0xcab9,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x745c, (q15_t)0xcaad, (q15_t)0x745a, (q15_t)0xcaa8, (q15_t)0x7457, (q15_t)0xcaa2,
+  (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x7452, (q15_t)0xca96, (q15_t)0x744f, (q15_t)0xca91, (q15_t)0x744d, (q15_t)0xca8b,
+  (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7448, (q15_t)0xca80, (q15_t)0x7445, (q15_t)0xca7a, (q15_t)0x7442, (q15_t)0xca74,
+  (q15_t)0x7440, (q15_t)0xca6e, (q15_t)0x743d, (q15_t)0xca69, (q15_t)0x743a, (q15_t)0xca63, (q15_t)0x7438, (q15_t)0xca5d,
+  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x7432, (q15_t)0xca52, (q15_t)0x7430, (q15_t)0xca4c, (q15_t)0x742d, (q15_t)0xca46,
+  (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7428, (q15_t)0xca3b, (q15_t)0x7425, (q15_t)0xca35, (q15_t)0x7423, (q15_t)0xca30,
+  (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x741d, (q15_t)0xca24, (q15_t)0x741b, (q15_t)0xca1f, (q15_t)0x7418, (q15_t)0xca19,
+  (q15_t)0x7415, (q15_t)0xca13, (q15_t)0x7413, (q15_t)0xca0d, (q15_t)0x7410, (q15_t)0xca08, (q15_t)0x740d, (q15_t)0xca02,
+  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7408, (q15_t)0xc9f7, (q15_t)0x7406, (q15_t)0xc9f1, (q15_t)0x7403, (q15_t)0xc9eb,
+  (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73fe, (q15_t)0xc9e0, (q15_t)0x73fb, (q15_t)0xc9da, (q15_t)0x73f8, (q15_t)0xc9d5,
+  (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73f3, (q15_t)0xc9c9, (q15_t)0x73f0, (q15_t)0xc9c3, (q15_t)0x73ee, (q15_t)0xc9be,
+  (q15_t)0x73eb, (q15_t)0xc9b8, (q15_t)0x73e8, (q15_t)0xc9b2, (q15_t)0x73e6, (q15_t)0xc9ad, (q15_t)0x73e3, (q15_t)0xc9a7,
+  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73de, (q15_t)0xc99c, (q15_t)0x73db, (q15_t)0xc996, (q15_t)0x73d8, (q15_t)0xc990,
+  (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73d3, (q15_t)0xc985, (q15_t)0x73d0, (q15_t)0xc97f, (q15_t)0x73ce, (q15_t)0xc97a,
+  (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c8, (q15_t)0xc96e, (q15_t)0x73c6, (q15_t)0xc968, (q15_t)0x73c3, (q15_t)0xc963,
+  (q15_t)0x73c0, (q15_t)0xc95d, (q15_t)0x73bd, (q15_t)0xc957, (q15_t)0x73bb, (q15_t)0xc952, (q15_t)0x73b8, (q15_t)0xc94c,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73b3, (q15_t)0xc941, (q15_t)0x73b0, (q15_t)0xc93b, (q15_t)0x73ad, (q15_t)0xc935,
+  (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a8, (q15_t)0xc92a, (q15_t)0x73a5, (q15_t)0xc924, (q15_t)0x73a3, (q15_t)0xc91f,
+  (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x739d, (q15_t)0xc913, (q15_t)0x739b, (q15_t)0xc90e, (q15_t)0x7398, (q15_t)0xc908,
+  (q15_t)0x7395, (q15_t)0xc902, (q15_t)0x7392, (q15_t)0xc8fd, (q15_t)0x7390, (q15_t)0xc8f7, (q15_t)0x738d, (q15_t)0xc8f1,
+  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x7388, (q15_t)0xc8e6, (q15_t)0x7385, (q15_t)0xc8e0, (q15_t)0x7382, (q15_t)0xc8db,
+  (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x737d, (q15_t)0xc8cf, (q15_t)0x737a, (q15_t)0xc8ca, (q15_t)0x7377, (q15_t)0xc8c4,
+  (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x7372, (q15_t)0xc8b9, (q15_t)0x736f, (q15_t)0xc8b3, (q15_t)0x736c, (q15_t)0xc8ad,
+  (q15_t)0x736a, (q15_t)0xc8a8, (q15_t)0x7367, (q15_t)0xc8a2, (q15_t)0x7364, (q15_t)0xc89c, (q15_t)0x7362, (q15_t)0xc897,
+  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x735c, (q15_t)0xc88b, (q15_t)0x7359, (q15_t)0xc886, (q15_t)0x7357, (q15_t)0xc880,
+  (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7351, (q15_t)0xc875, (q15_t)0x734f, (q15_t)0xc86f, (q15_t)0x734c, (q15_t)0xc869,
+  (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x7346, (q15_t)0xc85e, (q15_t)0x7344, (q15_t)0xc858, (q15_t)0x7341, (q15_t)0xc853,
+  (q15_t)0x733e, (q15_t)0xc84d, (q15_t)0x733b, (q15_t)0xc847, (q15_t)0x7339, (q15_t)0xc842, (q15_t)0x7336, (q15_t)0xc83c,
+  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7330, (q15_t)0xc831, (q15_t)0x732e, (q15_t)0xc82b, (q15_t)0x732b, (q15_t)0xc825,
+  (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x7326, (q15_t)0xc81a, (q15_t)0x7323, (q15_t)0xc814, (q15_t)0x7320, (q15_t)0xc80f,
+  (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x731b, (q15_t)0xc803, (q15_t)0x7318, (q15_t)0xc7fe, (q15_t)0x7315, (q15_t)0xc7f8,
+  (q15_t)0x7312, (q15_t)0xc7f3, (q15_t)0x7310, (q15_t)0xc7ed, (q15_t)0x730d, (q15_t)0xc7e7, (q15_t)0x730a, (q15_t)0xc7e2,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7305, (q15_t)0xc7d6, (q15_t)0x7302, (q15_t)0xc7d1, (q15_t)0x72ff, (q15_t)0xc7cb,
+  (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f9, (q15_t)0xc7c0, (q15_t)0x72f7, (q15_t)0xc7ba, (q15_t)0x72f4, (q15_t)0xc7b4,
+  (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72ee, (q15_t)0xc7a9, (q15_t)0x72ec, (q15_t)0xc7a3, (q15_t)0x72e9, (q15_t)0xc79e,
+  (q15_t)0x72e6, (q15_t)0xc798, (q15_t)0x72e3, (q15_t)0xc793, (q15_t)0x72e1, (q15_t)0xc78d, (q15_t)0x72de, (q15_t)0xc787,
+  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d8, (q15_t)0xc77c, (q15_t)0x72d5, (q15_t)0xc776, (q15_t)0x72d3, (q15_t)0xc771,
+  (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72cd, (q15_t)0xc765, (q15_t)0x72ca, (q15_t)0xc760, (q15_t)0x72c8, (q15_t)0xc75a,
+  (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72c2, (q15_t)0xc74f, (q15_t)0x72bf, (q15_t)0xc749, (q15_t)0x72bc, (q15_t)0xc744,
+  (q15_t)0x72ba, (q15_t)0xc73e, (q15_t)0x72b7, (q15_t)0xc738, (q15_t)0x72b4, (q15_t)0xc733, (q15_t)0x72b1, (q15_t)0xc72d,
+  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72ac, (q15_t)0xc722, (q15_t)0x72a9, (q15_t)0xc71c, (q15_t)0x72a6, (q15_t)0xc717,
+  (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x72a1, (q15_t)0xc70b, (q15_t)0x729e, (q15_t)0xc706, (q15_t)0x729b, (q15_t)0xc700,
+  (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x7295, (q15_t)0xc6f5, (q15_t)0x7293, (q15_t)0xc6ef, (q15_t)0x7290, (q15_t)0xc6ea,
+  (q15_t)0x728d, (q15_t)0xc6e4, (q15_t)0x728a, (q15_t)0xc6de, (q15_t)0x7287, (q15_t)0xc6d9, (q15_t)0x7285, (q15_t)0xc6d3,
+  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x727f, (q15_t)0xc6c8, (q15_t)0x727c, (q15_t)0xc6c2, (q15_t)0x7279, (q15_t)0xc6bd,
+  (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x7274, (q15_t)0xc6b1, (q15_t)0x7271, (q15_t)0xc6ac, (q15_t)0x726e, (q15_t)0xc6a6,
+  (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7268, (q15_t)0xc69b, (q15_t)0x7266, (q15_t)0xc695, (q15_t)0x7263, (q15_t)0xc690,
+  (q15_t)0x7260, (q15_t)0xc68a, (q15_t)0x725d, (q15_t)0xc684, (q15_t)0x725a, (q15_t)0xc67f, (q15_t)0x7257, (q15_t)0xc679,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7252, (q15_t)0xc66e, (q15_t)0x724f, (q15_t)0xc668, (q15_t)0x724c, (q15_t)0xc663,
+  (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x7247, (q15_t)0xc658, (q15_t)0x7244, (q15_t)0xc652, (q15_t)0x7241, (q15_t)0xc64c,
+  (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x723b, (q15_t)0xc641, (q15_t)0x7238, (q15_t)0xc63c, (q15_t)0x7236, (q15_t)0xc636,
+  (q15_t)0x7233, (q15_t)0xc630, (q15_t)0x7230, (q15_t)0xc62b, (q15_t)0x722d, (q15_t)0xc625, (q15_t)0x722a, (q15_t)0xc620,
+  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x7224, (q15_t)0xc614, (q15_t)0x7222, (q15_t)0xc60f, (q15_t)0x721f, (q15_t)0xc609,
+  (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7219, (q15_t)0xc5fe, (q15_t)0x7216, (q15_t)0xc5f8, (q15_t)0x7213, (q15_t)0xc5f3,
+  (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x720e, (q15_t)0xc5e7, (q15_t)0x720b, (q15_t)0xc5e2, (q15_t)0x7208, (q15_t)0xc5dc,
+  (q15_t)0x7205, (q15_t)0xc5d7, (q15_t)0x7202, (q15_t)0xc5d1, (q15_t)0x71ff, (q15_t)0xc5cc, (q15_t)0x71fd, (q15_t)0xc5c6,
+  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71f7, (q15_t)0xc5bb, (q15_t)0x71f4, (q15_t)0xc5b5, (q15_t)0x71f1, (q15_t)0xc5b0,
+  (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71eb, (q15_t)0xc5a4, (q15_t)0x71e9, (q15_t)0xc59f, (q15_t)0x71e6, (q15_t)0xc599,
+  (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71e0, (q15_t)0xc58e, (q15_t)0x71dd, (q15_t)0xc588, (q15_t)0x71da, (q15_t)0xc583,
+  (q15_t)0x71d7, (q15_t)0xc57d, (q15_t)0x71d4, (q15_t)0xc578, (q15_t)0x71d2, (q15_t)0xc572, (q15_t)0x71cf, (q15_t)0xc56c,
+  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c9, (q15_t)0xc561, (q15_t)0x71c6, (q15_t)0xc55c, (q15_t)0x71c3, (q15_t)0xc556,
+  (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71bd, (q15_t)0xc54b, (q15_t)0x71bb, (q15_t)0xc545, (q15_t)0x71b8, (q15_t)0xc540,
+  (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71b2, (q15_t)0xc535, (q15_t)0x71af, (q15_t)0xc52f, (q15_t)0x71ac, (q15_t)0xc529,
+  (q15_t)0x71a9, (q15_t)0xc524, (q15_t)0x71a6, (q15_t)0xc51e, (q15_t)0x71a3, (q15_t)0xc519, (q15_t)0x71a1, (q15_t)0xc513,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x719b, (q15_t)0xc508, (q15_t)0x7198, (q15_t)0xc502, (q15_t)0x7195, (q15_t)0xc4fd,
+  (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x718f, (q15_t)0xc4f2, (q15_t)0x718c, (q15_t)0xc4ec, (q15_t)0x7189, (q15_t)0xc4e7,
+  (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x7184, (q15_t)0xc4db, (q15_t)0x7181, (q15_t)0xc4d6, (q15_t)0x717e, (q15_t)0xc4d0,
+  (q15_t)0x717b, (q15_t)0xc4cb, (q15_t)0x7178, (q15_t)0xc4c5, (q15_t)0x7175, (q15_t)0xc4c0, (q15_t)0x7172, (q15_t)0xc4ba,
+  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x716c, (q15_t)0xc4af, (q15_t)0x7169, (q15_t)0xc4a9, (q15_t)0x7167, (q15_t)0xc4a4,
+  (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7161, (q15_t)0xc499, (q15_t)0x715e, (q15_t)0xc493, (q15_t)0x715b, (q15_t)0xc48d,
+  (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x7155, (q15_t)0xc482, (q15_t)0x7152, (q15_t)0xc47d, (q15_t)0x714f, (q15_t)0xc477,
+  (q15_t)0x714c, (q15_t)0xc472, (q15_t)0x7149, (q15_t)0xc46c, (q15_t)0x7146, (q15_t)0xc467, (q15_t)0x7143, (q15_t)0xc461,
+  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x713e, (q15_t)0xc456, (q15_t)0x713b, (q15_t)0xc450, (q15_t)0x7138, (q15_t)0xc44b,
+  (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7132, (q15_t)0xc440, (q15_t)0x712f, (q15_t)0xc43a, (q15_t)0x712c, (q15_t)0xc434,
+  (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x7126, (q15_t)0xc429, (q15_t)0x7123, (q15_t)0xc424, (q15_t)0x7120, (q15_t)0xc41e,
+  (q15_t)0x711d, (q15_t)0xc419, (q15_t)0x711a, (q15_t)0xc413, (q15_t)0x7117, (q15_t)0xc40e, (q15_t)0x7114, (q15_t)0xc408,
+  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x710f, (q15_t)0xc3fd, (q15_t)0x710c, (q15_t)0xc3f7, (q15_t)0x7109, (q15_t)0xc3f2,
+  (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x7103, (q15_t)0xc3e7, (q15_t)0x7100, (q15_t)0xc3e1, (q15_t)0x70fd, (q15_t)0xc3dc,
+  (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70f7, (q15_t)0xc3d1, (q15_t)0x70f4, (q15_t)0xc3cb, (q15_t)0x70f1, (q15_t)0xc3c5,
+  (q15_t)0x70ee, (q15_t)0xc3c0, (q15_t)0x70eb, (q15_t)0xc3ba, (q15_t)0x70e8, (q15_t)0xc3b5, (q15_t)0x70e5, (q15_t)0xc3af,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70df, (q15_t)0xc3a4, (q15_t)0x70dc, (q15_t)0xc39f, (q15_t)0x70d9, (q15_t)0xc399,
+  (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70d3, (q15_t)0xc38e, (q15_t)0x70d1, (q15_t)0xc389, (q15_t)0x70ce, (q15_t)0xc383,
+  (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70c8, (q15_t)0xc378, (q15_t)0x70c5, (q15_t)0xc372, (q15_t)0x70c2, (q15_t)0xc36d,
+  (q15_t)0x70bf, (q15_t)0xc367, (q15_t)0x70bc, (q15_t)0xc362, (q15_t)0x70b9, (q15_t)0xc35c, (q15_t)0x70b6, (q15_t)0xc357,
+  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70b0, (q15_t)0xc34c, (q15_t)0x70ad, (q15_t)0xc346, (q15_t)0x70aa, (q15_t)0xc341,
+  (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x70a4, (q15_t)0xc336, (q15_t)0x70a1, (q15_t)0xc330, (q15_t)0x709e, (q15_t)0xc32a,
+  (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x7098, (q15_t)0xc31f, (q15_t)0x7095, (q15_t)0xc31a, (q15_t)0x7092, (q15_t)0xc314,
+  (q15_t)0x708f, (q15_t)0xc30f, (q15_t)0x708c, (q15_t)0xc309, (q15_t)0x7089, (q15_t)0xc304, (q15_t)0x7086, (q15_t)0xc2fe,
+  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7080, (q15_t)0xc2f3, (q15_t)0x707d, (q15_t)0xc2ee, (q15_t)0x707a, (q15_t)0xc2e8,
+  (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x7074, (q15_t)0xc2dd, (q15_t)0x7071, (q15_t)0xc2d8, (q15_t)0x706e, (q15_t)0xc2d2,
+  (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x7068, (q15_t)0xc2c7, (q15_t)0x7065, (q15_t)0xc2c2, (q15_t)0x7062, (q15_t)0xc2bc,
+  (q15_t)0x705f, (q15_t)0xc2b7, (q15_t)0x705c, (q15_t)0xc2b1, (q15_t)0x7059, (q15_t)0xc2ab, (q15_t)0x7056, (q15_t)0xc2a6,
+  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7050, (q15_t)0xc29b, (q15_t)0x704d, (q15_t)0xc295, (q15_t)0x704a, (q15_t)0xc290,
+  (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x7044, (q15_t)0xc285, (q15_t)0x7041, (q15_t)0xc27f, (q15_t)0x703e, (q15_t)0xc27a,
+  (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x7038, (q15_t)0xc26f, (q15_t)0x7035, (q15_t)0xc269, (q15_t)0x7032, (q15_t)0xc264,
+  (q15_t)0x702f, (q15_t)0xc25e, (q15_t)0x702c, (q15_t)0xc259, (q15_t)0x7029, (q15_t)0xc253, (q15_t)0x7026, (q15_t)0xc24e,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7020, (q15_t)0xc243, (q15_t)0x701d, (q15_t)0xc23d, (q15_t)0x7019, (q15_t)0xc238,
+  (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x7013, (q15_t)0xc22d, (q15_t)0x7010, (q15_t)0xc227, (q15_t)0x700d, (q15_t)0xc222,
+  (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x7007, (q15_t)0xc217, (q15_t)0x7004, (q15_t)0xc211, (q15_t)0x7001, (q15_t)0xc20c,
+  (q15_t)0x6ffe, (q15_t)0xc206, (q15_t)0x6ffb, (q15_t)0xc201, (q15_t)0x6ff8, (q15_t)0xc1fb, (q15_t)0x6ff5, (q15_t)0xc1f6,
+  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fef, (q15_t)0xc1eb, (q15_t)0x6fec, (q15_t)0xc1e5, (q15_t)0x6fe9, (q15_t)0xc1e0,
+  (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fe3, (q15_t)0xc1d5, (q15_t)0x6fe0, (q15_t)0xc1cf, (q15_t)0x6fdd, (q15_t)0xc1ca,
+  (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fd6, (q15_t)0xc1bf, (q15_t)0x6fd3, (q15_t)0xc1b9, (q15_t)0x6fd0, (q15_t)0xc1b4,
+  (q15_t)0x6fcd, (q15_t)0xc1ae, (q15_t)0x6fca, (q15_t)0xc1a9, (q15_t)0x6fc7, (q15_t)0xc1a3, (q15_t)0x6fc4, (q15_t)0xc19e,
+  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fbe, (q15_t)0xc193, (q15_t)0x6fbb, (q15_t)0xc18d, (q15_t)0x6fb8, (q15_t)0xc188,
+  (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fb2, (q15_t)0xc17d, (q15_t)0x6faf, (q15_t)0xc178, (q15_t)0x6fac, (q15_t)0xc172,
+  (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6fa5, (q15_t)0xc167, (q15_t)0x6fa2, (q15_t)0xc162, (q15_t)0x6f9f, (q15_t)0xc15c,
+  (q15_t)0x6f9c, (q15_t)0xc157, (q15_t)0x6f99, (q15_t)0xc151, (q15_t)0x6f96, (q15_t)0xc14c, (q15_t)0x6f93, (q15_t)0xc146,
+  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f8d, (q15_t)0xc13b, (q15_t)0x6f8a, (q15_t)0xc136, (q15_t)0x6f87, (q15_t)0xc130,
+  (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f81, (q15_t)0xc125, (q15_t)0x6f7d, (q15_t)0xc120, (q15_t)0x6f7a, (q15_t)0xc11a,
+  (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f74, (q15_t)0xc10f, (q15_t)0x6f71, (q15_t)0xc10a, (q15_t)0x6f6e, (q15_t)0xc105,
+  (q15_t)0x6f6b, (q15_t)0xc0ff, (q15_t)0x6f68, (q15_t)0xc0fa, (q15_t)0x6f65, (q15_t)0xc0f4, (q15_t)0x6f62, (q15_t)0xc0ef,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f5b, (q15_t)0xc0e4, (q15_t)0x6f58, (q15_t)0xc0de, (q15_t)0x6f55, (q15_t)0xc0d9,
+  (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f4f, (q15_t)0xc0ce, (q15_t)0x6f4c, (q15_t)0xc0c8, (q15_t)0x6f49, (q15_t)0xc0c3,
+  (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f43, (q15_t)0xc0b8, (q15_t)0x6f3f, (q15_t)0xc0b3, (q15_t)0x6f3c, (q15_t)0xc0ad,
+  (q15_t)0x6f39, (q15_t)0xc0a8, (q15_t)0x6f36, (q15_t)0xc0a2, (q15_t)0x6f33, (q15_t)0xc09d, (q15_t)0x6f30, (q15_t)0xc097,
+  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f2a, (q15_t)0xc08c, (q15_t)0x6f27, (q15_t)0xc087, (q15_t)0x6f23, (q15_t)0xc081,
+  (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f1d, (q15_t)0xc077, (q15_t)0x6f1a, (q15_t)0xc071, (q15_t)0x6f17, (q15_t)0xc06c,
+  (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f11, (q15_t)0xc061, (q15_t)0x6f0e, (q15_t)0xc05b, (q15_t)0x6f0b, (q15_t)0xc056,
+  (q15_t)0x6f07, (q15_t)0xc050, (q15_t)0x6f04, (q15_t)0xc04b, (q15_t)0x6f01, (q15_t)0xc045, (q15_t)0x6efe, (q15_t)0xc040,
+  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ef8, (q15_t)0xc035, (q15_t)0x6ef5, (q15_t)0xc030, (q15_t)0x6ef1, (q15_t)0xc02a,
+  (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6eeb, (q15_t)0xc01f, (q15_t)0x6ee8, (q15_t)0xc01a, (q15_t)0x6ee5, (q15_t)0xc014,
+  (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6edf, (q15_t)0xc00a, (q15_t)0x6edc, (q15_t)0xc004, (q15_t)0x6ed8, (q15_t)0xbfff,
+  (q15_t)0x6ed5, (q15_t)0xbff9, (q15_t)0x6ed2, (q15_t)0xbff4, (q15_t)0x6ecf, (q15_t)0xbfee, (q15_t)0x6ecc, (q15_t)0xbfe9,
+  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ec6, (q15_t)0xbfde, (q15_t)0x6ec2, (q15_t)0xbfd9, (q15_t)0x6ebf, (q15_t)0xbfd3,
+  (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eb9, (q15_t)0xbfc8, (q15_t)0x6eb6, (q15_t)0xbfc3, (q15_t)0x6eb3, (q15_t)0xbfbd,
+  (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6eac, (q15_t)0xbfb3, (q15_t)0x6ea9, (q15_t)0xbfad, (q15_t)0x6ea6, (q15_t)0xbfa8,
+  (q15_t)0x6ea3, (q15_t)0xbfa2, (q15_t)0x6ea0, (q15_t)0xbf9d, (q15_t)0x6e9c, (q15_t)0xbf97, (q15_t)0x6e99, (q15_t)0xbf92,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e93, (q15_t)0xbf87, (q15_t)0x6e90, (q15_t)0xbf82, (q15_t)0x6e8d, (q15_t)0xbf7c,
+  (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e86, (q15_t)0xbf71, (q15_t)0x6e83, (q15_t)0xbf6c, (q15_t)0x6e80, (q15_t)0xbf67,
+  (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e7a, (q15_t)0xbf5c, (q15_t)0x6e76, (q15_t)0xbf56, (q15_t)0x6e73, (q15_t)0xbf51,
+  (q15_t)0x6e70, (q15_t)0xbf4b, (q15_t)0x6e6d, (q15_t)0xbf46, (q15_t)0x6e6a, (q15_t)0xbf41, (q15_t)0x6e67, (q15_t)0xbf3b,
+  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e60, (q15_t)0xbf30, (q15_t)0x6e5d, (q15_t)0xbf2b, (q15_t)0x6e5a, (q15_t)0xbf26,
+  (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e53, (q15_t)0xbf1b, (q15_t)0x6e50, (q15_t)0xbf15, (q15_t)0x6e4d, (q15_t)0xbf10,
+  (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e47, (q15_t)0xbf05, (q15_t)0x6e44, (q15_t)0xbf00, (q15_t)0x6e40, (q15_t)0xbefa,
+  (q15_t)0x6e3d, (q15_t)0xbef5, (q15_t)0x6e3a, (q15_t)0xbeef, (q15_t)0x6e37, (q15_t)0xbeea, (q15_t)0x6e34, (q15_t)0xbee5,
+  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e2d, (q15_t)0xbeda, (q15_t)0x6e2a, (q15_t)0xbed4, (q15_t)0x6e27, (q15_t)0xbecf,
+  (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e20, (q15_t)0xbec4, (q15_t)0x6e1d, (q15_t)0xbebf, (q15_t)0x6e1a, (q15_t)0xbeb9,
+  (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e14, (q15_t)0xbeae, (q15_t)0x6e10, (q15_t)0xbea9, (q15_t)0x6e0d, (q15_t)0xbea4,
+  (q15_t)0x6e0a, (q15_t)0xbe9e, (q15_t)0x6e07, (q15_t)0xbe99, (q15_t)0x6e04, (q15_t)0xbe93, (q15_t)0x6e00, (q15_t)0xbe8e,
+  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6dfa, (q15_t)0xbe83, (q15_t)0x6df7, (q15_t)0xbe7e, (q15_t)0x6df3, (q15_t)0xbe78,
+  (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6ded, (q15_t)0xbe6e, (q15_t)0x6dea, (q15_t)0xbe68, (q15_t)0x6de7, (q15_t)0xbe63,
+  (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6de0, (q15_t)0xbe58, (q15_t)0x6ddd, (q15_t)0xbe53, (q15_t)0x6dda, (q15_t)0xbe4d,
+  (q15_t)0x6dd6, (q15_t)0xbe48, (q15_t)0x6dd3, (q15_t)0xbe43, (q15_t)0x6dd0, (q15_t)0xbe3d, (q15_t)0x6dcd, (q15_t)0xbe38,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dc6, (q15_t)0xbe2d, (q15_t)0x6dc3, (q15_t)0xbe28, (q15_t)0x6dc0, (q15_t)0xbe22,
+  (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db9, (q15_t)0xbe17, (q15_t)0x6db6, (q15_t)0xbe12, (q15_t)0x6db3, (q15_t)0xbe0d,
+  (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6dac, (q15_t)0xbe02, (q15_t)0x6da9, (q15_t)0xbdfd, (q15_t)0x6da6, (q15_t)0xbdf7,
+  (q15_t)0x6da3, (q15_t)0xbdf2, (q15_t)0x6d9f, (q15_t)0xbdec, (q15_t)0x6d9c, (q15_t)0xbde7, (q15_t)0x6d99, (q15_t)0xbde2,
+  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d92, (q15_t)0xbdd7, (q15_t)0x6d8f, (q15_t)0xbdd1, (q15_t)0x6d8c, (q15_t)0xbdcc,
+  (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d85, (q15_t)0xbdc1, (q15_t)0x6d82, (q15_t)0xbdbc, (q15_t)0x6d7f, (q15_t)0xbdb7,
+  (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d78, (q15_t)0xbdac, (q15_t)0x6d75, (q15_t)0xbda6, (q15_t)0x6d72, (q15_t)0xbda1,
+  (q15_t)0x6d6f, (q15_t)0xbd9c, (q15_t)0x6d6b, (q15_t)0xbd96, (q15_t)0x6d68, (q15_t)0xbd91, (q15_t)0x6d65, (q15_t)0xbd8c,
+  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d5e, (q15_t)0xbd81, (q15_t)0x6d5b, (q15_t)0xbd7c, (q15_t)0x6d58, (q15_t)0xbd76,
+  (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d51, (q15_t)0xbd6b, (q15_t)0x6d4e, (q15_t)0xbd66, (q15_t)0x6d4b, (q15_t)0xbd61,
+  (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d44, (q15_t)0xbd56, (q15_t)0x6d41, (q15_t)0xbd51, (q15_t)0x6d3e, (q15_t)0xbd4b,
+  (q15_t)0x6d3a, (q15_t)0xbd46, (q15_t)0x6d37, (q15_t)0xbd40, (q15_t)0x6d34, (q15_t)0xbd3b, (q15_t)0x6d31, (q15_t)0xbd36,
+  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d2a, (q15_t)0xbd2b, (q15_t)0x6d27, (q15_t)0xbd26, (q15_t)0x6d23, (q15_t)0xbd20,
+  (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d1d, (q15_t)0xbd16, (q15_t)0x6d1a, (q15_t)0xbd10, (q15_t)0x6d16, (q15_t)0xbd0b,
+  (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d10, (q15_t)0xbd00, (q15_t)0x6d0c, (q15_t)0xbcfb, (q15_t)0x6d09, (q15_t)0xbcf5,
+  (q15_t)0x6d06, (q15_t)0xbcf0, (q15_t)0x6d03, (q15_t)0xbceb, (q15_t)0x6cff, (q15_t)0xbce5, (q15_t)0x6cfc, (q15_t)0xbce0,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cf5, (q15_t)0xbcd5, (q15_t)0x6cf2, (q15_t)0xbcd0, (q15_t)0x6cef, (q15_t)0xbccb,
+  (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6ce8, (q15_t)0xbcc0, (q15_t)0x6ce5, (q15_t)0xbcbb, (q15_t)0x6ce2, (q15_t)0xbcb5,
+  (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cdb, (q15_t)0xbcab, (q15_t)0x6cd8, (q15_t)0xbca5, (q15_t)0x6cd4, (q15_t)0xbca0,
+  (q15_t)0x6cd1, (q15_t)0xbc9b, (q15_t)0x6cce, (q15_t)0xbc95, (q15_t)0x6cca, (q15_t)0xbc90, (q15_t)0x6cc7, (q15_t)0xbc8b,
+  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cc1, (q15_t)0xbc80, (q15_t)0x6cbd, (q15_t)0xbc7b, (q15_t)0x6cba, (q15_t)0xbc75,
+  (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6cb3, (q15_t)0xbc6b, (q15_t)0x6cb0, (q15_t)0xbc65, (q15_t)0x6cad, (q15_t)0xbc60,
+  (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6ca6, (q15_t)0xbc55, (q15_t)0x6ca3, (q15_t)0xbc50, (q15_t)0x6c9f, (q15_t)0xbc4b,
+  (q15_t)0x6c9c, (q15_t)0xbc45, (q15_t)0x6c99, (q15_t)0xbc40, (q15_t)0x6c95, (q15_t)0xbc3b, (q15_t)0x6c92, (q15_t)0xbc35,
+  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c8b, (q15_t)0xbc2b, (q15_t)0x6c88, (q15_t)0xbc25, (q15_t)0x6c85, (q15_t)0xbc20,
+  (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c7e, (q15_t)0xbc15, (q15_t)0x6c7b, (q15_t)0xbc10, (q15_t)0x6c77, (q15_t)0xbc0b,
+  (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c71, (q15_t)0xbc00, (q15_t)0x6c6d, (q15_t)0xbbfb, (q15_t)0x6c6a, (q15_t)0xbbf5,
+  (q15_t)0x6c67, (q15_t)0xbbf0, (q15_t)0x6c63, (q15_t)0xbbeb, (q15_t)0x6c60, (q15_t)0xbbe5, (q15_t)0x6c5d, (q15_t)0xbbe0,
+  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c56, (q15_t)0xbbd5, (q15_t)0x6c53, (q15_t)0xbbd0, (q15_t)0x6c4f, (q15_t)0xbbcb,
+  (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c49, (q15_t)0xbbc0, (q15_t)0x6c45, (q15_t)0xbbbb, (q15_t)0x6c42, (q15_t)0xbbb5,
+  (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c3b, (q15_t)0xbbab, (q15_t)0x6c38, (q15_t)0xbba6, (q15_t)0x6c34, (q15_t)0xbba0,
+  (q15_t)0x6c31, (q15_t)0xbb9b, (q15_t)0x6c2e, (q15_t)0xbb96, (q15_t)0x6c2a, (q15_t)0xbb90, (q15_t)0x6c27, (q15_t)0xbb8b,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c20, (q15_t)0xbb80, (q15_t)0x6c1d, (q15_t)0xbb7b, (q15_t)0x6c1a, (q15_t)0xbb76,
+  (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c13, (q15_t)0xbb6b, (q15_t)0x6c0f, (q15_t)0xbb66, (q15_t)0x6c0c, (q15_t)0xbb61,
+  (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6c05, (q15_t)0xbb56, (q15_t)0x6c02, (q15_t)0xbb51, (q15_t)0x6bff, (q15_t)0xbb4b,
+  (q15_t)0x6bfb, (q15_t)0xbb46, (q15_t)0x6bf8, (q15_t)0xbb41, (q15_t)0x6bf5, (q15_t)0xbb3b, (q15_t)0x6bf1, (q15_t)0xbb36,
+  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bea, (q15_t)0xbb2c, (q15_t)0x6be7, (q15_t)0xbb26, (q15_t)0x6be4, (q15_t)0xbb21,
+  (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bdd, (q15_t)0xbb16, (q15_t)0x6bd9, (q15_t)0xbb11, (q15_t)0x6bd6, (q15_t)0xbb0c,
+  (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bcf, (q15_t)0xbb01, (q15_t)0x6bcc, (q15_t)0xbafc, (q15_t)0x6bc9, (q15_t)0xbaf7,
+  (q15_t)0x6bc5, (q15_t)0xbaf1, (q15_t)0x6bc2, (q15_t)0xbaec, (q15_t)0x6bbe, (q15_t)0xbae7, (q15_t)0x6bbb, (q15_t)0xbae1,
+  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6bb4, (q15_t)0xbad7, (q15_t)0x6bb1, (q15_t)0xbad2, (q15_t)0x6bad, (q15_t)0xbacc,
+  (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6ba7, (q15_t)0xbac2, (q15_t)0x6ba3, (q15_t)0xbabc, (q15_t)0x6ba0, (q15_t)0xbab7,
+  (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b99, (q15_t)0xbaad, (q15_t)0x6b96, (q15_t)0xbaa7, (q15_t)0x6b92, (q15_t)0xbaa2,
+  (q15_t)0x6b8f, (q15_t)0xba9d, (q15_t)0x6b8b, (q15_t)0xba97, (q15_t)0x6b88, (q15_t)0xba92, (q15_t)0x6b85, (q15_t)0xba8d,
+  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b7e, (q15_t)0xba82, (q15_t)0x6b7a, (q15_t)0xba7d, (q15_t)0x6b77, (q15_t)0xba78,
+  (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b70, (q15_t)0xba6d, (q15_t)0x6b6d, (q15_t)0xba68, (q15_t)0x6b69, (q15_t)0xba63,
+  (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b62, (q15_t)0xba58, (q15_t)0x6b5f, (q15_t)0xba53, (q15_t)0x6b5c, (q15_t)0xba4e,
+  (q15_t)0x6b58, (q15_t)0xba48, (q15_t)0x6b55, (q15_t)0xba43, (q15_t)0x6b51, (q15_t)0xba3e, (q15_t)0x6b4e, (q15_t)0xba39,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b47, (q15_t)0xba2e, (q15_t)0x6b44, (q15_t)0xba29, (q15_t)0x6b40, (q15_t)0xba23,
+  (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b39, (q15_t)0xba19, (q15_t)0x6b36, (q15_t)0xba14, (q15_t)0x6b32, (q15_t)0xba0e,
+  (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b2c, (q15_t)0xba04, (q15_t)0x6b28, (q15_t)0xb9ff, (q15_t)0x6b25, (q15_t)0xb9f9,
+  (q15_t)0x6b21, (q15_t)0xb9f4, (q15_t)0x6b1e, (q15_t)0xb9ef, (q15_t)0x6b1a, (q15_t)0xb9ea, (q15_t)0x6b17, (q15_t)0xb9e4,
+  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b10, (q15_t)0xb9da, (q15_t)0x6b0d, (q15_t)0xb9d5, (q15_t)0x6b09, (q15_t)0xb9cf,
+  (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6b02, (q15_t)0xb9c5, (q15_t)0x6aff, (q15_t)0xb9c0, (q15_t)0x6afb, (q15_t)0xb9ba,
+  (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6af4, (q15_t)0xb9b0, (q15_t)0x6af1, (q15_t)0xb9ab, (q15_t)0x6aee, (q15_t)0xb9a5,
+  (q15_t)0x6aea, (q15_t)0xb9a0, (q15_t)0x6ae7, (q15_t)0xb99b, (q15_t)0x6ae3, (q15_t)0xb996, (q15_t)0x6ae0, (q15_t)0xb990,
+  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ad9, (q15_t)0xb986, (q15_t)0x6ad5, (q15_t)0xb981, (q15_t)0x6ad2, (q15_t)0xb97b,
+  (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6acb, (q15_t)0xb971, (q15_t)0x6ac8, (q15_t)0xb96c, (q15_t)0x6ac4, (q15_t)0xb966,
+  (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6abd, (q15_t)0xb95c, (q15_t)0x6aba, (q15_t)0xb957, (q15_t)0x6ab6, (q15_t)0xb951,
+  (q15_t)0x6ab3, (q15_t)0xb94c, (q15_t)0x6aaf, (q15_t)0xb947, (q15_t)0x6aac, (q15_t)0xb942, (q15_t)0x6aa8, (q15_t)0xb93c,
+  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6aa1, (q15_t)0xb932, (q15_t)0x6a9e, (q15_t)0xb92d, (q15_t)0x6a9a, (q15_t)0xb928,
+  (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a93, (q15_t)0xb91d, (q15_t)0x6a90, (q15_t)0xb918, (q15_t)0x6a8c, (q15_t)0xb913,
+  (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a86, (q15_t)0xb908, (q15_t)0x6a82, (q15_t)0xb903, (q15_t)0x6a7f, (q15_t)0xb8fe,
+  (q15_t)0x6a7b, (q15_t)0xb8f8, (q15_t)0x6a78, (q15_t)0xb8f3, (q15_t)0x6a74, (q15_t)0xb8ee, (q15_t)0x6a71, (q15_t)0xb8e9,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a6a, (q15_t)0xb8de, (q15_t)0x6a66, (q15_t)0xb8d9, (q15_t)0x6a63, (q15_t)0xb8d4,
+  (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a5c, (q15_t)0xb8c9, (q15_t)0x6a58, (q15_t)0xb8c4, (q15_t)0x6a55, (q15_t)0xb8bf,
+  (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a4e, (q15_t)0xb8b5, (q15_t)0x6a4a, (q15_t)0xb8af, (q15_t)0x6a47, (q15_t)0xb8aa,
+  (q15_t)0x6a43, (q15_t)0xb8a5, (q15_t)0x6a40, (q15_t)0xb8a0, (q15_t)0x6a3c, (q15_t)0xb89b, (q15_t)0x6a39, (q15_t)0xb895,
+  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a32, (q15_t)0xb88b, (q15_t)0x6a2e, (q15_t)0xb886, (q15_t)0x6a2b, (q15_t)0xb880,
+  (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a24, (q15_t)0xb876, (q15_t)0x6a20, (q15_t)0xb871, (q15_t)0x6a1d, (q15_t)0xb86c,
+  (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a16, (q15_t)0xb861, (q15_t)0x6a12, (q15_t)0xb85c, (q15_t)0x6a0e, (q15_t)0xb857,
+  (q15_t)0x6a0b, (q15_t)0xb852, (q15_t)0x6a07, (q15_t)0xb84c, (q15_t)0x6a04, (q15_t)0xb847, (q15_t)0x6a00, (q15_t)0xb842,
+  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69f9, (q15_t)0xb838, (q15_t)0x69f6, (q15_t)0xb832, (q15_t)0x69f2, (q15_t)0xb82d,
+  (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69eb, (q15_t)0xb823, (q15_t)0x69e8, (q15_t)0xb81e, (q15_t)0x69e4, (q15_t)0xb818,
+  (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69dd, (q15_t)0xb80e, (q15_t)0x69da, (q15_t)0xb809, (q15_t)0x69d6, (q15_t)0xb804,
+  (q15_t)0x69d3, (q15_t)0xb7fe, (q15_t)0x69cf, (q15_t)0xb7f9, (q15_t)0x69cb, (q15_t)0xb7f4, (q15_t)0x69c8, (q15_t)0xb7ef,
+  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69c1, (q15_t)0xb7e4, (q15_t)0x69bd, (q15_t)0xb7df, (q15_t)0x69ba, (q15_t)0xb7da,
+  (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69b3, (q15_t)0xb7d0, (q15_t)0x69af, (q15_t)0xb7ca, (q15_t)0x69ac, (q15_t)0xb7c5,
+  (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x69a5, (q15_t)0xb7bb, (q15_t)0x69a1, (q15_t)0xb7b6, (q15_t)0x699d, (q15_t)0xb7b1,
+  (q15_t)0x699a, (q15_t)0xb7ab, (q15_t)0x6996, (q15_t)0xb7a6, (q15_t)0x6993, (q15_t)0xb7a1, (q15_t)0x698f, (q15_t)0xb79c,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6988, (q15_t)0xb791, (q15_t)0x6985, (q15_t)0xb78c, (q15_t)0x6981, (q15_t)0xb787,
+  (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x697a, (q15_t)0xb77d, (q15_t)0x6976, (q15_t)0xb778, (q15_t)0x6973, (q15_t)0xb772,
+  (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x696c, (q15_t)0xb768, (q15_t)0x6968, (q15_t)0xb763, (q15_t)0x6964, (q15_t)0xb75e,
+  (q15_t)0x6961, (q15_t)0xb758, (q15_t)0x695d, (q15_t)0xb753, (q15_t)0x695a, (q15_t)0xb74e, (q15_t)0x6956, (q15_t)0xb749,
+  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x694f, (q15_t)0xb73f, (q15_t)0x694b, (q15_t)0xb739, (q15_t)0x6948, (q15_t)0xb734,
+  (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6941, (q15_t)0xb72a, (q15_t)0x693d, (q15_t)0xb725, (q15_t)0x693a, (q15_t)0xb720,
+  (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6932, (q15_t)0xb715, (q15_t)0x692f, (q15_t)0xb710, (q15_t)0x692b, (q15_t)0xb70b,
+  (q15_t)0x6928, (q15_t)0xb706, (q15_t)0x6924, (q15_t)0xb701, (q15_t)0x6921, (q15_t)0xb6fb, (q15_t)0x691d, (q15_t)0xb6f6,
+  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x6916, (q15_t)0xb6ec, (q15_t)0x6912, (q15_t)0xb6e7, (q15_t)0x690f, (q15_t)0xb6e2,
+  (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x6907, (q15_t)0xb6d7, (q15_t)0x6904, (q15_t)0xb6d2, (q15_t)0x6900, (q15_t)0xb6cd,
+  (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68f9, (q15_t)0xb6c3, (q15_t)0x68f5, (q15_t)0xb6be, (q15_t)0x68f2, (q15_t)0xb6b8,
+  (q15_t)0x68ee, (q15_t)0xb6b3, (q15_t)0x68eb, (q15_t)0xb6ae, (q15_t)0x68e7, (q15_t)0xb6a9, (q15_t)0x68e3, (q15_t)0xb6a4,
+  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68dc, (q15_t)0xb69a, (q15_t)0x68d9, (q15_t)0xb694, (q15_t)0x68d5, (q15_t)0xb68f,
+  (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68ce, (q15_t)0xb685, (q15_t)0x68ca, (q15_t)0xb680, (q15_t)0x68c7, (q15_t)0xb67b,
+  (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68bf, (q15_t)0xb670, (q15_t)0x68bc, (q15_t)0xb66b, (q15_t)0x68b8, (q15_t)0xb666,
+  (q15_t)0x68b5, (q15_t)0xb661, (q15_t)0x68b1, (q15_t)0xb65c, (q15_t)0x68ad, (q15_t)0xb657, (q15_t)0x68aa, (q15_t)0xb652,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x68a3, (q15_t)0xb647, (q15_t)0x689f, (q15_t)0xb642, (q15_t)0x689b, (q15_t)0xb63d,
+  (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6894, (q15_t)0xb633, (q15_t)0x6890, (q15_t)0xb62e, (q15_t)0x688d, (q15_t)0xb628,
+  (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x6886, (q15_t)0xb61e, (q15_t)0x6882, (q15_t)0xb619, (q15_t)0x687e, (q15_t)0xb614,
+  (q15_t)0x687b, (q15_t)0xb60f, (q15_t)0x6877, (q15_t)0xb60a, (q15_t)0x6873, (q15_t)0xb605, (q15_t)0x6870, (q15_t)0xb5ff,
+  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6868, (q15_t)0xb5f5, (q15_t)0x6865, (q15_t)0xb5f0, (q15_t)0x6861, (q15_t)0xb5eb,
+  (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x685a, (q15_t)0xb5e1, (q15_t)0x6856, (q15_t)0xb5dc, (q15_t)0x6853, (q15_t)0xb5d6,
+  (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x684b, (q15_t)0xb5cc, (q15_t)0x6848, (q15_t)0xb5c7, (q15_t)0x6844, (q15_t)0xb5c2,
+  (q15_t)0x6840, (q15_t)0xb5bd, (q15_t)0x683d, (q15_t)0xb5b8, (q15_t)0x6839, (q15_t)0xb5b3, (q15_t)0x6835, (q15_t)0xb5ae,
+  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x682e, (q15_t)0xb5a3, (q15_t)0x682b, (q15_t)0xb59e, (q15_t)0x6827, (q15_t)0xb599,
+  (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6820, (q15_t)0xb58f, (q15_t)0x681c, (q15_t)0xb58a, (q15_t)0x6818, (q15_t)0xb585,
+  (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6811, (q15_t)0xb57a, (q15_t)0x680d, (q15_t)0xb575, (q15_t)0x680a, (q15_t)0xb570,
+  (q15_t)0x6806, (q15_t)0xb56b, (q15_t)0x6802, (q15_t)0xb566, (q15_t)0x67ff, (q15_t)0xb561, (q15_t)0x67fb, (q15_t)0xb55c,
+  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67f4, (q15_t)0xb552, (q15_t)0x67f0, (q15_t)0xb54c, (q15_t)0x67ec, (q15_t)0xb547,
+  (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67e5, (q15_t)0xb53d, (q15_t)0x67e1, (q15_t)0xb538, (q15_t)0x67de, (q15_t)0xb533,
+  (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67d6, (q15_t)0xb529, (q15_t)0x67d3, (q15_t)0xb524, (q15_t)0x67cf, (q15_t)0xb51f,
+  (q15_t)0x67cb, (q15_t)0xb519, (q15_t)0x67c8, (q15_t)0xb514, (q15_t)0x67c4, (q15_t)0xb50f, (q15_t)0x67c0, (q15_t)0xb50a,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67b9, (q15_t)0xb500, (q15_t)0x67b5, (q15_t)0xb4fb, (q15_t)0x67b2, (q15_t)0xb4f6,
+  (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x67aa, (q15_t)0xb4ec, (q15_t)0x67a6, (q15_t)0xb4e7, (q15_t)0x67a3, (q15_t)0xb4e1,
+  (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x679b, (q15_t)0xb4d7, (q15_t)0x6798, (q15_t)0xb4d2, (q15_t)0x6794, (q15_t)0xb4cd,
+  (q15_t)0x6790, (q15_t)0xb4c8, (q15_t)0x678d, (q15_t)0xb4c3, (q15_t)0x6789, (q15_t)0xb4be, (q15_t)0x6785, (q15_t)0xb4b9,
+  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x677e, (q15_t)0xb4af, (q15_t)0x677a, (q15_t)0xb4aa, (q15_t)0x6776, (q15_t)0xb4a4,
+  (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x676f, (q15_t)0xb49a, (q15_t)0x676b, (q15_t)0xb495, (q15_t)0x6768, (q15_t)0xb490,
+  (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6760, (q15_t)0xb486, (q15_t)0x675d, (q15_t)0xb481, (q15_t)0x6759, (q15_t)0xb47c,
+  (q15_t)0x6755, (q15_t)0xb477, (q15_t)0x6751, (q15_t)0xb472, (q15_t)0x674e, (q15_t)0xb46d, (q15_t)0x674a, (q15_t)0xb468,
+  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6743, (q15_t)0xb45d, (q15_t)0x673f, (q15_t)0xb458, (q15_t)0x673b, (q15_t)0xb453,
+  (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6734, (q15_t)0xb449, (q15_t)0x6730, (q15_t)0xb444, (q15_t)0x672c, (q15_t)0xb43f,
+  (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x6725, (q15_t)0xb435, (q15_t)0x6721, (q15_t)0xb430, (q15_t)0x671d, (q15_t)0xb42b,
+  (q15_t)0x671a, (q15_t)0xb426, (q15_t)0x6716, (q15_t)0xb421, (q15_t)0x6712, (q15_t)0xb41c, (q15_t)0x670e, (q15_t)0xb417,
+  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x6707, (q15_t)0xb40c, (q15_t)0x6703, (q15_t)0xb407, (q15_t)0x6700, (q15_t)0xb402,
+  (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66f8, (q15_t)0xb3f8, (q15_t)0x66f4, (q15_t)0xb3f3, (q15_t)0x66f1, (q15_t)0xb3ee,
+  (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66e9, (q15_t)0xb3e4, (q15_t)0x66e5, (q15_t)0xb3df, (q15_t)0x66e2, (q15_t)0xb3da,
+  (q15_t)0x66de, (q15_t)0xb3d5, (q15_t)0x66da, (q15_t)0xb3d0, (q15_t)0x66d6, (q15_t)0xb3cb, (q15_t)0x66d3, (q15_t)0xb3c6,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66cb, (q15_t)0xb3bc, (q15_t)0x66c8, (q15_t)0xb3b7, (q15_t)0x66c4, (q15_t)0xb3b1,
+  (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66bc, (q15_t)0xb3a7, (q15_t)0x66b9, (q15_t)0xb3a2, (q15_t)0x66b5, (q15_t)0xb39d,
+  (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66ad, (q15_t)0xb393, (q15_t)0x66aa, (q15_t)0xb38e, (q15_t)0x66a6, (q15_t)0xb389,
+  (q15_t)0x66a2, (q15_t)0xb384, (q15_t)0x669e, (q15_t)0xb37f, (q15_t)0x669b, (q15_t)0xb37a, (q15_t)0x6697, (q15_t)0xb375,
+  (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x668f, (q15_t)0xb36b, (q15_t)0x668b, (q15_t)0xb366, (q15_t)0x6688, (q15_t)0xb361,
+  (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6680, (q15_t)0xb357, (q15_t)0x667c, (q15_t)0xb352, (q15_t)0x6679, (q15_t)0xb34d,
+  (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6671, (q15_t)0xb343, (q15_t)0x666d, (q15_t)0xb33e, (q15_t)0x666a, (q15_t)0xb339,
+  (q15_t)0x6666, (q15_t)0xb334, (q15_t)0x6662, (q15_t)0xb32f, (q15_t)0x665e, (q15_t)0xb32a, (q15_t)0x665b, (q15_t)0xb325,
+  (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6653, (q15_t)0xb31a, (q15_t)0x664f, (q15_t)0xb315, (q15_t)0x664b, (q15_t)0xb310,
+  (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6644, (q15_t)0xb306, (q15_t)0x6640, (q15_t)0xb301, (q15_t)0x663c, (q15_t)0xb2fc,
+  (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6635, (q15_t)0xb2f2, (q15_t)0x6631, (q15_t)0xb2ed, (q15_t)0x662d, (q15_t)0xb2e8,
+  (q15_t)0x6629, (q15_t)0xb2e3, (q15_t)0x6626, (q15_t)0xb2de, (q15_t)0x6622, (q15_t)0xb2d9, (q15_t)0x661e, (q15_t)0xb2d4,
+  (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x6616, (q15_t)0xb2ca, (q15_t)0x6613, (q15_t)0xb2c5, (q15_t)0x660f, (q15_t)0xb2c0,
+  (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x6607, (q15_t)0xb2b6, (q15_t)0x6603, (q15_t)0xb2b1, (q15_t)0x6600, (q15_t)0xb2ac,
+  (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65f8, (q15_t)0xb2a2, (q15_t)0x65f4, (q15_t)0xb29d, (q15_t)0x65f0, (q15_t)0xb298,
+  (q15_t)0x65ed, (q15_t)0xb293, (q15_t)0x65e9, (q15_t)0xb28e, (q15_t)0x65e5, (q15_t)0xb289, (q15_t)0x65e1, (q15_t)0xb284,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65da, (q15_t)0xb27a, (q15_t)0x65d6, (q15_t)0xb275, (q15_t)0x65d2, (q15_t)0xb270,
+  (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65ca, (q15_t)0xb266, (q15_t)0x65c7, (q15_t)0xb261, (q15_t)0x65c3, (q15_t)0xb25c,
+  (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65bb, (q15_t)0xb252, (q15_t)0x65b7, (q15_t)0xb24d, (q15_t)0x65b4, (q15_t)0xb248,
+  (q15_t)0x65b0, (q15_t)0xb243, (q15_t)0x65ac, (q15_t)0xb23e, (q15_t)0x65a8, (q15_t)0xb239, (q15_t)0x65a4, (q15_t)0xb234,
+  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x659d, (q15_t)0xb22a, (q15_t)0x6599, (q15_t)0xb225, (q15_t)0x6595, (q15_t)0xb220,
+  (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x658d, (q15_t)0xb216, (q15_t)0x658a, (q15_t)0xb211, (q15_t)0x6586, (q15_t)0xb20c,
+  (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x657e, (q15_t)0xb202, (q15_t)0x657a, (q15_t)0xb1fd, (q15_t)0x6576, (q15_t)0xb1f8,
+  (q15_t)0x6573, (q15_t)0xb1f3, (q15_t)0x656f, (q15_t)0xb1ee, (q15_t)0x656b, (q15_t)0xb1e9, (q15_t)0x6567, (q15_t)0xb1e4,
+  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x655f, (q15_t)0xb1da, (q15_t)0x655c, (q15_t)0xb1d6, (q15_t)0x6558, (q15_t)0xb1d1,
+  (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6550, (q15_t)0xb1c7, (q15_t)0x654c, (q15_t)0xb1c2, (q15_t)0x6548, (q15_t)0xb1bd,
+  (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6541, (q15_t)0xb1b3, (q15_t)0x653d, (q15_t)0xb1ae, (q15_t)0x6539, (q15_t)0xb1a9,
+  (q15_t)0x6535, (q15_t)0xb1a4, (q15_t)0x6531, (q15_t)0xb19f, (q15_t)0x652d, (q15_t)0xb19a, (q15_t)0x652a, (q15_t)0xb195,
+  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6522, (q15_t)0xb18b, (q15_t)0x651e, (q15_t)0xb186, (q15_t)0x651a, (q15_t)0xb181,
+  (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6513, (q15_t)0xb177, (q15_t)0x650f, (q15_t)0xb172, (q15_t)0x650b, (q15_t)0xb16d,
+  (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x6503, (q15_t)0xb163, (q15_t)0x64ff, (q15_t)0xb15e, (q15_t)0x64fb, (q15_t)0xb159,
+  (q15_t)0x64f7, (q15_t)0xb154, (q15_t)0x64f4, (q15_t)0xb14f, (q15_t)0x64f0, (q15_t)0xb14a, (q15_t)0x64ec, (q15_t)0xb146,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64e4, (q15_t)0xb13c, (q15_t)0x64e0, (q15_t)0xb137, (q15_t)0x64dc, (q15_t)0xb132,
+  (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64d5, (q15_t)0xb128, (q15_t)0x64d1, (q15_t)0xb123, (q15_t)0x64cd, (q15_t)0xb11e,
+  (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64c5, (q15_t)0xb114, (q15_t)0x64c1, (q15_t)0xb10f, (q15_t)0x64bd, (q15_t)0xb10a,
+  (q15_t)0x64ba, (q15_t)0xb105, (q15_t)0x64b6, (q15_t)0xb100, (q15_t)0x64b2, (q15_t)0xb0fb, (q15_t)0x64ae, (q15_t)0xb0f6,
+  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x64a6, (q15_t)0xb0ec, (q15_t)0x64a2, (q15_t)0xb0e8, (q15_t)0x649e, (q15_t)0xb0e3,
+  (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x6497, (q15_t)0xb0d9, (q15_t)0x6493, (q15_t)0xb0d4, (q15_t)0x648f, (q15_t)0xb0cf,
+  (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x6487, (q15_t)0xb0c5, (q15_t)0x6483, (q15_t)0xb0c0, (q15_t)0x647f, (q15_t)0xb0bb,
+  (q15_t)0x647b, (q15_t)0xb0b6, (q15_t)0x6478, (q15_t)0xb0b1, (q15_t)0x6474, (q15_t)0xb0ac, (q15_t)0x6470, (q15_t)0xb0a7,
+  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x6468, (q15_t)0xb09e, (q15_t)0x6464, (q15_t)0xb099, (q15_t)0x6460, (q15_t)0xb094,
+  (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x6458, (q15_t)0xb08a, (q15_t)0x6454, (q15_t)0xb085, (q15_t)0x6451, (q15_t)0xb080,
+  (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x6449, (q15_t)0xb076, (q15_t)0x6445, (q15_t)0xb071, (q15_t)0x6441, (q15_t)0xb06c,
+  (q15_t)0x643d, (q15_t)0xb067, (q15_t)0x6439, (q15_t)0xb062, (q15_t)0x6435, (q15_t)0xb05e, (q15_t)0x6431, (q15_t)0xb059,
+  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x6429, (q15_t)0xb04f, (q15_t)0x6426, (q15_t)0xb04a, (q15_t)0x6422, (q15_t)0xb045,
+  (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x641a, (q15_t)0xb03b, (q15_t)0x6416, (q15_t)0xb036, (q15_t)0x6412, (q15_t)0xb031,
+  (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x640a, (q15_t)0xb027, (q15_t)0x6406, (q15_t)0xb023, (q15_t)0x6402, (q15_t)0xb01e,
+  (q15_t)0x63fe, (q15_t)0xb019, (q15_t)0x63fa, (q15_t)0xb014, (q15_t)0x63f7, (q15_t)0xb00f, (q15_t)0x63f3, (q15_t)0xb00a,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63eb, (q15_t)0xb000, (q15_t)0x63e7, (q15_t)0xaffb, (q15_t)0x63e3, (q15_t)0xaff6,
+  (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63db, (q15_t)0xafed, (q15_t)0x63d7, (q15_t)0xafe8, (q15_t)0x63d3, (q15_t)0xafe3,
+  (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63cb, (q15_t)0xafd9, (q15_t)0x63c7, (q15_t)0xafd4, (q15_t)0x63c3, (q15_t)0xafcf,
+  (q15_t)0x63c0, (q15_t)0xafca, (q15_t)0x63bc, (q15_t)0xafc5, (q15_t)0x63b8, (q15_t)0xafc1, (q15_t)0x63b4, (q15_t)0xafbc,
+  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63ac, (q15_t)0xafb2, (q15_t)0x63a8, (q15_t)0xafad, (q15_t)0x63a4, (q15_t)0xafa8,
+  (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x639c, (q15_t)0xaf9e, (q15_t)0x6398, (q15_t)0xaf99, (q15_t)0x6394, (q15_t)0xaf94,
+  (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x638c, (q15_t)0xaf8b, (q15_t)0x6388, (q15_t)0xaf86, (q15_t)0x6384, (q15_t)0xaf81,
+  (q15_t)0x6380, (q15_t)0xaf7c, (q15_t)0x637c, (q15_t)0xaf77, (q15_t)0x6378, (q15_t)0xaf72, (q15_t)0x6375, (q15_t)0xaf6d,
+  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x636d, (q15_t)0xaf64, (q15_t)0x6369, (q15_t)0xaf5f, (q15_t)0x6365, (q15_t)0xaf5a,
+  (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x635d, (q15_t)0xaf50, (q15_t)0x6359, (q15_t)0xaf4b, (q15_t)0x6355, (q15_t)0xaf46,
+  (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x634d, (q15_t)0xaf3d, (q15_t)0x6349, (q15_t)0xaf38, (q15_t)0x6345, (q15_t)0xaf33,
+  (q15_t)0x6341, (q15_t)0xaf2e, (q15_t)0x633d, (q15_t)0xaf29, (q15_t)0x6339, (q15_t)0xaf24, (q15_t)0x6335, (q15_t)0xaf1f,
+  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x632d, (q15_t)0xaf16, (q15_t)0x6329, (q15_t)0xaf11, (q15_t)0x6325, (q15_t)0xaf0c,
+  (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x631d, (q15_t)0xaf02, (q15_t)0x6319, (q15_t)0xaefd, (q15_t)0x6315, (q15_t)0xaef8,
+  (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x630d, (q15_t)0xaeef, (q15_t)0x6309, (q15_t)0xaeea, (q15_t)0x6305, (q15_t)0xaee5,
+  (q15_t)0x6301, (q15_t)0xaee0, (q15_t)0x62fd, (q15_t)0xaedb, (q15_t)0x62f9, (q15_t)0xaed6, (q15_t)0x62f5, (q15_t)0xaed2,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62ee, (q15_t)0xaec8, (q15_t)0x62ea, (q15_t)0xaec3, (q15_t)0x62e6, (q15_t)0xaebe,
+  (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62de, (q15_t)0xaeb4, (q15_t)0x62da, (q15_t)0xaeb0, (q15_t)0x62d6, (q15_t)0xaeab,
+  (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62ce, (q15_t)0xaea1, (q15_t)0x62ca, (q15_t)0xae9c, (q15_t)0x62c6, (q15_t)0xae97,
+  (q15_t)0x62c2, (q15_t)0xae92, (q15_t)0x62be, (q15_t)0xae8e, (q15_t)0x62ba, (q15_t)0xae89, (q15_t)0x62b6, (q15_t)0xae84,
+  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62ae, (q15_t)0xae7a, (q15_t)0x62aa, (q15_t)0xae75, (q15_t)0x62a6, (q15_t)0xae71,
+  (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x629e, (q15_t)0xae67, (q15_t)0x629a, (q15_t)0xae62, (q15_t)0x6296, (q15_t)0xae5d,
+  (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x628e, (q15_t)0xae54, (q15_t)0x628a, (q15_t)0xae4f, (q15_t)0x6286, (q15_t)0xae4a,
+  (q15_t)0x6282, (q15_t)0xae45, (q15_t)0x627e, (q15_t)0xae40, (q15_t)0x627a, (q15_t)0xae3b, (q15_t)0x6275, (q15_t)0xae37,
+  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x626d, (q15_t)0xae2d, (q15_t)0x6269, (q15_t)0xae28, (q15_t)0x6265, (q15_t)0xae23,
+  (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x625d, (q15_t)0xae1a, (q15_t)0x6259, (q15_t)0xae15, (q15_t)0x6255, (q15_t)0xae10,
+  (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x624d, (q15_t)0xae06, (q15_t)0x6249, (q15_t)0xae01, (q15_t)0x6245, (q15_t)0xadfd,
+  (q15_t)0x6241, (q15_t)0xadf8, (q15_t)0x623d, (q15_t)0xadf3, (q15_t)0x6239, (q15_t)0xadee, (q15_t)0x6235, (q15_t)0xade9,
+  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x622d, (q15_t)0xade0, (q15_t)0x6229, (q15_t)0xaddb, (q15_t)0x6225, (q15_t)0xadd6,
+  (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x621d, (q15_t)0xadcc, (q15_t)0x6219, (q15_t)0xadc8, (q15_t)0x6215, (q15_t)0xadc3,
+  (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x620d, (q15_t)0xadb9, (q15_t)0x6209, (q15_t)0xadb4, (q15_t)0x6205, (q15_t)0xadaf,
+  (q15_t)0x6201, (q15_t)0xadab, (q15_t)0x61fd, (q15_t)0xada6, (q15_t)0x61f9, (q15_t)0xada1, (q15_t)0x61f5, (q15_t)0xad9c,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61ec, (q15_t)0xad93, (q15_t)0x61e8, (q15_t)0xad8e, (q15_t)0x61e4, (q15_t)0xad89,
+  (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61dc, (q15_t)0xad7f, (q15_t)0x61d8, (q15_t)0xad7b, (q15_t)0x61d4, (q15_t)0xad76,
+  (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61cc, (q15_t)0xad6c, (q15_t)0x61c8, (q15_t)0xad67, (q15_t)0x61c4, (q15_t)0xad63,
+  (q15_t)0x61c0, (q15_t)0xad5e, (q15_t)0x61bc, (q15_t)0xad59, (q15_t)0x61b8, (q15_t)0xad54, (q15_t)0x61b4, (q15_t)0xad4f,
+  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x61ac, (q15_t)0xad46, (q15_t)0x61a8, (q15_t)0xad41, (q15_t)0x61a3, (q15_t)0xad3c,
+  (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x619b, (q15_t)0xad33, (q15_t)0x6197, (q15_t)0xad2e, (q15_t)0x6193, (q15_t)0xad29,
+  (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x618b, (q15_t)0xad1f, (q15_t)0x6187, (q15_t)0xad1b, (q15_t)0x6183, (q15_t)0xad16,
+  (q15_t)0x617f, (q15_t)0xad11, (q15_t)0x617b, (q15_t)0xad0c, (q15_t)0x6177, (q15_t)0xad08, (q15_t)0x6173, (q15_t)0xad03,
+  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x616b, (q15_t)0xacf9, (q15_t)0x6166, (q15_t)0xacf4, (q15_t)0x6162, (q15_t)0xacf0,
+  (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x615a, (q15_t)0xace6, (q15_t)0x6156, (q15_t)0xace1, (q15_t)0x6152, (q15_t)0xacdd,
+  (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x614a, (q15_t)0xacd3, (q15_t)0x6146, (q15_t)0xacce, (q15_t)0x6142, (q15_t)0xacc9,
+  (q15_t)0x613e, (q15_t)0xacc5, (q15_t)0x613a, (q15_t)0xacc0, (q15_t)0x6135, (q15_t)0xacbb, (q15_t)0x6131, (q15_t)0xacb6,
+  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x6129, (q15_t)0xacad, (q15_t)0x6125, (q15_t)0xaca8, (q15_t)0x6121, (q15_t)0xaca3,
+  (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x6119, (q15_t)0xac9a, (q15_t)0x6115, (q15_t)0xac95, (q15_t)0x6111, (q15_t)0xac90,
+  (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x6108, (q15_t)0xac87, (q15_t)0x6104, (q15_t)0xac82, (q15_t)0x6100, (q15_t)0xac7d,
+  (q15_t)0x60fc, (q15_t)0xac78, (q15_t)0x60f8, (q15_t)0xac74, (q15_t)0x60f4, (q15_t)0xac6f, (q15_t)0x60f0, (q15_t)0xac6a,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60e8, (q15_t)0xac61, (q15_t)0x60e4, (q15_t)0xac5c, (q15_t)0x60df, (q15_t)0xac57,
+  (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60d7, (q15_t)0xac4e, (q15_t)0x60d3, (q15_t)0xac49, (q15_t)0x60cf, (q15_t)0xac44,
+  (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60c7, (q15_t)0xac3b, (q15_t)0x60c3, (q15_t)0xac36, (q15_t)0x60bf, (q15_t)0xac31,
+  (q15_t)0x60ba, (q15_t)0xac2c, (q15_t)0x60b6, (q15_t)0xac28, (q15_t)0x60b2, (q15_t)0xac23, (q15_t)0x60ae, (q15_t)0xac1e,
+  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x60a6, (q15_t)0xac15, (q15_t)0x60a2, (q15_t)0xac10, (q15_t)0x609e, (q15_t)0xac0b,
+  (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6095, (q15_t)0xac02, (q15_t)0x6091, (q15_t)0xabfd, (q15_t)0x608d, (q15_t)0xabf8,
+  (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6085, (q15_t)0xabef, (q15_t)0x6081, (q15_t)0xabea, (q15_t)0x607d, (q15_t)0xabe5,
+  (q15_t)0x6078, (q15_t)0xabe0, (q15_t)0x6074, (q15_t)0xabdc, (q15_t)0x6070, (q15_t)0xabd7, (q15_t)0x606c, (q15_t)0xabd2,
+  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6064, (q15_t)0xabc9, (q15_t)0x6060, (q15_t)0xabc4, (q15_t)0x605c, (q15_t)0xabbf,
+  (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6053, (q15_t)0xabb6, (q15_t)0x604f, (q15_t)0xabb1, (q15_t)0x604b, (q15_t)0xabac,
+  (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6043, (q15_t)0xaba3, (q15_t)0x603f, (q15_t)0xab9e, (q15_t)0x603a, (q15_t)0xab99,
+  (q15_t)0x6036, (q15_t)0xab95, (q15_t)0x6032, (q15_t)0xab90, (q15_t)0x602e, (q15_t)0xab8b, (q15_t)0x602a, (q15_t)0xab87,
+  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6022, (q15_t)0xab7d, (q15_t)0x601d, (q15_t)0xab78, (q15_t)0x6019, (q15_t)0xab74,
+  (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6011, (q15_t)0xab6a, (q15_t)0x600d, (q15_t)0xab66, (q15_t)0x6009, (q15_t)0xab61,
+  (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x6000, (q15_t)0xab57, (q15_t)0x5ffc, (q15_t)0xab53, (q15_t)0x5ff8, (q15_t)0xab4e,
+  (q15_t)0x5ff4, (q15_t)0xab49, (q15_t)0x5ff0, (q15_t)0xab45, (q15_t)0x5fec, (q15_t)0xab40, (q15_t)0x5fe7, (q15_t)0xab3b,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fdf, (q15_t)0xab32, (q15_t)0x5fdb, (q15_t)0xab2d, (q15_t)0x5fd7, (q15_t)0xab28,
+  (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fce, (q15_t)0xab1f, (q15_t)0x5fca, (q15_t)0xab1a, (q15_t)0x5fc6, (q15_t)0xab16,
+  (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fbe, (q15_t)0xab0c, (q15_t)0x5fba, (q15_t)0xab07, (q15_t)0x5fb5, (q15_t)0xab03,
+  (q15_t)0x5fb1, (q15_t)0xaafe, (q15_t)0x5fad, (q15_t)0xaaf9, (q15_t)0x5fa9, (q15_t)0xaaf5, (q15_t)0x5fa5, (q15_t)0xaaf0,
+  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f9c, (q15_t)0xaae7, (q15_t)0x5f98, (q15_t)0xaae2, (q15_t)0x5f94, (q15_t)0xaadd,
+  (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f8c, (q15_t)0xaad4, (q15_t)0x5f87, (q15_t)0xaacf, (q15_t)0x5f83, (q15_t)0xaaca,
+  (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f7b, (q15_t)0xaac1, (q15_t)0x5f77, (q15_t)0xaabc, (q15_t)0x5f72, (q15_t)0xaab8,
+  (q15_t)0x5f6e, (q15_t)0xaab3, (q15_t)0x5f6a, (q15_t)0xaaae, (q15_t)0x5f66, (q15_t)0xaaaa, (q15_t)0x5f62, (q15_t)0xaaa5,
+  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f59, (q15_t)0xaa9c, (q15_t)0x5f55, (q15_t)0xaa97, (q15_t)0x5f51, (q15_t)0xaa92,
+  (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f49, (q15_t)0xaa89, (q15_t)0x5f44, (q15_t)0xaa84, (q15_t)0x5f40, (q15_t)0xaa7f,
+  (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f38, (q15_t)0xaa76, (q15_t)0x5f34, (q15_t)0xaa71, (q15_t)0x5f2f, (q15_t)0xaa6d,
+  (q15_t)0x5f2b, (q15_t)0xaa68, (q15_t)0x5f27, (q15_t)0xaa63, (q15_t)0x5f23, (q15_t)0xaa5f, (q15_t)0x5f1f, (q15_t)0xaa5a,
+  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f16, (q15_t)0xaa51, (q15_t)0x5f12, (q15_t)0xaa4c, (q15_t)0x5f0e, (q15_t)0xaa47,
+  (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5f05, (q15_t)0xaa3e, (q15_t)0x5f01, (q15_t)0xaa39, (q15_t)0x5efd, (q15_t)0xaa35,
+  (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ef5, (q15_t)0xaa2b, (q15_t)0x5ef0, (q15_t)0xaa27, (q15_t)0x5eec, (q15_t)0xaa22,
+  (q15_t)0x5ee8, (q15_t)0xaa1d, (q15_t)0x5ee4, (q15_t)0xaa19, (q15_t)0x5edf, (q15_t)0xaa14, (q15_t)0x5edb, (q15_t)0xaa10,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ed3, (q15_t)0xaa06, (q15_t)0x5ecf, (q15_t)0xaa02, (q15_t)0x5eca, (q15_t)0xa9fd,
+  (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5ec2, (q15_t)0xa9f4, (q15_t)0x5ebe, (q15_t)0xa9ef, (q15_t)0x5eb9, (q15_t)0xa9ea,
+  (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5eb1, (q15_t)0xa9e1, (q15_t)0x5ead, (q15_t)0xa9dc, (q15_t)0x5ea9, (q15_t)0xa9d8,
+  (q15_t)0x5ea4, (q15_t)0xa9d3, (q15_t)0x5ea0, (q15_t)0xa9ce, (q15_t)0x5e9c, (q15_t)0xa9ca, (q15_t)0x5e98, (q15_t)0xa9c5,
+  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e8f, (q15_t)0xa9bc, (q15_t)0x5e8b, (q15_t)0xa9b7, (q15_t)0x5e87, (q15_t)0xa9b3,
+  (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e7e, (q15_t)0xa9a9, (q15_t)0x5e7a, (q15_t)0xa9a5, (q15_t)0x5e76, (q15_t)0xa9a0,
+  (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e6d, (q15_t)0xa997, (q15_t)0x5e69, (q15_t)0xa992, (q15_t)0x5e65, (q15_t)0xa98d,
+  (q15_t)0x5e60, (q15_t)0xa989, (q15_t)0x5e5c, (q15_t)0xa984, (q15_t)0x5e58, (q15_t)0xa980, (q15_t)0x5e54, (q15_t)0xa97b,
+  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e4b, (q15_t)0xa972, (q15_t)0x5e47, (q15_t)0xa96d, (q15_t)0x5e43, (q15_t)0xa968,
+  (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e3a, (q15_t)0xa95f, (q15_t)0x5e36, (q15_t)0xa95b, (q15_t)0x5e32, (q15_t)0xa956,
+  (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e29, (q15_t)0xa94d, (q15_t)0x5e25, (q15_t)0xa948, (q15_t)0x5e21, (q15_t)0xa943,
+  (q15_t)0x5e1c, (q15_t)0xa93f, (q15_t)0x5e18, (q15_t)0xa93a, (q15_t)0x5e14, (q15_t)0xa936, (q15_t)0x5e10, (q15_t)0xa931,
+  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5e07, (q15_t)0xa928, (q15_t)0x5e03, (q15_t)0xa923, (q15_t)0x5dff, (q15_t)0xa91e,
+  (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5df6, (q15_t)0xa915, (q15_t)0x5df2, (q15_t)0xa911, (q15_t)0x5dee, (q15_t)0xa90c,
+  (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5de5, (q15_t)0xa903, (q15_t)0x5de1, (q15_t)0xa8fe, (q15_t)0x5ddc, (q15_t)0xa8fa,
+  (q15_t)0x5dd8, (q15_t)0xa8f5, (q15_t)0x5dd4, (q15_t)0xa8f0, (q15_t)0x5dd0, (q15_t)0xa8ec, (q15_t)0x5dcb, (q15_t)0xa8e7,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5dc3, (q15_t)0xa8de, (q15_t)0x5dbf, (q15_t)0xa8d9, (q15_t)0x5dba, (q15_t)0xa8d5,
+  (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5db2, (q15_t)0xa8cc, (q15_t)0x5dad, (q15_t)0xa8c7, (q15_t)0x5da9, (q15_t)0xa8c2,
+  (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5da1, (q15_t)0xa8b9, (q15_t)0x5d9c, (q15_t)0xa8b5, (q15_t)0x5d98, (q15_t)0xa8b0,
+  (q15_t)0x5d94, (q15_t)0xa8ab, (q15_t)0x5d8f, (q15_t)0xa8a7, (q15_t)0x5d8b, (q15_t)0xa8a2, (q15_t)0x5d87, (q15_t)0xa89e,
+  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d7e, (q15_t)0xa894, (q15_t)0x5d7a, (q15_t)0xa890, (q15_t)0x5d76, (q15_t)0xa88b,
+  (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d6d, (q15_t)0xa882, (q15_t)0x5d69, (q15_t)0xa87d, (q15_t)0x5d65, (q15_t)0xa879,
+  (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d5c, (q15_t)0xa870, (q15_t)0x5d58, (q15_t)0xa86b, (q15_t)0x5d53, (q15_t)0xa867,
+  (q15_t)0x5d4f, (q15_t)0xa862, (q15_t)0x5d4b, (q15_t)0xa85d, (q15_t)0x5d46, (q15_t)0xa859, (q15_t)0x5d42, (q15_t)0xa854,
+  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d3a, (q15_t)0xa84b, (q15_t)0x5d35, (q15_t)0xa847, (q15_t)0x5d31, (q15_t)0xa842,
+  (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d28, (q15_t)0xa839, (q15_t)0x5d24, (q15_t)0xa834, (q15_t)0x5d20, (q15_t)0xa830,
+  (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d17, (q15_t)0xa827, (q15_t)0x5d13, (q15_t)0xa822, (q15_t)0x5d0e, (q15_t)0xa81d,
+  (q15_t)0x5d0a, (q15_t)0xa819, (q15_t)0x5d06, (q15_t)0xa814, (q15_t)0x5d01, (q15_t)0xa810, (q15_t)0x5cfd, (q15_t)0xa80b,
+  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5cf5, (q15_t)0xa802, (q15_t)0x5cf0, (q15_t)0xa7fd, (q15_t)0x5cec, (q15_t)0xa7f9,
+  (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5ce3, (q15_t)0xa7f0, (q15_t)0x5cdf, (q15_t)0xa7eb, (q15_t)0x5cdb, (q15_t)0xa7e7,
+  (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cd2, (q15_t)0xa7de, (q15_t)0x5cce, (q15_t)0xa7d9, (q15_t)0x5cc9, (q15_t)0xa7d4,
+  (q15_t)0x5cc5, (q15_t)0xa7d0, (q15_t)0x5cc1, (q15_t)0xa7cb, (q15_t)0x5cbc, (q15_t)0xa7c7, (q15_t)0x5cb8, (q15_t)0xa7c2,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5caf, (q15_t)0xa7b9, (q15_t)0x5cab, (q15_t)0xa7b5, (q15_t)0x5ca7, (q15_t)0xa7b0,
+  (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c9e, (q15_t)0xa7a7, (q15_t)0x5c9a, (q15_t)0xa7a2, (q15_t)0x5c95, (q15_t)0xa79e,
+  (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c8d, (q15_t)0xa795, (q15_t)0x5c88, (q15_t)0xa790, (q15_t)0x5c84, (q15_t)0xa78c,
+  (q15_t)0x5c80, (q15_t)0xa787, (q15_t)0x5c7b, (q15_t)0xa783, (q15_t)0x5c77, (q15_t)0xa77e, (q15_t)0x5c73, (q15_t)0xa779,
+  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c6a, (q15_t)0xa770, (q15_t)0x5c66, (q15_t)0xa76c, (q15_t)0x5c61, (q15_t)0xa767,
+  (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c58, (q15_t)0xa75e, (q15_t)0x5c54, (q15_t)0xa75a, (q15_t)0x5c50, (q15_t)0xa755,
+  (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c47, (q15_t)0xa74c, (q15_t)0x5c43, (q15_t)0xa748, (q15_t)0x5c3e, (q15_t)0xa743,
+  (q15_t)0x5c3a, (q15_t)0xa73f, (q15_t)0x5c36, (q15_t)0xa73a, (q15_t)0x5c31, (q15_t)0xa735, (q15_t)0x5c2d, (q15_t)0xa731,
+  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c24, (q15_t)0xa728, (q15_t)0x5c20, (q15_t)0xa723, (q15_t)0x5c1b, (q15_t)0xa71f,
+  (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c13, (q15_t)0xa716, (q15_t)0x5c0e, (q15_t)0xa711, (q15_t)0x5c0a, (q15_t)0xa70d,
+  (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5c01, (q15_t)0xa704, (q15_t)0x5bfd, (q15_t)0xa6ff, (q15_t)0x5bf9, (q15_t)0xa6fb,
+  (q15_t)0x5bf4, (q15_t)0xa6f6, (q15_t)0x5bf0, (q15_t)0xa6f2, (q15_t)0x5beb, (q15_t)0xa6ed, (q15_t)0x5be7, (q15_t)0xa6e9,
+  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bde, (q15_t)0xa6e0, (q15_t)0x5bda, (q15_t)0xa6db, (q15_t)0x5bd6, (q15_t)0xa6d7,
+  (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bcd, (q15_t)0xa6ce, (q15_t)0x5bc8, (q15_t)0xa6c9, (q15_t)0x5bc4, (q15_t)0xa6c5,
+  (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bbb, (q15_t)0xa6bc, (q15_t)0x5bb7, (q15_t)0xa6b7, (q15_t)0x5bb2, (q15_t)0xa6b3,
+  (q15_t)0x5bae, (q15_t)0xa6ae, (q15_t)0x5baa, (q15_t)0xa6aa, (q15_t)0x5ba5, (q15_t)0xa6a5, (q15_t)0x5ba1, (q15_t)0xa6a1,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b98, (q15_t)0xa698, (q15_t)0x5b94, (q15_t)0xa693, (q15_t)0x5b8f, (q15_t)0xa68f,
+  (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b87, (q15_t)0xa686, (q15_t)0x5b82, (q15_t)0xa681, (q15_t)0x5b7e, (q15_t)0xa67d,
+  (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b75, (q15_t)0xa674, (q15_t)0x5b71, (q15_t)0xa66f, (q15_t)0x5b6c, (q15_t)0xa66b,
+  (q15_t)0x5b68, (q15_t)0xa666, (q15_t)0x5b63, (q15_t)0xa662, (q15_t)0x5b5f, (q15_t)0xa65d, (q15_t)0x5b5b, (q15_t)0xa659,
+  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b52, (q15_t)0xa650, (q15_t)0x5b4d, (q15_t)0xa64b, (q15_t)0x5b49, (q15_t)0xa647,
+  (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b40, (q15_t)0xa63e, (q15_t)0x5b3c, (q15_t)0xa639, (q15_t)0x5b37, (q15_t)0xa635,
+  (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b2f, (q15_t)0xa62c, (q15_t)0x5b2a, (q15_t)0xa627, (q15_t)0x5b26, (q15_t)0xa623,
+  (q15_t)0x5b21, (q15_t)0xa61f, (q15_t)0x5b1d, (q15_t)0xa61a, (q15_t)0x5b19, (q15_t)0xa616, (q15_t)0x5b14, (q15_t)0xa611,
+  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5b0b, (q15_t)0xa608, (q15_t)0x5b07, (q15_t)0xa604, (q15_t)0x5b02, (q15_t)0xa5ff,
+  (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5afa, (q15_t)0xa5f6, (q15_t)0x5af5, (q15_t)0xa5f2, (q15_t)0x5af1, (q15_t)0xa5ed,
+  (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5ae8, (q15_t)0xa5e4, (q15_t)0x5ae4, (q15_t)0xa5e0, (q15_t)0x5adf, (q15_t)0xa5dc,
+  (q15_t)0x5adb, (q15_t)0xa5d7, (q15_t)0x5ad6, (q15_t)0xa5d3, (q15_t)0x5ad2, (q15_t)0xa5ce, (q15_t)0x5acd, (q15_t)0xa5ca,
+  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ac5, (q15_t)0xa5c1, (q15_t)0x5ac0, (q15_t)0xa5bc, (q15_t)0x5abc, (q15_t)0xa5b8,
+  (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5ab3, (q15_t)0xa5af, (q15_t)0x5aae, (q15_t)0xa5aa, (q15_t)0x5aaa, (q15_t)0xa5a6,
+  (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5aa1, (q15_t)0xa59d, (q15_t)0x5a9d, (q15_t)0xa599, (q15_t)0x5a98, (q15_t)0xa594,
+  (q15_t)0x5a94, (q15_t)0xa590, (q15_t)0x5a8f, (q15_t)0xa58b, (q15_t)0x5a8b, (q15_t)0xa587, (q15_t)0x5a86, (q15_t)0xa582,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a7e, (q15_t)0xa57a, (q15_t)0x5a79, (q15_t)0xa575, (q15_t)0x5a75, (q15_t)0xa571,
+  (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a6c, (q15_t)0xa568, (q15_t)0x5a67, (q15_t)0xa563, (q15_t)0x5a63, (q15_t)0xa55f,
+  (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a5a, (q15_t)0xa556, (q15_t)0x5a56, (q15_t)0xa552, (q15_t)0x5a51, (q15_t)0xa54d,
+  (q15_t)0x5a4d, (q15_t)0xa549, (q15_t)0x5a48, (q15_t)0xa544, (q15_t)0x5a44, (q15_t)0xa540, (q15_t)0x5a3f, (q15_t)0xa53b,
+  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a36, (q15_t)0xa533, (q15_t)0x5a32, (q15_t)0xa52e, (q15_t)0x5a2d, (q15_t)0xa52a,
+  (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a24, (q15_t)0xa521, (q15_t)0x5a20, (q15_t)0xa51c, (q15_t)0x5a1c, (q15_t)0xa518,
+  (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a13, (q15_t)0xa50f, (q15_t)0x5a0e, (q15_t)0xa50b, (q15_t)0x5a0a, (q15_t)0xa506,
+  (q15_t)0x5a05, (q15_t)0xa502, (q15_t)0x5a01, (q15_t)0xa4fe, (q15_t)0x59fc, (q15_t)0xa4f9, (q15_t)0x59f8, (q15_t)0xa4f5,
+  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ef, (q15_t)0xa4ec, (q15_t)0x59ea, (q15_t)0xa4e7, (q15_t)0x59e6, (q15_t)0xa4e3,
+  (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59dd, (q15_t)0xa4da, (q15_t)0x59d9, (q15_t)0xa4d6, (q15_t)0x59d4, (q15_t)0xa4d1,
+  (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59cb, (q15_t)0xa4c9, (q15_t)0x59c7, (q15_t)0xa4c4, (q15_t)0x59c2, (q15_t)0xa4c0,
+  (q15_t)0x59be, (q15_t)0xa4bb, (q15_t)0x59b9, (q15_t)0xa4b7, (q15_t)0x59b5, (q15_t)0xa4b3, (q15_t)0x59b0, (q15_t)0xa4ae,
+  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x59a7, (q15_t)0xa4a5, (q15_t)0x59a3, (q15_t)0xa4a1, (q15_t)0x599e, (q15_t)0xa49d,
+  (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5995, (q15_t)0xa494, (q15_t)0x5991, (q15_t)0xa48f, (q15_t)0x598c, (q15_t)0xa48b,
+  (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5983, (q15_t)0xa482, (q15_t)0x597f, (q15_t)0xa47e, (q15_t)0x597a, (q15_t)0xa479,
+  (q15_t)0x5976, (q15_t)0xa475, (q15_t)0x5971, (q15_t)0xa471, (q15_t)0x596d, (q15_t)0xa46c, (q15_t)0x5968, (q15_t)0xa468,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x595f, (q15_t)0xa45f, (q15_t)0x595b, (q15_t)0xa45b, (q15_t)0x5956, (q15_t)0xa456,
+  (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x594d, (q15_t)0xa44e, (q15_t)0x5949, (q15_t)0xa449, (q15_t)0x5944, (q15_t)0xa445,
+  (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x593b, (q15_t)0xa43c, (q15_t)0x5937, (q15_t)0xa438, (q15_t)0x5932, (q15_t)0xa433,
+  (q15_t)0x592e, (q15_t)0xa42f, (q15_t)0x5929, (q15_t)0xa42a, (q15_t)0x5925, (q15_t)0xa426, (q15_t)0x5920, (q15_t)0xa422,
+  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x5917, (q15_t)0xa419, (q15_t)0x5913, (q15_t)0xa415, (q15_t)0x590e, (q15_t)0xa410,
+  (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x5905, (q15_t)0xa407, (q15_t)0x5901, (q15_t)0xa403, (q15_t)0x58fc, (q15_t)0xa3ff,
+  (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58f3, (q15_t)0xa3f6, (q15_t)0x58ef, (q15_t)0xa3f2, (q15_t)0x58ea, (q15_t)0xa3ed,
+  (q15_t)0x58e6, (q15_t)0xa3e9, (q15_t)0x58e1, (q15_t)0xa3e5, (q15_t)0x58dd, (q15_t)0xa3e0, (q15_t)0x58d8, (q15_t)0xa3dc,
+  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58cf, (q15_t)0xa3d3, (q15_t)0x58cb, (q15_t)0xa3cf, (q15_t)0x58c6, (q15_t)0xa3ca,
+  (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58bd, (q15_t)0xa3c2, (q15_t)0x58b8, (q15_t)0xa3bd, (q15_t)0x58b4, (q15_t)0xa3b9,
+  (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x58ab, (q15_t)0xa3b0, (q15_t)0x58a6, (q15_t)0xa3ac, (q15_t)0x58a2, (q15_t)0xa3a8,
+  (q15_t)0x589d, (q15_t)0xa3a3, (q15_t)0x5899, (q15_t)0xa39f, (q15_t)0x5894, (q15_t)0xa39a, (q15_t)0x5890, (q15_t)0xa396,
+  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5887, (q15_t)0xa38d, (q15_t)0x5882, (q15_t)0xa389, (q15_t)0x587d, (q15_t)0xa385,
+  (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5874, (q15_t)0xa37c, (q15_t)0x5870, (q15_t)0xa378, (q15_t)0x586b, (q15_t)0xa373,
+  (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5862, (q15_t)0xa36b, (q15_t)0x585e, (q15_t)0xa366, (q15_t)0x5859, (q15_t)0xa362,
+  (q15_t)0x5855, (q15_t)0xa35e, (q15_t)0x5850, (q15_t)0xa359, (q15_t)0x584b, (q15_t)0xa355, (q15_t)0x5847, (q15_t)0xa351,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x583e, (q15_t)0xa348, (q15_t)0x5839, (q15_t)0xa344, (q15_t)0x5835, (q15_t)0xa33f,
+  (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x582c, (q15_t)0xa337, (q15_t)0x5827, (q15_t)0xa332, (q15_t)0x5822, (q15_t)0xa32e,
+  (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x5819, (q15_t)0xa325, (q15_t)0x5815, (q15_t)0xa321, (q15_t)0x5810, (q15_t)0xa31d,
+  (q15_t)0x580c, (q15_t)0xa318, (q15_t)0x5807, (q15_t)0xa314, (q15_t)0x5803, (q15_t)0xa310, (q15_t)0x57fe, (q15_t)0xa30b,
+  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57f5, (q15_t)0xa303, (q15_t)0x57f0, (q15_t)0xa2ff, (q15_t)0x57ec, (q15_t)0xa2fa,
+  (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57e3, (q15_t)0xa2f2, (q15_t)0x57de, (q15_t)0xa2ed, (q15_t)0x57d9, (q15_t)0xa2e9,
+  (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57d0, (q15_t)0xa2e0, (q15_t)0x57cc, (q15_t)0xa2dc, (q15_t)0x57c7, (q15_t)0xa2d8,
+  (q15_t)0x57c3, (q15_t)0xa2d3, (q15_t)0x57be, (q15_t)0xa2cf, (q15_t)0x57b9, (q15_t)0xa2cb, (q15_t)0x57b5, (q15_t)0xa2c6,
+  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x57ac, (q15_t)0xa2be, (q15_t)0x57a7, (q15_t)0xa2ba, (q15_t)0x57a3, (q15_t)0xa2b5,
+  (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x5799, (q15_t)0xa2ad, (q15_t)0x5795, (q15_t)0xa2a8, (q15_t)0x5790, (q15_t)0xa2a4,
+  (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5787, (q15_t)0xa29b, (q15_t)0x5783, (q15_t)0xa297, (q15_t)0x577e, (q15_t)0xa293,
+  (q15_t)0x5779, (q15_t)0xa28f, (q15_t)0x5775, (q15_t)0xa28a, (q15_t)0x5770, (q15_t)0xa286, (q15_t)0x576c, (q15_t)0xa282,
+  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5762, (q15_t)0xa279, (q15_t)0x575e, (q15_t)0xa275, (q15_t)0x5759, (q15_t)0xa271,
+  (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5750, (q15_t)0xa268, (q15_t)0x574b, (q15_t)0xa264, (q15_t)0x5747, (q15_t)0xa25f,
+  (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x573e, (q15_t)0xa257, (q15_t)0x5739, (q15_t)0xa253, (q15_t)0x5734, (q15_t)0xa24e,
+  (q15_t)0x5730, (q15_t)0xa24a, (q15_t)0x572b, (q15_t)0xa246, (q15_t)0x5727, (q15_t)0xa241, (q15_t)0x5722, (q15_t)0xa23d,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x5719, (q15_t)0xa235, (q15_t)0x5714, (q15_t)0xa230, (q15_t)0x5710, (q15_t)0xa22c,
+  (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x5706, (q15_t)0xa224, (q15_t)0x5702, (q15_t)0xa21f, (q15_t)0x56fd, (q15_t)0xa21b,
+  (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56f4, (q15_t)0xa212, (q15_t)0x56ef, (q15_t)0xa20e, (q15_t)0x56eb, (q15_t)0xa20a,
+  (q15_t)0x56e6, (q15_t)0xa206, (q15_t)0x56e2, (q15_t)0xa201, (q15_t)0x56dd, (q15_t)0xa1fd, (q15_t)0x56d8, (q15_t)0xa1f9,
+  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56cf, (q15_t)0xa1f0, (q15_t)0x56ca, (q15_t)0xa1ec, (q15_t)0x56c6, (q15_t)0xa1e8,
+  (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56bd, (q15_t)0xa1df, (q15_t)0x56b8, (q15_t)0xa1db, (q15_t)0x56b3, (q15_t)0xa1d7,
+  (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x56aa, (q15_t)0xa1ce, (q15_t)0x56a5, (q15_t)0xa1ca, (q15_t)0x56a1, (q15_t)0xa1c6,
+  (q15_t)0x569c, (q15_t)0xa1c1, (q15_t)0x5698, (q15_t)0xa1bd, (q15_t)0x5693, (q15_t)0xa1b9, (q15_t)0x568e, (q15_t)0xa1b5,
+  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5685, (q15_t)0xa1ac, (q15_t)0x5680, (q15_t)0xa1a8, (q15_t)0x567c, (q15_t)0xa1a4,
+  (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5673, (q15_t)0xa19b, (q15_t)0x566e, (q15_t)0xa197, (q15_t)0x5669, (q15_t)0xa193,
+  (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5660, (q15_t)0xa18a, (q15_t)0x565b, (q15_t)0xa186, (q15_t)0x5657, (q15_t)0xa182,
+  (q15_t)0x5652, (q15_t)0xa17e, (q15_t)0x564d, (q15_t)0xa179, (q15_t)0x5649, (q15_t)0xa175, (q15_t)0x5644, (q15_t)0xa171,
+  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x563b, (q15_t)0xa168, (q15_t)0x5636, (q15_t)0xa164, (q15_t)0x5632, (q15_t)0xa160,
+  (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x5628, (q15_t)0xa157, (q15_t)0x5624, (q15_t)0xa153, (q15_t)0x561f, (q15_t)0xa14f,
+  (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5616, (q15_t)0xa147, (q15_t)0x5611, (q15_t)0xa142, (q15_t)0x560c, (q15_t)0xa13e,
+  (q15_t)0x5608, (q15_t)0xa13a, (q15_t)0x5603, (q15_t)0xa136, (q15_t)0x55fe, (q15_t)0xa131, (q15_t)0x55fa, (q15_t)0xa12d,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55f0, (q15_t)0xa125, (q15_t)0x55ec, (q15_t)0xa121, (q15_t)0x55e7, (q15_t)0xa11c,
+  (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55de, (q15_t)0xa114, (q15_t)0x55d9, (q15_t)0xa110, (q15_t)0x55d5, (q15_t)0xa10b,
+  (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55cb, (q15_t)0xa103, (q15_t)0x55c7, (q15_t)0xa0ff, (q15_t)0x55c2, (q15_t)0xa0fb,
+  (q15_t)0x55bd, (q15_t)0xa0f6, (q15_t)0x55b9, (q15_t)0xa0f2, (q15_t)0x55b4, (q15_t)0xa0ee, (q15_t)0x55af, (q15_t)0xa0ea,
+  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x55a6, (q15_t)0xa0e1, (q15_t)0x55a1, (q15_t)0xa0dd, (q15_t)0x559d, (q15_t)0xa0d9,
+  (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5593, (q15_t)0xa0d1, (q15_t)0x558f, (q15_t)0xa0cc, (q15_t)0x558a, (q15_t)0xa0c8,
+  (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5581, (q15_t)0xa0c0, (q15_t)0x557c, (q15_t)0xa0bc, (q15_t)0x5577, (q15_t)0xa0b7,
+  (q15_t)0x5572, (q15_t)0xa0b3, (q15_t)0x556e, (q15_t)0xa0af, (q15_t)0x5569, (q15_t)0xa0ab, (q15_t)0x5564, (q15_t)0xa0a7,
+  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x555b, (q15_t)0xa09e, (q15_t)0x5556, (q15_t)0xa09a, (q15_t)0x5552, (q15_t)0xa096,
+  (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x5548, (q15_t)0xa08e, (q15_t)0x5544, (q15_t)0xa089, (q15_t)0x553f, (q15_t)0xa085,
+  (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5536, (q15_t)0xa07d, (q15_t)0x5531, (q15_t)0xa079, (q15_t)0x552c, (q15_t)0xa074,
+  (q15_t)0x5528, (q15_t)0xa070, (q15_t)0x5523, (q15_t)0xa06c, (q15_t)0x551e, (q15_t)0xa068, (q15_t)0x5519, (q15_t)0xa064,
+  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5510, (q15_t)0xa05b, (q15_t)0x550b, (q15_t)0xa057, (q15_t)0x5507, (q15_t)0xa053,
+  (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54fd, (q15_t)0xa04b, (q15_t)0x54f9, (q15_t)0xa046, (q15_t)0x54f4, (q15_t)0xa042,
+  (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54ea, (q15_t)0xa03a, (q15_t)0x54e6, (q15_t)0xa036, (q15_t)0x54e1, (q15_t)0xa032,
+  (q15_t)0x54dc, (q15_t)0xa02d, (q15_t)0x54d8, (q15_t)0xa029, (q15_t)0x54d3, (q15_t)0xa025, (q15_t)0x54ce, (q15_t)0xa021,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54c5, (q15_t)0xa019, (q15_t)0x54c0, (q15_t)0xa014, (q15_t)0x54bb, (q15_t)0xa010,
+  (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54b2, (q15_t)0xa008, (q15_t)0x54ad, (q15_t)0xa004, (q15_t)0x54a9, (q15_t)0xa000,
+  (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x549f, (q15_t)0x9ff7, (q15_t)0x549a, (q15_t)0x9ff3, (q15_t)0x5496, (q15_t)0x9fef,
+  (q15_t)0x5491, (q15_t)0x9feb, (q15_t)0x548c, (q15_t)0x9fe7, (q15_t)0x5488, (q15_t)0x9fe3, (q15_t)0x5483, (q15_t)0x9fde,
+  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5479, (q15_t)0x9fd6, (q15_t)0x5475, (q15_t)0x9fd2, (q15_t)0x5470, (q15_t)0x9fce,
+  (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5467, (q15_t)0x9fc6, (q15_t)0x5462, (q15_t)0x9fc1, (q15_t)0x545d, (q15_t)0x9fbd,
+  (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5454, (q15_t)0x9fb5, (q15_t)0x544f, (q15_t)0x9fb1, (q15_t)0x544a, (q15_t)0x9fad,
+  (q15_t)0x5445, (q15_t)0x9fa9, (q15_t)0x5441, (q15_t)0x9fa4, (q15_t)0x543c, (q15_t)0x9fa0, (q15_t)0x5437, (q15_t)0x9f9c,
+  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x542e, (q15_t)0x9f94, (q15_t)0x5429, (q15_t)0x9f90, (q15_t)0x5424, (q15_t)0x9f8c,
+  (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x541b, (q15_t)0x9f83, (q15_t)0x5416, (q15_t)0x9f7f, (q15_t)0x5411, (q15_t)0x9f7b,
+  (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x5408, (q15_t)0x9f73, (q15_t)0x5403, (q15_t)0x9f6f, (q15_t)0x53fe, (q15_t)0x9f6b,
+  (q15_t)0x53fa, (q15_t)0x9f67, (q15_t)0x53f5, (q15_t)0x9f62, (q15_t)0x53f0, (q15_t)0x9f5e, (q15_t)0x53eb, (q15_t)0x9f5a,
+  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53e2, (q15_t)0x9f52, (q15_t)0x53dd, (q15_t)0x9f4e, (q15_t)0x53d8, (q15_t)0x9f4a,
+  (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53cf, (q15_t)0x9f41, (q15_t)0x53ca, (q15_t)0x9f3d, (q15_t)0x53c5, (q15_t)0x9f39,
+  (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53bc, (q15_t)0x9f31, (q15_t)0x53b7, (q15_t)0x9f2d, (q15_t)0x53b2, (q15_t)0x9f29,
+  (q15_t)0x53ae, (q15_t)0x9f25, (q15_t)0x53a9, (q15_t)0x9f21, (q15_t)0x53a4, (q15_t)0x9f1c, (q15_t)0x539f, (q15_t)0x9f18,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5396, (q15_t)0x9f10, (q15_t)0x5391, (q15_t)0x9f0c, (q15_t)0x538c, (q15_t)0x9f08,
+  (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5383, (q15_t)0x9f00, (q15_t)0x537e, (q15_t)0x9efc, (q15_t)0x5379, (q15_t)0x9ef8,
+  (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5370, (q15_t)0x9eef, (q15_t)0x536b, (q15_t)0x9eeb, (q15_t)0x5366, (q15_t)0x9ee7,
+  (q15_t)0x5362, (q15_t)0x9ee3, (q15_t)0x535d, (q15_t)0x9edf, (q15_t)0x5358, (q15_t)0x9edb, (q15_t)0x5353, (q15_t)0x9ed7,
+  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x534a, (q15_t)0x9ecf, (q15_t)0x5345, (q15_t)0x9ecb, (q15_t)0x5340, (q15_t)0x9ec6,
+  (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5337, (q15_t)0x9ebe, (q15_t)0x5332, (q15_t)0x9eba, (q15_t)0x532d, (q15_t)0x9eb6,
+  (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5323, (q15_t)0x9eae, (q15_t)0x531f, (q15_t)0x9eaa, (q15_t)0x531a, (q15_t)0x9ea6,
+  (q15_t)0x5315, (q15_t)0x9ea2, (q15_t)0x5310, (q15_t)0x9e9e, (q15_t)0x530c, (q15_t)0x9e9a, (q15_t)0x5307, (q15_t)0x9e95,
+  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52fd, (q15_t)0x9e8d, (q15_t)0x52f8, (q15_t)0x9e89, (q15_t)0x52f4, (q15_t)0x9e85,
+  (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52ea, (q15_t)0x9e7d, (q15_t)0x52e5, (q15_t)0x9e79, (q15_t)0x52e1, (q15_t)0x9e75,
+  (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52d7, (q15_t)0x9e6d, (q15_t)0x52d2, (q15_t)0x9e69, (q15_t)0x52cd, (q15_t)0x9e65,
+  (q15_t)0x52c9, (q15_t)0x9e61, (q15_t)0x52c4, (q15_t)0x9e5d, (q15_t)0x52bf, (q15_t)0x9e58, (q15_t)0x52ba, (q15_t)0x9e54,
+  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52b1, (q15_t)0x9e4c, (q15_t)0x52ac, (q15_t)0x9e48, (q15_t)0x52a7, (q15_t)0x9e44,
+  (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x529d, (q15_t)0x9e3c, (q15_t)0x5299, (q15_t)0x9e38, (q15_t)0x5294, (q15_t)0x9e34,
+  (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x528a, (q15_t)0x9e2c, (q15_t)0x5285, (q15_t)0x9e28, (q15_t)0x5281, (q15_t)0x9e24,
+  (q15_t)0x527c, (q15_t)0x9e20, (q15_t)0x5277, (q15_t)0x9e1c, (q15_t)0x5272, (q15_t)0x9e18, (q15_t)0x526d, (q15_t)0x9e14,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5264, (q15_t)0x9e0b, (q15_t)0x525f, (q15_t)0x9e07, (q15_t)0x525a, (q15_t)0x9e03,
+  (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5251, (q15_t)0x9dfb, (q15_t)0x524c, (q15_t)0x9df7, (q15_t)0x5247, (q15_t)0x9df3,
+  (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x523d, (q15_t)0x9deb, (q15_t)0x5238, (q15_t)0x9de7, (q15_t)0x5234, (q15_t)0x9de3,
+  (q15_t)0x522f, (q15_t)0x9ddf, (q15_t)0x522a, (q15_t)0x9ddb, (q15_t)0x5225, (q15_t)0x9dd7, (q15_t)0x5220, (q15_t)0x9dd3,
+  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5217, (q15_t)0x9dcb, (q15_t)0x5212, (q15_t)0x9dc7, (q15_t)0x520d, (q15_t)0x9dc3,
+  (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x5203, (q15_t)0x9dbb, (q15_t)0x51ff, (q15_t)0x9db7, (q15_t)0x51fa, (q15_t)0x9db3,
+  (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51f0, (q15_t)0x9dab, (q15_t)0x51eb, (q15_t)0x9da7, (q15_t)0x51e6, (q15_t)0x9da3,
+  (q15_t)0x51e2, (q15_t)0x9d9f, (q15_t)0x51dd, (q15_t)0x9d9b, (q15_t)0x51d8, (q15_t)0x9d97, (q15_t)0x51d3, (q15_t)0x9d93,
+  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51c9, (q15_t)0x9d8b, (q15_t)0x51c5, (q15_t)0x9d86, (q15_t)0x51c0, (q15_t)0x9d82,
+  (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51b6, (q15_t)0x9d7a, (q15_t)0x51b1, (q15_t)0x9d76, (q15_t)0x51ac, (q15_t)0x9d72,
+  (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x51a3, (q15_t)0x9d6a, (q15_t)0x519e, (q15_t)0x9d66, (q15_t)0x5199, (q15_t)0x9d62,
+  (q15_t)0x5194, (q15_t)0x9d5e, (q15_t)0x518f, (q15_t)0x9d5a, (q15_t)0x518b, (q15_t)0x9d56, (q15_t)0x5186, (q15_t)0x9d52,
+  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x517c, (q15_t)0x9d4a, (q15_t)0x5177, (q15_t)0x9d46, (q15_t)0x5172, (q15_t)0x9d42,
+  (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x5169, (q15_t)0x9d3a, (q15_t)0x5164, (q15_t)0x9d36, (q15_t)0x515f, (q15_t)0x9d32,
+  (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5155, (q15_t)0x9d2a, (q15_t)0x5150, (q15_t)0x9d26, (q15_t)0x514c, (q15_t)0x9d22,
+  (q15_t)0x5147, (q15_t)0x9d1e, (q15_t)0x5142, (q15_t)0x9d1a, (q15_t)0x513d, (q15_t)0x9d16, (q15_t)0x5138, (q15_t)0x9d12,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x512e, (q15_t)0x9d0b, (q15_t)0x512a, (q15_t)0x9d07, (q15_t)0x5125, (q15_t)0x9d03,
+  (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x511b, (q15_t)0x9cfb, (q15_t)0x5116, (q15_t)0x9cf7, (q15_t)0x5111, (q15_t)0x9cf3,
+  (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x5108, (q15_t)0x9ceb, (q15_t)0x5103, (q15_t)0x9ce7, (q15_t)0x50fe, (q15_t)0x9ce3,
+  (q15_t)0x50f9, (q15_t)0x9cdf, (q15_t)0x50f4, (q15_t)0x9cdb, (q15_t)0x50ef, (q15_t)0x9cd7, (q15_t)0x50ea, (q15_t)0x9cd3,
+  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50e1, (q15_t)0x9ccb, (q15_t)0x50dc, (q15_t)0x9cc7, (q15_t)0x50d7, (q15_t)0x9cc3,
+  (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50cd, (q15_t)0x9cbb, (q15_t)0x50c8, (q15_t)0x9cb7, (q15_t)0x50c3, (q15_t)0x9cb3,
+  (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ba, (q15_t)0x9cab, (q15_t)0x50b5, (q15_t)0x9ca7, (q15_t)0x50b0, (q15_t)0x9ca3,
+  (q15_t)0x50ab, (q15_t)0x9c9f, (q15_t)0x50a6, (q15_t)0x9c9b, (q15_t)0x50a1, (q15_t)0x9c97, (q15_t)0x509c, (q15_t)0x9c93,
+  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5093, (q15_t)0x9c8b, (q15_t)0x508e, (q15_t)0x9c88, (q15_t)0x5089, (q15_t)0x9c84,
+  (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x507f, (q15_t)0x9c7c, (q15_t)0x507a, (q15_t)0x9c78, (q15_t)0x5075, (q15_t)0x9c74,
+  (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x506c, (q15_t)0x9c6c, (q15_t)0x5067, (q15_t)0x9c68, (q15_t)0x5062, (q15_t)0x9c64,
+  (q15_t)0x505d, (q15_t)0x9c60, (q15_t)0x5058, (q15_t)0x9c5c, (q15_t)0x5053, (q15_t)0x9c58, (q15_t)0x504e, (q15_t)0x9c54,
+  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5044, (q15_t)0x9c4c, (q15_t)0x503f, (q15_t)0x9c48, (q15_t)0x503b, (q15_t)0x9c44,
+  (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5031, (q15_t)0x9c3d, (q15_t)0x502c, (q15_t)0x9c39, (q15_t)0x5027, (q15_t)0x9c35,
+  (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x501d, (q15_t)0x9c2d, (q15_t)0x5018, (q15_t)0x9c29, (q15_t)0x5013, (q15_t)0x9c25,
+  (q15_t)0x500f, (q15_t)0x9c21, (q15_t)0x500a, (q15_t)0x9c1d, (q15_t)0x5005, (q15_t)0x9c19, (q15_t)0x5000, (q15_t)0x9c15,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ff6, (q15_t)0x9c0d, (q15_t)0x4ff1, (q15_t)0x9c09, (q15_t)0x4fec, (q15_t)0x9c06,
+  (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fe2, (q15_t)0x9bfe, (q15_t)0x4fdd, (q15_t)0x9bfa, (q15_t)0x4fd9, (q15_t)0x9bf6,
+  (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fcf, (q15_t)0x9bee, (q15_t)0x4fca, (q15_t)0x9bea, (q15_t)0x4fc5, (q15_t)0x9be6,
+  (q15_t)0x4fc0, (q15_t)0x9be2, (q15_t)0x4fbb, (q15_t)0x9bde, (q15_t)0x4fb6, (q15_t)0x9bda, (q15_t)0x4fb1, (q15_t)0x9bd7,
+  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4fa7, (q15_t)0x9bcf, (q15_t)0x4fa2, (q15_t)0x9bcb, (q15_t)0x4f9e, (q15_t)0x9bc7,
+  (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f94, (q15_t)0x9bbf, (q15_t)0x4f8f, (q15_t)0x9bbb, (q15_t)0x4f8a, (q15_t)0x9bb7,
+  (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f80, (q15_t)0x9baf, (q15_t)0x4f7b, (q15_t)0x9bac, (q15_t)0x4f76, (q15_t)0x9ba8,
+  (q15_t)0x4f71, (q15_t)0x9ba4, (q15_t)0x4f6c, (q15_t)0x9ba0, (q15_t)0x4f67, (q15_t)0x9b9c, (q15_t)0x4f62, (q15_t)0x9b98,
+  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f59, (q15_t)0x9b90, (q15_t)0x4f54, (q15_t)0x9b8c, (q15_t)0x4f4f, (q15_t)0x9b88,
+  (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f45, (q15_t)0x9b81, (q15_t)0x4f40, (q15_t)0x9b7d, (q15_t)0x4f3b, (q15_t)0x9b79,
+  (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f31, (q15_t)0x9b71, (q15_t)0x4f2c, (q15_t)0x9b6d, (q15_t)0x4f27, (q15_t)0x9b69,
+  (q15_t)0x4f22, (q15_t)0x9b65, (q15_t)0x4f1d, (q15_t)0x9b62, (q15_t)0x4f18, (q15_t)0x9b5e, (q15_t)0x4f14, (q15_t)0x9b5a,
+  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4f0a, (q15_t)0x9b52, (q15_t)0x4f05, (q15_t)0x9b4e, (q15_t)0x4f00, (q15_t)0x9b4a,
+  (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ef6, (q15_t)0x9b43, (q15_t)0x4ef1, (q15_t)0x9b3f, (q15_t)0x4eec, (q15_t)0x9b3b,
+  (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ee2, (q15_t)0x9b33, (q15_t)0x4edd, (q15_t)0x9b2f, (q15_t)0x4ed8, (q15_t)0x9b2b,
+  (q15_t)0x4ed3, (q15_t)0x9b27, (q15_t)0x4ece, (q15_t)0x9b24, (q15_t)0x4ec9, (q15_t)0x9b20, (q15_t)0x4ec4, (q15_t)0x9b1c,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eba, (q15_t)0x9b14, (q15_t)0x4eb6, (q15_t)0x9b10, (q15_t)0x4eb1, (q15_t)0x9b0c,
+  (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4ea7, (q15_t)0x9b05, (q15_t)0x4ea2, (q15_t)0x9b01, (q15_t)0x4e9d, (q15_t)0x9afd,
+  (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e93, (q15_t)0x9af5, (q15_t)0x4e8e, (q15_t)0x9af1, (q15_t)0x4e89, (q15_t)0x9aed,
+  (q15_t)0x4e84, (q15_t)0x9aea, (q15_t)0x4e7f, (q15_t)0x9ae6, (q15_t)0x4e7a, (q15_t)0x9ae2, (q15_t)0x4e75, (q15_t)0x9ade,
+  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e6b, (q15_t)0x9ad6, (q15_t)0x4e66, (q15_t)0x9ad3, (q15_t)0x4e61, (q15_t)0x9acf,
+  (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e57, (q15_t)0x9ac7, (q15_t)0x4e52, (q15_t)0x9ac3, (q15_t)0x4e4d, (q15_t)0x9abf,
+  (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e43, (q15_t)0x9ab8, (q15_t)0x4e3e, (q15_t)0x9ab4, (q15_t)0x4e39, (q15_t)0x9ab0,
+  (q15_t)0x4e34, (q15_t)0x9aac, (q15_t)0x4e2f, (q15_t)0x9aa8, (q15_t)0x4e2a, (q15_t)0x9aa4, (q15_t)0x4e26, (q15_t)0x9aa1,
+  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e1c, (q15_t)0x9a99, (q15_t)0x4e17, (q15_t)0x9a95, (q15_t)0x4e12, (q15_t)0x9a91,
+  (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4e08, (q15_t)0x9a8a, (q15_t)0x4e03, (q15_t)0x9a86, (q15_t)0x4dfe, (q15_t)0x9a82,
+  (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4df4, (q15_t)0x9a7a, (q15_t)0x4def, (q15_t)0x9a76, (q15_t)0x4dea, (q15_t)0x9a73,
+  (q15_t)0x4de5, (q15_t)0x9a6f, (q15_t)0x4de0, (q15_t)0x9a6b, (q15_t)0x4ddb, (q15_t)0x9a67, (q15_t)0x4dd6, (q15_t)0x9a63,
+  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dcc, (q15_t)0x9a5c, (q15_t)0x4dc7, (q15_t)0x9a58, (q15_t)0x4dc2, (q15_t)0x9a54,
+  (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4db8, (q15_t)0x9a4c, (q15_t)0x4db3, (q15_t)0x9a49, (q15_t)0x4dae, (q15_t)0x9a45,
+  (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4da4, (q15_t)0x9a3d, (q15_t)0x4d9f, (q15_t)0x9a39, (q15_t)0x4d9a, (q15_t)0x9a36,
+  (q15_t)0x4d95, (q15_t)0x9a32, (q15_t)0x4d90, (q15_t)0x9a2e, (q15_t)0x4d8b, (q15_t)0x9a2a, (q15_t)0x4d86, (q15_t)0x9a26,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d7c, (q15_t)0x9a1f, (q15_t)0x4d77, (q15_t)0x9a1b, (q15_t)0x4d72, (q15_t)0x9a17,
+  (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d68, (q15_t)0x9a10, (q15_t)0x4d63, (q15_t)0x9a0c, (q15_t)0x4d5e, (q15_t)0x9a08,
+  (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d54, (q15_t)0x9a00, (q15_t)0x4d4f, (q15_t)0x99fd, (q15_t)0x4d4a, (q15_t)0x99f9,
+  (q15_t)0x4d45, (q15_t)0x99f5, (q15_t)0x4d40, (q15_t)0x99f1, (q15_t)0x4d3b, (q15_t)0x99ed, (q15_t)0x4d36, (q15_t)0x99ea,
+  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d2c, (q15_t)0x99e2, (q15_t)0x4d27, (q15_t)0x99de, (q15_t)0x4d22, (q15_t)0x99da,
+  (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d18, (q15_t)0x99d3, (q15_t)0x4d13, (q15_t)0x99cf, (q15_t)0x4d0e, (q15_t)0x99cb,
+  (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4d04, (q15_t)0x99c4, (q15_t)0x4cff, (q15_t)0x99c0, (q15_t)0x4cfa, (q15_t)0x99bc,
+  (q15_t)0x4cf5, (q15_t)0x99b8, (q15_t)0x4cf0, (q15_t)0x99b5, (q15_t)0x4ceb, (q15_t)0x99b1, (q15_t)0x4ce6, (q15_t)0x99ad,
+  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4cdb, (q15_t)0x99a5, (q15_t)0x4cd6, (q15_t)0x99a2, (q15_t)0x4cd1, (q15_t)0x999e,
+  (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cc7, (q15_t)0x9996, (q15_t)0x4cc2, (q15_t)0x9993, (q15_t)0x4cbd, (q15_t)0x998f,
+  (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4cb3, (q15_t)0x9987, (q15_t)0x4cae, (q15_t)0x9984, (q15_t)0x4ca9, (q15_t)0x9980,
+  (q15_t)0x4ca4, (q15_t)0x997c, (q15_t)0x4c9f, (q15_t)0x9978, (q15_t)0x4c9a, (q15_t)0x9975, (q15_t)0x4c95, (q15_t)0x9971,
+  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c8b, (q15_t)0x9969, (q15_t)0x4c86, (q15_t)0x9965, (q15_t)0x4c81, (q15_t)0x9962,
+  (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c77, (q15_t)0x995a, (q15_t)0x4c72, (q15_t)0x9956, (q15_t)0x4c6d, (q15_t)0x9953,
+  (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c63, (q15_t)0x994b, (q15_t)0x4c5e, (q15_t)0x9947, (q15_t)0x4c59, (q15_t)0x9944,
+  (q15_t)0x4c54, (q15_t)0x9940, (q15_t)0x4c4f, (q15_t)0x993c, (q15_t)0x4c49, (q15_t)0x9938, (q15_t)0x4c44, (q15_t)0x9935,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c3a, (q15_t)0x992d, (q15_t)0x4c35, (q15_t)0x992a, (q15_t)0x4c30, (q15_t)0x9926,
+  (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c26, (q15_t)0x991e, (q15_t)0x4c21, (q15_t)0x991b, (q15_t)0x4c1c, (q15_t)0x9917,
+  (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c12, (q15_t)0x990f, (q15_t)0x4c0d, (q15_t)0x990c, (q15_t)0x4c08, (q15_t)0x9908,
+  (q15_t)0x4c03, (q15_t)0x9904, (q15_t)0x4bfe, (q15_t)0x9900, (q15_t)0x4bf9, (q15_t)0x98fd, (q15_t)0x4bf4, (q15_t)0x98f9,
+  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4be9, (q15_t)0x98f2, (q15_t)0x4be4, (q15_t)0x98ee, (q15_t)0x4bdf, (q15_t)0x98ea,
+  (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bd5, (q15_t)0x98e3, (q15_t)0x4bd0, (q15_t)0x98df, (q15_t)0x4bcb, (q15_t)0x98db,
+  (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bc1, (q15_t)0x98d4, (q15_t)0x4bbc, (q15_t)0x98d0, (q15_t)0x4bb7, (q15_t)0x98cc,
+  (q15_t)0x4bb2, (q15_t)0x98c9, (q15_t)0x4bad, (q15_t)0x98c5, (q15_t)0x4ba8, (q15_t)0x98c1, (q15_t)0x4ba3, (q15_t)0x98bd,
+  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b98, (q15_t)0x98b6, (q15_t)0x4b93, (q15_t)0x98b2, (q15_t)0x4b8e, (q15_t)0x98af,
+  (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b84, (q15_t)0x98a7, (q15_t)0x4b7f, (q15_t)0x98a3, (q15_t)0x4b7a, (q15_t)0x98a0,
+  (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b70, (q15_t)0x9898, (q15_t)0x4b6b, (q15_t)0x9895, (q15_t)0x4b66, (q15_t)0x9891,
+  (q15_t)0x4b61, (q15_t)0x988d, (q15_t)0x4b5c, (q15_t)0x988a, (q15_t)0x4b56, (q15_t)0x9886, (q15_t)0x4b51, (q15_t)0x9882,
+  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b47, (q15_t)0x987b, (q15_t)0x4b42, (q15_t)0x9877, (q15_t)0x4b3d, (q15_t)0x9873,
+  (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b33, (q15_t)0x986c, (q15_t)0x4b2e, (q15_t)0x9868, (q15_t)0x4b29, (q15_t)0x9865,
+  (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b1f, (q15_t)0x985d, (q15_t)0x4b19, (q15_t)0x985a, (q15_t)0x4b14, (q15_t)0x9856,
+  (q15_t)0x4b0f, (q15_t)0x9852, (q15_t)0x4b0a, (q15_t)0x984e, (q15_t)0x4b05, (q15_t)0x984b, (q15_t)0x4b00, (q15_t)0x9847,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4af6, (q15_t)0x9840, (q15_t)0x4af1, (q15_t)0x983c, (q15_t)0x4aec, (q15_t)0x9838,
+  (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ae1, (q15_t)0x9831, (q15_t)0x4adc, (q15_t)0x982d, (q15_t)0x4ad7, (q15_t)0x982a,
+  (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4acd, (q15_t)0x9822, (q15_t)0x4ac8, (q15_t)0x981f, (q15_t)0x4ac3, (q15_t)0x981b,
+  (q15_t)0x4abe, (q15_t)0x9817, (q15_t)0x4ab9, (q15_t)0x9814, (q15_t)0x4ab4, (q15_t)0x9810, (q15_t)0x4aae, (q15_t)0x980c,
+  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4aa4, (q15_t)0x9805, (q15_t)0x4a9f, (q15_t)0x9801, (q15_t)0x4a9a, (q15_t)0x97fe,
+  (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a90, (q15_t)0x97f6, (q15_t)0x4a8b, (q15_t)0x97f3, (q15_t)0x4a86, (q15_t)0x97ef,
+  (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a7b, (q15_t)0x97e8, (q15_t)0x4a76, (q15_t)0x97e4, (q15_t)0x4a71, (q15_t)0x97e0,
+  (q15_t)0x4a6c, (q15_t)0x97dd, (q15_t)0x4a67, (q15_t)0x97d9, (q15_t)0x4a62, (q15_t)0x97d5, (q15_t)0x4a5d, (q15_t)0x97d2,
+  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a52, (q15_t)0x97cb, (q15_t)0x4a4d, (q15_t)0x97c7, (q15_t)0x4a48, (q15_t)0x97c3,
+  (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a3e, (q15_t)0x97bc, (q15_t)0x4a39, (q15_t)0x97b8, (q15_t)0x4a34, (q15_t)0x97b5,
+  (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a2a, (q15_t)0x97ad, (q15_t)0x4a24, (q15_t)0x97aa, (q15_t)0x4a1f, (q15_t)0x97a6,
+  (q15_t)0x4a1a, (q15_t)0x97a2, (q15_t)0x4a15, (q15_t)0x979f, (q15_t)0x4a10, (q15_t)0x979b, (q15_t)0x4a0b, (q15_t)0x9798,
+  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x4a01, (q15_t)0x9790, (q15_t)0x49fb, (q15_t)0x978d, (q15_t)0x49f6, (q15_t)0x9789,
+  (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49ec, (q15_t)0x9782, (q15_t)0x49e7, (q15_t)0x977e, (q15_t)0x49e2, (q15_t)0x977a,
+  (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49d8, (q15_t)0x9773, (q15_t)0x49d2, (q15_t)0x9770, (q15_t)0x49cd, (q15_t)0x976c,
+  (q15_t)0x49c8, (q15_t)0x9768, (q15_t)0x49c3, (q15_t)0x9765, (q15_t)0x49be, (q15_t)0x9761, (q15_t)0x49b9, (q15_t)0x975d,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x49ae, (q15_t)0x9756, (q15_t)0x49a9, (q15_t)0x9753, (q15_t)0x49a4, (q15_t)0x974f,
+  (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x499a, (q15_t)0x9748, (q15_t)0x4995, (q15_t)0x9744, (q15_t)0x4990, (q15_t)0x9741,
+  (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4985, (q15_t)0x9739, (q15_t)0x4980, (q15_t)0x9736, (q15_t)0x497b, (q15_t)0x9732,
+  (q15_t)0x4976, (q15_t)0x972f, (q15_t)0x4971, (q15_t)0x972b, (q15_t)0x496c, (q15_t)0x9727, (q15_t)0x4966, (q15_t)0x9724,
+  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x495c, (q15_t)0x971d, (q15_t)0x4957, (q15_t)0x9719, (q15_t)0x4952, (q15_t)0x9715,
+  (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4948, (q15_t)0x970e, (q15_t)0x4942, (q15_t)0x970b, (q15_t)0x493d, (q15_t)0x9707,
+  (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4933, (q15_t)0x9700, (q15_t)0x492e, (q15_t)0x96fc, (q15_t)0x4929, (q15_t)0x96f9,
+  (q15_t)0x4923, (q15_t)0x96f5, (q15_t)0x491e, (q15_t)0x96f1, (q15_t)0x4919, (q15_t)0x96ee, (q15_t)0x4914, (q15_t)0x96ea,
+  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x490a, (q15_t)0x96e3, (q15_t)0x4905, (q15_t)0x96df, (q15_t)0x48ff, (q15_t)0x96dc,
+  (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48f5, (q15_t)0x96d5, (q15_t)0x48f0, (q15_t)0x96d1, (q15_t)0x48eb, (q15_t)0x96ce,
+  (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48e0, (q15_t)0x96c6, (q15_t)0x48db, (q15_t)0x96c3, (q15_t)0x48d6, (q15_t)0x96bf,
+  (q15_t)0x48d1, (q15_t)0x96bc, (q15_t)0x48cc, (q15_t)0x96b8, (q15_t)0x48c7, (q15_t)0x96b5, (q15_t)0x48c1, (q15_t)0x96b1,
+  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48b7, (q15_t)0x96aa, (q15_t)0x48b2, (q15_t)0x96a6, (q15_t)0x48ad, (q15_t)0x96a3,
+  (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x48a2, (q15_t)0x969c, (q15_t)0x489d, (q15_t)0x9698, (q15_t)0x4898, (q15_t)0x9694,
+  (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x488e, (q15_t)0x968d, (q15_t)0x4888, (q15_t)0x968a, (q15_t)0x4883, (q15_t)0x9686,
+  (q15_t)0x487e, (q15_t)0x9683, (q15_t)0x4879, (q15_t)0x967f, (q15_t)0x4874, (q15_t)0x967b, (q15_t)0x486f, (q15_t)0x9678,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4864, (q15_t)0x9671, (q15_t)0x485f, (q15_t)0x966d, (q15_t)0x485a, (q15_t)0x966a,
+  (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x484f, (q15_t)0x9663, (q15_t)0x484a, (q15_t)0x965f, (q15_t)0x4845, (q15_t)0x965b,
+  (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x483b, (q15_t)0x9654, (q15_t)0x4836, (q15_t)0x9651, (q15_t)0x4830, (q15_t)0x964d,
+  (q15_t)0x482b, (q15_t)0x964a, (q15_t)0x4826, (q15_t)0x9646, (q15_t)0x4821, (q15_t)0x9643, (q15_t)0x481c, (q15_t)0x963f,
+  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4811, (q15_t)0x9638, (q15_t)0x480c, (q15_t)0x9635, (q15_t)0x4807, (q15_t)0x9631,
+  (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47fc, (q15_t)0x962a, (q15_t)0x47f7, (q15_t)0x9626, (q15_t)0x47f2, (q15_t)0x9623,
+  (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47e8, (q15_t)0x961c, (q15_t)0x47e2, (q15_t)0x9618, (q15_t)0x47dd, (q15_t)0x9615,
+  (q15_t)0x47d8, (q15_t)0x9611, (q15_t)0x47d3, (q15_t)0x960e, (q15_t)0x47ce, (q15_t)0x960a, (q15_t)0x47c8, (q15_t)0x9607,
+  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47be, (q15_t)0x9600, (q15_t)0x47b9, (q15_t)0x95fc, (q15_t)0x47b4, (q15_t)0x95f9,
+  (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x47a9, (q15_t)0x95f2, (q15_t)0x47a4, (q15_t)0x95ee, (q15_t)0x479f, (q15_t)0x95ea,
+  (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4794, (q15_t)0x95e3, (q15_t)0x478f, (q15_t)0x95e0, (q15_t)0x478a, (q15_t)0x95dc,
+  (q15_t)0x4785, (q15_t)0x95d9, (q15_t)0x4780, (q15_t)0x95d5, (q15_t)0x477a, (q15_t)0x95d2, (q15_t)0x4775, (q15_t)0x95ce,
+  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x476b, (q15_t)0x95c7, (q15_t)0x4765, (q15_t)0x95c4, (q15_t)0x4760, (q15_t)0x95c0,
+  (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4756, (q15_t)0x95b9, (q15_t)0x4751, (q15_t)0x95b6, (q15_t)0x474b, (q15_t)0x95b2,
+  (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4741, (q15_t)0x95ab, (q15_t)0x473c, (q15_t)0x95a8, (q15_t)0x4737, (q15_t)0x95a4,
+  (q15_t)0x4731, (q15_t)0x95a1, (q15_t)0x472c, (q15_t)0x959d, (q15_t)0x4727, (q15_t)0x959a, (q15_t)0x4722, (q15_t)0x9596,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4717, (q15_t)0x958f, (q15_t)0x4712, (q15_t)0x958c, (q15_t)0x470d, (q15_t)0x9588,
+  (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x4702, (q15_t)0x9581, (q15_t)0x46fd, (q15_t)0x957e, (q15_t)0x46f8, (q15_t)0x957a,
+  (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46ed, (q15_t)0x9574, (q15_t)0x46e8, (q15_t)0x9570, (q15_t)0x46e3, (q15_t)0x956d,
+  (q15_t)0x46de, (q15_t)0x9569, (q15_t)0x46d8, (q15_t)0x9566, (q15_t)0x46d3, (q15_t)0x9562, (q15_t)0x46ce, (q15_t)0x955f,
+  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46c4, (q15_t)0x9558, (q15_t)0x46be, (q15_t)0x9554, (q15_t)0x46b9, (q15_t)0x9551,
+  (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x46af, (q15_t)0x954a, (q15_t)0x46a9, (q15_t)0x9546, (q15_t)0x46a4, (q15_t)0x9543,
+  (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x469a, (q15_t)0x953c, (q15_t)0x4694, (q15_t)0x9538, (q15_t)0x468f, (q15_t)0x9535,
+  (q15_t)0x468a, (q15_t)0x9532, (q15_t)0x4685, (q15_t)0x952e, (q15_t)0x467f, (q15_t)0x952b, (q15_t)0x467a, (q15_t)0x9527,
+  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4670, (q15_t)0x9520, (q15_t)0x466a, (q15_t)0x951d, (q15_t)0x4665, (q15_t)0x9519,
+  (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x465b, (q15_t)0x9512, (q15_t)0x4655, (q15_t)0x950f, (q15_t)0x4650, (q15_t)0x950c,
+  (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4646, (q15_t)0x9505, (q15_t)0x4640, (q15_t)0x9501, (q15_t)0x463b, (q15_t)0x94fe,
+  (q15_t)0x4636, (q15_t)0x94fa, (q15_t)0x4631, (q15_t)0x94f7, (q15_t)0x462b, (q15_t)0x94f3, (q15_t)0x4626, (q15_t)0x94f0,
+  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x461c, (q15_t)0x94e9, (q15_t)0x4616, (q15_t)0x94e6, (q15_t)0x4611, (q15_t)0x94e2,
+  (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x4607, (q15_t)0x94db, (q15_t)0x4601, (q15_t)0x94d8, (q15_t)0x45fc, (q15_t)0x94d4,
+  (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45f2, (q15_t)0x94ce, (q15_t)0x45ec, (q15_t)0x94ca, (q15_t)0x45e7, (q15_t)0x94c7,
+  (q15_t)0x45e2, (q15_t)0x94c3, (q15_t)0x45dd, (q15_t)0x94c0, (q15_t)0x45d7, (q15_t)0x94bc, (q15_t)0x45d2, (q15_t)0x94b9,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45c7, (q15_t)0x94b2, (q15_t)0x45c2, (q15_t)0x94af, (q15_t)0x45bd, (q15_t)0x94ab,
+  (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45b2, (q15_t)0x94a4, (q15_t)0x45ad, (q15_t)0x94a1, (q15_t)0x45a8, (q15_t)0x949e,
+  (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x459d, (q15_t)0x9497, (q15_t)0x4598, (q15_t)0x9493, (q15_t)0x4593, (q15_t)0x9490,
+  (q15_t)0x458d, (q15_t)0x948d, (q15_t)0x4588, (q15_t)0x9489, (q15_t)0x4583, (q15_t)0x9486, (q15_t)0x457e, (q15_t)0x9482,
+  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4573, (q15_t)0x947b, (q15_t)0x456e, (q15_t)0x9478, (q15_t)0x4569, (q15_t)0x9475,
+  (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x455e, (q15_t)0x946e, (q15_t)0x4559, (q15_t)0x946a, (q15_t)0x4553, (q15_t)0x9467,
+  (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4549, (q15_t)0x9460, (q15_t)0x4544, (q15_t)0x945d, (q15_t)0x453e, (q15_t)0x9459,
+  (q15_t)0x4539, (q15_t)0x9456, (q15_t)0x4534, (q15_t)0x9453, (q15_t)0x452e, (q15_t)0x944f, (q15_t)0x4529, (q15_t)0x944c,
+  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x451f, (q15_t)0x9445, (q15_t)0x4519, (q15_t)0x9442, (q15_t)0x4514, (q15_t)0x943e,
+  (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x4509, (q15_t)0x9437, (q15_t)0x4504, (q15_t)0x9434, (q15_t)0x44ff, (q15_t)0x9431,
+  (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44f4, (q15_t)0x942a, (q15_t)0x44ef, (q15_t)0x9427, (q15_t)0x44ea, (q15_t)0x9423,
+  (q15_t)0x44e4, (q15_t)0x9420, (q15_t)0x44df, (q15_t)0x941c, (q15_t)0x44da, (q15_t)0x9419, (q15_t)0x44d4, (q15_t)0x9416,
+  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ca, (q15_t)0x940f, (q15_t)0x44c5, (q15_t)0x940b, (q15_t)0x44bf, (q15_t)0x9408,
+  (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44b5, (q15_t)0x9401, (q15_t)0x44af, (q15_t)0x93fe, (q15_t)0x44aa, (q15_t)0x93fb,
+  (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x449f, (q15_t)0x93f4, (q15_t)0x449a, (q15_t)0x93f1, (q15_t)0x4495, (q15_t)0x93ed,
+  (q15_t)0x4490, (q15_t)0x93ea, (q15_t)0x448a, (q15_t)0x93e6, (q15_t)0x4485, (q15_t)0x93e3, (q15_t)0x4480, (q15_t)0x93e0,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4475, (q15_t)0x93d9, (q15_t)0x4470, (q15_t)0x93d6, (q15_t)0x446a, (q15_t)0x93d2,
+  (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4460, (q15_t)0x93cc, (q15_t)0x445a, (q15_t)0x93c8, (q15_t)0x4455, (q15_t)0x93c5,
+  (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x444b, (q15_t)0x93be, (q15_t)0x4445, (q15_t)0x93bb, (q15_t)0x4440, (q15_t)0x93b7,
+  (q15_t)0x443b, (q15_t)0x93b4, (q15_t)0x4435, (q15_t)0x93b1, (q15_t)0x4430, (q15_t)0x93ad, (q15_t)0x442b, (q15_t)0x93aa,
+  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4420, (q15_t)0x93a3, (q15_t)0x441b, (q15_t)0x93a0, (q15_t)0x4415, (q15_t)0x939d,
+  (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x440b, (q15_t)0x9396, (q15_t)0x4405, (q15_t)0x9393, (q15_t)0x4400, (q15_t)0x938f,
+  (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43f5, (q15_t)0x9389, (q15_t)0x43f0, (q15_t)0x9385, (q15_t)0x43eb, (q15_t)0x9382,
+  (q15_t)0x43e5, (q15_t)0x937f, (q15_t)0x43e0, (q15_t)0x937b, (q15_t)0x43db, (q15_t)0x9378, (q15_t)0x43d5, (q15_t)0x9375,
+  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43cb, (q15_t)0x936e, (q15_t)0x43c5, (q15_t)0x936b, (q15_t)0x43c0, (q15_t)0x9367,
+  (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43b5, (q15_t)0x9361, (q15_t)0x43b0, (q15_t)0x935d, (q15_t)0x43ab, (q15_t)0x935a,
+  (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x43a0, (q15_t)0x9353, (q15_t)0x439b, (q15_t)0x9350, (q15_t)0x4395, (q15_t)0x934d,
+  (q15_t)0x4390, (q15_t)0x9349, (q15_t)0x438b, (q15_t)0x9346, (q15_t)0x4385, (q15_t)0x9343, (q15_t)0x4380, (q15_t)0x933f,
+  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4375, (q15_t)0x9339, (q15_t)0x4370, (q15_t)0x9336, (q15_t)0x436b, (q15_t)0x9332,
+  (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4360, (q15_t)0x932c, (q15_t)0x435b, (q15_t)0x9328, (q15_t)0x4355, (q15_t)0x9325,
+  (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x434b, (q15_t)0x931e, (q15_t)0x4345, (q15_t)0x931b, (q15_t)0x4340, (q15_t)0x9318,
+  (q15_t)0x433b, (q15_t)0x9314, (q15_t)0x4335, (q15_t)0x9311, (q15_t)0x4330, (q15_t)0x930e, (q15_t)0x432b, (q15_t)0x930b,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4320, (q15_t)0x9304, (q15_t)0x431b, (q15_t)0x9301, (q15_t)0x4315, (q15_t)0x92fd,
+  (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x430b, (q15_t)0x92f7, (q15_t)0x4305, (q15_t)0x92f4, (q15_t)0x4300, (q15_t)0x92f0,
+  (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42f5, (q15_t)0x92ea, (q15_t)0x42f0, (q15_t)0x92e6, (q15_t)0x42ea, (q15_t)0x92e3,
+  (q15_t)0x42e5, (q15_t)0x92e0, (q15_t)0x42e0, (q15_t)0x92dd, (q15_t)0x42da, (q15_t)0x92d9, (q15_t)0x42d5, (q15_t)0x92d6,
+  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ca, (q15_t)0x92cf, (q15_t)0x42c5, (q15_t)0x92cc, (q15_t)0x42c0, (q15_t)0x92c9,
+  (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42b5, (q15_t)0x92c2, (q15_t)0x42af, (q15_t)0x92bf, (q15_t)0x42aa, (q15_t)0x92bc,
+  (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x429f, (q15_t)0x92b5, (q15_t)0x429a, (q15_t)0x92b2, (q15_t)0x4295, (q15_t)0x92af,
+  (q15_t)0x428f, (q15_t)0x92ab, (q15_t)0x428a, (q15_t)0x92a8, (q15_t)0x4284, (q15_t)0x92a5, (q15_t)0x427f, (q15_t)0x92a2,
+  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4274, (q15_t)0x929b, (q15_t)0x426f, (q15_t)0x9298, (q15_t)0x426a, (q15_t)0x9295,
+  (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x425f, (q15_t)0x928e, (q15_t)0x425a, (q15_t)0x928b, (q15_t)0x4254, (q15_t)0x9288,
+  (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4249, (q15_t)0x9281, (q15_t)0x4244, (q15_t)0x927e, (q15_t)0x423f, (q15_t)0x927b,
+  (q15_t)0x4239, (q15_t)0x9277, (q15_t)0x4234, (q15_t)0x9274, (q15_t)0x422f, (q15_t)0x9271, (q15_t)0x4229, (q15_t)0x926e,
+  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x421e, (q15_t)0x9267, (q15_t)0x4219, (q15_t)0x9264, (q15_t)0x4214, (q15_t)0x9261,
+  (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x4209, (q15_t)0x925a, (q15_t)0x4203, (q15_t)0x9257, (q15_t)0x41fe, (q15_t)0x9254,
+  (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41f3, (q15_t)0x924d, (q15_t)0x41ee, (q15_t)0x924a, (q15_t)0x41e9, (q15_t)0x9247,
+  (q15_t)0x41e3, (q15_t)0x9243, (q15_t)0x41de, (q15_t)0x9240, (q15_t)0x41d8, (q15_t)0x923d, (q15_t)0x41d3, (q15_t)0x923a,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41c8, (q15_t)0x9233, (q15_t)0x41c3, (q15_t)0x9230, (q15_t)0x41bd, (q15_t)0x922d,
+  (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41b3, (q15_t)0x9226, (q15_t)0x41ad, (q15_t)0x9223, (q15_t)0x41a8, (q15_t)0x9220,
+  (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x419d, (q15_t)0x9219, (q15_t)0x4198, (q15_t)0x9216, (q15_t)0x4192, (q15_t)0x9213,
+  (q15_t)0x418d, (q15_t)0x9210, (q15_t)0x4188, (q15_t)0x920d, (q15_t)0x4182, (q15_t)0x9209, (q15_t)0x417d, (q15_t)0x9206,
+  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4172, (q15_t)0x9200, (q15_t)0x416d, (q15_t)0x91fc, (q15_t)0x4167, (q15_t)0x91f9,
+  (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x415c, (q15_t)0x91f3, (q15_t)0x4157, (q15_t)0x91f0, (q15_t)0x4152, (q15_t)0x91ec,
+  (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4147, (q15_t)0x91e6, (q15_t)0x4141, (q15_t)0x91e3, (q15_t)0x413c, (q15_t)0x91e0,
+  (q15_t)0x4136, (q15_t)0x91dc, (q15_t)0x4131, (q15_t)0x91d9, (q15_t)0x412c, (q15_t)0x91d6, (q15_t)0x4126, (q15_t)0x91d3,
+  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x411b, (q15_t)0x91cc, (q15_t)0x4116, (q15_t)0x91c9, (q15_t)0x4111, (q15_t)0x91c6,
+  (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x4106, (q15_t)0x91c0, (q15_t)0x4100, (q15_t)0x91bc, (q15_t)0x40fb, (q15_t)0x91b9,
+  (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40f0, (q15_t)0x91b3, (q15_t)0x40eb, (q15_t)0x91b0, (q15_t)0x40e5, (q15_t)0x91ad,
+  (q15_t)0x40e0, (q15_t)0x91a9, (q15_t)0x40da, (q15_t)0x91a6, (q15_t)0x40d5, (q15_t)0x91a3, (q15_t)0x40d0, (q15_t)0x91a0,
+  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40c5, (q15_t)0x9199, (q15_t)0x40bf, (q15_t)0x9196, (q15_t)0x40ba, (q15_t)0x9193,
+  (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x40af, (q15_t)0x918d, (q15_t)0x40aa, (q15_t)0x918a, (q15_t)0x40a4, (q15_t)0x9186,
+  (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4099, (q15_t)0x9180, (q15_t)0x4094, (q15_t)0x917d, (q15_t)0x408f, (q15_t)0x917a,
+  (q15_t)0x4089, (q15_t)0x9177, (q15_t)0x4084, (q15_t)0x9173, (q15_t)0x407e, (q15_t)0x9170, (q15_t)0x4079, (q15_t)0x916d,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x406e, (q15_t)0x9167, (q15_t)0x4069, (q15_t)0x9164, (q15_t)0x4063, (q15_t)0x9160,
+  (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4058, (q15_t)0x915a, (q15_t)0x4053, (q15_t)0x9157, (q15_t)0x404d, (q15_t)0x9154,
+  (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4043, (q15_t)0x914d, (q15_t)0x403d, (q15_t)0x914a, (q15_t)0x4038, (q15_t)0x9147,
+  (q15_t)0x4032, (q15_t)0x9144, (q15_t)0x402d, (q15_t)0x9141, (q15_t)0x4027, (q15_t)0x913e, (q15_t)0x4022, (q15_t)0x913a,
+  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4017, (q15_t)0x9134, (q15_t)0x4012, (q15_t)0x9131, (q15_t)0x400c, (q15_t)0x912e,
+  (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x4001, (q15_t)0x9128, (q15_t)0x3ffc, (q15_t)0x9124, (q15_t)0x3ff6, (q15_t)0x9121,
+  (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fec, (q15_t)0x911b, (q15_t)0x3fe6, (q15_t)0x9118, (q15_t)0x3fe1, (q15_t)0x9115,
+  (q15_t)0x3fdb, (q15_t)0x9112, (q15_t)0x3fd6, (q15_t)0x910f, (q15_t)0x3fd0, (q15_t)0x910b, (q15_t)0x3fcb, (q15_t)0x9108,
+  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fc0, (q15_t)0x9102, (q15_t)0x3fbb, (q15_t)0x90ff, (q15_t)0x3fb5, (q15_t)0x90fc,
+  (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3faa, (q15_t)0x90f5, (q15_t)0x3fa5, (q15_t)0x90f2, (q15_t)0x3f9f, (q15_t)0x90ef,
+  (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f94, (q15_t)0x90e9, (q15_t)0x3f8f, (q15_t)0x90e6, (q15_t)0x3f89, (q15_t)0x90e3,
+  (q15_t)0x3f84, (q15_t)0x90e0, (q15_t)0x3f7f, (q15_t)0x90dd, (q15_t)0x3f79, (q15_t)0x90d9, (q15_t)0x3f74, (q15_t)0x90d6,
+  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f69, (q15_t)0x90d0, (q15_t)0x3f63, (q15_t)0x90cd, (q15_t)0x3f5e, (q15_t)0x90ca,
+  (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f53, (q15_t)0x90c4, (q15_t)0x3f4d, (q15_t)0x90c1, (q15_t)0x3f48, (q15_t)0x90bd,
+  (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f3d, (q15_t)0x90b7, (q15_t)0x3f38, (q15_t)0x90b4, (q15_t)0x3f32, (q15_t)0x90b1,
+  (q15_t)0x3f2d, (q15_t)0x90ae, (q15_t)0x3f27, (q15_t)0x90ab, (q15_t)0x3f22, (q15_t)0x90a8, (q15_t)0x3f1c, (q15_t)0x90a5,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f11, (q15_t)0x909e, (q15_t)0x3f0c, (q15_t)0x909b, (q15_t)0x3f06, (q15_t)0x9098,
+  (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3efb, (q15_t)0x9092, (q15_t)0x3ef6, (q15_t)0x908f, (q15_t)0x3ef1, (q15_t)0x908c,
+  (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ee6, (q15_t)0x9086, (q15_t)0x3ee0, (q15_t)0x9083, (q15_t)0x3edb, (q15_t)0x907f,
+  (q15_t)0x3ed5, (q15_t)0x907c, (q15_t)0x3ed0, (q15_t)0x9079, (q15_t)0x3eca, (q15_t)0x9076, (q15_t)0x3ec5, (q15_t)0x9073,
+  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3eba, (q15_t)0x906d, (q15_t)0x3eb4, (q15_t)0x906a, (q15_t)0x3eaf, (q15_t)0x9067,
+  (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3ea4, (q15_t)0x9061, (q15_t)0x3e9e, (q15_t)0x905e, (q15_t)0x3e99, (q15_t)0x905b,
+  (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e8e, (q15_t)0x9054, (q15_t)0x3e88, (q15_t)0x9051, (q15_t)0x3e83, (q15_t)0x904e,
+  (q15_t)0x3e7d, (q15_t)0x904b, (q15_t)0x3e78, (q15_t)0x9048, (q15_t)0x3e73, (q15_t)0x9045, (q15_t)0x3e6d, (q15_t)0x9042,
+  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e62, (q15_t)0x903c, (q15_t)0x3e5d, (q15_t)0x9039, (q15_t)0x3e57, (q15_t)0x9036,
+  (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e4c, (q15_t)0x9030, (q15_t)0x3e47, (q15_t)0x902d, (q15_t)0x3e41, (q15_t)0x902a,
+  (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e36, (q15_t)0x9023, (q15_t)0x3e31, (q15_t)0x9020, (q15_t)0x3e2b, (q15_t)0x901d,
+  (q15_t)0x3e26, (q15_t)0x901a, (q15_t)0x3e20, (q15_t)0x9017, (q15_t)0x3e1b, (q15_t)0x9014, (q15_t)0x3e15, (q15_t)0x9011,
+  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3e0a, (q15_t)0x900b, (q15_t)0x3e05, (q15_t)0x9008, (q15_t)0x3dff, (q15_t)0x9005,
+  (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3df4, (q15_t)0x8fff, (q15_t)0x3def, (q15_t)0x8ffc, (q15_t)0x3de9, (q15_t)0x8ff9,
+  (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dde, (q15_t)0x8ff3, (q15_t)0x3dd9, (q15_t)0x8ff0, (q15_t)0x3dd3, (q15_t)0x8fed,
+  (q15_t)0x3dce, (q15_t)0x8fea, (q15_t)0x3dc8, (q15_t)0x8fe7, (q15_t)0x3dc3, (q15_t)0x8fe3, (q15_t)0x3dbd, (q15_t)0x8fe0,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3db2, (q15_t)0x8fda, (q15_t)0x3dad, (q15_t)0x8fd7, (q15_t)0x3da7, (q15_t)0x8fd4,
+  (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d9c, (q15_t)0x8fce, (q15_t)0x3d97, (q15_t)0x8fcb, (q15_t)0x3d91, (q15_t)0x8fc8,
+  (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d86, (q15_t)0x8fc2, (q15_t)0x3d81, (q15_t)0x8fbf, (q15_t)0x3d7b, (q15_t)0x8fbc,
+  (q15_t)0x3d76, (q15_t)0x8fb9, (q15_t)0x3d70, (q15_t)0x8fb6, (q15_t)0x3d6b, (q15_t)0x8fb3, (q15_t)0x3d65, (q15_t)0x8fb0,
+  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d5a, (q15_t)0x8faa, (q15_t)0x3d55, (q15_t)0x8fa7, (q15_t)0x3d4f, (q15_t)0x8fa4,
+  (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d44, (q15_t)0x8f9e, (q15_t)0x3d3e, (q15_t)0x8f9b, (q15_t)0x3d39, (q15_t)0x8f98,
+  (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d2e, (q15_t)0x8f92, (q15_t)0x3d28, (q15_t)0x8f8f, (q15_t)0x3d23, (q15_t)0x8f8c,
+  (q15_t)0x3d1d, (q15_t)0x8f89, (q15_t)0x3d18, (q15_t)0x8f86, (q15_t)0x3d12, (q15_t)0x8f83, (q15_t)0x3d0d, (q15_t)0x8f80,
+  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3d02, (q15_t)0x8f7a, (q15_t)0x3cfc, (q15_t)0x8f77, (q15_t)0x3cf7, (q15_t)0x8f74,
+  (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cec, (q15_t)0x8f6e, (q15_t)0x3ce6, (q15_t)0x8f6b, (q15_t)0x3ce1, (q15_t)0x8f68,
+  (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cd6, (q15_t)0x8f62, (q15_t)0x3cd0, (q15_t)0x8f5f, (q15_t)0x3cca, (q15_t)0x8f5c,
+  (q15_t)0x3cc5, (q15_t)0x8f59, (q15_t)0x3cbf, (q15_t)0x8f56, (q15_t)0x3cba, (q15_t)0x8f53, (q15_t)0x3cb4, (q15_t)0x8f50,
+  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3ca9, (q15_t)0x8f4a, (q15_t)0x3ca4, (q15_t)0x8f47, (q15_t)0x3c9e, (q15_t)0x8f44,
+  (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c93, (q15_t)0x8f3e, (q15_t)0x3c8e, (q15_t)0x8f3b, (q15_t)0x3c88, (q15_t)0x8f38,
+  (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c7d, (q15_t)0x8f32, (q15_t)0x3c77, (q15_t)0x8f2f, (q15_t)0x3c72, (q15_t)0x8f2d,
+  (q15_t)0x3c6c, (q15_t)0x8f2a, (q15_t)0x3c67, (q15_t)0x8f27, (q15_t)0x3c61, (q15_t)0x8f24, (q15_t)0x3c5c, (q15_t)0x8f21,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c51, (q15_t)0x8f1b, (q15_t)0x3c4b, (q15_t)0x8f18, (q15_t)0x3c46, (q15_t)0x8f15,
+  (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c3b, (q15_t)0x8f0f, (q15_t)0x3c35, (q15_t)0x8f0c, (q15_t)0x3c2f, (q15_t)0x8f09,
+  (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c24, (q15_t)0x8f03, (q15_t)0x3c1f, (q15_t)0x8f00, (q15_t)0x3c19, (q15_t)0x8efd,
+  (q15_t)0x3c14, (q15_t)0x8efa, (q15_t)0x3c0e, (q15_t)0x8ef7, (q15_t)0x3c09, (q15_t)0x8ef4, (q15_t)0x3c03, (q15_t)0x8ef1,
+  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3bf8, (q15_t)0x8eec, (q15_t)0x3bf2, (q15_t)0x8ee9, (q15_t)0x3bed, (q15_t)0x8ee6,
+  (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3be2, (q15_t)0x8ee0, (q15_t)0x3bdc, (q15_t)0x8edd, (q15_t)0x3bd7, (q15_t)0x8eda,
+  (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bcc, (q15_t)0x8ed4, (q15_t)0x3bc6, (q15_t)0x8ed1, (q15_t)0x3bc0, (q15_t)0x8ece,
+  (q15_t)0x3bbb, (q15_t)0x8ecb, (q15_t)0x3bb5, (q15_t)0x8ec8, (q15_t)0x3bb0, (q15_t)0x8ec5, (q15_t)0x3baa, (q15_t)0x8ec2,
+  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b9f, (q15_t)0x8ebd, (q15_t)0x3b99, (q15_t)0x8eba, (q15_t)0x3b94, (q15_t)0x8eb7,
+  (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b89, (q15_t)0x8eb1, (q15_t)0x3b83, (q15_t)0x8eae, (q15_t)0x3b7e, (q15_t)0x8eab,
+  (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b73, (q15_t)0x8ea5, (q15_t)0x3b6d, (q15_t)0x8ea2, (q15_t)0x3b67, (q15_t)0x8e9f,
+  (q15_t)0x3b62, (q15_t)0x8e9c, (q15_t)0x3b5c, (q15_t)0x8e99, (q15_t)0x3b57, (q15_t)0x8e97, (q15_t)0x3b51, (q15_t)0x8e94,
+  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b46, (q15_t)0x8e8e, (q15_t)0x3b40, (q15_t)0x8e8b, (q15_t)0x3b3b, (q15_t)0x8e88,
+  (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b30, (q15_t)0x8e82, (q15_t)0x3b2a, (q15_t)0x8e7f, (q15_t)0x3b25, (q15_t)0x8e7c,
+  (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b19, (q15_t)0x8e77, (q15_t)0x3b14, (q15_t)0x8e74, (q15_t)0x3b0e, (q15_t)0x8e71,
+  (q15_t)0x3b09, (q15_t)0x8e6e, (q15_t)0x3b03, (q15_t)0x8e6b, (q15_t)0x3afe, (q15_t)0x8e68, (q15_t)0x3af8, (q15_t)0x8e65,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3aed, (q15_t)0x8e5f, (q15_t)0x3ae7, (q15_t)0x8e5d, (q15_t)0x3ae2, (q15_t)0x8e5a,
+  (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ad7, (q15_t)0x8e54, (q15_t)0x3ad1, (q15_t)0x8e51, (q15_t)0x3acb, (q15_t)0x8e4e,
+  (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3ac0, (q15_t)0x8e48, (q15_t)0x3abb, (q15_t)0x8e45, (q15_t)0x3ab5, (q15_t)0x8e43,
+  (q15_t)0x3aaf, (q15_t)0x8e40, (q15_t)0x3aaa, (q15_t)0x8e3d, (q15_t)0x3aa4, (q15_t)0x8e3a, (q15_t)0x3a9f, (q15_t)0x8e37,
+  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a94, (q15_t)0x8e31, (q15_t)0x3a8e, (q15_t)0x8e2e, (q15_t)0x3a88, (q15_t)0x8e2c,
+  (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a7d, (q15_t)0x8e26, (q15_t)0x3a78, (q15_t)0x8e23, (q15_t)0x3a72, (q15_t)0x8e20,
+  (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a67, (q15_t)0x8e1a, (q15_t)0x3a61, (q15_t)0x8e17, (q15_t)0x3a5c, (q15_t)0x8e15,
+  (q15_t)0x3a56, (q15_t)0x8e12, (q15_t)0x3a50, (q15_t)0x8e0f, (q15_t)0x3a4b, (q15_t)0x8e0c, (q15_t)0x3a45, (q15_t)0x8e09,
+  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a3a, (q15_t)0x8e03, (q15_t)0x3a34, (q15_t)0x8e01, (q15_t)0x3a2f, (q15_t)0x8dfe,
+  (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a24, (q15_t)0x8df8, (q15_t)0x3a1e, (q15_t)0x8df5, (q15_t)0x3a19, (q15_t)0x8df2,
+  (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x3a0d, (q15_t)0x8ded, (q15_t)0x3a08, (q15_t)0x8dea, (q15_t)0x3a02, (q15_t)0x8de7,
+  (q15_t)0x39fd, (q15_t)0x8de4, (q15_t)0x39f7, (q15_t)0x8de1, (q15_t)0x39f1, (q15_t)0x8dde, (q15_t)0x39ec, (q15_t)0x8ddc,
+  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39e0, (q15_t)0x8dd6, (q15_t)0x39db, (q15_t)0x8dd3, (q15_t)0x39d5, (q15_t)0x8dd0,
+  (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39ca, (q15_t)0x8dca, (q15_t)0x39c4, (q15_t)0x8dc8, (q15_t)0x39bf, (q15_t)0x8dc5,
+  (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39b4, (q15_t)0x8dbf, (q15_t)0x39ae, (q15_t)0x8dbc, (q15_t)0x39a8, (q15_t)0x8db9,
+  (q15_t)0x39a3, (q15_t)0x8db7, (q15_t)0x399d, (q15_t)0x8db4, (q15_t)0x3998, (q15_t)0x8db1, (q15_t)0x3992, (q15_t)0x8dae,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3987, (q15_t)0x8da9, (q15_t)0x3981, (q15_t)0x8da6, (q15_t)0x397c, (q15_t)0x8da3,
+  (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x3970, (q15_t)0x8d9d, (q15_t)0x396b, (q15_t)0x8d9a, (q15_t)0x3965, (q15_t)0x8d98,
+  (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x395a, (q15_t)0x8d92, (q15_t)0x3954, (q15_t)0x8d8f, (q15_t)0x394f, (q15_t)0x8d8c,
+  (q15_t)0x3949, (q15_t)0x8d8a, (q15_t)0x3943, (q15_t)0x8d87, (q15_t)0x393e, (q15_t)0x8d84, (q15_t)0x3938, (q15_t)0x8d81,
+  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x392d, (q15_t)0x8d7b, (q15_t)0x3927, (q15_t)0x8d79, (q15_t)0x3922, (q15_t)0x8d76,
+  (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3916, (q15_t)0x8d70, (q15_t)0x3911, (q15_t)0x8d6d, (q15_t)0x390b, (q15_t)0x8d6b,
+  (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x3900, (q15_t)0x8d65, (q15_t)0x38fa, (q15_t)0x8d62, (q15_t)0x38f5, (q15_t)0x8d5f,
+  (q15_t)0x38ef, (q15_t)0x8d5d, (q15_t)0x38e9, (q15_t)0x8d5a, (q15_t)0x38e4, (q15_t)0x8d57, (q15_t)0x38de, (q15_t)0x8d54,
+  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38d3, (q15_t)0x8d4f, (q15_t)0x38cd, (q15_t)0x8d4c, (q15_t)0x38c8, (q15_t)0x8d49,
+  (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38bc, (q15_t)0x8d44, (q15_t)0x38b7, (q15_t)0x8d41, (q15_t)0x38b1, (q15_t)0x8d3e,
+  (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x38a6, (q15_t)0x8d38, (q15_t)0x38a0, (q15_t)0x8d36, (q15_t)0x389b, (q15_t)0x8d33,
+  (q15_t)0x3895, (q15_t)0x8d30, (q15_t)0x388f, (q15_t)0x8d2d, (q15_t)0x388a, (q15_t)0x8d2b, (q15_t)0x3884, (q15_t)0x8d28,
+  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3879, (q15_t)0x8d22, (q15_t)0x3873, (q15_t)0x8d1f, (q15_t)0x386d, (q15_t)0x8d1d,
+  (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3862, (q15_t)0x8d17, (q15_t)0x385d, (q15_t)0x8d14, (q15_t)0x3857, (q15_t)0x8d12,
+  (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x384c, (q15_t)0x8d0c, (q15_t)0x3846, (q15_t)0x8d09, (q15_t)0x3840, (q15_t)0x8d07,
+  (q15_t)0x383b, (q15_t)0x8d04, (q15_t)0x3835, (q15_t)0x8d01, (q15_t)0x382f, (q15_t)0x8cfe, (q15_t)0x382a, (q15_t)0x8cfb,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x381e, (q15_t)0x8cf6, (q15_t)0x3819, (q15_t)0x8cf3, (q15_t)0x3813, (q15_t)0x8cf0,
+  (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x3808, (q15_t)0x8ceb, (q15_t)0x3802, (q15_t)0x8ce8, (q15_t)0x37fd, (q15_t)0x8ce5,
+  (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37f1, (q15_t)0x8ce0, (q15_t)0x37ec, (q15_t)0x8cdd, (q15_t)0x37e6, (q15_t)0x8cda,
+  (q15_t)0x37e0, (q15_t)0x8cd8, (q15_t)0x37db, (q15_t)0x8cd5, (q15_t)0x37d5, (q15_t)0x8cd2, (q15_t)0x37cf, (q15_t)0x8cd0,
+  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37c4, (q15_t)0x8cca, (q15_t)0x37be, (q15_t)0x8cc7, (q15_t)0x37b9, (q15_t)0x8cc5,
+  (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x37ad, (q15_t)0x8cbf, (q15_t)0x37a8, (q15_t)0x8cbc, (q15_t)0x37a2, (q15_t)0x8cba,
+  (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3797, (q15_t)0x8cb4, (q15_t)0x3791, (q15_t)0x8cb1, (q15_t)0x378b, (q15_t)0x8caf,
+  (q15_t)0x3786, (q15_t)0x8cac, (q15_t)0x3780, (q15_t)0x8ca9, (q15_t)0x377a, (q15_t)0x8ca7, (q15_t)0x3775, (q15_t)0x8ca4,
+  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3769, (q15_t)0x8c9e, (q15_t)0x3764, (q15_t)0x8c9c, (q15_t)0x375e, (q15_t)0x8c99,
+  (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3753, (q15_t)0x8c94, (q15_t)0x374d, (q15_t)0x8c91, (q15_t)0x3747, (q15_t)0x8c8e,
+  (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x373c, (q15_t)0x8c89, (q15_t)0x3736, (q15_t)0x8c86, (q15_t)0x3731, (q15_t)0x8c83,
+  (q15_t)0x372b, (q15_t)0x8c81, (q15_t)0x3725, (q15_t)0x8c7e, (q15_t)0x3720, (q15_t)0x8c7b, (q15_t)0x371a, (q15_t)0x8c78,
+  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x370f, (q15_t)0x8c73, (q15_t)0x3709, (q15_t)0x8c70, (q15_t)0x3703, (q15_t)0x8c6e,
+  (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36f8, (q15_t)0x8c68, (q15_t)0x36f2, (q15_t)0x8c65, (q15_t)0x36ed, (q15_t)0x8c63,
+  (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36e1, (q15_t)0x8c5d, (q15_t)0x36dc, (q15_t)0x8c5b, (q15_t)0x36d6, (q15_t)0x8c58,
+  (q15_t)0x36d0, (q15_t)0x8c55, (q15_t)0x36cb, (q15_t)0x8c53, (q15_t)0x36c5, (q15_t)0x8c50, (q15_t)0x36bf, (q15_t)0x8c4d,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36b4, (q15_t)0x8c48, (q15_t)0x36ae, (q15_t)0x8c45, (q15_t)0x36a9, (q15_t)0x8c43,
+  (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x369d, (q15_t)0x8c3d, (q15_t)0x3698, (q15_t)0x8c3a, (q15_t)0x3692, (q15_t)0x8c38,
+  (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3686, (q15_t)0x8c32, (q15_t)0x3681, (q15_t)0x8c30, (q15_t)0x367b, (q15_t)0x8c2d,
+  (q15_t)0x3675, (q15_t)0x8c2a, (q15_t)0x3670, (q15_t)0x8c28, (q15_t)0x366a, (q15_t)0x8c25, (q15_t)0x3664, (q15_t)0x8c22,
+  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3659, (q15_t)0x8c1d, (q15_t)0x3653, (q15_t)0x8c1a, (q15_t)0x364e, (q15_t)0x8c18,
+  (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3642, (q15_t)0x8c12, (q15_t)0x363d, (q15_t)0x8c10, (q15_t)0x3637, (q15_t)0x8c0d,
+  (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x362b, (q15_t)0x8c08, (q15_t)0x3626, (q15_t)0x8c05, (q15_t)0x3620, (q15_t)0x8c02,
+  (q15_t)0x361a, (q15_t)0x8c00, (q15_t)0x3615, (q15_t)0x8bfd, (q15_t)0x360f, (q15_t)0x8bfa, (q15_t)0x3609, (q15_t)0x8bf8,
+  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35fe, (q15_t)0x8bf3, (q15_t)0x35f8, (q15_t)0x8bf0, (q15_t)0x35f3, (q15_t)0x8bed,
+  (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35e7, (q15_t)0x8be8, (q15_t)0x35e1, (q15_t)0x8be5, (q15_t)0x35dc, (q15_t)0x8be3,
+  (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35d0, (q15_t)0x8bdd, (q15_t)0x35cb, (q15_t)0x8bdb, (q15_t)0x35c5, (q15_t)0x8bd8,
+  (q15_t)0x35bf, (q15_t)0x8bd5, (q15_t)0x35ba, (q15_t)0x8bd3, (q15_t)0x35b4, (q15_t)0x8bd0, (q15_t)0x35ae, (q15_t)0x8bce,
+  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x35a3, (q15_t)0x8bc8, (q15_t)0x359d, (q15_t)0x8bc6, (q15_t)0x3597, (q15_t)0x8bc3,
+  (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x358c, (q15_t)0x8bbe, (q15_t)0x3586, (q15_t)0x8bbb, (q15_t)0x3580, (q15_t)0x8bb8,
+  (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3575, (q15_t)0x8bb3, (q15_t)0x356f, (q15_t)0x8bb1, (q15_t)0x356a, (q15_t)0x8bae,
+  (q15_t)0x3564, (q15_t)0x8bab, (q15_t)0x355e, (q15_t)0x8ba9, (q15_t)0x3558, (q15_t)0x8ba6, (q15_t)0x3553, (q15_t)0x8ba4,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3547, (q15_t)0x8b9e, (q15_t)0x3542, (q15_t)0x8b9c, (q15_t)0x353c, (q15_t)0x8b99,
+  (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x3530, (q15_t)0x8b94, (q15_t)0x352b, (q15_t)0x8b91, (q15_t)0x3525, (q15_t)0x8b8f,
+  (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x351a, (q15_t)0x8b89, (q15_t)0x3514, (q15_t)0x8b87, (q15_t)0x350e, (q15_t)0x8b84,
+  (q15_t)0x3508, (q15_t)0x8b82, (q15_t)0x3503, (q15_t)0x8b7f, (q15_t)0x34fd, (q15_t)0x8b7c, (q15_t)0x34f7, (q15_t)0x8b7a,
+  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34ec, (q15_t)0x8b75, (q15_t)0x34e6, (q15_t)0x8b72, (q15_t)0x34e0, (q15_t)0x8b6f,
+  (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34d5, (q15_t)0x8b6a, (q15_t)0x34cf, (q15_t)0x8b68, (q15_t)0x34ca, (q15_t)0x8b65,
+  (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34be, (q15_t)0x8b60, (q15_t)0x34b8, (q15_t)0x8b5d, (q15_t)0x34b3, (q15_t)0x8b5b,
+  (q15_t)0x34ad, (q15_t)0x8b58, (q15_t)0x34a7, (q15_t)0x8b55, (q15_t)0x34a1, (q15_t)0x8b53, (q15_t)0x349c, (q15_t)0x8b50,
+  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x3490, (q15_t)0x8b4b, (q15_t)0x348b, (q15_t)0x8b49, (q15_t)0x3485, (q15_t)0x8b46,
+  (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3479, (q15_t)0x8b41, (q15_t)0x3474, (q15_t)0x8b3e, (q15_t)0x346e, (q15_t)0x8b3c,
+  (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3462, (q15_t)0x8b37, (q15_t)0x345d, (q15_t)0x8b34, (q15_t)0x3457, (q15_t)0x8b31,
+  (q15_t)0x3451, (q15_t)0x8b2f, (q15_t)0x344b, (q15_t)0x8b2c, (q15_t)0x3446, (q15_t)0x8b2a, (q15_t)0x3440, (q15_t)0x8b27,
+  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3435, (q15_t)0x8b22, (q15_t)0x342f, (q15_t)0x8b1f, (q15_t)0x3429, (q15_t)0x8b1d,
+  (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x341e, (q15_t)0x8b18, (q15_t)0x3418, (q15_t)0x8b15, (q15_t)0x3412, (q15_t)0x8b13,
+  (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x3407, (q15_t)0x8b0e, (q15_t)0x3401, (q15_t)0x8b0b, (q15_t)0x33fb, (q15_t)0x8b08,
+  (q15_t)0x33f5, (q15_t)0x8b06, (q15_t)0x33f0, (q15_t)0x8b03, (q15_t)0x33ea, (q15_t)0x8b01, (q15_t)0x33e4, (q15_t)0x8afe,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33d9, (q15_t)0x8af9, (q15_t)0x33d3, (q15_t)0x8af7, (q15_t)0x33cd, (q15_t)0x8af4,
+  (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33c2, (q15_t)0x8aef, (q15_t)0x33bc, (q15_t)0x8aec, (q15_t)0x33b6, (q15_t)0x8aea,
+  (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x33ab, (q15_t)0x8ae5, (q15_t)0x33a5, (q15_t)0x8ae2, (q15_t)0x339f, (q15_t)0x8ae0,
+  (q15_t)0x3399, (q15_t)0x8add, (q15_t)0x3394, (q15_t)0x8adb, (q15_t)0x338e, (q15_t)0x8ad8, (q15_t)0x3388, (q15_t)0x8ad6,
+  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x337d, (q15_t)0x8ad1, (q15_t)0x3377, (q15_t)0x8ace, (q15_t)0x3371, (q15_t)0x8acb,
+  (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3366, (q15_t)0x8ac6, (q15_t)0x3360, (q15_t)0x8ac4, (q15_t)0x335a, (q15_t)0x8ac1,
+  (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x334f, (q15_t)0x8abc, (q15_t)0x3349, (q15_t)0x8aba, (q15_t)0x3343, (q15_t)0x8ab7,
+  (q15_t)0x333d, (q15_t)0x8ab5, (q15_t)0x3338, (q15_t)0x8ab2, (q15_t)0x3332, (q15_t)0x8ab0, (q15_t)0x332c, (q15_t)0x8aad,
+  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x3321, (q15_t)0x8aa8, (q15_t)0x331b, (q15_t)0x8aa6, (q15_t)0x3315, (q15_t)0x8aa3,
+  (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x330a, (q15_t)0x8a9e, (q15_t)0x3304, (q15_t)0x8a9c, (q15_t)0x32fe, (q15_t)0x8a99,
+  (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32f3, (q15_t)0x8a94, (q15_t)0x32ed, (q15_t)0x8a92, (q15_t)0x32e7, (q15_t)0x8a8f,
+  (q15_t)0x32e1, (q15_t)0x8a8d, (q15_t)0x32db, (q15_t)0x8a8a, (q15_t)0x32d6, (q15_t)0x8a88, (q15_t)0x32d0, (q15_t)0x8a85,
+  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32c4, (q15_t)0x8a80, (q15_t)0x32bf, (q15_t)0x8a7e, (q15_t)0x32b9, (q15_t)0x8a7b,
+  (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x32ad, (q15_t)0x8a76, (q15_t)0x32a8, (q15_t)0x8a74, (q15_t)0x32a2, (q15_t)0x8a71,
+  (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3296, (q15_t)0x8a6c, (q15_t)0x3290, (q15_t)0x8a6a, (q15_t)0x328b, (q15_t)0x8a67,
+  (q15_t)0x3285, (q15_t)0x8a65, (q15_t)0x327f, (q15_t)0x8a62, (q15_t)0x3279, (q15_t)0x8a60, (q15_t)0x3274, (q15_t)0x8a5d,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3268, (q15_t)0x8a59, (q15_t)0x3262, (q15_t)0x8a56, (q15_t)0x325d, (q15_t)0x8a54,
+  (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3251, (q15_t)0x8a4f, (q15_t)0x324b, (q15_t)0x8a4c, (q15_t)0x3245, (q15_t)0x8a4a,
+  (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x323a, (q15_t)0x8a45, (q15_t)0x3234, (q15_t)0x8a42, (q15_t)0x322e, (q15_t)0x8a40,
+  (q15_t)0x3228, (q15_t)0x8a3d, (q15_t)0x3223, (q15_t)0x8a3b, (q15_t)0x321d, (q15_t)0x8a38, (q15_t)0x3217, (q15_t)0x8a36,
+  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x320c, (q15_t)0x8a31, (q15_t)0x3206, (q15_t)0x8a2f, (q15_t)0x3200, (q15_t)0x8a2c,
+  (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31f4, (q15_t)0x8a27, (q15_t)0x31ef, (q15_t)0x8a25, (q15_t)0x31e9, (q15_t)0x8a22,
+  (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31dd, (q15_t)0x8a1d, (q15_t)0x31d8, (q15_t)0x8a1b, (q15_t)0x31d2, (q15_t)0x8a19,
+  (q15_t)0x31cc, (q15_t)0x8a16, (q15_t)0x31c6, (q15_t)0x8a14, (q15_t)0x31c0, (q15_t)0x8a11, (q15_t)0x31bb, (q15_t)0x8a0f,
+  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x31af, (q15_t)0x8a0a, (q15_t)0x31a9, (q15_t)0x8a07, (q15_t)0x31a3, (q15_t)0x8a05,
+  (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3198, (q15_t)0x8a00, (q15_t)0x3192, (q15_t)0x89fe, (q15_t)0x318c, (q15_t)0x89fb,
+  (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x3181, (q15_t)0x89f6, (q15_t)0x317b, (q15_t)0x89f4, (q15_t)0x3175, (q15_t)0x89f2,
+  (q15_t)0x316f, (q15_t)0x89ef, (q15_t)0x3169, (q15_t)0x89ed, (q15_t)0x3164, (q15_t)0x89ea, (q15_t)0x315e, (q15_t)0x89e8,
+  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3152, (q15_t)0x89e3, (q15_t)0x314c, (q15_t)0x89e1, (q15_t)0x3147, (q15_t)0x89de,
+  (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x313b, (q15_t)0x89d9, (q15_t)0x3135, (q15_t)0x89d7, (q15_t)0x312f, (q15_t)0x89d5,
+  (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3124, (q15_t)0x89d0, (q15_t)0x311e, (q15_t)0x89cd, (q15_t)0x3118, (q15_t)0x89cb,
+  (q15_t)0x3112, (q15_t)0x89c8, (q15_t)0x310d, (q15_t)0x89c6, (q15_t)0x3107, (q15_t)0x89c4, (q15_t)0x3101, (q15_t)0x89c1,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30f5, (q15_t)0x89bc, (q15_t)0x30f0, (q15_t)0x89ba, (q15_t)0x30ea, (q15_t)0x89b8,
+  (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30de, (q15_t)0x89b3, (q15_t)0x30d8, (q15_t)0x89b0, (q15_t)0x30d3, (q15_t)0x89ae,
+  (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30c7, (q15_t)0x89a9, (q15_t)0x30c1, (q15_t)0x89a7, (q15_t)0x30bb, (q15_t)0x89a4,
+  (q15_t)0x30b6, (q15_t)0x89a2, (q15_t)0x30b0, (q15_t)0x89a0, (q15_t)0x30aa, (q15_t)0x899d, (q15_t)0x30a4, (q15_t)0x899b,
+  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3099, (q15_t)0x8996, (q15_t)0x3093, (q15_t)0x8994, (q15_t)0x308d, (q15_t)0x8991,
+  (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3081, (q15_t)0x898d, (q15_t)0x307b, (q15_t)0x898a, (q15_t)0x3076, (q15_t)0x8988,
+  (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x306a, (q15_t)0x8983, (q15_t)0x3064, (q15_t)0x8981, (q15_t)0x305e, (q15_t)0x897e,
+  (q15_t)0x3059, (q15_t)0x897c, (q15_t)0x3053, (q15_t)0x897a, (q15_t)0x304d, (q15_t)0x8977, (q15_t)0x3047, (q15_t)0x8975,
+  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x303b, (q15_t)0x8970, (q15_t)0x3036, (q15_t)0x896e, (q15_t)0x3030, (q15_t)0x896b,
+  (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3024, (q15_t)0x8967, (q15_t)0x301e, (q15_t)0x8964, (q15_t)0x3019, (q15_t)0x8962,
+  (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x300d, (q15_t)0x895d, (q15_t)0x3007, (q15_t)0x895b, (q15_t)0x3001, (q15_t)0x8958,
+  (q15_t)0x2ffb, (q15_t)0x8956, (q15_t)0x2ff6, (q15_t)0x8954, (q15_t)0x2ff0, (q15_t)0x8951, (q15_t)0x2fea, (q15_t)0x894f,
+  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fde, (q15_t)0x894a, (q15_t)0x2fd8, (q15_t)0x8948, (q15_t)0x2fd3, (q15_t)0x8946,
+  (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fc7, (q15_t)0x8941, (q15_t)0x2fc1, (q15_t)0x893f, (q15_t)0x2fbb, (q15_t)0x893c,
+  (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2fb0, (q15_t)0x8938, (q15_t)0x2faa, (q15_t)0x8935, (q15_t)0x2fa4, (q15_t)0x8933,
+  (q15_t)0x2f9e, (q15_t)0x8931, (q15_t)0x2f98, (q15_t)0x892e, (q15_t)0x2f92, (q15_t)0x892c, (q15_t)0x2f8d, (q15_t)0x892a,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f81, (q15_t)0x8925, (q15_t)0x2f7b, (q15_t)0x8923, (q15_t)0x2f75, (q15_t)0x8920,
+  (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f6a, (q15_t)0x891c, (q15_t)0x2f64, (q15_t)0x8919, (q15_t)0x2f5e, (q15_t)0x8917,
+  (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f52, (q15_t)0x8912, (q15_t)0x2f4c, (q15_t)0x8910, (q15_t)0x2f47, (q15_t)0x890e,
+  (q15_t)0x2f41, (q15_t)0x890b, (q15_t)0x2f3b, (q15_t)0x8909, (q15_t)0x2f35, (q15_t)0x8907, (q15_t)0x2f2f, (q15_t)0x8904,
+  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f24, (q15_t)0x8900, (q15_t)0x2f1e, (q15_t)0x88fd, (q15_t)0x2f18, (q15_t)0x88fb,
+  (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2f0c, (q15_t)0x88f6, (q15_t)0x2f06, (q15_t)0x88f4, (q15_t)0x2f01, (q15_t)0x88f2,
+  (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ef5, (q15_t)0x88ed, (q15_t)0x2eef, (q15_t)0x88eb, (q15_t)0x2ee9, (q15_t)0x88e9,
+  (q15_t)0x2ee3, (q15_t)0x88e6, (q15_t)0x2edd, (q15_t)0x88e4, (q15_t)0x2ed8, (q15_t)0x88e2, (q15_t)0x2ed2, (q15_t)0x88df,
+  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2ec6, (q15_t)0x88db, (q15_t)0x2ec0, (q15_t)0x88d9, (q15_t)0x2eba, (q15_t)0x88d6,
+  (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2eaf, (q15_t)0x88d2, (q15_t)0x2ea9, (q15_t)0x88cf, (q15_t)0x2ea3, (q15_t)0x88cd,
+  (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e97, (q15_t)0x88c8, (q15_t)0x2e91, (q15_t)0x88c6, (q15_t)0x2e8c, (q15_t)0x88c4,
+  (q15_t)0x2e86, (q15_t)0x88c2, (q15_t)0x2e80, (q15_t)0x88bf, (q15_t)0x2e7a, (q15_t)0x88bd, (q15_t)0x2e74, (q15_t)0x88bb,
+  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e68, (q15_t)0x88b6, (q15_t)0x2e63, (q15_t)0x88b4, (q15_t)0x2e5d, (q15_t)0x88b2,
+  (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e51, (q15_t)0x88ad, (q15_t)0x2e4b, (q15_t)0x88ab, (q15_t)0x2e45, (q15_t)0x88a9,
+  (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e3a, (q15_t)0x88a4, (q15_t)0x2e34, (q15_t)0x88a2, (q15_t)0x2e2e, (q15_t)0x88a0,
+  (q15_t)0x2e28, (q15_t)0x889d, (q15_t)0x2e22, (q15_t)0x889b, (q15_t)0x2e1c, (q15_t)0x8899, (q15_t)0x2e16, (q15_t)0x8896,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2e0b, (q15_t)0x8892, (q15_t)0x2e05, (q15_t)0x8890, (q15_t)0x2dff, (q15_t)0x888d,
+  (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2df3, (q15_t)0x8889, (q15_t)0x2ded, (q15_t)0x8887, (q15_t)0x2de7, (q15_t)0x8884,
+  (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2ddc, (q15_t)0x8880, (q15_t)0x2dd6, (q15_t)0x887e, (q15_t)0x2dd0, (q15_t)0x887b,
+  (q15_t)0x2dca, (q15_t)0x8879, (q15_t)0x2dc4, (q15_t)0x8877, (q15_t)0x2dbe, (q15_t)0x8875, (q15_t)0x2db9, (q15_t)0x8872,
+  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2dad, (q15_t)0x886e, (q15_t)0x2da7, (q15_t)0x886c, (q15_t)0x2da1, (q15_t)0x8869,
+  (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d95, (q15_t)0x8865, (q15_t)0x2d8f, (q15_t)0x8863, (q15_t)0x2d8a, (q15_t)0x8860,
+  (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d7e, (q15_t)0x885c, (q15_t)0x2d78, (q15_t)0x885a, (q15_t)0x2d72, (q15_t)0x8858,
+  (q15_t)0x2d6c, (q15_t)0x8855, (q15_t)0x2d66, (q15_t)0x8853, (q15_t)0x2d60, (q15_t)0x8851, (q15_t)0x2d5b, (q15_t)0x884f,
+  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d4f, (q15_t)0x884a, (q15_t)0x2d49, (q15_t)0x8848, (q15_t)0x2d43, (q15_t)0x8846,
+  (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d37, (q15_t)0x8841, (q15_t)0x2d31, (q15_t)0x883f, (q15_t)0x2d2c, (q15_t)0x883d,
+  (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d20, (q15_t)0x8838, (q15_t)0x2d1a, (q15_t)0x8836, (q15_t)0x2d14, (q15_t)0x8834,
+  (q15_t)0x2d0e, (q15_t)0x8832, (q15_t)0x2d08, (q15_t)0x8830, (q15_t)0x2d02, (q15_t)0x882d, (q15_t)0x2cfd, (q15_t)0x882b,
+  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cf1, (q15_t)0x8827, (q15_t)0x2ceb, (q15_t)0x8825, (q15_t)0x2ce5, (q15_t)0x8822,
+  (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cd9, (q15_t)0x881e, (q15_t)0x2cd3, (q15_t)0x881c, (q15_t)0x2ccd, (q15_t)0x881a,
+  (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cc2, (q15_t)0x8815, (q15_t)0x2cbc, (q15_t)0x8813, (q15_t)0x2cb6, (q15_t)0x8811,
+  (q15_t)0x2cb0, (q15_t)0x880f, (q15_t)0x2caa, (q15_t)0x880c, (q15_t)0x2ca4, (q15_t)0x880a, (q15_t)0x2c9e, (q15_t)0x8808,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c93, (q15_t)0x8804, (q15_t)0x2c8d, (q15_t)0x8801, (q15_t)0x2c87, (q15_t)0x87ff,
+  (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c7b, (q15_t)0x87fb, (q15_t)0x2c75, (q15_t)0x87f9, (q15_t)0x2c6f, (q15_t)0x87f6,
+  (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c63, (q15_t)0x87f2, (q15_t)0x2c5e, (q15_t)0x87f0, (q15_t)0x2c58, (q15_t)0x87ee,
+  (q15_t)0x2c52, (q15_t)0x87ec, (q15_t)0x2c4c, (q15_t)0x87e9, (q15_t)0x2c46, (q15_t)0x87e7, (q15_t)0x2c40, (q15_t)0x87e5,
+  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c34, (q15_t)0x87e1, (q15_t)0x2c2e, (q15_t)0x87df, (q15_t)0x2c29, (q15_t)0x87dc,
+  (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c1d, (q15_t)0x87d8, (q15_t)0x2c17, (q15_t)0x87d6, (q15_t)0x2c11, (q15_t)0x87d4,
+  (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2c05, (q15_t)0x87cf, (q15_t)0x2bff, (q15_t)0x87cd, (q15_t)0x2bf9, (q15_t)0x87cb,
+  (q15_t)0x2bf3, (q15_t)0x87c9, (q15_t)0x2bee, (q15_t)0x87c7, (q15_t)0x2be8, (q15_t)0x87c5, (q15_t)0x2be2, (q15_t)0x87c2,
+  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bd6, (q15_t)0x87be, (q15_t)0x2bd0, (q15_t)0x87bc, (q15_t)0x2bca, (q15_t)0x87ba,
+  (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bbe, (q15_t)0x87b6, (q15_t)0x2bb8, (q15_t)0x87b3, (q15_t)0x2bb2, (q15_t)0x87b1,
+  (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2ba7, (q15_t)0x87ad, (q15_t)0x2ba1, (q15_t)0x87ab, (q15_t)0x2b9b, (q15_t)0x87a9,
+  (q15_t)0x2b95, (q15_t)0x87a7, (q15_t)0x2b8f, (q15_t)0x87a4, (q15_t)0x2b89, (q15_t)0x87a2, (q15_t)0x2b83, (q15_t)0x87a0,
+  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b77, (q15_t)0x879c, (q15_t)0x2b71, (q15_t)0x879a, (q15_t)0x2b6c, (q15_t)0x8798,
+  (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b60, (q15_t)0x8793, (q15_t)0x2b5a, (q15_t)0x8791, (q15_t)0x2b54, (q15_t)0x878f,
+  (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b48, (q15_t)0x878b, (q15_t)0x2b42, (q15_t)0x8789, (q15_t)0x2b3c, (q15_t)0x8787,
+  (q15_t)0x2b36, (q15_t)0x8784, (q15_t)0x2b30, (q15_t)0x8782, (q15_t)0x2b2b, (q15_t)0x8780, (q15_t)0x2b25, (q15_t)0x877e,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b19, (q15_t)0x877a, (q15_t)0x2b13, (q15_t)0x8778, (q15_t)0x2b0d, (q15_t)0x8776,
+  (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2b01, (q15_t)0x8771, (q15_t)0x2afb, (q15_t)0x876f, (q15_t)0x2af5, (q15_t)0x876d,
+  (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ae9, (q15_t)0x8769, (q15_t)0x2ae4, (q15_t)0x8767, (q15_t)0x2ade, (q15_t)0x8765,
+  (q15_t)0x2ad8, (q15_t)0x8763, (q15_t)0x2ad2, (q15_t)0x8761, (q15_t)0x2acc, (q15_t)0x875e, (q15_t)0x2ac6, (q15_t)0x875c,
+  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aba, (q15_t)0x8758, (q15_t)0x2ab4, (q15_t)0x8756, (q15_t)0x2aae, (q15_t)0x8754,
+  (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2aa2, (q15_t)0x8750, (q15_t)0x2a9c, (q15_t)0x874e, (q15_t)0x2a97, (q15_t)0x874c,
+  (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a8b, (q15_t)0x8747, (q15_t)0x2a85, (q15_t)0x8745, (q15_t)0x2a7f, (q15_t)0x8743,
+  (q15_t)0x2a79, (q15_t)0x8741, (q15_t)0x2a73, (q15_t)0x873f, (q15_t)0x2a6d, (q15_t)0x873d, (q15_t)0x2a67, (q15_t)0x873b,
+  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a5b, (q15_t)0x8737, (q15_t)0x2a55, (q15_t)0x8735, (q15_t)0x2a4f, (q15_t)0x8733,
+  (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a44, (q15_t)0x872e, (q15_t)0x2a3e, (q15_t)0x872c, (q15_t)0x2a38, (q15_t)0x872a,
+  (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a2c, (q15_t)0x8726, (q15_t)0x2a26, (q15_t)0x8724, (q15_t)0x2a20, (q15_t)0x8722,
+  (q15_t)0x2a1a, (q15_t)0x8720, (q15_t)0x2a14, (q15_t)0x871e, (q15_t)0x2a0e, (q15_t)0x871c, (q15_t)0x2a08, (q15_t)0x871a,
+  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29fc, (q15_t)0x8716, (q15_t)0x29f6, (q15_t)0x8714, (q15_t)0x29f0, (q15_t)0x8712,
+  (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29e5, (q15_t)0x870d, (q15_t)0x29df, (q15_t)0x870b, (q15_t)0x29d9, (q15_t)0x8709,
+  (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29cd, (q15_t)0x8705, (q15_t)0x29c7, (q15_t)0x8703, (q15_t)0x29c1, (q15_t)0x8701,
+  (q15_t)0x29bb, (q15_t)0x86ff, (q15_t)0x29b5, (q15_t)0x86fd, (q15_t)0x29af, (q15_t)0x86fb, (q15_t)0x29a9, (q15_t)0x86f9,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x299d, (q15_t)0x86f5, (q15_t)0x2997, (q15_t)0x86f3, (q15_t)0x2991, (q15_t)0x86f1,
+  (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2986, (q15_t)0x86ed, (q15_t)0x2980, (q15_t)0x86eb, (q15_t)0x297a, (q15_t)0x86e9,
+  (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x296e, (q15_t)0x86e4, (q15_t)0x2968, (q15_t)0x86e2, (q15_t)0x2962, (q15_t)0x86e0,
+  (q15_t)0x295c, (q15_t)0x86de, (q15_t)0x2956, (q15_t)0x86dc, (q15_t)0x2950, (q15_t)0x86da, (q15_t)0x294a, (q15_t)0x86d8,
+  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x293e, (q15_t)0x86d4, (q15_t)0x2938, (q15_t)0x86d2, (q15_t)0x2932, (q15_t)0x86d0,
+  (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2926, (q15_t)0x86cc, (q15_t)0x2920, (q15_t)0x86ca, (q15_t)0x291b, (q15_t)0x86c8,
+  (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x290f, (q15_t)0x86c4, (q15_t)0x2909, (q15_t)0x86c2, (q15_t)0x2903, (q15_t)0x86c0,
+  (q15_t)0x28fd, (q15_t)0x86be, (q15_t)0x28f7, (q15_t)0x86bc, (q15_t)0x28f1, (q15_t)0x86ba, (q15_t)0x28eb, (q15_t)0x86b8,
+  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28df, (q15_t)0x86b4, (q15_t)0x28d9, (q15_t)0x86b2, (q15_t)0x28d3, (q15_t)0x86b0,
+  (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28c7, (q15_t)0x86ac, (q15_t)0x28c1, (q15_t)0x86aa, (q15_t)0x28bb, (q15_t)0x86a8,
+  (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x28af, (q15_t)0x86a4, (q15_t)0x28a9, (q15_t)0x86a2, (q15_t)0x28a3, (q15_t)0x86a0,
+  (q15_t)0x289d, (q15_t)0x869e, (q15_t)0x2898, (q15_t)0x869c, (q15_t)0x2892, (q15_t)0x869a, (q15_t)0x288c, (q15_t)0x8698,
+  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x2880, (q15_t)0x8694, (q15_t)0x287a, (q15_t)0x8692, (q15_t)0x2874, (q15_t)0x8690,
+  (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2868, (q15_t)0x868c, (q15_t)0x2862, (q15_t)0x868a, (q15_t)0x285c, (q15_t)0x8688,
+  (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x2850, (q15_t)0x8684, (q15_t)0x284a, (q15_t)0x8682, (q15_t)0x2844, (q15_t)0x8680,
+  (q15_t)0x283e, (q15_t)0x867e, (q15_t)0x2838, (q15_t)0x867c, (q15_t)0x2832, (q15_t)0x867a, (q15_t)0x282c, (q15_t)0x8678,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x2820, (q15_t)0x8674, (q15_t)0x281a, (q15_t)0x8672, (q15_t)0x2814, (q15_t)0x8670,
+  (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x2808, (q15_t)0x866d, (q15_t)0x2802, (q15_t)0x866b, (q15_t)0x27fc, (q15_t)0x8669,
+  (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27f1, (q15_t)0x8665, (q15_t)0x27eb, (q15_t)0x8663, (q15_t)0x27e5, (q15_t)0x8661,
+  (q15_t)0x27df, (q15_t)0x865f, (q15_t)0x27d9, (q15_t)0x865d, (q15_t)0x27d3, (q15_t)0x865b, (q15_t)0x27cd, (q15_t)0x8659,
+  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27c1, (q15_t)0x8655, (q15_t)0x27bb, (q15_t)0x8653, (q15_t)0x27b5, (q15_t)0x8651,
+  (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x27a9, (q15_t)0x864d, (q15_t)0x27a3, (q15_t)0x864b, (q15_t)0x279d, (q15_t)0x8649,
+  (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x2791, (q15_t)0x8645, (q15_t)0x278b, (q15_t)0x8644, (q15_t)0x2785, (q15_t)0x8642,
+  (q15_t)0x277f, (q15_t)0x8640, (q15_t)0x2779, (q15_t)0x863e, (q15_t)0x2773, (q15_t)0x863c, (q15_t)0x276d, (q15_t)0x863a,
+  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2761, (q15_t)0x8636, (q15_t)0x275b, (q15_t)0x8634, (q15_t)0x2755, (q15_t)0x8632,
+  (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2749, (q15_t)0x862e, (q15_t)0x2743, (q15_t)0x862c, (q15_t)0x273d, (q15_t)0x862a,
+  (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x2731, (q15_t)0x8627, (q15_t)0x272b, (q15_t)0x8625, (q15_t)0x2725, (q15_t)0x8623,
+  (q15_t)0x271f, (q15_t)0x8621, (q15_t)0x2719, (q15_t)0x861f, (q15_t)0x2713, (q15_t)0x861d, (q15_t)0x270d, (q15_t)0x861b,
+  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x2701, (q15_t)0x8617, (q15_t)0x26fb, (q15_t)0x8615, (q15_t)0x26f5, (q15_t)0x8613,
+  (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26e9, (q15_t)0x8610, (q15_t)0x26e4, (q15_t)0x860e, (q15_t)0x26de, (q15_t)0x860c,
+  (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26d2, (q15_t)0x8608, (q15_t)0x26cc, (q15_t)0x8606, (q15_t)0x26c6, (q15_t)0x8604,
+  (q15_t)0x26c0, (q15_t)0x8602, (q15_t)0x26ba, (q15_t)0x8600, (q15_t)0x26b4, (q15_t)0x85fe, (q15_t)0x26ae, (q15_t)0x85fc,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x26a2, (q15_t)0x85f9, (q15_t)0x269c, (q15_t)0x85f7, (q15_t)0x2696, (q15_t)0x85f5,
+  (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x268a, (q15_t)0x85f1, (q15_t)0x2684, (q15_t)0x85ef, (q15_t)0x267e, (q15_t)0x85ed,
+  (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2672, (q15_t)0x85ea, (q15_t)0x266c, (q15_t)0x85e8, (q15_t)0x2666, (q15_t)0x85e6,
+  (q15_t)0x2660, (q15_t)0x85e4, (q15_t)0x265a, (q15_t)0x85e2, (q15_t)0x2654, (q15_t)0x85e0, (q15_t)0x264e, (q15_t)0x85de,
+  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2642, (q15_t)0x85da, (q15_t)0x263c, (q15_t)0x85d9, (q15_t)0x2636, (q15_t)0x85d7,
+  (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x262a, (q15_t)0x85d3, (q15_t)0x2624, (q15_t)0x85d1, (q15_t)0x261e, (q15_t)0x85cf,
+  (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2612, (q15_t)0x85cb, (q15_t)0x260c, (q15_t)0x85ca, (q15_t)0x2606, (q15_t)0x85c8,
+  (q15_t)0x2600, (q15_t)0x85c6, (q15_t)0x25fa, (q15_t)0x85c4, (q15_t)0x25f4, (q15_t)0x85c2, (q15_t)0x25ee, (q15_t)0x85c0,
+  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25e2, (q15_t)0x85bd, (q15_t)0x25dc, (q15_t)0x85bb, (q15_t)0x25d6, (q15_t)0x85b9,
+  (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25ca, (q15_t)0x85b5, (q15_t)0x25c4, (q15_t)0x85b3, (q15_t)0x25be, (q15_t)0x85b1,
+  (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25b2, (q15_t)0x85ae, (q15_t)0x25ac, (q15_t)0x85ac, (q15_t)0x25a6, (q15_t)0x85aa,
+  (q15_t)0x25a0, (q15_t)0x85a8, (q15_t)0x259a, (q15_t)0x85a6, (q15_t)0x2594, (q15_t)0x85a4, (q15_t)0x258e, (q15_t)0x85a3,
+  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2582, (q15_t)0x859f, (q15_t)0x257c, (q15_t)0x859d, (q15_t)0x2576, (q15_t)0x859b,
+  (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x256a, (q15_t)0x8598, (q15_t)0x2564, (q15_t)0x8596, (q15_t)0x255e, (q15_t)0x8594,
+  (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2552, (q15_t)0x8590, (q15_t)0x254c, (q15_t)0x858e, (q15_t)0x2546, (q15_t)0x858d,
+  (q15_t)0x2540, (q15_t)0x858b, (q15_t)0x253a, (q15_t)0x8589, (q15_t)0x2534, (q15_t)0x8587, (q15_t)0x252e, (q15_t)0x8585,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x2522, (q15_t)0x8582, (q15_t)0x251c, (q15_t)0x8580, (q15_t)0x2516, (q15_t)0x857e,
+  (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x2509, (q15_t)0x857a, (q15_t)0x2503, (q15_t)0x8579, (q15_t)0x24fd, (q15_t)0x8577,
+  (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24f1, (q15_t)0x8573, (q15_t)0x24eb, (q15_t)0x8571, (q15_t)0x24e5, (q15_t)0x856f,
+  (q15_t)0x24df, (q15_t)0x856e, (q15_t)0x24d9, (q15_t)0x856c, (q15_t)0x24d3, (q15_t)0x856a, (q15_t)0x24cd, (q15_t)0x8568,
+  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24c1, (q15_t)0x8565, (q15_t)0x24bb, (q15_t)0x8563, (q15_t)0x24b5, (q15_t)0x8561,
+  (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x24a9, (q15_t)0x855d, (q15_t)0x24a3, (q15_t)0x855c, (q15_t)0x249d, (q15_t)0x855a,
+  (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x2491, (q15_t)0x8556, (q15_t)0x248b, (q15_t)0x8554, (q15_t)0x2485, (q15_t)0x8553,
+  (q15_t)0x247f, (q15_t)0x8551, (q15_t)0x2479, (q15_t)0x854f, (q15_t)0x2473, (q15_t)0x854d, (q15_t)0x246d, (q15_t)0x854b,
+  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2461, (q15_t)0x8548, (q15_t)0x245b, (q15_t)0x8546, (q15_t)0x2455, (q15_t)0x8544,
+  (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2449, (q15_t)0x8541, (q15_t)0x2443, (q15_t)0x853f, (q15_t)0x243d, (q15_t)0x853d,
+  (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x2431, (q15_t)0x853a, (q15_t)0x242b, (q15_t)0x8538, (q15_t)0x2425, (q15_t)0x8536,
+  (q15_t)0x241f, (q15_t)0x8534, (q15_t)0x2419, (q15_t)0x8533, (q15_t)0x2413, (q15_t)0x8531, (q15_t)0x240d, (q15_t)0x852f,
+  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x2401, (q15_t)0x852b, (q15_t)0x23fa, (q15_t)0x852a, (q15_t)0x23f4, (q15_t)0x8528,
+  (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23e8, (q15_t)0x8524, (q15_t)0x23e2, (q15_t)0x8523, (q15_t)0x23dc, (q15_t)0x8521,
+  (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23d0, (q15_t)0x851d, (q15_t)0x23ca, (q15_t)0x851c, (q15_t)0x23c4, (q15_t)0x851a,
+  (q15_t)0x23be, (q15_t)0x8518, (q15_t)0x23b8, (q15_t)0x8516, (q15_t)0x23b2, (q15_t)0x8515, (q15_t)0x23ac, (q15_t)0x8513,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x23a0, (q15_t)0x850f, (q15_t)0x239a, (q15_t)0x850e, (q15_t)0x2394, (q15_t)0x850c,
+  (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2388, (q15_t)0x8508, (q15_t)0x2382, (q15_t)0x8507, (q15_t)0x237c, (q15_t)0x8505,
+  (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x2370, (q15_t)0x8501, (q15_t)0x236a, (q15_t)0x8500, (q15_t)0x2364, (q15_t)0x84fe,
+  (q15_t)0x235e, (q15_t)0x84fc, (q15_t)0x2358, (q15_t)0x84fa, (q15_t)0x2352, (q15_t)0x84f9, (q15_t)0x234b, (q15_t)0x84f7,
+  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x233f, (q15_t)0x84f4, (q15_t)0x2339, (q15_t)0x84f2, (q15_t)0x2333, (q15_t)0x84f0,
+  (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2327, (q15_t)0x84ed, (q15_t)0x2321, (q15_t)0x84eb, (q15_t)0x231b, (q15_t)0x84e9,
+  (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x230f, (q15_t)0x84e6, (q15_t)0x2309, (q15_t)0x84e4, (q15_t)0x2303, (q15_t)0x84e2,
+  (q15_t)0x22fd, (q15_t)0x84e1, (q15_t)0x22f7, (q15_t)0x84df, (q15_t)0x22f1, (q15_t)0x84dd, (q15_t)0x22eb, (q15_t)0x84db,
+  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22df, (q15_t)0x84d8, (q15_t)0x22d9, (q15_t)0x84d6, (q15_t)0x22d3, (q15_t)0x84d5,
+  (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22c7, (q15_t)0x84d1, (q15_t)0x22c0, (q15_t)0x84cf, (q15_t)0x22ba, (q15_t)0x84ce,
+  (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x22ae, (q15_t)0x84ca, (q15_t)0x22a8, (q15_t)0x84c9, (q15_t)0x22a2, (q15_t)0x84c7,
+  (q15_t)0x229c, (q15_t)0x84c5, (q15_t)0x2296, (q15_t)0x84c4, (q15_t)0x2290, (q15_t)0x84c2, (q15_t)0x228a, (q15_t)0x84c0,
+  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x227e, (q15_t)0x84bd, (q15_t)0x2278, (q15_t)0x84bb, (q15_t)0x2272, (q15_t)0x84b9,
+  (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2266, (q15_t)0x84b6, (q15_t)0x2260, (q15_t)0x84b4, (q15_t)0x225a, (q15_t)0x84b3,
+  (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x224e, (q15_t)0x84af, (q15_t)0x2247, (q15_t)0x84ae, (q15_t)0x2241, (q15_t)0x84ac,
+  (q15_t)0x223b, (q15_t)0x84aa, (q15_t)0x2235, (q15_t)0x84a9, (q15_t)0x222f, (q15_t)0x84a7, (q15_t)0x2229, (q15_t)0x84a5,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x221d, (q15_t)0x84a2, (q15_t)0x2217, (q15_t)0x84a0, (q15_t)0x2211, (q15_t)0x849e,
+  (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x2205, (q15_t)0x849b, (q15_t)0x21ff, (q15_t)0x8499, (q15_t)0x21f9, (q15_t)0x8498,
+  (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21ed, (q15_t)0x8494, (q15_t)0x21e7, (q15_t)0x8493, (q15_t)0x21e1, (q15_t)0x8491,
+  (q15_t)0x21da, (q15_t)0x848f, (q15_t)0x21d4, (q15_t)0x848e, (q15_t)0x21ce, (q15_t)0x848c, (q15_t)0x21c8, (q15_t)0x848a,
+  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21bc, (q15_t)0x8487, (q15_t)0x21b6, (q15_t)0x8486, (q15_t)0x21b0, (q15_t)0x8484,
+  (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x21a4, (q15_t)0x8481, (q15_t)0x219e, (q15_t)0x847f, (q15_t)0x2198, (q15_t)0x847d,
+  (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x218c, (q15_t)0x847a, (q15_t)0x2186, (q15_t)0x8478, (q15_t)0x2180, (q15_t)0x8477,
+  (q15_t)0x2179, (q15_t)0x8475, (q15_t)0x2173, (q15_t)0x8473, (q15_t)0x216d, (q15_t)0x8472, (q15_t)0x2167, (q15_t)0x8470,
+  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x215b, (q15_t)0x846d, (q15_t)0x2155, (q15_t)0x846b, (q15_t)0x214f, (q15_t)0x846a,
+  (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2143, (q15_t)0x8466, (q15_t)0x213d, (q15_t)0x8465, (q15_t)0x2137, (q15_t)0x8463,
+  (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x212b, (q15_t)0x8460, (q15_t)0x2125, (q15_t)0x845e, (q15_t)0x211e, (q15_t)0x845d,
+  (q15_t)0x2118, (q15_t)0x845b, (q15_t)0x2112, (q15_t)0x8459, (q15_t)0x210c, (q15_t)0x8458, (q15_t)0x2106, (q15_t)0x8456,
+  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20fa, (q15_t)0x8453, (q15_t)0x20f4, (q15_t)0x8451, (q15_t)0x20ee, (q15_t)0x8450,
+  (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20e2, (q15_t)0x844c, (q15_t)0x20dc, (q15_t)0x844b, (q15_t)0x20d6, (q15_t)0x8449,
+  (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20c9, (q15_t)0x8446, (q15_t)0x20c3, (q15_t)0x8444, (q15_t)0x20bd, (q15_t)0x8443,
+  (q15_t)0x20b7, (q15_t)0x8441, (q15_t)0x20b1, (q15_t)0x843f, (q15_t)0x20ab, (q15_t)0x843e, (q15_t)0x20a5, (q15_t)0x843c,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2099, (q15_t)0x8439, (q15_t)0x2093, (q15_t)0x8437, (q15_t)0x208d, (q15_t)0x8436,
+  (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x2081, (q15_t)0x8433, (q15_t)0x207a, (q15_t)0x8431, (q15_t)0x2074, (q15_t)0x842f,
+  (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2068, (q15_t)0x842c, (q15_t)0x2062, (q15_t)0x842b, (q15_t)0x205c, (q15_t)0x8429,
+  (q15_t)0x2056, (q15_t)0x8427, (q15_t)0x2050, (q15_t)0x8426, (q15_t)0x204a, (q15_t)0x8424, (q15_t)0x2044, (q15_t)0x8423,
+  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2038, (q15_t)0x8420, (q15_t)0x2032, (q15_t)0x841e, (q15_t)0x202b, (q15_t)0x841c,
+  (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x201f, (q15_t)0x8419, (q15_t)0x2019, (q15_t)0x8418, (q15_t)0x2013, (q15_t)0x8416,
+  (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x2007, (q15_t)0x8413, (q15_t)0x2001, (q15_t)0x8411, (q15_t)0x1ffb, (q15_t)0x8410,
+  (q15_t)0x1ff5, (q15_t)0x840e, (q15_t)0x1fef, (q15_t)0x840d, (q15_t)0x1fe9, (q15_t)0x840b, (q15_t)0x1fe2, (q15_t)0x840a,
+  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fd6, (q15_t)0x8406, (q15_t)0x1fd0, (q15_t)0x8405, (q15_t)0x1fca, (q15_t)0x8403,
+  (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fbe, (q15_t)0x8400, (q15_t)0x1fb8, (q15_t)0x83ff, (q15_t)0x1fb2, (q15_t)0x83fd,
+  (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1fa6, (q15_t)0x83fa, (q15_t)0x1f9f, (q15_t)0x83f8, (q15_t)0x1f99, (q15_t)0x83f7,
+  (q15_t)0x1f93, (q15_t)0x83f5, (q15_t)0x1f8d, (q15_t)0x83f4, (q15_t)0x1f87, (q15_t)0x83f2, (q15_t)0x1f81, (q15_t)0x83f1,
+  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f75, (q15_t)0x83ee, (q15_t)0x1f6f, (q15_t)0x83ec, (q15_t)0x1f69, (q15_t)0x83ea,
+  (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f5d, (q15_t)0x83e7, (q15_t)0x1f56, (q15_t)0x83e6, (q15_t)0x1f50, (q15_t)0x83e4,
+  (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f44, (q15_t)0x83e1, (q15_t)0x1f3e, (q15_t)0x83e0, (q15_t)0x1f38, (q15_t)0x83de,
+  (q15_t)0x1f32, (q15_t)0x83dd, (q15_t)0x1f2c, (q15_t)0x83db, (q15_t)0x1f26, (q15_t)0x83da, (q15_t)0x1f20, (q15_t)0x83d8,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f13, (q15_t)0x83d5, (q15_t)0x1f0d, (q15_t)0x83d3, (q15_t)0x1f07, (q15_t)0x83d2,
+  (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1efb, (q15_t)0x83cf, (q15_t)0x1ef5, (q15_t)0x83cd, (q15_t)0x1eef, (q15_t)0x83cc,
+  (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ee3, (q15_t)0x83c9, (q15_t)0x1edd, (q15_t)0x83c7, (q15_t)0x1ed6, (q15_t)0x83c6,
+  (q15_t)0x1ed0, (q15_t)0x83c4, (q15_t)0x1eca, (q15_t)0x83c3, (q15_t)0x1ec4, (q15_t)0x83c1, (q15_t)0x1ebe, (q15_t)0x83c0,
+  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1eb2, (q15_t)0x83bd, (q15_t)0x1eac, (q15_t)0x83bb, (q15_t)0x1ea6, (q15_t)0x83ba,
+  (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e99, (q15_t)0x83b7, (q15_t)0x1e93, (q15_t)0x83b5, (q15_t)0x1e8d, (q15_t)0x83b4,
+  (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e81, (q15_t)0x83b1, (q15_t)0x1e7b, (q15_t)0x83af, (q15_t)0x1e75, (q15_t)0x83ae,
+  (q15_t)0x1e6f, (q15_t)0x83ac, (q15_t)0x1e69, (q15_t)0x83ab, (q15_t)0x1e62, (q15_t)0x83a9, (q15_t)0x1e5c, (q15_t)0x83a8,
+  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e50, (q15_t)0x83a5, (q15_t)0x1e4a, (q15_t)0x83a3, (q15_t)0x1e44, (q15_t)0x83a2,
+  (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e38, (q15_t)0x839f, (q15_t)0x1e32, (q15_t)0x839d, (q15_t)0x1e2c, (q15_t)0x839c,
+  (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e1f, (q15_t)0x8399, (q15_t)0x1e19, (q15_t)0x8397, (q15_t)0x1e13, (q15_t)0x8396,
+  (q15_t)0x1e0d, (q15_t)0x8394, (q15_t)0x1e07, (q15_t)0x8393, (q15_t)0x1e01, (q15_t)0x8392, (q15_t)0x1dfb, (q15_t)0x8390,
+  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1dee, (q15_t)0x838d, (q15_t)0x1de8, (q15_t)0x838c, (q15_t)0x1de2, (q15_t)0x838a,
+  (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dd6, (q15_t)0x8387, (q15_t)0x1dd0, (q15_t)0x8386, (q15_t)0x1dca, (q15_t)0x8384,
+  (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dbe, (q15_t)0x8381, (q15_t)0x1db7, (q15_t)0x8380, (q15_t)0x1db1, (q15_t)0x837e,
+  (q15_t)0x1dab, (q15_t)0x837d, (q15_t)0x1da5, (q15_t)0x837c, (q15_t)0x1d9f, (q15_t)0x837a, (q15_t)0x1d99, (q15_t)0x8379,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d8d, (q15_t)0x8376, (q15_t)0x1d87, (q15_t)0x8374, (q15_t)0x1d80, (q15_t)0x8373,
+  (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d74, (q15_t)0x8370, (q15_t)0x1d6e, (q15_t)0x836f, (q15_t)0x1d68, (q15_t)0x836d,
+  (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d5c, (q15_t)0x836a, (q15_t)0x1d56, (q15_t)0x8369, (q15_t)0x1d50, (q15_t)0x8367,
+  (q15_t)0x1d49, (q15_t)0x8366, (q15_t)0x1d43, (q15_t)0x8364, (q15_t)0x1d3d, (q15_t)0x8363, (q15_t)0x1d37, (q15_t)0x8362,
+  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d2b, (q15_t)0x835f, (q15_t)0x1d25, (q15_t)0x835d, (q15_t)0x1d1f, (q15_t)0x835c,
+  (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d12, (q15_t)0x8359, (q15_t)0x1d0c, (q15_t)0x8358, (q15_t)0x1d06, (q15_t)0x8356,
+  (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1cfa, (q15_t)0x8353, (q15_t)0x1cf4, (q15_t)0x8352, (q15_t)0x1cee, (q15_t)0x8350,
+  (q15_t)0x1ce8, (q15_t)0x834f, (q15_t)0x1ce1, (q15_t)0x834e, (q15_t)0x1cdb, (q15_t)0x834c, (q15_t)0x1cd5, (q15_t)0x834b,
+  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cc9, (q15_t)0x8348, (q15_t)0x1cc3, (q15_t)0x8347, (q15_t)0x1cbd, (q15_t)0x8345,
+  (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1cb0, (q15_t)0x8342, (q15_t)0x1caa, (q15_t)0x8341, (q15_t)0x1ca4, (q15_t)0x833f,
+  (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c98, (q15_t)0x833d, (q15_t)0x1c92, (q15_t)0x833b, (q15_t)0x1c8c, (q15_t)0x833a,
+  (q15_t)0x1c86, (q15_t)0x8338, (q15_t)0x1c7f, (q15_t)0x8337, (q15_t)0x1c79, (q15_t)0x8336, (q15_t)0x1c73, (q15_t)0x8334,
+  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c67, (q15_t)0x8331, (q15_t)0x1c61, (q15_t)0x8330, (q15_t)0x1c5b, (q15_t)0x832f,
+  (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c4e, (q15_t)0x832c, (q15_t)0x1c48, (q15_t)0x832b, (q15_t)0x1c42, (q15_t)0x8329,
+  (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c36, (q15_t)0x8326, (q15_t)0x1c30, (q15_t)0x8325, (q15_t)0x1c2a, (q15_t)0x8324,
+  (q15_t)0x1c24, (q15_t)0x8322, (q15_t)0x1c1d, (q15_t)0x8321, (q15_t)0x1c17, (q15_t)0x831f, (q15_t)0x1c11, (q15_t)0x831e,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1c05, (q15_t)0x831b, (q15_t)0x1bff, (q15_t)0x831a, (q15_t)0x1bf9, (q15_t)0x8319,
+  (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bec, (q15_t)0x8316, (q15_t)0x1be6, (q15_t)0x8314, (q15_t)0x1be0, (q15_t)0x8313,
+  (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bd4, (q15_t)0x8310, (q15_t)0x1bce, (q15_t)0x830f, (q15_t)0x1bc8, (q15_t)0x830e,
+  (q15_t)0x1bc1, (q15_t)0x830c, (q15_t)0x1bbb, (q15_t)0x830b, (q15_t)0x1bb5, (q15_t)0x830a, (q15_t)0x1baf, (q15_t)0x8308,
+  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1ba3, (q15_t)0x8305, (q15_t)0x1b9d, (q15_t)0x8304, (q15_t)0x1b96, (q15_t)0x8303,
+  (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b8a, (q15_t)0x8300, (q15_t)0x1b84, (q15_t)0x82ff, (q15_t)0x1b7e, (q15_t)0x82fd,
+  (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b72, (q15_t)0x82fb, (q15_t)0x1b6c, (q15_t)0x82f9, (q15_t)0x1b65, (q15_t)0x82f8,
+  (q15_t)0x1b5f, (q15_t)0x82f7, (q15_t)0x1b59, (q15_t)0x82f5, (q15_t)0x1b53, (q15_t)0x82f4, (q15_t)0x1b4d, (q15_t)0x82f3,
+  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b41, (q15_t)0x82f0, (q15_t)0x1b3a, (q15_t)0x82ef, (q15_t)0x1b34, (q15_t)0x82ed,
+  (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b28, (q15_t)0x82eb, (q15_t)0x1b22, (q15_t)0x82e9, (q15_t)0x1b1c, (q15_t)0x82e8,
+  (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1b0f, (q15_t)0x82e5, (q15_t)0x1b09, (q15_t)0x82e4, (q15_t)0x1b03, (q15_t)0x82e3,
+  (q15_t)0x1afd, (q15_t)0x82e1, (q15_t)0x1af7, (q15_t)0x82e0, (q15_t)0x1af1, (q15_t)0x82df, (q15_t)0x1aeb, (q15_t)0x82dd,
+  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1ade, (q15_t)0x82db, (q15_t)0x1ad8, (q15_t)0x82d9, (q15_t)0x1ad2, (q15_t)0x82d8,
+  (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ac6, (q15_t)0x82d5, (q15_t)0x1ac0, (q15_t)0x82d4, (q15_t)0x1ab9, (q15_t)0x82d3,
+  (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1aad, (q15_t)0x82d0, (q15_t)0x1aa7, (q15_t)0x82cf, (q15_t)0x1aa1, (q15_t)0x82ce,
+  (q15_t)0x1a9b, (q15_t)0x82cc, (q15_t)0x1a95, (q15_t)0x82cb, (q15_t)0x1a8e, (q15_t)0x82ca, (q15_t)0x1a88, (q15_t)0x82c8,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a7c, (q15_t)0x82c6, (q15_t)0x1a76, (q15_t)0x82c4, (q15_t)0x1a70, (q15_t)0x82c3,
+  (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a63, (q15_t)0x82c1, (q15_t)0x1a5d, (q15_t)0x82bf, (q15_t)0x1a57, (q15_t)0x82be,
+  (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a4b, (q15_t)0x82bb, (q15_t)0x1a45, (q15_t)0x82ba, (q15_t)0x1a3e, (q15_t)0x82b9,
+  (q15_t)0x1a38, (q15_t)0x82b7, (q15_t)0x1a32, (q15_t)0x82b6, (q15_t)0x1a2c, (q15_t)0x82b5, (q15_t)0x1a26, (q15_t)0x82b4,
+  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a1a, (q15_t)0x82b1, (q15_t)0x1a13, (q15_t)0x82b0, (q15_t)0x1a0d, (q15_t)0x82ae,
+  (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x1a01, (q15_t)0x82ac, (q15_t)0x19fb, (q15_t)0x82ab, (q15_t)0x19f5, (q15_t)0x82a9,
+  (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19e8, (q15_t)0x82a7, (q15_t)0x19e2, (q15_t)0x82a6, (q15_t)0x19dc, (q15_t)0x82a4,
+  (q15_t)0x19d6, (q15_t)0x82a3, (q15_t)0x19d0, (q15_t)0x82a2, (q15_t)0x19ca, (q15_t)0x82a0, (q15_t)0x19c3, (q15_t)0x829f,
+  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19b7, (q15_t)0x829d, (q15_t)0x19b1, (q15_t)0x829b, (q15_t)0x19ab, (q15_t)0x829a,
+  (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x199f, (q15_t)0x8298, (q15_t)0x1998, (q15_t)0x8296, (q15_t)0x1992, (q15_t)0x8295,
+  (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1986, (q15_t)0x8293, (q15_t)0x1980, (q15_t)0x8291, (q15_t)0x197a, (q15_t)0x8290,
+  (q15_t)0x1973, (q15_t)0x828f, (q15_t)0x196d, (q15_t)0x828e, (q15_t)0x1967, (q15_t)0x828c, (q15_t)0x1961, (q15_t)0x828b,
+  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1955, (q15_t)0x8289, (q15_t)0x194e, (q15_t)0x8287, (q15_t)0x1948, (q15_t)0x8286,
+  (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x193c, (q15_t)0x8284, (q15_t)0x1936, (q15_t)0x8282, (q15_t)0x1930, (q15_t)0x8281,
+  (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1923, (q15_t)0x827f, (q15_t)0x191d, (q15_t)0x827e, (q15_t)0x1917, (q15_t)0x827c,
+  (q15_t)0x1911, (q15_t)0x827b, (q15_t)0x190b, (q15_t)0x827a, (q15_t)0x1905, (q15_t)0x8279, (q15_t)0x18fe, (q15_t)0x8277,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18f2, (q15_t)0x8275, (q15_t)0x18ec, (q15_t)0x8274, (q15_t)0x18e6, (q15_t)0x8272,
+  (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18d9, (q15_t)0x8270, (q15_t)0x18d3, (q15_t)0x826f, (q15_t)0x18cd, (q15_t)0x826e,
+  (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18c1, (q15_t)0x826b, (q15_t)0x18bb, (q15_t)0x826a, (q15_t)0x18b4, (q15_t)0x8269,
+  (q15_t)0x18ae, (q15_t)0x8268, (q15_t)0x18a8, (q15_t)0x8266, (q15_t)0x18a2, (q15_t)0x8265, (q15_t)0x189c, (q15_t)0x8264,
+  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x188f, (q15_t)0x8261, (q15_t)0x1889, (q15_t)0x8260, (q15_t)0x1883, (q15_t)0x825f,
+  (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1877, (q15_t)0x825d, (q15_t)0x1871, (q15_t)0x825b, (q15_t)0x186a, (q15_t)0x825a,
+  (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x185e, (q15_t)0x8258, (q15_t)0x1858, (q15_t)0x8257, (q15_t)0x1852, (q15_t)0x8255,
+  (q15_t)0x184c, (q15_t)0x8254, (q15_t)0x1845, (q15_t)0x8253, (q15_t)0x183f, (q15_t)0x8252, (q15_t)0x1839, (q15_t)0x8251,
+  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x182d, (q15_t)0x824e, (q15_t)0x1827, (q15_t)0x824d, (q15_t)0x1820, (q15_t)0x824c,
+  (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1814, (q15_t)0x824a, (q15_t)0x180e, (q15_t)0x8248, (q15_t)0x1808, (q15_t)0x8247,
+  (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17fb, (q15_t)0x8245, (q15_t)0x17f5, (q15_t)0x8244, (q15_t)0x17ef, (q15_t)0x8243,
+  (q15_t)0x17e9, (q15_t)0x8241, (q15_t)0x17e3, (q15_t)0x8240, (q15_t)0x17dd, (q15_t)0x823f, (q15_t)0x17d6, (q15_t)0x823e,
+  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17ca, (q15_t)0x823b, (q15_t)0x17c4, (q15_t)0x823a, (q15_t)0x17be, (q15_t)0x8239,
+  (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x17b1, (q15_t)0x8237, (q15_t)0x17ab, (q15_t)0x8236, (q15_t)0x17a5, (q15_t)0x8234,
+  (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1799, (q15_t)0x8232, (q15_t)0x1792, (q15_t)0x8231, (q15_t)0x178c, (q15_t)0x8230,
+  (q15_t)0x1786, (q15_t)0x822f, (q15_t)0x1780, (q15_t)0x822e, (q15_t)0x177a, (q15_t)0x822c, (q15_t)0x1774, (q15_t)0x822b,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1767, (q15_t)0x8229, (q15_t)0x1761, (q15_t)0x8228, (q15_t)0x175b, (q15_t)0x8227,
+  (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x174e, (q15_t)0x8224, (q15_t)0x1748, (q15_t)0x8223, (q15_t)0x1742, (q15_t)0x8222,
+  (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1736, (q15_t)0x8220, (q15_t)0x1730, (q15_t)0x821f, (q15_t)0x1729, (q15_t)0x821e,
+  (q15_t)0x1723, (q15_t)0x821c, (q15_t)0x171d, (q15_t)0x821b, (q15_t)0x1717, (q15_t)0x821a, (q15_t)0x1711, (q15_t)0x8219,
+  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x1704, (q15_t)0x8217, (q15_t)0x16fe, (q15_t)0x8216, (q15_t)0x16f8, (q15_t)0x8214,
+  (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16ec, (q15_t)0x8212, (q15_t)0x16e5, (q15_t)0x8211, (q15_t)0x16df, (q15_t)0x8210,
+  (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16d3, (q15_t)0x820e, (q15_t)0x16cd, (q15_t)0x820d, (q15_t)0x16c6, (q15_t)0x820b,
+  (q15_t)0x16c0, (q15_t)0x820a, (q15_t)0x16ba, (q15_t)0x8209, (q15_t)0x16b4, (q15_t)0x8208, (q15_t)0x16ae, (q15_t)0x8207,
+  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x16a1, (q15_t)0x8205, (q15_t)0x169b, (q15_t)0x8204, (q15_t)0x1695, (q15_t)0x8203,
+  (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1689, (q15_t)0x8200, (q15_t)0x1682, (q15_t)0x81ff, (q15_t)0x167c, (q15_t)0x81fe,
+  (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x1670, (q15_t)0x81fc, (q15_t)0x166a, (q15_t)0x81fb, (q15_t)0x1664, (q15_t)0x81fa,
+  (q15_t)0x165d, (q15_t)0x81f9, (q15_t)0x1657, (q15_t)0x81f8, (q15_t)0x1651, (q15_t)0x81f6, (q15_t)0x164b, (q15_t)0x81f5,
+  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x163e, (q15_t)0x81f3, (q15_t)0x1638, (q15_t)0x81f2, (q15_t)0x1632, (q15_t)0x81f1,
+  (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1626, (q15_t)0x81ef, (q15_t)0x161f, (q15_t)0x81ee, (q15_t)0x1619, (q15_t)0x81ed,
+  (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x160d, (q15_t)0x81ea, (q15_t)0x1607, (q15_t)0x81e9, (q15_t)0x1601, (q15_t)0x81e8,
+  (q15_t)0x15fa, (q15_t)0x81e7, (q15_t)0x15f4, (q15_t)0x81e6, (q15_t)0x15ee, (q15_t)0x81e5, (q15_t)0x15e8, (q15_t)0x81e4,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15db, (q15_t)0x81e2, (q15_t)0x15d5, (q15_t)0x81e1, (q15_t)0x15cf, (q15_t)0x81e0,
+  (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15c3, (q15_t)0x81de, (q15_t)0x15bc, (q15_t)0x81dc, (q15_t)0x15b6, (q15_t)0x81db,
+  (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x15aa, (q15_t)0x81d9, (q15_t)0x15a4, (q15_t)0x81d8, (q15_t)0x159d, (q15_t)0x81d7,
+  (q15_t)0x1597, (q15_t)0x81d6, (q15_t)0x1591, (q15_t)0x81d5, (q15_t)0x158b, (q15_t)0x81d4, (q15_t)0x1585, (q15_t)0x81d3,
+  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1578, (q15_t)0x81d1, (q15_t)0x1572, (q15_t)0x81d0, (q15_t)0x156c, (q15_t)0x81cf,
+  (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x1560, (q15_t)0x81cd, (q15_t)0x1559, (q15_t)0x81cc, (q15_t)0x1553, (q15_t)0x81cb,
+  (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1547, (q15_t)0x81c8, (q15_t)0x1541, (q15_t)0x81c7, (q15_t)0x153a, (q15_t)0x81c6,
+  (q15_t)0x1534, (q15_t)0x81c5, (q15_t)0x152e, (q15_t)0x81c4, (q15_t)0x1528, (q15_t)0x81c3, (q15_t)0x1522, (q15_t)0x81c2,
+  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1515, (q15_t)0x81c0, (q15_t)0x150f, (q15_t)0x81bf, (q15_t)0x1509, (q15_t)0x81be,
+  (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14fc, (q15_t)0x81bc, (q15_t)0x14f6, (q15_t)0x81bb, (q15_t)0x14f0, (q15_t)0x81ba,
+  (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14e4, (q15_t)0x81b8, (q15_t)0x14dd, (q15_t)0x81b7, (q15_t)0x14d7, (q15_t)0x81b6,
+  (q15_t)0x14d1, (q15_t)0x81b5, (q15_t)0x14cb, (q15_t)0x81b4, (q15_t)0x14c5, (q15_t)0x81b3, (q15_t)0x14be, (q15_t)0x81b2,
+  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x14b2, (q15_t)0x81b0, (q15_t)0x14ac, (q15_t)0x81af, (q15_t)0x14a6, (q15_t)0x81ae,
+  (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1499, (q15_t)0x81ac, (q15_t)0x1493, (q15_t)0x81ab, (q15_t)0x148d, (q15_t)0x81aa,
+  (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x1480, (q15_t)0x81a8, (q15_t)0x147a, (q15_t)0x81a7, (q15_t)0x1474, (q15_t)0x81a6,
+  (q15_t)0x146e, (q15_t)0x81a5, (q15_t)0x1468, (q15_t)0x81a4, (q15_t)0x1461, (q15_t)0x81a3, (q15_t)0x145b, (q15_t)0x81a2,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x144f, (q15_t)0x81a0, (q15_t)0x1449, (q15_t)0x819f, (q15_t)0x1442, (q15_t)0x819e,
+  (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1436, (q15_t)0x819c, (q15_t)0x1430, (q15_t)0x819b, (q15_t)0x142a, (q15_t)0x819a,
+  (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x141d, (q15_t)0x8198, (q15_t)0x1417, (q15_t)0x8197, (q15_t)0x1411, (q15_t)0x8196,
+  (q15_t)0x140b, (q15_t)0x8195, (q15_t)0x1404, (q15_t)0x8194, (q15_t)0x13fe, (q15_t)0x8193, (q15_t)0x13f8, (q15_t)0x8192,
+  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13eb, (q15_t)0x8190, (q15_t)0x13e5, (q15_t)0x818f, (q15_t)0x13df, (q15_t)0x818e,
+  (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13d3, (q15_t)0x818c, (q15_t)0x13cc, (q15_t)0x818b, (q15_t)0x13c6, (q15_t)0x818a,
+  (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13ba, (q15_t)0x8188, (q15_t)0x13b4, (q15_t)0x8187, (q15_t)0x13ad, (q15_t)0x8186,
+  (q15_t)0x13a7, (q15_t)0x8185, (q15_t)0x13a1, (q15_t)0x8184, (q15_t)0x139b, (q15_t)0x8183, (q15_t)0x1395, (q15_t)0x8182,
+  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1388, (q15_t)0x8180, (q15_t)0x1382, (q15_t)0x817f, (q15_t)0x137c, (q15_t)0x817e,
+  (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x136f, (q15_t)0x817c, (q15_t)0x1369, (q15_t)0x817c, (q15_t)0x1363, (q15_t)0x817b,
+  (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1356, (q15_t)0x8179, (q15_t)0x1350, (q15_t)0x8178, (q15_t)0x134a, (q15_t)0x8177,
+  (q15_t)0x1344, (q15_t)0x8176, (q15_t)0x133e, (q15_t)0x8175, (q15_t)0x1337, (q15_t)0x8174, (q15_t)0x1331, (q15_t)0x8173,
+  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1325, (q15_t)0x8171, (q15_t)0x131f, (q15_t)0x8170, (q15_t)0x1318, (q15_t)0x816f,
+  (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x130c, (q15_t)0x816d, (q15_t)0x1306, (q15_t)0x816c, (q15_t)0x12ff, (q15_t)0x816c,
+  (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12f3, (q15_t)0x816a, (q15_t)0x12ed, (q15_t)0x8169, (q15_t)0x12e7, (q15_t)0x8168,
+  (q15_t)0x12e0, (q15_t)0x8167, (q15_t)0x12da, (q15_t)0x8166, (q15_t)0x12d4, (q15_t)0x8165, (q15_t)0x12ce, (q15_t)0x8164,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12c1, (q15_t)0x8162, (q15_t)0x12bb, (q15_t)0x8161, (q15_t)0x12b5, (q15_t)0x8160,
+  (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x12a8, (q15_t)0x815f, (q15_t)0x12a2, (q15_t)0x815e, (q15_t)0x129c, (q15_t)0x815d,
+  (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x1290, (q15_t)0x815b, (q15_t)0x1289, (q15_t)0x815a, (q15_t)0x1283, (q15_t)0x8159,
+  (q15_t)0x127d, (q15_t)0x8158, (q15_t)0x1277, (q15_t)0x8157, (q15_t)0x1271, (q15_t)0x8156, (q15_t)0x126a, (q15_t)0x8155,
+  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x125e, (q15_t)0x8154, (q15_t)0x1258, (q15_t)0x8153, (q15_t)0x1251, (q15_t)0x8152,
+  (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1245, (q15_t)0x8150, (q15_t)0x123f, (q15_t)0x814f, (q15_t)0x1239, (q15_t)0x814e,
+  (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x122c, (q15_t)0x814c, (q15_t)0x1226, (q15_t)0x814c, (q15_t)0x1220, (q15_t)0x814b,
+  (q15_t)0x1219, (q15_t)0x814a, (q15_t)0x1213, (q15_t)0x8149, (q15_t)0x120d, (q15_t)0x8148, (q15_t)0x1207, (q15_t)0x8147,
+  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11fa, (q15_t)0x8145, (q15_t)0x11f4, (q15_t)0x8145, (q15_t)0x11ee, (q15_t)0x8144,
+  (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11e1, (q15_t)0x8142, (q15_t)0x11db, (q15_t)0x8141, (q15_t)0x11d5, (q15_t)0x8140,
+  (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11c9, (q15_t)0x813e, (q15_t)0x11c2, (q15_t)0x813d, (q15_t)0x11bc, (q15_t)0x813d,
+  (q15_t)0x11b6, (q15_t)0x813c, (q15_t)0x11b0, (q15_t)0x813b, (q15_t)0x11a9, (q15_t)0x813a, (q15_t)0x11a3, (q15_t)0x8139,
+  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1197, (q15_t)0x8137, (q15_t)0x1191, (q15_t)0x8137, (q15_t)0x118a, (q15_t)0x8136,
+  (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x117e, (q15_t)0x8134, (q15_t)0x1178, (q15_t)0x8133, (q15_t)0x1171, (q15_t)0x8132,
+  (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1165, (q15_t)0x8131, (q15_t)0x115f, (q15_t)0x8130, (q15_t)0x1159, (q15_t)0x812f,
+  (q15_t)0x1152, (q15_t)0x812e, (q15_t)0x114c, (q15_t)0x812d, (q15_t)0x1146, (q15_t)0x812c, (q15_t)0x1140, (q15_t)0x812b,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1133, (q15_t)0x812a, (q15_t)0x112d, (q15_t)0x8129, (q15_t)0x1127, (q15_t)0x8128,
+  (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x111a, (q15_t)0x8126, (q15_t)0x1114, (q15_t)0x8126, (q15_t)0x110e, (q15_t)0x8125,
+  (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x1101, (q15_t)0x8123, (q15_t)0x10fb, (q15_t)0x8122, (q15_t)0x10f5, (q15_t)0x8121,
+  (q15_t)0x10ef, (q15_t)0x8121, (q15_t)0x10e8, (q15_t)0x8120, (q15_t)0x10e2, (q15_t)0x811f, (q15_t)0x10dc, (q15_t)0x811e,
+  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10d0, (q15_t)0x811c, (q15_t)0x10c9, (q15_t)0x811c, (q15_t)0x10c3, (q15_t)0x811b,
+  (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10b7, (q15_t)0x8119, (q15_t)0x10b0, (q15_t)0x8118, (q15_t)0x10aa, (q15_t)0x8117,
+  (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x109e, (q15_t)0x8116, (q15_t)0x1098, (q15_t)0x8115, (q15_t)0x1091, (q15_t)0x8114,
+  (q15_t)0x108b, (q15_t)0x8113, (q15_t)0x1085, (q15_t)0x8113, (q15_t)0x107f, (q15_t)0x8112, (q15_t)0x1078, (q15_t)0x8111,
+  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x106c, (q15_t)0x810f, (q15_t)0x1066, (q15_t)0x810f, (q15_t)0x105f, (q15_t)0x810e,
+  (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1053, (q15_t)0x810c, (q15_t)0x104d, (q15_t)0x810b, (q15_t)0x1047, (q15_t)0x810b,
+  (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x103a, (q15_t)0x8109, (q15_t)0x1034, (q15_t)0x8108, (q15_t)0x102e, (q15_t)0x8107,
+  (q15_t)0x1027, (q15_t)0x8107, (q15_t)0x1021, (q15_t)0x8106, (q15_t)0x101b, (q15_t)0x8105, (q15_t)0x1015, (q15_t)0x8104,
+  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0x1008, (q15_t)0x8103, (q15_t)0x1002, (q15_t)0x8102, (q15_t)0xffc, (q15_t)0x8101,
+  (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfef, (q15_t)0x80ff, (q15_t)0xfe9, (q15_t)0x80ff, (q15_t)0xfe3, (q15_t)0x80fe,
+  (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfd6, (q15_t)0x80fc, (q15_t)0xfd0, (q15_t)0x80fc, (q15_t)0xfca, (q15_t)0x80fb,
+  (q15_t)0xfc4, (q15_t)0x80fa, (q15_t)0xfbd, (q15_t)0x80f9, (q15_t)0xfb7, (q15_t)0x80f8, (q15_t)0xfb1, (q15_t)0x80f8,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xfa4, (q15_t)0x80f6, (q15_t)0xf9e, (q15_t)0x80f5, (q15_t)0xf98, (q15_t)0x80f5,
+  (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf8b, (q15_t)0x80f3, (q15_t)0xf85, (q15_t)0x80f2, (q15_t)0xf7f, (q15_t)0x80f2,
+  (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf73, (q15_t)0x80f0, (q15_t)0xf6c, (q15_t)0x80ef, (q15_t)0xf66, (q15_t)0x80ef,
+  (q15_t)0xf60, (q15_t)0x80ee, (q15_t)0xf5a, (q15_t)0x80ed, (q15_t)0xf53, (q15_t)0x80ec, (q15_t)0xf4d, (q15_t)0x80ec,
+  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf41, (q15_t)0x80ea, (q15_t)0xf3a, (q15_t)0x80e9, (q15_t)0xf34, (q15_t)0x80e9,
+  (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf28, (q15_t)0x80e7, (q15_t)0xf21, (q15_t)0x80e6, (q15_t)0xf1b, (q15_t)0x80e6,
+  (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xf0f, (q15_t)0x80e4, (q15_t)0xf08, (q15_t)0x80e3, (q15_t)0xf02, (q15_t)0x80e3,
+  (q15_t)0xefc, (q15_t)0x80e2, (q15_t)0xef6, (q15_t)0x80e1, (q15_t)0xef0, (q15_t)0x80e0, (q15_t)0xee9, (q15_t)0x80e0,
+  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xedd, (q15_t)0x80de, (q15_t)0xed7, (q15_t)0x80dd, (q15_t)0xed0, (q15_t)0x80dd,
+  (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xec4, (q15_t)0x80db, (q15_t)0xebe, (q15_t)0x80db, (q15_t)0xeb7, (q15_t)0x80da,
+  (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xeab, (q15_t)0x80d8, (q15_t)0xea5, (q15_t)0x80d8, (q15_t)0xe9e, (q15_t)0x80d7,
+  (q15_t)0xe98, (q15_t)0x80d6, (q15_t)0xe92, (q15_t)0x80d6, (q15_t)0xe8c, (q15_t)0x80d5, (q15_t)0xe85, (q15_t)0x80d4,
+  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe79, (q15_t)0x80d3, (q15_t)0xe73, (q15_t)0x80d2, (q15_t)0xe6c, (q15_t)0x80d1,
+  (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe60, (q15_t)0x80d0, (q15_t)0xe5a, (q15_t)0x80cf, (q15_t)0xe53, (q15_t)0x80ce,
+  (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe47, (q15_t)0x80cd, (q15_t)0xe41, (q15_t)0x80cc, (q15_t)0xe3a, (q15_t)0x80cc,
+  (q15_t)0xe34, (q15_t)0x80cb, (q15_t)0xe2e, (q15_t)0x80ca, (q15_t)0xe28, (q15_t)0x80ca, (q15_t)0xe22, (q15_t)0x80c9,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe15, (q15_t)0x80c7, (q15_t)0xe0f, (q15_t)0x80c7, (q15_t)0xe09, (q15_t)0x80c6,
+  (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xdfc, (q15_t)0x80c5, (q15_t)0xdf6, (q15_t)0x80c4, (q15_t)0xdf0, (q15_t)0x80c3,
+  (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xde3, (q15_t)0x80c2, (q15_t)0xddd, (q15_t)0x80c1, (q15_t)0xdd7, (q15_t)0x80c1,
+  (q15_t)0xdd0, (q15_t)0x80c0, (q15_t)0xdca, (q15_t)0x80bf, (q15_t)0xdc4, (q15_t)0x80bf, (q15_t)0xdbe, (q15_t)0x80be,
+  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xdb1, (q15_t)0x80bd, (q15_t)0xdab, (q15_t)0x80bc, (q15_t)0xda5, (q15_t)0x80bb,
+  (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd98, (q15_t)0x80ba, (q15_t)0xd92, (q15_t)0x80b9, (q15_t)0xd8c, (q15_t)0x80b9,
+  (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd7f, (q15_t)0x80b7, (q15_t)0xd79, (q15_t)0x80b7, (q15_t)0xd73, (q15_t)0x80b6,
+  (q15_t)0xd6c, (q15_t)0x80b5, (q15_t)0xd66, (q15_t)0x80b5, (q15_t)0xd60, (q15_t)0x80b4, (q15_t)0xd5a, (q15_t)0x80b3,
+  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd4d, (q15_t)0x80b2, (q15_t)0xd47, (q15_t)0x80b1, (q15_t)0xd41, (q15_t)0x80b1,
+  (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd34, (q15_t)0x80af, (q15_t)0xd2e, (q15_t)0x80af, (q15_t)0xd28, (q15_t)0x80ae,
+  (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd1b, (q15_t)0x80ad, (q15_t)0xd15, (q15_t)0x80ac, (q15_t)0xd0f, (q15_t)0x80ab,
+  (q15_t)0xd08, (q15_t)0x80ab, (q15_t)0xd02, (q15_t)0x80aa, (q15_t)0xcfc, (q15_t)0x80aa, (q15_t)0xcf6, (q15_t)0x80a9,
+  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xce9, (q15_t)0x80a8, (q15_t)0xce3, (q15_t)0x80a7, (q15_t)0xcdd, (q15_t)0x80a6,
+  (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcd0, (q15_t)0x80a5, (q15_t)0xcca, (q15_t)0x80a5, (q15_t)0xcc4, (q15_t)0x80a4,
+  (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xcb7, (q15_t)0x80a3, (q15_t)0xcb1, (q15_t)0x80a2, (q15_t)0xcab, (q15_t)0x80a1,
+  (q15_t)0xca4, (q15_t)0x80a1, (q15_t)0xc9e, (q15_t)0x80a0, (q15_t)0xc98, (q15_t)0x80a0, (q15_t)0xc92, (q15_t)0x809f,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc85, (q15_t)0x809e, (q15_t)0xc7f, (q15_t)0x809d, (q15_t)0xc79, (q15_t)0x809c,
+  (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc6c, (q15_t)0x809b, (q15_t)0xc66, (q15_t)0x809b, (q15_t)0xc60, (q15_t)0x809a,
+  (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc53, (q15_t)0x8099, (q15_t)0xc4d, (q15_t)0x8098, (q15_t)0xc47, (q15_t)0x8098,
+  (q15_t)0xc40, (q15_t)0x8097, (q15_t)0xc3a, (q15_t)0x8096, (q15_t)0xc34, (q15_t)0x8096, (q15_t)0xc2e, (q15_t)0x8095,
+  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc21, (q15_t)0x8094, (q15_t)0xc1b, (q15_t)0x8093, (q15_t)0xc14, (q15_t)0x8093,
+  (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xc08, (q15_t)0x8092, (q15_t)0xc02, (q15_t)0x8091, (q15_t)0xbfb, (q15_t)0x8090,
+  (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbef, (q15_t)0x808f, (q15_t)0xbe9, (q15_t)0x808f, (q15_t)0xbe2, (q15_t)0x808e,
+  (q15_t)0xbdc, (q15_t)0x808e, (q15_t)0xbd6, (q15_t)0x808d, (q15_t)0xbd0, (q15_t)0x808c, (q15_t)0xbc9, (q15_t)0x808c,
+  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbbd, (q15_t)0x808b, (q15_t)0xbb7, (q15_t)0x808a, (q15_t)0xbb0, (q15_t)0x8089,
+  (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xba4, (q15_t)0x8088, (q15_t)0xb9e, (q15_t)0x8088, (q15_t)0xb97, (q15_t)0x8087,
+  (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb8b, (q15_t)0x8086, (q15_t)0xb85, (q15_t)0x8085, (q15_t)0xb7e, (q15_t)0x8085,
+  (q15_t)0xb78, (q15_t)0x8084, (q15_t)0xb72, (q15_t)0x8084, (q15_t)0xb6c, (q15_t)0x8083, (q15_t)0xb65, (q15_t)0x8083,
+  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb59, (q15_t)0x8082, (q15_t)0xb53, (q15_t)0x8081, (q15_t)0xb4c, (q15_t)0x8080,
+  (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb40, (q15_t)0x807f, (q15_t)0xb3a, (q15_t)0x807f, (q15_t)0xb33, (q15_t)0x807e,
+  (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb27, (q15_t)0x807d, (q15_t)0xb20, (q15_t)0x807d, (q15_t)0xb1a, (q15_t)0x807c,
+  (q15_t)0xb14, (q15_t)0x807b, (q15_t)0xb0e, (q15_t)0x807b, (q15_t)0xb07, (q15_t)0x807a, (q15_t)0xb01, (q15_t)0x807a,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xaf5, (q15_t)0x8079, (q15_t)0xaee, (q15_t)0x8078, (q15_t)0xae8, (q15_t)0x8078,
+  (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xadc, (q15_t)0x8077, (q15_t)0xad5, (q15_t)0x8076, (q15_t)0xacf, (q15_t)0x8076,
+  (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xac3, (q15_t)0x8075, (q15_t)0xabc, (q15_t)0x8074, (q15_t)0xab6, (q15_t)0x8073,
+  (q15_t)0xab0, (q15_t)0x8073, (q15_t)0xaaa, (q15_t)0x8072, (q15_t)0xaa3, (q15_t)0x8072, (q15_t)0xa9d, (q15_t)0x8071,
+  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa90, (q15_t)0x8070, (q15_t)0xa8a, (q15_t)0x8070, (q15_t)0xa84, (q15_t)0x806f,
+  (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa77, (q15_t)0x806e, (q15_t)0xa71, (q15_t)0x806e, (q15_t)0xa6b, (q15_t)0x806d,
+  (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa5e, (q15_t)0x806c, (q15_t)0xa58, (q15_t)0x806c, (q15_t)0xa52, (q15_t)0x806b,
+  (q15_t)0xa4c, (q15_t)0x806b, (q15_t)0xa45, (q15_t)0x806a, (q15_t)0xa3f, (q15_t)0x806a, (q15_t)0xa39, (q15_t)0x8069,
+  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa2c, (q15_t)0x8068, (q15_t)0xa26, (q15_t)0x8068, (q15_t)0xa20, (q15_t)0x8067,
+  (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa13, (q15_t)0x8066, (q15_t)0xa0d, (q15_t)0x8066, (q15_t)0xa07, (q15_t)0x8065,
+  (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9fa, (q15_t)0x8064, (q15_t)0x9f4, (q15_t)0x8064, (q15_t)0x9ee, (q15_t)0x8063,
+  (q15_t)0x9e7, (q15_t)0x8063, (q15_t)0x9e1, (q15_t)0x8062, (q15_t)0x9db, (q15_t)0x8062, (q15_t)0x9d5, (q15_t)0x8061,
+  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9c8, (q15_t)0x8060, (q15_t)0x9c2, (q15_t)0x8060, (q15_t)0x9bc, (q15_t)0x805f,
+  (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x9af, (q15_t)0x805e, (q15_t)0x9a9, (q15_t)0x805e, (q15_t)0x9a2, (q15_t)0x805d,
+  (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x996, (q15_t)0x805d, (q15_t)0x990, (q15_t)0x805c, (q15_t)0x989, (q15_t)0x805c,
+  (q15_t)0x983, (q15_t)0x805b, (q15_t)0x97d, (q15_t)0x805b, (q15_t)0x977, (q15_t)0x805a, (q15_t)0x970, (q15_t)0x805a,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x964, (q15_t)0x8059, (q15_t)0x95e, (q15_t)0x8058, (q15_t)0x957, (q15_t)0x8058,
+  (q15_t)0x951, (q15_t)0x8057, (q15_t)0x94b, (q15_t)0x8057, (q15_t)0x944, (q15_t)0x8057, (q15_t)0x93e, (q15_t)0x8056,
+  (q15_t)0x938, (q15_t)0x8056, (q15_t)0x932, (q15_t)0x8055, (q15_t)0x92b, (q15_t)0x8055, (q15_t)0x925, (q15_t)0x8054,
+  (q15_t)0x91f, (q15_t)0x8054, (q15_t)0x919, (q15_t)0x8053, (q15_t)0x912, (q15_t)0x8053, (q15_t)0x90c, (q15_t)0x8052,
+  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x900, (q15_t)0x8052, (q15_t)0x8f9, (q15_t)0x8051, (q15_t)0x8f3, (q15_t)0x8051,
+  (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8e6, (q15_t)0x8050, (q15_t)0x8e0, (q15_t)0x804f, (q15_t)0x8da, (q15_t)0x804f,
+  (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8cd, (q15_t)0x804e, (q15_t)0x8c7, (q15_t)0x804e, (q15_t)0x8c1, (q15_t)0x804d,
+  (q15_t)0x8bb, (q15_t)0x804d, (q15_t)0x8b4, (q15_t)0x804c, (q15_t)0x8ae, (q15_t)0x804c, (q15_t)0x8a8, (q15_t)0x804c,
+  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x89b, (q15_t)0x804b, (q15_t)0x895, (q15_t)0x804a, (q15_t)0x88f, (q15_t)0x804a,
+  (q15_t)0x888, (q15_t)0x8049, (q15_t)0x882, (q15_t)0x8049, (q15_t)0x87c, (q15_t)0x8049, (q15_t)0x876, (q15_t)0x8048,
+  (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x869, (q15_t)0x8047, (q15_t)0x863, (q15_t)0x8047, (q15_t)0x85d, (q15_t)0x8047,
+  (q15_t)0x856, (q15_t)0x8046, (q15_t)0x850, (q15_t)0x8046, (q15_t)0x84a, (q15_t)0x8045, (q15_t)0x843, (q15_t)0x8045,
+  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x837, (q15_t)0x8044, (q15_t)0x831, (q15_t)0x8044, (q15_t)0x82a, (q15_t)0x8043,
+  (q15_t)0x824, (q15_t)0x8043, (q15_t)0x81e, (q15_t)0x8042, (q15_t)0x818, (q15_t)0x8042, (q15_t)0x811, (q15_t)0x8042,
+  (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x805, (q15_t)0x8041, (q15_t)0x7fe, (q15_t)0x8040, (q15_t)0x7f8, (q15_t)0x8040,
+  (q15_t)0x7f2, (q15_t)0x8040, (q15_t)0x7ec, (q15_t)0x803f, (q15_t)0x7e5, (q15_t)0x803f, (q15_t)0x7df, (q15_t)0x803f,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7d3, (q15_t)0x803e, (q15_t)0x7cc, (q15_t)0x803d, (q15_t)0x7c6, (q15_t)0x803d,
+  (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7ba, (q15_t)0x803c, (q15_t)0x7b3, (q15_t)0x803c, (q15_t)0x7ad, (q15_t)0x803b,
+  (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x7a0, (q15_t)0x803b, (q15_t)0x79a, (q15_t)0x803a, (q15_t)0x794, (q15_t)0x803a,
+  (q15_t)0x78e, (q15_t)0x803a, (q15_t)0x787, (q15_t)0x8039, (q15_t)0x781, (q15_t)0x8039, (q15_t)0x77b, (q15_t)0x8039,
+  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x76e, (q15_t)0x8038, (q15_t)0x768, (q15_t)0x8037, (q15_t)0x762, (q15_t)0x8037,
+  (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x755, (q15_t)0x8036, (q15_t)0x74f, (q15_t)0x8036, (q15_t)0x749, (q15_t)0x8036,
+  (q15_t)0x742, (q15_t)0x8035, (q15_t)0x73c, (q15_t)0x8035, (q15_t)0x736, (q15_t)0x8035, (q15_t)0x730, (q15_t)0x8034,
+  (q15_t)0x729, (q15_t)0x8034, (q15_t)0x723, (q15_t)0x8033, (q15_t)0x71d, (q15_t)0x8033, (q15_t)0x716, (q15_t)0x8033,
+  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x70a, (q15_t)0x8032, (q15_t)0x704, (q15_t)0x8032, (q15_t)0x6fd, (q15_t)0x8031,
+  (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6f1, (q15_t)0x8031, (q15_t)0x6ea, (q15_t)0x8030, (q15_t)0x6e4, (q15_t)0x8030,
+  (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6d8, (q15_t)0x802f, (q15_t)0x6d1, (q15_t)0x802f, (q15_t)0x6cb, (q15_t)0x802f,
+  (q15_t)0x6c5, (q15_t)0x802e, (q15_t)0x6bf, (q15_t)0x802e, (q15_t)0x6b8, (q15_t)0x802e, (q15_t)0x6b2, (q15_t)0x802d,
+  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x6a5, (q15_t)0x802d, (q15_t)0x69f, (q15_t)0x802c, (q15_t)0x699, (q15_t)0x802c,
+  (q15_t)0x693, (q15_t)0x802c, (q15_t)0x68c, (q15_t)0x802b, (q15_t)0x686, (q15_t)0x802b, (q15_t)0x680, (q15_t)0x802b,
+  (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x673, (q15_t)0x802a, (q15_t)0x66d, (q15_t)0x802a, (q15_t)0x667, (q15_t)0x802a,
+  (q15_t)0x660, (q15_t)0x8029, (q15_t)0x65a, (q15_t)0x8029, (q15_t)0x654, (q15_t)0x8029, (q15_t)0x64e, (q15_t)0x8028,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x641, (q15_t)0x8028, (q15_t)0x63b, (q15_t)0x8027, (q15_t)0x635, (q15_t)0x8027,
+  (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x628, (q15_t)0x8026, (q15_t)0x622, (q15_t)0x8026, (q15_t)0x61b, (q15_t)0x8026,
+  (q15_t)0x615, (q15_t)0x8026, (q15_t)0x60f, (q15_t)0x8025, (q15_t)0x609, (q15_t)0x8025, (q15_t)0x602, (q15_t)0x8025,
+  (q15_t)0x5fc, (q15_t)0x8024, (q15_t)0x5f6, (q15_t)0x8024, (q15_t)0x5ef, (q15_t)0x8024, (q15_t)0x5e9, (q15_t)0x8023,
+  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5dd, (q15_t)0x8023, (q15_t)0x5d6, (q15_t)0x8023, (q15_t)0x5d0, (q15_t)0x8022,
+  (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5c4, (q15_t)0x8022, (q15_t)0x5bd, (q15_t)0x8021, (q15_t)0x5b7, (q15_t)0x8021,
+  (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x5aa, (q15_t)0x8021, (q15_t)0x5a4, (q15_t)0x8020, (q15_t)0x59e, (q15_t)0x8020,
+  (q15_t)0x598, (q15_t)0x8020, (q15_t)0x591, (q15_t)0x8020, (q15_t)0x58b, (q15_t)0x801f, (q15_t)0x585, (q15_t)0x801f,
+  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x578, (q15_t)0x801e, (q15_t)0x572, (q15_t)0x801e, (q15_t)0x56c, (q15_t)0x801e,
+  (q15_t)0x565, (q15_t)0x801e, (q15_t)0x55f, (q15_t)0x801d, (q15_t)0x559, (q15_t)0x801d, (q15_t)0x553, (q15_t)0x801d,
+  (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x546, (q15_t)0x801c, (q15_t)0x540, (q15_t)0x801c, (q15_t)0x539, (q15_t)0x801c,
+  (q15_t)0x533, (q15_t)0x801c, (q15_t)0x52d, (q15_t)0x801b, (q15_t)0x527, (q15_t)0x801b, (q15_t)0x520, (q15_t)0x801b,
+  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x514, (q15_t)0x801a, (q15_t)0x50d, (q15_t)0x801a, (q15_t)0x507, (q15_t)0x801a,
+  (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4fb, (q15_t)0x8019, (q15_t)0x4f4, (q15_t)0x8019, (q15_t)0x4ee, (q15_t)0x8019,
+  (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4e2, (q15_t)0x8018, (q15_t)0x4db, (q15_t)0x8018, (q15_t)0x4d5, (q15_t)0x8018,
+  (q15_t)0x4cf, (q15_t)0x8018, (q15_t)0x4c8, (q15_t)0x8017, (q15_t)0x4c2, (q15_t)0x8017, (q15_t)0x4bc, (q15_t)0x8017,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x4af, (q15_t)0x8016, (q15_t)0x4a9, (q15_t)0x8016, (q15_t)0x4a3, (q15_t)0x8016,
+  (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x496, (q15_t)0x8016, (q15_t)0x490, (q15_t)0x8015, (q15_t)0x48a, (q15_t)0x8015,
+  (q15_t)0x483, (q15_t)0x8015, (q15_t)0x47d, (q15_t)0x8015, (q15_t)0x477, (q15_t)0x8014, (q15_t)0x471, (q15_t)0x8014,
+  (q15_t)0x46a, (q15_t)0x8014, (q15_t)0x464, (q15_t)0x8014, (q15_t)0x45e, (q15_t)0x8014, (q15_t)0x457, (q15_t)0x8013,
+  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x44b, (q15_t)0x8013, (q15_t)0x445, (q15_t)0x8013, (q15_t)0x43e, (q15_t)0x8013,
+  (q15_t)0x438, (q15_t)0x8012, (q15_t)0x432, (q15_t)0x8012, (q15_t)0x42b, (q15_t)0x8012, (q15_t)0x425, (q15_t)0x8012,
+  (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x419, (q15_t)0x8011, (q15_t)0x412, (q15_t)0x8011, (q15_t)0x40c, (q15_t)0x8011,
+  (q15_t)0x406, (q15_t)0x8011, (q15_t)0x3ff, (q15_t)0x8011, (q15_t)0x3f9, (q15_t)0x8010, (q15_t)0x3f3, (q15_t)0x8010,
+  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3e6, (q15_t)0x8010, (q15_t)0x3e0, (q15_t)0x8010, (q15_t)0x3da, (q15_t)0x800f,
+  (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3cd, (q15_t)0x800f, (q15_t)0x3c7, (q15_t)0x800f, (q15_t)0x3c1, (q15_t)0x800f,
+  (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3b4, (q15_t)0x800e, (q15_t)0x3ae, (q15_t)0x800e, (q15_t)0x3a8, (q15_t)0x800e,
+  (q15_t)0x3a1, (q15_t)0x800e, (q15_t)0x39b, (q15_t)0x800e, (q15_t)0x395, (q15_t)0x800d, (q15_t)0x38e, (q15_t)0x800d,
+  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x382, (q15_t)0x800d, (q15_t)0x37c, (q15_t)0x800d, (q15_t)0x375, (q15_t)0x800c,
+  (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x369, (q15_t)0x800c, (q15_t)0x362, (q15_t)0x800c, (q15_t)0x35c, (q15_t)0x800c,
+  (q15_t)0x356, (q15_t)0x800c, (q15_t)0x350, (q15_t)0x800b, (q15_t)0x349, (q15_t)0x800b, (q15_t)0x343, (q15_t)0x800b,
+  (q15_t)0x33d, (q15_t)0x800b, (q15_t)0x337, (q15_t)0x800b, (q15_t)0x330, (q15_t)0x800b, (q15_t)0x32a, (q15_t)0x800b,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x31d, (q15_t)0x800a, (q15_t)0x317, (q15_t)0x800a, (q15_t)0x311, (q15_t)0x800a,
+  (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x304, (q15_t)0x800a, (q15_t)0x2fe, (q15_t)0x8009, (q15_t)0x2f8, (q15_t)0x8009,
+  (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2eb, (q15_t)0x8009, (q15_t)0x2e5, (q15_t)0x8009, (q15_t)0x2df, (q15_t)0x8009,
+  (q15_t)0x2d8, (q15_t)0x8009, (q15_t)0x2d2, (q15_t)0x8008, (q15_t)0x2cc, (q15_t)0x8008, (q15_t)0x2c5, (q15_t)0x8008,
+  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2b9, (q15_t)0x8008, (q15_t)0x2b3, (q15_t)0x8008, (q15_t)0x2ac, (q15_t)0x8008,
+  (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x2a0, (q15_t)0x8007, (q15_t)0x299, (q15_t)0x8007, (q15_t)0x293, (q15_t)0x8007,
+  (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x287, (q15_t)0x8007, (q15_t)0x280, (q15_t)0x8007, (q15_t)0x27a, (q15_t)0x8007,
+  (q15_t)0x274, (q15_t)0x8007, (q15_t)0x26d, (q15_t)0x8006, (q15_t)0x267, (q15_t)0x8006, (q15_t)0x261, (q15_t)0x8006,
+  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x254, (q15_t)0x8006, (q15_t)0x24e, (q15_t)0x8006, (q15_t)0x248, (q15_t)0x8006,
+  (q15_t)0x242, (q15_t)0x8006, (q15_t)0x23b, (q15_t)0x8005, (q15_t)0x235, (q15_t)0x8005, (q15_t)0x22f, (q15_t)0x8005,
+  (q15_t)0x228, (q15_t)0x8005, (q15_t)0x222, (q15_t)0x8005, (q15_t)0x21c, (q15_t)0x8005, (q15_t)0x216, (q15_t)0x8005,
+  (q15_t)0x20f, (q15_t)0x8005, (q15_t)0x209, (q15_t)0x8005, (q15_t)0x203, (q15_t)0x8005, (q15_t)0x1fc, (q15_t)0x8004,
+  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1f0, (q15_t)0x8004, (q15_t)0x1ea, (q15_t)0x8004, (q15_t)0x1e3, (q15_t)0x8004,
+  (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1d7, (q15_t)0x8004, (q15_t)0x1d0, (q15_t)0x8004, (q15_t)0x1ca, (q15_t)0x8004,
+  (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1be, (q15_t)0x8004, (q15_t)0x1b7, (q15_t)0x8003, (q15_t)0x1b1, (q15_t)0x8003,
+  (q15_t)0x1ab, (q15_t)0x8003, (q15_t)0x1a4, (q15_t)0x8003, (q15_t)0x19e, (q15_t)0x8003, (q15_t)0x198, (q15_t)0x8003,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x18b, (q15_t)0x8003, (q15_t)0x185, (q15_t)0x8003, (q15_t)0x17f, (q15_t)0x8003,
+  (q15_t)0x178, (q15_t)0x8003, (q15_t)0x172, (q15_t)0x8003, (q15_t)0x16c, (q15_t)0x8003, (q15_t)0x166, (q15_t)0x8002,
+  (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x159, (q15_t)0x8002, (q15_t)0x153, (q15_t)0x8002, (q15_t)0x14d, (q15_t)0x8002,
+  (q15_t)0x146, (q15_t)0x8002, (q15_t)0x140, (q15_t)0x8002, (q15_t)0x13a, (q15_t)0x8002, (q15_t)0x133, (q15_t)0x8002,
+  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x127, (q15_t)0x8002, (q15_t)0x121, (q15_t)0x8002, (q15_t)0x11a, (q15_t)0x8002,
+  (q15_t)0x114, (q15_t)0x8002, (q15_t)0x10e, (q15_t)0x8002, (q15_t)0x107, (q15_t)0x8002, (q15_t)0x101, (q15_t)0x8002,
+  (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xf5, (q15_t)0x8001, (q15_t)0xee, (q15_t)0x8001, (q15_t)0xe8, (q15_t)0x8001,
+  (q15_t)0xe2, (q15_t)0x8001, (q15_t)0xdb, (q15_t)0x8001, (q15_t)0xd5, (q15_t)0x8001, (q15_t)0xcf, (q15_t)0x8001,
+  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xc2, (q15_t)0x8001, (q15_t)0xbc, (q15_t)0x8001, (q15_t)0xb6, (q15_t)0x8001,
+  (q15_t)0xaf, (q15_t)0x8001, (q15_t)0xa9, (q15_t)0x8001, (q15_t)0xa3, (q15_t)0x8001, (q15_t)0x9d, (q15_t)0x8001,
+  (q15_t)0x96, (q15_t)0x8001, (q15_t)0x90, (q15_t)0x8001, (q15_t)0x8a, (q15_t)0x8001, (q15_t)0x83, (q15_t)0x8001,
+  (q15_t)0x7d, (q15_t)0x8001, (q15_t)0x77, (q15_t)0x8001, (q15_t)0x71, (q15_t)0x8001, (q15_t)0x6a, (q15_t)0x8001,
+  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x5e, (q15_t)0x8001, (q15_t)0x57, (q15_t)0x8001, (q15_t)0x51, (q15_t)0x8001,
+  (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x45, (q15_t)0x8001, (q15_t)0x3e, (q15_t)0x8001, (q15_t)0x38, (q15_t)0x8001,
+  (q15_t)0x32, (q15_t)0x8001, (q15_t)0x2b, (q15_t)0x8001, (q15_t)0x25, (q15_t)0x8001, (q15_t)0x1f, (q15_t)0x8001,
+  (q15_t)0x19, (q15_t)0x8001, (q15_t)0x12, (q15_t)0x8001, (q15_t)0xc, (q15_t)0x8001, (q15_t)0x6, (q15_t)0x8001
+};
+
+    const q15_t __ALIGNED(4) cos_factorsQ15_8192[8192] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
+  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
+  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd,
+  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc,
+  (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc,
+  (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb,
+  (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa,
+  (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9,
+  (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8,
+  (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7,
+  (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6,
+  (q15_t)0x7ff6, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4,
+  (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3,
+  (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2,
+  (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff0, (q15_t)0x7ff0,
+  (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef,
+  (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fed,
+  (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7feb,
+  (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fe9,
+  (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8,
+  (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6,
+  (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4,
+  (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe1,
+  (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdf,
+  (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fdd, (q15_t)0x7fdd,
+  (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb,
+  (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd8, (q15_t)0x7fd8,
+  (q15_t)0x7fd8, (q15_t)0x7fd8, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd6, (q15_t)0x7fd6,
+  (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd3, (q15_t)0x7fd3,
+  (q15_t)0x7fd3, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd0,
+  (q15_t)0x7fd0, (q15_t)0x7fd0, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fce, (q15_t)0x7fce, (q15_t)0x7fce,
+  (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcb, (q15_t)0x7fcb,
+  (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc8, (q15_t)0x7fc8,
+  (q15_t)0x7fc8, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc6, (q15_t)0x7fc5, (q15_t)0x7fc5,
+  (q15_t)0x7fc5, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc3, (q15_t)0x7fc3, (q15_t)0x7fc2, (q15_t)0x7fc2,
+  (q15_t)0x7fc2, (q15_t)0x7fc1, (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fbf, (q15_t)0x7fbf,
+  (q15_t)0x7fbf, (q15_t)0x7fbe, (q15_t)0x7fbe, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbc, (q15_t)0x7fbc,
+  (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fba, (q15_t)0x7fba, (q15_t)0x7fb9, (q15_t)0x7fb9, (q15_t)0x7fb8,
+  (q15_t)0x7fb8, (q15_t)0x7fb8, (q15_t)0x7fb7, (q15_t)0x7fb7, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb5,
+  (q15_t)0x7fb5, (q15_t)0x7fb4, (q15_t)0x7fb4, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb2, (q15_t)0x7fb2,
+  (q15_t)0x7fb1, (q15_t)0x7fb1, (q15_t)0x7fb0, (q15_t)0x7fb0, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7fae,
+  (q15_t)0x7fae, (q15_t)0x7fad, (q15_t)0x7fad, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fab, (q15_t)0x7fab,
+  (q15_t)0x7faa, (q15_t)0x7faa, (q15_t)0x7fa9, (q15_t)0x7fa9, (q15_t)0x7fa8, (q15_t)0x7fa8, (q15_t)0x7fa7, (q15_t)0x7fa7,
+  (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa5, (q15_t)0x7fa5, (q15_t)0x7fa4, (q15_t)0x7fa4, (q15_t)0x7fa3,
+  (q15_t)0x7fa3, (q15_t)0x7fa2, (q15_t)0x7fa2, (q15_t)0x7fa1, (q15_t)0x7fa1, (q15_t)0x7fa0, (q15_t)0x7fa0, (q15_t)0x7f9f,
+  (q15_t)0x7f9f, (q15_t)0x7f9e, (q15_t)0x7f9e, (q15_t)0x7f9d, (q15_t)0x7f9d, (q15_t)0x7f9c, (q15_t)0x7f9c, (q15_t)0x7f9c,
+  (q15_t)0x7f9b, (q15_t)0x7f9b, (q15_t)0x7f9a, (q15_t)0x7f9a, (q15_t)0x7f99, (q15_t)0x7f99, (q15_t)0x7f98, (q15_t)0x7f98,
+  (q15_t)0x7f97, (q15_t)0x7f97, (q15_t)0x7f96, (q15_t)0x7f96, (q15_t)0x7f95, (q15_t)0x7f95, (q15_t)0x7f94, (q15_t)0x7f94,
+  (q15_t)0x7f93, (q15_t)0x7f92, (q15_t)0x7f92, (q15_t)0x7f91, (q15_t)0x7f91, (q15_t)0x7f90, (q15_t)0x7f90, (q15_t)0x7f8f,
+  (q15_t)0x7f8f, (q15_t)0x7f8e, (q15_t)0x7f8e, (q15_t)0x7f8d, (q15_t)0x7f8d, (q15_t)0x7f8c, (q15_t)0x7f8c, (q15_t)0x7f8b,
+  (q15_t)0x7f8b, (q15_t)0x7f8a, (q15_t)0x7f8a, (q15_t)0x7f89, (q15_t)0x7f89, (q15_t)0x7f88, (q15_t)0x7f87, (q15_t)0x7f87,
+  (q15_t)0x7f86, (q15_t)0x7f86, (q15_t)0x7f85, (q15_t)0x7f85, (q15_t)0x7f84, (q15_t)0x7f84, (q15_t)0x7f83, (q15_t)0x7f83,
+  (q15_t)0x7f82, (q15_t)0x7f81, (q15_t)0x7f81, (q15_t)0x7f80, (q15_t)0x7f80, (q15_t)0x7f7f, (q15_t)0x7f7f, (q15_t)0x7f7e,
+  (q15_t)0x7f7e, (q15_t)0x7f7d, (q15_t)0x7f7c, (q15_t)0x7f7c, (q15_t)0x7f7b, (q15_t)0x7f7b, (q15_t)0x7f7a, (q15_t)0x7f7a,
+  (q15_t)0x7f79, (q15_t)0x7f79, (q15_t)0x7f78, (q15_t)0x7f77, (q15_t)0x7f77, (q15_t)0x7f76, (q15_t)0x7f76, (q15_t)0x7f75,
+  (q15_t)0x7f75, (q15_t)0x7f74, (q15_t)0x7f73, (q15_t)0x7f73, (q15_t)0x7f72, (q15_t)0x7f72, (q15_t)0x7f71, (q15_t)0x7f70,
+  (q15_t)0x7f70, (q15_t)0x7f6f, (q15_t)0x7f6f, (q15_t)0x7f6e, (q15_t)0x7f6d, (q15_t)0x7f6d, (q15_t)0x7f6c, (q15_t)0x7f6c,
+  (q15_t)0x7f6b, (q15_t)0x7f6b, (q15_t)0x7f6a, (q15_t)0x7f69, (q15_t)0x7f69, (q15_t)0x7f68, (q15_t)0x7f68, (q15_t)0x7f67,
+  (q15_t)0x7f66, (q15_t)0x7f66, (q15_t)0x7f65, (q15_t)0x7f64, (q15_t)0x7f64, (q15_t)0x7f63, (q15_t)0x7f63, (q15_t)0x7f62,
+  (q15_t)0x7f61, (q15_t)0x7f61, (q15_t)0x7f60, (q15_t)0x7f60, (q15_t)0x7f5f, (q15_t)0x7f5e, (q15_t)0x7f5e, (q15_t)0x7f5d,
+  (q15_t)0x7f5c, (q15_t)0x7f5c, (q15_t)0x7f5b, (q15_t)0x7f5b, (q15_t)0x7f5a, (q15_t)0x7f59, (q15_t)0x7f59, (q15_t)0x7f58,
+  (q15_t)0x7f57, (q15_t)0x7f57, (q15_t)0x7f56, (q15_t)0x7f55, (q15_t)0x7f55, (q15_t)0x7f54, (q15_t)0x7f54, (q15_t)0x7f53,
+  (q15_t)0x7f52, (q15_t)0x7f52, (q15_t)0x7f51, (q15_t)0x7f50, (q15_t)0x7f50, (q15_t)0x7f4f, (q15_t)0x7f4e, (q15_t)0x7f4e,
+  (q15_t)0x7f4d, (q15_t)0x7f4c, (q15_t)0x7f4c, (q15_t)0x7f4b, (q15_t)0x7f4a, (q15_t)0x7f4a, (q15_t)0x7f49, (q15_t)0x7f48,
+  (q15_t)0x7f48, (q15_t)0x7f47, (q15_t)0x7f46, (q15_t)0x7f46, (q15_t)0x7f45, (q15_t)0x7f44, (q15_t)0x7f44, (q15_t)0x7f43,
+  (q15_t)0x7f42, (q15_t)0x7f42, (q15_t)0x7f41, (q15_t)0x7f40, (q15_t)0x7f40, (q15_t)0x7f3f, (q15_t)0x7f3e, (q15_t)0x7f3e,
+  (q15_t)0x7f3d, (q15_t)0x7f3c, (q15_t)0x7f3c, (q15_t)0x7f3b, (q15_t)0x7f3a, (q15_t)0x7f3a, (q15_t)0x7f39, (q15_t)0x7f38,
+  (q15_t)0x7f37, (q15_t)0x7f37, (q15_t)0x7f36, (q15_t)0x7f35, (q15_t)0x7f35, (q15_t)0x7f34, (q15_t)0x7f33, (q15_t)0x7f33,
+  (q15_t)0x7f32, (q15_t)0x7f31, (q15_t)0x7f31, (q15_t)0x7f30, (q15_t)0x7f2f, (q15_t)0x7f2e, (q15_t)0x7f2e, (q15_t)0x7f2d,
+  (q15_t)0x7f2c, (q15_t)0x7f2c, (q15_t)0x7f2b, (q15_t)0x7f2a, (q15_t)0x7f29, (q15_t)0x7f29, (q15_t)0x7f28, (q15_t)0x7f27,
+  (q15_t)0x7f27, (q15_t)0x7f26, (q15_t)0x7f25, (q15_t)0x7f24, (q15_t)0x7f24, (q15_t)0x7f23, (q15_t)0x7f22, (q15_t)0x7f21,
+  (q15_t)0x7f21, (q15_t)0x7f20, (q15_t)0x7f1f, (q15_t)0x7f1f, (q15_t)0x7f1e, (q15_t)0x7f1d, (q15_t)0x7f1c, (q15_t)0x7f1c,
+  (q15_t)0x7f1b, (q15_t)0x7f1a, (q15_t)0x7f19, (q15_t)0x7f19, (q15_t)0x7f18, (q15_t)0x7f17, (q15_t)0x7f16, (q15_t)0x7f16,
+  (q15_t)0x7f15, (q15_t)0x7f14, (q15_t)0x7f13, (q15_t)0x7f13, (q15_t)0x7f12, (q15_t)0x7f11, (q15_t)0x7f10, (q15_t)0x7f10,
+  (q15_t)0x7f0f, (q15_t)0x7f0e, (q15_t)0x7f0d, (q15_t)0x7f0d, (q15_t)0x7f0c, (q15_t)0x7f0b, (q15_t)0x7f0a, (q15_t)0x7f09,
+  (q15_t)0x7f09, (q15_t)0x7f08, (q15_t)0x7f07, (q15_t)0x7f06, (q15_t)0x7f06, (q15_t)0x7f05, (q15_t)0x7f04, (q15_t)0x7f03,
+  (q15_t)0x7f02, (q15_t)0x7f02, (q15_t)0x7f01, (q15_t)0x7f00, (q15_t)0x7eff, (q15_t)0x7eff, (q15_t)0x7efe, (q15_t)0x7efd,
+  (q15_t)0x7efc, (q15_t)0x7efb, (q15_t)0x7efb, (q15_t)0x7efa, (q15_t)0x7ef9, (q15_t)0x7ef8, (q15_t)0x7ef7, (q15_t)0x7ef7,
+  (q15_t)0x7ef6, (q15_t)0x7ef5, (q15_t)0x7ef4, (q15_t)0x7ef3, (q15_t)0x7ef3, (q15_t)0x7ef2, (q15_t)0x7ef1, (q15_t)0x7ef0,
+  (q15_t)0x7eef, (q15_t)0x7eef, (q15_t)0x7eee, (q15_t)0x7eed, (q15_t)0x7eec, (q15_t)0x7eeb, (q15_t)0x7eeb, (q15_t)0x7eea,
+  (q15_t)0x7ee9, (q15_t)0x7ee8, (q15_t)0x7ee7, (q15_t)0x7ee6, (q15_t)0x7ee6, (q15_t)0x7ee5, (q15_t)0x7ee4, (q15_t)0x7ee3,
+  (q15_t)0x7ee2, (q15_t)0x7ee2, (q15_t)0x7ee1, (q15_t)0x7ee0, (q15_t)0x7edf, (q15_t)0x7ede, (q15_t)0x7edd, (q15_t)0x7edd,
+  (q15_t)0x7edc, (q15_t)0x7edb, (q15_t)0x7eda, (q15_t)0x7ed9, (q15_t)0x7ed8, (q15_t)0x7ed8, (q15_t)0x7ed7, (q15_t)0x7ed6,
+  (q15_t)0x7ed5, (q15_t)0x7ed4, (q15_t)0x7ed3, (q15_t)0x7ed2, (q15_t)0x7ed2, (q15_t)0x7ed1, (q15_t)0x7ed0, (q15_t)0x7ecf,
+  (q15_t)0x7ece, (q15_t)0x7ecd, (q15_t)0x7ecc, (q15_t)0x7ecc, (q15_t)0x7ecb, (q15_t)0x7eca, (q15_t)0x7ec9, (q15_t)0x7ec8,
+  (q15_t)0x7ec7, (q15_t)0x7ec6, (q15_t)0x7ec6, (q15_t)0x7ec5, (q15_t)0x7ec4, (q15_t)0x7ec3, (q15_t)0x7ec2, (q15_t)0x7ec1,
+  (q15_t)0x7ec0, (q15_t)0x7ebf, (q15_t)0x7ebf, (q15_t)0x7ebe, (q15_t)0x7ebd, (q15_t)0x7ebc, (q15_t)0x7ebb, (q15_t)0x7eba,
+  (q15_t)0x7eb9, (q15_t)0x7eb8, (q15_t)0x7eb8, (q15_t)0x7eb7, (q15_t)0x7eb6, (q15_t)0x7eb5, (q15_t)0x7eb4, (q15_t)0x7eb3,
+  (q15_t)0x7eb2, (q15_t)0x7eb1, (q15_t)0x7eb0, (q15_t)0x7eaf, (q15_t)0x7eaf, (q15_t)0x7eae, (q15_t)0x7ead, (q15_t)0x7eac,
+  (q15_t)0x7eab, (q15_t)0x7eaa, (q15_t)0x7ea9, (q15_t)0x7ea8, (q15_t)0x7ea7, (q15_t)0x7ea6, (q15_t)0x7ea6, (q15_t)0x7ea5,
+  (q15_t)0x7ea4, (q15_t)0x7ea3, (q15_t)0x7ea2, (q15_t)0x7ea1, (q15_t)0x7ea0, (q15_t)0x7e9f, (q15_t)0x7e9e, (q15_t)0x7e9d,
+  (q15_t)0x7e9c, (q15_t)0x7e9b, (q15_t)0x7e9b, (q15_t)0x7e9a, (q15_t)0x7e99, (q15_t)0x7e98, (q15_t)0x7e97, (q15_t)0x7e96,
+  (q15_t)0x7e95, (q15_t)0x7e94, (q15_t)0x7e93, (q15_t)0x7e92, (q15_t)0x7e91, (q15_t)0x7e90, (q15_t)0x7e8f, (q15_t)0x7e8e,
+  (q15_t)0x7e8d, (q15_t)0x7e8d, (q15_t)0x7e8c, (q15_t)0x7e8b, (q15_t)0x7e8a, (q15_t)0x7e89, (q15_t)0x7e88, (q15_t)0x7e87,
+  (q15_t)0x7e86, (q15_t)0x7e85, (q15_t)0x7e84, (q15_t)0x7e83, (q15_t)0x7e82, (q15_t)0x7e81, (q15_t)0x7e80, (q15_t)0x7e7f,
+  (q15_t)0x7e7e, (q15_t)0x7e7d, (q15_t)0x7e7c, (q15_t)0x7e7b, (q15_t)0x7e7a, (q15_t)0x7e79, (q15_t)0x7e78, (q15_t)0x7e77,
+  (q15_t)0x7e77, (q15_t)0x7e76, (q15_t)0x7e75, (q15_t)0x7e74, (q15_t)0x7e73, (q15_t)0x7e72, (q15_t)0x7e71, (q15_t)0x7e70,
+  (q15_t)0x7e6f, (q15_t)0x7e6e, (q15_t)0x7e6d, (q15_t)0x7e6c, (q15_t)0x7e6b, (q15_t)0x7e6a, (q15_t)0x7e69, (q15_t)0x7e68,
+  (q15_t)0x7e67, (q15_t)0x7e66, (q15_t)0x7e65, (q15_t)0x7e64, (q15_t)0x7e63, (q15_t)0x7e62, (q15_t)0x7e61, (q15_t)0x7e60,
+  (q15_t)0x7e5f, (q15_t)0x7e5e, (q15_t)0x7e5d, (q15_t)0x7e5c, (q15_t)0x7e5b, (q15_t)0x7e5a, (q15_t)0x7e59, (q15_t)0x7e58,
+  (q15_t)0x7e57, (q15_t)0x7e56, (q15_t)0x7e55, (q15_t)0x7e54, (q15_t)0x7e53, (q15_t)0x7e52, (q15_t)0x7e51, (q15_t)0x7e50,
+  (q15_t)0x7e4f, (q15_t)0x7e4e, (q15_t)0x7e4d, (q15_t)0x7e4c, (q15_t)0x7e4b, (q15_t)0x7e4a, (q15_t)0x7e49, (q15_t)0x7e48,
+  (q15_t)0x7e47, (q15_t)0x7e46, (q15_t)0x7e45, (q15_t)0x7e43, (q15_t)0x7e42, (q15_t)0x7e41, (q15_t)0x7e40, (q15_t)0x7e3f,
+  (q15_t)0x7e3e, (q15_t)0x7e3d, (q15_t)0x7e3c, (q15_t)0x7e3b, (q15_t)0x7e3a, (q15_t)0x7e39, (q15_t)0x7e38, (q15_t)0x7e37,
+  (q15_t)0x7e36, (q15_t)0x7e35, (q15_t)0x7e34, (q15_t)0x7e33, (q15_t)0x7e32, (q15_t)0x7e31, (q15_t)0x7e30, (q15_t)0x7e2f,
+  (q15_t)0x7e2e, (q15_t)0x7e2d, (q15_t)0x7e2b, (q15_t)0x7e2a, (q15_t)0x7e29, (q15_t)0x7e28, (q15_t)0x7e27, (q15_t)0x7e26,
+  (q15_t)0x7e25, (q15_t)0x7e24, (q15_t)0x7e23, (q15_t)0x7e22, (q15_t)0x7e21, (q15_t)0x7e20, (q15_t)0x7e1f, (q15_t)0x7e1e,
+  (q15_t)0x7e1d, (q15_t)0x7e1b, (q15_t)0x7e1a, (q15_t)0x7e19, (q15_t)0x7e18, (q15_t)0x7e17, (q15_t)0x7e16, (q15_t)0x7e15,
+  (q15_t)0x7e14, (q15_t)0x7e13, (q15_t)0x7e12, (q15_t)0x7e11, (q15_t)0x7e10, (q15_t)0x7e0e, (q15_t)0x7e0d, (q15_t)0x7e0c,
+  (q15_t)0x7e0b, (q15_t)0x7e0a, (q15_t)0x7e09, (q15_t)0x7e08, (q15_t)0x7e07, (q15_t)0x7e06, (q15_t)0x7e05, (q15_t)0x7e04,
+  (q15_t)0x7e02, (q15_t)0x7e01, (q15_t)0x7e00, (q15_t)0x7dff, (q15_t)0x7dfe, (q15_t)0x7dfd, (q15_t)0x7dfc, (q15_t)0x7dfb,
+  (q15_t)0x7dfa, (q15_t)0x7df8, (q15_t)0x7df7, (q15_t)0x7df6, (q15_t)0x7df5, (q15_t)0x7df4, (q15_t)0x7df3, (q15_t)0x7df2,
+  (q15_t)0x7df1, (q15_t)0x7def, (q15_t)0x7dee, (q15_t)0x7ded, (q15_t)0x7dec, (q15_t)0x7deb, (q15_t)0x7dea, (q15_t)0x7de9,
+  (q15_t)0x7de8, (q15_t)0x7de6, (q15_t)0x7de5, (q15_t)0x7de4, (q15_t)0x7de3, (q15_t)0x7de2, (q15_t)0x7de1, (q15_t)0x7de0,
+  (q15_t)0x7dde, (q15_t)0x7ddd, (q15_t)0x7ddc, (q15_t)0x7ddb, (q15_t)0x7dda, (q15_t)0x7dd9, (q15_t)0x7dd8, (q15_t)0x7dd6,
+  (q15_t)0x7dd5, (q15_t)0x7dd4, (q15_t)0x7dd3, (q15_t)0x7dd2, (q15_t)0x7dd1, (q15_t)0x7dd0, (q15_t)0x7dce, (q15_t)0x7dcd,
+  (q15_t)0x7dcc, (q15_t)0x7dcb, (q15_t)0x7dca, (q15_t)0x7dc9, (q15_t)0x7dc7, (q15_t)0x7dc6, (q15_t)0x7dc5, (q15_t)0x7dc4,
+  (q15_t)0x7dc3, (q15_t)0x7dc2, (q15_t)0x7dc0, (q15_t)0x7dbf, (q15_t)0x7dbe, (q15_t)0x7dbd, (q15_t)0x7dbc, (q15_t)0x7dbb,
+  (q15_t)0x7db9, (q15_t)0x7db8, (q15_t)0x7db7, (q15_t)0x7db6, (q15_t)0x7db5, (q15_t)0x7db3, (q15_t)0x7db2, (q15_t)0x7db1,
+  (q15_t)0x7db0, (q15_t)0x7daf, (q15_t)0x7dae, (q15_t)0x7dac, (q15_t)0x7dab, (q15_t)0x7daa, (q15_t)0x7da9, (q15_t)0x7da8,
+  (q15_t)0x7da6, (q15_t)0x7da5, (q15_t)0x7da4, (q15_t)0x7da3, (q15_t)0x7da2, (q15_t)0x7da0, (q15_t)0x7d9f, (q15_t)0x7d9e,
+  (q15_t)0x7d9d, (q15_t)0x7d9c, (q15_t)0x7d9a, (q15_t)0x7d99, (q15_t)0x7d98, (q15_t)0x7d97, (q15_t)0x7d95, (q15_t)0x7d94,
+  (q15_t)0x7d93, (q15_t)0x7d92, (q15_t)0x7d91, (q15_t)0x7d8f, (q15_t)0x7d8e, (q15_t)0x7d8d, (q15_t)0x7d8c, (q15_t)0x7d8a,
+  (q15_t)0x7d89, (q15_t)0x7d88, (q15_t)0x7d87, (q15_t)0x7d86, (q15_t)0x7d84, (q15_t)0x7d83, (q15_t)0x7d82, (q15_t)0x7d81,
+  (q15_t)0x7d7f, (q15_t)0x7d7e, (q15_t)0x7d7d, (q15_t)0x7d7c, (q15_t)0x7d7a, (q15_t)0x7d79, (q15_t)0x7d78, (q15_t)0x7d77,
+  (q15_t)0x7d75, (q15_t)0x7d74, (q15_t)0x7d73, (q15_t)0x7d72, (q15_t)0x7d70, (q15_t)0x7d6f, (q15_t)0x7d6e, (q15_t)0x7d6d,
+  (q15_t)0x7d6b, (q15_t)0x7d6a, (q15_t)0x7d69, (q15_t)0x7d68, (q15_t)0x7d66, (q15_t)0x7d65, (q15_t)0x7d64, (q15_t)0x7d63,
+  (q15_t)0x7d61, (q15_t)0x7d60, (q15_t)0x7d5f, (q15_t)0x7d5e, (q15_t)0x7d5c, (q15_t)0x7d5b, (q15_t)0x7d5a, (q15_t)0x7d59,
+  (q15_t)0x7d57, (q15_t)0x7d56, (q15_t)0x7d55, (q15_t)0x7d53, (q15_t)0x7d52, (q15_t)0x7d51, (q15_t)0x7d50, (q15_t)0x7d4e,
+  (q15_t)0x7d4d, (q15_t)0x7d4c, (q15_t)0x7d4a, (q15_t)0x7d49, (q15_t)0x7d48, (q15_t)0x7d47, (q15_t)0x7d45, (q15_t)0x7d44,
+  (q15_t)0x7d43, (q15_t)0x7d41, (q15_t)0x7d40, (q15_t)0x7d3f, (q15_t)0x7d3e, (q15_t)0x7d3c, (q15_t)0x7d3b, (q15_t)0x7d3a,
+  (q15_t)0x7d38, (q15_t)0x7d37, (q15_t)0x7d36, (q15_t)0x7d34, (q15_t)0x7d33, (q15_t)0x7d32, (q15_t)0x7d31, (q15_t)0x7d2f,
+  (q15_t)0x7d2e, (q15_t)0x7d2d, (q15_t)0x7d2b, (q15_t)0x7d2a, (q15_t)0x7d29, (q15_t)0x7d27, (q15_t)0x7d26, (q15_t)0x7d25,
+  (q15_t)0x7d23, (q15_t)0x7d22, (q15_t)0x7d21, (q15_t)0x7d1f, (q15_t)0x7d1e, (q15_t)0x7d1d, (q15_t)0x7d1b, (q15_t)0x7d1a,
+  (q15_t)0x7d19, (q15_t)0x7d17, (q15_t)0x7d16, (q15_t)0x7d15, (q15_t)0x7d13, (q15_t)0x7d12, (q15_t)0x7d11, (q15_t)0x7d0f,
+  (q15_t)0x7d0e, (q15_t)0x7d0d, (q15_t)0x7d0b, (q15_t)0x7d0a, (q15_t)0x7d09, (q15_t)0x7d07, (q15_t)0x7d06, (q15_t)0x7d05,
+  (q15_t)0x7d03, (q15_t)0x7d02, (q15_t)0x7d01, (q15_t)0x7cff, (q15_t)0x7cfe, (q15_t)0x7cfd, (q15_t)0x7cfb, (q15_t)0x7cfa,
+  (q15_t)0x7cf9, (q15_t)0x7cf7, (q15_t)0x7cf6, (q15_t)0x7cf4, (q15_t)0x7cf3, (q15_t)0x7cf2, (q15_t)0x7cf0, (q15_t)0x7cef,
+  (q15_t)0x7cee, (q15_t)0x7cec, (q15_t)0x7ceb, (q15_t)0x7ce9, (q15_t)0x7ce8, (q15_t)0x7ce7, (q15_t)0x7ce5, (q15_t)0x7ce4,
+  (q15_t)0x7ce3, (q15_t)0x7ce1, (q15_t)0x7ce0, (q15_t)0x7cde, (q15_t)0x7cdd, (q15_t)0x7cdc, (q15_t)0x7cda, (q15_t)0x7cd9,
+  (q15_t)0x7cd8, (q15_t)0x7cd6, (q15_t)0x7cd5, (q15_t)0x7cd3, (q15_t)0x7cd2, (q15_t)0x7cd1, (q15_t)0x7ccf, (q15_t)0x7cce,
+  (q15_t)0x7ccc, (q15_t)0x7ccb, (q15_t)0x7cca, (q15_t)0x7cc8, (q15_t)0x7cc7, (q15_t)0x7cc5, (q15_t)0x7cc4, (q15_t)0x7cc3,
+  (q15_t)0x7cc1, (q15_t)0x7cc0, (q15_t)0x7cbe, (q15_t)0x7cbd, (q15_t)0x7cbc, (q15_t)0x7cba, (q15_t)0x7cb9, (q15_t)0x7cb7,
+  (q15_t)0x7cb6, (q15_t)0x7cb5, (q15_t)0x7cb3, (q15_t)0x7cb2, (q15_t)0x7cb0, (q15_t)0x7caf, (q15_t)0x7cad, (q15_t)0x7cac,
+  (q15_t)0x7cab, (q15_t)0x7ca9, (q15_t)0x7ca8, (q15_t)0x7ca6, (q15_t)0x7ca5, (q15_t)0x7ca3, (q15_t)0x7ca2, (q15_t)0x7ca1,
+  (q15_t)0x7c9f, (q15_t)0x7c9e, (q15_t)0x7c9c, (q15_t)0x7c9b, (q15_t)0x7c99, (q15_t)0x7c98, (q15_t)0x7c97, (q15_t)0x7c95,
+  (q15_t)0x7c94, (q15_t)0x7c92, (q15_t)0x7c91, (q15_t)0x7c8f, (q15_t)0x7c8e, (q15_t)0x7c8c, (q15_t)0x7c8b, (q15_t)0x7c8a,
+  (q15_t)0x7c88, (q15_t)0x7c87, (q15_t)0x7c85, (q15_t)0x7c84, (q15_t)0x7c82, (q15_t)0x7c81, (q15_t)0x7c7f, (q15_t)0x7c7e,
+  (q15_t)0x7c7c, (q15_t)0x7c7b, (q15_t)0x7c79, (q15_t)0x7c78, (q15_t)0x7c77, (q15_t)0x7c75, (q15_t)0x7c74, (q15_t)0x7c72,
+  (q15_t)0x7c71, (q15_t)0x7c6f, (q15_t)0x7c6e, (q15_t)0x7c6c, (q15_t)0x7c6b, (q15_t)0x7c69, (q15_t)0x7c68, (q15_t)0x7c66,
+  (q15_t)0x7c65, (q15_t)0x7c63, (q15_t)0x7c62, (q15_t)0x7c60, (q15_t)0x7c5f, (q15_t)0x7c5d, (q15_t)0x7c5c, (q15_t)0x7c5a,
+  (q15_t)0x7c59, (q15_t)0x7c58, (q15_t)0x7c56, (q15_t)0x7c55, (q15_t)0x7c53, (q15_t)0x7c52, (q15_t)0x7c50, (q15_t)0x7c4f,
+  (q15_t)0x7c4d, (q15_t)0x7c4c, (q15_t)0x7c4a, (q15_t)0x7c49, (q15_t)0x7c47, (q15_t)0x7c46, (q15_t)0x7c44, (q15_t)0x7c43,
+  (q15_t)0x7c41, (q15_t)0x7c3f, (q15_t)0x7c3e, (q15_t)0x7c3c, (q15_t)0x7c3b, (q15_t)0x7c39, (q15_t)0x7c38, (q15_t)0x7c36,
+  (q15_t)0x7c35, (q15_t)0x7c33, (q15_t)0x7c32, (q15_t)0x7c30, (q15_t)0x7c2f, (q15_t)0x7c2d, (q15_t)0x7c2c, (q15_t)0x7c2a,
+  (q15_t)0x7c29, (q15_t)0x7c27, (q15_t)0x7c26, (q15_t)0x7c24, (q15_t)0x7c23, (q15_t)0x7c21, (q15_t)0x7c20, (q15_t)0x7c1e,
+  (q15_t)0x7c1c, (q15_t)0x7c1b, (q15_t)0x7c19, (q15_t)0x7c18, (q15_t)0x7c16, (q15_t)0x7c15, (q15_t)0x7c13, (q15_t)0x7c12,
+  (q15_t)0x7c10, (q15_t)0x7c0f, (q15_t)0x7c0d, (q15_t)0x7c0b, (q15_t)0x7c0a, (q15_t)0x7c08, (q15_t)0x7c07, (q15_t)0x7c05,
+  (q15_t)0x7c04, (q15_t)0x7c02, (q15_t)0x7c01, (q15_t)0x7bff, (q15_t)0x7bfd, (q15_t)0x7bfc, (q15_t)0x7bfa, (q15_t)0x7bf9,
+  (q15_t)0x7bf7, (q15_t)0x7bf6, (q15_t)0x7bf4, (q15_t)0x7bf3, (q15_t)0x7bf1, (q15_t)0x7bef, (q15_t)0x7bee, (q15_t)0x7bec,
+  (q15_t)0x7beb, (q15_t)0x7be9, (q15_t)0x7be8, (q15_t)0x7be6, (q15_t)0x7be4, (q15_t)0x7be3, (q15_t)0x7be1, (q15_t)0x7be0,
+  (q15_t)0x7bde, (q15_t)0x7bdc, (q15_t)0x7bdb, (q15_t)0x7bd9, (q15_t)0x7bd8, (q15_t)0x7bd6, (q15_t)0x7bd5, (q15_t)0x7bd3,
+  (q15_t)0x7bd1, (q15_t)0x7bd0, (q15_t)0x7bce, (q15_t)0x7bcd, (q15_t)0x7bcb, (q15_t)0x7bc9, (q15_t)0x7bc8, (q15_t)0x7bc6,
+  (q15_t)0x7bc5, (q15_t)0x7bc3, (q15_t)0x7bc1, (q15_t)0x7bc0, (q15_t)0x7bbe, (q15_t)0x7bbd, (q15_t)0x7bbb, (q15_t)0x7bb9,
+  (q15_t)0x7bb8, (q15_t)0x7bb6, (q15_t)0x7bb5, (q15_t)0x7bb3, (q15_t)0x7bb1, (q15_t)0x7bb0, (q15_t)0x7bae, (q15_t)0x7bac,
+  (q15_t)0x7bab, (q15_t)0x7ba9, (q15_t)0x7ba8, (q15_t)0x7ba6, (q15_t)0x7ba4, (q15_t)0x7ba3, (q15_t)0x7ba1, (q15_t)0x7b9f,
+  (q15_t)0x7b9e, (q15_t)0x7b9c, (q15_t)0x7b9b, (q15_t)0x7b99, (q15_t)0x7b97, (q15_t)0x7b96, (q15_t)0x7b94, (q15_t)0x7b92,
+  (q15_t)0x7b91, (q15_t)0x7b8f, (q15_t)0x7b8d, (q15_t)0x7b8c, (q15_t)0x7b8a, (q15_t)0x7b89, (q15_t)0x7b87, (q15_t)0x7b85,
+  (q15_t)0x7b84, (q15_t)0x7b82, (q15_t)0x7b80, (q15_t)0x7b7f, (q15_t)0x7b7d, (q15_t)0x7b7b, (q15_t)0x7b7a, (q15_t)0x7b78,
+  (q15_t)0x7b76, (q15_t)0x7b75, (q15_t)0x7b73, (q15_t)0x7b71, (q15_t)0x7b70, (q15_t)0x7b6e, (q15_t)0x7b6c, (q15_t)0x7b6b,
+  (q15_t)0x7b69, (q15_t)0x7b67, (q15_t)0x7b66, (q15_t)0x7b64, (q15_t)0x7b62, (q15_t)0x7b61, (q15_t)0x7b5f, (q15_t)0x7b5d,
+  (q15_t)0x7b5c, (q15_t)0x7b5a, (q15_t)0x7b58, (q15_t)0x7b57, (q15_t)0x7b55, (q15_t)0x7b53, (q15_t)0x7b52, (q15_t)0x7b50,
+  (q15_t)0x7b4e, (q15_t)0x7b4d, (q15_t)0x7b4b, (q15_t)0x7b49, (q15_t)0x7b47, (q15_t)0x7b46, (q15_t)0x7b44, (q15_t)0x7b42,
+  (q15_t)0x7b41, (q15_t)0x7b3f, (q15_t)0x7b3d, (q15_t)0x7b3c, (q15_t)0x7b3a, (q15_t)0x7b38, (q15_t)0x7b37, (q15_t)0x7b35,
+  (q15_t)0x7b33, (q15_t)0x7b31, (q15_t)0x7b30, (q15_t)0x7b2e, (q15_t)0x7b2c, (q15_t)0x7b2b, (q15_t)0x7b29, (q15_t)0x7b27,
+  (q15_t)0x7b25, (q15_t)0x7b24, (q15_t)0x7b22, (q15_t)0x7b20, (q15_t)0x7b1f, (q15_t)0x7b1d, (q15_t)0x7b1b, (q15_t)0x7b19,
+  (q15_t)0x7b18, (q15_t)0x7b16, (q15_t)0x7b14, (q15_t)0x7b13, (q15_t)0x7b11, (q15_t)0x7b0f, (q15_t)0x7b0d, (q15_t)0x7b0c,
+  (q15_t)0x7b0a, (q15_t)0x7b08, (q15_t)0x7b06, (q15_t)0x7b05, (q15_t)0x7b03, (q15_t)0x7b01, (q15_t)0x7aff, (q15_t)0x7afe,
+  (q15_t)0x7afc, (q15_t)0x7afa, (q15_t)0x7af8, (q15_t)0x7af7, (q15_t)0x7af5, (q15_t)0x7af3, (q15_t)0x7af2, (q15_t)0x7af0,
+  (q15_t)0x7aee, (q15_t)0x7aec, (q15_t)0x7aeb, (q15_t)0x7ae9, (q15_t)0x7ae7, (q15_t)0x7ae5, (q15_t)0x7ae3, (q15_t)0x7ae2,
+  (q15_t)0x7ae0, (q15_t)0x7ade, (q15_t)0x7adc, (q15_t)0x7adb, (q15_t)0x7ad9, (q15_t)0x7ad7, (q15_t)0x7ad5, (q15_t)0x7ad4,
+  (q15_t)0x7ad2, (q15_t)0x7ad0, (q15_t)0x7ace, (q15_t)0x7acd, (q15_t)0x7acb, (q15_t)0x7ac9, (q15_t)0x7ac7, (q15_t)0x7ac5,
+  (q15_t)0x7ac4, (q15_t)0x7ac2, (q15_t)0x7ac0, (q15_t)0x7abe, (q15_t)0x7abd, (q15_t)0x7abb, (q15_t)0x7ab9, (q15_t)0x7ab7,
+  (q15_t)0x7ab5, (q15_t)0x7ab4, (q15_t)0x7ab2, (q15_t)0x7ab0, (q15_t)0x7aae, (q15_t)0x7aac, (q15_t)0x7aab, (q15_t)0x7aa9,
+  (q15_t)0x7aa7, (q15_t)0x7aa5, (q15_t)0x7aa3, (q15_t)0x7aa2, (q15_t)0x7aa0, (q15_t)0x7a9e, (q15_t)0x7a9c, (q15_t)0x7a9a,
+  (q15_t)0x7a99, (q15_t)0x7a97, (q15_t)0x7a95, (q15_t)0x7a93, (q15_t)0x7a91, (q15_t)0x7a90, (q15_t)0x7a8e, (q15_t)0x7a8c,
+  (q15_t)0x7a8a, (q15_t)0x7a88, (q15_t)0x7a87, (q15_t)0x7a85, (q15_t)0x7a83, (q15_t)0x7a81, (q15_t)0x7a7f, (q15_t)0x7a7d,
+  (q15_t)0x7a7c, (q15_t)0x7a7a, (q15_t)0x7a78, (q15_t)0x7a76, (q15_t)0x7a74, (q15_t)0x7a72, (q15_t)0x7a71, (q15_t)0x7a6f,
+  (q15_t)0x7a6d, (q15_t)0x7a6b, (q15_t)0x7a69, (q15_t)0x7a67, (q15_t)0x7a66, (q15_t)0x7a64, (q15_t)0x7a62, (q15_t)0x7a60,
+  (q15_t)0x7a5e, (q15_t)0x7a5c, (q15_t)0x7a5b, (q15_t)0x7a59, (q15_t)0x7a57, (q15_t)0x7a55, (q15_t)0x7a53, (q15_t)0x7a51,
+  (q15_t)0x7a4f, (q15_t)0x7a4e, (q15_t)0x7a4c, (q15_t)0x7a4a, (q15_t)0x7a48, (q15_t)0x7a46, (q15_t)0x7a44, (q15_t)0x7a42,
+  (q15_t)0x7a41, (q15_t)0x7a3f, (q15_t)0x7a3d, (q15_t)0x7a3b, (q15_t)0x7a39, (q15_t)0x7a37, (q15_t)0x7a35, (q15_t)0x7a34,
+  (q15_t)0x7a32, (q15_t)0x7a30, (q15_t)0x7a2e, (q15_t)0x7a2c, (q15_t)0x7a2a, (q15_t)0x7a28, (q15_t)0x7a26, (q15_t)0x7a25,
+  (q15_t)0x7a23, (q15_t)0x7a21, (q15_t)0x7a1f, (q15_t)0x7a1d, (q15_t)0x7a1b, (q15_t)0x7a19, (q15_t)0x7a17, (q15_t)0x7a16,
+  (q15_t)0x7a14, (q15_t)0x7a12, (q15_t)0x7a10, (q15_t)0x7a0e, (q15_t)0x7a0c, (q15_t)0x7a0a, (q15_t)0x7a08, (q15_t)0x7a06,
+  (q15_t)0x7a04, (q15_t)0x7a03, (q15_t)0x7a01, (q15_t)0x79ff, (q15_t)0x79fd, (q15_t)0x79fb, (q15_t)0x79f9, (q15_t)0x79f7,
+  (q15_t)0x79f5, (q15_t)0x79f3, (q15_t)0x79f1, (q15_t)0x79f0, (q15_t)0x79ee, (q15_t)0x79ec, (q15_t)0x79ea, (q15_t)0x79e8,
+  (q15_t)0x79e6, (q15_t)0x79e4, (q15_t)0x79e2, (q15_t)0x79e0, (q15_t)0x79de, (q15_t)0x79dc, (q15_t)0x79da, (q15_t)0x79d9,
+  (q15_t)0x79d7, (q15_t)0x79d5, (q15_t)0x79d3, (q15_t)0x79d1, (q15_t)0x79cf, (q15_t)0x79cd, (q15_t)0x79cb, (q15_t)0x79c9,
+  (q15_t)0x79c7, (q15_t)0x79c5, (q15_t)0x79c3, (q15_t)0x79c1, (q15_t)0x79bf, (q15_t)0x79bd, (q15_t)0x79bc, (q15_t)0x79ba,
+  (q15_t)0x79b8, (q15_t)0x79b6, (q15_t)0x79b4, (q15_t)0x79b2, (q15_t)0x79b0, (q15_t)0x79ae, (q15_t)0x79ac, (q15_t)0x79aa,
+  (q15_t)0x79a8, (q15_t)0x79a6, (q15_t)0x79a4, (q15_t)0x79a2, (q15_t)0x79a0, (q15_t)0x799e, (q15_t)0x799c, (q15_t)0x799a,
+  (q15_t)0x7998, (q15_t)0x7996, (q15_t)0x7994, (q15_t)0x7992, (q15_t)0x7991, (q15_t)0x798f, (q15_t)0x798d, (q15_t)0x798b,
+  (q15_t)0x7989, (q15_t)0x7987, (q15_t)0x7985, (q15_t)0x7983, (q15_t)0x7981, (q15_t)0x797f, (q15_t)0x797d, (q15_t)0x797b,
+  (q15_t)0x7979, (q15_t)0x7977, (q15_t)0x7975, (q15_t)0x7973, (q15_t)0x7971, (q15_t)0x796f, (q15_t)0x796d, (q15_t)0x796b,
+  (q15_t)0x7969, (q15_t)0x7967, (q15_t)0x7965, (q15_t)0x7963, (q15_t)0x7961, (q15_t)0x795f, (q15_t)0x795d, (q15_t)0x795b,
+  (q15_t)0x7959, (q15_t)0x7957, (q15_t)0x7955, (q15_t)0x7953, (q15_t)0x7951, (q15_t)0x794f, (q15_t)0x794d, (q15_t)0x794b,
+  (q15_t)0x7949, (q15_t)0x7947, (q15_t)0x7945, (q15_t)0x7943, (q15_t)0x7941, (q15_t)0x793f, (q15_t)0x793d, (q15_t)0x793b,
+  (q15_t)0x7939, (q15_t)0x7937, (q15_t)0x7935, (q15_t)0x7933, (q15_t)0x7931, (q15_t)0x792f, (q15_t)0x792d, (q15_t)0x792b,
+  (q15_t)0x7929, (q15_t)0x7927, (q15_t)0x7925, (q15_t)0x7923, (q15_t)0x7921, (q15_t)0x791f, (q15_t)0x791d, (q15_t)0x791a,
+  (q15_t)0x7918, (q15_t)0x7916, (q15_t)0x7914, (q15_t)0x7912, (q15_t)0x7910, (q15_t)0x790e, (q15_t)0x790c, (q15_t)0x790a,
+  (q15_t)0x7908, (q15_t)0x7906, (q15_t)0x7904, (q15_t)0x7902, (q15_t)0x7900, (q15_t)0x78fe, (q15_t)0x78fc, (q15_t)0x78fa,
+  (q15_t)0x78f8, (q15_t)0x78f6, (q15_t)0x78f4, (q15_t)0x78f2, (q15_t)0x78f0, (q15_t)0x78ed, (q15_t)0x78eb, (q15_t)0x78e9,
+  (q15_t)0x78e7, (q15_t)0x78e5, (q15_t)0x78e3, (q15_t)0x78e1, (q15_t)0x78df, (q15_t)0x78dd, (q15_t)0x78db, (q15_t)0x78d9,
+  (q15_t)0x78d7, (q15_t)0x78d5, (q15_t)0x78d3, (q15_t)0x78d1, (q15_t)0x78ce, (q15_t)0x78cc, (q15_t)0x78ca, (q15_t)0x78c8,
+  (q15_t)0x78c6, (q15_t)0x78c4, (q15_t)0x78c2, (q15_t)0x78c0, (q15_t)0x78be, (q15_t)0x78bc, (q15_t)0x78ba, (q15_t)0x78b8,
+  (q15_t)0x78b5, (q15_t)0x78b3, (q15_t)0x78b1, (q15_t)0x78af, (q15_t)0x78ad, (q15_t)0x78ab, (q15_t)0x78a9, (q15_t)0x78a7,
+  (q15_t)0x78a5, (q15_t)0x78a3, (q15_t)0x78a0, (q15_t)0x789e, (q15_t)0x789c, (q15_t)0x789a, (q15_t)0x7898, (q15_t)0x7896,
+  (q15_t)0x7894, (q15_t)0x7892, (q15_t)0x7890, (q15_t)0x788e, (q15_t)0x788b, (q15_t)0x7889, (q15_t)0x7887, (q15_t)0x7885,
+  (q15_t)0x7883, (q15_t)0x7881, (q15_t)0x787f, (q15_t)0x787d, (q15_t)0x787a, (q15_t)0x7878, (q15_t)0x7876, (q15_t)0x7874,
+  (q15_t)0x7872, (q15_t)0x7870, (q15_t)0x786e, (q15_t)0x786c, (q15_t)0x7869, (q15_t)0x7867, (q15_t)0x7865, (q15_t)0x7863,
+  (q15_t)0x7861, (q15_t)0x785f, (q15_t)0x785d, (q15_t)0x785b, (q15_t)0x7858, (q15_t)0x7856, (q15_t)0x7854, (q15_t)0x7852,
+  (q15_t)0x7850, (q15_t)0x784e, (q15_t)0x784c, (q15_t)0x7849, (q15_t)0x7847, (q15_t)0x7845, (q15_t)0x7843, (q15_t)0x7841,
+  (q15_t)0x783f, (q15_t)0x783c, (q15_t)0x783a, (q15_t)0x7838, (q15_t)0x7836, (q15_t)0x7834, (q15_t)0x7832, (q15_t)0x7830,
+  (q15_t)0x782d, (q15_t)0x782b, (q15_t)0x7829, (q15_t)0x7827, (q15_t)0x7825, (q15_t)0x7823, (q15_t)0x7820, (q15_t)0x781e,
+  (q15_t)0x781c, (q15_t)0x781a, (q15_t)0x7818, (q15_t)0x7816, (q15_t)0x7813, (q15_t)0x7811, (q15_t)0x780f, (q15_t)0x780d,
+  (q15_t)0x780b, (q15_t)0x7808, (q15_t)0x7806, (q15_t)0x7804, (q15_t)0x7802, (q15_t)0x7800, (q15_t)0x77fe, (q15_t)0x77fb,
+  (q15_t)0x77f9, (q15_t)0x77f7, (q15_t)0x77f5, (q15_t)0x77f3, (q15_t)0x77f0, (q15_t)0x77ee, (q15_t)0x77ec, (q15_t)0x77ea,
+  (q15_t)0x77e8, (q15_t)0x77e5, (q15_t)0x77e3, (q15_t)0x77e1, (q15_t)0x77df, (q15_t)0x77dd, (q15_t)0x77da, (q15_t)0x77d8,
+  (q15_t)0x77d6, (q15_t)0x77d4, (q15_t)0x77d2, (q15_t)0x77cf, (q15_t)0x77cd, (q15_t)0x77cb, (q15_t)0x77c9, (q15_t)0x77c6,
+  (q15_t)0x77c4, (q15_t)0x77c2, (q15_t)0x77c0, (q15_t)0x77be, (q15_t)0x77bb, (q15_t)0x77b9, (q15_t)0x77b7, (q15_t)0x77b5,
+  (q15_t)0x77b2, (q15_t)0x77b0, (q15_t)0x77ae, (q15_t)0x77ac, (q15_t)0x77aa, (q15_t)0x77a7, (q15_t)0x77a5, (q15_t)0x77a3,
+  (q15_t)0x77a1, (q15_t)0x779e, (q15_t)0x779c, (q15_t)0x779a, (q15_t)0x7798, (q15_t)0x7795, (q15_t)0x7793, (q15_t)0x7791,
+  (q15_t)0x778f, (q15_t)0x778c, (q15_t)0x778a, (q15_t)0x7788, (q15_t)0x7786, (q15_t)0x7783, (q15_t)0x7781, (q15_t)0x777f,
+  (q15_t)0x777d, (q15_t)0x777a, (q15_t)0x7778, (q15_t)0x7776, (q15_t)0x7774, (q15_t)0x7771, (q15_t)0x776f, (q15_t)0x776d,
+  (q15_t)0x776b, (q15_t)0x7768, (q15_t)0x7766, (q15_t)0x7764, (q15_t)0x7762, (q15_t)0x775f, (q15_t)0x775d, (q15_t)0x775b,
+  (q15_t)0x7759, (q15_t)0x7756, (q15_t)0x7754, (q15_t)0x7752, (q15_t)0x774f, (q15_t)0x774d, (q15_t)0x774b, (q15_t)0x7749,
+  (q15_t)0x7746, (q15_t)0x7744, (q15_t)0x7742, (q15_t)0x773f, (q15_t)0x773d, (q15_t)0x773b, (q15_t)0x7739, (q15_t)0x7736,
+  (q15_t)0x7734, (q15_t)0x7732, (q15_t)0x772f, (q15_t)0x772d, (q15_t)0x772b, (q15_t)0x7729, (q15_t)0x7726, (q15_t)0x7724,
+  (q15_t)0x7722, (q15_t)0x771f, (q15_t)0x771d, (q15_t)0x771b, (q15_t)0x7719, (q15_t)0x7716, (q15_t)0x7714, (q15_t)0x7712,
+  (q15_t)0x770f, (q15_t)0x770d, (q15_t)0x770b, (q15_t)0x7708, (q15_t)0x7706, (q15_t)0x7704, (q15_t)0x7701, (q15_t)0x76ff,
+  (q15_t)0x76fd, (q15_t)0x76fa, (q15_t)0x76f8, (q15_t)0x76f6, (q15_t)0x76f4, (q15_t)0x76f1, (q15_t)0x76ef, (q15_t)0x76ed,
+  (q15_t)0x76ea, (q15_t)0x76e8, (q15_t)0x76e6, (q15_t)0x76e3, (q15_t)0x76e1, (q15_t)0x76df, (q15_t)0x76dc, (q15_t)0x76da,
+  (q15_t)0x76d8, (q15_t)0x76d5, (q15_t)0x76d3, (q15_t)0x76d1, (q15_t)0x76ce, (q15_t)0x76cc, (q15_t)0x76ca, (q15_t)0x76c7,
+  (q15_t)0x76c5, (q15_t)0x76c3, (q15_t)0x76c0, (q15_t)0x76be, (q15_t)0x76bc, (q15_t)0x76b9, (q15_t)0x76b7, (q15_t)0x76b4,
+  (q15_t)0x76b2, (q15_t)0x76b0, (q15_t)0x76ad, (q15_t)0x76ab, (q15_t)0x76a9, (q15_t)0x76a6, (q15_t)0x76a4, (q15_t)0x76a2,
+  (q15_t)0x769f, (q15_t)0x769d, (q15_t)0x769b, (q15_t)0x7698, (q15_t)0x7696, (q15_t)0x7693, (q15_t)0x7691, (q15_t)0x768f,
+  (q15_t)0x768c, (q15_t)0x768a, (q15_t)0x7688, (q15_t)0x7685, (q15_t)0x7683, (q15_t)0x7681, (q15_t)0x767e, (q15_t)0x767c,
+  (q15_t)0x7679, (q15_t)0x7677, (q15_t)0x7675, (q15_t)0x7672, (q15_t)0x7670, (q15_t)0x766d, (q15_t)0x766b, (q15_t)0x7669,
+  (q15_t)0x7666, (q15_t)0x7664, (q15_t)0x7662, (q15_t)0x765f, (q15_t)0x765d, (q15_t)0x765a, (q15_t)0x7658, (q15_t)0x7656,
+  (q15_t)0x7653, (q15_t)0x7651, (q15_t)0x764e, (q15_t)0x764c, (q15_t)0x764a, (q15_t)0x7647, (q15_t)0x7645, (q15_t)0x7642,
+  (q15_t)0x7640, (q15_t)0x763e, (q15_t)0x763b, (q15_t)0x7639, (q15_t)0x7636, (q15_t)0x7634, (q15_t)0x7632, (q15_t)0x762f,
+  (q15_t)0x762d, (q15_t)0x762a, (q15_t)0x7628, (q15_t)0x7625, (q15_t)0x7623, (q15_t)0x7621, (q15_t)0x761e, (q15_t)0x761c,
+  (q15_t)0x7619, (q15_t)0x7617, (q15_t)0x7615, (q15_t)0x7612, (q15_t)0x7610, (q15_t)0x760d, (q15_t)0x760b, (q15_t)0x7608,
+  (q15_t)0x7606, (q15_t)0x7604, (q15_t)0x7601, (q15_t)0x75ff, (q15_t)0x75fc, (q15_t)0x75fa, (q15_t)0x75f7, (q15_t)0x75f5,
+  (q15_t)0x75f2, (q15_t)0x75f0, (q15_t)0x75ee, (q15_t)0x75eb, (q15_t)0x75e9, (q15_t)0x75e6, (q15_t)0x75e4, (q15_t)0x75e1,
+  (q15_t)0x75df, (q15_t)0x75dc, (q15_t)0x75da, (q15_t)0x75d8, (q15_t)0x75d5, (q15_t)0x75d3, (q15_t)0x75d0, (q15_t)0x75ce,
+  (q15_t)0x75cb, (q15_t)0x75c9, (q15_t)0x75c6, (q15_t)0x75c4, (q15_t)0x75c1, (q15_t)0x75bf, (q15_t)0x75bc, (q15_t)0x75ba,
+  (q15_t)0x75b8, (q15_t)0x75b5, (q15_t)0x75b3, (q15_t)0x75b0, (q15_t)0x75ae, (q15_t)0x75ab, (q15_t)0x75a9, (q15_t)0x75a6,
+  (q15_t)0x75a4, (q15_t)0x75a1, (q15_t)0x759f, (q15_t)0x759c, (q15_t)0x759a, (q15_t)0x7597, (q15_t)0x7595, (q15_t)0x7592,
+  (q15_t)0x7590, (q15_t)0x758d, (q15_t)0x758b, (q15_t)0x7588, (q15_t)0x7586, (q15_t)0x7584, (q15_t)0x7581, (q15_t)0x757f,
+  (q15_t)0x757c, (q15_t)0x757a, (q15_t)0x7577, (q15_t)0x7575, (q15_t)0x7572, (q15_t)0x7570, (q15_t)0x756d, (q15_t)0x756b,
+  (q15_t)0x7568, (q15_t)0x7566, (q15_t)0x7563, (q15_t)0x7561, (q15_t)0x755e, (q15_t)0x755c, (q15_t)0x7559, (q15_t)0x7556,
+  (q15_t)0x7554, (q15_t)0x7551, (q15_t)0x754f, (q15_t)0x754c, (q15_t)0x754a, (q15_t)0x7547, (q15_t)0x7545, (q15_t)0x7542,
+  (q15_t)0x7540, (q15_t)0x753d, (q15_t)0x753b, (q15_t)0x7538, (q15_t)0x7536, (q15_t)0x7533, (q15_t)0x7531, (q15_t)0x752e,
+  (q15_t)0x752c, (q15_t)0x7529, (q15_t)0x7527, (q15_t)0x7524, (q15_t)0x7522, (q15_t)0x751f, (q15_t)0x751c, (q15_t)0x751a,
+  (q15_t)0x7517, (q15_t)0x7515, (q15_t)0x7512, (q15_t)0x7510, (q15_t)0x750d, (q15_t)0x750b, (q15_t)0x7508, (q15_t)0x7506,
+  (q15_t)0x7503, (q15_t)0x7501, (q15_t)0x74fe, (q15_t)0x74fb, (q15_t)0x74f9, (q15_t)0x74f6, (q15_t)0x74f4, (q15_t)0x74f1,
+  (q15_t)0x74ef, (q15_t)0x74ec, (q15_t)0x74ea, (q15_t)0x74e7, (q15_t)0x74e4, (q15_t)0x74e2, (q15_t)0x74df, (q15_t)0x74dd,
+  (q15_t)0x74da, (q15_t)0x74d8, (q15_t)0x74d5, (q15_t)0x74d2, (q15_t)0x74d0, (q15_t)0x74cd, (q15_t)0x74cb, (q15_t)0x74c8,
+  (q15_t)0x74c6, (q15_t)0x74c3, (q15_t)0x74c0, (q15_t)0x74be, (q15_t)0x74bb, (q15_t)0x74b9, (q15_t)0x74b6, (q15_t)0x74b4,
+  (q15_t)0x74b1, (q15_t)0x74ae, (q15_t)0x74ac, (q15_t)0x74a9, (q15_t)0x74a7, (q15_t)0x74a4, (q15_t)0x74a1, (q15_t)0x749f,
+  (q15_t)0x749c, (q15_t)0x749a, (q15_t)0x7497, (q15_t)0x7495, (q15_t)0x7492, (q15_t)0x748f, (q15_t)0x748d, (q15_t)0x748a,
+  (q15_t)0x7488, (q15_t)0x7485, (q15_t)0x7482, (q15_t)0x7480, (q15_t)0x747d, (q15_t)0x747b, (q15_t)0x7478, (q15_t)0x7475,
+  (q15_t)0x7473, (q15_t)0x7470, (q15_t)0x746d, (q15_t)0x746b, (q15_t)0x7468, (q15_t)0x7466, (q15_t)0x7463, (q15_t)0x7460,
+  (q15_t)0x745e, (q15_t)0x745b, (q15_t)0x7459, (q15_t)0x7456, (q15_t)0x7453, (q15_t)0x7451, (q15_t)0x744e, (q15_t)0x744b,
+  (q15_t)0x7449, (q15_t)0x7446, (q15_t)0x7444, (q15_t)0x7441, (q15_t)0x743e, (q15_t)0x743c, (q15_t)0x7439, (q15_t)0x7436,
+  (q15_t)0x7434, (q15_t)0x7431, (q15_t)0x742f, (q15_t)0x742c, (q15_t)0x7429, (q15_t)0x7427, (q15_t)0x7424, (q15_t)0x7421,
+  (q15_t)0x741f, (q15_t)0x741c, (q15_t)0x7419, (q15_t)0x7417, (q15_t)0x7414, (q15_t)0x7411, (q15_t)0x740f, (q15_t)0x740c,
+  (q15_t)0x740a, (q15_t)0x7407, (q15_t)0x7404, (q15_t)0x7402, (q15_t)0x73ff, (q15_t)0x73fc, (q15_t)0x73fa, (q15_t)0x73f7,
+  (q15_t)0x73f4, (q15_t)0x73f2, (q15_t)0x73ef, (q15_t)0x73ec, (q15_t)0x73ea, (q15_t)0x73e7, (q15_t)0x73e4, (q15_t)0x73e2,
+  (q15_t)0x73df, (q15_t)0x73dc, (q15_t)0x73da, (q15_t)0x73d7, (q15_t)0x73d4, (q15_t)0x73d2, (q15_t)0x73cf, (q15_t)0x73cc,
+  (q15_t)0x73ca, (q15_t)0x73c7, (q15_t)0x73c4, (q15_t)0x73c1, (q15_t)0x73bf, (q15_t)0x73bc, (q15_t)0x73b9, (q15_t)0x73b7,
+  (q15_t)0x73b4, (q15_t)0x73b1, (q15_t)0x73af, (q15_t)0x73ac, (q15_t)0x73a9, (q15_t)0x73a7, (q15_t)0x73a4, (q15_t)0x73a1,
+  (q15_t)0x739f, (q15_t)0x739c, (q15_t)0x7399, (q15_t)0x7396, (q15_t)0x7394, (q15_t)0x7391, (q15_t)0x738e, (q15_t)0x738c,
+  (q15_t)0x7389, (q15_t)0x7386, (q15_t)0x7384, (q15_t)0x7381, (q15_t)0x737e, (q15_t)0x737b, (q15_t)0x7379, (q15_t)0x7376,
+  (q15_t)0x7373, (q15_t)0x7371, (q15_t)0x736e, (q15_t)0x736b, (q15_t)0x7368, (q15_t)0x7366, (q15_t)0x7363, (q15_t)0x7360,
+  (q15_t)0x735e, (q15_t)0x735b, (q15_t)0x7358, (q15_t)0x7355, (q15_t)0x7353, (q15_t)0x7350, (q15_t)0x734d, (q15_t)0x734a,
+  (q15_t)0x7348, (q15_t)0x7345, (q15_t)0x7342, (q15_t)0x7340, (q15_t)0x733d, (q15_t)0x733a, (q15_t)0x7337, (q15_t)0x7335,
+  (q15_t)0x7332, (q15_t)0x732f, (q15_t)0x732c, (q15_t)0x732a, (q15_t)0x7327, (q15_t)0x7324, (q15_t)0x7321, (q15_t)0x731f,
+  (q15_t)0x731c, (q15_t)0x7319, (q15_t)0x7316, (q15_t)0x7314, (q15_t)0x7311, (q15_t)0x730e, (q15_t)0x730b, (q15_t)0x7309,
+  (q15_t)0x7306, (q15_t)0x7303, (q15_t)0x7300, (q15_t)0x72fe, (q15_t)0x72fb, (q15_t)0x72f8, (q15_t)0x72f5, (q15_t)0x72f3,
+  (q15_t)0x72f0, (q15_t)0x72ed, (q15_t)0x72ea, (q15_t)0x72e8, (q15_t)0x72e5, (q15_t)0x72e2, (q15_t)0x72df, (q15_t)0x72dc,
+  (q15_t)0x72da, (q15_t)0x72d7, (q15_t)0x72d4, (q15_t)0x72d1, (q15_t)0x72cf, (q15_t)0x72cc, (q15_t)0x72c9, (q15_t)0x72c6,
+  (q15_t)0x72c3, (q15_t)0x72c1, (q15_t)0x72be, (q15_t)0x72bb, (q15_t)0x72b8, (q15_t)0x72b5, (q15_t)0x72b3, (q15_t)0x72b0,
+  (q15_t)0x72ad, (q15_t)0x72aa, (q15_t)0x72a8, (q15_t)0x72a5, (q15_t)0x72a2, (q15_t)0x729f, (q15_t)0x729c, (q15_t)0x729a,
+  (q15_t)0x7297, (q15_t)0x7294, (q15_t)0x7291, (q15_t)0x728e, (q15_t)0x728c, (q15_t)0x7289, (q15_t)0x7286, (q15_t)0x7283,
+  (q15_t)0x7280, (q15_t)0x727e, (q15_t)0x727b, (q15_t)0x7278, (q15_t)0x7275, (q15_t)0x7272, (q15_t)0x726f, (q15_t)0x726d,
+  (q15_t)0x726a, (q15_t)0x7267, (q15_t)0x7264, (q15_t)0x7261, (q15_t)0x725f, (q15_t)0x725c, (q15_t)0x7259, (q15_t)0x7256,
+  (q15_t)0x7253, (q15_t)0x7250, (q15_t)0x724e, (q15_t)0x724b, (q15_t)0x7248, (q15_t)0x7245, (q15_t)0x7242, (q15_t)0x723f,
+  (q15_t)0x723d, (q15_t)0x723a, (q15_t)0x7237, (q15_t)0x7234, (q15_t)0x7231, (q15_t)0x722e, (q15_t)0x722c, (q15_t)0x7229,
+  (q15_t)0x7226, (q15_t)0x7223, (q15_t)0x7220, (q15_t)0x721d, (q15_t)0x721b, (q15_t)0x7218, (q15_t)0x7215, (q15_t)0x7212,
+  (q15_t)0x720f, (q15_t)0x720c, (q15_t)0x7209, (q15_t)0x7207, (q15_t)0x7204, (q15_t)0x7201, (q15_t)0x71fe, (q15_t)0x71fb,
+  (q15_t)0x71f8, (q15_t)0x71f5, (q15_t)0x71f3, (q15_t)0x71f0, (q15_t)0x71ed, (q15_t)0x71ea, (q15_t)0x71e7, (q15_t)0x71e4,
+  (q15_t)0x71e1, (q15_t)0x71df, (q15_t)0x71dc, (q15_t)0x71d9, (q15_t)0x71d6, (q15_t)0x71d3, (q15_t)0x71d0, (q15_t)0x71cd,
+  (q15_t)0x71ca, (q15_t)0x71c8, (q15_t)0x71c5, (q15_t)0x71c2, (q15_t)0x71bf, (q15_t)0x71bc, (q15_t)0x71b9, (q15_t)0x71b6,
+  (q15_t)0x71b3, (q15_t)0x71b0, (q15_t)0x71ae, (q15_t)0x71ab, (q15_t)0x71a8, (q15_t)0x71a5, (q15_t)0x71a2, (q15_t)0x719f,
+  (q15_t)0x719c, (q15_t)0x7199, (q15_t)0x7196, (q15_t)0x7194, (q15_t)0x7191, (q15_t)0x718e, (q15_t)0x718b, (q15_t)0x7188,
+  (q15_t)0x7185, (q15_t)0x7182, (q15_t)0x717f, (q15_t)0x717c, (q15_t)0x7179, (q15_t)0x7177, (q15_t)0x7174, (q15_t)0x7171,
+  (q15_t)0x716e, (q15_t)0x716b, (q15_t)0x7168, (q15_t)0x7165, (q15_t)0x7162, (q15_t)0x715f, (q15_t)0x715c, (q15_t)0x7159,
+  (q15_t)0x7156, (q15_t)0x7154, (q15_t)0x7151, (q15_t)0x714e, (q15_t)0x714b, (q15_t)0x7148, (q15_t)0x7145, (q15_t)0x7142,
+  (q15_t)0x713f, (q15_t)0x713c, (q15_t)0x7139, (q15_t)0x7136, (q15_t)0x7133, (q15_t)0x7130, (q15_t)0x712d, (q15_t)0x712b,
+  (q15_t)0x7128, (q15_t)0x7125, (q15_t)0x7122, (q15_t)0x711f, (q15_t)0x711c, (q15_t)0x7119, (q15_t)0x7116, (q15_t)0x7113,
+  (q15_t)0x7110, (q15_t)0x710d, (q15_t)0x710a, (q15_t)0x7107, (q15_t)0x7104, (q15_t)0x7101, (q15_t)0x70fe, (q15_t)0x70fb,
+  (q15_t)0x70f8, (q15_t)0x70f6, (q15_t)0x70f3, (q15_t)0x70f0, (q15_t)0x70ed, (q15_t)0x70ea, (q15_t)0x70e7, (q15_t)0x70e4,
+  (q15_t)0x70e1, (q15_t)0x70de, (q15_t)0x70db, (q15_t)0x70d8, (q15_t)0x70d5, (q15_t)0x70d2, (q15_t)0x70cf, (q15_t)0x70cc,
+  (q15_t)0x70c9, (q15_t)0x70c6, (q15_t)0x70c3, (q15_t)0x70c0, (q15_t)0x70bd, (q15_t)0x70ba, (q15_t)0x70b7, (q15_t)0x70b4,
+  (q15_t)0x70b1, (q15_t)0x70ae, (q15_t)0x70ab, (q15_t)0x70a8, (q15_t)0x70a5, (q15_t)0x70a2, (q15_t)0x709f, (q15_t)0x709c,
+  (q15_t)0x7099, (q15_t)0x7096, (q15_t)0x7093, (q15_t)0x7090, (q15_t)0x708d, (q15_t)0x708a, (q15_t)0x7087, (q15_t)0x7084,
+  (q15_t)0x7081, (q15_t)0x707e, (q15_t)0x707b, (q15_t)0x7078, (q15_t)0x7075, (q15_t)0x7072, (q15_t)0x706f, (q15_t)0x706c,
+  (q15_t)0x7069, (q15_t)0x7066, (q15_t)0x7063, (q15_t)0x7060, (q15_t)0x705d, (q15_t)0x705a, (q15_t)0x7057, (q15_t)0x7054,
+  (q15_t)0x7051, (q15_t)0x704e, (q15_t)0x704b, (q15_t)0x7048, (q15_t)0x7045, (q15_t)0x7042, (q15_t)0x703f, (q15_t)0x703c,
+  (q15_t)0x7039, (q15_t)0x7036, (q15_t)0x7033, (q15_t)0x7030, (q15_t)0x702d, (q15_t)0x702a, (q15_t)0x7027, (q15_t)0x7024,
+  (q15_t)0x7021, (q15_t)0x701e, (q15_t)0x701b, (q15_t)0x7018, (q15_t)0x7015, (q15_t)0x7012, (q15_t)0x700f, (q15_t)0x700c,
+  (q15_t)0x7009, (q15_t)0x7006, (q15_t)0x7003, (q15_t)0x7000, (q15_t)0x6ffd, (q15_t)0x6ffa, (q15_t)0x6ff7, (q15_t)0x6ff3,
+  (q15_t)0x6ff0, (q15_t)0x6fed, (q15_t)0x6fea, (q15_t)0x6fe7, (q15_t)0x6fe4, (q15_t)0x6fe1, (q15_t)0x6fde, (q15_t)0x6fdb,
+  (q15_t)0x6fd8, (q15_t)0x6fd5, (q15_t)0x6fd2, (q15_t)0x6fcf, (q15_t)0x6fcc, (q15_t)0x6fc9, (q15_t)0x6fc6, (q15_t)0x6fc3,
+  (q15_t)0x6fc0, (q15_t)0x6fbc, (q15_t)0x6fb9, (q15_t)0x6fb6, (q15_t)0x6fb3, (q15_t)0x6fb0, (q15_t)0x6fad, (q15_t)0x6faa,
+  (q15_t)0x6fa7, (q15_t)0x6fa4, (q15_t)0x6fa1, (q15_t)0x6f9e, (q15_t)0x6f9b, (q15_t)0x6f98, (q15_t)0x6f95, (q15_t)0x6f91,
+  (q15_t)0x6f8e, (q15_t)0x6f8b, (q15_t)0x6f88, (q15_t)0x6f85, (q15_t)0x6f82, (q15_t)0x6f7f, (q15_t)0x6f7c, (q15_t)0x6f79,
+  (q15_t)0x6f76, (q15_t)0x6f73, (q15_t)0x6f70, (q15_t)0x6f6c, (q15_t)0x6f69, (q15_t)0x6f66, (q15_t)0x6f63, (q15_t)0x6f60,
+  (q15_t)0x6f5d, (q15_t)0x6f5a, (q15_t)0x6f57, (q15_t)0x6f54, (q15_t)0x6f51, (q15_t)0x6f4d, (q15_t)0x6f4a, (q15_t)0x6f47,
+  (q15_t)0x6f44, (q15_t)0x6f41, (q15_t)0x6f3e, (q15_t)0x6f3b, (q15_t)0x6f38, (q15_t)0x6f35, (q15_t)0x6f31, (q15_t)0x6f2e,
+  (q15_t)0x6f2b, (q15_t)0x6f28, (q15_t)0x6f25, (q15_t)0x6f22, (q15_t)0x6f1f, (q15_t)0x6f1c, (q15_t)0x6f19, (q15_t)0x6f15,
+  (q15_t)0x6f12, (q15_t)0x6f0f, (q15_t)0x6f0c, (q15_t)0x6f09, (q15_t)0x6f06, (q15_t)0x6f03, (q15_t)0x6f00, (q15_t)0x6efc,
+  (q15_t)0x6ef9, (q15_t)0x6ef6, (q15_t)0x6ef3, (q15_t)0x6ef0, (q15_t)0x6eed, (q15_t)0x6eea, (q15_t)0x6ee7, (q15_t)0x6ee3,
+  (q15_t)0x6ee0, (q15_t)0x6edd, (q15_t)0x6eda, (q15_t)0x6ed7, (q15_t)0x6ed4, (q15_t)0x6ed1, (q15_t)0x6ecd, (q15_t)0x6eca,
+  (q15_t)0x6ec7, (q15_t)0x6ec4, (q15_t)0x6ec1, (q15_t)0x6ebe, (q15_t)0x6eba, (q15_t)0x6eb7, (q15_t)0x6eb4, (q15_t)0x6eb1,
+  (q15_t)0x6eae, (q15_t)0x6eab, (q15_t)0x6ea8, (q15_t)0x6ea4, (q15_t)0x6ea1, (q15_t)0x6e9e, (q15_t)0x6e9b, (q15_t)0x6e98,
+  (q15_t)0x6e95, (q15_t)0x6e91, (q15_t)0x6e8e, (q15_t)0x6e8b, (q15_t)0x6e88, (q15_t)0x6e85, (q15_t)0x6e82, (q15_t)0x6e7e,
+  (q15_t)0x6e7b, (q15_t)0x6e78, (q15_t)0x6e75, (q15_t)0x6e72, (q15_t)0x6e6f, (q15_t)0x6e6b, (q15_t)0x6e68, (q15_t)0x6e65,
+  (q15_t)0x6e62, (q15_t)0x6e5f, (q15_t)0x6e5b, (q15_t)0x6e58, (q15_t)0x6e55, (q15_t)0x6e52, (q15_t)0x6e4f, (q15_t)0x6e4c,
+  (q15_t)0x6e48, (q15_t)0x6e45, (q15_t)0x6e42, (q15_t)0x6e3f, (q15_t)0x6e3c, (q15_t)0x6e38, (q15_t)0x6e35, (q15_t)0x6e32,
+  (q15_t)0x6e2f, (q15_t)0x6e2c, (q15_t)0x6e28, (q15_t)0x6e25, (q15_t)0x6e22, (q15_t)0x6e1f, (q15_t)0x6e1c, (q15_t)0x6e18,
+  (q15_t)0x6e15, (q15_t)0x6e12, (q15_t)0x6e0f, (q15_t)0x6e0c, (q15_t)0x6e08, (q15_t)0x6e05, (q15_t)0x6e02, (q15_t)0x6dff,
+  (q15_t)0x6dfb, (q15_t)0x6df8, (q15_t)0x6df5, (q15_t)0x6df2, (q15_t)0x6def, (q15_t)0x6deb, (q15_t)0x6de8, (q15_t)0x6de5,
+  (q15_t)0x6de2, (q15_t)0x6ddf, (q15_t)0x6ddb, (q15_t)0x6dd8, (q15_t)0x6dd5, (q15_t)0x6dd2, (q15_t)0x6dce, (q15_t)0x6dcb,
+  (q15_t)0x6dc8, (q15_t)0x6dc5, (q15_t)0x6dc1, (q15_t)0x6dbe, (q15_t)0x6dbb, (q15_t)0x6db8, (q15_t)0x6db5, (q15_t)0x6db1,
+  (q15_t)0x6dae, (q15_t)0x6dab, (q15_t)0x6da8, (q15_t)0x6da4, (q15_t)0x6da1, (q15_t)0x6d9e, (q15_t)0x6d9b, (q15_t)0x6d97,
+  (q15_t)0x6d94, (q15_t)0x6d91, (q15_t)0x6d8e, (q15_t)0x6d8a, (q15_t)0x6d87, (q15_t)0x6d84, (q15_t)0x6d81, (q15_t)0x6d7d,
+  (q15_t)0x6d7a, (q15_t)0x6d77, (q15_t)0x6d74, (q15_t)0x6d70, (q15_t)0x6d6d, (q15_t)0x6d6a, (q15_t)0x6d67, (q15_t)0x6d63,
+  (q15_t)0x6d60, (q15_t)0x6d5d, (q15_t)0x6d59, (q15_t)0x6d56, (q15_t)0x6d53, (q15_t)0x6d50, (q15_t)0x6d4c, (q15_t)0x6d49,
+  (q15_t)0x6d46, (q15_t)0x6d43, (q15_t)0x6d3f, (q15_t)0x6d3c, (q15_t)0x6d39, (q15_t)0x6d36, (q15_t)0x6d32, (q15_t)0x6d2f,
+  (q15_t)0x6d2c, (q15_t)0x6d28, (q15_t)0x6d25, (q15_t)0x6d22, (q15_t)0x6d1f, (q15_t)0x6d1b, (q15_t)0x6d18, (q15_t)0x6d15,
+  (q15_t)0x6d11, (q15_t)0x6d0e, (q15_t)0x6d0b, (q15_t)0x6d08, (q15_t)0x6d04, (q15_t)0x6d01, (q15_t)0x6cfe, (q15_t)0x6cfa,
+  (q15_t)0x6cf7, (q15_t)0x6cf4, (q15_t)0x6cf0, (q15_t)0x6ced, (q15_t)0x6cea, (q15_t)0x6ce7, (q15_t)0x6ce3, (q15_t)0x6ce0,
+  (q15_t)0x6cdd, (q15_t)0x6cd9, (q15_t)0x6cd6, (q15_t)0x6cd3, (q15_t)0x6ccf, (q15_t)0x6ccc, (q15_t)0x6cc9, (q15_t)0x6cc5,
+  (q15_t)0x6cc2, (q15_t)0x6cbf, (q15_t)0x6cbc, (q15_t)0x6cb8, (q15_t)0x6cb5, (q15_t)0x6cb2, (q15_t)0x6cae, (q15_t)0x6cab,
+  (q15_t)0x6ca8, (q15_t)0x6ca4, (q15_t)0x6ca1, (q15_t)0x6c9e, (q15_t)0x6c9a, (q15_t)0x6c97, (q15_t)0x6c94, (q15_t)0x6c90,
+  (q15_t)0x6c8d, (q15_t)0x6c8a, (q15_t)0x6c86, (q15_t)0x6c83, (q15_t)0x6c80, (q15_t)0x6c7c, (q15_t)0x6c79, (q15_t)0x6c76,
+  (q15_t)0x6c72, (q15_t)0x6c6f, (q15_t)0x6c6c, (q15_t)0x6c68, (q15_t)0x6c65, (q15_t)0x6c62, (q15_t)0x6c5e, (q15_t)0x6c5b,
+  (q15_t)0x6c58, (q15_t)0x6c54, (q15_t)0x6c51, (q15_t)0x6c4e, (q15_t)0x6c4a, (q15_t)0x6c47, (q15_t)0x6c44, (q15_t)0x6c40,
+  (q15_t)0x6c3d, (q15_t)0x6c39, (q15_t)0x6c36, (q15_t)0x6c33, (q15_t)0x6c2f, (q15_t)0x6c2c, (q15_t)0x6c29, (q15_t)0x6c25,
+  (q15_t)0x6c22, (q15_t)0x6c1f, (q15_t)0x6c1b, (q15_t)0x6c18, (q15_t)0x6c15, (q15_t)0x6c11, (q15_t)0x6c0e, (q15_t)0x6c0a,
+  (q15_t)0x6c07, (q15_t)0x6c04, (q15_t)0x6c00, (q15_t)0x6bfd, (q15_t)0x6bfa, (q15_t)0x6bf6, (q15_t)0x6bf3, (q15_t)0x6bef,
+  (q15_t)0x6bec, (q15_t)0x6be9, (q15_t)0x6be5, (q15_t)0x6be2, (q15_t)0x6bdf, (q15_t)0x6bdb, (q15_t)0x6bd8, (q15_t)0x6bd4,
+  (q15_t)0x6bd1, (q15_t)0x6bce, (q15_t)0x6bca, (q15_t)0x6bc7, (q15_t)0x6bc3, (q15_t)0x6bc0, (q15_t)0x6bbd, (q15_t)0x6bb9,
+  (q15_t)0x6bb6, (q15_t)0x6bb2, (q15_t)0x6baf, (q15_t)0x6bac, (q15_t)0x6ba8, (q15_t)0x6ba5, (q15_t)0x6ba1, (q15_t)0x6b9e,
+  (q15_t)0x6b9b, (q15_t)0x6b97, (q15_t)0x6b94, (q15_t)0x6b90, (q15_t)0x6b8d, (q15_t)0x6b8a, (q15_t)0x6b86, (q15_t)0x6b83,
+  (q15_t)0x6b7f, (q15_t)0x6b7c, (q15_t)0x6b79, (q15_t)0x6b75, (q15_t)0x6b72, (q15_t)0x6b6e, (q15_t)0x6b6b, (q15_t)0x6b68,
+  (q15_t)0x6b64, (q15_t)0x6b61, (q15_t)0x6b5d, (q15_t)0x6b5a, (q15_t)0x6b56, (q15_t)0x6b53, (q15_t)0x6b50, (q15_t)0x6b4c,
+  (q15_t)0x6b49, (q15_t)0x6b45, (q15_t)0x6b42, (q15_t)0x6b3e, (q15_t)0x6b3b, (q15_t)0x6b38, (q15_t)0x6b34, (q15_t)0x6b31,
+  (q15_t)0x6b2d, (q15_t)0x6b2a, (q15_t)0x6b26, (q15_t)0x6b23, (q15_t)0x6b20, (q15_t)0x6b1c, (q15_t)0x6b19, (q15_t)0x6b15,
+  (q15_t)0x6b12, (q15_t)0x6b0e, (q15_t)0x6b0b, (q15_t)0x6b07, (q15_t)0x6b04, (q15_t)0x6b01, (q15_t)0x6afd, (q15_t)0x6afa,
+  (q15_t)0x6af6, (q15_t)0x6af3, (q15_t)0x6aef, (q15_t)0x6aec, (q15_t)0x6ae8, (q15_t)0x6ae5, (q15_t)0x6ae1, (q15_t)0x6ade,
+  (q15_t)0x6adb, (q15_t)0x6ad7, (q15_t)0x6ad4, (q15_t)0x6ad0, (q15_t)0x6acd, (q15_t)0x6ac9, (q15_t)0x6ac6, (q15_t)0x6ac2,
+  (q15_t)0x6abf, (q15_t)0x6abb, (q15_t)0x6ab8, (q15_t)0x6ab4, (q15_t)0x6ab1, (q15_t)0x6aae, (q15_t)0x6aaa, (q15_t)0x6aa7,
+  (q15_t)0x6aa3, (q15_t)0x6aa0, (q15_t)0x6a9c, (q15_t)0x6a99, (q15_t)0x6a95, (q15_t)0x6a92, (q15_t)0x6a8e, (q15_t)0x6a8b,
+  (q15_t)0x6a87, (q15_t)0x6a84, (q15_t)0x6a80, (q15_t)0x6a7d, (q15_t)0x6a79, (q15_t)0x6a76, (q15_t)0x6a72, (q15_t)0x6a6f,
+  (q15_t)0x6a6b, (q15_t)0x6a68, (q15_t)0x6a64, (q15_t)0x6a61, (q15_t)0x6a5d, (q15_t)0x6a5a, (q15_t)0x6a56, (q15_t)0x6a53,
+  (q15_t)0x6a4f, (q15_t)0x6a4c, (q15_t)0x6a48, (q15_t)0x6a45, (q15_t)0x6a41, (q15_t)0x6a3e, (q15_t)0x6a3a, (q15_t)0x6a37,
+  (q15_t)0x6a33, (q15_t)0x6a30, (q15_t)0x6a2c, (q15_t)0x6a29, (q15_t)0x6a25, (q15_t)0x6a22, (q15_t)0x6a1e, (q15_t)0x6a1b,
+  (q15_t)0x6a17, (q15_t)0x6a14, (q15_t)0x6a10, (q15_t)0x6a0d, (q15_t)0x6a09, (q15_t)0x6a06, (q15_t)0x6a02, (q15_t)0x69ff,
+  (q15_t)0x69fb, (q15_t)0x69f8, (q15_t)0x69f4, (q15_t)0x69f1, (q15_t)0x69ed, (q15_t)0x69e9, (q15_t)0x69e6, (q15_t)0x69e2,
+  (q15_t)0x69df, (q15_t)0x69db, (q15_t)0x69d8, (q15_t)0x69d4, (q15_t)0x69d1, (q15_t)0x69cd, (q15_t)0x69ca, (q15_t)0x69c6,
+  (q15_t)0x69c3, (q15_t)0x69bf, (q15_t)0x69bc, (q15_t)0x69b8, (q15_t)0x69b4, (q15_t)0x69b1, (q15_t)0x69ad, (q15_t)0x69aa,
+  (q15_t)0x69a6, (q15_t)0x69a3, (q15_t)0x699f, (q15_t)0x699c, (q15_t)0x6998, (q15_t)0x6995, (q15_t)0x6991, (q15_t)0x698d,
+  (q15_t)0x698a, (q15_t)0x6986, (q15_t)0x6983, (q15_t)0x697f, (q15_t)0x697c, (q15_t)0x6978, (q15_t)0x6975, (q15_t)0x6971,
+  (q15_t)0x696d, (q15_t)0x696a, (q15_t)0x6966, (q15_t)0x6963, (q15_t)0x695f, (q15_t)0x695c, (q15_t)0x6958, (q15_t)0x6954,
+  (q15_t)0x6951, (q15_t)0x694d, (q15_t)0x694a, (q15_t)0x6946, (q15_t)0x6943, (q15_t)0x693f, (q15_t)0x693b, (q15_t)0x6938,
+  (q15_t)0x6934, (q15_t)0x6931, (q15_t)0x692d, (q15_t)0x692a, (q15_t)0x6926, (q15_t)0x6922, (q15_t)0x691f, (q15_t)0x691b,
+  (q15_t)0x6918, (q15_t)0x6914, (q15_t)0x6910, (q15_t)0x690d, (q15_t)0x6909, (q15_t)0x6906, (q15_t)0x6902, (q15_t)0x68fe,
+  (q15_t)0x68fb, (q15_t)0x68f7, (q15_t)0x68f4, (q15_t)0x68f0, (q15_t)0x68ec, (q15_t)0x68e9, (q15_t)0x68e5, (q15_t)0x68e2,
+  (q15_t)0x68de, (q15_t)0x68da, (q15_t)0x68d7, (q15_t)0x68d3, (q15_t)0x68d0, (q15_t)0x68cc, (q15_t)0x68c8, (q15_t)0x68c5,
+  (q15_t)0x68c1, (q15_t)0x68be, (q15_t)0x68ba, (q15_t)0x68b6, (q15_t)0x68b3, (q15_t)0x68af, (q15_t)0x68ac, (q15_t)0x68a8,
+  (q15_t)0x68a4, (q15_t)0x68a1, (q15_t)0x689d, (q15_t)0x6899, (q15_t)0x6896, (q15_t)0x6892, (q15_t)0x688f, (q15_t)0x688b,
+  (q15_t)0x6887, (q15_t)0x6884, (q15_t)0x6880, (q15_t)0x687c, (q15_t)0x6879, (q15_t)0x6875, (q15_t)0x6872, (q15_t)0x686e,
+  (q15_t)0x686a, (q15_t)0x6867, (q15_t)0x6863, (q15_t)0x685f, (q15_t)0x685c, (q15_t)0x6858, (q15_t)0x6854, (q15_t)0x6851,
+  (q15_t)0x684d, (q15_t)0x684a, (q15_t)0x6846, (q15_t)0x6842, (q15_t)0x683f, (q15_t)0x683b, (q15_t)0x6837, (q15_t)0x6834,
+  (q15_t)0x6830, (q15_t)0x682c, (q15_t)0x6829, (q15_t)0x6825, (q15_t)0x6821, (q15_t)0x681e, (q15_t)0x681a, (q15_t)0x6816,
+  (q15_t)0x6813, (q15_t)0x680f, (q15_t)0x680b, (q15_t)0x6808, (q15_t)0x6804, (q15_t)0x6800, (q15_t)0x67fd, (q15_t)0x67f9,
+  (q15_t)0x67f5, (q15_t)0x67f2, (q15_t)0x67ee, (q15_t)0x67ea, (q15_t)0x67e7, (q15_t)0x67e3, (q15_t)0x67df, (q15_t)0x67dc,
+  (q15_t)0x67d8, (q15_t)0x67d4, (q15_t)0x67d1, (q15_t)0x67cd, (q15_t)0x67c9, (q15_t)0x67c6, (q15_t)0x67c2, (q15_t)0x67be,
+  (q15_t)0x67bb, (q15_t)0x67b7, (q15_t)0x67b3, (q15_t)0x67b0, (q15_t)0x67ac, (q15_t)0x67a8, (q15_t)0x67a5, (q15_t)0x67a1,
+  (q15_t)0x679d, (q15_t)0x679a, (q15_t)0x6796, (q15_t)0x6792, (q15_t)0x678e, (q15_t)0x678b, (q15_t)0x6787, (q15_t)0x6783,
+  (q15_t)0x6780, (q15_t)0x677c, (q15_t)0x6778, (q15_t)0x6775, (q15_t)0x6771, (q15_t)0x676d, (q15_t)0x6769, (q15_t)0x6766,
+  (q15_t)0x6762, (q15_t)0x675e, (q15_t)0x675b, (q15_t)0x6757, (q15_t)0x6753, (q15_t)0x6750, (q15_t)0x674c, (q15_t)0x6748,
+  (q15_t)0x6744, (q15_t)0x6741, (q15_t)0x673d, (q15_t)0x6739, (q15_t)0x6736, (q15_t)0x6732, (q15_t)0x672e, (q15_t)0x672a,
+  (q15_t)0x6727, (q15_t)0x6723, (q15_t)0x671f, (q15_t)0x671c, (q15_t)0x6718, (q15_t)0x6714, (q15_t)0x6710, (q15_t)0x670d,
+  (q15_t)0x6709, (q15_t)0x6705, (q15_t)0x6701, (q15_t)0x66fe, (q15_t)0x66fa, (q15_t)0x66f6, (q15_t)0x66f3, (q15_t)0x66ef,
+  (q15_t)0x66eb, (q15_t)0x66e7, (q15_t)0x66e4, (q15_t)0x66e0, (q15_t)0x66dc, (q15_t)0x66d8, (q15_t)0x66d5, (q15_t)0x66d1,
+  (q15_t)0x66cd, (q15_t)0x66c9, (q15_t)0x66c6, (q15_t)0x66c2, (q15_t)0x66be, (q15_t)0x66ba, (q15_t)0x66b7, (q15_t)0x66b3,
+  (q15_t)0x66af, (q15_t)0x66ab, (q15_t)0x66a8, (q15_t)0x66a4, (q15_t)0x66a0, (q15_t)0x669c, (q15_t)0x6699, (q15_t)0x6695,
+  (q15_t)0x6691, (q15_t)0x668d, (q15_t)0x668a, (q15_t)0x6686, (q15_t)0x6682, (q15_t)0x667e, (q15_t)0x667b, (q15_t)0x6677,
+  (q15_t)0x6673, (q15_t)0x666f, (q15_t)0x666b, (q15_t)0x6668, (q15_t)0x6664, (q15_t)0x6660, (q15_t)0x665c, (q15_t)0x6659,
+  (q15_t)0x6655, (q15_t)0x6651, (q15_t)0x664d, (q15_t)0x664a, (q15_t)0x6646, (q15_t)0x6642, (q15_t)0x663e, (q15_t)0x663a,
+  (q15_t)0x6637, (q15_t)0x6633, (q15_t)0x662f, (q15_t)0x662b, (q15_t)0x6627, (q15_t)0x6624, (q15_t)0x6620, (q15_t)0x661c,
+  (q15_t)0x6618, (q15_t)0x6615, (q15_t)0x6611, (q15_t)0x660d, (q15_t)0x6609, (q15_t)0x6605, (q15_t)0x6602, (q15_t)0x65fe,
+  (q15_t)0x65fa, (q15_t)0x65f6, (q15_t)0x65f2, (q15_t)0x65ef, (q15_t)0x65eb, (q15_t)0x65e7, (q15_t)0x65e3, (q15_t)0x65df,
+  (q15_t)0x65dc, (q15_t)0x65d8, (q15_t)0x65d4, (q15_t)0x65d0, (q15_t)0x65cc, (q15_t)0x65c9, (q15_t)0x65c5, (q15_t)0x65c1,
+  (q15_t)0x65bd, (q15_t)0x65b9, (q15_t)0x65b5, (q15_t)0x65b2, (q15_t)0x65ae, (q15_t)0x65aa, (q15_t)0x65a6, (q15_t)0x65a2,
+  (q15_t)0x659f, (q15_t)0x659b, (q15_t)0x6597, (q15_t)0x6593, (q15_t)0x658f, (q15_t)0x658b, (q15_t)0x6588, (q15_t)0x6584,
+  (q15_t)0x6580, (q15_t)0x657c, (q15_t)0x6578, (q15_t)0x6574, (q15_t)0x6571, (q15_t)0x656d, (q15_t)0x6569, (q15_t)0x6565,
+  (q15_t)0x6561, (q15_t)0x655d, (q15_t)0x655a, (q15_t)0x6556, (q15_t)0x6552, (q15_t)0x654e, (q15_t)0x654a, (q15_t)0x6546,
+  (q15_t)0x6543, (q15_t)0x653f, (q15_t)0x653b, (q15_t)0x6537, (q15_t)0x6533, (q15_t)0x652f, (q15_t)0x652c, (q15_t)0x6528,
+  (q15_t)0x6524, (q15_t)0x6520, (q15_t)0x651c, (q15_t)0x6518, (q15_t)0x6514, (q15_t)0x6511, (q15_t)0x650d, (q15_t)0x6509,
+  (q15_t)0x6505, (q15_t)0x6501, (q15_t)0x64fd, (q15_t)0x64f9, (q15_t)0x64f6, (q15_t)0x64f2, (q15_t)0x64ee, (q15_t)0x64ea,
+  (q15_t)0x64e6, (q15_t)0x64e2, (q15_t)0x64de, (q15_t)0x64db, (q15_t)0x64d7, (q15_t)0x64d3, (q15_t)0x64cf, (q15_t)0x64cb,
+  (q15_t)0x64c7, (q15_t)0x64c3, (q15_t)0x64bf, (q15_t)0x64bc, (q15_t)0x64b8, (q15_t)0x64b4, (q15_t)0x64b0, (q15_t)0x64ac,
+  (q15_t)0x64a8, (q15_t)0x64a4, (q15_t)0x64a0, (q15_t)0x649c, (q15_t)0x6499, (q15_t)0x6495, (q15_t)0x6491, (q15_t)0x648d,
+  (q15_t)0x6489, (q15_t)0x6485, (q15_t)0x6481, (q15_t)0x647d, (q15_t)0x6479, (q15_t)0x6476, (q15_t)0x6472, (q15_t)0x646e,
+  (q15_t)0x646a, (q15_t)0x6466, (q15_t)0x6462, (q15_t)0x645e, (q15_t)0x645a, (q15_t)0x6456, (q15_t)0x6453, (q15_t)0x644f,
+  (q15_t)0x644b, (q15_t)0x6447, (q15_t)0x6443, (q15_t)0x643f, (q15_t)0x643b, (q15_t)0x6437, (q15_t)0x6433, (q15_t)0x642f,
+  (q15_t)0x642b, (q15_t)0x6428, (q15_t)0x6424, (q15_t)0x6420, (q15_t)0x641c, (q15_t)0x6418, (q15_t)0x6414, (q15_t)0x6410,
+  (q15_t)0x640c, (q15_t)0x6408, (q15_t)0x6404, (q15_t)0x6400, (q15_t)0x63fc, (q15_t)0x63f9, (q15_t)0x63f5, (q15_t)0x63f1,
+  (q15_t)0x63ed, (q15_t)0x63e9, (q15_t)0x63e5, (q15_t)0x63e1, (q15_t)0x63dd, (q15_t)0x63d9, (q15_t)0x63d5, (q15_t)0x63d1,
+  (q15_t)0x63cd, (q15_t)0x63c9, (q15_t)0x63c5, (q15_t)0x63c1, (q15_t)0x63be, (q15_t)0x63ba, (q15_t)0x63b6, (q15_t)0x63b2,
+  (q15_t)0x63ae, (q15_t)0x63aa, (q15_t)0x63a6, (q15_t)0x63a2, (q15_t)0x639e, (q15_t)0x639a, (q15_t)0x6396, (q15_t)0x6392,
+  (q15_t)0x638e, (q15_t)0x638a, (q15_t)0x6386, (q15_t)0x6382, (q15_t)0x637e, (q15_t)0x637a, (q15_t)0x6377, (q15_t)0x6373,
+  (q15_t)0x636f, (q15_t)0x636b, (q15_t)0x6367, (q15_t)0x6363, (q15_t)0x635f, (q15_t)0x635b, (q15_t)0x6357, (q15_t)0x6353,
+  (q15_t)0x634f, (q15_t)0x634b, (q15_t)0x6347, (q15_t)0x6343, (q15_t)0x633f, (q15_t)0x633b, (q15_t)0x6337, (q15_t)0x6333,
+  (q15_t)0x632f, (q15_t)0x632b, (q15_t)0x6327, (q15_t)0x6323, (q15_t)0x631f, (q15_t)0x631b, (q15_t)0x6317, (q15_t)0x6313,
+  (q15_t)0x630f, (q15_t)0x630b, (q15_t)0x6307, (q15_t)0x6303, (q15_t)0x62ff, (q15_t)0x62fb, (q15_t)0x62f7, (q15_t)0x62f3,
+  (q15_t)0x62f0, (q15_t)0x62ec, (q15_t)0x62e8, (q15_t)0x62e4, (q15_t)0x62e0, (q15_t)0x62dc, (q15_t)0x62d8, (q15_t)0x62d4,
+  (q15_t)0x62d0, (q15_t)0x62cc, (q15_t)0x62c8, (q15_t)0x62c4, (q15_t)0x62c0, (q15_t)0x62bc, (q15_t)0x62b8, (q15_t)0x62b4,
+  (q15_t)0x62b0, (q15_t)0x62ac, (q15_t)0x62a8, (q15_t)0x62a4, (q15_t)0x62a0, (q15_t)0x629c, (q15_t)0x6298, (q15_t)0x6294,
+  (q15_t)0x6290, (q15_t)0x628c, (q15_t)0x6288, (q15_t)0x6284, (q15_t)0x6280, (q15_t)0x627c, (q15_t)0x6278, (q15_t)0x6273,
+  (q15_t)0x626f, (q15_t)0x626b, (q15_t)0x6267, (q15_t)0x6263, (q15_t)0x625f, (q15_t)0x625b, (q15_t)0x6257, (q15_t)0x6253,
+  (q15_t)0x624f, (q15_t)0x624b, (q15_t)0x6247, (q15_t)0x6243, (q15_t)0x623f, (q15_t)0x623b, (q15_t)0x6237, (q15_t)0x6233,
+  (q15_t)0x622f, (q15_t)0x622b, (q15_t)0x6227, (q15_t)0x6223, (q15_t)0x621f, (q15_t)0x621b, (q15_t)0x6217, (q15_t)0x6213,
+  (q15_t)0x620f, (q15_t)0x620b, (q15_t)0x6207, (q15_t)0x6203, (q15_t)0x61ff, (q15_t)0x61fb, (q15_t)0x61f7, (q15_t)0x61f3,
+  (q15_t)0x61ee, (q15_t)0x61ea, (q15_t)0x61e6, (q15_t)0x61e2, (q15_t)0x61de, (q15_t)0x61da, (q15_t)0x61d6, (q15_t)0x61d2,
+  (q15_t)0x61ce, (q15_t)0x61ca, (q15_t)0x61c6, (q15_t)0x61c2, (q15_t)0x61be, (q15_t)0x61ba, (q15_t)0x61b6, (q15_t)0x61b2,
+  (q15_t)0x61ae, (q15_t)0x61aa, (q15_t)0x61a6, (q15_t)0x61a1, (q15_t)0x619d, (q15_t)0x6199, (q15_t)0x6195, (q15_t)0x6191,
+  (q15_t)0x618d, (q15_t)0x6189, (q15_t)0x6185, (q15_t)0x6181, (q15_t)0x617d, (q15_t)0x6179, (q15_t)0x6175, (q15_t)0x6171,
+  (q15_t)0x616d, (q15_t)0x6168, (q15_t)0x6164, (q15_t)0x6160, (q15_t)0x615c, (q15_t)0x6158, (q15_t)0x6154, (q15_t)0x6150,
+  (q15_t)0x614c, (q15_t)0x6148, (q15_t)0x6144, (q15_t)0x6140, (q15_t)0x613c, (q15_t)0x6137, (q15_t)0x6133, (q15_t)0x612f,
+  (q15_t)0x612b, (q15_t)0x6127, (q15_t)0x6123, (q15_t)0x611f, (q15_t)0x611b, (q15_t)0x6117, (q15_t)0x6113, (q15_t)0x610f,
+  (q15_t)0x610a, (q15_t)0x6106, (q15_t)0x6102, (q15_t)0x60fe, (q15_t)0x60fa, (q15_t)0x60f6, (q15_t)0x60f2, (q15_t)0x60ee,
+  (q15_t)0x60ea, (q15_t)0x60e6, (q15_t)0x60e1, (q15_t)0x60dd, (q15_t)0x60d9, (q15_t)0x60d5, (q15_t)0x60d1, (q15_t)0x60cd,
+  (q15_t)0x60c9, (q15_t)0x60c5, (q15_t)0x60c1, (q15_t)0x60bc, (q15_t)0x60b8, (q15_t)0x60b4, (q15_t)0x60b0, (q15_t)0x60ac,
+  (q15_t)0x60a8, (q15_t)0x60a4, (q15_t)0x60a0, (q15_t)0x609c, (q15_t)0x6097, (q15_t)0x6093, (q15_t)0x608f, (q15_t)0x608b,
+  (q15_t)0x6087, (q15_t)0x6083, (q15_t)0x607f, (q15_t)0x607b, (q15_t)0x6076, (q15_t)0x6072, (q15_t)0x606e, (q15_t)0x606a,
+  (q15_t)0x6066, (q15_t)0x6062, (q15_t)0x605e, (q15_t)0x6059, (q15_t)0x6055, (q15_t)0x6051, (q15_t)0x604d, (q15_t)0x6049,
+  (q15_t)0x6045, (q15_t)0x6041, (q15_t)0x603c, (q15_t)0x6038, (q15_t)0x6034, (q15_t)0x6030, (q15_t)0x602c, (q15_t)0x6028,
+  (q15_t)0x6024, (q15_t)0x601f, (q15_t)0x601b, (q15_t)0x6017, (q15_t)0x6013, (q15_t)0x600f, (q15_t)0x600b, (q15_t)0x6007,
+  (q15_t)0x6002, (q15_t)0x5ffe, (q15_t)0x5ffa, (q15_t)0x5ff6, (q15_t)0x5ff2, (q15_t)0x5fee, (q15_t)0x5fe9, (q15_t)0x5fe5,
+  (q15_t)0x5fe1, (q15_t)0x5fdd, (q15_t)0x5fd9, (q15_t)0x5fd5, (q15_t)0x5fd0, (q15_t)0x5fcc, (q15_t)0x5fc8, (q15_t)0x5fc4,
+  (q15_t)0x5fc0, (q15_t)0x5fbc, (q15_t)0x5fb7, (q15_t)0x5fb3, (q15_t)0x5faf, (q15_t)0x5fab, (q15_t)0x5fa7, (q15_t)0x5fa3,
+  (q15_t)0x5f9e, (q15_t)0x5f9a, (q15_t)0x5f96, (q15_t)0x5f92, (q15_t)0x5f8e, (q15_t)0x5f8a, (q15_t)0x5f85, (q15_t)0x5f81,
+  (q15_t)0x5f7d, (q15_t)0x5f79, (q15_t)0x5f75, (q15_t)0x5f70, (q15_t)0x5f6c, (q15_t)0x5f68, (q15_t)0x5f64, (q15_t)0x5f60,
+  (q15_t)0x5f5b, (q15_t)0x5f57, (q15_t)0x5f53, (q15_t)0x5f4f, (q15_t)0x5f4b, (q15_t)0x5f46, (q15_t)0x5f42, (q15_t)0x5f3e,
+  (q15_t)0x5f3a, (q15_t)0x5f36, (q15_t)0x5f31, (q15_t)0x5f2d, (q15_t)0x5f29, (q15_t)0x5f25, (q15_t)0x5f21, (q15_t)0x5f1c,
+  (q15_t)0x5f18, (q15_t)0x5f14, (q15_t)0x5f10, (q15_t)0x5f0c, (q15_t)0x5f07, (q15_t)0x5f03, (q15_t)0x5eff, (q15_t)0x5efb,
+  (q15_t)0x5ef7, (q15_t)0x5ef2, (q15_t)0x5eee, (q15_t)0x5eea, (q15_t)0x5ee6, (q15_t)0x5ee2, (q15_t)0x5edd, (q15_t)0x5ed9,
+  (q15_t)0x5ed5, (q15_t)0x5ed1, (q15_t)0x5ecc, (q15_t)0x5ec8, (q15_t)0x5ec4, (q15_t)0x5ec0, (q15_t)0x5ebc, (q15_t)0x5eb7,
+  (q15_t)0x5eb3, (q15_t)0x5eaf, (q15_t)0x5eab, (q15_t)0x5ea6, (q15_t)0x5ea2, (q15_t)0x5e9e, (q15_t)0x5e9a, (q15_t)0x5e95,
+  (q15_t)0x5e91, (q15_t)0x5e8d, (q15_t)0x5e89, (q15_t)0x5e85, (q15_t)0x5e80, (q15_t)0x5e7c, (q15_t)0x5e78, (q15_t)0x5e74,
+  (q15_t)0x5e6f, (q15_t)0x5e6b, (q15_t)0x5e67, (q15_t)0x5e63, (q15_t)0x5e5e, (q15_t)0x5e5a, (q15_t)0x5e56, (q15_t)0x5e52,
+  (q15_t)0x5e4d, (q15_t)0x5e49, (q15_t)0x5e45, (q15_t)0x5e41, (q15_t)0x5e3c, (q15_t)0x5e38, (q15_t)0x5e34, (q15_t)0x5e30,
+  (q15_t)0x5e2b, (q15_t)0x5e27, (q15_t)0x5e23, (q15_t)0x5e1f, (q15_t)0x5e1a, (q15_t)0x5e16, (q15_t)0x5e12, (q15_t)0x5e0e,
+  (q15_t)0x5e09, (q15_t)0x5e05, (q15_t)0x5e01, (q15_t)0x5dfd, (q15_t)0x5df8, (q15_t)0x5df4, (q15_t)0x5df0, (q15_t)0x5deb,
+  (q15_t)0x5de7, (q15_t)0x5de3, (q15_t)0x5ddf, (q15_t)0x5dda, (q15_t)0x5dd6, (q15_t)0x5dd2, (q15_t)0x5dce, (q15_t)0x5dc9,
+  (q15_t)0x5dc5, (q15_t)0x5dc1, (q15_t)0x5dbc, (q15_t)0x5db8, (q15_t)0x5db4, (q15_t)0x5db0, (q15_t)0x5dab, (q15_t)0x5da7,
+  (q15_t)0x5da3, (q15_t)0x5d9e, (q15_t)0x5d9a, (q15_t)0x5d96, (q15_t)0x5d92, (q15_t)0x5d8d, (q15_t)0x5d89, (q15_t)0x5d85,
+  (q15_t)0x5d80, (q15_t)0x5d7c, (q15_t)0x5d78, (q15_t)0x5d74, (q15_t)0x5d6f, (q15_t)0x5d6b, (q15_t)0x5d67, (q15_t)0x5d62,
+  (q15_t)0x5d5e, (q15_t)0x5d5a, (q15_t)0x5d55, (q15_t)0x5d51, (q15_t)0x5d4d, (q15_t)0x5d49, (q15_t)0x5d44, (q15_t)0x5d40,
+  (q15_t)0x5d3c, (q15_t)0x5d37, (q15_t)0x5d33, (q15_t)0x5d2f, (q15_t)0x5d2a, (q15_t)0x5d26, (q15_t)0x5d22, (q15_t)0x5d1e,
+  (q15_t)0x5d19, (q15_t)0x5d15, (q15_t)0x5d11, (q15_t)0x5d0c, (q15_t)0x5d08, (q15_t)0x5d04, (q15_t)0x5cff, (q15_t)0x5cfb,
+  (q15_t)0x5cf7, (q15_t)0x5cf2, (q15_t)0x5cee, (q15_t)0x5cea, (q15_t)0x5ce5, (q15_t)0x5ce1, (q15_t)0x5cdd, (q15_t)0x5cd8,
+  (q15_t)0x5cd4, (q15_t)0x5cd0, (q15_t)0x5ccb, (q15_t)0x5cc7, (q15_t)0x5cc3, (q15_t)0x5cbe, (q15_t)0x5cba, (q15_t)0x5cb6,
+  (q15_t)0x5cb1, (q15_t)0x5cad, (q15_t)0x5ca9, (q15_t)0x5ca4, (q15_t)0x5ca0, (q15_t)0x5c9c, (q15_t)0x5c97, (q15_t)0x5c93,
+  (q15_t)0x5c8f, (q15_t)0x5c8a, (q15_t)0x5c86, (q15_t)0x5c82, (q15_t)0x5c7d, (q15_t)0x5c79, (q15_t)0x5c75, (q15_t)0x5c70,
+  (q15_t)0x5c6c, (q15_t)0x5c68, (q15_t)0x5c63, (q15_t)0x5c5f, (q15_t)0x5c5b, (q15_t)0x5c56, (q15_t)0x5c52, (q15_t)0x5c4e,
+  (q15_t)0x5c49, (q15_t)0x5c45, (q15_t)0x5c41, (q15_t)0x5c3c, (q15_t)0x5c38, (q15_t)0x5c33, (q15_t)0x5c2f, (q15_t)0x5c2b,
+  (q15_t)0x5c26, (q15_t)0x5c22, (q15_t)0x5c1e, (q15_t)0x5c19, (q15_t)0x5c15, (q15_t)0x5c11, (q15_t)0x5c0c, (q15_t)0x5c08,
+  (q15_t)0x5c03, (q15_t)0x5bff, (q15_t)0x5bfb, (q15_t)0x5bf6, (q15_t)0x5bf2, (q15_t)0x5bee, (q15_t)0x5be9, (q15_t)0x5be5,
+  (q15_t)0x5be0, (q15_t)0x5bdc, (q15_t)0x5bd8, (q15_t)0x5bd3, (q15_t)0x5bcf, (q15_t)0x5bcb, (q15_t)0x5bc6, (q15_t)0x5bc2,
+  (q15_t)0x5bbd, (q15_t)0x5bb9, (q15_t)0x5bb5, (q15_t)0x5bb0, (q15_t)0x5bac, (q15_t)0x5ba8, (q15_t)0x5ba3, (q15_t)0x5b9f,
+  (q15_t)0x5b9a, (q15_t)0x5b96, (q15_t)0x5b92, (q15_t)0x5b8d, (q15_t)0x5b89, (q15_t)0x5b84, (q15_t)0x5b80, (q15_t)0x5b7c,
+  (q15_t)0x5b77, (q15_t)0x5b73, (q15_t)0x5b6e, (q15_t)0x5b6a, (q15_t)0x5b66, (q15_t)0x5b61, (q15_t)0x5b5d, (q15_t)0x5b58,
+  (q15_t)0x5b54, (q15_t)0x5b50, (q15_t)0x5b4b, (q15_t)0x5b47, (q15_t)0x5b42, (q15_t)0x5b3e, (q15_t)0x5b3a, (q15_t)0x5b35,
+  (q15_t)0x5b31, (q15_t)0x5b2c, (q15_t)0x5b28, (q15_t)0x5b24, (q15_t)0x5b1f, (q15_t)0x5b1b, (q15_t)0x5b16, (q15_t)0x5b12,
+  (q15_t)0x5b0e, (q15_t)0x5b09, (q15_t)0x5b05, (q15_t)0x5b00, (q15_t)0x5afc, (q15_t)0x5af7, (q15_t)0x5af3, (q15_t)0x5aef,
+  (q15_t)0x5aea, (q15_t)0x5ae6, (q15_t)0x5ae1, (q15_t)0x5add, (q15_t)0x5ad8, (q15_t)0x5ad4, (q15_t)0x5ad0, (q15_t)0x5acb,
+  (q15_t)0x5ac7, (q15_t)0x5ac2, (q15_t)0x5abe, (q15_t)0x5ab9, (q15_t)0x5ab5, (q15_t)0x5ab1, (q15_t)0x5aac, (q15_t)0x5aa8,
+  (q15_t)0x5aa3, (q15_t)0x5a9f, (q15_t)0x5a9a, (q15_t)0x5a96, (q15_t)0x5a92, (q15_t)0x5a8d, (q15_t)0x5a89, (q15_t)0x5a84,
+  (q15_t)0x5a80, (q15_t)0x5a7b, (q15_t)0x5a77, (q15_t)0x5a72, (q15_t)0x5a6e, (q15_t)0x5a6a, (q15_t)0x5a65, (q15_t)0x5a61,
+  (q15_t)0x5a5c, (q15_t)0x5a58, (q15_t)0x5a53, (q15_t)0x5a4f, (q15_t)0x5a4a, (q15_t)0x5a46, (q15_t)0x5a41, (q15_t)0x5a3d,
+  (q15_t)0x5a39, (q15_t)0x5a34, (q15_t)0x5a30, (q15_t)0x5a2b, (q15_t)0x5a27, (q15_t)0x5a22, (q15_t)0x5a1e, (q15_t)0x5a19,
+  (q15_t)0x5a15, (q15_t)0x5a10, (q15_t)0x5a0c, (q15_t)0x5a07, (q15_t)0x5a03, (q15_t)0x59ff, (q15_t)0x59fa, (q15_t)0x59f6,
+  (q15_t)0x59f1, (q15_t)0x59ed, (q15_t)0x59e8, (q15_t)0x59e4, (q15_t)0x59df, (q15_t)0x59db, (q15_t)0x59d6, (q15_t)0x59d2,
+  (q15_t)0x59cd, (q15_t)0x59c9, (q15_t)0x59c4, (q15_t)0x59c0, (q15_t)0x59bb, (q15_t)0x59b7, (q15_t)0x59b2, (q15_t)0x59ae,
+  (q15_t)0x59a9, (q15_t)0x59a5, (q15_t)0x59a1, (q15_t)0x599c, (q15_t)0x5998, (q15_t)0x5993, (q15_t)0x598f, (q15_t)0x598a,
+  (q15_t)0x5986, (q15_t)0x5981, (q15_t)0x597d, (q15_t)0x5978, (q15_t)0x5974, (q15_t)0x596f, (q15_t)0x596b, (q15_t)0x5966,
+  (q15_t)0x5962, (q15_t)0x595d, (q15_t)0x5959, (q15_t)0x5954, (q15_t)0x5950, (q15_t)0x594b, (q15_t)0x5947, (q15_t)0x5942,
+  (q15_t)0x593e, (q15_t)0x5939, (q15_t)0x5935, (q15_t)0x5930, (q15_t)0x592c, (q15_t)0x5927, (q15_t)0x5923, (q15_t)0x591e,
+  (q15_t)0x591a, (q15_t)0x5915, (q15_t)0x5911, (q15_t)0x590c, (q15_t)0x5908, (q15_t)0x5903, (q15_t)0x58fe, (q15_t)0x58fa,
+  (q15_t)0x58f5, (q15_t)0x58f1, (q15_t)0x58ec, (q15_t)0x58e8, (q15_t)0x58e3, (q15_t)0x58df, (q15_t)0x58da, (q15_t)0x58d6,
+  (q15_t)0x58d1, (q15_t)0x58cd, (q15_t)0x58c8, (q15_t)0x58c4, (q15_t)0x58bf, (q15_t)0x58bb, (q15_t)0x58b6, (q15_t)0x58b2,
+  (q15_t)0x58ad, (q15_t)0x58a9, (q15_t)0x58a4, (q15_t)0x589f, (q15_t)0x589b, (q15_t)0x5896, (q15_t)0x5892, (q15_t)0x588d,
+  (q15_t)0x5889, (q15_t)0x5884, (q15_t)0x5880, (q15_t)0x587b, (q15_t)0x5877, (q15_t)0x5872, (q15_t)0x586e, (q15_t)0x5869,
+  (q15_t)0x5864, (q15_t)0x5860, (q15_t)0x585b, (q15_t)0x5857, (q15_t)0x5852, (q15_t)0x584e, (q15_t)0x5849, (q15_t)0x5845,
+  (q15_t)0x5840, (q15_t)0x583c, (q15_t)0x5837, (q15_t)0x5832, (q15_t)0x582e, (q15_t)0x5829, (q15_t)0x5825, (q15_t)0x5820,
+  (q15_t)0x581c, (q15_t)0x5817, (q15_t)0x5813, (q15_t)0x580e, (q15_t)0x5809, (q15_t)0x5805, (q15_t)0x5800, (q15_t)0x57fc,
+  (q15_t)0x57f7, (q15_t)0x57f3, (q15_t)0x57ee, (q15_t)0x57e9, (q15_t)0x57e5, (q15_t)0x57e0, (q15_t)0x57dc, (q15_t)0x57d7,
+  (q15_t)0x57d3, (q15_t)0x57ce, (q15_t)0x57c9, (q15_t)0x57c5, (q15_t)0x57c0, (q15_t)0x57bc, (q15_t)0x57b7, (q15_t)0x57b3,
+  (q15_t)0x57ae, (q15_t)0x57a9, (q15_t)0x57a5, (q15_t)0x57a0, (q15_t)0x579c, (q15_t)0x5797, (q15_t)0x5793, (q15_t)0x578e,
+  (q15_t)0x5789, (q15_t)0x5785, (q15_t)0x5780, (q15_t)0x577c, (q15_t)0x5777, (q15_t)0x5772, (q15_t)0x576e, (q15_t)0x5769,
+  (q15_t)0x5765, (q15_t)0x5760, (q15_t)0x575c, (q15_t)0x5757, (q15_t)0x5752, (q15_t)0x574e, (q15_t)0x5749, (q15_t)0x5745,
+  (q15_t)0x5740, (q15_t)0x573b, (q15_t)0x5737, (q15_t)0x5732, (q15_t)0x572e, (q15_t)0x5729, (q15_t)0x5724, (q15_t)0x5720,
+  (q15_t)0x571b, (q15_t)0x5717, (q15_t)0x5712, (q15_t)0x570d, (q15_t)0x5709, (q15_t)0x5704, (q15_t)0x56ff, (q15_t)0x56fb,
+  (q15_t)0x56f6, (q15_t)0x56f2, (q15_t)0x56ed, (q15_t)0x56e8, (q15_t)0x56e4, (q15_t)0x56df, (q15_t)0x56db, (q15_t)0x56d6,
+  (q15_t)0x56d1, (q15_t)0x56cd, (q15_t)0x56c8, (q15_t)0x56c4, (q15_t)0x56bf, (q15_t)0x56ba, (q15_t)0x56b6, (q15_t)0x56b1,
+  (q15_t)0x56ac, (q15_t)0x56a8, (q15_t)0x56a3, (q15_t)0x569f, (q15_t)0x569a, (q15_t)0x5695, (q15_t)0x5691, (q15_t)0x568c,
+  (q15_t)0x5687, (q15_t)0x5683, (q15_t)0x567e, (q15_t)0x5679, (q15_t)0x5675, (q15_t)0x5670, (q15_t)0x566c, (q15_t)0x5667,
+  (q15_t)0x5662, (q15_t)0x565e, (q15_t)0x5659, (q15_t)0x5654, (q15_t)0x5650, (q15_t)0x564b, (q15_t)0x5646, (q15_t)0x5642,
+  (q15_t)0x563d, (q15_t)0x5639, (q15_t)0x5634, (q15_t)0x562f, (q15_t)0x562b, (q15_t)0x5626, (q15_t)0x5621, (q15_t)0x561d,
+  (q15_t)0x5618, (q15_t)0x5613, (q15_t)0x560f, (q15_t)0x560a, (q15_t)0x5605, (q15_t)0x5601, (q15_t)0x55fc, (q15_t)0x55f7,
+  (q15_t)0x55f3, (q15_t)0x55ee, (q15_t)0x55ea, (q15_t)0x55e5, (q15_t)0x55e0, (q15_t)0x55dc, (q15_t)0x55d7, (q15_t)0x55d2,
+  (q15_t)0x55ce, (q15_t)0x55c9, (q15_t)0x55c4, (q15_t)0x55c0, (q15_t)0x55bb, (q15_t)0x55b6, (q15_t)0x55b2, (q15_t)0x55ad,
+  (q15_t)0x55a8, (q15_t)0x55a4, (q15_t)0x559f, (q15_t)0x559a, (q15_t)0x5596, (q15_t)0x5591, (q15_t)0x558c, (q15_t)0x5588,
+  (q15_t)0x5583, (q15_t)0x557e, (q15_t)0x5579, (q15_t)0x5575, (q15_t)0x5570, (q15_t)0x556b, (q15_t)0x5567, (q15_t)0x5562,
+  (q15_t)0x555d, (q15_t)0x5559, (q15_t)0x5554, (q15_t)0x554f, (q15_t)0x554b, (q15_t)0x5546, (q15_t)0x5541, (q15_t)0x553d,
+  (q15_t)0x5538, (q15_t)0x5533, (q15_t)0x552f, (q15_t)0x552a, (q15_t)0x5525, (q15_t)0x5520, (q15_t)0x551c, (q15_t)0x5517,
+  (q15_t)0x5512, (q15_t)0x550e, (q15_t)0x5509, (q15_t)0x5504, (q15_t)0x5500, (q15_t)0x54fb, (q15_t)0x54f6, (q15_t)0x54f2,
+  (q15_t)0x54ed, (q15_t)0x54e8, (q15_t)0x54e3, (q15_t)0x54df, (q15_t)0x54da, (q15_t)0x54d5, (q15_t)0x54d1, (q15_t)0x54cc,
+  (q15_t)0x54c7, (q15_t)0x54c2, (q15_t)0x54be, (q15_t)0x54b9, (q15_t)0x54b4, (q15_t)0x54b0, (q15_t)0x54ab, (q15_t)0x54a6,
+  (q15_t)0x54a2, (q15_t)0x549d, (q15_t)0x5498, (q15_t)0x5493, (q15_t)0x548f, (q15_t)0x548a, (q15_t)0x5485, (q15_t)0x5480,
+  (q15_t)0x547c, (q15_t)0x5477, (q15_t)0x5472, (q15_t)0x546e, (q15_t)0x5469, (q15_t)0x5464, (q15_t)0x545f, (q15_t)0x545b,
+  (q15_t)0x5456, (q15_t)0x5451, (q15_t)0x544d, (q15_t)0x5448, (q15_t)0x5443, (q15_t)0x543e, (q15_t)0x543a, (q15_t)0x5435,
+  (q15_t)0x5430, (q15_t)0x542b, (q15_t)0x5427, (q15_t)0x5422, (q15_t)0x541d, (q15_t)0x5418, (q15_t)0x5414, (q15_t)0x540f,
+  (q15_t)0x540a, (q15_t)0x5406, (q15_t)0x5401, (q15_t)0x53fc, (q15_t)0x53f7, (q15_t)0x53f3, (q15_t)0x53ee, (q15_t)0x53e9,
+  (q15_t)0x53e4, (q15_t)0x53e0, (q15_t)0x53db, (q15_t)0x53d6, (q15_t)0x53d1, (q15_t)0x53cd, (q15_t)0x53c8, (q15_t)0x53c3,
+  (q15_t)0x53be, (q15_t)0x53ba, (q15_t)0x53b5, (q15_t)0x53b0, (q15_t)0x53ab, (q15_t)0x53a7, (q15_t)0x53a2, (q15_t)0x539d,
+  (q15_t)0x5398, (q15_t)0x5394, (q15_t)0x538f, (q15_t)0x538a, (q15_t)0x5385, (q15_t)0x5380, (q15_t)0x537c, (q15_t)0x5377,
+  (q15_t)0x5372, (q15_t)0x536d, (q15_t)0x5369, (q15_t)0x5364, (q15_t)0x535f, (q15_t)0x535a, (q15_t)0x5356, (q15_t)0x5351,
+  (q15_t)0x534c, (q15_t)0x5347, (q15_t)0x5343, (q15_t)0x533e, (q15_t)0x5339, (q15_t)0x5334, (q15_t)0x532f, (q15_t)0x532b,
+  (q15_t)0x5326, (q15_t)0x5321, (q15_t)0x531c, (q15_t)0x5318, (q15_t)0x5313, (q15_t)0x530e, (q15_t)0x5309, (q15_t)0x5304,
+  (q15_t)0x5300, (q15_t)0x52fb, (q15_t)0x52f6, (q15_t)0x52f1, (q15_t)0x52ec, (q15_t)0x52e8, (q15_t)0x52e3, (q15_t)0x52de,
+  (q15_t)0x52d9, (q15_t)0x52d5, (q15_t)0x52d0, (q15_t)0x52cb, (q15_t)0x52c6, (q15_t)0x52c1, (q15_t)0x52bd, (q15_t)0x52b8,
+  (q15_t)0x52b3, (q15_t)0x52ae, (q15_t)0x52a9, (q15_t)0x52a5, (q15_t)0x52a0, (q15_t)0x529b, (q15_t)0x5296, (q15_t)0x5291,
+  (q15_t)0x528d, (q15_t)0x5288, (q15_t)0x5283, (q15_t)0x527e, (q15_t)0x5279, (q15_t)0x5275, (q15_t)0x5270, (q15_t)0x526b,
+  (q15_t)0x5266, (q15_t)0x5261, (q15_t)0x525d, (q15_t)0x5258, (q15_t)0x5253, (q15_t)0x524e, (q15_t)0x5249, (q15_t)0x5244,
+  (q15_t)0x5240, (q15_t)0x523b, (q15_t)0x5236, (q15_t)0x5231, (q15_t)0x522c, (q15_t)0x5228, (q15_t)0x5223, (q15_t)0x521e,
+  (q15_t)0x5219, (q15_t)0x5214, (q15_t)0x520f, (q15_t)0x520b, (q15_t)0x5206, (q15_t)0x5201, (q15_t)0x51fc, (q15_t)0x51f7,
+  (q15_t)0x51f3, (q15_t)0x51ee, (q15_t)0x51e9, (q15_t)0x51e4, (q15_t)0x51df, (q15_t)0x51da, (q15_t)0x51d6, (q15_t)0x51d1,
+  (q15_t)0x51cc, (q15_t)0x51c7, (q15_t)0x51c2, (q15_t)0x51bd, (q15_t)0x51b9, (q15_t)0x51b4, (q15_t)0x51af, (q15_t)0x51aa,
+  (q15_t)0x51a5, (q15_t)0x51a0, (q15_t)0x519c, (q15_t)0x5197, (q15_t)0x5192, (q15_t)0x518d, (q15_t)0x5188, (q15_t)0x5183,
+  (q15_t)0x517e, (q15_t)0x517a, (q15_t)0x5175, (q15_t)0x5170, (q15_t)0x516b, (q15_t)0x5166, (q15_t)0x5161, (q15_t)0x515d,
+  (q15_t)0x5158, (q15_t)0x5153, (q15_t)0x514e, (q15_t)0x5149, (q15_t)0x5144, (q15_t)0x513f, (q15_t)0x513b, (q15_t)0x5136,
+  (q15_t)0x5131, (q15_t)0x512c, (q15_t)0x5127, (q15_t)0x5122, (q15_t)0x511d, (q15_t)0x5119, (q15_t)0x5114, (q15_t)0x510f,
+  (q15_t)0x510a, (q15_t)0x5105, (q15_t)0x5100, (q15_t)0x50fb, (q15_t)0x50f7, (q15_t)0x50f2, (q15_t)0x50ed, (q15_t)0x50e8,
+  (q15_t)0x50e3, (q15_t)0x50de, (q15_t)0x50d9, (q15_t)0x50d4, (q15_t)0x50d0, (q15_t)0x50cb, (q15_t)0x50c6, (q15_t)0x50c1,
+  (q15_t)0x50bc, (q15_t)0x50b7, (q15_t)0x50b2, (q15_t)0x50ad, (q15_t)0x50a9, (q15_t)0x50a4, (q15_t)0x509f, (q15_t)0x509a,
+  (q15_t)0x5095, (q15_t)0x5090, (q15_t)0x508b, (q15_t)0x5086, (q15_t)0x5082, (q15_t)0x507d, (q15_t)0x5078, (q15_t)0x5073,
+  (q15_t)0x506e, (q15_t)0x5069, (q15_t)0x5064, (q15_t)0x505f, (q15_t)0x505a, (q15_t)0x5056, (q15_t)0x5051, (q15_t)0x504c,
+  (q15_t)0x5047, (q15_t)0x5042, (q15_t)0x503d, (q15_t)0x5038, (q15_t)0x5033, (q15_t)0x502e, (q15_t)0x5029, (q15_t)0x5025,
+  (q15_t)0x5020, (q15_t)0x501b, (q15_t)0x5016, (q15_t)0x5011, (q15_t)0x500c, (q15_t)0x5007, (q15_t)0x5002, (q15_t)0x4ffd,
+  (q15_t)0x4ff8, (q15_t)0x4ff4, (q15_t)0x4fef, (q15_t)0x4fea, (q15_t)0x4fe5, (q15_t)0x4fe0, (q15_t)0x4fdb, (q15_t)0x4fd6,
+  (q15_t)0x4fd1, (q15_t)0x4fcc, (q15_t)0x4fc7, (q15_t)0x4fc2, (q15_t)0x4fbe, (q15_t)0x4fb9, (q15_t)0x4fb4, (q15_t)0x4faf,
+  (q15_t)0x4faa, (q15_t)0x4fa5, (q15_t)0x4fa0, (q15_t)0x4f9b, (q15_t)0x4f96, (q15_t)0x4f91, (q15_t)0x4f8c, (q15_t)0x4f87,
+  (q15_t)0x4f82, (q15_t)0x4f7e, (q15_t)0x4f79, (q15_t)0x4f74, (q15_t)0x4f6f, (q15_t)0x4f6a, (q15_t)0x4f65, (q15_t)0x4f60,
+  (q15_t)0x4f5b, (q15_t)0x4f56, (q15_t)0x4f51, (q15_t)0x4f4c, (q15_t)0x4f47, (q15_t)0x4f42, (q15_t)0x4f3d, (q15_t)0x4f39,
+  (q15_t)0x4f34, (q15_t)0x4f2f, (q15_t)0x4f2a, (q15_t)0x4f25, (q15_t)0x4f20, (q15_t)0x4f1b, (q15_t)0x4f16, (q15_t)0x4f11,
+  (q15_t)0x4f0c, (q15_t)0x4f07, (q15_t)0x4f02, (q15_t)0x4efd, (q15_t)0x4ef8, (q15_t)0x4ef3, (q15_t)0x4eee, (q15_t)0x4ee9,
+  (q15_t)0x4ee5, (q15_t)0x4ee0, (q15_t)0x4edb, (q15_t)0x4ed6, (q15_t)0x4ed1, (q15_t)0x4ecc, (q15_t)0x4ec7, (q15_t)0x4ec2,
+  (q15_t)0x4ebd, (q15_t)0x4eb8, (q15_t)0x4eb3, (q15_t)0x4eae, (q15_t)0x4ea9, (q15_t)0x4ea4, (q15_t)0x4e9f, (q15_t)0x4e9a,
+  (q15_t)0x4e95, (q15_t)0x4e90, (q15_t)0x4e8b, (q15_t)0x4e86, (q15_t)0x4e81, (q15_t)0x4e7c, (q15_t)0x4e78, (q15_t)0x4e73,
+  (q15_t)0x4e6e, (q15_t)0x4e69, (q15_t)0x4e64, (q15_t)0x4e5f, (q15_t)0x4e5a, (q15_t)0x4e55, (q15_t)0x4e50, (q15_t)0x4e4b,
+  (q15_t)0x4e46, (q15_t)0x4e41, (q15_t)0x4e3c, (q15_t)0x4e37, (q15_t)0x4e32, (q15_t)0x4e2d, (q15_t)0x4e28, (q15_t)0x4e23,
+  (q15_t)0x4e1e, (q15_t)0x4e19, (q15_t)0x4e14, (q15_t)0x4e0f, (q15_t)0x4e0a, (q15_t)0x4e05, (q15_t)0x4e00, (q15_t)0x4dfb,
+  (q15_t)0x4df6, (q15_t)0x4df1, (q15_t)0x4dec, (q15_t)0x4de7, (q15_t)0x4de2, (q15_t)0x4ddd, (q15_t)0x4dd8, (q15_t)0x4dd3,
+  (q15_t)0x4dce, (q15_t)0x4dc9, (q15_t)0x4dc4, (q15_t)0x4dbf, (q15_t)0x4dba, (q15_t)0x4db5, (q15_t)0x4db0, (q15_t)0x4dab,
+  (q15_t)0x4da6, (q15_t)0x4da1, (q15_t)0x4d9c, (q15_t)0x4d97, (q15_t)0x4d92, (q15_t)0x4d8d, (q15_t)0x4d88, (q15_t)0x4d83,
+  (q15_t)0x4d7e, (q15_t)0x4d79, (q15_t)0x4d74, (q15_t)0x4d6f, (q15_t)0x4d6a, (q15_t)0x4d65, (q15_t)0x4d60, (q15_t)0x4d5b,
+  (q15_t)0x4d56, (q15_t)0x4d51, (q15_t)0x4d4c, (q15_t)0x4d47, (q15_t)0x4d42, (q15_t)0x4d3d, (q15_t)0x4d38, (q15_t)0x4d33,
+  (q15_t)0x4d2e, (q15_t)0x4d29, (q15_t)0x4d24, (q15_t)0x4d1f, (q15_t)0x4d1a, (q15_t)0x4d15, (q15_t)0x4d10, (q15_t)0x4d0b,
+  (q15_t)0x4d06, (q15_t)0x4d01, (q15_t)0x4cfc, (q15_t)0x4cf7, (q15_t)0x4cf2, (q15_t)0x4ced, (q15_t)0x4ce8, (q15_t)0x4ce3,
+  (q15_t)0x4cde, (q15_t)0x4cd9, (q15_t)0x4cd4, (q15_t)0x4ccf, (q15_t)0x4cca, (q15_t)0x4cc5, (q15_t)0x4cc0, (q15_t)0x4cbb,
+  (q15_t)0x4cb6, (q15_t)0x4cb1, (q15_t)0x4cac, (q15_t)0x4ca7, (q15_t)0x4ca2, (q15_t)0x4c9d, (q15_t)0x4c98, (q15_t)0x4c93,
+  (q15_t)0x4c8e, (q15_t)0x4c88, (q15_t)0x4c83, (q15_t)0x4c7e, (q15_t)0x4c79, (q15_t)0x4c74, (q15_t)0x4c6f, (q15_t)0x4c6a,
+  (q15_t)0x4c65, (q15_t)0x4c60, (q15_t)0x4c5b, (q15_t)0x4c56, (q15_t)0x4c51, (q15_t)0x4c4c, (q15_t)0x4c47, (q15_t)0x4c42,
+  (q15_t)0x4c3d, (q15_t)0x4c38, (q15_t)0x4c33, (q15_t)0x4c2e, (q15_t)0x4c29, (q15_t)0x4c24, (q15_t)0x4c1f, (q15_t)0x4c1a,
+  (q15_t)0x4c14, (q15_t)0x4c0f, (q15_t)0x4c0a, (q15_t)0x4c05, (q15_t)0x4c00, (q15_t)0x4bfb, (q15_t)0x4bf6, (q15_t)0x4bf1,
+  (q15_t)0x4bec, (q15_t)0x4be7, (q15_t)0x4be2, (q15_t)0x4bdd, (q15_t)0x4bd8, (q15_t)0x4bd3, (q15_t)0x4bce, (q15_t)0x4bc9,
+  (q15_t)0x4bc4, (q15_t)0x4bbe, (q15_t)0x4bb9, (q15_t)0x4bb4, (q15_t)0x4baf, (q15_t)0x4baa, (q15_t)0x4ba5, (q15_t)0x4ba0,
+  (q15_t)0x4b9b, (q15_t)0x4b96, (q15_t)0x4b91, (q15_t)0x4b8c, (q15_t)0x4b87, (q15_t)0x4b82, (q15_t)0x4b7d, (q15_t)0x4b77,
+  (q15_t)0x4b72, (q15_t)0x4b6d, (q15_t)0x4b68, (q15_t)0x4b63, (q15_t)0x4b5e, (q15_t)0x4b59, (q15_t)0x4b54, (q15_t)0x4b4f,
+  (q15_t)0x4b4a, (q15_t)0x4b45, (q15_t)0x4b40, (q15_t)0x4b3b, (q15_t)0x4b35, (q15_t)0x4b30, (q15_t)0x4b2b, (q15_t)0x4b26,
+  (q15_t)0x4b21, (q15_t)0x4b1c, (q15_t)0x4b17, (q15_t)0x4b12, (q15_t)0x4b0d, (q15_t)0x4b08, (q15_t)0x4b03, (q15_t)0x4afd,
+  (q15_t)0x4af8, (q15_t)0x4af3, (q15_t)0x4aee, (q15_t)0x4ae9, (q15_t)0x4ae4, (q15_t)0x4adf, (q15_t)0x4ada, (q15_t)0x4ad5,
+  (q15_t)0x4ad0, (q15_t)0x4acb, (q15_t)0x4ac5, (q15_t)0x4ac0, (q15_t)0x4abb, (q15_t)0x4ab6, (q15_t)0x4ab1, (q15_t)0x4aac,
+  (q15_t)0x4aa7, (q15_t)0x4aa2, (q15_t)0x4a9d, (q15_t)0x4a97, (q15_t)0x4a92, (q15_t)0x4a8d, (q15_t)0x4a88, (q15_t)0x4a83,
+  (q15_t)0x4a7e, (q15_t)0x4a79, (q15_t)0x4a74, (q15_t)0x4a6f, (q15_t)0x4a6a, (q15_t)0x4a64, (q15_t)0x4a5f, (q15_t)0x4a5a,
+  (q15_t)0x4a55, (q15_t)0x4a50, (q15_t)0x4a4b, (q15_t)0x4a46, (q15_t)0x4a41, (q15_t)0x4a3b, (q15_t)0x4a36, (q15_t)0x4a31,
+  (q15_t)0x4a2c, (q15_t)0x4a27, (q15_t)0x4a22, (q15_t)0x4a1d, (q15_t)0x4a18, (q15_t)0x4a12, (q15_t)0x4a0d, (q15_t)0x4a08,
+  (q15_t)0x4a03, (q15_t)0x49fe, (q15_t)0x49f9, (q15_t)0x49f4, (q15_t)0x49ef, (q15_t)0x49e9, (q15_t)0x49e4, (q15_t)0x49df,
+  (q15_t)0x49da, (q15_t)0x49d5, (q15_t)0x49d0, (q15_t)0x49cb, (q15_t)0x49c6, (q15_t)0x49c0, (q15_t)0x49bb, (q15_t)0x49b6,
+  (q15_t)0x49b1, (q15_t)0x49ac, (q15_t)0x49a7, (q15_t)0x49a2, (q15_t)0x499c, (q15_t)0x4997, (q15_t)0x4992, (q15_t)0x498d,
+  (q15_t)0x4988, (q15_t)0x4983, (q15_t)0x497e, (q15_t)0x4978, (q15_t)0x4973, (q15_t)0x496e, (q15_t)0x4969, (q15_t)0x4964,
+  (q15_t)0x495f, (q15_t)0x495a, (q15_t)0x4954, (q15_t)0x494f, (q15_t)0x494a, (q15_t)0x4945, (q15_t)0x4940, (q15_t)0x493b,
+  (q15_t)0x4936, (q15_t)0x4930, (q15_t)0x492b, (q15_t)0x4926, (q15_t)0x4921, (q15_t)0x491c, (q15_t)0x4917, (q15_t)0x4911,
+  (q15_t)0x490c, (q15_t)0x4907, (q15_t)0x4902, (q15_t)0x48fd, (q15_t)0x48f8, (q15_t)0x48f2, (q15_t)0x48ed, (q15_t)0x48e8,
+  (q15_t)0x48e3, (q15_t)0x48de, (q15_t)0x48d9, (q15_t)0x48d3, (q15_t)0x48ce, (q15_t)0x48c9, (q15_t)0x48c4, (q15_t)0x48bf,
+  (q15_t)0x48ba, (q15_t)0x48b4, (q15_t)0x48af, (q15_t)0x48aa, (q15_t)0x48a5, (q15_t)0x48a0, (q15_t)0x489b, (q15_t)0x4895,
+  (q15_t)0x4890, (q15_t)0x488b, (q15_t)0x4886, (q15_t)0x4881, (q15_t)0x487c, (q15_t)0x4876, (q15_t)0x4871, (q15_t)0x486c,
+  (q15_t)0x4867, (q15_t)0x4862, (q15_t)0x485c, (q15_t)0x4857, (q15_t)0x4852, (q15_t)0x484d, (q15_t)0x4848, (q15_t)0x4843,
+  (q15_t)0x483d, (q15_t)0x4838, (q15_t)0x4833, (q15_t)0x482e, (q15_t)0x4829, (q15_t)0x4823, (q15_t)0x481e, (q15_t)0x4819,
+  (q15_t)0x4814, (q15_t)0x480f, (q15_t)0x4809, (q15_t)0x4804, (q15_t)0x47ff, (q15_t)0x47fa, (q15_t)0x47f5, (q15_t)0x47ef,
+  (q15_t)0x47ea, (q15_t)0x47e5, (q15_t)0x47e0, (q15_t)0x47db, (q15_t)0x47d5, (q15_t)0x47d0, (q15_t)0x47cb, (q15_t)0x47c6,
+  (q15_t)0x47c1, (q15_t)0x47bb, (q15_t)0x47b6, (q15_t)0x47b1, (q15_t)0x47ac, (q15_t)0x47a7, (q15_t)0x47a1, (q15_t)0x479c,
+  (q15_t)0x4797, (q15_t)0x4792, (q15_t)0x478d, (q15_t)0x4787, (q15_t)0x4782, (q15_t)0x477d, (q15_t)0x4778, (q15_t)0x4773,
+  (q15_t)0x476d, (q15_t)0x4768, (q15_t)0x4763, (q15_t)0x475e, (q15_t)0x4758, (q15_t)0x4753, (q15_t)0x474e, (q15_t)0x4749,
+  (q15_t)0x4744, (q15_t)0x473e, (q15_t)0x4739, (q15_t)0x4734, (q15_t)0x472f, (q15_t)0x4729, (q15_t)0x4724, (q15_t)0x471f,
+  (q15_t)0x471a, (q15_t)0x4715, (q15_t)0x470f, (q15_t)0x470a, (q15_t)0x4705, (q15_t)0x4700, (q15_t)0x46fa, (q15_t)0x46f5,
+  (q15_t)0x46f0, (q15_t)0x46eb, (q15_t)0x46e6, (q15_t)0x46e0, (q15_t)0x46db, (q15_t)0x46d6, (q15_t)0x46d1, (q15_t)0x46cb,
+  (q15_t)0x46c6, (q15_t)0x46c1, (q15_t)0x46bc, (q15_t)0x46b6, (q15_t)0x46b1, (q15_t)0x46ac, (q15_t)0x46a7, (q15_t)0x46a1,
+  (q15_t)0x469c, (q15_t)0x4697, (q15_t)0x4692, (q15_t)0x468d, (q15_t)0x4687, (q15_t)0x4682, (q15_t)0x467d, (q15_t)0x4678,
+  (q15_t)0x4672, (q15_t)0x466d, (q15_t)0x4668, (q15_t)0x4663, (q15_t)0x465d, (q15_t)0x4658, (q15_t)0x4653, (q15_t)0x464e,
+  (q15_t)0x4648, (q15_t)0x4643, (q15_t)0x463e, (q15_t)0x4639, (q15_t)0x4633, (q15_t)0x462e, (q15_t)0x4629, (q15_t)0x4624,
+  (q15_t)0x461e, (q15_t)0x4619, (q15_t)0x4614, (q15_t)0x460e, (q15_t)0x4609, (q15_t)0x4604, (q15_t)0x45ff, (q15_t)0x45f9,
+  (q15_t)0x45f4, (q15_t)0x45ef, (q15_t)0x45ea, (q15_t)0x45e4, (q15_t)0x45df, (q15_t)0x45da, (q15_t)0x45d5, (q15_t)0x45cf,
+  (q15_t)0x45ca, (q15_t)0x45c5, (q15_t)0x45c0, (q15_t)0x45ba, (q15_t)0x45b5, (q15_t)0x45b0, (q15_t)0x45aa, (q15_t)0x45a5,
+  (q15_t)0x45a0, (q15_t)0x459b, (q15_t)0x4595, (q15_t)0x4590, (q15_t)0x458b, (q15_t)0x4586, (q15_t)0x4580, (q15_t)0x457b,
+  (q15_t)0x4576, (q15_t)0x4570, (q15_t)0x456b, (q15_t)0x4566, (q15_t)0x4561, (q15_t)0x455b, (q15_t)0x4556, (q15_t)0x4551,
+  (q15_t)0x454b, (q15_t)0x4546, (q15_t)0x4541, (q15_t)0x453c, (q15_t)0x4536, (q15_t)0x4531, (q15_t)0x452c, (q15_t)0x4526,
+  (q15_t)0x4521, (q15_t)0x451c, (q15_t)0x4517, (q15_t)0x4511, (q15_t)0x450c, (q15_t)0x4507, (q15_t)0x4501, (q15_t)0x44fc,
+  (q15_t)0x44f7, (q15_t)0x44f2, (q15_t)0x44ec, (q15_t)0x44e7, (q15_t)0x44e2, (q15_t)0x44dc, (q15_t)0x44d7, (q15_t)0x44d2,
+  (q15_t)0x44cd, (q15_t)0x44c7, (q15_t)0x44c2, (q15_t)0x44bd, (q15_t)0x44b7, (q15_t)0x44b2, (q15_t)0x44ad, (q15_t)0x44a7,
+  (q15_t)0x44a2, (q15_t)0x449d, (q15_t)0x4497, (q15_t)0x4492, (q15_t)0x448d, (q15_t)0x4488, (q15_t)0x4482, (q15_t)0x447d,
+  (q15_t)0x4478, (q15_t)0x4472, (q15_t)0x446d, (q15_t)0x4468, (q15_t)0x4462, (q15_t)0x445d, (q15_t)0x4458, (q15_t)0x4452,
+  (q15_t)0x444d, (q15_t)0x4448, (q15_t)0x4443, (q15_t)0x443d, (q15_t)0x4438, (q15_t)0x4433, (q15_t)0x442d, (q15_t)0x4428,
+  (q15_t)0x4423, (q15_t)0x441d, (q15_t)0x4418, (q15_t)0x4413, (q15_t)0x440d, (q15_t)0x4408, (q15_t)0x4403, (q15_t)0x43fd,
+  (q15_t)0x43f8, (q15_t)0x43f3, (q15_t)0x43ed, (q15_t)0x43e8, (q15_t)0x43e3, (q15_t)0x43dd, (q15_t)0x43d8, (q15_t)0x43d3,
+  (q15_t)0x43cd, (q15_t)0x43c8, (q15_t)0x43c3, (q15_t)0x43bd, (q15_t)0x43b8, (q15_t)0x43b3, (q15_t)0x43ad, (q15_t)0x43a8,
+  (q15_t)0x43a3, (q15_t)0x439d, (q15_t)0x4398, (q15_t)0x4393, (q15_t)0x438d, (q15_t)0x4388, (q15_t)0x4383, (q15_t)0x437d,
+  (q15_t)0x4378, (q15_t)0x4373, (q15_t)0x436d, (q15_t)0x4368, (q15_t)0x4363, (q15_t)0x435d, (q15_t)0x4358, (q15_t)0x4353,
+  (q15_t)0x434d, (q15_t)0x4348, (q15_t)0x4343, (q15_t)0x433d, (q15_t)0x4338, (q15_t)0x4333, (q15_t)0x432d, (q15_t)0x4328,
+  (q15_t)0x4323, (q15_t)0x431d, (q15_t)0x4318, (q15_t)0x4313, (q15_t)0x430d, (q15_t)0x4308, (q15_t)0x4302, (q15_t)0x42fd,
+  (q15_t)0x42f8, (q15_t)0x42f2, (q15_t)0x42ed, (q15_t)0x42e8, (q15_t)0x42e2, (q15_t)0x42dd, (q15_t)0x42d8, (q15_t)0x42d2,
+  (q15_t)0x42cd, (q15_t)0x42c8, (q15_t)0x42c2, (q15_t)0x42bd, (q15_t)0x42b7, (q15_t)0x42b2, (q15_t)0x42ad, (q15_t)0x42a7,
+  (q15_t)0x42a2, (q15_t)0x429d, (q15_t)0x4297, (q15_t)0x4292, (q15_t)0x428d, (q15_t)0x4287, (q15_t)0x4282, (q15_t)0x427c,
+  (q15_t)0x4277, (q15_t)0x4272, (q15_t)0x426c, (q15_t)0x4267, (q15_t)0x4262, (q15_t)0x425c, (q15_t)0x4257, (q15_t)0x4251,
+  (q15_t)0x424c, (q15_t)0x4247, (q15_t)0x4241, (q15_t)0x423c, (q15_t)0x4237, (q15_t)0x4231, (q15_t)0x422c, (q15_t)0x4226,
+  (q15_t)0x4221, (q15_t)0x421c, (q15_t)0x4216, (q15_t)0x4211, (q15_t)0x420c, (q15_t)0x4206, (q15_t)0x4201, (q15_t)0x41fb,
+  (q15_t)0x41f6, (q15_t)0x41f1, (q15_t)0x41eb, (q15_t)0x41e6, (q15_t)0x41e0, (q15_t)0x41db, (q15_t)0x41d6, (q15_t)0x41d0,
+  (q15_t)0x41cb, (q15_t)0x41c6, (q15_t)0x41c0, (q15_t)0x41bb, (q15_t)0x41b5, (q15_t)0x41b0, (q15_t)0x41ab, (q15_t)0x41a5,
+  (q15_t)0x41a0, (q15_t)0x419a, (q15_t)0x4195, (q15_t)0x4190, (q15_t)0x418a, (q15_t)0x4185, (q15_t)0x417f, (q15_t)0x417a,
+  (q15_t)0x4175, (q15_t)0x416f, (q15_t)0x416a, (q15_t)0x4164, (q15_t)0x415f, (q15_t)0x415a, (q15_t)0x4154, (q15_t)0x414f,
+  (q15_t)0x4149, (q15_t)0x4144, (q15_t)0x413f, (q15_t)0x4139, (q15_t)0x4134, (q15_t)0x412e, (q15_t)0x4129, (q15_t)0x4124,
+  (q15_t)0x411e, (q15_t)0x4119, (q15_t)0x4113, (q15_t)0x410e, (q15_t)0x4108, (q15_t)0x4103, (q15_t)0x40fe, (q15_t)0x40f8,
+  (q15_t)0x40f3, (q15_t)0x40ed, (q15_t)0x40e8, (q15_t)0x40e3, (q15_t)0x40dd, (q15_t)0x40d8, (q15_t)0x40d2, (q15_t)0x40cd,
+  (q15_t)0x40c8, (q15_t)0x40c2, (q15_t)0x40bd, (q15_t)0x40b7, (q15_t)0x40b2, (q15_t)0x40ac, (q15_t)0x40a7, (q15_t)0x40a2,
+  (q15_t)0x409c, (q15_t)0x4097, (q15_t)0x4091, (q15_t)0x408c, (q15_t)0x4086, (q15_t)0x4081, (q15_t)0x407c, (q15_t)0x4076,
+  (q15_t)0x4071, (q15_t)0x406b, (q15_t)0x4066, (q15_t)0x4060, (q15_t)0x405b, (q15_t)0x4056, (q15_t)0x4050, (q15_t)0x404b,
+  (q15_t)0x4045, (q15_t)0x4040, (q15_t)0x403a, (q15_t)0x4035, (q15_t)0x4030, (q15_t)0x402a, (q15_t)0x4025, (q15_t)0x401f,
+  (q15_t)0x401a, (q15_t)0x4014, (q15_t)0x400f, (q15_t)0x4009, (q15_t)0x4004, (q15_t)0x3fff, (q15_t)0x3ff9, (q15_t)0x3ff4,
+  (q15_t)0x3fee, (q15_t)0x3fe9, (q15_t)0x3fe3, (q15_t)0x3fde, (q15_t)0x3fd8, (q15_t)0x3fd3, (q15_t)0x3fce, (q15_t)0x3fc8,
+  (q15_t)0x3fc3, (q15_t)0x3fbd, (q15_t)0x3fb8, (q15_t)0x3fb2, (q15_t)0x3fad, (q15_t)0x3fa7, (q15_t)0x3fa2, (q15_t)0x3f9d,
+  (q15_t)0x3f97, (q15_t)0x3f92, (q15_t)0x3f8c, (q15_t)0x3f87, (q15_t)0x3f81, (q15_t)0x3f7c, (q15_t)0x3f76, (q15_t)0x3f71,
+  (q15_t)0x3f6b, (q15_t)0x3f66, (q15_t)0x3f61, (q15_t)0x3f5b, (q15_t)0x3f56, (q15_t)0x3f50, (q15_t)0x3f4b, (q15_t)0x3f45,
+  (q15_t)0x3f40, (q15_t)0x3f3a, (q15_t)0x3f35, (q15_t)0x3f2f, (q15_t)0x3f2a, (q15_t)0x3f24, (q15_t)0x3f1f, (q15_t)0x3f1a,
+  (q15_t)0x3f14, (q15_t)0x3f0f, (q15_t)0x3f09, (q15_t)0x3f04, (q15_t)0x3efe, (q15_t)0x3ef9, (q15_t)0x3ef3, (q15_t)0x3eee,
+  (q15_t)0x3ee8, (q15_t)0x3ee3, (q15_t)0x3edd, (q15_t)0x3ed8, (q15_t)0x3ed2, (q15_t)0x3ecd, (q15_t)0x3ec7, (q15_t)0x3ec2,
+  (q15_t)0x3ebd, (q15_t)0x3eb7, (q15_t)0x3eb2, (q15_t)0x3eac, (q15_t)0x3ea7, (q15_t)0x3ea1, (q15_t)0x3e9c, (q15_t)0x3e96,
+  (q15_t)0x3e91, (q15_t)0x3e8b, (q15_t)0x3e86, (q15_t)0x3e80, (q15_t)0x3e7b, (q15_t)0x3e75, (q15_t)0x3e70, (q15_t)0x3e6a,
+  (q15_t)0x3e65, (q15_t)0x3e5f, (q15_t)0x3e5a, (q15_t)0x3e54, (q15_t)0x3e4f, (q15_t)0x3e49, (q15_t)0x3e44, (q15_t)0x3e3e,
+  (q15_t)0x3e39, (q15_t)0x3e33, (q15_t)0x3e2e, (q15_t)0x3e28, (q15_t)0x3e23, (q15_t)0x3e1d, (q15_t)0x3e18, (q15_t)0x3e12,
+  (q15_t)0x3e0d, (q15_t)0x3e07, (q15_t)0x3e02, (q15_t)0x3dfc, (q15_t)0x3df7, (q15_t)0x3df1, (q15_t)0x3dec, (q15_t)0x3de6,
+  (q15_t)0x3de1, (q15_t)0x3ddb, (q15_t)0x3dd6, (q15_t)0x3dd0, (q15_t)0x3dcb, (q15_t)0x3dc5, (q15_t)0x3dc0, (q15_t)0x3dba,
+  (q15_t)0x3db5, (q15_t)0x3daf, (q15_t)0x3daa, (q15_t)0x3da4, (q15_t)0x3d9f, (q15_t)0x3d99, (q15_t)0x3d94, (q15_t)0x3d8e,
+  (q15_t)0x3d89, (q15_t)0x3d83, (q15_t)0x3d7e, (q15_t)0x3d78, (q15_t)0x3d73, (q15_t)0x3d6d, (q15_t)0x3d68, (q15_t)0x3d62,
+  (q15_t)0x3d5d, (q15_t)0x3d57, (q15_t)0x3d52, (q15_t)0x3d4c, (q15_t)0x3d47, (q15_t)0x3d41, (q15_t)0x3d3c, (q15_t)0x3d36,
+  (q15_t)0x3d31, (q15_t)0x3d2b, (q15_t)0x3d26, (q15_t)0x3d20, (q15_t)0x3d1b, (q15_t)0x3d15, (q15_t)0x3d10, (q15_t)0x3d0a,
+  (q15_t)0x3d04, (q15_t)0x3cff, (q15_t)0x3cf9, (q15_t)0x3cf4, (q15_t)0x3cee, (q15_t)0x3ce9, (q15_t)0x3ce3, (q15_t)0x3cde,
+  (q15_t)0x3cd8, (q15_t)0x3cd3, (q15_t)0x3ccd, (q15_t)0x3cc8, (q15_t)0x3cc2, (q15_t)0x3cbd, (q15_t)0x3cb7, (q15_t)0x3cb2,
+  (q15_t)0x3cac, (q15_t)0x3ca7, (q15_t)0x3ca1, (q15_t)0x3c9b, (q15_t)0x3c96, (q15_t)0x3c90, (q15_t)0x3c8b, (q15_t)0x3c85,
+  (q15_t)0x3c80, (q15_t)0x3c7a, (q15_t)0x3c75, (q15_t)0x3c6f, (q15_t)0x3c6a, (q15_t)0x3c64, (q15_t)0x3c5f, (q15_t)0x3c59,
+  (q15_t)0x3c53, (q15_t)0x3c4e, (q15_t)0x3c48, (q15_t)0x3c43, (q15_t)0x3c3d, (q15_t)0x3c38, (q15_t)0x3c32, (q15_t)0x3c2d,
+  (q15_t)0x3c27, (q15_t)0x3c22, (q15_t)0x3c1c, (q15_t)0x3c16, (q15_t)0x3c11, (q15_t)0x3c0b, (q15_t)0x3c06, (q15_t)0x3c00,
+  (q15_t)0x3bfb, (q15_t)0x3bf5, (q15_t)0x3bf0, (q15_t)0x3bea, (q15_t)0x3be5, (q15_t)0x3bdf, (q15_t)0x3bd9, (q15_t)0x3bd4,
+  (q15_t)0x3bce, (q15_t)0x3bc9, (q15_t)0x3bc3, (q15_t)0x3bbe, (q15_t)0x3bb8, (q15_t)0x3bb3, (q15_t)0x3bad, (q15_t)0x3ba7,
+  (q15_t)0x3ba2, (q15_t)0x3b9c, (q15_t)0x3b97, (q15_t)0x3b91, (q15_t)0x3b8c, (q15_t)0x3b86, (q15_t)0x3b80, (q15_t)0x3b7b,
+  (q15_t)0x3b75, (q15_t)0x3b70, (q15_t)0x3b6a, (q15_t)0x3b65, (q15_t)0x3b5f, (q15_t)0x3b5a, (q15_t)0x3b54, (q15_t)0x3b4e,
+  (q15_t)0x3b49, (q15_t)0x3b43, (q15_t)0x3b3e, (q15_t)0x3b38, (q15_t)0x3b33, (q15_t)0x3b2d, (q15_t)0x3b27, (q15_t)0x3b22,
+  (q15_t)0x3b1c, (q15_t)0x3b17, (q15_t)0x3b11, (q15_t)0x3b0c, (q15_t)0x3b06, (q15_t)0x3b00, (q15_t)0x3afb, (q15_t)0x3af5,
+  (q15_t)0x3af0, (q15_t)0x3aea, (q15_t)0x3ae4, (q15_t)0x3adf, (q15_t)0x3ad9, (q15_t)0x3ad4, (q15_t)0x3ace, (q15_t)0x3ac9,
+  (q15_t)0x3ac3, (q15_t)0x3abd, (q15_t)0x3ab8, (q15_t)0x3ab2, (q15_t)0x3aad, (q15_t)0x3aa7, (q15_t)0x3aa2, (q15_t)0x3a9c,
+  (q15_t)0x3a96, (q15_t)0x3a91, (q15_t)0x3a8b, (q15_t)0x3a86, (q15_t)0x3a80, (q15_t)0x3a7a, (q15_t)0x3a75, (q15_t)0x3a6f,
+  (q15_t)0x3a6a, (q15_t)0x3a64, (q15_t)0x3a5e, (q15_t)0x3a59, (q15_t)0x3a53, (q15_t)0x3a4e, (q15_t)0x3a48, (q15_t)0x3a42,
+  (q15_t)0x3a3d, (q15_t)0x3a37, (q15_t)0x3a32, (q15_t)0x3a2c, (q15_t)0x3a26, (q15_t)0x3a21, (q15_t)0x3a1b, (q15_t)0x3a16,
+  (q15_t)0x3a10, (q15_t)0x3a0b, (q15_t)0x3a05, (q15_t)0x39ff, (q15_t)0x39fa, (q15_t)0x39f4, (q15_t)0x39ee, (q15_t)0x39e9,
+  (q15_t)0x39e3, (q15_t)0x39de, (q15_t)0x39d8, (q15_t)0x39d2, (q15_t)0x39cd, (q15_t)0x39c7, (q15_t)0x39c2, (q15_t)0x39bc,
+  (q15_t)0x39b6, (q15_t)0x39b1, (q15_t)0x39ab, (q15_t)0x39a6, (q15_t)0x39a0, (q15_t)0x399a, (q15_t)0x3995, (q15_t)0x398f,
+  (q15_t)0x398a, (q15_t)0x3984, (q15_t)0x397e, (q15_t)0x3979, (q15_t)0x3973, (q15_t)0x396d, (q15_t)0x3968, (q15_t)0x3962,
+  (q15_t)0x395d, (q15_t)0x3957, (q15_t)0x3951, (q15_t)0x394c, (q15_t)0x3946, (q15_t)0x3941, (q15_t)0x393b, (q15_t)0x3935,
+  (q15_t)0x3930, (q15_t)0x392a, (q15_t)0x3924, (q15_t)0x391f, (q15_t)0x3919, (q15_t)0x3914, (q15_t)0x390e, (q15_t)0x3908,
+  (q15_t)0x3903, (q15_t)0x38fd, (q15_t)0x38f7, (q15_t)0x38f2, (q15_t)0x38ec, (q15_t)0x38e7, (q15_t)0x38e1, (q15_t)0x38db,
+  (q15_t)0x38d6, (q15_t)0x38d0, (q15_t)0x38ca, (q15_t)0x38c5, (q15_t)0x38bf, (q15_t)0x38ba, (q15_t)0x38b4, (q15_t)0x38ae,
+  (q15_t)0x38a9, (q15_t)0x38a3, (q15_t)0x389d, (q15_t)0x3898, (q15_t)0x3892, (q15_t)0x388c, (q15_t)0x3887, (q15_t)0x3881,
+  (q15_t)0x387c, (q15_t)0x3876, (q15_t)0x3870, (q15_t)0x386b, (q15_t)0x3865, (q15_t)0x385f, (q15_t)0x385a, (q15_t)0x3854,
+  (q15_t)0x384e, (q15_t)0x3849, (q15_t)0x3843, (q15_t)0x383d, (q15_t)0x3838, (q15_t)0x3832, (q15_t)0x382d, (q15_t)0x3827,
+  (q15_t)0x3821, (q15_t)0x381c, (q15_t)0x3816, (q15_t)0x3810, (q15_t)0x380b, (q15_t)0x3805, (q15_t)0x37ff, (q15_t)0x37fa,
+  (q15_t)0x37f4, (q15_t)0x37ee, (q15_t)0x37e9, (q15_t)0x37e3, (q15_t)0x37dd, (q15_t)0x37d8, (q15_t)0x37d2, (q15_t)0x37cc,
+  (q15_t)0x37c7, (q15_t)0x37c1, (q15_t)0x37bc, (q15_t)0x37b6, (q15_t)0x37b0, (q15_t)0x37ab, (q15_t)0x37a5, (q15_t)0x379f,
+  (q15_t)0x379a, (q15_t)0x3794, (q15_t)0x378e, (q15_t)0x3789, (q15_t)0x3783, (q15_t)0x377d, (q15_t)0x3778, (q15_t)0x3772,
+  (q15_t)0x376c, (q15_t)0x3767, (q15_t)0x3761, (q15_t)0x375b, (q15_t)0x3756, (q15_t)0x3750, (q15_t)0x374a, (q15_t)0x3745,
+  (q15_t)0x373f, (q15_t)0x3739, (q15_t)0x3734, (q15_t)0x372e, (q15_t)0x3728, (q15_t)0x3723, (q15_t)0x371d, (q15_t)0x3717,
+  (q15_t)0x3712, (q15_t)0x370c, (q15_t)0x3706, (q15_t)0x3701, (q15_t)0x36fb, (q15_t)0x36f5, (q15_t)0x36f0, (q15_t)0x36ea,
+  (q15_t)0x36e4, (q15_t)0x36df, (q15_t)0x36d9, (q15_t)0x36d3, (q15_t)0x36ce, (q15_t)0x36c8, (q15_t)0x36c2, (q15_t)0x36bc,
+  (q15_t)0x36b7, (q15_t)0x36b1, (q15_t)0x36ab, (q15_t)0x36a6, (q15_t)0x36a0, (q15_t)0x369a, (q15_t)0x3695, (q15_t)0x368f,
+  (q15_t)0x3689, (q15_t)0x3684, (q15_t)0x367e, (q15_t)0x3678, (q15_t)0x3673, (q15_t)0x366d, (q15_t)0x3667, (q15_t)0x3662,
+  (q15_t)0x365c, (q15_t)0x3656, (q15_t)0x3650, (q15_t)0x364b, (q15_t)0x3645, (q15_t)0x363f, (q15_t)0x363a, (q15_t)0x3634,
+  (q15_t)0x362e, (q15_t)0x3629, (q15_t)0x3623, (q15_t)0x361d, (q15_t)0x3618, (q15_t)0x3612, (q15_t)0x360c, (q15_t)0x3606,
+  (q15_t)0x3601, (q15_t)0x35fb, (q15_t)0x35f5, (q15_t)0x35f0, (q15_t)0x35ea, (q15_t)0x35e4, (q15_t)0x35df, (q15_t)0x35d9,
+  (q15_t)0x35d3, (q15_t)0x35cd, (q15_t)0x35c8, (q15_t)0x35c2, (q15_t)0x35bc, (q15_t)0x35b7, (q15_t)0x35b1, (q15_t)0x35ab,
+  (q15_t)0x35a6, (q15_t)0x35a0, (q15_t)0x359a, (q15_t)0x3594, (q15_t)0x358f, (q15_t)0x3589, (q15_t)0x3583, (q15_t)0x357e,
+  (q15_t)0x3578, (q15_t)0x3572, (q15_t)0x356c, (q15_t)0x3567, (q15_t)0x3561, (q15_t)0x355b, (q15_t)0x3556, (q15_t)0x3550,
+  (q15_t)0x354a, (q15_t)0x3544, (q15_t)0x353f, (q15_t)0x3539, (q15_t)0x3533, (q15_t)0x352e, (q15_t)0x3528, (q15_t)0x3522,
+  (q15_t)0x351c, (q15_t)0x3517, (q15_t)0x3511, (q15_t)0x350b, (q15_t)0x3506, (q15_t)0x3500, (q15_t)0x34fa, (q15_t)0x34f4,
+  (q15_t)0x34ef, (q15_t)0x34e9, (q15_t)0x34e3, (q15_t)0x34de, (q15_t)0x34d8, (q15_t)0x34d2, (q15_t)0x34cc, (q15_t)0x34c7,
+  (q15_t)0x34c1, (q15_t)0x34bb, (q15_t)0x34b6, (q15_t)0x34b0, (q15_t)0x34aa, (q15_t)0x34a4, (q15_t)0x349f, (q15_t)0x3499,
+  (q15_t)0x3493, (q15_t)0x348d, (q15_t)0x3488, (q15_t)0x3482, (q15_t)0x347c, (q15_t)0x3476, (q15_t)0x3471, (q15_t)0x346b,
+  (q15_t)0x3465, (q15_t)0x3460, (q15_t)0x345a, (q15_t)0x3454, (q15_t)0x344e, (q15_t)0x3449, (q15_t)0x3443, (q15_t)0x343d,
+  (q15_t)0x3437, (q15_t)0x3432, (q15_t)0x342c, (q15_t)0x3426, (q15_t)0x3420, (q15_t)0x341b, (q15_t)0x3415, (q15_t)0x340f,
+  (q15_t)0x340a, (q15_t)0x3404, (q15_t)0x33fe, (q15_t)0x33f8, (q15_t)0x33f3, (q15_t)0x33ed, (q15_t)0x33e7, (q15_t)0x33e1,
+  (q15_t)0x33dc, (q15_t)0x33d6, (q15_t)0x33d0, (q15_t)0x33ca, (q15_t)0x33c5, (q15_t)0x33bf, (q15_t)0x33b9, (q15_t)0x33b3,
+  (q15_t)0x33ae, (q15_t)0x33a8, (q15_t)0x33a2, (q15_t)0x339c, (q15_t)0x3397, (q15_t)0x3391, (q15_t)0x338b, (q15_t)0x3385,
+  (q15_t)0x3380, (q15_t)0x337a, (q15_t)0x3374, (q15_t)0x336e, (q15_t)0x3369, (q15_t)0x3363, (q15_t)0x335d, (q15_t)0x3357,
+  (q15_t)0x3352, (q15_t)0x334c, (q15_t)0x3346, (q15_t)0x3340, (q15_t)0x333b, (q15_t)0x3335, (q15_t)0x332f, (q15_t)0x3329,
+  (q15_t)0x3324, (q15_t)0x331e, (q15_t)0x3318, (q15_t)0x3312, (q15_t)0x330c, (q15_t)0x3307, (q15_t)0x3301, (q15_t)0x32fb,
+  (q15_t)0x32f5, (q15_t)0x32f0, (q15_t)0x32ea, (q15_t)0x32e4, (q15_t)0x32de, (q15_t)0x32d9, (q15_t)0x32d3, (q15_t)0x32cd,
+  (q15_t)0x32c7, (q15_t)0x32c2, (q15_t)0x32bc, (q15_t)0x32b6, (q15_t)0x32b0, (q15_t)0x32aa, (q15_t)0x32a5, (q15_t)0x329f,
+  (q15_t)0x3299, (q15_t)0x3293, (q15_t)0x328e, (q15_t)0x3288, (q15_t)0x3282, (q15_t)0x327c, (q15_t)0x3276, (q15_t)0x3271,
+  (q15_t)0x326b, (q15_t)0x3265, (q15_t)0x325f, (q15_t)0x325a, (q15_t)0x3254, (q15_t)0x324e, (q15_t)0x3248, (q15_t)0x3243,
+  (q15_t)0x323d, (q15_t)0x3237, (q15_t)0x3231, (q15_t)0x322b, (q15_t)0x3226, (q15_t)0x3220, (q15_t)0x321a, (q15_t)0x3214,
+  (q15_t)0x320e, (q15_t)0x3209, (q15_t)0x3203, (q15_t)0x31fd, (q15_t)0x31f7, (q15_t)0x31f2, (q15_t)0x31ec, (q15_t)0x31e6,
+  (q15_t)0x31e0, (q15_t)0x31da, (q15_t)0x31d5, (q15_t)0x31cf, (q15_t)0x31c9, (q15_t)0x31c3, (q15_t)0x31bd, (q15_t)0x31b8,
+  (q15_t)0x31b2, (q15_t)0x31ac, (q15_t)0x31a6, (q15_t)0x31a1, (q15_t)0x319b, (q15_t)0x3195, (q15_t)0x318f, (q15_t)0x3189,
+  (q15_t)0x3184, (q15_t)0x317e, (q15_t)0x3178, (q15_t)0x3172, (q15_t)0x316c, (q15_t)0x3167, (q15_t)0x3161, (q15_t)0x315b,
+  (q15_t)0x3155, (q15_t)0x314f, (q15_t)0x314a, (q15_t)0x3144, (q15_t)0x313e, (q15_t)0x3138, (q15_t)0x3132, (q15_t)0x312d,
+  (q15_t)0x3127, (q15_t)0x3121, (q15_t)0x311b, (q15_t)0x3115, (q15_t)0x3110, (q15_t)0x310a, (q15_t)0x3104, (q15_t)0x30fe,
+  (q15_t)0x30f8, (q15_t)0x30f3, (q15_t)0x30ed, (q15_t)0x30e7, (q15_t)0x30e1, (q15_t)0x30db, (q15_t)0x30d6, (q15_t)0x30d0,
+  (q15_t)0x30ca, (q15_t)0x30c4, (q15_t)0x30be, (q15_t)0x30b8, (q15_t)0x30b3, (q15_t)0x30ad, (q15_t)0x30a7, (q15_t)0x30a1,
+  (q15_t)0x309b, (q15_t)0x3096, (q15_t)0x3090, (q15_t)0x308a, (q15_t)0x3084, (q15_t)0x307e, (q15_t)0x3079, (q15_t)0x3073,
+  (q15_t)0x306d, (q15_t)0x3067, (q15_t)0x3061, (q15_t)0x305b, (q15_t)0x3056, (q15_t)0x3050, (q15_t)0x304a, (q15_t)0x3044,
+  (q15_t)0x303e, (q15_t)0x3039, (q15_t)0x3033, (q15_t)0x302d, (q15_t)0x3027, (q15_t)0x3021, (q15_t)0x301b, (q15_t)0x3016,
+  (q15_t)0x3010, (q15_t)0x300a, (q15_t)0x3004, (q15_t)0x2ffe, (q15_t)0x2ff8, (q15_t)0x2ff3, (q15_t)0x2fed, (q15_t)0x2fe7,
+  (q15_t)0x2fe1, (q15_t)0x2fdb, (q15_t)0x2fd6, (q15_t)0x2fd0, (q15_t)0x2fca, (q15_t)0x2fc4, (q15_t)0x2fbe, (q15_t)0x2fb8,
+  (q15_t)0x2fb3, (q15_t)0x2fad, (q15_t)0x2fa7, (q15_t)0x2fa1, (q15_t)0x2f9b, (q15_t)0x2f95, (q15_t)0x2f90, (q15_t)0x2f8a,
+  (q15_t)0x2f84, (q15_t)0x2f7e, (q15_t)0x2f78, (q15_t)0x2f72, (q15_t)0x2f6d, (q15_t)0x2f67, (q15_t)0x2f61, (q15_t)0x2f5b,
+  (q15_t)0x2f55, (q15_t)0x2f4f, (q15_t)0x2f4a, (q15_t)0x2f44, (q15_t)0x2f3e, (q15_t)0x2f38, (q15_t)0x2f32, (q15_t)0x2f2c,
+  (q15_t)0x2f27, (q15_t)0x2f21, (q15_t)0x2f1b, (q15_t)0x2f15, (q15_t)0x2f0f, (q15_t)0x2f09, (q15_t)0x2f03, (q15_t)0x2efe,
+  (q15_t)0x2ef8, (q15_t)0x2ef2, (q15_t)0x2eec, (q15_t)0x2ee6, (q15_t)0x2ee0, (q15_t)0x2edb, (q15_t)0x2ed5, (q15_t)0x2ecf,
+  (q15_t)0x2ec9, (q15_t)0x2ec3, (q15_t)0x2ebd, (q15_t)0x2eb7, (q15_t)0x2eb2, (q15_t)0x2eac, (q15_t)0x2ea6, (q15_t)0x2ea0,
+  (q15_t)0x2e9a, (q15_t)0x2e94, (q15_t)0x2e8e, (q15_t)0x2e89, (q15_t)0x2e83, (q15_t)0x2e7d, (q15_t)0x2e77, (q15_t)0x2e71,
+  (q15_t)0x2e6b, (q15_t)0x2e65, (q15_t)0x2e60, (q15_t)0x2e5a, (q15_t)0x2e54, (q15_t)0x2e4e, (q15_t)0x2e48, (q15_t)0x2e42,
+  (q15_t)0x2e3c, (q15_t)0x2e37, (q15_t)0x2e31, (q15_t)0x2e2b, (q15_t)0x2e25, (q15_t)0x2e1f, (q15_t)0x2e19, (q15_t)0x2e13,
+  (q15_t)0x2e0e, (q15_t)0x2e08, (q15_t)0x2e02, (q15_t)0x2dfc, (q15_t)0x2df6, (q15_t)0x2df0, (q15_t)0x2dea, (q15_t)0x2de5,
+  (q15_t)0x2ddf, (q15_t)0x2dd9, (q15_t)0x2dd3, (q15_t)0x2dcd, (q15_t)0x2dc7, (q15_t)0x2dc1, (q15_t)0x2dbb, (q15_t)0x2db6,
+  (q15_t)0x2db0, (q15_t)0x2daa, (q15_t)0x2da4, (q15_t)0x2d9e, (q15_t)0x2d98, (q15_t)0x2d92, (q15_t)0x2d8d, (q15_t)0x2d87,
+  (q15_t)0x2d81, (q15_t)0x2d7b, (q15_t)0x2d75, (q15_t)0x2d6f, (q15_t)0x2d69, (q15_t)0x2d63, (q15_t)0x2d5e, (q15_t)0x2d58,
+  (q15_t)0x2d52, (q15_t)0x2d4c, (q15_t)0x2d46, (q15_t)0x2d40, (q15_t)0x2d3a, (q15_t)0x2d34, (q15_t)0x2d2f, (q15_t)0x2d29,
+  (q15_t)0x2d23, (q15_t)0x2d1d, (q15_t)0x2d17, (q15_t)0x2d11, (q15_t)0x2d0b, (q15_t)0x2d05, (q15_t)0x2cff, (q15_t)0x2cfa,
+  (q15_t)0x2cf4, (q15_t)0x2cee, (q15_t)0x2ce8, (q15_t)0x2ce2, (q15_t)0x2cdc, (q15_t)0x2cd6, (q15_t)0x2cd0, (q15_t)0x2ccb,
+  (q15_t)0x2cc5, (q15_t)0x2cbf, (q15_t)0x2cb9, (q15_t)0x2cb3, (q15_t)0x2cad, (q15_t)0x2ca7, (q15_t)0x2ca1, (q15_t)0x2c9b,
+  (q15_t)0x2c96, (q15_t)0x2c90, (q15_t)0x2c8a, (q15_t)0x2c84, (q15_t)0x2c7e, (q15_t)0x2c78, (q15_t)0x2c72, (q15_t)0x2c6c,
+  (q15_t)0x2c66, (q15_t)0x2c61, (q15_t)0x2c5b, (q15_t)0x2c55, (q15_t)0x2c4f, (q15_t)0x2c49, (q15_t)0x2c43, (q15_t)0x2c3d,
+  (q15_t)0x2c37, (q15_t)0x2c31, (q15_t)0x2c2b, (q15_t)0x2c26, (q15_t)0x2c20, (q15_t)0x2c1a, (q15_t)0x2c14, (q15_t)0x2c0e,
+  (q15_t)0x2c08, (q15_t)0x2c02, (q15_t)0x2bfc, (q15_t)0x2bf6, (q15_t)0x2bf0, (q15_t)0x2beb, (q15_t)0x2be5, (q15_t)0x2bdf,
+  (q15_t)0x2bd9, (q15_t)0x2bd3, (q15_t)0x2bcd, (q15_t)0x2bc7, (q15_t)0x2bc1, (q15_t)0x2bbb, (q15_t)0x2bb5, (q15_t)0x2bb0,
+  (q15_t)0x2baa, (q15_t)0x2ba4, (q15_t)0x2b9e, (q15_t)0x2b98, (q15_t)0x2b92, (q15_t)0x2b8c, (q15_t)0x2b86, (q15_t)0x2b80,
+  (q15_t)0x2b7a, (q15_t)0x2b74, (q15_t)0x2b6f, (q15_t)0x2b69, (q15_t)0x2b63, (q15_t)0x2b5d, (q15_t)0x2b57, (q15_t)0x2b51,
+  (q15_t)0x2b4b, (q15_t)0x2b45, (q15_t)0x2b3f, (q15_t)0x2b39, (q15_t)0x2b33, (q15_t)0x2b2d, (q15_t)0x2b28, (q15_t)0x2b22,
+  (q15_t)0x2b1c, (q15_t)0x2b16, (q15_t)0x2b10, (q15_t)0x2b0a, (q15_t)0x2b04, (q15_t)0x2afe, (q15_t)0x2af8, (q15_t)0x2af2,
+  (q15_t)0x2aec, (q15_t)0x2ae6, (q15_t)0x2ae1, (q15_t)0x2adb, (q15_t)0x2ad5, (q15_t)0x2acf, (q15_t)0x2ac9, (q15_t)0x2ac3,
+  (q15_t)0x2abd, (q15_t)0x2ab7, (q15_t)0x2ab1, (q15_t)0x2aab, (q15_t)0x2aa5, (q15_t)0x2a9f, (q15_t)0x2a99, (q15_t)0x2a94,
+  (q15_t)0x2a8e, (q15_t)0x2a88, (q15_t)0x2a82, (q15_t)0x2a7c, (q15_t)0x2a76, (q15_t)0x2a70, (q15_t)0x2a6a, (q15_t)0x2a64,
+  (q15_t)0x2a5e, (q15_t)0x2a58, (q15_t)0x2a52, (q15_t)0x2a4c, (q15_t)0x2a47, (q15_t)0x2a41, (q15_t)0x2a3b, (q15_t)0x2a35,
+  (q15_t)0x2a2f, (q15_t)0x2a29, (q15_t)0x2a23, (q15_t)0x2a1d, (q15_t)0x2a17, (q15_t)0x2a11, (q15_t)0x2a0b, (q15_t)0x2a05,
+  (q15_t)0x29ff, (q15_t)0x29f9, (q15_t)0x29f3, (q15_t)0x29ee, (q15_t)0x29e8, (q15_t)0x29e2, (q15_t)0x29dc, (q15_t)0x29d6,
+  (q15_t)0x29d0, (q15_t)0x29ca, (q15_t)0x29c4, (q15_t)0x29be, (q15_t)0x29b8, (q15_t)0x29b2, (q15_t)0x29ac, (q15_t)0x29a6,
+  (q15_t)0x29a0, (q15_t)0x299a, (q15_t)0x2994, (q15_t)0x298e, (q15_t)0x2989, (q15_t)0x2983, (q15_t)0x297d, (q15_t)0x2977,
+  (q15_t)0x2971, (q15_t)0x296b, (q15_t)0x2965, (q15_t)0x295f, (q15_t)0x2959, (q15_t)0x2953, (q15_t)0x294d, (q15_t)0x2947,
+  (q15_t)0x2941, (q15_t)0x293b, (q15_t)0x2935, (q15_t)0x292f, (q15_t)0x2929, (q15_t)0x2923, (q15_t)0x291d, (q15_t)0x2918,
+  (q15_t)0x2912, (q15_t)0x290c, (q15_t)0x2906, (q15_t)0x2900, (q15_t)0x28fa, (q15_t)0x28f4, (q15_t)0x28ee, (q15_t)0x28e8,
+  (q15_t)0x28e2, (q15_t)0x28dc, (q15_t)0x28d6, (q15_t)0x28d0, (q15_t)0x28ca, (q15_t)0x28c4, (q15_t)0x28be, (q15_t)0x28b8,
+  (q15_t)0x28b2, (q15_t)0x28ac, (q15_t)0x28a6, (q15_t)0x28a0, (q15_t)0x289a, (q15_t)0x2895, (q15_t)0x288f, (q15_t)0x2889,
+  (q15_t)0x2883, (q15_t)0x287d, (q15_t)0x2877, (q15_t)0x2871, (q15_t)0x286b, (q15_t)0x2865, (q15_t)0x285f, (q15_t)0x2859,
+  (q15_t)0x2853, (q15_t)0x284d, (q15_t)0x2847, (q15_t)0x2841, (q15_t)0x283b, (q15_t)0x2835, (q15_t)0x282f, (q15_t)0x2829,
+  (q15_t)0x2823, (q15_t)0x281d, (q15_t)0x2817, (q15_t)0x2811, (q15_t)0x280b, (q15_t)0x2805, (q15_t)0x27ff, (q15_t)0x27f9,
+  (q15_t)0x27f3, (q15_t)0x27ee, (q15_t)0x27e8, (q15_t)0x27e2, (q15_t)0x27dc, (q15_t)0x27d6, (q15_t)0x27d0, (q15_t)0x27ca,
+  (q15_t)0x27c4, (q15_t)0x27be, (q15_t)0x27b8, (q15_t)0x27b2, (q15_t)0x27ac, (q15_t)0x27a6, (q15_t)0x27a0, (q15_t)0x279a,
+  (q15_t)0x2794, (q15_t)0x278e, (q15_t)0x2788, (q15_t)0x2782, (q15_t)0x277c, (q15_t)0x2776, (q15_t)0x2770, (q15_t)0x276a,
+  (q15_t)0x2764, (q15_t)0x275e, (q15_t)0x2758, (q15_t)0x2752, (q15_t)0x274c, (q15_t)0x2746, (q15_t)0x2740, (q15_t)0x273a,
+  (q15_t)0x2734, (q15_t)0x272e, (q15_t)0x2728, (q15_t)0x2722, (q15_t)0x271c, (q15_t)0x2716, (q15_t)0x2710, (q15_t)0x270a,
+  (q15_t)0x2704, (q15_t)0x26fe, (q15_t)0x26f8, (q15_t)0x26f2, (q15_t)0x26ec, (q15_t)0x26e7, (q15_t)0x26e1, (q15_t)0x26db,
+  (q15_t)0x26d5, (q15_t)0x26cf, (q15_t)0x26c9, (q15_t)0x26c3, (q15_t)0x26bd, (q15_t)0x26b7, (q15_t)0x26b1, (q15_t)0x26ab,
+  (q15_t)0x26a5, (q15_t)0x269f, (q15_t)0x2699, (q15_t)0x2693, (q15_t)0x268d, (q15_t)0x2687, (q15_t)0x2681, (q15_t)0x267b,
+  (q15_t)0x2675, (q15_t)0x266f, (q15_t)0x2669, (q15_t)0x2663, (q15_t)0x265d, (q15_t)0x2657, (q15_t)0x2651, (q15_t)0x264b,
+  (q15_t)0x2645, (q15_t)0x263f, (q15_t)0x2639, (q15_t)0x2633, (q15_t)0x262d, (q15_t)0x2627, (q15_t)0x2621, (q15_t)0x261b,
+  (q15_t)0x2615, (q15_t)0x260f, (q15_t)0x2609, (q15_t)0x2603, (q15_t)0x25fd, (q15_t)0x25f7, (q15_t)0x25f1, (q15_t)0x25eb,
+  (q15_t)0x25e5, (q15_t)0x25df, (q15_t)0x25d9, (q15_t)0x25d3, (q15_t)0x25cd, (q15_t)0x25c7, (q15_t)0x25c1, (q15_t)0x25bb,
+  (q15_t)0x25b5, (q15_t)0x25af, (q15_t)0x25a9, (q15_t)0x25a3, (q15_t)0x259d, (q15_t)0x2597, (q15_t)0x2591, (q15_t)0x258b,
+  (q15_t)0x2585, (q15_t)0x257f, (q15_t)0x2579, (q15_t)0x2573, (q15_t)0x256d, (q15_t)0x2567, (q15_t)0x2561, (q15_t)0x255b,
+  (q15_t)0x2555, (q15_t)0x254f, (q15_t)0x2549, (q15_t)0x2543, (q15_t)0x253d, (q15_t)0x2537, (q15_t)0x2531, (q15_t)0x252b,
+  (q15_t)0x2525, (q15_t)0x251f, (q15_t)0x2519, (q15_t)0x2513, (q15_t)0x250c, (q15_t)0x2506, (q15_t)0x2500, (q15_t)0x24fa,
+  (q15_t)0x24f4, (q15_t)0x24ee, (q15_t)0x24e8, (q15_t)0x24e2, (q15_t)0x24dc, (q15_t)0x24d6, (q15_t)0x24d0, (q15_t)0x24ca,
+  (q15_t)0x24c4, (q15_t)0x24be, (q15_t)0x24b8, (q15_t)0x24b2, (q15_t)0x24ac, (q15_t)0x24a6, (q15_t)0x24a0, (q15_t)0x249a,
+  (q15_t)0x2494, (q15_t)0x248e, (q15_t)0x2488, (q15_t)0x2482, (q15_t)0x247c, (q15_t)0x2476, (q15_t)0x2470, (q15_t)0x246a,
+  (q15_t)0x2464, (q15_t)0x245e, (q15_t)0x2458, (q15_t)0x2452, (q15_t)0x244c, (q15_t)0x2446, (q15_t)0x2440, (q15_t)0x243a,
+  (q15_t)0x2434, (q15_t)0x242e, (q15_t)0x2428, (q15_t)0x2422, (q15_t)0x241c, (q15_t)0x2416, (q15_t)0x2410, (q15_t)0x240a,
+  (q15_t)0x2404, (q15_t)0x23fd, (q15_t)0x23f7, (q15_t)0x23f1, (q15_t)0x23eb, (q15_t)0x23e5, (q15_t)0x23df, (q15_t)0x23d9,
+  (q15_t)0x23d3, (q15_t)0x23cd, (q15_t)0x23c7, (q15_t)0x23c1, (q15_t)0x23bb, (q15_t)0x23b5, (q15_t)0x23af, (q15_t)0x23a9,
+  (q15_t)0x23a3, (q15_t)0x239d, (q15_t)0x2397, (q15_t)0x2391, (q15_t)0x238b, (q15_t)0x2385, (q15_t)0x237f, (q15_t)0x2379,
+  (q15_t)0x2373, (q15_t)0x236d, (q15_t)0x2367, (q15_t)0x2361, (q15_t)0x235b, (q15_t)0x2355, (q15_t)0x234e, (q15_t)0x2348,
+  (q15_t)0x2342, (q15_t)0x233c, (q15_t)0x2336, (q15_t)0x2330, (q15_t)0x232a, (q15_t)0x2324, (q15_t)0x231e, (q15_t)0x2318,
+  (q15_t)0x2312, (q15_t)0x230c, (q15_t)0x2306, (q15_t)0x2300, (q15_t)0x22fa, (q15_t)0x22f4, (q15_t)0x22ee, (q15_t)0x22e8,
+  (q15_t)0x22e2, (q15_t)0x22dc, (q15_t)0x22d6, (q15_t)0x22d0, (q15_t)0x22ca, (q15_t)0x22c4, (q15_t)0x22bd, (q15_t)0x22b7,
+  (q15_t)0x22b1, (q15_t)0x22ab, (q15_t)0x22a5, (q15_t)0x229f, (q15_t)0x2299, (q15_t)0x2293, (q15_t)0x228d, (q15_t)0x2287,
+  (q15_t)0x2281, (q15_t)0x227b, (q15_t)0x2275, (q15_t)0x226f, (q15_t)0x2269, (q15_t)0x2263, (q15_t)0x225d, (q15_t)0x2257,
+  (q15_t)0x2251, (q15_t)0x224a, (q15_t)0x2244, (q15_t)0x223e, (q15_t)0x2238, (q15_t)0x2232, (q15_t)0x222c, (q15_t)0x2226,
+  (q15_t)0x2220, (q15_t)0x221a, (q15_t)0x2214, (q15_t)0x220e, (q15_t)0x2208, (q15_t)0x2202, (q15_t)0x21fc, (q15_t)0x21f6,
+  (q15_t)0x21f0, (q15_t)0x21ea, (q15_t)0x21e4, (q15_t)0x21dd, (q15_t)0x21d7, (q15_t)0x21d1, (q15_t)0x21cb, (q15_t)0x21c5,
+  (q15_t)0x21bf, (q15_t)0x21b9, (q15_t)0x21b3, (q15_t)0x21ad, (q15_t)0x21a7, (q15_t)0x21a1, (q15_t)0x219b, (q15_t)0x2195,
+  (q15_t)0x218f, (q15_t)0x2189, (q15_t)0x2183, (q15_t)0x217c, (q15_t)0x2176, (q15_t)0x2170, (q15_t)0x216a, (q15_t)0x2164,
+  (q15_t)0x215e, (q15_t)0x2158, (q15_t)0x2152, (q15_t)0x214c, (q15_t)0x2146, (q15_t)0x2140, (q15_t)0x213a, (q15_t)0x2134,
+  (q15_t)0x212e, (q15_t)0x2128, (q15_t)0x2121, (q15_t)0x211b, (q15_t)0x2115, (q15_t)0x210f, (q15_t)0x2109, (q15_t)0x2103,
+  (q15_t)0x20fd, (q15_t)0x20f7, (q15_t)0x20f1, (q15_t)0x20eb, (q15_t)0x20e5, (q15_t)0x20df, (q15_t)0x20d9, (q15_t)0x20d3,
+  (q15_t)0x20cc, (q15_t)0x20c6, (q15_t)0x20c0, (q15_t)0x20ba, (q15_t)0x20b4, (q15_t)0x20ae, (q15_t)0x20a8, (q15_t)0x20a2,
+  (q15_t)0x209c, (q15_t)0x2096, (q15_t)0x2090, (q15_t)0x208a, (q15_t)0x2084, (q15_t)0x207e, (q15_t)0x2077, (q15_t)0x2071,
+  (q15_t)0x206b, (q15_t)0x2065, (q15_t)0x205f, (q15_t)0x2059, (q15_t)0x2053, (q15_t)0x204d, (q15_t)0x2047, (q15_t)0x2041,
+  (q15_t)0x203b, (q15_t)0x2035, (q15_t)0x202e, (q15_t)0x2028, (q15_t)0x2022, (q15_t)0x201c, (q15_t)0x2016, (q15_t)0x2010,
+  (q15_t)0x200a, (q15_t)0x2004, (q15_t)0x1ffe, (q15_t)0x1ff8, (q15_t)0x1ff2, (q15_t)0x1fec, (q15_t)0x1fe5, (q15_t)0x1fdf,
+  (q15_t)0x1fd9, (q15_t)0x1fd3, (q15_t)0x1fcd, (q15_t)0x1fc7, (q15_t)0x1fc1, (q15_t)0x1fbb, (q15_t)0x1fb5, (q15_t)0x1faf,
+  (q15_t)0x1fa9, (q15_t)0x1fa3, (q15_t)0x1f9c, (q15_t)0x1f96, (q15_t)0x1f90, (q15_t)0x1f8a, (q15_t)0x1f84, (q15_t)0x1f7e,
+  (q15_t)0x1f78, (q15_t)0x1f72, (q15_t)0x1f6c, (q15_t)0x1f66, (q15_t)0x1f60, (q15_t)0x1f59, (q15_t)0x1f53, (q15_t)0x1f4d,
+  (q15_t)0x1f47, (q15_t)0x1f41, (q15_t)0x1f3b, (q15_t)0x1f35, (q15_t)0x1f2f, (q15_t)0x1f29, (q15_t)0x1f23, (q15_t)0x1f1d,
+  (q15_t)0x1f16, (q15_t)0x1f10, (q15_t)0x1f0a, (q15_t)0x1f04, (q15_t)0x1efe, (q15_t)0x1ef8, (q15_t)0x1ef2, (q15_t)0x1eec,
+  (q15_t)0x1ee6, (q15_t)0x1ee0, (q15_t)0x1ed9, (q15_t)0x1ed3, (q15_t)0x1ecd, (q15_t)0x1ec7, (q15_t)0x1ec1, (q15_t)0x1ebb,
+  (q15_t)0x1eb5, (q15_t)0x1eaf, (q15_t)0x1ea9, (q15_t)0x1ea3, (q15_t)0x1e9c, (q15_t)0x1e96, (q15_t)0x1e90, (q15_t)0x1e8a,
+  (q15_t)0x1e84, (q15_t)0x1e7e, (q15_t)0x1e78, (q15_t)0x1e72, (q15_t)0x1e6c, (q15_t)0x1e66, (q15_t)0x1e5f, (q15_t)0x1e59,
+  (q15_t)0x1e53, (q15_t)0x1e4d, (q15_t)0x1e47, (q15_t)0x1e41, (q15_t)0x1e3b, (q15_t)0x1e35, (q15_t)0x1e2f, (q15_t)0x1e29,
+  (q15_t)0x1e22, (q15_t)0x1e1c, (q15_t)0x1e16, (q15_t)0x1e10, (q15_t)0x1e0a, (q15_t)0x1e04, (q15_t)0x1dfe, (q15_t)0x1df8,
+  (q15_t)0x1df2, (q15_t)0x1deb, (q15_t)0x1de5, (q15_t)0x1ddf, (q15_t)0x1dd9, (q15_t)0x1dd3, (q15_t)0x1dcd, (q15_t)0x1dc7,
+  (q15_t)0x1dc1, (q15_t)0x1dbb, (q15_t)0x1db4, (q15_t)0x1dae, (q15_t)0x1da8, (q15_t)0x1da2, (q15_t)0x1d9c, (q15_t)0x1d96,
+  (q15_t)0x1d90, (q15_t)0x1d8a, (q15_t)0x1d84, (q15_t)0x1d7d, (q15_t)0x1d77, (q15_t)0x1d71, (q15_t)0x1d6b, (q15_t)0x1d65,
+  (q15_t)0x1d5f, (q15_t)0x1d59, (q15_t)0x1d53, (q15_t)0x1d4c, (q15_t)0x1d46, (q15_t)0x1d40, (q15_t)0x1d3a, (q15_t)0x1d34,
+  (q15_t)0x1d2e, (q15_t)0x1d28, (q15_t)0x1d22, (q15_t)0x1d1c, (q15_t)0x1d15, (q15_t)0x1d0f, (q15_t)0x1d09, (q15_t)0x1d03,
+  (q15_t)0x1cfd, (q15_t)0x1cf7, (q15_t)0x1cf1, (q15_t)0x1ceb, (q15_t)0x1ce4, (q15_t)0x1cde, (q15_t)0x1cd8, (q15_t)0x1cd2,
+  (q15_t)0x1ccc, (q15_t)0x1cc6, (q15_t)0x1cc0, (q15_t)0x1cba, (q15_t)0x1cb3, (q15_t)0x1cad, (q15_t)0x1ca7, (q15_t)0x1ca1,
+  (q15_t)0x1c9b, (q15_t)0x1c95, (q15_t)0x1c8f, (q15_t)0x1c89, (q15_t)0x1c83, (q15_t)0x1c7c, (q15_t)0x1c76, (q15_t)0x1c70,
+  (q15_t)0x1c6a, (q15_t)0x1c64, (q15_t)0x1c5e, (q15_t)0x1c58, (q15_t)0x1c51, (q15_t)0x1c4b, (q15_t)0x1c45, (q15_t)0x1c3f,
+  (q15_t)0x1c39, (q15_t)0x1c33, (q15_t)0x1c2d, (q15_t)0x1c27, (q15_t)0x1c20, (q15_t)0x1c1a, (q15_t)0x1c14, (q15_t)0x1c0e,
+  (q15_t)0x1c08, (q15_t)0x1c02, (q15_t)0x1bfc, (q15_t)0x1bf6, (q15_t)0x1bef, (q15_t)0x1be9, (q15_t)0x1be3, (q15_t)0x1bdd,
+  (q15_t)0x1bd7, (q15_t)0x1bd1, (q15_t)0x1bcb, (q15_t)0x1bc4, (q15_t)0x1bbe, (q15_t)0x1bb8, (q15_t)0x1bb2, (q15_t)0x1bac,
+  (q15_t)0x1ba6, (q15_t)0x1ba0, (q15_t)0x1b9a, (q15_t)0x1b93, (q15_t)0x1b8d, (q15_t)0x1b87, (q15_t)0x1b81, (q15_t)0x1b7b,
+  (q15_t)0x1b75, (q15_t)0x1b6f, (q15_t)0x1b68, (q15_t)0x1b62, (q15_t)0x1b5c, (q15_t)0x1b56, (q15_t)0x1b50, (q15_t)0x1b4a,
+  (q15_t)0x1b44, (q15_t)0x1b3d, (q15_t)0x1b37, (q15_t)0x1b31, (q15_t)0x1b2b, (q15_t)0x1b25, (q15_t)0x1b1f, (q15_t)0x1b19,
+  (q15_t)0x1b13, (q15_t)0x1b0c, (q15_t)0x1b06, (q15_t)0x1b00, (q15_t)0x1afa, (q15_t)0x1af4, (q15_t)0x1aee, (q15_t)0x1ae8,
+  (q15_t)0x1ae1, (q15_t)0x1adb, (q15_t)0x1ad5, (q15_t)0x1acf, (q15_t)0x1ac9, (q15_t)0x1ac3, (q15_t)0x1abd, (q15_t)0x1ab6,
+  (q15_t)0x1ab0, (q15_t)0x1aaa, (q15_t)0x1aa4, (q15_t)0x1a9e, (q15_t)0x1a98, (q15_t)0x1a91, (q15_t)0x1a8b, (q15_t)0x1a85,
+  (q15_t)0x1a7f, (q15_t)0x1a79, (q15_t)0x1a73, (q15_t)0x1a6d, (q15_t)0x1a66, (q15_t)0x1a60, (q15_t)0x1a5a, (q15_t)0x1a54,
+  (q15_t)0x1a4e, (q15_t)0x1a48, (q15_t)0x1a42, (q15_t)0x1a3b, (q15_t)0x1a35, (q15_t)0x1a2f, (q15_t)0x1a29, (q15_t)0x1a23,
+  (q15_t)0x1a1d, (q15_t)0x1a17, (q15_t)0x1a10, (q15_t)0x1a0a, (q15_t)0x1a04, (q15_t)0x19fe, (q15_t)0x19f8, (q15_t)0x19f2,
+  (q15_t)0x19eb, (q15_t)0x19e5, (q15_t)0x19df, (q15_t)0x19d9, (q15_t)0x19d3, (q15_t)0x19cd, (q15_t)0x19c7, (q15_t)0x19c0,
+  (q15_t)0x19ba, (q15_t)0x19b4, (q15_t)0x19ae, (q15_t)0x19a8, (q15_t)0x19a2, (q15_t)0x199b, (q15_t)0x1995, (q15_t)0x198f,
+  (q15_t)0x1989, (q15_t)0x1983, (q15_t)0x197d, (q15_t)0x1977, (q15_t)0x1970, (q15_t)0x196a, (q15_t)0x1964, (q15_t)0x195e,
+  (q15_t)0x1958, (q15_t)0x1952, (q15_t)0x194b, (q15_t)0x1945, (q15_t)0x193f, (q15_t)0x1939, (q15_t)0x1933, (q15_t)0x192d,
+  (q15_t)0x1926, (q15_t)0x1920, (q15_t)0x191a, (q15_t)0x1914, (q15_t)0x190e, (q15_t)0x1908, (q15_t)0x1901, (q15_t)0x18fb,
+  (q15_t)0x18f5, (q15_t)0x18ef, (q15_t)0x18e9, (q15_t)0x18e3, (q15_t)0x18dc, (q15_t)0x18d6, (q15_t)0x18d0, (q15_t)0x18ca,
+  (q15_t)0x18c4, (q15_t)0x18be, (q15_t)0x18b8, (q15_t)0x18b1, (q15_t)0x18ab, (q15_t)0x18a5, (q15_t)0x189f, (q15_t)0x1899,
+  (q15_t)0x1893, (q15_t)0x188c, (q15_t)0x1886, (q15_t)0x1880, (q15_t)0x187a, (q15_t)0x1874, (q15_t)0x186e, (q15_t)0x1867,
+  (q15_t)0x1861, (q15_t)0x185b, (q15_t)0x1855, (q15_t)0x184f, (q15_t)0x1848, (q15_t)0x1842, (q15_t)0x183c, (q15_t)0x1836,
+  (q15_t)0x1830, (q15_t)0x182a, (q15_t)0x1823, (q15_t)0x181d, (q15_t)0x1817, (q15_t)0x1811, (q15_t)0x180b, (q15_t)0x1805,
+  (q15_t)0x17fe, (q15_t)0x17f8, (q15_t)0x17f2, (q15_t)0x17ec, (q15_t)0x17e6, (q15_t)0x17e0, (q15_t)0x17d9, (q15_t)0x17d3,
+  (q15_t)0x17cd, (q15_t)0x17c7, (q15_t)0x17c1, (q15_t)0x17bb, (q15_t)0x17b4, (q15_t)0x17ae, (q15_t)0x17a8, (q15_t)0x17a2,
+  (q15_t)0x179c, (q15_t)0x1795, (q15_t)0x178f, (q15_t)0x1789, (q15_t)0x1783, (q15_t)0x177d, (q15_t)0x1777, (q15_t)0x1770,
+  (q15_t)0x176a, (q15_t)0x1764, (q15_t)0x175e, (q15_t)0x1758, (q15_t)0x1752, (q15_t)0x174b, (q15_t)0x1745, (q15_t)0x173f,
+  (q15_t)0x1739, (q15_t)0x1733, (q15_t)0x172c, (q15_t)0x1726, (q15_t)0x1720, (q15_t)0x171a, (q15_t)0x1714, (q15_t)0x170e,
+  (q15_t)0x1707, (q15_t)0x1701, (q15_t)0x16fb, (q15_t)0x16f5, (q15_t)0x16ef, (q15_t)0x16e8, (q15_t)0x16e2, (q15_t)0x16dc,
+  (q15_t)0x16d6, (q15_t)0x16d0, (q15_t)0x16ca, (q15_t)0x16c3, (q15_t)0x16bd, (q15_t)0x16b7, (q15_t)0x16b1, (q15_t)0x16ab,
+  (q15_t)0x16a4, (q15_t)0x169e, (q15_t)0x1698, (q15_t)0x1692, (q15_t)0x168c, (q15_t)0x1686, (q15_t)0x167f, (q15_t)0x1679,
+  (q15_t)0x1673, (q15_t)0x166d, (q15_t)0x1667, (q15_t)0x1660, (q15_t)0x165a, (q15_t)0x1654, (q15_t)0x164e, (q15_t)0x1648,
+  (q15_t)0x1642, (q15_t)0x163b, (q15_t)0x1635, (q15_t)0x162f, (q15_t)0x1629, (q15_t)0x1623, (q15_t)0x161c, (q15_t)0x1616,
+  (q15_t)0x1610, (q15_t)0x160a, (q15_t)0x1604, (q15_t)0x15fd, (q15_t)0x15f7, (q15_t)0x15f1, (q15_t)0x15eb, (q15_t)0x15e5,
+  (q15_t)0x15de, (q15_t)0x15d8, (q15_t)0x15d2, (q15_t)0x15cc, (q15_t)0x15c6, (q15_t)0x15c0, (q15_t)0x15b9, (q15_t)0x15b3,
+  (q15_t)0x15ad, (q15_t)0x15a7, (q15_t)0x15a1, (q15_t)0x159a, (q15_t)0x1594, (q15_t)0x158e, (q15_t)0x1588, (q15_t)0x1582,
+  (q15_t)0x157b, (q15_t)0x1575, (q15_t)0x156f, (q15_t)0x1569, (q15_t)0x1563, (q15_t)0x155c, (q15_t)0x1556, (q15_t)0x1550,
+  (q15_t)0x154a, (q15_t)0x1544, (q15_t)0x153d, (q15_t)0x1537, (q15_t)0x1531, (q15_t)0x152b, (q15_t)0x1525, (q15_t)0x151e,
+  (q15_t)0x1518, (q15_t)0x1512, (q15_t)0x150c, (q15_t)0x1506, (q15_t)0x14ff, (q15_t)0x14f9, (q15_t)0x14f3, (q15_t)0x14ed,
+  (q15_t)0x14e7, (q15_t)0x14e0, (q15_t)0x14da, (q15_t)0x14d4, (q15_t)0x14ce, (q15_t)0x14c8, (q15_t)0x14c1, (q15_t)0x14bb,
+  (q15_t)0x14b5, (q15_t)0x14af, (q15_t)0x14a9, (q15_t)0x14a2, (q15_t)0x149c, (q15_t)0x1496, (q15_t)0x1490, (q15_t)0x148a,
+  (q15_t)0x1483, (q15_t)0x147d, (q15_t)0x1477, (q15_t)0x1471, (q15_t)0x146b, (q15_t)0x1464, (q15_t)0x145e, (q15_t)0x1458,
+  (q15_t)0x1452, (q15_t)0x144c, (q15_t)0x1445, (q15_t)0x143f, (q15_t)0x1439, (q15_t)0x1433, (q15_t)0x142d, (q15_t)0x1426,
+  (q15_t)0x1420, (q15_t)0x141a, (q15_t)0x1414, (q15_t)0x140e, (q15_t)0x1407, (q15_t)0x1401, (q15_t)0x13fb, (q15_t)0x13f5,
+  (q15_t)0x13ef, (q15_t)0x13e8, (q15_t)0x13e2, (q15_t)0x13dc, (q15_t)0x13d6, (q15_t)0x13d0, (q15_t)0x13c9, (q15_t)0x13c3,
+  (q15_t)0x13bd, (q15_t)0x13b7, (q15_t)0x13b1, (q15_t)0x13aa, (q15_t)0x13a4, (q15_t)0x139e, (q15_t)0x1398, (q15_t)0x1391,
+  (q15_t)0x138b, (q15_t)0x1385, (q15_t)0x137f, (q15_t)0x1379, (q15_t)0x1372, (q15_t)0x136c, (q15_t)0x1366, (q15_t)0x1360,
+  (q15_t)0x135a, (q15_t)0x1353, (q15_t)0x134d, (q15_t)0x1347, (q15_t)0x1341, (q15_t)0x133b, (q15_t)0x1334, (q15_t)0x132e,
+  (q15_t)0x1328, (q15_t)0x1322, (q15_t)0x131b, (q15_t)0x1315, (q15_t)0x130f, (q15_t)0x1309, (q15_t)0x1303, (q15_t)0x12fc,
+  (q15_t)0x12f6, (q15_t)0x12f0, (q15_t)0x12ea, (q15_t)0x12e4, (q15_t)0x12dd, (q15_t)0x12d7, (q15_t)0x12d1, (q15_t)0x12cb,
+  (q15_t)0x12c4, (q15_t)0x12be, (q15_t)0x12b8, (q15_t)0x12b2, (q15_t)0x12ac, (q15_t)0x12a5, (q15_t)0x129f, (q15_t)0x1299,
+  (q15_t)0x1293, (q15_t)0x128d, (q15_t)0x1286, (q15_t)0x1280, (q15_t)0x127a, (q15_t)0x1274, (q15_t)0x126d, (q15_t)0x1267,
+  (q15_t)0x1261, (q15_t)0x125b, (q15_t)0x1255, (q15_t)0x124e, (q15_t)0x1248, (q15_t)0x1242, (q15_t)0x123c, (q15_t)0x1235,
+  (q15_t)0x122f, (q15_t)0x1229, (q15_t)0x1223, (q15_t)0x121d, (q15_t)0x1216, (q15_t)0x1210, (q15_t)0x120a, (q15_t)0x1204,
+  (q15_t)0x11fd, (q15_t)0x11f7, (q15_t)0x11f1, (q15_t)0x11eb, (q15_t)0x11e5, (q15_t)0x11de, (q15_t)0x11d8, (q15_t)0x11d2,
+  (q15_t)0x11cc, (q15_t)0x11c5, (q15_t)0x11bf, (q15_t)0x11b9, (q15_t)0x11b3, (q15_t)0x11ad, (q15_t)0x11a6, (q15_t)0x11a0,
+  (q15_t)0x119a, (q15_t)0x1194, (q15_t)0x118d, (q15_t)0x1187, (q15_t)0x1181, (q15_t)0x117b, (q15_t)0x1175, (q15_t)0x116e,
+  (q15_t)0x1168, (q15_t)0x1162, (q15_t)0x115c, (q15_t)0x1155, (q15_t)0x114f, (q15_t)0x1149, (q15_t)0x1143, (q15_t)0x113d,
+  (q15_t)0x1136, (q15_t)0x1130, (q15_t)0x112a, (q15_t)0x1124, (q15_t)0x111d, (q15_t)0x1117, (q15_t)0x1111, (q15_t)0x110b,
+  (q15_t)0x1105, (q15_t)0x10fe, (q15_t)0x10f8, (q15_t)0x10f2, (q15_t)0x10ec, (q15_t)0x10e5, (q15_t)0x10df, (q15_t)0x10d9,
+  (q15_t)0x10d3, (q15_t)0x10cc, (q15_t)0x10c6, (q15_t)0x10c0, (q15_t)0x10ba, (q15_t)0x10b4, (q15_t)0x10ad, (q15_t)0x10a7,
+  (q15_t)0x10a1, (q15_t)0x109b, (q15_t)0x1094, (q15_t)0x108e, (q15_t)0x1088, (q15_t)0x1082, (q15_t)0x107b, (q15_t)0x1075,
+  (q15_t)0x106f, (q15_t)0x1069, (q15_t)0x1063, (q15_t)0x105c, (q15_t)0x1056, (q15_t)0x1050, (q15_t)0x104a, (q15_t)0x1043,
+  (q15_t)0x103d, (q15_t)0x1037, (q15_t)0x1031, (q15_t)0x102a, (q15_t)0x1024, (q15_t)0x101e, (q15_t)0x1018, (q15_t)0x1012,
+  (q15_t)0x100b, (q15_t)0x1005, (q15_t)0xfff, (q15_t)0xff9, (q15_t)0xff2, (q15_t)0xfec, (q15_t)0xfe6, (q15_t)0xfe0,
+  (q15_t)0xfd9, (q15_t)0xfd3, (q15_t)0xfcd, (q15_t)0xfc7, (q15_t)0xfc0, (q15_t)0xfba, (q15_t)0xfb4, (q15_t)0xfae,
+  (q15_t)0xfa8, (q15_t)0xfa1, (q15_t)0xf9b, (q15_t)0xf95, (q15_t)0xf8f, (q15_t)0xf88, (q15_t)0xf82, (q15_t)0xf7c,
+  (q15_t)0xf76, (q15_t)0xf6f, (q15_t)0xf69, (q15_t)0xf63, (q15_t)0xf5d, (q15_t)0xf56, (q15_t)0xf50, (q15_t)0xf4a,
+  (q15_t)0xf44, (q15_t)0xf3e, (q15_t)0xf37, (q15_t)0xf31, (q15_t)0xf2b, (q15_t)0xf25, (q15_t)0xf1e, (q15_t)0xf18,
+  (q15_t)0xf12, (q15_t)0xf0c, (q15_t)0xf05, (q15_t)0xeff, (q15_t)0xef9, (q15_t)0xef3, (q15_t)0xeec, (q15_t)0xee6,
+  (q15_t)0xee0, (q15_t)0xeda, (q15_t)0xed3, (q15_t)0xecd, (q15_t)0xec7, (q15_t)0xec1, (q15_t)0xeba, (q15_t)0xeb4,
+  (q15_t)0xeae, (q15_t)0xea8, (q15_t)0xea1, (q15_t)0xe9b, (q15_t)0xe95, (q15_t)0xe8f, (q15_t)0xe89, (q15_t)0xe82,
+  (q15_t)0xe7c, (q15_t)0xe76, (q15_t)0xe70, (q15_t)0xe69, (q15_t)0xe63, (q15_t)0xe5d, (q15_t)0xe57, (q15_t)0xe50,
+  (q15_t)0xe4a, (q15_t)0xe44, (q15_t)0xe3e, (q15_t)0xe37, (q15_t)0xe31, (q15_t)0xe2b, (q15_t)0xe25, (q15_t)0xe1e,
+  (q15_t)0xe18, (q15_t)0xe12, (q15_t)0xe0c, (q15_t)0xe05, (q15_t)0xdff, (q15_t)0xdf9, (q15_t)0xdf3, (q15_t)0xdec,
+  (q15_t)0xde6, (q15_t)0xde0, (q15_t)0xdda, (q15_t)0xdd3, (q15_t)0xdcd, (q15_t)0xdc7, (q15_t)0xdc1, (q15_t)0xdba,
+  (q15_t)0xdb4, (q15_t)0xdae, (q15_t)0xda8, (q15_t)0xda1, (q15_t)0xd9b, (q15_t)0xd95, (q15_t)0xd8f, (q15_t)0xd88,
+  (q15_t)0xd82, (q15_t)0xd7c, (q15_t)0xd76, (q15_t)0xd6f, (q15_t)0xd69, (q15_t)0xd63, (q15_t)0xd5d, (q15_t)0xd56,
+  (q15_t)0xd50, (q15_t)0xd4a, (q15_t)0xd44, (q15_t)0xd3d, (q15_t)0xd37, (q15_t)0xd31, (q15_t)0xd2b, (q15_t)0xd24,
+  (q15_t)0xd1e, (q15_t)0xd18, (q15_t)0xd12, (q15_t)0xd0b, (q15_t)0xd05, (q15_t)0xcff, (q15_t)0xcf9, (q15_t)0xcf2,
+  (q15_t)0xcec, (q15_t)0xce6, (q15_t)0xce0, (q15_t)0xcd9, (q15_t)0xcd3, (q15_t)0xccd, (q15_t)0xcc7, (q15_t)0xcc0,
+  (q15_t)0xcba, (q15_t)0xcb4, (q15_t)0xcae, (q15_t)0xca7, (q15_t)0xca1, (q15_t)0xc9b, (q15_t)0xc95, (q15_t)0xc8e,
+  (q15_t)0xc88, (q15_t)0xc82, (q15_t)0xc7c, (q15_t)0xc75, (q15_t)0xc6f, (q15_t)0xc69, (q15_t)0xc63, (q15_t)0xc5c,
+  (q15_t)0xc56, (q15_t)0xc50, (q15_t)0xc4a, (q15_t)0xc43, (q15_t)0xc3d, (q15_t)0xc37, (q15_t)0xc31, (q15_t)0xc2a,
+  (q15_t)0xc24, (q15_t)0xc1e, (q15_t)0xc18, (q15_t)0xc11, (q15_t)0xc0b, (q15_t)0xc05, (q15_t)0xbff, (q15_t)0xbf8,
+  (q15_t)0xbf2, (q15_t)0xbec, (q15_t)0xbe6, (q15_t)0xbdf, (q15_t)0xbd9, (q15_t)0xbd3, (q15_t)0xbcd, (q15_t)0xbc6,
+  (q15_t)0xbc0, (q15_t)0xbba, (q15_t)0xbb4, (q15_t)0xbad, (q15_t)0xba7, (q15_t)0xba1, (q15_t)0xb9b, (q15_t)0xb94,
+  (q15_t)0xb8e, (q15_t)0xb88, (q15_t)0xb81, (q15_t)0xb7b, (q15_t)0xb75, (q15_t)0xb6f, (q15_t)0xb68, (q15_t)0xb62,
+  (q15_t)0xb5c, (q15_t)0xb56, (q15_t)0xb4f, (q15_t)0xb49, (q15_t)0xb43, (q15_t)0xb3d, (q15_t)0xb36, (q15_t)0xb30,
+  (q15_t)0xb2a, (q15_t)0xb24, (q15_t)0xb1d, (q15_t)0xb17, (q15_t)0xb11, (q15_t)0xb0b, (q15_t)0xb04, (q15_t)0xafe,
+  (q15_t)0xaf8, (q15_t)0xaf2, (q15_t)0xaeb, (q15_t)0xae5, (q15_t)0xadf, (q15_t)0xad8, (q15_t)0xad2, (q15_t)0xacc,
+  (q15_t)0xac6, (q15_t)0xabf, (q15_t)0xab9, (q15_t)0xab3, (q15_t)0xaad, (q15_t)0xaa6, (q15_t)0xaa0, (q15_t)0xa9a,
+  (q15_t)0xa94, (q15_t)0xa8d, (q15_t)0xa87, (q15_t)0xa81, (q15_t)0xa7b, (q15_t)0xa74, (q15_t)0xa6e, (q15_t)0xa68,
+  (q15_t)0xa62, (q15_t)0xa5b, (q15_t)0xa55, (q15_t)0xa4f, (q15_t)0xa48, (q15_t)0xa42, (q15_t)0xa3c, (q15_t)0xa36,
+  (q15_t)0xa2f, (q15_t)0xa29, (q15_t)0xa23, (q15_t)0xa1d, (q15_t)0xa16, (q15_t)0xa10, (q15_t)0xa0a, (q15_t)0xa04,
+  (q15_t)0x9fd, (q15_t)0x9f7, (q15_t)0x9f1, (q15_t)0x9eb, (q15_t)0x9e4, (q15_t)0x9de, (q15_t)0x9d8, (q15_t)0x9d1,
+  (q15_t)0x9cb, (q15_t)0x9c5, (q15_t)0x9bf, (q15_t)0x9b8, (q15_t)0x9b2, (q15_t)0x9ac, (q15_t)0x9a6, (q15_t)0x99f,
+  (q15_t)0x999, (q15_t)0x993, (q15_t)0x98d, (q15_t)0x986, (q15_t)0x980, (q15_t)0x97a, (q15_t)0x973, (q15_t)0x96d,
+  (q15_t)0x967, (q15_t)0x961, (q15_t)0x95a, (q15_t)0x954, (q15_t)0x94e, (q15_t)0x948, (q15_t)0x941, (q15_t)0x93b,
+  (q15_t)0x935, (q15_t)0x92f, (q15_t)0x928, (q15_t)0x922, (q15_t)0x91c, (q15_t)0x915, (q15_t)0x90f, (q15_t)0x909,
+  (q15_t)0x903, (q15_t)0x8fc, (q15_t)0x8f6, (q15_t)0x8f0, (q15_t)0x8ea, (q15_t)0x8e3, (q15_t)0x8dd, (q15_t)0x8d7,
+  (q15_t)0x8d1, (q15_t)0x8ca, (q15_t)0x8c4, (q15_t)0x8be, (q15_t)0x8b7, (q15_t)0x8b1, (q15_t)0x8ab, (q15_t)0x8a5,
+  (q15_t)0x89e, (q15_t)0x898, (q15_t)0x892, (q15_t)0x88c, (q15_t)0x885, (q15_t)0x87f, (q15_t)0x879, (q15_t)0x872,
+  (q15_t)0x86c, (q15_t)0x866, (q15_t)0x860, (q15_t)0x859, (q15_t)0x853, (q15_t)0x84d, (q15_t)0x847, (q15_t)0x840,
+  (q15_t)0x83a, (q15_t)0x834, (q15_t)0x82e, (q15_t)0x827, (q15_t)0x821, (q15_t)0x81b, (q15_t)0x814, (q15_t)0x80e,
+  (q15_t)0x808, (q15_t)0x802, (q15_t)0x7fb, (q15_t)0x7f5, (q15_t)0x7ef, (q15_t)0x7e9, (q15_t)0x7e2, (q15_t)0x7dc,
+  (q15_t)0x7d6, (q15_t)0x7cf, (q15_t)0x7c9, (q15_t)0x7c3, (q15_t)0x7bd, (q15_t)0x7b6, (q15_t)0x7b0, (q15_t)0x7aa,
+  (q15_t)0x7a4, (q15_t)0x79d, (q15_t)0x797, (q15_t)0x791, (q15_t)0x78a, (q15_t)0x784, (q15_t)0x77e, (q15_t)0x778,
+  (q15_t)0x771, (q15_t)0x76b, (q15_t)0x765, (q15_t)0x75f, (q15_t)0x758, (q15_t)0x752, (q15_t)0x74c, (q15_t)0x745,
+  (q15_t)0x73f, (q15_t)0x739, (q15_t)0x733, (q15_t)0x72c, (q15_t)0x726, (q15_t)0x720, (q15_t)0x71a, (q15_t)0x713,
+  (q15_t)0x70d, (q15_t)0x707, (q15_t)0x700, (q15_t)0x6fa, (q15_t)0x6f4, (q15_t)0x6ee, (q15_t)0x6e7, (q15_t)0x6e1,
+  (q15_t)0x6db, (q15_t)0x6d5, (q15_t)0x6ce, (q15_t)0x6c8, (q15_t)0x6c2, (q15_t)0x6bb, (q15_t)0x6b5, (q15_t)0x6af,
+  (q15_t)0x6a9, (q15_t)0x6a2, (q15_t)0x69c, (q15_t)0x696, (q15_t)0x690, (q15_t)0x689, (q15_t)0x683, (q15_t)0x67d,
+  (q15_t)0x676, (q15_t)0x670, (q15_t)0x66a, (q15_t)0x664, (q15_t)0x65d, (q15_t)0x657, (q15_t)0x651, (q15_t)0x64a,
+  (q15_t)0x644, (q15_t)0x63e, (q15_t)0x638, (q15_t)0x631, (q15_t)0x62b, (q15_t)0x625, (q15_t)0x61f, (q15_t)0x618,
+  (q15_t)0x612, (q15_t)0x60c, (q15_t)0x605, (q15_t)0x5ff, (q15_t)0x5f9, (q15_t)0x5f3, (q15_t)0x5ec, (q15_t)0x5e6,
+  (q15_t)0x5e0, (q15_t)0x5da, (q15_t)0x5d3, (q15_t)0x5cd, (q15_t)0x5c7, (q15_t)0x5c0, (q15_t)0x5ba, (q15_t)0x5b4,
+  (q15_t)0x5ae, (q15_t)0x5a7, (q15_t)0x5a1, (q15_t)0x59b, (q15_t)0x594, (q15_t)0x58e, (q15_t)0x588, (q15_t)0x582,
+  (q15_t)0x57b, (q15_t)0x575, (q15_t)0x56f, (q15_t)0x569, (q15_t)0x562, (q15_t)0x55c, (q15_t)0x556, (q15_t)0x54f,
+  (q15_t)0x549, (q15_t)0x543, (q15_t)0x53d, (q15_t)0x536, (q15_t)0x530, (q15_t)0x52a, (q15_t)0x523, (q15_t)0x51d,
+  (q15_t)0x517, (q15_t)0x511, (q15_t)0x50a, (q15_t)0x504, (q15_t)0x4fe, (q15_t)0x4f8, (q15_t)0x4f1, (q15_t)0x4eb,
+  (q15_t)0x4e5, (q15_t)0x4de, (q15_t)0x4d8, (q15_t)0x4d2, (q15_t)0x4cc, (q15_t)0x4c5, (q15_t)0x4bf, (q15_t)0x4b9,
+  (q15_t)0x4b2, (q15_t)0x4ac, (q15_t)0x4a6, (q15_t)0x4a0, (q15_t)0x499, (q15_t)0x493, (q15_t)0x48d, (q15_t)0x487,
+  (q15_t)0x480, (q15_t)0x47a, (q15_t)0x474, (q15_t)0x46d, (q15_t)0x467, (q15_t)0x461, (q15_t)0x45b, (q15_t)0x454,
+  (q15_t)0x44e, (q15_t)0x448, (q15_t)0x441, (q15_t)0x43b, (q15_t)0x435, (q15_t)0x42f, (q15_t)0x428, (q15_t)0x422,
+  (q15_t)0x41c, (q15_t)0x415, (q15_t)0x40f, (q15_t)0x409, (q15_t)0x403, (q15_t)0x3fc, (q15_t)0x3f6, (q15_t)0x3f0,
+  (q15_t)0x3ea, (q15_t)0x3e3, (q15_t)0x3dd, (q15_t)0x3d7, (q15_t)0x3d0, (q15_t)0x3ca, (q15_t)0x3c4, (q15_t)0x3be,
+  (q15_t)0x3b7, (q15_t)0x3b1, (q15_t)0x3ab, (q15_t)0x3a4, (q15_t)0x39e, (q15_t)0x398, (q15_t)0x392, (q15_t)0x38b,
+  (q15_t)0x385, (q15_t)0x37f, (q15_t)0x378, (q15_t)0x372, (q15_t)0x36c, (q15_t)0x366, (q15_t)0x35f, (q15_t)0x359,
+  (q15_t)0x353, (q15_t)0x34c, (q15_t)0x346, (q15_t)0x340, (q15_t)0x33a, (q15_t)0x333, (q15_t)0x32d, (q15_t)0x327,
+  (q15_t)0x321, (q15_t)0x31a, (q15_t)0x314, (q15_t)0x30e, (q15_t)0x307, (q15_t)0x301, (q15_t)0x2fb, (q15_t)0x2f5,
+  (q15_t)0x2ee, (q15_t)0x2e8, (q15_t)0x2e2, (q15_t)0x2db, (q15_t)0x2d5, (q15_t)0x2cf, (q15_t)0x2c9, (q15_t)0x2c2,
+  (q15_t)0x2bc, (q15_t)0x2b6, (q15_t)0x2af, (q15_t)0x2a9, (q15_t)0x2a3, (q15_t)0x29d, (q15_t)0x296, (q15_t)0x290,
+  (q15_t)0x28a, (q15_t)0x283, (q15_t)0x27d, (q15_t)0x277, (q15_t)0x271, (q15_t)0x26a, (q15_t)0x264, (q15_t)0x25e,
+  (q15_t)0x258, (q15_t)0x251, (q15_t)0x24b, (q15_t)0x245, (q15_t)0x23e, (q15_t)0x238, (q15_t)0x232, (q15_t)0x22c,
+  (q15_t)0x225, (q15_t)0x21f, (q15_t)0x219, (q15_t)0x212, (q15_t)0x20c, (q15_t)0x206, (q15_t)0x200, (q15_t)0x1f9,
+  (q15_t)0x1f3, (q15_t)0x1ed, (q15_t)0x1e6, (q15_t)0x1e0, (q15_t)0x1da, (q15_t)0x1d4, (q15_t)0x1cd, (q15_t)0x1c7,
+  (q15_t)0x1c1, (q15_t)0x1ba, (q15_t)0x1b4, (q15_t)0x1ae, (q15_t)0x1a8, (q15_t)0x1a1, (q15_t)0x19b, (q15_t)0x195,
+  (q15_t)0x18e, (q15_t)0x188, (q15_t)0x182, (q15_t)0x17c, (q15_t)0x175, (q15_t)0x16f, (q15_t)0x169, (q15_t)0x162,
+  (q15_t)0x15c, (q15_t)0x156, (q15_t)0x150, (q15_t)0x149, (q15_t)0x143, (q15_t)0x13d, (q15_t)0x137, (q15_t)0x130,
+  (q15_t)0x12a, (q15_t)0x124, (q15_t)0x11d, (q15_t)0x117, (q15_t)0x111, (q15_t)0x10b, (q15_t)0x104, (q15_t)0xfe,
+  (q15_t)0xf8, (q15_t)0xf1, (q15_t)0xeb, (q15_t)0xe5, (q15_t)0xdf, (q15_t)0xd8, (q15_t)0xd2, (q15_t)0xcc,
+  (q15_t)0xc5, (q15_t)0xbf, (q15_t)0xb9, (q15_t)0xb3, (q15_t)0xac, (q15_t)0xa6, (q15_t)0xa0, (q15_t)0x99,
+  (q15_t)0x93, (q15_t)0x8d, (q15_t)0x87, (q15_t)0x80, (q15_t)0x7a, (q15_t)0x74, (q15_t)0x6d, (q15_t)0x67,
+  (q15_t)0x61, (q15_t)0x5b, (q15_t)0x54, (q15_t)0x4e, (q15_t)0x48, (q15_t)0x41, (q15_t)0x3b, (q15_t)0x35,
+  (q15_t)0x2f, (q15_t)0x28, (q15_t)0x22, (q15_t)0x1c, (q15_t)0x15, (q15_t)0xf, (q15_t)0x9, (q15_t)0x3
+};
+  #endif
+
+/**
+  @par
+  Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))

+  @par
+  C command to generate the table
+  
+  for (i = 0; i< N; i++)
+  {
+    weights[(2*i)]   =  cos(i*c);
+    weights[(2*i)+1] = -sin(i*c);
+  } 

+  @par
+  where N is the Number of weights to be calculated and c is pi/(2*N)
+  @par
+  Convert the output to q31 format by multiplying with 2^31 and saturated if required.
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is 2*N.
+ */
+
+/**
+  @par
+  cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))

+  @par
+  C command to generate the table
+  
+  for (i = 0; i< N; i++)
+  {
+    cos_factors[i] = 2 * cos((2*i+1)*c/2);
+  } 

+  @par
+  where N is the number of factors to generate and c is pi/(2*N)
+  @par
+  Then converted to q31 format by multiplying with 2^31 and saturated if required.
+*/
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)  
+    const q31_t WeightsQ31_128[256] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f872bf3, (q31_t)0xf50497fb,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7dd6668f, (q31_t)0xe8922622,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7c894bde, (q31_t)0xe26cb01b,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7aef6323, (q31_t)0xdc597781,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x7909a92d, (q31_t)0xd65c3b7b,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x76d94989, (q31_t)0xd078ad9e,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x745f9dd1, (q31_t)0xcab26fa9,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x719e2cd2, (q31_t)0xc50d1149,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6b4af279, (q31_t)0xba32ca71,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x67bd0fbd, (q31_t)0xb5049368,
+  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x63ef3290, (q31_t)0xb0049ab3,
+  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5b9d1154, (q31_t)0xa69b9b68,
+  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x571deefa, (q31_t)0xa2386284,
+  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x5269126e, (q31_t)0x9e0effc1,
+  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4d8162c4, (q31_t)0x9a22042d,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4869e665, (q31_t)0x9673db94,
+  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4325c135, (q31_t)0x9306cb04,
+  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3db832a6, (q31_t)0x8fdcef66,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x382493b0, (q31_t)0x8cf83c30,
+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x326e54c7, (q31_t)0x8a5a7a31,
+  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2c98fbba, (q31_t)0x88054677,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x26a82186, (q31_t)0x85fa1153,
+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x209f701c, (q31_t)0x843a1d70,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1a82a026, (q31_t)0x82c67f14,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x145576b1, (q31_t)0x81a01b6d,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a,
+  (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x07d95b9e, (q31_t)0x803daa6a,
+  (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x01921d20, (q31_t)0x800277a6
+};
+    const q31_t cos_factorsQ31_128[128] = {
+  (q31_t)0x7fff6216, (q31_t)0x7ffa72d1, (q31_t)0x7ff09478, (q31_t)0x7fe1c76b, (q31_t)0x7fce0c3e, (q31_t)0x7fb563b3,
+  (q31_t)0x7f97cebd, (q31_t)0x7f754e80,
+  (q31_t)0x7f4de451, (q31_t)0x7f2191b4, (q31_t)0x7ef05860, (q31_t)0x7eba3a39, (q31_t)0x7e7f3957, (q31_t)0x7e3f57ff,
+  (q31_t)0x7dfa98a8, (q31_t)0x7db0fdf8,
+  (q31_t)0x7d628ac6, (q31_t)0x7d0f4218, (q31_t)0x7cb72724, (q31_t)0x7c5a3d50, (q31_t)0x7bf88830, (q31_t)0x7b920b89,
+  (q31_t)0x7b26cb4f, (q31_t)0x7ab6cba4,
+  (q31_t)0x7a4210d8, (q31_t)0x79c89f6e, (q31_t)0x794a7c12, (q31_t)0x78c7aba2, (q31_t)0x78403329, (q31_t)0x77b417df,
+  (q31_t)0x77235f2d, (q31_t)0x768e0ea6,
+  (q31_t)0x75f42c0b, (q31_t)0x7555bd4c, (q31_t)0x74b2c884, (q31_t)0x740b53fb, (q31_t)0x735f6626, (q31_t)0x72af05a7,
+  (q31_t)0x71fa3949, (q31_t)0x71410805,
+  (q31_t)0x708378ff, (q31_t)0x6fc19385, (q31_t)0x6efb5f12, (q31_t)0x6e30e34a, (q31_t)0x6d6227fa, (q31_t)0x6c8f351c,
+  (q31_t)0x6bb812d1, (q31_t)0x6adcc964,
+  (q31_t)0x69fd614a, (q31_t)0x6919e320, (q31_t)0x683257ab, (q31_t)0x6746c7d8, (q31_t)0x66573cbb, (q31_t)0x6563bf92,
+  (q31_t)0x646c59bf, (q31_t)0x637114cc,
+  (q31_t)0x6271fa69, (q31_t)0x616f146c, (q31_t)0x60686ccf, (q31_t)0x5f5e0db3, (q31_t)0x5e50015d, (q31_t)0x5d3e5237,
+  (q31_t)0x5c290acc, (q31_t)0x5b1035cf,
+  (q31_t)0x59f3de12, (q31_t)0x58d40e8c, (q31_t)0x57b0d256, (q31_t)0x568a34a9, (q31_t)0x556040e2, (q31_t)0x5433027d,
+  (q31_t)0x53028518, (q31_t)0x51ced46e,
+  (q31_t)0x5097fc5e, (q31_t)0x4f5e08e3, (q31_t)0x4e210617, (q31_t)0x4ce10034, (q31_t)0x4b9e0390, (q31_t)0x4a581c9e,
+  (q31_t)0x490f57ee, (q31_t)0x47c3c22f,
+  (q31_t)0x46756828, (q31_t)0x452456bd, (q31_t)0x43d09aed, (q31_t)0x427a41d0, (q31_t)0x4121589b, (q31_t)0x3fc5ec98,
+  (q31_t)0x3e680b2c, (q31_t)0x3d07c1d6,
+  (q31_t)0x3ba51e29, (q31_t)0x3a402dd2, (q31_t)0x38d8fe93, (q31_t)0x376f9e46, (q31_t)0x36041ad9, (q31_t)0x34968250,
+  (q31_t)0x3326e2c3, (q31_t)0x31b54a5e,
+  (q31_t)0x3041c761, (q31_t)0x2ecc681e, (q31_t)0x2d553afc, (q31_t)0x2bdc4e6f, (q31_t)0x2a61b101, (q31_t)0x28e5714b,
+  (q31_t)0x27679df4, (q31_t)0x25e845b6,
+  (q31_t)0x24677758, (q31_t)0x22e541af, (q31_t)0x2161b3a0, (q31_t)0x1fdcdc1b, (q31_t)0x1e56ca1e, (q31_t)0x1ccf8cb3,
+  (q31_t)0x1b4732ef, (q31_t)0x19bdcbf3,
+  (q31_t)0x183366e9, (q31_t)0x16a81305, (q31_t)0x151bdf86, (q31_t)0x138edbb1, (q31_t)0x120116d5, (q31_t)0x1072a048,
+  (q31_t)0xee38766, (q31_t)0xd53db92,
+  (q31_t)0xbc3ac35, (q31_t)0xa3308bd, (q31_t)0x8a2009a, (q31_t)0x710a345, (q31_t)0x57f0035, (q31_t)0x3ed26e6, (q31_t)0x25b26d7,
+  (q31_t)0xc90f88
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) 
+    const q31_t WeightsQ31_512[1024] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff871a2, (q31_t)0xfd40565c,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fed5791, (q31_t)0xfbae5e89,
+  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fc85854, (q31_t)0xf88afe42,
+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b,
+  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f434563, (q31_t)0xf2482c8a,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7ee34636, (q31_t)0xef29b243,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eabef2c, (q31_t)0xed9b66b2,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7de8a670, (q31_t)0xe8f50273,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5,
+  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb,
+  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c4242f2, (q31_t)0xe14794ba,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b77ada8, (q31_t)0xde3d4964,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a24256f, (q31_t)0xd9b7c094,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79a98715, (q31_t)0xd838c82d,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x792a37fe, (q31_t)0xd6bb585e,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78a63d11, (q31_t)0xd53f7fda,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x781d9b65, (q31_t)0xd3c54d47,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x7790583e, (q31_t)0xd24ccf39,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x76fe790e, (q31_t)0xd0d61434,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x76680376, (q31_t)0xcf612aaa,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ccfd42, (q31_t)0xcdee20fc,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x752d6c6c, (q31_t)0xcc7d0578,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x7489571c, (q31_t)0xcb0de658,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x7333b883, (q31_t)0xc835d5d0,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72823c67, (q31_t)0xc6cd0079,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71cc5626, (q31_t)0xc5665fa9,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71120cc5, (q31_t)0xc4020133,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70536771, (q31_t)0xc29ff2d4,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6f906d84, (q31_t)0xc1404233,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2,
+  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd,
+  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6b81a3cd, (q31_t)0xba87246d,
+  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6aa551e9, (q31_t)0xb936bfa4,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69c4e37a, (q31_t)0xb7e9157a,
+  (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x68e06129, (q31_t)0xb69e32cd,
+  (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x67f7d3c5, (q31_t)0xb556245e,
+  (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x670b4444, (q31_t)0xb410f6d3,
+  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5,
+  (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x6526438f, (q31_t)0xb18f7071,
+  (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x642de50d, (q31_t)0xb0533055,
+  (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x6331a9d4, (q31_t)0xaf1a0293,
+  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x62319b9d, (q31_t)0xade3f33e,
+  (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x612dc447, (q31_t)0xacb10e4b,
+  (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x60262dd6, (q31_t)0xab815f8d,
+  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e0bec6e, (q31_t)0xa92bd367,
+  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5cf95638, (q31_t)0xa8060d08,
+  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2,
+  (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5ac973b5, (q31_t)0xa5c4b855,
+  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59ac3cfd, (q31_t)0xa4a94043,
+  (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x588b9140, (q31_t)0xa3914da8,
+  (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x57677b9d, (q31_t)0xa27ceb4f,
+  (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x56400758, (q31_t)0xa16c23e1,
+  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x55153fd4, (q31_t)0xa05f01e1,
+  (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x53e73097, (q31_t)0x9f558fb0,
+  (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52b5e546, (q31_t)0x9e4fd78a,
+  (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x518169a5, (q31_t)0x9d4de385,
+  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x5049c999, (q31_t)0x9c4fbd93,
+  (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f0f1126, (q31_t)0x9b556f81,
+  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5,
+  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4c9087b1, (q31_t)0x996c816f,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b4ccf4d, (q31_t)0x987df449,
+  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a062fbd, (q31_t)0x979364b5,
+  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x48bcb599, (q31_t)0x96acdbbe,
+  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47706d93, (q31_t)0x95ca6247,
+  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x4621647d, (q31_t)0x94ec010b,
+  (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x44cfa740, (q31_t)0x9411c09e,
+  (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x437b42e1, (q31_t)0x933ba968,
+  (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x42244481, (q31_t)0x9269c3ac,
+  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x40cab958, (q31_t)0x919c1781,
+  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4,
+  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e10320d, (q31_t)0x900d8b69,
+  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3caf50da, (q31_t)0x8f4cbadb,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b4c18ba, (q31_t)0x8e904298,
+  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x39e6975e, (q31_t)0x8dd829e4,
+  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x387eda8e, (q31_t)0x8d2477d8,
+  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3714f02a, (q31_t)0x8c753362,
+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35a8e625, (q31_t)0x8bca6343,
+  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x343aca87, (q31_t)0x8b240e11,
+  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x32caab6f, (q31_t)0x8a823a36,
+  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x3158970e, (q31_t)0x89e4edef,
+  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c,
+  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2e6ec792, (q31_t)0x88b80432,
+  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2cf72939, (q31_t)0x88287256,
+  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2b7dcf17, (q31_t)0x879d7f41,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a02c7b8, (q31_t)0x8717304e,
+  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x288621b9, (q31_t)0x86958aac,
+  (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x2707ebc7, (q31_t)0x86189359,
+  (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x2588349d, (q31_t)0x85a04f28,
+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x24070b08, (q31_t)0x852cc2bb,
+  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22847de0, (q31_t)0x84bdf286,
+  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21009c0c, (q31_t)0x8453e2cf,
+  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1f7b7481, (q31_t)0x83ee97ad,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1df5163f, (q31_t)0x838e1507,
+  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1c6d9053, (q31_t)0x83325e97,
+  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5,
+  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x195b49ea, (q31_t)0x8289644b,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x17d0a7bc, (q31_t)0x823c26f3,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16451a83, (q31_t)0x81f3c2d7,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x14b8b17f, (q31_t)0x81b03ac2,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x132b7bf9, (q31_t)0x8171914e,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x119d8941, (q31_t)0x8137c8e6,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x100ee8ad, (q31_t)0x8102e3c4,
+  (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0f475bff, (q31_t)0x80ea4712, (q31_t)0x0ee38766, (q31_t)0x80de6e4c, (q31_t)0x0e7fa99e, (q31_t)0x80d2e3f2,
+  (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a, (q31_t)0x0db7d376, (q31_t)0x80bcba9d, (q31_t)0x0d53db92, (q31_t)0x80b21baf, (q31_t)0x0cefdb76, (q31_t)0x80a7cb49,
+  (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0c27c389, (q31_t)0x8094162c, (q31_t)0x0bc3ac35, (q31_t)0x808ab180, (q31_t)0x0b5f8d9f, (q31_t)0x80819b74,
+  (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x0a973ba5, (q31_t)0x80705b50, (q31_t)0x0a3308bd, (q31_t)0x80683143, (q31_t)0x09cecf89, (q31_t)0x806055eb,
+  (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x09064b3a, (q31_t)0x80518b6b, (q31_t)0x08a2009a, (q31_t)0x804a9c4d, (q31_t)0x083db0a7, (q31_t)0x8043fbf6,
+  (q31_t)0x07d95b9e, (q31_t)0x803daa6a, (q31_t)0x077501be, (q31_t)0x8037a7ac, (q31_t)0x0710a345, (q31_t)0x8031f3c2, (q31_t)0x06ac406f, (q31_t)0x802c8ead,
+  (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x05e36ea9, (q31_t)0x8022b114, (q31_t)0x057f0035, (q31_t)0x801e3895, (q31_t)0x051a8e5c, (q31_t)0x801a0ef8,
+  (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x0451a177, (q31_t)0x8012a86f, (q31_t)0x03ed26e6, (q31_t)0x800f6b88, (q31_t)0x0388a9ea, (q31_t)0x800c7d8c,
+  (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x02bfa9a4, (q31_t)0x80078e5e, (q31_t)0x025b26d7, (q31_t)0x80058d2f, (q31_t)0x01f6a297, (q31_t)0x8003daf1,
+  (q31_t)0x01921d20, (q31_t)0x800277a6, (q31_t)0x012d96b1, (q31_t)0x8001634e, (q31_t)0x00c90f88, (q31_t)0x80009dea, (q31_t)0x006487e3, (q31_t)0x8000277a
+};
+    const q31_t cos_factorsQ31_512[512] = {
+  (q31_t)0x7ffff621, (q31_t)0x7fffa72c, (q31_t)0x7fff0943, (q31_t)0x7ffe1c65, (q31_t)0x7ffce093, (q31_t)0x7ffb55ce,
+  (q31_t)0x7ff97c18, (q31_t)0x7ff75370,
+  (q31_t)0x7ff4dbd9, (q31_t)0x7ff21553, (q31_t)0x7feeffe1, (q31_t)0x7feb9b85, (q31_t)0x7fe7e841, (q31_t)0x7fe3e616,
+  (q31_t)0x7fdf9508, (q31_t)0x7fdaf519,
+  (q31_t)0x7fd6064c, (q31_t)0x7fd0c8a3, (q31_t)0x7fcb3c23, (q31_t)0x7fc560cf, (q31_t)0x7fbf36aa, (q31_t)0x7fb8bdb8,
+  (q31_t)0x7fb1f5fc, (q31_t)0x7faadf7c,
+  (q31_t)0x7fa37a3c, (q31_t)0x7f9bc640, (q31_t)0x7f93c38c, (q31_t)0x7f8b7227, (q31_t)0x7f82d214, (q31_t)0x7f79e35a,
+  (q31_t)0x7f70a5fe, (q31_t)0x7f671a05,
+  (q31_t)0x7f5d3f75, (q31_t)0x7f531655, (q31_t)0x7f489eaa, (q31_t)0x7f3dd87c, (q31_t)0x7f32c3d1, (q31_t)0x7f2760af,
+  (q31_t)0x7f1baf1e, (q31_t)0x7f0faf25,
+  (q31_t)0x7f0360cb, (q31_t)0x7ef6c418, (q31_t)0x7ee9d914, (q31_t)0x7edc9fc6, (q31_t)0x7ecf1837, (q31_t)0x7ec14270,
+  (q31_t)0x7eb31e78, (q31_t)0x7ea4ac58,
+  (q31_t)0x7e95ec1a, (q31_t)0x7e86ddc6, (q31_t)0x7e778166, (q31_t)0x7e67d703, (q31_t)0x7e57dea7, (q31_t)0x7e47985b,
+  (q31_t)0x7e37042a, (q31_t)0x7e26221f,
+  (q31_t)0x7e14f242, (q31_t)0x7e0374a0, (q31_t)0x7df1a942, (q31_t)0x7ddf9034, (q31_t)0x7dcd2981, (q31_t)0x7dba7534,
+  (q31_t)0x7da77359, (q31_t)0x7d9423fc,
+  (q31_t)0x7d808728, (q31_t)0x7d6c9ce9, (q31_t)0x7d58654d, (q31_t)0x7d43e05e, (q31_t)0x7d2f0e2b, (q31_t)0x7d19eebf,
+  (q31_t)0x7d048228, (q31_t)0x7ceec873,
+  (q31_t)0x7cd8c1ae, (q31_t)0x7cc26de5, (q31_t)0x7cabcd28, (q31_t)0x7c94df83, (q31_t)0x7c7da505, (q31_t)0x7c661dbc,
+  (q31_t)0x7c4e49b7, (q31_t)0x7c362904,
+  (q31_t)0x7c1dbbb3, (q31_t)0x7c0501d2, (q31_t)0x7bebfb70, (q31_t)0x7bd2a89e, (q31_t)0x7bb9096b, (q31_t)0x7b9f1de6,
+  (q31_t)0x7b84e61f, (q31_t)0x7b6a6227,
+  (q31_t)0x7b4f920e, (q31_t)0x7b3475e5, (q31_t)0x7b190dbc, (q31_t)0x7afd59a4, (q31_t)0x7ae159ae, (q31_t)0x7ac50dec,
+  (q31_t)0x7aa8766f, (q31_t)0x7a8b9348,
+  (q31_t)0x7a6e648a, (q31_t)0x7a50ea47, (q31_t)0x7a332490, (q31_t)0x7a151378, (q31_t)0x79f6b711, (q31_t)0x79d80f6f,
+  (q31_t)0x79b91ca4, (q31_t)0x7999dec4,
+  (q31_t)0x797a55e0, (q31_t)0x795a820e, (q31_t)0x793a6361, (q31_t)0x7919f9ec, (q31_t)0x78f945c3, (q31_t)0x78d846fb,
+  (q31_t)0x78b6fda8, (q31_t)0x789569df,
+  (q31_t)0x78738bb3, (q31_t)0x7851633b, (q31_t)0x782ef08b, (q31_t)0x780c33b8, (q31_t)0x77e92cd9, (q31_t)0x77c5dc01,
+  (q31_t)0x77a24148, (q31_t)0x777e5cc3,
+  (q31_t)0x775a2e89, (q31_t)0x7735b6af, (q31_t)0x7710f54c, (q31_t)0x76ebea77, (q31_t)0x76c69647, (q31_t)0x76a0f8d2,
+  (q31_t)0x767b1231, (q31_t)0x7654e279,
+  (q31_t)0x762e69c4, (q31_t)0x7607a828, (q31_t)0x75e09dbd, (q31_t)0x75b94a9c, (q31_t)0x7591aedd, (q31_t)0x7569ca99,
+  (q31_t)0x75419de7, (q31_t)0x751928e0,
+  (q31_t)0x74f06b9e, (q31_t)0x74c7663a, (q31_t)0x749e18cd, (q31_t)0x74748371, (q31_t)0x744aa63f, (q31_t)0x74208150,
+  (q31_t)0x73f614c0, (q31_t)0x73cb60a8,
+  (q31_t)0x73a06522, (q31_t)0x73752249, (q31_t)0x73499838, (q31_t)0x731dc70a, (q31_t)0x72f1aed9, (q31_t)0x72c54fc1,
+  (q31_t)0x7298a9dd, (q31_t)0x726bbd48,
+  (q31_t)0x723e8a20, (q31_t)0x7211107e, (q31_t)0x71e35080, (q31_t)0x71b54a41, (q31_t)0x7186fdde, (q31_t)0x71586b74,
+  (q31_t)0x7129931f, (q31_t)0x70fa74fc,
+  (q31_t)0x70cb1128, (q31_t)0x709b67c0, (q31_t)0x706b78e3, (q31_t)0x703b44ad, (q31_t)0x700acb3c, (q31_t)0x6fda0cae,
+  (q31_t)0x6fa90921, (q31_t)0x6f77c0b3,
+  (q31_t)0x6f463383, (q31_t)0x6f1461b0, (q31_t)0x6ee24b57, (q31_t)0x6eaff099, (q31_t)0x6e7d5193, (q31_t)0x6e4a6e66,
+  (q31_t)0x6e174730, (q31_t)0x6de3dc11,
+  (q31_t)0x6db02d29, (q31_t)0x6d7c3a98, (q31_t)0x6d48047e, (q31_t)0x6d138afb, (q31_t)0x6cdece2f, (q31_t)0x6ca9ce3b,
+  (q31_t)0x6c748b3f, (q31_t)0x6c3f055d,
+  (q31_t)0x6c093cb6, (q31_t)0x6bd3316a, (q31_t)0x6b9ce39b, (q31_t)0x6b66536b, (q31_t)0x6b2f80fb, (q31_t)0x6af86c6c,
+  (q31_t)0x6ac115e2, (q31_t)0x6a897d7d,
+  (q31_t)0x6a51a361, (q31_t)0x6a1987b0, (q31_t)0x69e12a8c, (q31_t)0x69a88c19, (q31_t)0x696fac78, (q31_t)0x69368bce,
+  (q31_t)0x68fd2a3d, (q31_t)0x68c387e9,
+  (q31_t)0x6889a4f6, (q31_t)0x684f8186, (q31_t)0x68151dbe, (q31_t)0x67da79c3, (q31_t)0x679f95b7, (q31_t)0x676471c0,
+  (q31_t)0x67290e02, (q31_t)0x66ed6aa1,
+  (q31_t)0x66b187c3, (q31_t)0x6675658c, (q31_t)0x66390422, (q31_t)0x65fc63a9, (q31_t)0x65bf8447, (q31_t)0x65826622,
+  (q31_t)0x6545095f, (q31_t)0x65076e25,
+  (q31_t)0x64c99498, (q31_t)0x648b7ce0, (q31_t)0x644d2722, (q31_t)0x640e9386, (q31_t)0x63cfc231, (q31_t)0x6390b34a,
+  (q31_t)0x635166f9, (q31_t)0x6311dd64,
+  (q31_t)0x62d216b3, (q31_t)0x6292130c, (q31_t)0x6251d298, (q31_t)0x6211557e, (q31_t)0x61d09be5, (q31_t)0x618fa5f7,
+  (q31_t)0x614e73da, (q31_t)0x610d05b7,
+  (q31_t)0x60cb5bb7, (q31_t)0x60897601, (q31_t)0x604754bf, (q31_t)0x6004f819, (q31_t)0x5fc26038, (q31_t)0x5f7f8d46,
+  (q31_t)0x5f3c7f6b, (q31_t)0x5ef936d1,
+  (q31_t)0x5eb5b3a2, (q31_t)0x5e71f606, (q31_t)0x5e2dfe29, (q31_t)0x5de9cc33, (q31_t)0x5da5604f, (q31_t)0x5d60baa7,
+  (q31_t)0x5d1bdb65, (q31_t)0x5cd6c2b5,
+  (q31_t)0x5c9170bf, (q31_t)0x5c4be5b0, (q31_t)0x5c0621b2, (q31_t)0x5bc024f0, (q31_t)0x5b79ef96, (q31_t)0x5b3381ce,
+  (q31_t)0x5aecdbc5, (q31_t)0x5aa5fda5,
+  (q31_t)0x5a5ee79a, (q31_t)0x5a1799d1, (q31_t)0x59d01475, (q31_t)0x598857b2, (q31_t)0x594063b5, (q31_t)0x58f838a9,
+  (q31_t)0x58afd6bd, (q31_t)0x58673e1b,
+  (q31_t)0x581e6ef1, (q31_t)0x57d5696d, (q31_t)0x578c2dba, (q31_t)0x5742bc06, (q31_t)0x56f9147e, (q31_t)0x56af3750,
+  (q31_t)0x566524aa, (q31_t)0x561adcb9,
+  (q31_t)0x55d05faa, (q31_t)0x5585adad, (q31_t)0x553ac6ee, (q31_t)0x54efab9c, (q31_t)0x54a45be6, (q31_t)0x5458d7f9,
+  (q31_t)0x540d2005, (q31_t)0x53c13439,
+  (q31_t)0x537514c2, (q31_t)0x5328c1d0, (q31_t)0x52dc3b92, (q31_t)0x528f8238, (q31_t)0x524295f0, (q31_t)0x51f576ea,
+  (q31_t)0x51a82555, (q31_t)0x515aa162,
+  (q31_t)0x510ceb40, (q31_t)0x50bf031f, (q31_t)0x5070e92f, (q31_t)0x50229da1, (q31_t)0x4fd420a4, (q31_t)0x4f857269,
+  (q31_t)0x4f369320, (q31_t)0x4ee782fb,
+  (q31_t)0x4e984229, (q31_t)0x4e48d0dd, (q31_t)0x4df92f46, (q31_t)0x4da95d96, (q31_t)0x4d595bfe, (q31_t)0x4d092ab0,
+  (q31_t)0x4cb8c9dd, (q31_t)0x4c6839b7,
+  (q31_t)0x4c177a6e, (q31_t)0x4bc68c36, (q31_t)0x4b756f40, (q31_t)0x4b2423be, (q31_t)0x4ad2a9e2, (q31_t)0x4a8101de,
+  (q31_t)0x4a2f2be6, (q31_t)0x49dd282a,
+  (q31_t)0x498af6df, (q31_t)0x49389836, (q31_t)0x48e60c62, (q31_t)0x48935397, (q31_t)0x48406e08, (q31_t)0x47ed5be6,
+  (q31_t)0x479a1d67, (q31_t)0x4746b2bc,
+  (q31_t)0x46f31c1a, (q31_t)0x469f59b4, (q31_t)0x464b6bbe, (q31_t)0x45f7526b, (q31_t)0x45a30df0, (q31_t)0x454e9e80,
+  (q31_t)0x44fa0450, (q31_t)0x44a53f93,
+  (q31_t)0x4450507e, (q31_t)0x43fb3746, (q31_t)0x43a5f41e, (q31_t)0x4350873c, (q31_t)0x42faf0d4, (q31_t)0x42a5311b,
+  (q31_t)0x424f4845, (q31_t)0x41f93689,
+  (q31_t)0x41a2fc1a, (q31_t)0x414c992f, (q31_t)0x40f60dfb, (q31_t)0x409f5ab6, (q31_t)0x40487f94, (q31_t)0x3ff17cca,
+  (q31_t)0x3f9a5290, (q31_t)0x3f430119,
+  (q31_t)0x3eeb889c, (q31_t)0x3e93e950, (q31_t)0x3e3c2369, (q31_t)0x3de4371f, (q31_t)0x3d8c24a8, (q31_t)0x3d33ec39,
+  (q31_t)0x3cdb8e09, (q31_t)0x3c830a50,
+  (q31_t)0x3c2a6142, (q31_t)0x3bd19318, (q31_t)0x3b78a007, (q31_t)0x3b1f8848, (q31_t)0x3ac64c0f, (q31_t)0x3a6ceb96,
+  (q31_t)0x3a136712, (q31_t)0x39b9bebc,
+  (q31_t)0x395ff2c9, (q31_t)0x39060373, (q31_t)0x38abf0ef, (q31_t)0x3851bb77, (q31_t)0x37f76341, (q31_t)0x379ce885,
+  (q31_t)0x37424b7b, (q31_t)0x36e78c5b,
+  (q31_t)0x368cab5c, (q31_t)0x3631a8b8, (q31_t)0x35d684a6, (q31_t)0x357b3f5d, (q31_t)0x351fd918, (q31_t)0x34c4520d,
+  (q31_t)0x3468aa76, (q31_t)0x340ce28b,
+  (q31_t)0x33b0fa84, (q31_t)0x3354f29b, (q31_t)0x32f8cb07, (q31_t)0x329c8402, (q31_t)0x32401dc6, (q31_t)0x31e39889,
+  (q31_t)0x3186f487, (q31_t)0x312a31f8,
+  (q31_t)0x30cd5115, (q31_t)0x30705217, (q31_t)0x30133539, (q31_t)0x2fb5fab2, (q31_t)0x2f58a2be, (q31_t)0x2efb2d95,
+  (q31_t)0x2e9d9b70, (q31_t)0x2e3fec8b,
+  (q31_t)0x2de2211e, (q31_t)0x2d843964, (q31_t)0x2d263596, (q31_t)0x2cc815ee, (q31_t)0x2c69daa6, (q31_t)0x2c0b83fa,
+  (q31_t)0x2bad1221, (q31_t)0x2b4e8558,
+  (q31_t)0x2aefddd8, (q31_t)0x2a911bdc, (q31_t)0x2a323f9e, (q31_t)0x29d34958, (q31_t)0x29743946, (q31_t)0x29150fa1,
+  (q31_t)0x28b5cca5, (q31_t)0x2856708d,
+  (q31_t)0x27f6fb92, (q31_t)0x27976df1, (q31_t)0x2737c7e3, (q31_t)0x26d809a5, (q31_t)0x26783370, (q31_t)0x26184581,
+  (q31_t)0x25b84012, (q31_t)0x2558235f,
+  (q31_t)0x24f7efa2, (q31_t)0x2497a517, (q31_t)0x243743fa, (q31_t)0x23d6cc87, (q31_t)0x23763ef7, (q31_t)0x23159b88,
+  (q31_t)0x22b4e274, (q31_t)0x225413f8,
+  (q31_t)0x21f3304f, (q31_t)0x219237b5, (q31_t)0x21312a65, (q31_t)0x20d0089c, (q31_t)0x206ed295, (q31_t)0x200d888d,
+  (q31_t)0x1fac2abf, (q31_t)0x1f4ab968,
+  (q31_t)0x1ee934c3, (q31_t)0x1e879d0d, (q31_t)0x1e25f282, (q31_t)0x1dc4355e, (q31_t)0x1d6265dd, (q31_t)0x1d00843d,
+  (q31_t)0x1c9e90b8, (q31_t)0x1c3c8b8c,
+  (q31_t)0x1bda74f6, (q31_t)0x1b784d30, (q31_t)0x1b161479, (q31_t)0x1ab3cb0d, (q31_t)0x1a517128, (q31_t)0x19ef0707,
+  (q31_t)0x198c8ce7, (q31_t)0x192a0304,
+  (q31_t)0x18c7699b, (q31_t)0x1864c0ea, (q31_t)0x1802092c, (q31_t)0x179f429f, (q31_t)0x173c6d80, (q31_t)0x16d98a0c,
+  (q31_t)0x1676987f, (q31_t)0x16139918,
+  (q31_t)0x15b08c12, (q31_t)0x154d71aa, (q31_t)0x14ea4a1f, (q31_t)0x148715ae, (q31_t)0x1423d492, (q31_t)0x13c0870a,
+  (q31_t)0x135d2d53, (q31_t)0x12f9c7aa,
+  (q31_t)0x1296564d, (q31_t)0x1232d979, (q31_t)0x11cf516a, (q31_t)0x116bbe60, (q31_t)0x11082096, (q31_t)0x10a4784b,
+  (q31_t)0x1040c5bb, (q31_t)0xfdd0926,
+  (q31_t)0xf7942c7, (q31_t)0xf1572dc, (q31_t)0xeb199a4, (q31_t)0xe4db75b, (q31_t)0xde9cc40, (q31_t)0xd85d88f, (q31_t)0xd21dc87,
+  (q31_t)0xcbdd865,
+  (q31_t)0xc59cc68, (q31_t)0xbf5b8cb, (q31_t)0xb919dcf, (q31_t)0xb2d7baf, (q31_t)0xac952aa, (q31_t)0xa6522fe, (q31_t)0xa00ece8,
+  (q31_t)0x99cb0a7,
+  (q31_t)0x9386e78, (q31_t)0x8d42699, (q31_t)0x86fd947, (q31_t)0x80b86c2, (q31_t)0x7a72f45, (q31_t)0x742d311, (q31_t)0x6de7262,
+  (q31_t)0x67a0d76,
+  (q31_t)0x615a48b, (q31_t)0x5b137df, (q31_t)0x54cc7b1, (q31_t)0x4e8543e, (q31_t)0x483ddc3, (q31_t)0x41f6480, (q31_t)0x3bae8b2,
+  (q31_t)0x3566a96,
+  (q31_t)0x2f1ea6c, (q31_t)0x28d6870, (q31_t)0x228e4e2, (q31_t)0x1c45ffe, (q31_t)0x15fda03, (q31_t)0xfb5330, (q31_t)0x96cbc1,
+  (q31_t)0x3243f5
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) 
+    const q31_t WeightsQ31_2048[4096] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7fffe9cb, (q31_t)0xffb49a12,
+  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff8719, (q31_t)0xff501258,
+  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a,
+  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffdd4d7, (q31_t)0xfe870467,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffc8549, (q31_t)0xfe227eac,
+  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18,
+  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff8f954, (q31_t)0xfd5976e9,
+  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4319d, (q31_t)0xfc9075af,
+  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1575d, (q31_t)0xfc2bf821,
+  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0,
+  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feab61a, (q31_t)0xfb630459,
+  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b,
+  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3,
+  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fde7471, (q31_t)0xfa35ac9f,
+  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed,
+  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fcf6ce8, (q31_t)0xf908750a,
+  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574,
+  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc3dda9, (q31_t)0xf83fba68,
+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423,
+  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb7132b, (q31_t)0xf77712e5,
+  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb037bf, (q31_t)0xf712c6ea,
+  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8,
+  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc,
+  (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f91b694, (q31_t)0xf581d07b,
+  (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f895182, (q31_t)0xf51da273,
+  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f809dc5, (q31_t)0xf4b97b21,
+  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f779b62, (q31_t)0xf4555ac5,
+  (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f72fcb4, (q31_t)0xf4234d45, (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a,
+  (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f698461, (q31_t)0xf3bf37cb, (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0, (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5abc8a, (q31_t)0xf32925d3,
+  (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f55a7fa, (q31_t)0xf2f723c1, (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f507fc7, (q31_t)0xf2c523b2,
+  (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f45f47b, (q31_t)0xf26129ba,
+  (q31_t)0x7f434563, (q31_t)0xf2482c8a, (q31_t)0x7f409164, (q31_t)0xf22f2fe1, (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f2ff263, (q31_t)0xf1994f3d,
+  (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f247ba5, (q31_t)0xf1356f32,
+  (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f18b679, (q31_t)0xf0d19848,
+  (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f0040f6, (q31_t)0xf00a06c8,
+  (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef9f29d, (q31_t)0xefd8287c, (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef390ae, (q31_t)0xefa64cae,
+  (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee69217, (q31_t)0xef429caa,
+  (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7ed94538, (q31_t)0xeedef6f9,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9,
+  (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88,
+  (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eaf8943, (q31_t)0xedb44642,
+  (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea1039b, (q31_t)0xed50cc46,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e922fd6, (q31_t)0xeced5dd0,
+  (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e830dff, (q31_t)0xec89fb1e,
+  (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e739e1d, (q31_t)0xec26a46d,
+  (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e63e03b, (q31_t)0xebc359fb,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e53d462, (q31_t)0xeb601c04,
+  (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e437a9c, (q31_t)0xeafceac6,
+  (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e32d2f4, (q31_t)0xea99c67e,
+  (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e21dd73, (q31_t)0xea36af69,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5,
+  (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7dff0911, (q31_t)0xe970a9ce,
+  (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2,
+  (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7ddafdce, (q31_t)0xe8aadbde,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dc883b4, (q31_t)0xe8480a5d,
+  (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db5bc02, (q31_t)0xe7e5477f,
+  (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f, (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da2a6c6, (q31_t)0xe782937e,
+  (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d98ff17, (q31_t)0xe7513f25, (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d8f4409, (q31_t)0xe71fee99,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d85759f, (q31_t)0xe6eea1e4, (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7b93da, (q31_t)0xe6bd590d,
+  (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d719eba, (q31_t)0xe68c141a, (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d679642, (q31_t)0xe65ad315,
+  (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d5d7a74, (q31_t)0xe6299604, (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d534b50, (q31_t)0xe5f85cef,
+  (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4908d9, (q31_t)0xe5c727dd, (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7,
+  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3449f5, (q31_t)0xe564c9e3, (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d29cd8c, (q31_t)0xe533a10a,
+  (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53, (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6,
+  (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d09e489, (q31_t)0xe4a03f69, (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7cff1af5, (q31_t)0xe46f2745,
+  (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf43e1a, (q31_t)0xe43e1362, (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6,
+  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a, (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd333f3, (q31_t)0xe3aaf184,
+  (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cbcccec, (q31_t)0xe348f0bd,
+  (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa, (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7ca618f3, (q31_t)0xe2e701ac,
+  (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c8f1817, (q31_t)0xe285248d,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c77ca65, (q31_t)0xe223599e,
+  (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c602fec, (q31_t)0xe1c1a11b,
+  (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f,
+  (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c3014de, (q31_t)0xe0fe6848,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c179467, (q31_t)0xe09ce871,
+  (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4, (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7bfec765, (q31_t)0xe03b7bf6,
+  (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7be5ade6, (q31_t)0xdfda2314,
+  (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bcc47fa, (q31_t)0xdf78de07,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a,
+  (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b989719, (q31_t)0xdeb69059,
+  (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b7e4c45, (q31_t)0xde558831,
+  (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b63b543, (q31_t)0xddf494ce,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b48d225, (q31_t)0xdd93b66a,
+  (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43,
+  (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1227d3, (q31_t)0xdcd23993,
+  (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7af660c2, (q31_t)0xdc719b96,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7ada4dd8, (q31_t)0xdc111388,
+  (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4,
+  (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa144bc, (q31_t)0xdb504626,
+  (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a844eae, (q31_t)0xdaf00149,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a670d0d, (q31_t)0xda8fd349,
+  (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a497feb, (q31_t)0xda2fbc61,
+  (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd,
+  (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79ef1436, (q31_t)0xd910048a,
+  (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d059c8, (q31_t)0xd8b04c52,
+  (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b15435, (q31_t)0xd850ac5a,
+  (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x79920392, (q31_t)0xd7f124dd,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x797267f2, (q31_t)0xd791b616,
+  (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79528167, (q31_t)0xd732603f,
+  (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79325006, (q31_t)0xd6d32393,
+  (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7911d3e2, (q31_t)0xd674004e,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f10d0f, (q31_t)0xd614f6a9,
+  (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78cffba3, (q31_t)0xd5b606e0,
+  (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78ae9fb0, (q31_t)0xd557312d,
+  (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x788cf94c, (q31_t)0xd4f875ca,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x786b088c, (q31_t)0xd499d4f2,
+  (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x7848cd83, (q31_t)0xd43b4ee0,
+  (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x78264849, (q31_t)0xd3dce3cd,
+  (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780378f1, (q31_t)0xd37e93f4,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e05f91, (q31_t)0xd3205f8f,
+  (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8,
+  (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77994f11, (q31_t)0xd2644a0a,
+  (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x7775581d, (q31_t)0xd206695d,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x77511778, (q31_t)0xd1a8a50d,
+  (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x772c8d3a, (q31_t)0xd14afd52,
+  (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x7707b979, (q31_t)0xd0ed7267,
+  (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e29c4b, (q31_t)0xd0900486,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76bd35c7, (q31_t)0xd032b3e7,
+  (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x76978605, (q31_t)0xcfd580c6,
+  (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x76718d1c, (q31_t)0xcf786b5a,
+  (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x764b4b23, (q31_t)0xcf1b73de,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x7624c031, (q31_t)0xcebe9a8a,
+  (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x75fdec60, (q31_t)0xce61df99,
+  (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75d6cfc5, (q31_t)0xce054343,
+  (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x7587bc98, (q31_t)0xcd4c674d,
+  (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x755fc635, (q31_t)0xccf0281f,
+  (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x7537876c, (q31_t)0xcc940871,
+  (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x750f0054, (q31_t)0xcc38087b,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74e63108, (q31_t)0xcbdc2876,
+  (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74bd199f, (q31_t)0xcb80689a,
+  (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x7493ba34, (q31_t)0xcb24c921,
+  (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x746a12df, (q31_t)0xcac94a42,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x744023bc, (q31_t)0xca6dec37,
+  (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x7415ece2, (q31_t)0xca12af37,
+  (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a,
+  (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c0a878, (q31_t)0xc95c993a,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x73959b1b, (q31_t)0xc901c0ae,
+  (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x736a4671, (q31_t)0xc8a70a0e,
+  (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x733eaa96, (q31_t)0xc84c7593,
+  (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x7312c7a5, (q31_t)0xc7f20373,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72e69db7, (q31_t)0xc797b3e7,
+  (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72ba2cea, (q31_t)0xc73d8727,
+  (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x728d7557, (q31_t)0xc6e37d69,
+  (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7260771b, (q31_t)0xc68996e7,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x72333251, (q31_t)0xc62fd3d6,
+  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x7205a716, (q31_t)0xc5d6346f,
+  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71d7d585, (q31_t)0xc57cb8e9,
+  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71a9bdba, (q31_t)0xc523617a,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b,
+  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x714cbbeb, (q31_t)0xc4711fc2,
+  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x711dd220, (q31_t)0xc41835e6,
+  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70eea28e, (q31_t)0xc3bf70fd,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70bf2d53, (q31_t)0xc366d140,
+  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x708f728b, (q31_t)0xc30e56e4,
+  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x705f7255, (q31_t)0xc2b6021f,
+  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x702f2ccd, (q31_t)0xc25dd329,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x6ffea212, (q31_t)0xc205ca38,
+  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fcdd241, (q31_t)0xc1ade781,
+  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d,
+  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f39c57d, (q31_t)0xc0a726df,
+  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f07e285, (q31_t)0xc04fdf32,
+  (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6ed5bb10, (q31_t)0xbff8bece,
+  (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba,
+  (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e3daaf8, (q31_t)0xbef44b74,
+  (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e,
+  (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6da336dc, (q31_t)0xbdf14135,
+  (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad,
+  (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a,
+  (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d066215, (q31_t)0xbcefa5b0,
+  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5,
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+  (q31_t)0x5049c999, (q31_t)0x9c4fbd93, (q31_t)0x50363529, (q31_t)0x9c3ffbc5, (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x500f0302, (q31_t)0x9c2083b3,
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+  (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4efb4b96, (q31_t)0x9b45eb83, (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f,
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+  (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4d9561ac, (q31_t)0x9a313dfc,
+  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d455422, (q31_t)0x99f46e51,
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+  (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c540e4e, (q31_t)0x993f7993,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c034345, (q31_t)0x9903a691,
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+  (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b6120bb, (q31_t)0x988cbf46,
+  (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b0fc99d, (q31_t)0x9851ab46,
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+  (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a6c90ad, (q31_t)0x97dc4349,
+  (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94,
+  (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49c8a01b, (q31_t)0x9767dc41,
+  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x49766373, (q31_t)0x972e0971,
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+  (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48d16265, (q31_t)0x96bb25f0,
+  (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48a805ff, (q31_t)0x969e959b, (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x487e9e64, (q31_t)0x96821585,
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+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x250ffeb7, (q31_t)0x857bb152, (q31_t)0x24f7efa2, (q31_t)0x85746cb8, (q31_t)0x24dfdf20, (q31_t)0x856d2cd7,
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+  (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c861113, (q31_t)0x8337f5f1,
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+  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b5fc097, (q31_t)0x82f61b77,
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+  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1a9b361d, (q31_t)0x82cbb60b,
+  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a38d823, (q31_t)0x82b6f727,
+  (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19d669fc, (q31_t)0x82a2858c,
+  (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x1973ebe6, (q31_t)0x828e6146,
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+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18aec0db, (q31_t)0x826700e9,
+  (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x184c1461, (q31_t)0x8253c4eb,
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+  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x17868eb3, (q31_t)0x822e358b,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x1723b5f9, (q31_t)0x821be240,
+  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16c0cef9, (q31_t)0x8209dc9e,
+  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x165dd9f0, (q31_t)0x81f824ae,
+  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x15fad71b, (q31_t)0x81e6ba7c,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x1597c6b7, (q31_t)0x81d59e13,
+  (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x1534a901, (q31_t)0x81c4cf7d,
+  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14d17e36, (q31_t)0x81b44ec4,
+  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x146e4694, (q31_t)0x81a41bf4,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x140b0258, (q31_t)0x81943715,
+  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13a7b1bf, (q31_t)0x8184a032,
+  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x13445505, (q31_t)0x81755754,
+  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12e0ec6a, (q31_t)0x81665c84,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x127d7829, (q31_t)0x8157afcd,
+  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x1219f880, (q31_t)0x81495136,
+  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11b66dad, (q31_t)0x813b40ca,
+  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x1152d7ed, (q31_t)0x812d7e8f,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x10ef377d, (q31_t)0x81200a90,
+  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x108b8c9b, (q31_t)0x8112e4d4,
+  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x1027d784, (q31_t)0x81060d63,
+  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfc41876, (q31_t)0x80f98446,
+  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf604faf, (q31_t)0x80ed4984,
+  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xefc7d6b, (q31_t)0x80e15d24,
+  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e,
+  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe34bd66, (q31_t)0x80ca6fa9,
+  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c,
+  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd6cda53, (q31_t)0x80b4bc0e,
+  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd08dc3f, (q31_t)0x80aa5806,
+  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xca4d620, (q31_t)0x80a04289,
+  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc40c835, (q31_t)0x80967b9f,
+  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbdcb2bb, (q31_t)0x808d034c,
+  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb7895f0, (q31_t)0x8083d998,
+  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb147211, (q31_t)0x807afe87,
+  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xab0475c, (q31_t)0x8072721f,
+  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa4c1610, (q31_t)0x806a3466,
+  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9e7de6a, (q31_t)0x80624560,
+  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x983a0a7, (q31_t)0x805aa512,
+  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x91f5d06, (q31_t)0x80535381,
+  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8bb13c5, (q31_t)0x804c50b2,
+  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x856c520, (q31_t)0x80459ca9,
+  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x7f27157, (q31_t)0x803f376a,
+  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x78e18a7, (q31_t)0x803920f8,
+  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x729bb4e, (q31_t)0x80335959,
+  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6c5598a, (q31_t)0x802de08e,
+  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x660f398, (q31_t)0x8028b69c,
+  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x5fc89b8, (q31_t)0x8023db86,
+  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5981c26, (q31_t)0x801f4f4f,
+  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x533ab20, (q31_t)0x801b11fa,
+  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4cf36e5, (q31_t)0x80172388,
+  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x46abfb3, (q31_t)0x801383fe,
+  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x40645c7, (q31_t)0x8010335c,
+  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3a1c960, (q31_t)0x800d31a5,
+  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x33d4abb, (q31_t)0x800a7edb,
+  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2d8ca16, (q31_t)0x80081b00,
+  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x27447b0, (q31_t)0x80060614,
+  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x20fc3c6, (q31_t)0x8004401a,
+  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1ab3e97, (q31_t)0x8002c912,
+  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x146b860, (q31_t)0x8001a0fd,
+  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0xe23160, (q31_t)0x8000c7dc,
+  (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x7da9d4, (q31_t)0x80003daf,
+  (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x1921fb, (q31_t)0x80000278
+};
+     const q31_t cos_factorsQ31_2048[2048] = {
+  (q31_t)0x7fffff62, (q31_t)0x7ffffa73, (q31_t)0x7ffff094, (q31_t)0x7fffe1c6, (q31_t)0x7fffce09, (q31_t)0x7fffb55c,
+  (q31_t)0x7fff97c1, (q31_t)0x7fff7536,
+  (q31_t)0x7fff4dbb, (q31_t)0x7fff2151, (q31_t)0x7ffeeff8, (q31_t)0x7ffeb9b0, (q31_t)0x7ffe7e79, (q31_t)0x7ffe3e52,
+  (q31_t)0x7ffdf93c, (q31_t)0x7ffdaf37,
+  (q31_t)0x7ffd6042, (q31_t)0x7ffd0c5f, (q31_t)0x7ffcb38c, (q31_t)0x7ffc55ca, (q31_t)0x7ffbf319, (q31_t)0x7ffb8b78,
+  (q31_t)0x7ffb1ee9, (q31_t)0x7ffaad6a,
+  (q31_t)0x7ffa36fc, (q31_t)0x7ff9bba0, (q31_t)0x7ff93b54, (q31_t)0x7ff8b619, (q31_t)0x7ff82bef, (q31_t)0x7ff79cd6,
+  (q31_t)0x7ff708ce, (q31_t)0x7ff66fd7,
+  (q31_t)0x7ff5d1f1, (q31_t)0x7ff52f1d, (q31_t)0x7ff48759, (q31_t)0x7ff3daa6, (q31_t)0x7ff32905, (q31_t)0x7ff27275,
+  (q31_t)0x7ff1b6f6, (q31_t)0x7ff0f688,
+  (q31_t)0x7ff0312c, (q31_t)0x7fef66e1, (q31_t)0x7fee97a7, (q31_t)0x7fedc37e, (q31_t)0x7fecea67, (q31_t)0x7fec0c62,
+  (q31_t)0x7feb296d, (q31_t)0x7fea418b,
+  (q31_t)0x7fe954ba, (q31_t)0x7fe862fa, (q31_t)0x7fe76c4c, (q31_t)0x7fe670b0, (q31_t)0x7fe57025, (q31_t)0x7fe46aac,
+  (q31_t)0x7fe36045, (q31_t)0x7fe250ef,
+  (q31_t)0x7fe13cac, (q31_t)0x7fe0237a, (q31_t)0x7fdf055a, (q31_t)0x7fdde24d, (q31_t)0x7fdcba51, (q31_t)0x7fdb8d67,
+  (q31_t)0x7fda5b8f, (q31_t)0x7fd924ca,
+  (q31_t)0x7fd7e917, (q31_t)0x7fd6a875, (q31_t)0x7fd562e7, (q31_t)0x7fd4186a, (q31_t)0x7fd2c900, (q31_t)0x7fd174a8,
+  (q31_t)0x7fd01b63, (q31_t)0x7fcebd31,
+  (q31_t)0x7fcd5a11, (q31_t)0x7fcbf203, (q31_t)0x7fca8508, (q31_t)0x7fc91320, (q31_t)0x7fc79c4b, (q31_t)0x7fc62089,
+  (q31_t)0x7fc49fda, (q31_t)0x7fc31a3d,
+  (q31_t)0x7fc18fb4, (q31_t)0x7fc0003e, (q31_t)0x7fbe6bdb, (q31_t)0x7fbcd28b, (q31_t)0x7fbb344e, (q31_t)0x7fb99125,
+  (q31_t)0x7fb7e90f, (q31_t)0x7fb63c0d,
+  (q31_t)0x7fb48a1e, (q31_t)0x7fb2d343, (q31_t)0x7fb1177b, (q31_t)0x7faf56c7, (q31_t)0x7fad9127, (q31_t)0x7fabc69b,
+  (q31_t)0x7fa9f723, (q31_t)0x7fa822bf,
+  (q31_t)0x7fa6496e, (q31_t)0x7fa46b32, (q31_t)0x7fa2880b, (q31_t)0x7fa09ff7, (q31_t)0x7f9eb2f8, (q31_t)0x7f9cc10d,
+  (q31_t)0x7f9aca37, (q31_t)0x7f98ce76,
+  (q31_t)0x7f96cdc9, (q31_t)0x7f94c831, (q31_t)0x7f92bdad, (q31_t)0x7f90ae3f, (q31_t)0x7f8e99e6, (q31_t)0x7f8c80a1,
+  (q31_t)0x7f8a6272, (q31_t)0x7f883f58,
+  (q31_t)0x7f861753, (q31_t)0x7f83ea64, (q31_t)0x7f81b88a, (q31_t)0x7f7f81c6, (q31_t)0x7f7d4617, (q31_t)0x7f7b057e,
+  (q31_t)0x7f78bffb, (q31_t)0x7f76758e,
+  (q31_t)0x7f742637, (q31_t)0x7f71d1f6, (q31_t)0x7f6f78cb, (q31_t)0x7f6d1ab6, (q31_t)0x7f6ab7b8, (q31_t)0x7f684fd0,
+  (q31_t)0x7f65e2ff, (q31_t)0x7f637144,
+  (q31_t)0x7f60faa0, (q31_t)0x7f5e7f13, (q31_t)0x7f5bfe9d, (q31_t)0x7f59793e, (q31_t)0x7f56eef5, (q31_t)0x7f545fc5,
+  (q31_t)0x7f51cbab, (q31_t)0x7f4f32a9,
+  (q31_t)0x7f4c94be, (q31_t)0x7f49f1eb, (q31_t)0x7f474a30, (q31_t)0x7f449d8c, (q31_t)0x7f41ec01, (q31_t)0x7f3f358d,
+  (q31_t)0x7f3c7a31, (q31_t)0x7f39b9ee,
+  (q31_t)0x7f36f4c3, (q31_t)0x7f342ab1, (q31_t)0x7f315bb7, (q31_t)0x7f2e87d6, (q31_t)0x7f2baf0d, (q31_t)0x7f28d15d,
+  (q31_t)0x7f25eec7, (q31_t)0x7f230749,
+  (q31_t)0x7f201ae5, (q31_t)0x7f1d299a, (q31_t)0x7f1a3368, (q31_t)0x7f173850, (q31_t)0x7f143852, (q31_t)0x7f11336d,
+  (q31_t)0x7f0e29a3, (q31_t)0x7f0b1af2,
+  (q31_t)0x7f08075c, (q31_t)0x7f04eedf, (q31_t)0x7f01d17d, (q31_t)0x7efeaf36, (q31_t)0x7efb8809, (q31_t)0x7ef85bf7,
+  (q31_t)0x7ef52b00, (q31_t)0x7ef1f524,
+  (q31_t)0x7eeeba62, (q31_t)0x7eeb7abc, (q31_t)0x7ee83632, (q31_t)0x7ee4ecc3, (q31_t)0x7ee19e6f, (q31_t)0x7ede4b38,
+  (q31_t)0x7edaf31c, (q31_t)0x7ed7961c,
+  (q31_t)0x7ed43438, (q31_t)0x7ed0cd70, (q31_t)0x7ecd61c5, (q31_t)0x7ec9f137, (q31_t)0x7ec67bc5, (q31_t)0x7ec3016f,
+  (q31_t)0x7ebf8237, (q31_t)0x7ebbfe1c,
+  (q31_t)0x7eb8751e, (q31_t)0x7eb4e73d, (q31_t)0x7eb1547a, (q31_t)0x7eadbcd4, (q31_t)0x7eaa204c, (q31_t)0x7ea67ee2,
+  (q31_t)0x7ea2d896, (q31_t)0x7e9f2d68,
+  (q31_t)0x7e9b7d58, (q31_t)0x7e97c867, (q31_t)0x7e940e94, (q31_t)0x7e904fe0, (q31_t)0x7e8c8c4b, (q31_t)0x7e88c3d5,
+  (q31_t)0x7e84f67e, (q31_t)0x7e812447,
+  (q31_t)0x7e7d4d2f, (q31_t)0x7e797136, (q31_t)0x7e75905d, (q31_t)0x7e71aaa4, (q31_t)0x7e6dc00c, (q31_t)0x7e69d093,
+  (q31_t)0x7e65dc3b, (q31_t)0x7e61e303,
+  (q31_t)0x7e5de4ec, (q31_t)0x7e59e1f5, (q31_t)0x7e55da20, (q31_t)0x7e51cd6c, (q31_t)0x7e4dbbd9, (q31_t)0x7e49a567,
+  (q31_t)0x7e458a17, (q31_t)0x7e4169e9,
+  (q31_t)0x7e3d44dd, (q31_t)0x7e391af3, (q31_t)0x7e34ec2b, (q31_t)0x7e30b885, (q31_t)0x7e2c8002, (q31_t)0x7e2842a2,
+  (q31_t)0x7e240064, (q31_t)0x7e1fb94a,
+  (q31_t)0x7e1b6d53, (q31_t)0x7e171c7f, (q31_t)0x7e12c6ce, (q31_t)0x7e0e6c42, (q31_t)0x7e0a0cd9, (q31_t)0x7e05a894,
+  (q31_t)0x7e013f74, (q31_t)0x7dfcd178,
+  (q31_t)0x7df85ea0, (q31_t)0x7df3e6ee, (q31_t)0x7def6a60, (q31_t)0x7deae8f7, (q31_t)0x7de662b3, (q31_t)0x7de1d795,
+  (q31_t)0x7ddd479d, (q31_t)0x7dd8b2ca,
+  (q31_t)0x7dd4191d, (q31_t)0x7dcf7a96, (q31_t)0x7dcad736, (q31_t)0x7dc62efc, (q31_t)0x7dc181e8, (q31_t)0x7dbccffc,
+  (q31_t)0x7db81936, (q31_t)0x7db35d98,
+  (q31_t)0x7dae9d21, (q31_t)0x7da9d7d2, (q31_t)0x7da50dab, (q31_t)0x7da03eab, (q31_t)0x7d9b6ad3, (q31_t)0x7d969224,
+  (q31_t)0x7d91b49e, (q31_t)0x7d8cd240,
+  (q31_t)0x7d87eb0a, (q31_t)0x7d82fefe, (q31_t)0x7d7e0e1c, (q31_t)0x7d791862, (q31_t)0x7d741dd2, (q31_t)0x7d6f1e6c,
+  (q31_t)0x7d6a1a31, (q31_t)0x7d65111f,
+  (q31_t)0x7d600338, (q31_t)0x7d5af07b, (q31_t)0x7d55d8e9, (q31_t)0x7d50bc82, (q31_t)0x7d4b9b46, (q31_t)0x7d467536,
+  (q31_t)0x7d414a51, (q31_t)0x7d3c1a98,
+  (q31_t)0x7d36e60b, (q31_t)0x7d31acaa, (q31_t)0x7d2c6e76, (q31_t)0x7d272b6e, (q31_t)0x7d21e393, (q31_t)0x7d1c96e5,
+  (q31_t)0x7d174564, (q31_t)0x7d11ef11,
+  (q31_t)0x7d0c93eb, (q31_t)0x7d0733f3, (q31_t)0x7d01cf29, (q31_t)0x7cfc658d, (q31_t)0x7cf6f720, (q31_t)0x7cf183e1,
+  (q31_t)0x7cec0bd1, (q31_t)0x7ce68ef0,
+  (q31_t)0x7ce10d3f, (q31_t)0x7cdb86bd, (q31_t)0x7cd5fb6a, (q31_t)0x7cd06b48, (q31_t)0x7ccad656, (q31_t)0x7cc53c94,
+  (q31_t)0x7cbf9e03, (q31_t)0x7cb9faa2,
+  (q31_t)0x7cb45272, (q31_t)0x7caea574, (q31_t)0x7ca8f3a7, (q31_t)0x7ca33d0c, (q31_t)0x7c9d81a3, (q31_t)0x7c97c16b,
+  (q31_t)0x7c91fc66, (q31_t)0x7c8c3294,
+  (q31_t)0x7c8663f4, (q31_t)0x7c809088, (q31_t)0x7c7ab84e, (q31_t)0x7c74db48, (q31_t)0x7c6ef976, (q31_t)0x7c6912d7,
+  (q31_t)0x7c63276d, (q31_t)0x7c5d3737,
+  (q31_t)0x7c574236, (q31_t)0x7c514869, (q31_t)0x7c4b49d2, (q31_t)0x7c45466f, (q31_t)0x7c3f3e42, (q31_t)0x7c39314b,
+  (q31_t)0x7c331f8a, (q31_t)0x7c2d08ff,
+  (q31_t)0x7c26edab, (q31_t)0x7c20cd8d, (q31_t)0x7c1aa8a6, (q31_t)0x7c147ef6, (q31_t)0x7c0e507e, (q31_t)0x7c081d3d,
+  (q31_t)0x7c01e534, (q31_t)0x7bfba863,
+  (q31_t)0x7bf566cb, (q31_t)0x7bef206b, (q31_t)0x7be8d544, (q31_t)0x7be28556, (q31_t)0x7bdc30a1, (q31_t)0x7bd5d726,
+  (q31_t)0x7bcf78e5, (q31_t)0x7bc915dd,
+  (q31_t)0x7bc2ae10, (q31_t)0x7bbc417e, (q31_t)0x7bb5d026, (q31_t)0x7baf5a09, (q31_t)0x7ba8df28, (q31_t)0x7ba25f82,
+  (q31_t)0x7b9bdb18, (q31_t)0x7b9551ea,
+  (q31_t)0x7b8ec3f8, (q31_t)0x7b883143, (q31_t)0x7b8199ca, (q31_t)0x7b7afd8f, (q31_t)0x7b745c91, (q31_t)0x7b6db6d0,
+  (q31_t)0x7b670c4d, (q31_t)0x7b605d09,
+  (q31_t)0x7b59a902, (q31_t)0x7b52f03a, (q31_t)0x7b4c32b1, (q31_t)0x7b457068, (q31_t)0x7b3ea95d, (q31_t)0x7b37dd92,
+  (q31_t)0x7b310d07, (q31_t)0x7b2a37bc,
+  (q31_t)0x7b235db2, (q31_t)0x7b1c7ee8, (q31_t)0x7b159b5f, (q31_t)0x7b0eb318, (q31_t)0x7b07c612, (q31_t)0x7b00d44d,
+  (q31_t)0x7af9ddcb, (q31_t)0x7af2e28b,
+  (q31_t)0x7aebe28d, (q31_t)0x7ae4ddd2, (q31_t)0x7addd45b, (q31_t)0x7ad6c626, (q31_t)0x7acfb336, (q31_t)0x7ac89b89,
+  (q31_t)0x7ac17f20, (q31_t)0x7aba5dfc,
+  (q31_t)0x7ab3381d, (q31_t)0x7aac0d82, (q31_t)0x7aa4de2d, (q31_t)0x7a9daa1d, (q31_t)0x7a967153, (q31_t)0x7a8f33d0,
+  (q31_t)0x7a87f192, (q31_t)0x7a80aa9c,
+  (q31_t)0x7a795eec, (q31_t)0x7a720e84, (q31_t)0x7a6ab963, (q31_t)0x7a635f8a, (q31_t)0x7a5c00f9, (q31_t)0x7a549db0,
+  (q31_t)0x7a4d35b0, (q31_t)0x7a45c8f9,
+  (q31_t)0x7a3e578b, (q31_t)0x7a36e166, (q31_t)0x7a2f668c, (q31_t)0x7a27e6fb, (q31_t)0x7a2062b5, (q31_t)0x7a18d9b9,
+  (q31_t)0x7a114c09, (q31_t)0x7a09b9a4,
+  (q31_t)0x7a02228a, (q31_t)0x79fa86bc, (q31_t)0x79f2e63a, (q31_t)0x79eb4105, (q31_t)0x79e3971c, (q31_t)0x79dbe880,
+  (q31_t)0x79d43532, (q31_t)0x79cc7d31,
+  (q31_t)0x79c4c07e, (q31_t)0x79bcff19, (q31_t)0x79b53903, (q31_t)0x79ad6e3c, (q31_t)0x79a59ec3, (q31_t)0x799dca9a,
+  (q31_t)0x7995f1c1, (q31_t)0x798e1438,
+  (q31_t)0x798631ff, (q31_t)0x797e4b16, (q31_t)0x79765f7f, (q31_t)0x796e6f39, (q31_t)0x79667a44, (q31_t)0x795e80a1,
+  (q31_t)0x79568250, (q31_t)0x794e7f52,
+  (q31_t)0x794677a6, (q31_t)0x793e6b4e, (q31_t)0x79365a49, (q31_t)0x792e4497, (q31_t)0x79262a3a, (q31_t)0x791e0b31,
+  (q31_t)0x7915e77c, (q31_t)0x790dbf1d,
+  (q31_t)0x79059212, (q31_t)0x78fd605d, (q31_t)0x78f529fe, (q31_t)0x78eceef6, (q31_t)0x78e4af44, (q31_t)0x78dc6ae8,
+  (q31_t)0x78d421e4, (q31_t)0x78cbd437,
+  (q31_t)0x78c381e2, (q31_t)0x78bb2ae5, (q31_t)0x78b2cf41, (q31_t)0x78aa6ef5, (q31_t)0x78a20a03, (q31_t)0x7899a06a,
+  (q31_t)0x7891322a, (q31_t)0x7888bf45,
+  (q31_t)0x788047ba, (q31_t)0x7877cb89, (q31_t)0x786f4ab4, (q31_t)0x7866c53a, (q31_t)0x785e3b1c, (q31_t)0x7855ac5a,
+  (q31_t)0x784d18f4, (q31_t)0x784480ea,
+  (q31_t)0x783be43e, (q31_t)0x783342ef, (q31_t)0x782a9cfe, (q31_t)0x7821f26b, (q31_t)0x78194336, (q31_t)0x78108f60,
+  (q31_t)0x7807d6e9, (q31_t)0x77ff19d1,
+  (q31_t)0x77f65819, (q31_t)0x77ed91c0, (q31_t)0x77e4c6c9, (q31_t)0x77dbf732, (q31_t)0x77d322fc, (q31_t)0x77ca4a27,
+  (q31_t)0x77c16cb4, (q31_t)0x77b88aa3,
+  (q31_t)0x77afa3f5, (q31_t)0x77a6b8a9, (q31_t)0x779dc8c0, (q31_t)0x7794d43b, (q31_t)0x778bdb19, (q31_t)0x7782dd5c,
+  (q31_t)0x7779db03, (q31_t)0x7770d40f,
+  (q31_t)0x7767c880, (q31_t)0x775eb857, (q31_t)0x7755a394, (q31_t)0x774c8a36, (q31_t)0x77436c40, (q31_t)0x773a49b0,
+  (q31_t)0x77312287, (q31_t)0x7727f6c6,
+  (q31_t)0x771ec66e, (q31_t)0x7715917d, (q31_t)0x770c57f5, (q31_t)0x770319d6, (q31_t)0x76f9d721, (q31_t)0x76f08fd5,
+  (q31_t)0x76e743f4, (q31_t)0x76ddf37c,
+  (q31_t)0x76d49e70, (q31_t)0x76cb44cf, (q31_t)0x76c1e699, (q31_t)0x76b883d0, (q31_t)0x76af1c72, (q31_t)0x76a5b082,
+  (q31_t)0x769c3ffe, (q31_t)0x7692cae8,
+  (q31_t)0x7689513f, (q31_t)0x767fd304, (q31_t)0x76765038, (q31_t)0x766cc8db, (q31_t)0x76633ced, (q31_t)0x7659ac6f,
+  (q31_t)0x76501760, (q31_t)0x76467dc2,
+  (q31_t)0x763cdf94, (q31_t)0x76333cd8, (q31_t)0x7629958c, (q31_t)0x761fe9b3, (q31_t)0x7616394c, (q31_t)0x760c8457,
+  (q31_t)0x7602cad5, (q31_t)0x75f90cc7,
+  (q31_t)0x75ef4a2c, (q31_t)0x75e58305, (q31_t)0x75dbb753, (q31_t)0x75d1e715, (q31_t)0x75c8124d, (q31_t)0x75be38fa,
+  (q31_t)0x75b45b1d, (q31_t)0x75aa78b6,
+  (q31_t)0x75a091c6, (q31_t)0x7596a64d, (q31_t)0x758cb64c, (q31_t)0x7582c1c2, (q31_t)0x7578c8b0, (q31_t)0x756ecb18,
+  (q31_t)0x7564c8f8, (q31_t)0x755ac251,
+  (q31_t)0x7550b725, (q31_t)0x7546a772, (q31_t)0x753c933a, (q31_t)0x75327a7d, (q31_t)0x75285d3b, (q31_t)0x751e3b75,
+  (q31_t)0x7514152b, (q31_t)0x7509ea5d,
+  (q31_t)0x74ffbb0d, (q31_t)0x74f58739, (q31_t)0x74eb4ee3, (q31_t)0x74e1120c, (q31_t)0x74d6d0b2, (q31_t)0x74cc8ad8,
+  (q31_t)0x74c2407d, (q31_t)0x74b7f1a1,
+  (q31_t)0x74ad9e46, (q31_t)0x74a3466b, (q31_t)0x7498ea11, (q31_t)0x748e8938, (q31_t)0x748423e0, (q31_t)0x7479ba0b,
+  (q31_t)0x746f4bb8, (q31_t)0x7464d8e8,
+  (q31_t)0x745a619b, (q31_t)0x744fe5d2, (q31_t)0x7445658d, (q31_t)0x743ae0cc, (q31_t)0x74305790, (q31_t)0x7425c9da,
+  (q31_t)0x741b37a9, (q31_t)0x7410a0fe,
+  (q31_t)0x740605d9, (q31_t)0x73fb663c, (q31_t)0x73f0c226, (q31_t)0x73e61997, (q31_t)0x73db6c91, (q31_t)0x73d0bb13,
+  (q31_t)0x73c6051f, (q31_t)0x73bb4ab3,
+  (q31_t)0x73b08bd1, (q31_t)0x73a5c87a, (q31_t)0x739b00ad, (q31_t)0x7390346b, (q31_t)0x738563b5, (q31_t)0x737a8e8a,
+  (q31_t)0x736fb4ec, (q31_t)0x7364d6da,
+  (q31_t)0x7359f456, (q31_t)0x734f0d5f, (q31_t)0x734421f6, (q31_t)0x7339321b, (q31_t)0x732e3dcf, (q31_t)0x73234512,
+  (q31_t)0x731847e5, (q31_t)0x730d4648,
+  (q31_t)0x7302403c, (q31_t)0x72f735c0, (q31_t)0x72ec26d6, (q31_t)0x72e1137d, (q31_t)0x72d5fbb7, (q31_t)0x72cadf83,
+  (q31_t)0x72bfbee3, (q31_t)0x72b499d6,
+  (q31_t)0x72a9705c, (q31_t)0x729e4277, (q31_t)0x72931027, (q31_t)0x7287d96c, (q31_t)0x727c9e47, (q31_t)0x72715eb8,
+  (q31_t)0x72661abf, (q31_t)0x725ad25d,
+  (q31_t)0x724f8593, (q31_t)0x72443460, (q31_t)0x7238dec5, (q31_t)0x722d84c4, (q31_t)0x7222265b, (q31_t)0x7216c38c,
+  (q31_t)0x720b5c57, (q31_t)0x71fff0bc,
+  (q31_t)0x71f480bc, (q31_t)0x71e90c57, (q31_t)0x71dd938f, (q31_t)0x71d21662, (q31_t)0x71c694d2, (q31_t)0x71bb0edf,
+  (q31_t)0x71af848a, (q31_t)0x71a3f5d2,
+  (q31_t)0x719862b9, (q31_t)0x718ccb3f, (q31_t)0x71812f65, (q31_t)0x71758f29, (q31_t)0x7169ea8f, (q31_t)0x715e4194,
+  (q31_t)0x7152943b, (q31_t)0x7146e284,
+  (q31_t)0x713b2c6e, (q31_t)0x712f71fb, (q31_t)0x7123b32b, (q31_t)0x7117effe, (q31_t)0x710c2875, (q31_t)0x71005c90,
+  (q31_t)0x70f48c50, (q31_t)0x70e8b7b5,
+  (q31_t)0x70dcdec0, (q31_t)0x70d10171, (q31_t)0x70c51fc8, (q31_t)0x70b939c7, (q31_t)0x70ad4f6d, (q31_t)0x70a160ba,
+  (q31_t)0x70956db1, (q31_t)0x70897650,
+  (q31_t)0x707d7a98, (q31_t)0x70717a8a, (q31_t)0x70657626, (q31_t)0x70596d6d, (q31_t)0x704d6060, (q31_t)0x70414efd,
+  (q31_t)0x70353947, (q31_t)0x70291f3e,
+  (q31_t)0x701d00e1, (q31_t)0x7010de32, (q31_t)0x7004b731, (q31_t)0x6ff88bde, (q31_t)0x6fec5c3b, (q31_t)0x6fe02846,
+  (q31_t)0x6fd3f001, (q31_t)0x6fc7b36d,
+  (q31_t)0x6fbb728a, (q31_t)0x6faf2d57, (q31_t)0x6fa2e3d7, (q31_t)0x6f969608, (q31_t)0x6f8a43ed, (q31_t)0x6f7ded84,
+  (q31_t)0x6f7192cf, (q31_t)0x6f6533ce,
+  (q31_t)0x6f58d082, (q31_t)0x6f4c68eb, (q31_t)0x6f3ffd09, (q31_t)0x6f338cde, (q31_t)0x6f271868, (q31_t)0x6f1a9faa,
+  (q31_t)0x6f0e22a3, (q31_t)0x6f01a155,
+  (q31_t)0x6ef51bbe, (q31_t)0x6ee891e1, (q31_t)0x6edc03bc, (q31_t)0x6ecf7152, (q31_t)0x6ec2daa2, (q31_t)0x6eb63fad,
+  (q31_t)0x6ea9a073, (q31_t)0x6e9cfcf5,
+  (q31_t)0x6e905534, (q31_t)0x6e83a92f, (q31_t)0x6e76f8e7, (q31_t)0x6e6a445d, (q31_t)0x6e5d8b91, (q31_t)0x6e50ce84,
+  (q31_t)0x6e440d37, (q31_t)0x6e3747a9,
+  (q31_t)0x6e2a7ddb, (q31_t)0x6e1dafce, (q31_t)0x6e10dd82, (q31_t)0x6e0406f8, (q31_t)0x6df72c30, (q31_t)0x6dea4d2b,
+  (q31_t)0x6ddd69e9, (q31_t)0x6dd0826a,
+  (q31_t)0x6dc396b0, (q31_t)0x6db6a6ba, (q31_t)0x6da9b28a, (q31_t)0x6d9cba1f, (q31_t)0x6d8fbd7a, (q31_t)0x6d82bc9d,
+  (q31_t)0x6d75b786, (q31_t)0x6d68ae37,
+  (q31_t)0x6d5ba0b0, (q31_t)0x6d4e8ef2, (q31_t)0x6d4178fd, (q31_t)0x6d345ed1, (q31_t)0x6d274070, (q31_t)0x6d1a1dda,
+  (q31_t)0x6d0cf70f, (q31_t)0x6cffcc0f,
+  (q31_t)0x6cf29cdc, (q31_t)0x6ce56975, (q31_t)0x6cd831dc, (q31_t)0x6ccaf610, (q31_t)0x6cbdb613, (q31_t)0x6cb071e4,
+  (q31_t)0x6ca32985, (q31_t)0x6c95dcf6,
+  (q31_t)0x6c888c36, (q31_t)0x6c7b3748, (q31_t)0x6c6dde2b, (q31_t)0x6c6080e0, (q31_t)0x6c531f67, (q31_t)0x6c45b9c1,
+  (q31_t)0x6c384fef, (q31_t)0x6c2ae1f0,
+  (q31_t)0x6c1d6fc6, (q31_t)0x6c0ff971, (q31_t)0x6c027ef1, (q31_t)0x6bf50047, (q31_t)0x6be77d74, (q31_t)0x6bd9f677,
+  (q31_t)0x6bcc6b53, (q31_t)0x6bbedc06,
+  (q31_t)0x6bb14892, (q31_t)0x6ba3b0f7, (q31_t)0x6b961536, (q31_t)0x6b88754f, (q31_t)0x6b7ad142, (q31_t)0x6b6d2911,
+  (q31_t)0x6b5f7cbc, (q31_t)0x6b51cc42,
+  (q31_t)0x6b4417a6, (q31_t)0x6b365ee7, (q31_t)0x6b28a206, (q31_t)0x6b1ae103, (q31_t)0x6b0d1bdf, (q31_t)0x6aff529a,
+  (q31_t)0x6af18536, (q31_t)0x6ae3b3b2,
+  (q31_t)0x6ad5de0f, (q31_t)0x6ac8044e, (q31_t)0x6aba266e, (q31_t)0x6aac4472, (q31_t)0x6a9e5e58, (q31_t)0x6a907423,
+  (q31_t)0x6a8285d1, (q31_t)0x6a749365,
+  (q31_t)0x6a669cdd, (q31_t)0x6a58a23c, (q31_t)0x6a4aa381, (q31_t)0x6a3ca0ad, (q31_t)0x6a2e99c0, (q31_t)0x6a208ebb,
+  (q31_t)0x6a127f9f, (q31_t)0x6a046c6c,
+  (q31_t)0x69f65523, (q31_t)0x69e839c4, (q31_t)0x69da1a50, (q31_t)0x69cbf6c7, (q31_t)0x69bdcf29, (q31_t)0x69afa378,
+  (q31_t)0x69a173b5, (q31_t)0x69933fde,
+  (q31_t)0x698507f6, (q31_t)0x6976cbfc, (q31_t)0x69688bf1, (q31_t)0x695a47d6, (q31_t)0x694bffab, (q31_t)0x693db371,
+  (q31_t)0x692f6328, (q31_t)0x69210ed1,
+  (q31_t)0x6912b66c, (q31_t)0x690459fb, (q31_t)0x68f5f97d, (q31_t)0x68e794f3, (q31_t)0x68d92c5d, (q31_t)0x68cabfbd,
+  (q31_t)0x68bc4f13, (q31_t)0x68adda5f,
+  (q31_t)0x689f61a1, (q31_t)0x6890e4dc, (q31_t)0x6882640e, (q31_t)0x6873df38, (q31_t)0x6865565c, (q31_t)0x6856c979,
+  (q31_t)0x68483891, (q31_t)0x6839a3a4,
+  (q31_t)0x682b0ab1, (q31_t)0x681c6dbb, (q31_t)0x680dccc1, (q31_t)0x67ff27c4, (q31_t)0x67f07ec5, (q31_t)0x67e1d1c4,
+  (q31_t)0x67d320c1, (q31_t)0x67c46bbe,
+  (q31_t)0x67b5b2bb, (q31_t)0x67a6f5b8, (q31_t)0x679834b6, (q31_t)0x67896fb6, (q31_t)0x677aa6b8, (q31_t)0x676bd9bd,
+  (q31_t)0x675d08c4, (q31_t)0x674e33d0,
+  (q31_t)0x673f5ae0, (q31_t)0x67307df5, (q31_t)0x67219d10, (q31_t)0x6712b831, (q31_t)0x6703cf58, (q31_t)0x66f4e287,
+  (q31_t)0x66e5f1be, (q31_t)0x66d6fcfd,
+  (q31_t)0x66c80445, (q31_t)0x66b90797, (q31_t)0x66aa06f3, (q31_t)0x669b0259, (q31_t)0x668bf9cb, (q31_t)0x667ced49,
+  (q31_t)0x666ddcd3, (q31_t)0x665ec86b,
+  (q31_t)0x664fb010, (q31_t)0x664093c3, (q31_t)0x66317385, (q31_t)0x66224f56, (q31_t)0x66132738, (q31_t)0x6603fb2a,
+  (q31_t)0x65f4cb2d, (q31_t)0x65e59742,
+  (q31_t)0x65d65f69, (q31_t)0x65c723a3, (q31_t)0x65b7e3f1, (q31_t)0x65a8a052, (q31_t)0x659958c9, (q31_t)0x658a0d54,
+  (q31_t)0x657abdf6, (q31_t)0x656b6aae,
+  (q31_t)0x655c137d, (q31_t)0x654cb863, (q31_t)0x653d5962, (q31_t)0x652df679, (q31_t)0x651e8faa, (q31_t)0x650f24f5,
+  (q31_t)0x64ffb65b, (q31_t)0x64f043dc,
+  (q31_t)0x64e0cd78, (q31_t)0x64d15331, (q31_t)0x64c1d507, (q31_t)0x64b252fa, (q31_t)0x64a2cd0c, (q31_t)0x6493433c,
+  (q31_t)0x6483b58c, (q31_t)0x647423fb,
+  (q31_t)0x64648e8c, (q31_t)0x6454f53d, (q31_t)0x64455810, (q31_t)0x6435b706, (q31_t)0x6426121e, (q31_t)0x6416695a,
+  (q31_t)0x6406bcba, (q31_t)0x63f70c3f,
+  (q31_t)0x63e757ea, (q31_t)0x63d79fba, (q31_t)0x63c7e3b1, (q31_t)0x63b823cf, (q31_t)0x63a86015, (q31_t)0x63989884,
+  (q31_t)0x6388cd1b, (q31_t)0x6378fddc,
+  (q31_t)0x63692ac7, (q31_t)0x635953dd, (q31_t)0x6349791f, (q31_t)0x63399a8d, (q31_t)0x6329b827, (q31_t)0x6319d1ef,
+  (q31_t)0x6309e7e4, (q31_t)0x62f9fa09,
+  (q31_t)0x62ea085c, (q31_t)0x62da12df, (q31_t)0x62ca1992, (q31_t)0x62ba1c77, (q31_t)0x62aa1b8d, (q31_t)0x629a16d5,
+  (q31_t)0x628a0e50, (q31_t)0x627a01fe,
+  (q31_t)0x6269f1e1, (q31_t)0x6259ddf8, (q31_t)0x6249c645, (q31_t)0x6239aac7, (q31_t)0x62298b81, (q31_t)0x62196871,
+  (q31_t)0x62094199, (q31_t)0x61f916f9,
+  (q31_t)0x61e8e893, (q31_t)0x61d8b666, (q31_t)0x61c88074, (q31_t)0x61b846bc, (q31_t)0x61a80940, (q31_t)0x6197c800,
+  (q31_t)0x618782fd, (q31_t)0x61773a37,
+  (q31_t)0x6166edb0, (q31_t)0x61569d67, (q31_t)0x6146495d, (q31_t)0x6135f193, (q31_t)0x6125960a, (q31_t)0x611536c2,
+  (q31_t)0x6104d3bc, (q31_t)0x60f46cf9,
+  (q31_t)0x60e40278, (q31_t)0x60d3943b, (q31_t)0x60c32243, (q31_t)0x60b2ac8f, (q31_t)0x60a23322, (q31_t)0x6091b5fa,
+  (q31_t)0x60813519, (q31_t)0x6070b080,
+  (q31_t)0x6060282f, (q31_t)0x604f9c27, (q31_t)0x603f0c69, (q31_t)0x602e78f4, (q31_t)0x601de1ca, (q31_t)0x600d46ec,
+  (q31_t)0x5ffca859, (q31_t)0x5fec0613,
+  (q31_t)0x5fdb601b, (q31_t)0x5fcab670, (q31_t)0x5fba0914, (q31_t)0x5fa95807, (q31_t)0x5f98a34a, (q31_t)0x5f87eade,
+  (q31_t)0x5f772ec2, (q31_t)0x5f666ef9,
+  (q31_t)0x5f55ab82, (q31_t)0x5f44e45e, (q31_t)0x5f34198e, (q31_t)0x5f234b12, (q31_t)0x5f1278eb, (q31_t)0x5f01a31a,
+  (q31_t)0x5ef0c99f, (q31_t)0x5edfec7b,
+  (q31_t)0x5ecf0baf, (q31_t)0x5ebe273b, (q31_t)0x5ead3f1f, (q31_t)0x5e9c535e, (q31_t)0x5e8b63f7, (q31_t)0x5e7a70ea,
+  (q31_t)0x5e697a39, (q31_t)0x5e587fe5,
+  (q31_t)0x5e4781ed, (q31_t)0x5e368053, (q31_t)0x5e257b17, (q31_t)0x5e147239, (q31_t)0x5e0365bb, (q31_t)0x5df2559e,
+  (q31_t)0x5de141e1, (q31_t)0x5dd02a85,
+  (q31_t)0x5dbf0f8c, (q31_t)0x5dadf0f5, (q31_t)0x5d9ccec2, (q31_t)0x5d8ba8f3, (q31_t)0x5d7a7f88, (q31_t)0x5d695283,
+  (q31_t)0x5d5821e4, (q31_t)0x5d46edac,
+  (q31_t)0x5d35b5db, (q31_t)0x5d247a72, (q31_t)0x5d133b72, (q31_t)0x5d01f8dc, (q31_t)0x5cf0b2af, (q31_t)0x5cdf68ed,
+  (q31_t)0x5cce1b97, (q31_t)0x5cbccaac,
+  (q31_t)0x5cab762f, (q31_t)0x5c9a1e1e, (q31_t)0x5c88c27c, (q31_t)0x5c776348, (q31_t)0x5c660084, (q31_t)0x5c549a30,
+  (q31_t)0x5c43304d, (q31_t)0x5c31c2db,
+  (q31_t)0x5c2051db, (q31_t)0x5c0edd4e, (q31_t)0x5bfd6534, (q31_t)0x5bebe98e, (q31_t)0x5bda6a5d, (q31_t)0x5bc8e7a2,
+  (q31_t)0x5bb7615d, (q31_t)0x5ba5d78e,
+  (q31_t)0x5b944a37, (q31_t)0x5b82b958, (q31_t)0x5b7124f2, (q31_t)0x5b5f8d06, (q31_t)0x5b4df193, (q31_t)0x5b3c529c,
+  (q31_t)0x5b2ab020, (q31_t)0x5b190a20,
+  (q31_t)0x5b07609d, (q31_t)0x5af5b398, (q31_t)0x5ae40311, (q31_t)0x5ad24f09, (q31_t)0x5ac09781, (q31_t)0x5aaedc78,
+  (q31_t)0x5a9d1df1, (q31_t)0x5a8b5bec,
+  (q31_t)0x5a799669, (q31_t)0x5a67cd69, (q31_t)0x5a5600ec, (q31_t)0x5a4430f5, (q31_t)0x5a325d82, (q31_t)0x5a208695,
+  (q31_t)0x5a0eac2e, (q31_t)0x59fcce4f,
+  (q31_t)0x59eaecf8, (q31_t)0x59d90829, (q31_t)0x59c71fe3, (q31_t)0x59b53427, (q31_t)0x59a344f6, (q31_t)0x59915250,
+  (q31_t)0x597f5c36, (q31_t)0x596d62a9,
+  (q31_t)0x595b65aa, (q31_t)0x59496538, (q31_t)0x59376155, (q31_t)0x59255a02, (q31_t)0x59134f3e, (q31_t)0x5901410c,
+  (q31_t)0x58ef2f6b, (q31_t)0x58dd1a5d,
+  (q31_t)0x58cb01e1, (q31_t)0x58b8e5f9, (q31_t)0x58a6c6a5, (q31_t)0x5894a3e7, (q31_t)0x58827dbe, (q31_t)0x5870542c,
+  (q31_t)0x585e2730, (q31_t)0x584bf6cd,
+  (q31_t)0x5839c302, (q31_t)0x58278bd1, (q31_t)0x58155139, (q31_t)0x5803133c, (q31_t)0x57f0d1da, (q31_t)0x57de8d15,
+  (q31_t)0x57cc44ec, (q31_t)0x57b9f960,
+  (q31_t)0x57a7aa73, (q31_t)0x57955825, (q31_t)0x57830276, (q31_t)0x5770a968, (q31_t)0x575e4cfa, (q31_t)0x574bed2f,
+  (q31_t)0x57398a05, (q31_t)0x5727237f,
+  (q31_t)0x5714b99d, (q31_t)0x57024c5f, (q31_t)0x56efdbc7, (q31_t)0x56dd67d4, (q31_t)0x56caf088, (q31_t)0x56b875e4,
+  (q31_t)0x56a5f7e7, (q31_t)0x56937694,
+  (q31_t)0x5680f1ea, (q31_t)0x566e69ea, (q31_t)0x565bde95, (q31_t)0x56494fec, (q31_t)0x5636bdef, (q31_t)0x5624289f,
+  (q31_t)0x56118ffe, (q31_t)0x55fef40a,
+  (q31_t)0x55ec54c6, (q31_t)0x55d9b232, (q31_t)0x55c70c4f, (q31_t)0x55b4631d, (q31_t)0x55a1b69d, (q31_t)0x558f06d0,
+  (q31_t)0x557c53b6, (q31_t)0x55699d51,
+  (q31_t)0x5556e3a1, (q31_t)0x554426a7, (q31_t)0x55316663, (q31_t)0x551ea2d6, (q31_t)0x550bdc01, (q31_t)0x54f911e5,
+  (q31_t)0x54e64482, (q31_t)0x54d373d9,
+  (q31_t)0x54c09feb, (q31_t)0x54adc8b8, (q31_t)0x549aee42, (q31_t)0x54881089, (q31_t)0x54752f8d, (q31_t)0x54624b50,
+  (q31_t)0x544f63d2, (q31_t)0x543c7914,
+  (q31_t)0x54298b17, (q31_t)0x541699db, (q31_t)0x5403a561, (q31_t)0x53f0adaa, (q31_t)0x53ddb2b6, (q31_t)0x53cab486,
+  (q31_t)0x53b7b31c, (q31_t)0x53a4ae77,
+  (q31_t)0x5391a699, (q31_t)0x537e9b82, (q31_t)0x536b8d33, (q31_t)0x53587bad, (q31_t)0x534566f0, (q31_t)0x53324efd,
+  (q31_t)0x531f33d5, (q31_t)0x530c1579,
+  (q31_t)0x52f8f3e9, (q31_t)0x52e5cf27, (q31_t)0x52d2a732, (q31_t)0x52bf7c0b, (q31_t)0x52ac4db4, (q31_t)0x52991c2d,
+  (q31_t)0x5285e777, (q31_t)0x5272af92,
+  (q31_t)0x525f7480, (q31_t)0x524c3640, (q31_t)0x5238f4d4, (q31_t)0x5225b03d, (q31_t)0x5212687b, (q31_t)0x51ff1d8f,
+  (q31_t)0x51ebcf7a, (q31_t)0x51d87e3c,
+  (q31_t)0x51c529d7, (q31_t)0x51b1d24a, (q31_t)0x519e7797, (q31_t)0x518b19bf, (q31_t)0x5177b8c2, (q31_t)0x516454a0,
+  (q31_t)0x5150ed5c, (q31_t)0x513d82f4,
+  (q31_t)0x512a156b, (q31_t)0x5116a4c1, (q31_t)0x510330f7, (q31_t)0x50efba0d, (q31_t)0x50dc4005, (q31_t)0x50c8c2de,
+  (q31_t)0x50b5429a, (q31_t)0x50a1bf39,
+  (q31_t)0x508e38bd, (q31_t)0x507aaf25, (q31_t)0x50672273, (q31_t)0x505392a8, (q31_t)0x503fffc4, (q31_t)0x502c69c8,
+  (q31_t)0x5018d0b4, (q31_t)0x5005348a,
+  (q31_t)0x4ff1954b, (q31_t)0x4fddf2f6, (q31_t)0x4fca4d8d, (q31_t)0x4fb6a510, (q31_t)0x4fa2f981, (q31_t)0x4f8f4ae0,
+  (q31_t)0x4f7b992d, (q31_t)0x4f67e46a,
+  (q31_t)0x4f542c98, (q31_t)0x4f4071b6, (q31_t)0x4f2cb3c7, (q31_t)0x4f18f2c9, (q31_t)0x4f052ec0, (q31_t)0x4ef167aa,
+  (q31_t)0x4edd9d89, (q31_t)0x4ec9d05e,
+  (q31_t)0x4eb60029, (q31_t)0x4ea22ceb, (q31_t)0x4e8e56a5, (q31_t)0x4e7a7d58, (q31_t)0x4e66a105, (q31_t)0x4e52c1ab,
+  (q31_t)0x4e3edf4d, (q31_t)0x4e2af9ea,
+  (q31_t)0x4e171184, (q31_t)0x4e03261b, (q31_t)0x4def37b0, (q31_t)0x4ddb4644, (q31_t)0x4dc751d8, (q31_t)0x4db35a6c,
+  (q31_t)0x4d9f6001, (q31_t)0x4d8b6298,
+  (q31_t)0x4d776231, (q31_t)0x4d635ece, (q31_t)0x4d4f5870, (q31_t)0x4d3b4f16, (q31_t)0x4d2742c2, (q31_t)0x4d133374,
+  (q31_t)0x4cff212e, (q31_t)0x4ceb0bf0,
+  (q31_t)0x4cd6f3bb, (q31_t)0x4cc2d88f, (q31_t)0x4caeba6e, (q31_t)0x4c9a9958, (q31_t)0x4c86754e, (q31_t)0x4c724e50,
+  (q31_t)0x4c5e2460, (q31_t)0x4c49f77f,
+  (q31_t)0x4c35c7ac, (q31_t)0x4c2194e9, (q31_t)0x4c0d5f37, (q31_t)0x4bf92697, (q31_t)0x4be4eb08, (q31_t)0x4bd0ac8d,
+  (q31_t)0x4bbc6b25, (q31_t)0x4ba826d1,
+  (q31_t)0x4b93df93, (q31_t)0x4b7f956b, (q31_t)0x4b6b485a, (q31_t)0x4b56f861, (q31_t)0x4b42a580, (q31_t)0x4b2e4fb8,
+  (q31_t)0x4b19f70a, (q31_t)0x4b059b77,
+  (q31_t)0x4af13d00, (q31_t)0x4adcdba5, (q31_t)0x4ac87767, (q31_t)0x4ab41046, (q31_t)0x4a9fa645, (q31_t)0x4a8b3963,
+  (q31_t)0x4a76c9a2, (q31_t)0x4a625701,
+  (q31_t)0x4a4de182, (q31_t)0x4a396926, (q31_t)0x4a24edee, (q31_t)0x4a106fda, (q31_t)0x49fbeeea, (q31_t)0x49e76b21,
+  (q31_t)0x49d2e47e, (q31_t)0x49be5b02,
+  (q31_t)0x49a9ceaf, (q31_t)0x49953f84, (q31_t)0x4980ad84, (q31_t)0x496c18ae, (q31_t)0x49578103, (q31_t)0x4942e684,
+  (q31_t)0x492e4933, (q31_t)0x4919a90f,
+  (q31_t)0x4905061a, (q31_t)0x48f06054, (q31_t)0x48dbb7be, (q31_t)0x48c70c59, (q31_t)0x48b25e25, (q31_t)0x489dad25,
+  (q31_t)0x4888f957, (q31_t)0x487442be,
+  (q31_t)0x485f8959, (q31_t)0x484acd2a, (q31_t)0x48360e32, (q31_t)0x48214c71, (q31_t)0x480c87e8, (q31_t)0x47f7c099,
+  (q31_t)0x47e2f682, (q31_t)0x47ce29a7,
+  (q31_t)0x47b95a06, (q31_t)0x47a487a2, (q31_t)0x478fb27b, (q31_t)0x477ada91, (q31_t)0x4765ffe6, (q31_t)0x4751227a,
+  (q31_t)0x473c424e, (q31_t)0x47275f63,
+  (q31_t)0x471279ba, (q31_t)0x46fd9154, (q31_t)0x46e8a631, (q31_t)0x46d3b852, (q31_t)0x46bec7b8, (q31_t)0x46a9d464,
+  (q31_t)0x4694de56, (q31_t)0x467fe590,
+  (q31_t)0x466aea12, (q31_t)0x4655ebdd, (q31_t)0x4640eaf2, (q31_t)0x462be751, (q31_t)0x4616e0fc, (q31_t)0x4601d7f3,
+  (q31_t)0x45eccc37, (q31_t)0x45d7bdc9,
+  (q31_t)0x45c2acaa, (q31_t)0x45ad98da, (q31_t)0x4598825a, (q31_t)0x4583692c, (q31_t)0x456e4d4f, (q31_t)0x45592ec6,
+  (q31_t)0x45440d90, (q31_t)0x452ee9ae,
+  (q31_t)0x4519c321, (q31_t)0x450499eb, (q31_t)0x44ef6e0b, (q31_t)0x44da3f83, (q31_t)0x44c50e53, (q31_t)0x44afda7d,
+  (q31_t)0x449aa400, (q31_t)0x44856adf,
+  (q31_t)0x44702f19, (q31_t)0x445af0b0, (q31_t)0x4445afa4, (q31_t)0x44306bf6, (q31_t)0x441b25a8, (q31_t)0x4405dcb9,
+  (q31_t)0x43f0912b, (q31_t)0x43db42fe,
+  (q31_t)0x43c5f234, (q31_t)0x43b09ecc, (q31_t)0x439b48c9, (q31_t)0x4385f02a, (q31_t)0x437094f1, (q31_t)0x435b371f,
+  (q31_t)0x4345d6b3, (q31_t)0x433073b0,
+  (q31_t)0x431b0e15, (q31_t)0x4305a5e5, (q31_t)0x42f03b1e, (q31_t)0x42dacdc3, (q31_t)0x42c55dd4, (q31_t)0x42afeb53,
+  (q31_t)0x429a763f, (q31_t)0x4284fe99,
+  (q31_t)0x426f8463, (q31_t)0x425a079e, (q31_t)0x42448849, (q31_t)0x422f0667, (q31_t)0x421981f7, (q31_t)0x4203fafb,
+  (q31_t)0x41ee7174, (q31_t)0x41d8e561,
+  (q31_t)0x41c356c5, (q31_t)0x41adc5a0, (q31_t)0x419831f3, (q31_t)0x41829bbe, (q31_t)0x416d0302, (q31_t)0x415767c1,
+  (q31_t)0x4141c9fb, (q31_t)0x412c29b1,
+  (q31_t)0x411686e4, (q31_t)0x4100e194, (q31_t)0x40eb39c3, (q31_t)0x40d58f71, (q31_t)0x40bfe29f, (q31_t)0x40aa334e,
+  (q31_t)0x4094817f, (q31_t)0x407ecd32,
+  (q31_t)0x40691669, (q31_t)0x40535d24, (q31_t)0x403da165, (q31_t)0x4027e32b, (q31_t)0x40122278, (q31_t)0x3ffc5f4d,
+  (q31_t)0x3fe699aa, (q31_t)0x3fd0d191,
+  (q31_t)0x3fbb0702, (q31_t)0x3fa539fd, (q31_t)0x3f8f6a85, (q31_t)0x3f799899, (q31_t)0x3f63c43b, (q31_t)0x3f4ded6b,
+  (q31_t)0x3f38142a, (q31_t)0x3f22387a,
+  (q31_t)0x3f0c5a5a, (q31_t)0x3ef679cc, (q31_t)0x3ee096d1, (q31_t)0x3ecab169, (q31_t)0x3eb4c995, (q31_t)0x3e9edf57,
+  (q31_t)0x3e88f2ae, (q31_t)0x3e73039d,
+  (q31_t)0x3e5d1222, (q31_t)0x3e471e41, (q31_t)0x3e3127f9, (q31_t)0x3e1b2f4a, (q31_t)0x3e053437, (q31_t)0x3def36c0,
+  (q31_t)0x3dd936e6, (q31_t)0x3dc334a9,
+  (q31_t)0x3dad300b, (q31_t)0x3d97290b, (q31_t)0x3d811fac, (q31_t)0x3d6b13ee, (q31_t)0x3d5505d2, (q31_t)0x3d3ef559,
+  (q31_t)0x3d28e282, (q31_t)0x3d12cd51,
+  (q31_t)0x3cfcb5c4, (q31_t)0x3ce69bde, (q31_t)0x3cd07f9f, (q31_t)0x3cba6107, (q31_t)0x3ca44018, (q31_t)0x3c8e1cd3,
+  (q31_t)0x3c77f737, (q31_t)0x3c61cf48,
+  (q31_t)0x3c4ba504, (q31_t)0x3c35786d, (q31_t)0x3c1f4983, (q31_t)0x3c091849, (q31_t)0x3bf2e4be, (q31_t)0x3bdcaee3,
+  (q31_t)0x3bc676b9, (q31_t)0x3bb03c42,
+  (q31_t)0x3b99ff7d, (q31_t)0x3b83c06c, (q31_t)0x3b6d7f10, (q31_t)0x3b573b69, (q31_t)0x3b40f579, (q31_t)0x3b2aad3f,
+  (q31_t)0x3b1462be, (q31_t)0x3afe15f6,
+  (q31_t)0x3ae7c6e7, (q31_t)0x3ad17593, (q31_t)0x3abb21fb, (q31_t)0x3aa4cc1e, (q31_t)0x3a8e7400, (q31_t)0x3a78199f,
+  (q31_t)0x3a61bcfd, (q31_t)0x3a4b5e1b,
+  (q31_t)0x3a34fcf9, (q31_t)0x3a1e9999, (q31_t)0x3a0833fc, (q31_t)0x39f1cc21, (q31_t)0x39db620b, (q31_t)0x39c4f5ba,
+  (q31_t)0x39ae872f, (q31_t)0x3998166a,
+  (q31_t)0x3981a36d, (q31_t)0x396b2e38, (q31_t)0x3954b6cd, (q31_t)0x393e3d2c, (q31_t)0x3927c155, (q31_t)0x3911434b,
+  (q31_t)0x38fac30e, (q31_t)0x38e4409e,
+  (q31_t)0x38cdbbfc, (q31_t)0x38b7352a, (q31_t)0x38a0ac29, (q31_t)0x388a20f8, (q31_t)0x38739399, (q31_t)0x385d040d,
+  (q31_t)0x38467255, (q31_t)0x382fde72,
+  (q31_t)0x38194864, (q31_t)0x3802b02c, (q31_t)0x37ec15cb, (q31_t)0x37d57943, (q31_t)0x37beda93, (q31_t)0x37a839be,
+  (q31_t)0x379196c3, (q31_t)0x377af1a3,
+  (q31_t)0x37644a60, (q31_t)0x374da0fa, (q31_t)0x3736f573, (q31_t)0x372047ca, (q31_t)0x37099802, (q31_t)0x36f2e61a,
+  (q31_t)0x36dc3214, (q31_t)0x36c57bf0,
+  (q31_t)0x36aec3b0, (q31_t)0x36980954, (q31_t)0x36814cde, (q31_t)0x366a8e4d, (q31_t)0x3653cda3, (q31_t)0x363d0ae2,
+  (q31_t)0x36264609, (q31_t)0x360f7f19,
+  (q31_t)0x35f8b614, (q31_t)0x35e1eafa, (q31_t)0x35cb1dcc, (q31_t)0x35b44e8c, (q31_t)0x359d7d39, (q31_t)0x3586a9d5,
+  (q31_t)0x356fd461, (q31_t)0x3558fcde,
+  (q31_t)0x3542234c, (q31_t)0x352b47ad, (q31_t)0x35146a00, (q31_t)0x34fd8a48, (q31_t)0x34e6a885, (q31_t)0x34cfc4b7,
+  (q31_t)0x34b8dee1, (q31_t)0x34a1f702,
+  (q31_t)0x348b0d1c, (q31_t)0x3474212f, (q31_t)0x345d333c, (q31_t)0x34464345, (q31_t)0x342f5149, (q31_t)0x34185d4b,
+  (q31_t)0x3401674a, (q31_t)0x33ea6f48,
+  (q31_t)0x33d37546, (q31_t)0x33bc7944, (q31_t)0x33a57b44, (q31_t)0x338e7b46, (q31_t)0x3377794b, (q31_t)0x33607554,
+  (q31_t)0x33496f62, (q31_t)0x33326776,
+  (q31_t)0x331b5d91, (q31_t)0x330451b3, (q31_t)0x32ed43de, (q31_t)0x32d63412, (q31_t)0x32bf2250, (q31_t)0x32a80e99,
+  (q31_t)0x3290f8ef, (q31_t)0x3279e151,
+  (q31_t)0x3262c7c1, (q31_t)0x324bac40, (q31_t)0x32348ecf, (q31_t)0x321d6f6e, (q31_t)0x32064e1e, (q31_t)0x31ef2ae1,
+  (q31_t)0x31d805b7, (q31_t)0x31c0dea1,
+  (q31_t)0x31a9b5a0, (q31_t)0x31928ab4, (q31_t)0x317b5de0, (q31_t)0x31642f23, (q31_t)0x314cfe7f, (q31_t)0x3135cbf4,
+  (q31_t)0x311e9783, (q31_t)0x3107612e,
+  (q31_t)0x30f028f4, (q31_t)0x30d8eed8, (q31_t)0x30c1b2da, (q31_t)0x30aa74fa, (q31_t)0x3093353a, (q31_t)0x307bf39b,
+  (q31_t)0x3064b01d, (q31_t)0x304d6ac1,
+  (q31_t)0x30362389, (q31_t)0x301eda75, (q31_t)0x30078f86, (q31_t)0x2ff042bd, (q31_t)0x2fd8f41b, (q31_t)0x2fc1a3a0,
+  (q31_t)0x2faa514f, (q31_t)0x2f92fd26,
+  (q31_t)0x2f7ba729, (q31_t)0x2f644f56, (q31_t)0x2f4cf5b0, (q31_t)0x2f359a37, (q31_t)0x2f1e3ced, (q31_t)0x2f06ddd1,
+  (q31_t)0x2eef7ce5, (q31_t)0x2ed81a29,
+  (q31_t)0x2ec0b5a0, (q31_t)0x2ea94f49, (q31_t)0x2e91e725, (q31_t)0x2e7a7d36, (q31_t)0x2e63117c, (q31_t)0x2e4ba3f8,
+  (q31_t)0x2e3434ac, (q31_t)0x2e1cc397,
+  (q31_t)0x2e0550bb, (q31_t)0x2deddc19, (q31_t)0x2dd665b2, (q31_t)0x2dbeed86, (q31_t)0x2da77397, (q31_t)0x2d8ff7e5,
+  (q31_t)0x2d787a72, (q31_t)0x2d60fb3e,
+  (q31_t)0x2d497a4a, (q31_t)0x2d31f797, (q31_t)0x2d1a7325, (q31_t)0x2d02ecf7, (q31_t)0x2ceb650d, (q31_t)0x2cd3db67,
+  (q31_t)0x2cbc5006, (q31_t)0x2ca4c2ed,
+  (q31_t)0x2c8d341a, (q31_t)0x2c75a390, (q31_t)0x2c5e114f, (q31_t)0x2c467d58, (q31_t)0x2c2ee7ad, (q31_t)0x2c17504d,
+  (q31_t)0x2bffb73a, (q31_t)0x2be81c74,
+  (q31_t)0x2bd07ffe, (q31_t)0x2bb8e1d7, (q31_t)0x2ba14200, (q31_t)0x2b89a07b, (q31_t)0x2b71fd48, (q31_t)0x2b5a5868,
+  (q31_t)0x2b42b1dd, (q31_t)0x2b2b09a6,
+  (q31_t)0x2b135fc6, (q31_t)0x2afbb43c, (q31_t)0x2ae4070a, (q31_t)0x2acc5831, (q31_t)0x2ab4a7b1, (q31_t)0x2a9cf58c,
+  (q31_t)0x2a8541c3, (q31_t)0x2a6d8c55,
+  (q31_t)0x2a55d545, (q31_t)0x2a3e1c93, (q31_t)0x2a266240, (q31_t)0x2a0ea64d, (q31_t)0x29f6e8bb, (q31_t)0x29df298b,
+  (q31_t)0x29c768be, (q31_t)0x29afa654,
+  (q31_t)0x2997e24f, (q31_t)0x29801caf, (q31_t)0x29685576, (q31_t)0x29508ca4, (q31_t)0x2938c23a, (q31_t)0x2920f63a,
+  (q31_t)0x290928a3, (q31_t)0x28f15978,
+  (q31_t)0x28d988b8, (q31_t)0x28c1b666, (q31_t)0x28a9e281, (q31_t)0x28920d0a, (q31_t)0x287a3604, (q31_t)0x28625d6d,
+  (q31_t)0x284a8349, (q31_t)0x2832a796,
+  (q31_t)0x281aca57, (q31_t)0x2802eb8c, (q31_t)0x27eb0b36, (q31_t)0x27d32956, (q31_t)0x27bb45ed, (q31_t)0x27a360fc,
+  (q31_t)0x278b7a84, (q31_t)0x27739285,
+  (q31_t)0x275ba901, (q31_t)0x2743bdf9, (q31_t)0x272bd16d, (q31_t)0x2713e35f, (q31_t)0x26fbf3ce, (q31_t)0x26e402bd,
+  (q31_t)0x26cc102d, (q31_t)0x26b41c1d,
+  (q31_t)0x269c268f, (q31_t)0x26842f84, (q31_t)0x266c36fe, (q31_t)0x26543cfb, (q31_t)0x263c417f, (q31_t)0x26244489,
+  (q31_t)0x260c461b, (q31_t)0x25f44635,
+  (q31_t)0x25dc44d9, (q31_t)0x25c44207, (q31_t)0x25ac3dc0, (q31_t)0x25943806, (q31_t)0x257c30d8, (q31_t)0x25642839,
+  (q31_t)0x254c1e28, (q31_t)0x253412a8,
+  (q31_t)0x251c05b8, (q31_t)0x2503f75a, (q31_t)0x24ebe78f, (q31_t)0x24d3d657, (q31_t)0x24bbc3b4, (q31_t)0x24a3afa6,
+  (q31_t)0x248b9a2f, (q31_t)0x2473834f,
+  (q31_t)0x245b6b07, (q31_t)0x24435158, (q31_t)0x242b3644, (q31_t)0x241319ca, (q31_t)0x23fafbec, (q31_t)0x23e2dcac,
+  (q31_t)0x23cabc09, (q31_t)0x23b29a05,
+  (q31_t)0x239a76a0, (q31_t)0x238251dd, (q31_t)0x236a2bba, (q31_t)0x2352043b, (q31_t)0x2339db5e, (q31_t)0x2321b126,
+  (q31_t)0x23098593, (q31_t)0x22f158a7,
+  (q31_t)0x22d92a61, (q31_t)0x22c0fac4, (q31_t)0x22a8c9cf, (q31_t)0x22909785, (q31_t)0x227863e5, (q31_t)0x22602ef1,
+  (q31_t)0x2247f8aa, (q31_t)0x222fc111,
+  (q31_t)0x22178826, (q31_t)0x21ff4dea, (q31_t)0x21e71260, (q31_t)0x21ced586, (q31_t)0x21b6975f, (q31_t)0x219e57eb,
+  (q31_t)0x2186172b, (q31_t)0x216dd521,
+  (q31_t)0x215591cc, (q31_t)0x213d4d2f, (q31_t)0x21250749, (q31_t)0x210cc01d, (q31_t)0x20f477aa, (q31_t)0x20dc2df2,
+  (q31_t)0x20c3e2f5, (q31_t)0x20ab96b5,
+  (q31_t)0x20934933, (q31_t)0x207afa6f, (q31_t)0x2062aa6b, (q31_t)0x204a5927, (q31_t)0x203206a4, (q31_t)0x2019b2e4,
+  (q31_t)0x20015de7, (q31_t)0x1fe907ae,
+  (q31_t)0x1fd0b03a, (q31_t)0x1fb8578b, (q31_t)0x1f9ffda4, (q31_t)0x1f87a285, (q31_t)0x1f6f462f, (q31_t)0x1f56e8a2,
+  (q31_t)0x1f3e89e0, (q31_t)0x1f2629ea,
+  (q31_t)0x1f0dc8c0, (q31_t)0x1ef56664, (q31_t)0x1edd02d6, (q31_t)0x1ec49e17, (q31_t)0x1eac3829, (q31_t)0x1e93d10c,
+  (q31_t)0x1e7b68c2, (q31_t)0x1e62ff4a,
+  (q31_t)0x1e4a94a7, (q31_t)0x1e3228d9, (q31_t)0x1e19bbe0, (q31_t)0x1e014dbf, (q31_t)0x1de8de75, (q31_t)0x1dd06e04,
+  (q31_t)0x1db7fc6d, (q31_t)0x1d9f89b1,
+  (q31_t)0x1d8715d0, (q31_t)0x1d6ea0cc, (q31_t)0x1d562aa6, (q31_t)0x1d3db35e, (q31_t)0x1d253af5, (q31_t)0x1d0cc16c,
+  (q31_t)0x1cf446c5, (q31_t)0x1cdbcb00,
+  (q31_t)0x1cc34e1f, (q31_t)0x1caad021, (q31_t)0x1c925109, (q31_t)0x1c79d0d6, (q31_t)0x1c614f8b, (q31_t)0x1c48cd27,
+  (q31_t)0x1c3049ac, (q31_t)0x1c17c51b,
+  (q31_t)0x1bff3f75, (q31_t)0x1be6b8ba, (q31_t)0x1bce30ec, (q31_t)0x1bb5a80c, (q31_t)0x1b9d1e1a, (q31_t)0x1b849317,
+  (q31_t)0x1b6c0705, (q31_t)0x1b5379e5,
+  (q31_t)0x1b3aebb6, (q31_t)0x1b225c7b, (q31_t)0x1b09cc34, (q31_t)0x1af13ae3, (q31_t)0x1ad8a887, (q31_t)0x1ac01522,
+  (q31_t)0x1aa780b6, (q31_t)0x1a8eeb42,
+  (q31_t)0x1a7654c8, (q31_t)0x1a5dbd49, (q31_t)0x1a4524c6, (q31_t)0x1a2c8b3f, (q31_t)0x1a13f0b6, (q31_t)0x19fb552c,
+  (q31_t)0x19e2b8a2, (q31_t)0x19ca1b17,
+  (q31_t)0x19b17c8f, (q31_t)0x1998dd09, (q31_t)0x19803c86, (q31_t)0x19679b07, (q31_t)0x194ef88e, (q31_t)0x1936551b,
+  (q31_t)0x191db0af, (q31_t)0x19050b4b,
+  (q31_t)0x18ec64f0, (q31_t)0x18d3bda0, (q31_t)0x18bb155a, (q31_t)0x18a26c20, (q31_t)0x1889c1f3, (q31_t)0x187116d4,
+  (q31_t)0x18586ac3, (q31_t)0x183fbdc3,
+  (q31_t)0x18270fd3, (q31_t)0x180e60f4, (q31_t)0x17f5b129, (q31_t)0x17dd0070, (q31_t)0x17c44ecd, (q31_t)0x17ab9c3e,
+  (q31_t)0x1792e8c6, (q31_t)0x177a3466,
+  (q31_t)0x17617f1d, (q31_t)0x1748c8ee, (q31_t)0x173011d9, (q31_t)0x171759df, (q31_t)0x16fea102, (q31_t)0x16e5e741,
+  (q31_t)0x16cd2c9f, (q31_t)0x16b4711b,
+  (q31_t)0x169bb4b7, (q31_t)0x1682f774, (q31_t)0x166a3953, (q31_t)0x16517a55, (q31_t)0x1638ba7a, (q31_t)0x161ff9c4,
+  (q31_t)0x16073834, (q31_t)0x15ee75cb,
+  (q31_t)0x15d5b288, (q31_t)0x15bcee6f, (q31_t)0x15a4297f, (q31_t)0x158b63b9, (q31_t)0x15729d1f, (q31_t)0x1559d5b1,
+  (q31_t)0x15410d70, (q31_t)0x1528445d,
+  (q31_t)0x150f7a7a, (q31_t)0x14f6afc7, (q31_t)0x14dde445, (q31_t)0x14c517f4, (q31_t)0x14ac4ad7, (q31_t)0x14937cee,
+  (q31_t)0x147aae3a, (q31_t)0x1461debc,
+  (q31_t)0x14490e74, (q31_t)0x14303d65, (q31_t)0x14176b8e, (q31_t)0x13fe98f1, (q31_t)0x13e5c58e, (q31_t)0x13ccf167,
+  (q31_t)0x13b41c7d, (q31_t)0x139b46d0,
+  (q31_t)0x13827062, (q31_t)0x13699933, (q31_t)0x1350c144, (q31_t)0x1337e897, (q31_t)0x131f0f2c, (q31_t)0x13063505,
+  (q31_t)0x12ed5a21, (q31_t)0x12d47e83,
+  (q31_t)0x12bba22b, (q31_t)0x12a2c51b, (q31_t)0x1289e752, (q31_t)0x127108d2, (q31_t)0x1258299c, (q31_t)0x123f49b2,
+  (q31_t)0x12266913, (q31_t)0x120d87c1,
+  (q31_t)0x11f4a5bd, (q31_t)0x11dbc307, (q31_t)0x11c2dfa2, (q31_t)0x11a9fb8d, (q31_t)0x119116c9, (q31_t)0x11783159,
+  (q31_t)0x115f4b3c, (q31_t)0x11466473,
+  (q31_t)0x112d7d00, (q31_t)0x111494e4, (q31_t)0x10fbac1e, (q31_t)0x10e2c2b2, (q31_t)0x10c9d89e, (q31_t)0x10b0ede5,
+  (q31_t)0x10980287, (q31_t)0x107f1686,
+  (q31_t)0x106629e1, (q31_t)0x104d3c9b, (q31_t)0x10344eb4, (q31_t)0x101b602d, (q31_t)0x10027107, (q31_t)0xfe98143,
+  (q31_t)0xfd090e1, (q31_t)0xfb79fe4,
+  (q31_t)0xf9eae4c, (q31_t)0xf85bc19, (q31_t)0xf6cc94e, (q31_t)0xf53d5ea, (q31_t)0xf3ae1ee, (q31_t)0xf21ed5d, (q31_t)0xf08f836,
+  (q31_t)0xef0027b,
+  (q31_t)0xed70c2c, (q31_t)0xebe154b, (q31_t)0xea51dd8, (q31_t)0xe8c25d5, (q31_t)0xe732d42, (q31_t)0xe5a3421, (q31_t)0xe413a72,
+  (q31_t)0xe284036,
+  (q31_t)0xe0f456f, (q31_t)0xdf64a1c, (q31_t)0xddd4e40, (q31_t)0xdc451dc, (q31_t)0xdab54ef, (q31_t)0xd92577b, (q31_t)0xd795982,
+  (q31_t)0xd605b03,
+  (q31_t)0xd475c00, (q31_t)0xd2e5c7b, (q31_t)0xd155c73, (q31_t)0xcfc5bea, (q31_t)0xce35ae1, (q31_t)0xcca5959, (q31_t)0xcb15752,
+  (q31_t)0xc9854cf,
+  (q31_t)0xc7f51cf, (q31_t)0xc664e53, (q31_t)0xc4d4a5d, (q31_t)0xc3445ee, (q31_t)0xc1b4107, (q31_t)0xc023ba7, (q31_t)0xbe935d2,
+  (q31_t)0xbd02f87,
+  (q31_t)0xbb728c7, (q31_t)0xb9e2193, (q31_t)0xb8519ed, (q31_t)0xb6c11d5, (q31_t)0xb53094d, (q31_t)0xb3a0055, (q31_t)0xb20f6ee,
+  (q31_t)0xb07ed19,
+  (q31_t)0xaeee2d7, (q31_t)0xad5d829, (q31_t)0xabccd11, (q31_t)0xaa3c18e, (q31_t)0xa8ab5a2, (q31_t)0xa71a94f, (q31_t)0xa589c94,
+  (q31_t)0xa3f8f73,
+  (q31_t)0xa2681ed, (q31_t)0xa0d7403, (q31_t)0x9f465b5, (q31_t)0x9db5706, (q31_t)0x9c247f5, (q31_t)0x9a93884, (q31_t)0x99028b3,
+  (q31_t)0x9771884,
+  (q31_t)0x95e07f8, (q31_t)0x944f70f, (q31_t)0x92be5ca, (q31_t)0x912d42c, (q31_t)0x8f9c233, (q31_t)0x8e0afe2, (q31_t)0x8c79d3a,
+  (q31_t)0x8ae8a3a,
+  (q31_t)0x89576e5, (q31_t)0x87c633c, (q31_t)0x8634f3e, (q31_t)0x84a3aee, (q31_t)0x831264c, (q31_t)0x8181159, (q31_t)0x7fefc16,
+  (q31_t)0x7e5e685,
+  (q31_t)0x7ccd0a5, (q31_t)0x7b3ba78, (q31_t)0x79aa400, (q31_t)0x7818d3c, (q31_t)0x768762e, (q31_t)0x74f5ed7, (q31_t)0x7364738,
+  (q31_t)0x71d2f52,
+  (q31_t)0x7041726, (q31_t)0x6eafeb4, (q31_t)0x6d1e5fe, (q31_t)0x6b8cd05, (q31_t)0x69fb3c9, (q31_t)0x6869a4c, (q31_t)0x66d808f,
+  (q31_t)0x6546692,
+  (q31_t)0x63b4c57, (q31_t)0x62231de, (q31_t)0x6091729, (q31_t)0x5effc38, (q31_t)0x5d6e10c, (q31_t)0x5bdc5a7, (q31_t)0x5a4aa09,
+  (q31_t)0x58b8e34,
+  (q31_t)0x5727228, (q31_t)0x55955e6, (q31_t)0x540396f, (q31_t)0x5271cc4, (q31_t)0x50dffe7, (q31_t)0x4f4e2d8, (q31_t)0x4dbc597,
+  (q31_t)0x4c2a827,
+  (q31_t)0x4a98a88, (q31_t)0x4906cbb, (q31_t)0x4774ec1, (q31_t)0x45e309a, (q31_t)0x4451249, (q31_t)0x42bf3cd, (q31_t)0x412d528,
+  (q31_t)0x3f9b65b,
+  (q31_t)0x3e09767, (q31_t)0x3c7784d, (q31_t)0x3ae590d, (q31_t)0x39539a9, (q31_t)0x37c1a22, (q31_t)0x362fa78, (q31_t)0x349daac,
+  (q31_t)0x330bac1,
+  (q31_t)0x3179ab5, (q31_t)0x2fe7a8c, (q31_t)0x2e55a44, (q31_t)0x2cc39e1, (q31_t)0x2b31961, (q31_t)0x299f8c7, (q31_t)0x280d813,
+  (q31_t)0x267b747,
+  (q31_t)0x24e9662, (q31_t)0x2357567, (q31_t)0x21c5457, (q31_t)0x2033331, (q31_t)0x1ea11f7, (q31_t)0x1d0f0ab, (q31_t)0x1b7cf4d,
+  (q31_t)0x19eaddd,
+  (q31_t)0x1858c5e, (q31_t)0x16c6ad0, (q31_t)0x1534934, (q31_t)0x13a278a, (q31_t)0x12105d5, (q31_t)0x107e414, (q31_t)0xeec249,
+  (q31_t)0xd5a075,
+  (q31_t)0xbc7e99, (q31_t)0xa35cb5, (q31_t)0x8a3acb, (q31_t)0x7118dc, (q31_t)0x57f6e9, (q31_t)0x3ed4f2, (q31_t)0x25b2f8,
+  (q31_t)0xc90fe
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) 
+    const q31_t WeightsQ31_8192[16384] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffffd9, (q31_t)0xfff9b781, (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d, (q31_t)0xffed2684,
+  (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586, (q31_t)0x7ffffa73, (q31_t)0xffda4d08, (q31_t)0x7ffff872, (q31_t)0xffd40489,
+  (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c, (q31_t)0x7ffff094, (q31_t)0xffc12b0e, (q31_t)0x7fffed57, (q31_t)0xffbae290,
+  (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195, (q31_t)0x7fffe1c6, (q31_t)0xffa80917, (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a,
+  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0, (q31_t)0x7fffce09, (q31_t)0xff8ee724, (q31_t)0x7fffc854, (q31_t)0xff889ea7,
+  (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0, (q31_t)0x7fffb55c, (q31_t)0xff75c535, (q31_t)0x7fffae6c, (q31_t)0xff6f7cba,
+  (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5, (q31_t)0x7fff97c1, (q31_t)0xff5ca34b, (q31_t)0x7fff8f94, (q31_t)0xff565ad1,
+  (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df, (q31_t)0x7fff7536, (q31_t)0xff438167, (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef,
+  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801, (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b, (q31_t)0x7fff4317, (q31_t)0xff241715,
+  (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b, (q31_t)0x7fff2151, (q31_t)0xff113db7, (q31_t)0x7fff1572, (q31_t)0xff0af543,
+  (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e, (q31_t)0x7ffeeff8, (q31_t)0xfef81bec, (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b,
+  (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a, (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b, (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd,
+  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2, (q31_t)0x7ffe7e79, (q31_t)0xfec5d876, (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a,
+  (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36, (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc, (q31_t)0x7ffe2d83, (q31_t)0xfea66e64,
+  (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96, (q31_t)0x7ffdf93c, (q31_t)0xfe939530, (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb,
+  (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04, (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2, (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81, (q31_t)0x7ffd6042, (q31_t)0xfe615223, (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5,
+  (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d, (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3, (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a,
+  (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab, (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55, (q31_t)0x7ffc9c92, (q31_t)0xfe28c700,
+  (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a, (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09, (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8,
+  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c, (q31_t)0x7ffbf319, (q31_t)0xfdfccccf, (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484,
+  (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1, (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9, (q31_t)0x7ffb70cb, (q31_t)0xfddd6363,
+  (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db, (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99, (q31_t)0x7ffb0300, (q31_t)0xfdc44258,
+  (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, (q31_t)0x7ffaca40, (q31_t)0xfdb7b1da, (q31_t)0x7ffaad6a, (q31_t)0xfdb1699e, (q31_t)0x7ffa9045, (q31_t)0xfdab2162,
+  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ffa550e, (q31_t)0xfd9e90f0, (q31_t)0x7ffa36fc, (q31_t)0xfd9848b9, (q31_t)0x7ffa189c, (q31_t)0xfd920084,
+  (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff9daed, (q31_t)0xfd85701e, (q31_t)0x7ff9bba0, (q31_t)0xfd7f27ed, (q31_t)0x7ff99c03, (q31_t)0xfd78dfbd,
+  (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff95bdd, (q31_t)0xfd6c4f64, (q31_t)0x7ff93b54, (q31_t)0xfd660739, (q31_t)0x7ff91a7b, (q31_t)0xfd5fbf10,
+  (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, (q31_t)0x7ff8d7de, (q31_t)0xfd532ec3, (q31_t)0x7ff8b619, (q31_t)0xfd4ce69f, (q31_t)0x7ff89405, (q31_t)0xfd469e7c,
+  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff84ef0, (q31_t)0xfd3a0e3d, (q31_t)0x7ff82bef, (q31_t)0xfd33c61f, (q31_t)0x7ff8089f, (q31_t)0xfd2d7e04,
+  (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff7c113, (q31_t)0xfd20edd2, (q31_t)0x7ff79cd6, (q31_t)0xfd1aa5bc, (q31_t)0x7ff7784a, (q31_t)0xfd145da7,
+  (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff72e46, (q31_t)0xfd07cd83, (q31_t)0x7ff708ce, (q31_t)0xfd018574, (q31_t)0x7ff6e307, (q31_t)0xfcfb3d67,
+  (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, (q31_t)0x7ff6968b, (q31_t)0xfceead52, (q31_t)0x7ff66fd7, (q31_t)0xfce8654b, (q31_t)0x7ff648d4, (q31_t)0xfce21d45,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff5f9e1, (q31_t)0xfcd58d3f, (q31_t)0x7ff5d1f1, (q31_t)0xfccf453f, (q31_t)0x7ff5a9b2, (q31_t)0xfcc8fd41,
+  (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff55848, (q31_t)0xfcbc6d4c, (q31_t)0x7ff52f1d, (q31_t)0xfcb62554, (q31_t)0x7ff505a2, (q31_t)0xfcafdd5e,
+  (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4b1c0, (q31_t)0xfca34d78, (q31_t)0x7ff48759, (q31_t)0xfc9d0588, (q31_t)0x7ff45ca3, (q31_t)0xfc96bd9b,
+  (q31_t)0x7ff4319d, (q31_t)0xfc9075af, (q31_t)0x7ff40649, (q31_t)0xfc8a2dc6, (q31_t)0x7ff3daa6, (q31_t)0xfc83e5de, (q31_t)0x7ff3aeb4, (q31_t)0xfc7d9df9,
+  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff355e4, (q31_t)0xfc710e36, (q31_t)0x7ff32905, (q31_t)0xfc6ac657, (q31_t)0x7ff2fbd7, (q31_t)0xfc647e7b,
+  (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff2a08f, (q31_t)0xfc57eec9, (q31_t)0x7ff27275, (q31_t)0xfc51a6f3, (q31_t)0x7ff2440b, (q31_t)0xfc4b5f20,
+  (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1e64c, (q31_t)0xfc3ecf80, (q31_t)0x7ff1b6f6, (q31_t)0xfc3887b3, (q31_t)0x7ff18751, (q31_t)0xfc323fe9,
+  (q31_t)0x7ff1575d, (q31_t)0xfc2bf821, (q31_t)0x7ff1271a, (q31_t)0xfc25b05c, (q31_t)0x7ff0f688, (q31_t)0xfc1f6899, (q31_t)0x7ff0c5a7, (q31_t)0xfc1920d8,
+  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7ff062f9, (q31_t)0xfc0c915e, (q31_t)0x7ff0312c, (q31_t)0xfc0649a5, (q31_t)0x7fefff0f, (q31_t)0xfc0001ee,
+  (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7fef99ea, (q31_t)0xfbf37287, (q31_t)0x7fef66e1, (q31_t)0xfbed2ad8, (q31_t)0x7fef3388, (q31_t)0xfbe6e32b,
+  (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7feecbec, (q31_t)0xfbda53d8, (q31_t)0x7fee97a7, (q31_t)0xfbd40c33, (q31_t)0x7fee6313, (q31_t)0xfbcdc490,
+  (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0, (q31_t)0x7fedf8ff, (q31_t)0xfbc13552, (q31_t)0x7fedc37e, (q31_t)0xfbbaedb7, (q31_t)0x7fed8daf, (q31_t)0xfbb4a61f,
+  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fed2123, (q31_t)0xfba816f6, (q31_t)0x7fecea67, (q31_t)0xfba1cf66, (q31_t)0x7fecb35c, (q31_t)0xfb9b87d8,
+  (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7fec4459, (q31_t)0xfb8ef8c5, (q31_t)0x7fec0c62, (q31_t)0xfb88b13f, (q31_t)0x7febd41b, (q31_t)0xfb8269bd,
+  (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feb62a1, (q31_t)0xfb75dac0, (q31_t)0x7feb296d, (q31_t)0xfb6f9345, (q31_t)0x7feaefeb, (q31_t)0xfb694bce,
+  (q31_t)0x7feab61a, (q31_t)0xfb630459, (q31_t)0x7fea7bfa, (q31_t)0xfb5cbce7, (q31_t)0x7fea418b, (q31_t)0xfb567578, (q31_t)0x7fea06cd, (q31_t)0xfb502e0c,
+  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe99064, (q31_t)0xfb439f3c, (q31_t)0x7fe954ba, (q31_t)0xfb3d57d9, (q31_t)0x7fe918c0, (q31_t)0xfb371078,
+  (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe89fe0, (q31_t)0xfb2a81c0, (q31_t)0x7fe862fa, (q31_t)0xfb243a69, (q31_t)0x7fe825c5, (q31_t)0xfb1df314,
+  (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe7aa6e, (q31_t)0xfb116474, (q31_t)0x7fe76c4c, (q31_t)0xfb0b1d28, (q31_t)0x7fe72ddb, (q31_t)0xfb04d5e0,
+  (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b, (q31_t)0x7fe6b00d, (q31_t)0xfaf84758, (q31_t)0x7fe670b0, (q31_t)0xfaf20019, (q31_t)0x7fe63103, (q31_t)0xfaebb8dd,
+  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe5b0be, (q31_t)0xfadf2a6e, (q31_t)0x7fe57025, (q31_t)0xfad8e33c, (q31_t)0x7fe52f3d, (q31_t)0xfad29c0c,
+  (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe4ac81, (q31_t)0xfac60db7, (q31_t)0x7fe46aac, (q31_t)0xfabfc691, (q31_t)0x7fe42889, (q31_t)0xfab97f6e,
+  (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe3a355, (q31_t)0xfaacf133, (q31_t)0x7fe36045, (q31_t)0xfaa6aa1a, (q31_t)0x7fe31ce6, (q31_t)0xfaa06305,
+  (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3, (q31_t)0x7fe2953b, (q31_t)0xfa93d4e4, (q31_t)0x7fe250ef, (q31_t)0xfa8d8dd8, (q31_t)0x7fe20c55, (q31_t)0xfa8746d0,
+  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe18233, (q31_t)0xfa7ab8ca, (q31_t)0x7fe13cac, (q31_t)0xfa7471cc, (q31_t)0x7fe0f6d6, (q31_t)0xfa6e2ad1,
+  (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fe06a3d, (q31_t)0xfa619ce7, (q31_t)0x7fe0237a, (q31_t)0xfa5b55f7, (q31_t)0x7fdfdc69, (q31_t)0xfa550f0a,
+  (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fdf4d59, (q31_t)0xfa48813b, (q31_t)0x7fdf055a, (q31_t)0xfa423a59, (q31_t)0x7fdebd0d, (q31_t)0xfa3bf37a,
+  (q31_t)0x7fde7471, (q31_t)0xfa35ac9f, (q31_t)0x7fde2b86, (q31_t)0xfa2f65c8, (q31_t)0x7fdde24d, (q31_t)0xfa291ef4, (q31_t)0x7fdd98c4, (q31_t)0xfa22d823,
+  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdd04c6, (q31_t)0xfa164a8e, (q31_t)0x7fdcba51, (q31_t)0xfa1003c8, (q31_t)0x7fdc6f8d, (q31_t)0xfa09bd06,
+  (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdbd918, (q31_t)0xf9fd2f8e, (q31_t)0x7fdb8d67, (q31_t)0xf9f6e8d7, (q31_t)0x7fdb4167, (q31_t)0xf9f0a224,
+  (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fdaa87c, (q31_t)0xf9e414ca, (q31_t)0x7fda5b8f, (q31_t)0xf9ddce22, (q31_t)0x7fda0e54, (q31_t)0xf9d7877e,
+  (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de, (q31_t)0x7fd972f2, (q31_t)0xf9cafa42, (q31_t)0x7fd924ca, (q31_t)0xf9c4b3a9, (q31_t)0x7fd8d653, (q31_t)0xf9be6d15,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd8387a, (q31_t)0xf9b1dff7, (q31_t)0x7fd7e917, (q31_t)0xf9ab996e, (q31_t)0x7fd79965, (q31_t)0xf9a552e9,
+  (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6f914, (q31_t)0xf998c5ea, (q31_t)0x7fd6a875, (q31_t)0xf9927f71, (q31_t)0x7fd65788, (q31_t)0xf98c38fc,
+  (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd5b4c1, (q31_t)0xf97fac1d, (q31_t)0x7fd562e7, (q31_t)0xf97965b4, (q31_t)0x7fd510be, (q31_t)0xf9731f4e,
+  (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed, (q31_t)0x7fd46b80, (q31_t)0xf9669290, (q31_t)0x7fd4186a, (q31_t)0xf9604c37, (q31_t)0x7fd3c506, (q31_t)0xf95a05e2,
+  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd31d51, (q31_t)0xf94d7944, (q31_t)0x7fd2c900, (q31_t)0xf94732fb, (q31_t)0x7fd27460, (q31_t)0xf940ecb7,
+  (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd1ca35, (q31_t)0xf934603a, (q31_t)0x7fd174a8, (q31_t)0xf92e1a02, (q31_t)0x7fd11ecd, (q31_t)0xf927d3ce,
+  (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fd0722b, (q31_t)0xf91b4773, (q31_t)0x7fd01b63, (q31_t)0xf915014c, (q31_t)0x7fcfc44d, (q31_t)0xf90ebb29,
+  (q31_t)0x7fcf6ce8, (q31_t)0xf908750a, (q31_t)0x7fcf1533, (q31_t)0xf9022ef0, (q31_t)0x7fcebd31, (q31_t)0xf8fbe8da, (q31_t)0x7fce64df, (q31_t)0xf8f5a2c9,
+  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcdb34f, (q31_t)0xf8e916b2, (q31_t)0x7fcd5a11, (q31_t)0xf8e2d0ae, (q31_t)0x7fcd0083, (q31_t)0xf8dc8aae,
+  (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcc4c7d, (q31_t)0xf8cffebb, (q31_t)0x7fcbf203, (q31_t)0xf8c9b8c8, (q31_t)0x7fcb973b, (q31_t)0xf8c372d9,
+  (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fcae0bd, (q31_t)0xf8b6e70a, (q31_t)0x7fca8508, (q31_t)0xf8b0a129, (q31_t)0x7fca2905, (q31_t)0xf8aa5b4c,
+  (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574, (q31_t)0x7fc97011, (q31_t)0xf89dcfa1, (q31_t)0x7fc91320, (q31_t)0xf89789d2, (q31_t)0x7fc8b5e1, (q31_t)0xf8914407,
+  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc7fa77, (q31_t)0xf884b880, (q31_t)0x7fc79c4b, (q31_t)0xf87e72c4, (q31_t)0x7fc73dd1, (q31_t)0xf8782d0c,
+  (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc67ff0, (q31_t)0xf86ba1aa, (q31_t)0x7fc62089, (q31_t)0xf8655c00, (q31_t)0x7fc5c0d3, (q31_t)0xf85f165b,
+  (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc5007c, (q31_t)0xf8528b1f, (q31_t)0x7fc49fda, (q31_t)0xf84c4588, (q31_t)0x7fc43ee9, (q31_t)0xf845fff5,
+  (q31_t)0x7fc3dda9, (q31_t)0xf83fba68, (q31_t)0x7fc37c1b, (q31_t)0xf83974df, (q31_t)0x7fc31a3d, (q31_t)0xf8332f5b, (q31_t)0x7fc2b811, (q31_t)0xf82ce9dc,
+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc1f2cc, (q31_t)0xf8205eec, (q31_t)0x7fc18fb4, (q31_t)0xf81a197b, (q31_t)0x7fc12c4d, (q31_t)0xf813d410,
+  (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fc06491, (q31_t)0xf8074947, (q31_t)0x7fc0003e, (q31_t)0xf80103ea, (q31_t)0x7fbf9b9b, (q31_t)0xf7fabe92,
+  (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbed16a, (q31_t)0xf7ee33f0, (q31_t)0x7fbe6bdb, (q31_t)0xf7e7eea7, (q31_t)0x7fbe05fd, (q31_t)0xf7e1a963,
+  (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423, (q31_t)0x7fbd3955, (q31_t)0xf7d51ee9, (q31_t)0x7fbcd28b, (q31_t)0xf7ced9b4, (q31_t)0x7fbc6b72, (q31_t)0xf7c89484,
+  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fbb9c53, (q31_t)0xf7bc0a33, (q31_t)0x7fbb344e, (q31_t)0xf7b5c512, (q31_t)0x7fbacbfa, (q31_t)0xf7af7ff6,
+  (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb9fa65, (q31_t)0xf7a2f5ce, (q31_t)0x7fb99125, (q31_t)0xf79cb0c2, (q31_t)0x7fb92796, (q31_t)0xf7966bbb,
+  (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb8538b, (q31_t)0xf789e1bc, (q31_t)0x7fb7e90f, (q31_t)0xf7839cc4, (q31_t)0x7fb77e45, (q31_t)0xf77d57d2,
+  (q31_t)0x7fb7132b, (q31_t)0xf77712e5, (q31_t)0x7fb6a7c3, (q31_t)0xf770cdfd, (q31_t)0x7fb63c0d, (q31_t)0xf76a891b, (q31_t)0x7fb5d007, (q31_t)0xf764443d,
+  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb4f710, (q31_t)0xf757ba93, (q31_t)0x7fb48a1e, (q31_t)0xf75175c6, (q31_t)0x7fb41cdd, (q31_t)0xf74b30fe,
+  (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb34170, (q31_t)0xf73ea77e, (q31_t)0x7fb2d343, (q31_t)0xf73862c6, (q31_t)0x7fb264c7, (q31_t)0xf7321e14,
+  (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb186e3, (q31_t)0xf72594c0, (q31_t)0x7fb1177b, (q31_t)0xf71f501e, (q31_t)0x7fb0a7c4, (q31_t)0xf7190b81,
+  (q31_t)0x7fb037bf, (q31_t)0xf712c6ea, (q31_t)0x7fafc76a, (q31_t)0xf70c8259, (q31_t)0x7faf56c7, (q31_t)0xf7063dcd, (q31_t)0x7faee5d5, (q31_t)0xf6fff946,
+  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7fae0305, (q31_t)0xf6f3704a, (q31_t)0x7fad9127, (q31_t)0xf6ed2bd4, (q31_t)0x7fad1efa, (q31_t)0xf6e6e764,
+  (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7fac39b4, (q31_t)0xf6da5e95, (q31_t)0x7fabc69b, (q31_t)0xf6d41a36, (q31_t)0x7fab5333, (q31_t)0xf6cdd5dc,
+  (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7faa6b77, (q31_t)0xf6c14d3a, (q31_t)0x7fa9f723, (q31_t)0xf6bb08f1, (q31_t)0x7fa98280, (q31_t)0xf6b4c4ae,
+  (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071, (q31_t)0x7fa8984e, (q31_t)0xf6a83c3a, (q31_t)0x7fa822bf, (q31_t)0xf6a1f808, (q31_t)0x7fa7ace1, (q31_t)0xf69bb3dd,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa6c039, (q31_t)0xf68f2b96, (q31_t)0x7fa6496e, (q31_t)0xf688e77c, (q31_t)0x7fa5d256, (q31_t)0xf682a367,
+  (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa4e338, (q31_t)0xf6761b50, (q31_t)0x7fa46b32, (q31_t)0xf66fd74d, (q31_t)0x7fa3f2df, (q31_t)0xf6699350,
+  (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa3014b, (q31_t)0xf65d0b68, (q31_t)0x7fa2880b, (q31_t)0xf656c77c, (q31_t)0x7fa20e7c, (q31_t)0xf6508397,
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+  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9f2eae, (q31_t)0xf62aecb5, (q31_t)0x7f9eb2f8, (q31_t)0xf624a8fa, (q31_t)0x7f9e36f4, (q31_t)0xf61e6545,
+  (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9d3dfe, (q31_t)0xf611dded, (q31_t)0x7f9cc10d, (q31_t)0xf60b9a4b, (q31_t)0x7f9c43ce, (q31_t)0xf60556ae,
+  (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f9b4863, (q31_t)0xf5f8cf87, (q31_t)0x7f9aca37, (q31_t)0xf5f28bfd, (q31_t)0x7f9a4bbd, (q31_t)0xf5ec4879,
+  (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc, (q31_t)0x7f994ddc, (q31_t)0xf5dfc184, (q31_t)0x7f98ce76, (q31_t)0xf5d97e13, (q31_t)0x7f984ec1, (q31_t)0xf5d33aa8,
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+  (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f954a0d, (q31_t)0xf5ada6ab, (q31_t)0x7f94c831, (q31_t)0xf5a7636c, (q31_t)0x7f944606, (q31_t)0xf5a12034,
+  (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f9340c4, (q31_t)0xf59499d6, (q31_t)0x7f92bdad, (q31_t)0xf58e56b1, (q31_t)0x7f923a48, (q31_t)0xf5881393,
+  (q31_t)0x7f91b694, (q31_t)0xf581d07b, (q31_t)0x7f913291, (q31_t)0xf57b8d69, (q31_t)0x7f90ae3f, (q31_t)0xf5754a5e, (q31_t)0x7f90299f, (q31_t)0xf56f0759,
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+  (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8d0768, (q31_t)0xf54975c6, (q31_t)0x7f8c80a1, (q31_t)0xf54332ef, (q31_t)0x7f8bf98b, (q31_t)0xf53cf01f,
+  (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f8aea74, (q31_t)0xf5306a93, (q31_t)0x7f8a6272, (q31_t)0xf52a27d7, (q31_t)0x7f89da21, (q31_t)0xf523e521,
+  (q31_t)0x7f895182, (q31_t)0xf51da273, (q31_t)0x7f88c894, (q31_t)0xf5175fca, (q31_t)0x7f883f58, (q31_t)0xf5111d29, (q31_t)0x7f87b5cd, (q31_t)0xf50ada8f,
+  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f86a1ca, (q31_t)0xf4fe556e, (q31_t)0x7f861753, (q31_t)0xf4f812e7, (q31_t)0x7f858c8d, (q31_t)0xf4f1d068,
+  (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f847616, (q31_t)0xf4e54b7d, (q31_t)0x7f83ea64, (q31_t)0xf4df0912, (q31_t)0x7f835e64, (q31_t)0xf4d8c6ae,
+  (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f824577, (q31_t)0xf4cc41fb, (q31_t)0x7f81b88a, (q31_t)0xf4c5ffab, (q31_t)0x7f812b4f, (q31_t)0xf4bfbd63,
+  (q31_t)0x7f809dc5, (q31_t)0xf4b97b21, (q31_t)0x7f800fed, (q31_t)0xf4b338e7, (q31_t)0x7f7f81c6, (q31_t)0xf4acf6b3, (q31_t)0x7f7ef350, (q31_t)0xf4a6b486,
+  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7dd579, (q31_t)0xf49a3042, (q31_t)0x7f7d4617, (q31_t)0xf493ee2b, (q31_t)0x7f7cb667, (q31_t)0xf48dac1a,
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+  (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f7951d2, (q31_t)0xf468204b, (q31_t)0x7f78bffb, (q31_t)0xf461de6d, (q31_t)0x7f782dd6, (q31_t)0xf45b9c95,
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+  (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f74ba83, (q31_t)0xf436121e, (q31_t)0x7f742637, (q31_t)0xf42fd079, (q31_t)0x7f73919d, (q31_t)0xf4298edc,
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+  (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f700f8c, (q31_t)0xf40405c3, (q31_t)0x7f6f78cb, (q31_t)0xf3fdc459, (q31_t)0x7f6ee1bc, (q31_t)0xf3f782f6,
+  (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a, (q31_t)0x7f6db2b1, (q31_t)0xf3eb0046, (q31_t)0x7f6d1ab6, (q31_t)0xf3e4bef9, (q31_t)0x7f6c826d, (q31_t)0xf3de7db4,
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+  (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f667ea9, (q31_t)0xf39ff29f, (q31_t)0x7f65e2ff, (q31_t)0xf399b1ad, (q31_t)0x7f654706, (q31_t)0xf39370c2,
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+  (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f4a9b16, (q31_t)0xf28ce612, (q31_t)0x7f49f1eb, (q31_t)0xf286a67e, (q31_t)0x7f494872, (q31_t)0xf28066f4,
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+  (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3d297e, (q31_t)0xf20ff4ce, (q31_t)0x7f3c7a31, (q31_t)0xf209b5e4, (q31_t)0x7f3bca96, (q31_t)0xf2037702,
+  (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829, (q31_t)0x7f3a6a75, (q31_t)0xf1f6f959, (q31_t)0x7f39b9ee, (q31_t)0xf1f0ba91, (q31_t)0x7f390919, (q31_t)0xf1ea7bd2,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f37a684, (q31_t)0xf1ddfe6f, (q31_t)0x7f36f4c3, (q31_t)0xf1d7bfca, (q31_t)0x7f3642b4, (q31_t)0xf1d1812e,
+  (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f34ddab, (q31_t)0xf1c50410, (q31_t)0x7f342ab1, (q31_t)0xf1bec58e, (q31_t)0x7f337768, (q31_t)0xf1b88715,
+  (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f320feb, (q31_t)0xf1ac0a3e, (q31_t)0x7f315bb7, (q31_t)0xf1a5cbdf, (q31_t)0x7f30a734, (q31_t)0xf19f8d89,
+  (q31_t)0x7f2ff263, (q31_t)0xf1994f3d, (q31_t)0x7f2f3d44, (q31_t)0xf19310f9, (q31_t)0x7f2e87d6, (q31_t)0xf18cd2be, (q31_t)0x7f2dd219, (q31_t)0xf186948c,
+  (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2c65b5, (q31_t)0xf17a1842, (q31_t)0x7f2baf0d, (q31_t)0xf173da2b, (q31_t)0x7f2af817, (q31_t)0xf16d9c1d,
+  (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f29893f, (q31_t)0xf161201b, (q31_t)0x7f28d15d, (q31_t)0xf15ae228, (q31_t)0x7f28192d, (q31_t)0xf154a43d,
+  (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f26a7e2, (q31_t)0xf1482884, (q31_t)0x7f25eec7, (q31_t)0xf141eab5, (q31_t)0x7f25355d, (q31_t)0xf13bacef,
+  (q31_t)0x7f247ba5, (q31_t)0xf1356f32, (q31_t)0x7f23c19e, (q31_t)0xf12f317e, (q31_t)0x7f230749, (q31_t)0xf128f3d4, (q31_t)0x7f224ca6, (q31_t)0xf122b632,
+  (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f20d674, (q31_t)0xf1163b0b, (q31_t)0x7f201ae5, (q31_t)0xf10ffd85, (q31_t)0x7f1f5f08, (q31_t)0xf109c009,
+  (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1de662, (q31_t)0xf0fd452b, (q31_t)0x7f1d299a, (q31_t)0xf0f707ca, (q31_t)0x7f1c6c83, (q31_t)0xf0f0ca72,
+  (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f1af16a, (q31_t)0xf0e44fdf, (q31_t)0x7f1a3368, (q31_t)0xf0de12a3, (q31_t)0x7f197518, (q31_t)0xf0d7d571,
+  (q31_t)0x7f18b679, (q31_t)0xf0d19848, (q31_t)0x7f17f78c, (q31_t)0xf0cb5b28, (q31_t)0x7f173850, (q31_t)0xf0c51e12, (q31_t)0x7f1678c6, (q31_t)0xf0bee105,
+  (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f14f8c7, (q31_t)0xf0b26707, (q31_t)0x7f143852, (q31_t)0xf0ac2a16, (q31_t)0x7f13778e, (q31_t)0xf0a5ed2f,
+  (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f11f51c, (q31_t)0xf099737d, (q31_t)0x7f11336d, (q31_t)0xf09336b2, (q31_t)0x7f107170, (q31_t)0xf08cf9f1,
+  (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0eec8b, (q31_t)0xf080808b, (q31_t)0x7f0e29a3, (q31_t)0xf07a43e7, (q31_t)0x7f0d666c, (q31_t)0xf074074c,
+  (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba, (q31_t)0x7f0bdf14, (q31_t)0xf0678e32, (q31_t)0x7f0b1af2, (q31_t)0xf06151b4, (q31_t)0x7f0a5682, (q31_t)0xf05b1540,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f08ccb7, (q31_t)0xf04e9c73, (q31_t)0x7f08075c, (q31_t)0xf048601c, (q31_t)0x7f0741b2, (q31_t)0xf04223ce,
+  (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f05b574, (q31_t)0xf035ab4f, (q31_t)0x7f04eedf, (q31_t)0xf02f6f1f, (q31_t)0x7f0427fc, (q31_t)0xf02932f8,
+  (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f02994b, (q31_t)0xf01cbac7, (q31_t)0x7f01d17d, (q31_t)0xf0167ebd, (q31_t)0x7f010961, (q31_t)0xf01042be,
+  (q31_t)0x7f0040f6, (q31_t)0xf00a06c8, (q31_t)0x7eff783d, (q31_t)0xf003cadc, (q31_t)0x7efeaf36, (q31_t)0xeffd8ef9, (q31_t)0x7efde5e0, (q31_t)0xeff75321,
+  (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7efc524a, (q31_t)0xefeadb8e, (q31_t)0x7efb8809, (q31_t)0xefe49fd3, (q31_t)0x7efabd7a, (q31_t)0xefde6423,
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+  (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef5f7b3, (q31_t)0xefb8fed0, (q31_t)0x7ef52b00, (q31_t)0xefb2c365, (q31_t)0x7ef45dfe, (q31_t)0xefac8804,
+  (q31_t)0x7ef390ae, (q31_t)0xefa64cae, (q31_t)0x7ef2c310, (q31_t)0xefa01161, (q31_t)0x7ef1f524, (q31_t)0xef99d61f, (q31_t)0x7ef126e9, (q31_t)0xef939ae6,
+  (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eef8988, (q31_t)0xef872494, (q31_t)0x7eeeba62, (q31_t)0xef80e97a, (q31_t)0x7eedeaee, (q31_t)0xef7aae6b,
+  (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7eec4b1b, (q31_t)0xef6e386a, (q31_t)0x7eeb7abc, (q31_t)0xef67fd79, (q31_t)0x7eeaaa0f, (q31_t)0xef61c292,
+  (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee907ca, (q31_t)0xef554ce3, (q31_t)0x7ee83632, (q31_t)0xef4f121b, (q31_t)0x7ee7644c, (q31_t)0xef48d75d,
+  (q31_t)0x7ee69217, (q31_t)0xef429caa, (q31_t)0x7ee5bf94, (q31_t)0xef3c6201, (q31_t)0x7ee4ecc3, (q31_t)0xef362762, (q31_t)0x7ee419a3, (q31_t)0xef2feccd,
+  (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7ee2727a, (q31_t)0xef2377c4, (q31_t)0x7ee19e6f, (q31_t)0xef1d3d4e, (q31_t)0x7ee0ca17, (q31_t)0xef1702e4,
+  (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edf207b, (q31_t)0xef0a8e2d, (q31_t)0x7ede4b38, (q31_t)0xef0453e2, (q31_t)0x7edd75a6, (q31_t)0xeefe19a1,
+  (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7edbc998, (q31_t)0xeef1a53e, (q31_t)0x7edaf31c, (q31_t)0xeeeb6b1c, (q31_t)0x7eda1c51, (q31_t)0xeee53105,
+  (q31_t)0x7ed94538, (q31_t)0xeedef6f9, (q31_t)0x7ed86dd1, (q31_t)0xeed8bcf7, (q31_t)0x7ed7961c, (q31_t)0xeed28300, (q31_t)0x7ed6be18, (q31_t)0xeecc4913,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed50d26, (q31_t)0xeebfd55a, (q31_t)0x7ed43438, (q31_t)0xeeb99b8d, (q31_t)0x7ed35afb, (q31_t)0xeeb361cb,
+  (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ed1a798, (q31_t)0xeea6ee66, (q31_t)0x7ed0cd70, (q31_t)0xeea0b4c4, (q31_t)0x7ecff2fb, (q31_t)0xee9a7b2d,
+  (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ece3d25, (q31_t)0xee8e081e, (q31_t)0x7ecd61c5, (q31_t)0xee87cea7, (q31_t)0x7ecc8617, (q31_t)0xee81953b,
+  (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9, (q31_t)0x7ecacdd0, (q31_t)0xee752283, (q31_t)0x7ec9f137, (q31_t)0xee6ee937, (q31_t)0x7ec9144f, (q31_t)0xee68aff6,
+  (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec75996, (q31_t)0xee5c3d94, (q31_t)0x7ec67bc5, (q31_t)0xee560473, (q31_t)0x7ec59da5, (q31_t)0xee4fcb5e,
+  (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec3e07a, (q31_t)0xee435953, (q31_t)0x7ec3016f, (q31_t)0xee3d205e, (q31_t)0x7ec22217, (q31_t)0xee36e775,
+  (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ec0627a, (q31_t)0xee2a75c2, (q31_t)0x7ebf8237, (q31_t)0xee243cf9, (q31_t)0x7ebea1a6, (q31_t)0xee1e043b,
+  (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88, (q31_t)0x7ebcdf98, (q31_t)0xee1192e0, (q31_t)0x7ebbfe1c, (q31_t)0xee0b5a43, (q31_t)0x7ebb1c52, (q31_t)0xee0521b2,
+  (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb957d2, (q31_t)0xedf8b0b0, (q31_t)0x7eb8751e, (q31_t)0xedf2783f, (q31_t)0x7eb7921b, (q31_t)0xedec3fda,
+  (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb5cb2a, (q31_t)0xeddfcf31, (q31_t)0x7eb4e73d, (q31_t)0xedd996ed, (q31_t)0x7eb40301, (q31_t)0xedd35eb5,
+  (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eb239a0, (q31_t)0xedc6ee65, (q31_t)0x7eb1547a, (q31_t)0xedc0b64e, (q31_t)0x7eb06f05, (q31_t)0xedba7e43,
+  (q31_t)0x7eaf8943, (q31_t)0xedb44642, (q31_t)0x7eaea333, (q31_t)0xedae0e4d, (q31_t)0x7eadbcd4, (q31_t)0xeda7d664, (q31_t)0x7eacd627, (q31_t)0xeda19e85,
+  (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7eab07e3, (q31_t)0xed952eea, (q31_t)0x7eaa204c, (q31_t)0xed8ef72e, (q31_t)0x7ea93867, (q31_t)0xed88bf7d,
+  (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea767b2, (q31_t)0xed7c503d, (q31_t)0x7ea67ee2, (q31_t)0xed7618ae, (q31_t)0x7ea595c4, (q31_t)0xed6fe12b,
+  (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea3c29e, (q31_t)0xed637246, (q31_t)0x7ea2d896, (q31_t)0xed5d3ae5, (q31_t)0x7ea1ee3f, (q31_t)0xed570390,
+  (q31_t)0x7ea1039b, (q31_t)0xed50cc46, (q31_t)0x7ea018a8, (q31_t)0xed4a9507, (q31_t)0x7e9f2d68, (q31_t)0xed445dd5, (q31_t)0x7e9e41d9, (q31_t)0xed3e26ad,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e9c69d1, (q31_t)0xed31b881, (q31_t)0x7e9b7d58, (q31_t)0xed2b817d, (q31_t)0x7e9a9091, (q31_t)0xed254a84,
+  (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e98b618, (q31_t)0xed18dcb5, (q31_t)0x7e97c867, (q31_t)0xed12a5df, (q31_t)0x7e96da67, (q31_t)0xed0c6f14,
+  (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e94fd7e, (q31_t)0xed0001a3, (q31_t)0x7e940e94, (q31_t)0xecf9cafb, (q31_t)0x7e931f5c, (q31_t)0xecf39460,
+  (q31_t)0x7e922fd6, (q31_t)0xeced5dd0, (q31_t)0x7e914002, (q31_t)0xece7274c, (q31_t)0x7e904fe0, (q31_t)0xece0f0d4, (q31_t)0x7e8f5f70, (q31_t)0xecdaba67,
+  (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8d7da6, (q31_t)0xecce4db2, (q31_t)0x7e8c8c4b, (q31_t)0xecc81769, (q31_t)0x7e8b9aa3, (q31_t)0xecc1e12c,
+  (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e89b668, (q31_t)0xecb574d5, (q31_t)0x7e88c3d5, (q31_t)0xecaf3ebc, (q31_t)0x7e87d0f5, (q31_t)0xeca908ae,
+  (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e85ea49, (q31_t)0xec9c9cb7, (q31_t)0x7e84f67e, (q31_t)0xec9666cd, (q31_t)0x7e840265, (q31_t)0xec9030f0,
+  (q31_t)0x7e830dff, (q31_t)0xec89fb1e, (q31_t)0x7e82194a, (q31_t)0xec83c558, (q31_t)0x7e812447, (q31_t)0xec7d8f9e, (q31_t)0x7e802ef6, (q31_t)0xec7759f1,
+  (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7e436a, (q31_t)0xec6aeeba, (q31_t)0x7e7d4d2f, (q31_t)0xec64b930, (q31_t)0x7e7c56a5, (q31_t)0xec5e83b3,
+  (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e7a68a9, (q31_t)0xec5218dc, (q31_t)0x7e797136, (q31_t)0xec4be383, (q31_t)0x7e787975, (q31_t)0xec45ae36,
+  (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e768908, (q31_t)0xec3943c1, (q31_t)0x7e75905d, (q31_t)0xec330e99, (q31_t)0x7e749764, (q31_t)0xec2cd97d,
+  (q31_t)0x7e739e1d, (q31_t)0xec26a46d, (q31_t)0x7e72a488, (q31_t)0xec206f69, (q31_t)0x7e71aaa4, (q31_t)0xec1a3a72, (q31_t)0x7e70b073, (q31_t)0xec140587,
+  (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6ebb27, (q31_t)0xec079bd6, (q31_t)0x7e6dc00c, (q31_t)0xec01670f, (q31_t)0x7e6cc4a2, (q31_t)0xebfb3256,
+  (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e6acce6, (q31_t)0xebeec907, (q31_t)0x7e69d093, (q31_t)0xebe89472, (q31_t)0x7e68d3f2, (q31_t)0xebe25fea,
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+  (q31_t)0x7e63e03b, (q31_t)0xebc359fb, (q31_t)0x7e62e1c6, (q31_t)0xebbd25bd, (q31_t)0x7e61e303, (q31_t)0xebb6f18c, (q31_t)0x7e60e3f2, (q31_t)0xebb0bd67,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5ee4e6, (q31_t)0xeba45543, (q31_t)0x7e5de4ec, (q31_t)0xeb9e2144, (q31_t)0x7e5ce4a3, (q31_t)0xeb97ed52,
+  (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e5ae328, (q31_t)0xeb8b8593, (q31_t)0x7e59e1f5, (q31_t)0xeb8551c6, (q31_t)0x7e58e075, (q31_t)0xeb7f1e06,
+  (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e56dc8a, (q31_t)0xeb72b6ac, (q31_t)0x7e55da20, (q31_t)0xeb6c8312, (q31_t)0x7e54d768, (q31_t)0xeb664f84,
+  (q31_t)0x7e53d462, (q31_t)0xeb601c04, (q31_t)0x7e52d10e, (q31_t)0xeb59e890, (q31_t)0x7e51cd6c, (q31_t)0xeb53b529, (q31_t)0x7e50c97c, (q31_t)0xeb4d81ce,
+  (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4ec0b2, (q31_t)0xeb411b40, (q31_t)0x7e4dbbd9, (q31_t)0xeb3ae80c, (q31_t)0x7e4cb6b1, (q31_t)0xeb34b4e4,
+  (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e4aab78, (q31_t)0xeb284ebc, (q31_t)0x7e49a567, (q31_t)0xeb221bbb, (q31_t)0x7e489f08, (q31_t)0xeb1be8c8,
+  (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e469160, (q31_t)0xeb0f8307, (q31_t)0x7e458a17, (q31_t)0xeb095039, (q31_t)0x7e448281, (q31_t)0xeb031d79,
+  (q31_t)0x7e437a9c, (q31_t)0xeafceac6, (q31_t)0x7e427269, (q31_t)0xeaf6b81f, (q31_t)0x7e4169e9, (q31_t)0xeaf08586, (q31_t)0x7e40611b, (q31_t)0xeaea52fa,
+  (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3e4e95, (q31_t)0xeaddee08, (q31_t)0x7e3d44dd, (q31_t)0xead7bba3, (q31_t)0x7e3c3ad7, (q31_t)0xead1894b,
+  (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e3a25e2, (q31_t)0xeac524c1, (q31_t)0x7e391af3, (q31_t)0xeabef290, (q31_t)0x7e380fb5, (q31_t)0xeab8c06c,
+  (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e35f851, (q31_t)0xeaac5c4c, (q31_t)0x7e34ec2b, (q31_t)0xeaa62a4f, (q31_t)0x7e33dfb6, (q31_t)0xea9ff860,
+  (q31_t)0x7e32d2f4, (q31_t)0xea99c67e, (q31_t)0x7e31c5e3, (q31_t)0xea9394a9, (q31_t)0x7e30b885, (q31_t)0xea8d62e1, (q31_t)0x7e2faad9, (q31_t)0xea873127,
+  (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2d8e97, (q31_t)0xea7acdda, (q31_t)0x7e2c8002, (q31_t)0xea749c47, (q31_t)0x7e2b711f, (q31_t)0xea6e6ac2,
+  (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e29526e, (q31_t)0xea6207df, (q31_t)0x7e2842a2, (q31_t)0xea5bd681, (q31_t)0x7e273287, (q31_t)0xea55a531,
+  (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e251168, (q31_t)0xea4942b9, (q31_t)0x7e240064, (q31_t)0xea431191, (q31_t)0x7e22ef12, (q31_t)0xea3ce077,
+  (q31_t)0x7e21dd73, (q31_t)0xea36af69, (q31_t)0x7e20cb85, (q31_t)0xea307e6a, (q31_t)0x7e1fb94a, (q31_t)0xea2a4d78, (q31_t)0x7e1ea6c1, (q31_t)0xea241c93,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e1c80c5, (q31_t)0xea17baf2, (q31_t)0x7e1b6d53, (q31_t)0xea118a35, (q31_t)0x7e1a5992, (q31_t)0xea0b5987,
+  (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e183128, (q31_t)0xe9fef852, (q31_t)0x7e171c7f, (q31_t)0xe9f8c7cc, (q31_t)0x7e160787, (q31_t)0xe9f29753,
+  (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e13dcaf, (q31_t)0xe9e6368b, (q31_t)0x7e12c6ce, (q31_t)0xe9e0063c, (q31_t)0x7e11b0a0, (q31_t)0xe9d9d5fa,
+  (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5, (q31_t)0x7e0f835a, (q31_t)0xe9cd759f, (q31_t)0x7e0e6c42, (q31_t)0xe9c74586, (q31_t)0x7e0d54dc, (q31_t)0xe9c1157a,
+  (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e0b2528, (q31_t)0xe9b4b58d, (q31_t)0x7e0a0cd9, (q31_t)0xe9ae85ab, (q31_t)0x7e08f43d, (q31_t)0xe9a855d7,
+  (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e06c21a, (q31_t)0xe99bf658, (q31_t)0x7e05a894, (q31_t)0xe995c6ad, (q31_t)0x7e048ec1, (q31_t)0xe98f9710,
+  (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7e025a31, (q31_t)0xe98337ff, (q31_t)0x7e013f74, (q31_t)0xe97d088c, (q31_t)0x7e00246a, (q31_t)0xe976d926,
+  (q31_t)0x7dff0911, (q31_t)0xe970a9ce, (q31_t)0x7dfded6c, (q31_t)0xe96a7a85, (q31_t)0x7dfcd178, (q31_t)0xe9644b49, (q31_t)0x7dfbb537, (q31_t)0xe95e1c1b,
+  (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df97bcb, (q31_t)0xe951bde9, (q31_t)0x7df85ea0, (q31_t)0xe94b8ee5, (q31_t)0x7df74128, (q31_t)0xe9455fef,
+  (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df5054f, (q31_t)0xe939022d, (q31_t)0x7df3e6ee, (q31_t)0xe932d361, (q31_t)0x7df2c83f, (q31_t)0xe92ca4a4,
+  (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7df089f8, (q31_t)0xe9204752, (q31_t)0x7def6a60, (q31_t)0xe91a18bf, (q31_t)0x7dee4a7a, (q31_t)0xe913ea39,
+  (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2, (q31_t)0x7dec09c6, (q31_t)0xe9078d59, (q31_t)0x7deae8f7, (q31_t)0xe9015efe, (q31_t)0x7de9c7da, (q31_t)0xe8fb30b1,
+  (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de784b9, (q31_t)0xe8eed443, (q31_t)0x7de662b3, (q31_t)0xe8e8a621, (q31_t)0x7de54060, (q31_t)0xe8e2780d,
+  (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7de2fad1, (q31_t)0xe8d61c10, (q31_t)0x7de1d795, (q31_t)0xe8cfee27, (q31_t)0x7de0b40b, (q31_t)0xe8c9c04c,
+  (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7dde6c0f, (q31_t)0xe8bd64c2, (q31_t)0x7ddd479d, (q31_t)0xe8b73712, (q31_t)0x7ddc22dc, (q31_t)0xe8b10971,
+  (q31_t)0x7ddafdce, (q31_t)0xe8aadbde, (q31_t)0x7dd9d873, (q31_t)0xe8a4ae59, (q31_t)0x7dd8b2ca, (q31_t)0xe89e80e3, (q31_t)0x7dd78cd3, (q31_t)0xe898537b,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd53ffc, (q31_t)0xe88bf8d7, (q31_t)0x7dd4191d, (q31_t)0xe885cb9a, (q31_t)0x7dd2f1f0, (q31_t)0xe87f9e6c,
+  (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dd0a2ac, (q31_t)0xe873443c, (q31_t)0x7dcf7a96, (q31_t)0xe86d173a, (q31_t)0x7dce5232, (q31_t)0xe866ea46,
+  (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dcc0082, (q31_t)0xe85a908a, (q31_t)0x7dcad736, (q31_t)0xe85463c2, (q31_t)0x7dc9ad9c, (q31_t)0xe84e3708,
+  (q31_t)0x7dc883b4, (q31_t)0xe8480a5d, (q31_t)0x7dc7597f, (q31_t)0xe841ddc1, (q31_t)0x7dc62efc, (q31_t)0xe83bb133, (q31_t)0x7dc5042b, (q31_t)0xe83584b4,
+  (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dc2ada2, (q31_t)0xe8292be3, (q31_t)0x7dc181e8, (q31_t)0xe822ff90, (q31_t)0x7dc055e2, (q31_t)0xe81cd34b,
+  (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dbdfceb, (q31_t)0xe8107aef, (q31_t)0x7dbccffc, (q31_t)0xe80a4ed7, (q31_t)0x7dbba2bf, (q31_t)0xe80422ce,
+  (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db9475c, (q31_t)0xe7f7cae8, (q31_t)0x7db81936, (q31_t)0xe7f19f0c, (q31_t)0x7db6eac3, (q31_t)0xe7eb733e,
+  (q31_t)0x7db5bc02, (q31_t)0xe7e5477f, (q31_t)0x7db48cf4, (q31_t)0xe7df1bcf, (q31_t)0x7db35d98, (q31_t)0xe7d8f02d, (q31_t)0x7db22def, (q31_t)0xe7d2c49b,
+  (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dafcdb3, (q31_t)0xe7c66da3, (q31_t)0x7dae9d21, (q31_t)0xe7c0423d, (q31_t)0x7dad6c42, (q31_t)0xe7ba16e7,
+  (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f, (q31_t)0x7dab099a, (q31_t)0xe7adc066, (q31_t)0x7da9d7d2, (q31_t)0xe7a7953d, (q31_t)0x7da8a5bc, (q31_t)0xe7a16a22,
+  (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da640a9, (q31_t)0xe795141a, (q31_t)0x7da50dab, (q31_t)0xe78ee92c, (q31_t)0x7da3da5f, (q31_t)0xe788be4e,
+  (q31_t)0x7da2a6c6, (q31_t)0xe782937e, (q31_t)0x7da172df, (q31_t)0xe77c68be, (q31_t)0x7da03eab, (q31_t)0xe7763e0d, (q31_t)0x7d9f0a29, (q31_t)0xe770136b,
+  (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d9ca03e, (q31_t)0xe763be55, (q31_t)0x7d9b6ad3, (q31_t)0xe75d93e0, (q31_t)0x7d9a351c, (q31_t)0xe757697b,
+  (q31_t)0x7d98ff17, (q31_t)0xe7513f25, (q31_t)0x7d97c8c4, (q31_t)0xe74b14de, (q31_t)0x7d969224, (q31_t)0xe744eaa6, (q31_t)0x7d955b37, (q31_t)0xe73ec07e,
+  (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d92ec73, (q31_t)0xe7326c5b, (q31_t)0x7d91b49e, (q31_t)0xe72c4260, (q31_t)0x7d907c7a, (q31_t)0xe7261875,
+  (q31_t)0x7d8f4409, (q31_t)0xe71fee99, (q31_t)0x7d8e0b4b, (q31_t)0xe719c4cd, (q31_t)0x7d8cd240, (q31_t)0xe7139b10, (q31_t)0x7d8b98e6, (q31_t)0xe70d7162,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d89254c, (q31_t)0xe7011e35, (q31_t)0x7d87eb0a, (q31_t)0xe6faf4b5, (q31_t)0x7d86b07c, (q31_t)0xe6f4cb45,
+  (q31_t)0x7d85759f, (q31_t)0xe6eea1e4, (q31_t)0x7d843a76, (q31_t)0xe6e87893, (q31_t)0x7d82fefe, (q31_t)0xe6e24f51, (q31_t)0x7d81c33a, (q31_t)0xe6dc261f,
+  (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7f4ac8, (q31_t)0xe6cfd3e9, (q31_t)0x7d7e0e1c, (q31_t)0xe6c9aae5, (q31_t)0x7d7cd121, (q31_t)0xe6c381f1,
+  (q31_t)0x7d7b93da, (q31_t)0xe6bd590d, (q31_t)0x7d7a5645, (q31_t)0xe6b73038, (q31_t)0x7d791862, (q31_t)0xe6b10772, (q31_t)0x7d77da32, (q31_t)0xe6aadebc,
+  (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d755cea, (q31_t)0xe69e8d80, (q31_t)0x7d741dd2, (q31_t)0xe69864f9, (q31_t)0x7d72de6d, (q31_t)0xe6923c82,
+  (q31_t)0x7d719eba, (q31_t)0xe68c141a, (q31_t)0x7d705eba, (q31_t)0xe685ebc2, (q31_t)0x7d6f1e6c, (q31_t)0xe67fc37a, (q31_t)0x7d6dddd2, (q31_t)0xe6799b42,
+  (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d6b5bb4, (q31_t)0xe66d4b01, (q31_t)0x7d6a1a31, (q31_t)0xe66722f7, (q31_t)0x7d68d860, (q31_t)0xe660fafe,
+  (q31_t)0x7d679642, (q31_t)0xe65ad315, (q31_t)0x7d6653d7, (q31_t)0xe654ab3b, (q31_t)0x7d65111f, (q31_t)0xe64e8371, (q31_t)0x7d63ce19, (q31_t)0xe6485bb7,
+  (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d614725, (q31_t)0xe63c0c73, (q31_t)0x7d600338, (q31_t)0xe635e4e9, (q31_t)0x7d5ebefc, (q31_t)0xe62fbd6e,
+  (q31_t)0x7d5d7a74, (q31_t)0xe6299604, (q31_t)0x7d5c359e, (q31_t)0xe6236ea9, (q31_t)0x7d5af07b, (q31_t)0xe61d475e, (q31_t)0x7d59ab0a, (q31_t)0xe6172024,
+  (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d571f41, (q31_t)0xe60ad1de, (q31_t)0x7d55d8e9, (q31_t)0xe604aad4, (q31_t)0x7d549243, (q31_t)0xe5fe83d9,
+  (q31_t)0x7d534b50, (q31_t)0xe5f85cef, (q31_t)0x7d520410, (q31_t)0xe5f23614, (q31_t)0x7d50bc82, (q31_t)0xe5ec0f4a, (q31_t)0x7d4f74a7, (q31_t)0xe5e5e88f,
+  (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4ce409, (q31_t)0xe5d99b4b, (q31_t)0x7d4b9b46, (q31_t)0xe5d374c1, (q31_t)0x7d4a5236, (q31_t)0xe5cd4e47,
+  (q31_t)0x7d4908d9, (q31_t)0xe5c727dd, (q31_t)0x7d47bf2e, (q31_t)0xe5c10184, (q31_t)0x7d467536, (q31_t)0xe5badb3a, (q31_t)0x7d452af1, (q31_t)0xe5b4b501,
+  (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d42957e, (q31_t)0xe5a868bf, (q31_t)0x7d414a51, (q31_t)0xe5a242b7, (q31_t)0x7d3ffed7, (q31_t)0xe59c1cbf,
+  (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7, (q31_t)0x7d3d66fa, (q31_t)0xe58fd0ff, (q31_t)0x7d3c1a98, (q31_t)0xe589ab38, (q31_t)0x7d3acde9, (q31_t)0xe5838581,
+  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3833a2, (q31_t)0xe5773a44, (q31_t)0x7d36e60b, (q31_t)0xe57114be, (q31_t)0x7d359827, (q31_t)0xe56aef49,
+  (q31_t)0x7d3449f5, (q31_t)0xe564c9e3, (q31_t)0x7d32fb76, (q31_t)0xe55ea48f, (q31_t)0x7d31acaa, (q31_t)0xe5587f4a, (q31_t)0x7d305d91, (q31_t)0xe5525a17,
+  (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d2dbe77, (q31_t)0xe5460fe0, (q31_t)0x7d2c6e76, (q31_t)0xe53feade, (q31_t)0x7d2b1e28, (q31_t)0xe539c5ec,
+  (q31_t)0x7d29cd8c, (q31_t)0xe533a10a, (q31_t)0x7d287ca4, (q31_t)0xe52d7c39, (q31_t)0x7d272b6e, (q31_t)0xe5275779, (q31_t)0x7d25d9eb, (q31_t)0xe52132c9,
+  (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d2335fe, (q31_t)0xe514e99b, (q31_t)0x7d21e393, (q31_t)0xe50ec51d, (q31_t)0x7d2090db, (q31_t)0xe508a0b0,
+  (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53, (q31_t)0x7d1dea84, (q31_t)0xe4fc5807, (q31_t)0x7d1c96e5, (q31_t)0xe4f633cc, (q31_t)0x7d1b42f9, (q31_t)0xe4f00fa1,
+  (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d189a38, (q31_t)0xe4e3c77d, (q31_t)0x7d174564, (q31_t)0xe4dda385, (q31_t)0x7d15f043, (q31_t)0xe4d77f9d,
+  (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6, (q31_t)0x7d134519, (q31_t)0xe4cb37ff, (q31_t)0x7d11ef11, (q31_t)0xe4c5144a, (q31_t)0x7d1098bb, (q31_t)0xe4bef0a5,
+  (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d0deb28, (q31_t)0xe4b2a98e, (q31_t)0x7d0c93eb, (q31_t)0xe4ac861b, (q31_t)0x7d0b3c60, (q31_t)0xe4a662ba,
+  (q31_t)0x7d09e489, (q31_t)0xe4a03f69, (q31_t)0x7d088c64, (q31_t)0xe49a1c29, (q31_t)0x7d0733f3, (q31_t)0xe493f8fb, (q31_t)0x7d05db34, (q31_t)0xe48dd5dd,
+  (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7d0328cf, (q31_t)0xe4818fd4, (q31_t)0x7d01cf29, (q31_t)0xe47b6ce9, (q31_t)0x7d007535, (q31_t)0xe4754a0e,
+  (q31_t)0x7cff1af5, (q31_t)0xe46f2745, (q31_t)0x7cfdc068, (q31_t)0xe469048d, (q31_t)0x7cfc658d, (q31_t)0xe462e1e6, (q31_t)0x7cfb0a65, (q31_t)0xe45cbf50,
+  (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf8532f, (q31_t)0xe4507a57, (q31_t)0x7cf6f720, (q31_t)0xe44a57f4, (q31_t)0x7cf59ac4, (q31_t)0xe44435a2,
+  (q31_t)0x7cf43e1a, (q31_t)0xe43e1362, (q31_t)0x7cf2e124, (q31_t)0xe437f132, (q31_t)0x7cf183e1, (q31_t)0xe431cf14, (q31_t)0x7cf02651, (q31_t)0xe42bad07,
+  (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ced6a49, (q31_t)0xe41f6920, (q31_t)0x7cec0bd1, (q31_t)0xe4194746, (q31_t)0x7ceaad0c, (q31_t)0xe413257d,
+  (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6, (q31_t)0x7ce7ee9c, (q31_t)0xe406e220, (q31_t)0x7ce68ef0, (q31_t)0xe400c08b, (q31_t)0x7ce52ef7, (q31_t)0xe3fa9f08,
+  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ce26e1f, (q31_t)0xe3ee5c35, (q31_t)0x7ce10d3f, (q31_t)0xe3e83ae5, (q31_t)0x7cdfac12, (q31_t)0xe3e219a7,
+  (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a, (q31_t)0x7cdce8d1, (q31_t)0xe3d5d75e, (q31_t)0x7cdb86bd, (q31_t)0xe3cfb654, (q31_t)0x7cda245c, (q31_t)0xe3c9955b,
+  (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd75eb3, (q31_t)0xe3bd539e, (q31_t)0x7cd5fb6a, (q31_t)0xe3b732d9, (q31_t)0x7cd497d5, (q31_t)0xe3b11226,
+  (q31_t)0x7cd333f3, (q31_t)0xe3aaf184, (q31_t)0x7cd1cfc4, (q31_t)0xe3a4d0f4, (q31_t)0x7cd06b48, (q31_t)0xe39eb075, (q31_t)0x7ccf067f, (q31_t)0xe3989008,
+  (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7ccc3c06, (q31_t)0xe38c4f63, (q31_t)0x7ccad656, (q31_t)0xe3862f2a, (q31_t)0x7cc97059, (q31_t)0xe3800f03,
+  (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc6a378, (q31_t)0xe373ceea, (q31_t)0x7cc53c94, (q31_t)0xe36daef7, (q31_t)0x7cc3d563, (q31_t)0xe3678f17,
+  (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cc1061a, (q31_t)0xe35b4f8b, (q31_t)0x7cbf9e03, (q31_t)0xe3552fdf, (q31_t)0x7cbe359e, (q31_t)0xe34f1045,
+  (q31_t)0x7cbcccec, (q31_t)0xe348f0bd, (q31_t)0x7cbb63ee, (q31_t)0xe342d146, (q31_t)0x7cb9faa2, (q31_t)0xe33cb1e1, (q31_t)0x7cb8910a, (q31_t)0xe336928e,
+  (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb5bcf2, (q31_t)0xe32a541d, (q31_t)0x7cb45272, (q31_t)0xe3243500, (q31_t)0x7cb2e7a6, (q31_t)0xe31e15f4,
+  (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa, (q31_t)0x7cb01127, (q31_t)0xe311d811, (q31_t)0x7caea574, (q31_t)0xe30bb93b, (q31_t)0x7cad3974, (q31_t)0xe3059a76,
+  (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7caa608e, (q31_t)0xe2f95d23, (q31_t)0x7ca8f3a7, (q31_t)0xe2f33e94, (q31_t)0x7ca78674, (q31_t)0xe2ed2017,
+  (q31_t)0x7ca618f3, (q31_t)0xe2e701ac, (q31_t)0x7ca4ab26, (q31_t)0xe2e0e352, (q31_t)0x7ca33d0c, (q31_t)0xe2dac50b, (q31_t)0x7ca1cea5, (q31_t)0xe2d4a6d6,
+  (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9ef0f0, (q31_t)0xe2c86aa2, (q31_t)0x7c9d81a3, (q31_t)0xe2c24ca2, (q31_t)0x7c9c1208, (q31_t)0xe2bc2eb5,
+  (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c9931ec, (q31_t)0xe2aff311, (q31_t)0x7c97c16b, (q31_t)0xe2a9d55a, (q31_t)0x7c96509d, (q31_t)0xe2a3b7b5,
+  (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c936e1b, (q31_t)0xe2977ca2, (q31_t)0x7c91fc66, (q31_t)0xe2915f34, (q31_t)0x7c908a65, (q31_t)0xe28b41d7,
+  (q31_t)0x7c8f1817, (q31_t)0xe285248d, (q31_t)0x7c8da57c, (q31_t)0xe27f0755, (q31_t)0x7c8c3294, (q31_t)0xe278ea30, (q31_t)0x7c8abf5f, (q31_t)0xe272cd1c,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c87d810, (q31_t)0xe266932c, (q31_t)0x7c8663f4, (q31_t)0xe260764f, (q31_t)0x7c84ef8c, (q31_t)0xe25a5984,
+  (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c8205d6, (q31_t)0xe24e2026, (q31_t)0x7c809088, (q31_t)0xe2480393, (q31_t)0x7c7f1aed, (q31_t)0xe241e711,
+  (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c7c2ed0, (q31_t)0xe235ae46, (q31_t)0x7c7ab84e, (q31_t)0xe22f91fc, (q31_t)0x7c794180, (q31_t)0xe22975c4,
+  (q31_t)0x7c77ca65, (q31_t)0xe223599e, (q31_t)0x7c7652fd, (q31_t)0xe21d3d8b, (q31_t)0x7c74db48, (q31_t)0xe217218b, (q31_t)0x7c736347, (q31_t)0xe211059d,
+  (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c70725e, (q31_t)0xe204cdf8, (q31_t)0x7c6ef976, (q31_t)0xe1feb241, (q31_t)0x7c6d8041, (q31_t)0xe1f8969d,
+  (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c6a8cf2, (q31_t)0xe1ec5f8c, (q31_t)0x7c6912d7, (q31_t)0xe1e64420, (q31_t)0x7c679870, (q31_t)0xe1e028c6,
+  (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c64a2bb, (q31_t)0xe1d3f24a, (q31_t)0x7c63276d, (q31_t)0xe1cdd727, (q31_t)0x7c61abd3, (q31_t)0xe1c7bc18,
+  (q31_t)0x7c602fec, (q31_t)0xe1c1a11b, (q31_t)0x7c5eb3b8, (q31_t)0xe1bb8631, (q31_t)0x7c5d3737, (q31_t)0xe1b56b59, (q31_t)0x7c5bba6a, (q31_t)0xe1af5094,
+  (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c58bfe9, (q31_t)0xe1a31b42, (q31_t)0x7c574236, (q31_t)0xe19d00b6, (q31_t)0x7c55c436, (q31_t)0xe196e63c,
+  (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c52c74f, (q31_t)0xe18ab180, (q31_t)0x7c514869, (q31_t)0xe184973e, (q31_t)0x7c4fc936, (q31_t)0xe17e7d0f,
+  (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4cc9ea, (q31_t)0xe17248ea, (q31_t)0x7c4b49d2, (q31_t)0xe16c2ef4, (q31_t)0x7c49c96c, (q31_t)0xe1661510,
+  (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f, (q31_t)0x7c46c7bb, (q31_t)0xe159e182, (q31_t)0x7c45466f, (q31_t)0xe153c7d7, (q31_t)0x7c43c4d7, (q31_t)0xe14dae3f,
+  (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c40c0c1, (q31_t)0xe1417b48, (q31_t)0x7c3f3e42, (q31_t)0xe13b61e9, (q31_t)0x7c3dbb78, (q31_t)0xe135489d,
+  (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c3ab4fc, (q31_t)0xe129163d, (q31_t)0x7c39314b, (q31_t)0xe122fd2a, (q31_t)0x7c37ad4e, (q31_t)0xe11ce42a,
+  (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c34a46d, (q31_t)0xe110b263, (q31_t)0x7c331f8a, (q31_t)0xe10a999c, (q31_t)0x7c319a5a, (q31_t)0xe10480e9,
+  (q31_t)0x7c3014de, (q31_t)0xe0fe6848, (q31_t)0x7c2e8f15, (q31_t)0xe0f84fbb, (q31_t)0x7c2d08ff, (q31_t)0xe0f23740, (q31_t)0x7c2b829d, (q31_t)0xe0ec1ed9,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c2874f3, (q31_t)0xe0dfee44, (q31_t)0x7c26edab, (q31_t)0xe0d9d616, (q31_t)0x7c256616, (q31_t)0xe0d3bdfc,
+  (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c225607, (q31_t)0xe0c78e01, (q31_t)0x7c20cd8d, (q31_t)0xe0c17620, (q31_t)0x7c1f44c6, (q31_t)0xe0bb5e53,
+  (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c1c3253, (q31_t)0xe0af2ef2, (q31_t)0x7c1aa8a6, (q31_t)0xe0a9175e, (q31_t)0x7c191ead, (q31_t)0xe0a2ffde,
+  (q31_t)0x7c179467, (q31_t)0xe09ce871, (q31_t)0x7c1609d5, (q31_t)0xe096d117, (q31_t)0x7c147ef6, (q31_t)0xe090b9d1, (q31_t)0x7c12f3cb, (q31_t)0xe08aa29f,
+  (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0fdc8f, (q31_t)0xe07e7473, (q31_t)0x7c0e507e, (q31_t)0xe0785d7b, (q31_t)0x7c0cc421, (q31_t)0xe0724696,
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+  (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7c0373a9, (q31_t)0xe04dbed1, (q31_t)0x7c01e534, (q31_t)0xe047a875, (q31_t)0x7c005673, (q31_t)0xe041922c,
+  (q31_t)0x7bfec765, (q31_t)0xe03b7bf6, (q31_t)0x7bfd380a, (q31_t)0xe03565d5, (q31_t)0x7bfba863, (q31_t)0xe02f4fc6, (q31_t)0x7bfa1870, (q31_t)0xe02939cc,
+  (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf6f7a4, (q31_t)0xe01d0e12, (q31_t)0x7bf566cb, (q31_t)0xe016f852, (q31_t)0x7bf3d5a6, (q31_t)0xe010e2a7,
+  (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bf0b276, (q31_t)0xe004b78a, (q31_t)0x7bef206b, (q31_t)0xdffea219, (q31_t)0x7bed8e14, (q31_t)0xdff88cbc,
+  (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7bea6880, (q31_t)0xdfec623e, (q31_t)0x7be8d544, (q31_t)0xdfe64d1c, (q31_t)0x7be741bb, (q31_t)0xdfe0380e,
+  (q31_t)0x7be5ade6, (q31_t)0xdfda2314, (q31_t)0x7be419c4, (q31_t)0xdfd40e2e, (q31_t)0x7be28556, (q31_t)0xdfcdf95c, (q31_t)0x7be0f09b, (q31_t)0xdfc7e49d,
+  (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bddc641, (q31_t)0xdfbbbb5c, (q31_t)0x7bdc30a1, (q31_t)0xdfb5a6d9, (q31_t)0x7bda9ab5, (q31_t)0xdfaf926a,
+  (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd76df7, (q31_t)0xdfa369c8, (q31_t)0x7bd5d726, (q31_t)0xdf9d5595, (q31_t)0x7bd44008, (q31_t)0xdf974176,
+  (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bd110e8, (q31_t)0xdf8b1974, (q31_t)0x7bcf78e5, (q31_t)0xdf850591, (q31_t)0x7bcde095, (q31_t)0xdf7ef1c2,
+  (q31_t)0x7bcc47fa, (q31_t)0xdf78de07, (q31_t)0x7bcaaf12, (q31_t)0xdf72ca60, (q31_t)0x7bc915dd, (q31_t)0xdf6cb6cd, (q31_t)0x7bc77c5d, (q31_t)0xdf66a34e,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bc44876, (q31_t)0xdf5a7c8d, (q31_t)0x7bc2ae10, (q31_t)0xdf54694b, (q31_t)0x7bc1135e, (q31_t)0xdf4e561c,
+  (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bbddd15, (q31_t)0xdf422ffd, (q31_t)0x7bbc417e, (q31_t)0xdf3c1d0b, (q31_t)0x7bbaa59a, (q31_t)0xdf360a2d,
+  (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb76cef, (q31_t)0xdf29e4af, (q31_t)0x7bb5d026, (q31_t)0xdf23d20e, (q31_t)0x7bb43311, (q31_t)0xdf1dbf82,
+  (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a, (q31_t)0x7bb0f803, (q31_t)0xdf119aa6, (q31_t)0x7baf5a09, (q31_t)0xdf0b8856, (q31_t)0x7badbbc3, (q31_t)0xdf05761b,
+  (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7baa7e53, (q31_t)0xdef951e2, (q31_t)0x7ba8df28, (q31_t)0xdef33fe3, (q31_t)0x7ba73fb1, (q31_t)0xdeed2dfa,
+  (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7ba3ffde, (q31_t)0xdee10a63, (q31_t)0x7ba25f82, (q31_t)0xdedaf8b7, (q31_t)0x7ba0beda, (q31_t)0xded4e71f,
+  (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b9d7ca5, (q31_t)0xdec8c42c, (q31_t)0x7b9bdb18, (q31_t)0xdec2b2d1, (q31_t)0x7b9a393f, (q31_t)0xdebca18b,
+  (q31_t)0x7b989719, (q31_t)0xdeb69059, (q31_t)0x7b96f4a8, (q31_t)0xdeb07f3c, (q31_t)0x7b9551ea, (q31_t)0xdeaa6e34, (q31_t)0x7b93aee0, (q31_t)0xdea45d40,
+  (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b9067e7, (q31_t)0xde983b95, (q31_t)0x7b8ec3f8, (q31_t)0xde922adf, (q31_t)0x7b8d1fbd, (q31_t)0xde8c1a3e,
+  (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b89d662, (q31_t)0xde7ff938, (q31_t)0x7b883143, (q31_t)0xde79e8d5, (q31_t)0x7b868bd7, (q31_t)0xde73d886,
+  (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b83401b, (q31_t)0xde67b826, (q31_t)0x7b8199ca, (q31_t)0xde61a815, (q31_t)0x7b7ff32e, (q31_t)0xde5b9819,
+  (q31_t)0x7b7e4c45, (q31_t)0xde558831, (q31_t)0x7b7ca510, (q31_t)0xde4f785f, (q31_t)0x7b7afd8f, (q31_t)0xde4968a1, (q31_t)0x7b7955c2, (q31_t)0xde4358f8,
+  (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b760542, (q31_t)0xde3739e4, (q31_t)0x7b745c91, (q31_t)0xde312a7a, (q31_t)0x7b72b393, (q31_t)0xde2b1b24,
+  (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6f60b2, (q31_t)0xde1efcb7, (q31_t)0x7b6db6d0, (q31_t)0xde18eda0, (q31_t)0x7b6c0ca2, (q31_t)0xde12de9e,
+  (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b68b760, (q31_t)0xde06c0d9, (q31_t)0x7b670c4d, (q31_t)0xde00b216, (q31_t)0x7b6560ee, (q31_t)0xddfaa367,
+  (q31_t)0x7b63b543, (q31_t)0xddf494ce, (q31_t)0x7b62094c, (q31_t)0xddee8649, (q31_t)0x7b605d09, (q31_t)0xdde877da, (q31_t)0x7b5eb079, (q31_t)0xdde26980,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b5b5676, (q31_t)0xddd64d0a, (q31_t)0x7b59a902, (q31_t)0xddd03eef, (q31_t)0x7b57fb42, (q31_t)0xddca30e9,
+  (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b549ede, (q31_t)0xddbe151d, (q31_t)0x7b52f03a, (q31_t)0xddb80756, (q31_t)0x7b51414a, (q31_t)0xddb1f9a4,
+  (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b4de286, (q31_t)0xdda5de81, (q31_t)0x7b4c32b1, (q31_t)0xdd9fd10f, (q31_t)0x7b4a8291, (q31_t)0xdd99c3b2,
+  (q31_t)0x7b48d225, (q31_t)0xdd93b66a, (q31_t)0x7b47216c, (q31_t)0xdd8da938, (q31_t)0x7b457068, (q31_t)0xdd879c1b, (q31_t)0x7b43bf17, (q31_t)0xdd818f13,
+  (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b405b92, (q31_t)0xdd757543, (q31_t)0x7b3ea95d, (q31_t)0xdd6f687b, (q31_t)0x7b3cf6dc, (q31_t)0xdd695bc9,
+  (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3990f7, (q31_t)0xdd5d42a3, (q31_t)0x7b37dd92, (q31_t)0xdd573631, (q31_t)0x7b3629e1, (q31_t)0xdd5129d4,
+  (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b32c19c, (q31_t)0xdd451159, (q31_t)0x7b310d07, (q31_t)0xdd3f053c, (q31_t)0x7b2f5826, (q31_t)0xdd38f935,
+  (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43, (q31_t)0x7b2bed81, (q31_t)0xdd2ce166, (q31_t)0x7b2a37bc, (q31_t)0xdd26d59f, (q31_t)0x7b2881ac, (q31_t)0xdd20c9ed,
+  (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b2514a6, (q31_t)0xdd14b2ca, (q31_t)0x7b235db2, (q31_t)0xdd0ea759, (q31_t)0x7b21a671, (q31_t)0xdd089bfe,
+  (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b1e370d, (q31_t)0xdcfc8588, (q31_t)0x7b1c7ee8, (q31_t)0xdcf67a6d, (q31_t)0x7b1ac678, (q31_t)0xdcf06f68,
+  (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1754b3, (q31_t)0xdce4599e, (q31_t)0x7b159b5f, (q31_t)0xdcde4eda, (q31_t)0x7b13e1bf, (q31_t)0xdcd8442b,
+  (q31_t)0x7b1227d3, (q31_t)0xdcd23993, (q31_t)0x7b106d9b, (q31_t)0xdccc2f0f, (q31_t)0x7b0eb318, (q31_t)0xdcc624a2, (q31_t)0x7b0cf848, (q31_t)0xdcc01a4a,
+  (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b0981c5, (q31_t)0xdcb405dc, (q31_t)0x7b07c612, (q31_t)0xdcadfbc5, (q31_t)0x7b060a12, (q31_t)0xdca7f1c5,
+  (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7b029130, (q31_t)0xdc9bde05, (q31_t)0x7b00d44d, (q31_t)0xdc95d446, (q31_t)0x7aff171e, (q31_t)0xdc8fca9c,
+  (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7afb9bdd, (q31_t)0xdc83b78b, (q31_t)0x7af9ddcb, (q31_t)0xdc7dae23, (q31_t)0x7af81f6c, (q31_t)0xdc77a4d2,
+  (q31_t)0x7af660c2, (q31_t)0xdc719b96, (q31_t)0x7af4a1cc, (q31_t)0xdc6b9270, (q31_t)0x7af2e28b, (q31_t)0xdc658960, (q31_t)0x7af122fd, (q31_t)0xdc5f8066,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7aeda2fe, (q31_t)0xdc536eb3, (q31_t)0x7aebe28d, (q31_t)0xdc4d65fb, (q31_t)0x7aea21d0, (q31_t)0xdc475d59,
+  (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae69f73, (q31_t)0xdc3b4c57, (q31_t)0x7ae4ddd2, (q31_t)0xdc3543f7, (q31_t)0x7ae31be6, (q31_t)0xdc2f3bad,
+  (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7adf972a, (q31_t)0xdc232b5c, (q31_t)0x7addd45b, (q31_t)0xdc1d2354, (q31_t)0x7adc113f, (q31_t)0xdc171b63,
+  (q31_t)0x7ada4dd8, (q31_t)0xdc111388, (q31_t)0x7ad88a25, (q31_t)0xdc0b0bc2, (q31_t)0x7ad6c626, (q31_t)0xdc050414, (q31_t)0x7ad501dc, (q31_t)0xdbfefc7b,
+  (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ad17863, (q31_t)0xdbf2ed8c, (q31_t)0x7acfb336, (q31_t)0xdbece636, (q31_t)0x7acdedbc, (q31_t)0xdbe6def6,
+  (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7aca61e6, (q31_t)0xdbdad0b9, (q31_t)0x7ac89b89, (q31_t)0xdbd4c9bc, (q31_t)0x7ac6d4e0, (q31_t)0xdbcec2d6,
+  (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7ac346ac, (q31_t)0xdbc2b54c, (q31_t)0x7ac17f20, (q31_t)0xdbbcaea8, (q31_t)0x7abfb749, (q31_t)0xdbb6a81b,
+  (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4, (q31_t)0x7abc26b7, (q31_t)0xdbaa9b43, (q31_t)0x7aba5dfc, (q31_t)0xdba494f9, (q31_t)0x7ab894f6, (q31_t)0xdb9e8ec6,
+  (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7ab50206, (q31_t)0xdb9282a2, (q31_t)0x7ab3381d, (q31_t)0xdb8c7cb1, (q31_t)0x7ab16de7, (q31_t)0xdb8676d8,
+  (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aadd89a, (q31_t)0xdb7a6b68, (q31_t)0x7aac0d82, (q31_t)0xdb7465d1, (q31_t)0x7aaa421e, (q31_t)0xdb6e6052,
+  (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa6aa74, (q31_t)0xdb625596, (q31_t)0x7aa4de2d, (q31_t)0xdb5c505a, (q31_t)0x7aa3119a, (q31_t)0xdb564b35,
+  (q31_t)0x7aa144bc, (q31_t)0xdb504626, (q31_t)0x7a9f7793, (q31_t)0xdb4a412e, (q31_t)0x7a9daa1d, (q31_t)0xdb443c4c, (q31_t)0x7a9bdc5c, (q31_t)0xdb3e3781,
+  (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a983ff7, (q31_t)0xdb322e30, (q31_t)0x7a967153, (q31_t)0xdb2c29a9, (q31_t)0x7a94a264, (q31_t)0xdb262539,
+  (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a9103a2, (q31_t)0xdb1a1c9d, (q31_t)0x7a8f33d0, (q31_t)0xdb141871, (q31_t)0x7a8d63b2, (q31_t)0xdb0e145c,
+  (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a89c293, (q31_t)0xdb020c77, (q31_t)0x7a87f192, (q31_t)0xdafc08a6, (q31_t)0x7a862046, (q31_t)0xdaf604ec,
+  (q31_t)0x7a844eae, (q31_t)0xdaf00149, (q31_t)0x7a827ccb, (q31_t)0xdae9fdbd, (q31_t)0x7a80aa9c, (q31_t)0xdae3fa48, (q31_t)0x7a7ed821, (q31_t)0xdaddf6ea,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a7b3249, (q31_t)0xdad1f072, (q31_t)0x7a795eec, (q31_t)0xdacbed58, (q31_t)0x7a778b43, (q31_t)0xdac5ea56,
+  (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a73e30f, (q31_t)0xdab9e495, (q31_t)0x7a720e84, (q31_t)0xdab3e1d8, (q31_t)0x7a7039ad, (q31_t)0xdaaddf31,
+  (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a6c8f1c, (q31_t)0xdaa1da29, (q31_t)0x7a6ab963, (q31_t)0xda9bd7c7, (q31_t)0x7a68e35e, (q31_t)0xda95d57d,
+  (q31_t)0x7a670d0d, (q31_t)0xda8fd349, (q31_t)0x7a653671, (q31_t)0xda89d12d, (q31_t)0x7a635f8a, (q31_t)0xda83cf28, (q31_t)0x7a618857, (q31_t)0xda7dcd3a,
+  (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a5dd90e, (q31_t)0xda71c9a3, (q31_t)0x7a5c00f9, (q31_t)0xda6bc7fa, (q31_t)0x7a5a2898, (q31_t)0xda65c669,
+  (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a5676f3, (q31_t)0xda59c38c, (q31_t)0x7a549db0, (q31_t)0xda53c240, (q31_t)0x7a52c421, (q31_t)0xda4dc10b,
+  (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a4f1021, (q31_t)0xda41bee8, (q31_t)0x7a4d35b0, (q31_t)0xda3bbdf9, (q31_t)0x7a4b5af3, (q31_t)0xda35bd22,
+  (q31_t)0x7a497feb, (q31_t)0xda2fbc61, (q31_t)0x7a47a498, (q31_t)0xda29bbb9, (q31_t)0x7a45c8f9, (q31_t)0xda23bb27, (q31_t)0x7a43ed0e, (q31_t)0xda1dbaad,
+  (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a403457, (q31_t)0xda11b9ff, (q31_t)0x7a3e578b, (q31_t)0xda0bb9cb, (q31_t)0x7a3c7a73, (q31_t)0xda05b9ae,
+  (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a38bf60, (q31_t)0xd9f9b9bb, (q31_t)0x7a36e166, (q31_t)0xd9f3b9e5, (q31_t)0x7a350321, (q31_t)0xd9edba26,
+  (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a3145b3, (q31_t)0xd9e1baef, (q31_t)0x7a2f668c, (q31_t)0xd9dbbb77, (q31_t)0x7a2d8719, (q31_t)0xd9d5bc16,
+  (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd, (q31_t)0x7a29c750, (q31_t)0xd9c9bd9b, (q31_t)0x7a27e6fb, (q31_t)0xd9c3be81, (q31_t)0x7a26065b, (q31_t)0xd9bdbf7e,
+  (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a224437, (q31_t)0xd9b1c1c0, (q31_t)0x7a2062b5, (q31_t)0xd9abc305, (q31_t)0x7a1e80e7, (q31_t)0xd9a5c461,
+  (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a1abc69, (q31_t)0xd999c75f, (q31_t)0x7a18d9b9, (q31_t)0xd993c902, (q31_t)0x7a16f6be, (q31_t)0xd98dcabd,
+  (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a132fe6, (q31_t)0xd981ce7a, (q31_t)0x7a114c09, (q31_t)0xd97bd07c, (q31_t)0x7a0f67e0, (q31_t)0xd975d295,
+  (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7, (q31_t)0x7a0b9eae, (q31_t)0xd969d710, (q31_t)0x7a09b9a4, (q31_t)0xd963d971, (q31_t)0x7a07d44e, (q31_t)0xd95ddbea,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x7a0408c1, (q31_t)0xd951e123, (q31_t)0x7a02228a, (q31_t)0xd94be3e3, (q31_t)0x7a003c07, (q31_t)0xd945e6bb,
+  (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79fc6e20, (q31_t)0xd939ecb3, (q31_t)0x79fa86bc, (q31_t)0xd933efd3, (q31_t)0x79f89f0c, (q31_t)0xd92df30b,
+  (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79f4cecb, (q31_t)0xd921f9c3, (q31_t)0x79f2e63a, (q31_t)0xd91bfd43, (q31_t)0x79f0fd5d, (q31_t)0xd91600da,
+  (q31_t)0x79ef1436, (q31_t)0xd910048a, (q31_t)0x79ed2ac3, (q31_t)0xd90a0852, (q31_t)0x79eb4105, (q31_t)0xd9040c32, (q31_t)0x79e956fb, (q31_t)0xd8fe1029,
+  (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79e58207, (q31_t)0xd8f21861, (q31_t)0x79e3971c, (q31_t)0xd8ec1ca1, (q31_t)0x79e1abe6, (q31_t)0xd8e620fa,
+  (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79ddd498, (q31_t)0xd8da29f2, (q31_t)0x79dbe880, (q31_t)0xd8d42e93, (q31_t)0x79d9fc1d, (q31_t)0xd8ce334c,
+  (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d62276, (q31_t)0xd8c23d06, (q31_t)0x79d43532, (q31_t)0xd8bc4207, (q31_t)0x79d247a2, (q31_t)0xd8b64720,
+  (q31_t)0x79d059c8, (q31_t)0xd8b04c52, (q31_t)0x79ce6ba2, (q31_t)0xd8aa519c, (q31_t)0x79cc7d31, (q31_t)0xd8a456ff, (q31_t)0x79ca8e75, (q31_t)0xd89e5c79,
+  (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c6b01b, (q31_t)0xd89267b7, (q31_t)0x79c4c07e, (q31_t)0xd88c6d7b, (q31_t)0x79c2d095, (q31_t)0xd8867356,
+  (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79beefe3, (q31_t)0xd87a7f57, (q31_t)0x79bcff19, (q31_t)0xd874857c, (q31_t)0x79bb0e04, (q31_t)0xd86e8bb9,
+  (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b72af9, (q31_t)0xd862987d, (q31_t)0x79b53903, (q31_t)0xd85c9f04, (q31_t)0x79b346c2, (q31_t)0xd856a5a3,
+  (q31_t)0x79b15435, (q31_t)0xd850ac5a, (q31_t)0x79af615e, (q31_t)0xd84ab32a, (q31_t)0x79ad6e3c, (q31_t)0xd844ba13, (q31_t)0x79ab7ace, (q31_t)0xd83ec114,
+  (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a79312, (q31_t)0xd832cf5f, (q31_t)0x79a59ec3, (q31_t)0xd82cd6aa, (q31_t)0x79a3aa29, (q31_t)0xd826de0d,
+  (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x799fc015, (q31_t)0xd81aed1d, (q31_t)0x799dca9a, (q31_t)0xd814f4ca, (q31_t)0x799bd4d4, (q31_t)0xd80efc8f,
+  (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x7997e868, (q31_t)0xd8030c64, (q31_t)0x7995f1c1, (q31_t)0xd7fd1474, (q31_t)0x7993facf, (q31_t)0xd7f71c9c,
+  (q31_t)0x79920392, (q31_t)0xd7f124dd, (q31_t)0x79900c0a, (q31_t)0xd7eb2d37, (q31_t)0x798e1438, (q31_t)0xd7e535a9, (q31_t)0x798c1c1a, (q31_t)0xd7df3e34,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79882afd, (q31_t)0xd7d34f94, (q31_t)0x798631ff, (q31_t)0xd7cd586a, (q31_t)0x798438b5, (q31_t)0xd7c76158,
+  (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x79804541, (q31_t)0xd7bb737f, (q31_t)0x797e4b16, (q31_t)0xd7b57cb7, (q31_t)0x797c50a1, (q31_t)0xd7af8609,
+  (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x79785ad5, (q31_t)0xd7a398f6, (q31_t)0x79765f7f, (q31_t)0xd79da293, (q31_t)0x797463de, (q31_t)0xd797ac48,
+  (q31_t)0x797267f2, (q31_t)0xd791b616, (q31_t)0x79706bbb, (q31_t)0xd78bbffc, (q31_t)0x796e6f39, (q31_t)0xd785c9fc, (q31_t)0x796c726c, (q31_t)0xd77fd415,
+  (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x796877f1, (q31_t)0xd773e892, (q31_t)0x79667a44, (q31_t)0xd76df2f6, (q31_t)0x79647c4c, (q31_t)0xd767fd72,
+  (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x79607f7a, (q31_t)0xd75c12b7, (q31_t)0x795e80a1, (q31_t)0xd7561d7f, (q31_t)0x795c817d, (q31_t)0xd7502860,
+  (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79588255, (q31_t)0xd7443e6e, (q31_t)0x79568250, (q31_t)0xd73e499a, (q31_t)0x79548201, (q31_t)0xd73854e0,
+  (q31_t)0x79528167, (q31_t)0xd732603f, (q31_t)0x79508082, (q31_t)0xd72c6bb6, (q31_t)0x794e7f52, (q31_t)0xd7267748, (q31_t)0x794c7dd7, (q31_t)0xd72082f2,
+  (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79487a01, (q31_t)0xd7149a92, (q31_t)0x794677a6, (q31_t)0xd70ea688, (q31_t)0x79447500, (q31_t)0xd708b297,
+  (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x79406ed4, (q31_t)0xd6fccb01, (q31_t)0x793e6b4e, (q31_t)0xd6f6d75d, (q31_t)0x793c677d, (q31_t)0xd6f0e3d1,
+  (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79385efa, (q31_t)0xd6e4fd06, (q31_t)0x79365a49, (q31_t)0xd6df09c6, (q31_t)0x7934554d, (q31_t)0xd6d916a0,
+  (q31_t)0x79325006, (q31_t)0xd6d32393, (q31_t)0x79304a74, (q31_t)0xd6cd30a0, (q31_t)0x792e4497, (q31_t)0xd6c73dc6, (q31_t)0x792c3e70, (q31_t)0xd6c14b05,
+  (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79283141, (q31_t)0xd6b565d0, (q31_t)0x79262a3a, (q31_t)0xd6af735c, (q31_t)0x792422e8, (q31_t)0xd6a98101,
+  (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x79201363, (q31_t)0xd69d9c98, (q31_t)0x791e0b31, (q31_t)0xd697aa8a, (q31_t)0x791c02b4, (q31_t)0xd691b895,
+  (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7917f0d9, (q31_t)0xd685d4f9, (q31_t)0x7915e77c, (q31_t)0xd67fe351, (q31_t)0x7913ddd4, (q31_t)0xd679f1c2,
+  (q31_t)0x7911d3e2, (q31_t)0xd674004e, (q31_t)0x790fc9a4, (q31_t)0xd66e0ef2, (q31_t)0x790dbf1d, (q31_t)0xd6681db1, (q31_t)0x790bb44a, (q31_t)0xd6622c89,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x79079dc5, (q31_t)0xd6564a87, (q31_t)0x79059212, (q31_t)0xd65059ac, (q31_t)0x79038615, (q31_t)0xd64a68eb,
+  (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78ff6d3b, (q31_t)0xd63e87b6, (q31_t)0x78fd605d, (q31_t)0xd6389742, (q31_t)0x78fb5336, (q31_t)0xd632a6e8,
+  (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f73806, (q31_t)0xd626c681, (q31_t)0x78f529fe, (q31_t)0xd620d675, (q31_t)0x78f31bac, (q31_t)0xd61ae682,
+  (q31_t)0x78f10d0f, (q31_t)0xd614f6a9, (q31_t)0x78eefe28, (q31_t)0xd60f06ea, (q31_t)0x78eceef6, (q31_t)0xd6091745, (q31_t)0x78eadf79, (q31_t)0xd60327b9,
+  (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e6bfa0, (q31_t)0xd5f748f0, (q31_t)0x78e4af44, (q31_t)0xd5f159b3, (q31_t)0x78e29e9d, (q31_t)0xd5eb6a8f,
+  (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78de7c6f, (q31_t)0xd5df8c96, (q31_t)0x78dc6ae8, (q31_t)0xd5d99dc0, (q31_t)0x78da5917, (q31_t)0xd5d3af04,
+  (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78d63495, (q31_t)0xd5c7d1db, (q31_t)0x78d421e4, (q31_t)0xd5c1e36d, (q31_t)0x78d20ee9, (q31_t)0xd5bbf519,
+  (q31_t)0x78cffba3, (q31_t)0xd5b606e0, (q31_t)0x78cde812, (q31_t)0xd5b018c0, (q31_t)0x78cbd437, (q31_t)0xd5aa2abb, (q31_t)0x78c9c012, (q31_t)0xd5a43cd0,
+  (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78c596e7, (q31_t)0xd5986148, (q31_t)0x78c381e2, (q31_t)0xd59273ab, (q31_t)0x78c16c93, (q31_t)0xd58c8628,
+  (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78bd4114, (q31_t)0xd580ab72, (q31_t)0x78bb2ae5, (q31_t)0xd57abe3d, (q31_t)0x78b9146c, (q31_t)0xd574d124,
+  (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78b4e69a, (q31_t)0xd568f73f, (q31_t)0x78b2cf41, (q31_t)0xd5630a74, (q31_t)0x78b0b79e, (q31_t)0xd55d1dc3,
+  (q31_t)0x78ae9fb0, (q31_t)0xd557312d, (q31_t)0x78ac8778, (q31_t)0xd55144b0, (q31_t)0x78aa6ef5, (q31_t)0xd54b584f, (q31_t)0x78a85628, (q31_t)0xd5456c07,
+  (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x78a423af, (q31_t)0xd53993c7, (q31_t)0x78a20a03, (q31_t)0xd533a7cf, (q31_t)0x789ff00c, (q31_t)0xd52dbbf1,
+  (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789bbb3f, (q31_t)0xd521e484, (q31_t)0x7899a06a, (q31_t)0xd51bf8f6, (q31_t)0x78978549, (q31_t)0xd5160d82,
+  (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x78934e2a, (q31_t)0xd50a36e9, (q31_t)0x7891322a, (q31_t)0xd5044bc4, (q31_t)0x788f15e0, (q31_t)0xd4fe60ba,
+  (q31_t)0x788cf94c, (q31_t)0xd4f875ca, (q31_t)0x788adc6e, (q31_t)0xd4f28af5, (q31_t)0x7888bf45, (q31_t)0xd4eca03a, (q31_t)0x7886a1d1, (q31_t)0xd4e6b59a,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x7882660c, (q31_t)0xd4dae0aa, (q31_t)0x788047ba, (q31_t)0xd4d4f65a, (q31_t)0x787e291d, (q31_t)0xd4cf0c24,
+  (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x7879eb05, (q31_t)0xd4c33809, (q31_t)0x7877cb89, (q31_t)0xd4bd4e23, (q31_t)0x7875abc3, (q31_t)0xd4b76458,
+  (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x78716b59, (q31_t)0xd4ab9112, (q31_t)0x786f4ab4, (q31_t)0xd4a5a798, (q31_t)0x786d29c5, (q31_t)0xd49fbe37,
+  (q31_t)0x786b088c, (q31_t)0xd499d4f2, (q31_t)0x7868e708, (q31_t)0xd493ebc8, (q31_t)0x7866c53a, (q31_t)0xd48e02b8, (q31_t)0x7864a322, (q31_t)0xd48819c3,
+  (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78605e13, (q31_t)0xd47c4829, (q31_t)0x785e3b1c, (q31_t)0xd4765f85, (q31_t)0x785c17db, (q31_t)0xd47076fb,
+  (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7857d079, (q31_t)0xd464a639, (q31_t)0x7855ac5a, (q31_t)0xd45ebe00, (q31_t)0x785387ef, (q31_t)0xd458d5e2,
+  (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x784f3e3c, (q31_t)0xd44d05f6, (q31_t)0x784d18f4, (q31_t)0xd4471e29, (q31_t)0x784af361, (q31_t)0xd4413677,
+  (q31_t)0x7848cd83, (q31_t)0xd43b4ee0, (q31_t)0x7846a75c, (q31_t)0xd4356763, (q31_t)0x784480ea, (q31_t)0xd42f8002, (q31_t)0x78425a2f, (q31_t)0xd42998bc,
+  (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x783e0bd9, (q31_t)0xd41dca81, (q31_t)0x783be43e, (q31_t)0xd417e38c, (q31_t)0x7839bc5a, (q31_t)0xd411fcb2,
+  (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x78356bb2, (q31_t)0xd4062f4f, (q31_t)0x783342ef, (q31_t)0xd40048c6, (q31_t)0x783119e2, (q31_t)0xd3fa6259,
+  (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x782cc6ea, (q31_t)0xd3ee95cf, (q31_t)0x782a9cfe, (q31_t)0xd3e8afb3, (q31_t)0x782872c8, (q31_t)0xd3e2c9b2,
+  (q31_t)0x78264849, (q31_t)0xd3dce3cd, (q31_t)0x78241d7f, (q31_t)0xd3d6fe03, (q31_t)0x7821f26b, (q31_t)0xd3d11853, (q31_t)0x781fc70d, (q31_t)0xd3cb32c0,
+  (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x781b6f72, (q31_t)0xd3bf67ea, (q31_t)0x78194336, (q31_t)0xd3b982a8, (q31_t)0x781716b0, (q31_t)0xd3b39d81,
+  (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x7812bcc4, (q31_t)0xd3a7d385, (q31_t)0x78108f60, (q31_t)0xd3a1eeb1, (q31_t)0x780e61b1, (q31_t)0xd39c09f7,
+  (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780a0575, (q31_t)0xd39040d7, (q31_t)0x7807d6e9, (q31_t)0xd38a5c70, (q31_t)0x7805a812, (q31_t)0xd3847824,
+  (q31_t)0x780378f1, (q31_t)0xd37e93f4, (q31_t)0x78014986, (q31_t)0xd378afdf, (q31_t)0x77ff19d1, (q31_t)0xd372cbe6, (q31_t)0x77fce9d2, (q31_t)0xd36ce808,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f888f6, (q31_t)0xd361209f, (q31_t)0x77f65819, (q31_t)0xd35b3d13, (q31_t)0x77f426f2, (q31_t)0xd35559a4,
+  (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77efc3c5, (q31_t)0xd3499317, (q31_t)0x77ed91c0, (q31_t)0xd343affa, (q31_t)0x77eb5f71, (q31_t)0xd33dccf8,
+  (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e6f9f6, (q31_t)0xd3320748, (q31_t)0x77e4c6c9, (q31_t)0xd32c2499, (q31_t)0x77e29352, (q31_t)0xd3264206,
+  (q31_t)0x77e05f91, (q31_t)0xd3205f8f, (q31_t)0x77de2b86, (q31_t)0xd31a7d33, (q31_t)0x77dbf732, (q31_t)0xd3149af3, (q31_t)0x77d9c293, (q31_t)0xd30eb8cf,
+  (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77d55878, (q31_t)0xd302f4da, (q31_t)0x77d322fc, (q31_t)0xd2fd1309, (q31_t)0x77d0ed35, (q31_t)0xd2f73154,
+  (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77cc80cb, (q31_t)0xd2eb6e3c, (q31_t)0x77ca4a27, (q31_t)0xd2e58cdb, (q31_t)0x77c81339, (q31_t)0xd2dfab95,
+  (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77c3a47f, (q31_t)0xd2d3e95c, (q31_t)0x77c16cb4, (q31_t)0xd2ce0869, (q31_t)0x77bf349f, (q31_t)0xd2c82793,
+  (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8, (q31_t)0x77bac396, (q31_t)0xd2bc6639, (q31_t)0x77b88aa3, (q31_t)0xd2b685b6, (q31_t)0x77b65166, (q31_t)0xd2b0a54f,
+  (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77b1de0f, (q31_t)0xd2a4e4d5, (q31_t)0x77afa3f5, (q31_t)0xd29f04c2, (q31_t)0x77ad6990, (q31_t)0xd29924cb,
+  (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a8f3ea, (q31_t)0xd28d6531, (q31_t)0x77a6b8a9, (q31_t)0xd287858e, (q31_t)0x77a47d1d, (q31_t)0xd281a607,
+  (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77a00529, (q31_t)0xd275e74d, (q31_t)0x779dc8c0, (q31_t)0xd270081b, (q31_t)0x779b8c0e, (q31_t)0xd26a2904,
+  (q31_t)0x77994f11, (q31_t)0xd2644a0a, (q31_t)0x779711cb, (q31_t)0xd25e6b2b, (q31_t)0x7794d43b, (q31_t)0xd2588c69, (q31_t)0x77929661, (q31_t)0xd252adc3,
+  (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x778e19d0, (q31_t)0xd246f0cb, (q31_t)0x778bdb19, (q31_t)0xd241127a, (q31_t)0x77899c19, (q31_t)0xd23b3444,
+  (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x77851d3a, (q31_t)0xd22f782f, (q31_t)0x7782dd5c, (q31_t)0xd2299a4e, (q31_t)0x77809d35, (q31_t)0xd223bc8a,
+  (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x777c1c08, (q31_t)0xd2180156, (q31_t)0x7779db03, (q31_t)0xd21223e7, (q31_t)0x777799b5, (q31_t)0xd20c4694,
+  (q31_t)0x7775581d, (q31_t)0xd206695d, (q31_t)0x7773163b, (q31_t)0xd2008c43, (q31_t)0x7770d40f, (q31_t)0xd1faaf45, (q31_t)0x776e919a, (q31_t)0xd1f4d263,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776a0bd3, (q31_t)0xd1e918f5, (q31_t)0x7767c880, (q31_t)0xd1e33c69, (q31_t)0x776584e5, (q31_t)0xd1dd5ff9,
+  (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x7760fcd0, (q31_t)0xd1d1a76f, (q31_t)0x775eb857, (q31_t)0xd1cbcb54, (q31_t)0x775c7395, (q31_t)0xd1c5ef56,
+  (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x7757e933, (q31_t)0xd1ba37b0, (q31_t)0x7755a394, (q31_t)0xd1b45c08, (q31_t)0x77535dab, (q31_t)0xd1ae807c,
+  (q31_t)0x77511778, (q31_t)0xd1a8a50d, (q31_t)0x774ed0fc, (q31_t)0xd1a2c9ba, (q31_t)0x774c8a36, (q31_t)0xd19cee84, (q31_t)0x774a4327, (q31_t)0xd197136b,
+  (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x7745b42c, (q31_t)0xd18b5d8e, (q31_t)0x77436c40, (q31_t)0xd18582ca, (q31_t)0x7741240a, (q31_t)0xd17fa823,
+  (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x773c92c2, (q31_t)0xd173f32c, (q31_t)0x773a49b0, (q31_t)0xd16e18db, (q31_t)0x77380054, (q31_t)0xd1683ea7,
+  (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x77336cc0, (q31_t)0xd15c8a95, (q31_t)0x77312287, (q31_t)0xd156b0b7, (q31_t)0x772ed805, (q31_t)0xd150d6f6,
+  (q31_t)0x772c8d3a, (q31_t)0xd14afd52, (q31_t)0x772a4225, (q31_t)0xd14523cb, (q31_t)0x7727f6c6, (q31_t)0xd13f4a60, (q31_t)0x7725ab1f, (q31_t)0xd1397113,
+  (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x772112f2, (q31_t)0xd12dbece, (q31_t)0x771ec66e, (q31_t)0xd127e5d7, (q31_t)0x771c79a0, (q31_t)0xd1220cfc,
+  (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7717df27, (q31_t)0xd1165b9f, (q31_t)0x7715917d, (q31_t)0xd110831b, (q31_t)0x77134389, (q31_t)0xd10aaab5,
+  (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x770ea6c5, (q31_t)0xd0fefa3f, (q31_t)0x770c57f5, (q31_t)0xd0f9222f, (q31_t)0x770a08dc, (q31_t)0xd0f34a3d,
+  (q31_t)0x7707b979, (q31_t)0xd0ed7267, (q31_t)0x770569cc, (q31_t)0xd0e79aaf, (q31_t)0x770319d6, (q31_t)0xd0e1c313, (q31_t)0x7700c997, (q31_t)0xd0dbeb95,
+  (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76fc283c, (q31_t)0xd0d03cf0, (q31_t)0x76f9d721, (q31_t)0xd0ca65c9, (q31_t)0x76f785bc, (q31_t)0xd0c48ebf,
+  (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76f2e216, (q31_t)0xd0b8e102, (q31_t)0x76f08fd5, (q31_t)0xd0b30a50, (q31_t)0x76ee3d4b, (q31_t)0xd0ad33ba,
+  (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e9975a, (q31_t)0xd0a186e7, (q31_t)0x76e743f4, (q31_t)0xd09bb0aa, (q31_t)0x76e4f044, (q31_t)0xd095da89,
+  (q31_t)0x76e29c4b, (q31_t)0xd0900486, (q31_t)0x76e04808, (q31_t)0xd08a2ea0, (q31_t)0x76ddf37c, (q31_t)0xd08458d7, (q31_t)0x76db9ea7, (q31_t)0xd07e832c,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76d6f421, (q31_t)0xd072d82d, (q31_t)0x76d49e70, (q31_t)0xd06d02da, (q31_t)0x76d24876, (q31_t)0xd0672da3,
+  (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76cd9ba5, (q31_t)0xd05b838f, (q31_t)0x76cb44cf, (q31_t)0xd055aeb1, (q31_t)0x76c8edb0, (q31_t)0xd04fd9f1,
+  (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76c43e95, (q31_t)0xd04430c8, (q31_t)0x76c1e699, (q31_t)0xd03e5c60, (q31_t)0x76bf8e55, (q31_t)0xd0388815,
+  (q31_t)0x76bd35c7, (q31_t)0xd032b3e7, (q31_t)0x76badcf0, (q31_t)0xd02cdfd8, (q31_t)0x76b883d0, (q31_t)0xd0270be5, (q31_t)0x76b62a66, (q31_t)0xd0213810,
+  (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76b176b8, (q31_t)0xd01590bf, (q31_t)0x76af1c72, (q31_t)0xd00fbd43, (q31_t)0x76acc1e4, (q31_t)0xd009e9e4,
+  (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a80bec, (q31_t)0xcffe4380, (q31_t)0x76a5b082, (q31_t)0xcff8707a, (q31_t)0x76a354cf, (q31_t)0xcff29d92,
+  (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x769e9c8d, (q31_t)0xcfe6f81a, (q31_t)0x769c3ffe, (q31_t)0xcfe1258b, (q31_t)0x7699e326, (q31_t)0xcfdb531a,
+  (q31_t)0x76978605, (q31_t)0xcfd580c6, (q31_t)0x7695289b, (q31_t)0xcfcfae8f, (q31_t)0x7692cae8, (q31_t)0xcfc9dc77, (q31_t)0x76906ceb, (q31_t)0xcfc40a7c,
+  (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768bb017, (q31_t)0xcfb866e0, (q31_t)0x7689513f, (q31_t)0xcfb2953f, (q31_t)0x7686f21e, (q31_t)0xcfacc3bb,
+  (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x76823301, (q31_t)0xcfa1210d, (q31_t)0x767fd304, (q31_t)0xcf9b4fe3, (q31_t)0x767d72bf, (q31_t)0xcf957ed7,
+  (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x7678b159, (q31_t)0xcf89dd18, (q31_t)0x76765038, (q31_t)0xcf840c65, (q31_t)0x7673eecf, (q31_t)0xcf7e3bd1,
+  (q31_t)0x76718d1c, (q31_t)0xcf786b5a, (q31_t)0x766f2b20, (q31_t)0xcf729b01, (q31_t)0x766cc8db, (q31_t)0xcf6ccac6, (q31_t)0x766a664d, (q31_t)0xcf66faa9,
+  (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x7665a056, (q31_t)0xcf5b5ac9, (q31_t)0x76633ced, (q31_t)0xcf558b06, (q31_t)0x7660d93b, (q31_t)0xcf4fbb61,
+  (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x765c10fc, (q31_t)0xcf441c71, (q31_t)0x7659ac6f, (q31_t)0xcf3e4d26, (q31_t)0x76574798, (q31_t)0xcf387dfa,
+  (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x76527d11, (q31_t)0xcf2cdffa, (q31_t)0x76501760, (q31_t)0xcf271128, (q31_t)0x764db166, (q31_t)0xcf214274,
+  (q31_t)0x764b4b23, (q31_t)0xcf1b73de, (q31_t)0x7648e497, (q31_t)0xcf15a566, (q31_t)0x76467dc2, (q31_t)0xcf0fd70c, (q31_t)0x764416a4, (q31_t)0xcf0a08d0,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x763f478d, (q31_t)0xcefe6cb3, (q31_t)0x763cdf94, (q31_t)0xcef89ed2, (q31_t)0x763a7752, (q31_t)0xcef2d110,
+  (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x7635a5f4, (q31_t)0xcee735e5, (q31_t)0x76333cd8, (q31_t)0xcee1687d, (q31_t)0x7630d372, (q31_t)0xcedb9b33,
+  (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x762bffcd, (q31_t)0xced000fb, (q31_t)0x7629958c, (q31_t)0xceca340c, (q31_t)0x76272b03, (q31_t)0xcec4673c,
+  (q31_t)0x7624c031, (q31_t)0xcebe9a8a, (q31_t)0x76225517, (q31_t)0xceb8cdf7, (q31_t)0x761fe9b3, (q31_t)0xceb30181, (q31_t)0x761d7e06, (q31_t)0xcead352b,
+  (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x7618a5d3, (q31_t)0xcea19cd8, (q31_t)0x7616394c, (q31_t)0xce9bd0dd, (q31_t)0x7613cc7c, (q31_t)0xce960500,
+  (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x760ef201, (q31_t)0xce8a6da2, (q31_t)0x760c8457, (q31_t)0xce84a220, (q31_t)0x760a1664, (q31_t)0xce7ed6bd,
+  (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x760539a3, (q31_t)0xce734053, (q31_t)0x7602cad5, (q31_t)0xce6d754c, (q31_t)0x76005bbf, (q31_t)0xce67aa63,
+  (q31_t)0x75fdec60, (q31_t)0xce61df99, (q31_t)0x75fb7cb8, (q31_t)0xce5c14ed, (q31_t)0x75f90cc7, (q31_t)0xce564a60, (q31_t)0x75f69c8d, (q31_t)0xce507ff2,
+  (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75f1bb40, (q31_t)0xce44eb71, (q31_t)0x75ef4a2c, (q31_t)0xce3f215f, (q31_t)0x75ecd8cf, (q31_t)0xce39576c,
+  (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e7f53c, (q31_t)0xce2dc3e1, (q31_t)0x75e58305, (q31_t)0xce27fa49, (q31_t)0x75e31086, (q31_t)0xce2230d0,
+  (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75de2aac, (q31_t)0xce169e3b, (q31_t)0x75dbb753, (q31_t)0xce10d51f, (q31_t)0x75d943b0, (q31_t)0xce0b0c21,
+  (q31_t)0x75d6cfc5, (q31_t)0xce054343, (q31_t)0x75d45b92, (q31_t)0xcdff7a83, (q31_t)0x75d1e715, (q31_t)0xcdf9b1e2, (q31_t)0x75cf7250, (q31_t)0xcdf3e95f,
+  (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75ca87ec, (q31_t)0xcde858b8, (q31_t)0x75c8124d, (q31_t)0xcde29092, (q31_t)0x75c59c65, (q31_t)0xcddcc88b,
+  (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75c0afbb, (q31_t)0xcdd138db, (q31_t)0x75be38fa, (q31_t)0xcdcb7131, (q31_t)0x75bbc1ef, (q31_t)0xcdc5a9a6,
+  (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75b6d301, (q31_t)0xcdba1aee, (q31_t)0x75b45b1d, (q31_t)0xcdb453c0, (q31_t)0x75b1e2f0, (q31_t)0xcdae8cb1,
+  (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1, (q31_t)0x75acf1bd, (q31_t)0xcda2fef0, (q31_t)0x75aa78b6, (q31_t)0xcd9d383f, (q31_t)0x75a7ff67, (q31_t)0xcd9771ac,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x75a30bef, (q31_t)0xcd8be4e4, (q31_t)0x75a091c6, (q31_t)0xcd861eaf, (q31_t)0x759e1755, (q31_t)0xcd805899,
+  (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x75992198, (q31_t)0xcd74ccca, (q31_t)0x7596a64d, (q31_t)0xcd6f0711, (q31_t)0x75942ab9, (q31_t)0xcd694178,
+  (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x758f32b9, (q31_t)0xcd5db6a3, (q31_t)0x758cb64c, (q31_t)0xcd57f167, (q31_t)0x758a3996, (q31_t)0xcd522c4a,
+  (q31_t)0x7587bc98, (q31_t)0xcd4c674d, (q31_t)0x75853f51, (q31_t)0xcd46a26f, (q31_t)0x7582c1c2, (q31_t)0xcd40ddb0, (q31_t)0x758043ea, (q31_t)0xcd3b1911,
+  (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x757b4762, (q31_t)0xcd2f9030, (q31_t)0x7578c8b0, (q31_t)0xcd29cbee, (q31_t)0x757649b7, (q31_t)0xcd2407cc,
+  (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x75714aea, (q31_t)0xcd187fe6, (q31_t)0x756ecb18, (q31_t)0xcd12bc22, (q31_t)0x756c4afc, (q31_t)0xcd0cf87e,
+  (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x756749ec, (q31_t)0xcd017193, (q31_t)0x7564c8f8, (q31_t)0xccfbae4d, (q31_t)0x756247bb, (q31_t)0xccf5eb26,
+  (q31_t)0x755fc635, (q31_t)0xccf0281f, (q31_t)0x755d4467, (q31_t)0xccea6538, (q31_t)0x755ac251, (q31_t)0xcce4a26f, (q31_t)0x75583ff3, (q31_t)0xccdedfc7,
+  (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x75533a5c, (q31_t)0xccd35ad4, (q31_t)0x7550b725, (q31_t)0xcccd988a, (q31_t)0x754e33a4, (q31_t)0xccc7d65f,
+  (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75492bcb, (q31_t)0xccbc5269, (q31_t)0x7546a772, (q31_t)0xccb6909e, (q31_t)0x754422d0, (q31_t)0xccb0cef2,
+  (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x753f18b4, (q31_t)0xcca54bf9, (q31_t)0x753c933a, (q31_t)0xcc9f8aac, (q31_t)0x753a0d77, (q31_t)0xcc99c97e,
+  (q31_t)0x7537876c, (q31_t)0xcc940871, (q31_t)0x75350118, (q31_t)0xcc8e4783, (q31_t)0x75327a7d, (q31_t)0xcc8886b5, (q31_t)0x752ff399, (q31_t)0xcc82c607,
+  (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x752ae4f8, (q31_t)0xcc774509, (q31_t)0x75285d3b, (q31_t)0xcc7184ba, (q31_t)0x7525d536, (q31_t)0xcc6bc48b,
+  (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x7520c453, (q31_t)0xcc60448c, (q31_t)0x751e3b75, (q31_t)0xcc5a84bc, (q31_t)0x751bb24f, (q31_t)0xcc54c50c,
+  (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x75169f2a, (q31_t)0xcc49460c, (q31_t)0x7514152b, (q31_t)0xcc4386bc, (q31_t)0x75118ae4, (q31_t)0xcc3dc78b,
+  (q31_t)0x750f0054, (q31_t)0xcc38087b, (q31_t)0x750c757d, (q31_t)0xcc32498a, (q31_t)0x7509ea5d, (q31_t)0xcc2c8aba, (q31_t)0x75075ef5, (q31_t)0xcc26cc09,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x7502474d, (q31_t)0xcc1b4f08, (q31_t)0x74ffbb0d, (q31_t)0xcc1590b8, (q31_t)0x74fd2e84, (q31_t)0xcc0fd287,
+  (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f8149a, (q31_t)0xcc045686, (q31_t)0x74f58739, (q31_t)0xcbfe98b6, (q31_t)0x74f2f990, (q31_t)0xcbf8db05,
+  (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74eddd65, (q31_t)0xcbed6005, (q31_t)0x74eb4ee3, (q31_t)0xcbe7a2b5, (q31_t)0x74e8c01a, (q31_t)0xcbe1e585,
+  (q31_t)0x74e63108, (q31_t)0xcbdc2876, (q31_t)0x74e3a1ae, (q31_t)0xcbd66b86, (q31_t)0x74e1120c, (q31_t)0xcbd0aeb7, (q31_t)0x74de8221, (q31_t)0xcbcaf208,
+  (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d96175, (q31_t)0xcbbf790a, (q31_t)0x74d6d0b2, (q31_t)0xcbb9bcbb, (q31_t)0x74d43fa8, (q31_t)0xcbb4008d,
+  (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74cf1cbb, (q31_t)0xcba88891, (q31_t)0x74cc8ad8, (q31_t)0xcba2ccc4, (q31_t)0x74c9f8ad, (q31_t)0xcb9d1117,
+  (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74c4d380, (q31_t)0xcb919a1d, (q31_t)0x74c2407d, (q31_t)0xcb8bded1, (q31_t)0x74bfad32, (q31_t)0xcb8623a5,
+  (q31_t)0x74bd199f, (q31_t)0xcb80689a, (q31_t)0x74ba85c4, (q31_t)0xcb7aadaf, (q31_t)0x74b7f1a1, (q31_t)0xcb74f2e4, (q31_t)0x74b55d36, (q31_t)0xcb6f383a,
+  (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74b03389, (q31_t)0xcb63c347, (q31_t)0x74ad9e46, (q31_t)0xcb5e08fe, (q31_t)0x74ab08bb, (q31_t)0xcb584ed6,
+  (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x74a5dccd, (q31_t)0xcb4cdae6, (q31_t)0x74a3466b, (q31_t)0xcb47211f, (q31_t)0x74a0afc0, (q31_t)0xcb416779,
+  (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x749b8193, (q31_t)0xcb35f48d, (q31_t)0x7498ea11, (q31_t)0xcb303b49, (q31_t)0x74965246, (q31_t)0xcb2a8224,
+  (q31_t)0x7493ba34, (q31_t)0xcb24c921, (q31_t)0x749121da, (q31_t)0xcb1f103e, (q31_t)0x748e8938, (q31_t)0xcb19577b, (q31_t)0x748bf04d, (q31_t)0xcb139ed9,
+  (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x7486bda2, (q31_t)0xcb082df8, (q31_t)0x748423e0, (q31_t)0xcb0275b8, (q31_t)0x748189d7, (q31_t)0xcafcbd99,
+  (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x747c54ec, (q31_t)0xcaf14dbd, (q31_t)0x7479ba0b, (q31_t)0xcaeb9600, (q31_t)0x74771ee2, (q31_t)0xcae5de64,
+  (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x7471e7b8, (q31_t)0xcada6f8d, (q31_t)0x746f4bb8, (q31_t)0xcad4b853, (q31_t)0x746caf70, (q31_t)0xcacf013a,
+  (q31_t)0x746a12df, (q31_t)0xcac94a42, (q31_t)0x74677608, (q31_t)0xcac3936b, (q31_t)0x7464d8e8, (q31_t)0xcabddcb4, (q31_t)0x74623b80, (q31_t)0xcab8261e,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x745cffda, (q31_t)0xcaacb955, (q31_t)0x745a619b, (q31_t)0xcaa70322, (q31_t)0x7457c314, (q31_t)0xcaa14d10,
+  (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x74528530, (q31_t)0xca95e14e, (q31_t)0x744fe5d2, (q31_t)0xca902b9f, (q31_t)0x744d462c, (q31_t)0xca8a7610,
+  (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x7448060a, (q31_t)0xca7f0b56, (q31_t)0x7445658d, (q31_t)0xca79562b, (q31_t)0x7442c4c8, (q31_t)0xca73a120,
+  (q31_t)0x744023bc, (q31_t)0xca6dec37, (q31_t)0x743d8268, (q31_t)0xca68376e, (q31_t)0x743ae0cc, (q31_t)0xca6282c7, (q31_t)0x74383ee9, (q31_t)0xca5cce40,
+  (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x7432fa4b, (q31_t)0xca516597, (q31_t)0x74305790, (q31_t)0xca4bb174, (q31_t)0x742db48e, (q31_t)0xca45fd72,
+  (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74286db3, (q31_t)0xca3a95d2, (q31_t)0x7425c9da, (q31_t)0xca34e234, (q31_t)0x742325b9, (q31_t)0xca2f2eb6,
+  (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x741ddca0, (q31_t)0xca23c820, (q31_t)0x741b37a9, (q31_t)0xca1e1506, (q31_t)0x74189269, (q31_t)0xca18620e,
+  (q31_t)0x7415ece2, (q31_t)0xca12af37, (q31_t)0x74134714, (q31_t)0xca0cfc81, (q31_t)0x7410a0fe, (q31_t)0xca0749ec, (q31_t)0x740dfaa0, (q31_t)0xca019779,
+  (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7408ad0e, (q31_t)0xc9f632f6, (q31_t)0x740605d9, (q31_t)0xc9f080e7, (q31_t)0x74035e5d, (q31_t)0xc9eacef9,
+  (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73fe0e8f, (q31_t)0xc9df6b81, (q31_t)0x73fb663c, (q31_t)0xc9d9b9f7, (q31_t)0x73f8bda2, (q31_t)0xc9d4088f,
+  (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73f36b97, (q31_t)0xc9c8a622, (q31_t)0x73f0c226, (q31_t)0xc9c2f51e, (q31_t)0x73ee186e, (q31_t)0xc9bd443c,
+  (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a, (q31_t)0x73e8c426, (q31_t)0xc9b1e2db, (q31_t)0x73e61997, (q31_t)0xc9ac325d, (q31_t)0x73e36ec1, (q31_t)0xc9a68200,
+  (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73de183e, (q31_t)0xc99b21ab, (q31_t)0x73db6c91, (q31_t)0xc99571b3, (q31_t)0x73d8c09d, (q31_t)0xc98fc1dc,
+  (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73d367de, (q31_t)0xc9846294, (q31_t)0x73d0bb13, (q31_t)0xc97eb322, (q31_t)0x73ce0e01, (q31_t)0xc97903d2,
+  (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c8b307, (q31_t)0xc96da597, (q31_t)0x73c6051f, (q31_t)0xc967f6ac, (q31_t)0x73c356ef, (q31_t)0xc96247e2,
+  (q31_t)0x73c0a878, (q31_t)0xc95c993a, (q31_t)0x73bdf9b9, (q31_t)0xc956eab4, (q31_t)0x73bb4ab3, (q31_t)0xc9513c50, (q31_t)0x73b89b66, (q31_t)0xc94b8e0d,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73b33bf5, (q31_t)0xc94031ed, (q31_t)0x73b08bd1, (q31_t)0xc93a8410, (q31_t)0x73addb67, (q31_t)0xc934d654,
+  (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a879bb, (q31_t)0xc9297b42, (q31_t)0x73a5c87a, (q31_t)0xc923cdec, (q31_t)0x73a316f2, (q31_t)0xc91e20b8,
+  (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x739db30b, (q31_t)0xc912c6b5, (q31_t)0x739b00ad, (q31_t)0xc90d19e6, (q31_t)0x73984e07, (q31_t)0xc9076d39,
+  (q31_t)0x73959b1b, (q31_t)0xc901c0ae, (q31_t)0x7392e7e6, (q31_t)0xc8fc1445, (q31_t)0x7390346b, (q31_t)0xc8f667fe, (q31_t)0x738d80a8, (q31_t)0xc8f0bbd9,
+  (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x7388184d, (q31_t)0xc8e563f5, (q31_t)0x738563b5, (q31_t)0xc8dfb836, (q31_t)0x7382aed5, (q31_t)0xc8da0c99,
+  (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x737d4440, (q31_t)0xc8ceb5c4, (q31_t)0x737a8e8a, (q31_t)0xc8c90a8d, (q31_t)0x7377d88d, (q31_t)0xc8c35f78,
+  (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x73726bbe, (q31_t)0xc8b809b4, (q31_t)0x736fb4ec, (q31_t)0xc8b25f06, (q31_t)0x736cfdd2, (q31_t)0xc8acb479,
+  (q31_t)0x736a4671, (q31_t)0xc8a70a0e, (q31_t)0x73678ec9, (q31_t)0xc8a15fc6, (q31_t)0x7364d6da, (q31_t)0xc89bb5a0, (q31_t)0x73621ea4, (q31_t)0xc8960b9c,
+  (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x735cad61, (q31_t)0xc88ab7fa, (q31_t)0x7359f456, (q31_t)0xc8850e5d, (q31_t)0x73573b03, (q31_t)0xc87f64e2,
+  (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x7351c787, (q31_t)0xc8741252, (q31_t)0x734f0d5f, (q31_t)0xc86e693d, (q31_t)0x734c52ef, (q31_t)0xc868c04b,
+  (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x7346dd3a, (q31_t)0xc85d6ece, (q31_t)0x734421f6, (q31_t)0xc857c642, (q31_t)0x7341666a, (q31_t)0xc8521dd9,
+  (q31_t)0x733eaa96, (q31_t)0xc84c7593, (q31_t)0x733bee7c, (q31_t)0xc846cd6e, (q31_t)0x7339321b, (q31_t)0xc841256d, (q31_t)0x73367572, (q31_t)0xc83b7d8d,
+  (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7330fb4d, (q31_t)0xc8302e35, (q31_t)0x732e3dcf, (q31_t)0xc82a86bd, (q31_t)0x732b800a, (q31_t)0xc824df67,
+  (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x732603ac, (q31_t)0xc8199123, (q31_t)0x73234512, (q31_t)0xc813ea35, (q31_t)0x73208632, (q31_t)0xc80e4369,
+  (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x731b079b, (q31_t)0xc802f638, (q31_t)0x731847e5, (q31_t)0xc7fd4fd4, (q31_t)0x731587e8, (q31_t)0xc7f7a992,
+  (q31_t)0x7312c7a5, (q31_t)0xc7f20373, (q31_t)0x7310071a, (q31_t)0xc7ec5d76, (q31_t)0x730d4648, (q31_t)0xc7e6b79c, (q31_t)0x730a8530, (q31_t)0xc7e111e5,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x73050229, (q31_t)0xc7d5c6de, (q31_t)0x7302403c, (q31_t)0xc7d0218e, (q31_t)0x72ff7e07, (q31_t)0xc7ca7c61,
+  (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f9f8c9, (q31_t)0xc7bf3270, (q31_t)0x72f735c0, (q31_t)0xc7b98dab, (q31_t)0x72f47270, (q31_t)0xc7b3e909,
+  (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72eeeafb, (q31_t)0xc7a8a02c, (q31_t)0x72ec26d6, (q31_t)0xc7a2fbf3, (q31_t)0x72e9626a, (q31_t)0xc79d57db,
+  (q31_t)0x72e69db7, (q31_t)0xc797b3e7, (q31_t)0x72e3d8be, (q31_t)0xc7921015, (q31_t)0x72e1137d, (q31_t)0xc78c6c67, (q31_t)0x72de4df6, (q31_t)0xc786c8db,
+  (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d8c213, (q31_t)0xc77b822b, (q31_t)0x72d5fbb7, (q31_t)0xc775df08, (q31_t)0x72d33514, (q31_t)0xc7703c08,
+  (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72cda6fb, (q31_t)0xc764f66f, (q31_t)0x72cadf83, (q31_t)0xc75f53d7, (q31_t)0x72c817c6, (q31_t)0xc759b163,
+  (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72c28775, (q31_t)0xc74e6ce2, (q31_t)0x72bfbee3, (q31_t)0xc748cad6, (q31_t)0x72bcf60a, (q31_t)0xc74328ed,
+  (q31_t)0x72ba2cea, (q31_t)0xc73d8727, (q31_t)0x72b76383, (q31_t)0xc737e584, (q31_t)0x72b499d6, (q31_t)0xc7324404, (q31_t)0x72b1cfe1, (q31_t)0xc72ca2a7,
+  (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72ac3b25, (q31_t)0xc7216056, (q31_t)0x72a9705c, (q31_t)0xc71bbf62, (q31_t)0x72a6a54d, (q31_t)0xc7161e92,
+  (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x72a10e5b, (q31_t)0xc70add5a, (q31_t)0x729e4277, (q31_t)0xc7053cf2, (q31_t)0x729b764d, (q31_t)0xc6ff9cae,
+  (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x7295dd25, (q31_t)0xc6f45c8f, (q31_t)0x72931027, (q31_t)0xc6eebcb5, (q31_t)0x729042e3, (q31_t)0xc6e91cfd,
+  (q31_t)0x728d7557, (q31_t)0xc6e37d69, (q31_t)0x728aa785, (q31_t)0xc6ddddf8, (q31_t)0x7287d96c, (q31_t)0xc6d83eab, (q31_t)0x72850b0d, (q31_t)0xc6d29f80,
+  (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x727f6d7a, (q31_t)0xc6c76195, (q31_t)0x727c9e47, (q31_t)0xc6c1c2d4, (q31_t)0x7279cecd, (q31_t)0xc6bc2437,
+  (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x72742f05, (q31_t)0xc6b0e767, (q31_t)0x72715eb8, (q31_t)0xc6ab4933, (q31_t)0x726e8e23, (q31_t)0xc6a5ab23,
+  (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7268ec27, (q31_t)0xc69a6f6e, (q31_t)0x72661abf, (q31_t)0xc694d1c8, (q31_t)0x72634910, (q31_t)0xc68f3446,
+  (q31_t)0x7260771b, (q31_t)0xc68996e7, (q31_t)0x725da4df, (q31_t)0xc683f9ab, (q31_t)0x725ad25d, (q31_t)0xc67e5c93, (q31_t)0x7257ff94, (q31_t)0xc678bf9f,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7252592f, (q31_t)0xc66d8620, (q31_t)0x724f8593, (q31_t)0xc667e996, (q31_t)0x724cb1b0, (q31_t)0xc6624d30,
+  (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x72470916, (q31_t)0xc65714cd, (q31_t)0x72443460, (q31_t)0xc65178d1, (q31_t)0x72415f63, (q31_t)0xc64bdcf9,
+  (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x723bb496, (q31_t)0xc640a5b3, (q31_t)0x7238dec5, (q31_t)0xc63b0a46, (q31_t)0x723608af, (q31_t)0xc6356efc,
+  (q31_t)0x72333251, (q31_t)0xc62fd3d6, (q31_t)0x72305bae, (q31_t)0xc62a38d4, (q31_t)0x722d84c4, (q31_t)0xc6249df5, (q31_t)0x722aad93, (q31_t)0xc61f033a,
+  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x7224fe5f, (q31_t)0xc613ce2f, (q31_t)0x7222265b, (q31_t)0xc60e33df, (q31_t)0x721f4e11, (q31_t)0xc60899b2,
+  (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x72199ca9, (q31_t)0xc5fd65c5, (q31_t)0x7216c38c, (q31_t)0xc5f7cc04, (q31_t)0x7213ea28, (q31_t)0xc5f23267,
+  (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x720e368d, (q31_t)0xc5e6ff98, (q31_t)0x720b5c57, (q31_t)0xc5e16667, (q31_t)0x720881d9, (q31_t)0xc5dbcd59,
+  (q31_t)0x7205a716, (q31_t)0xc5d6346f, (q31_t)0x7202cc0c, (q31_t)0xc5d09ba9, (q31_t)0x71fff0bc, (q31_t)0xc5cb0307, (q31_t)0x71fd1525, (q31_t)0xc5c56a89,
+  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71f75d25, (q31_t)0xc5ba39f8, (q31_t)0x71f480bc, (q31_t)0xc5b4a1e5, (q31_t)0x71f1a40c, (q31_t)0xc5af09f7,
+  (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71ebe9da, (q31_t)0xc5a3da86, (q31_t)0x71e90c57, (q31_t)0xc59e4303, (q31_t)0x71e62e8f, (q31_t)0xc598aba5,
+  (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71e0722a, (q31_t)0xc58d7d54, (q31_t)0x71dd938f, (q31_t)0xc587e661, (q31_t)0x71dab4ad, (q31_t)0xc5824f93,
+  (q31_t)0x71d7d585, (q31_t)0xc57cb8e9, (q31_t)0x71d4f617, (q31_t)0xc5772263, (q31_t)0x71d21662, (q31_t)0xc5718c00, (q31_t)0x71cf3667, (q31_t)0xc56bf5c2,
+  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c9759f, (q31_t)0xc560c9b3, (q31_t)0x71c694d2, (q31_t)0xc55b33e2, (q31_t)0x71c3b3bf, (q31_t)0xc5559e34,
+  (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71bdf0c5, (q31_t)0xc54a7346, (q31_t)0x71bb0edf, (q31_t)0xc544de05, (q31_t)0x71b82cb3, (q31_t)0xc53f48e9,
+  (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71b26788, (q31_t)0xc5341f1d, (q31_t)0x71af848a, (q31_t)0xc52e8a6d, (q31_t)0x71aca145, (q31_t)0xc528f5e1,
+  (q31_t)0x71a9bdba, (q31_t)0xc523617a, (q31_t)0x71a6d9e9, (q31_t)0xc51dcd37, (q31_t)0x71a3f5d2, (q31_t)0xc5183919, (q31_t)0x71a11175, (q31_t)0xc512a51f,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x719b47e9, (q31_t)0xc5077d97, (q31_t)0x719862b9, (q31_t)0xc501ea0a, (q31_t)0x71957d44, (q31_t)0xc4fc56a2,
+  (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x718fb187, (q31_t)0xc4f1303d, (q31_t)0x718ccb3f, (q31_t)0xc4eb9d42, (q31_t)0x7189e4b2, (q31_t)0xc4e60a6b,
+  (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x718416c4, (q31_t)0xc4dae52a, (q31_t)0x71812f65, (q31_t)0xc4d552c1, (q31_t)0x717e47bf, (q31_t)0xc4cfc07c,
+  (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b, (q31_t)0x717877a1, (q31_t)0xc4c49c5f, (q31_t)0x71758f29, (q31_t)0xc4bf0a87, (q31_t)0x7172a66c, (q31_t)0xc4b978d4,
+  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x716cd41e, (q31_t)0xc4ae55dc, (q31_t)0x7169ea8f, (q31_t)0xc4a8c497, (q31_t)0x716700b9, (q31_t)0xc4a33376,
+  (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71612c3c, (q31_t)0xc49811a3, (q31_t)0x715e4194, (q31_t)0xc49280f0, (q31_t)0x715b56a7, (q31_t)0xc48cf062,
+  (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x71557ffa, (q31_t)0xc481cfb4, (q31_t)0x7152943b, (q31_t)0xc47c3f94, (q31_t)0x714fa836, (q31_t)0xc476af98,
+  (q31_t)0x714cbbeb, (q31_t)0xc4711fc2, (q31_t)0x7149cf5a, (q31_t)0xc46b9010, (q31_t)0x7146e284, (q31_t)0xc4660083, (q31_t)0x7143f567, (q31_t)0xc460711b,
+  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x713e1a5c, (q31_t)0xc45552b8, (q31_t)0x713b2c6e, (q31_t)0xc44fc3be, (q31_t)0x71383e3a, (q31_t)0xc44a34e9,
+  (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x71326101, (q31_t)0xc43f17ad, (q31_t)0x712f71fb, (q31_t)0xc4398947, (q31_t)0x712c82b0, (q31_t)0xc433fb05,
+  (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x7126a348, (q31_t)0xc428def0, (q31_t)0x7123b32b, (q31_t)0xc423511d, (q31_t)0x7120c2c8, (q31_t)0xc41dc36f,
+  (q31_t)0x711dd220, (q31_t)0xc41835e6, (q31_t)0x711ae132, (q31_t)0xc412a882, (q31_t)0x7117effe, (q31_t)0xc40d1b42, (q31_t)0x7114fe84, (q31_t)0xc4078e28,
+  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x710f1ac0, (q31_t)0xc3fc7462, (q31_t)0x710c2875, (q31_t)0xc3f6e7b7, (q31_t)0x710935e4, (q31_t)0xc3f15b31,
+  (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x71034ff2, (q31_t)0xc3e64294, (q31_t)0x71005c90, (q31_t)0xc3e0b67d, (q31_t)0x70fd68e9, (q31_t)0xc3db2a8b,
+  (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70f780c9, (q31_t)0xc3d01316, (q31_t)0x70f48c50, (q31_t)0xc3ca8793, (q31_t)0x70f19792, (q31_t)0xc3c4fc36,
+  (q31_t)0x70eea28e, (q31_t)0xc3bf70fd, (q31_t)0x70ebad45, (q31_t)0xc3b9e5ea, (q31_t)0x70e8b7b5, (q31_t)0xc3b45afc, (q31_t)0x70e5c1e1, (q31_t)0xc3aed034,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70dfd566, (q31_t)0xc3a3bb12, (q31_t)0x70dcdec0, (q31_t)0xc39e30b8, (q31_t)0x70d9e7d5, (q31_t)0xc398a685,
+  (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70d3f92d, (q31_t)0xc38d928d, (q31_t)0x70d10171, (q31_t)0xc38808c9, (q31_t)0x70ce096f, (q31_t)0xc3827f2a,
+  (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70c8189b, (q31_t)0xc3776c5c, (q31_t)0x70c51fc8, (q31_t)0xc371e32d, (q31_t)0x70c226b0, (q31_t)0xc36c5a24,
+  (q31_t)0x70bf2d53, (q31_t)0xc366d140, (q31_t)0x70bc33b0, (q31_t)0xc3614881, (q31_t)0x70b939c7, (q31_t)0xc35bbfe8, (q31_t)0x70b63f99, (q31_t)0xc3563774,
+  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70b04a6b, (q31_t)0xc34b26fc, (q31_t)0x70ad4f6d, (q31_t)0xc3459ef9, (q31_t)0x70aa5428, (q31_t)0xc340171b,
+  (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x70a45ccf, (q31_t)0xc33507cf, (q31_t)0x70a160ba, (q31_t)0xc32f8061, (q31_t)0x709e6460, (q31_t)0xc329f919,
+  (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x70986adb, (q31_t)0xc31eeaf9, (q31_t)0x70956db1, (q31_t)0xc3196422, (q31_t)0x70927041, (q31_t)0xc313dd70,
+  (q31_t)0x708f728b, (q31_t)0xc30e56e4, (q31_t)0x708c7490, (q31_t)0xc308d07d, (q31_t)0x70897650, (q31_t)0xc3034a3c, (q31_t)0x708677ca, (q31_t)0xc2fdc420,
+  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x708079ee, (q31_t)0xc2f2b85a, (q31_t)0x707d7a98, (q31_t)0xc2ed32af, (q31_t)0x707a7afd, (q31_t)0xc2e7ad2a,
+  (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x70747af6, (q31_t)0xc2dca291, (q31_t)0x70717a8a, (q31_t)0xc2d71d7e, (q31_t)0x706e79d9, (q31_t)0xc2d1988f,
+  (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x706877a7, (q31_t)0xc2c68f24, (q31_t)0x70657626, (q31_t)0xc2c10aa7, (q31_t)0x70627460, (q31_t)0xc2bb8650,
+  (q31_t)0x705f7255, (q31_t)0xc2b6021f, (q31_t)0x705c7004, (q31_t)0xc2b07e14, (q31_t)0x70596d6d, (q31_t)0xc2aafa2e, (q31_t)0x70566a92, (q31_t)0xc2a5766e,
+  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x7050640b, (q31_t)0xc29a6f60, (q31_t)0x704d6060, (q31_t)0xc294ec12, (q31_t)0x704a5c6f, (q31_t)0xc28f68e9,
+  (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x704453be, (q31_t)0xc284630a, (q31_t)0x70414efd, (q31_t)0xc27ee054, (q31_t)0x703e49f8, (q31_t)0xc2795dc3,
+  (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x70383f1d, (q31_t)0xc26e5913, (q31_t)0x70353947, (q31_t)0xc268d6f5, (q31_t)0x7032332d, (q31_t)0xc26354fc,
+  (q31_t)0x702f2ccd, (q31_t)0xc25dd329, (q31_t)0x702c2628, (q31_t)0xc258517c, (q31_t)0x70291f3e, (q31_t)0xc252cff5, (q31_t)0x7026180e, (q31_t)0xc24d4e95,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x702008e0, (q31_t)0xc2424c46, (q31_t)0x701d00e1, (q31_t)0xc23ccb57, (q31_t)0x7019f89d, (q31_t)0xc2374a8f,
+  (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x7013e746, (q31_t)0xc22c4970, (q31_t)0x7010de32, (q31_t)0xc226c91a, (q31_t)0x700dd4da, (q31_t)0xc22148ea,
+  (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x7007c159, (q31_t)0xc21648fd, (q31_t)0x7004b731, (q31_t)0xc210c940, (q31_t)0x7001acc4, (q31_t)0xc20b49a9,
+  (q31_t)0x6ffea212, (q31_t)0xc205ca38, (q31_t)0x6ffb971b, (q31_t)0xc2004aed, (q31_t)0x6ff88bde, (q31_t)0xc1facbc9, (q31_t)0x6ff5805d, (q31_t)0xc1f54cca,
+  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fef688b, (q31_t)0xc1ea4f41, (q31_t)0x6fec5c3b, (q31_t)0xc1e4d0b6, (q31_t)0x6fe94fa5, (q31_t)0xc1df5251,
+  (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fe335ab, (q31_t)0xc1d455f9, (q31_t)0x6fe02846, (q31_t)0xc1ced807, (q31_t)0x6fdd1a9c, (q31_t)0xc1c95a3c,
+  (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fd6fe7a, (q31_t)0xc1be5f18, (q31_t)0x6fd3f001, (q31_t)0xc1b8e1bf, (q31_t)0x6fd0e144, (q31_t)0xc1b3648d,
+  (q31_t)0x6fcdd241, (q31_t)0xc1ade781, (q31_t)0x6fcac2fa, (q31_t)0xc1a86a9c, (q31_t)0x6fc7b36d, (q31_t)0xc1a2edde, (q31_t)0x6fc4a39c, (q31_t)0xc19d7145,
+  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fbe832a, (q31_t)0xc1927888, (q31_t)0x6fbb728a, (q31_t)0xc18cfc63, (q31_t)0x6fb861a4, (q31_t)0xc1878065,
+  (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fb23f0b, (q31_t)0xc17c88dc, (q31_t)0x6faf2d57, (q31_t)0xc1770d52, (q31_t)0x6fac1b5f, (q31_t)0xc17191ee,
+  (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6fa5f69e, (q31_t)0xc1669b99, (q31_t)0x6fa2e3d7, (q31_t)0xc16120a9, (q31_t)0x6f9fd0cb, (q31_t)0xc15ba5df,
+  (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d, (q31_t)0x6f99a9e3, (q31_t)0xc150b0c0, (q31_t)0x6f969608, (q31_t)0xc14b366b, (q31_t)0x6f9381e9, (q31_t)0xc145bc3c,
+  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f8d58db, (q31_t)0xc13ac852, (q31_t)0x6f8a43ed, (q31_t)0xc1354e97, (q31_t)0x6f872eba, (q31_t)0xc12fd503,
+  (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f810386, (q31_t)0xc124e24f, (q31_t)0x6f7ded84, (q31_t)0xc11f692f, (q31_t)0x6f7ad73e, (q31_t)0xc119f036,
+  (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f74a9e4, (q31_t)0xc10efeb8, (q31_t)0x6f7192cf, (q31_t)0xc1098634, (q31_t)0x6f6e7b76, (q31_t)0xc1040dd6,
+  (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f, (q31_t)0x6f684bf6, (q31_t)0xc0f91d8f, (q31_t)0x6f6533ce, (q31_t)0xc0f3a5a6, (q31_t)0x6f621b62, (q31_t)0xc0ee2de3,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f5be9bc, (q31_t)0xc0e33ed4, (q31_t)0x6f58d082, (q31_t)0xc0ddc786, (q31_t)0x6f55b703, (q31_t)0xc0d8505f,
+  (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f4f8338, (q31_t)0xc0cd6287, (q31_t)0x6f4c68eb, (q31_t)0xc0c7ebd6, (q31_t)0x6f494e5a, (q31_t)0xc0c2754b,
+  (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f431869, (q31_t)0xc0b788ab, (q31_t)0x6f3ffd09, (q31_t)0xc0b21295, (q31_t)0x6f3ce165, (q31_t)0xc0ac9ca6,
+  (q31_t)0x6f39c57d, (q31_t)0xc0a726df, (q31_t)0x6f36a94f, (q31_t)0xc0a1b13e, (q31_t)0x6f338cde, (q31_t)0xc09c3bc5, (q31_t)0x6f307027, (q31_t)0xc096c673,
+  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f2a35ed, (q31_t)0xc08bdc44, (q31_t)0x6f271868, (q31_t)0xc0866767, (q31_t)0x6f23faa0, (q31_t)0xc080f2b1,
+  (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1dbe41, (q31_t)0xc07609bb, (q31_t)0x6f1a9faa, (q31_t)0xc070957b, (q31_t)0x6f1780cf, (q31_t)0xc06b2162,
+  (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f11424c, (q31_t)0xc06039a6, (q31_t)0x6f0e22a3, (q31_t)0xc05ac603, (q31_t)0x6f0b02b6, (q31_t)0xc0555287,
+  (q31_t)0x6f07e285, (q31_t)0xc04fdf32, (q31_t)0x6f04c20f, (q31_t)0xc04a6c05, (q31_t)0x6f01a155, (q31_t)0xc044f8fe, (q31_t)0x6efe8056, (q31_t)0xc03f8620,
+  (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ef83d8a, (q31_t)0xc034a0d8, (q31_t)0x6ef51bbe, (q31_t)0xc02f2e6f, (q31_t)0x6ef1f9ad, (q31_t)0xc029bc2e,
+  (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6eebb4bf, (q31_t)0xc01ed821, (q31_t)0x6ee891e1, (q31_t)0xc0196656, (q31_t)0x6ee56ebe, (q31_t)0xc013f4b2,
+  (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6edf27ac, (q31_t)0xc00911e1, (q31_t)0x6edc03bc, (q31_t)0xc003a0b3, (q31_t)0x6ed8df88, (q31_t)0xbffe2fad,
+  (q31_t)0x6ed5bb10, (q31_t)0xbff8bece, (q31_t)0x6ed29653, (q31_t)0xbff34e17, (q31_t)0x6ecf7152, (q31_t)0xbfeddd88, (q31_t)0x6ecc4c0d, (q31_t)0xbfe86d20,
+  (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ec600b5, (q31_t)0xbfdd8cc6, (q31_t)0x6ec2daa2, (q31_t)0xbfd81cd5, (q31_t)0x6ebfb44b, (q31_t)0xbfd2ad0b,
+  (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eb966d1, (q31_t)0xbfc7cdee, (q31_t)0x6eb63fad, (q31_t)0xbfc25e9b, (q31_t)0x6eb31845, (q31_t)0xbfbcef70,
+  (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6eacc8a8, (q31_t)0xbfb21190, (q31_t)0x6ea9a073, (q31_t)0xbfaca2dc, (q31_t)0x6ea677fa, (q31_t)0xbfa7344f,
+  (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea, (q31_t)0x6ea0263b, (q31_t)0xbf9c57ac, (q31_t)0x6e9cfcf5, (q31_t)0xbf96e997, (q31_t)0x6e99d36b, (q31_t)0xbf917ba9,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e937f8a, (q31_t)0xbf86a044, (q31_t)0x6e905534, (q31_t)0xbf8132ce, (q31_t)0x6e8d2a99, (q31_t)0xbf7bc57f,
+  (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e86d496, (q31_t)0xbf70eb59, (q31_t)0x6e83a92f, (q31_t)0xbf6b7e81, (q31_t)0x6e807d83, (q31_t)0xbf6611d2,
+  (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e7a255f, (q31_t)0xbf5b38ea, (q31_t)0x6e76f8e7, (q31_t)0xbf55ccb2, (q31_t)0x6e73cc2b, (q31_t)0xbf5060a2,
+  (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba, (q31_t)0x6e6d71e6, (q31_t)0xbf4588fa, (q31_t)0x6e6a445d, (q31_t)0xbf401d61, (q31_t)0x6e671690, (q31_t)0xbf3ab1f1,
+  (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e60ba2a, (q31_t)0xbf2fdb88, (q31_t)0x6e5d8b91, (q31_t)0xbf2a708f, (q31_t)0x6e5a5cb4, (q31_t)0xbf2505bf,
+  (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e53fe2e, (q31_t)0xbf1a3096, (q31_t)0x6e50ce84, (q31_t)0xbf14c63d, (q31_t)0x6e4d9e97, (q31_t)0xbf0f5c0d,
+  (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e473df0, (q31_t)0xbf048824, (q31_t)0x6e440d37, (q31_t)0xbeff1e6c, (q31_t)0x6e40dc39, (q31_t)0xbef9b4dc,
+  (q31_t)0x6e3daaf8, (q31_t)0xbef44b74, (q31_t)0x6e3a7972, (q31_t)0xbeeee234, (q31_t)0x6e3747a9, (q31_t)0xbee9791c, (q31_t)0x6e34159b, (q31_t)0xbee4102d,
+  (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e2db0b4, (q31_t)0xbed93ec6, (q31_t)0x6e2a7ddb, (q31_t)0xbed3d64f, (q31_t)0x6e274abe, (q31_t)0xbece6e00,
+  (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e20e3b7, (q31_t)0xbec39ddb, (q31_t)0x6e1dafce, (q31_t)0xbebe3605, (q31_t)0x6e1a7ba1, (q31_t)0xbeb8ce57,
+  (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e14127b, (q31_t)0xbeadff74, (q31_t)0x6e10dd82, (q31_t)0xbea8983f, (q31_t)0x6e0da845, (q31_t)0xbea33132,
+  (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e, (q31_t)0x6e073d00, (q31_t)0xbe986391, (q31_t)0x6e0406f8, (q31_t)0xbe92fcfe, (q31_t)0x6e00d0ac, (q31_t)0xbe8d9692,
+  (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6dfa6348, (q31_t)0xbe82ca35, (q31_t)0x6df72c30, (q31_t)0xbe7d6442, (q31_t)0x6df3f4d4, (q31_t)0xbe77fe78,
+  (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6ded8552, (q31_t)0xbe6d335e, (q31_t)0x6dea4d2b, (q31_t)0xbe67ce0d, (q31_t)0x6de714c0, (q31_t)0xbe6268e5,
+  (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6de0a31f, (q31_t)0xbe579f0f, (q31_t)0x6ddd69e9, (q31_t)0xbe523a60, (q31_t)0x6dda306f, (q31_t)0xbe4cd5da,
+  (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c, (q31_t)0x6dd3bcaf, (q31_t)0xbe420d47, (q31_t)0x6dd0826a, (q31_t)0xbe3ca93b, (q31_t)0x6dcd47e1, (q31_t)0xbe374557,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dc6d204, (q31_t)0xbe2c7e09, (q31_t)0x6dc396b0, (q31_t)0xbe271a9f, (q31_t)0x6dc05b18, (q31_t)0xbe21b75d,
+  (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db9e31d, (q31_t)0xbe16f154, (q31_t)0x6db6a6ba, (q31_t)0xbe118e8c, (q31_t)0x6db36a14, (q31_t)0xbe0c2bed,
+  (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6daceffb, (q31_t)0xbe01672a, (q31_t)0x6da9b28a, (q31_t)0xbdfc0505, (q31_t)0x6da674d5, (q31_t)0xbdf6a309,
+  (q31_t)0x6da336dc, (q31_t)0xbdf14135, (q31_t)0x6d9ff89f, (q31_t)0xbdebdf8b, (q31_t)0x6d9cba1f, (q31_t)0xbde67e09, (q31_t)0x6d997b5b, (q31_t)0xbde11cb0,
+  (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d92fd09, (q31_t)0xbdd65a78, (q31_t)0x6d8fbd7a, (q31_t)0xbdd0f999, (q31_t)0x6d8c7da8, (q31_t)0xbdcb98e3,
+  (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d85fd39, (q31_t)0xbdc0d7f2, (q31_t)0x6d82bc9d, (q31_t)0xbdbb77b7, (q31_t)0x6d7f7bbc, (q31_t)0xbdb617a4,
+  (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d78f931, (q31_t)0xbdab57fa, (q31_t)0x6d75b786, (q31_t)0xbda5f862, (q31_t)0x6d727597, (q31_t)0xbda098f3,
+  (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad, (q31_t)0x6d6bf0f0, (q31_t)0xbd95da91, (q31_t)0x6d68ae37, (q31_t)0xbd907b9d, (q31_t)0x6d656b3a, (q31_t)0xbd8b1cd2,
+  (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d5ee477, (q31_t)0xbd805fb7, (q31_t)0x6d5ba0b0, (q31_t)0xbd7b0167, (q31_t)0x6d585ca6, (q31_t)0xbd75a340,
+  (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d51d3c6, (q31_t)0xbd6ae76d, (q31_t)0x6d4e8ef2, (q31_t)0xbd6589c1, (q31_t)0x6d4b49da, (q31_t)0xbd602c3f,
+  (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d44bedf, (q31_t)0xbd5571b5, (q31_t)0x6d4178fd, (q31_t)0xbd5014ad, (q31_t)0x6d3e32d7, (q31_t)0xbd4ab7cf,
+  (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a, (q31_t)0x6d37a5c1, (q31_t)0xbd3ffe8e, (q31_t)0x6d345ed1, (q31_t)0xbd3aa22c, (q31_t)0x6d31179e, (q31_t)0xbd3545f2,
+  (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d2a886e, (q31_t)0xbd2a8dfb, (q31_t)0x6d274070, (q31_t)0xbd25323d, (q31_t)0x6d23f830, (q31_t)0xbd1fd6a8,
+  (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d1d66e4, (q31_t)0xbd151ffb, (q31_t)0x6d1a1dda, (q31_t)0xbd0fc4e2, (q31_t)0x6d16d48c, (q31_t)0xbd0a69f2,
+  (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d104126, (q31_t)0xbcffb48f, (q31_t)0x6d0cf70f, (q31_t)0xbcfa5a1b, (q31_t)0x6d09acb4, (q31_t)0xbcf4ffd1,
+  (q31_t)0x6d066215, (q31_t)0xbcefa5b0, (q31_t)0x6d031734, (q31_t)0xbcea4bb9, (q31_t)0x6cffcc0f, (q31_t)0xbce4f1eb, (q31_t)0x6cfc80a7, (q31_t)0xbcdf9846,
+  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cf5e90d, (q31_t)0xbcd4e579, (q31_t)0x6cf29cdc, (q31_t)0xbccf8c50, (q31_t)0x6cef5067, (q31_t)0xbcca3351,
+  (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6ce8b6b4, (q31_t)0xbcbf81cf, (q31_t)0x6ce56975, (q31_t)0xbcba294d, (q31_t)0x6ce21bf4, (q31_t)0xbcb4d0f4,
+  (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cdb8027, (q31_t)0xbcaa20be, (q31_t)0x6cd831dc, (q31_t)0xbca4c8e1, (q31_t)0x6cd4e34e, (q31_t)0xbc9f712e,
+  (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5, (q31_t)0x6cce4568, (q31_t)0xbc94c245, (q31_t)0x6ccaf610, (q31_t)0xbc8f6b0f, (q31_t)0x6cc7a676, (q31_t)0xbc8a1402,
+  (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cc10677, (q31_t)0xbc7f6665, (q31_t)0x6cbdb613, (q31_t)0xbc7a0fd6, (q31_t)0x6cba656c, (q31_t)0xbc74b96f,
+  (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6cb3c355, (q31_t)0xbc6a0d20, (q31_t)0x6cb071e4, (q31_t)0xbc64b737, (q31_t)0x6cad2031, (q31_t)0xbc5f6177,
+  (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6ca67c01, (q31_t)0xbc54b676, (q31_t)0x6ca32985, (q31_t)0xbc4f6134, (q31_t)0x6c9fd6c6, (q31_t)0xbc4a0c1b,
+  (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c, (q31_t)0x6c99307e, (q31_t)0xbc3f6267, (q31_t)0x6c95dcf6, (q31_t)0xbc3a0dcc, (q31_t)0x6c92892a, (q31_t)0xbc34b95b,
+  (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c8be0cb, (q31_t)0xbc2a10f6, (q31_t)0x6c888c36, (q31_t)0xbc24bd02, (q31_t)0x6c85375f, (q31_t)0xbc1f6938,
+  (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c7e8ce8, (q31_t)0xbc14c221, (q31_t)0x6c7b3748, (q31_t)0xbc0f6ed5, (q31_t)0x6c77e165, (q31_t)0xbc0a1bb3,
+  (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c7134d7, (q31_t)0xbbff75ec, (q31_t)0x6c6dde2b, (q31_t)0xbbfa2347, (q31_t)0x6c6a873d, (q31_t)0xbbf4d0cc,
+  (q31_t)0x6c67300b, (q31_t)0xbbef7e7c, (q31_t)0x6c63d897, (q31_t)0xbbea2c55, (q31_t)0x6c6080e0, (q31_t)0xbbe4da58, (q31_t)0x6c5d28e6, (q31_t)0xbbdf8885,
+  (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c56782a, (q31_t)0xbbd4e55e, (q31_t)0x6c531f67, (q31_t)0xbbcf940a, (q31_t)0x6c4fc662, (q31_t)0xbbca42df,
+  (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df, (q31_t)0x6c49138f, (q31_t)0xbbbfa108, (q31_t)0x6c45b9c1, (q31_t)0xbbba505c, (q31_t)0x6c425fb1, (q31_t)0xbbb4ffda,
+  (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c3baac7, (q31_t)0xbbaa5f54, (q31_t)0x6c384fef, (q31_t)0xbba50f50, (q31_t)0x6c34f4d3, (q31_t)0xbb9fbf77,
+  (q31_t)0x6c319975, (q31_t)0xbb9a6fc7, (q31_t)0x6c2e3dd4, (q31_t)0xbb952042, (q31_t)0x6c2ae1f0, (q31_t)0xbb8fd0e7, (q31_t)0x6c2785ca, (q31_t)0xbb8a81b6,
+  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c20ccb4, (q31_t)0xbb7fe3d3, (q31_t)0x6c1d6fc6, (q31_t)0xbb7a9521, (q31_t)0x6c1a1295, (q31_t)0xbb754699,
+  (q31_t)0x6c16b521, (q31_t)0xbb6ff83c, (q31_t)0x6c13576a, (q31_t)0xbb6aaa09, (q31_t)0x6c0ff971, (q31_t)0xbb655c00, (q31_t)0x6c0c9b35, (q31_t)0xbb600e21,
+  (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6c05ddf5, (q31_t)0xbb5572e3, (q31_t)0x6c027ef1, (q31_t)0xbb502583, (q31_t)0x6bff1faa, (q31_t)0xbb4ad84e,
+  (q31_t)0x6bfbc021, (q31_t)0xbb458b43, (q31_t)0x6bf86055, (q31_t)0xbb403e63, (q31_t)0x6bf50047, (q31_t)0xbb3af1ad, (q31_t)0x6bf19ff6, (q31_t)0xbb35a521,
+  (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6beade8c, (q31_t)0xbb2b0c8a, (q31_t)0x6be77d74, (q31_t)0xbb25c07d, (q31_t)0x6be41c18, (q31_t)0xbb20749c,
+  (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4, (q31_t)0x6bdd589a, (q31_t)0xbb15dd57, (q31_t)0x6bd9f677, (q31_t)0xbb1091f5, (q31_t)0x6bd69412, (q31_t)0xbb0b46bd,
+  (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bcfce80, (q31_t)0xbb00b0ce, (q31_t)0x6bcc6b53, (q31_t)0xbafb6615, (q31_t)0x6bc907e3, (q31_t)0xbaf61b88,
+  (q31_t)0x6bc5a431, (q31_t)0xbaf0d125, (q31_t)0x6bc2403d, (q31_t)0xbaeb86ed, (q31_t)0x6bbedc06, (q31_t)0xbae63cdf, (q31_t)0x6bbb778d, (q31_t)0xbae0f2fc,
+  (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6bb4add3, (q31_t)0xbad65fb5, (q31_t)0x6bb14892, (q31_t)0xbad11652, (q31_t)0x6bade30f, (q31_t)0xbacbcd1a,
+  (q31_t)0x6baa7d49, (q31_t)0xbac6840c, (q31_t)0x6ba71741, (q31_t)0xbac13b29, (q31_t)0x6ba3b0f7, (q31_t)0xbabbf270, (q31_t)0x6ba04a6a, (q31_t)0xbab6a9e3,
+  (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b997c8a, (q31_t)0xbaac1948, (q31_t)0x6b961536, (q31_t)0xbaa6d13a, (q31_t)0x6b92ada0, (q31_t)0xbaa18958,
+  (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0, (q31_t)0x6b8bddac, (q31_t)0xba96fa13, (q31_t)0x6b88754f, (q31_t)0xba91b2b1, (q31_t)0x6b850caf, (q31_t)0xba8c6b79,
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+  (q31_t)0x6b73fdae, (q31_t)0xba7209e7, (q31_t)0x6b709381, (q31_t)0xba6cc3b1, (q31_t)0x6b6d2911, (q31_t)0xba677da6, (q31_t)0x6b69be5f, (q31_t)0xba6237c5,
+  (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b62e834, (q31_t)0xba57ac86, (q31_t)0x6b5f7cbc, (q31_t)0xba526726, (q31_t)0x6b5c1101, (q31_t)0xba4d21f2,
+  (q31_t)0x6b58a503, (q31_t)0xba47dce8, (q31_t)0x6b5538c4, (q31_t)0xba42980a, (q31_t)0x6b51cc42, (q31_t)0xba3d5356, (q31_t)0x6b4e5f7f, (q31_t)0xba380ece,
+  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b478530, (q31_t)0xba2d863e, (q31_t)0x6b4417a6, (q31_t)0xba284237, (q31_t)0x6b40a9d9, (q31_t)0xba22fe5b,
+  (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa, (q31_t)0x6b39cd7a, (q31_t)0xba187724, (q31_t)0x6b365ee7, (q31_t)0xba1333c9, (q31_t)0x6b32f012, (q31_t)0xba0df099,
+  (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b2c11a1, (q31_t)0xba036abb, (q31_t)0x6b28a206, (q31_t)0xb9fe280d, (q31_t)0x6b253228, (q31_t)0xb9f8e58a,
+  (q31_t)0x6b21c208, (q31_t)0xb9f3a332, (q31_t)0x6b1e51a7, (q31_t)0xb9ee6106, (q31_t)0x6b1ae103, (q31_t)0xb9e91f04, (q31_t)0x6b17701d, (q31_t)0xb9e3dd2e,
+  (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b108d8b, (q31_t)0xb9d95a03, (q31_t)0x6b0d1bdf, (q31_t)0xb9d418af, (q31_t)0x6b09a9f1, (q31_t)0xb9ced786,
+  (q31_t)0x6b0637c1, (q31_t)0xb9c99688, (q31_t)0x6b02c54f, (q31_t)0xb9c455b6, (q31_t)0x6aff529a, (q31_t)0xb9bf150e, (q31_t)0x6afbdfa4, (q31_t)0xb9b9d493,
+  (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6af4f8f2, (q31_t)0xb9af541d, (q31_t)0x6af18536, (q31_t)0xb9aa1423, (q31_t)0x6aee1138, (q31_t)0xb9a4d455,
+  (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2, (q31_t)0x6ae72876, (q31_t)0xb99a553a, (q31_t)0x6ae3b3b2, (q31_t)0xb99515ee, (q31_t)0x6ae03eac, (q31_t)0xb98fd6cd,
+  (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6ad953db, (q31_t)0xb985590e, (q31_t)0x6ad5de0f, (q31_t)0xb9801a70, (q31_t)0x6ad26802, (q31_t)0xb97adbfd,
+  (q31_t)0x6acef1b2, (q31_t)0xb9759db6, (q31_t)0x6acb7b21, (q31_t)0xb9705f9a, (q31_t)0x6ac8044e, (q31_t)0xb96b21aa, (q31_t)0x6ac48d39, (q31_t)0xb965e3e5,
+  (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6abd9e49, (q31_t)0xb95b68de, (q31_t)0x6aba266e, (q31_t)0xb9562b9c, (q31_t)0x6ab6ae52, (q31_t)0xb950ee86,
+  (q31_t)0x6ab335f4, (q31_t)0xb94bb19b, (q31_t)0x6aafbd54, (q31_t)0xb94674dc, (q31_t)0x6aac4472, (q31_t)0xb9413848, (q31_t)0x6aa8cb4e, (q31_t)0xb93bfbe0,
+  (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6aa1d841, (q31_t)0xb9318393, (q31_t)0x6a9e5e58, (q31_t)0xb92c47ae, (q31_t)0x6a9ae42e, (q31_t)0xb9270bf5,
+  (q31_t)0x6a9769c1, (q31_t)0xb921d067, (q31_t)0x6a93ef13, (q31_t)0xb91c9505, (q31_t)0x6a907423, (q31_t)0xb91759cf, (q31_t)0x6a8cf8f1, (q31_t)0xb9121ec5,
+  (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a8601c8, (q31_t)0xb907a933, (q31_t)0x6a8285d1, (q31_t)0xb9026eac, (q31_t)0x6a7f0999, (q31_t)0xb8fd3451,
+  (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21, (q31_t)0x6a781062, (q31_t)0xb8f2c01d, (q31_t)0x6a749365, (q31_t)0xb8ed8646, (q31_t)0x6a711625, (q31_t)0xb8e84c99,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a6a1ae2, (q31_t)0xb8ddd9c5, (q31_t)0x6a669cdd, (q31_t)0xb8d8a09d, (q31_t)0x6a631e97, (q31_t)0xb8d367a0,
+  (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf, (q31_t)0x6a5c2147, (q31_t)0xb8c8f62b, (q31_t)0x6a58a23c, (q31_t)0xb8c3bdb2, (q31_t)0x6a5522ef, (q31_t)0xb8be8565,
+  (q31_t)0x6a51a361, (q31_t)0xb8b94d44, (q31_t)0x6a4e2392, (q31_t)0xb8b4154f, (q31_t)0x6a4aa381, (q31_t)0xb8aedd86, (q31_t)0x6a47232e, (q31_t)0xb8a9a5e9,
+  (q31_t)0x6a43a29a, (q31_t)0xb8a46e78, (q31_t)0x6a4021c4, (q31_t)0xb89f3733, (q31_t)0x6a3ca0ad, (q31_t)0xb89a001a, (q31_t)0x6a391f54, (q31_t)0xb894c92d,
+  (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x6a321bdd, (q31_t)0xb88a5bd8, (q31_t)0x6a2e99c0, (q31_t)0xb885256f, (q31_t)0x6a2b1761, (q31_t)0xb87fef33,
+  (q31_t)0x6a2794c1, (q31_t)0xb87ab922, (q31_t)0x6a2411df, (q31_t)0xb875833e, (q31_t)0x6a208ebb, (q31_t)0xb8704d85, (q31_t)0x6a1d0b57, (q31_t)0xb86b17f9,
+  (q31_t)0x6a1987b0, (q31_t)0xb865e299, (q31_t)0x6a1603c8, (q31_t)0xb860ad66, (q31_t)0x6a127f9f, (q31_t)0xb85b785e, (q31_t)0x6a0efb35, (q31_t)0xb8564383,
+  (q31_t)0x6a0b7689, (q31_t)0xb8510ed4, (q31_t)0x6a07f19b, (q31_t)0xb84bda51, (q31_t)0x6a046c6c, (q31_t)0xb846a5fa, (q31_t)0x6a00e6fc, (q31_t)0xb84171cf,
+  (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69f9db57, (q31_t)0xb83709ff, (q31_t)0x69f65523, (q31_t)0xb831d659, (q31_t)0x69f2cead, (q31_t)0xb82ca2e0,
+  (q31_t)0x69ef47f6, (q31_t)0xb8276f93, (q31_t)0x69ebc0fe, (q31_t)0xb8223c72, (q31_t)0x69e839c4, (q31_t)0xb81d097e, (q31_t)0x69e4b249, (q31_t)0xb817d6b6,
+  (q31_t)0x69e12a8c, (q31_t)0xb812a41a, (q31_t)0x69dda28f, (q31_t)0xb80d71aa, (q31_t)0x69da1a50, (q31_t)0xb8083f67, (q31_t)0x69d691cf, (q31_t)0xb8030d51,
+  (q31_t)0x69d3090e, (q31_t)0xb7fddb67, (q31_t)0x69cf800b, (q31_t)0xb7f8a9a9, (q31_t)0x69cbf6c7, (q31_t)0xb7f37818, (q31_t)0x69c86d41, (q31_t)0xb7ee46b3,
+  (q31_t)0x69c4e37a, (q31_t)0xb7e9157a, (q31_t)0x69c15973, (q31_t)0xb7e3e46e, (q31_t)0x69bdcf29, (q31_t)0xb7deb38f, (q31_t)0x69ba449f, (q31_t)0xb7d982dc,
+  (q31_t)0x69b6b9d3, (q31_t)0xb7d45255, (q31_t)0x69b32ec7, (q31_t)0xb7cf21fb, (q31_t)0x69afa378, (q31_t)0xb7c9f1ce, (q31_t)0x69ac17e9, (q31_t)0xb7c4c1cd,
+  (q31_t)0x69a88c19, (q31_t)0xb7bf91f8, (q31_t)0x69a50007, (q31_t)0xb7ba6251, (q31_t)0x69a173b5, (q31_t)0xb7b532d6, (q31_t)0x699de721, (q31_t)0xb7b00387,
+  (q31_t)0x699a5a4c, (q31_t)0xb7aad465, (q31_t)0x6996cd35, (q31_t)0xb7a5a570, (q31_t)0x69933fde, (q31_t)0xb7a076a7, (q31_t)0x698fb246, (q31_t)0xb79b480b,
+  (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x69889651, (q31_t)0xb790eb58, (q31_t)0x698507f6, (q31_t)0xb78bbd42, (q31_t)0x69817959, (q31_t)0xb7868f59,
+  (q31_t)0x697dea7b, (q31_t)0xb781619c, (q31_t)0x697a5b5c, (q31_t)0xb77c340c, (q31_t)0x6976cbfc, (q31_t)0xb77706a9, (q31_t)0x69733c5b, (q31_t)0xb771d972,
+  (q31_t)0x696fac78, (q31_t)0xb76cac69, (q31_t)0x696c1c55, (q31_t)0xb7677f8c, (q31_t)0x69688bf1, (q31_t)0xb76252db, (q31_t)0x6964fb4c, (q31_t)0xb75d2658,
+  (q31_t)0x69616a65, (q31_t)0xb757fa01, (q31_t)0x695dd93e, (q31_t)0xb752cdd8, (q31_t)0x695a47d6, (q31_t)0xb74da1db, (q31_t)0x6956b62d, (q31_t)0xb748760b,
+  (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x694f9217, (q31_t)0xb73e1ef1, (q31_t)0x694bffab, (q31_t)0xb738f3a7, (q31_t)0x69486cfe, (q31_t)0xb733c88b,
+  (q31_t)0x6944da10, (q31_t)0xb72e9d9b, (q31_t)0x694146e1, (q31_t)0xb72972d8, (q31_t)0x693db371, (q31_t)0xb7244842, (q31_t)0x693a1fc0, (q31_t)0xb71f1dd9,
+  (q31_t)0x69368bce, (q31_t)0xb719f39e, (q31_t)0x6932f79b, (q31_t)0xb714c98e, (q31_t)0x692f6328, (q31_t)0xb70f9fac, (q31_t)0x692bce73, (q31_t)0xb70a75f7,
+  (q31_t)0x6928397e, (q31_t)0xb7054c6f, (q31_t)0x6924a448, (q31_t)0xb7002314, (q31_t)0x69210ed1, (q31_t)0xb6faf9e6, (q31_t)0x691d7919, (q31_t)0xb6f5d0e5,
+  (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x69164ce7, (q31_t)0xb6eb7f6b, (q31_t)0x6912b66c, (q31_t)0xb6e656f1, (q31_t)0x690f1fb1, (q31_t)0xb6e12ea4,
+  (q31_t)0x690b88b5, (q31_t)0xb6dc0685, (q31_t)0x6907f178, (q31_t)0xb6d6de92, (q31_t)0x690459fb, (q31_t)0xb6d1b6cd, (q31_t)0x6900c23c, (q31_t)0xb6cc8f35,
+  (q31_t)0x68fd2a3d, (q31_t)0xb6c767ca, (q31_t)0x68f991fd, (q31_t)0xb6c2408c, (q31_t)0x68f5f97d, (q31_t)0xb6bd197c, (q31_t)0x68f260bb, (q31_t)0xb6b7f298,
+  (q31_t)0x68eec7b9, (q31_t)0xb6b2cbe2, (q31_t)0x68eb2e76, (q31_t)0xb6ada559, (q31_t)0x68e794f3, (q31_t)0xb6a87efd, (q31_t)0x68e3fb2e, (q31_t)0xb6a358ce,
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+  (q31_t)0x68c387e9, (q31_t)0xb6750921, (q31_t)0x68bfeb9e, (q31_t)0xb66fe4b8, (q31_t)0x68bc4f13, (q31_t)0xb66ac07c, (q31_t)0x68b8b247, (q31_t)0xb6659c6d,
+  (q31_t)0x68b5153a, (q31_t)0xb660788c, (q31_t)0x68b177ed, (q31_t)0xb65b54d8, (q31_t)0x68adda5f, (q31_t)0xb6563151, (q31_t)0x68aa3c90, (q31_t)0xb6510df8,
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+  (q31_t)0x689823bf, (q31_t)0xb6375fe5, (q31_t)0x6894846e, (q31_t)0xb6323d9d, (q31_t)0x6890e4dc, (q31_t)0xb62d1b82, (q31_t)0x688d4509, (q31_t)0xb627f995,
+  (q31_t)0x6889a4f6, (q31_t)0xb622d7d6, (q31_t)0x688604a2, (q31_t)0xb61db644, (q31_t)0x6882640e, (q31_t)0xb61894df, (q31_t)0x687ec339, (q31_t)0xb61373a9,
+  (q31_t)0x687b2224, (q31_t)0xb60e529f, (q31_t)0x687780ce, (q31_t)0xb60931c4, (q31_t)0x6873df38, (q31_t)0xb6041116, (q31_t)0x68703d62, (q31_t)0xb5fef095,
+  (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x6868f8f4, (q31_t)0xb5f4b01e, (q31_t)0x6865565c, (q31_t)0xb5ef9026, (q31_t)0x6861b384, (q31_t)0xb5ea705d,
+  (q31_t)0x685e106c, (q31_t)0xb5e550c1, (q31_t)0x685a6d13, (q31_t)0xb5e03153, (q31_t)0x6856c979, (q31_t)0xb5db1212, (q31_t)0x685325a0, (q31_t)0xb5d5f2ff,
+  (q31_t)0x684f8186, (q31_t)0xb5d0d41a, (q31_t)0x684bdd2c, (q31_t)0xb5cbb563, (q31_t)0x68483891, (q31_t)0xb5c696da, (q31_t)0x684493b6, (q31_t)0xb5c1787e,
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+  (q31_t)0x6823bcb7, (q31_t)0xb5936f53, (q31_t)0x68201559, (q31_t)0xb58e52c2, (q31_t)0x681c6dbb, (q31_t)0xb589365e, (q31_t)0x6818c5dd, (q31_t)0xb5841a29,
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+  (q31_t)0x68067ac3, (q31_t)0xb56a8fd0, (q31_t)0x6802d164, (q31_t)0xb56574ae, (q31_t)0x67ff27c4, (q31_t)0xb56059bb, (q31_t)0x67fb7de5, (q31_t)0xb55b3ef5,
+  (q31_t)0x67f7d3c5, (q31_t)0xb556245e, (q31_t)0x67f42965, (q31_t)0xb55109f5, (q31_t)0x67f07ec5, (q31_t)0xb54befba, (q31_t)0x67ecd3e5, (q31_t)0xb546d5ac,
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+  (q31_t)0x67ae54ba, (q31_t)0xb4f03663, (q31_t)0x67aaa559, (q31_t)0xb4eb1f95, (q31_t)0x67a6f5b8, (q31_t)0xb4e608f6, (q31_t)0x67a345d8, (q31_t)0xb4e0f285,
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+  (q31_t)0x6790d2b6, (q31_t)0xb4c78507, (q31_t)0x678d2156, (q31_t)0xb4c26fad, (q31_t)0x67896fb6, (q31_t)0xb4bd5a80, (q31_t)0x6785bdd6, (q31_t)0xb4b84582,
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+  (q31_t)0x677340ba, (q31_t)0xb49edf45, (q31_t)0x676f8d5b, (q31_t)0xb499cb5e, (q31_t)0x676bd9bd, (q31_t)0xb494b7a6, (q31_t)0x676825de, (q31_t)0xb48fa41c,
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+  (q31_t)0x6737ecea, (q31_t)0xb44db6a8, (q31_t)0x67343590, (q31_t)0xb448a5aa, (q31_t)0x67307df5, (q31_t)0xb44394db, (q31_t)0x672cc61c, (q31_t)0xb43e843b,
+  (q31_t)0x67290e02, (q31_t)0xb43973ca, (q31_t)0x672555a9, (q31_t)0xb4346387, (q31_t)0x67219d10, (q31_t)0xb42f5373, (q31_t)0x671de438, (q31_t)0xb42a438e,
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+  (q31_t)0x670b4444, (q31_t)0xb410f6d3, (q31_t)0x670789ee, (q31_t)0xb40be807, (q31_t)0x6703cf58, (q31_t)0xb406d969, (q31_t)0x67001483, (q31_t)0xb401cafb,
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+  (q31_t)0x66c0866d, (q31_t)0xb3abf1b2, (q31_t)0x66bcc721, (q31_t)0xb3a6e691, (q31_t)0x66b90797, (q31_t)0xb3a1dba0, (q31_t)0x66b547cd, (q31_t)0xb39cd0dd,
+  (q31_t)0x66b187c3, (q31_t)0xb397c649, (q31_t)0x66adc77b, (q31_t)0xb392bbe5, (q31_t)0x66aa06f3, (q31_t)0xb38db1b0, (q31_t)0x66a6462b, (q31_t)0xb388a7aa,
+  (q31_t)0x66a28524, (q31_t)0xb3839dd3, (q31_t)0x669ec3de, (q31_t)0xb37e942b, (q31_t)0x669b0259, (q31_t)0xb3798ab2, (q31_t)0x66974095, (q31_t)0xb3748169,
+  (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x668fbc4e, (q31_t)0xb36a6f64, (q31_t)0x668bf9cb, (q31_t)0xb36566a8, (q31_t)0x66883709, (q31_t)0xb3605e1c,
+  (q31_t)0x66847408, (q31_t)0xb35b55bf, (q31_t)0x6680b0c8, (q31_t)0xb3564d91, (q31_t)0x667ced49, (q31_t)0xb3514592, (q31_t)0x6679298a, (q31_t)0xb34c3dc3,
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+  (q31_t)0x6666531d, (q31_t)0xb333197c, (q31_t)0x66628de4, (q31_t)0xb32e12c9, (q31_t)0x665ec86b, (q31_t)0xb3290c45, (q31_t)0x665b02b3, (q31_t)0xb32405f1,
+  (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x66537685, (q31_t)0xb319f9d6, (q31_t)0x664fb010, (q31_t)0xb314f410, (q31_t)0x664be95b, (q31_t)0xb30fee79,
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+  (q31_t)0x6629e1ec, (q31_t)0xb2e2c486, (q31_t)0x662618c1, (q31_t)0xb2ddc0ca, (q31_t)0x66224f56, (q31_t)0xb2d8bd3e, (q31_t)0x661e85ad, (q31_t)0xb2d3b9e2,
+  (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5, (q31_t)0x6616f19e, (q31_t)0xb2c9b3b8, (q31_t)0x66132738, (q31_t)0xb2c4b0ea, (q31_t)0x660f5c93, (q31_t)0xb2bfae4c,
+  (q31_t)0x660b91af, (q31_t)0xb2baabde, (q31_t)0x6607c68c, (q31_t)0xb2b5a99f, (q31_t)0x6603fb2a, (q31_t)0xb2b0a790, (q31_t)0x66002f89, (q31_t)0xb2aba5b1,
+  (q31_t)0x65fc63a9, (q31_t)0xb2a6a402, (q31_t)0x65f8978b, (q31_t)0xb2a1a282, (q31_t)0x65f4cb2d, (q31_t)0xb29ca132, (q31_t)0x65f0fe91, (q31_t)0xb297a011,
+  (q31_t)0x65ed31b5, (q31_t)0xb2929f21, (q31_t)0x65e9649b, (q31_t)0xb28d9e60, (q31_t)0x65e59742, (q31_t)0xb2889dcf, (q31_t)0x65e1c9aa, (q31_t)0xb2839d6d,
+  (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65da2dbd, (q31_t)0xb2799d3a, (q31_t)0x65d65f69, (q31_t)0xb2749d68, (q31_t)0x65d290d6, (q31_t)0xb26f9dc6,
+  (q31_t)0x65cec204, (q31_t)0xb26a9e54, (q31_t)0x65caf2f3, (q31_t)0xb2659f12, (q31_t)0x65c723a3, (q31_t)0xb2609fff, (q31_t)0x65c35415, (q31_t)0xb25ba11d,
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+  (q31_t)0x65b0429f, (q31_t)0xb242a97e, (q31_t)0x65ac7198, (q31_t)0xb23dabbb, (q31_t)0x65a8a052, (q31_t)0xb238ae28, (q31_t)0x65a4cece, (q31_t)0xb233b0c5,
+  (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x659d2b09, (q31_t)0xb229b68f, (q31_t)0x659958c9, (q31_t)0xb224b9bc, (q31_t)0x6595864a, (q31_t)0xb21fbd19,
+  (q31_t)0x6591b38c, (q31_t)0xb21ac0a6, (q31_t)0x658de08f, (q31_t)0xb215c463, (q31_t)0x658a0d54, (q31_t)0xb210c850, (q31_t)0x658639db, (q31_t)0xb20bcc6d,
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+  (q31_t)0x60bae7e1, (q31_t)0xac2bcbfa, (q31_t)0x60b6ca56, (q31_t)0xac270c88, (q31_t)0x60b2ac8f, (q31_t)0xac224d4a, (q31_t)0x60ae8e8d, (q31_t)0xac1d8e40,
+  (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x60a651d7, (q31_t)0xac1410c6, (q31_t)0x60a23322, (q31_t)0xac0f5256, (q31_t)0x609e1431, (q31_t)0xac0a941b,
+  (q31_t)0x6099f505, (q31_t)0xac05d613, (q31_t)0x6095d59d, (q31_t)0xac01183f, (q31_t)0x6091b5fa, (q31_t)0xabfc5a9f, (q31_t)0x608d961b, (q31_t)0xabf79d33,
+  (q31_t)0x60897601, (q31_t)0xabf2dffb, (q31_t)0x608555ab, (q31_t)0xabee22f6, (q31_t)0x60813519, (q31_t)0xabe96625, (q31_t)0x607d144c, (q31_t)0xabe4a988,
+  (q31_t)0x6078f344, (q31_t)0xabdfed1f, (q31_t)0x6074d200, (q31_t)0xabdb30ea, (q31_t)0x6070b080, (q31_t)0xabd674e9, (q31_t)0x606c8ec5, (q31_t)0xabd1b91c,
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+  (q31_t)0x6057e2a2, (q31_t)0xabba1125, (q31_t)0x6053bf82, (q31_t)0xabb5568f, (q31_t)0x604f9c27, (q31_t)0xabb09c2e, (q31_t)0x604b7891, (q31_t)0xababe200,
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+  (q31_t)0x6036c325, (q31_t)0xab944229, (q31_t)0x60329e2a, (q31_t)0xab8f8934, (q31_t)0x602e78f4, (q31_t)0xab8ad073, (q31_t)0x602a5383, (q31_t)0xab8617e6,
+  (q31_t)0x60262dd6, (q31_t)0xab815f8d, (q31_t)0x602207ee, (q31_t)0xab7ca768, (q31_t)0x601de1ca, (q31_t)0xab77ef77, (q31_t)0x6019bb6b, (q31_t)0xab7337bb,
+  (q31_t)0x601594d1, (q31_t)0xab6e8032, (q31_t)0x60116dfc, (q31_t)0xab69c8de, (q31_t)0x600d46ec, (q31_t)0xab6511be, (q31_t)0x60091fa0, (q31_t)0xab605ad2,
+  (q31_t)0x6004f819, (q31_t)0xab5ba41a, (q31_t)0x6000d057, (q31_t)0xab56ed97, (q31_t)0x5ffca859, (q31_t)0xab523748, (q31_t)0x5ff88021, (q31_t)0xab4d812d,
+  (q31_t)0x5ff457ad, (q31_t)0xab48cb46, (q31_t)0x5ff02efe, (q31_t)0xab441593, (q31_t)0x5fec0613, (q31_t)0xab3f6015, (q31_t)0x5fe7dcee, (q31_t)0xab3aaacb,
+  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fdf89f2, (q31_t)0xab3140d4, (q31_t)0x5fdb601b, (q31_t)0xab2c8c27, (q31_t)0x5fd73609, (q31_t)0xab27d7ae,
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+  (q31_t)0x5fb1b104, (q31_t)0xaafd88a4, (q31_t)0x5fad84a3, (q31_t)0xaaf8d637, (q31_t)0x5fa95807, (q31_t)0xaaf423ff, (q31_t)0x5fa52b31, (q31_t)0xaaef71fb,
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+  (q31_t)0x5f90478a, (q31_t)0xaad7fafb, (q31_t)0x5f8c1951, (q31_t)0xaad34a32, (q31_t)0x5f87eade, (q31_t)0xaace999d, (q31_t)0x5f83bc2f, (q31_t)0xaac9e93e,
+  (q31_t)0x5f7f8d46, (q31_t)0xaac53912, (q31_t)0x5f7b5e22, (q31_t)0xaac0891c, (q31_t)0x5f772ec2, (q31_t)0xaabbd959, (q31_t)0x5f72ff28, (q31_t)0xaab729cc,
+  (q31_t)0x5f6ecf53, (q31_t)0xaab27a73, (q31_t)0x5f6a9f44, (q31_t)0xaaadcb4f, (q31_t)0x5f666ef9, (q31_t)0xaaa91c5f, (q31_t)0x5f623e73, (q31_t)0xaaa46da4,
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+  (q31_t)0x5f4d4865, (q31_t)0xaa8d0713, (q31_t)0x5f49167f, (q31_t)0xaa885994, (q31_t)0x5f44e45e, (q31_t)0xaa83ac4a, (q31_t)0x5f40b202, (q31_t)0xaa7eff34,
+  (q31_t)0x5f3c7f6b, (q31_t)0xaa7a5253, (q31_t)0x5f384c9a, (q31_t)0xaa75a5a8, (q31_t)0x5f34198e, (q31_t)0xaa70f930, (q31_t)0x5f2fe647, (q31_t)0xaa6c4cee,
+  (q31_t)0x5f2bb2c5, (q31_t)0xaa67a0e0, (q31_t)0x5f277f09, (q31_t)0xaa62f507, (q31_t)0x5f234b12, (q31_t)0xaa5e4963, (q31_t)0x5f1f16e0, (q31_t)0xaa599df4,
+  (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba, (q31_t)0x5f16adcc, (q31_t)0xaa5047b4, (q31_t)0x5f1278eb, (q31_t)0xaa4b9ce3, (q31_t)0x5f0e43ce, (q31_t)0xaa46f248,
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+  (q31_t)0x5ee85b82, (q31_t)0xaa1cfc1a, (q31_t)0x5ee4241c, (q31_t)0xaa18538f, (q31_t)0x5edfec7b, (q31_t)0xaa13ab3a, (q31_t)0x5edbb49f, (q31_t)0xaa0f0319,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5ed34439, (q31_t)0xaa05b377, (q31_t)0x5ecf0baf, (q31_t)0xaa010bf6, (q31_t)0x5ecad2e9, (q31_t)0xa9fc64a9,
+  (q31_t)0x5ec699e9, (q31_t)0xa9f7bd92, (q31_t)0x5ec260af, (q31_t)0xa9f316b0, (q31_t)0x5ebe273b, (q31_t)0xa9ee7002, (q31_t)0x5eb9ed8b, (q31_t)0xa9e9c98a,
+  (q31_t)0x5eb5b3a2, (q31_t)0xa9e52347, (q31_t)0x5eb1797e, (q31_t)0xa9e07d39, (q31_t)0x5ead3f1f, (q31_t)0xa9dbd761, (q31_t)0x5ea90487, (q31_t)0xa9d731bd,
+  (q31_t)0x5ea4c9b3, (q31_t)0xa9d28c4e, (q31_t)0x5ea08ea6, (q31_t)0xa9cde715, (q31_t)0x5e9c535e, (q31_t)0xa9c94211, (q31_t)0x5e9817dc, (q31_t)0xa9c49d42,
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+  (q31_t)0x5e82eae5, (q31_t)0xa9ad6855, (q31_t)0x5e7eae05, (q31_t)0xa9a8c4c5, (q31_t)0x5e7a70ea, (q31_t)0xa9a4216b, (q31_t)0x5e763395, (q31_t)0xa99f7e46,
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+  (q31_t)0x5e60fd84, (q31_t)0xa98851ac, (q31_t)0x5e5cbed1, (q31_t)0xa983afc6, (q31_t)0x5e587fe5, (q31_t)0xa97f0e16, (q31_t)0x5e5440be, (q31_t)0xa97a6c9c,
+  (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e4bc1c2, (q31_t)0xa9712a47, (q31_t)0x5e4781ed, (q31_t)0xa96c896c, (q31_t)0x5e4341de, (q31_t)0xa967e8c7,
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+  (q31_t)0x5e1cf71c, (q31_t)0xa93e4c5f, (q31_t)0x5e18b4c8, (q31_t)0xa939add1, (q31_t)0x5e147239, (q31_t)0xa9350f78, (q31_t)0x5e102f71, (q31_t)0xa9307155,
+  (q31_t)0x5e0bec6e, (q31_t)0xa92bd367, (q31_t)0x5e07a932, (q31_t)0xa92735af, (q31_t)0x5e0365bb, (q31_t)0xa922982c, (q31_t)0x5dff220b, (q31_t)0xa91dfadf,
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+  (q31_t)0x5de9cc33, (q31_t)0xa906eb82, (q31_t)0x5de58727, (q31_t)0xa9024f76, (q31_t)0x5de141e1, (q31_t)0xa8fdb3a1, (q31_t)0x5ddcfc61, (q31_t)0xa8f91801,
+  (q31_t)0x5dd8b6a7, (q31_t)0xa8f47c97, (q31_t)0x5dd470b3, (q31_t)0xa8efe162, (q31_t)0x5dd02a85, (q31_t)0xa8eb4663, (q31_t)0x5dcbe41d, (q31_t)0xa8e6ab9a,
+  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5dc356a1, (q31_t)0xa8dd76a9, (q31_t)0x5dbf0f8c, (q31_t)0xa8d8dc81, (q31_t)0x5dbac83d, (q31_t)0xa8d4428f,
+  (q31_t)0x5db680b4, (q31_t)0xa8cfa8d2, (q31_t)0x5db238f1, (q31_t)0xa8cb0f4b, (q31_t)0x5dadf0f5, (q31_t)0xa8c675fb, (q31_t)0x5da9a8bf, (q31_t)0xa8c1dce0,
+  (q31_t)0x5da5604f, (q31_t)0xa8bd43fa, (q31_t)0x5da117a5, (q31_t)0xa8b8ab4b, (q31_t)0x5d9ccec2, (q31_t)0xa8b412d1, (q31_t)0x5d9885a5, (q31_t)0xa8af7a8e,
+  (q31_t)0x5d943c4e, (q31_t)0xa8aae280, (q31_t)0x5d8ff2bd, (q31_t)0xa8a64aa8, (q31_t)0x5d8ba8f3, (q31_t)0xa8a1b306, (q31_t)0x5d875eef, (q31_t)0xa89d1b99,
+  (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d7eca39, (q31_t)0xa893ed63, (q31_t)0x5d7a7f88, (q31_t)0xa88f5698, (q31_t)0x5d76349d, (q31_t)0xa88ac004,
+  (q31_t)0x5d71e979, (q31_t)0xa88629a5, (q31_t)0x5d6d9e1b, (q31_t)0xa881937c, (q31_t)0x5d695283, (q31_t)0xa87cfd8a, (q31_t)0x5d6506b2, (q31_t)0xa87867cd,
+  (q31_t)0x5d60baa7, (q31_t)0xa873d246, (q31_t)0x5d5c6e62, (q31_t)0xa86f3cf6, (q31_t)0x5d5821e4, (q31_t)0xa86aa7db, (q31_t)0x5d53d52d, (q31_t)0xa86612f6,
+  (q31_t)0x5d4f883b, (q31_t)0xa8617e48, (q31_t)0x5d4b3b10, (q31_t)0xa85ce9cf, (q31_t)0x5d46edac, (q31_t)0xa858558d, (q31_t)0x5d42a00e, (q31_t)0xa853c180,
+  (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5d3a0426, (q31_t)0xa84a9a0a, (q31_t)0x5d35b5db, (q31_t)0xa84606a0, (q31_t)0x5d316757, (q31_t)0xa841736c,
+  (q31_t)0x5d2d189a, (q31_t)0xa83ce06e, (q31_t)0x5d28c9a3, (q31_t)0xa8384da6, (q31_t)0x5d247a72, (q31_t)0xa833bb14, (q31_t)0x5d202b09, (q31_t)0xa82f28b9,
+  (q31_t)0x5d1bdb65, (q31_t)0xa82a9693, (q31_t)0x5d178b89, (q31_t)0xa82604a4, (q31_t)0x5d133b72, (q31_t)0xa82172eb, (q31_t)0x5d0eeb23, (q31_t)0xa81ce169,
+  (q31_t)0x5d0a9a9a, (q31_t)0xa818501c, (q31_t)0x5d0649d7, (q31_t)0xa813bf06, (q31_t)0x5d01f8dc, (q31_t)0xa80f2e26, (q31_t)0x5cfda7a7, (q31_t)0xa80a9d7c,
+  (q31_t)0x5cf95638, (q31_t)0xa8060d08, (q31_t)0x5cf50490, (q31_t)0xa8017ccb, (q31_t)0x5cf0b2af, (q31_t)0xa7fcecc4, (q31_t)0x5cec6095, (q31_t)0xa7f85cf3,
+  (q31_t)0x5ce80e41, (q31_t)0xa7f3cd59, (q31_t)0x5ce3bbb4, (q31_t)0xa7ef3df5, (q31_t)0x5cdf68ed, (q31_t)0xa7eaaec7, (q31_t)0x5cdb15ed, (q31_t)0xa7e61fd0,
+  (q31_t)0x5cd6c2b5, (q31_t)0xa7e1910f, (q31_t)0x5cd26f42, (q31_t)0xa7dd0284, (q31_t)0x5cce1b97, (q31_t)0xa7d8742f, (q31_t)0x5cc9c7b2, (q31_t)0xa7d3e611,
+  (q31_t)0x5cc57394, (q31_t)0xa7cf582a, (q31_t)0x5cc11f3d, (q31_t)0xa7caca79, (q31_t)0x5cbccaac, (q31_t)0xa7c63cfe, (q31_t)0x5cb875e3, (q31_t)0xa7c1afb9,
+  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5cafcba4, (q31_t)0xa7b895d4, (q31_t)0x5cab762f, (q31_t)0xa7b40933, (q31_t)0x5ca72080, (q31_t)0xa7af7cc8,
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+  (q31_t)0x5c9170bf, (q31_t)0xa798c1e5, (q31_t)0x5c8d19ba, (q31_t)0xa79436c1, (q31_t)0x5c88c27c, (q31_t)0xa78fabd4, (q31_t)0x5c846b05, (q31_t)0xa78b211e,
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+  (q31_t)0x5c4be5b0, (q31_t)0xa7502943, (q31_t)0x5c478b1b, (q31_t)0xa74ba18a, (q31_t)0x5c43304d, (q31_t)0xa7471a07, (q31_t)0x5c3ed545, (q31_t)0xa74292bb,
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+  (q31_t)0x5c179806, (q31_t)0xa719daae, (q31_t)0x5c133ac6, (q31_t)0xa7155586, (q31_t)0x5c0edd4e, (q31_t)0xa710d095, (q31_t)0x5c0a7f9c, (q31_t)0xa70c4bda,
+  (q31_t)0x5c0621b2, (q31_t)0xa707c757, (q31_t)0x5c01c38f, (q31_t)0xa703430a, (q31_t)0x5bfd6534, (q31_t)0xa6febef4, (q31_t)0x5bf906a0, (q31_t)0xa6fa3b15,
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+  (q31_t)0x5b79ef96, (q31_t)0xa677a84e, (q31_t)0x5b758a60, (q31_t)0xa6732ae3, (q31_t)0x5b7124f2, (q31_t)0xa66eadb0, (q31_t)0x5b6cbf4c, (q31_t)0xa66a30b3,
+  (q31_t)0x5b68596d, (q31_t)0xa665b3ee, (q31_t)0x5b63f355, (q31_t)0xa6613760, (q31_t)0x5b5f8d06, (q31_t)0xa65cbb0a, (q31_t)0x5b5b267e, (q31_t)0xa6583eeb,
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+  (q31_t)0x5b452288, (q31_t)0xa641d58c, (q31_t)0x5b40baae, (q31_t)0xa63d5ab9, (q31_t)0x5b3c529c, (q31_t)0xa638e01d, (q31_t)0x5b37ea51, (q31_t)0xa63465b9,
+  (q31_t)0x5b3381ce, (q31_t)0xa62feb8b, (q31_t)0x5b2f1913, (q31_t)0xa62b7196, (q31_t)0x5b2ab020, (q31_t)0xa626f7d7, (q31_t)0x5b2646f4, (q31_t)0xa6227e50,
+  (q31_t)0x5b21dd90, (q31_t)0xa61e0501, (q31_t)0x5b1d73f4, (q31_t)0xa6198be9, (q31_t)0x5b190a20, (q31_t)0xa6151308, (q31_t)0x5b14a014, (q31_t)0xa6109a5f,
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+  (q31_t)0x5ac973b5, (q31_t)0xa5c4b855, (q31_t)0x5ac505b7, (q31_t)0xa5c04395, (q31_t)0x5ac09781, (q31_t)0xa5bbcf0b, (q31_t)0x5abc2912, (q31_t)0xa5b75aba,
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+  (q31_t)0x592e5e19, (q31_t)0xa42e568f, (q31_t)0x5929dc29, (q31_t)0xa429f5fd, (q31_t)0x59255a02, (q31_t)0xa42595a3, (q31_t)0x5920d7a3, (q31_t)0xa4213581,
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+  (q31_t)0x58673e1b, (q31_t)0xa36e8f41, (q31_t)0x5862b2c1, (q31_t)0xa36a3875, (q31_t)0x585e2730, (q31_t)0xa365e1e2, (q31_t)0x58599b69, (q31_t)0xa3618b88,
+  (q31_t)0x58550f6c, (q31_t)0xa35d3567, (q31_t)0x58508338, (q31_t)0xa358df80, (q31_t)0x584bf6cd, (q31_t)0xa35489d1, (q31_t)0x58476a2c, (q31_t)0xa350345c,
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+  (q31_t)0x524295f0, (q31_t)0x9deeaa82, (q31_t)0x523dc57b, (q31_t)0x9deaa0ea, (q31_t)0x5238f4d4, (q31_t)0x9de6978f, (q31_t)0x523423fb, (q31_t)0x9de28e70,
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+  (q31_t)0x5208c36a, (q31_t)0x9dbe4701, (q31_t)0x5203f096, (q31_t)0x9dba4040, (q31_t)0x51ff1d8f, (q31_t)0x9db639bb, (q31_t)0x51fa4a56, (q31_t)0x9db23373,
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+  (q31_t)0x51bb7e75, (q31_t)0x9d7df75f, (q31_t)0x51b6a879, (q31_t)0x9d79f469, (q31_t)0x51b1d24a, (q31_t)0x9d75f1b0, (q31_t)0x51acfbe9, (q31_t)0x9d71ef34,
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+  (q31_t)0x518169a5, (q31_t)0x9d4de385, (q31_t)0x517c914c, (q31_t)0x9d49e368, (q31_t)0x5177b8c2, (q31_t)0x9d45e389, (q31_t)0x5172e005, (q31_t)0x9d41e3e7,
+  (q31_t)0x516e0715, (q31_t)0x9d3de482, (q31_t)0x51692df4, (q31_t)0x9d39e559, (q31_t)0x516454a0, (q31_t)0x9d35e66e, (q31_t)0x515f7b1a, (q31_t)0x9d31e7bf,
+  (q31_t)0x515aa162, (q31_t)0x9d2de94d, (q31_t)0x5155c778, (q31_t)0x9d29eb19, (q31_t)0x5150ed5c, (q31_t)0x9d25ed21, (q31_t)0x514c130d, (q31_t)0x9d21ef66,
+  (q31_t)0x5147388c, (q31_t)0x9d1df1e9, (q31_t)0x51425dd9, (q31_t)0x9d19f4a8, (q31_t)0x513d82f4, (q31_t)0x9d15f7a4, (q31_t)0x5138a7dd, (q31_t)0x9d11fadd,
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+  (q31_t)0x51205d7b, (q31_t)0x9cfe0e8f, (q31_t)0x511b8137, (q31_t)0x9cfa1337, (q31_t)0x5116a4c1, (q31_t)0x9cf6181c, (q31_t)0x5111c81a, (q31_t)0x9cf21d3d,
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+  (q31_t)0x50ab814d, (q31_t)0x9c9ec033, (q31_t)0x50a6a05c, (q31_t)0x9c9aca97, (q31_t)0x50a1bf39, (q31_t)0x9c96d539, (q31_t)0x509cdde4, (q31_t)0x9c92e017,
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+  (q31_t)0x5070e92f, (q31_t)0x9c6f4cb6, (q31_t)0x506c05ea, (q31_t)0x9c6b59fa, (q31_t)0x50672273, (q31_t)0x9c67677c, (q31_t)0x50623ecb, (q31_t)0x9c63753c,
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+  (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x501db743, (q31_t)0x9c2c4eec, (q31_t)0x5018d0b4, (q31_t)0x9c286046, (q31_t)0x5013e9f4, (q31_t)0x9c2471de,
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+  (q31_t)0x4f857269, (q31_t)0x9bb2d8de, (q31_t)0x4f8085e4, (q31_t)0x9baef1b2, (q31_t)0x4f7b992d, (q31_t)0x9bab0ac3, (q31_t)0x4f76ac46, (q31_t)0x9ba72413,
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+  (q31_t)0x4f4a4f89, (q31_t)0x9b8412c1, (q31_t)0x4f4560b8, (q31_t)0x9b802e7b, (q31_t)0x4f4071b6, (q31_t)0x9b7c4a74, (q31_t)0x4f3b8284, (q31_t)0x9b7866ab,
+  (q31_t)0x4f369320, (q31_t)0x9b748320, (q31_t)0x4f31a38c, (q31_t)0x9b709fd3, (q31_t)0x4f2cb3c7, (q31_t)0x9b6cbcc4, (q31_t)0x4f27c3d1, (q31_t)0x9b68d9f3,
+  (q31_t)0x4f22d3aa, (q31_t)0x9b64f760, (q31_t)0x4f1de352, (q31_t)0x9b61150b, (q31_t)0x4f18f2c9, (q31_t)0x9b5d32f4, (q31_t)0x4f140210, (q31_t)0x9b59511c,
+  (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4f0a200b, (q31_t)0x9b518e24, (q31_t)0x4f052ec0, (q31_t)0x9b4dad06, (q31_t)0x4f003d43, (q31_t)0x9b49cc26,
+  (q31_t)0x4efb4b96, (q31_t)0x9b45eb83, (q31_t)0x4ef659b8, (q31_t)0x9b420b1f, (q31_t)0x4ef167aa, (q31_t)0x9b3e2af9, (q31_t)0x4eec756b, (q31_t)0x9b3a4b11,
+  (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ee2905a, (q31_t)0x9b328bfc, (q31_t)0x4edd9d89, (q31_t)0x9b2eaccf, (q31_t)0x4ed8aa87, (q31_t)0x9b2acde0,
+  (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f, (q31_t)0x4ecec3f2, (q31_t)0x9b2310bc, (q31_t)0x4ec9d05e, (q31_t)0x9b1f3288, (q31_t)0x4ec4dc99, (q31_t)0x9b1b5492,
+  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4ebaf47f, (q31_t)0x9b139960, (q31_t)0x4eb60029, (q31_t)0x9b0fbc24, (q31_t)0x4eb10ba2, (q31_t)0x9b0bdf27,
+  (q31_t)0x4eac16eb, (q31_t)0x9b080268, (q31_t)0x4ea72203, (q31_t)0x9b0425e8, (q31_t)0x4ea22ceb, (q31_t)0x9b0049a5, (q31_t)0x4e9d37a3, (q31_t)0x9afc6da1,
+  (q31_t)0x4e984229, (q31_t)0x9af891db, (q31_t)0x4e934c80, (q31_t)0x9af4b654, (q31_t)0x4e8e56a5, (q31_t)0x9af0db0b, (q31_t)0x4e89609b, (q31_t)0x9aed0000,
+  (q31_t)0x4e846a60, (q31_t)0x9ae92533, (q31_t)0x4e7f73f4, (q31_t)0x9ae54aa5, (q31_t)0x4e7a7d58, (q31_t)0x9ae17056, (q31_t)0x4e75868c, (q31_t)0x9add9644,
+  (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e6b9862, (q31_t)0x9ad5e2dd, (q31_t)0x4e66a105, (q31_t)0x9ad20987, (q31_t)0x4e61a977, (q31_t)0x9ace306f,
+  (q31_t)0x4e5cb1b9, (q31_t)0x9aca5795, (q31_t)0x4e57b9ca, (q31_t)0x9ac67efb, (q31_t)0x4e52c1ab, (q31_t)0x9ac2a69e, (q31_t)0x4e4dc95c, (q31_t)0x9abece80,
+  (q31_t)0x4e48d0dd, (q31_t)0x9abaf6a1, (q31_t)0x4e43d82d, (q31_t)0x9ab71eff, (q31_t)0x4e3edf4d, (q31_t)0x9ab3479d, (q31_t)0x4e39e63d, (q31_t)0x9aaf7079,
+  (q31_t)0x4e34ecfc, (q31_t)0x9aab9993, (q31_t)0x4e2ff38b, (q31_t)0x9aa7c2ec, (q31_t)0x4e2af9ea, (q31_t)0x9aa3ec83, (q31_t)0x4e260019, (q31_t)0x9aa01659,
+  (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e1c0be6, (q31_t)0x9a986ac1, (q31_t)0x4e171184, (q31_t)0x9a949552, (q31_t)0x4e1216f2, (q31_t)0x9a90c022,
+  (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31, (q31_t)0x4e08213e, (q31_t)0x9a89167e, (q31_t)0x4e03261b, (q31_t)0x9a85420a, (q31_t)0x4dfe2ac9, (q31_t)0x9a816dd5,
+  (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4df43393, (q31_t)0x9a79c625, (q31_t)0x4def37b0, (q31_t)0x9a75f2ac, (q31_t)0x4dea3b9d, (q31_t)0x9a721f71,
+  (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74, (q31_t)0x4de042e7, (q31_t)0x9a6a79b6, (q31_t)0x4ddb4644, (q31_t)0x9a66a737, (q31_t)0x4dd64971, (q31_t)0x9a62d4f7,
+  (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dcc4f3b, (q31_t)0x9a5b3132, (q31_t)0x4dc751d8, (q31_t)0x9a575fae, (q31_t)0x4dc25445, (q31_t)0x9a538e68,
+  (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4db8588f, (q31_t)0x9a4bec99, (q31_t)0x4db35a6c, (q31_t)0x9a481c0f, (q31_t)0x4dae5c19, (q31_t)0x9a444bc5,
+  (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4da45ee3, (q31_t)0x9a3cabeb, (q31_t)0x4d9f6001, (q31_t)0x9a38dc5d, (q31_t)0x4d9a60ee, (q31_t)0x9a350d0d,
+  (q31_t)0x4d9561ac, (q31_t)0x9a313dfc, (q31_t)0x4d90623a, (q31_t)0x9a2d6f2a, (q31_t)0x4d8b6298, (q31_t)0x9a29a097, (q31_t)0x4d8662c6, (q31_t)0x9a25d243,
+  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d7c6293, (q31_t)0x9a1e3656, (q31_t)0x4d776231, (q31_t)0x9a1a68be, (q31_t)0x4d7261a0, (q31_t)0x9a169b65,
+  (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d685fef, (q31_t)0x9a0f016f, (q31_t)0x4d635ece, (q31_t)0x9a0b34d3, (q31_t)0x4d5e5d7e, (q31_t)0x9a076875,
+  (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d545a4f, (q31_t)0x99ffd077, (q31_t)0x4d4f5870, (q31_t)0x99fc04d6, (q31_t)0x4d4a5661, (q31_t)0x99f83974,
+  (q31_t)0x4d455422, (q31_t)0x99f46e51, (q31_t)0x4d4051b4, (q31_t)0x99f0a36d, (q31_t)0x4d3b4f16, (q31_t)0x99ecd8c8, (q31_t)0x4d364c48, (q31_t)0x99e90e62,
+  (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d2c461e, (q31_t)0x99e17a53, (q31_t)0x4d2742c2, (q31_t)0x99ddb0aa, (q31_t)0x4d223f36, (q31_t)0x99d9e73f,
+  (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14, (q31_t)0x4d18378f, (q31_t)0x99d25528, (q31_t)0x4d133374, (q31_t)0x99ce8c7b, (q31_t)0x4d0e2f2a, (q31_t)0x99cac40d,
+  (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4d042607, (q31_t)0x99c333ee, (q31_t)0x4cff212e, (q31_t)0x99bf6c3d, (q31_t)0x4cfa1c26, (q31_t)0x99bba4cb,
+  (q31_t)0x4cf516ee, (q31_t)0x99b7dd99, (q31_t)0x4cf01187, (q31_t)0x99b416a5, (q31_t)0x4ceb0bf0, (q31_t)0x99b04ff0, (q31_t)0x4ce6062a, (q31_t)0x99ac897b,
+  (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4cdbfa0f, (q31_t)0x99a4fd4d, (q31_t)0x4cd6f3bb, (q31_t)0x99a13795, (q31_t)0x4cd1ed37, (q31_t)0x999d721c,
+  (q31_t)0x4ccce684, (q31_t)0x9999ace3, (q31_t)0x4cc7dfa1, (q31_t)0x9995e7e8, (q31_t)0x4cc2d88f, (q31_t)0x9992232d, (q31_t)0x4cbdd14e, (q31_t)0x998e5eb1,
+  (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4cb3c23d, (q31_t)0x9986d676, (q31_t)0x4caeba6e, (q31_t)0x998312b7, (q31_t)0x4ca9b26f, (q31_t)0x997f4f38,
+  (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8, (q31_t)0x4c9fa1e4, (q31_t)0x9977c8f7, (q31_t)0x4c9a9958, (q31_t)0x99740635, (q31_t)0x4c95909c, (q31_t)0x997043b2,
+  (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c8b7e97, (q31_t)0x9968bf6b, (q31_t)0x4c86754e, (q31_t)0x9964fda7, (q31_t)0x4c816bd5, (q31_t)0x99613c22,
+  (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c775856, (q31_t)0x9959b9d5, (q31_t)0x4c724e50, (q31_t)0x9955f90d, (q31_t)0x4c6d441b, (q31_t)0x99523885,
+  (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c632f23, (q31_t)0x994ab833, (q31_t)0x4c5e2460, (q31_t)0x9946f869, (q31_t)0x4c59196f, (q31_t)0x994338df,
+  (q31_t)0x4c540e4e, (q31_t)0x993f7993, (q31_t)0x4c4f02fe, (q31_t)0x993bba87, (q31_t)0x4c49f77f, (q31_t)0x9937fbbb, (q31_t)0x4c44ebd1, (q31_t)0x99343d2e,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c3ad3e7, (q31_t)0x992cc0d2, (q31_t)0x4c35c7ac, (q31_t)0x99290303, (q31_t)0x4c30bb42, (q31_t)0x99254574,
+  (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c26a1e1, (q31_t)0x991dcb13, (q31_t)0x4c2194e9, (q31_t)0x991a0e42, (q31_t)0x4c1c87c3, (q31_t)0x991651b1,
+  (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c126cea, (q31_t)0x990ed94c, (q31_t)0x4c0d5f37, (q31_t)0x990b1d79, (q31_t)0x4c085156, (q31_t)0x990761e5,
+  (q31_t)0x4c034345, (q31_t)0x9903a691, (q31_t)0x4bfe3505, (q31_t)0x98ffeb7d, (q31_t)0x4bf92697, (q31_t)0x98fc30a8, (q31_t)0x4bf417f9, (q31_t)0x98f87612,
+  (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4be9fa32, (q31_t)0x98f101a6, (q31_t)0x4be4eb08, (q31_t)0x98ed47cf, (q31_t)0x4bdfdbaf, (q31_t)0x98e98e38,
+  (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0, (q31_t)0x4bd5bc72, (q31_t)0x98e21bc8, (q31_t)0x4bd0ac8d, (q31_t)0x98de62f0, (q31_t)0x4bcb9c79, (q31_t)0x98daaa57,
+  (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bc17bc5, (q31_t)0x98d339e4, (q31_t)0x4bbc6b25, (q31_t)0x98cf820b, (q31_t)0x4bb75a56, (q31_t)0x98cbca70,
+  (q31_t)0x4bb24958, (q31_t)0x98c81316, (q31_t)0x4bad382c, (q31_t)0x98c45bfb, (q31_t)0x4ba826d1, (q31_t)0x98c0a520, (q31_t)0x4ba31548, (q31_t)0x98bcee84,
+  (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b98f1a9, (q31_t)0x98b5820c, (q31_t)0x4b93df93, (q31_t)0x98b1cc30, (q31_t)0x4b8ecd4f, (q31_t)0x98ae1693,
+  (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b84a83b, (q31_t)0x98a6ac19, (q31_t)0x4b7f956b, (q31_t)0x98a2f73c, (q31_t)0x4b7a826d, (q31_t)0x989f429e,
+  (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b705be4, (q31_t)0x9897da22, (q31_t)0x4b6b485a, (q31_t)0x98942643, (q31_t)0x4b6634a2, (q31_t)0x989072a5,
+  (q31_t)0x4b6120bb, (q31_t)0x988cbf46, (q31_t)0x4b5c0ca5, (q31_t)0x98890c27, (q31_t)0x4b56f861, (q31_t)0x98855948, (q31_t)0x4b51e3ee, (q31_t)0x9881a6a9,
+  (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b47ba7e, (q31_t)0x987a422a, (q31_t)0x4b42a580, (q31_t)0x9876904a, (q31_t)0x4b3d9053, (q31_t)0x9872deaa,
+  (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b336570, (q31_t)0x986b7c2a, (q31_t)0x4b2e4fb8, (q31_t)0x9867cb4a, (q31_t)0x4b2939d2, (q31_t)0x98641aa9,
+  (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b1f0d7b, (q31_t)0x985cba28, (q31_t)0x4b19f70a, (q31_t)0x98590a48, (q31_t)0x4b14e06b, (q31_t)0x98555aa7,
+  (q31_t)0x4b0fc99d, (q31_t)0x9851ab46, (q31_t)0x4b0ab2a1, (q31_t)0x984dfc26, (q31_t)0x4b059b77, (q31_t)0x984a4d45, (q31_t)0x4b00841f, (q31_t)0x98469ea4,
+  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4af654e3, (q31_t)0x983f4223, (q31_t)0x4af13d00, (q31_t)0x983b9442, (q31_t)0x4aec24ee, (q31_t)0x9837e6a1,
+  (q31_t)0x4ae70caf, (q31_t)0x98343940, (q31_t)0x4ae1f441, (q31_t)0x98308c1f, (q31_t)0x4adcdba5, (q31_t)0x982cdf3f, (q31_t)0x4ad7c2da, (q31_t)0x9829329e,
+  (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4acd90bb, (q31_t)0x9821da1d, (q31_t)0x4ac87767, (q31_t)0x981e2e3c, (q31_t)0x4ac35de4, (q31_t)0x981a829c,
+  (q31_t)0x4abe4433, (q31_t)0x9816d73b, (q31_t)0x4ab92a54, (q31_t)0x98132c1b, (q31_t)0x4ab41046, (q31_t)0x980f813b, (q31_t)0x4aaef60b, (q31_t)0x980bd69b,
+  (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4aa4c10b, (q31_t)0x9804821b, (q31_t)0x4a9fa645, (q31_t)0x9800d83c, (q31_t)0x4a9a8b52, (q31_t)0x97fd2e9c,
+  (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a9054e1, (q31_t)0x97f5dc1e, (q31_t)0x4a8b3963, (q31_t)0x97f2333f, (q31_t)0x4a861db8, (q31_t)0x97ee8aa0,
+  (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a7be5d7, (q31_t)0x97e73a23, (q31_t)0x4a76c9a2, (q31_t)0x97e39245, (q31_t)0x4a71ad3e, (q31_t)0x97dfeaa7,
+  (q31_t)0x4a6c90ad, (q31_t)0x97dc4349, (q31_t)0x4a6773ee, (q31_t)0x97d89c2c, (q31_t)0x4a625701, (q31_t)0x97d4f54f, (q31_t)0x4a5d39e6, (q31_t)0x97d14eb2,
+  (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a52ff27, (q31_t)0x97ca0239, (q31_t)0x4a4de182, (q31_t)0x97c65c5c, (q31_t)0x4a48c3b0, (q31_t)0x97c2b6c1,
+  (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a3e8782, (q31_t)0x97bb6c4a, (q31_t)0x4a396926, (q31_t)0x97b7c76f, (q31_t)0x4a344a9d, (q31_t)0x97b422d4,
+  (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a2a0d01, (q31_t)0x97acda60, (q31_t)0x4a24edee, (q31_t)0x97a93687, (q31_t)0x4a1fcead, (q31_t)0x97a592ed,
+  (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94, (q31_t)0x4a158fa3, (q31_t)0x979e4c7c, (q31_t)0x4a106fda, (q31_t)0x979aa9a4, (q31_t)0x4a0b4fe2, (q31_t)0x9797070c,
+  (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x4a010f6b, (q31_t)0x978fc29e, (q31_t)0x49fbeeea, (q31_t)0x978c20c8, (q31_t)0x49f6ce3c, (q31_t)0x97887f32,
+  (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49ec8c57, (q31_t)0x97813cc7, (q31_t)0x49e76b21, (q31_t)0x977d9bf2, (q31_t)0x49e249bc, (q31_t)0x9779fb5e,
+  (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49d8066b, (q31_t)0x9772baf7, (q31_t)0x49d2e47e, (q31_t)0x976f1b24, (q31_t)0x49cdc263, (q31_t)0x976b7b92,
+  (q31_t)0x49c8a01b, (q31_t)0x9767dc41, (q31_t)0x49c37da5, (q31_t)0x97643d2f, (q31_t)0x49be5b02, (q31_t)0x97609e5f, (q31_t)0x49b93832, (q31_t)0x975cffcf,
+  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x49aef208, (q31_t)0x9755c370, (q31_t)0x49a9ceaf, (q31_t)0x975225a1, (q31_t)0x49a4ab28, (q31_t)0x974e8813,
+  (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x499a6393, (q31_t)0x97474db9, (q31_t)0x49953f84, (q31_t)0x9743b0ed, (q31_t)0x49901b48, (q31_t)0x97401462,
+  (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x4985d248, (q31_t)0x9738dc0d, (q31_t)0x4980ad84, (q31_t)0x97354043, (q31_t)0x497b8892, (q31_t)0x9731a4ba,
+  (q31_t)0x49766373, (q31_t)0x972e0971, (q31_t)0x49713e27, (q31_t)0x972a6e6a, (q31_t)0x496c18ae, (q31_t)0x9726d3a3, (q31_t)0x4966f307, (q31_t)0x9723391c,
+  (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x495ca732, (q31_t)0x971c04d2, (q31_t)0x49578103, (q31_t)0x97186b0d, (q31_t)0x49525aa7, (q31_t)0x9714d18a,
+  (q31_t)0x494d341e, (q31_t)0x97113847, (q31_t)0x49480d68, (q31_t)0x970d9f45, (q31_t)0x4942e684, (q31_t)0x970a0683, (q31_t)0x493dbf74, (q31_t)0x97066e03,
+  (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x493370cb, (q31_t)0x96ff3dc4, (q31_t)0x492e4933, (q31_t)0x96fba605, (q31_t)0x4929216e, (q31_t)0x96f80e88,
+  (q31_t)0x4923f97b, (q31_t)0x96f4774b, (q31_t)0x491ed15c, (q31_t)0x96f0e04f, (q31_t)0x4919a90f, (q31_t)0x96ed4994, (q31_t)0x49148095, (q31_t)0x96e9b319,
+  (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x490a2f1b, (q31_t)0x96e286e7, (q31_t)0x4905061a, (q31_t)0x96def12f, (q31_t)0x48ffdcec, (q31_t)0x96db5bb8,
+  (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48f58a09, (q31_t)0x96d4318d, (q31_t)0x48f06054, (q31_t)0x96d09cd8, (q31_t)0x48eb3672, (q31_t)0x96cd0865,
+  (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48e0e227, (q31_t)0x96c5e040, (q31_t)0x48dbb7be, (q31_t)0x96c24c8f, (q31_t)0x48d68d28, (q31_t)0x96beb91f,
+  (q31_t)0x48d16265, (q31_t)0x96bb25f0, (q31_t)0x48cc3775, (q31_t)0x96b79302, (q31_t)0x48c70c59, (q31_t)0x96b40055, (q31_t)0x48c1e10f, (q31_t)0x96b06de9,
+  (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48b789f5, (q31_t)0x96a949d3, (q31_t)0x48b25e25, (q31_t)0x96a5b82a, (q31_t)0x48ad3228, (q31_t)0x96a226c2,
+  (q31_t)0x48a805ff, (q31_t)0x969e959b, (q31_t)0x48a2d9a8, (q31_t)0x969b04b4, (q31_t)0x489dad25, (q31_t)0x9697740f, (q31_t)0x48988074, (q31_t)0x9693e3ab,
+  (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x488e268e, (q31_t)0x968cc3a5, (q31_t)0x4888f957, (q31_t)0x96893404, (q31_t)0x4883cbf4, (q31_t)0x9685a4a4,
+  (q31_t)0x487e9e64, (q31_t)0x96821585, (q31_t)0x487970a7, (q31_t)0x967e86a7, (q31_t)0x487442be, (q31_t)0x967af80a, (q31_t)0x486f14a8, (q31_t)0x967769af,
+  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4864b7f5, (q31_t)0x96704dba, (q31_t)0x485f8959, (q31_t)0x966cc022, (q31_t)0x485a5a90, (q31_t)0x966932cb,
+  (q31_t)0x48552b9b, (q31_t)0x9665a5b4, (q31_t)0x484ffc79, (q31_t)0x966218df, (q31_t)0x484acd2a, (q31_t)0x965e8c4b, (q31_t)0x48459daf, (q31_t)0x965afff9,
+  (q31_t)0x48406e08, (q31_t)0x965773e7, (q31_t)0x483b3e33, (q31_t)0x9653e817, (q31_t)0x48360e32, (q31_t)0x96505c88, (q31_t)0x4830de05, (q31_t)0x964cd139,
+  (q31_t)0x482badab, (q31_t)0x9649462d, (q31_t)0x48267d24, (q31_t)0x9645bb61, (q31_t)0x48214c71, (q31_t)0x964230d7, (q31_t)0x481c1b92, (q31_t)0x963ea68d,
+  (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x4811b94d, (q31_t)0x963792bf, (q31_t)0x480c87e8, (q31_t)0x96340939, (q31_t)0x48075657, (q31_t)0x96307ff5,
+  (q31_t)0x48022499, (q31_t)0x962cf6f2, (q31_t)0x47fcf2af, (q31_t)0x96296e31, (q31_t)0x47f7c099, (q31_t)0x9625e5b0, (q31_t)0x47f28e56, (q31_t)0x96225d71,
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+  (q31_t)0x478546de, (q31_t)0x95d86b3f, (q31_t)0x478010cd, (q31_t)0x95d4e89f, (q31_t)0x477ada91, (q31_t)0x95d16640, (q31_t)0x4775a428, (q31_t)0x95cde423,
+  (q31_t)0x47706d93, (q31_t)0x95ca6247, (q31_t)0x476b36d3, (q31_t)0x95c6e0ac, (q31_t)0x4765ffe6, (q31_t)0x95c35f53, (q31_t)0x4760c8cd, (q31_t)0x95bfde3c,
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+  (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46c40420, (q31_t)0x955734b2, (q31_t)0x46bec7b8, (q31_t)0x9553bb8e, (q31_t)0x46b98b24, (q31_t)0x955042ac,
+  (q31_t)0x46b44e65, (q31_t)0x954cca0c, (q31_t)0x46af117a, (q31_t)0x954951ae, (q31_t)0x46a9d464, (q31_t)0x9545d992, (q31_t)0x46a49722, (q31_t)0x954261b7,
+  (q31_t)0x469f59b4, (q31_t)0x953eea1e, (q31_t)0x469a1c1b, (q31_t)0x953b72c7, (q31_t)0x4694de56, (q31_t)0x9537fbb2, (q31_t)0x468fa066, (q31_t)0x953484df,
+  (q31_t)0x468a624a, (q31_t)0x95310e4e, (q31_t)0x46852403, (q31_t)0x952d97fe, (q31_t)0x467fe590, (q31_t)0x952a21f1, (q31_t)0x467aa6f2, (q31_t)0x9526ac25,
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+  (q31_t)0x46606b4e, (q31_t)0x95156308, (q31_t)0x465b2bab, (q31_t)0x9511eec8, (q31_t)0x4655ebdd, (q31_t)0x950e7aca, (q31_t)0x4650abe3, (q31_t)0x950b070e,
+  (q31_t)0x464b6bbe, (q31_t)0x95079394, (q31_t)0x46462b6d, (q31_t)0x9504205c, (q31_t)0x4640eaf2, (q31_t)0x9500ad66, (q31_t)0x463baa4a, (q31_t)0x94fd3ab1,
+  (q31_t)0x46366978, (q31_t)0x94f9c83f, (q31_t)0x4631287a, (q31_t)0x94f6560f, (q31_t)0x462be751, (q31_t)0x94f2e421, (q31_t)0x4626a5fd, (q31_t)0x94ef7275,
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+  (q31_t)0x45f7526b, (q31_t)0x94d07f05, (q31_t)0x45f20f67, (q31_t)0x94cd0fee, (q31_t)0x45eccc37, (q31_t)0x94c9a119, (q31_t)0x45e788dc, (q31_t)0x94c63286,
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+  (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x45c7f132, (q31_t)0x94b1a081, (q31_t)0x45c2acaa, (q31_t)0x94ae33be, (q31_t)0x45bd67f6, (q31_t)0x94aac73c,
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+  (q31_t)0x45a30df0, (q31_t)0x9499ac95, (q31_t)0x459dc83b, (q31_t)0x949641a1, (q31_t)0x4598825a, (q31_t)0x9492d6ef, (q31_t)0x45933c4f, (q31_t)0x948f6c7f,
+  (q31_t)0x458df619, (q31_t)0x948c0252, (q31_t)0x4588afb8, (q31_t)0x94889867, (q31_t)0x4583692c, (q31_t)0x94852ebe, (q31_t)0x457e2275, (q31_t)0x9481c557,
+  (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x45739487, (q31_t)0x947af351, (q31_t)0x456e4d4f, (q31_t)0x94778ab1, (q31_t)0x456905ed, (q31_t)0x94742254,
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+  (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x451f0d04, (q31_t)0x94448873, (q31_t)0x4519c321, (q31_t)0x944123fa, (q31_t)0x45147913, (q31_t)0x943dbfc3,
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+  (q31_t)0x443b0e21, (q31_t)0x93b392e6, (q31_t)0x4435bd21, (q31_t)0x93b0399e, (q31_t)0x44306bf6, (q31_t)0x93ace099, (q31_t)0x442b1aa2, (q31_t)0x93a987d6,
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+  (q31_t)0x44108184, (q31_t)0x9398cff5, (q31_t)0x440b2f34, (q31_t)0x939578c3, (q31_t)0x4405dcb9, (q31_t)0x939221d5, (q31_t)0x44008a14, (q31_t)0x938ecb29,
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+  (q31_t)0x43e5ea68, (q31_t)0x937e1dbb, (q31_t)0x43e096c8, (q31_t)0x937ac8a1, (q31_t)0x43db42fe, (q31_t)0x937773ca, (q31_t)0x43d5ef0a, (q31_t)0x93741f35,
+  (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x43cb46a5, (q31_t)0x936d76d6, (q31_t)0x43c5f234, (q31_t)0x936a230a, (q31_t)0x43c09d99, (q31_t)0x9366cf82,
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+  (q31_t)0x43a5f41e, (q31_t)0x935631c5, (q31_t)0x43a09e89, (q31_t)0x9352dfcf, (q31_t)0x439b48c9, (q31_t)0x934f8e1c, (q31_t)0x4395f2e0, (q31_t)0x934c3cab,
+  (q31_t)0x43909ccd, (q31_t)0x9348eb7e, (q31_t)0x438b4691, (q31_t)0x93459a94, (q31_t)0x4385f02a, (q31_t)0x934249ed, (q31_t)0x4380999b, (q31_t)0x933ef989,
+  (q31_t)0x437b42e1, (q31_t)0x933ba968, (q31_t)0x4375ebfe, (q31_t)0x9338598a, (q31_t)0x437094f1, (q31_t)0x933509f0, (q31_t)0x436b3dbb, (q31_t)0x9331ba98,
+  (q31_t)0x4365e65b, (q31_t)0x932e6b84, (q31_t)0x43608ed2, (q31_t)0x932b1cb2, (q31_t)0x435b371f, (q31_t)0x9327ce24, (q31_t)0x4355df42, (q31_t)0x93247fd9,
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+  (q31_t)0x433b2585, (q31_t)0x9313fc51, (q31_t)0x4335ccaf, (q31_t)0x9310af99, (q31_t)0x433073b0, (q31_t)0x930d6324, (q31_t)0x432b1a87, (q31_t)0x930a16f3,
+  (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x432067ba, (q31_t)0x93037f59, (q31_t)0x431b0e15, (q31_t)0x930033f1, (q31_t)0x4315b447, (q31_t)0x92fce8cc,
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+  (q31_t)0x42faf0d4, (q31_t)0x92ec7505, (q31_t)0x42f5960e, (q31_t)0x92e92b74, (q31_t)0x42f03b1e, (q31_t)0x92e5e226, (q31_t)0x42eae005, (q31_t)0x92e2991c,
+  (q31_t)0x42e584c3, (q31_t)0x92df5054, (q31_t)0x42e02958, (q31_t)0x92dc07d0, (q31_t)0x42dacdc3, (q31_t)0x92d8bf90, (q31_t)0x42d57205, (q31_t)0x92d57792,
+  (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x42caba0e, (q31_t)0x92cee862, (q31_t)0x42c55dd4, (q31_t)0x92cba12f, (q31_t)0x42c00172, (q31_t)0x92c85a3f,
+  (q31_t)0x42baa4e6, (q31_t)0x92c51392, (q31_t)0x42b54831, (q31_t)0x92c1cd29, (q31_t)0x42afeb53, (q31_t)0x92be8703, (q31_t)0x42aa8e4b, (q31_t)0x92bb4121,
+  (q31_t)0x42a5311b, (q31_t)0x92b7fb82, (q31_t)0x429fd3c1, (q31_t)0x92b4b626, (q31_t)0x429a763f, (q31_t)0x92b1710e, (q31_t)0x42951893, (q31_t)0x92ae2c3a,
+  (q31_t)0x428fbabe, (q31_t)0x92aae7a8, (q31_t)0x428a5cc0, (q31_t)0x92a7a35a, (q31_t)0x4284fe99, (q31_t)0x92a45f50, (q31_t)0x427fa049, (q31_t)0x92a11b89,
+  (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x4274e32e, (q31_t)0x929a94c6, (q31_t)0x426f8463, (q31_t)0x929751c9, (q31_t)0x426a256f, (q31_t)0x92940f10,
+  (q31_t)0x4264c653, (q31_t)0x9290cc9b, (q31_t)0x425f670d, (q31_t)0x928d8a69, (q31_t)0x425a079e, (q31_t)0x928a487a, (q31_t)0x4254a806, (q31_t)0x928706cf,
+  (q31_t)0x424f4845, (q31_t)0x9283c568, (q31_t)0x4249e85c, (q31_t)0x92808444, (q31_t)0x42448849, (q31_t)0x927d4363, (q31_t)0x423f280e, (q31_t)0x927a02c7,
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+  (q31_t)0x420ebecb, (q31_t)0x925cc924, (q31_t)0x42095cf7, (q31_t)0x92598b2b, (q31_t)0x4203fafb, (q31_t)0x92564d76, (q31_t)0x41fe98d6, (q31_t)0x92531005,
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+  (q31_t)0x41e3abbc, (q31_t)0x9242e0c4, (q31_t)0x41de48a3, (q31_t)0x923fa4e8, (q31_t)0x41d8e561, (q31_t)0x923c6950, (q31_t)0x41d381f7, (q31_t)0x92392dfc,
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+  (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4099ee2e, (q31_t)0x917f827d, (q31_t)0x4094817f, (q31_t)0x917c56d1, (q31_t)0x408f14a7, (q31_t)0x91792b6a,
+  (q31_t)0x4089a7a8, (q31_t)0x91760047, (q31_t)0x40843a81, (q31_t)0x9172d567, (q31_t)0x407ecd32, (q31_t)0x916faacc, (q31_t)0x40795fbc, (q31_t)0x916c8076,
+  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x406e8457, (q31_t)0x91662c95, (q31_t)0x40691669, (q31_t)0x9163030b, (q31_t)0x4063a854, (q31_t)0x915fd9c5,
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+  (q31_t)0x4032c297, (q31_t)0x91437250, (q31_t)0x402d52f5, (q31_t)0x91404bb5, (q31_t)0x4027e32b, (q31_t)0x913d255e, (q31_t)0x4022733a, (q31_t)0x9139ff4b,
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+  (q31_t)0x40074132, (q31_t)0x912a44f0, (q31_t)0x4001d053, (q31_t)0x91272078, (q31_t)0x3ffc5f4d, (q31_t)0x9123fc44, (q31_t)0x3ff6ee1f, (q31_t)0x9120d854,
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+  (q31_t)0x3fdbb5ec, (q31_t)0x911128a8, (q31_t)0x3fd643d2, (q31_t)0x910e0653, (q31_t)0x3fd0d191, (q31_t)0x910ae442, (q31_t)0x3fcb5f28, (q31_t)0x9107c276,
+  (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3fc079e0, (q31_t)0x91017faa, (q31_t)0x3fbb0702, (q31_t)0x90fe5eab, (q31_t)0x3fb593fb, (q31_t)0x90fb3df1,
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+  (q31_t)0x3f8481dd, (q31_t)0x90df236e, (q31_t)0x3f7f0d4f, (q31_t)0x90dc0560, (q31_t)0x3f799899, (q31_t)0x90d8e798, (q31_t)0x3f7423bc, (q31_t)0x90d5ca13,
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+  (q31_t)0x3f58d921, (q31_t)0x90c63a83, (q31_t)0x3f53635a, (q31_t)0x90c31e9b, (q31_t)0x3f4ded6b, (q31_t)0x90c002f7, (q31_t)0x3f487755, (q31_t)0x90bce797,
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+  (q31_t)0x3f2d26a0, (q31_t)0x90ad62c0, (q31_t)0x3f27afa1, (q31_t)0x90aa48fd, (q31_t)0x3f22387a, (q31_t)0x90a72f7e, (q31_t)0x3f1cc12c, (q31_t)0x90a41644,
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+  (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3efbf22a, (q31_t)0x9091848a, (q31_t)0x3ef679cc, (q31_t)0x908e6d31, (q31_t)0x3ef10148, (q31_t)0x908b561c,
+  (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ee60fca, (q31_t)0x908528c2, (q31_t)0x3ee096d1, (q31_t)0x9082127c, (q31_t)0x3edb1db1, (q31_t)0x907efc7a,
+  (q31_t)0x3ed5a46b, (q31_t)0x907be6be, (q31_t)0x3ed02afd, (q31_t)0x9078d146, (q31_t)0x3ecab169, (q31_t)0x9075bc13, (q31_t)0x3ec537ae, (q31_t)0x9072a725,
+  (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3eba43c4, (q31_t)0x906c7e17, (q31_t)0x3eb4c995, (q31_t)0x906969f8, (q31_t)0x3eaf4f40, (q31_t)0x9066561d,
+  (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3ea45a21, (q31_t)0x90602f35, (q31_t)0x3e9edf57, (q31_t)0x905d1c29, (q31_t)0x3e996467, (q31_t)0x905a0962,
+  (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e8e6e12, (q31_t)0x9053e4a1, (q31_t)0x3e88f2ae, (q31_t)0x9050d2a9, (q31_t)0x3e837724, (q31_t)0x904dc0f5,
+  (q31_t)0x3e7dfb73, (q31_t)0x904aaf86, (q31_t)0x3e787f9b, (q31_t)0x90479e5c, (q31_t)0x3e73039d, (q31_t)0x90448d76, (q31_t)0x3e6d8778, (q31_t)0x90417cd6,
+  (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e628ebb, (q31_t)0x903b5c64, (q31_t)0x3e5d1222, (q31_t)0x90384c93, (q31_t)0x3e579564, (q31_t)0x90353d06,
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+  (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e36a5c4, (q31_t)0x9022e564, (q31_t)0x3e3127f9, (q31_t)0x901fd7ba, (q31_t)0x3e2baa07, (q31_t)0x901cca55,
+  (q31_t)0x3e262bee, (q31_t)0x9019bd36, (q31_t)0x3e20adaf, (q31_t)0x9016b05b, (q31_t)0x3e1b2f4a, (q31_t)0x9013a3c5, (q31_t)0x3e15b0bf, (q31_t)0x90109775,
+  (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3e0ab336, (q31_t)0x900a7fa3, (q31_t)0x3e053437, (q31_t)0x90077422, (q31_t)0x3dffb513, (q31_t)0x900468e5,
+  (q31_t)0x3dfa35c8, (q31_t)0x90015dee, (q31_t)0x3df4b657, (q31_t)0x8ffe533c, (q31_t)0x3def36c0, (q31_t)0x8ffb48cf, (q31_t)0x3de9b703, (q31_t)0x8ff83ea7,
+  (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3ddeb716, (q31_t)0x8ff22b26, (q31_t)0x3dd936e6, (q31_t)0x8fef21ce, (q31_t)0x3dd3b690, (q31_t)0x8fec18ba,
+  (q31_t)0x3dce3614, (q31_t)0x8fe90fec, (q31_t)0x3dc8b571, (q31_t)0x8fe60763, (q31_t)0x3dc334a9, (q31_t)0x8fe2ff1f, (q31_t)0x3dbdb3ba, (q31_t)0x8fdff720,
+  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3db2b16b, (q31_t)0x8fd9e7f2, (q31_t)0x3dad300b, (q31_t)0x8fd6e0c2, (q31_t)0x3da7ae84, (q31_t)0x8fd3d9d8,
+  (q31_t)0x3da22cd7, (q31_t)0x8fd0d333, (q31_t)0x3d9cab04, (q31_t)0x8fcdccd3, (q31_t)0x3d97290b, (q31_t)0x8fcac6b9, (q31_t)0x3d91a6ed, (q31_t)0x8fc7c0e3,
+  (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d86a23d, (q31_t)0x8fc1b608, (q31_t)0x3d811fac, (q31_t)0x8fbeb103, (q31_t)0x3d7b9cf6, (q31_t)0x8fbbac42,
+  (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7, (q31_t)0x3d709717, (q31_t)0x8fb5a391, (q31_t)0x3d6b13ee, (q31_t)0x8fb29fa0, (q31_t)0x3d6590a0, (q31_t)0x8faf9bf5,
+  (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d5a8992, (q31_t)0x8fa9956e, (q31_t)0x3d5505d2, (q31_t)0x8fa69293, (q31_t)0x3d4f81ec, (q31_t)0x8fa38ffc,
+  (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d4479b0, (q31_t)0x8f9d8ba0, (q31_t)0x3d3ef559, (q31_t)0x8f9a89da, (q31_t)0x3d3970dc, (q31_t)0x8f978859,
+  (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d2e6771, (q31_t)0x8f918627, (q31_t)0x3d28e282, (q31_t)0x8f8e8576, (q31_t)0x3d235d6f, (q31_t)0x8f8b850a,
+  (q31_t)0x3d1dd835, (q31_t)0x8f8884e4, (q31_t)0x3d1852d6, (q31_t)0x8f858503, (q31_t)0x3d12cd51, (q31_t)0x8f828568, (q31_t)0x3d0d47a6, (q31_t)0x8f7f8612,
+  (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3d023be0, (q31_t)0x8f798836, (q31_t)0x3cfcb5c4, (q31_t)0x8f7689b0, (q31_t)0x3cf72f83, (q31_t)0x8f738b70,
+  (q31_t)0x3cf1a91c, (q31_t)0x8f708d75, (q31_t)0x3cec2290, (q31_t)0x8f6d8fbf, (q31_t)0x3ce69bde, (q31_t)0x8f6a924f, (q31_t)0x3ce11507, (q31_t)0x8f679525,
+  (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cd606e7, (q31_t)0x8f619ba0, (q31_t)0x3cd07f9f, (q31_t)0x8f5e9f46, (q31_t)0x3ccaf831, (q31_t)0x8f5ba331,
+  (q31_t)0x3cc5709e, (q31_t)0x8f58a761, (q31_t)0x3cbfe8e5, (q31_t)0x8f55abd8, (q31_t)0x3cba6107, (q31_t)0x8f52b093, (q31_t)0x3cb4d904, (q31_t)0x8f4fb595,
+  (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3ca9c88c, (q31_t)0x8f49c067, (q31_t)0x3ca44018, (q31_t)0x8f46c639, (q31_t)0x3c9eb77f, (q31_t)0x8f43cc50,
+  (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c93a5dc, (q31_t)0x8f3dd950, (q31_t)0x3c8e1cd3, (q31_t)0x8f3ae038, (q31_t)0x3c8893a4, (q31_t)0x8f37e765,
+  (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c7d80d6, (q31_t)0x8f31f691, (q31_t)0x3c77f737, (q31_t)0x8f2efe8f, (q31_t)0x3c726d73, (q31_t)0x8f2c06d3,
+  (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c, (q31_t)0x3c67597b, (q31_t)0x8f26182b, (q31_t)0x3c61cf48, (q31_t)0x8f232140, (q31_t)0x3c5c44ee, (q31_t)0x8f202a9a,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c512fcc, (q31_t)0x8f1a3e1f, (q31_t)0x3c4ba504, (q31_t)0x8f17484b, (q31_t)0x3c461a16, (q31_t)0x8f1452bb,
+  (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c3b03ca, (q31_t)0x8f0e686e, (q31_t)0x3c35786d, (q31_t)0x8f0b73b0, (q31_t)0x3c2fecea, (q31_t)0x8f087f37,
+  (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c24d575, (q31_t)0x8f029717, (q31_t)0x3c1f4983, (q31_t)0x8effa370, (q31_t)0x3c19bd6c, (q31_t)0x8efcb00e,
+  (q31_t)0x3c143130, (q31_t)0x8ef9bcf2, (q31_t)0x3c0ea4cf, (q31_t)0x8ef6ca1c, (q31_t)0x3c091849, (q31_t)0x8ef3d78b, (q31_t)0x3c038b9e, (q31_t)0x8ef0e540,
+  (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3bf871d8, (q31_t)0x8eeb017c, (q31_t)0x3bf2e4be, (q31_t)0x8ee81002, (q31_t)0x3bed577e, (q31_t)0x8ee51ece,
+  (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3be23c91, (q31_t)0x8edf3d38, (q31_t)0x3bdcaee3, (q31_t)0x8edc4cd5, (q31_t)0x3bd72110, (q31_t)0x8ed95cb8,
+  (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bcc04fb, (q31_t)0x8ed37d50, (q31_t)0x3bc676b9, (q31_t)0x8ed08e05, (q31_t)0x3bc0e853, (q31_t)0x8ecd9eff,
+  (q31_t)0x3bbb59c7, (q31_t)0x8ecab040, (q31_t)0x3bb5cb17, (q31_t)0x8ec7c1c6, (q31_t)0x3bb03c42, (q31_t)0x8ec4d392, (q31_t)0x3baaad48, (q31_t)0x8ec1e5a4,
+  (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b9f8ee5, (q31_t)0x8ebc0a99, (q31_t)0x3b99ff7d, (q31_t)0x8eb91d7c, (q31_t)0x3b946ff0, (q31_t)0x8eb630a6,
+  (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b895068, (q31_t)0x8eb057ca, (q31_t)0x3b83c06c, (q31_t)0x8ead6bc5, (q31_t)0x3b7e304c, (q31_t)0x8eaa8006,
+  (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b730f9e, (q31_t)0x8ea4a959, (q31_t)0x3b6d7f10, (q31_t)0x8ea1be6c, (q31_t)0x3b67ee5d, (q31_t)0x8e9ed3c4,
+  (q31_t)0x3b625d86, (q31_t)0x8e9be963, (q31_t)0x3b5ccc8a, (q31_t)0x8e98ff47, (q31_t)0x3b573b69, (q31_t)0x8e961571, (q31_t)0x3b51aa24, (q31_t)0x8e932be2,
+  (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b46872c, (q31_t)0x8e8d5994, (q31_t)0x3b40f579, (q31_t)0x8e8a70d7, (q31_t)0x3b3b63a1, (q31_t)0x8e87885f,
+  (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b303f84, (q31_t)0x8e81b841, (q31_t)0x3b2aad3f, (q31_t)0x8e7ed09b, (q31_t)0x3b251ad6, (q31_t)0x8e7be93c,
+  (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b19f595, (q31_t)0x8e761b4e, (q31_t)0x3b1462be, (q31_t)0x8e7334c1, (q31_t)0x3b0ecfc3, (q31_t)0x8e704e79,
+  (q31_t)0x3b093ca3, (q31_t)0x8e6d6877, (q31_t)0x3b03a95e, (q31_t)0x8e6a82bc, (q31_t)0x3afe15f6, (q31_t)0x8e679d47, (q31_t)0x3af88269, (q31_t)0x8e64b817,
+  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3aed5ae1, (q31_t)0x8e5eee8b, (q31_t)0x3ae7c6e7, (q31_t)0x8e5c0a2e, (q31_t)0x3ae232c9, (q31_t)0x8e592617,
+  (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ad70a1f, (q31_t)0x8e535ebb, (q31_t)0x3ad17593, (q31_t)0x8e507b76, (q31_t)0x3acbe0e3, (q31_t)0x8e4d9878,
+  (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3ac0b717, (q31_t)0x8e47d34d, (q31_t)0x3abb21fb, (q31_t)0x8e44f121, (q31_t)0x3ab58cba, (q31_t)0x8e420f3b,
+  (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b, (q31_t)0x3aaa61cc, (q31_t)0x8e3c4c41, (q31_t)0x3aa4cc1e, (q31_t)0x8e396b2e, (q31_t)0x3a9f364d, (q31_t)0x8e368a61,
+  (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a940a3e, (q31_t)0x8e30c999, (q31_t)0x3a8e7400, (q31_t)0x8e2de99e, (q31_t)0x3a88dd9d, (q31_t)0x8e2b09e9,
+  (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a7db06d, (q31_t)0x8e254b53, (q31_t)0x3a78199f, (q31_t)0x8e226c71, (q31_t)0x3a7282ac, (q31_t)0x8e1f8dd6,
+  (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a67545b, (q31_t)0x8e19d171, (q31_t)0x3a61bcfd, (q31_t)0x8e16f3a9, (q31_t)0x3a5c257a, (q31_t)0x8e141626,
+  (q31_t)0x3a568dd4, (q31_t)0x8e1138ea, (q31_t)0x3a50f609, (q31_t)0x8e0e5bf4, (q31_t)0x3a4b5e1b, (q31_t)0x8e0b7f44, (q31_t)0x3a45c608, (q31_t)0x8e08a2db,
+  (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a3a9577, (q31_t)0x8e02eadb, (q31_t)0x3a34fcf9, (q31_t)0x8e000f44, (q31_t)0x3a2f6457, (q31_t)0x8dfd33f4,
+  (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a2432a7, (q31_t)0x8df77e27, (q31_t)0x3a1e9999, (q31_t)0x8df4a3a9, (q31_t)0x3a190068, (q31_t)0x8df1c973,
+  (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x3a0dcd99, (q31_t)0x8dec15d8, (q31_t)0x3a0833fc, (q31_t)0x8de93c74, (q31_t)0x3a029a3b, (q31_t)0x8de66357,
+  (q31_t)0x39fd0056, (q31_t)0x8de38a80, (q31_t)0x39f7664e, (q31_t)0x8de0b1ef, (q31_t)0x39f1cc21, (q31_t)0x8dddd9a5, (q31_t)0x39ec31d1, (q31_t)0x8ddb01a1,
+  (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39e0fcc6, (q31_t)0x8dd5526d, (q31_t)0x39db620b, (q31_t)0x8dd27b3c, (q31_t)0x39d5c72c, (q31_t)0x8dcfa452,
+  (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39ca9104, (q31_t)0x8dc9f751, (q31_t)0x39c4f5ba, (q31_t)0x8dc7213b, (q31_t)0x39bf5a4d, (q31_t)0x8dc44b6a,
+  (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39b42307, (q31_t)0x8dbea09d, (q31_t)0x39ae872f, (q31_t)0x8dbbcba0, (q31_t)0x39a8eb33, (q31_t)0x8db8f6ea,
+  (q31_t)0x39a34f13, (q31_t)0x8db6227a, (q31_t)0x399db2d0, (q31_t)0x8db34e50, (q31_t)0x3998166a, (q31_t)0x8db07a6d, (q31_t)0x399279e0, (q31_t)0x8dada6d1,
+  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39874061, (q31_t)0x8da8006c, (q31_t)0x3981a36d, (q31_t)0x8da52da3, (q31_t)0x397c0655, (q31_t)0x8da25b21,
+  (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x3970cbba, (q31_t)0x8d9cb6f0, (q31_t)0x396b2e38, (q31_t)0x8d99e541, (q31_t)0x39659092, (q31_t)0x8d9713d9,
+  (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x395a54dd, (q31_t)0x8d9171dd, (q31_t)0x3954b6cd, (q31_t)0x8d8ea148, (q31_t)0x394f1899, (q31_t)0x8d8bd0fb,
+  (q31_t)0x39497a43, (q31_t)0x8d8900f3, (q31_t)0x3943dbc9, (q31_t)0x8d863133, (q31_t)0x393e3d2c, (q31_t)0x8d8361b9, (q31_t)0x39389e6b, (q31_t)0x8d809286,
+  (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x392d6080, (q31_t)0x8d7af4f3, (q31_t)0x3927c155, (q31_t)0x8d782694, (q31_t)0x39222208, (q31_t)0x8d75587b,
+  (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x3916e303, (q31_t)0x8d6fbd1d, (q31_t)0x3911434b, (q31_t)0x8d6cefd9, (q31_t)0x390ba371, (q31_t)0x8d6a22db,
+  (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x39006352, (q31_t)0x8d6489b3, (q31_t)0x38fac30e, (q31_t)0x8d61bd89, (q31_t)0x38f522a6, (q31_t)0x8d5ef1a5,
+  (q31_t)0x38ef821c, (q31_t)0x8d5c2609, (q31_t)0x38e9e16e, (q31_t)0x8d595ab3, (q31_t)0x38e4409e, (q31_t)0x8d568fa4, (q31_t)0x38de9faa, (q31_t)0x8d53c4db,
+  (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38d35d59, (q31_t)0x8d4e301f, (q31_t)0x38cdbbfc, (q31_t)0x8d4b662a, (q31_t)0x38c81a7c, (q31_t)0x8d489c7d,
+  (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38bcd713, (q31_t)0x8d4309f6, (q31_t)0x38b7352a, (q31_t)0x8d40411d, (q31_t)0x38b1931e, (q31_t)0x8d3d788b,
+  (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x38a64e9d, (q31_t)0x8d37e83a, (q31_t)0x38a0ac29, (q31_t)0x8d35207d, (q31_t)0x389b0991, (q31_t)0x8d325905,
+  (q31_t)0x389566d6, (q31_t)0x8d2f91d5, (q31_t)0x388fc3f8, (q31_t)0x8d2ccaec, (q31_t)0x388a20f8, (q31_t)0x8d2a0449, (q31_t)0x38847dd5, (q31_t)0x8d273ded,
+  (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38793725, (q31_t)0x8d21b20a, (q31_t)0x38739399, (q31_t)0x8d1eec83, (q31_t)0x386defeb, (q31_t)0x8d1c2742,
+  (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3862a825, (q31_t)0x8d169d96, (q31_t)0x385d040d, (q31_t)0x8d13d92a, (q31_t)0x38575fd4, (q31_t)0x8d111505,
+  (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x384c16f7, (q31_t)0x8d0b8d90, (q31_t)0x38467255, (q31_t)0x8d08ca40, (q31_t)0x3840cd90, (q31_t)0x8d060737,
+  (q31_t)0x383b28a9, (q31_t)0x8d034474, (q31_t)0x3835839f, (q31_t)0x8d0081f9, (q31_t)0x382fde72, (q31_t)0x8cfdbfc4, (q31_t)0x382a3922, (q31_t)0x8cfafdd7,
+  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x381eee1b, (q31_t)0x8cf57ad0, (q31_t)0x38194864, (q31_t)0x8cf2b9b8, (q31_t)0x3813a28a, (q31_t)0x8ceff8e6,
+  (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x3808566e, (q31_t)0x8cea7818, (q31_t)0x3802b02c, (q31_t)0x8ce7b81b, (q31_t)0x37fd09c8, (q31_t)0x8ce4f865,
+  (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37f1bc97, (q31_t)0x8cdf79ce, (q31_t)0x37ec15cb, (q31_t)0x8cdcbaee, (q31_t)0x37e66edd, (q31_t)0x8cd9fc54,
+  (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01, (q31_t)0x37db2099, (q31_t)0x8cd47ff6, (q31_t)0x37d57943, (q31_t)0x8cd1c231, (q31_t)0x37cfd1cb, (q31_t)0x8ccf04b3,
+  (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37c48273, (q31_t)0x8cc98a8e, (q31_t)0x37beda93, (q31_t)0x8cc6cde5, (q31_t)0x37b93292, (q31_t)0x8cc41184,
+  (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x37ade227, (q31_t)0x8cbe9996, (q31_t)0x37a839be, (q31_t)0x8cbbde0a, (q31_t)0x37a29132, (q31_t)0x8cb922c6,
+  (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37973fb5, (q31_t)0x8cb3ad11, (q31_t)0x379196c3, (q31_t)0x8cb0f2a1, (q31_t)0x378bedae, (q31_t)0x8cae3879,
+  (q31_t)0x37864477, (q31_t)0x8cab7e98, (q31_t)0x37809b1e, (q31_t)0x8ca8c4fd, (q31_t)0x377af1a3, (q31_t)0x8ca60baa, (q31_t)0x37754806, (q31_t)0x8ca3529f,
+  (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3769f464, (q31_t)0x8c9de15c, (q31_t)0x37644a60, (q31_t)0x8c9b2926, (q31_t)0x375ea03a, (q31_t)0x8c987137,
+  (q31_t)0x3758f5f2, (q31_t)0x8c95b98f, (q31_t)0x37534b87, (q31_t)0x8c93022e, (q31_t)0x374da0fa, (q31_t)0x8c904b14, (q31_t)0x3747f64c, (q31_t)0x8c8d9442,
+  (q31_t)0x37424b7b, (q31_t)0x8c8addb7, (q31_t)0x373ca088, (q31_t)0x8c882773, (q31_t)0x3736f573, (q31_t)0x8c857176, (q31_t)0x37314a3c, (q31_t)0x8c82bbc0,
+  (q31_t)0x372b9ee3, (q31_t)0x8c800652, (q31_t)0x3725f367, (q31_t)0x8c7d512b, (q31_t)0x372047ca, (q31_t)0x8c7a9c4b, (q31_t)0x371a9c0b, (q31_t)0x8c77e7b3,
+  (q31_t)0x3714f02a, (q31_t)0x8c753362, (q31_t)0x370f4427, (q31_t)0x8c727f58, (q31_t)0x37099802, (q31_t)0x8c6fcb95, (q31_t)0x3703ebbb, (q31_t)0x8c6d181a,
+  (q31_t)0x36fe3f52, (q31_t)0x8c6a64e5, (q31_t)0x36f892c7, (q31_t)0x8c67b1f9, (q31_t)0x36f2e61a, (q31_t)0x8c64ff53, (q31_t)0x36ed394b, (q31_t)0x8c624cf5,
+  (q31_t)0x36e78c5b, (q31_t)0x8c5f9ade, (q31_t)0x36e1df48, (q31_t)0x8c5ce90e, (q31_t)0x36dc3214, (q31_t)0x8c5a3786, (q31_t)0x36d684be, (q31_t)0x8c578645,
+  (q31_t)0x36d0d746, (q31_t)0x8c54d54c, (q31_t)0x36cb29ac, (q31_t)0x8c522499, (q31_t)0x36c57bf0, (q31_t)0x8c4f742f, (q31_t)0x36bfce13, (q31_t)0x8c4cc40b,
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+  (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x30990557, (q31_t)0x899599b3, (q31_t)0x3093353a, (q31_t)0x89933725, (q31_t)0x308d64ff, (q31_t)0x8990d4e0,
+  (q31_t)0x308794a6, (q31_t)0x898e72e4, (q31_t)0x3081c42f, (q31_t)0x898c1131, (q31_t)0x307bf39b, (q31_t)0x8989afc8, (q31_t)0x307622e8, (q31_t)0x89874ea7,
+  (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x306a8129, (q31_t)0x89828d41, (q31_t)0x3064b01d, (q31_t)0x89802cfc, (q31_t)0x305edef3, (q31_t)0x897dccff,
+  (q31_t)0x30590dab, (q31_t)0x897b6d4c, (q31_t)0x30533c45, (q31_t)0x89790de2, (q31_t)0x304d6ac1, (q31_t)0x8976aec1, (q31_t)0x30479920, (q31_t)0x89744fe9,
+  (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x303bf584, (q31_t)0x896f9315, (q31_t)0x30362389, (q31_t)0x896d3518, (q31_t)0x30305171, (q31_t)0x896ad765,
+  (q31_t)0x302a7f3a, (q31_t)0x896879fb, (q31_t)0x3024ace6, (q31_t)0x89661cda, (q31_t)0x301eda75, (q31_t)0x8963c002, (q31_t)0x301907e6, (q31_t)0x89616373,
+  (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x300d626e, (q31_t)0x895cab31, (q31_t)0x30078f86, (q31_t)0x895a4f7e, (q31_t)0x3001bc80, (q31_t)0x8957f414,
+  (q31_t)0x2ffbe95d, (q31_t)0x895598f3, (q31_t)0x2ff6161c, (q31_t)0x89533e1c, (q31_t)0x2ff042bd, (q31_t)0x8950e38e, (q31_t)0x2fea6f41, (q31_t)0x894e8948,
+  (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fdec7f0, (q31_t)0x8949d59a, (q31_t)0x2fd8f41b, (q31_t)0x89477c30, (q31_t)0x2fd32028, (q31_t)0x89452310,
+  (q31_t)0x2fcd4c19, (q31_t)0x8942ca39, (q31_t)0x2fc777eb, (q31_t)0x894071ab, (q31_t)0x2fc1a3a0, (q31_t)0x893e1967, (q31_t)0x2fbbcf38, (q31_t)0x893bc16b,
+  (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2fb0260f, (q31_t)0x89371250, (q31_t)0x2faa514f, (q31_t)0x8934bb31, (q31_t)0x2fa47c71, (q31_t)0x8932645b,
+  (q31_t)0x2f9ea775, (q31_t)0x89300dce, (q31_t)0x2f98d25d, (q31_t)0x892db78a, (q31_t)0x2f92fd26, (q31_t)0x892b6190, (q31_t)0x2f8d27d3, (q31_t)0x89290bdf,
+  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f817cd4, (q31_t)0x89246159, (q31_t)0x2f7ba729, (q31_t)0x89220c84, (q31_t)0x2f75d160, (q31_t)0x891fb7f8,
+  (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5, (q31_t)0x2f6a2577, (q31_t)0x891b0fbc, (q31_t)0x2f644f56, (q31_t)0x8918bc0c, (q31_t)0x2f5e7919, (q31_t)0x891668a6,
+  (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f52cc46, (q31_t)0x8911c2b5, (q31_t)0x2f4cf5b0, (q31_t)0x890f702b, (q31_t)0x2f471efe, (q31_t)0x890d1dea,
+  (q31_t)0x2f41482e, (q31_t)0x890acbf2, (q31_t)0x2f3b7141, (q31_t)0x89087a44, (q31_t)0x2f359a37, (q31_t)0x890628df, (q31_t)0x2f2fc310, (q31_t)0x8903d7c4,
+  (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f24146b, (q31_t)0x88ff3669, (q31_t)0x2f1e3ced, (q31_t)0x88fce62a, (q31_t)0x2f186551, (q31_t)0x88fa9634,
+  (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2f0cb5c3, (q31_t)0x88f5f724, (q31_t)0x2f06ddd1, (q31_t)0x88f3a80b, (q31_t)0x2f0105c1, (q31_t)0x88f1593b,
+  (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ef5554b, (q31_t)0x88ecbc77, (q31_t)0x2eef7ce5, (q31_t)0x88ea6e83, (q31_t)0x2ee9a461, (q31_t)0x88e820d9,
+  (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378, (q31_t)0x2eddf304, (q31_t)0x88e38660, (q31_t)0x2ed81a29, (q31_t)0x88e13992, (q31_t)0x2ed24132, (q31_t)0x88deed0e,
+  (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2ec68eed, (q31_t)0x88da54e1, (q31_t)0x2ec0b5a0, (q31_t)0x88d8093a, (q31_t)0x2ebadc35, (q31_t)0x88d5bddb,
+  (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2eaf290a, (q31_t)0x88d127fb, (q31_t)0x2ea94f49, (q31_t)0x88cedd79, (q31_t)0x2ea3756b, (q31_t)0x88cc9340,
+  (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e97c159, (q31_t)0x88c7ffac, (q31_t)0x2e91e725, (q31_t)0x88c5b650, (q31_t)0x2e8c0cd4, (q31_t)0x88c36d3e,
+  (q31_t)0x2e863267, (q31_t)0x88c12475, (q31_t)0x2e8057dd, (q31_t)0x88bedbf6, (q31_t)0x2e7a7d36, (q31_t)0x88bc93c0, (q31_t)0x2e74a272, (q31_t)0x88ba4bd4,
+  (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e68ec95, (q31_t)0x88b5bcd9, (q31_t)0x2e63117c, (q31_t)0x88b375ca, (q31_t)0x2e5d3646, (q31_t)0x88b12f04,
+  (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e517f84, (q31_t)0x88aca255, (q31_t)0x2e4ba3f8, (q31_t)0x88aa5c6c, (q31_t)0x2e45c850, (q31_t)0x88a816cd,
+  (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e3a10aa, (q31_t)0x88a38c6b, (q31_t)0x2e3434ac, (q31_t)0x88a147a9, (q31_t)0x2e2e5891, (q31_t)0x889f0330,
+  (q31_t)0x2e287c5a, (q31_t)0x889cbf01, (q31_t)0x2e22a007, (q31_t)0x889a7b1b, (q31_t)0x2e1cc397, (q31_t)0x88983780, (q31_t)0x2e16e70b, (q31_t)0x8895f42d,
+  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2e0b2d9d, (q31_t)0x88916e66, (q31_t)0x2e0550bb, (q31_t)0x888f2bf1, (q31_t)0x2dff73bd, (q31_t)0x888ce9c5,
+  (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2df3b96c, (q31_t)0x8888664b, (q31_t)0x2deddc19, (q31_t)0x888624fd, (q31_t)0x2de7feaa, (q31_t)0x8883e3f8,
+  (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2ddc4376, (q31_t)0x887f62cb, (q31_t)0x2dd665b2, (q31_t)0x887d22a4, (q31_t)0x2dd087d1, (q31_t)0x887ae2c6,
+  (q31_t)0x2dcaa9d5, (q31_t)0x8878a332, (q31_t)0x2dc4cbbc, (q31_t)0x887663e7, (q31_t)0x2dbeed86, (q31_t)0x887424e7, (q31_t)0x2db90f35, (q31_t)0x8871e630,
+  (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2dad523d, (q31_t)0x886d699f, (q31_t)0x2da77397, (q31_t)0x886b2bc5, (q31_t)0x2da194d5, (q31_t)0x8868ee35,
+  (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d95d6fc, (q31_t)0x886473f2, (q31_t)0x2d8ff7e5, (q31_t)0x88623740, (q31_t)0x2d8a18b3, (q31_t)0x885ffad7,
+  (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d7e59f9, (q31_t)0x885b82e3, (q31_t)0x2d787a72, (q31_t)0x88594757, (q31_t)0x2d729acf, (q31_t)0x88570c16,
+  (q31_t)0x2d6cbb10, (q31_t)0x8854d11e, (q31_t)0x2d66db35, (q31_t)0x88529670, (q31_t)0x2d60fb3e, (q31_t)0x88505c0b, (q31_t)0x2d5b1b2b, (q31_t)0x884e21f1,
+  (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d4f5ab1, (q31_t)0x8849ae9a, (q31_t)0x2d497a4a, (q31_t)0x8847755d, (q31_t)0x2d4399c7, (q31_t)0x88453c6a,
+  (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d37d86d, (q31_t)0x8840cb61, (q31_t)0x2d31f797, (q31_t)0x883e934c, (q31_t)0x2d2c16a4, (q31_t)0x883c5b81,
+  (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d20546b, (q31_t)0x8837ecc7, (q31_t)0x2d1a7325, (q31_t)0x8835b5d9, (q31_t)0x2d1491c4, (q31_t)0x88337f35,
+  (q31_t)0x2d0eb046, (q31_t)0x883148db, (q31_t)0x2d08ceac, (q31_t)0x882f12cb, (q31_t)0x2d02ecf7, (q31_t)0x882cdd04, (q31_t)0x2cfd0b26, (q31_t)0x882aa788,
+  (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cf14731, (q31_t)0x88263d6d, (q31_t)0x2ceb650d, (q31_t)0x882408ce, (q31_t)0x2ce582cd, (q31_t)0x8821d47a,
+  (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cd9bdfa, (q31_t)0x881d6cae, (q31_t)0x2cd3db67, (q31_t)0x881b3937, (q31_t)0x2ccdf8b8, (q31_t)0x8819060a,
+  (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cc23308, (q31_t)0x8814a08f, (q31_t)0x2cbc5006, (q31_t)0x88126e40, (q31_t)0x2cb66ce9, (q31_t)0x88103c3b,
+  (q31_t)0x2cb089b1, (q31_t)0x880e0a7f, (q31_t)0x2caaa65c, (q31_t)0x880bd90e, (q31_t)0x2ca4c2ed, (q31_t)0x8809a7e7, (q31_t)0x2c9edf61, (q31_t)0x8807770a,
+  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c9317f8, (q31_t)0x8803162e, (q31_t)0x2c8d341a, (q31_t)0x8800e62f, (q31_t)0x2c875021, (q31_t)0x87feb67a,
+  (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c7b87dc, (q31_t)0x87fa57ee, (q31_t)0x2c75a390, (q31_t)0x87f82917, (q31_t)0x2c6fbf29, (q31_t)0x87f5fa8b,
+  (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c63f609, (q31_t)0x87f19e4f, (q31_t)0x2c5e114f, (q31_t)0x87ef70a0, (q31_t)0x2c582c7b, (q31_t)0x87ed433c,
+  (q31_t)0x2c52478a, (q31_t)0x87eb1621, (q31_t)0x2c4c627f, (q31_t)0x87e8e950, (q31_t)0x2c467d58, (q31_t)0x87e6bcca, (q31_t)0x2c409816, (q31_t)0x87e4908e,
+  (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c34cd40, (q31_t)0x87e038f3, (q31_t)0x2c2ee7ad, (q31_t)0x87de0d95, (q31_t)0x2c2901fd, (q31_t)0x87dbe281,
+  (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c1d364e, (q31_t)0x87d78d38, (q31_t)0x2c17504d, (q31_t)0x87d56302, (q31_t)0x2c116a31, (q31_t)0x87d33916,
+  (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2c059da7, (q31_t)0x87cee61e, (q31_t)0x2bffb73a, (q31_t)0x87ccbd11, (q31_t)0x2bf9d0b1, (q31_t)0x87ca944e,
+  (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5, (q31_t)0x2bee034e, (q31_t)0x87c643a6, (q31_t)0x2be81c74, (q31_t)0x87c41bc2, (q31_t)0x2be2357f, (q31_t)0x87c1f427,
+  (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bd66744, (q31_t)0x87bda5d1, (q31_t)0x2bd07ffe, (q31_t)0x87bb7f16, (q31_t)0x2bca989d, (q31_t)0x87b958a4,
+  (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bbec989, (q31_t)0x87b50c9f, (q31_t)0x2bb8e1d7, (q31_t)0x87b2e70c, (q31_t)0x2bb2fa0a, (q31_t)0x87b0c1c4,
+  (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2ba72a1e, (q31_t)0x87ac7811, (q31_t)0x2ba14200, (q31_t)0x87aa53a6, (q31_t)0x2b9b59c7, (q31_t)0x87a82f87,
+  (q31_t)0x2b957173, (q31_t)0x87a60bb1, (q31_t)0x2b8f8905, (q31_t)0x87a3e825, (q31_t)0x2b89a07b, (q31_t)0x87a1c4e4, (q31_t)0x2b83b7d7, (q31_t)0x879fa1ed,
+  (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b77e63d, (q31_t)0x879b5cde, (q31_t)0x2b71fd48, (q31_t)0x87993ac6, (q31_t)0x2b6c1438, (q31_t)0x879718f8,
+  (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b6041c9, (q31_t)0x8792d63b, (q31_t)0x2b5a5868, (q31_t)0x8790b54c, (q31_t)0x2b546eee, (q31_t)0x878e94a7,
+  (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b489ba8, (q31_t)0x878a543d, (q31_t)0x2b42b1dd, (q31_t)0x87883477, (q31_t)0x2b3cc7f7, (q31_t)0x878614fb,
+  (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca, (q31_t)0x2b30f3dc, (q31_t)0x8781d6e3, (q31_t)0x2b2b09a6, (q31_t)0x877fb846, (q31_t)0x2b251f56, (q31_t)0x877d99f4,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b194a66, (q31_t)0x87795e2f, (q31_t)0x2b135fc6, (q31_t)0x877740bb, (q31_t)0x2b0d750b, (q31_t)0x87752392,
+  (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2b019f46, (q31_t)0x8770ea20, (q31_t)0x2afbb43c, (q31_t)0x876ecdd6, (q31_t)0x2af5c917, (q31_t)0x876cb1d6,
+  (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ae9f27e, (q31_t)0x87687ab7, (q31_t)0x2ae4070a, (q31_t)0x87665f96, (q31_t)0x2ade1b7c, (q31_t)0x876444c1,
+  (q31_t)0x2ad82fd2, (q31_t)0x87622a35, (q31_t)0x2ad2440f, (q31_t)0x87600ff4, (q31_t)0x2acc5831, (q31_t)0x875df5fd, (q31_t)0x2ac66c39, (q31_t)0x875bdc51,
+  (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aba93f9, (q31_t)0x8757a9d8, (q31_t)0x2ab4a7b1, (q31_t)0x8755910b, (q31_t)0x2aaebb50, (q31_t)0x87537888,
+  (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2aa2e23d, (q31_t)0x874f4862, (q31_t)0x2a9cf58c, (q31_t)0x874d30bf, (q31_t)0x2a9708c1, (q31_t)0x874b1966,
+  (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a8b2edc, (q31_t)0x8746eb94, (q31_t)0x2a8541c3, (q31_t)0x8744d51b, (q31_t)0x2a7f548e, (q31_t)0x8742beec,
+  (q31_t)0x2a796740, (q31_t)0x8740a907, (q31_t)0x2a7379d8, (q31_t)0x873e936d, (q31_t)0x2a6d8c55, (q31_t)0x873c7e1e, (q31_t)0x2a679eb8, (q31_t)0x873a6919,
+  (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a5bc330, (q31_t)0x87363fee, (q31_t)0x2a55d545, (q31_t)0x87342bc9, (q31_t)0x2a4fe740, (q31_t)0x873217ee,
+  (q31_t)0x2a49f920, (q31_t)0x8730045d, (q31_t)0x2a440ae7, (q31_t)0x872df117, (q31_t)0x2a3e1c93, (q31_t)0x872bde1c, (q31_t)0x2a382e25, (q31_t)0x8729cb6b,
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+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x25220916, (q31_t)0x858127df, (q31_t)0x251c05b8, (q31_t)0x857f5564, (q31_t)0x25160243, (q31_t)0x857d8335,
+  (q31_t)0x250ffeb7, (q31_t)0x857bb152, (q31_t)0x2509fb14, (q31_t)0x8579dfba, (q31_t)0x2503f75a, (q31_t)0x85780e6e, (q31_t)0x24fdf389, (q31_t)0x85763d6d,
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+  (q31_t)0x247f8eec, (q31_t)0x85505c99, (q31_t)0x24798928, (q31_t)0x854e9219, (q31_t)0x2473834f, (q31_t)0x854cc7e3, (q31_t)0x246d7d5e, (q31_t)0x854afdfa,
+  (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x2461713a, (q31_t)0x85476b0a, (q31_t)0x245b6b07, (q31_t)0x8545a204, (q31_t)0x245564bd, (q31_t)0x8543d949,
+  (q31_t)0x244f5e5c, (q31_t)0x854210db, (q31_t)0x244957e5, (q31_t)0x854048b7, (q31_t)0x24435158, (q31_t)0x853e80e0, (q31_t)0x243d4ab4, (q31_t)0x853cb954,
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+  (q31_t)0x241f2833, (q31_t)0x8533d809, (q31_t)0x2419210a, (q31_t)0x85321244, (q31_t)0x241319ca, (q31_t)0x85304cca, (q31_t)0x240d1274, (q31_t)0x852e879d,
+  (q31_t)0x24070b08, (q31_t)0x852cc2bb, (q31_t)0x24010385, (q31_t)0x852afe24, (q31_t)0x23fafbec, (q31_t)0x852939da, (q31_t)0x23f4f43e, (q31_t)0x852775db,
+  (q31_t)0x23eeec78, (q31_t)0x8525b228, (q31_t)0x23e8e49d, (q31_t)0x8523eec1, (q31_t)0x23e2dcac, (q31_t)0x85222ba5, (q31_t)0x23dcd4a4, (q31_t)0x852068d6,
+  (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23d0c453, (q31_t)0x851ce41a, (q31_t)0x23cabc09, (q31_t)0x851b222e, (q31_t)0x23c4b3a9, (q31_t)0x8519608d,
+  (q31_t)0x23beab33, (q31_t)0x85179f39, (q31_t)0x23b8a2a7, (q31_t)0x8515de30, (q31_t)0x23b29a05, (q31_t)0x85141d73, (q31_t)0x23ac914d, (q31_t)0x85125d02,
+  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x23a07f9a, (q31_t)0x850edd03, (q31_t)0x239a76a0, (q31_t)0x850d1d75, (q31_t)0x23946d90, (q31_t)0x850b5e34,
+  (q31_t)0x238e646a, (q31_t)0x85099f3e, (q31_t)0x23885b2e, (q31_t)0x8507e094, (q31_t)0x238251dd, (q31_t)0x85062235, (q31_t)0x237c4875, (q31_t)0x85046423,
+  (q31_t)0x23763ef7, (q31_t)0x8502a65c, (q31_t)0x23703564, (q31_t)0x8500e8e2, (q31_t)0x236a2bba, (q31_t)0x84ff2bb3, (q31_t)0x236421fb, (q31_t)0x84fd6ed0,
+  (q31_t)0x235e1826, (q31_t)0x84fbb239, (q31_t)0x23580e3b, (q31_t)0x84f9f5ee, (q31_t)0x2352043b, (q31_t)0x84f839ee, (q31_t)0x234bfa24, (q31_t)0x84f67e3b,
+  (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x233fe5b6, (q31_t)0x84f307b8, (q31_t)0x2339db5e, (q31_t)0x84f14ce8, (q31_t)0x2333d0f1, (q31_t)0x84ef9265,
+  (q31_t)0x232dc66d, (q31_t)0x84edd82d, (q31_t)0x2327bbd5, (q31_t)0x84ec1e41, (q31_t)0x2321b126, (q31_t)0x84ea64a1, (q31_t)0x231ba662, (q31_t)0x84e8ab4d,
+  (q31_t)0x23159b88, (q31_t)0x84e6f244, (q31_t)0x230f9098, (q31_t)0x84e53988, (q31_t)0x23098593, (q31_t)0x84e38118, (q31_t)0x23037a78, (q31_t)0x84e1c8f3,
+  (q31_t)0x22fd6f48, (q31_t)0x84e0111b, (q31_t)0x22f76402, (q31_t)0x84de598f, (q31_t)0x22f158a7, (q31_t)0x84dca24e, (q31_t)0x22eb4d36, (q31_t)0x84daeb5a,
+  (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22df3613, (q31_t)0x84d77e54, (q31_t)0x22d92a61, (q31_t)0x84d5c844, (q31_t)0x22d31e9a, (q31_t)0x84d4127f,
+  (q31_t)0x22cd12bd, (q31_t)0x84d25d06, (q31_t)0x22c706cb, (q31_t)0x84d0a7da, (q31_t)0x22c0fac4, (q31_t)0x84cef2f9, (q31_t)0x22baeea7, (q31_t)0x84cd3e64,
+  (q31_t)0x22b4e274, (q31_t)0x84cb8a1b, (q31_t)0x22aed62c, (q31_t)0x84c9d61f, (q31_t)0x22a8c9cf, (q31_t)0x84c8226e, (q31_t)0x22a2bd5d, (q31_t)0x84c66f09,
+  (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0, (q31_t)0x2296a437, (q31_t)0x84c30924, (q31_t)0x22909785, (q31_t)0x84c156a3, (q31_t)0x228a8abd, (q31_t)0x84bfa46e,
+  (q31_t)0x22847de0, (q31_t)0x84bdf286, (q31_t)0x227e70ed, (q31_t)0x84bc40e9, (q31_t)0x227863e5, (q31_t)0x84ba8f98, (q31_t)0x227256c8, (q31_t)0x84b8de94,
+  (q31_t)0x226c4996, (q31_t)0x84b72ddb, (q31_t)0x22663c4e, (q31_t)0x84b57d6f, (q31_t)0x22602ef1, (q31_t)0x84b3cd4f, (q31_t)0x225a217f, (q31_t)0x84b21d7a,
+  (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x224e065c, (q31_t)0x84aebeb6, (q31_t)0x2247f8aa, (q31_t)0x84ad0fc6, (q31_t)0x2241eae3, (q31_t)0x84ab6122,
+  (q31_t)0x223bdd08, (q31_t)0x84a9b2ca, (q31_t)0x2235cf17, (q31_t)0x84a804be, (q31_t)0x222fc111, (q31_t)0x84a656fe, (q31_t)0x2229b2f6, (q31_t)0x84a4a98a,
+  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x221d9680, (q31_t)0x84a14f87, (q31_t)0x22178826, (q31_t)0x849fa2f7, (q31_t)0x221179b7, (q31_t)0x849df6b4,
+  (q31_t)0x220b6b32, (q31_t)0x849c4abd, (q31_t)0x22055c99, (q31_t)0x849a9f12, (q31_t)0x21ff4dea, (q31_t)0x8498f3b3, (q31_t)0x21f93f27, (q31_t)0x849748a0,
+  (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21ed2162, (q31_t)0x8493f35e, (q31_t)0x21e71260, (q31_t)0x84924930, (q31_t)0x21e10349, (q31_t)0x84909f4e,
+  (q31_t)0x21daf41d, (q31_t)0x848ef5b7, (q31_t)0x21d4e4dc, (q31_t)0x848d4c6d, (q31_t)0x21ced586, (q31_t)0x848ba36f, (q31_t)0x21c8c61c, (q31_t)0x8489fabe,
+  (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x21bca708, (q31_t)0x8486aa3e, (q31_t)0x21b6975f, (q31_t)0x84850271, (q31_t)0x21b087a1, (q31_t)0x84835af0,
+  (q31_t)0x21aa77cf, (q31_t)0x8481b3bb, (q31_t)0x21a467e7, (q31_t)0x84800cd2, (q31_t)0x219e57eb, (q31_t)0x847e6636, (q31_t)0x219847da, (q31_t)0x847cbfe5,
+  (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x218c277a, (q31_t)0x84797429, (q31_t)0x2186172b, (q31_t)0x8477cebd, (q31_t)0x218006c8, (q31_t)0x8476299e,
+  (q31_t)0x2179f64f, (q31_t)0x847484ca, (q31_t)0x2173e5c2, (q31_t)0x8472e043, (q31_t)0x216dd521, (q31_t)0x84713c08, (q31_t)0x2167c46b, (q31_t)0x846f9819,
+  (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x215ba2c0, (q31_t)0x846c5120, (q31_t)0x215591cc, (q31_t)0x846aae16, (q31_t)0x214f80c4, (q31_t)0x84690b58,
+  (q31_t)0x21496fa7, (q31_t)0x846768e7, (q31_t)0x21435e75, (q31_t)0x8465c6c1, (q31_t)0x213d4d2f, (q31_t)0x846424e8, (q31_t)0x21373bd4, (q31_t)0x8462835b,
+  (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x212b18e1, (q31_t)0x845f4126, (q31_t)0x21250749, (q31_t)0x845da07e, (q31_t)0x211ef59d, (q31_t)0x845c0022,
+  (q31_t)0x2118e3dc, (q31_t)0x845a6012, (q31_t)0x2112d206, (q31_t)0x8458c04f, (q31_t)0x210cc01d, (q31_t)0x845720d8, (q31_t)0x2106ae1e, (q31_t)0x845581ad,
+  (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20fa89e5, (q31_t)0x8452443d, (q31_t)0x20f477aa, (q31_t)0x8450a5f7, (q31_t)0x20ee655a, (q31_t)0x844f07fd,
+  (q31_t)0x20e852f6, (q31_t)0x844d6a50, (q31_t)0x20e2407e, (q31_t)0x844bccef, (q31_t)0x20dc2df2, (q31_t)0x844a2fda, (q31_t)0x20d61b51, (q31_t)0x84489311,
+  (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20c9f5d3, (q31_t)0x84455a66, (q31_t)0x20c3e2f5, (q31_t)0x8443be82, (q31_t)0x20bdd003, (q31_t)0x844222eb,
+  (q31_t)0x20b7bcfe, (q31_t)0x844087a0, (q31_t)0x20b1a9e4, (q31_t)0x843eeca2, (q31_t)0x20ab96b5, (q31_t)0x843d51f0, (q31_t)0x20a58373, (q31_t)0x843bb78a,
+  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x20995cb2, (q31_t)0x843883a3, (q31_t)0x20934933, (q31_t)0x8436ea23, (q31_t)0x208d35a0, (q31_t)0x843550ee,
+  (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x20810e3e, (q31_t)0x84321f6b, (q31_t)0x207afa6f, (q31_t)0x8430871b, (q31_t)0x2074e68c, (q31_t)0x842eef18,
+  (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x2068be8a, (q31_t)0x842bbff8, (q31_t)0x2062aa6b, (q31_t)0x842a28da, (q31_t)0x205c9638, (q31_t)0x84289209,
+  (q31_t)0x205681f1, (q31_t)0x8426fb84, (q31_t)0x20506d96, (q31_t)0x8425654b, (q31_t)0x204a5927, (q31_t)0x8423cf5f, (q31_t)0x204444a4, (q31_t)0x842239bf,
+  (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x20381b63, (q31_t)0x841f0f65, (q31_t)0x203206a4, (q31_t)0x841d7aaa, (q31_t)0x202bf1d2, (q31_t)0x841be63c,
+  (q31_t)0x2025dcec, (q31_t)0x841a521a, (q31_t)0x201fc7f2, (q31_t)0x8418be45, (q31_t)0x2019b2e4, (q31_t)0x84172abc, (q31_t)0x20139dc2, (q31_t)0x84159780,
+  (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x20077344, (q31_t)0x841271ec, (q31_t)0x20015de7, (q31_t)0x8410df95, (q31_t)0x1ffb4876, (q31_t)0x840f4d8a,
+  (q31_t)0x1ff532f2, (q31_t)0x840dbbcc, (q31_t)0x1fef1d59, (q31_t)0x840c2a5a, (q31_t)0x1fe907ae, (q31_t)0x840a9935, (q31_t)0x1fe2f1ee, (q31_t)0x8409085c,
+  (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fd6c634, (q31_t)0x8405e790, (q31_t)0x1fd0b03a, (q31_t)0x8404579d, (q31_t)0x1fca9a2b, (q31_t)0x8402c7f6,
+  (q31_t)0x1fc4840a, (q31_t)0x8401389b, (q31_t)0x1fbe6dd4, (q31_t)0x83ffa98d, (q31_t)0x1fb8578b, (q31_t)0x83fe1acc, (q31_t)0x1fb2412f, (q31_t)0x83fc8c57,
+  (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1fa6143b, (q31_t)0x83f97052, (q31_t)0x1f9ffda4, (q31_t)0x83f7e2c3, (q31_t)0x1f99e6fa, (q31_t)0x83f65580,
+  (q31_t)0x1f93d03c, (q31_t)0x83f4c889, (q31_t)0x1f8db96a, (q31_t)0x83f33bdf, (q31_t)0x1f87a285, (q31_t)0x83f1af82, (q31_t)0x1f818b8d, (q31_t)0x83f02371,
+  (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f755d61, (q31_t)0x83ed0c35, (q31_t)0x1f6f462f, (q31_t)0x83eb810a, (q31_t)0x1f692ee9, (q31_t)0x83e9f62b,
+  (q31_t)0x1f63178f, (q31_t)0x83e86b99, (q31_t)0x1f5d0022, (q31_t)0x83e6e153, (q31_t)0x1f56e8a2, (q31_t)0x83e5575a, (q31_t)0x1f50d10e, (q31_t)0x83e3cdad,
+  (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f44a1ad, (q31_t)0x83e0bb3a, (q31_t)0x1f3e89e0, (q31_t)0x83df3273, (q31_t)0x1f3871ff, (q31_t)0x83dda9f9,
+  (q31_t)0x1f325a0b, (q31_t)0x83dc21cb, (q31_t)0x1f2c4204, (q31_t)0x83da99ea, (q31_t)0x1f2629ea, (q31_t)0x83d91255, (q31_t)0x1f2011bc, (q31_t)0x83d78b0d,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f13e127, (q31_t)0x83d47d63, (q31_t)0x1f0dc8c0, (q31_t)0x83d2f701, (q31_t)0x1f07b045, (q31_t)0x83d170eb,
+  (q31_t)0x1f0197b8, (q31_t)0x83cfeb22, (q31_t)0x1efb7f17, (q31_t)0x83ce65a6, (q31_t)0x1ef56664, (q31_t)0x83cce076, (q31_t)0x1eef4d9d, (q31_t)0x83cb5b93,
+  (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ee31bd6, (q31_t)0x83c852b2, (q31_t)0x1edd02d6, (q31_t)0x83c6ceb5, (q31_t)0x1ed6e9c3, (q31_t)0x83c54b04,
+  (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0, (q31_t)0x1ecab763, (q31_t)0x83c24488, (q31_t)0x1ec49e17, (q31_t)0x83c0c1be, (q31_t)0x1ebe84b8, (q31_t)0x83bf3f3f,
+  (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1eb251c1, (q31_t)0x83bc3b29, (q31_t)0x1eac3829, (q31_t)0x83bab991, (q31_t)0x1ea61e7e, (q31_t)0x83b93845,
+  (q31_t)0x1ea004c1, (q31_t)0x83b7b746, (q31_t)0x1e99eaf0, (q31_t)0x83b63694, (q31_t)0x1e93d10c, (q31_t)0x83b4b62e, (q31_t)0x1e8db716, (q31_t)0x83b33616,
+  (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e8182f1, (q31_t)0x83b036ca, (q31_t)0x1e7b68c2, (q31_t)0x83aeb797, (q31_t)0x1e754e80, (q31_t)0x83ad38b1,
+  (q31_t)0x1e6f342c, (q31_t)0x83abba17, (q31_t)0x1e6919c4, (q31_t)0x83aa3bca, (q31_t)0x1e62ff4a, (q31_t)0x83a8bdca, (q31_t)0x1e5ce4be, (q31_t)0x83a74017,
+  (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e50af6c, (q31_t)0x83a44596, (q31_t)0x1e4a94a7, (q31_t)0x83a2c8c9, (q31_t)0x1e4479cf, (q31_t)0x83a14c48,
+  (q31_t)0x1e3e5ee5, (q31_t)0x839fd014, (q31_t)0x1e3843e8, (q31_t)0x839e542d, (q31_t)0x1e3228d9, (q31_t)0x839cd893, (q31_t)0x1e2c0db6, (q31_t)0x839b5d45,
+  (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e1fd73a, (q31_t)0x83986790, (q31_t)0x1e19bbe0, (q31_t)0x8396ed29, (q31_t)0x1e13a074, (q31_t)0x8395730e,
+  (q31_t)0x1e0d84f5, (q31_t)0x8393f940, (q31_t)0x1e076963, (q31_t)0x83927fbf, (q31_t)0x1e014dbf, (q31_t)0x8391068a, (q31_t)0x1dfb3208, (q31_t)0x838f8da2,
+  (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1deefa63, (q31_t)0x838c9cb9, (q31_t)0x1de8de75, (q31_t)0x838b24b8, (q31_t)0x1de2c275, (q31_t)0x8389ad03,
+  (q31_t)0x1ddca662, (q31_t)0x8388359b, (q31_t)0x1dd68a3c, (q31_t)0x8386be80, (q31_t)0x1dd06e04, (q31_t)0x838547b2, (q31_t)0x1dca51ba, (q31_t)0x8383d130,
+  (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dbe18ef, (q31_t)0x8380e513, (q31_t)0x1db7fc6d, (q31_t)0x837f6f78, (q31_t)0x1db1dfda, (q31_t)0x837dfa2a,
+  (q31_t)0x1dabc334, (q31_t)0x837c8528, (q31_t)0x1da5a67c, (q31_t)0x837b1074, (q31_t)0x1d9f89b1, (q31_t)0x83799c0c, (q31_t)0x1d996cd4, (q31_t)0x837827f0,
+  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d8d32e4, (q31_t)0x837540a1, (q31_t)0x1d8715d0, (q31_t)0x8373cd6c, (q31_t)0x1d80f8ab, (q31_t)0x83725a84,
+  (q31_t)0x1d7adb73, (q31_t)0x8370e7e9, (q31_t)0x1d74be29, (q31_t)0x836f759b, (q31_t)0x1d6ea0cc, (q31_t)0x836e039a, (q31_t)0x1d68835e, (q31_t)0x836c91e5,
+  (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d5c484b, (q31_t)0x8369af63, (q31_t)0x1d562aa6, (q31_t)0x83683e95, (q31_t)0x1d500cef, (q31_t)0x8366ce14,
+  (q31_t)0x1d49ef26, (q31_t)0x83655ddf, (q31_t)0x1d43d14b, (q31_t)0x8363edf8, (q31_t)0x1d3db35e, (q31_t)0x83627e5d, (q31_t)0x1d37955e, (q31_t)0x83610f10,
+  (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d2b592a, (q31_t)0x835e315b, (q31_t)0x1d253af5, (q31_t)0x835cc2f4, (q31_t)0x1d1f1cae, (q31_t)0x835b54da,
+  (q31_t)0x1d18fe54, (q31_t)0x8359e70d, (q31_t)0x1d12dfe9, (q31_t)0x8358798c, (q31_t)0x1d0cc16c, (q31_t)0x83570c59, (q31_t)0x1d06a2dd, (q31_t)0x83559f72,
+  (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1cfa658a, (q31_t)0x8352c68c, (q31_t)0x1cf446c5, (q31_t)0x83515a8c, (q31_t)0x1cee27ef, (q31_t)0x834feed9,
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+  (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cc96d72, (q31_t)0x83476ef6, (q31_t)0x1cc34e1f, (q31_t)0x8346055e, (q31_t)0x1cbd2eba, (q31_t)0x83449c12,
+  (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1cb0efbb, (q31_t)0x8341ca62, (q31_t)0x1caad021, (q31_t)0x834061fd, (q31_t)0x1ca4b075, (q31_t)0x833ef9e6,
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+  (q31_t)0x1c861113, (q31_t)0x8337f5f1, (q31_t)0x1c7ff0fd, (q31_t)0x83368fa7, (q31_t)0x1c79d0d6, (q31_t)0x833529aa, (q31_t)0x1c73b09d, (q31_t)0x8333c3fa,
+  (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c676ff8, (q31_t)0x8330f981, (q31_t)0x1c614f8b, (q31_t)0x832f94b8, (q31_t)0x1c5b2f0c, (q31_t)0x832e303c,
+  (q31_t)0x1c550e7c, (q31_t)0x832ccc0d, (q31_t)0x1c4eedda, (q31_t)0x832b682b, (q31_t)0x1c48cd27, (q31_t)0x832a0496, (q31_t)0x1c42ac62, (q31_t)0x8328a14d,
+  (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c366aa5, (q31_t)0x8325dba4, (q31_t)0x1c3049ac, (q31_t)0x83247943, (q31_t)0x1c2a28a2, (q31_t)0x8323172f,
+  (q31_t)0x1c240786, (q31_t)0x8321b568, (q31_t)0x1c1de659, (q31_t)0x832053ee, (q31_t)0x1c17c51b, (q31_t)0x831ef2c1, (q31_t)0x1c11a3cb, (q31_t)0x831d91e1,
+  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1c0560f8, (q31_t)0x831ad109, (q31_t)0x1bff3f75, (q31_t)0x83197110, (q31_t)0x1bf91de0, (q31_t)0x83181164,
+  (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1becda83, (q31_t)0x831552f4, (q31_t)0x1be6b8ba, (q31_t)0x8313f42f, (q31_t)0x1be096e0, (q31_t)0x831295b7,
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+  (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6, (q31_t)0x1bbbca5e, (q31_t)0x830a653c, (q31_t)0x1bb5a80c, (q31_t)0x830908e0, (q31_t)0x1baf85a9, (q31_t)0x8307acd1,
+  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1ba340b0, (q31_t)0x8304f59b, (q31_t)0x1b9d1e1a, (q31_t)0x83039a73, (q31_t)0x1b96fb73, (q31_t)0x83023f98,
+  (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b8ab5f2, (q31_t)0x82ff8acb, (q31_t)0x1b849317, (q31_t)0x82fe30d7, (q31_t)0x1b7e702c, (q31_t)0x82fcd731,
+  (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b722a23, (q31_t)0x82fa24cc, (q31_t)0x1b6c0705, (q31_t)0x82f8cc0d, (q31_t)0x1b65e3d7, (q31_t)0x82f7739c,
+  (q31_t)0x1b5fc097, (q31_t)0x82f61b77, (q31_t)0x1b599d46, (q31_t)0x82f4c3a0, (q31_t)0x1b5379e5, (q31_t)0x82f36c15, (q31_t)0x1b4d5672, (q31_t)0x82f214d8,
+  (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b410f5b, (q31_t)0x82ef6745, (q31_t)0x1b3aebb6, (q31_t)0x82ee10ef, (q31_t)0x1b34c801, (q31_t)0x82ecbae7,
+  (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b288063, (q31_t)0x82ea0fbd, (q31_t)0x1b225c7b, (q31_t)0x82e8ba9c, (q31_t)0x1b1c3883, (q31_t)0x82e765c8,
+  (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1b0ff05f, (q31_t)0x82e4bd07, (q31_t)0x1b09cc34, (q31_t)0x82e3691b, (q31_t)0x1b03a7f9, (q31_t)0x82e2157c,
+  (q31_t)0x1afd83ad, (q31_t)0x82e0c22a, (q31_t)0x1af75f50, (q31_t)0x82df6f25, (q31_t)0x1af13ae3, (q31_t)0x82de1c6d, (q31_t)0x1aeb1665, (q31_t)0x82dcca02,
+  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1adecd37, (q31_t)0x82da2615, (q31_t)0x1ad8a887, (q31_t)0x82d8d492, (q31_t)0x1ad283c7, (q31_t)0x82d7835c,
+  (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ac63a14, (q31_t)0x82d4e1d8, (q31_t)0x1ac01522, (q31_t)0x82d3918a, (q31_t)0x1ab9f020, (q31_t)0x82d24189,
+  (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1aada5e9, (q31_t)0x82cfa26f, (q31_t)0x1aa780b6, (q31_t)0x82ce5356, (q31_t)0x1aa15b71, (q31_t)0x82cd048a,
+  (q31_t)0x1a9b361d, (q31_t)0x82cbb60b, (q31_t)0x1a9510b7, (q31_t)0x82ca67d9, (q31_t)0x1a8eeb42, (q31_t)0x82c919f5, (q31_t)0x1a88c5bc, (q31_t)0x82c7cc5e,
+  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a7c7a7f, (q31_t)0x82c53217, (q31_t)0x1a7654c8, (q31_t)0x82c3e568, (q31_t)0x1a702f01, (q31_t)0x82c29906,
+  (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a63e341, (q31_t)0x82c00129, (q31_t)0x1a5dbd49, (q31_t)0x82beb5af, (q31_t)0x1a579741, (q31_t)0x82bd6a82,
+  (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a4b4aff, (q31_t)0x82bad50f, (q31_t)0x1a4524c6, (q31_t)0x82b98aca, (q31_t)0x1a3efe7c, (q31_t)0x82b840d2,
+  (q31_t)0x1a38d823, (q31_t)0x82b6f727, (q31_t)0x1a32b1b9, (q31_t)0x82b5adca, (q31_t)0x1a2c8b3f, (q31_t)0x82b464ba, (q31_t)0x1a2664b5, (q31_t)0x82b31bf7,
+  (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a1a1771, (q31_t)0x82b08b59, (q31_t)0x1a13f0b6, (q31_t)0x82af437e, (q31_t)0x1a0dc9ec, (q31_t)0x82adfbf0,
+  (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x1a017c27, (q31_t)0x82ab6dbd, (q31_t)0x19fb552c, (q31_t)0x82aa2717, (q31_t)0x19f52e22, (q31_t)0x82a8e0bf,
+  (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19e8dfdc, (q31_t)0x82a654f6, (q31_t)0x19e2b8a2, (q31_t)0x82a50f85, (q31_t)0x19dc9157, (q31_t)0x82a3ca62,
+  (q31_t)0x19d669fc, (q31_t)0x82a2858c, (q31_t)0x19d04292, (q31_t)0x82a14104, (q31_t)0x19ca1b17, (q31_t)0x829ffcc8, (q31_t)0x19c3f38d, (q31_t)0x829eb8db,
+  (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19b7a449, (q31_t)0x829c31e7, (q31_t)0x19b17c8f, (q31_t)0x829aeee1, (q31_t)0x19ab54c5, (q31_t)0x8299ac29,
+  (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x199f0502, (q31_t)0x829727a0, (q31_t)0x1998dd09, (q31_t)0x8295e5cf, (q31_t)0x1992b4ff, (q31_t)0x8294a44c,
+  (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x198664be, (q31_t)0x8292222e, (q31_t)0x19803c86, (q31_t)0x8290e194, (q31_t)0x197a143e, (q31_t)0x828fa146,
+  (q31_t)0x1973ebe6, (q31_t)0x828e6146, (q31_t)0x196dc37e, (q31_t)0x828d2193, (q31_t)0x19679b07, (q31_t)0x828be22e, (q31_t)0x19617280, (q31_t)0x828aa316,
+  (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x19552144, (q31_t)0x828825ce, (q31_t)0x194ef88e, (q31_t)0x8286e79e, (q31_t)0x1948cfc8, (q31_t)0x8285a9bb,
+  (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x193c7e0f, (q31_t)0x82832edf, (q31_t)0x1936551b, (q31_t)0x8281f1e4, (q31_t)0x19302c17, (q31_t)0x8280b538,
+  (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x1923d9e1, (q31_t)0x827e3cc6, (q31_t)0x191db0af, (q31_t)0x827d0102, (q31_t)0x1917876d, (q31_t)0x827bc58a,
+  (q31_t)0x19115e1c, (q31_t)0x827a8a61, (q31_t)0x190b34bb, (q31_t)0x82794f84, (q31_t)0x19050b4b, (q31_t)0x827814f6, (q31_t)0x18fee1cb, (q31_t)0x8276dab4,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18f28e9e, (q31_t)0x8274671a, (q31_t)0x18ec64f0, (q31_t)0x82732dc0, (q31_t)0x18e63b33, (q31_t)0x8271f4b5,
+  (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18d9e78b, (q31_t)0x826f8386, (q31_t)0x18d3bda0, (q31_t)0x826e4b62, (q31_t)0x18cd93a5, (q31_t)0x826d138d,
+  (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18c13f82, (q31_t)0x826aa4c9, (q31_t)0x18bb155a, (q31_t)0x82696ddc, (q31_t)0x18b4eb22, (q31_t)0x8268373c,
+  (q31_t)0x18aec0db, (q31_t)0x826700e9, (q31_t)0x18a89685, (q31_t)0x8265cae4, (q31_t)0x18a26c20, (q31_t)0x8264952d, (q31_t)0x189c41ab, (q31_t)0x82635fc2,
+  (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x188fec95, (q31_t)0x8260f5d7, (q31_t)0x1889c1f3, (q31_t)0x825fc155, (q31_t)0x18839742, (q31_t)0x825e8d21,
+  (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x187741b2, (q31_t)0x825c25a1, (q31_t)0x187116d4, (q31_t)0x825af255, (q31_t)0x186aebe6, (q31_t)0x8259bf57,
+  (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x185e95de, (q31_t)0x82575a44, (q31_t)0x18586ac3, (q31_t)0x8256282e, (q31_t)0x18523f9a, (q31_t)0x8254f666,
+  (q31_t)0x184c1461, (q31_t)0x8253c4eb, (q31_t)0x1845e919, (q31_t)0x825293be, (q31_t)0x183fbdc3, (q31_t)0x825162df, (q31_t)0x1839925d, (q31_t)0x8250324d,
+  (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x182d3b65, (q31_t)0x824dd211, (q31_t)0x18270fd3, (q31_t)0x824ca268, (q31_t)0x1820e431, (q31_t)0x824b730c,
+  (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x18148cc2, (q31_t)0x8249153d, (q31_t)0x180e60f4, (q31_t)0x8247e6ca, (q31_t)0x18083518, (q31_t)0x8246b8a4,
+  (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17fbdd32, (q31_t)0x82445d41, (q31_t)0x17f5b129, (q31_t)0x82433004, (q31_t)0x17ef8511, (q31_t)0x82420315,
+  (q31_t)0x17e958ea, (q31_t)0x8240d673, (q31_t)0x17e32cb5, (q31_t)0x823faa1e, (q31_t)0x17dd0070, (q31_t)0x823e7e18, (q31_t)0x17d6d41d, (q31_t)0x823d525e,
+  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17ca7b4c, (q31_t)0x823afbd5, (q31_t)0x17c44ecd, (q31_t)0x8239d104, (q31_t)0x17be223f, (q31_t)0x8238a681,
+  (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x17b1c8f8, (q31_t)0x82365264, (q31_t)0x17ab9c3e, (q31_t)0x823528ca, (q31_t)0x17a56f76, (q31_t)0x8233ff7e,
+  (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x179915ba, (q31_t)0x8231adce, (q31_t)0x1792e8c6, (q31_t)0x8230856a, (q31_t)0x178cbbc4, (q31_t)0x822f5d54,
+  (q31_t)0x17868eb3, (q31_t)0x822e358b, (q31_t)0x17806194, (q31_t)0x822d0e10, (q31_t)0x177a3466, (q31_t)0x822be6e3, (q31_t)0x17740729, (q31_t)0x822ac004,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x1767ac85, (q31_t)0x8228732d, (q31_t)0x17617f1d, (q31_t)0x82274d36, (q31_t)0x175b51a7, (q31_t)0x8226278d,
+  (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x174ef68f, (q31_t)0x8223dd24, (q31_t)0x1748c8ee, (q31_t)0x8222b863, (q31_t)0x17429b3e, (q31_t)0x822193f1,
+  (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x17363fb4, (q31_t)0x821f4bf5, (q31_t)0x173011d9, (q31_t)0x821e286b, (q31_t)0x1729e3f0, (q31_t)0x821d052f,
+  (q31_t)0x1723b5f9, (q31_t)0x821be240, (q31_t)0x171d87f3, (q31_t)0x821abfa0, (q31_t)0x171759df, (q31_t)0x82199d4d, (q31_t)0x17112bbd, (q31_t)0x82187b47,
+  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x1704cf4f, (q31_t)0x82163826, (q31_t)0x16fea102, (q31_t)0x82151709, (q31_t)0x16f872a7, (q31_t)0x8213f63a,
+  (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16ec15c7, (q31_t)0x8211b586, (q31_t)0x16e5e741, (q31_t)0x821095a0, (q31_t)0x16dfb8ae, (q31_t)0x820f7608,
+  (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16d35b5c, (q31_t)0x820d37c1, (q31_t)0x16cd2c9f, (q31_t)0x820c1912, (q31_t)0x16c6fdd3, (q31_t)0x820afab1,
+  (q31_t)0x16c0cef9, (q31_t)0x8209dc9e, (q31_t)0x16baa011, (q31_t)0x8208bed8, (q31_t)0x16b4711b, (q31_t)0x8207a160, (q31_t)0x16ae4217, (q31_t)0x82068435,
+  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16a1e3e5, (q31_t)0x82044ac9, (q31_t)0x169bb4b7, (q31_t)0x82032e88, (q31_t)0x1695857b, (q31_t)0x82021294,
+  (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x168926da, (q31_t)0x81ffdb96, (q31_t)0x1682f774, (q31_t)0x81fec08c, (q31_t)0x167cc801, (q31_t)0x81fda5cf,
+  (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x167068f0, (q31_t)0x81fb713f, (q31_t)0x166a3953, (q31_t)0x81fa576c, (q31_t)0x166409a8, (q31_t)0x81f93de6,
+  (q31_t)0x165dd9f0, (q31_t)0x81f824ae, (q31_t)0x1657aa29, (q31_t)0x81f70bc3, (q31_t)0x16517a55, (q31_t)0x81f5f327, (q31_t)0x164b4a73, (q31_t)0x81f4dad8,
+  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x163eea86, (q31_t)0x81f2ab24, (q31_t)0x1638ba7a, (q31_t)0x81f193be, (q31_t)0x16328a61, (q31_t)0x81f07ca6,
+  (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16262a06, (q31_t)0x81ee4f60, (q31_t)0x161ff9c4, (q31_t)0x81ed3932, (q31_t)0x1619c975, (q31_t)0x81ec2351,
+  (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x160d68ad, (q31_t)0x81e9f879, (q31_t)0x16073834, (q31_t)0x81e8e381, (q31_t)0x160107ae, (q31_t)0x81e7ced8,
+  (q31_t)0x15fad71b, (q31_t)0x81e6ba7c, (q31_t)0x15f4a679, (q31_t)0x81e5a66e, (q31_t)0x15ee75cb, (q31_t)0x81e492ad, (q31_t)0x15e8450e, (q31_t)0x81e37f3b,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15dbe36d, (q31_t)0x81e1593f, (q31_t)0x15d5b288, (q31_t)0x81e046b6, (q31_t)0x15cf8196, (q31_t)0x81df347b,
+  (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15c31f89, (q31_t)0x81dd10ee, (q31_t)0x15bcee6f, (q31_t)0x81dbff9c, (q31_t)0x15b6bd47, (q31_t)0x81daee98,
+  (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x15aa5acf, (q31_t)0x81d8cd79, (q31_t)0x15a4297f, (q31_t)0x81d7bd5e, (q31_t)0x159df821, (q31_t)0x81d6ad92,
+  (q31_t)0x1597c6b7, (q31_t)0x81d59e13, (q31_t)0x1591953e, (q31_t)0x81d48ee1, (q31_t)0x158b63b9, (q31_t)0x81d37ffe, (q31_t)0x15853226, (q31_t)0x81d27169,
+  (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x1578ced9, (q31_t)0x81d05527, (q31_t)0x15729d1f, (q31_t)0x81cf477b, (q31_t)0x156c6b57, (q31_t)0x81ce3a1d,
+  (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x156007a0, (q31_t)0x81cc204a, (q31_t)0x1559d5b1, (q31_t)0x81cb13d5, (q31_t)0x1553a3b4, (q31_t)0x81ca07af,
+  (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x15473f94, (q31_t)0x81c7f04b, (q31_t)0x15410d70, (q31_t)0x81c6e50d, (q31_t)0x153adb3f, (q31_t)0x81c5da1e,
+  (q31_t)0x1534a901, (q31_t)0x81c4cf7d, (q31_t)0x152e76b5, (q31_t)0x81c3c529, (q31_t)0x1528445d, (q31_t)0x81c2bb23, (q31_t)0x152211f8, (q31_t)0x81c1b16b,
+  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1515ad06, (q31_t)0x81bf9ee5, (q31_t)0x150f7a7a, (q31_t)0x81be9617, (q31_t)0x150947e1, (q31_t)0x81bd8d97,
+  (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14fce287, (q31_t)0x81bb7d7f, (q31_t)0x14f6afc7, (q31_t)0x81ba75e9, (q31_t)0x14f07cf9, (q31_t)0x81b96ea0,
+  (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14e41738, (q31_t)0x81b760f8, (q31_t)0x14dde445, (q31_t)0x81b65a99, (q31_t)0x14d7b144, (q31_t)0x81b55488,
+  (q31_t)0x14d17e36, (q31_t)0x81b44ec4, (q31_t)0x14cb4b1c, (q31_t)0x81b3494f, (q31_t)0x14c517f4, (q31_t)0x81b24427, (q31_t)0x14bee4c0, (q31_t)0x81b13f4e,
+  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x14b27e32, (q31_t)0x81af3684, (q31_t)0x14ac4ad7, (q31_t)0x81ae3294, (q31_t)0x14a61770, (q31_t)0x81ad2ef2,
+  (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x1499b07c, (q31_t)0x81ab2898, (q31_t)0x14937cee, (q31_t)0x81aa25e0, (q31_t)0x148d4954, (q31_t)0x81a92376,
+  (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x1480e1fa, (q31_t)0x81a71f8b, (q31_t)0x147aae3a, (q31_t)0x81a61e0b, (q31_t)0x14747a6d, (q31_t)0x81a51cd8,
+  (q31_t)0x146e4694, (q31_t)0x81a41bf4, (q31_t)0x146812ae, (q31_t)0x81a31b5d, (q31_t)0x1461debc, (q31_t)0x81a21b14, (q31_t)0x145baabd, (q31_t)0x81a11b1a,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x144f4299, (q31_t)0x819f1c0e, (q31_t)0x14490e74, (q31_t)0x819e1cfd, (q31_t)0x1442da43, (q31_t)0x819d1e3a,
+  (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x143671bb, (q31_t)0x819b219e, (q31_t)0x14303d65, (q31_t)0x819a23c5, (q31_t)0x142a0902, (q31_t)0x8199263a,
+  (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x141da016, (q31_t)0x81972c0e, (q31_t)0x14176b8e, (q31_t)0x81962f6d, (q31_t)0x141136f9, (q31_t)0x8195331a,
+  (q31_t)0x140b0258, (q31_t)0x81943715, (q31_t)0x1404cdaa, (q31_t)0x81933b5e, (q31_t)0x13fe98f1, (q31_t)0x81923ff4, (q31_t)0x13f8642a, (q31_t)0x819144d9,
+  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13ebfa79, (q31_t)0x818f4f8d, (q31_t)0x13e5c58e, (q31_t)0x818e555c, (q31_t)0x13df9097, (q31_t)0x818d5b78,
+  (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13d32683, (q31_t)0x818b689c, (q31_t)0x13ccf167, (q31_t)0x818a6fa3, (q31_t)0x13c6bc3f, (q31_t)0x818976f8,
+  (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13ba51ca, (q31_t)0x8187868b, (q31_t)0x13b41c7d, (q31_t)0x81868eca, (q31_t)0x13ade724, (q31_t)0x81859757,
+  (q31_t)0x13a7b1bf, (q31_t)0x8184a032, (q31_t)0x13a17c4d, (q31_t)0x8183a95b, (q31_t)0x139b46d0, (q31_t)0x8182b2d1, (q31_t)0x13951146, (q31_t)0x8181bc96,
+  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x1388a60f, (q31_t)0x817fd10a, (q31_t)0x13827062, (q31_t)0x817edbb9, (q31_t)0x137c3aa8, (q31_t)0x817de6b6,
+  (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x136fcf10, (q31_t)0x817bfd9b, (q31_t)0x13699933, (q31_t)0x817b0982, (q31_t)0x13636349, (q31_t)0x817a15b7,
+  (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x1356f752, (q31_t)0x81782f0b, (q31_t)0x1350c144, (q31_t)0x81773c2b, (q31_t)0x134a8b2b, (q31_t)0x81764998,
+  (q31_t)0x13445505, (q31_t)0x81755754, (q31_t)0x133e1ed4, (q31_t)0x8174655d, (q31_t)0x1337e897, (q31_t)0x817373b5, (q31_t)0x1331b24e, (q31_t)0x8172825a,
+  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x13254599, (q31_t)0x8170a090, (q31_t)0x131f0f2c, (q31_t)0x816fb020, (q31_t)0x1318d8b4, (q31_t)0x816ebffe,
+  (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x130c6ba0, (q31_t)0x816ce0a4, (q31_t)0x13063505, (q31_t)0x816bf16c, (q31_t)0x12fffe5d, (q31_t)0x816b0282,
+  (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12f390ec, (q31_t)0x81692599, (q31_t)0x12ed5a21, (q31_t)0x81683799, (q31_t)0x12e7234b, (q31_t)0x816749e8,
+  (q31_t)0x12e0ec6a, (q31_t)0x81665c84, (q31_t)0x12dab57c, (q31_t)0x81656f6f, (q31_t)0x12d47e83, (q31_t)0x816482a8, (q31_t)0x12ce477f, (q31_t)0x8163962f,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12c1d953, (q31_t)0x8161be27, (q31_t)0x12bba22b, (q31_t)0x8160d298, (q31_t)0x12b56af9, (q31_t)0x815fe758,
+  (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x12a8fc70, (q31_t)0x815e11c1, (q31_t)0x12a2c51b, (q31_t)0x815d276a, (q31_t)0x129c8dba, (q31_t)0x815c3d62,
+  (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x12901ed5, (q31_t)0x815a6a3c, (q31_t)0x1289e752, (q31_t)0x8159811e, (q31_t)0x1283afc3, (q31_t)0x8158984e,
+  (q31_t)0x127d7829, (q31_t)0x8157afcd, (q31_t)0x12774083, (q31_t)0x8156c799, (q31_t)0x127108d2, (q31_t)0x8155dfb4, (q31_t)0x126ad116, (q31_t)0x8154f81d,
+  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x125e617b, (q31_t)0x815329d9, (q31_t)0x1258299c, (q31_t)0x8152432c, (q31_t)0x1251f1b3, (q31_t)0x81515ccd,
+  (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x124581bd, (q31_t)0x814f90fb, (q31_t)0x123f49b2, (q31_t)0x814eab86, (q31_t)0x1239119b, (q31_t)0x814dc660,
+  (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x122ca14b, (q31_t)0x814bfcff, (q31_t)0x12266913, (q31_t)0x814b18c3, (q31_t)0x122030cf, (q31_t)0x814a34d6,
+  (q31_t)0x1219f880, (q31_t)0x81495136, (q31_t)0x1213c026, (q31_t)0x81486de5, (q31_t)0x120d87c1, (q31_t)0x81478ae2, (q31_t)0x12074f50, (q31_t)0x8146a82e,
+  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11fade4e, (q31_t)0x8144e3ae, (q31_t)0x11f4a5bd, (q31_t)0x814401e4, (q31_t)0x11ee6d20, (q31_t)0x81432068,
+  (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11e1fbc5, (q31_t)0x81415e5a, (q31_t)0x11dbc307, (q31_t)0x81407dc9, (q31_t)0x11d58a3e, (q31_t)0x813f9d86,
+  (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11c9188b, (q31_t)0x813ddde9, (q31_t)0x11c2dfa2, (q31_t)0x813cfe91, (q31_t)0x11bca6ad, (q31_t)0x813c1f86,
+  (q31_t)0x11b66dad, (q31_t)0x813b40ca, (q31_t)0x11b034a2, (q31_t)0x813a625b, (q31_t)0x11a9fb8d, (q31_t)0x8139843b, (q31_t)0x11a3c26c, (q31_t)0x8138a66a,
+  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1197500a, (q31_t)0x8136ebb1, (q31_t)0x119116c9, (q31_t)0x81360ec9, (q31_t)0x118add7d, (q31_t)0x81353230,
+  (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x117e6ac5, (q31_t)0x813379e9, (q31_t)0x11783159, (q31_t)0x81329e3b, (q31_t)0x1171f7e2, (q31_t)0x8131c2db,
+  (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x116584d3, (q31_t)0x81300d05, (q31_t)0x115f4b3c, (q31_t)0x812f3290, (q31_t)0x1159119a, (q31_t)0x812e5868,
+  (q31_t)0x1152d7ed, (q31_t)0x812d7e8f, (q31_t)0x114c9e35, (q31_t)0x812ca505, (q31_t)0x11466473, (q31_t)0x812bcbc8, (q31_t)0x11402aa6, (q31_t)0x812af2da,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x1133b6ed, (q31_t)0x812941e8, (q31_t)0x112d7d00, (q31_t)0x812869e4, (q31_t)0x11274309, (q31_t)0x8127922f,
+  (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x111acefb, (q31_t)0x8125e3af, (q31_t)0x111494e4, (q31_t)0x81250ce4, (q31_t)0x110e5ac2, (q31_t)0x81243668,
+  (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x1101e65f, (q31_t)0x81228a5a, (q31_t)0x10fbac1e, (q31_t)0x8121b4c8, (q31_t)0x10f571d3, (q31_t)0x8120df85,
+  (q31_t)0x10ef377d, (q31_t)0x81200a90, (q31_t)0x10e8fd1c, (q31_t)0x811f35e9, (q31_t)0x10e2c2b2, (q31_t)0x811e6191, (q31_t)0x10dc883c, (q31_t)0x811d8d86,
+  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10d01333, (q31_t)0x811be65d, (q31_t)0x10c9d89e, (q31_t)0x811b133d, (q31_t)0x10c39dff, (q31_t)0x811a406c,
+  (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10b728a3, (q31_t)0x81189bb4, (q31_t)0x10b0ede5, (q31_t)0x8117c9ce, (q31_t)0x10aab31d, (q31_t)0x8116f836,
+  (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x109e3d6e, (q31_t)0x811555f1, (q31_t)0x10980287, (q31_t)0x81148544, (q31_t)0x1091c796, (q31_t)0x8113b4e5,
+  (q31_t)0x108b8c9b, (q31_t)0x8112e4d4, (q31_t)0x10855195, (q31_t)0x81121512, (q31_t)0x107f1686, (q31_t)0x8111459e, (q31_t)0x1078db6c, (q31_t)0x81107678,
+  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x106c651a, (q31_t)0x810ed917, (q31_t)0x106629e1, (q31_t)0x810e0adc, (q31_t)0x105fee9f, (q31_t)0x810d3cf0,
+  (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x105377fc, (q31_t)0x810ba202, (q31_t)0x104d3c9b, (q31_t)0x810ad500, (q31_t)0x10470130, (q31_t)0x810a084d,
+  (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x103a8a3d, (q31_t)0x81086fd1, (q31_t)0x10344eb4, (q31_t)0x8107a409, (q31_t)0x102e1321, (q31_t)0x8106d88f,
+  (q31_t)0x1027d784, (q31_t)0x81060d63, (q31_t)0x10219bdd, (q31_t)0x81054286, (q31_t)0x101b602d, (q31_t)0x810477f7, (q31_t)0x10152472, (q31_t)0x8103adb6,
+  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0x1008acdf, (q31_t)0x81021a20, (q31_t)0x10027107, (q31_t)0x810150ca, (q31_t)0xffc3524, (q31_t)0x810087c3,
+  (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfefbd42, (q31_t)0x80fef69f, (q31_t)0xfe98143, (q31_t)0x80fe2e83, (q31_t)0xfe34539, (q31_t)0x80fd66b5,
+  (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfd6cd08, (q31_t)0x80fbd804, (q31_t)0xfd090e1, (q31_t)0x80fb1121, (q31_t)0xfca54b1, (q31_t)0x80fa4a8c,
+  (q31_t)0xfc41876, (q31_t)0x80f98446, (q31_t)0xfbddc32, (q31_t)0x80f8be4e, (q31_t)0xfb79fe4, (q31_t)0x80f7f8a4, (q31_t)0xfb1638d, (q31_t)0x80f73349,
+  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xfa4eac0, (q31_t)0x80f5a97e, (q31_t)0xf9eae4c, (q31_t)0x80f4e50e, (q31_t)0xf9871ce, (q31_t)0x80f420ec,
+  (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf8bf8b4, (q31_t)0x80f29994, (q31_t)0xf85bc19, (q31_t)0x80f1d65d, (q31_t)0xf7f7f75, (q31_t)0x80f11375,
+  (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf73060f, (q31_t)0x80ef8e90, (q31_t)0xf6cc94e, (q31_t)0x80eecc93, (q31_t)0xf668c83, (q31_t)0x80ee0ae4,
+  (q31_t)0xf604faf, (q31_t)0x80ed4984, (q31_t)0xf5a12d1, (q31_t)0x80ec8872, (q31_t)0xf53d5ea, (q31_t)0x80ebc7ae, (q31_t)0xf4d98f9, (q31_t)0x80eb0739,
+  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf411efb, (q31_t)0x80e9873a, (q31_t)0xf3ae1ee, (q31_t)0x80e8c7b0, (q31_t)0xf34a4d8, (q31_t)0x80e80874,
+  (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf282a8f, (q31_t)0x80e68ae8, (q31_t)0xf21ed5d, (q31_t)0x80e5cc98, (q31_t)0xf1bb021, (q31_t)0x80e50e96,
+  (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xf0f358e, (q31_t)0x80e3937d, (q31_t)0xf08f836, (q31_t)0x80e2d666, (q31_t)0xf02bad5, (q31_t)0x80e2199e,
+  (q31_t)0xefc7d6b, (q31_t)0x80e15d24, (q31_t)0xef63ff7, (q31_t)0x80e0a0f8, (q31_t)0xef0027b, (q31_t)0x80dfe51b, (q31_t)0xee9c4f5, (q31_t)0x80df298c,
+  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xedd49ce, (q31_t)0x80ddb35a, (q31_t)0xed70c2c, (q31_t)0x80dcf8b7, (q31_t)0xed0ce82, (q31_t)0x80dc3e62,
+  (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xec45311, (q31_t)0x80dacaa3, (q31_t)0xebe154b, (q31_t)0x80da1139, (q31_t)0xeb7d77c, (q31_t)0x80d9581e,
+  (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xeab5bc3, (q31_t)0x80d7e6d3, (q31_t)0xea51dd8, (q31_t)0x80d72ea3, (q31_t)0xe9edfe5, (q31_t)0x80d676c1,
+  (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e, (q31_t)0xe9263e3, (q31_t)0x80d507e9, (q31_t)0xe8c25d5, (q31_t)0x80d450f3, (q31_t)0xe85e7be, (q31_t)0x80d39a4b,
+  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe796b74, (q31_t)0x80d22de7, (q31_t)0xe732d42, (q31_t)0x80d1782a, (q31_t)0xe6cef07, (q31_t)0x80d0c2bc,
+  (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe607277, (q31_t)0x80cf58cc, (q31_t)0xe5a3421, (q31_t)0x80cea449, (q31_t)0xe53f5c2, (q31_t)0x80cdf015,
+  (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe4778eb, (q31_t)0x80cc8898, (q31_t)0xe413a72, (q31_t)0x80cbd54f, (q31_t)0xe3afbf0, (q31_t)0x80cb2255,
+  (q31_t)0xe34bd66, (q31_t)0x80ca6fa9, (q31_t)0xe2e7ed2, (q31_t)0x80c9bd4c, (q31_t)0xe284036, (q31_t)0x80c90b3d, (q31_t)0xe220191, (q31_t)0x80c8597c,
+  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe15842e, (q31_t)0x80c6f6e7, (q31_t)0xe0f456f, (q31_t)0x80c64612, (q31_t)0xe0906a7, (q31_t)0x80c5958b,
+  (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xdfc88fe, (q31_t)0x80c4356a, (q31_t)0xdf64a1c, (q31_t)0x80c385cf, (q31_t)0xdf00b32, (q31_t)0x80c2d682,
+  (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xde38d44, (q31_t)0x80c178d4, (q31_t)0xddd4e40, (q31_t)0x80c0ca73, (q31_t)0xdd70f34, (q31_t)0x80c01c60,
+  (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c, (q31_t)0xdca9102, (q31_t)0x80bec127, (q31_t)0xdc451dc, (q31_t)0x80be13ff, (q31_t)0xdbe12ad, (q31_t)0x80bd6727,
+  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xdb19437, (q31_t)0x80bc0e61, (q31_t)0xdab54ef, (q31_t)0x80bb6274, (q31_t)0xda5159f, (q31_t)0x80bab6d5,
+  (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd9896e5, (q31_t)0x80b96083, (q31_t)0xd92577b, (q31_t)0x80b8b5d0, (q31_t)0xd8c1809, (q31_t)0x80b80b6c,
+  (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd7f990c, (q31_t)0x80b6b78e, (q31_t)0xd795982, (q31_t)0x80b60e15, (q31_t)0xd7319ee, (q31_t)0x80b564ea,
+  (q31_t)0xd6cda53, (q31_t)0x80b4bc0e, (q31_t)0xd669aaf, (q31_t)0x80b41381, (q31_t)0xd605b03, (q31_t)0x80b36b42, (q31_t)0xd5a1b4f, (q31_t)0x80b2c351,
+  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd4d9bcd, (q31_t)0x80b1745c, (q31_t)0xd475c00, (q31_t)0x80b0cd57, (q31_t)0xd411c2b, (q31_t)0x80b026a1,
+  (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd349c68, (q31_t)0x80aeda20, (q31_t)0xd2e5c7b, (q31_t)0x80ae3455, (q31_t)0xd281c85, (q31_t)0x80ad8ed9,
+  (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd1b9c81, (q31_t)0x80ac44cc, (q31_t)0xd155c73, (q31_t)0x80aba03b, (q31_t)0xd0f1c5d, (q31_t)0x80aafbf9,
+  (q31_t)0xd08dc3f, (q31_t)0x80aa5806, (q31_t)0xd029c18, (q31_t)0x80a9b461, (q31_t)0xcfc5bea, (q31_t)0x80a9110b, (q31_t)0xcf61bb4, (q31_t)0x80a86e03,
+  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xce99b2f, (q31_t)0x80a728df, (q31_t)0xce35ae1, (q31_t)0x80a686c2, (q31_t)0xcdd1a8b, (q31_t)0x80a5e4f5,
+  (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcd099c7, (q31_t)0x80a4a245, (q31_t)0xcca5959, (q31_t)0x80a40163, (q31_t)0xcc418e3, (q31_t)0x80a360d0,
+  (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xcb797e0, (q31_t)0x80a22095, (q31_t)0xcb15752, (q31_t)0x80a180ed, (q31_t)0xcab16bd, (q31_t)0x80a0e194,
+  (q31_t)0xca4d620, (q31_t)0x80a04289, (q31_t)0xc9e957b, (q31_t)0x809fa3cd, (q31_t)0xc9854cf, (q31_t)0x809f0560, (q31_t)0xc92141a, (q31_t)0x809e6741,
+  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc85929a, (q31_t)0x809d2bef, (q31_t)0xc7f51cf, (q31_t)0x809c8ebc, (q31_t)0xc7910fb, (q31_t)0x809bf1d7,
+  (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc6c8f3e, (q31_t)0x809ab8fa, (q31_t)0xc664e53, (q31_t)0x809a1d01, (q31_t)0xc600d61, (q31_t)0x80998157,
+  (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc538b66, (q31_t)0x80984aee, (q31_t)0xc4d4a5d, (q31_t)0x8097b030, (q31_t)0xc47094d, (q31_t)0x809715c0,
+  (q31_t)0xc40c835, (q31_t)0x80967b9f, (q31_t)0xc3a8715, (q31_t)0x8095e1cc, (q31_t)0xc3445ee, (q31_t)0x80954848, (q31_t)0xc2e04c0, (q31_t)0x8094af13,
+  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc21824c, (q31_t)0x80937d93, (q31_t)0xc1b4107, (q31_t)0x8092e54a, (q31_t)0xc14ffba, (q31_t)0x80924d4f,
+  (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xc087d0a, (q31_t)0x80911e44, (q31_t)0xc023ba7, (q31_t)0x80908735, (q31_t)0xbfbfa3d, (q31_t)0x808ff074,
+  (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbef7752, (q31_t)0x808ec3df, (q31_t)0xbe935d2, (q31_t)0x808e2e0a, (q31_t)0xbe2f44a, (q31_t)0x808d9884,
+  (q31_t)0xbdcb2bb, (q31_t)0x808d034c, (q31_t)0xbd67124, (q31_t)0x808c6e63, (q31_t)0xbd02f87, (q31_t)0x808bd9c9, (q31_t)0xbc9ede2, (q31_t)0x808b457d,
+  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbbd6a82, (q31_t)0x808a1dd2, (q31_t)0xbb728c7, (q31_t)0x80898a72, (q31_t)0xbb0e705, (q31_t)0x8088f761,
+  (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xba4636b, (q31_t)0x8087d22a, (q31_t)0xb9e2193, (q31_t)0x80874005, (q31_t)0xb97dfb5, (q31_t)0x8086ae2e,
+  (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb8b5be1, (q31_t)0x80858b6c, (q31_t)0xb8519ed, (q31_t)0x8084fa82, (q31_t)0xb7ed7f2, (q31_t)0x808469e5,
+  (q31_t)0xb7895f0, (q31_t)0x8083d998, (q31_t)0xb7253e6, (q31_t)0x80834999, (q31_t)0xb6c11d5, (q31_t)0x8082b9e9, (q31_t)0xb65cfbe, (q31_t)0x80822a87,
+  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb594b7a, (q31_t)0x80810cb0, (q31_t)0xb53094d, (q31_t)0x80807e3a, (q31_t)0xb4cc719, (q31_t)0x807ff013,
+  (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb40429d, (q31_t)0x807ed4b1, (q31_t)0xb3a0055, (q31_t)0x807e4776, (q31_t)0xb33be05, (q31_t)0x807dba89,
+  (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb273952, (q31_t)0x807ca19c, (q31_t)0xb20f6ee, (q31_t)0x807c159c, (q31_t)0xb1ab483, (q31_t)0x807b89ea,
+  (q31_t)0xb147211, (q31_t)0x807afe87, (q31_t)0xb0e2f98, (q31_t)0x807a7373, (q31_t)0xb07ed19, (q31_t)0x8079e8ad, (q31_t)0xb01aa92, (q31_t)0x80795e36,
+  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xaf52571, (q31_t)0x80784a33, (q31_t)0xaeee2d7, (q31_t)0x8077c0a8, (q31_t)0xae8a036, (q31_t)0x8077376c,
+  (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xadc1adf, (q31_t)0x807625df, (q31_t)0xad5d829, (q31_t)0x80759d8e, (q31_t)0xacf956d, (q31_t)0x8075158c,
+  (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xac30fe1, (q31_t)0x80740675, (q31_t)0xabccd11, (q31_t)0x80737f5f, (q31_t)0xab68a3a, (q31_t)0x8072f898,
+  (q31_t)0xab0475c, (q31_t)0x8072721f, (q31_t)0xaaa0478, (q31_t)0x8071ebf6, (q31_t)0xaa3c18e, (q31_t)0x8071661a, (q31_t)0xa9d7e9d, (q31_t)0x8070e08e,
+  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa90f8a7, (q31_t)0x806fd661, (q31_t)0xa8ab5a2, (q31_t)0x806f51c1, (q31_t)0xa847297, (q31_t)0x806ecd6f,
+  (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa77ec6d, (q31_t)0x806dc5b8, (q31_t)0xa71a94f, (q31_t)0x806d4253, (q31_t)0xa6b662a, (q31_t)0x806cbf3c,
+  (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa5edfcc, (q31_t)0x806bb9fa, (q31_t)0xa589c94, (q31_t)0x806b37cf, (q31_t)0xa525955, (q31_t)0x806ab5f3,
+  (q31_t)0xa4c1610, (q31_t)0x806a3466, (q31_t)0xa45d2c5, (q31_t)0x8069b327, (q31_t)0xa3f8f73, (q31_t)0x80693237, (q31_t)0xa394c1b, (q31_t)0x8068b196,
+  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa2cc558, (q31_t)0x8067b13f, (q31_t)0xa2681ed, (q31_t)0x8067318a, (q31_t)0xa203e7c, (q31_t)0x8066b224,
+  (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa13b787, (q31_t)0x8065b443, (q31_t)0xa0d7403, (q31_t)0x806535c9, (q31_t)0xa073079, (q31_t)0x8064b79d,
+  (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9faa952, (q31_t)0x8063bc32, (q31_t)0x9f465b5, (q31_t)0x80633ef3, (q31_t)0x9ee2213, (q31_t)0x8062c202,
+  (q31_t)0x9e7de6a, (q31_t)0x80624560, (q31_t)0x9e19abb, (q31_t)0x8061c90c, (q31_t)0x9db5706, (q31_t)0x80614d08, (q31_t)0x9d5134b, (q31_t)0x8060d152,
+  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9c88bc2, (q31_t)0x805fdad2, (q31_t)0x9c247f5, (q31_t)0x805f6009, (q31_t)0x9bc0421, (q31_t)0x805ee58e,
+  (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x9af7c69, (q31_t)0x805df184, (q31_t)0x9a93884, (q31_t)0x805d77f5, (q31_t)0x9a2f498, (q31_t)0x805cfeb5,
+  (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x9966cb0, (q31_t)0x805c0d21, (q31_t)0x99028b3, (q31_t)0x805b94ce, (q31_t)0x989e4b0, (q31_t)0x805b1cc8,
+  (q31_t)0x983a0a7, (q31_t)0x805aa512, (q31_t)0x97d5c99, (q31_t)0x805a2daa, (q31_t)0x9771884, (q31_t)0x8059b692, (q31_t)0x970d46a, (q31_t)0x80593fc7,
+  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9644c23, (q31_t)0x8058531f, (q31_t)0x95e07f8, (q31_t)0x8057dd41, (q31_t)0x957c3c6, (q31_t)0x805767b2,
+  (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x94b3b52, (q31_t)0x80567d80, (q31_t)0x944f70f, (q31_t)0x805608dd, (q31_t)0x93eb2c6, (q31_t)0x80559489,
+  (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x9322a24, (q31_t)0x8054accd, (q31_t)0x92be5ca, (q31_t)0x80543965, (q31_t)0x925a16b, (q31_t)0x8053c64c,
+  (q31_t)0x91f5d06, (q31_t)0x80535381, (q31_t)0x919189c, (q31_t)0x8052e106, (q31_t)0x912d42c, (q31_t)0x80526ed9, (q31_t)0x90c8fb6, (q31_t)0x8051fcfb,
+  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x90006ba, (q31_t)0x80511a2b, (q31_t)0x8f9c233, (q31_t)0x8050a939, (q31_t)0x8f37da7, (q31_t)0x80503896,
+  (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8e6f47f, (q31_t)0x804f583c, (q31_t)0x8e0afe2, (q31_t)0x804ee885, (q31_t)0x8da6b40, (q31_t)0x804e791d,
+  (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8cde1ec, (q31_t)0x804d9b39, (q31_t)0x8c79d3a, (q31_t)0x804d2cbd, (q31_t)0x8c15882, (q31_t)0x804cbe90,
+  (q31_t)0x8bb13c5, (q31_t)0x804c50b2, (q31_t)0x8b4cf02, (q31_t)0x804be323, (q31_t)0x8ae8a3a, (q31_t)0x804b75e2, (q31_t)0x8a8456d, (q31_t)0x804b08f0,
+  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x89bbbc3, (q31_t)0x804a2ff9, (q31_t)0x89576e5, (q31_t)0x8049c3f3, (q31_t)0x88f3203, (q31_t)0x8049583d,
+  (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x882a82e, (q31_t)0x804881bb, (q31_t)0x87c633c, (q31_t)0x804816f1, (q31_t)0x8761e44, (q31_t)0x8047ac75,
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+  (q31_t)0x856c520, (q31_t)0x80459ca9, (q31_t)0x850800a, (q31_t)0x80453406, (q31_t)0x84a3aee, (q31_t)0x8044cbb2, (q31_t)0x843f5cd, (q31_t)0x804463ad,
+  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8376b7c, (q31_t)0x8043948e, (q31_t)0x831264c, (q31_t)0x80432d75, (q31_t)0x82ae117, (q31_t)0x8042c6ab,
+  (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x81e569d, (q31_t)0x8041fa03, (q31_t)0x8181159, (q31_t)0x80419425, (q31_t)0x811cc10, (q31_t)0x80412e96,
+  (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x805416e, (q31_t)0x80406465, (q31_t)0x7fefc16, (q31_t)0x803fffc2, (q31_t)0x7f8b6b9, (q31_t)0x803f9b6f,
+  (q31_t)0x7f27157, (q31_t)0x803f376a, (q31_t)0x7ec2bf0, (q31_t)0x803ed3b3, (q31_t)0x7e5e685, (q31_t)0x803e704c, (q31_t)0x7dfa114, (q31_t)0x803e0d34,
+  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7d31624, (q31_t)0x803d47ef, (q31_t)0x7ccd0a5, (q31_t)0x803ce5c3, (q31_t)0x7c68b21, (q31_t)0x803c83e5,
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+  (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x7a0e9a5, (q31_t)0x803a3f2d, (q31_t)0x79aa400, (q31_t)0x8039df77, (q31_t)0x7945e56, (q31_t)0x80398010,
+  (q31_t)0x78e18a7, (q31_t)0x803920f8, (q31_t)0x787d2f4, (q31_t)0x8038c22f, (q31_t)0x7818d3c, (q31_t)0x803863b5, (q31_t)0x77b4780, (q31_t)0x80380589,
+  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x76ebbf9, (q31_t)0x80374a1f, (q31_t)0x768762e, (q31_t)0x8036ece0, (q31_t)0x762305f, (q31_t)0x80368fef,
+  (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x755a4b4, (q31_t)0x8035d6fb, (q31_t)0x74f5ed7, (q31_t)0x80357af8, (q31_t)0x74918f6, (q31_t)0x80351f43,
+  (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x73c8d27, (q31_t)0x803468c5, (q31_t)0x7364738, (q31_t)0x80340dfd, (q31_t)0x7300145, (q31_t)0x8033b383,
+  (q31_t)0x729bb4e, (q31_t)0x80335959, (q31_t)0x7237552, (q31_t)0x8032ff7d, (q31_t)0x71d2f52, (q31_t)0x8032a5ef, (q31_t)0x716e94e, (q31_t)0x80324cb1,
+  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x70a5d37, (q31_t)0x80319b21, (q31_t)0x7041726, (q31_t)0x803142cf, (q31_t)0x6fdd110, (q31_t)0x8030eacd,
+  (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6f144d7, (q31_t)0x80303bb3, (q31_t)0x6eafeb4, (q31_t)0x802fe49d, (q31_t)0x6e4b88d, (q31_t)0x802f8dd5,
+  (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6d82c32, (q31_t)0x802ee133, (q31_t)0x6d1e5fe, (q31_t)0x802e8b58, (q31_t)0x6cb9fc6, (q31_t)0x802e35cb,
+  (q31_t)0x6c5598a, (q31_t)0x802de08e, (q31_t)0x6bf1349, (q31_t)0x802d8ba0, (q31_t)0x6b8cd05, (q31_t)0x802d3700, (q31_t)0x6b286bc, (q31_t)0x802ce2af,
+  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6a5fa1e, (q31_t)0x802c3afa, (q31_t)0x69fb3c9, (q31_t)0x802be796, (q31_t)0x6996d70, (q31_t)0x802b9480,
+  (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x68ce0b2, (q31_t)0x802aef42, (q31_t)0x6869a4c, (q31_t)0x802a9d19, (q31_t)0x68053e3, (q31_t)0x802a4b3f,
+  (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x673c704, (q31_t)0x8029a878, (q31_t)0x66d808f, (q31_t)0x8029578b, (q31_t)0x6673a16, (q31_t)0x802906ec,
+  (q31_t)0x660f398, (q31_t)0x8028b69c, (q31_t)0x65aad17, (q31_t)0x8028669b, (q31_t)0x6546692, (q31_t)0x802816e9, (q31_t)0x64e2009, (q31_t)0x8027c786,
+  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x64192eb, (q31_t)0x802729ad, (q31_t)0x63b4c57, (q31_t)0x8026db36, (q31_t)0x63505be, (q31_t)0x80268d0e,
+  (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x6287882, (q31_t)0x8025f1ac, (q31_t)0x62231de, (q31_t)0x8025a471, (q31_t)0x61beb36, (q31_t)0x80255784,
+  (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x60f5ddc, (q31_t)0x8024be99, (q31_t)0x6091729, (q31_t)0x80247299, (q31_t)0x602d072, (q31_t)0x802426e8,
+  (q31_t)0x5fc89b8, (q31_t)0x8023db86, (q31_t)0x5f642fa, (q31_t)0x80239073, (q31_t)0x5effc38, (q31_t)0x802345af, (q31_t)0x5e9b572, (q31_t)0x8022fb3a,
+  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5dd27dd, (q31_t)0x8022673c, (q31_t)0x5d6e10c, (q31_t)0x80221db3, (q31_t)0x5d09a38, (q31_t)0x8021d47a,
+  (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5c40c86, (q31_t)0x802142f3, (q31_t)0x5bdc5a7, (q31_t)0x8020faa6, (q31_t)0x5b77ec5, (q31_t)0x8020b2a7,
+  (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5aaf0f6, (q31_t)0x80202397, (q31_t)0x5a4aa09, (q31_t)0x801fdc86, (q31_t)0x59e6319, (q31_t)0x801f95c3,
+  (q31_t)0x5981c26, (q31_t)0x801f4f4f, (q31_t)0x591d52f, (q31_t)0x801f092a, (q31_t)0x58b8e34, (q31_t)0x801ec354, (q31_t)0x5854736, (q31_t)0x801e7dcd,
+  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x578b930, (q31_t)0x801df3ab, (q31_t)0x5727228, (q31_t)0x801daf11, (q31_t)0x56c2b1c, (q31_t)0x801d6ac5,
+  (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x55f9cfb, (q31_t)0x801ce31a, (q31_t)0x55955e6, (q31_t)0x801c9fbb, (q31_t)0x5530ecd, (q31_t)0x801c5cab,
+  (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x5468092, (q31_t)0x801bd777, (q31_t)0x540396f, (q31_t)0x801b9554, (q31_t)0x539f249, (q31_t)0x801b537f,
+  (q31_t)0x533ab20, (q31_t)0x801b11fa, (q31_t)0x52d63f4, (q31_t)0x801ad0c3, (q31_t)0x5271cc4, (q31_t)0x801a8fdb, (q31_t)0x520d592, (q31_t)0x801a4f42,
+  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5144723, (q31_t)0x8019cefd, (q31_t)0x50dffe7, (q31_t)0x80198f50, (q31_t)0x507b8a8, (q31_t)0x80194ff3,
+  (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4fb2a20, (q31_t)0x8018d225, (q31_t)0x4f4e2d8, (q31_t)0x801893b4, (q31_t)0x4ee9b8c, (q31_t)0x80185592,
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+  (q31_t)0x4cf36e5, (q31_t)0x80172388, (q31_t)0x4c8ef88, (q31_t)0x8016e740, (q31_t)0x4c2a827, (q31_t)0x8016ab46, (q31_t)0x4bc60c4, (q31_t)0x80166f9c,
+  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x4afd1f4, (q31_t)0x8015f933, (q31_t)0x4a98a88, (q31_t)0x8015be75, (q31_t)0x4a34319, (q31_t)0x80158406,
+  (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x496b432, (q31_t)0x80151015, (q31_t)0x4906cbb, (q31_t)0x8014d693, (q31_t)0x48a2540, (q31_t)0x80149d5f,
+  (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x47d9643, (q31_t)0x80142be5, (q31_t)0x4774ec1, (q31_t)0x8013f39e, (q31_t)0x471073b, (q31_t)0x8013bba7,
+  (q31_t)0x46abfb3, (q31_t)0x801383fe, (q31_t)0x4647828, (q31_t)0x80134ca4, (q31_t)0x45e309a, (q31_t)0x80131599, (q31_t)0x457e90a, (q31_t)0x8012dedd,
+  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x44b59e1, (q31_t)0x80127251, (q31_t)0x4451249, (q31_t)0x80123c82, (q31_t)0x43ecaae, (q31_t)0x80120701,
+  (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x4323b70, (q31_t)0x80119ced, (q31_t)0x42bf3cd, (q31_t)0x80116859, (q31_t)0x425ac28, (q31_t)0x80113414,
+  (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x4191cd5, (q31_t)0x8010cc78, (q31_t)0x412d528, (q31_t)0x8010991f, (q31_t)0x40c8d79, (q31_t)0x80106616,
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+  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3e6df28, (q31_t)0x800f3a59, (q31_t)0x3e09767, (q31_t)0x800f0978, (q31_t)0x3da4fa4, (q31_t)0x800ed8e6,
+  (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3cdc017, (q31_t)0x800e78af, (q31_t)0x3c7784d, (q31_t)0x800e490a, (q31_t)0x3c13080, (q31_t)0x800e19b4,
+  (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3b4a0e0, (q31_t)0x800dbbf5, (q31_t)0x3ae590d, (q31_t)0x800d8d8b, (q31_t)0x3a81137, (q31_t)0x800d5f71,
+  (q31_t)0x3a1c960, (q31_t)0x800d31a5, (q31_t)0x39b8185, (q31_t)0x800d0429, (q31_t)0x39539a9, (q31_t)0x800cd6fb, (q31_t)0x38ef1ca, (q31_t)0x800caa1c,
+  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x3826207, (q31_t)0x800c514c, (q31_t)0x37c1a22, (q31_t)0x800c255a, (q31_t)0x375d23a, (q31_t)0x800bf9b7,
+  (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3694265, (q31_t)0x800ba35d, (q31_t)0x362fa78, (q31_t)0x800b78a7, (q31_t)0x35cb288, (q31_t)0x800b4e40,
+  (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x35022a2, (q31_t)0x800afa5e, (q31_t)0x349daac, (q31_t)0x800ad0e3, (q31_t)0x34392b4, (q31_t)0x800aa7b8,
+  (q31_t)0x33d4abb, (q31_t)0x800a7edb, (q31_t)0x33702bf, (q31_t)0x800a564e, (q31_t)0x330bac1, (q31_t)0x800a2e0f, (q31_t)0x32a72c1, (q31_t)0x800a061f,
+  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x31de2bb, (q31_t)0x8009b72c, (q31_t)0x3179ab5, (q31_t)0x80099029, (q31_t)0x31152ae, (q31_t)0x80096975,
+  (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x304c299, (q31_t)0x80091cf9, (q31_t)0x2fe7a8c, (q31_t)0x8008f732, (q31_t)0x2f8327d, (q31_t)0x8008d1ba,
+  (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2eba259, (q31_t)0x800887b6, (q31_t)0x2e55a44, (q31_t)0x8008632a, (q31_t)0x2df122e, (q31_t)0x80083eed,
+  (q31_t)0x2d8ca16, (q31_t)0x80081b00, (q31_t)0x2d281fc, (q31_t)0x8007f761, (q31_t)0x2cc39e1, (q31_t)0x8007d411, (q31_t)0x2c5f1c3, (q31_t)0x8007b110,
+  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2b96184, (q31_t)0x80076bfb, (q31_t)0x2b31961, (q31_t)0x800749e7, (q31_t)0x2acd13d, (q31_t)0x80072822,
+  (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x2a040f0, (q31_t)0x8006e585, (q31_t)0x299f8c7, (q31_t)0x8006c4ac, (q31_t)0x293b09c, (q31_t)0x8006a423,
+  (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x2872043, (q31_t)0x800663fd, (q31_t)0x280d813, (q31_t)0x80064460, (q31_t)0x27a8fe2, (q31_t)0x80062513,
+  (q31_t)0x27447b0, (q31_t)0x80060614, (q31_t)0x26dff7c, (q31_t)0x8005e764, (q31_t)0x267b747, (q31_t)0x8005c904, (q31_t)0x2616f10, (q31_t)0x8005aaf2,
+  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x254de9e, (q31_t)0x80056fbb, (q31_t)0x24e9662, (q31_t)0x80055296, (q31_t)0x2484e26, (q31_t)0x800535c0,
+  (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x23bbda8, (q31_t)0x8004fd00, (q31_t)0x2357567, (q31_t)0x8004e117, (q31_t)0x22f2d25, (q31_t)0x8004c57d,
+  (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x2229c9d, (q31_t)0x80048f35, (q31_t)0x21c5457, (q31_t)0x80047488, (q31_t)0x2160c0f, (q31_t)0x80045a29,
+  (q31_t)0x20fc3c6, (q31_t)0x8004401a, (q31_t)0x2097b7c, (q31_t)0x80042659, (q31_t)0x2033331, (q31_t)0x80040ce7, (q31_t)0x1fceae4, (q31_t)0x8003f3c5,
+  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1f05a48, (q31_t)0x8003c26c, (q31_t)0x1ea11f7, (q31_t)0x8003aa36, (q31_t)0x1e3c9a6, (q31_t)0x8003924f,
+  (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1d73900, (q31_t)0x8003636e, (q31_t)0x1d0f0ab, (q31_t)0x80034c74, (q31_t)0x1caa855, (q31_t)0x800335c9,
+  (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1be17a6, (q31_t)0x80030960, (q31_t)0x1b7cf4d, (q31_t)0x8002f3a1, (q31_t)0x1b186f3, (q31_t)0x8002de32,
+  (q31_t)0x1ab3e97, (q31_t)0x8002c912, (q31_t)0x1a4f63b, (q31_t)0x8002b440, (q31_t)0x19eaddd, (q31_t)0x80029fbe, (q31_t)0x198657f, (q31_t)0x80028b8a,
+  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x18bd4bf, (q31_t)0x80026410, (q31_t)0x1858c5e, (q31_t)0x800250c9, (q31_t)0x17f43fc, (q31_t)0x80023dd2,
+  (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x172b335, (q31_t)0x800218cf, (q31_t)0x16c6ad0, (q31_t)0x800206c4, (q31_t)0x166226a, (q31_t)0x8001f508,
+  (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x159919c, (q31_t)0x8001d27d, (q31_t)0x1534934, (q31_t)0x8001c1ae, (q31_t)0x14d00ca, (q31_t)0x8001b12e,
+  (q31_t)0x146b860, (q31_t)0x8001a0fd, (q31_t)0x1406ff6, (q31_t)0x8001911b, (q31_t)0x13a278a, (q31_t)0x80018187, (q31_t)0x133df1e, (q31_t)0x80017243,
+  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x1274e43, (q31_t)0x800154a7, (q31_t)0x12105d5, (q31_t)0x80014650, (q31_t)0x11abd66, (q31_t)0x80013847,
+  (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x10e2c85, (q31_t)0x80011d23, (q31_t)0x107e414, (q31_t)0x80011008, (q31_t)0x1019ba2, (q31_t)0x8001033b,
+  (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0x0f50abd, (q31_t)0x8000ea8e, (q31_t)0x0eec249, (q31_t)0x8000deaf, (q31_t)0x0e879d5, (q31_t)0x8000d31e,
+  (q31_t)0x0e23160, (q31_t)0x8000c7dc, (q31_t)0x0dbe8eb, (q31_t)0x8000bce9, (q31_t)0x0d5a075, (q31_t)0x8000b245, (q31_t)0x0cf57ff, (q31_t)0x8000a7f0,
+  (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0c2c711, (q31_t)0x80009433, (q31_t)0x0bc7e99, (q31_t)0x80008aca, (q31_t)0x0b63621, (q31_t)0x800081b1,
+  (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x0a9a52f, (q31_t)0x8000706c, (q31_t)0x0a35cb5, (q31_t)0x8000683f, (q31_t)0x09d143b, (q31_t)0x80006062,
+  (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x0908346, (q31_t)0x80005194, (q31_t)0x08a3acb, (q31_t)0x80004aa4, (q31_t)0x083f250, (q31_t)0x80004402,
+  (q31_t)0x07da9d4, (q31_t)0x80003daf, (q31_t)0x0776159, (q31_t)0x800037ac, (q31_t)0x07118dc, (q31_t)0x800031f7, (q31_t)0x06ad060, (q31_t)0x80002c91,
+  (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x05e3f66, (q31_t)0x800022b3, (q31_t)0x057f6e9, (q31_t)0x80001e3a, (q31_t)0x051ae6b, (q31_t)0x80001a10,
+  (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x0451d70, (q31_t)0x800012a9, (q31_t)0x03ed4f2, (q31_t)0x80000f6c, (q31_t)0x0388c74, (q31_t)0x80000c7e,
+  (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x02bfb77, (q31_t)0x8000078e, (q31_t)0x025b2f8, (q31_t)0x8000058d, (q31_t)0x01f6a7a, (q31_t)0x800003db,
+  (q31_t)0x01921fb, (q31_t)0x80000278, (q31_t)0x012d97c, (q31_t)0x80000163, (q31_t)0x00c90fe, (q31_t)0x8000009e, (q31_t)0x006487f, (q31_t)0x80000027
+};
+    const q31_t cos_factorsQ31_8192[8192] = {
+  (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c, (q31_t)0x7ffffce1, (q31_t)0x7ffffb56, (q31_t)0x7ffff97c, (q31_t)0x7ffff753,
+  (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b, (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5, (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3,
+  (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c, (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7, (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6,
+  (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61, (q31_t)0x7fff82be, (q31_t)0x7fff79cc, (q31_t)0x7fff708b, (q31_t)0x7fff66fc,
+  (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8, (q31_t)0x7fff328d, (q31_t)0x7fff2724, (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64,
+  (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31, (q31_t)0x7ffece9f, (q31_t)0x7ffec0be, (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f,
+  (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe, (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c, (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe,
+  (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e, (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc, (q31_t)0x7ffda59d, (q31_t)0x7ffd922f,
+  (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161, (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720, (q31_t)0x7ffd0189, (q31_t)0x7ffceba4,
+  (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7, (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7, (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b,
+  (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0, (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1, (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356,
+  (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed, (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf, (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195,
+  (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e, (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50, (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17,
+  (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2, (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705, (q31_t)0x7ff8a519, (q31_t)0x7ff882dd,
+  (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da, (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe, (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7,
+  (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005, (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b, (q31_t)0x7ff65c5f, (q31_t)0x7ff63535,
+  (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576, (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc, (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7,
+  (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a, (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082, (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e,
+  (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523, (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c, (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9,
+  (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61, (q31_t)0x7ff13f45, (q31_t)0x7ff10edb, (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19,
+  (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4, (q31_t)0x7fefb351, (q31_t)0x7fef806f, (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf,
+  (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac, (q31_t)0x7fee13a1, (q31_t)0x7fedde48, (q31_t)0x7feda8a0, (q31_t)0x7fed72aa,
+  (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9, (q31_t)0x7fec6038, (q31_t)0x7fec2867, (q31_t)0x7febf048, (q31_t)0x7febb7da,
+  (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c, (q31_t)0x7fea9914, (q31_t)0x7fea5ecc, (q31_t)0x7fea2436, (q31_t)0x7fe9e950,
+  (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6, (q31_t)0x7fe8be36, (q31_t)0x7fe88177, (q31_t)0x7fe84469, (q31_t)0x7fe8070d,
+  (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85, (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068, (q31_t)0x7fe650e3, (q31_t)0x7fe61110,
+  (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac, (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0, (q31_t)0x7fe449a4, (q31_t)0x7fe40759,
+  (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19, (q31_t)0x7fe2b743, (q31_t)0x7fe2731f, (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea,
+  (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd, (q31_t)0x7fe08d81, (q31_t)0x7fe046e5, (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2,
+  (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9, (q31_t)0x7fde5006, (q31_t)0x7fde06f3, (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2,
+  (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d, (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349, (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a,
+  (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799, (q31_t)0x7fd999e8, (q31_t)0x7fd94be8, (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa,
+  (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e, (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf, (q31_t)0x7fd68009, (q31_t)0x7fd62ef4,
+  (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c, (q31_t)0x7fd494ed, (q31_t)0x7fd441ff, (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36,
+  (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3, (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78, (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2,
+  (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4, (q31_t)0x7fcf4117, (q31_t)0x7fcee93c, (q31_t)0x7fce9112, (q31_t)0x7fce3898,
+  (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f, (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a, (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9,
+  (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5, (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2, (q31_t)0x7fc8e48b, (q31_t)0x7fc88724,
+  (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76, (q31_t)0x7fc6af86, (q31_t)0x7fc65046, (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db,
+  (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53, (q31_t)0x7fc3acec, (q31_t)0x7fc34b36, (q31_t)0x7fc2e931, (q31_t)0x7fc286de,
+  (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b, (q31_t)0x7fc0969e, (q31_t)0x7fc03271, (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c,
+  (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0, (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa, (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8,
+  (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2, (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf, (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0,
+  (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2, (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2, (q31_t)0x7fb60614, (q31_t)0x7fb599e7,
+  (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f, (q31_t)0x7fb37869, (q31_t)0x7fb30a63, (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c,
+  (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb, (q31_t)0x7fafff9e, (q31_t)0x7faf8f23, (q31_t)0x7faf1e58, (q31_t)0x7faead3f,
+  (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6, (q31_t)0x7fac7323, (q31_t)0x7fac0031, (q31_t)0x7fab8cf1, (q31_t)0x7fab1962,
+  (q31_t)0x7faaa584, (q31_t)0x7faa3157, (q31_t)0x7fa9bcdb, (q31_t)0x7fa94811, (q31_t)0x7fa8d2f8, (q31_t)0x7fa85d90, (q31_t)0x7fa7e7d9, (q31_t)0x7fa771d4,
+  (q31_t)0x7fa6fb80, (q31_t)0x7fa684dd, (q31_t)0x7fa60dec, (q31_t)0x7fa596ac, (q31_t)0x7fa51f1d, (q31_t)0x7fa4a73f, (q31_t)0x7fa42f12, (q31_t)0x7fa3b697,
+  (q31_t)0x7fa33dcd, (q31_t)0x7fa2c4b5, (q31_t)0x7fa24b4d, (q31_t)0x7fa1d197, (q31_t)0x7fa15792, (q31_t)0x7fa0dd3f, (q31_t)0x7fa0629c, (q31_t)0x7f9fe7ab,
+  (q31_t)0x7f9f6c6b, (q31_t)0x7f9ef0dd, (q31_t)0x7f9e7500, (q31_t)0x7f9df8d4, (q31_t)0x7f9d7c59, (q31_t)0x7f9cff90, (q31_t)0x7f9c8278, (q31_t)0x7f9c0511,
+  (q31_t)0x7f9b875b, (q31_t)0x7f9b0957, (q31_t)0x7f9a8b04, (q31_t)0x7f9a0c62, (q31_t)0x7f998d72, (q31_t)0x7f990e33, (q31_t)0x7f988ea5, (q31_t)0x7f980ec8,
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+  (q31_t)0x7f6b9d6b, (q31_t)0x7f6b045d, (q31_t)0x7f6a6b00, (q31_t)0x7f69d154, (q31_t)0x7f69375a, (q31_t)0x7f689d12, (q31_t)0x7f68027b, (q31_t)0x7f676795,
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+  (q31_t)0x7f5cef5c, (q31_t)0x7f5c4ef0, (q31_t)0x7f5bae36, (q31_t)0x7f5b0d2c, (q31_t)0x7f5a6bd5, (q31_t)0x7f59ca2e, (q31_t)0x7f592839, (q31_t)0x7f5885f6,
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+  (q31_t)0x7f4d9089, (q31_t)0x7f4ce8c0, (q31_t)0x7f4c40a8, (q31_t)0x7f4b9842, (q31_t)0x7f4aef8d, (q31_t)0x7f4a468a, (q31_t)0x7f499d38, (q31_t)0x7f48f398,
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+  (q31_t)0x7f3d8107, (q31_t)0x7f3cd1e2, (q31_t)0x7f3c226e, (q31_t)0x7f3b72ab, (q31_t)0x7f3ac29b, (q31_t)0x7f3a123b, (q31_t)0x7f39618e, (q31_t)0x7f38b091,
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+  (q31_t)0x7f270452, (q31_t)0x7f264b5e, (q31_t)0x7f25921c, (q31_t)0x7f24d88b, (q31_t)0x7f241eab, (q31_t)0x7f23647e, (q31_t)0x7f22aa01, (q31_t)0x7f21ef37,
+  (q31_t)0x7f21341e, (q31_t)0x7f2078b6, (q31_t)0x7f1fbd00, (q31_t)0x7f1f00fc, (q31_t)0x7f1e44a9, (q31_t)0x7f1d8808, (q31_t)0x7f1ccb18, (q31_t)0x7f1c0dda,
+  (q31_t)0x7f1b504e, (q31_t)0x7f1a9273, (q31_t)0x7f19d44a, (q31_t)0x7f1915d2, (q31_t)0x7f18570c, (q31_t)0x7f1797f8, (q31_t)0x7f16d895, (q31_t)0x7f1618e4,
+  (q31_t)0x7f1558e4, (q31_t)0x7f149896, (q31_t)0x7f13d7fa, (q31_t)0x7f13170f, (q31_t)0x7f1255d6, (q31_t)0x7f11944f, (q31_t)0x7f10d279, (q31_t)0x7f101054,
+  (q31_t)0x7f0f4de2, (q31_t)0x7f0e8b21, (q31_t)0x7f0dc811, (q31_t)0x7f0d04b3, (q31_t)0x7f0c4107, (q31_t)0x7f0b7d0d, (q31_t)0x7f0ab8c4, (q31_t)0x7f09f42d,
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+  (q31_t)0x7f02fd15, (q31_t)0x7f02356e, (q31_t)0x7f016d79, (q31_t)0x7f00a535, (q31_t)0x7effdca4, (q31_t)0x7eff13c3, (q31_t)0x7efe4a95, (q31_t)0x7efd8118,
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+  (q31_t)0x7ef65def, (q31_t)0x7ef59163, (q31_t)0x7ef4c489, (q31_t)0x7ef3f760, (q31_t)0x7ef329e9, (q31_t)0x7ef25c24, (q31_t)0x7ef18e10, (q31_t)0x7ef0bfae,
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+  (q31_t)0x7edc34b9, (q31_t)0x7edb5e64, (q31_t)0x7eda87c0, (q31_t)0x7ed9b0ce, (q31_t)0x7ed8d98e, (q31_t)0x7ed80200, (q31_t)0x7ed72a24, (q31_t)0x7ed651f9,
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+  (q31_t)0x7eceaab8, (q31_t)0x7ecdcf7f, (q31_t)0x7eccf3f8, (q31_t)0x7ecc1822, (q31_t)0x7ecb3bff, (q31_t)0x7eca5f8d, (q31_t)0x7ec982cd, (q31_t)0x7ec8a5bf,
+  (q31_t)0x7ec7c862, (q31_t)0x7ec6eab7, (q31_t)0x7ec60cbe, (q31_t)0x7ec52e77, (q31_t)0x7ec44fe2, (q31_t)0x7ec370fe, (q31_t)0x7ec291cd, (q31_t)0x7ec1b24d,
+  (q31_t)0x7ec0d27f, (q31_t)0x7ebff263, (q31_t)0x7ebf11f8, (q31_t)0x7ebe313f, (q31_t)0x7ebd5039, (q31_t)0x7ebc6ee4, (q31_t)0x7ebb8d40, (q31_t)0x7ebaab4f,
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+  (q31_t)0x7eab7b91, (q31_t)0x7eaa9421, (q31_t)0x7ea9ac63, (q31_t)0x7ea8c457, (q31_t)0x7ea7dbfc, (q31_t)0x7ea6f353, (q31_t)0x7ea60a5d, (q31_t)0x7ea52118,
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+  (q31_t)0x7e9cdff0, (q31_t)0x7e9bf39e, (q31_t)0x7e9b06fe, (q31_t)0x7e9a1a10, (q31_t)0x7e992cd4, (q31_t)0x7e983f49, (q31_t)0x7e975171, (q31_t)0x7e96634a,
+  (q31_t)0x7e9574d6, (q31_t)0x7e948613, (q31_t)0x7e939702, (q31_t)0x7e92a7a3, (q31_t)0x7e91b7f6, (q31_t)0x7e90c7fb, (q31_t)0x7e8fd7b2, (q31_t)0x7e8ee71b,
+  (q31_t)0x7e8df636, (q31_t)0x7e8d0502, (q31_t)0x7e8c1381, (q31_t)0x7e8b21b1, (q31_t)0x7e8a2f94, (q31_t)0x7e893d28, (q31_t)0x7e884a6f, (q31_t)0x7e875767,
+  (q31_t)0x7e866411, (q31_t)0x7e85706d, (q31_t)0x7e847c7c, (q31_t)0x7e83883c, (q31_t)0x7e8293ae, (q31_t)0x7e819ed2, (q31_t)0x7e80a9a8, (q31_t)0x7e7fb430,
+  (q31_t)0x7e7ebe6a, (q31_t)0x7e7dc856, (q31_t)0x7e7cd1f4, (q31_t)0x7e7bdb44, (q31_t)0x7e7ae446, (q31_t)0x7e79ecf9, (q31_t)0x7e78f55f, (q31_t)0x7e77fd77,
+  (q31_t)0x7e770541, (q31_t)0x7e760cbd, (q31_t)0x7e7513ea, (q31_t)0x7e741aca, (q31_t)0x7e73215c, (q31_t)0x7e7227a0, (q31_t)0x7e712d96, (q31_t)0x7e70333d,
+  (q31_t)0x7e6f3897, (q31_t)0x7e6e3da3, (q31_t)0x7e6d4261, (q31_t)0x7e6c46d1, (q31_t)0x7e6b4af2, (q31_t)0x7e6a4ec6, (q31_t)0x7e69524c, (q31_t)0x7e685584,
+  (q31_t)0x7e67586e, (q31_t)0x7e665b0a, (q31_t)0x7e655d58, (q31_t)0x7e645f58, (q31_t)0x7e63610a, (q31_t)0x7e62626e, (q31_t)0x7e616384, (q31_t)0x7e60644c,
+  (q31_t)0x7e5f64c7, (q31_t)0x7e5e64f3, (q31_t)0x7e5d64d1, (q31_t)0x7e5c6461, (q31_t)0x7e5b63a4, (q31_t)0x7e5a6298, (q31_t)0x7e59613f, (q31_t)0x7e585f97,
+  (q31_t)0x7e575da2, (q31_t)0x7e565b5f, (q31_t)0x7e5558ce, (q31_t)0x7e5455ef, (q31_t)0x7e5352c1, (q31_t)0x7e524f46, (q31_t)0x7e514b7e, (q31_t)0x7e504767,
+  (q31_t)0x7e4f4302, (q31_t)0x7e4e3e4f, (q31_t)0x7e4d394f, (q31_t)0x7e4c3400, (q31_t)0x7e4b2e64, (q31_t)0x7e4a287a, (q31_t)0x7e492241, (q31_t)0x7e481bbb,
+  (q31_t)0x7e4714e7, (q31_t)0x7e460dc5, (q31_t)0x7e450656, (q31_t)0x7e43fe98, (q31_t)0x7e42f68c, (q31_t)0x7e41ee33, (q31_t)0x7e40e58c, (q31_t)0x7e3fdc97,
+  (q31_t)0x7e3ed353, (q31_t)0x7e3dc9c3, (q31_t)0x7e3cbfe4, (q31_t)0x7e3bb5b7, (q31_t)0x7e3aab3c, (q31_t)0x7e39a074, (q31_t)0x7e38955e, (q31_t)0x7e3789fa,
+  (q31_t)0x7e367e48, (q31_t)0x7e357248, (q31_t)0x7e3465fa, (q31_t)0x7e33595e, (q31_t)0x7e324c75, (q31_t)0x7e313f3e, (q31_t)0x7e3031b9, (q31_t)0x7e2f23e6,
+  (q31_t)0x7e2e15c5, (q31_t)0x7e2d0756, (q31_t)0x7e2bf89a, (q31_t)0x7e2ae990, (q31_t)0x7e29da38, (q31_t)0x7e28ca92, (q31_t)0x7e27ba9e, (q31_t)0x7e26aa5d,
+  (q31_t)0x7e2599cd, (q31_t)0x7e2488f0, (q31_t)0x7e2377c5, (q31_t)0x7e22664c, (q31_t)0x7e215486, (q31_t)0x7e204271, (q31_t)0x7e1f300f, (q31_t)0x7e1e1d5f,
+  (q31_t)0x7e1d0a61, (q31_t)0x7e1bf716, (q31_t)0x7e1ae37c, (q31_t)0x7e19cf95, (q31_t)0x7e18bb60, (q31_t)0x7e17a6dd, (q31_t)0x7e16920d, (q31_t)0x7e157cee,
+  (q31_t)0x7e146782, (q31_t)0x7e1351c9, (q31_t)0x7e123bc1, (q31_t)0x7e11256c, (q31_t)0x7e100ec8, (q31_t)0x7e0ef7d7, (q31_t)0x7e0de099, (q31_t)0x7e0cc90c,
+  (q31_t)0x7e0bb132, (q31_t)0x7e0a990a, (q31_t)0x7e098095, (q31_t)0x7e0867d1, (q31_t)0x7e074ec0, (q31_t)0x7e063561, (q31_t)0x7e051bb4, (q31_t)0x7e0401ba,
+  (q31_t)0x7e02e772, (q31_t)0x7e01ccdc, (q31_t)0x7e00b1f9, (q31_t)0x7dff96c7, (q31_t)0x7dfe7b48, (q31_t)0x7dfd5f7b, (q31_t)0x7dfc4361, (q31_t)0x7dfb26f9,
+  (q31_t)0x7dfa0a43, (q31_t)0x7df8ed3f, (q31_t)0x7df7cfee, (q31_t)0x7df6b24f, (q31_t)0x7df59462, (q31_t)0x7df47628, (q31_t)0x7df357a0, (q31_t)0x7df238ca,
+  (q31_t)0x7df119a7, (q31_t)0x7deffa35, (q31_t)0x7deeda77, (q31_t)0x7dedba6a, (q31_t)0x7dec9a10, (q31_t)0x7deb7968, (q31_t)0x7dea5872, (q31_t)0x7de9372f,
+  (q31_t)0x7de8159e, (q31_t)0x7de6f3c0, (q31_t)0x7de5d193, (q31_t)0x7de4af1a, (q31_t)0x7de38c52, (q31_t)0x7de2693d, (q31_t)0x7de145da, (q31_t)0x7de02229,
+  (q31_t)0x7ddefe2b, (q31_t)0x7dddd9e0, (q31_t)0x7ddcb546, (q31_t)0x7ddb905f, (q31_t)0x7dda6b2a, (q31_t)0x7dd945a8, (q31_t)0x7dd81fd8, (q31_t)0x7dd6f9ba,
+  (q31_t)0x7dd5d34f, (q31_t)0x7dd4ac96, (q31_t)0x7dd38590, (q31_t)0x7dd25e3c, (q31_t)0x7dd1369a, (q31_t)0x7dd00eab, (q31_t)0x7dcee66e, (q31_t)0x7dcdbde3,
+  (q31_t)0x7dcc950b, (q31_t)0x7dcb6be6, (q31_t)0x7dca4272, (q31_t)0x7dc918b1, (q31_t)0x7dc7eea3, (q31_t)0x7dc6c447, (q31_t)0x7dc5999d, (q31_t)0x7dc46ea6,
+  (q31_t)0x7dc34361, (q31_t)0x7dc217cf, (q31_t)0x7dc0ebef, (q31_t)0x7dbfbfc1, (q31_t)0x7dbe9346, (q31_t)0x7dbd667d, (q31_t)0x7dbc3967, (q31_t)0x7dbb0c03,
+  (q31_t)0x7db9de52, (q31_t)0x7db8b053, (q31_t)0x7db78207, (q31_t)0x7db6536d, (q31_t)0x7db52485, (q31_t)0x7db3f550, (q31_t)0x7db2c5cd, (q31_t)0x7db195fd,
+  (q31_t)0x7db065df, (q31_t)0x7daf3574, (q31_t)0x7dae04bb, (q31_t)0x7dacd3b5, (q31_t)0x7daba261, (q31_t)0x7daa70c0, (q31_t)0x7da93ed1, (q31_t)0x7da80c95,
+  (q31_t)0x7da6da0b, (q31_t)0x7da5a733, (q31_t)0x7da4740e, (q31_t)0x7da3409c, (q31_t)0x7da20cdc, (q31_t)0x7da0d8cf, (q31_t)0x7d9fa474, (q31_t)0x7d9e6fcb,
+  (q31_t)0x7d9d3ad6, (q31_t)0x7d9c0592, (q31_t)0x7d9ad001, (q31_t)0x7d999a23, (q31_t)0x7d9863f7, (q31_t)0x7d972d7e, (q31_t)0x7d95f6b7, (q31_t)0x7d94bfa3,
+  (q31_t)0x7d938841, (q31_t)0x7d925092, (q31_t)0x7d911896, (q31_t)0x7d8fe04c, (q31_t)0x7d8ea7b4, (q31_t)0x7d8d6ecf, (q31_t)0x7d8c359d, (q31_t)0x7d8afc1d,
+  (q31_t)0x7d89c250, (q31_t)0x7d888835, (q31_t)0x7d874dcd, (q31_t)0x7d861317, (q31_t)0x7d84d814, (q31_t)0x7d839cc4, (q31_t)0x7d826126, (q31_t)0x7d81253a,
+  (q31_t)0x7d7fe902, (q31_t)0x7d7eac7c, (q31_t)0x7d7d6fa8, (q31_t)0x7d7c3287, (q31_t)0x7d7af519, (q31_t)0x7d79b75d, (q31_t)0x7d787954, (q31_t)0x7d773afd,
+  (q31_t)0x7d75fc59, (q31_t)0x7d74bd68, (q31_t)0x7d737e29, (q31_t)0x7d723e9d, (q31_t)0x7d70fec4, (q31_t)0x7d6fbe9d, (q31_t)0x7d6e7e29, (q31_t)0x7d6d3d67,
+  (q31_t)0x7d6bfc58, (q31_t)0x7d6abafc, (q31_t)0x7d697952, (q31_t)0x7d68375b, (q31_t)0x7d66f517, (q31_t)0x7d65b285, (q31_t)0x7d646fa6, (q31_t)0x7d632c79,
+  (q31_t)0x7d61e8ff, (q31_t)0x7d60a538, (q31_t)0x7d5f6124, (q31_t)0x7d5e1cc2, (q31_t)0x7d5cd813, (q31_t)0x7d5b9316, (q31_t)0x7d5a4dcc, (q31_t)0x7d590835,
+  (q31_t)0x7d57c251, (q31_t)0x7d567c1f, (q31_t)0x7d5535a0, (q31_t)0x7d53eed3, (q31_t)0x7d52a7ba, (q31_t)0x7d516053, (q31_t)0x7d50189e, (q31_t)0x7d4ed09d,
+  (q31_t)0x7d4d884e, (q31_t)0x7d4c3fb1, (q31_t)0x7d4af6c8, (q31_t)0x7d49ad91, (q31_t)0x7d48640d, (q31_t)0x7d471a3c, (q31_t)0x7d45d01d, (q31_t)0x7d4485b1,
+  (q31_t)0x7d433af8, (q31_t)0x7d41eff1, (q31_t)0x7d40a49e, (q31_t)0x7d3f58fd, (q31_t)0x7d3e0d0e, (q31_t)0x7d3cc0d3, (q31_t)0x7d3b744a, (q31_t)0x7d3a2774,
+  (q31_t)0x7d38da51, (q31_t)0x7d378ce0, (q31_t)0x7d363f23, (q31_t)0x7d34f118, (q31_t)0x7d33a2bf, (q31_t)0x7d32541a, (q31_t)0x7d310527, (q31_t)0x7d2fb5e7,
+  (q31_t)0x7d2e665a, (q31_t)0x7d2d1680, (q31_t)0x7d2bc659, (q31_t)0x7d2a75e4, (q31_t)0x7d292522, (q31_t)0x7d27d413, (q31_t)0x7d2682b6, (q31_t)0x7d25310d,
+  (q31_t)0x7d23df16, (q31_t)0x7d228cd2, (q31_t)0x7d213a41, (q31_t)0x7d1fe762, (q31_t)0x7d1e9437, (q31_t)0x7d1d40be, (q31_t)0x7d1becf8, (q31_t)0x7d1a98e5,
+  (q31_t)0x7d194485, (q31_t)0x7d17efd8, (q31_t)0x7d169add, (q31_t)0x7d154595, (q31_t)0x7d13f001, (q31_t)0x7d129a1f, (q31_t)0x7d1143ef, (q31_t)0x7d0fed73,
+  (q31_t)0x7d0e96aa, (q31_t)0x7d0d3f93, (q31_t)0x7d0be82f, (q31_t)0x7d0a907e, (q31_t)0x7d093880, (q31_t)0x7d07e035, (q31_t)0x7d06879d, (q31_t)0x7d052eb8,
+  (q31_t)0x7d03d585, (q31_t)0x7d027c05, (q31_t)0x7d012239, (q31_t)0x7cffc81f, (q31_t)0x7cfe6db8, (q31_t)0x7cfd1304, (q31_t)0x7cfbb803, (q31_t)0x7cfa5cb4,
+  (q31_t)0x7cf90119, (q31_t)0x7cf7a531, (q31_t)0x7cf648fb, (q31_t)0x7cf4ec79, (q31_t)0x7cf38fa9, (q31_t)0x7cf2328c, (q31_t)0x7cf0d522, (q31_t)0x7cef776b,
+  (q31_t)0x7cee1967, (q31_t)0x7cecbb16, (q31_t)0x7ceb5c78, (q31_t)0x7ce9fd8d, (q31_t)0x7ce89e55, (q31_t)0x7ce73ed0, (q31_t)0x7ce5defd, (q31_t)0x7ce47ede,
+  (q31_t)0x7ce31e72, (q31_t)0x7ce1bdb8, (q31_t)0x7ce05cb2, (q31_t)0x7cdefb5e, (q31_t)0x7cdd99be, (q31_t)0x7cdc37d0, (q31_t)0x7cdad596, (q31_t)0x7cd9730e,
+  (q31_t)0x7cd8103a, (q31_t)0x7cd6ad18, (q31_t)0x7cd549aa, (q31_t)0x7cd3e5ee, (q31_t)0x7cd281e5, (q31_t)0x7cd11d90, (q31_t)0x7ccfb8ed, (q31_t)0x7cce53fe,
+  (q31_t)0x7ccceec1, (q31_t)0x7ccb8937, (q31_t)0x7cca2361, (q31_t)0x7cc8bd3d, (q31_t)0x7cc756cd, (q31_t)0x7cc5f010, (q31_t)0x7cc48905, (q31_t)0x7cc321ae,
+  (q31_t)0x7cc1ba09, (q31_t)0x7cc05218, (q31_t)0x7cbee9da, (q31_t)0x7cbd814f, (q31_t)0x7cbc1877, (q31_t)0x7cbaaf51, (q31_t)0x7cb945df, (q31_t)0x7cb7dc20,
+  (q31_t)0x7cb67215, (q31_t)0x7cb507bc, (q31_t)0x7cb39d16, (q31_t)0x7cb23223, (q31_t)0x7cb0c6e4, (q31_t)0x7caf5b57, (q31_t)0x7cadef7e, (q31_t)0x7cac8358,
+  (q31_t)0x7cab16e4, (q31_t)0x7ca9aa24, (q31_t)0x7ca83d17, (q31_t)0x7ca6cfbd, (q31_t)0x7ca56216, (q31_t)0x7ca3f423, (q31_t)0x7ca285e2, (q31_t)0x7ca11755,
+  (q31_t)0x7c9fa87a, (q31_t)0x7c9e3953, (q31_t)0x7c9cc9df, (q31_t)0x7c9b5a1e, (q31_t)0x7c99ea10, (q31_t)0x7c9879b6, (q31_t)0x7c97090e, (q31_t)0x7c95981a,
+  (q31_t)0x7c9426d8, (q31_t)0x7c92b54a, (q31_t)0x7c91436f, (q31_t)0x7c8fd148, (q31_t)0x7c8e5ed3, (q31_t)0x7c8cec12, (q31_t)0x7c8b7903, (q31_t)0x7c8a05a8,
+  (q31_t)0x7c889200, (q31_t)0x7c871e0c, (q31_t)0x7c85a9ca, (q31_t)0x7c84353c, (q31_t)0x7c82c060, (q31_t)0x7c814b39, (q31_t)0x7c7fd5c4, (q31_t)0x7c7e6002,
+  (q31_t)0x7c7ce9f4, (q31_t)0x7c7b7399, (q31_t)0x7c79fcf1, (q31_t)0x7c7885fc, (q31_t)0x7c770eba, (q31_t)0x7c75972c, (q31_t)0x7c741f51, (q31_t)0x7c72a729,
+  (q31_t)0x7c712eb5, (q31_t)0x7c6fb5f3, (q31_t)0x7c6e3ce5, (q31_t)0x7c6cc38a, (q31_t)0x7c6b49e3, (q31_t)0x7c69cfee, (q31_t)0x7c6855ad, (q31_t)0x7c66db1f,
+  (q31_t)0x7c656045, (q31_t)0x7c63e51e, (q31_t)0x7c6269aa, (q31_t)0x7c60ede9, (q31_t)0x7c5f71db, (q31_t)0x7c5df581, (q31_t)0x7c5c78da, (q31_t)0x7c5afbe6,
+  (q31_t)0x7c597ea6, (q31_t)0x7c580119, (q31_t)0x7c56833f, (q31_t)0x7c550519, (q31_t)0x7c5386a6, (q31_t)0x7c5207e6, (q31_t)0x7c5088d9, (q31_t)0x7c4f0980,
+  (q31_t)0x7c4d89da, (q31_t)0x7c4c09e8, (q31_t)0x7c4a89a8, (q31_t)0x7c49091c, (q31_t)0x7c478844, (q31_t)0x7c46071f, (q31_t)0x7c4485ad, (q31_t)0x7c4303ee,
+  (q31_t)0x7c4181e3, (q31_t)0x7c3fff8b, (q31_t)0x7c3e7ce7, (q31_t)0x7c3cf9f5, (q31_t)0x7c3b76b8, (q31_t)0x7c39f32d, (q31_t)0x7c386f56, (q31_t)0x7c36eb33,
+  (q31_t)0x7c3566c2, (q31_t)0x7c33e205, (q31_t)0x7c325cfc, (q31_t)0x7c30d7a6, (q31_t)0x7c2f5203, (q31_t)0x7c2dcc14, (q31_t)0x7c2c45d8, (q31_t)0x7c2abf4f,
+  (q31_t)0x7c29387a, (q31_t)0x7c27b158, (q31_t)0x7c2629ea, (q31_t)0x7c24a22f, (q31_t)0x7c231a28, (q31_t)0x7c2191d4, (q31_t)0x7c200933, (q31_t)0x7c1e8046,
+  (q31_t)0x7c1cf70c, (q31_t)0x7c1b6d86, (q31_t)0x7c19e3b3, (q31_t)0x7c185994, (q31_t)0x7c16cf28, (q31_t)0x7c15446f, (q31_t)0x7c13b96a, (q31_t)0x7c122e19,
+  (q31_t)0x7c10a27b, (q31_t)0x7c0f1690, (q31_t)0x7c0d8a59, (q31_t)0x7c0bfdd5, (q31_t)0x7c0a7105, (q31_t)0x7c08e3e8, (q31_t)0x7c07567f, (q31_t)0x7c05c8c9,
+  (q31_t)0x7c043ac7, (q31_t)0x7c02ac78, (q31_t)0x7c011ddd, (q31_t)0x7bff8ef5, (q31_t)0x7bfdffc1, (q31_t)0x7bfc7041, (q31_t)0x7bfae073, (q31_t)0x7bf9505a,
+  (q31_t)0x7bf7bff4, (q31_t)0x7bf62f41, (q31_t)0x7bf49e42, (q31_t)0x7bf30cf6, (q31_t)0x7bf17b5e, (q31_t)0x7befe97a, (q31_t)0x7bee5749, (q31_t)0x7becc4cc,
+  (q31_t)0x7beb3202, (q31_t)0x7be99eec, (q31_t)0x7be80b89, (q31_t)0x7be677da, (q31_t)0x7be4e3df, (q31_t)0x7be34f97, (q31_t)0x7be1bb02, (q31_t)0x7be02621,
+  (q31_t)0x7bde90f4, (q31_t)0x7bdcfb7b, (q31_t)0x7bdb65b5, (q31_t)0x7bd9cfa2, (q31_t)0x7bd83944, (q31_t)0x7bd6a298, (q31_t)0x7bd50ba1, (q31_t)0x7bd3745d,
+  (q31_t)0x7bd1dccc, (q31_t)0x7bd044f0, (q31_t)0x7bceacc7, (q31_t)0x7bcd1451, (q31_t)0x7bcb7b8f, (q31_t)0x7bc9e281, (q31_t)0x7bc84927, (q31_t)0x7bc6af80,
+  (q31_t)0x7bc5158c, (q31_t)0x7bc37b4d, (q31_t)0x7bc1e0c1, (q31_t)0x7bc045e9, (q31_t)0x7bbeaac4, (q31_t)0x7bbd0f53, (q31_t)0x7bbb7396, (q31_t)0x7bb9d78c,
+  (q31_t)0x7bb83b36, (q31_t)0x7bb69e94, (q31_t)0x7bb501a5, (q31_t)0x7bb3646a, (q31_t)0x7bb1c6e3, (q31_t)0x7bb02910, (q31_t)0x7bae8af0, (q31_t)0x7bacec84,
+  (q31_t)0x7bab4dcc, (q31_t)0x7ba9aec7, (q31_t)0x7ba80f76, (q31_t)0x7ba66fd9, (q31_t)0x7ba4cfef, (q31_t)0x7ba32fba, (q31_t)0x7ba18f38, (q31_t)0x7b9fee69,
+  (q31_t)0x7b9e4d4f, (q31_t)0x7b9cabe8, (q31_t)0x7b9b0a35, (q31_t)0x7b996836, (q31_t)0x7b97c5ea, (q31_t)0x7b962352, (q31_t)0x7b94806e, (q31_t)0x7b92dd3e,
+  (q31_t)0x7b9139c2, (q31_t)0x7b8f95f9, (q31_t)0x7b8df1e4, (q31_t)0x7b8c4d83, (q31_t)0x7b8aa8d6, (q31_t)0x7b8903dc, (q31_t)0x7b875e96, (q31_t)0x7b85b904,
+  (q31_t)0x7b841326, (q31_t)0x7b826cfc, (q31_t)0x7b80c686, (q31_t)0x7b7f1fc3, (q31_t)0x7b7d78b4, (q31_t)0x7b7bd159, (q31_t)0x7b7a29b2, (q31_t)0x7b7881be,
+  (q31_t)0x7b76d97f, (q31_t)0x7b7530f3, (q31_t)0x7b73881b, (q31_t)0x7b71def7, (q31_t)0x7b703587, (q31_t)0x7b6e8bcb, (q31_t)0x7b6ce1c2, (q31_t)0x7b6b376e,
+  (q31_t)0x7b698ccd, (q31_t)0x7b67e1e0, (q31_t)0x7b6636a7, (q31_t)0x7b648b22, (q31_t)0x7b62df51, (q31_t)0x7b613334, (q31_t)0x7b5f86ca, (q31_t)0x7b5dda15,
+  (q31_t)0x7b5c2d13, (q31_t)0x7b5a7fc6, (q31_t)0x7b58d22c, (q31_t)0x7b572446, (q31_t)0x7b557614, (q31_t)0x7b53c796, (q31_t)0x7b5218cc, (q31_t)0x7b5069b6,
+  (q31_t)0x7b4eba53, (q31_t)0x7b4d0aa5, (q31_t)0x7b4b5aab, (q31_t)0x7b49aa64, (q31_t)0x7b47f9d2, (q31_t)0x7b4648f3, (q31_t)0x7b4497c9, (q31_t)0x7b42e652,
+  (q31_t)0x7b413490, (q31_t)0x7b3f8281, (q31_t)0x7b3dd026, (q31_t)0x7b3c1d80, (q31_t)0x7b3a6a8d, (q31_t)0x7b38b74e, (q31_t)0x7b3703c3, (q31_t)0x7b354fed,
+  (q31_t)0x7b339bca, (q31_t)0x7b31e75b, (q31_t)0x7b3032a0, (q31_t)0x7b2e7d9a, (q31_t)0x7b2cc847, (q31_t)0x7b2b12a8, (q31_t)0x7b295cbe, (q31_t)0x7b27a687,
+  (q31_t)0x7b25f004, (q31_t)0x7b243936, (q31_t)0x7b22821b, (q31_t)0x7b20cab5, (q31_t)0x7b1f1302, (q31_t)0x7b1d5b04, (q31_t)0x7b1ba2b9, (q31_t)0x7b19ea23,
+  (q31_t)0x7b183141, (q31_t)0x7b167813, (q31_t)0x7b14be99, (q31_t)0x7b1304d3, (q31_t)0x7b114ac1, (q31_t)0x7b0f9063, (q31_t)0x7b0dd5b9, (q31_t)0x7b0c1ac4,
+  (q31_t)0x7b0a5f82, (q31_t)0x7b08a3f5, (q31_t)0x7b06e81b, (q31_t)0x7b052bf6, (q31_t)0x7b036f85, (q31_t)0x7b01b2c8, (q31_t)0x7afff5bf, (q31_t)0x7afe386a,
+  (q31_t)0x7afc7aca, (q31_t)0x7afabcdd, (q31_t)0x7af8fea5, (q31_t)0x7af74021, (q31_t)0x7af58151, (q31_t)0x7af3c235, (q31_t)0x7af202cd, (q31_t)0x7af0431a,
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+  (q31_t)0x7ac42a55, (q31_t)0x7ac262ef, (q31_t)0x7ac09b3e, (q31_t)0x7abed341, (q31_t)0x7abd0af7, (q31_t)0x7abb4263, (q31_t)0x7ab97982, (q31_t)0x7ab7b056,
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+  (q31_t)0x7a99272d, (q31_t)0x7a9758af, (q31_t)0x7a9589e5, (q31_t)0x7a93bad0, (q31_t)0x7a91eb6f, (q31_t)0x7a901bc2, (q31_t)0x7a8e4bca, (q31_t)0x7a8c7b87,
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+  (q31_t)0x7a7c1bdc, (q31_t)0x7a7a48a4, (q31_t)0x7a787521, (q31_t)0x7a76a153, (q31_t)0x7a74cd38, (q31_t)0x7a72f8d3, (q31_t)0x7a712422, (q31_t)0x7a6f4f25,
+  (q31_t)0x7a6d79dd, (q31_t)0x7a6ba449, (q31_t)0x7a69ce6a, (q31_t)0x7a67f83f, (q31_t)0x7a6621c9, (q31_t)0x7a644b07, (q31_t)0x7a6273fa, (q31_t)0x7a609ca1,
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+  (q31_t)0x7a4ffd3d, (q31_t)0x7a4e22f2, (q31_t)0x7a4c485b, (q31_t)0x7a4a6d78, (q31_t)0x7a48924b, (q31_t)0x7a46b6d1, (q31_t)0x7a44db0d, (q31_t)0x7a42fefd,
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+  (q31_t)0x7a32352b, (q31_t)0x7a305629, (q31_t)0x7a2e76dc, (q31_t)0x7a2c9743, (q31_t)0x7a2ab75f, (q31_t)0x7a28d72f, (q31_t)0x7a26f6b4, (q31_t)0x7a2515ee,
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+  (q31_t)0x7a1421b8, (q31_t)0x7a123e01, (q31_t)0x7a1059fe, (q31_t)0x7a0e75b0, (q31_t)0x7a0c9117, (q31_t)0x7a0aac32, (q31_t)0x7a08c702, (q31_t)0x7a06e187,
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+  (q31_t)0x79e67760, (q31_t)0x79e48c9b, (q31_t)0x79e2a18a, (q31_t)0x79e0b62e, (q31_t)0x79deca87, (q31_t)0x79dcde95, (q31_t)0x79daf258, (q31_t)0x79d905d0,
+  (q31_t)0x79d718fc, (q31_t)0x79d52bdd, (q31_t)0x79d33e73, (q31_t)0x79d150be, (q31_t)0x79cf62be, (q31_t)0x79cd7473, (q31_t)0x79cb85dc, (q31_t)0x79c996fb,
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+  (q31_t)0x7998e39f, (q31_t)0x7996ed1e, (q31_t)0x7994f651, (q31_t)0x7992ff3a, (q31_t)0x799107d8, (q31_t)0x798f102a, (q31_t)0x798d1832, (q31_t)0x798b1fef,
+  (q31_t)0x79892761, (q31_t)0x79872e87, (q31_t)0x79853563, (q31_t)0x79833bf4, (q31_t)0x7981423a, (q31_t)0x797f4835, (q31_t)0x797d4de5, (q31_t)0x797b534a,
+  (q31_t)0x79795864, (q31_t)0x79775d33, (q31_t)0x797561b8, (q31_t)0x797365f1, (q31_t)0x797169df, (q31_t)0x796f6d83, (q31_t)0x796d70dc, (q31_t)0x796b73e9,
+  (q31_t)0x796976ac, (q31_t)0x79677924, (q31_t)0x79657b51, (q31_t)0x79637d33, (q31_t)0x79617eca, (q31_t)0x795f8017, (q31_t)0x795d8118, (q31_t)0x795b81cf,
+  (q31_t)0x7959823b, (q31_t)0x7957825c, (q31_t)0x79558232, (q31_t)0x795381bd, (q31_t)0x795180fe, (q31_t)0x794f7ff3, (q31_t)0x794d7e9e, (q31_t)0x794b7cfe,
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+  (q31_t)0x79396137, (q31_t)0x79375cab, (q31_t)0x793557d4, (q31_t)0x793352b2, (q31_t)0x79314d46, (q31_t)0x792f478f, (q31_t)0x792d418d, (q31_t)0x792b3b40,
+  (q31_t)0x792934a9, (q31_t)0x79272dc7, (q31_t)0x7925269a, (q31_t)0x79231f22, (q31_t)0x79211760, (q31_t)0x791f0f53, (q31_t)0x791d06fb, (q31_t)0x791afe59,
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+  (q31_t)0x78e7c7b2, (q31_t)0x78e5b77b, (q31_t)0x78e3a6f9, (q31_t)0x78e1962d, (q31_t)0x78df8516, (q31_t)0x78dd73b5, (q31_t)0x78db6209, (q31_t)0x78d95012,
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+  (q31_t)0x78945c0d, (q31_t)0x78924033, (q31_t)0x7890240e, (q31_t)0x788e07a0, (q31_t)0x788beae6, (q31_t)0x7889cde2, (q31_t)0x7887b094, (q31_t)0x788592fc,
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+  (q31_t)0x78727b8f, (q31_t)0x78705b10, (q31_t)0x786e3a46, (q31_t)0x786c1932, (q31_t)0x7869f7d3, (q31_t)0x7867d62a, (q31_t)0x7865b437, (q31_t)0x786391fa,
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+  (q31_t)0x785050c5, (q31_t)0x784e2ba1, (q31_t)0x784c0633, (q31_t)0x7849e07b, (q31_t)0x7847ba79, (q31_t)0x7845942c, (q31_t)0x78436d96, (q31_t)0x784146b5,
+  (q31_t)0x783f1f8a, (q31_t)0x783cf815, (q31_t)0x783ad055, (q31_t)0x7838a84c, (q31_t)0x78367ff8, (q31_t)0x7834575a, (q31_t)0x78322e72, (q31_t)0x78300540,
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+  (q31_t)0x781c8575, (q31_t)0x781a595d, (q31_t)0x78182cfc, (q31_t)0x78160051, (q31_t)0x7813d35b, (q31_t)0x7811a61b, (q31_t)0x780f7892, (q31_t)0x780d4abe,
+  (q31_t)0x780b1ca0, (q31_t)0x7808ee38, (q31_t)0x7806bf86, (q31_t)0x7804908a, (q31_t)0x78026145, (q31_t)0x780031b5, (q31_t)0x77fe01db, (q31_t)0x77fbd1b6,
+  (q31_t)0x77f9a148, (q31_t)0x77f77090, (q31_t)0x77f53f8e, (q31_t)0x77f30e42, (q31_t)0x77f0dcac, (q31_t)0x77eeaacc, (q31_t)0x77ec78a2, (q31_t)0x77ea462e,
+  (q31_t)0x77e81370, (q31_t)0x77e5e068, (q31_t)0x77e3ad17, (q31_t)0x77e1797b, (q31_t)0x77df4595, (q31_t)0x77dd1165, (q31_t)0x77dadcec, (q31_t)0x77d8a828,
+  (q31_t)0x77d6731a, (q31_t)0x77d43dc3, (q31_t)0x77d20822, (q31_t)0x77cfd236, (q31_t)0x77cd9c01, (q31_t)0x77cb6582, (q31_t)0x77c92eb9, (q31_t)0x77c6f7a6,
+  (q31_t)0x77c4c04a, (q31_t)0x77c288a3, (q31_t)0x77c050b2, (q31_t)0x77be1878, (q31_t)0x77bbdff4, (q31_t)0x77b9a726, (q31_t)0x77b76e0e, (q31_t)0x77b534ac,
+  (q31_t)0x77b2fb00, (q31_t)0x77b0c10b, (q31_t)0x77ae86cc, (q31_t)0x77ac4c43, (q31_t)0x77aa1170, (q31_t)0x77a7d653, (q31_t)0x77a59aec, (q31_t)0x77a35f3c,
+  (q31_t)0x77a12342, (q31_t)0x779ee6fe, (q31_t)0x779caa70, (q31_t)0x779a6d99, (q31_t)0x77983077, (q31_t)0x7795f30c, (q31_t)0x7793b557, (q31_t)0x77917759,
+  (q31_t)0x778f3910, (q31_t)0x778cfa7e, (q31_t)0x778abba2, (q31_t)0x77887c7d, (q31_t)0x77863d0d, (q31_t)0x7783fd54, (q31_t)0x7781bd52, (q31_t)0x777f7d05,
+  (q31_t)0x777d3c6f, (q31_t)0x777afb8f, (q31_t)0x7778ba65, (q31_t)0x777678f2, (q31_t)0x77743735, (q31_t)0x7771f52e, (q31_t)0x776fb2de, (q31_t)0x776d7044,
+  (q31_t)0x776b2d60, (q31_t)0x7768ea33, (q31_t)0x7766a6bc, (q31_t)0x776462fb, (q31_t)0x77621ef1, (q31_t)0x775fda9d, (q31_t)0x775d95ff, (q31_t)0x775b5118,
+  (q31_t)0x77590be7, (q31_t)0x7756c66c, (q31_t)0x775480a8, (q31_t)0x77523a9b, (q31_t)0x774ff443, (q31_t)0x774dada2, (q31_t)0x774b66b8, (q31_t)0x77491f84,
+  (q31_t)0x7746d806, (q31_t)0x7744903f, (q31_t)0x7742482e, (q31_t)0x773fffd4, (q31_t)0x773db730, (q31_t)0x773b6e42, (q31_t)0x7739250b, (q31_t)0x7736db8b,
+  (q31_t)0x773491c0, (q31_t)0x773247ad, (q31_t)0x772ffd50, (q31_t)0x772db2a9, (q31_t)0x772b67b9, (q31_t)0x77291c7f, (q31_t)0x7726d0fc, (q31_t)0x7724852f,
+  (q31_t)0x77223919, (q31_t)0x771fecb9, (q31_t)0x771da010, (q31_t)0x771b531d, (q31_t)0x771905e1, (q31_t)0x7716b85b, (q31_t)0x77146a8c, (q31_t)0x77121c74,
+  (q31_t)0x770fce12, (q31_t)0x770d7f66, (q31_t)0x770b3072, (q31_t)0x7708e133, (q31_t)0x770691ab, (q31_t)0x770441da, (q31_t)0x7701f1c0, (q31_t)0x76ffa15c,
+  (q31_t)0x76fd50ae, (q31_t)0x76faffb8, (q31_t)0x76f8ae78, (q31_t)0x76f65cee, (q31_t)0x76f40b1b, (q31_t)0x76f1b8ff, (q31_t)0x76ef6699, (q31_t)0x76ed13ea,
+  (q31_t)0x76eac0f2, (q31_t)0x76e86db0, (q31_t)0x76e61a25, (q31_t)0x76e3c650, (q31_t)0x76e17233, (q31_t)0x76df1dcb, (q31_t)0x76dcc91b, (q31_t)0x76da7421,
+  (q31_t)0x76d81ede, (q31_t)0x76d5c952, (q31_t)0x76d3737c, (q31_t)0x76d11d5d, (q31_t)0x76cec6f5, (q31_t)0x76cc7043, (q31_t)0x76ca1948, (q31_t)0x76c7c204,
+  (q31_t)0x76c56a77, (q31_t)0x76c312a0, (q31_t)0x76c0ba80, (q31_t)0x76be6217, (q31_t)0x76bc0965, (q31_t)0x76b9b069, (q31_t)0x76b75724, (q31_t)0x76b4fd96,
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+  (q31_t)0x716e48cc, (q31_t)0x716b5f5f, (q31_t)0x716875ad, (q31_t)0x71658bb4, (q31_t)0x7162a175, (q31_t)0x715fb6f1, (q31_t)0x715ccc26, (q31_t)0x7159e116,
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+  (q31_t)0x711093cb, (q31_t)0x710da1a3, (q31_t)0x710aaf35, (q31_t)0x7107bc82, (q31_t)0x7104c989, (q31_t)0x7101d64a, (q31_t)0x70fee2c5, (q31_t)0x70fbeefb,
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+  (q31_t)0x70e1509f, (q31_t)0x70de5a1c, (q31_t)0x70db6353, (q31_t)0x70d86c45, (q31_t)0x70d574f1, (q31_t)0x70d27d58, (q31_t)0x70cf8579, (q31_t)0x70cc8d54,
+  (q31_t)0x70c994ea, (q31_t)0x70c69c3a, (q31_t)0x70c3a345, (q31_t)0x70c0aa0a, (q31_t)0x70bdb08a, (q31_t)0x70bab6c4, (q31_t)0x70b7bcb8, (q31_t)0x70b4c267,
+  (q31_t)0x70b1c7d1, (q31_t)0x70aeccf5, (q31_t)0x70abd1d3, (q31_t)0x70a8d66c, (q31_t)0x70a5dac0, (q31_t)0x70a2dece, (q31_t)0x709fe296, (q31_t)0x709ce619,
+  (q31_t)0x7099e957, (q31_t)0x7096ec4f, (q31_t)0x7093ef01, (q31_t)0x7090f16e, (q31_t)0x708df396, (q31_t)0x708af579, (q31_t)0x7087f715, (q31_t)0x7084f86d,
+  (q31_t)0x7081f97f, (q31_t)0x707efa4c, (q31_t)0x707bfad3, (q31_t)0x7078fb15, (q31_t)0x7075fb11, (q31_t)0x7072fac9, (q31_t)0x706ffa3a, (q31_t)0x706cf967,
+  (q31_t)0x7069f84e, (q31_t)0x7066f6f0, (q31_t)0x7063f54c, (q31_t)0x7060f363, (q31_t)0x705df135, (q31_t)0x705aeec1, (q31_t)0x7057ec08, (q31_t)0x7054e90a,
+  (q31_t)0x7051e5c7, (q31_t)0x704ee23e, (q31_t)0x704bde70, (q31_t)0x7048da5d, (q31_t)0x7045d604, (q31_t)0x7042d166, (q31_t)0x703fcc83, (q31_t)0x703cc75b,
+  (q31_t)0x7039c1ed, (q31_t)0x7036bc3b, (q31_t)0x7033b643, (q31_t)0x7030b005, (q31_t)0x702da983, (q31_t)0x702aa2bb, (q31_t)0x70279baf, (q31_t)0x7024945d,
+  (q31_t)0x70218cc6, (q31_t)0x701e84e9, (q31_t)0x701b7cc8, (q31_t)0x70187461, (q31_t)0x70156bb5, (q31_t)0x701262c4, (q31_t)0x700f598e, (q31_t)0x700c5013,
+  (q31_t)0x70094653, (q31_t)0x70063c4e, (q31_t)0x70033203, (q31_t)0x70002774, (q31_t)0x6ffd1c9f, (q31_t)0x6ffa1185, (q31_t)0x6ff70626, (q31_t)0x6ff3fa82,
+  (q31_t)0x6ff0ee99, (q31_t)0x6fede26b, (q31_t)0x6fead5f8, (q31_t)0x6fe7c940, (q31_t)0x6fe4bc43, (q31_t)0x6fe1af01, (q31_t)0x6fdea17a, (q31_t)0x6fdb93ae,
+  (q31_t)0x6fd8859d, (q31_t)0x6fd57746, (q31_t)0x6fd268ab, (q31_t)0x6fcf59cb, (q31_t)0x6fcc4aa6, (q31_t)0x6fc93b3c, (q31_t)0x6fc62b8d, (q31_t)0x6fc31b99,
+  (q31_t)0x6fc00b60, (q31_t)0x6fbcfae2, (q31_t)0x6fb9ea20, (q31_t)0x6fb6d918, (q31_t)0x6fb3c7cb, (q31_t)0x6fb0b63a, (q31_t)0x6fada464, (q31_t)0x6faa9248,
+  (q31_t)0x6fa77fe8, (q31_t)0x6fa46d43, (q31_t)0x6fa15a59, (q31_t)0x6f9e472b, (q31_t)0x6f9b33b7, (q31_t)0x6f981fff, (q31_t)0x6f950c01, (q31_t)0x6f91f7bf,
+  (q31_t)0x6f8ee338, (q31_t)0x6f8bce6c, (q31_t)0x6f88b95c, (q31_t)0x6f85a407, (q31_t)0x6f828e6c, (q31_t)0x6f7f788d, (q31_t)0x6f7c626a, (q31_t)0x6f794c01,
+  (q31_t)0x6f763554, (q31_t)0x6f731e62, (q31_t)0x6f70072b, (q31_t)0x6f6cefb0, (q31_t)0x6f69d7f0, (q31_t)0x6f66bfeb, (q31_t)0x6f63a7a1, (q31_t)0x6f608f13,
+  (q31_t)0x6f5d7640, (q31_t)0x6f5a5d28, (q31_t)0x6f5743cb, (q31_t)0x6f542a2a, (q31_t)0x6f511044, (q31_t)0x6f4df61a, (q31_t)0x6f4adbab, (q31_t)0x6f47c0f7,
+  (q31_t)0x6f44a5ff, (q31_t)0x6f418ac2, (q31_t)0x6f3e6f40, (q31_t)0x6f3b537a, (q31_t)0x6f38376f, (q31_t)0x6f351b1f, (q31_t)0x6f31fe8b, (q31_t)0x6f2ee1b2,
+  (q31_t)0x6f2bc495, (q31_t)0x6f28a733, (q31_t)0x6f25898d, (q31_t)0x6f226ba2, (q31_t)0x6f1f4d72, (q31_t)0x6f1c2efe, (q31_t)0x6f191045, (q31_t)0x6f15f148,
+  (q31_t)0x6f12d206, (q31_t)0x6f0fb280, (q31_t)0x6f0c92b6, (q31_t)0x6f0972a6, (q31_t)0x6f065253, (q31_t)0x6f0331ba, (q31_t)0x6f0010de, (q31_t)0x6efcefbd,
+  (q31_t)0x6ef9ce57, (q31_t)0x6ef6acad, (q31_t)0x6ef38abe, (q31_t)0x6ef0688b, (q31_t)0x6eed4614, (q31_t)0x6eea2358, (q31_t)0x6ee70058, (q31_t)0x6ee3dd13,
+  (q31_t)0x6ee0b98a, (q31_t)0x6edd95bd, (q31_t)0x6eda71ab, (q31_t)0x6ed74d55, (q31_t)0x6ed428ba, (q31_t)0x6ed103db, (q31_t)0x6ecddeb8, (q31_t)0x6ecab950,
+  (q31_t)0x6ec793a4, (q31_t)0x6ec46db4, (q31_t)0x6ec1477f, (q31_t)0x6ebe2106, (q31_t)0x6ebafa49, (q31_t)0x6eb7d347, (q31_t)0x6eb4ac02, (q31_t)0x6eb18477,
+  (q31_t)0x6eae5ca9, (q31_t)0x6eab3496, (q31_t)0x6ea80c3f, (q31_t)0x6ea4e3a4, (q31_t)0x6ea1bac4, (q31_t)0x6e9e91a1, (q31_t)0x6e9b6839, (q31_t)0x6e983e8d,
+  (q31_t)0x6e95149c, (q31_t)0x6e91ea67, (q31_t)0x6e8ebfef, (q31_t)0x6e8b9532, (q31_t)0x6e886a30, (q31_t)0x6e853eeb, (q31_t)0x6e821361, (q31_t)0x6e7ee794,
+  (q31_t)0x6e7bbb82, (q31_t)0x6e788f2c, (q31_t)0x6e756291, (q31_t)0x6e7235b3, (q31_t)0x6e6f0890, (q31_t)0x6e6bdb2a, (q31_t)0x6e68ad7f, (q31_t)0x6e657f90,
+  (q31_t)0x6e62515d, (q31_t)0x6e5f22e6, (q31_t)0x6e5bf42b, (q31_t)0x6e58c52c, (q31_t)0x6e5595e9, (q31_t)0x6e526662, (q31_t)0x6e4f3696, (q31_t)0x6e4c0687,
+  (q31_t)0x6e48d633, (q31_t)0x6e45a59c, (q31_t)0x6e4274c1, (q31_t)0x6e3f43a1, (q31_t)0x6e3c123e, (q31_t)0x6e38e096, (q31_t)0x6e35aeab, (q31_t)0x6e327c7b,
+  (q31_t)0x6e2f4a08, (q31_t)0x6e2c1750, (q31_t)0x6e28e455, (q31_t)0x6e25b115, (q31_t)0x6e227d92, (q31_t)0x6e1f49cb, (q31_t)0x6e1c15c0, (q31_t)0x6e18e171,
+  (q31_t)0x6e15acde, (q31_t)0x6e127807, (q31_t)0x6e0f42ec, (q31_t)0x6e0c0d8e, (q31_t)0x6e08d7eb, (q31_t)0x6e05a205, (q31_t)0x6e026bda, (q31_t)0x6dff356c,
+  (q31_t)0x6dfbfeba, (q31_t)0x6df8c7c4, (q31_t)0x6df5908b, (q31_t)0x6df2590d, (q31_t)0x6def214c, (q31_t)0x6debe947, (q31_t)0x6de8b0fe, (q31_t)0x6de57871,
+  (q31_t)0x6de23fa0, (q31_t)0x6ddf068c, (q31_t)0x6ddbcd34, (q31_t)0x6dd89398, (q31_t)0x6dd559b9, (q31_t)0x6dd21f95, (q31_t)0x6dcee52e, (q31_t)0x6dcbaa83,
+  (q31_t)0x6dc86f95, (q31_t)0x6dc53462, (q31_t)0x6dc1f8ec, (q31_t)0x6dbebd33, (q31_t)0x6dbb8135, (q31_t)0x6db844f4, (q31_t)0x6db5086f, (q31_t)0x6db1cba7,
+  (q31_t)0x6dae8e9b, (q31_t)0x6dab514b, (q31_t)0x6da813b8, (q31_t)0x6da4d5e1, (q31_t)0x6da197c6, (q31_t)0x6d9e5968, (q31_t)0x6d9b1ac6, (q31_t)0x6d97dbe0,
+  (q31_t)0x6d949cb7, (q31_t)0x6d915d4a, (q31_t)0x6d8e1d9a, (q31_t)0x6d8adda6, (q31_t)0x6d879d6e, (q31_t)0x6d845cf3, (q31_t)0x6d811c35, (q31_t)0x6d7ddb33,
+  (q31_t)0x6d7a99ed, (q31_t)0x6d775864, (q31_t)0x6d741697, (q31_t)0x6d70d487, (q31_t)0x6d6d9233, (q31_t)0x6d6a4f9c, (q31_t)0x6d670cc1, (q31_t)0x6d63c9a3,
+  (q31_t)0x6d608641, (q31_t)0x6d5d429c, (q31_t)0x6d59feb3, (q31_t)0x6d56ba87, (q31_t)0x6d537617, (q31_t)0x6d503164, (q31_t)0x6d4cec6e, (q31_t)0x6d49a734,
+  (q31_t)0x6d4661b7, (q31_t)0x6d431bf6, (q31_t)0x6d3fd5f2, (q31_t)0x6d3c8fab, (q31_t)0x6d394920, (q31_t)0x6d360252, (q31_t)0x6d32bb40, (q31_t)0x6d2f73eb,
+  (q31_t)0x6d2c2c53, (q31_t)0x6d28e477, (q31_t)0x6d259c58, (q31_t)0x6d2253f6, (q31_t)0x6d1f0b50, (q31_t)0x6d1bc267, (q31_t)0x6d18793b, (q31_t)0x6d152fcc,
+  (q31_t)0x6d11e619, (q31_t)0x6d0e9c23, (q31_t)0x6d0b51e9, (q31_t)0x6d08076d, (q31_t)0x6d04bcad, (q31_t)0x6d0171aa, (q31_t)0x6cfe2663, (q31_t)0x6cfadada,
+  (q31_t)0x6cf78f0d, (q31_t)0x6cf442fd, (q31_t)0x6cf0f6aa, (q31_t)0x6cedaa13, (q31_t)0x6cea5d3a, (q31_t)0x6ce7101d, (q31_t)0x6ce3c2bd, (q31_t)0x6ce0751a,
+  (q31_t)0x6cdd2733, (q31_t)0x6cd9d90a, (q31_t)0x6cd68a9d, (q31_t)0x6cd33bed, (q31_t)0x6ccfecfa, (q31_t)0x6ccc9dc4, (q31_t)0x6cc94e4b, (q31_t)0x6cc5fe8f,
+  (q31_t)0x6cc2ae90, (q31_t)0x6cbf5e4d, (q31_t)0x6cbc0dc8, (q31_t)0x6cb8bcff, (q31_t)0x6cb56bf4, (q31_t)0x6cb21aa5, (q31_t)0x6caec913, (q31_t)0x6cab773e,
+  (q31_t)0x6ca82527, (q31_t)0x6ca4d2cc, (q31_t)0x6ca1802e, (q31_t)0x6c9e2d4d, (q31_t)0x6c9ada29, (q31_t)0x6c9786c2, (q31_t)0x6c943318, (q31_t)0x6c90df2c,
+  (q31_t)0x6c8d8afc, (q31_t)0x6c8a3689, (q31_t)0x6c86e1d3, (q31_t)0x6c838cdb, (q31_t)0x6c80379f, (q31_t)0x6c7ce220, (q31_t)0x6c798c5f, (q31_t)0x6c76365b,
+  (q31_t)0x6c72e013, (q31_t)0x6c6f8989, (q31_t)0x6c6c32bc, (q31_t)0x6c68dbac, (q31_t)0x6c658459, (q31_t)0x6c622cc4, (q31_t)0x6c5ed4eb, (q31_t)0x6c5b7cd0,
+  (q31_t)0x6c582472, (q31_t)0x6c54cbd1, (q31_t)0x6c5172ed, (q31_t)0x6c4e19c6, (q31_t)0x6c4ac05d, (q31_t)0x6c4766b0, (q31_t)0x6c440cc1, (q31_t)0x6c40b28f,
+  (q31_t)0x6c3d581b, (q31_t)0x6c39fd63, (q31_t)0x6c36a269, (q31_t)0x6c33472c, (q31_t)0x6c2febad, (q31_t)0x6c2c8fea, (q31_t)0x6c2933e5, (q31_t)0x6c25d79d,
+  (q31_t)0x6c227b13, (q31_t)0x6c1f1e45, (q31_t)0x6c1bc136, (q31_t)0x6c1863e3, (q31_t)0x6c15064e, (q31_t)0x6c11a876, (q31_t)0x6c0e4a5b, (q31_t)0x6c0aebfe,
+  (q31_t)0x6c078d5e, (q31_t)0x6c042e7b, (q31_t)0x6c00cf56, (q31_t)0x6bfd6fee, (q31_t)0x6bfa1044, (q31_t)0x6bf6b056, (q31_t)0x6bf35027, (q31_t)0x6befefb5,
+  (q31_t)0x6bec8f00, (q31_t)0x6be92e08, (q31_t)0x6be5ccce, (q31_t)0x6be26b52, (q31_t)0x6bdf0993, (q31_t)0x6bdba791, (q31_t)0x6bd8454d, (q31_t)0x6bd4e2c6,
+  (q31_t)0x6bd17ffd, (q31_t)0x6bce1cf1, (q31_t)0x6bcab9a3, (q31_t)0x6bc75613, (q31_t)0x6bc3f23f, (q31_t)0x6bc08e2a, (q31_t)0x6bbd29d2, (q31_t)0x6bb9c537,
+  (q31_t)0x6bb6605a, (q31_t)0x6bb2fb3b, (q31_t)0x6baf95d9, (q31_t)0x6bac3034, (q31_t)0x6ba8ca4e, (q31_t)0x6ba56425, (q31_t)0x6ba1fdb9, (q31_t)0x6b9e970b,
+  (q31_t)0x6b9b301b, (q31_t)0x6b97c8e8, (q31_t)0x6b946173, (q31_t)0x6b90f9bc, (q31_t)0x6b8d91c2, (q31_t)0x6b8a2986, (q31_t)0x6b86c107, (q31_t)0x6b835846,
+  (q31_t)0x6b7fef43, (q31_t)0x6b7c85fe, (q31_t)0x6b791c76, (q31_t)0x6b75b2ac, (q31_t)0x6b7248a0, (q31_t)0x6b6ede51, (q31_t)0x6b6b73c0, (q31_t)0x6b6808ed,
+  (q31_t)0x6b649dd8, (q31_t)0x6b613280, (q31_t)0x6b5dc6e6, (q31_t)0x6b5a5b0a, (q31_t)0x6b56eeec, (q31_t)0x6b53828b, (q31_t)0x6b5015e9, (q31_t)0x6b4ca904,
+  (q31_t)0x6b493bdd, (q31_t)0x6b45ce73, (q31_t)0x6b4260c8, (q31_t)0x6b3ef2da, (q31_t)0x6b3b84ab, (q31_t)0x6b381639, (q31_t)0x6b34a785, (q31_t)0x6b31388e,
+  (q31_t)0x6b2dc956, (q31_t)0x6b2a59dc, (q31_t)0x6b26ea1f, (q31_t)0x6b237a21, (q31_t)0x6b2009e0, (q31_t)0x6b1c995d, (q31_t)0x6b192898, (q31_t)0x6b15b791,
+  (q31_t)0x6b124648, (q31_t)0x6b0ed4bd, (q31_t)0x6b0b62f0, (q31_t)0x6b07f0e1, (q31_t)0x6b047e90, (q31_t)0x6b010bfd, (q31_t)0x6afd9928, (q31_t)0x6afa2610,
+  (q31_t)0x6af6b2b7, (q31_t)0x6af33f1c, (q31_t)0x6aefcb3f, (q31_t)0x6aec5720, (q31_t)0x6ae8e2bf, (q31_t)0x6ae56e1c, (q31_t)0x6ae1f937, (q31_t)0x6ade8410,
+  (q31_t)0x6adb0ea8, (q31_t)0x6ad798fd, (q31_t)0x6ad42311, (q31_t)0x6ad0ace2, (q31_t)0x6acd3672, (q31_t)0x6ac9bfc0, (q31_t)0x6ac648cb, (q31_t)0x6ac2d195,
+  (q31_t)0x6abf5a1e, (q31_t)0x6abbe264, (q31_t)0x6ab86a68, (q31_t)0x6ab4f22b, (q31_t)0x6ab179ac, (q31_t)0x6aae00eb, (q31_t)0x6aaa87e8, (q31_t)0x6aa70ea4,
+  (q31_t)0x6aa3951d, (q31_t)0x6aa01b55, (q31_t)0x6a9ca14b, (q31_t)0x6a992700, (q31_t)0x6a95ac72, (q31_t)0x6a9231a3, (q31_t)0x6a8eb692, (q31_t)0x6a8b3b3f,
+  (q31_t)0x6a87bfab, (q31_t)0x6a8443d5, (q31_t)0x6a80c7bd, (q31_t)0x6a7d4b64, (q31_t)0x6a79cec8, (q31_t)0x6a7651ec, (q31_t)0x6a72d4cd, (q31_t)0x6a6f576d,
+  (q31_t)0x6a6bd9cb, (q31_t)0x6a685be8, (q31_t)0x6a64ddc2, (q31_t)0x6a615f5c, (q31_t)0x6a5de0b3, (q31_t)0x6a5a61c9, (q31_t)0x6a56e29e, (q31_t)0x6a536331,
+  (q31_t)0x6a4fe382, (q31_t)0x6a4c6391, (q31_t)0x6a48e360, (q31_t)0x6a4562ec, (q31_t)0x6a41e237, (q31_t)0x6a3e6140, (q31_t)0x6a3ae008, (q31_t)0x6a375e8f,
+  (q31_t)0x6a33dcd4, (q31_t)0x6a305ad7, (q31_t)0x6a2cd899, (q31_t)0x6a295619, (q31_t)0x6a25d358, (q31_t)0x6a225055, (q31_t)0x6a1ecd11, (q31_t)0x6a1b498c,
+  (q31_t)0x6a17c5c5, (q31_t)0x6a1441bc, (q31_t)0x6a10bd72, (q31_t)0x6a0d38e7, (q31_t)0x6a09b41a, (q31_t)0x6a062f0c, (q31_t)0x6a02a9bc, (q31_t)0x69ff242b,
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+  (q31_t)0x69c31e7f, (q31_t)0x69bf9456, (q31_t)0x69bc09ec, (q31_t)0x69b87f41, (q31_t)0x69b4f455, (q31_t)0x69b16928, (q31_t)0x69adddb9, (q31_t)0x69aa5209,
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+  (q31_t)0x698a5d67, (q31_t)0x6986cf2c, (q31_t)0x698340af, (q31_t)0x697fb1f2, (q31_t)0x697c22f3, (q31_t)0x697893b4, (q31_t)0x69750433, (q31_t)0x69717472,
+  (q31_t)0x696de46f, (q31_t)0x696a542b, (q31_t)0x6966c3a6, (q31_t)0x696332e1, (q31_t)0x695fa1da, (q31_t)0x695c1092, (q31_t)0x69587f09, (q31_t)0x6954ed40,
+  (q31_t)0x69515b35, (q31_t)0x694dc8e9, (q31_t)0x694a365c, (q31_t)0x6946a38f, (q31_t)0x69431080, (q31_t)0x693f7d31, (q31_t)0x693be9a0, (q31_t)0x693855cf,
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+  (q31_t)0x6887d4d4, (q31_t)0x68843460, (q31_t)0x688093ab, (q31_t)0x687cf2b6, (q31_t)0x68795181, (q31_t)0x6875b00b, (q31_t)0x68720e55, (q31_t)0x686e6c5e,
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+  (q31_t)0x684daf61, (q31_t)0x684a0ae6, (q31_t)0x6846662c, (q31_t)0x6842c131, (q31_t)0x683f1bf5, (q31_t)0x683b7679, (q31_t)0x6837d0bd, (q31_t)0x68342ac1,
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+  (q31_t)0x67bb3894, (q31_t)0x67b78a13, (q31_t)0x67b3db53, (q31_t)0x67b02c52, (q31_t)0x67ac7d11, (q31_t)0x67a8cd91, (q31_t)0x67a51dd0, (q31_t)0x67a16dcf,
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+  (q31_t)0x6780328f, (q31_t)0x677c8010, (q31_t)0x6778cd50, (q31_t)0x67751a51, (q31_t)0x67716713, (q31_t)0x676db394, (q31_t)0x6769ffd5, (q31_t)0x67664bd7,
+  (q31_t)0x67629799, (q31_t)0x675ee31b, (q31_t)0x675b2e5e, (q31_t)0x67577960, (q31_t)0x6753c423, (q31_t)0x67500ea7, (q31_t)0x674c58ea, (q31_t)0x6748a2ee,
+  (q31_t)0x6744ecb2, (q31_t)0x67413636, (q31_t)0x673d7f7b, (q31_t)0x6739c880, (q31_t)0x67361145, (q31_t)0x673259ca, (q31_t)0x672ea210, (q31_t)0x672aea17,
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+  (q31_t)0x66919d77, (q31_t)0x668ddb14, (q31_t)0x668a1872, (q31_t)0x66865591, (q31_t)0x66829270, (q31_t)0x667ecf11, (q31_t)0x667b0b72, (q31_t)0x66774793,
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+  (q31_t)0x659f1412, (q31_t)0x659b41f1, (q31_t)0x65976f91, (q31_t)0x65939cf3, (q31_t)0x658fca15, (q31_t)0x658bf6fa, (q31_t)0x6588239f, (q31_t)0x65845006,
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+  (q31_t)0x646a670a, (q31_t)0x64668170, (q31_t)0x64629b98, (q31_t)0x645eb582, (q31_t)0x645acf2e, (q31_t)0x6456e89d, (q31_t)0x645301cd, (q31_t)0x644f1ac0,
+  (q31_t)0x644b3375, (q31_t)0x64474bec, (q31_t)0x64436425, (q31_t)0x643f7c20, (q31_t)0x643b93dd, (q31_t)0x6437ab5d, (q31_t)0x6433c29f, (q31_t)0x642fd9a3,
+  (q31_t)0x642bf069, (q31_t)0x642806f1, (q31_t)0x64241d3c, (q31_t)0x64203348, (q31_t)0x641c4917, (q31_t)0x64185ea9, (q31_t)0x641473fc, (q31_t)0x64108912,
+  (q31_t)0x640c9dea, (q31_t)0x6408b284, (q31_t)0x6404c6e1, (q31_t)0x6400db00, (q31_t)0x63fceee1, (q31_t)0x63f90285, (q31_t)0x63f515eb, (q31_t)0x63f12913,
+  (q31_t)0x63ed3bfd, (q31_t)0x63e94eaa, (q31_t)0x63e5611a, (q31_t)0x63e1734b, (q31_t)0x63dd853f, (q31_t)0x63d996f6, (q31_t)0x63d5a86f, (q31_t)0x63d1b9aa,
+  (q31_t)0x63cdcaa8, (q31_t)0x63c9db68, (q31_t)0x63c5ebeb, (q31_t)0x63c1fc30, (q31_t)0x63be0c37, (q31_t)0x63ba1c01, (q31_t)0x63b62b8e, (q31_t)0x63b23add,
+  (q31_t)0x63ae49ee, (q31_t)0x63aa58c2, (q31_t)0x63a66759, (q31_t)0x63a275b2, (q31_t)0x639e83cd, (q31_t)0x639a91ac, (q31_t)0x63969f4c, (q31_t)0x6392acaf,
+  (q31_t)0x638eb9d5, (q31_t)0x638ac6be, (q31_t)0x6386d369, (q31_t)0x6382dfd6, (q31_t)0x637eec07, (q31_t)0x637af7fa, (q31_t)0x637703af, (q31_t)0x63730f27,
+  (q31_t)0x636f1a62, (q31_t)0x636b2560, (q31_t)0x63673020, (q31_t)0x63633aa3, (q31_t)0x635f44e8, (q31_t)0x635b4ef0, (q31_t)0x635758bb, (q31_t)0x63536249,
+  (q31_t)0x634f6b99, (q31_t)0x634b74ad, (q31_t)0x63477d82, (q31_t)0x6343861b, (q31_t)0x633f8e76, (q31_t)0x633b9695, (q31_t)0x63379e76, (q31_t)0x6333a619,
+  (q31_t)0x632fad80, (q31_t)0x632bb4a9, (q31_t)0x6327bb96, (q31_t)0x6323c245, (q31_t)0x631fc8b7, (q31_t)0x631bceeb, (q31_t)0x6317d4e3, (q31_t)0x6313da9e,
+  (q31_t)0x630fe01b, (q31_t)0x630be55b, (q31_t)0x6307ea5e, (q31_t)0x6303ef25, (q31_t)0x62fff3ae, (q31_t)0x62fbf7fa, (q31_t)0x62f7fc08, (q31_t)0x62f3ffda,
+  (q31_t)0x62f0036f, (q31_t)0x62ec06c7, (q31_t)0x62e809e2, (q31_t)0x62e40cbf, (q31_t)0x62e00f60, (q31_t)0x62dc11c4, (q31_t)0x62d813eb, (q31_t)0x62d415d4,
+  (q31_t)0x62d01781, (q31_t)0x62cc18f1, (q31_t)0x62c81a24, (q31_t)0x62c41b1a, (q31_t)0x62c01bd3, (q31_t)0x62bc1c4f, (q31_t)0x62b81c8f, (q31_t)0x62b41c91,
+  (q31_t)0x62b01c57, (q31_t)0x62ac1bdf, (q31_t)0x62a81b2b, (q31_t)0x62a41a3a, (q31_t)0x62a0190c, (q31_t)0x629c17a1, (q31_t)0x629815fa, (q31_t)0x62941415,
+  (q31_t)0x629011f4, (q31_t)0x628c0f96, (q31_t)0x62880cfb, (q31_t)0x62840a23, (q31_t)0x6280070f, (q31_t)0x627c03be, (q31_t)0x62780030, (q31_t)0x6273fc65,
+  (q31_t)0x626ff85e, (q31_t)0x626bf41a, (q31_t)0x6267ef99, (q31_t)0x6263eadc, (q31_t)0x625fe5e1, (q31_t)0x625be0ab, (q31_t)0x6257db37, (q31_t)0x6253d587,
+  (q31_t)0x624fcf9a, (q31_t)0x624bc970, (q31_t)0x6247c30a, (q31_t)0x6243bc68, (q31_t)0x623fb588, (q31_t)0x623bae6c, (q31_t)0x6237a714, (q31_t)0x62339f7e,
+  (q31_t)0x622f97ad, (q31_t)0x622b8f9e, (q31_t)0x62278754, (q31_t)0x62237ecc, (q31_t)0x621f7608, (q31_t)0x621b6d08, (q31_t)0x621763cb, (q31_t)0x62135a51,
+  (q31_t)0x620f509b, (q31_t)0x620b46a9, (q31_t)0x62073c7a, (q31_t)0x6203320e, (q31_t)0x61ff2766, (q31_t)0x61fb1c82, (q31_t)0x61f71161, (q31_t)0x61f30604,
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+  (q31_t)0x618d9d4f, (q31_t)0x61898bd2, (q31_t)0x61857a19, (q31_t)0x61816824, (q31_t)0x617d55f2, (q31_t)0x61794385, (q31_t)0x617530db, (q31_t)0x61711df5,
+  (q31_t)0x616d0ad3, (q31_t)0x6168f775, (q31_t)0x6164e3db, (q31_t)0x6160d005, (q31_t)0x615cbbf3, (q31_t)0x6158a7a4, (q31_t)0x6154931a, (q31_t)0x61507e54,
+  (q31_t)0x614c6951, (q31_t)0x61485413, (q31_t)0x61443e98, (q31_t)0x614028e2, (q31_t)0x613c12f0, (q31_t)0x6137fcc1, (q31_t)0x6133e657, (q31_t)0x612fcfb0,
+  (q31_t)0x612bb8ce, (q31_t)0x6127a1b0, (q31_t)0x61238a56, (q31_t)0x611f72c0, (q31_t)0x611b5aee, (q31_t)0x611742e0, (q31_t)0x61132a96, (q31_t)0x610f1210,
+  (q31_t)0x610af94f, (q31_t)0x6106e051, (q31_t)0x6102c718, (q31_t)0x60feada3, (q31_t)0x60fa93f2, (q31_t)0x60f67a05, (q31_t)0x60f25fdd, (q31_t)0x60ee4579,
+  (q31_t)0x60ea2ad8, (q31_t)0x60e60ffd, (q31_t)0x60e1f4e5, (q31_t)0x60ddd991, (q31_t)0x60d9be02, (q31_t)0x60d5a237, (q31_t)0x60d18631, (q31_t)0x60cd69ee,
+  (q31_t)0x60c94d70, (q31_t)0x60c530b6, (q31_t)0x60c113c1, (q31_t)0x60bcf690, (q31_t)0x60b8d923, (q31_t)0x60b4bb7a, (q31_t)0x60b09d96, (q31_t)0x60ac7f76,
+  (q31_t)0x60a8611b, (q31_t)0x60a44284, (q31_t)0x60a023b1, (q31_t)0x609c04a3, (q31_t)0x6097e559, (q31_t)0x6093c5d3, (q31_t)0x608fa612, (q31_t)0x608b8616,
+  (q31_t)0x608765dd, (q31_t)0x6083456a, (q31_t)0x607f24ba, (q31_t)0x607b03d0, (q31_t)0x6076e2a9, (q31_t)0x6072c148, (q31_t)0x606e9faa, (q31_t)0x606a7dd2,
+  (q31_t)0x60665bbd, (q31_t)0x6062396e, (q31_t)0x605e16e2, (q31_t)0x6059f41c, (q31_t)0x6055d11a, (q31_t)0x6051addc, (q31_t)0x604d8a63, (q31_t)0x604966af,
+  (q31_t)0x604542bf, (q31_t)0x60411e94, (q31_t)0x603cfa2e, (q31_t)0x6038d58c, (q31_t)0x6034b0af, (q31_t)0x60308b97, (q31_t)0x602c6643, (q31_t)0x602840b4,
+  (q31_t)0x60241ae9, (q31_t)0x601ff4e3, (q31_t)0x601bcea2, (q31_t)0x6017a826, (q31_t)0x6013816e, (q31_t)0x600f5a7b, (q31_t)0x600b334d, (q31_t)0x60070be4,
+  (q31_t)0x6002e43f, (q31_t)0x5ffebc5f, (q31_t)0x5ffa9444, (q31_t)0x5ff66bee, (q31_t)0x5ff2435d, (q31_t)0x5fee1a90, (q31_t)0x5fe9f188, (q31_t)0x5fe5c845,
+  (q31_t)0x5fe19ec7, (q31_t)0x5fdd750e, (q31_t)0x5fd94b19, (q31_t)0x5fd520ea, (q31_t)0x5fd0f67f, (q31_t)0x5fcccbd9, (q31_t)0x5fc8a0f8, (q31_t)0x5fc475dc,
+  (q31_t)0x5fc04a85, (q31_t)0x5fbc1ef3, (q31_t)0x5fb7f326, (q31_t)0x5fb3c71e, (q31_t)0x5faf9adb, (q31_t)0x5fab6e5d, (q31_t)0x5fa741a3, (q31_t)0x5fa314af,
+  (q31_t)0x5f9ee780, (q31_t)0x5f9aba16, (q31_t)0x5f968c70, (q31_t)0x5f925e90, (q31_t)0x5f8e3075, (q31_t)0x5f8a021f, (q31_t)0x5f85d38e, (q31_t)0x5f81a4c2,
+  (q31_t)0x5f7d75bb, (q31_t)0x5f794679, (q31_t)0x5f7516fd, (q31_t)0x5f70e745, (q31_t)0x5f6cb753, (q31_t)0x5f688726, (q31_t)0x5f6456be, (q31_t)0x5f60261b,
+  (q31_t)0x5f5bf53d, (q31_t)0x5f57c424, (q31_t)0x5f5392d1, (q31_t)0x5f4f6143, (q31_t)0x5f4b2f7a, (q31_t)0x5f46fd76, (q31_t)0x5f42cb37, (q31_t)0x5f3e98be,
+  (q31_t)0x5f3a660a, (q31_t)0x5f36331b, (q31_t)0x5f31fff1, (q31_t)0x5f2dcc8d, (q31_t)0x5f2998ee, (q31_t)0x5f256515, (q31_t)0x5f213100, (q31_t)0x5f1cfcb1,
+  (q31_t)0x5f18c827, (q31_t)0x5f149363, (q31_t)0x5f105e64, (q31_t)0x5f0c292a, (q31_t)0x5f07f3b6, (q31_t)0x5f03be07, (q31_t)0x5eff881d, (q31_t)0x5efb51f9,
+  (q31_t)0x5ef71b9b, (q31_t)0x5ef2e501, (q31_t)0x5eeeae2d, (q31_t)0x5eea771f, (q31_t)0x5ee63fd6, (q31_t)0x5ee20853, (q31_t)0x5eddd094, (q31_t)0x5ed9989c,
+  (q31_t)0x5ed56069, (q31_t)0x5ed127fb, (q31_t)0x5eccef53, (q31_t)0x5ec8b671, (q31_t)0x5ec47d54, (q31_t)0x5ec043fc, (q31_t)0x5ebc0a6a, (q31_t)0x5eb7d09e,
+  (q31_t)0x5eb39697, (q31_t)0x5eaf5c56, (q31_t)0x5eab21da, (q31_t)0x5ea6e724, (q31_t)0x5ea2ac34, (q31_t)0x5e9e7109, (q31_t)0x5e9a35a4, (q31_t)0x5e95fa05,
+  (q31_t)0x5e91be2b, (q31_t)0x5e8d8217, (q31_t)0x5e8945c8, (q31_t)0x5e85093f, (q31_t)0x5e80cc7c, (q31_t)0x5e7c8f7f, (q31_t)0x5e785247, (q31_t)0x5e7414d5,
+  (q31_t)0x5e6fd729, (q31_t)0x5e6b9943, (q31_t)0x5e675b22, (q31_t)0x5e631cc7, (q31_t)0x5e5ede32, (q31_t)0x5e5a9f62, (q31_t)0x5e566059, (q31_t)0x5e522115,
+  (q31_t)0x5e4de197, (q31_t)0x5e49a1df, (q31_t)0x5e4561ed, (q31_t)0x5e4121c0, (q31_t)0x5e3ce15a, (q31_t)0x5e38a0b9, (q31_t)0x5e345fde, (q31_t)0x5e301ec9,
+  (q31_t)0x5e2bdd7a, (q31_t)0x5e279bf1, (q31_t)0x5e235a2e, (q31_t)0x5e1f1830, (q31_t)0x5e1ad5f9, (q31_t)0x5e169388, (q31_t)0x5e1250dc, (q31_t)0x5e0e0df7,
+  (q31_t)0x5e09cad7, (q31_t)0x5e05877e, (q31_t)0x5e0143ea, (q31_t)0x5dfd001d, (q31_t)0x5df8bc15, (q31_t)0x5df477d4, (q31_t)0x5df03359, (q31_t)0x5debeea3,
+  (q31_t)0x5de7a9b4, (q31_t)0x5de3648b, (q31_t)0x5ddf1f28, (q31_t)0x5ddad98b, (q31_t)0x5dd693b4, (q31_t)0x5dd24da3, (q31_t)0x5dce0759, (q31_t)0x5dc9c0d4,
+  (q31_t)0x5dc57a16, (q31_t)0x5dc1331d, (q31_t)0x5dbcebeb, (q31_t)0x5db8a480, (q31_t)0x5db45cda, (q31_t)0x5db014fa, (q31_t)0x5dabcce1, (q31_t)0x5da7848e,
+  (q31_t)0x5da33c01, (q31_t)0x5d9ef33b, (q31_t)0x5d9aaa3a, (q31_t)0x5d966100, (q31_t)0x5d92178d, (q31_t)0x5d8dcddf, (q31_t)0x5d8983f8, (q31_t)0x5d8539d7,
+  (q31_t)0x5d80ef7c, (q31_t)0x5d7ca4e8, (q31_t)0x5d785a1a, (q31_t)0x5d740f12, (q31_t)0x5d6fc3d1, (q31_t)0x5d6b7856, (q31_t)0x5d672ca2, (q31_t)0x5d62e0b4,
+  (q31_t)0x5d5e948c, (q31_t)0x5d5a482a, (q31_t)0x5d55fb90, (q31_t)0x5d51aebb, (q31_t)0x5d4d61ad, (q31_t)0x5d491465, (q31_t)0x5d44c6e4, (q31_t)0x5d40792a,
+  (q31_t)0x5d3c2b35, (q31_t)0x5d37dd08, (q31_t)0x5d338ea0, (q31_t)0x5d2f4000, (q31_t)0x5d2af125, (q31_t)0x5d26a212, (q31_t)0x5d2252c5, (q31_t)0x5d1e033e,
+  (q31_t)0x5d19b37e, (q31_t)0x5d156385, (q31_t)0x5d111352, (q31_t)0x5d0cc2e5, (q31_t)0x5d087240, (q31_t)0x5d042161, (q31_t)0x5cffd048, (q31_t)0x5cfb7ef7,
+  (q31_t)0x5cf72d6b, (q31_t)0x5cf2dba7, (q31_t)0x5cee89a9, (q31_t)0x5cea3772, (q31_t)0x5ce5e501, (q31_t)0x5ce19258, (q31_t)0x5cdd3f75, (q31_t)0x5cd8ec58,
+  (q31_t)0x5cd49903, (q31_t)0x5cd04574, (q31_t)0x5ccbf1ab, (q31_t)0x5cc79daa, (q31_t)0x5cc3496f, (q31_t)0x5cbef4fc, (q31_t)0x5cbaa04f, (q31_t)0x5cb64b68,
+  (q31_t)0x5cb1f649, (q31_t)0x5cada0f0, (q31_t)0x5ca94b5e, (q31_t)0x5ca4f594, (q31_t)0x5ca09f8f, (q31_t)0x5c9c4952, (q31_t)0x5c97f2dc, (q31_t)0x5c939c2c,
+  (q31_t)0x5c8f4544, (q31_t)0x5c8aee22, (q31_t)0x5c8696c7, (q31_t)0x5c823f34, (q31_t)0x5c7de767, (q31_t)0x5c798f61, (q31_t)0x5c753722, (q31_t)0x5c70deaa,
+  (q31_t)0x5c6c85f9, (q31_t)0x5c682d0f, (q31_t)0x5c63d3eb, (q31_t)0x5c5f7a8f, (q31_t)0x5c5b20fa, (q31_t)0x5c56c72c, (q31_t)0x5c526d25, (q31_t)0x5c4e12e5,
+  (q31_t)0x5c49b86d, (q31_t)0x5c455dbb, (q31_t)0x5c4102d0, (q31_t)0x5c3ca7ad, (q31_t)0x5c384c50, (q31_t)0x5c33f0bb, (q31_t)0x5c2f94ec, (q31_t)0x5c2b38e5,
+  (q31_t)0x5c26dca5, (q31_t)0x5c22802c, (q31_t)0x5c1e237b, (q31_t)0x5c19c690, (q31_t)0x5c15696d, (q31_t)0x5c110c11, (q31_t)0x5c0cae7c, (q31_t)0x5c0850ae,
+  (q31_t)0x5c03f2a8, (q31_t)0x5bff9469, (q31_t)0x5bfb35f1, (q31_t)0x5bf6d740, (q31_t)0x5bf27857, (q31_t)0x5bee1935, (q31_t)0x5be9b9da, (q31_t)0x5be55a46,
+  (q31_t)0x5be0fa7a, (q31_t)0x5bdc9a75, (q31_t)0x5bd83a37, (q31_t)0x5bd3d9c1, (q31_t)0x5bcf7912, (q31_t)0x5bcb182b, (q31_t)0x5bc6b70b, (q31_t)0x5bc255b2,
+  (q31_t)0x5bbdf421, (q31_t)0x5bb99257, (q31_t)0x5bb53054, (q31_t)0x5bb0ce19, (q31_t)0x5bac6ba6, (q31_t)0x5ba808f9, (q31_t)0x5ba3a615, (q31_t)0x5b9f42f7,
+  (q31_t)0x5b9adfa2, (q31_t)0x5b967c13, (q31_t)0x5b92184d, (q31_t)0x5b8db44d, (q31_t)0x5b895016, (q31_t)0x5b84eba6, (q31_t)0x5b8086fd, (q31_t)0x5b7c221c,
+  (q31_t)0x5b77bd02, (q31_t)0x5b7357b0, (q31_t)0x5b6ef226, (q31_t)0x5b6a8c63, (q31_t)0x5b662668, (q31_t)0x5b61c035, (q31_t)0x5b5d59c9, (q31_t)0x5b58f324,
+  (q31_t)0x5b548c48, (q31_t)0x5b502533, (q31_t)0x5b4bbde6, (q31_t)0x5b475660, (q31_t)0x5b42eea2, (q31_t)0x5b3e86ac, (q31_t)0x5b3a1e7e, (q31_t)0x5b35b617,
+  (q31_t)0x5b314d78, (q31_t)0x5b2ce4a1, (q31_t)0x5b287b91, (q31_t)0x5b241249, (q31_t)0x5b1fa8c9, (q31_t)0x5b1b3f11, (q31_t)0x5b16d521, (q31_t)0x5b126af8,
+  (q31_t)0x5b0e0098, (q31_t)0x5b0995ff, (q31_t)0x5b052b2e, (q31_t)0x5b00c025, (q31_t)0x5afc54e3, (q31_t)0x5af7e96a, (q31_t)0x5af37db8, (q31_t)0x5aef11cf,
+  (q31_t)0x5aeaa5ad, (q31_t)0x5ae63953, (q31_t)0x5ae1ccc1, (q31_t)0x5add5ff7, (q31_t)0x5ad8f2f5, (q31_t)0x5ad485bb, (q31_t)0x5ad01849, (q31_t)0x5acbaa9f,
+  (q31_t)0x5ac73cbd, (q31_t)0x5ac2cea3, (q31_t)0x5abe6050, (q31_t)0x5ab9f1c6, (q31_t)0x5ab58304, (q31_t)0x5ab1140a, (q31_t)0x5aaca4d8, (q31_t)0x5aa8356f,
+  (q31_t)0x5aa3c5cd, (q31_t)0x5a9f55f3, (q31_t)0x5a9ae5e2, (q31_t)0x5a967598, (q31_t)0x5a920517, (q31_t)0x5a8d945d, (q31_t)0x5a89236c, (q31_t)0x5a84b243,
+  (q31_t)0x5a8040e3, (q31_t)0x5a7bcf4a, (q31_t)0x5a775d7a, (q31_t)0x5a72eb71, (q31_t)0x5a6e7931, (q31_t)0x5a6a06ba, (q31_t)0x5a65940a, (q31_t)0x5a612123,
+  (q31_t)0x5a5cae04, (q31_t)0x5a583aad, (q31_t)0x5a53c71e, (q31_t)0x5a4f5358, (q31_t)0x5a4adf5a, (q31_t)0x5a466b24, (q31_t)0x5a41f6b7, (q31_t)0x5a3d8212,
+  (q31_t)0x5a390d35, (q31_t)0x5a349821, (q31_t)0x5a3022d5, (q31_t)0x5a2bad51, (q31_t)0x5a273796, (q31_t)0x5a22c1a3, (q31_t)0x5a1e4b79, (q31_t)0x5a19d517,
+  (q31_t)0x5a155e7d, (q31_t)0x5a10e7ac, (q31_t)0x5a0c70a3, (q31_t)0x5a07f963, (q31_t)0x5a0381eb, (q31_t)0x59ff0a3c, (q31_t)0x59fa9255, (q31_t)0x59f61a36,
+  (q31_t)0x59f1a1e0, (q31_t)0x59ed2953, (q31_t)0x59e8b08e, (q31_t)0x59e43792, (q31_t)0x59dfbe5e, (q31_t)0x59db44f3, (q31_t)0x59d6cb50, (q31_t)0x59d25176,
+  (q31_t)0x59cdd765, (q31_t)0x59c95d1c, (q31_t)0x59c4e29c, (q31_t)0x59c067e4, (q31_t)0x59bbecf5, (q31_t)0x59b771cf, (q31_t)0x59b2f671, (q31_t)0x59ae7add,
+  (q31_t)0x59a9ff10, (q31_t)0x59a5830d, (q31_t)0x59a106d2, (q31_t)0x599c8a60, (q31_t)0x59980db6, (q31_t)0x599390d5, (q31_t)0x598f13bd, (q31_t)0x598a966e,
+  (q31_t)0x598618e8, (q31_t)0x59819b2a, (q31_t)0x597d1d35, (q31_t)0x59789f09, (q31_t)0x597420a6, (q31_t)0x596fa20b, (q31_t)0x596b233a, (q31_t)0x5966a431,
+  (q31_t)0x596224f1, (q31_t)0x595da57a, (q31_t)0x595925cc, (q31_t)0x5954a5e6, (q31_t)0x595025ca, (q31_t)0x594ba576, (q31_t)0x594724ec, (q31_t)0x5942a42a,
+  (q31_t)0x593e2331, (q31_t)0x5939a202, (q31_t)0x5935209b, (q31_t)0x59309efd, (q31_t)0x592c1d28, (q31_t)0x59279b1c, (q31_t)0x592318d9, (q31_t)0x591e9660,
+  (q31_t)0x591a13af, (q31_t)0x591590c7, (q31_t)0x59110da8, (q31_t)0x590c8a53, (q31_t)0x590806c6, (q31_t)0x59038302, (q31_t)0x58feff08, (q31_t)0x58fa7ad7,
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+  (q31_t)0x58d1cb76, (q31_t)0x58cd4520, (q31_t)0x58c8be94, (q31_t)0x58c437d1, (q31_t)0x58bfb0d7, (q31_t)0x58bb29a6, (q31_t)0x58b6a23e, (q31_t)0x58b21aa0,
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+  (q31_t)0x581c2798, (q31_t)0x581798bb, (q31_t)0x581309a9, (q31_t)0x580e7a60, (q31_t)0x5809eae1, (q31_t)0x58055b2b, (q31_t)0x5800cb3f, (q31_t)0x57fc3b1d,
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+  (q31_t)0x57653009, (q31_t)0x576098b7, (q31_t)0x575c0130, (q31_t)0x57576973, (q31_t)0x5752d180, (q31_t)0x574e3957, (q31_t)0x5749a0f9, (q31_t)0x57450864,
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+  (q31_t)0x571ba1b7, (q31_t)0x57170708, (q31_t)0x57126c24, (q31_t)0x570dd10a, (q31_t)0x570935bb, (q31_t)0x57049a36, (q31_t)0x56fffe7b, (q31_t)0x56fb628b,
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+  (q31_t)0x56d1dda9, (q31_t)0x56cd3fa1, (q31_t)0x56c8a162, (q31_t)0x56c402ef, (q31_t)0x56bf6446, (q31_t)0x56bac567, (q31_t)0x56b62653, (q31_t)0x56b18709,
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+  (q31_t)0x563db512, (q31_t)0x5639105d, (q31_t)0x56346b74, (q31_t)0x562fc655, (q31_t)0x562b2101, (q31_t)0x56267b78, (q31_t)0x5621d5ba, (q31_t)0x561d2fc6,
+  (q31_t)0x5618899e, (q31_t)0x5613e340, (q31_t)0x560f3cae, (q31_t)0x560a95e6, (q31_t)0x5605eee9, (q31_t)0x560147b7, (q31_t)0x55fca050, (q31_t)0x55f7f8b4,
+  (q31_t)0x55f350e3, (q31_t)0x55eea8dd, (q31_t)0x55ea00a2, (q31_t)0x55e55832, (q31_t)0x55e0af8d, (q31_t)0x55dc06b3, (q31_t)0x55d75da4, (q31_t)0x55d2b460,
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+  (q31_t)0x55a8b7b0, (q31_t)0x55a40c5b, (q31_t)0x559f60d1, (q31_t)0x559ab513, (q31_t)0x55960920, (q31_t)0x55915cf8, (q31_t)0x558cb09b, (q31_t)0x55880409,
+  (q31_t)0x55835743, (q31_t)0x557eaa48, (q31_t)0x5579fd18, (q31_t)0x55754fb3, (q31_t)0x5570a21a, (q31_t)0x556bf44c, (q31_t)0x55674649, (q31_t)0x55629812,
+  (q31_t)0x555de9a6, (q31_t)0x55593b05, (q31_t)0x55548c30, (q31_t)0x554fdd26, (q31_t)0x554b2de7, (q31_t)0x55467e74, (q31_t)0x5541cecc, (q31_t)0x553d1ef0,
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+  (q31_t)0x54c7afc6, (q31_t)0x54c2fa96, (q31_t)0x54be4532, (q31_t)0x54b98f9a, (q31_t)0x54b4d9cd, (q31_t)0x54b023cc, (q31_t)0x54ab6d97, (q31_t)0x54a6b72e,
+  (q31_t)0x54a20090, (q31_t)0x549d49bf, (q31_t)0x549892b9, (q31_t)0x5493db7f, (q31_t)0x548f2410, (q31_t)0x548a6c6e, (q31_t)0x5485b497, (q31_t)0x5480fc8c,
+  (q31_t)0x547c444d, (q31_t)0x54778bda, (q31_t)0x5472d333, (q31_t)0x546e1a58, (q31_t)0x54696149, (q31_t)0x5464a805, (q31_t)0x545fee8e, (q31_t)0x545b34e3,
+  (q31_t)0x54567b03, (q31_t)0x5451c0f0, (q31_t)0x544d06a8, (q31_t)0x54484c2d, (q31_t)0x5443917d, (q31_t)0x543ed699, (q31_t)0x543a1b82, (q31_t)0x54356037,
+  (q31_t)0x5430a4b7, (q31_t)0x542be904, (q31_t)0x54272d1d, (q31_t)0x54227102, (q31_t)0x541db4b3, (q31_t)0x5418f830, (q31_t)0x54143b79, (q31_t)0x540f7e8e,
+  (q31_t)0x540ac170, (q31_t)0x5406041d, (q31_t)0x54014697, (q31_t)0x53fc88dd, (q31_t)0x53f7caef, (q31_t)0x53f30cce, (q31_t)0x53ee4e78, (q31_t)0x53e98fef,
+  (q31_t)0x53e4d132, (q31_t)0x53e01242, (q31_t)0x53db531d, (q31_t)0x53d693c5, (q31_t)0x53d1d439, (q31_t)0x53cd147a, (q31_t)0x53c85486, (q31_t)0x53c3945f,
+  (q31_t)0x53bed405, (q31_t)0x53ba1377, (q31_t)0x53b552b5, (q31_t)0x53b091bf, (q31_t)0x53abd096, (q31_t)0x53a70f39, (q31_t)0x53a24da9, (q31_t)0x539d8be5,
+  (q31_t)0x5398c9ed, (q31_t)0x539407c2, (q31_t)0x538f4564, (q31_t)0x538a82d1, (q31_t)0x5385c00c, (q31_t)0x5380fd12, (q31_t)0x537c39e6, (q31_t)0x53777685,
+  (q31_t)0x5372b2f2, (q31_t)0x536def2a, (q31_t)0x53692b30, (q31_t)0x53646701, (q31_t)0x535fa2a0, (q31_t)0x535ade0b, (q31_t)0x53561942, (q31_t)0x53515447,
+  (q31_t)0x534c8f17, (q31_t)0x5347c9b5, (q31_t)0x5343041f, (q31_t)0x533e3e55, (q31_t)0x53397859, (q31_t)0x5334b229, (q31_t)0x532febc5, (q31_t)0x532b252f,
+  (q31_t)0x53265e65, (q31_t)0x53219767, (q31_t)0x531cd037, (q31_t)0x531808d3, (q31_t)0x5313413c, (q31_t)0x530e7972, (q31_t)0x5309b174, (q31_t)0x5304e943,
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+  (q31_t)0x52d9d68d, (q31_t)0x52d50c5d, (q31_t)0x52d041f9, (q31_t)0x52cb7763, (q31_t)0x52c6ac99, (q31_t)0x52c1e19d, (q31_t)0x52bd166d, (q31_t)0x52b84b0a,
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+  (q31_t)0x528d1b9b, (q31_t)0x52884e3a, (q31_t)0x528380a7, (q31_t)0x527eb2e0, (q31_t)0x5279e4e7, (q31_t)0x527516bb, (q31_t)0x5270485c, (q31_t)0x526b79ca,
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+  (q31_t)0x52402dbc, (q31_t)0x523b5d2e, (q31_t)0x52368c6e, (q31_t)0x5231bb7b, (q31_t)0x522cea55, (q31_t)0x522818fc, (q31_t)0x52234771, (q31_t)0x521e75b3,
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+  (q31_t)0x51f30d21, (q31_t)0x51ee3969, (q31_t)0x51e9657e, (q31_t)0x51e49162, (q31_t)0x51dfbd12, (q31_t)0x51dae890, (q31_t)0x51d613dc, (q31_t)0x51d13ef5,
+  (q31_t)0x51cc69db, (q31_t)0x51c79490, (q31_t)0x51c2bf11, (q31_t)0x51bde960, (q31_t)0x51b9137d, (q31_t)0x51b43d68, (q31_t)0x51af6720, (q31_t)0x51aa90a5,
+  (q31_t)0x51a5b9f9, (q31_t)0x51a0e31a, (q31_t)0x519c0c08, (q31_t)0x519734c4, (q31_t)0x51925d4e, (q31_t)0x518d85a6, (q31_t)0x5188adcb, (q31_t)0x5183d5be,
+  (q31_t)0x517efd7f, (q31_t)0x517a250d, (q31_t)0x51754c69, (q31_t)0x51707393, (q31_t)0x516b9a8b, (q31_t)0x5166c150, (q31_t)0x5161e7e4, (q31_t)0x515d0e45,
+  (q31_t)0x51583473, (q31_t)0x51535a70, (q31_t)0x514e803b, (q31_t)0x5149a5d3, (q31_t)0x5144cb39, (q31_t)0x513ff06d, (q31_t)0x513b156f, (q31_t)0x51363a3f,
+  (q31_t)0x51315edd, (q31_t)0x512c8348, (q31_t)0x5127a782, (q31_t)0x5122cb8a, (q31_t)0x511def5f, (q31_t)0x51191302, (q31_t)0x51143674, (q31_t)0x510f59b3,
+  (q31_t)0x510a7cc1, (q31_t)0x51059f9c, (q31_t)0x5100c246, (q31_t)0x50fbe4bd, (q31_t)0x50f70703, (q31_t)0x50f22916, (q31_t)0x50ed4af8, (q31_t)0x50e86ca8,
+  (q31_t)0x50e38e25, (q31_t)0x50deaf71, (q31_t)0x50d9d08b, (q31_t)0x50d4f173, (q31_t)0x50d0122a, (q31_t)0x50cb32ae, (q31_t)0x50c65301, (q31_t)0x50c17322,
+  (q31_t)0x50bc9311, (q31_t)0x50b7b2ce, (q31_t)0x50b2d259, (q31_t)0x50adf1b3, (q31_t)0x50a910db, (q31_t)0x50a42fd1, (q31_t)0x509f4e95, (q31_t)0x509a6d28,
+  (q31_t)0x50958b88, (q31_t)0x5090a9b8, (q31_t)0x508bc7b5, (q31_t)0x5086e581, (q31_t)0x5082031b, (q31_t)0x507d2083, (q31_t)0x50783dba, (q31_t)0x50735abf,
+  (q31_t)0x506e7793, (q31_t)0x50699435, (q31_t)0x5064b0a5, (q31_t)0x505fcce4, (q31_t)0x505ae8f1, (q31_t)0x505604cd, (q31_t)0x50512077, (q31_t)0x504c3bef,
+  (q31_t)0x50475736, (q31_t)0x5042724c, (q31_t)0x503d8d30, (q31_t)0x5038a7e2, (q31_t)0x5033c263, (q31_t)0x502edcb2, (q31_t)0x5029f6d1, (q31_t)0x502510bd,
+  (q31_t)0x50202a78, (q31_t)0x501b4402, (q31_t)0x50165d5a, (q31_t)0x50117681, (q31_t)0x500c8f77, (q31_t)0x5007a83b, (q31_t)0x5002c0cd, (q31_t)0x4ffdd92f,
+  (q31_t)0x4ff8f15f, (q31_t)0x4ff4095e, (q31_t)0x4fef212b, (q31_t)0x4fea38c7, (q31_t)0x4fe55032, (q31_t)0x4fe0676c, (q31_t)0x4fdb7e74, (q31_t)0x4fd6954b,
+  (q31_t)0x4fd1abf0, (q31_t)0x4fccc265, (q31_t)0x4fc7d8a8, (q31_t)0x4fc2eeba, (q31_t)0x4fbe049b, (q31_t)0x4fb91a4b, (q31_t)0x4fb42fc9, (q31_t)0x4faf4517,
+  (q31_t)0x4faa5a33, (q31_t)0x4fa56f1e, (q31_t)0x4fa083d8, (q31_t)0x4f9b9861, (q31_t)0x4f96acb8, (q31_t)0x4f91c0df, (q31_t)0x4f8cd4d4, (q31_t)0x4f87e899,
+  (q31_t)0x4f82fc2c, (q31_t)0x4f7e0f8f, (q31_t)0x4f7922c0, (q31_t)0x4f7435c0, (q31_t)0x4f6f488f, (q31_t)0x4f6a5b2e, (q31_t)0x4f656d9b, (q31_t)0x4f607fd7,
+  (q31_t)0x4f5b91e3, (q31_t)0x4f56a3bd, (q31_t)0x4f51b566, (q31_t)0x4f4cc6df, (q31_t)0x4f47d827, (q31_t)0x4f42e93d, (q31_t)0x4f3dfa23, (q31_t)0x4f390ad8,
+  (q31_t)0x4f341b5c, (q31_t)0x4f2f2baf, (q31_t)0x4f2a3bd2, (q31_t)0x4f254bc3, (q31_t)0x4f205b84, (q31_t)0x4f1b6b14, (q31_t)0x4f167a73, (q31_t)0x4f1189a1,
+  (q31_t)0x4f0c989f, (q31_t)0x4f07a76b, (q31_t)0x4f02b608, (q31_t)0x4efdc473, (q31_t)0x4ef8d2ad, (q31_t)0x4ef3e0b7, (q31_t)0x4eeeee90, (q31_t)0x4ee9fc39,
+  (q31_t)0x4ee509b1, (q31_t)0x4ee016f8, (q31_t)0x4edb240e, (q31_t)0x4ed630f4, (q31_t)0x4ed13da9, (q31_t)0x4ecc4a2e, (q31_t)0x4ec75682, (q31_t)0x4ec262a5,
+  (q31_t)0x4ebd6e98, (q31_t)0x4eb87a5a, (q31_t)0x4eb385ec, (q31_t)0x4eae914d, (q31_t)0x4ea99c7d, (q31_t)0x4ea4a77d, (q31_t)0x4e9fb24d, (q31_t)0x4e9abcec,
+  (q31_t)0x4e95c75b, (q31_t)0x4e90d199, (q31_t)0x4e8bdba6, (q31_t)0x4e86e583, (q31_t)0x4e81ef30, (q31_t)0x4e7cf8ac, (q31_t)0x4e7801f8, (q31_t)0x4e730b14,
+  (q31_t)0x4e6e13ff, (q31_t)0x4e691cba, (q31_t)0x4e642544, (q31_t)0x4e5f2d9e, (q31_t)0x4e5a35c7, (q31_t)0x4e553dc1, (q31_t)0x4e50458a, (q31_t)0x4e4b4d22,
+  (q31_t)0x4e46548b, (q31_t)0x4e415bc3, (q31_t)0x4e3c62cb, (q31_t)0x4e3769a2, (q31_t)0x4e32704a, (q31_t)0x4e2d76c1, (q31_t)0x4e287d08, (q31_t)0x4e23831e,
+  (q31_t)0x4e1e8905, (q31_t)0x4e198ebb, (q31_t)0x4e149441, (q31_t)0x4e0f9997, (q31_t)0x4e0a9ebd, (q31_t)0x4e05a3b2, (q31_t)0x4e00a878, (q31_t)0x4dfbad0d,
+  (q31_t)0x4df6b173, (q31_t)0x4df1b5a8, (q31_t)0x4decb9ad, (q31_t)0x4de7bd82, (q31_t)0x4de2c127, (q31_t)0x4dddc49c, (q31_t)0x4dd8c7e1, (q31_t)0x4dd3caf6,
+  (q31_t)0x4dcecdda, (q31_t)0x4dc9d08f, (q31_t)0x4dc4d314, (q31_t)0x4dbfd569, (q31_t)0x4dbad78e, (q31_t)0x4db5d983, (q31_t)0x4db0db48, (q31_t)0x4dabdcdd,
+  (q31_t)0x4da6de43, (q31_t)0x4da1df78, (q31_t)0x4d9ce07d, (q31_t)0x4d97e153, (q31_t)0x4d92e1f9, (q31_t)0x4d8de26f, (q31_t)0x4d88e2b5, (q31_t)0x4d83e2cb,
+  (q31_t)0x4d7ee2b1, (q31_t)0x4d79e268, (q31_t)0x4d74e1ef, (q31_t)0x4d6fe146, (q31_t)0x4d6ae06d, (q31_t)0x4d65df64, (q31_t)0x4d60de2c, (q31_t)0x4d5bdcc4,
+  (q31_t)0x4d56db2d, (q31_t)0x4d51d965, (q31_t)0x4d4cd76e, (q31_t)0x4d47d547, (q31_t)0x4d42d2f1, (q31_t)0x4d3dd06b, (q31_t)0x4d38cdb5, (q31_t)0x4d33cad0,
+  (q31_t)0x4d2ec7bb, (q31_t)0x4d29c476, (q31_t)0x4d24c102, (q31_t)0x4d1fbd5e, (q31_t)0x4d1ab98b, (q31_t)0x4d15b588, (q31_t)0x4d10b155, (q31_t)0x4d0bacf3,
+  (q31_t)0x4d06a862, (q31_t)0x4d01a3a0, (q31_t)0x4cfc9eb0, (q31_t)0x4cf79990, (q31_t)0x4cf29440, (q31_t)0x4ced8ec1, (q31_t)0x4ce88913, (q31_t)0x4ce38335,
+  (q31_t)0x4cde7d28, (q31_t)0x4cd976eb, (q31_t)0x4cd4707f, (q31_t)0x4ccf69e3, (q31_t)0x4cca6318, (q31_t)0x4cc55c1e, (q31_t)0x4cc054f4, (q31_t)0x4cbb4d9b,
+  (q31_t)0x4cb64613, (q31_t)0x4cb13e5b, (q31_t)0x4cac3674, (q31_t)0x4ca72e5e, (q31_t)0x4ca22619, (q31_t)0x4c9d1da4, (q31_t)0x4c981500, (q31_t)0x4c930c2d,
+  (q31_t)0x4c8e032a, (q31_t)0x4c88f9f8, (q31_t)0x4c83f097, (q31_t)0x4c7ee707, (q31_t)0x4c79dd48, (q31_t)0x4c74d359, (q31_t)0x4c6fc93b, (q31_t)0x4c6abeef,
+  (q31_t)0x4c65b473, (q31_t)0x4c60a9c8, (q31_t)0x4c5b9eed, (q31_t)0x4c5693e4, (q31_t)0x4c5188ac, (q31_t)0x4c4c7d44, (q31_t)0x4c4771ae, (q31_t)0x4c4265e8,
+  (q31_t)0x4c3d59f3, (q31_t)0x4c384dd0, (q31_t)0x4c33417d, (q31_t)0x4c2e34fb, (q31_t)0x4c29284b, (q31_t)0x4c241b6b, (q31_t)0x4c1f0e5c, (q31_t)0x4c1a011f,
+  (q31_t)0x4c14f3b2, (q31_t)0x4c0fe617, (q31_t)0x4c0ad84c, (q31_t)0x4c05ca53, (q31_t)0x4c00bc2b, (q31_t)0x4bfbadd4, (q31_t)0x4bf69f4e, (q31_t)0x4bf19099,
+  (q31_t)0x4bec81b5, (q31_t)0x4be772a3, (q31_t)0x4be26362, (q31_t)0x4bdd53f2, (q31_t)0x4bd84453, (q31_t)0x4bd33485, (q31_t)0x4bce2488, (q31_t)0x4bc9145d,
+  (q31_t)0x4bc40403, (q31_t)0x4bbef37b, (q31_t)0x4bb9e2c3, (q31_t)0x4bb4d1dd, (q31_t)0x4bafc0c8, (q31_t)0x4baaaf85, (q31_t)0x4ba59e12, (q31_t)0x4ba08c72,
+  (q31_t)0x4b9b7aa2, (q31_t)0x4b9668a4, (q31_t)0x4b915677, (q31_t)0x4b8c441c, (q31_t)0x4b873192, (q31_t)0x4b821ed9, (q31_t)0x4b7d0bf2, (q31_t)0x4b77f8dc,
+  (q31_t)0x4b72e598, (q31_t)0x4b6dd225, (q31_t)0x4b68be84, (q31_t)0x4b63aab4, (q31_t)0x4b5e96b6, (q31_t)0x4b598289, (q31_t)0x4b546e2d, (q31_t)0x4b4f59a4,
+  (q31_t)0x4b4a44eb, (q31_t)0x4b453005, (q31_t)0x4b401aef, (q31_t)0x4b3b05ac, (q31_t)0x4b35f03a, (q31_t)0x4b30da9a, (q31_t)0x4b2bc4cb, (q31_t)0x4b26aece,
+  (q31_t)0x4b2198a2, (q31_t)0x4b1c8248, (q31_t)0x4b176bc0, (q31_t)0x4b12550a, (q31_t)0x4b0d3e25, (q31_t)0x4b082712, (q31_t)0x4b030fd1, (q31_t)0x4afdf861,
+  (q31_t)0x4af8e0c3, (q31_t)0x4af3c8f7, (q31_t)0x4aeeb0fd, (q31_t)0x4ae998d4, (q31_t)0x4ae4807d, (q31_t)0x4adf67f8, (q31_t)0x4ada4f45, (q31_t)0x4ad53664,
+  (q31_t)0x4ad01d54, (q31_t)0x4acb0417, (q31_t)0x4ac5eaab, (q31_t)0x4ac0d111, (q31_t)0x4abbb749, (q31_t)0x4ab69d53, (q31_t)0x4ab1832f, (q31_t)0x4aac68dc,
+  (q31_t)0x4aa74e5c, (q31_t)0x4aa233ae, (q31_t)0x4a9d18d1, (q31_t)0x4a97fdc7, (q31_t)0x4a92e28e, (q31_t)0x4a8dc728, (q31_t)0x4a88ab93, (q31_t)0x4a838fd1,
+  (q31_t)0x4a7e73e0, (q31_t)0x4a7957c2, (q31_t)0x4a743b76, (q31_t)0x4a6f1efc, (q31_t)0x4a6a0253, (q31_t)0x4a64e57d, (q31_t)0x4a5fc879, (q31_t)0x4a5aab48,
+  (q31_t)0x4a558de8, (q31_t)0x4a50705a, (q31_t)0x4a4b529f, (q31_t)0x4a4634b6, (q31_t)0x4a41169f, (q31_t)0x4a3bf85a, (q31_t)0x4a36d9e7, (q31_t)0x4a31bb47,
+  (q31_t)0x4a2c9c79, (q31_t)0x4a277d7d, (q31_t)0x4a225e53, (q31_t)0x4a1d3efc, (q31_t)0x4a181f77, (q31_t)0x4a12ffc4, (q31_t)0x4a0ddfe4, (q31_t)0x4a08bfd5,
+  (q31_t)0x4a039f9a, (q31_t)0x49fe7f30, (q31_t)0x49f95e99, (q31_t)0x49f43dd4, (q31_t)0x49ef1ce2, (q31_t)0x49e9fbc2, (q31_t)0x49e4da74, (q31_t)0x49dfb8f9,
+  (q31_t)0x49da9750, (q31_t)0x49d5757a, (q31_t)0x49d05376, (q31_t)0x49cb3145, (q31_t)0x49c60ee6, (q31_t)0x49c0ec59, (q31_t)0x49bbc9a0, (q31_t)0x49b6a6b8,
+  (q31_t)0x49b183a3, (q31_t)0x49ac6061, (q31_t)0x49a73cf1, (q31_t)0x49a21954, (q31_t)0x499cf589, (q31_t)0x4997d191, (q31_t)0x4992ad6c, (q31_t)0x498d8919,
+  (q31_t)0x49886499, (q31_t)0x49833fec, (q31_t)0x497e1b11, (q31_t)0x4978f609, (q31_t)0x4973d0d3, (q31_t)0x496eab70, (q31_t)0x496985e0, (q31_t)0x49646023,
+  (q31_t)0x495f3a38, (q31_t)0x495a1420, (q31_t)0x4954eddb, (q31_t)0x494fc768, (q31_t)0x494aa0c9, (q31_t)0x494579fc, (q31_t)0x49405302, (q31_t)0x493b2bdb,
+  (q31_t)0x49360486, (q31_t)0x4930dd05, (q31_t)0x492bb556, (q31_t)0x49268d7a, (q31_t)0x49216571, (q31_t)0x491c3d3b, (q31_t)0x491714d8, (q31_t)0x4911ec47,
+  (q31_t)0x490cc38a, (q31_t)0x49079aa0, (q31_t)0x49027188, (q31_t)0x48fd4844, (q31_t)0x48f81ed2, (q31_t)0x48f2f534, (q31_t)0x48edcb68, (q31_t)0x48e8a170,
+  (q31_t)0x48e3774a, (q31_t)0x48de4cf8, (q31_t)0x48d92278, (q31_t)0x48d3f7cc, (q31_t)0x48ceccf3, (q31_t)0x48c9a1ed, (q31_t)0x48c476b9, (q31_t)0x48bf4b59,
+  (q31_t)0x48ba1fcd, (q31_t)0x48b4f413, (q31_t)0x48afc82c, (q31_t)0x48aa9c19, (q31_t)0x48a56fd9, (q31_t)0x48a0436c, (q31_t)0x489b16d2, (q31_t)0x4895ea0b,
+  (q31_t)0x4890bd18, (q31_t)0x488b8ff8, (q31_t)0x488662ab, (q31_t)0x48813531, (q31_t)0x487c078b, (q31_t)0x4876d9b8, (q31_t)0x4871abb8, (q31_t)0x486c7d8c,
+  (q31_t)0x48674f33, (q31_t)0x486220ad, (q31_t)0x485cf1fa, (q31_t)0x4857c31b, (q31_t)0x48529410, (q31_t)0x484d64d7, (q31_t)0x48483572, (q31_t)0x484305e1,
+  (q31_t)0x483dd623, (q31_t)0x4838a638, (q31_t)0x48337621, (q31_t)0x482e45dd, (q31_t)0x4829156d, (q31_t)0x4823e4d0, (q31_t)0x481eb407, (q31_t)0x48198311,
+  (q31_t)0x481451ef, (q31_t)0x480f20a0, (q31_t)0x4809ef25, (q31_t)0x4804bd7e, (q31_t)0x47ff8baa, (q31_t)0x47fa59a9, (q31_t)0x47f5277d, (q31_t)0x47eff523,
+  (q31_t)0x47eac29e, (q31_t)0x47e58fec, (q31_t)0x47e05d0e, (q31_t)0x47db2a03, (q31_t)0x47d5f6cc, (q31_t)0x47d0c369, (q31_t)0x47cb8fd9, (q31_t)0x47c65c1d,
+  (q31_t)0x47c12835, (q31_t)0x47bbf421, (q31_t)0x47b6bfe0, (q31_t)0x47b18b74, (q31_t)0x47ac56da, (q31_t)0x47a72215, (q31_t)0x47a1ed24, (q31_t)0x479cb806,
+  (q31_t)0x479782bc, (q31_t)0x47924d46, (q31_t)0x478d17a4, (q31_t)0x4787e1d6, (q31_t)0x4782abdb, (q31_t)0x477d75b5, (q31_t)0x47783f62, (q31_t)0x477308e3,
+  (q31_t)0x476dd239, (q31_t)0x47689b62, (q31_t)0x4763645f, (q31_t)0x475e2d30, (q31_t)0x4758f5d5, (q31_t)0x4753be4e, (q31_t)0x474e869b, (q31_t)0x47494ebc,
+  (q31_t)0x474416b1, (q31_t)0x473ede7a, (q31_t)0x4739a617, (q31_t)0x47346d89, (q31_t)0x472f34ce, (q31_t)0x4729fbe7, (q31_t)0x4724c2d5, (q31_t)0x471f8996,
+  (q31_t)0x471a502c, (q31_t)0x47151696, (q31_t)0x470fdcd4, (q31_t)0x470aa2e6, (q31_t)0x470568cd, (q31_t)0x47002e87, (q31_t)0x46faf416, (q31_t)0x46f5b979,
+  (q31_t)0x46f07eb0, (q31_t)0x46eb43bc, (q31_t)0x46e6089b, (q31_t)0x46e0cd4f, (q31_t)0x46db91d8, (q31_t)0x46d65634, (q31_t)0x46d11a65, (q31_t)0x46cbde6a,
+  (q31_t)0x46c6a244, (q31_t)0x46c165f1, (q31_t)0x46bc2974, (q31_t)0x46b6ecca, (q31_t)0x46b1aff5, (q31_t)0x46ac72f4, (q31_t)0x46a735c8, (q31_t)0x46a1f870,
+  (q31_t)0x469cbaed, (q31_t)0x46977d3e, (q31_t)0x46923f63, (q31_t)0x468d015d, (q31_t)0x4687c32c, (q31_t)0x468284cf, (q31_t)0x467d4646, (q31_t)0x46780792,
+  (q31_t)0x4672c8b3, (q31_t)0x466d89a8, (q31_t)0x46684a71, (q31_t)0x46630b0f, (q31_t)0x465dcb82, (q31_t)0x46588bc9, (q31_t)0x46534be5, (q31_t)0x464e0bd6,
+  (q31_t)0x4648cb9b, (q31_t)0x46438b35, (q31_t)0x463e4aa3, (q31_t)0x463909e7, (q31_t)0x4633c8fe, (q31_t)0x462e87eb, (q31_t)0x462946ac, (q31_t)0x46240542,
+  (q31_t)0x461ec3ad, (q31_t)0x461981ec, (q31_t)0x46144001, (q31_t)0x460efde9, (q31_t)0x4609bba7, (q31_t)0x4604793a, (q31_t)0x45ff36a1, (q31_t)0x45f9f3dd,
+  (q31_t)0x45f4b0ee, (q31_t)0x45ef6dd4, (q31_t)0x45ea2a8f, (q31_t)0x45e4e71f, (q31_t)0x45dfa383, (q31_t)0x45da5fbc, (q31_t)0x45d51bcb, (q31_t)0x45cfd7ae,
+  (q31_t)0x45ca9366, (q31_t)0x45c54ef3, (q31_t)0x45c00a55, (q31_t)0x45bac58c, (q31_t)0x45b58098, (q31_t)0x45b03b79, (q31_t)0x45aaf630, (q31_t)0x45a5b0bb,
+  (q31_t)0x45a06b1b, (q31_t)0x459b2550, (q31_t)0x4595df5a, (q31_t)0x45909939, (q31_t)0x458b52ee, (q31_t)0x45860c77, (q31_t)0x4580c5d6, (q31_t)0x457b7f0a,
+  (q31_t)0x45763813, (q31_t)0x4570f0f1, (q31_t)0x456ba9a4, (q31_t)0x4566622c, (q31_t)0x45611a8a, (q31_t)0x455bd2bc, (q31_t)0x45568ac4, (q31_t)0x455142a2,
+  (q31_t)0x454bfa54, (q31_t)0x4546b1dc, (q31_t)0x45416939, (q31_t)0x453c206b, (q31_t)0x4536d773, (q31_t)0x45318e4f, (q31_t)0x452c4502, (q31_t)0x4526fb89,
+  (q31_t)0x4521b1e6, (q31_t)0x451c6818, (q31_t)0x45171e20, (q31_t)0x4511d3fd, (q31_t)0x450c89af, (q31_t)0x45073f37, (q31_t)0x4501f494, (q31_t)0x44fca9c6,
+  (q31_t)0x44f75ecf, (q31_t)0x44f213ac, (q31_t)0x44ecc85f, (q31_t)0x44e77ce7, (q31_t)0x44e23145, (q31_t)0x44dce579, (q31_t)0x44d79982, (q31_t)0x44d24d60,
+  (q31_t)0x44cd0114, (q31_t)0x44c7b49e, (q31_t)0x44c267fd, (q31_t)0x44bd1b32, (q31_t)0x44b7ce3c, (q31_t)0x44b2811c, (q31_t)0x44ad33d2, (q31_t)0x44a7e65d,
+  (q31_t)0x44a298be, (q31_t)0x449d4af5, (q31_t)0x4497fd01, (q31_t)0x4492aee3, (q31_t)0x448d609b, (q31_t)0x44881228, (q31_t)0x4482c38b, (q31_t)0x447d74c4,
+  (q31_t)0x447825d2, (q31_t)0x4472d6b7, (q31_t)0x446d8771, (q31_t)0x44683801, (q31_t)0x4462e866, (q31_t)0x445d98a2, (q31_t)0x445848b3, (q31_t)0x4452f89b,
+  (q31_t)0x444da858, (q31_t)0x444857ea, (q31_t)0x44430753, (q31_t)0x443db692, (q31_t)0x443865a7, (q31_t)0x44331491, (q31_t)0x442dc351, (q31_t)0x442871e8,
+  (q31_t)0x44232054, (q31_t)0x441dce96, (q31_t)0x44187caf, (q31_t)0x44132a9d, (q31_t)0x440dd861, (q31_t)0x440885fc, (q31_t)0x4403336c, (q31_t)0x43fde0b2,
+  (q31_t)0x43f88dcf, (q31_t)0x43f33ac1, (q31_t)0x43ede78a, (q31_t)0x43e89429, (q31_t)0x43e3409d, (q31_t)0x43ddece8, (q31_t)0x43d8990a, (q31_t)0x43d34501,
+  (q31_t)0x43cdf0ce, (q31_t)0x43c89c72, (q31_t)0x43c347eb, (q31_t)0x43bdf33b, (q31_t)0x43b89e62, (q31_t)0x43b3495e, (q31_t)0x43adf431, (q31_t)0x43a89ed9,
+  (q31_t)0x43a34959, (q31_t)0x439df3ae, (q31_t)0x43989dda, (q31_t)0x439347dc, (q31_t)0x438df1b4, (q31_t)0x43889b63, (q31_t)0x438344e8, (q31_t)0x437dee43,
+  (q31_t)0x43789775, (q31_t)0x4373407d, (q31_t)0x436de95b, (q31_t)0x43689210, (q31_t)0x43633a9c, (q31_t)0x435de2fd, (q31_t)0x43588b36, (q31_t)0x43533344,
+  (q31_t)0x434ddb29, (q31_t)0x434882e5, (q31_t)0x43432a77, (q31_t)0x433dd1e0, (q31_t)0x4338791f, (q31_t)0x43332035, (q31_t)0x432dc721, (q31_t)0x43286de4,
+  (q31_t)0x4323147d, (q31_t)0x431dbaed, (q31_t)0x43186133, (q31_t)0x43130751, (q31_t)0x430dad44, (q31_t)0x4308530f, (q31_t)0x4302f8b0, (q31_t)0x42fd9e28,
+  (q31_t)0x42f84376, (q31_t)0x42f2e89b, (q31_t)0x42ed8d97, (q31_t)0x42e83269, (q31_t)0x42e2d713, (q31_t)0x42dd7b93, (q31_t)0x42d81fe9, (q31_t)0x42d2c417,
+  (q31_t)0x42cd681b, (q31_t)0x42c80bf6, (q31_t)0x42c2afa8, (q31_t)0x42bd5331, (q31_t)0x42b7f690, (q31_t)0x42b299c7, (q31_t)0x42ad3cd4, (q31_t)0x42a7dfb8,
+  (q31_t)0x42a28273, (q31_t)0x429d2505, (q31_t)0x4297c76e, (q31_t)0x429269ae, (q31_t)0x428d0bc4, (q31_t)0x4287adb2, (q31_t)0x42824f76, (q31_t)0x427cf112,
+  (q31_t)0x42779285, (q31_t)0x427233ce, (q31_t)0x426cd4ef, (q31_t)0x426775e6, (q31_t)0x426216b5, (q31_t)0x425cb75a, (q31_t)0x425757d7, (q31_t)0x4251f82b,
+  (q31_t)0x424c9856, (q31_t)0x42473858, (q31_t)0x4241d831, (q31_t)0x423c77e1, (q31_t)0x42371769, (q31_t)0x4231b6c7, (q31_t)0x422c55fd, (q31_t)0x4226f50a,
+  (q31_t)0x422193ee, (q31_t)0x421c32a9, (q31_t)0x4216d13c, (q31_t)0x42116fa5, (q31_t)0x420c0de6, (q31_t)0x4206abfe, (q31_t)0x420149ee, (q31_t)0x41fbe7b5,
+  (q31_t)0x41f68553, (q31_t)0x41f122c8, (q31_t)0x41ebc015, (q31_t)0x41e65d39, (q31_t)0x41e0fa35, (q31_t)0x41db9707, (q31_t)0x41d633b1, (q31_t)0x41d0d033,
+  (q31_t)0x41cb6c8c, (q31_t)0x41c608bc, (q31_t)0x41c0a4c4, (q31_t)0x41bb40a3, (q31_t)0x41b5dc5a, (q31_t)0x41b077e8, (q31_t)0x41ab134e, (q31_t)0x41a5ae8b,
+  (q31_t)0x41a049a0, (q31_t)0x419ae48c, (q31_t)0x41957f4f, (q31_t)0x419019eb, (q31_t)0x418ab45d, (q31_t)0x41854ea8, (q31_t)0x417fe8ca, (q31_t)0x417a82c3,
+  (q31_t)0x41751c94, (q31_t)0x416fb63d, (q31_t)0x416a4fbd, (q31_t)0x4164e916, (q31_t)0x415f8245, (q31_t)0x415a1b4d, (q31_t)0x4154b42c, (q31_t)0x414f4ce2,
+  (q31_t)0x4149e571, (q31_t)0x41447dd7, (q31_t)0x413f1615, (q31_t)0x4139ae2b, (q31_t)0x41344618, (q31_t)0x412edddd, (q31_t)0x4129757b, (q31_t)0x41240cef,
+  (q31_t)0x411ea43c, (q31_t)0x41193b61, (q31_t)0x4113d25d, (q31_t)0x410e6931, (q31_t)0x4108ffdd, (q31_t)0x41039661, (q31_t)0x40fe2cbd, (q31_t)0x40f8c2f1,
+  (q31_t)0x40f358fc, (q31_t)0x40edeee0, (q31_t)0x40e8849b, (q31_t)0x40e31a2f, (q31_t)0x40ddaf9b, (q31_t)0x40d844de, (q31_t)0x40d2d9f9, (q31_t)0x40cd6eed,
+  (q31_t)0x40c803b8, (q31_t)0x40c2985c, (q31_t)0x40bd2cd8, (q31_t)0x40b7c12b, (q31_t)0x40b25557, (q31_t)0x40ace95b, (q31_t)0x40a77d37, (q31_t)0x40a210eb,
+  (q31_t)0x409ca477, (q31_t)0x409737dc, (q31_t)0x4091cb18, (q31_t)0x408c5e2d, (q31_t)0x4086f11a, (q31_t)0x408183df, (q31_t)0x407c167c, (q31_t)0x4076a8f1,
+  (q31_t)0x40713b3f, (q31_t)0x406bcd65, (q31_t)0x40665f63, (q31_t)0x4060f13a, (q31_t)0x405b82e9, (q31_t)0x40561470, (q31_t)0x4050a5cf, (q31_t)0x404b3707,
+  (q31_t)0x4045c817, (q31_t)0x404058ff, (q31_t)0x403ae9c0, (q31_t)0x40357a59, (q31_t)0x40300acb, (q31_t)0x402a9b15, (q31_t)0x40252b37, (q31_t)0x401fbb32,
+  (q31_t)0x401a4b05, (q31_t)0x4014dab1, (q31_t)0x400f6a35, (q31_t)0x4009f992, (q31_t)0x400488c7, (q31_t)0x3fff17d5, (q31_t)0x3ff9a6bb, (q31_t)0x3ff4357a,
+  (q31_t)0x3feec411, (q31_t)0x3fe95281, (q31_t)0x3fe3e0c9, (q31_t)0x3fde6eeb, (q31_t)0x3fd8fce4, (q31_t)0x3fd38ab6, (q31_t)0x3fce1861, (q31_t)0x3fc8a5e5,
+  (q31_t)0x3fc33341, (q31_t)0x3fbdc076, (q31_t)0x3fb84d83, (q31_t)0x3fb2da6a, (q31_t)0x3fad6729, (q31_t)0x3fa7f3c0, (q31_t)0x3fa28031, (q31_t)0x3f9d0c7a,
+  (q31_t)0x3f97989c, (q31_t)0x3f922496, (q31_t)0x3f8cb06a, (q31_t)0x3f873c16, (q31_t)0x3f81c79b, (q31_t)0x3f7c52f9, (q31_t)0x3f76de30, (q31_t)0x3f71693f,
+  (q31_t)0x3f6bf428, (q31_t)0x3f667ee9, (q31_t)0x3f610983, (q31_t)0x3f5b93f6, (q31_t)0x3f561e42, (q31_t)0x3f50a867, (q31_t)0x3f4b3265, (q31_t)0x3f45bc3c,
+  (q31_t)0x3f4045ec, (q31_t)0x3f3acf75, (q31_t)0x3f3558d7, (q31_t)0x3f2fe211, (q31_t)0x3f2a6b25, (q31_t)0x3f24f412, (q31_t)0x3f1f7cd8, (q31_t)0x3f1a0577,
+  (q31_t)0x3f148def, (q31_t)0x3f0f1640, (q31_t)0x3f099e6b, (q31_t)0x3f04266e, (q31_t)0x3efeae4a, (q31_t)0x3ef93600, (q31_t)0x3ef3bd8f, (q31_t)0x3eee44f7,
+  (q31_t)0x3ee8cc38, (q31_t)0x3ee35352, (q31_t)0x3eddda46, (q31_t)0x3ed86113, (q31_t)0x3ed2e7b9, (q31_t)0x3ecd6e38, (q31_t)0x3ec7f491, (q31_t)0x3ec27ac2,
+  (q31_t)0x3ebd00cd, (q31_t)0x3eb786b2, (q31_t)0x3eb20c6f, (q31_t)0x3eac9206, (q31_t)0x3ea71777, (q31_t)0x3ea19cc1, (q31_t)0x3e9c21e4, (q31_t)0x3e96a6e0,
+  (q31_t)0x3e912bb6, (q31_t)0x3e8bb065, (q31_t)0x3e8634ee, (q31_t)0x3e80b950, (q31_t)0x3e7b3d8c, (q31_t)0x3e75c1a1, (q31_t)0x3e70458f, (q31_t)0x3e6ac957,
+  (q31_t)0x3e654cf8, (q31_t)0x3e5fd073, (q31_t)0x3e5a53c8, (q31_t)0x3e54d6f6, (q31_t)0x3e4f59fe, (q31_t)0x3e49dcdf, (q31_t)0x3e445f99, (q31_t)0x3e3ee22e,
+  (q31_t)0x3e39649c, (q31_t)0x3e33e6e3, (q31_t)0x3e2e6904, (q31_t)0x3e28eaff, (q31_t)0x3e236cd4, (q31_t)0x3e1dee82, (q31_t)0x3e18700a, (q31_t)0x3e12f16b,
+  (q31_t)0x3e0d72a6, (q31_t)0x3e07f3bb, (q31_t)0x3e0274aa, (q31_t)0x3dfcf572, (q31_t)0x3df77615, (q31_t)0x3df1f691, (q31_t)0x3dec76e6, (q31_t)0x3de6f716,
+  (q31_t)0x3de1771f, (q31_t)0x3ddbf703, (q31_t)0x3dd676c0, (q31_t)0x3dd0f656, (q31_t)0x3dcb75c7, (q31_t)0x3dc5f512, (q31_t)0x3dc07436, (q31_t)0x3dbaf335,
+  (q31_t)0x3db5720d, (q31_t)0x3daff0c0, (q31_t)0x3daa6f4c, (q31_t)0x3da4edb2, (q31_t)0x3d9f6bf2, (q31_t)0x3d99ea0d, (q31_t)0x3d946801, (q31_t)0x3d8ee5cf,
+  (q31_t)0x3d896377, (q31_t)0x3d83e0f9, (q31_t)0x3d7e5e56, (q31_t)0x3d78db8c, (q31_t)0x3d73589d, (q31_t)0x3d6dd587, (q31_t)0x3d68524c, (q31_t)0x3d62ceeb,
+  (q31_t)0x3d5d4b64, (q31_t)0x3d57c7b7, (q31_t)0x3d5243e4, (q31_t)0x3d4cbfeb, (q31_t)0x3d473bcd, (q31_t)0x3d41b789, (q31_t)0x3d3c331f, (q31_t)0x3d36ae8f,
+  (q31_t)0x3d3129da, (q31_t)0x3d2ba4fe, (q31_t)0x3d261ffd, (q31_t)0x3d209ad7, (q31_t)0x3d1b158a, (q31_t)0x3d159018, (q31_t)0x3d100a80, (q31_t)0x3d0a84c3,
+  (q31_t)0x3d04fee0, (q31_t)0x3cff78d7, (q31_t)0x3cf9f2a9, (q31_t)0x3cf46c55, (q31_t)0x3ceee5db, (q31_t)0x3ce95f3c, (q31_t)0x3ce3d877, (q31_t)0x3cde518d,
+  (q31_t)0x3cd8ca7d, (q31_t)0x3cd34347, (q31_t)0x3ccdbbed, (q31_t)0x3cc8346c, (q31_t)0x3cc2acc6, (q31_t)0x3cbd24fb, (q31_t)0x3cb79d0a, (q31_t)0x3cb214f4,
+  (q31_t)0x3cac8cb8, (q31_t)0x3ca70457, (q31_t)0x3ca17bd0, (q31_t)0x3c9bf324, (q31_t)0x3c966a53, (q31_t)0x3c90e15c, (q31_t)0x3c8b5840, (q31_t)0x3c85cefe,
+  (q31_t)0x3c804598, (q31_t)0x3c7abc0c, (q31_t)0x3c75325a, (q31_t)0x3c6fa883, (q31_t)0x3c6a1e87, (q31_t)0x3c649466, (q31_t)0x3c5f0a20, (q31_t)0x3c597fb4,
+  (q31_t)0x3c53f523, (q31_t)0x3c4e6a6d, (q31_t)0x3c48df91, (q31_t)0x3c435491, (q31_t)0x3c3dc96b, (q31_t)0x3c383e20, (q31_t)0x3c32b2b0, (q31_t)0x3c2d271b,
+  (q31_t)0x3c279b61, (q31_t)0x3c220f81, (q31_t)0x3c1c837d, (q31_t)0x3c16f753, (q31_t)0x3c116b04, (q31_t)0x3c0bde91, (q31_t)0x3c0651f8, (q31_t)0x3c00c53a,
+  (q31_t)0x3bfb3857, (q31_t)0x3bf5ab50, (q31_t)0x3bf01e23, (q31_t)0x3bea90d1, (q31_t)0x3be5035a, (q31_t)0x3bdf75bf, (q31_t)0x3bd9e7fe, (q31_t)0x3bd45a19,
+  (q31_t)0x3bcecc0e, (q31_t)0x3bc93ddf, (q31_t)0x3bc3af8b, (q31_t)0x3bbe2112, (q31_t)0x3bb89274, (q31_t)0x3bb303b1, (q31_t)0x3bad74c9, (q31_t)0x3ba7e5bd,
+  (q31_t)0x3ba2568c, (q31_t)0x3b9cc736, (q31_t)0x3b9737bb, (q31_t)0x3b91a81c, (q31_t)0x3b8c1857, (q31_t)0x3b86886e, (q31_t)0x3b80f861, (q31_t)0x3b7b682e,
+  (q31_t)0x3b75d7d7, (q31_t)0x3b70475c, (q31_t)0x3b6ab6bb, (q31_t)0x3b6525f6, (q31_t)0x3b5f950c, (q31_t)0x3b5a03fe, (q31_t)0x3b5472cb, (q31_t)0x3b4ee173,
+  (q31_t)0x3b494ff7, (q31_t)0x3b43be57, (q31_t)0x3b3e2c91, (q31_t)0x3b389aa8, (q31_t)0x3b330899, (q31_t)0x3b2d7666, (q31_t)0x3b27e40f, (q31_t)0x3b225193,
+  (q31_t)0x3b1cbef3, (q31_t)0x3b172c2e, (q31_t)0x3b119945, (q31_t)0x3b0c0637, (q31_t)0x3b067305, (q31_t)0x3b00dfaf, (q31_t)0x3afb4c34, (q31_t)0x3af5b894,
+  (q31_t)0x3af024d1, (q31_t)0x3aea90e9, (q31_t)0x3ae4fcdc, (q31_t)0x3adf68ac, (q31_t)0x3ad9d457, (q31_t)0x3ad43fdd, (q31_t)0x3aceab40, (q31_t)0x3ac9167e,
+  (q31_t)0x3ac38198, (q31_t)0x3abdec8d, (q31_t)0x3ab8575f, (q31_t)0x3ab2c20c, (q31_t)0x3aad2c95, (q31_t)0x3aa796fa, (q31_t)0x3aa2013a, (q31_t)0x3a9c6b57,
+  (q31_t)0x3a96d54f, (q31_t)0x3a913f23, (q31_t)0x3a8ba8d3, (q31_t)0x3a86125f, (q31_t)0x3a807bc7, (q31_t)0x3a7ae50a, (q31_t)0x3a754e2a, (q31_t)0x3a6fb726,
+  (q31_t)0x3a6a1ffd, (q31_t)0x3a6488b1, (q31_t)0x3a5ef140, (q31_t)0x3a5959ab, (q31_t)0x3a53c1f3, (q31_t)0x3a4e2a16, (q31_t)0x3a489216, (q31_t)0x3a42f9f2,
+  (q31_t)0x3a3d61a9, (q31_t)0x3a37c93d, (q31_t)0x3a3230ad, (q31_t)0x3a2c97f9, (q31_t)0x3a26ff21, (q31_t)0x3a216625, (q31_t)0x3a1bcd05, (q31_t)0x3a1633c1,
+  (q31_t)0x3a109a5a, (q31_t)0x3a0b00cf, (q31_t)0x3a056720, (q31_t)0x39ffcd4d, (q31_t)0x39fa3356, (q31_t)0x39f4993c, (q31_t)0x39eefefe, (q31_t)0x39e9649c,
+  (q31_t)0x39e3ca17, (q31_t)0x39de2f6d, (q31_t)0x39d894a0, (q31_t)0x39d2f9b0, (q31_t)0x39cd5e9b, (q31_t)0x39c7c363, (q31_t)0x39c22808, (q31_t)0x39bc8c89,
+  (q31_t)0x39b6f0e6, (q31_t)0x39b1551f, (q31_t)0x39abb935, (q31_t)0x39a61d28, (q31_t)0x39a080f6, (q31_t)0x399ae4a2, (q31_t)0x39954829, (q31_t)0x398fab8e,
+  (q31_t)0x398a0ece, (q31_t)0x398471ec, (q31_t)0x397ed4e5, (q31_t)0x397937bc, (q31_t)0x39739a6e, (q31_t)0x396dfcfe, (q31_t)0x39685f6a, (q31_t)0x3962c1b2,
+  (q31_t)0x395d23d7, (q31_t)0x395785d9, (q31_t)0x3951e7b8, (q31_t)0x394c4973, (q31_t)0x3946ab0a, (q31_t)0x39410c7f, (q31_t)0x393b6dd0, (q31_t)0x3935cefd,
+  (q31_t)0x39303008, (q31_t)0x392a90ef, (q31_t)0x3924f1b3, (q31_t)0x391f5254, (q31_t)0x3919b2d1, (q31_t)0x3914132b, (q31_t)0x390e7362, (q31_t)0x3908d376,
+  (q31_t)0x39033367, (q31_t)0x38fd9334, (q31_t)0x38f7f2de, (q31_t)0x38f25266, (q31_t)0x38ecb1ca, (q31_t)0x38e7110a, (q31_t)0x38e17028, (q31_t)0x38dbcf23,
+  (q31_t)0x38d62dfb, (q31_t)0x38d08caf, (q31_t)0x38caeb41, (q31_t)0x38c549af, (q31_t)0x38bfa7fb, (q31_t)0x38ba0623, (q31_t)0x38b46429, (q31_t)0x38aec20b,
+  (q31_t)0x38a91fcb, (q31_t)0x38a37d67, (q31_t)0x389ddae1, (q31_t)0x38983838, (q31_t)0x3892956c, (q31_t)0x388cf27d, (q31_t)0x38874f6b, (q31_t)0x3881ac36,
+  (q31_t)0x387c08de, (q31_t)0x38766564, (q31_t)0x3870c1c6, (q31_t)0x386b1e06, (q31_t)0x38657a23, (q31_t)0x385fd61d, (q31_t)0x385a31f5, (q31_t)0x38548daa,
+  (q31_t)0x384ee93b, (q31_t)0x384944ab, (q31_t)0x38439ff7, (q31_t)0x383dfb21, (q31_t)0x38385628, (q31_t)0x3832b10d, (q31_t)0x382d0bce, (q31_t)0x3827666d,
+  (q31_t)0x3821c0ea, (q31_t)0x381c1b44, (q31_t)0x3816757b, (q31_t)0x3810cf90, (q31_t)0x380b2982, (q31_t)0x38058351, (q31_t)0x37ffdcfe, (q31_t)0x37fa3688,
+  (q31_t)0x37f48ff0, (q31_t)0x37eee936, (q31_t)0x37e94259, (q31_t)0x37e39b59, (q31_t)0x37ddf437, (q31_t)0x37d84cf2, (q31_t)0x37d2a58b, (q31_t)0x37ccfe02,
+  (q31_t)0x37c75656, (q31_t)0x37c1ae87, (q31_t)0x37bc0697, (q31_t)0x37b65e84, (q31_t)0x37b0b64e, (q31_t)0x37ab0df6, (q31_t)0x37a5657c, (q31_t)0x379fbce0,
+  (q31_t)0x379a1421, (q31_t)0x37946b40, (q31_t)0x378ec23d, (q31_t)0x37891917, (q31_t)0x37836fcf, (q31_t)0x377dc665, (q31_t)0x37781cd9, (q31_t)0x3772732a,
+  (q31_t)0x376cc959, (q31_t)0x37671f66, (q31_t)0x37617551, (q31_t)0x375bcb1a, (q31_t)0x375620c1, (q31_t)0x37507645, (q31_t)0x374acba7, (q31_t)0x374520e7,
+  (q31_t)0x373f7606, (q31_t)0x3739cb02, (q31_t)0x37341fdc, (q31_t)0x372e7493, (q31_t)0x3728c929, (q31_t)0x37231d9d, (q31_t)0x371d71ef, (q31_t)0x3717c61f,
+  (q31_t)0x37121a2d, (q31_t)0x370c6e19, (q31_t)0x3706c1e2, (q31_t)0x3701158a, (q31_t)0x36fb6910, (q31_t)0x36f5bc75, (q31_t)0x36f00fb7, (q31_t)0x36ea62d7,
+  (q31_t)0x36e4b5d6, (q31_t)0x36df08b2, (q31_t)0x36d95b6d, (q31_t)0x36d3ae06, (q31_t)0x36ce007d, (q31_t)0x36c852d2, (q31_t)0x36c2a506, (q31_t)0x36bcf718,
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+  (q31_t)0x3689d3c9, (q31_t)0x3684248a, (q31_t)0x367e7529, (q31_t)0x3678c5a7, (q31_t)0x36731602, (q31_t)0x366d663d, (q31_t)0x3667b655, (q31_t)0x3662064c,
+  (q31_t)0x365c5622, (q31_t)0x3656a5d6, (q31_t)0x3650f569, (q31_t)0x364b44da, (q31_t)0x36459429, (q31_t)0x363fe357, (q31_t)0x363a3264, (q31_t)0x3634814f,
+  (q31_t)0x362ed019, (q31_t)0x36291ec1, (q31_t)0x36236d48, (q31_t)0x361dbbad, (q31_t)0x361809f1, (q31_t)0x36125814, (q31_t)0x360ca615, (q31_t)0x3606f3f5,
+  (q31_t)0x360141b4, (q31_t)0x35fb8f52, (q31_t)0x35f5dcce, (q31_t)0x35f02a28, (q31_t)0x35ea7762, (q31_t)0x35e4c47a, (q31_t)0x35df1171, (q31_t)0x35d95e47,
+  (q31_t)0x35d3aafc, (q31_t)0x35cdf78f, (q31_t)0x35c84401, (q31_t)0x35c29052, (q31_t)0x35bcdc82, (q31_t)0x35b72891, (q31_t)0x35b1747e, (q31_t)0x35abc04b,
+  (q31_t)0x35a60bf6, (q31_t)0x35a05781, (q31_t)0x359aa2ea, (q31_t)0x3594ee32, (q31_t)0x358f3959, (q31_t)0x3589845f, (q31_t)0x3583cf44, (q31_t)0x357e1a08,
+  (q31_t)0x357864ab, (q31_t)0x3572af2d, (q31_t)0x356cf98e, (q31_t)0x356743ce, (q31_t)0x35618ded, (q31_t)0x355bd7eb, (q31_t)0x355621c9, (q31_t)0x35506b85,
+  (q31_t)0x354ab520, (q31_t)0x3544fe9b, (q31_t)0x353f47f5, (q31_t)0x3539912e, (q31_t)0x3533da46, (q31_t)0x352e233d, (q31_t)0x35286c14, (q31_t)0x3522b4c9,
+  (q31_t)0x351cfd5e, (q31_t)0x351745d2, (q31_t)0x35118e26, (q31_t)0x350bd658, (q31_t)0x35061e6a, (q31_t)0x3500665c, (q31_t)0x34faae2c, (q31_t)0x34f4f5dc,
+  (q31_t)0x34ef3d6b, (q31_t)0x34e984da, (q31_t)0x34e3cc28, (q31_t)0x34de1355, (q31_t)0x34d85a62, (q31_t)0x34d2a14e, (q31_t)0x34cce819, (q31_t)0x34c72ec4,
+  (q31_t)0x34c1754e, (q31_t)0x34bbbbb8, (q31_t)0x34b60202, (q31_t)0x34b0482a, (q31_t)0x34aa8e33, (q31_t)0x34a4d41a, (q31_t)0x349f19e2, (q31_t)0x34995f88,
+  (q31_t)0x3493a50f, (q31_t)0x348dea75, (q31_t)0x34882fba, (q31_t)0x348274e0, (q31_t)0x347cb9e4, (q31_t)0x3476fec9, (q31_t)0x3471438d, (q31_t)0x346b8830,
+  (q31_t)0x3465ccb4, (q31_t)0x34601117, (q31_t)0x345a5559, (q31_t)0x3454997c, (q31_t)0x344edd7e, (q31_t)0x34492160, (q31_t)0x34436521, (q31_t)0x343da8c3,
+  (q31_t)0x3437ec44, (q31_t)0x34322fa5, (q31_t)0x342c72e6, (q31_t)0x3426b606, (q31_t)0x3420f907, (q31_t)0x341b3be7, (q31_t)0x34157ea7, (q31_t)0x340fc147,
+  (q31_t)0x340a03c7, (q31_t)0x34044626, (q31_t)0x33fe8866, (q31_t)0x33f8ca86, (q31_t)0x33f30c85, (q31_t)0x33ed4e65, (q31_t)0x33e79024, (q31_t)0x33e1d1c4,
+  (q31_t)0x33dc1343, (q31_t)0x33d654a2, (q31_t)0x33d095e2, (q31_t)0x33cad701, (q31_t)0x33c51801, (q31_t)0x33bf58e1, (q31_t)0x33b999a0, (q31_t)0x33b3da40,
+  (q31_t)0x33ae1ac0, (q31_t)0x33a85b20, (q31_t)0x33a29b60, (q31_t)0x339cdb81, (q31_t)0x33971b81, (q31_t)0x33915b62, (q31_t)0x338b9b22, (q31_t)0x3385dac4,
+  (q31_t)0x33801a45, (q31_t)0x337a59a6, (q31_t)0x337498e8, (q31_t)0x336ed80a, (q31_t)0x3369170c, (q31_t)0x336355ef, (q31_t)0x335d94b2, (q31_t)0x3357d355,
+  (q31_t)0x335211d8, (q31_t)0x334c503c, (q31_t)0x33468e80, (q31_t)0x3340cca5, (q31_t)0x333b0aaa, (q31_t)0x3335488f, (q31_t)0x332f8655, (q31_t)0x3329c3fb,
+  (q31_t)0x33240182, (q31_t)0x331e3ee9, (q31_t)0x33187c31, (q31_t)0x3312b959, (q31_t)0x330cf661, (q31_t)0x3307334a, (q31_t)0x33017014, (q31_t)0x32fbacbe,
+  (q31_t)0x32f5e948, (q31_t)0x32f025b4, (q31_t)0x32ea61ff, (q31_t)0x32e49e2c, (q31_t)0x32deda39, (q31_t)0x32d91626, (q31_t)0x32d351f5, (q31_t)0x32cd8da4,
+  (q31_t)0x32c7c933, (q31_t)0x32c204a3, (q31_t)0x32bc3ff4, (q31_t)0x32b67b26, (q31_t)0x32b0b638, (q31_t)0x32aaf12b, (q31_t)0x32a52bff, (q31_t)0x329f66b4,
+  (q31_t)0x3299a149, (q31_t)0x3293dbbf, (q31_t)0x328e1616, (q31_t)0x3288504e, (q31_t)0x32828a67, (q31_t)0x327cc460, (q31_t)0x3276fe3a, (q31_t)0x327137f6,
+  (q31_t)0x326b7192, (q31_t)0x3265ab0f, (q31_t)0x325fe46c, (q31_t)0x325a1dab, (q31_t)0x325456cb, (q31_t)0x324e8fcc, (q31_t)0x3248c8ad, (q31_t)0x32430170,
+  (q31_t)0x323d3a14, (q31_t)0x32377298, (q31_t)0x3231aafe, (q31_t)0x322be345, (q31_t)0x32261b6c, (q31_t)0x32205375, (q31_t)0x321a8b5f, (q31_t)0x3214c32a,
+  (q31_t)0x320efad6, (q31_t)0x32093263, (q31_t)0x320369d2, (q31_t)0x31fda121, (q31_t)0x31f7d852, (q31_t)0x31f20f64, (q31_t)0x31ec4657, (q31_t)0x31e67d2b,
+  (q31_t)0x31e0b3e0, (q31_t)0x31daea77, (q31_t)0x31d520ef, (q31_t)0x31cf5748, (q31_t)0x31c98d83, (q31_t)0x31c3c39e, (q31_t)0x31bdf99b, (q31_t)0x31b82f7a,
+  (q31_t)0x31b2653a, (q31_t)0x31ac9adb, (q31_t)0x31a6d05d, (q31_t)0x31a105c1, (q31_t)0x319b3b06, (q31_t)0x3195702d, (q31_t)0x318fa535, (q31_t)0x3189da1e,
+  (q31_t)0x31840ee9, (q31_t)0x317e4395, (q31_t)0x31787823, (q31_t)0x3172ac92, (q31_t)0x316ce0e3, (q31_t)0x31671515, (q31_t)0x31614929, (q31_t)0x315b7d1e,
+  (q31_t)0x3155b0f5, (q31_t)0x314fe4ae, (q31_t)0x314a1848, (q31_t)0x31444bc3, (q31_t)0x313e7f21, (q31_t)0x3138b260, (q31_t)0x3132e580, (q31_t)0x312d1882,
+  (q31_t)0x31274b66, (q31_t)0x31217e2c, (q31_t)0x311bb0d3, (q31_t)0x3115e35c, (q31_t)0x311015c6, (q31_t)0x310a4813, (q31_t)0x31047a41, (q31_t)0x30feac51,
+  (q31_t)0x30f8de42, (q31_t)0x30f31016, (q31_t)0x30ed41cb, (q31_t)0x30e77362, (q31_t)0x30e1a4db, (q31_t)0x30dbd636, (q31_t)0x30d60772, (q31_t)0x30d03891,
+  (q31_t)0x30ca6991, (q31_t)0x30c49a74, (q31_t)0x30becb38, (q31_t)0x30b8fbde, (q31_t)0x30b32c66, (q31_t)0x30ad5cd0, (q31_t)0x30a78d1c, (q31_t)0x30a1bd4a,
+  (q31_t)0x309bed5a, (q31_t)0x30961d4c, (q31_t)0x30904d20, (q31_t)0x308a7cd6, (q31_t)0x3084ac6e, (q31_t)0x307edbe9, (q31_t)0x30790b45, (q31_t)0x30733a83,
+  (q31_t)0x306d69a4, (q31_t)0x306798a7, (q31_t)0x3061c78b, (q31_t)0x305bf652, (q31_t)0x305624fb, (q31_t)0x30505387, (q31_t)0x304a81f4, (q31_t)0x3044b044,
+  (q31_t)0x303ede76, (q31_t)0x30390c8a, (q31_t)0x30333a80, (q31_t)0x302d6859, (q31_t)0x30279614, (q31_t)0x3021c3b1, (q31_t)0x301bf131, (q31_t)0x30161e93,
+  (q31_t)0x30104bd7, (q31_t)0x300a78fe, (q31_t)0x3004a607, (q31_t)0x2ffed2f2, (q31_t)0x2ff8ffc0, (q31_t)0x2ff32c70, (q31_t)0x2fed5902, (q31_t)0x2fe78577,
+  (q31_t)0x2fe1b1cf, (q31_t)0x2fdbde09, (q31_t)0x2fd60a25, (q31_t)0x2fd03624, (q31_t)0x2fca6206, (q31_t)0x2fc48dc9, (q31_t)0x2fbeb970, (q31_t)0x2fb8e4f9,
+  (q31_t)0x2fb31064, (q31_t)0x2fad3bb3, (q31_t)0x2fa766e3, (q31_t)0x2fa191f7, (q31_t)0x2f9bbced, (q31_t)0x2f95e7c5, (q31_t)0x2f901280, (q31_t)0x2f8a3d1e,
+  (q31_t)0x2f84679f, (q31_t)0x2f7e9202, (q31_t)0x2f78bc48, (q31_t)0x2f72e671, (q31_t)0x2f6d107c, (q31_t)0x2f673a6a, (q31_t)0x2f61643b, (q31_t)0x2f5b8def,
+  (q31_t)0x2f55b785, (q31_t)0x2f4fe0ff, (q31_t)0x2f4a0a5b, (q31_t)0x2f44339a, (q31_t)0x2f3e5cbb, (q31_t)0x2f3885c0, (q31_t)0x2f32aea8, (q31_t)0x2f2cd772,
+  (q31_t)0x2f27001f, (q31_t)0x2f2128af, (q31_t)0x2f1b5122, (q31_t)0x2f157979, (q31_t)0x2f0fa1b2, (q31_t)0x2f09c9ce, (q31_t)0x2f03f1cd, (q31_t)0x2efe19ae,
+  (q31_t)0x2ef84173, (q31_t)0x2ef2691b, (q31_t)0x2eec90a7, (q31_t)0x2ee6b815, (q31_t)0x2ee0df66, (q31_t)0x2edb069a, (q31_t)0x2ed52db1, (q31_t)0x2ecf54ac,
+  (q31_t)0x2ec97b89, (q31_t)0x2ec3a24a, (q31_t)0x2ebdc8ee, (q31_t)0x2eb7ef75, (q31_t)0x2eb215df, (q31_t)0x2eac3c2d, (q31_t)0x2ea6625d, (q31_t)0x2ea08871,
+  (q31_t)0x2e9aae68, (q31_t)0x2e94d443, (q31_t)0x2e8efa00, (q31_t)0x2e891fa1, (q31_t)0x2e834525, (q31_t)0x2e7d6a8d, (q31_t)0x2e778fd8, (q31_t)0x2e71b506,
+  (q31_t)0x2e6bda17, (q31_t)0x2e65ff0c, (q31_t)0x2e6023e5, (q31_t)0x2e5a48a0, (q31_t)0x2e546d3f, (q31_t)0x2e4e91c2, (q31_t)0x2e48b628, (q31_t)0x2e42da71,
+  (q31_t)0x2e3cfe9e, (q31_t)0x2e3722ae, (q31_t)0x2e3146a2, (q31_t)0x2e2b6a79, (q31_t)0x2e258e34, (q31_t)0x2e1fb1d3, (q31_t)0x2e19d554, (q31_t)0x2e13f8ba,
+  (q31_t)0x2e0e1c03, (q31_t)0x2e083f30, (q31_t)0x2e026240, (q31_t)0x2dfc8534, (q31_t)0x2df6a80b, (q31_t)0x2df0cac6, (q31_t)0x2deaed65, (q31_t)0x2de50fe8,
+  (q31_t)0x2ddf324e, (q31_t)0x2dd95498, (q31_t)0x2dd376c5, (q31_t)0x2dcd98d7, (q31_t)0x2dc7bacc, (q31_t)0x2dc1dca4, (q31_t)0x2dbbfe61, (q31_t)0x2db62001,
+  (q31_t)0x2db04186, (q31_t)0x2daa62ee, (q31_t)0x2da4843a, (q31_t)0x2d9ea569, (q31_t)0x2d98c67d, (q31_t)0x2d92e774, (q31_t)0x2d8d084f, (q31_t)0x2d87290f,
+  (q31_t)0x2d8149b2, (q31_t)0x2d7b6a39, (q31_t)0x2d758aa4, (q31_t)0x2d6faaf3, (q31_t)0x2d69cb26, (q31_t)0x2d63eb3d, (q31_t)0x2d5e0b38, (q31_t)0x2d582b17,
+  (q31_t)0x2d524ada, (q31_t)0x2d4c6a81, (q31_t)0x2d468a0c, (q31_t)0x2d40a97b, (q31_t)0x2d3ac8ce, (q31_t)0x2d34e805, (q31_t)0x2d2f0721, (q31_t)0x2d292620,
+  (q31_t)0x2d234504, (q31_t)0x2d1d63cc, (q31_t)0x2d178278, (q31_t)0x2d11a108, (q31_t)0x2d0bbf7d, (q31_t)0x2d05ddd5, (q31_t)0x2cfffc12, (q31_t)0x2cfa1a33,
+  (q31_t)0x2cf43839, (q31_t)0x2cee5622, (q31_t)0x2ce873f0, (q31_t)0x2ce291a2, (q31_t)0x2cdcaf39, (q31_t)0x2cd6ccb4, (q31_t)0x2cd0ea13, (q31_t)0x2ccb0756,
+  (q31_t)0x2cc5247e, (q31_t)0x2cbf418b, (q31_t)0x2cb95e7b, (q31_t)0x2cb37b51, (q31_t)0x2cad980a, (q31_t)0x2ca7b4a8, (q31_t)0x2ca1d12a, (q31_t)0x2c9bed91,
+  (q31_t)0x2c9609dd, (q31_t)0x2c90260d, (q31_t)0x2c8a4221, (q31_t)0x2c845e1a, (q31_t)0x2c7e79f7, (q31_t)0x2c7895b9, (q31_t)0x2c72b160, (q31_t)0x2c6ccceb,
+  (q31_t)0x2c66e85b, (q31_t)0x2c6103af, (q31_t)0x2c5b1ee8, (q31_t)0x2c553a06, (q31_t)0x2c4f5508, (q31_t)0x2c496fef, (q31_t)0x2c438abb, (q31_t)0x2c3da56b,
+  (q31_t)0x2c37c000, (q31_t)0x2c31da7a, (q31_t)0x2c2bf4d8, (q31_t)0x2c260f1c, (q31_t)0x2c202944, (q31_t)0x2c1a4351, (q31_t)0x2c145d42, (q31_t)0x2c0e7719,
+  (q31_t)0x2c0890d4, (q31_t)0x2c02aa74, (q31_t)0x2bfcc3f9, (q31_t)0x2bf6dd63, (q31_t)0x2bf0f6b1, (q31_t)0x2beb0fe5, (q31_t)0x2be528fd, (q31_t)0x2bdf41fb,
+  (q31_t)0x2bd95add, (q31_t)0x2bd373a4, (q31_t)0x2bcd8c51, (q31_t)0x2bc7a4e2, (q31_t)0x2bc1bd58, (q31_t)0x2bbbd5b3, (q31_t)0x2bb5edf4, (q31_t)0x2bb00619,
+  (q31_t)0x2baa1e23, (q31_t)0x2ba43613, (q31_t)0x2b9e4de7, (q31_t)0x2b9865a1, (q31_t)0x2b927d3f, (q31_t)0x2b8c94c3, (q31_t)0x2b86ac2c, (q31_t)0x2b80c37a,
+  (q31_t)0x2b7adaae, (q31_t)0x2b74f1c6, (q31_t)0x2b6f08c4, (q31_t)0x2b691fa6, (q31_t)0x2b63366f, (q31_t)0x2b5d4d1c, (q31_t)0x2b5763ae, (q31_t)0x2b517a26,
+  (q31_t)0x2b4b9083, (q31_t)0x2b45a6c6, (q31_t)0x2b3fbced, (q31_t)0x2b39d2fa, (q31_t)0x2b33e8ed, (q31_t)0x2b2dfec5, (q31_t)0x2b281482, (q31_t)0x2b222a24,
+  (q31_t)0x2b1c3fac, (q31_t)0x2b165519, (q31_t)0x2b106a6c, (q31_t)0x2b0a7fa4, (q31_t)0x2b0494c2, (q31_t)0x2afea9c5, (q31_t)0x2af8bead, (q31_t)0x2af2d37b,
+  (q31_t)0x2aece82f, (q31_t)0x2ae6fcc8, (q31_t)0x2ae11146, (q31_t)0x2adb25aa, (q31_t)0x2ad539f4, (q31_t)0x2acf4e23, (q31_t)0x2ac96238, (q31_t)0x2ac37633,
+  (q31_t)0x2abd8a13, (q31_t)0x2ab79dd8, (q31_t)0x2ab1b184, (q31_t)0x2aabc515, (q31_t)0x2aa5d88b, (q31_t)0x2a9febe8, (q31_t)0x2a99ff2a, (q31_t)0x2a941252,
+  (q31_t)0x2a8e255f, (q31_t)0x2a883853, (q31_t)0x2a824b2c, (q31_t)0x2a7c5deb, (q31_t)0x2a76708f, (q31_t)0x2a70831a, (q31_t)0x2a6a958a, (q31_t)0x2a64a7e0,
+  (q31_t)0x2a5eba1c, (q31_t)0x2a58cc3e, (q31_t)0x2a52de46, (q31_t)0x2a4cf033, (q31_t)0x2a470207, (q31_t)0x2a4113c0, (q31_t)0x2a3b2560, (q31_t)0x2a3536e5,
+  (q31_t)0x2a2f4850, (q31_t)0x2a2959a1, (q31_t)0x2a236ad9, (q31_t)0x2a1d7bf6, (q31_t)0x2a178cf9, (q31_t)0x2a119de2, (q31_t)0x2a0baeb2, (q31_t)0x2a05bf67,
+  (q31_t)0x29ffd003, (q31_t)0x29f9e084, (q31_t)0x29f3f0ec, (q31_t)0x29ee013a, (q31_t)0x29e8116e, (q31_t)0x29e22188, (q31_t)0x29dc3188, (q31_t)0x29d6416f,
+  (q31_t)0x29d0513b, (q31_t)0x29ca60ee, (q31_t)0x29c47087, (q31_t)0x29be8007, (q31_t)0x29b88f6c, (q31_t)0x29b29eb8, (q31_t)0x29acadea, (q31_t)0x29a6bd02,
+  (q31_t)0x29a0cc01, (q31_t)0x299adae6, (q31_t)0x2994e9b1, (q31_t)0x298ef863, (q31_t)0x298906fb, (q31_t)0x2983157a, (q31_t)0x297d23df, (q31_t)0x2977322a,
+  (q31_t)0x2971405b, (q31_t)0x296b4e74, (q31_t)0x29655c72, (q31_t)0x295f6a57, (q31_t)0x29597823, (q31_t)0x295385d5, (q31_t)0x294d936d, (q31_t)0x2947a0ec,
+  (q31_t)0x2941ae52, (q31_t)0x293bbb9e, (q31_t)0x2935c8d1, (q31_t)0x292fd5ea, (q31_t)0x2929e2ea, (q31_t)0x2923efd0, (q31_t)0x291dfc9d, (q31_t)0x29180951,
+  (q31_t)0x291215eb, (q31_t)0x290c226c, (q31_t)0x29062ed4, (q31_t)0x29003b23, (q31_t)0x28fa4758, (q31_t)0x28f45374, (q31_t)0x28ee5f76, (q31_t)0x28e86b5f,
+  (q31_t)0x28e27730, (q31_t)0x28dc82e6, (q31_t)0x28d68e84, (q31_t)0x28d09a09, (q31_t)0x28caa574, (q31_t)0x28c4b0c6, (q31_t)0x28bebbff, (q31_t)0x28b8c71f,
+  (q31_t)0x28b2d226, (q31_t)0x28acdd13, (q31_t)0x28a6e7e8, (q31_t)0x28a0f2a3, (q31_t)0x289afd46, (q31_t)0x289507cf, (q31_t)0x288f123f, (q31_t)0x28891c97,
+  (q31_t)0x288326d5, (q31_t)0x287d30fa, (q31_t)0x28773b07, (q31_t)0x287144fa, (q31_t)0x286b4ed5, (q31_t)0x28655896, (q31_t)0x285f623f, (q31_t)0x28596bce,
+  (q31_t)0x28537545, (q31_t)0x284d7ea3, (q31_t)0x284787e8, (q31_t)0x28419114, (q31_t)0x283b9a28, (q31_t)0x2835a322, (q31_t)0x282fac04, (q31_t)0x2829b4cd,
+  (q31_t)0x2823bd7d, (q31_t)0x281dc615, (q31_t)0x2817ce93, (q31_t)0x2811d6f9, (q31_t)0x280bdf46, (q31_t)0x2805e77b, (q31_t)0x27ffef97, (q31_t)0x27f9f79a,
+  (q31_t)0x27f3ff85, (q31_t)0x27ee0756, (q31_t)0x27e80f10, (q31_t)0x27e216b0, (q31_t)0x27dc1e38, (q31_t)0x27d625a8, (q31_t)0x27d02cff, (q31_t)0x27ca343d,
+  (q31_t)0x27c43b63, (q31_t)0x27be4270, (q31_t)0x27b84965, (q31_t)0x27b25041, (q31_t)0x27ac5705, (q31_t)0x27a65db0, (q31_t)0x27a06443, (q31_t)0x279a6abd,
+  (q31_t)0x2794711f, (q31_t)0x278e7768, (q31_t)0x27887d99, (q31_t)0x278283b2, (q31_t)0x277c89b3, (q31_t)0x27768f9b, (q31_t)0x2770956a, (q31_t)0x276a9b21,
+  (q31_t)0x2764a0c0, (q31_t)0x275ea647, (q31_t)0x2758abb6, (q31_t)0x2752b10c, (q31_t)0x274cb64a, (q31_t)0x2746bb6f, (q31_t)0x2740c07d, (q31_t)0x273ac572,
+  (q31_t)0x2734ca4f, (q31_t)0x272ecf14, (q31_t)0x2728d3c0, (q31_t)0x2722d855, (q31_t)0x271cdcd1, (q31_t)0x2716e136, (q31_t)0x2710e582, (q31_t)0x270ae9b6,
+  (q31_t)0x2704edd2, (q31_t)0x26fef1d5, (q31_t)0x26f8f5c1, (q31_t)0x26f2f995, (q31_t)0x26ecfd51, (q31_t)0x26e700f5, (q31_t)0x26e10480, (q31_t)0x26db07f4,
+  (q31_t)0x26d50b50, (q31_t)0x26cf0e94, (q31_t)0x26c911c0, (q31_t)0x26c314d4, (q31_t)0x26bd17d0, (q31_t)0x26b71ab4, (q31_t)0x26b11d80, (q31_t)0x26ab2034,
+  (q31_t)0x26a522d1, (q31_t)0x269f2556, (q31_t)0x269927c3, (q31_t)0x26932a18, (q31_t)0x268d2c55, (q31_t)0x26872e7b, (q31_t)0x26813088, (q31_t)0x267b327e,
+  (q31_t)0x2675345d, (q31_t)0x266f3623, (q31_t)0x266937d2, (q31_t)0x26633969, (q31_t)0x265d3ae9, (q31_t)0x26573c50, (q31_t)0x26513da1, (q31_t)0x264b3ed9,
+  (q31_t)0x26453ffa, (q31_t)0x263f4103, (q31_t)0x263941f5, (q31_t)0x263342cf, (q31_t)0x262d4392, (q31_t)0x2627443d, (q31_t)0x262144d0, (q31_t)0x261b454c,
+  (q31_t)0x261545b0, (q31_t)0x260f45fd, (q31_t)0x26094633, (q31_t)0x26034651, (q31_t)0x25fd4657, (q31_t)0x25f74646, (q31_t)0x25f1461e, (q31_t)0x25eb45de,
+  (q31_t)0x25e54587, (q31_t)0x25df4519, (q31_t)0x25d94493, (q31_t)0x25d343f6, (q31_t)0x25cd4341, (q31_t)0x25c74276, (q31_t)0x25c14192, (q31_t)0x25bb4098,
+  (q31_t)0x25b53f86, (q31_t)0x25af3e5d, (q31_t)0x25a93d1d, (q31_t)0x25a33bc6, (q31_t)0x259d3a57, (q31_t)0x259738d1, (q31_t)0x25913734, (q31_t)0x258b3580,
+  (q31_t)0x258533b5, (q31_t)0x257f31d2, (q31_t)0x25792fd8, (q31_t)0x25732dc8, (q31_t)0x256d2ba0, (q31_t)0x25672961, (q31_t)0x2561270b, (q31_t)0x255b249e,
+  (q31_t)0x2555221a, (q31_t)0x254f1f7e, (q31_t)0x25491ccc, (q31_t)0x25431a03, (q31_t)0x253d1723, (q31_t)0x2537142c, (q31_t)0x2531111e, (q31_t)0x252b0df9,
+  (q31_t)0x25250abd, (q31_t)0x251f076a, (q31_t)0x25190400, (q31_t)0x25130080, (q31_t)0x250cfce8, (q31_t)0x2506f93a, (q31_t)0x2500f574, (q31_t)0x24faf198,
+  (q31_t)0x24f4eda6, (q31_t)0x24eee99c, (q31_t)0x24e8e57c, (q31_t)0x24e2e144, (q31_t)0x24dcdcf6, (q31_t)0x24d6d892, (q31_t)0x24d0d416, (q31_t)0x24cacf84,
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+  (q31_t)0x2494a266, (q31_t)0x248e9cf1, (q31_t)0x24889766, (q31_t)0x248291c5, (q31_t)0x247c8c0d, (q31_t)0x2476863e, (q31_t)0x24708059, (q31_t)0x246a7a5e,
+  (q31_t)0x2464744c, (q31_t)0x245e6e23, (q31_t)0x245867e4, (q31_t)0x2452618f, (q31_t)0x244c5b24, (q31_t)0x244654a1, (q31_t)0x24404e09, (q31_t)0x243a475a,
+  (q31_t)0x24344095, (q31_t)0x242e39ba, (q31_t)0x242832c8, (q31_t)0x24222bc0, (q31_t)0x241c24a1, (q31_t)0x24161d6d, (q31_t)0x24101622, (q31_t)0x240a0ec1,
+  (q31_t)0x24040749, (q31_t)0x23fdffbc, (q31_t)0x23f7f818, (q31_t)0x23f1f05e, (q31_t)0x23ebe88e, (q31_t)0x23e5e0a7, (q31_t)0x23dfd8ab, (q31_t)0x23d9d098,
+  (q31_t)0x23d3c86f, (q31_t)0x23cdc031, (q31_t)0x23c7b7dc, (q31_t)0x23c1af71, (q31_t)0x23bba6f0, (q31_t)0x23b59e59, (q31_t)0x23af95ac, (q31_t)0x23a98ce8,
+  (q31_t)0x23a3840f, (q31_t)0x239d7b20, (q31_t)0x2397721b, (q31_t)0x23916900, (q31_t)0x238b5fcf, (q31_t)0x23855688, (q31_t)0x237f4d2b, (q31_t)0x237943b9,
+  (q31_t)0x23733a30, (q31_t)0x236d3092, (q31_t)0x236726dd, (q31_t)0x23611d13, (q31_t)0x235b1333, (q31_t)0x2355093e, (q31_t)0x234eff32, (q31_t)0x2348f511,
+  (q31_t)0x2342eada, (q31_t)0x233ce08d, (q31_t)0x2336d62a, (q31_t)0x2330cbb2, (q31_t)0x232ac124, (q31_t)0x2324b680, (q31_t)0x231eabc7, (q31_t)0x2318a0f8,
+  (q31_t)0x23129613, (q31_t)0x230c8b19, (q31_t)0x23068009, (q31_t)0x230074e3, (q31_t)0x22fa69a8, (q31_t)0x22f45e57, (q31_t)0x22ee52f1, (q31_t)0x22e84775,
+  (q31_t)0x22e23be4, (q31_t)0x22dc303d, (q31_t)0x22d62480, (q31_t)0x22d018ae, (q31_t)0x22ca0cc7, (q31_t)0x22c400ca, (q31_t)0x22bdf4b8, (q31_t)0x22b7e890,
+  (q31_t)0x22b1dc53, (q31_t)0x22abd001, (q31_t)0x22a5c399, (q31_t)0x229fb71b, (q31_t)0x2299aa89, (q31_t)0x22939de1, (q31_t)0x228d9123, (q31_t)0x22878451,
+  (q31_t)0x22817769, (q31_t)0x227b6a6c, (q31_t)0x22755d59, (q31_t)0x226f5032, (q31_t)0x226942f5, (q31_t)0x226335a2, (q31_t)0x225d283b, (q31_t)0x22571abe,
+  (q31_t)0x22510d2d, (q31_t)0x224aff86, (q31_t)0x2244f1c9, (q31_t)0x223ee3f8, (q31_t)0x2238d612, (q31_t)0x2232c816, (q31_t)0x222cba06, (q31_t)0x2226abe0,
+  (q31_t)0x22209da5, (q31_t)0x221a8f56, (q31_t)0x221480f1, (q31_t)0x220e7277, (q31_t)0x220863e8, (q31_t)0x22025544, (q31_t)0x21fc468b, (q31_t)0x21f637be,
+  (q31_t)0x21f028db, (q31_t)0x21ea19e3, (q31_t)0x21e40ad7, (q31_t)0x21ddfbb5, (q31_t)0x21d7ec7f, (q31_t)0x21d1dd34, (q31_t)0x21cbcdd3, (q31_t)0x21c5be5e,
+  (q31_t)0x21bfaed5, (q31_t)0x21b99f36, (q31_t)0x21b38f83, (q31_t)0x21ad7fba, (q31_t)0x21a76fdd, (q31_t)0x21a15fec, (q31_t)0x219b4fe5, (q31_t)0x21953fca,
+  (q31_t)0x218f2f9a, (q31_t)0x21891f55, (q31_t)0x21830efc, (q31_t)0x217cfe8e, (q31_t)0x2176ee0b, (q31_t)0x2170dd74, (q31_t)0x216accc8, (q31_t)0x2164bc08,
+  (q31_t)0x215eab33, (q31_t)0x21589a49, (q31_t)0x2152894b, (q31_t)0x214c7838, (q31_t)0x21466710, (q31_t)0x214055d4, (q31_t)0x213a4484, (q31_t)0x2134331f,
+  (q31_t)0x212e21a6, (q31_t)0x21281018, (q31_t)0x2121fe76, (q31_t)0x211becbf, (q31_t)0x2115daf4, (q31_t)0x210fc914, (q31_t)0x2109b720, (q31_t)0x2103a518,
+  (q31_t)0x20fd92fb, (q31_t)0x20f780ca, (q31_t)0x20f16e84, (q31_t)0x20eb5c2b, (q31_t)0x20e549bd, (q31_t)0x20df373a, (q31_t)0x20d924a4, (q31_t)0x20d311f9,
+  (q31_t)0x20ccff3a, (q31_t)0x20c6ec66, (q31_t)0x20c0d97f, (q31_t)0x20bac683, (q31_t)0x20b4b373, (q31_t)0x20aea04f, (q31_t)0x20a88d17, (q31_t)0x20a279ca,
+  (q31_t)0x209c666a, (q31_t)0x209652f5, (q31_t)0x20903f6c, (q31_t)0x208a2bcf, (q31_t)0x2084181e, (q31_t)0x207e0459, (q31_t)0x2077f080, (q31_t)0x2071dc93,
+  (q31_t)0x206bc892, (q31_t)0x2065b47d, (q31_t)0x205fa054, (q31_t)0x20598c17, (q31_t)0x205377c6, (q31_t)0x204d6361, (q31_t)0x20474ee8, (q31_t)0x20413a5b,
+  (q31_t)0x203b25bb, (q31_t)0x20351106, (q31_t)0x202efc3e, (q31_t)0x2028e761, (q31_t)0x2022d271, (q31_t)0x201cbd6d, (q31_t)0x2016a856, (q31_t)0x2010932a,
+  (q31_t)0x200a7deb, (q31_t)0x20046898, (q31_t)0x1ffe5331, (q31_t)0x1ff83db6, (q31_t)0x1ff22828, (q31_t)0x1fec1286, (q31_t)0x1fe5fcd0, (q31_t)0x1fdfe707,
+  (q31_t)0x1fd9d12a, (q31_t)0x1fd3bb39, (q31_t)0x1fcda535, (q31_t)0x1fc78f1d, (q31_t)0x1fc178f1, (q31_t)0x1fbb62b2, (q31_t)0x1fb54c60, (q31_t)0x1faf35f9,
+  (q31_t)0x1fa91f80, (q31_t)0x1fa308f2, (q31_t)0x1f9cf252, (q31_t)0x1f96db9d, (q31_t)0x1f90c4d5, (q31_t)0x1f8aadfa, (q31_t)0x1f84970b, (q31_t)0x1f7e8009,
+  (q31_t)0x1f7868f4, (q31_t)0x1f7251ca, (q31_t)0x1f6c3a8e, (q31_t)0x1f66233e, (q31_t)0x1f600bdb, (q31_t)0x1f59f465, (q31_t)0x1f53dcdb, (q31_t)0x1f4dc53d,
+  (q31_t)0x1f47ad8d, (q31_t)0x1f4195c9, (q31_t)0x1f3b7df2, (q31_t)0x1f356608, (q31_t)0x1f2f4e0a, (q31_t)0x1f2935f9, (q31_t)0x1f231dd5, (q31_t)0x1f1d059e,
+  (q31_t)0x1f16ed54, (q31_t)0x1f10d4f6, (q31_t)0x1f0abc85, (q31_t)0x1f04a401, (q31_t)0x1efe8b6a, (q31_t)0x1ef872c0, (q31_t)0x1ef25a03, (q31_t)0x1eec4132,
+  (q31_t)0x1ee6284f, (q31_t)0x1ee00f58, (q31_t)0x1ed9f64f, (q31_t)0x1ed3dd32, (q31_t)0x1ecdc402, (q31_t)0x1ec7aac0, (q31_t)0x1ec1916a, (q31_t)0x1ebb7802,
+  (q31_t)0x1eb55e86, (q31_t)0x1eaf44f8, (q31_t)0x1ea92b56, (q31_t)0x1ea311a2, (q31_t)0x1e9cf7db, (q31_t)0x1e96de01, (q31_t)0x1e90c414, (q31_t)0x1e8aaa14,
+  (q31_t)0x1e849001, (q31_t)0x1e7e75dc, (q31_t)0x1e785ba3, (q31_t)0x1e724158, (q31_t)0x1e6c26fa, (q31_t)0x1e660c8a, (q31_t)0x1e5ff206, (q31_t)0x1e59d770,
+  (q31_t)0x1e53bcc7, (q31_t)0x1e4da20c, (q31_t)0x1e47873d, (q31_t)0x1e416c5d, (q31_t)0x1e3b5169, (q31_t)0x1e353663, (q31_t)0x1e2f1b4a, (q31_t)0x1e29001e,
+  (q31_t)0x1e22e4e0, (q31_t)0x1e1cc990, (q31_t)0x1e16ae2c, (q31_t)0x1e1092b6, (q31_t)0x1e0a772e, (q31_t)0x1e045b93, (q31_t)0x1dfe3fe6, (q31_t)0x1df82426,
+  (q31_t)0x1df20853, (q31_t)0x1debec6f, (q31_t)0x1de5d077, (q31_t)0x1ddfb46e, (q31_t)0x1dd99851, (q31_t)0x1dd37c23, (q31_t)0x1dcd5fe2, (q31_t)0x1dc7438e,
+  (q31_t)0x1dc12729, (q31_t)0x1dbb0ab0, (q31_t)0x1db4ee26, (q31_t)0x1daed189, (q31_t)0x1da8b4da, (q31_t)0x1da29819, (q31_t)0x1d9c7b45, (q31_t)0x1d965e5f,
+  (q31_t)0x1d904167, (q31_t)0x1d8a245c, (q31_t)0x1d840740, (q31_t)0x1d7dea11, (q31_t)0x1d77ccd0, (q31_t)0x1d71af7d, (q31_t)0x1d6b9217, (q31_t)0x1d6574a0,
+  (q31_t)0x1d5f5716, (q31_t)0x1d59397a, (q31_t)0x1d531bcc, (q31_t)0x1d4cfe0d, (q31_t)0x1d46e03a, (q31_t)0x1d40c256, (q31_t)0x1d3aa460, (q31_t)0x1d348658,
+  (q31_t)0x1d2e683e, (q31_t)0x1d284a12, (q31_t)0x1d222bd3, (q31_t)0x1d1c0d83, (q31_t)0x1d15ef21, (q31_t)0x1d0fd0ad, (q31_t)0x1d09b227, (q31_t)0x1d03938f,
+  (q31_t)0x1cfd74e5, (q31_t)0x1cf7562a, (q31_t)0x1cf1375c, (q31_t)0x1ceb187d, (q31_t)0x1ce4f98c, (q31_t)0x1cdeda89, (q31_t)0x1cd8bb74, (q31_t)0x1cd29c4d,
+  (q31_t)0x1ccc7d15, (q31_t)0x1cc65dca, (q31_t)0x1cc03e6e, (q31_t)0x1cba1f01, (q31_t)0x1cb3ff81, (q31_t)0x1caddff0, (q31_t)0x1ca7c04d, (q31_t)0x1ca1a099,
+  (q31_t)0x1c9b80d3, (q31_t)0x1c9560fb, (q31_t)0x1c8f4112, (q31_t)0x1c892117, (q31_t)0x1c83010a, (q31_t)0x1c7ce0ec, (q31_t)0x1c76c0bc, (q31_t)0x1c70a07b,
+  (q31_t)0x1c6a8028, (q31_t)0x1c645fc3, (q31_t)0x1c5e3f4d, (q31_t)0x1c581ec6, (q31_t)0x1c51fe2d, (q31_t)0x1c4bdd83, (q31_t)0x1c45bcc7, (q31_t)0x1c3f9bf9,
+  (q31_t)0x1c397b1b, (q31_t)0x1c335a2b, (q31_t)0x1c2d3929, (q31_t)0x1c271816, (q31_t)0x1c20f6f2, (q31_t)0x1c1ad5bc, (q31_t)0x1c14b475, (q31_t)0x1c0e931d,
+  (q31_t)0x1c0871b4, (q31_t)0x1c025039, (q31_t)0x1bfc2ead, (q31_t)0x1bf60d0f, (q31_t)0x1befeb60, (q31_t)0x1be9c9a1, (q31_t)0x1be3a7cf, (q31_t)0x1bdd85ed,
+  (q31_t)0x1bd763fa, (q31_t)0x1bd141f5, (q31_t)0x1bcb1fdf, (q31_t)0x1bc4fdb8, (q31_t)0x1bbedb80, (q31_t)0x1bb8b937, (q31_t)0x1bb296dc, (q31_t)0x1bac7471,
+  (q31_t)0x1ba651f5, (q31_t)0x1ba02f67, (q31_t)0x1b9a0cc8, (q31_t)0x1b93ea19, (q31_t)0x1b8dc758, (q31_t)0x1b87a487, (q31_t)0x1b8181a4, (q31_t)0x1b7b5eb0,
+  (q31_t)0x1b753bac, (q31_t)0x1b6f1897, (q31_t)0x1b68f570, (q31_t)0x1b62d239, (q31_t)0x1b5caef1, (q31_t)0x1b568b98, (q31_t)0x1b50682e, (q31_t)0x1b4a44b3,
+  (q31_t)0x1b442127, (q31_t)0x1b3dfd8b, (q31_t)0x1b37d9de, (q31_t)0x1b31b620, (q31_t)0x1b2b9251, (q31_t)0x1b256e71, (q31_t)0x1b1f4a81, (q31_t)0x1b192680,
+  (q31_t)0x1b13026e, (q31_t)0x1b0cde4c, (q31_t)0x1b06ba19, (q31_t)0x1b0095d5, (q31_t)0x1afa7180, (q31_t)0x1af44d1b, (q31_t)0x1aee28a6, (q31_t)0x1ae8041f,
+  (q31_t)0x1ae1df88, (q31_t)0x1adbbae1, (q31_t)0x1ad59629, (q31_t)0x1acf7160, (q31_t)0x1ac94c87, (q31_t)0x1ac3279d, (q31_t)0x1abd02a3, (q31_t)0x1ab6dd98,
+  (q31_t)0x1ab0b87d, (q31_t)0x1aaa9352, (q31_t)0x1aa46e16, (q31_t)0x1a9e48c9, (q31_t)0x1a98236c, (q31_t)0x1a91fdff, (q31_t)0x1a8bd881, (q31_t)0x1a85b2f3,
+  (q31_t)0x1a7f8d54, (q31_t)0x1a7967a6, (q31_t)0x1a7341e6, (q31_t)0x1a6d1c17, (q31_t)0x1a66f637, (q31_t)0x1a60d047, (q31_t)0x1a5aaa47, (q31_t)0x1a548436,
+  (q31_t)0x1a4e5e15, (q31_t)0x1a4837e4, (q31_t)0x1a4211a3, (q31_t)0x1a3beb52, (q31_t)0x1a35c4f0, (q31_t)0x1a2f9e7e, (q31_t)0x1a2977fc, (q31_t)0x1a23516a,
+  (q31_t)0x1a1d2ac8, (q31_t)0x1a170416, (q31_t)0x1a10dd53, (q31_t)0x1a0ab681, (q31_t)0x1a048f9e, (q31_t)0x19fe68ac, (q31_t)0x19f841a9, (q31_t)0x19f21a96,
+  (q31_t)0x19ebf374, (q31_t)0x19e5cc41, (q31_t)0x19dfa4fe, (q31_t)0x19d97dac, (q31_t)0x19d35649, (q31_t)0x19cd2ed7, (q31_t)0x19c70754, (q31_t)0x19c0dfc2,
+  (q31_t)0x19bab820, (q31_t)0x19b4906e, (q31_t)0x19ae68ac, (q31_t)0x19a840da, (q31_t)0x19a218f9, (q31_t)0x199bf107, (q31_t)0x1995c906, (q31_t)0x198fa0f5,
+  (q31_t)0x198978d4, (q31_t)0x198350a4, (q31_t)0x197d2864, (q31_t)0x19770014, (q31_t)0x1970d7b4, (q31_t)0x196aaf45, (q31_t)0x196486c6, (q31_t)0x195e5e37,
+  (q31_t)0x19583599, (q31_t)0x19520ceb, (q31_t)0x194be42d, (q31_t)0x1945bb60, (q31_t)0x193f9283, (q31_t)0x19396997, (q31_t)0x1933409b, (q31_t)0x192d178f,
+  (q31_t)0x1926ee74, (q31_t)0x1920c54a, (q31_t)0x191a9c10, (q31_t)0x191472c6, (q31_t)0x190e496d, (q31_t)0x19082005, (q31_t)0x1901f68d, (q31_t)0x18fbcd06,
+  (q31_t)0x18f5a36f, (q31_t)0x18ef79c9, (q31_t)0x18e95014, (q31_t)0x18e3264f, (q31_t)0x18dcfc7b, (q31_t)0x18d6d297, (q31_t)0x18d0a8a4, (q31_t)0x18ca7ea2,
+  (q31_t)0x18c45491, (q31_t)0x18be2a70, (q31_t)0x18b80040, (q31_t)0x18b1d601, (q31_t)0x18ababb2, (q31_t)0x18a58154, (q31_t)0x189f56e8, (q31_t)0x18992c6b,
+  (q31_t)0x189301e0, (q31_t)0x188cd746, (q31_t)0x1886ac9c, (q31_t)0x188081e4, (q31_t)0x187a571c, (q31_t)0x18742c45, (q31_t)0x186e015f, (q31_t)0x1867d66a,
+  (q31_t)0x1861ab66, (q31_t)0x185b8053, (q31_t)0x18555530, (q31_t)0x184f29ff, (q31_t)0x1848febf, (q31_t)0x1842d370, (q31_t)0x183ca812, (q31_t)0x18367ca5,
+  (q31_t)0x18305129, (q31_t)0x182a259e, (q31_t)0x1823fa04, (q31_t)0x181dce5b, (q31_t)0x1817a2a4, (q31_t)0x181176dd, (q31_t)0x180b4b08, (q31_t)0x18051f24,
+  (q31_t)0x17fef331, (q31_t)0x17f8c72f, (q31_t)0x17f29b1e, (q31_t)0x17ec6eff, (q31_t)0x17e642d1, (q31_t)0x17e01694, (q31_t)0x17d9ea49, (q31_t)0x17d3bdee,
+  (q31_t)0x17cd9186, (q31_t)0x17c7650e, (q31_t)0x17c13888, (q31_t)0x17bb0bf3, (q31_t)0x17b4df4f, (q31_t)0x17aeb29d, (q31_t)0x17a885dc, (q31_t)0x17a2590d,
+  (q31_t)0x179c2c2f, (q31_t)0x1795ff42, (q31_t)0x178fd247, (q31_t)0x1789a53d, (q31_t)0x17837825, (q31_t)0x177d4afe, (q31_t)0x17771dc9, (q31_t)0x1770f086,
+  (q31_t)0x176ac333, (q31_t)0x176495d3, (q31_t)0x175e6864, (q31_t)0x17583ae7, (q31_t)0x17520d5b, (q31_t)0x174bdfc1, (q31_t)0x1745b218, (q31_t)0x173f8461,
+  (q31_t)0x1739569c, (q31_t)0x173328c8, (q31_t)0x172cfae6, (q31_t)0x1726ccf6, (q31_t)0x17209ef8, (q31_t)0x171a70eb, (q31_t)0x171442d0, (q31_t)0x170e14a7,
+  (q31_t)0x1707e670, (q31_t)0x1701b82a, (q31_t)0x16fb89d6, (q31_t)0x16f55b74, (q31_t)0x16ef2d04, (q31_t)0x16e8fe86, (q31_t)0x16e2cff9, (q31_t)0x16dca15f,
+  (q31_t)0x16d672b6, (q31_t)0x16d043ff, (q31_t)0x16ca153a, (q31_t)0x16c3e667, (q31_t)0x16bdb787, (q31_t)0x16b78898, (q31_t)0x16b1599b, (q31_t)0x16ab2a90,
+  (q31_t)0x16a4fb77, (q31_t)0x169ecc50, (q31_t)0x16989d1b, (q31_t)0x16926dd8, (q31_t)0x168c3e87, (q31_t)0x16860f29, (q31_t)0x167fdfbc, (q31_t)0x1679b042,
+  (q31_t)0x167380ba, (q31_t)0x166d5123, (q31_t)0x1667217f, (q31_t)0x1660f1ce, (q31_t)0x165ac20e, (q31_t)0x16549241, (q31_t)0x164e6266, (q31_t)0x1648327d,
+  (q31_t)0x16420286, (q31_t)0x163bd282, (q31_t)0x1635a270, (q31_t)0x162f7250, (q31_t)0x16294222, (q31_t)0x162311e7, (q31_t)0x161ce19e, (q31_t)0x1616b148,
+  (q31_t)0x161080e4, (q31_t)0x160a5072, (q31_t)0x16041ff3, (q31_t)0x15fdef66, (q31_t)0x15f7becc, (q31_t)0x15f18e24, (q31_t)0x15eb5d6e, (q31_t)0x15e52cab,
+  (q31_t)0x15defbdb, (q31_t)0x15d8cafd, (q31_t)0x15d29a11, (q31_t)0x15cc6918, (q31_t)0x15c63812, (q31_t)0x15c006fe, (q31_t)0x15b9d5dd, (q31_t)0x15b3a4ae,
+  (q31_t)0x15ad7372, (q31_t)0x15a74228, (q31_t)0x15a110d2, (q31_t)0x159adf6e, (q31_t)0x1594adfc, (q31_t)0x158e7c7d, (q31_t)0x15884af1, (q31_t)0x15821958,
+  (q31_t)0x157be7b1, (q31_t)0x1575b5fe, (q31_t)0x156f843c, (q31_t)0x1569526e, (q31_t)0x15632093, (q31_t)0x155ceeaa, (q31_t)0x1556bcb4, (q31_t)0x15508ab1,
+  (q31_t)0x154a58a1, (q31_t)0x15442683, (q31_t)0x153df459, (q31_t)0x1537c221, (q31_t)0x15318fdd, (q31_t)0x152b5d8b, (q31_t)0x15252b2c, (q31_t)0x151ef8c0,
+  (q31_t)0x1518c648, (q31_t)0x151293c2, (q31_t)0x150c612f, (q31_t)0x15062e8f, (q31_t)0x14fffbe2, (q31_t)0x14f9c928, (q31_t)0x14f39662, (q31_t)0x14ed638e,
+  (q31_t)0x14e730ae, (q31_t)0x14e0fdc0, (q31_t)0x14dacac6, (q31_t)0x14d497bf, (q31_t)0x14ce64ab, (q31_t)0x14c8318a, (q31_t)0x14c1fe5c, (q31_t)0x14bbcb22,
+  (q31_t)0x14b597da, (q31_t)0x14af6486, (q31_t)0x14a93125, (q31_t)0x14a2fdb8, (q31_t)0x149cca3e, (q31_t)0x149696b7, (q31_t)0x14906323, (q31_t)0x148a2f82,
+  (q31_t)0x1483fbd5, (q31_t)0x147dc81c, (q31_t)0x14779455, (q31_t)0x14716082, (q31_t)0x146b2ca3, (q31_t)0x1464f8b7, (q31_t)0x145ec4be, (q31_t)0x145890b9,
+  (q31_t)0x14525ca7, (q31_t)0x144c2888, (q31_t)0x1445f45d, (q31_t)0x143fc026, (q31_t)0x14398be2, (q31_t)0x14335792, (q31_t)0x142d2335, (q31_t)0x1426eecb,
+  (q31_t)0x1420ba56, (q31_t)0x141a85d3, (q31_t)0x14145145, (q31_t)0x140e1caa, (q31_t)0x1407e803, (q31_t)0x1401b34f, (q31_t)0x13fb7e8f, (q31_t)0x13f549c3,
+  (q31_t)0x13ef14ea, (q31_t)0x13e8e005, (q31_t)0x13e2ab14, (q31_t)0x13dc7616, (q31_t)0x13d6410d, (q31_t)0x13d00bf7, (q31_t)0x13c9d6d4, (q31_t)0x13c3a1a6,
+  (q31_t)0x13bd6c6b, (q31_t)0x13b73725, (q31_t)0x13b101d2, (q31_t)0x13aacc73, (q31_t)0x13a49707, (q31_t)0x139e6190, (q31_t)0x13982c0d, (q31_t)0x1391f67d,
+  (q31_t)0x138bc0e1, (q31_t)0x13858b3a, (q31_t)0x137f5586, (q31_t)0x13791fc6, (q31_t)0x1372e9fb, (q31_t)0x136cb423, (q31_t)0x13667e3f, (q31_t)0x13604850,
+  (q31_t)0x135a1254, (q31_t)0x1353dc4c, (q31_t)0x134da639, (q31_t)0x1347701a, (q31_t)0x134139ee, (q31_t)0x133b03b7, (q31_t)0x1334cd74, (q31_t)0x132e9725,
+  (q31_t)0x132860ca, (q31_t)0x13222a64, (q31_t)0x131bf3f2, (q31_t)0x1315bd73, (q31_t)0x130f86ea, (q31_t)0x13095054, (q31_t)0x130319b3, (q31_t)0x12fce305,
+  (q31_t)0x12f6ac4d, (q31_t)0x12f07588, (q31_t)0x12ea3eb8, (q31_t)0x12e407dc, (q31_t)0x12ddd0f4, (q31_t)0x12d79a01, (q31_t)0x12d16303, (q31_t)0x12cb2bf8,
+  (q31_t)0x12c4f4e2, (q31_t)0x12bebdc1, (q31_t)0x12b88693, (q31_t)0x12b24f5b, (q31_t)0x12ac1817, (q31_t)0x12a5e0c7, (q31_t)0x129fa96c, (q31_t)0x12997205,
+  (q31_t)0x12933a93, (q31_t)0x128d0315, (q31_t)0x1286cb8c, (q31_t)0x128093f7, (q31_t)0x127a5c57, (q31_t)0x127424ac, (q31_t)0x126decf5, (q31_t)0x1267b533,
+  (q31_t)0x12617d66, (q31_t)0x125b458d, (q31_t)0x12550da9, (q31_t)0x124ed5ba, (q31_t)0x12489dbf, (q31_t)0x124265b9, (q31_t)0x123c2da8, (q31_t)0x1235f58b,
+  (q31_t)0x122fbd63, (q31_t)0x12298530, (q31_t)0x12234cf2, (q31_t)0x121d14a9, (q31_t)0x1216dc54, (q31_t)0x1210a3f5, (q31_t)0x120a6b8a, (q31_t)0x12043314,
+  (q31_t)0x11fdfa93, (q31_t)0x11f7c207, (q31_t)0x11f18970, (q31_t)0x11eb50cd, (q31_t)0x11e51820, (q31_t)0x11dedf68, (q31_t)0x11d8a6a4, (q31_t)0x11d26dd6,
+  (q31_t)0x11cc34fc, (q31_t)0x11c5fc18, (q31_t)0x11bfc329, (q31_t)0x11b98a2e, (q31_t)0x11b35129, (q31_t)0x11ad1819, (q31_t)0x11a6defe, (q31_t)0x11a0a5d8,
+  (q31_t)0x119a6ca7, (q31_t)0x1194336b, (q31_t)0x118dfa25, (q31_t)0x1187c0d3, (q31_t)0x11818777, (q31_t)0x117b4e10, (q31_t)0x1175149e, (q31_t)0x116edb22,
+  (q31_t)0x1168a19b, (q31_t)0x11626809, (q31_t)0x115c2e6c, (q31_t)0x1155f4c4, (q31_t)0x114fbb12, (q31_t)0x11498156, (q31_t)0x1143478e, (q31_t)0x113d0dbc,
+  (q31_t)0x1136d3df, (q31_t)0x113099f8, (q31_t)0x112a6006, (q31_t)0x11242609, (q31_t)0x111dec02, (q31_t)0x1117b1f0, (q31_t)0x111177d4, (q31_t)0x110b3dad,
+  (q31_t)0x1105037c, (q31_t)0x10fec940, (q31_t)0x10f88efa, (q31_t)0x10f254a9, (q31_t)0x10ec1a4e, (q31_t)0x10e5dfe8, (q31_t)0x10dfa578, (q31_t)0x10d96afe,
+  (q31_t)0x10d33079, (q31_t)0x10ccf5ea, (q31_t)0x10c6bb50, (q31_t)0x10c080ac, (q31_t)0x10ba45fe, (q31_t)0x10b40b45, (q31_t)0x10add082, (q31_t)0x10a795b5,
+  (q31_t)0x10a15ade, (q31_t)0x109b1ffc, (q31_t)0x1094e510, (q31_t)0x108eaa1a, (q31_t)0x10886f19, (q31_t)0x1082340f, (q31_t)0x107bf8fa, (q31_t)0x1075bddb,
+  (q31_t)0x106f82b2, (q31_t)0x1069477f, (q31_t)0x10630c41, (q31_t)0x105cd0fa, (q31_t)0x105695a8, (q31_t)0x10505a4d, (q31_t)0x104a1ee7, (q31_t)0x1043e377,
+  (q31_t)0x103da7fd, (q31_t)0x10376c79, (q31_t)0x103130ec, (q31_t)0x102af554, (q31_t)0x1024b9b2, (q31_t)0x101e7e06, (q31_t)0x10184251, (q31_t)0x10120691,
+  (q31_t)0x100bcac7, (q31_t)0x10058ef4, (q31_t)0xfff5317, (q31_t)0xff91730, (q31_t)0xff2db3e, (q31_t)0xfec9f44, (q31_t)0xfe6633f, (q31_t)0xfe02730,
+  (q31_t)0xfd9eb18, (q31_t)0xfd3aef6, (q31_t)0xfcd72ca, (q31_t)0xfc73695, (q31_t)0xfc0fa55, (q31_t)0xfbabe0c, (q31_t)0xfb481ba, (q31_t)0xfae455d,
+  (q31_t)0xfa808f7, (q31_t)0xfa1cc87, (q31_t)0xf9b900e, (q31_t)0xf95538b, (q31_t)0xf8f16fe, (q31_t)0xf88da68, (q31_t)0xf829dc8, (q31_t)0xf7c611f,
+  (q31_t)0xf76246c, (q31_t)0xf6fe7af, (q31_t)0xf69aae9, (q31_t)0xf636e1a, (q31_t)0xf5d3141, (q31_t)0xf56f45e, (q31_t)0xf50b773, (q31_t)0xf4a7a7d,
+  (q31_t)0xf443d7e, (q31_t)0xf3e0076, (q31_t)0xf37c365, (q31_t)0xf318649, (q31_t)0xf2b4925, (q31_t)0xf250bf7, (q31_t)0xf1ecec0, (q31_t)0xf189180,
+  (q31_t)0xf125436, (q31_t)0xf0c16e3, (q31_t)0xf05d987, (q31_t)0xeff9c21, (q31_t)0xef95eb2, (q31_t)0xef3213a, (q31_t)0xeece3b9, (q31_t)0xee6a62f,
+  (q31_t)0xee0689b, (q31_t)0xeda2afe, (q31_t)0xed3ed58, (q31_t)0xecdafa9, (q31_t)0xec771f1, (q31_t)0xec1342f, (q31_t)0xebaf665, (q31_t)0xeb4b891,
+  (q31_t)0xeae7ab4, (q31_t)0xea83ccf, (q31_t)0xea1fee0, (q31_t)0xe9bc0e8, (q31_t)0xe9582e7, (q31_t)0xe8f44dd, (q31_t)0xe8906cb, (q31_t)0xe82c8af,
+  (q31_t)0xe7c8a8a, (q31_t)0xe764c5c, (q31_t)0xe700e26, (q31_t)0xe69cfe6, (q31_t)0xe63919e, (q31_t)0xe5d534d, (q31_t)0xe5714f3, (q31_t)0xe50d690,
+  (q31_t)0xe4a9824, (q31_t)0xe4459af, (q31_t)0xe3e1b32, (q31_t)0xe37dcac, (q31_t)0xe319e1d, (q31_t)0xe2b5f85, (q31_t)0xe2520e5, (q31_t)0xe1ee23c,
+  (q31_t)0xe18a38a, (q31_t)0xe1264cf, (q31_t)0xe0c260c, (q31_t)0xe05e740, (q31_t)0xdffa86b, (q31_t)0xdf9698e, (q31_t)0xdf32aa8, (q31_t)0xdecebba,
+  (q31_t)0xde6acc3, (q31_t)0xde06dc3, (q31_t)0xdda2ebb, (q31_t)0xdd3efab, (q31_t)0xdcdb091, (q31_t)0xdc77170, (q31_t)0xdc13245, (q31_t)0xdbaf313,
+  (q31_t)0xdb4b3d7, (q31_t)0xdae7494, (q31_t)0xda83548, (q31_t)0xda1f5f3, (q31_t)0xd9bb696, (q31_t)0xd957731, (q31_t)0xd8f37c3, (q31_t)0xd88f84d,
+  (q31_t)0xd82b8cf, (q31_t)0xd7c7948, (q31_t)0xd7639b9, (q31_t)0xd6ffa22, (q31_t)0xd69ba82, (q31_t)0xd637ada, (q31_t)0xd5d3b2a, (q31_t)0xd56fb71,
+  (q31_t)0xd50bbb1, (q31_t)0xd4a7be8, (q31_t)0xd443c17, (q31_t)0xd3dfc3e, (q31_t)0xd37bc5c, (q31_t)0xd317c73, (q31_t)0xd2b3c81, (q31_t)0xd24fc87,
+  (q31_t)0xd1ebc85, (q31_t)0xd187c7b, (q31_t)0xd123c69, (q31_t)0xd0bfc4f, (q31_t)0xd05bc2d, (q31_t)0xcff7c02, (q31_t)0xcf93bd0, (q31_t)0xcf2fb96,
+  (q31_t)0xcecbb53, (q31_t)0xce67b09, (q31_t)0xce03ab7, (q31_t)0xcd9fa5d, (q31_t)0xcd3b9fb, (q31_t)0xccd7991, (q31_t)0xcc7391f, (q31_t)0xcc0f8a5,
+  (q31_t)0xcbab824, (q31_t)0xcb4779a, (q31_t)0xcae3709, (q31_t)0xca7f670, (q31_t)0xca1b5cf, (q31_t)0xc9b7526, (q31_t)0xc953475, (q31_t)0xc8ef3bd,
+  (q31_t)0xc88b2fd, (q31_t)0xc827235, (q31_t)0xc7c3166, (q31_t)0xc75f08f, (q31_t)0xc6fafb0, (q31_t)0xc696ec9, (q31_t)0xc632ddb, (q31_t)0xc5cece5,
+  (q31_t)0xc56abe8, (q31_t)0xc506ae3, (q31_t)0xc4a29d6, (q31_t)0xc43e8c2, (q31_t)0xc3da7a6, (q31_t)0xc376683, (q31_t)0xc312558, (q31_t)0xc2ae425,
+  (q31_t)0xc24a2eb, (q31_t)0xc1e61aa, (q31_t)0xc182061, (q31_t)0xc11df11, (q31_t)0xc0b9db9, (q31_t)0xc055c5a, (q31_t)0xbff1af3, (q31_t)0xbf8d985,
+  (q31_t)0xbf29810, (q31_t)0xbec5693, (q31_t)0xbe6150f, (q31_t)0xbdfd383, (q31_t)0xbd991f0, (q31_t)0xbd35056, (q31_t)0xbcd0eb5, (q31_t)0xbc6cd0c,
+  (q31_t)0xbc08b5c, (q31_t)0xbba49a5, (q31_t)0xbb407e7, (q31_t)0xbadc621, (q31_t)0xba78454, (q31_t)0xba14280, (q31_t)0xb9b00a5, (q31_t)0xb94bec2,
+  (q31_t)0xb8e7cd9, (q31_t)0xb883ae8, (q31_t)0xb81f8f0, (q31_t)0xb7bb6f2, (q31_t)0xb7574ec, (q31_t)0xb6f32df, (q31_t)0xb68f0cb, (q31_t)0xb62aeaf,
+  (q31_t)0xb5c6c8d, (q31_t)0xb562a64, (q31_t)0xb4fe834, (q31_t)0xb49a5fd, (q31_t)0xb4363bf, (q31_t)0xb3d217a, (q31_t)0xb36df2e, (q31_t)0xb309cdb,
+  (q31_t)0xb2a5a81, (q31_t)0xb241820, (q31_t)0xb1dd5b9, (q31_t)0xb17934b, (q31_t)0xb1150d5, (q31_t)0xb0b0e59, (q31_t)0xb04cbd6, (q31_t)0xafe894d,
+  (q31_t)0xaf846bc, (q31_t)0xaf20425, (q31_t)0xaebc187, (q31_t)0xae57ee2, (q31_t)0xadf3c37, (q31_t)0xad8f985, (q31_t)0xad2b6cc, (q31_t)0xacc740c,
+  (q31_t)0xac63146, (q31_t)0xabfee79, (q31_t)0xab9aba6, (q31_t)0xab368cc, (q31_t)0xaad25eb, (q31_t)0xaa6e304, (q31_t)0xaa0a016, (q31_t)0xa9a5d22,
+  (q31_t)0xa941a27, (q31_t)0xa8dd725, (q31_t)0xa87941d, (q31_t)0xa81510f, (q31_t)0xa7b0dfa, (q31_t)0xa74cadf, (q31_t)0xa6e87bd, (q31_t)0xa684495,
+  (q31_t)0xa620166, (q31_t)0xa5bbe31, (q31_t)0xa557af5, (q31_t)0xa4f37b3, (q31_t)0xa48f46b, (q31_t)0xa42b11d, (q31_t)0xa3c6dc8, (q31_t)0xa362a6d,
+  (q31_t)0xa2fe70b, (q31_t)0xa29a3a3, (q31_t)0xa236035, (q31_t)0xa1d1cc1, (q31_t)0xa16d946, (q31_t)0xa1095c6, (q31_t)0xa0a523f, (q31_t)0xa040eb1,
+  (q31_t)0x9fdcb1e, (q31_t)0x9f78784, (q31_t)0x9f143e5, (q31_t)0x9eb003f, (q31_t)0x9e4bc93, (q31_t)0x9de78e1, (q31_t)0x9d83529, (q31_t)0x9d1f16b,
+  (q31_t)0x9cbada7, (q31_t)0x9c569dc, (q31_t)0x9bf260c, (q31_t)0x9b8e236, (q31_t)0x9b29e59, (q31_t)0x9ac5a77, (q31_t)0x9a6168f, (q31_t)0x99fd2a0,
+  (q31_t)0x9998eac, (q31_t)0x9934ab2, (q31_t)0x98d06b2, (q31_t)0x986c2ac, (q31_t)0x9807ea1, (q31_t)0x97a3a8f, (q31_t)0x973f678, (q31_t)0x96db25a,
+  (q31_t)0x9676e37, (q31_t)0x9612a0e, (q31_t)0x95ae5e0, (q31_t)0x954a1ab, (q31_t)0x94e5d71, (q31_t)0x9481931, (q31_t)0x941d4eb, (q31_t)0x93b90a0,
+  (q31_t)0x9354c4f, (q31_t)0x92f07f8, (q31_t)0x928c39b, (q31_t)0x9227f39, (q31_t)0x91c3ad2, (q31_t)0x915f664, (q31_t)0x90fb1f1, (q31_t)0x9096d79,
+  (q31_t)0x90328fb, (q31_t)0x8fce477, (q31_t)0x8f69fee, (q31_t)0x8f05b5f, (q31_t)0x8ea16cb, (q31_t)0x8e3d231, (q31_t)0x8dd8d92, (q31_t)0x8d748ed,
+  (q31_t)0x8d10443, (q31_t)0x8cabf93, (q31_t)0x8c47ade, (q31_t)0x8be3624, (q31_t)0x8b7f164, (q31_t)0x8b1ac9f, (q31_t)0x8ab67d4, (q31_t)0x8a52304,
+  (q31_t)0x89ede2f, (q31_t)0x8989955, (q31_t)0x8925475, (q31_t)0x88c0f90, (q31_t)0x885caa5, (q31_t)0x87f85b5, (q31_t)0x87940c1, (q31_t)0x872fbc6,
+  (q31_t)0x86cb6c7, (q31_t)0x86671c2, (q31_t)0x8602cb9, (q31_t)0x859e7aa, (q31_t)0x853a296, (q31_t)0x84d5d7d, (q31_t)0x847185e, (q31_t)0x840d33b,
+  (q31_t)0x83a8e12, (q31_t)0x83448e5, (q31_t)0x82e03b2, (q31_t)0x827be7a, (q31_t)0x821793e, (q31_t)0x81b33fc, (q31_t)0x814eeb5, (q31_t)0x80ea969,
+  (q31_t)0x8086419, (q31_t)0x8021ec3, (q31_t)0x7fbd968, (q31_t)0x7f59409, (q31_t)0x7ef4ea4, (q31_t)0x7e9093b, (q31_t)0x7e2c3cd, (q31_t)0x7dc7e5a,
+  (q31_t)0x7d638e2, (q31_t)0x7cff365, (q31_t)0x7c9ade4, (q31_t)0x7c3685d, (q31_t)0x7bd22d2, (q31_t)0x7b6dd42, (q31_t)0x7b097ad, (q31_t)0x7aa5214,
+  (q31_t)0x7a40c76, (q31_t)0x79dc6d3, (q31_t)0x797812b, (q31_t)0x7913b7f, (q31_t)0x78af5ce, (q31_t)0x784b019, (q31_t)0x77e6a5e, (q31_t)0x77824a0,
+  (q31_t)0x771dedc, (q31_t)0x76b9914, (q31_t)0x7655347, (q31_t)0x75f0d76, (q31_t)0x758c7a1, (q31_t)0x75281c6, (q31_t)0x74c3be7, (q31_t)0x745f604,
+  (q31_t)0x73fb01c, (q31_t)0x7396a30, (q31_t)0x733243f, (q31_t)0x72cde4a, (q31_t)0x7269851, (q31_t)0x7205253, (q31_t)0x71a0c50, (q31_t)0x713c64a,
+  (q31_t)0x70d803f, (q31_t)0x7073a2f, (q31_t)0x700f41b, (q31_t)0x6faae03, (q31_t)0x6f467e7, (q31_t)0x6ee21c6, (q31_t)0x6e7dba1, (q31_t)0x6e19578,
+  (q31_t)0x6db4f4a, (q31_t)0x6d50919, (q31_t)0x6cec2e3, (q31_t)0x6c87ca9, (q31_t)0x6c2366a, (q31_t)0x6bbf028, (q31_t)0x6b5a9e1, (q31_t)0x6af6396,
+  (q31_t)0x6a91d47, (q31_t)0x6a2d6f4, (q31_t)0x69c909d, (q31_t)0x6964a42, (q31_t)0x69003e3, (q31_t)0x689bd80, (q31_t)0x6837718, (q31_t)0x67d30ad,
+  (q31_t)0x676ea3d, (q31_t)0x670a3ca, (q31_t)0x66a5d53, (q31_t)0x66416d8, (q31_t)0x65dd058, (q31_t)0x65789d5, (q31_t)0x651434e, (q31_t)0x64afcc3,
+  (q31_t)0x644b634, (q31_t)0x63e6fa2, (q31_t)0x638290b, (q31_t)0x631e271, (q31_t)0x62b9bd3, (q31_t)0x6255531, (q31_t)0x61f0e8b, (q31_t)0x618c7e1,
+  (q31_t)0x6128134, (q31_t)0x60c3a83, (q31_t)0x605f3ce, (q31_t)0x5ffad15, (q31_t)0x5f96659, (q31_t)0x5f31f99, (q31_t)0x5ecd8d6, (q31_t)0x5e6920e,
+  (q31_t)0x5e04b43, (q31_t)0x5da0475, (q31_t)0x5d3bda3, (q31_t)0x5cd76cd, (q31_t)0x5c72ff4, (q31_t)0x5c0e917, (q31_t)0x5baa237, (q31_t)0x5b45b53,
+  (q31_t)0x5ae146b, (q31_t)0x5a7cd80, (q31_t)0x5a18692, (q31_t)0x59b3fa0, (q31_t)0x594f8aa, (q31_t)0x58eb1b2, (q31_t)0x5886ab5, (q31_t)0x58223b6,
+  (q31_t)0x57bdcb3, (q31_t)0x57595ac, (q31_t)0x56f4ea2, (q31_t)0x5690795, (q31_t)0x562c085, (q31_t)0x55c7971, (q31_t)0x556325a, (q31_t)0x54feb3f,
+  (q31_t)0x549a422, (q31_t)0x5435d01, (q31_t)0x53d15dd, (q31_t)0x536ceb5, (q31_t)0x530878a, (q31_t)0x52a405d, (q31_t)0x523f92c, (q31_t)0x51db1f7,
+  (q31_t)0x5176ac0, (q31_t)0x5112385, (q31_t)0x50adc48, (q31_t)0x5049507, (q31_t)0x4fe4dc3, (q31_t)0x4f8067c, (q31_t)0x4f1bf32, (q31_t)0x4eb77e5,
+  (q31_t)0x4e53095, (q31_t)0x4dee942, (q31_t)0x4d8a1ec, (q31_t)0x4d25a93, (q31_t)0x4cc1337, (q31_t)0x4c5cbd8, (q31_t)0x4bf8476, (q31_t)0x4b93d11,
+  (q31_t)0x4b2f5a9, (q31_t)0x4acae3e, (q31_t)0x4a666d1, (q31_t)0x4a01f60, (q31_t)0x499d7ed, (q31_t)0x4939077, (q31_t)0x48d48fe, (q31_t)0x4870182,
+  (q31_t)0x480ba04, (q31_t)0x47a7282, (q31_t)0x4742afe, (q31_t)0x46de377, (q31_t)0x4679bee, (q31_t)0x4615461, (q31_t)0x45b0cd2, (q31_t)0x454c541,
+  (q31_t)0x44e7dac, (q31_t)0x4483615, (q31_t)0x441ee7c, (q31_t)0x43ba6df, (q31_t)0x4355f40, (q31_t)0x42f179f, (q31_t)0x428cffb, (q31_t)0x4228854,
+  (q31_t)0x41c40ab, (q31_t)0x415f8ff, (q31_t)0x40fb151, (q31_t)0x40969a0, (q31_t)0x40321ed, (q31_t)0x3fcda37, (q31_t)0x3f6927f, (q31_t)0x3f04ac4,
+  (q31_t)0x3ea0307, (q31_t)0x3e3bb48, (q31_t)0x3dd7386, (q31_t)0x3d72bc2, (q31_t)0x3d0e3fb, (q31_t)0x3ca9c32, (q31_t)0x3c45467, (q31_t)0x3be0c99,
+  (q31_t)0x3b7c4c9, (q31_t)0x3b17cf7, (q31_t)0x3ab3523, (q31_t)0x3a4ed4c, (q31_t)0x39ea573, (q31_t)0x3985d97, (q31_t)0x39215ba, (q31_t)0x38bcdda,
+  (q31_t)0x38585f8, (q31_t)0x37f3e14, (q31_t)0x378f62e, (q31_t)0x372ae46, (q31_t)0x36c665b, (q31_t)0x3661e6f, (q31_t)0x35fd680, (q31_t)0x3598e8f,
+  (q31_t)0x353469c, (q31_t)0x34cfea8, (q31_t)0x346b6b1, (q31_t)0x3406eb8, (q31_t)0x33a26bd, (q31_t)0x333dec0, (q31_t)0x32d96c1, (q31_t)0x3274ec0,
+  (q31_t)0x32106bd, (q31_t)0x31abeb9, (q31_t)0x31476b2, (q31_t)0x30e2ea9, (q31_t)0x307e69f, (q31_t)0x3019e93, (q31_t)0x2fb5684, (q31_t)0x2f50e74,
+  (q31_t)0x2eec663, (q31_t)0x2e87e4f, (q31_t)0x2e2363a, (q31_t)0x2dbee22, (q31_t)0x2d5a609, (q31_t)0x2cf5def, (q31_t)0x2c915d2, (q31_t)0x2c2cdb4,
+  (q31_t)0x2bc8594, (q31_t)0x2b63d73, (q31_t)0x2aff54f, (q31_t)0x2a9ad2a, (q31_t)0x2a36504, (q31_t)0x29d1cdc, (q31_t)0x296d4b2, (q31_t)0x2908c87,
+  (q31_t)0x28a445a, (q31_t)0x283fc2b, (q31_t)0x27db3fb, (q31_t)0x2776bc9, (q31_t)0x2712396, (q31_t)0x26adb62, (q31_t)0x264932b, (q31_t)0x25e4af4,
+  (q31_t)0x25802bb, (q31_t)0x251ba80, (q31_t)0x24b7244, (q31_t)0x2452a07, (q31_t)0x23ee1c8, (q31_t)0x2389988, (q31_t)0x2325147, (q31_t)0x22c0904,
+  (q31_t)0x225c0bf, (q31_t)0x21f787a, (q31_t)0x2193033, (q31_t)0x212e7eb, (q31_t)0x20c9fa1, (q31_t)0x2065757, (q31_t)0x2000f0b, (q31_t)0x1f9c6be,
+  (q31_t)0x1f37e6f, (q31_t)0x1ed3620, (q31_t)0x1e6edcf, (q31_t)0x1e0a57d, (q31_t)0x1da5d2a, (q31_t)0x1d414d6, (q31_t)0x1cdcc80, (q31_t)0x1c7842a,
+  (q31_t)0x1c13bd2, (q31_t)0x1baf37a, (q31_t)0x1b4ab20, (q31_t)0x1ae62c5, (q31_t)0x1a81a69, (q31_t)0x1a1d20c, (q31_t)0x19b89ae, (q31_t)0x1954150,
+  (q31_t)0x18ef8f0, (q31_t)0x188b08f, (q31_t)0x182682d, (q31_t)0x17c1fcb, (q31_t)0x175d767, (q31_t)0x16f8f03, (q31_t)0x169469d, (q31_t)0x162fe37,
+  (q31_t)0x15cb5d0, (q31_t)0x1566d68, (q31_t)0x15024ff, (q31_t)0x149dc96, (q31_t)0x143942b, (q31_t)0x13d4bc0, (q31_t)0x1370354, (q31_t)0x130bae7,
+  (q31_t)0x12a727a, (q31_t)0x1242a0c, (q31_t)0x11de19d, (q31_t)0x117992e, (q31_t)0x11150be, (q31_t)0x10b084d, (q31_t)0x104bfdb, (q31_t)0xfe7769,
+  (q31_t)0xf82ef6, (q31_t)0xf1e683, (q31_t)0xeb9e0f, (q31_t)0xe5559b, (q31_t)0xdf0d26, (q31_t)0xd8c4b0, (q31_t)0xd27c3a, (q31_t)0xcc33c3,
+  (q31_t)0xc5eb4c, (q31_t)0xbfa2d5, (q31_t)0xb95a5d, (q31_t)0xb311e4, (q31_t)0xacc96b, (q31_t)0xa680f2, (q31_t)0xa03878, (q31_t)0x99effe,
+  (q31_t)0x93a784, (q31_t)0x8d5f09, (q31_t)0x87168e, (q31_t)0x80ce12, (q31_t)0x7a8597, (q31_t)0x743d1a, (q31_t)0x6df49e, (q31_t)0x67ac21,
+  (q31_t)0x6163a5, (q31_t)0x5b1b27, (q31_t)0x54d2aa, (q31_t)0x4e8a2c, (q31_t)0x4841af, (q31_t)0x41f931, (q31_t)0x3bb0b3, (q31_t)0x356835,
+  (q31_t)0x2f1fb6, (q31_t)0x28d738, (q31_t)0x228eb9, (q31_t)0x1c463b, (q31_t)0x15fdbc, (q31_t)0xfb53d, (q31_t)0x96cbe, (q31_t)0x3243f
+};
+  #endif
+
+/**
+  @} end of DCT4_IDCT4_Table group
+ */
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
+/**
+  @brief  Q15 table for reciprocal
+*/
+const q15_t __ALIGNED(4) armRecipTableQ15[64] = {
+ 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
+ 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
+ 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
+ 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
+ 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
+ 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
+ 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
+ 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
+ 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
+ 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
+ 0x41CC, 0x4146, 0x40C2, 0x4040
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
+
+/**
+  @brief  Q31 table for reciprocal
+*/
+const q31_t armRecipTableQ31[64] = {
+  0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
+  0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
+  0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
+  0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
+  0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
+  0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
+  0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
+  0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
+  0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
+  0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
+  0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+/**
+  @par
+  Example code for the generation of the floating-point sine table:
+  
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  }

+ @par
+  where PI value is  3.14159265358979
+ */
+const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = {
+   0.00000000f, 0.01227154f, 0.02454123f, 0.03680722f, 0.04906767f, 0.06132074f,
+   0.07356456f, 0.08579731f, 0.09801714f, 0.11022221f, 0.12241068f, 0.13458071f,
+   0.14673047f, 0.15885814f, 0.17096189f, 0.18303989f, 0.19509032f, 0.20711138f,
+   0.21910124f, 0.23105811f, 0.24298018f, 0.25486566f, 0.26671276f, 0.27851969f,
+   0.29028468f, 0.30200595f, 0.31368174f, 0.32531029f, 0.33688985f, 0.34841868f,
+   0.35989504f, 0.37131719f, 0.38268343f, 0.39399204f, 0.40524131f, 0.41642956f,
+   0.42755509f, 0.43861624f, 0.44961133f, 0.46053871f, 0.47139674f, 0.48218377f,
+   0.49289819f, 0.50353838f, 0.51410274f, 0.52458968f, 0.53499762f, 0.54532499f,
+   0.55557023f, 0.56573181f, 0.57580819f, 0.58579786f, 0.59569930f, 0.60551104f,
+   0.61523159f, 0.62485949f, 0.63439328f, 0.64383154f, 0.65317284f, 0.66241578f,
+   0.67155895f, 0.68060100f, 0.68954054f, 0.69837625f, 0.70710678f, 0.71573083f,
+   0.72424708f, 0.73265427f, 0.74095113f, 0.74913639f, 0.75720885f, 0.76516727f,
+   0.77301045f, 0.78073723f, 0.78834643f, 0.79583690f, 0.80320753f, 0.81045720f,
+   0.81758481f, 0.82458930f, 0.83146961f, 0.83822471f, 0.84485357f, 0.85135519f,
+   0.85772861f, 0.86397286f, 0.87008699f, 0.87607009f, 0.88192126f, 0.88763962f,
+   0.89322430f, 0.89867447f, 0.90398929f, 0.90916798f, 0.91420976f, 0.91911385f,
+   0.92387953f, 0.92850608f, 0.93299280f, 0.93733901f, 0.94154407f, 0.94560733f,
+   0.94952818f, 0.95330604f, 0.95694034f, 0.96043052f, 0.96377607f, 0.96697647f,
+   0.97003125f, 0.97293995f, 0.97570213f, 0.97831737f, 0.98078528f, 0.98310549f,
+   0.98527764f, 0.98730142f, 0.98917651f, 0.99090264f, 0.99247953f, 0.99390697f,
+   0.99518473f, 0.99631261f, 0.99729046f, 0.99811811f, 0.99879546f, 0.99932238f,
+   0.99969882f, 0.99992470f, 1.00000000f, 0.99992470f, 0.99969882f, 0.99932238f,
+   0.99879546f, 0.99811811f, 0.99729046f, 0.99631261f, 0.99518473f, 0.99390697f,
+   0.99247953f, 0.99090264f, 0.98917651f, 0.98730142f, 0.98527764f, 0.98310549f,
+   0.98078528f, 0.97831737f, 0.97570213f, 0.97293995f, 0.97003125f, 0.96697647f,
+   0.96377607f, 0.96043052f, 0.95694034f, 0.95330604f, 0.94952818f, 0.94560733f,
+   0.94154407f, 0.93733901f, 0.93299280f, 0.92850608f, 0.92387953f, 0.91911385f,
+   0.91420976f, 0.90916798f, 0.90398929f, 0.89867447f, 0.89322430f, 0.88763962f,
+   0.88192126f, 0.87607009f, 0.87008699f, 0.86397286f, 0.85772861f, 0.85135519f,
+   0.84485357f, 0.83822471f, 0.83146961f, 0.82458930f, 0.81758481f, 0.81045720f,
+   0.80320753f, 0.79583690f, 0.78834643f, 0.78073723f, 0.77301045f, 0.76516727f,
+   0.75720885f, 0.74913639f, 0.74095113f, 0.73265427f, 0.72424708f, 0.71573083f,
+   0.70710678f, 0.69837625f, 0.68954054f, 0.68060100f, 0.67155895f, 0.66241578f,
+   0.65317284f, 0.64383154f, 0.63439328f, 0.62485949f, 0.61523159f, 0.60551104f,
+   0.59569930f, 0.58579786f, 0.57580819f, 0.56573181f, 0.55557023f, 0.54532499f,
+   0.53499762f, 0.52458968f, 0.51410274f, 0.50353838f, 0.49289819f, 0.48218377f,
+   0.47139674f, 0.46053871f, 0.44961133f, 0.43861624f, 0.42755509f, 0.41642956f,
+   0.40524131f, 0.39399204f, 0.38268343f, 0.37131719f, 0.35989504f, 0.34841868f,
+   0.33688985f, 0.32531029f, 0.31368174f, 0.30200595f, 0.29028468f, 0.27851969f,
+   0.26671276f, 0.25486566f, 0.24298018f, 0.23105811f, 0.21910124f, 0.20711138f,
+   0.19509032f, 0.18303989f, 0.17096189f, 0.15885814f, 0.14673047f, 0.13458071f,
+   0.12241068f, 0.11022221f, 0.09801714f, 0.08579731f, 0.07356456f, 0.06132074f,
+   0.04906767f, 0.03680722f, 0.02454123f, 0.01227154f, 0.00000000f, -0.01227154f,
+   -0.02454123f, -0.03680722f, -0.04906767f, -0.06132074f, -0.07356456f,
+   -0.08579731f, -0.09801714f, -0.11022221f, -0.12241068f, -0.13458071f,
+   -0.14673047f, -0.15885814f, -0.17096189f, -0.18303989f, -0.19509032f,
+   -0.20711138f, -0.21910124f, -0.23105811f, -0.24298018f, -0.25486566f,
+   -0.26671276f, -0.27851969f, -0.29028468f, -0.30200595f, -0.31368174f,
+   -0.32531029f, -0.33688985f, -0.34841868f, -0.35989504f, -0.37131719f,
+   -0.38268343f, -0.39399204f, -0.40524131f, -0.41642956f, -0.42755509f,
+   -0.43861624f, -0.44961133f, -0.46053871f, -0.47139674f, -0.48218377f,
+   -0.49289819f, -0.50353838f, -0.51410274f, -0.52458968f, -0.53499762f,
+   -0.54532499f, -0.55557023f, -0.56573181f, -0.57580819f, -0.58579786f,
+   -0.59569930f, -0.60551104f, -0.61523159f, -0.62485949f, -0.63439328f,
+   -0.64383154f, -0.65317284f, -0.66241578f, -0.67155895f, -0.68060100f,
+   -0.68954054f, -0.69837625f, -0.70710678f, -0.71573083f, -0.72424708f,
+   -0.73265427f, -0.74095113f, -0.74913639f, -0.75720885f, -0.76516727f,
+   -0.77301045f, -0.78073723f, -0.78834643f, -0.79583690f, -0.80320753f,
+   -0.81045720f, -0.81758481f, -0.82458930f, -0.83146961f, -0.83822471f,
+   -0.84485357f, -0.85135519f, -0.85772861f, -0.86397286f, -0.87008699f,
+   -0.87607009f, -0.88192126f, -0.88763962f, -0.89322430f, -0.89867447f,
+   -0.90398929f, -0.90916798f, -0.91420976f, -0.91911385f, -0.92387953f,
+   -0.92850608f, -0.93299280f, -0.93733901f, -0.94154407f, -0.94560733f,
+   -0.94952818f, -0.95330604f, -0.95694034f, -0.96043052f, -0.96377607f,
+   -0.96697647f, -0.97003125f, -0.97293995f, -0.97570213f, -0.97831737f,
+   -0.98078528f, -0.98310549f, -0.98527764f, -0.98730142f, -0.98917651f,
+   -0.99090264f, -0.99247953f, -0.99390697f, -0.99518473f, -0.99631261f,
+   -0.99729046f, -0.99811811f, -0.99879546f, -0.99932238f, -0.99969882f,
+   -0.99992470f, -1.00000000f, -0.99992470f, -0.99969882f, -0.99932238f,
+   -0.99879546f, -0.99811811f, -0.99729046f, -0.99631261f, -0.99518473f,
+   -0.99390697f, -0.99247953f, -0.99090264f, -0.98917651f, -0.98730142f,
+   -0.98527764f, -0.98310549f, -0.98078528f, -0.97831737f, -0.97570213f,
+   -0.97293995f, -0.97003125f, -0.96697647f, -0.96377607f, -0.96043052f,
+   -0.95694034f, -0.95330604f, -0.94952818f, -0.94560733f, -0.94154407f,
+   -0.93733901f, -0.93299280f, -0.92850608f, -0.92387953f, -0.91911385f,
+   -0.91420976f, -0.90916798f, -0.90398929f, -0.89867447f, -0.89322430f,
+   -0.88763962f, -0.88192126f, -0.87607009f, -0.87008699f, -0.86397286f,
+   -0.85772861f, -0.85135519f, -0.84485357f, -0.83822471f, -0.83146961f,
+   -0.82458930f, -0.81758481f, -0.81045720f, -0.80320753f, -0.79583690f,
+   -0.78834643f, -0.78073723f, -0.77301045f, -0.76516727f, -0.75720885f,
+   -0.74913639f, -0.74095113f, -0.73265427f, -0.72424708f, -0.71573083f,
+   -0.70710678f, -0.69837625f, -0.68954054f, -0.68060100f, -0.67155895f,
+   -0.66241578f, -0.65317284f, -0.64383154f, -0.63439328f, -0.62485949f,
+   -0.61523159f, -0.60551104f, -0.59569930f, -0.58579786f, -0.57580819f,
+   -0.56573181f, -0.55557023f, -0.54532499f, -0.53499762f, -0.52458968f,
+   -0.51410274f, -0.50353838f, -0.49289819f, -0.48218377f, -0.47139674f,
+   -0.46053871f, -0.44961133f, -0.43861624f, -0.42755509f, -0.41642956f,
+   -0.40524131f, -0.39399204f, -0.38268343f, -0.37131719f, -0.35989504f,
+   -0.34841868f, -0.33688985f, -0.32531029f, -0.31368174f, -0.30200595f,
+   -0.29028468f, -0.27851969f, -0.26671276f, -0.25486566f, -0.24298018f,
+   -0.23105811f, -0.21910124f, -0.20711138f, -0.19509032f, -0.18303989f,
+   -0.17096189f, -0.15885814f, -0.14673047f, -0.13458071f, -0.12241068f,
+   -0.11022221f, -0.09801714f, -0.08579731f, -0.07356456f, -0.06132074f,
+   -0.04906767f, -0.03680722f, -0.02454123f, -0.01227154f, -0.00000000f
+};
+#endif /* defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
+/**
+  @par
+  Table values are in Q31 (1.31 fixed-point format) and generation is done in
+  three steps.  First, generate sin values in floating point:
+  
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  } 

+  where PI value is 3.14159265358979
+ @par
+  Second, convert floating-point to Q31 (Fixed point):
+ 	(sinTable[i] * pow(2, 31))
+ @par
+  Finally, round to the nearest integer value:
+  	sinTable[i] += (sinTable[i] > 0 ? 0.5 : -0.5);
+ */
+const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = {
+	0L, 26352928L, 52701887L, 79042909L, 105372028L, 131685278L, 157978697L,
+	184248325L, 210490206L, 236700388L, 262874923L, 289009871L, 315101295L,
+	341145265L, 367137861L, 393075166L, 418953276L, 444768294L, 470516330L,
+	496193509L, 521795963L, 547319836L, 572761285L, 598116479L, 623381598L,
+	648552838L, 673626408L, 698598533L, 723465451L, 748223418L, 772868706L,
+	797397602L, 821806413L, 846091463L, 870249095L, 894275671L, 918167572L,
+	941921200L, 965532978L, 988999351L, 1012316784L, 1035481766L, 1058490808L,
+	1081340445L, 1104027237L, 1126547765L, 1148898640L, 1171076495L, 1193077991L,
+	1214899813L, 1236538675L, 1257991320L, 1279254516L, 1300325060L, 1321199781L,
+	1341875533L, 1362349204L, 1382617710L, 1402678000L, 1422527051L, 1442161874L,
+	1461579514L, 1480777044L, 1499751576L, 1518500250L, 1537020244L, 1555308768L,
+	1573363068L, 1591180426L, 1608758157L, 1626093616L, 1643184191L, 1660027308L,
+	1676620432L, 1692961062L, 1709046739L, 1724875040L, 1740443581L, 1755750017L,
+	1770792044L, 1785567396L, 1800073849L, 1814309216L, 1828271356L, 1841958164L,
+	1855367581L, 1868497586L, 1881346202L, 1893911494L, 1906191570L, 1918184581L,
+	1929888720L, 1941302225L, 1952423377L, 1963250501L, 1973781967L, 1984016189L,
+	1993951625L, 2003586779L, 2012920201L, 2021950484L, 2030676269L, 2039096241L,
+	2047209133L, 2055013723L, 2062508835L, 2069693342L, 2076566160L, 2083126254L,
+	2089372638L, 2095304370L, 2100920556L, 2106220352L, 2111202959L, 2115867626L,
+	2120213651L, 2124240380L, 2127947206L, 2131333572L, 2134398966L, 2137142927L,
+	2139565043L, 2141664948L, 2143442326L, 2144896910L, 2146028480L, 2146836866L,
+	2147321946L, 2147483647L, 2147321946L, 2146836866L, 2146028480L, 2144896910L,
+	2143442326L, 2141664948L, 2139565043L, 2137142927L, 2134398966L, 2131333572L,
+	2127947206L, 2124240380L, 2120213651L, 2115867626L, 2111202959L, 2106220352L,
+	2100920556L, 2095304370L, 2089372638L, 2083126254L, 2076566160L, 2069693342L,
+	2062508835L, 2055013723L, 2047209133L, 2039096241L, 2030676269L, 2021950484L,
+	2012920201L, 2003586779L, 1993951625L, 1984016189L, 1973781967L, 1963250501L,
+	1952423377L, 1941302225L, 1929888720L, 1918184581L, 1906191570L, 1893911494L,
+	1881346202L, 1868497586L, 1855367581L, 1841958164L, 1828271356L, 1814309216L,
+	1800073849L, 1785567396L, 1770792044L, 1755750017L, 1740443581L, 1724875040L,
+	1709046739L, 1692961062L, 1676620432L, 1660027308L, 1643184191L, 1626093616L,
+	1608758157L, 1591180426L, 1573363068L, 1555308768L, 1537020244L, 1518500250L,
+	1499751576L, 1480777044L, 1461579514L, 1442161874L, 1422527051L, 1402678000L,
+	1382617710L, 1362349204L, 1341875533L, 1321199781L, 1300325060L, 1279254516L,
+	1257991320L, 1236538675L, 1214899813L, 1193077991L, 1171076495L, 1148898640L,
+	1126547765L, 1104027237L, 1081340445L, 1058490808L, 1035481766L, 1012316784L,
+	988999351L, 965532978L, 941921200L, 918167572L, 894275671L, 870249095L,
+	846091463L, 821806413L, 797397602L, 772868706L, 748223418L, 723465451L,
+	698598533L, 673626408L, 648552838L, 623381598L, 598116479L, 572761285L,
+	547319836L, 521795963L, 496193509L, 470516330L, 444768294L, 418953276L,
+	393075166L, 367137861L, 341145265L, 315101295L, 289009871L, 262874923L,
+	236700388L, 210490206L, 184248325L, 157978697L, 131685278L, 105372028L,
+	79042909L, 52701887L, 26352928L, 0L, -26352928L, -52701887L, -79042909L,
+	-105372028L, -131685278L, -157978697L, -184248325L, -210490206L, -236700388L,
+	-262874923L, -289009871L, -315101295L, -341145265L, -367137861L, -393075166L,
+	-418953276L, -444768294L, -470516330L, -496193509L, -521795963L, -547319836L,
+	-572761285L, -598116479L, -623381598L, -648552838L, -673626408L, -698598533L,
+	-723465451L, -748223418L, -772868706L, -797397602L, -821806413L, -846091463L,
+	-870249095L, -894275671L, -918167572L, -941921200L, -965532978L, -988999351L,
+	-1012316784L, -1035481766L, -1058490808L, -1081340445L, -1104027237L,
+	-1126547765L, -1148898640L, -1171076495L, -1193077991L, -1214899813L,
+	-1236538675L, -1257991320L, -1279254516L, -1300325060L, -1321199781L,
+	-1341875533L, -1362349204L, -1382617710L, -1402678000L, -1422527051L,
+	-1442161874L, -1461579514L, -1480777044L, -1499751576L, -1518500250L,
+	-1537020244L, -1555308768L, -1573363068L, -1591180426L, -1608758157L,
+	-1626093616L, -1643184191L, -1660027308L, -1676620432L, -1692961062L,
+	-1709046739L, -1724875040L, -1740443581L, -1755750017L, -1770792044L,
+	-1785567396L, -1800073849L, -1814309216L, -1828271356L, -1841958164L,
+	-1855367581L, -1868497586L, -1881346202L, -1893911494L, -1906191570L,
+	-1918184581L, -1929888720L, -1941302225L, -1952423377L, -1963250501L,
+	-1973781967L, -1984016189L, -1993951625L, -2003586779L, -2012920201L,
+	-2021950484L, -2030676269L, -2039096241L, -2047209133L, -2055013723L,
+	-2062508835L, -2069693342L, -2076566160L, -2083126254L, -2089372638L,
+	-2095304370L, -2100920556L, -2106220352L, -2111202959L, -2115867626L,
+	-2120213651L, -2124240380L, -2127947206L, -2131333572L, -2134398966L,
+	-2137142927L, -2139565043L, -2141664948L, -2143442326L, -2144896910L,
+	-2146028480L, -2146836866L, -2147321946L, (q31_t)0x80000000, -2147321946L,
+	-2146836866L, -2146028480L, -2144896910L, -2143442326L, -2141664948L,
+	-2139565043L, -2137142927L, -2134398966L, -2131333572L, -2127947206L,
+	-2124240380L, -2120213651L, -2115867626L, -2111202959L, -2106220352L,
+	-2100920556L, -2095304370L, -2089372638L, -2083126254L, -2076566160L,
+	-2069693342L, -2062508835L, -2055013723L, -2047209133L, -2039096241L,
+	-2030676269L, -2021950484L, -2012920201L, -2003586779L, -1993951625L,
+	-1984016189L, -1973781967L, -1963250501L, -1952423377L, -1941302225L,
+	-1929888720L, -1918184581L, -1906191570L, -1893911494L, -1881346202L,
+	-1868497586L, -1855367581L, -1841958164L, -1828271356L, -1814309216L,
+	-1800073849L, -1785567396L, -1770792044L, -1755750017L, -1740443581L,
+	-1724875040L, -1709046739L, -1692961062L, -1676620432L, -1660027308L,
+	-1643184191L, -1626093616L, -1608758157L, -1591180426L, -1573363068L,
+	-1555308768L, -1537020244L, -1518500250L, -1499751576L, -1480777044L,
+	-1461579514L, -1442161874L, -1422527051L, -1402678000L, -1382617710L,
+	-1362349204L, -1341875533L, -1321199781L, -1300325060L, -1279254516L,
+	-1257991320L, -1236538675L, -1214899813L, -1193077991L, -1171076495L,
+	-1148898640L, -1126547765L, -1104027237L, -1081340445L, -1058490808L,
+	-1035481766L, -1012316784L, -988999351L, -965532978L, -941921200L,
+	-918167572L, -894275671L, -870249095L, -846091463L, -821806413L, -797397602L,
+	-772868706L, -748223418L, -723465451L, -698598533L, -673626408L, -648552838L,
+	-623381598L, -598116479L, -572761285L, -547319836L, -521795963L, -496193509L,
+	-470516330L, -444768294L, -418953276L, -393075166L, -367137861L, -341145265L,
+	-315101295L, -289009871L, -262874923L, -236700388L, -210490206L, -184248325L,
+	-157978697L, -131685278L, -105372028L, -79042909L, -52701887L, -26352928L, 0
+};
+
+#endif /* defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
+/**
+  @par
+  Table values are in Q15 (1.15 fixed-point format) and generation is done in
+  three steps.  First,  generate sin values in floating point:
+  
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  } 

+  where PI value is  3.14159265358979
+ @par
+  Second, convert floating-point to Q15 (Fixed point):
+ 	(sinTable[i] * pow(2, 15))
+ @par
+  Finally, round to the nearest integer value:
+  	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
+ */
+const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = {
+	0, 402, 804, 1206, 1608, 2009, 2411, 2811, 3212, 3612, 4011, 4410, 4808,
+	5205, 5602, 5998, 6393, 6787, 7180, 7571, 7962, 8351, 8740, 9127, 9512,
+	9896, 10279, 10660, 11039, 11417, 11793, 12167, 12540, 12910, 13279,
+	13646, 14010, 14373, 14733, 15091, 15447, 15800, 16151, 16500, 16846,
+	17190, 17531, 17869, 18205, 18538, 18868, 19195, 19520, 19841, 20160,
+	20475, 20788, 21097, 21403, 21706, 22006, 22302, 22595, 22884, 23170,
+	23453, 23732, 24008, 24279, 24548, 24812, 25073, 25330, 25583, 25833,
+	26078, 26320, 26557, 26791, 27020, 27246, 27467, 27684, 27897, 28106,
+	28311, 28511, 28707, 28899, 29086, 29269, 29448, 29622, 29792, 29957,
+	30118, 30274, 30425, 30572, 30715, 30853, 30986, 31114, 31238, 31357,
+	31471, 31581, 31686, 31786, 31881, 31972, 32058, 32138, 32214, 32286,
+	32352, 32413, 32470, 32522, 32568, 32610, 32647, 32679, 32706, 32729,
+	32746, 32758, 32766, 32767, 32766, 32758, 32746, 32729, 32706, 32679,
+	32647, 32610, 32568, 32522, 32470, 32413, 32352, 32286, 32214, 32138,
+	32058, 31972, 31881, 31786, 31686, 31581, 31471, 31357, 31238, 31114,
+	30986, 30853, 30715, 30572, 30425, 30274, 30118, 29957, 29792, 29622,
+	29448, 29269, 29086, 28899, 28707, 28511, 28311, 28106, 27897, 27684,
+	27467, 27246, 27020, 26791, 26557, 26320, 26078, 25833, 25583, 25330,
+	25073, 24812, 24548, 24279, 24008, 23732, 23453, 23170, 22884, 22595,
+	22302, 22006, 21706, 21403, 21097, 20788, 20475, 20160, 19841, 19520,
+	19195, 18868, 18538, 18205, 17869, 17531, 17190, 16846, 16500, 16151,
+	15800, 15447, 15091, 14733, 14373, 14010, 13646, 13279, 12910, 12540,
+	12167, 11793, 11417, 11039, 10660, 10279, 9896, 9512, 9127, 8740, 8351,
+	7962, 7571, 7180, 6787, 6393, 5998, 5602, 5205, 4808, 4410, 4011, 3612,
+	3212, 2811, 2411, 2009, 1608, 1206, 804, 402, 0, -402, -804, -1206,
+	-1608, -2009, -2411, -2811, -3212, -3612, -4011, -4410, -4808, -5205,
+	-5602, -5998, -6393, -6787, -7180, -7571, -7962, -8351, -8740, -9127,
+	-9512, -9896, -10279, -10660, -11039, -11417, -11793, -12167, -12540,
+	-12910, -13279, -13646, -14010, -14373, -14733, -15091, -15447, -15800,
+	-16151, -16500, -16846, -17190, -17531, -17869, -18205, -18538, -18868,
+	-19195, -19520, -19841, -20160, -20475, -20788, -21097, -21403, -21706,
+	-22006, -22302, -22595, -22884, -23170, -23453, -23732, -24008, -24279,
+	-24548, -24812, -25073, -25330, -25583, -25833, -26078, -26320, -26557,
+	-26791, -27020, -27246, -27467, -27684, -27897, -28106, -28311, -28511,
+	-28707, -28899, -29086, -29269, -29448, -29622, -29792, -29957, -30118,
+	-30274, -30425, -30572, -30715, -30853, -30986, -31114, -31238, -31357,
+	-31471, -31581, -31686, -31786, -31881, -31972, -32058, -32138, -32214,
+	-32286, -32352, -32413, -32470, -32522, -32568, -32610, -32647, -32679,
+	-32706, -32729, -32746, -32758, -32766, -32768, -32766, -32758, -32746,
+	-32729, -32706, -32679, -32647, -32610, -32568, -32522, -32470, -32413,
+	-32352, -32286, -32214, -32138, -32058, -31972, -31881, -31786, -31686,
+	-31581, -31471, -31357, -31238, -31114, -30986, -30853, -30715, -30572,
+	-30425, -30274, -30118, -29957, -29792, -29622, -29448, -29269, -29086,
+	-28899, -28707, -28511, -28311, -28106, -27897, -27684, -27467, -27246,
+	-27020, -26791, -26557, -26320, -26078, -25833, -25583, -25330, -25073,
+	-24812, -24548, -24279, -24008, -23732, -23453, -23170, -22884, -22595,
+	-22302, -22006, -21706, -21403, -21097, -20788, -20475, -20160, -19841,
+	-19520, -19195, -18868, -18538, -18205, -17869, -17531, -17190, -16846,
+	-16500, -16151, -15800, -15447, -15091, -14733, -14373, -14010, -13646,
+	-13279, -12910, -12540, -12167, -11793, -11417, -11039, -10660, -10279,
+	-9896, -9512, -9127, -8740, -8351, -7962, -7571, -7180, -6787, -6393,
+	-5998, -5602, -5205, -4808, -4410, -4011, -3612, -3212, -2811, -2411,
+	-2009, -1608, -1206, -804, -402, 0
+};
+#endif /* defined(ARM_ALL_FAST_TABLES) */
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs.c b/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
new file mode 100644
index 00000000..b70c0aed
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
@@ -0,0 +1,486 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs.c
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions.
+ *
+ * $Date:        27. January 2017
+ * $Revision:    V.1.5.1
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_const_structs.h"
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) 
+
+/* Floating-point structs */
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
+  16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
+  32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
+  64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
+  128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
+  256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
+  512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
+  1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
+  2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
+  4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
+};
+#endif
+
+/* Fixed-point structs */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
+  16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
+  32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
+  64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
+  128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
+  256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
+  512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
+  1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
+  2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
+  4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
+  16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
+  32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
+  64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
+  128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
+  256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
+  512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
+  1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
+  2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
+  4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+};
+#endif
+
+/* Structure for real-value inputs */
+/* Floating-point structs */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {
+  { 16, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
+  32U,
+  (float32_t *)twiddleCoef_rfft_32
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {
+   { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
+  64U,
+  (float32_t *)twiddleCoef_rfft_64
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {
+  { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
+  128U,
+  (float32_t *)twiddleCoef_rfft_128
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {
+  { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
+  256U,
+  (float32_t *)twiddleCoef_rfft_256
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {
+  { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
+  512U,
+  (float32_t *)twiddleCoef_rfft_512
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {
+  { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
+  1024U,
+  (float32_t *)twiddleCoef_rfft_1024
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {
+  { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
+  2048U,
+  (float32_t *)twiddleCoef_rfft_2048
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {
+  { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
+  4096U,
+  (float32_t *)twiddleCoef_rfft_4096
+};
+#endif
+
+/* Fixed-point structs */
+/* q31_t */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {
+  32U,
+  0,
+  1,
+  256U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len16
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {
+  64U,
+  0,
+  1,
+  128U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len32
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {
+  128U,
+  0,
+  1,
+  64U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len64
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {
+  256U,
+  0,
+  1,
+  32U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len128
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {
+  512U,
+  0,
+  1,
+  16U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len256
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {
+  1024U,
+  0,
+  1,
+  8U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len512
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {
+  2048U,
+  0,
+  1,
+  4U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len1024
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {
+  4096U,
+  0,
+  1,
+  2U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len2048
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {
+  8192U,
+  0,
+  1,
+  1U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len4096
+};
+#endif
+
+/* q15_t */
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {
+  32U,
+  0,
+  1,
+  256U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len16
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {
+  64U,
+  0,
+  1,
+  128U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len32
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {
+  128U,
+  0,
+  1,
+  64U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len64
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {
+  256U,
+  0,
+  1,
+  32U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len128
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {
+  512U,
+  0,
+  1,
+  16U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len256
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {
+  1024U,
+  0,
+  1,
+  8U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len512
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {
+  2048U,
+  0,
+  1,
+  4U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len1024
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {
+  4096U,
+  0,
+  1,
+  2U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len2048
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {
+  8192U,
+  0,
+  1,
+  1U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len4096
+};
+#endif
+
+#endif
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
new file mode 100644
index 00000000..2143739f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
@@ -0,0 +1,46 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        CompexMathFunctions.c
+ * Description:  Combination of all comlex math function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_cmplx_conj_f32.c"
+#include "arm_cmplx_conj_q15.c"
+#include "arm_cmplx_conj_q31.c"
+#include "arm_cmplx_dot_prod_f32.c"
+#include "arm_cmplx_dot_prod_q15.c"
+#include "arm_cmplx_dot_prod_q31.c"
+#include "arm_cmplx_mag_f32.c"
+#include "arm_cmplx_mag_q15.c"
+#include "arm_cmplx_mag_q31.c"
+#include "arm_cmplx_mag_squared_f32.c"
+#include "arm_cmplx_mag_squared_q15.c"
+#include "arm_cmplx_mag_squared_q31.c"
+#include "arm_cmplx_mult_cmplx_f32.c"
+#include "arm_cmplx_mult_cmplx_q15.c"
+#include "arm_cmplx_mult_cmplx_q31.c"
+#include "arm_cmplx_mult_real_f32.c"
+#include "arm_cmplx_mult_real_q15.c"
+#include "arm_cmplx_mult_real_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
new file mode 100644
index 00000000..ae20bbb2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
@@ -0,0 +1,161 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_conj_f32.c
+ * Description:  Floating-point complex conjugate
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_conj Complex Conjugate
+
+  Conjugates the elements of a complex data vector.
+
+  The pSrc points to the source data and
+  pDst points to the destination data where the result should be written.
+  numSamples specifies the number of complex samples
+  and the data in each array is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  Each array has a total of 2*numSamples values.
+
+  The underlying algorithm is used:
+  
+  for (n = 0; n < numSamples; n++) {
+      pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part
+      pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part
+  }
+  

+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_conj
+  @{
+ */
+
+/**
+  @brief         Floating-point complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+
+void arm_cmplx_conj_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON)
+   float32x4_t zero;
+   float32x4x2_t vec;
+
+   zero = vdupq_n_f32(0.0);
+
+   /* Compute 4 outputs at a time */
+   blkCnt = numSamples >> 2U;
+
+   while (blkCnt > 0U)
+   {
+     /* C[0]+jC[1] = A[0]+(-1)*jA[1] */
+     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
+     vec = vld2q_f32(pSrc);
+     vec.val[1] = vsubq_f32(zero,vec.val[1]);
+     vst2q_f32(pDst,vec);
+
+     /* Increment pointers */
+     pSrc += 8;
+     pDst += 8;
+        
+     /* Decrement the loop counter */
+     blkCnt--;
+   }
+
+   /* Tail */
+   blkCnt = numSamples & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined (ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_conj group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
new file mode 100644
index 00000000..d7fdc28b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
@@ -0,0 +1,157 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_conj_q15.c
+ * Description:  Q15 complex conjugate
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_conj
+  @{
+ */
+
+/**
+  @brief         Q15 complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
+ */
+
+void arm_cmplx_conj_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in1;                                     /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in2, in3, in4;                           /* Temporary input variables */
+#endif
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+
+    #if defined (ARM_MATH_DSP)
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    in2 = read_q15x2_ia ((q15_t **) &pSrc);
+    in3 = read_q15x2_ia ((q15_t **) &pSrc);
+    in4 = read_q15x2_ia ((q15_t **) &pSrc);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    in1 = __QASX(0, in1);
+    in2 = __QASX(0, in2);
+    in3 = __QASX(0, in3);
+    in4 = __QASX(0, in4);
+#else
+    in1 = __QSAX(0, in1);
+    in2 = __QSAX(0, in2);
+    in3 = __QSAX(0, in3);
+    in4 = __QSAX(0, in4);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
+    in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16);
+    in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
+    in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
+
+    write_q15x2_ia (&pDst, in1);
+    write_q15x2_ia (&pDst, in2);
+    write_q15x2_ia (&pDst, in3);
+    write_q15x2_ia (&pDst, in4);
+#else
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __SSAT(-in1, 16);
+#else
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_conj group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
new file mode 100644
index 00000000..c3cbdbf1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
@@ -0,0 +1,137 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_conj_q31.c
+ * Description:  Q31 complex conjugate
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_conj
+  @{
+ */
+
+/**
+  @brief         Q31 complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
+ */
+
+void arm_cmplx_conj_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    *pDst++ =  *pSrc++;
+    in =  *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_conj group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
new file mode 100644
index 00000000..167b865c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
@@ -0,0 +1,233 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_dot_prod_f32.c
+ * Description:  Floating-point complex dot product
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_dot_prod Complex Dot Product
+
+  Computes the dot product of two complex vectors.
+  The vectors are multiplied element-by-element and then summed.
+
+  The pSrcA points to the first complex input vector and
+  pSrcB points to the second complex input vector.
+  numSamples specifies the number of complex samples
+  and the data in each array is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  Each array has a total of 2*numSamples values.
+
+  The underlying algorithm is used:
+
+  
+  realResult = 0;
+  imagResult = 0;
+  for (n = 0; n < numSamples; n++) {
+      realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+      imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+  }
+  

+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_dot_prod
+  @{
+ */
+
+/**
+  @brief         Floating-point complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned here
+  @return        none
+ */
+
+void arm_cmplx_dot_prod_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t numSamples,
+        float32_t * realResult,
+        float32_t * imagResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result variables */
+        float32_t a0,b0,c0,d0;
+
+#if defined(ARM_MATH_NEON)
+    float32x4x2_t vec1,vec2,vec3,vec4;
+    float32x4_t accR,accI;
+    float32x2_t accum = vdup_n_f32(0);
+
+    accR = vdupq_n_f32(0.0);
+    accI = vdupq_n_f32(0.0);
+
+    /* Loop unrolling: Compute 8 outputs at a time */
+    blkCnt = numSamples >> 3U;
+
+    while (blkCnt > 0U)
+    {
+	/* C = (A[0]+jA[1])*(B[0]+jB[1]) + ...  */
+        /* Calculate dot product and then store the result in a temporary buffer. */
+
+	vec1 = vld2q_f32(pSrcA);
+        vec2 = vld2q_f32(pSrcB);
+
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        accR = vmlaq_f32(accR,vec1.val[0],vec2.val[0]);
+        accR = vmlsq_f32(accR,vec1.val[1],vec2.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        accI = vmlaq_f32(accI,vec1.val[1],vec2.val[0]);
+        accI = vmlaq_f32(accI,vec1.val[0],vec2.val[1]);
+
+        vec3 = vld2q_f32(pSrcA);
+        vec4 = vld2q_f32(pSrcB);
+	
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        accR = vmlaq_f32(accR,vec3.val[0],vec4.val[0]);
+        accR = vmlsq_f32(accR,vec3.val[1],vec4.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        accI = vmlaq_f32(accI,vec3.val[1],vec4.val[0]);
+        accI = vmlaq_f32(accI,vec3.val[0],vec4.val[1]);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(accR), vget_high_f32(accR));
+    real_sum += accum[0] + accum[1];
+
+    accum = vpadd_f32(vget_low_f32(accI), vget_high_f32(accI));
+    imag_sum += accum[0] + accum[1];
+
+    /* Tail */
+    blkCnt = numSamples & 0x7;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store real and imaginary result in destination buffer. */
+  *realResult = real_sum;
+  *imagResult = imag_sum;
+}
+
+/**
+  @} end of cmplx_dot_prod group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
new file mode 100644
index 00000000..5947958f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
@@ -0,0 +1,154 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_dot_prod_q15.c
+ * Description:  Processing function for the Q15 Complex Dot product
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_dot_prod
+  @{
+ */
+
+/**
+  @brief         Q15 complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned her
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
+                   These are accumulated in a 64-bit accumulator with 34.30 precision.
+                   As a final step, the accumulators are converted to 8.24 format.
+                   The return results realResult and imagResult are in 8.24 format.
+ */
+
+void arm_cmplx_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t numSamples,
+        q31_t * realResult,
+        q31_t * imagResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t real_sum = 0, imag_sum = 0;              /* Temporary result variables */
+        q15_t a0,b0,c0,d0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store real and imaginary result in 8.24 format  */
+  /* Convert real data in 34.30 to 8.24 by 6 right shifts */
+  *realResult = (q31_t) (real_sum >> 6);
+  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
+  *imagResult = (q31_t) (imag_sum >> 6);
+}
+
+/**
+  @} end of cmplx_dot_prod group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
new file mode 100644
index 00000000..9f82e8e0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
@@ -0,0 +1,153 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_dot_prod_q31.c
+ * Description:  Q31 complex dot product
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_dot_prod
+  @{
+ */
+
+/**
+  @brief         Q31 complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
+                   The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
+                   Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768.
+                   The return results realResult and imagResult are in 16.48 format.
+                   Input down scaling is not required.
+ */
+
+void arm_cmplx_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t numSamples,
+        q63_t * realResult,
+        q63_t * imagResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t real_sum = 0, imag_sum = 0;              /* Temporary result variables */
+        q31_t a0,b0,c0,d0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store real and imaginary result in 16.48 format  */
+  *realResult = real_sum;
+  *imagResult = imag_sum;
+}
+
+/**
+  @} end of cmplx_dot_prod group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
new file mode 100644
index 00000000..128ecb96
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
@@ -0,0 +1,188 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_f32.c
+ * Description:  Floating-point complex magnitude
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_mag Complex Magnitude
+
+  Computes the magnitude of the elements of a complex data vector.
+
+  The pSrc points to the source data and
+  pDst points to the where the result should be written.
+  numSamples specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of 2*numSamples values;
+  the output array has a total of numSamples values.
+
+  The underlying algorithm is used:
+
+  
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
+  }
+  

+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Floating-point complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+void arm_cmplx_mag_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+  uint32_t blkCnt;                               /* loop counter */
+  float32_t real, imag;                      /* Temporary variables to hold input values */
+
+#if defined(ARM_MATH_NEON)
+
+  float32x4x2_t vecA;
+  float32x4_t vRealA;
+  float32x4_t vImagA;
+  float32x4_t vMagSqA;
+
+  float32x4x2_t vecB;
+  float32x4_t vRealB;
+  float32x4_t vImagB;
+  float32x4_t vMagSqB;
+
+  /* Loop unrolling: Compute 8 outputs at a time */
+  blkCnt = numSamples >> 3;
+
+  while (blkCnt > 0U)
+  {
+    /* out = sqrt((real * real) + (imag * imag)) */
+
+    vecA = vld2q_f32(pSrc);
+    pSrc += 8;
+
+    vecB = vld2q_f32(pSrc);
+    pSrc += 8;
+
+    vRealA = vmulq_f32(vecA.val[0], vecA.val[0]);
+    vImagA = vmulq_f32(vecA.val[1], vecA.val[1]);
+    vMagSqA = vaddq_f32(vRealA, vImagA);
+
+    vRealB = vmulq_f32(vecB.val[0], vecB.val[0]);
+    vImagB = vmulq_f32(vecB.val[1], vecB.val[1]);
+    vMagSqB = vaddq_f32(vRealB, vImagB);
+
+    /* Store the result in the destination buffer. */
+    vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqA));
+    pDst += 4;
+
+    vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqB));
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  blkCnt = numSamples & 7;
+
+#else
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_mag group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
new file mode 100644
index 00000000..a5b45b5a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
@@ -0,0 +1,162 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_q15.c
+ * Description:  Q15 complex magnitude
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Q15 complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
+ */
+
+void arm_cmplx_mag_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t acc0;                                    /* Accumulators */
+#else
+       q15_t real, imag;                              /* Temporary input variables */
+       q31_t acc0, acc1;                              /* Accumulators */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_mag group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
new file mode 100644
index 00000000..fe26d5b1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
@@ -0,0 +1,130 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_q31.c
+ * Description:  Q31 complex magnitude
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Q31 complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
+                   Input down scaling is not required.
+ */
+
+void arm_cmplx_mag_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+
+    /* store result in 2.30 format in destination buffer. */
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+
+    /* store result in 2.30 format in destination buffer. */
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_mag group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
new file mode 100644
index 00000000..8092df92
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
@@ -0,0 +1,184 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_squared_f32.c
+ * Description:  Floating-point complex magnitude squared
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_mag_squared Complex Magnitude Squared
+
+  Computes the magnitude squared of the elements of a complex data vector.
+
+  The pSrc points to the source data and
+  pDst points to the where the result should be written.
+  numSamples specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of 2*numSamples values;
+  the output array has a total of numSamples values.
+
+  The underlying algorithm is used:
+
+  
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
+  }
+  

+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_mag_squared
+  @{
+ */
+
+/**
+  @brief         Floating-point complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+void arm_cmplx_mag_squared_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t real, imag;                          /* Temporary input variables */
+
+#if defined(ARM_MATH_NEON)
+  float32x4x2_t vecA;
+  float32x4_t vRealA;
+  float32x4_t vImagA;
+  float32x4_t vMagSqA;
+
+  float32x4x2_t vecB;
+  float32x4_t vRealB;
+  float32x4_t vImagB;
+  float32x4_t vMagSqB;
+
+  /* Loop unrolling: Compute 8 outputs at a time */
+  blkCnt = numSamples >> 3;
+
+  while (blkCnt > 0U)
+  {
+    /* out = sqrt((real * real) + (imag * imag)) */
+
+    vecA = vld2q_f32(pSrc);
+    pSrc += 8;
+
+    vRealA = vmulq_f32(vecA.val[0], vecA.val[0]);
+    vImagA = vmulq_f32(vecA.val[1], vecA.val[1]);
+    vMagSqA = vaddq_f32(vRealA, vImagA);
+
+    vecB = vld2q_f32(pSrc);
+    pSrc += 8;
+
+    vRealB = vmulq_f32(vecB.val[0], vecB.val[0]);
+    vImagB = vmulq_f32(vecB.val[1], vecB.val[1]);
+    vMagSqB = vaddq_f32(vRealB, vImagB);
+
+    /* Store the result in the destination buffer. */
+    vst1q_f32(pDst, vMagSqA);
+    pDst += 4;
+
+    vst1q_f32(pDst, vMagSqB);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  blkCnt = numSamples & 7;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    *pDst++ = (real * real) + (imag * imag);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_mag_squared group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
new file mode 100644
index 00000000..908f3bc1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
@@ -0,0 +1,161 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_squared_q15.c
+ * Description:  Q15 complex magnitude squared
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag_squared
+  @{
+ */
+
+/**
+  @brief         Q15 complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
+ */
+
+void arm_cmplx_mag_squared_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t acc0;                                    /* Accumulators */
+#else
+        q15_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (acc0 >> 17);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_mag_squared group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
new file mode 100644
index 00000000..f16ff7ae
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
@@ -0,0 +1,129 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_squared_q31.c
+ * Description:  Q31 complex magnitude squared
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag_squared
+  @{
+ */
+
+/**
+  @brief         Q31 complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
+                   Input down scaling is not required.
+ */
+
+void arm_cmplx_mag_squared_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    /* store the result in 3.29 format in the destination buffer. */
+    *pDst++ = acc0 + acc1;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    *pDst++ = acc0 + acc1;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    *pDst++ = acc0 + acc1;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    *pDst++ = acc0 + acc1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+
+    /* store result in 3.29 format in destination buffer. */
+    *pDst++ = acc0 + acc1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_mag_squared group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
new file mode 100644
index 00000000..ee758829
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
@@ -0,0 +1,194 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_cmplx_f32.c
+ * Description:  Floating-point complex-by-complex multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
+
+  Multiplies a complex vector by another complex vector and generates a complex result.
+  The data in the complex arrays is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The parameter numSamples represents the number of complex
+  samples processed.  The complex arrays have a total of 2*numSamples
+  real values.
+
+  The underlying algorithm is used:
+
+  
+  for (n = 0; n < numSamples; n++) {
+      pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+      pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+  }
+  

+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup CmplxByCmplxMult
+  @{
+ */
+
+/**
+  @brief         Floating-point complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+void arm_cmplx_mult_cmplx_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+    float32_t a, b, c, d;  /* Temporary variables to store real and imaginary values */
+
+#if defined(ARM_MATH_NEON)
+    float32x4x2_t va, vb;
+    float32x4_t real, imag;
+    float32x4x2_t outCplx;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        va = vld2q_f32(pSrcA);  // load & separate real/imag pSrcA (de-interleave 2)
+        vb = vld2q_f32(pSrcB);  // load & separate real/imag pSrcB
+
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+	
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        outCplx.val[0] = vmulq_f32(va.val[0], vb.val[0]);
+        outCplx.val[0] = vmlsq_f32(outCplx.val[0], va.val[1], vb.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        outCplx.val[1] = vmulq_f32(va.val[0], vb.val[1]);
+        outCplx.val[1] = vmlaq_f32(outCplx.val[1], va.val[1], vb.val[0]);
+
+        vst2q_f32(pDst, outCplx);
+
+	/* Increment pointer */
+        pDst += 8;
+
+	/* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = numSamples & 3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of CmplxByCmplxMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
new file mode 100644
index 00000000..e490822a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
@@ -0,0 +1,136 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_cmplx_q15.c
+ * Description:  Q15 complex-by-complex multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByCmplxMult
+  @{
+ */
+
+/**
+  @brief         Q15 complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
+ */
+
+void arm_cmplx_mult_cmplx_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t a, b, c, d;                              /* Temporary variables */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of CmplxByCmplxMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
new file mode 100644
index 00000000..88fd8702
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
@@ -0,0 +1,137 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_cmplx_q31.c
+ * Description:  Q31 complex-by-complex multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByCmplxMult
+  @{
+ */
+
+/**
+  @brief         Q31 complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
+                   Input down scaling is not required.
+ */
+
+void arm_cmplx_mult_cmplx_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t a, b, c, d;                              /* Temporary variables */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    /* store result in 3.29 format in destination buffer. */
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+
+    /* store result in 3.29 format in destination buffer. */
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of CmplxByCmplxMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
new file mode 100644
index 00000000..2b7d087c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
@@ -0,0 +1,169 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_real_f32.c
+ * Description:  Floating-point complex by real multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup CmplxByRealMult Complex-by-Real Multiplication
+
+  Multiplies a complex vector by a real vector and generates a complex result.
+  The data in the complex arrays is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The parameter numSamples represents the number of complex
+  samples processed.  The complex arrays have a total of 2*numSamples
+  real values while the real array has a total of numSamples
+  real values.
+
+  The underlying algorithm is used:
+
+  
+  for (n = 0; n < numSamples; n++) {
+      pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
+      pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
+  }
+  

+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup CmplxByRealMult
+  @{
+ */
+
+/**
+  @brief         Floating-point complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+void arm_cmplx_mult_real_f32(
+  const float32_t * pSrcCmplx,
+  const float32_t * pSrcReal,
+        float32_t * pCmplxDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t in;                                  /* Temporary variable */
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t r;
+    float32x4x2_t ab,outCplx;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        ab = vld2q_f32(pSrcCmplx);  // load & separate real/imag pSrcA (de-interleave 2)
+        r = vld1q_f32(pSrcReal);  // load & separate real/imag pSrcB
+
+	/* Increment pointers */
+        pSrcCmplx += 8;
+        pSrcReal += 4;
+
+        outCplx.val[0] = vmulq_f32(ab.val[0], r);
+        outCplx.val[1] = vmulq_f32(ab.val[1], r);
+
+        vst2q_f32(pCmplxDst, outCplx);
+        pCmplxDst += 8;
+
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = numSamples & 3;
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store result in destination buffer. */
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++* in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store result in destination buffer. */
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of CmplxByRealMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
new file mode 100644
index 00000000..b6d3cb81
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
@@ -0,0 +1,182 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_real_q15.c
+ * Description:  Q15 complex by real multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByRealMult
+  @{
+ */
+
+/**
+  @brief         Q15 complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+void arm_cmplx_mult_real_q15(
+  const q15_t * pSrcCmplx,
+  const q15_t * pSrcReal,
+        q15_t * pCmplxDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+        q31_t inA1, inA2;                              /* Temporary variables to hold input data */
+        q31_t inB1;                                    /* Temporary variables to hold input data */
+        q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
+        q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 complex numbers both real and imaginary from complex input buffer */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    /* read 2 real values at a time from real input buffer */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
+
+    /* multiply complex number with real numbers */
+#ifndef ARM_MATH_BIG_ENDIAN
+    mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));
+    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
+    mul3 = (q31_t) ((q15_t) (inA2)       * (q15_t) (inB1 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
+#else
+    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
+    mul1 = (q31_t) ((q15_t) inA1         * (q15_t) (inB1 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
+    mul3 = (q31_t) ((q15_t) inA2         * (q15_t) inB1);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* saturate the result */
+    out1 = (q15_t) __SSAT(mul1 >> 15U, 16);
+    out2 = (q15_t) __SSAT(mul2 >> 15U, 16);
+    out3 = (q15_t) __SSAT(mul3 >> 15U, 16);
+    out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
+
+    /* pack real and imaginary outputs and store them to destination */
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
+
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));
+    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
+    mul3 = (q31_t) ((q15_t) (inA2)       * (q15_t) (inB1 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
+#else
+    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
+    mul1 = (q31_t) ((q15_t) inA1         * (q15_t) (inB1 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
+    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    out1 = (q15_t) __SSAT(mul1 >> 15U, 16);
+    out2 = (q15_t) __SSAT(mul2 >> 15U, 16);
+    out3 = (q15_t) __SSAT(mul3 >> 15U, 16);
+    out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
+
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
+#else
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store the result in the destination buffer. */
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of CmplxByRealMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
new file mode 100644
index 00000000..f3142b0a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
@@ -0,0 +1,148 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_real_q31.c
+ * Description:  Q31 complex by real multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByRealMult
+  @{
+ */
+
+/**
+  @brief         Q31 complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+void arm_cmplx_mult_real_q31(
+  const q31_t * pSrcCmplx,
+  const q31_t * pSrcReal,
+        q31_t * pCmplxDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    /* store saturated result in 1.31 format to destination buffer */
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    /* store result in destination buffer. */
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    /* store saturated result in 1.31 format to destination buffer */
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    /* store result in destination buffer. */
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of CmplxByRealMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c
new file mode 100644
index 00000000..edd3bf2b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c
@@ -0,0 +1,37 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        ControllerFunctions.c
+ * Description:  Combination of all controller function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_pid_init_f32.c"
+#include "arm_pid_init_q15.c"
+#include "arm_pid_init_q31.c"
+#include "arm_pid_reset_f32.c"
+#include "arm_pid_reset_q15.c"
+#include "arm_pid_reset_q31.c"
+#include "arm_sin_cos_f32.c"
+#include "arm_sin_cos_q31.c"
+
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
new file mode 100644
index 00000000..0e4d5d65
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_init_f32.c
+ * Description:  Floating-point PID Control initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point PID Control.
+  @param[in,out] S               points to an instance of the PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The resetStateFlag specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: A0, A1 A2
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
+ */
+
+void arm_pid_init_f32(
+  arm_pid_instance_f32 * S,
+  int32_t resetStateFlag)
+{
+  /* Derived coefficient A0 */
+  S->A0 = S->Kp + S->Ki + S->Kd;
+
+  /* Derived coefficient A1 */
+  S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
+
+  /* Derived coefficient A2 */
+  S->A2 = S->Kd;
+
+  /* Check whether state needs reset or not */
+  if (resetStateFlag)
+  {
+    /* Reset state to zero, The size will be always 3 samples */
+    memset(S->state, 0, 3U * sizeof(float32_t));
+  }
+
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
new file mode 100644
index 00000000..3f82711b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
@@ -0,0 +1,95 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_init_q15.c
+ * Description:  Q15 PID Control initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 PID Control.
+  @param[in,out] S               points to an instance of the Q15 PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The resetStateFlag specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: A0, A1 A2
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
+ */
+
+void arm_pid_init_q15(
+  arm_pid_instance_q15 * S,
+  int32_t resetStateFlag)
+{
+
+#if defined (ARM_MATH_DSP)
+
+  /* Derived coefficient A0 */
+  S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
+
+  /* Derived coefficients and pack into A1 */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+  S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
+#else
+  S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
+#endif
+
+#else
+
+  q31_t temp;                                    /* to store the sum */
+
+  /* Derived coefficient A0 */
+  temp = S->Kp + S->Ki + S->Kd;
+  S->A0 = (q15_t) __SSAT(temp, 16);
+
+  /* Derived coefficients and pack into A1 */
+  temp = -(S->Kd + S->Kd + S->Kp);
+  S->A1 = (q15_t) __SSAT(temp, 16);
+  S->A2 = S->Kd;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+  /* Check whether state needs reset or not */
+  if (resetStateFlag)
+  {
+    /* Reset state to zero, The size will be always 3 samples */
+    memset(S->state, 0, 3U * sizeof(q15_t));
+  }
+
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
new file mode 100644
index 00000000..680d4634
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_init_q31.c
+ * Description:  Q31 PID Control initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 PID Control.
+  @param[in,out] S               points to an instance of the Q31 PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The resetStateFlag specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: A0, A1 A2
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
+ */
+
+void arm_pid_init_q31(
+  arm_pid_instance_q31 * S,
+  int32_t resetStateFlag)
+{
+
+#if defined (ARM_MATH_DSP)
+
+  /* Derived coefficient A0 */
+  S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
+
+  /* Derived coefficient A1 */
+  S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
+
+#else
+
+  q31_t temp;                                    /* to store the sum */
+
+  /* Derived coefficient A0 */
+  temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
+  S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
+
+  /* Derived coefficient A1 */
+  temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
+  S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+  /* Derived coefficient A2 */
+  S->A2 = S->Kd;
+
+  /* Check whether state needs reset or not */
+  if (resetStateFlag)
+  {
+    /* Reset state to zero, The size will be always 3 samples */
+    memset(S->state, 0, 3U * sizeof(q31_t));
+  }
+
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
new file mode 100644
index 00000000..ed1038e4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
@@ -0,0 +1,54 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_reset_f32.c
+ * Description:  Floating-point PID Control reset function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Reset function for the floating-point PID Control.
+  @param[in,out] S  points to an instance of the floating-point PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
+void arm_pid_reset_f32(
+  arm_pid_instance_f32 * S)
+{
+  /* Reset state to zero, The size will be always 3 samples */
+  memset(S->state, 0, 3U * sizeof(float32_t));
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
new file mode 100644
index 00000000..f61391ef
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
@@ -0,0 +1,54 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_reset_q15.c
+ * Description:  Q15 PID Control reset function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Reset function for the Q15 PID Control.
+  @param[in,out] S  points to an instance of the Q15 PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
+void arm_pid_reset_q15(
+  arm_pid_instance_q15 * S)
+{
+  /* Reset state to zero, The size will be always 3 samples */
+  memset(S->state, 0, 3U * sizeof(q15_t));
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
new file mode 100644
index 00000000..2853ea9d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
@@ -0,0 +1,54 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_reset_q31.c
+ * Description:  Q31 PID Control reset function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Reset function for the Q31 PID Control.
+  @param[in,out] S  points to an instance of the Q31 PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
+void arm_pid_reset_q31(
+  arm_pid_instance_q31 * S)
+{
+  /* Reset state to zero, The size will be always 3 samples */
+  memset(S->state, 0, 3U * sizeof(q31_t));
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
new file mode 100644
index 00000000..438e4d47
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
@@ -0,0 +1,146 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_cos_f32.c
+ * Description:  Sine and Cosine calculation for floating-point values
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupController
+ */
+
+/**
+  @defgroup SinCos Sine Cosine
+
+  Computes the trigonometric sine and cosine values using a combination of table lookup
+  and linear interpolation.
+  There are separate functions for Q31 and floating-point data types.
+  The input to the floating-point version is in degrees while the
+  fixed-point Q31 have a scaled input with the range
+  [-1 0.9999] mapping to [-180 +180] degrees.
+
+  The floating point function also allows values that are out of the usual range. When this happens, the function will
+  take extra time to adjust the input value to the range of [-180 180].
+
+  The result is accurate to 5 digits after the decimal point.
+
+  The implementation is based on table lookup using 360 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index.
+   -# Compute the fractional portion (fract) of the input.
+   -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
+   -# Sine value is computed as  *psinVal = y0 + (fract * (y1 - y0)).
+   -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
+   -# Cosine value is computed as  *pcosVal = y0 + (fract * (y1 - y0)).
+ */
+
+/**
+  @addtogroup SinCos
+  @{
+ */
+
+/**
+  @brief         Floating-point sin_cos function.
+  @param[in]     theta    input value in degrees
+  @param[out]    pSinVal  points to processed sine output
+  @param[out]    pCosVal  points to processed cosine output
+  @return        none
+ */
+
+void arm_sin_cos_f32(
+  float32_t theta,
+  float32_t * pSinVal,
+  float32_t * pCosVal)
+{
+  float32_t fract, in;                             /* Temporary input, output variables */
+  uint16_t indexS, indexC;                         /* Index variable */
+  float32_t f1, f2, d1, d2;                        /* Two nearest output values */
+  float32_t Dn, Df;
+  float32_t temp, findex;
+
+  /* input x is in degrees */
+  /* Scale input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
+  in = theta * 0.00277777777778f;
+
+  if (in < 0.0f)
+  {
+    in = -in;
+  }
+
+  in = in - (int32_t)in;
+
+  /* Calculate the nearest index */
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  indexS = ((uint16_t)findex) & 0x1ff;
+  indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
+
+  /* Calculation of fractional value */
+  fract = findex - (float32_t) indexS;
+
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 =  sinTable_f32[indexC  ];
+  f2 =  sinTable_f32[indexC+1];
+  d1 = -sinTable_f32[indexS  ];
+  d2 = -sinTable_f32[indexS+1];
+
+  temp = (1.0f - fract) * f1 + fract * f2;
+
+  Dn = 0.0122718463030f; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
+  Df = f2 - f1;          /* delta between the values of the functions */
+
+  temp = Dn * (d1 + d2) - 2 * Df;
+  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
+  temp = fract * temp + d1 * Dn;
+
+  /* Calculation of cosine value */
+  *pCosVal = fract * temp + f1;
+
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 = sinTable_f32[indexS  ];
+  f2 = sinTable_f32[indexS+1];
+  d1 = sinTable_f32[indexC  ];
+  d2 = sinTable_f32[indexC+1];
+
+  temp = (1.0f - fract) * f1 + fract * f2;
+
+  Df = f2 - f1; // delta between the values of the functions
+  temp = Dn * (d1 + d2) - 2 * Df;
+  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
+  temp = fract * temp + d1 * Dn;
+
+  /* Calculation of sine value */
+  *pSinVal = fract * temp + f1;
+
+  if (theta < 0.0f)
+  {
+    *pSinVal = -*pSinVal;
+  }
+}
+
+/**
+  @} end of SinCos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
new file mode 100644
index 00000000..dcc45aa5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
@@ -0,0 +1,110 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_cos_q31.c
+ * Description:  Cosine & Sine calculation for Q31 values
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupController
+ */
+
+/**
+  @addtogroup SinCos
+  @{
+ */
+
+/**
+  @brief         Q31 sin_cos function.
+  @param[in]     theta    scaled input value in degrees
+  @param[out]    pSinVal  points to processed sine output
+  @param[out]    pCosVal  points to processed cosine output
+  @return        none
+
+  The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].
+ */
+
+void arm_sin_cos_q31(
+  q31_t theta,
+  q31_t * pSinVal,
+  q31_t * pCosVal)
+{
+  q31_t fract;                                     /* Temporary input, output variables */
+  uint16_t indexS, indexC;                         /* Index variable */
+  q31_t f1, f2, d1, d2;                            /* Two nearest output values */
+  q31_t Dn, Df;
+  q63_t temp;
+
+  /* Calculate the nearest index */
+  indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT;
+  indexC = (indexS + 128) & 0x1ff;
+
+  /* Calculation of fractional value */
+  fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;
+
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 =  sinTable_q31[indexC  ];
+  f2 =  sinTable_q31[indexC+1];
+  d1 = -sinTable_q31[indexS  ];
+  d2 = -sinTable_q31[indexS+1];
+
+  Dn = 0x1921FB5; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
+  Df = f2 - f1;   /* delta between the values of the functions */
+
+  temp = Dn * ((q63_t)d1 + d2);
+  temp = temp - ((q63_t)Df << 32);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + (q63_t)d1 * Dn;
+  temp = (q63_t)fract * (temp >> 31);
+
+  /* Calculation of cosine value */
+  *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
+
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 = sinTable_q31[indexS ];
+  f2 = sinTable_q31[indexS+1];
+  d1 = sinTable_q31[indexC ];
+  d2 = sinTable_q31[indexC+1];
+
+  Df = f2 - f1; // delta between the values of the functions
+  temp = Dn * ((q63_t)d1 + d2);
+  temp = temp - ((q63_t)Df << 32);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + (q63_t)d1 * Dn;
+  temp = (q63_t)fract * (temp >> 31);
+
+  /* Calculation of sine value */
+  *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
+}
+
+/**
+  @} end of SinCos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c
new file mode 100644
index 00000000..a8566788
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c
@@ -0,0 +1,37 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        FastMathFunctions.c
+ * Description:  Combination of all fast math function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_cos_f32.c"
+#include "arm_cos_q15.c"
+#include "arm_cos_q31.c"
+#include "arm_sin_f32.c"
+#include "arm_sin_q15.c"
+#include "arm_sin_q31.c"
+#include "arm_sqrt_q15.c"
+#include "arm_sqrt_q31.c"
+
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
new file mode 100644
index 00000000..78207d83
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
@@ -0,0 +1,122 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cos_f32.c
+ * Description:  Fast cosine calculation for floating-point values
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @defgroup cos Cosine
+
+  Computes the trigonometric cosine function using a combination of table lookup
+  and linear interpolation.  There are separate functions for
+  Q15, Q31, and floating-point data types.
+  The input to the floating-point version is in radians while the
+  fixed-point Q15 and Q31 have a scaled input with the range
+  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
+  value of 2*pi wraps around to 0.
+
+  The implementation is based on table lookup using 256 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index
+   -# Compute the fractional portion (fract) of the table index.
+   -# The final result equals (1.0f-fract)*a + fract*b;
+
+  where
+  
+     b = Table[index];
+     c = Table[index+1];
+  

+ */
+
+/**
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for floating-point data.
+  @param[in]     x  input value in radians
+  @return        cos(x)
+ */
+
+float32_t arm_cos_f32(
+  float32_t x)
+{
+  float32_t cosVal, fract, in;                   /* Temporary input, output variables */
+  uint16_t index;                                /* Index variable */
+  float32_t a, b;                                /* Two nearest output values */
+  int32_t n;
+  float32_t findex;
+
+  /* input x is in radians */
+  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
+  in = x * 0.159154943092f + 0.25f;
+
+  /* Calculation of floor value of input */
+  n = (int32_t) in;
+
+  /* Make negative values towards -infinity */
+  if (in < 0.0f)
+  {
+    n--;
+  }
+
+  /* Map input value to [0 1] */
+  in = in - (float32_t) n;
+
+  /* Calculation of index of the table */
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  index = (uint16_t)findex;
+
+  /* when "in" is exactly 1, we need to rotate the index down to 0 */
+  if (index >= FAST_MATH_TABLE_SIZE) {
+    index = 0;
+    findex -= (float32_t)FAST_MATH_TABLE_SIZE;
+  }
+
+  /* fractional value calculation */
+  fract = findex - (float32_t) index;
+
+  /* Read two nearest values of input value from the cos table */
+  a = sinTable_f32[index];
+  b = sinTable_f32[index+1];
+
+  /* Linear interpolation process */
+  cosVal = (1.0f - fract) * a + fract * b;
+
+  /* Return output value */
+  return (cosVal);
+}
+
+/**
+  @} end of cos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
new file mode 100644
index 00000000..aef47daa
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
@@ -0,0 +1,84 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cos_q15.c
+ * Description:  Fast cosine calculation for Q15 values
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for Q15 data.
+  @param[in]     x  Scaled input value in radians
+  @return        cos(x)
+
+  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q15_t arm_cos_q15(
+  q15_t x)
+{
+  q15_t cosVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q15_t a, b;                                    /* Two nearest output values */
+  q15_t fract;                                   /* Temporary values for fractional values */
+
+  /* add 0.25 (pi/2) to read sine table */
+  x = (uint16_t)x + 0x2000;
+  if (x < 0)
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint16_t)x + 0x8000;
+  }
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q15[index];
+  b = sinTable_q15[index+1];
+
+  /* Linear interpolation process */
+  cosVal = (q31_t) (0x8000 - fract) * a >> 16;
+  cosVal = (q15_t) ((((q31_t) cosVal << 16) + ((q31_t) fract * b)) >> 16);
+
+  /* Return output value */
+  return (cosVal << 1);
+}
+
+/**
+  @} end of cos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
new file mode 100644
index 00000000..fa42eee2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
@@ -0,0 +1,84 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cos_q31.c
+ * Description:  Fast cosine calculation for Q31 values
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for Q31 data.
+  @param[in]     x  Scaled input value in radians
+  @return        cos(x)
+
+  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q31_t arm_cos_q31(
+  q31_t x)
+{
+  q31_t cosVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q31_t a, b;                                    /* Two nearest output values */
+  q31_t fract;                                   /* Temporary values for fractional values */
+
+  /* add 0.25 (pi/2) to read sine table */
+  x = (uint32_t)x + 0x20000000;
+  if (x < 0)
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint32_t)x + 0x80000000;
+  }
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q31[index];
+  b = sinTable_q31[index+1];
+
+  /* Linear interpolation process */
+  cosVal = (q63_t) (0x80000000 - fract) * a >> 32;
+  cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) fract * b)) >> 32);
+
+  /* Return output value */
+  return (cosVal << 1);
+}
+
+/**
+  @} end of cos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
new file mode 100644
index 00000000..674765ed
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
@@ -0,0 +1,122 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_f32.c
+ * Description:  Fast sine calculation for floating-point values
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @defgroup sin Sine
+
+  Computes the trigonometric sine function using a combination of table lookup
+  and linear interpolation.  There are separate functions for
+  Q15, Q31, and floating-point data types.
+  The input to the floating-point version is in radians while the
+  fixed-point Q15 and Q31 have a scaled input with the range
+  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
+  value of 2*pi wraps around to 0.
+
+  The implementation is based on table lookup using 256 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index
+   -# Compute the fractional portion (fract) of the table index.
+   -# The final result equals (1.0f-fract)*a + fract*b;
+
+  where
+  
+     b = Table[index];
+     c = Table[index+1];
+  

+ */
+
+/**
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for floating-point data.
+  @param[in]     x  input value in radians.
+  @return        sin(x)
+ */
+
+float32_t arm_sin_f32(
+  float32_t x)
+{
+  float32_t sinVal, fract, in;                   /* Temporary input, output variables */
+  uint16_t index;                                /* Index variable */
+  float32_t a, b;                                /* Two nearest output values */
+  int32_t n;
+  float32_t findex;
+
+  /* input x is in radians */
+  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi */
+  in = x * 0.159154943092f;
+
+  /* Calculation of floor value of input */
+  n = (int32_t) in;
+
+  /* Make negative values towards -infinity */
+  if (in < 0.0f)
+  {
+    n--;
+  }
+
+  /* Map input value to [0 1] */
+  in = in - (float32_t) n;
+
+  /* Calculation of index of the table */
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  index = (uint16_t)findex;
+
+  /* when "in" is exactly 1, we need to rotate the index down to 0 */
+  if (index >= FAST_MATH_TABLE_SIZE) {
+    index = 0;
+    findex -= (float32_t)FAST_MATH_TABLE_SIZE;
+  }
+
+  /* fractional value calculation */
+  fract = findex - (float32_t) index;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_f32[index];
+  b = sinTable_f32[index+1];
+
+  /* Linear interpolation process */
+  sinVal = (1.0f - fract) * a + fract * b;
+
+  /* Return output value */
+  return (sinVal);
+}
+
+/**
+  @} end of sin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
new file mode 100644
index 00000000..edc8b38a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_q15.c
+ * Description:  Fast sine calculation for Q15 values
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for Q15 data.
+  @param[in]     x  Scaled input value in radians
+  @return        sin(x)
+
+  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q15_t arm_sin_q15(
+  q15_t x)
+{
+  q15_t sinVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q15_t a, b;                                    /* Two nearest output values */
+  q15_t fract;                                   /* Temporary values for fractional values */
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q15[index];
+  b = sinTable_q15[index+1];
+
+  /* Linear interpolation process */
+  sinVal = (q31_t) (0x8000 - fract) * a >> 16;
+  sinVal = (q15_t) ((((q31_t) sinVal << 16) + ((q31_t) fract * b)) >> 16);
+
+  /* Return output value */
+  return (sinVal << 1);
+}
+
+/**
+  @} end of sin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
new file mode 100644
index 00000000..849cc11a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_q31.c
+ * Description:  Fast sine calculation for Q31 values
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for Q31 data.
+  @param[in]     x  Scaled input value in radians
+  @return        sin(x)
+
+  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q31_t arm_sin_q31(
+  q31_t x)
+{
+  q31_t sinVal;                                  /* Temporary variables for input, output */
+  int32_t index;                                 /* Index variable */
+  q31_t a, b;                                    /* Two nearest output values */
+  q31_t fract;                                   /* Temporary values for fractional values */
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q31[index];
+  b = sinTable_q31[index+1];
+
+  /* Linear interpolation process */
+  sinVal = (q63_t) (0x80000000 - fract) * a >> 32;
+  sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32);
+
+  /* Return output value */
+  return (sinVal << 1);
+}
+
+/**
+  @} end of sin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
new file mode 100644
index 00000000..1dc7bc4d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
@@ -0,0 +1,144 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sqrt_q15.c
+ * Description:  Q15 square root function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup SQRT
+  @{
+ */
+
+/**
+  @brief         Q15 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+
+arm_status arm_sqrt_q15(
+  q15_t in,
+  q15_t * pOut)
+{
+  q31_t bits_val1;
+  q15_t number, temp1, var1, signBits1, half;
+  float32_t temp_float1;
+  union
+  {
+    q31_t fracval;
+    float32_t floatval;
+  } tempconv;
+
+  number = in;
+
+  /* If the input is a positive number then compute the signBits. */
+  if (number > 0)
+  {
+    signBits1 = __CLZ(number) - 17;
+
+    /* Shift by the number of signBits1 */
+    if ((signBits1 % 2) == 0)
+    {
+      number = number << signBits1;
+    }
+    else
+    {
+      number = number << (signBits1 - 1);
+    }
+
+    /* Calculate half value of the number */
+    half = number >> 1;
+    /* Store the number for later use */
+    temp1 = number;
+
+    /* Convert to float */
+    temp_float1 = number * 3.051757812500000e-005f;
+    /* Store as integer */
+    tempconv.floatval = temp_float1;
+    bits_val1 = tempconv.fracval;
+    /* Subtract the shifted value from the magic number to give intial guess */
+    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  /* gives initial guess */
+    /* Store as float */
+    tempconv.fracval = bits_val1;
+    temp_float1 = tempconv.floatval;
+    /* Convert to integer format */
+    var1 = (q31_t) (temp_float1 * 16384);
+
+    /* 1st iteration */
+    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
+                                     ((q15_t)
+                                      ((((q15_t)
+                                         (((q31_t) var1 * var1) >> 15)) *
+                                        (q31_t) half) >> 15))) >> 15)) << 2;
+    /* 2nd iteration */
+    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
+                                     ((q15_t)
+                                      ((((q15_t)
+                                         (((q31_t) var1 * var1) >> 15)) *
+                                        (q31_t) half) >> 15))) >> 15)) << 2;
+    /* 3rd iteration */
+    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
+                                     ((q15_t)
+                                      ((((q15_t)
+                                         (((q31_t) var1 * var1) >> 15)) *
+                                        (q31_t) half) >> 15))) >> 15)) << 2;
+
+    /* Multiply the inverse square root with the original value */
+    var1 = ((q15_t) (((q31_t) temp1 * var1) >> 15)) << 1;
+
+    /* Shift the output down accordingly */
+    if ((signBits1 % 2) == 0)
+    {
+      var1 = var1 >> (signBits1 / 2);
+    }
+    else
+    {
+      var1 = var1 >> ((signBits1 - 1) / 2);
+    }
+    *pOut = var1;
+
+    return (ARM_MATH_SUCCESS);
+  }
+  /* If the number is a negative number then store zero as its square root value */
+  else
+  {
+    *pOut = 0;
+
+    return (ARM_MATH_ARGUMENT_ERROR);
+  }
+}
+
+/**
+  @} end of SQRT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
new file mode 100644
index 00000000..9f2a731f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
@@ -0,0 +1,144 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sqrt_q31.c
+ * Description:  Q31 square root function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup SQRT
+  @{
+ */
+
+/**
+  @brief         Q31 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+
+arm_status arm_sqrt_q31(
+  q31_t in,
+  q31_t * pOut)
+{
+  q31_t bits_val1;
+  q31_t number, temp1, var1, signBits1, half;
+  float32_t temp_float1;
+  union
+  {
+    q31_t fracval;
+    float32_t floatval;
+  } tempconv;
+
+  number = in;
+
+  /* If the input is a positive number then compute the signBits. */
+  if (number > 0)
+  {
+    signBits1 = __CLZ(number) - 1;
+
+    /* Shift by the number of signBits1 */
+    if ((signBits1 % 2) == 0)
+    {
+      number = number << signBits1;
+    }
+    else
+    {
+      number = number << (signBits1 - 1);
+    }
+
+    /* Calculate half value of the number */
+    half = number >> 1;
+    /* Store the number for later use */
+    temp1 = number;
+
+    /* Convert to float */
+    temp_float1 = number * 4.6566128731e-010f;
+    /* Store as integer */
+    tempconv.floatval = temp_float1;
+    bits_val1 = tempconv.fracval;
+    /* Subtract the shifted value from the magic number to give intial guess */
+    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  /* gives initial guess */
+    /* Store as float */
+    tempconv.fracval = bits_val1;
+    temp_float1 = tempconv.floatval;
+    /* Convert to integer format */
+    var1 = (q31_t) (temp_float1 * 1073741824);
+
+    /* 1st iteration */
+    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
+                                     ((q31_t)
+                                      ((((q31_t)
+                                         (((q63_t) var1 * var1) >> 31)) *
+                                        (q63_t) half) >> 31))) >> 31)) << 2;
+    /* 2nd iteration */
+    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
+                                     ((q31_t)
+                                      ((((q31_t)
+                                         (((q63_t) var1 * var1) >> 31)) *
+                                        (q63_t) half) >> 31))) >> 31)) << 2;
+    /* 3rd iteration */
+    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
+                                     ((q31_t)
+                                      ((((q31_t)
+                                         (((q63_t) var1 * var1) >> 31)) *
+                                        (q63_t) half) >> 31))) >> 31)) << 2;
+
+    /* Multiply the inverse square root with the original value */
+    var1 = ((q31_t) (((q63_t) temp1 * var1) >> 31)) << 1;
+
+    /* Shift the output down accordingly */
+    if ((signBits1 % 2) == 0)
+    {
+      var1 = var1 >> (signBits1 / 2);
+    }
+    else
+    {
+      var1 = var1 >> ((signBits1 - 1) / 2);
+    }
+    *pOut = var1;
+
+    return (ARM_MATH_SUCCESS);
+  }
+  /* If the number is a negative number then store zero as its square root value */
+  else
+  {
+    *pOut = 0;
+
+    return (ARM_MATH_ARGUMENT_ERROR);
+  }
+}
+
+/**
+  @} end of SQRT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c
new file mode 100644
index 00000000..aa2947a6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c
@@ -0,0 +1,127 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        FilteringFunctions.c
+ * Description:  Combination of all filtering function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_biquad_cascade_df1_32x64_init_q31.c"
+#include "arm_biquad_cascade_df1_32x64_q31.c"
+#include "arm_biquad_cascade_df1_f32.c"
+#include "arm_biquad_cascade_df1_fast_q15.c"
+#include "arm_biquad_cascade_df1_fast_q31.c"
+#include "arm_biquad_cascade_df1_init_f32.c"
+#include "arm_biquad_cascade_df1_init_q15.c"
+#include "arm_biquad_cascade_df1_init_q31.c"
+#include "arm_biquad_cascade_df1_q15.c"
+#include "arm_biquad_cascade_df1_q31.c"
+#include "arm_biquad_cascade_df2T_f32.c"
+#include "arm_biquad_cascade_df2T_f64.c"
+#include "arm_biquad_cascade_df2T_init_f32.c"
+#include "arm_biquad_cascade_df2T_init_f64.c"
+#include "arm_biquad_cascade_stereo_df2T_f32.c"
+#include "arm_biquad_cascade_stereo_df2T_init_f32.c"
+#include "arm_conv_f32.c"
+#include "arm_conv_fast_opt_q15.c"
+#include "arm_conv_fast_q15.c"
+#include "arm_conv_fast_q31.c"
+#include "arm_conv_opt_q15.c"
+#include "arm_conv_opt_q7.c"
+#include "arm_conv_partial_f32.c"
+#include "arm_conv_partial_fast_opt_q15.c"
+#include "arm_conv_partial_fast_q15.c"
+#include "arm_conv_partial_fast_q31.c"
+#include "arm_conv_partial_opt_q15.c"
+#include "arm_conv_partial_opt_q7.c"
+#include "arm_conv_partial_q15.c"
+#include "arm_conv_partial_q31.c"
+#include "arm_conv_partial_q7.c"
+#include "arm_conv_q15.c"
+#include "arm_conv_q31.c"
+#include "arm_conv_q7.c"
+#include "arm_correlate_f32.c"
+#include "arm_correlate_fast_opt_q15.c"
+#include "arm_correlate_fast_q15.c"
+#include "arm_correlate_fast_q31.c"
+#include "arm_correlate_opt_q15.c"
+#include "arm_correlate_opt_q7.c"
+#include "arm_correlate_q15.c"
+#include "arm_correlate_q31.c"
+#include "arm_correlate_q7.c"
+#include "arm_fir_decimate_f32.c"
+#include "arm_fir_decimate_fast_q15.c"
+#include "arm_fir_decimate_fast_q31.c"
+#include "arm_fir_decimate_init_f32.c"
+#include "arm_fir_decimate_init_q15.c"
+#include "arm_fir_decimate_init_q31.c"
+#include "arm_fir_decimate_q15.c"
+#include "arm_fir_decimate_q31.c"
+#include "arm_fir_f32.c"
+#include "arm_fir_fast_q15.c"
+#include "arm_fir_fast_q31.c"
+#include "arm_fir_init_f32.c"
+#include "arm_fir_init_q15.c"
+#include "arm_fir_init_q31.c"
+#include "arm_fir_init_q7.c"
+#include "arm_fir_interpolate_f32.c"
+#include "arm_fir_interpolate_init_f32.c"
+#include "arm_fir_interpolate_init_q15.c"
+#include "arm_fir_interpolate_init_q31.c"
+#include "arm_fir_interpolate_q15.c"
+#include "arm_fir_interpolate_q31.c"
+#include "arm_fir_lattice_f32.c"
+#include "arm_fir_lattice_init_f32.c"
+#include "arm_fir_lattice_init_q15.c"
+#include "arm_fir_lattice_init_q31.c"
+#include "arm_fir_lattice_q15.c"
+#include "arm_fir_lattice_q31.c"
+#include "arm_fir_q15.c"
+#include "arm_fir_q31.c"
+#include "arm_fir_q7.c"
+#include "arm_fir_sparse_f32.c"
+#include "arm_fir_sparse_init_f32.c"
+#include "arm_fir_sparse_init_q15.c"
+#include "arm_fir_sparse_init_q31.c"
+#include "arm_fir_sparse_init_q7.c"
+#include "arm_fir_sparse_q15.c"
+#include "arm_fir_sparse_q31.c"
+#include "arm_fir_sparse_q7.c"
+#include "arm_iir_lattice_f32.c"
+#include "arm_iir_lattice_init_f32.c"
+#include "arm_iir_lattice_init_q15.c"
+#include "arm_iir_lattice_init_q31.c"
+#include "arm_iir_lattice_q15.c"
+#include "arm_iir_lattice_q31.c"
+#include "arm_lms_f32.c"
+#include "arm_lms_init_f32.c"
+#include "arm_lms_init_q15.c"
+#include "arm_lms_init_q31.c"
+#include "arm_lms_norm_f32.c"
+#include "arm_lms_norm_init_f32.c"
+#include "arm_lms_norm_init_q15.c"
+#include "arm_lms_norm_init_q31.c"
+#include "arm_lms_norm_q15.c"
+#include "arm_lms_norm_q31.c"
+#include "arm_lms_q15.c"
+#include "arm_lms_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
new file mode 100644
index 00000000..80e8f58e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
@@ -0,0 +1,94 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_32x64_init_q31.c
+ * Description:  High precision Q31 Biquad cascade filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1_32x64
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 Biquad cascade 32x64 filter.
+  @param[in,out] S           points to an instance of the high precision Q31 Biquad cascade filter structure
+  @param[in]     numStages    number of 2nd order stages in the filter
+  @param[in]     pCoeffs      points to the filter coefficients
+  @param[in]     pState       points to the state buffer
+  @param[in]     postShift    Shift to be applied after the accumulator.  Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array pCoeffs in the following order:
+  
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  

+                   where b1x and a1x are the coefficients for the first stage,
+                   b2x and a2x are the coefficients for the second stage,
+                   and so on.  The pCoeffs array contains a total of 5*numStages values.
+  @par
+                   The pState points to state variables array and size of each state variable is 1.63 format.
+                   Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].
+                   The state variables are arranged in the state array as:
+  
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  

+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of 4*numStages values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cas_df1_32x64_init_q31(
+        arm_biquad_cas_df1_32x64_ins_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q63_t * pState,
+        uint8_t postShift)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign postShift to be applied to the output */
+  S->postShift = postShift;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q63_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF1_32x64 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
new file mode 100644
index 00000000..e7e41ed7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
@@ -0,0 +1,458 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_32x64_q31.c
+ * Description:  High precision Q31 Biquad cascade filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter
+
+  This function implements a high precision Biquad cascade filter which operates on
+  Q31 data values.  The filter coefficients are in 1.31 format and the state variables
+  are in 1.63 format.  The double precision state variables reduce quantization noise
+  in the filter and provide a cleaner output.
+  These filters are particularly useful when implementing filters in which the
+  singularities are close to the unit circle.  This is common for low pass or high
+  pass filters with very low cutoff frequencies.
+
+  The function operates on blocks of input and output data
+  and each call to the function processes blockSize samples through
+  the filter. pSrc and pDst points to input and output arrays
+  containing blockSize Q31 values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+  

+                   A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
+                   \image html Biquad.gif "Single Biquad filter stage"
+                   Coefficients b0, b1 and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.
+                   Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.
+                   Pay careful attention to the sign of the feedback coefficients.
+                   Some design tools use the difference equation
+  
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
+  

+                   In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   numStages refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with numStages=4 second order stages.
+                   \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
+                   A 9th order filter would be realized with numStages=5 second order stages
+                   with the coefficients for one of the stages configured as a first order filter
+                   (b2=0 and a2=0).
+  @par
+                   The pState points to state variables array.
+                   Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision.
+                   The state variables are arranged in the array as:
+  
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  

+  @par
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of 4*numStages values of data in 1.63 format.
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+
+  @par           Init Function
+                   There is also an associated initialization function which performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero.
+
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   For example, to statically initialize the filter instance structure use
+  
+      arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
+  

+                   where numStages is the number of Biquad stages in the filter;
+                   pState is the address of the state buffer;
+                   pCoeffs is the address of the coefficient buffer;
+                   postShift shift to be applied which is described in detail below.
+  @par           Fixed-Point Behavior
+                   Care must be taken while using Biquad Cascade 32x64 filter function.
+                   Following issues must be considered:
+                   - Scaling of coefficients
+                   - Filter gain
+                   - Overflow and saturation
+
+  @par
+                   Filter coefficients are represented as fractional values and
+                   restricted to lie in the range [-1 +1).
+                   The processing function has an additional scaling parameter postShift
+                   which allows the filter coefficients to exceed the range [+1 -1).
+                   At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.
+                   \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
+                   This essentially scales the filter coefficients by 2^postShift.
+                   For example, to realize the coefficients
+  
+     {1.5, -0.8, 1.2, 1.6, -0.9}
+  

+                   set the Coefficient array to:
+  
+     {0.75, -0.4, 0.6, 0.8, -0.45}
+  

+                   and set postShift=1
+  @par
+                   The second thing to keep in mind is the gain through the filter.
+                   The frequency response of a Biquad filter is a function of its coefficients.
+                   It is possible for the gain through the filter to exceed 1.0 meaning that the
+                   filter increases the amplitude of certain frequencies.
+                   This means that an input signal with amplitude < 1.0 may result in an output > 1.0
+                   and these are saturated or overflowed based on the implementation of the filter.
+                   To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0
+                   or the input signal must be scaled down so that the combination of input and filter are never overflowed.
+  @par
+                   The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.
+                   This is described in the function specific documentation below.
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1_32x64
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 Biquad cascade 32x64 filter.
+  @param[in]     S         points to an instance of the high precision Q31 Biquad cascade filter
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Details
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to
+                   1.31 format by discarding the low 32 bits.
+  @par
+                   Two related functions are provided in the CMSIS DSP library.
+                   - \ref arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.
+                   - \ref arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
+ */
+
+void arm_biquad_cas_df1_32x64_q31(
+  const arm_biquad_cas_df1_32x64_ins_q31 * S,
+        q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pIn = pSrc;                             /* input pointer initialization */
+        q31_t *pOut = pDst;                            /* output pointer initialization */
+        q63_t *pState = S->pState;                     /* state pointer initialization */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* coeff pointer initialization */
+        q63_t acc;                                     /* accumulator */
+        q31_t Xn1, Xn2;                                /* Input Filter state variables */
+        q63_t Yn1, Yn2;                                /* Output Filter state variables */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn;                                      /* temporary input */
+        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* loop counters */
+        q31_t acc_l, acc_h;                            /* temporary output */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the state values */
+    Xn1 = (q31_t) (pState[0]);
+    Xn2 = (q31_t) (pState[1]);
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variable acc hold output value that is being computed and stored in destination buffer
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn * b0;
+
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn1 * b1;
+
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn2 * b2;
+
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn1, a1);
+
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn2, a2);
+
+      /* The result is converted to 1.63 , Yn2 variable is reused */
+      Yn2 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *pOut = acc_h;
+
+      /* Read the second input into Xn2, to reuse the value */
+      Xn2 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc +=  b1 * x[n-1] */
+      acc = (q63_t) Xn * b1;
+
+      /* acc =  b0 * x[n] */
+      acc += (q63_t) Xn2 * b0;
+
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn1 * b2;
+
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn2, a1);
+
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn1, a2);
+
+      /* The result is converted to 1.63, Yn1 variable is reused */
+      Yn1 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Read the third input into Xn1, to reuse the value */
+      Xn1 = *pIn++;
+
+      /* The result is converted to 1.31 */
+      /* Store the output in the destination buffer. */
+      *(pOut + 1U) = acc_h;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn1 * b0;
+
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn2 * b1;
+
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn * b2;
+
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn1, a1);
+
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn2, a2);
+
+      /* The result is converted to 1.63, Yn2 variable is reused  */
+      Yn2 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *(pOut + 2U) = acc_h;
+
+      /* Read the fourth input into Xn, to reuse the value */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn * b0;
+
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn1 * b1;
+
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn2 * b2;
+
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn2, a1);
+
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn1, a2);
+
+      /* The result is converted to 1.63, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *(pOut + 3U) = acc_h;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+
+      /* update output pointer */
+      pOut += 4U;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn * b0;
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn1 * b1;
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn2 * b2;
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn1, a1);
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn2, a2);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+
+      /* The result is converted to 1.63, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *pOut++ = acc_h;
+      /* Yn1 = acc << shift; */
+
+      /* Store the output in the destination buffer in 1.31 format. */
+/*    *pOut++ = (q31_t) (acc >> (32 - shift));  */
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* The first stage output is given as input to the second stage. */
+    pIn = pDst;
+
+    /* Reset to destination buffer working pointer */
+    pOut = pDst;
+
+    /*  Store the updated state variables back into the pState array */
+    *pState++ = (q63_t) Xn1;
+    *pState++ = (q63_t) Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+  } while (--stage);
+
+}
+
+/**
+  @} end of BiquadCascadeDF1_32x64 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
new file mode 100644
index 00000000..ea75d3b6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
@@ -0,0 +1,495 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_f32.c
+ * Description:  Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
+
+  This set of functions implements arbitrary order recursive (IIR) filters.
+  The filters are implemented as a cascade of second order Biquad sections.
+  The functions support Q15, Q31 and floating-point data types.
+  Fast version of Q15 and Q31 also available.
+
+  The functions operate on blocks of input and output data and each call to the function
+  processes blockSize samples through the filter.
+  pSrc points to the array of input data and
+  pDst points to the array of output data.
+  Both arrays contain blockSize values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+  

+                  A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
+                  \image html Biquad.gif "Single Biquad filter stage"
+                  Coefficients b0, b1 and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.
+                  Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.
+                  Pay careful attention to the sign of the feedback coefficients.
+                  Some design tools use the difference equation
+  
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
+  

+                  In this case the feedback coefficients a1 and a2
+                  must be negated when used with the CMSIS DSP Library.
+
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   numStages refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with numStages=4 second order stages.
+                   \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
+                   A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
+
+  @par
+                   The pState points to state variables array.
+                   Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].
+                   The state variables are arranged in the pState array as:
+  
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  

+
+  @par
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of 4*numStages values.
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Init Function
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  
+      arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
+      arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
+      arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
+  

+                   where numStages is the number of Biquad stages in the filter;
+                   pState is the address of the state buffer;
+                   pCoeffs is the address of the coefficient buffer;
+                   postShift shift to be applied.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
+                   Following issues must be considered:
+                   - Scaling of coefficients
+                   - Filter gain
+                   - Overflow and saturation
+
+  @par           Scaling of coefficients
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range [-1 +1).
+                   The fixed-point functions have an additional scaling parameter postShift
+                   which allow the filter coefficients to exceed the range [+1 -1).
+                   At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.
+                   \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
+                   This essentially scales the filter coefficients by 2^postShift.
+                   For example, to realize the coefficients
+  
+     {1.5, -0.8, 1.2, 1.6, -0.9}
+  

+                   set the pCoeffs array to:
+  
+     {0.75, -0.4, 0.6, 0.8, -0.45}
+  

+                   and set postShift=1
+
+  @par           Filter gain
+                   The frequency response of a Biquad filter is a function of its coefficients.
+                   It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
+                   This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
+                   To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
+
+  @par           Overflow and saturation
+                   For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point Biquad cascade filter.
+  @param[in]     S         points to an instance of the floating-point Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_NEON) 
+void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+
+  const float32_t *pIn = pSrc;                         /*  source pointer            */
+  float32_t *pOut = pDst;                        /*  destination pointer       */
+  float32_t *pState = S->pState;                 /*  pState pointer            */
+  const float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
+  float32_t acc;                                 /*  Simulates the accumulator */
+  
+  uint32_t sample, stage = S->numStages;         /*  loop counters             */
+
+  float32x4_t Xn;
+  float32x2_t Yn;
+  float32x2_t a;
+  float32x4_t b;
+  
+  float32x4_t x,tmp;
+  float32x2_t t;
+  float32x2x2_t y;
+
+  float32_t Xns;
+
+  while (stage > 0U)
+  {
+    /* Reading the coefficients */
+    Xn = vld1q_f32(pState);
+    Yn = vld1_f32(pState + 2);
+
+    b = vld1q_f32(pCoeffs);
+    b = vrev64q_f32(b);  
+    b = vcombine_f32(vget_high_f32(b), vget_low_f32(b));
+
+    a = vld1_f32(pCoeffs + 3);
+    a = vrev64_f32(a);
+    b[0] = 0.0;
+    pCoeffs += 5;
+    
+    /* Reading the pState values */
+   
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /*      The variable acc hold output values that are being computed:
+     *
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first 4 inputs */
+      x = vld1q_f32(pIn);
+
+      pIn += 4;
+
+      tmp = vextq_f32(Xn, x, 1);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      tmp = vextq_f32(Xn, x, 2);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      y.val[0] = Yn;
+
+      tmp = vextq_f32(Xn, x, 3);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      Xn = x;
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(Xn));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(Xn));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+      
+      y.val[1] = Yn;
+
+      tmp = vcombine_f32(y.val[0], y.val[1]);
+
+      /* Store the 4 outputs and increment the pointer */
+      vst1q_f32(pOut, tmp);
+      pOut += 4;
+
+      /* Decrement the loop counter */
+      sample--;
+    }
+
+    /* If the block size is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    sample = blockSize & 0x3U;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xns = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc =  (b[1] * Xn[2]) + (b[2] * Xn[3]) + (b[3] * Xns) + (a[0] * Yn[0]) + (a[1] * Yn[1]);
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:    */
+      /* Xn2 = Xn1   */
+      /* Xn1 = Xn    */
+      /* Yn2 = Yn1   */
+      /* Yn1 = acc   */
+      Xn[2] = Xn[3];
+      Xn[3] = Xns;
+      Yn[0] = Yn[1];
+      Yn[1] = acc;
+
+      /* Decrement the loop counter */
+      sample--;
+
+    }
+
+    vst1q_f32(pState,vcombine_f32(vrev64_f32(vget_high_f32(Xn)),vrev64_f32(Yn)));
+    pState += 4;
+    /*  Store the updated state variables back into the pState array */
+   
+    /*  The first stage goes from the input buffer to the output buffer. */
+    /*  Subsequent numStages  occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset the output pointer */
+    pOut = pDst;
+
+    /* Decrement the loop counter */
+    stage--;
+  }
+}
+
+#else
+void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* pState pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc;                                 /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1, Xn2, Yn1, Yn2;                  /* Filter pState variables */
+        float32_t Xn;                                  /* Temporary input */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the pState values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variable acc hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the second input */
+      Xn2 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the third input */
+      Xn1 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the forth input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = acc;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent numStages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset output pointer */
+    pOut = pDst;
+
+    /* decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
new file mode 100644
index 00000000..917e028d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
@@ -0,0 +1,250 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_fast_q15.c
+ * Description:  Fast processing function for the Q15 Biquad cascade filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 Biquad cascade filter (fast variant).
+  @param[in]     S         points to an instance of the Q15 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
+                   The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits.
+ @remark
+                   Refer to \ref arm_biquad_cascade_df1_q15() for a slower implementation of this function
+                   which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
+                   Use the function \ref arm_biquad_cascade_df1_init_q15() to initialize the filter structure.
+ */
+
+void arm_biquad_cascade_df1_fast_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t acc;                                     /* Accumulator */
+        q31_t in;                                      /* Temporary variable to hold input value */
+        q31_t out;                                     /* Temporary variable to hold output value */
+        q31_t b0;                                      /* Temporary variable to hold bo value */
+        q31_t b1, a1;                                  /* Filter coefficients */
+        q31_t state_in, state_out;                     /* Filter state variables */
+        int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+    /* Read the b0 and 0 coefficients using SIMD  */
+    b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the b1 and b2 coefficients using SIMD */
+    b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the a1 and a2 coefficients using SIMD */
+    a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
+    state_in = read_q15x2_ia (&pState);
+
+    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
+    state_out = read_q15x2_da (&pState);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 2 output values simultaneously. */
+    /* Variable acc hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 2 outputs at a time */
+    sample = blockSize >> 1U;
+
+    while (sample > 0U)
+    {
+
+      /* Read the input */
+      in = read_q15x2_ia ((q15_t **) &pIn);
+
+      /* out =  b0 * x[n] + 0 * 0 */
+      out = __SMUAD(b0, in);
+      /* acc =  b1 * x[n-1] + acc +=  b2 * x[n-2] + out */
+      acc = __SMLAD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
+      acc = __SMLAD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
+      out = __SSAT((acc >> shift), 16);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in  = __PKHBT(in, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, (in >> 16), 16);
+      state_out = __PKHBT(state_out >> 16, (out), 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* out =  b0 * x[n] + 0 * 0 */
+      out = __SMUADX(b0, in);
+      /* acc0 =  b1 * x[n-1] , acc0 +=  b2 * x[n-2] + out */
+      acc = __SMLAD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
+      acc = __SMLAD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
+      out = __SSAT((acc >> shift), 16);
+
+      /* Store the output in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in  = __PKHBT(in >> 16, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = (blockSize & 0x1U);
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      in = *pIn++;
+
+      /* out =  b0 * x[n] + 0 * 0 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      out = __SMUAD(b0, in);
+#else
+      out = __SMUADX(b0, in);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */
+      acc = __SMLAD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
+      acc = __SMLAD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
+      out = __SSAT((acc >> shift), 16);
+
+      /* Store the output in the destination buffer. */
+      *pOut++ = (q15_t) out;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in = __PKHBT(in, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent (numStages - 1) occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset the output pointer */
+    pOut = pDst;
+
+    /* Store the updated state variables back into the state array */
+    write_q15x2_ia(&pState, state_in);
+    write_q15x2_ia(&pState, state_out);
+
+    /* Decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
new file mode 100644
index 00000000..4c30cda4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
@@ -0,0 +1,296 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_fast_q31.c
+ * Description:  Processing function for the Q31 Fast Biquad cascade DirectFormI(DF1) filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 Biquad cascade filter (fast variant).
+  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function
+                   arm_biquad_cascade_df1_init_q31() to initialize filter structure.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_q31() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure.
+                   Use the function \ref arm_biquad_cascade_df1_init_q31() to initialize the filter structure.
+ */
+
+void arm_biquad_cascade_df1_fast_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+        q31_t *pOut = pDst;                            /* Destination pointer */
+        q31_t *pState = S->pState;                     /* pState pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t acc = 0;                                 /* Accumulator */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
+        q31_t Xn;                                      /* Temporary input */
+        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the pState values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variables acc ... acc3 hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/
+      mult_32x32_keep32_R(acc, b1, Xn1);
+      /* acc +=  b1 * x[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b0, Xn);
+      /* acc +=  b[2] * x[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
+      /* acc +=  a1 * y[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
+      /* acc +=  a2 * y[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
+
+      /* The result is converted to 1.31 , Yn2 variable is reused */
+      Yn2 = acc << shift;
+
+      /* Read the second input */
+      Xn2 = *(pIn + 1U);
+
+      /* Store the output in the destination buffer. */
+      *pOut = Yn2;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/
+      mult_32x32_keep32_R(acc, b0, Xn2);
+      /* acc +=  b1 * x[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b1, Xn);
+      /* acc +=  b[2] * x[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn1);
+      /* acc +=  a1 * y[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn2);
+      /* acc +=  a2 * y[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn1);
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Read the third input  */
+      Xn1 = *(pIn + 2U);
+
+      /* Store the output in the destination buffer. */
+      *(pOut + 1U) = Yn1;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/
+      mult_32x32_keep32_R(acc, b0, Xn1);
+      /* acc +=  b1 * x[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b1, Xn2);
+      /* acc +=  b[2] * x[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn);
+      /* acc +=  a1 * y[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
+      /* acc +=  a2 * y[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
+
+      /* The result is converted to 1.31, Yn2 variable is reused  */
+      Yn2 = acc << shift;
+
+      /* Read the forth input */
+      Xn = *(pIn + 3U);
+
+      /* Store the output in the destination buffer. */
+      *(pOut + 2U) = Yn2;
+      pIn += 4U;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
+      mult_32x32_keep32_R(acc, b0, Xn);
+      /* acc +=  b1 * x[n-1] */
+      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b1, Xn1);
+      /* acc +=  b[2] * x[n-2] */
+      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
+      /* acc +=  a1 * y[n-1] */
+      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn2);
+      /* acc +=  a2 * y[n-2] */
+      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn1);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      Xn2 = Xn1;
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Xn1 = Xn */
+      Xn1 = Xn;
+
+      /* Store the output in the destination buffer. */
+      *(pOut + 3U) = Yn1;
+      pOut += 4U;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = (blockSize & 0x3U);
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
+      mult_32x32_keep32_R(acc, b0, Xn);
+      /* acc +=  b1 * x[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b1, Xn1);
+      /* acc +=  b[2] * x[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
+      /* acc +=  a1 * y[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
+      /* acc +=  a2 * y[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
+
+      /* The result is converted to 1.31  */
+      acc = acc << shift;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = acc;
+
+      /* Store the output in the destination buffer. */
+      *pOut++ = acc;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent stages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset to destination pointer */
+    pOut = pDst;
+
+    /* Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+  } while (--stage);
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
new file mode 100644
index 00000000..b1836426
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
@@ -0,0 +1,91 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_init_f32.c
+ * Description:  Floating-point Biquad cascade DirectFormI(DF1) filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point Biquad cascade filter.
+  @param[in,out] S           points to an instance of the floating-point Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array pCoeffs in the following order:
+  
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  

+
+  @par
+                   where b1x and a1x are the coefficients for the first stage,
+                   b2x and a2x are the coefficients for the second stage,
+                   and so on. The pCoeffs array contains a total of 5*numStages values.
+  @par
+                   The pState is a pointer to state array.
+                   Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].
+                   The state variables are arranged in the pState array as:
+  
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  

+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of 4*numStages values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_df1_init_f32(
+        arm_biquad_casd_df1_inst_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
new file mode 100644
index 00000000..a57c5d5a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
@@ -0,0 +1,96 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_init_q15.c
+ * Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 Biquad cascade filter.
+  @param[in,out] S           points to an instance of the Q15 Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @param[in]     postShift   Shift to be applied to the accumulator result. Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array pCoeffs in the following order:
+  
+      {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
+  

+  @par
+                   where b1x and a1x are the coefficients for the first stage,
+                   b2x and a2x are the coefficients for the second stage,
+                   and so on.  The pCoeffs array contains a total of 6*numStages values.
+                   The zero coefficient between b1 and b2 facilities  use of 16-bit SIMD instructions on the Cortex-M4.
+  @par
+                   The state variables are stored in the array pState.
+                   Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].
+                   The state variables are arranged in the pState array as:
+  
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  

+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of 4*numStages values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_df1_init_q15(
+        arm_biquad_casd_df1_inst_q15 * S,
+        uint8_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int8_t postShift)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign postShift to be applied to the output */
+  S->postShift = postShift;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
new file mode 100644
index 00000000..301181c6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
@@ -0,0 +1,95 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_init_q31.c
+ * Description:  Q31 Biquad cascade DirectFormI(DF1) filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 Biquad cascade filter.
+  @param[in,out] S           points to an instance of the Q31 Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @param[in]     postShift   Shift to be applied after the accumulator.  Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array pCoeffs in the following order:
+  
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  

+  @par
+                   where b1x and a1x are the coefficients for the first stage,
+                   b2x and a2x are the coefficients for the second stage,
+                   and so on.  The pCoeffs array contains a total of 5*numStages values.
+  @par
+                   The pState points to state variables array.
+                   Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].
+                   The state variables are arranged in the pState array as:
+  
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  

+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of 4*numStages values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_df1_init_q31(
+        arm_biquad_casd_df1_inst_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int8_t postShift)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign postShift to be applied to the output */
+  S->postShift = postShift;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
new file mode 100644
index 00000000..0d3a2f3d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
@@ -0,0 +1,363 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_q15.c
+ * Description:  Processing function for the Q15 Biquad cascade DirectFormI(DF1) filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 Biquad cascade filter.
+  @param[in]     S         points to an instance of the Q15 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the location where the output result is written
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits.
+                   Finally, the result is saturated to 1.15 format.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter.
+ */
+
+void arm_biquad_cascade_df1_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+
+
+#if defined (ARM_MATH_DSP)
+
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q31_t in;                                      /* Temporary variable to hold input value */
+        q31_t out;                                     /* Temporary variable to hold output value */
+        q31_t b0;                                      /* Temporary variable to hold bo value */
+        q31_t b1, a1;                                  /* Filter coefficients */
+        q31_t state_in, state_out;                     /* Filter state variables */
+        q31_t acc_l, acc_h;
+        q63_t acc;                                     /* Accumulator */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /* Post shift */
+        uint32_t sample, stage = (uint32_t) S->numStages;     /* Stage loop counter */
+        int32_t uShift = (32 - lShift);
+
+  do
+  {
+    /* Read the b0 and 0 coefficients using SIMD  */
+    b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the b1 and b2 coefficients using SIMD */
+    b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the a1 and a2 coefficients using SIMD */
+    a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
+    state_in = read_q15x2_ia (&pState);
+
+    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
+    state_out = read_q15x2_da (&pState);
+
+    /* Apply loop unrolling and compute 2 output values simultaneously. */
+    /*      The variable acc hold output values that are being computed:
+     *
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+    sample = blockSize >> 1U;
+
+    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
+     ** a second loop below computes the remaining 1 sample. */
+    while (sample > 0U)
+    {
+
+      /* Read the input */
+      in = read_q15x2_ia ((q15_t **) &pIn);
+
+      /* out =  b0 * x[n] + 0 * 0 */
+      out = __SMUAD(b0, in);
+
+      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
+      acc = __SMLALD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */
+      acc = __SMLALD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      out = __SSAT(out, 16);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in  = __PKHBT(in, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, (in >> 16), 16);
+      state_out = __PKHBT(state_out >> 16, (out), 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* out =  b0 * x[n] + 0 * 0 */
+      out = __SMUADX(b0, in);
+      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
+      acc = __SMLALD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
+      acc = __SMLALD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      out = __SSAT(out, 16);
+
+      /* Store the output in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in  = __PKHBT(in >> 16, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Decrement loop counter */
+      sample--;
+    }
+
+    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+
+    if ((blockSize & 0x1U) != 0U)
+    {
+      /* Read the input */
+      in = *pIn++;
+
+      /* out =  b0 * x[n] + 0 * 0 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      out = __SMUAD(b0, in);
+#else
+      out = __SMUADX(b0, in);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
+      acc = __SMLALD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
+      acc = __SMLALD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      out = __SSAT(out, 16);
+
+      /* Store the output in the destination buffer. */
+      *pOut++ = (q15_t) out;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in = __PKHBT(in, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+    }
+
+    /* The first stage goes from the input wire to the output wire.  */
+    /* Subsequent numStages occur in-place in the output wire  */
+    pIn = pDst;
+
+    /* Reset the output pointer */
+    pOut = pDst;
+
+    /* Store the updated state variables back into the state array */
+    write_q15x2_ia (&pState, state_in);
+    write_q15x2_ia (&pState, state_out);
+
+    /* Decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
+#else
+
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q15_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q15_t Xn1, Xn2, Yn1, Yn2;                      /* Filter state variables */
+        q15_t Xn;                                      /* temporary input */
+        q63_t acc;                                     /* Accumulator */
+        int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        uint32_t sample, stage = (uint32_t) S->numStages;     /* Stage loop counter */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    pCoeffs++;  // skip the 0 coefficient
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the state values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+    /* The variables acc holds the output value that is computed:
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    sample = blockSize;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      acc = (q31_t) b0 *Xn;
+
+      /* acc +=  b1 * x[n-1] */
+      acc += (q31_t) b1 *Xn1;
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q31_t) b2 *Xn2;
+      /* acc +=  a1 * y[n-1] */
+      acc += (q31_t) a1 *Yn1;
+      /* acc +=  a2 * y[n-2] */
+      acc += (q31_t) a2 *Yn2;
+
+      /* The result is converted to 1.31  */
+      acc = __SSAT((acc >> shift), 16);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = (q15_t) acc;
+
+      /* Store the output in the destination buffer. */
+      *pOut++ = (q15_t) acc;
+
+      /* decrement the loop counter */
+      sample--;
+    }
+
+    /*  The first stage goes from the input buffer to the output buffer. */
+    /*  Subsequent stages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset to destination pointer */
+    pOut = pDst;
+
+    /*  Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+  } while (--stage);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
new file mode 100644
index 00000000..5ec32315
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
@@ -0,0 +1,247 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_q31.c
+ * Description:  Processing function for the Q31 Biquad cascade filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 Biquad cascade filter.
+  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to
+                   1.31 format by discarding the low 32 bits.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter.
+ */
+
+void arm_biquad_cascade_df1_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+        q31_t *pOut = pDst;                            /* Destination pointer */
+        q31_t *pState = S->pState;                     /* pState pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q63_t acc;                                     /* Accumulator */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
+        q31_t Xn;                                      /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc_l, acc_h;                            /* temporary output variables */
+#endif
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the pState values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variable acc hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31 , Yn2 variable is reused */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Read the second input */
+      Xn2 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Read the third input */
+      Xn1 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31, Yn2 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Read the forth input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31  */
+      acc = acc >> lShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = (q31_t) acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = (q31_t) acc;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent numStages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset output pointer */
+    pOut = pDst;
+
+    /* decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
new file mode 100644
index 00000000..205fcb64
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
@@ -0,0 +1,523 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_f32.c
+ * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+*/
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_NEON) 
+
+void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+   const float32_t *pIn = pSrc;                   /*  source pointer            */
+   float32_t *pOut = pDst;                        /*  destination pointer       */
+   float32_t *pState = S->pState;                 /*  State pointer             */
+   const float32_t *pCoeffs = S->pCoeffs;         /*  coefficient pointer       */
+   float32_t acc1;                                /*  accumulator               */
+   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
+   float32_t Xn1;                                 /*  temporary input           */
+   float32_t d1, d2;                              /*  state variables           */
+   uint32_t sample, stageCnt,stage = S->numStages;         /*   loop counters   */
+
+
+   float32_t Xn2, Xn3, Xn4;                       /*  Input State variables     */
+   float32_t acc2, acc3, acc4;                    /*  accumulator               */
+
+
+   float32_t p0, p1, p2, p3, p4, A1;
+
+   float32x4_t XnV, YnV;
+   float32x4x2_t dV;
+   float32x4_t zeroV = vdupq_n_f32(0.0);
+   float32x4_t t1,t2,t3,t4,b1V,b2V,a1V,a2V,s;
+
+   /* Loop unrolling. Compute 4 outputs at a time */
+   stageCnt = stage >> 2;
+
+   while (stageCnt > 0U)
+   {
+      /* Reading the coefficients */
+      t1 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      t2 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      t3 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      t4 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      b1V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      b2V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      a1V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      a2V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      /* Reading the state values */
+      dV = vld2q_f32(pState);
+
+      sample = blockSize;
+      
+      while (sample > 0U) {
+         /* y[n] = b0 * x[n] + d1 */
+         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+         /* d2 = b2 * x[n] + a2 * y[n] */
+
+         XnV = vdupq_n_f32(*pIn++);
+
+         s = dV.val[0];
+         YnV = s;
+
+         s = vextq_f32(zeroV,dV.val[0],3);
+         YnV = vmlaq_f32(YnV, t1, s);
+
+         s = vextq_f32(zeroV,dV.val[0],2);
+         YnV = vmlaq_f32(YnV, t2, s);
+
+         s = vextq_f32(zeroV,dV.val[0],1);
+         YnV = vmlaq_f32(YnV, t3, s);
+
+         YnV = vmlaq_f32(YnV, t4, XnV);
+
+         s = vextq_f32(XnV,YnV,3);
+
+         dV.val[0] = vmlaq_f32(dV.val[1], s, b1V);
+         dV.val[0] = vmlaq_f32(dV.val[0], YnV, a1V);
+
+         dV.val[1] = vmulq_f32(s, b2V);
+         dV.val[1] = vmlaq_f32(dV.val[1], YnV, a2V);
+
+         *pOut++ = YnV[3];
+
+         sample--;
+      }
+     
+      /* Store the updated state variables back into the state array */
+      vst2q_f32(pState,dV);
+      pState += 8;
+
+      /* The current stage input is given as the output to the next stage */
+      pIn = pDst;
+
+      /*Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement the loop counter */
+      stageCnt--;
+
+   } 
+
+   /* Tail */
+   stageCnt = stage & 3;
+   
+   while (stageCnt > 0U)
+   {
+      /* Reading the coefficients */
+      b0 = *pCoeffs++;
+      b1 = *pCoeffs++;
+      b2 = *pCoeffs++;
+      a1 = *pCoeffs++;
+      a2 = *pCoeffs++;
+
+      /*Reading the state values */
+      d1 = pState[0];
+      d2 = pState[1];
+
+      sample = blockSize;
+
+      while (sample > 0U)
+      {
+         /* Read the input */
+         Xn1 = *pIn++;
+
+         /* y[n] = b0 * x[n] + d1 */
+         acc1 = (b0 * Xn1) + d1;
+
+         /* Store the result in the accumulator in the destination buffer. */
+         *pOut++ = acc1;
+
+         /* Every time after the output is computed state should be updated. */
+         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
+
+         /* d2 = b2 * x[n] + a2 * y[n] */
+         d2 = (b2 * Xn1) + (a2 * acc1);
+
+         /* decrement the loop counter */
+         sample--;
+      }
+
+      /* Store the updated state variables back into the state array */
+      *pState++ = d1;
+      *pState++ = d2;
+
+      /* The current stage input is given as the output to the next stage */
+      pIn = pDst;
+
+      /*Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement the loop counter */
+      stageCnt--;
+   }
+}
+#else
+LOW_OPTIMIZATION_ENTER
+void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc1;                                /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1;                                 /* Temporary input */
+        float32_t d1, d2;                              /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+     /* Reading the coefficients */
+     b0 = pCoeffs[0];
+     b1 = pCoeffs[1];
+     b2 = pCoeffs[2];
+     a1 = pCoeffs[3];
+     a2 = pCoeffs[4];
+
+     /* Reading the state values */
+     d1 = pState[0];
+     d2 = pState[1];
+
+     pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 16 outputs at a time */
+     sample = blockSize >> 4U;
+
+     while (sample > 0U) {
+
+       /* y[n] = b0 * x[n] + d1 */
+       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+       /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+       Xn1 = *pIn++;
+
+       acc1 = b0 * Xn1 + d1;
+
+       d1 = b1 * Xn1 + d2;
+       d1 += a1 * acc1;
+
+       d2 = b2 * Xn1;
+       d2 += a2 * acc1;
+
+       *pOut++ = acc1;
+
+/*  2 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  3 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  4 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  5 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  6 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  7 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  8 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  9 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 10 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 11 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 12 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 13 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 14 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 15 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 16 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+        /* decrement loop counter */
+        sample--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      sample = blockSize & 0xFU;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (sample > 0U) {
+        Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+        /* decrement loop counter */
+        sample--;
+      }
+
+      /* Store the updated state variables back into the state array */
+      pState[0] = d1;
+      pState[1] = d2;
+
+      pState += 2U;
+
+      /* The current stage input is given as the output to the next stage */
+      pIn = pDst;
+
+      /* Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement loop counter */
+      stage--;
+
+   } while (stage > 0U);
+
+}
+LOW_OPTIMIZATION_EXIT
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
new file mode 100644
index 00000000..3d527a05
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
@@ -0,0 +1,443 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_f64.c
+ * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+*/
+
+/**
+  @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
+
+  This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
+  The filters are implemented as a cascade of second order Biquad sections.
+  These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
+  Only floating-point data is supported.
+
+  This function operate on blocks of input and output data and each call to the function
+  processes blockSize samples through the filter.
+  pSrc points to the array of input data and
+  pDst points to the array of output data.
+  Both arrays contain blockSize values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  
+     y[n] = b0 * x[n] + d1
+     d1 = b1 * x[n] + a1 * y[n] + d2
+     d2 = b2 * x[n] + a2 * y[n]
+  

+                   where d1 and d2 represent the two state values.
+  @par
+                   A Biquad filter using a transposed Direct Form II structure is shown below.
+                   \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
+                   Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.
+                   Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.
+                   Pay careful attention to the sign of the feedback coefficients.
+                   Some design tools flip the sign of the feedback coefficients:
+  
+     y[n] = b0 * x[n] + d1;
+     d1 = b1 * x[n] - a1 * y[n] + d2;
+     d2 = b2 * x[n] - a2 * y[n];
+  

+                   In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   numStages refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with numStages=4 second order stages.
+                   A 9th order filter would be realized with numStages=5 second order stages with the
+                   coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).
+  @par
+                   pState points to the state variable array.
+                   Each Biquad stage has 2 state variables d1 and d2.
+                   The state variables are arranged in the pState array as:
+  
+      {d11, d12, d21, d22, ...}
+  

+                   where d1x refers to the state variables for the first Biquad and
+                   d2x refers to the state variables for the second Biquad.
+                   The state array has a total length of 2*numStages values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @par
+                   The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
+                   The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
+                   That is why the Direct Form I structure supports Q15 and Q31 data types.
+                   The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.
+                   Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
+                   The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+
+  @par           Init Functions
+                   There is also an associated initialization function.
+                   The initialization function performs following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   For example, to statically initialize the instance structure use
+  
+      arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
+      arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
+  

+                   where numStages is the number of Biquad stages in the filter;
+                   pState is the address of the state buffer.
+                   pCoeffs is the address of the coefficient buffer;
+*/
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+LOW_OPTIMIZATION_ENTER
+void arm_biquad_cascade_df2T_f64(
+  const arm_biquad_cascade_df2T_instance_f64 * S,
+        float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+
+        float64_t *pIn = pSrc;                         /* Source pointer */
+        float64_t *pOut = pDst;                        /* Destination pointer */
+        float64_t *pState = S->pState;                 /* State pointer */
+        float64_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float64_t acc1;                                /* Accumulator */
+        float64_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float64_t Xn1;                                 /* Temporary input */
+        float64_t d1, d2;                              /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+
+   do
+   {
+      /* Reading the coefficients */
+      b0 = pCoeffs[0];
+      b1 = pCoeffs[1];
+      b2 = pCoeffs[2];
+      a1 = pCoeffs[3];
+      a2 = pCoeffs[4];
+
+      /* Reading the state values */
+      d1 = pState[0];
+      d2 = pState[1];
+
+      pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 16 outputs at a time */
+      sample = blockSize >> 4U;
+
+      while (sample > 0U) {
+
+         /* y[n] = b0 * x[n] + d1 */
+         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+         /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+
+/*  2 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  3 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  4 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  5 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  6 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  7 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  8 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  9 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 10 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 11 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 12 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 13 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 14 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 15 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 16 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+         /* decrement loop counter */
+         sample--;
+      }
+
+    /* Loop unrolling: Compute remaining outputs */
+      sample = blockSize & 0xFU;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (sample > 0U) {
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+         /* decrement loop counter */
+         sample--;
+      }
+
+      /* Store the updated state variables back into the state array */
+      pState[0] = d1;
+      pState[1] = d2;
+
+      pState += 2U;
+
+      /* The current stage input is given as the output to the next stage */
+      pIn = pDst;
+
+      /* Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement loop counter */
+      stage--;
+
+   } while (stage > 0U);
+
+}
+LOW_OPTIMIZATION_EXIT
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
new file mode 100644
index 00000000..1da7f3ec
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
@@ -0,0 +1,211 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_init_f32.c
+ * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array pCoeffs in the following order
+                   in the not Neon version.
+  
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  

+                   
+  @par
+                   where b1x and a1x are the coefficients for the first stage,
+                   b2x and a2x are the coefficients for the second stage,
+                   and so on.  The pCoeffs array contains a total of 5*numStages values.
+
+                   For Neon version, this array is bigger. If numstages = 4x + y, then the array has size:
+                   32*x + 5*y
+                   and it must be initialized using the function
+                   arm_biquad_cascade_df2T_compute_coefs_f32 which is taking the
+                   standard array coefficient as parameters.
+
+                   But, an array of 8*numstages is a good approximation.
+
+                   Then, the initialization can be done with:
+  
+                   arm_biquad_cascade_df2T_init_f32(&SNeon, nbCascade, neonCoefs, stateNeon);
+                   arm_biquad_cascade_df2T_compute_coefs_f32(&SNeon,nbCascade,coefs);
+  

+
+  @par             In this example, neonCoefs is a bigger array of size 8 * numStages.
+                   coefs is the standard array:
+
+  
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  

+
+
+  @par
+                   The pState is a pointer to state array.
+                   Each Biquad stage has 2 state variables d1, and d2.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of 2*numStages values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+#if defined(ARM_MATH_NEON) 
+/*
+
+Must be called after initializing the biquad instance.
+pCoeffs has size 5 * nbCascade
+Whereas the pCoeffs for the init has size (4*4 + 4*4)* nbCascade 
+
+So this pCoeffs is the one which would be used for the not Neon version.
+The pCoeffs passed in init is bigger than the one for the not Neon version.
+
+*/
+void arm_biquad_cascade_df2T_compute_coefs_f32(
+  arm_biquad_cascade_df2T_instance_f32 * S,
+  uint8_t numStages,
+  float32_t * pCoeffs)
+{
+   uint8_t cnt;
+   float32_t *pDstCoeffs;
+   float32_t b0[4],b1[4],b2[4],a1[4],a2[4];
+
+   pDstCoeffs = S->pCoeffs;
+
+   cnt = numStages >> 2; 
+   while(cnt > 0)
+   {
+      for(int i=0;i<4;i++)
+      {
+        b0[i] = pCoeffs[0];
+        b1[i] = pCoeffs[1];
+        b2[i] = pCoeffs[2];
+        a1[i] = pCoeffs[3];
+        a2[i] = pCoeffs[4];
+        pCoeffs += 5;
+      }
+
+      /* Vec 1 */
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = b0[1];
+      *pDstCoeffs++ = b0[2];
+      *pDstCoeffs++ = b0[3];
+
+      /* Vec 2 */
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = b0[1] * b0[2];
+      *pDstCoeffs++ = b0[2] * b0[3];
+
+      /* Vec 3 */
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = 0;
+      *pDstCoeffs++ = b0[1] * b0[2] * b0[3];
+      
+      /* Vec 4 */
+      *pDstCoeffs++ = b0[0];
+      *pDstCoeffs++ = b0[0] * b0[1];
+      *pDstCoeffs++ = b0[0] * b0[1] * b0[2];
+      *pDstCoeffs++ = b0[0] * b0[1] * b0[2] * b0[3];
+
+      /* Vec 5 */
+      *pDstCoeffs++ = b1[0];
+      *pDstCoeffs++ = b1[1];
+      *pDstCoeffs++ = b1[2];
+      *pDstCoeffs++ = b1[3];
+
+      /* Vec 6 */
+      *pDstCoeffs++ = b2[0];
+      *pDstCoeffs++ = b2[1];
+      *pDstCoeffs++ = b2[2];
+      *pDstCoeffs++ = b2[3];
+
+      /* Vec 7 */
+      *pDstCoeffs++ = a1[0];
+      *pDstCoeffs++ = a1[1];
+      *pDstCoeffs++ = a1[2];
+      *pDstCoeffs++ = a1[3];
+
+      /* Vec 8 */
+      *pDstCoeffs++ = a2[0];
+      *pDstCoeffs++ = a2[1];
+      *pDstCoeffs++ = a2[2];
+      *pDstCoeffs++ = a2[3];
+
+      cnt--;
+   }
+
+   cnt = numStages & 0x3;
+   while(cnt > 0)
+   {
+      *pDstCoeffs++ = *pCoeffs++;
+      *pDstCoeffs++ = *pCoeffs++;
+      *pDstCoeffs++ = *pCoeffs++;
+      *pDstCoeffs++ = *pCoeffs++;
+      *pDstCoeffs++ = *pCoeffs++;
+      cnt--;
+   }
+
+}
+#endif 
+
+void arm_biquad_cascade_df2T_init_f32(
+        arm_biquad_cascade_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 2 * numStages */
+  memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
new file mode 100644
index 00000000..6d17878f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
@@ -0,0 +1,86 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_init_f64.c
+ * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure
+  @param[in]     numStages   number of 2nd order stages in the filter
+  @param[in]     pCoeffs     points to the filter coefficients
+  @param[in]     pState      points to the state buffer
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array pCoeffs in the following order:
+  
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  

+  @par
+                   where b1x and a1x are the coefficients for the first stage,
+                   b2x and a2x are the coefficients for the second stage,
+                   and so on.  The pCoeffs array contains a total of 5*numStages values.
+  @par
+                   The pState is a pointer to state array.
+                   Each Biquad stage has 2 state variables d1, and d2.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of 2*numStages values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_df2T_init_f64(
+        arm_biquad_cascade_df2T_instance_f64 * S,
+        uint8_t numStages,
+        float64_t * pCoeffs,
+        float64_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 2 * numStages */
+  memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float64_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
new file mode 100644
index 00000000..1b972620
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
@@ -0,0 +1,285 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_stereo_df2T_f32.c
+ * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter. 2 channels
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+*/
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+LOW_OPTIMIZATION_ENTER
+void arm_biquad_cascade_stereo_df2T_f32(
+  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc1a, acc1b;                        /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1a, Xn1b;                          /* Temporary input */
+        float32_t d1a, d2a, d1b, d2b;                  /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+    do
+    {
+        /* Reading the coefficients */
+        b0 = pCoeffs[0];
+        b1 = pCoeffs[1];
+        b2 = pCoeffs[2];
+        a1 = pCoeffs[3];
+        a2 = pCoeffs[4];
+
+        /* Reading the state values */
+        d1a = pState[0];
+        d2a = pState[1];
+        d1b = pState[2];
+        d2b = pState[3];
+
+        pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 8 outputs at a time */
+        sample = blockSize >> 3U;
+
+        while (sample > 0U) {
+          /* y[n] = b0 * x[n] + d1 */
+          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+          /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  2 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  3 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  4 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  5 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  6 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  7 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  8 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+          /* decrement loop counter */
+          sample--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        sample = blockSize & 0x7U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (sample > 0U) {
+          /* Read the input */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          /* y[n] = b0 * x[n] + d1 */
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          /* Store the result in the accumulator in the destination buffer. */
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          /* Every time after the output is computed state should be updated. */
+          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          /* d2 = b2 * x[n] + a2 * y[n] */
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+          /* decrement loop counter */
+          sample--;
+        }
+
+        /* Store the updated state variables back into the state array */
+        pState[0] = d1a;
+        pState[1] = d2a;
+
+        pState[2] = d1b;
+        pState[3] = d2b;
+
+        pState += 4U;
+
+        /* The current stage input is given as the output to the next stage */
+        pIn = pDst;
+
+        /* Reset the output working pointer */
+        pOut = pDst;
+
+        /* Decrement the loop counter */
+        stage--;
+
+    } while (stage > 0U);
+
+}
+LOW_OPTIMIZATION_EXIT
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
new file mode 100644
index 00000000..f5f297cf
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
@@ -0,0 +1,86 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_stereo_df2T_init_f32.c
+ * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array pCoeffs in the following order:
+  
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  

+  @par
+                   where b1x and a1x are the coefficients for the first stage,
+                   b2x and a2x are the coefficients for the second stage,
+                   and so on.  The pCoeffs array contains a total of 5*numStages values.
+  @par
+                   The pState is a pointer to state array.
+                   Each Biquad stage has 2 state variables d1, and d2 for each channel.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of 2*numStages values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_stereo_df2T_init_f32(
+        arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
new file mode 100644
index 00000000..84424ca5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
@@ -0,0 +1,816 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_f32.c
+ * Description:  Convolution of floating-point sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup Conv Convolution
+
+  Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.
+  Convolution is similar to correlation and is frequently used in filtering and data analysis.
+  The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.
+  The library also provides fast versions of the Q15 and Q31 functions.
+
+ @par            Algorithm
+                   Let a[n] and b[n] be sequences of length srcALen and
+                   srcBLen samples respectively. Then the convolution
+  
+     c[n] = a[n] * b[n]
+  

+  @par
+                   is defined as
+                   \image html ConvolutionEquation.gif
+  @par
+                   Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2.
+                   pSrcA points to the first input vector of length srcALen and
+                   pSrcB points to the second input vector of length srcBLen.
+                   The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result.
+  @par
+                   Conceptually, when two signals a[n] and b[n] are convolved,
+                   the signal b[n] slides over a[n].
+                   For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
+  @par
+                   Note that convolution is a commutative operation:
+  
+     a[n] * b[n] = b[n] * a[n].
+  

+  @par
+                   This means that switching the A and B arguments to the convolution functions has no effect.
+
+  @par           Fixed-Point Behavior
+                   Convolution requires summing up a large number of intermediate products.
+                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+                   Refer to the function specific documentation below for further details of the particular algorithm used.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+ */
+
+void arm_conv_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const float32_t *pIn1;                               /* InputA pointer */
+  const float32_t *pIn2;                               /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
+        float32_t sum;                                 /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+        float32_t acc0, acc1, acc2, acc3;              /* Accumulators */
+        float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    res = vdupq_n_f32(0) ;
+    accum = vdup_n_f32(0);
+
+    /* Compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+
+    while (k > 0U)
+    {
+      vec1 = vld1q_f32(px);
+      vec2 = vld1q_f32(py-3);
+      vec2 = vrev64q_f32(vec2);
+      vec2 = vcombine_f32(vget_high_f32(vec2), vget_low_f32(vec2));
+
+      res = vmlaq_f32(res,vec1, vec2);
+
+      /* Increment pointers */
+      px += 4;
+      py -= 4; 
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count & 3;
+#else
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 1] */
+      sum += *px++ * *py--;
+
+      /* x[1] * y[srcBLen - 2] */
+      sum += *px++ * *py--;
+
+      /* x[2] * y[srcBLen - 3] */
+      sum += *px++ * *py--;
+
+      /* x[3] * y[srcBLen - 4] */
+      sum += *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#endif /* #if defined(ARM_MATH_NEON) */
+
+#else
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = sum;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+   
+#if defined(ARM_MATH_NEON)
+      float32x4_t c;
+      float32x4_t x1v;
+      float32x4_t x2v;
+      uint32x4_t x1v_u;
+      uint32x4_t x2v_u;
+      uint32x4_t x_u;
+      float32x4_t x;
+      float32x4_t res = vdupq_n_f32(0) ;
+#endif /* #if defined(ARM_MATH_NEON) */
+   
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0.0f;
+      acc1 = 0.0f;
+      acc2 = 0.0f;
+      acc3 = 0.0f;
+
+       /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+#if defined(ARM_MATH_NEON)
+      res = vdupq_n_f32(0) ;
+
+      x1v = vld1q_f32(px);
+      x2v = vld1q_f32(px+4);
+
+      do
+      {
+        c = vld1q_f32(py-3);
+
+        px += 4;
+        x = x1v;
+        res = vmlaq_n_f32(res,x,c[3]);
+
+	x = vextq_f32(x1v,x2v,1);
+
+        res = vmlaq_n_f32(res,x,c[2]);
+
+        x = vextq_f32(x1v,x2v,2);
+
+	res = vmlaq_n_f32(res,x,c[1]);
+
+	x = vextq_f32(x1v,x2v,3);
+
+	res = vmlaq_n_f32(res,x,c[0]);
+
+        py -= 4; 
+
+        x1v = x2v ;
+        x2v = vld1q_f32(px+4);
+
+      } while (--k);
+      
+      
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen & 0x3;
+
+      x1v = vld1q_f32(px);
+      px += 4;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *(py--);
+
+        res = vmlaq_n_f32(res,x1v,c0);
+
+        /* Reuse the present samples for the next MAC */
+        x1v[0] = x1v[1];
+        x1v[1] = x1v[2];
+        x1v[2] = x1v[3];
+
+        x1v[3] = *(px++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      acc0 = res[0];
+      acc1 = res[1];
+      acc2 = res[2];
+      acc3 = res[3];
+
+#else
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[srcBLen - 1] sample */
+        c0 = *py--;
+        /* Read x[3] sample */
+        x3 = *(px);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[srcBLen - 1] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[1] * y[srcBLen - 1] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[2] * y[srcBLen - 1] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[3] * y[srcBLen - 1] */
+        acc3 += x3 * c0;
+
+        /* Read y[srcBLen - 2] sample */
+        c0 = *py--;
+        /* Read x[4] sample */
+        x0 = *(px + 1U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[srcBLen - 2] */
+        acc0 += x1 * c0;
+        /* acc1 +=  x[2] * y[srcBLen - 2] */
+        acc1 += x2 * c0;
+        /* acc2 +=  x[3] * y[srcBLen - 2] */
+        acc2 += x3 * c0;
+        /* acc3 +=  x[4] * y[srcBLen - 2] */
+        acc3 += x0 * c0;
+
+        /* Read y[srcBLen - 3] sample */
+        c0 = *py--;
+        /* Read x[5] sample */
+        x1 = *(px + 2U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[srcBLen - 3] */
+        acc0 += x2 * c0;
+        /* acc1 +=  x[3] * y[srcBLen - 2] */
+        acc1 += x3 * c0;
+        /* acc2 +=  x[4] * y[srcBLen - 2] */
+        acc2 += x0 * c0;
+        /* acc3 +=  x[5] * y[srcBLen - 2] */
+        acc3 += x1 * c0;
+
+        /* Read y[srcBLen - 4] sample */
+        c0 = *py--;
+        /* Read x[6] sample */
+        x2 = *(px + 3U);
+        px += 4U;
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[3] * y[srcBLen - 4] */
+        acc0 += x3 * c0;
+        /* acc1 +=  x[4] * y[srcBLen - 4] */
+        acc1 += x0 * c0;
+        /* acc2 +=  x[5] * y[srcBLen - 4] */
+        acc2 += x1 * c0;
+        /* acc3 +=  x[6] * y[srcBLen - 4] */
+        acc3 += x2 * c0;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *py--;
+        /* Read x[7] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[4] * y[srcBLen - 5] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[5] * y[srcBLen - 5] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[6] * y[srcBLen - 5] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[7] * y[srcBLen - 5] */
+        acc3 += x3 * c0;
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+#endif /* #if defined(ARM_MATH_NEON) */
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = acc0;
+      *pOut++ = acc1;
+      *pOut++ = acc2;
+      *pOut++ = acc3;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)*/
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+#if defined (ARM_MATH_NEON)
+      float32x4_t res = vdupq_n_f32(0) ;
+      float32x4_t x = vdupq_n_f32(0) ;
+      float32x4_t y = vdupq_n_f32(0) ;
+      float32x2_t accum = vdup_n_f32(0) ;
+
+      /* First part of the processing.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        x = vld1q_f32(px);
+        y = vld1q_f32(py-3);
+
+        y = vrev64q_f32(y);
+        y = vcombine_f32(vget_high_f32(y), vget_low_f32(y));
+
+        res = vmlaq_f32(res,x,y);
+
+        px += 4 ;
+        py -= 4 ;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+      sum += accum[0] + accum[1]; 
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen & 0x3U;
+
+#else
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#endif /* if defined (ARM_MATH_NEON) */
+#else
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum;
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum;
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = blockSize3 >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x4_t x = vdupq_n_f32(0) ;
+    float32x4_t y = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0) ;
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py-3);
+
+      y = vrev64q_f32(y);
+      y = vcombine_f32(vget_high_f32(y), vget_low_f32(y));
+
+      res = vmlaq_f32(res,x,y);
+
+      px += 4 ;
+      py -= 4 ;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1]; 
+
+#else
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+      sum += *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+      sum += *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+      sum += *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+      sum += *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+#endif /* #if defined (ARM_MATH_NEON) */
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = blockSize3 % 0x4U;
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)*/
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum += *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = sum;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0.0f;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ( pIn1[j] * pIn2[i - j]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    pDst[i] = sum;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
new file mode 100644
index 00000000..b2144add
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
@@ -0,0 +1,366 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_fast_opt_q15.c
+ * Description:  Fast Q15 Convolution
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results
+                   but provides only a single guard bit. There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+ */
+
+void arm_conv_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q31_t acc0;                                    /* Accumulators */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
+
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* Pointer to take end of scratch2 buffer */
+  pScr2 = pScratch2 + srcBLen - 1;
+
+  /* points to smaller length sequence */
+  px = pIn2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  k = srcBLen >> 2U;
+
+  /* Copy smaller length input sequence in reverse order into second scratch buffer */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  k = srcBLen % 0x4U;
+
+#else
+
+  /* Initialize k with number of samples */
+  k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    *pScr2-- = *px++;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Initialze temporary scratch pointer */
+  pScr1 = pScratch1;
+
+  /* Assuming scratch1 buffer is aligned by 32-bit */
+  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
+
+  /* Copy (srcALen) samples in scratch buffer */
+  arm_copy_q15(pIn1, pScr1, srcALen);
+
+  /* Update pointers */
+  pScr1 += srcALen;
+
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pScratch2;
+
+
+  /* Initialization of pIn2 pointer */
+  pIn2 = py;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+      /* multiply and accumlate */
+      acc0 = __SMLAD(x1, y1, acc0);
+      acc2 = __SMLAD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumlate */
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* multiply and accumlate */
+      acc0 = __SMLAD(x2, y2, acc0);
+      acc2 = __SMLAD(x1, y2, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+      acc1 = __SMLADX(x3, y2, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y2, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch1 += 4U;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Calculate convolution for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read next two samples from scratch1 buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch1 += 1U;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
new file mode 100644
index 00000000..fc3ca73d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
@@ -0,0 +1,663 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_fast_q15.c
+ * Description:  Fast Q15 Convolution
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results
+                   but provides only a single guard bit. There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+ */
+
+void arm_conv_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
+{
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* For loop unrolling by 4, this stage is divided into two. */
+  /* First part of this stage computes the MAC operations less than 4 */
+  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
+
+  /* The first part of the stage starts here */
+  while ((count < 4U) && (blockSize1 > 0U))
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Loop over number of MAC operations between
+     * inputA samples and inputB samples */
+    k = count;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      sum = __SMLAD(*px++, *py--, sum);
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (sum >> 15);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* The second part of the stage starts here */
+  /* The internal loop, over count, is unrolled by 4 */
+  /* To, read the last two inputB samples using SIMD:
+   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
+  py = py - 1;
+
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* For the next MAC operations, the pointer py is used without SIMD
+     * So, py is incremented by 1 */
+    py = py + 1U;
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      sum = __SMLAD(*px++, *py--, sum);
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (sum >> 15);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + (count - 1U);
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is the index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* --------------------
+   * Stage2 process
+   * -------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Loop unroll over blockSize2, by 4 */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      py = py - 1U;
+
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1] samples */
+      x0 = read_q15x2 ((q15_t *) px);
+      /* read x[1], x[2] samples */
+      x1 = read_q15x2 ((q15_t *) px + 1);
+	  px += 2U;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read the last two inputB samples using SIMD:
+         * y[srcBLen - 1] and y[srcBLen - 2] */
+        c0 = read_q15x2_da ((q15_t **) &py);
+
+        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+        acc0 = __SMLADX(x0, c0, acc0);
+
+        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+        acc1 = __SMLADX(x1, c0, acc1);
+
+        /* Read x[2], x[3] */
+        x2 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[3], x[4] */
+        x3 = read_q15x2 ((q15_t *) px + 1);
+
+        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+        acc2 = __SMLADX(x2, c0, acc2);
+
+        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+        acc3 = __SMLADX(x3, c0, acc3);
+
+        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+        c0 = read_q15x2_da ((q15_t **) &py);
+
+        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+        acc0 = __SMLADX(x2, c0, acc0);
+
+        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+        acc1 = __SMLADX(x3, c0, acc1);
+
+        /* Read x[4], x[5] */
+        x0 = read_q15x2 ((q15_t *) px + 2);
+
+        /* Read x[5], x[6] */
+        x1 = read_q15x2 ((q15_t *) px + 3);
+		px += 4U;
+
+        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+        acc2 = __SMLADX(x0, c0, acc2);
+
+        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+        acc3 = __SMLADX(x1, c0, acc3);
+
+      } while (--k);
+
+      /* For the next MAC operations, SIMD is not used
+       * So, the 16 bit pointer if inputB, py is updated */
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      if (k == 1U)
+      {
+        /* Read y[srcBLen - 5] */
+        c0 = *(py+1);
+
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[7] */
+        x3 = read_q15x2 ((q15_t *) px);
+		px++;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLAD(x0, c0, acc0);
+        acc1 = __SMLAD(x1, c0, acc1);
+        acc2 = __SMLADX(x1, c0, acc2);
+        acc3 = __SMLADX(x3, c0, acc3);
+      }
+
+      if (k == 2U)
+      {
+        /* Read y[srcBLen - 5], y[srcBLen - 6] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+		px += 2U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLADX(x0, c0, acc0);
+        acc1 = __SMLADX(x1, c0, acc1);
+        acc2 = __SMLADX(x3, c0, acc2);
+        acc3 = __SMLADX(x2, c0, acc3);
+      }
+
+      if (k == 3U)
+      {
+        /* Read y[srcBLen - 5], y[srcBLen - 6] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLADX(x0, c0, acc0);
+        acc1 = __SMLADX(x1, c0, acc1);
+        acc2 = __SMLADX(x3, c0, acc2);
+        acc3 = __SMLADX(x2, c0, acc3);
+
+        /* Read y[srcBLen - 7] */
+		c0 = *(py-1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[10] */
+        x3 =  read_q15x2 ((q15_t *) px + 2);
+		px += 3U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLADX(x1, c0, acc0);
+        acc1 = __SMLAD(x2, c0, acc1);
+        acc2 = __SMLADX(x2, c0, acc2);
+        acc3 = __SMLADX(x3, c0, acc3);
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT((acc0 >> 15), (acc1 >> 15), 16));
+      write_q15x2_ia (&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT((acc1 >> 15), (acc0 >> 15), 16));
+      write_q15x2_ia (&pOut, __PKHBT((acc3 >> 15), (acc2 >> 15), 16));
+#endif /*#ifndef  ARM_MATH_BIG_ENDIAN*/
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q31_t) *px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q31_t) *px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  pIn2 = pSrc2 - 1U;
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  /* For loop unrolling by 4, this stage is divided into two. */
+  /* First part of this stage computes the MAC operations greater than 4 */
+  /* Second part of this stage computes the MAC operations less than or equal to 4 */
+
+  /* The first part of the stage starts here */
+  j = blockSize3 >> 2U;
+
+  while ((j > 0U) && (blockSize3 > 0U))
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = blockSize3 >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
+       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
+       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* For the next MAC operations, the pointer py is used without SIMD
+     * So, py is incremented by 1 */
+    py = py + 1U;
+
+    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = blockSize3 % 0x4U;
+
+    while (k > 0U)
+    {
+      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
+      sum = __SMLAD(*px++, *py--, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (sum >> 15);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement  loop counter */
+    blockSize3--;
+
+    j--;
+  }
+
+  /* The second part of the stage starts here */
+  /* SIMD is not used for the next MAC operations,
+   * so pointer py is updated to read only one sample at a time */
+  py = py + 1U;
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = blockSize3;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum = __SMLAD(*px++, *py--, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (sum >> 15);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
similarity index 54%
rename from Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c
rename to Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
index f7cd2838..c3943f00 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
@@ -1,102 +1,87 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_fast_q31.c    
-*    
-* Description:	Q31 Convolution (fast version).    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_fast_q31.c
+ * Description:  Fast Q31 Convolution
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**    
- * @ingroup groupFilters    
+/**
+  @ingroup groupFilters
  */
 
-/**    
- * @addtogroup Conv    
- * @{    
+/**
+  @addtogroup Conv
+  @{
  */
 
-/**    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- *    
- * \par    
- * See arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.    
+/**
+  @brief         Convolution of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence.
+  @param[in]     srcALen    length of the first input sequence.
+  @param[in]     pSrcB      points to the second input sequence.
+  @param[in]     srcBLen    length of the second input sequence.
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are accumulated in a 32-bit register in 2.30 format.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+  @remark
+                   Refer to \ref arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
  */
 
 void arm_conv_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
 {
-  q31_t *pIn1;                                   /* inputA pointer */
-  q31_t *pIn2;                                   /* inputB pointer */
-  q31_t *pOut = pDst;                            /* output pointer */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
   /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
+  if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
     pIn1 = pSrcA;
@@ -119,33 +104,33 @@ void arm_conv_fast_q31(
   }
 
   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
    * for every iteration. */
 
-  /* The algorithm is implemented in three stages.    
+  /* The algorithm is implemented in three stages.
      The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
 
-  /* --------------------------    
-   * Initializations of stage1    
+  /* --------------------------
+   * Initializations of stage1
    * -------------------------*/
 
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
    */
 
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
+  /* In this stage the MAC operations are increased by 1 for every iteration.
      The count variable holds the number of MAC operations performed */
-  count = 1u;
+  count = 1U;
 
   /* Working pointer of inputA */
   px = pIn1;
@@ -154,54 +139,54 @@ void arm_conv_fast_q31(
   py = pIn2;
 
 
-  /* ------------------------    
-   * Stage1 process    
+  /* ------------------------
+   * Stage1 process
    * ----------------------*/
 
   /* The first stage starts here */
-  while(blockSize1 > 0u)
+  while (blockSize1 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
+    k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    while (k > 0U)
     {
       /* x[0] * y[srcBLen - 1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* x[1] * y[srcBLen - 2] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* x[2] * y[srcBLen - 3] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* x[3] * y[srcBLen - 4] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
      ** No loop unrolling is used. */
-    k = count % 0x4u;
+    k = count % 0x4U;
 
-    while(k > 0u)
+    while (k > 0U)
     {
       /* Perform the multiply-accumulate */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -212,46 +197,46 @@ void arm_conv_fast_q31(
     py = pIn2 + count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
-  /* --------------------------    
-   * Initializations of stage2    
+  /* --------------------------
+   * Initializations of stage2
    * ------------------------*/
 
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
    */
 
   /* Working pointer of inputA */
   px = pIn1;
 
   /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
+  pSrc2 = pIn2 + (srcBLen - 1U);
   py = pSrc2;
 
   /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
+  count = 0U;
 
-  /* -------------------    
-   * Stage2 process    
+  /* -------------------
+   * Stage2 process
    * ------------------*/
 
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
    * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
+  if (srcBLen >= 4U)
   {
     /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
+    blkCnt = blockSize2 >> 2U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Set all accumulators to zero */
       acc0 = 0;
@@ -260,41 +245,37 @@ void arm_conv_fast_q31(
       acc3 = 0;
 
       /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       do
       {
         /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[3] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[0] * y[srcBLen - 1] */
         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
         /* acc1 +=  x[1] * y[srcBLen - 1] */
         acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
         /* acc2 +=  x[2] * y[srcBLen - 1] */
         acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
         /* acc3 +=  x[3] * y[srcBLen - 1] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py--);
 
+        /* Read y[srcBLen - 2] sample */
+        c0 = *py--;
         /* Read x[4] sample */
-        x0 = *(px++);
+        x0 = *px++;
 
         /* Perform the multiply-accumulate */
         /* acc0 +=  x[1] * y[srcBLen - 2] */
@@ -306,11 +287,11 @@ void arm_conv_fast_q31(
         /* acc3 +=  x[4] * y[srcBLen - 2] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
 
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
 
+        /* Read y[srcBLen - 3] sample */
+        c0 = *py--;
         /* Read x[5] sample */
-        x1 = *(px++);
+        x1 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[2] * y[srcBLen - 3] */
@@ -322,11 +303,11 @@ void arm_conv_fast_q31(
         /* acc3 +=  x[5] * y[srcBLen - 3] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
 
-        /* Read y[srcBLen - 4] sample */
-        c0 = *(py--);
 
+        /* Read y[srcBLen - 4] sample */
+        c0 = *py--;
         /* Read x[6] sample */
-        x2 = *(px++);
+        x2 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[3] * y[srcBLen - 4] */
@@ -339,19 +320,18 @@ void arm_conv_fast_q31(
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
 
 
-      } while(--k);
+      } while (--k);
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
+        c0 = *py--;
         /* Read x[7] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -368,92 +348,92 @@ void arm_conv_fast_q31(
         x1 = x2;
         x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* Store the results in the accumulators in the destination buffer. */
+      /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = (q31_t) (acc0 << 1);
       *pOut++ = (q31_t) (acc1 << 1);
       *pOut++ = (q31_t) (acc2 << 1);
       *pOut++ = (q31_t) (acc3 << 1);
 
       /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
+      count += 4U;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
      ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
+    blkCnt = blockSize2 % 0x4U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulates */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = sum << 1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
   else
   {
-    /* If the srcBLen is not a multiple of 4,    
+    /* If the srcBLen is not a multiple of 4,
      * the blockSize2 loop cannot be unrolled by 4 */
     blkCnt = blockSize2;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
@@ -461,101 +441,102 @@ void arm_conv_fast_q31(
       /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
       *pOut++ = sum << 1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
 
-  /* --------------------------    
-   * Initializations of stage3    
+  /* --------------------------
+   * Initializations of stage3
    * -------------------------*/
 
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
    */
 
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
      The blockSize3 variable holds the number of MAC operations performed */
 
   /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
   px = pSrc1;
 
   /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
+  pSrc2 = pIn2 + (srcBLen - 1U);
   py = pSrc2;
 
-  /* -------------------    
-   * Stage3 process    
+  /* -------------------
+   * Stage3 process
    * ------------------*/
 
-  while(blockSize3 > 0u)
+  while (blockSize3 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
+    k = blockSize3 >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    while (k > 0U)
     {
+      /* Perform the multiply-accumulate */
       /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
       /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
+    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
      ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
+    k = blockSize3 % 0x4U;
 
-    while(k > 0u)
+    while (k > 0U)
     {
       /* Perform the multiply-accumulate */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py--))) >> 32);
+                      ((q63_t) *px++ * (*py--))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -566,12 +547,12 @@ void arm_conv_fast_q31(
     px = ++pSrc1;
     py = pSrc2;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 }
 
-/**    
- * @} end of Conv group    
+/**
+  @} end of Conv group
  */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
new file mode 100644
index 00000000..68391032
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
@@ -0,0 +1,362 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_opt_q15.c
+ * Description:  Convolution of Q15 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+  @remark
+                   Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
+ */
+
+void arm_conv_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q63_t acc0;                                    /* Accumulators */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
+
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* Pointer to take end of scratch2 buffer */
+  pScr2 = pScratch2 + srcBLen - 1;
+
+  /* points to smaller length sequence */
+  px = pIn2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  k = srcBLen >> 2U;
+
+  /* Copy smaller length input sequence in reverse order into second scratch buffer */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  k = srcBLen % 0x4U;
+
+#else
+
+  /* Initialize k with number of samples */
+  k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    *pScr2-- = *px++;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Initialze temporary scratch pointer */
+  pScr1 = pScratch1;
+
+  /* Assuming scratch1 buffer is aligned by 32-bit */
+  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
+
+  /* Copy (srcALen) samples in scratch buffer */
+  arm_copy_q15(pIn1, pScr1, srcALen);
+
+  /* Update pointers */
+  pScr1 += srcALen;
+
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pScratch2;
+
+
+  /* Initialization of pIn2 pointer */
+  pIn2 = py;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+      /* multiply and accumlate */
+      acc0 = __SMLALD(x1, y1, acc0);
+      acc2 = __SMLALD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumlate */
+      acc1 = __SMLALDX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* multiply and accumlate */
+      acc0 = __SMLALD(x2, y2, acc0);
+      acc2 = __SMLALD(x1, y2, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLALDX(x3, y1, acc3);
+      acc1 = __SMLALDX(x3, y2, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLALDX(x3, y2, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch1 += 4U;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Calculate convolution for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read next two samples from scratch1 buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch1 += 1U;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
new file mode 100644
index 00000000..3ca938e4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
@@ -0,0 +1,360 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_opt_q7.c
+ * Description:  Convolution of Q7 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
+ */
+
+void arm_conv_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
+        q15_t x4;                                      /* Temporary input variable */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+  const q7_t *px;                                      /* Temporary input1 pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+        q7_t out0, out1, out2, out3;                   /* Temporary variables */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* points to smaller length sequence */
+  px = pIn2 + srcBLen - 1;
+
+  /* Apply loop unrolling and do 4 Copies simultaneously. */
+  k = srcBLen >> 2U;
+
+  /* First part of the processing with loop unrolling copies 4 data points at a time.
+   ** a second loop below copies for the remaining 1 to 3 samples. */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* If the count is not a multiple of 4, copy remaining samples here.
+   ** No loop unrolling is used. */
+  k = srcBLen % 0x4U;
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy (srcALen) samples in scratch buffer */
+  /* Apply loop unrolling and do 4 Copies simultaneously. */
+  k = srcALen >> 2U;
+
+  /* First part of the processing with loop unrolling copies 4 data points at a time.
+   ** a second loop below copies for the remaining 1 to 3 samples. */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* If the count is not a multiple of 4, copy remaining samples here.
+   ** No loop unrolling is used. */
+  k = srcALen % 0x4U;
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    x4 = (q15_t) * pIn1++;
+    *pScr1++ = x4;
+
+    /* Decrement the loop counter */
+    k--;
+  }
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pScratch2;
+
+  /* Initialization of pIn2 pointer */
+  pIn2 = (q7_t *) py;
+
+  pScr2 = py;
+
+  /* Actual convolution process starts here */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2U;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia (&pScr2);
+
+      /* multiply and accumlate */
+      acc0 = __SMLAD(x1, y1, acc0);
+      acc2 = __SMLAD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumlate */
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia (&pScr2);
+
+      acc0 = __SMLAD(x2, y1, acc0);
+
+      acc2 = __SMLAD(x1, y1, acc2);
+
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pScr2);
+      acc1 += (*pScr1++ * *pScr2);
+      acc2 += (*pScr1++ * *pScr2);
+      acc3 += (*pScr1++ * *pScr2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the result in the accumulator in the destination buffer. */
+    out0 = (q7_t) (__SSAT(acc0 >> 7U, 8));
+    out1 = (q7_t) (__SSAT(acc1 >> 7U, 8));
+    out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
+    out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
+
+    write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
+
+    /* Initialization of inputB pointer */
+    pScr2 = py;
+
+    pScratch1 += 4U;
+  }
+
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+  /* Calculate convolution for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+      acc0 += (*pScr1++ * *pScr2++);
+      acc0 += (*pScr1++ * *pScr2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pScr2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
+
+    /* Initialization of inputB pointer */
+    pScr2 = py;
+
+    pScratch1 += 1U;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
new file mode 100644
index 00000000..53bc9a3a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
@@ -0,0 +1,676 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_f32.c
+ * Description:  Partial convolution of floating-point sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup PartialConv Partial Convolution
+
+  Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.
+  Each function has two additional arguments.
+  firstIndex specifies the starting index of the subset of output samples.
+  numPoints is the number of output samples to compute.
+  The function computes the output in the range
+  [firstIndex, ..., firstIndex+numPoints-1].
+  The output array pDst contains numPoints values.
+
+  The allowable range of output indices is [0 srcALen+srcBLen-2].
+  If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.
+  Otherwise the functions return ARM_MATH_SUCCESS.
+  \note Refer to \ref arm_conv_f32() for details on fixed point behavior.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15 of partial convolution.
+                   Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of partial convolution
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of floating-point sequences.
+  @param[in]     pSrcA       points to the first input sequence
+  @param[in]     srcALen     length of the first input sequence
+  @param[in]     pSrcB       points to the second input sequence
+  @param[in]     srcBLen     length of the second input sequence
+  @param[out]    pDst        points to the location where the output result is written
+  @param[in]     firstIndex  is the first output sample to start with
+  @param[in]     numPoints   is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+ */
+
+arm_status arm_conv_partial_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc0, acc1, acc2, acc3;              /* Accumulator */
+        float32_t x0, x1, x2, x3, c0;                  /* Temporary variables */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = ((int32_t) check - blockSize3) - (blockSize1 + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc1 = pIn2 + firstIndex;
+    py = pSrc1;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* The first stage starts here */
+    while (blockSize1 > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* x[0] * y[srcBLen - 1] */
+        sum += *px++ * *py--;
+
+        /* x[1] * y[srcBLen - 2] */
+        sum += *px++ * *py--;
+
+        /* x[2] * y[srcBLen - 3] */
+        sum += *px++ * *py--;
+
+        /* x[3] * y[srcBLen - 4] */
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc1;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
+      {
+        /* Set all accumulators to zero */
+        acc0 = 0.0f;
+        acc1 = 0.0f;
+        acc2 = 0.0f;
+        acc3 = 0.0f;
+
+        /* read x[0], x[1], x[2] samples */
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read y[srcBLen - 1] sample */
+          c0 = *py--;
+          /* Read x[3] sample */
+          x3 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[0] * y[srcBLen - 1] */
+          acc0 += x0 * c0;
+          /* acc1 +=  x[1] * y[srcBLen - 1] */
+          acc1 += x1 * c0;
+          /* acc2 +=  x[2] * y[srcBLen - 1] */
+          acc2 += x2 * c0;
+          /* acc3 +=  x[3] * y[srcBLen - 1] */
+          acc3 += x3 * c0;
+
+          /* Read y[srcBLen - 2] sample */
+          c0 = *py--;
+          /* Read x[4] sample */
+          x0 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[1] * y[srcBLen - 2] */
+          acc0 += x1 * c0;
+          /* acc1 +=  x[2] * y[srcBLen - 2] */
+          acc1 += x2 * c0;
+          /* acc2 +=  x[3] * y[srcBLen - 2] */
+          acc2 += x3 * c0;
+          /* acc3 +=  x[4] * y[srcBLen - 2] */
+          acc3 += x0 * c0;
+
+          /* Read y[srcBLen - 3] sample */
+          c0 = *py--;
+          /* Read x[5] sample */
+          x1 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[2] * y[srcBLen - 3] */
+          acc0 += x2 * c0;
+          /* acc1 +=  x[3] * y[srcBLen - 2] */
+          acc1 += x3 * c0;
+          /* acc2 +=  x[4] * y[srcBLen - 2] */
+          acc2 += x0 * c0;
+          /* acc3 +=  x[5] * y[srcBLen - 2] */
+          acc3 += x1 * c0;
+
+          /* Read y[srcBLen - 4] sample */
+          c0 = *py--;
+          /* Read x[6] sample */
+          x2 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[3] * y[srcBLen - 4] */
+          acc0 += x3 * c0;
+          /* acc1 +=  x[4] * y[srcBLen - 4] */
+          acc1 += x0 * c0;
+          /* acc2 +=  x[5] * y[srcBLen - 4] */
+          acc2 += x1 * c0;
+          /* acc3 +=  x[6] * y[srcBLen - 4] */
+          acc3 += x2 * c0;
+
+        } while (--k);
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        while (k > 0U)
+        {
+          /* Read y[srcBLen - 5] sample */
+          c0 = *py--;
+          /* Read x[7] sample */
+          x3 = *px++;
+
+          /* Perform the multiply-accumulates */
+          /* acc0 +=  x[4] * y[srcBLen - 5] */
+          acc0 += x0 * c0;
+          /* acc1 +=  x[5] * y[srcBLen - 5] */
+          acc1 += x1 * c0;
+          /* acc2 +=  x[6] * y[srcBLen - 5] */
+          acc2 += x2 * c0;
+          /* acc3 +=  x[7] * y[srcBLen - 5] */
+          acc3 += x3 * c0;
+
+          /* Reuse the present samples for the next MAC */
+          x0 = x1;
+          x1 = x2;
+          x2 = x3;
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = acc0;
+        *pOut++ = acc1;
+        *pOut++ = acc2;
+        *pOut++ = acc3;
+
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
+        k = srcBLen >> 2U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += *px++ * *py--;
+          sum += *px++ * *py--;
+          sum += *px++ * *py--;
+          sum += *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        k = srcBLen % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = sum;
+
+        /* Increment MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0.0f;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = sum;
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The blockSize3 variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    while (blockSize3 > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+        sum += *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+        sum += *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+        sum += *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Loop to calculate convolution for output length number of values */
+    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
+    {
+      /* Initialize sum with zero to carry on MAC operations */
+      sum = 0.0f;
+
+      /* Loop to perform MAC operations according to convolution equation */
+      for (j = 0U; j <= i; j++)
+      {
+        /* Check the array limitations */
+        if (((i - j) < srcBLen) && (j < srcALen))
+        {
+          /* z[i] += x[i-j] * y[j] */
+          sum += ( pIn1[j] * pIn2[i - j]);
+        }
+      }
+
+      /* Store the output in the destination buffer */
+      pDst[i] = sum;
+    }
+
+    /* Set status as ARM_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
new file mode 100644
index 00000000..ae640f2f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
@@ -0,0 +1,387 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_fast_opt_q15.c
+ * Description:  Fast Q15 Partial convolution
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
+
+arm_status arm_conv_partial_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+        q31_t acc0;                                    /* Accumulator */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+        arm_status status;                             /* Status variable */
+        q31_t x1;                                      /* Temporary variables to hold state and coefficient values */
+        q31_t y1;                                      /* State variables */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulator */
+        q31_t x2, x3;                                  /* Temporary variables to hold state and coefficient values */
+        q31_t y2;                                      /* State variables */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Temporary pointer for scratch2 */
+    py = pScratch2;
+
+    /* pointer to take end of scratch2 buffer */
+    pScr2 = pScratch2 + srcBLen - 1;
+
+    /* points to smaller length sequence */
+    px = pIn2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = srcBLen >> 2U;
+
+    /* Copy smaller length input sequence in reverse order into second scratch buffer */
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner */
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = srcBLen % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner for remaining samples */
+      *pScr2-- = *px++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Initialze temporary scratch pointer */
+    pScr1 = pScratch1;
+
+    /* Assuming scratch1 buffer is aligned by 32-bit */
+    /* Fill (srcBLen - 1U) zeros in scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update temporary scratch pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
+
+    /* Copy (srcALen) samples in scratch buffer */
+    arm_copy_q15(pIn1, pScr1, srcALen);
+
+    /* Update pointers */
+    pScr1 += srcALen;
+
+    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Initialization of pIn2 pointer */
+    pIn2 = py;
+
+    pScratch1 += firstIndex;
+
+    pOut = pDst + firstIndex;
+
+    /* Actual convolution process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = (numPoints) >> 2;
+
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Read two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* Read next two samples from scratch1 buffer */
+      x2 = read_q15x2_ia (&pScr1);
+
+      tapCnt = (srcBLen) >> 2U;
+
+      while (tapCnt > 0U)
+      {
+
+        /* Read four samples from smaller buffer */
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+        y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+        /* multiply and accumlate */
+        acc0 = __SMLAD(x1, y1, acc0);
+        acc2 = __SMLAD(x2, y1, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        /* multiply and accumlate */
+        acc1 = __SMLADX(x3, y1, acc1);
+
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* multiply and accumlate */
+        acc0 = __SMLAD(x2, y2, acc0);
+        acc2 = __SMLAD(x1, y2, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x1, x2, 0);
+#else
+        x3 = __PKHBT(x2, x1, 0);
+#endif
+
+        acc3 = __SMLADX(x3, y1, acc3);
+        acc1 = __SMLADX(x3, y2, acc1);
+
+        x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        /* multiply and accumlate */
+        acc3 = __SMLADX(x3, y2, acc3);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Update scratch pointer for remaining samples of smaller length sequence */
+      pScr1 -= 4U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      tapCnt = (srcBLen) & 3U;
+
+      while (tapCnt > 0U)
+      {
+        /* accumlate the results */
+        acc0 += (*pScr1++ * *pIn2);
+        acc1 += (*pScr1++ * *pIn2);
+        acc2 += (*pScr1++ * *pIn2);
+        acc3 += (*pScr1++ * *pIn2++);
+
+        pScr1 -= 3U;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* Store the results in the accumulators in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Initialization of inputB pointer */
+      pIn2 = py;
+
+      pScratch1 += 4U;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numPoints & 0x3;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numPoints;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    /* Calculate convolution for remaining samples of Bigger length sequence */
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+
+      tapCnt = (srcBLen) >> 1U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* Read two samples from smaller buffer */
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+
+        /* multiply and accumlate */
+        acc0 = __SMLAD(x1, y1, acc0);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      tapCnt = (srcBLen) & 1U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      while (tapCnt > 0U)
+      {
+        /* accumlate the results */
+        acc0 += (*pScr1++ * *pIn2++);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       ** Then store the output in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+      /* Initialization of inputB pointer */
+      pIn2 = py;
+
+      pScratch1 += 1U;
+
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
new file mode 100644
index 00000000..92e74873
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
@@ -0,0 +1,700 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_fast_q15.c
+ * Description:  Fast Q15 Partial convolution
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+  @remark
+                   Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
+
+arm_status arm_conv_partial_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + firstIndex;
+    py = pSrc2;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* For loop unrolling by 4, this stage is divided into two. */
+    /* First part of this stage computes the MAC operations less than 4 */
+    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
+
+    /* The first part of the stage starts here */
+    while ((count < 4U) && (blockSize1 > 0))
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Loop over number of MAC operations between
+       * inputA samples and inputB samples */
+      k = count;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = __SMLAD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* The second part of the stage starts here */
+    /* The internal loop, over count, is unrolled by 4 */
+    /* To, read the last two inputB samples using SIMD:
+     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
+    py = py - 1;
+
+    while (blockSize1 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* For the next MAC operations, the pointer py is used without SIMD
+         So, py is incremented by 1 */
+      py = py + 1U;
+
+      /* If the count is not a multiple of 4, compute any remaining MACs here.
+         No loop unrolling is used. */
+      k = count % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = __SMLAD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2 - 1U;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is the index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
+      {
+        py = py - 1U;
+
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+        acc3 = 0;
+
+
+        /* read x[0], x[1] samples */
+        x0 = read_q15x2 ((q15_t *) px);
+        /* read x[1], x[2] samples */
+        x1 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
+
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read the last two inputB samples using SIMD:
+           * y[srcBLen - 1] and y[srcBLen - 2] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+          acc0 = __SMLADX(x0, c0, acc0);
+
+          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+          acc1 = __SMLADX(x1, c0, acc1);
+
+          /* Read x[2], x[3] */
+          x2 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[3], x[4] */
+          x3 = read_q15x2 ((q15_t *) px + 1);
+
+          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+          acc2 = __SMLADX(x2, c0, acc2);
+
+          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+          acc3 = __SMLADX(x3, c0, acc3);
+
+          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+          acc0 = __SMLADX(x2, c0, acc0);
+
+          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+          acc1 = __SMLADX(x3, c0, acc1);
+
+          /* Read x[4], x[5] */
+          x0 = read_q15x2 ((q15_t *) px + 2);
+
+          /* Read x[5], x[6] */
+          x1 = read_q15x2 ((q15_t *) px + 3);
+          px += 4U;
+
+          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+          acc2 = __SMLADX(x0, c0, acc2);
+
+          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+          acc3 = __SMLADX(x1, c0, acc3);
+
+        } while (--k);
+
+        /* For the next MAC operations, SIMD is not used
+           So, the 16 bit pointer if inputB, py is updated */
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+           No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        if (k == 1U)
+        {
+          /* Read y[srcBLen - 5] */
+          c0 = *(py + 1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
+#else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+          /* Read x[7] */
+          x3 = read_q15x2 ((q15_t *) px);
+          px++;
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLAD (x0, c0, acc0);
+          acc1 = __SMLAD (x1, c0, acc1);
+          acc2 = __SMLADX(x1, c0, acc2);
+          acc3 = __SMLADX(x3, c0, acc3);
+        }
+
+        if (k == 2U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
+
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+          px += 2U;
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLADX(x0, c0, acc0);
+          acc1 = __SMLADX(x1, c0, acc1);
+          acc2 = __SMLADX(x3, c0, acc2);
+          acc3 = __SMLADX(x2, c0, acc3);
+        }
+
+        if (k == 3U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
+
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLADX(x0, c0, acc0);
+          acc1 = __SMLADX(x1, c0, acc1);
+          acc2 = __SMLADX(x3, c0, acc2);
+          acc3 = __SMLADX(x2, c0, acc3);
+
+          c0 = *(py-1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
+#else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+          /* Read x[10] */
+          x3 =  read_q15x2 ((q15_t *) px + 2);
+          px += 3U;
+
+          /* Perform the multiply-accumulates */
+          acc0 = __SMLADX(x1, c0, acc0);
+          acc1 = __SMLAD (x2, c0, acc1);
+          acc2 = __SMLADX(x2, c0, acc2);
+          acc3 = __SMLADX(x3, c0, acc3);
+        }
+
+        /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+        write_q15x2_ia (&pOut, __PKHBT(acc0 >> 15, acc1 >> 15, 16));
+        write_q15x2_ia (&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16));
+#else
+        write_q15x2_ia (&pOut, __PKHBT(acc1 >> 15, acc0 >> 15, 16));
+        write_q15x2_ia (&pOut, __PKHBT(acc3 >> 15, acc2 >> 15, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+
+      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+         No loop unrolling is used. */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+           a second loop below computes MACs for the remaining 1 to 3 samples. */
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += ((q31_t) *px++ * *py--);
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q15_t) (sum >> 15);
+
+        /* Increment the pointer pIn1 index, count by 1 */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += ((q31_t) *px++ * *py--);
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q15_t) (sum >> 15);
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    pIn2 = pSrc2 - 1U;
+    py = pIn2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    /* For loop unrolling by 4, this stage is divided into two. */
+    /* First part of this stage computes the MAC operations greater than 4 */
+    /* Second part of this stage computes the MAC operations less than or equal to 4 */
+
+    /* The first part of the stage starts here */
+    j = count >> 2U;
+
+    while ((j > 0U) && (blockSize3 > 0))
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
+         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
+         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* For the next MAC operations, the pointer py is used without SIMD
+         So, py is incremented by 1 */
+      py = py + 1U;
+
+      /* If the count is not a multiple of 4, compute any remaining MACs here.
+         No loop unrolling is used. */
+      k = count % 0x4U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
+        sum = __SMLAD(*px++, *py--, sum);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pIn2;
+
+      /* Decrement the MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+
+      j--;
+    }
+
+    /* The second part of the stage starts here */
+    /* SIMD is not used for the next MAC operations,
+     * so pointer py is updated to read only one sample at a time */
+    py = py + 1U;
+
+    while (blockSize3 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum = __SMLAD(*px++, *py--, sum);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement the MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
similarity index 52%
rename from Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
rename to Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
index bb7c6f8e..f906b5ce 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
@@ -1,104 +1,96 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_fast_q31.c    
-*    
-* Description:	Fast Q31 Partial convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_fast_q31.c
+ * Description:  Fast Q31 Partial convolution
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**    
- * @ingroup groupFilters    
+/**
+  @ingroup groupFilters
  */
 
-/**    
- * @addtogroup PartialConv    
- * @{    
+/**
+  @addtogroup PartialConv
+  @{
  */
 
-/**    
- * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par    
- * See arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.    
+/**
+  @brief         Partial convolution of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
  */
 
 arm_status arm_conv_partial_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
 {
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t j, k, count, check, blkCnt;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;
+#endif
 
   /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
   {
     /* Set status as ARM_MATH_ARGUMENT_ERROR */
     status = ARM_MATH_ARGUMENT_ERROR;
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
+    if (srcALen >= srcBLen)
     {
       /* Initialization of inputA pointer */
       pIn1 = pSrcA;
@@ -120,46 +112,44 @@ arm_status arm_conv_partial_fast_q31(
       srcALen = j;
     }
 
-    /* Conditions to check which loopCounter holds    
+    /* Conditions to check which loopCounter holds
      * the first and last indices of the output samples to be calculated. */
     check = firstIndex + numPoints;
     blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
     blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
 
     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
      * for every iteration. */
 
-    /* Set the output pointer to point to the firstIndex    
+    /* Set the output pointer to point to the firstIndex
      * of the output sample to be calculated. */
     pOut = pDst + firstIndex;
 
-    /* --------------------------    
-     * Initializations of stage1    
+    /* --------------------------
+     * Initializations of stage1
      * -------------------------*/
 
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
      */
 
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from firstIndex    
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
        Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
+    count = 1U + firstIndex;
 
     /* Working pointer of inputA */
     px = pIn1;
@@ -168,54 +158,60 @@ arm_status arm_conv_partial_fast_q31(
     pSrc2 = pIn2 + firstIndex;
     py = pSrc2;
 
-    /* ------------------------    
-     * Stage1 process    
+    /* ------------------------
+     * Stage1 process
      * ----------------------*/
 
-    /* The first loop starts here */
-    while(blockSize1 > 0)
+    /* The first stage starts here */
+    while (blockSize1 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+      while (k > 0U)
       {
         /* x[0] * y[srcBLen - 1] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* x[1] * y[srcBLen - 2] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* x[2] * y[srcBLen - 3] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* x[3] * y[srcBLen - 4] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
 
-      while(k > 0u)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -226,53 +222,56 @@ arm_status arm_conv_partial_fast_q31(
       py = ++pSrc2;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
-    /* --------------------------    
-     * Initializations of stage2    
+    /* --------------------------
+     * Initializations of stage2
      * ------------------------*/
 
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
      */
 
     /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
     {
-      px = pIn1 + firstIndex - srcBLen + 1;
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
     }
     else
     {
-      px = pIn1;
+      pSrc1 = pIn1;
     }
+    px = pSrc1;
 
     /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
+    pSrc2 = pIn2 + (srcBLen - 1U);
     py = pSrc2;
 
     /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
+    count = 0U;
 
-    /* -------------------    
-     * Stage2 process    
+    /* -------------------
+     * Stage2 process
      * ------------------*/
 
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
      * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
+    if (srcBLen >= 4U)
     {
-      /* Loop unroll over blockSize2 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
+#if defined (ARM_MATH_LOOPUNROLL)
 
-      while(blkCnt > 0u)
+    /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
       {
         /* Set all accumulators to zero */
         acc0 = 0;
@@ -281,41 +280,36 @@ arm_status arm_conv_partial_fast_q31(
         acc3 = 0;
 
         /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
 
         /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
+        k = srcBLen >> 2U;
 
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
         do
         {
           /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[3] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* Perform the multiply-accumulate */
           /* acc0 +=  x[0] * y[srcBLen - 1] */
           acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
           /* acc1 +=  x[1] * y[srcBLen - 1] */
           acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
           /* acc2 +=  x[2] * y[srcBLen - 1] */
           acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-
           /* acc3 +=  x[3] * y[srcBLen - 1] */
           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
           /* Read y[srcBLen - 2] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[4] sample */
-          x0 = *(px++);
+          x0 = *px++;
 
           /* Perform the multiply-accumulate */
           /* acc0 +=  x[1] * y[srcBLen - 2] */
@@ -328,10 +322,9 @@ arm_status arm_conv_partial_fast_q31(
           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
 
           /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[5] sample */
-          x1 = *(px++);
+          x1 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[2] * y[srcBLen - 3] */
@@ -344,10 +337,9 @@ arm_status arm_conv_partial_fast_q31(
           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
 
           /* Read y[srcBLen - 4] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[6] sample */
-          x2 = *(px++);
+          x2 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[3] * y[srcBLen - 4] */
@@ -359,20 +351,18 @@ arm_status arm_conv_partial_fast_q31(
           /* acc3 +=  x[6] * y[srcBLen - 4] */
           acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
 
+        } while (--k);
 
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
          ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
+        k = srcBLen % 0x4U;
 
-        while(k > 0u)
+        while (k > 0U)
         {
           /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[7] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -400,31 +390,37 @@ arm_status arm_conv_partial_fast_q31(
         *pOut++ = (q31_t) (acc3 << 1);
 
         /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
+        count += 4U;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
 
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
+      /* Loop unrolling: Compute remaining outputs */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+#else
 
-      while(blkCnt > 0u)
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (blkCnt > 0U)
       {
         /* Accumulator is made zero for every iteration */
         sum = 0;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
+        /* Loop unrolling: Compute 4 outputs at a time */
+        k = srcBLen >> 2U;
+
+        while (k > 0U)
         {
           /* Perform the multiply-accumulates */
           sum = (q31_t) ((((q63_t) sum << 32) +
@@ -436,45 +432,51 @@ arm_status arm_conv_partial_fast_q31(
           sum = (q31_t) ((((q63_t) sum << 32) +
                           ((q63_t) * px++ * (*py--))) >> 32);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
+        /* Loop unrolling: Compute remaining outputs */
+        k = srcBLen % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-        while(k > 0u)
+        while (k > 0U)
         {
           /* Perform the multiply-accumulate */
           sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
+                          ((q63_t) *px++ * (*py--))) >> 32);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
         /* Store the result in the accumulator in the destination buffer. */
         *pOut++ = sum << 1;
 
-        /* Increment the MAC count */
+        /* Increment MAC count */
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
+        px = pSrc1 + count;
         py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
     }
     else
     {
-      /* If the srcBLen is not a multiple of 4,    
+      /* If the srcBLen is not a multiple of 4,
        * the blockSize2 loop cannot be unrolled by 4 */
       blkCnt = (uint32_t) blockSize2;
 
-      while(blkCnt > 0u)
+      while (blkCnt > 0U)
       {
         /* Accumulator is made zero for every iteration */
         sum = 0;
@@ -482,13 +484,13 @@ arm_status arm_conv_partial_fast_q31(
         /* srcBLen number of MACS should be performed */
         k = srcBLen;
 
-        while(k > 0u)
+        while (k > 0U)
         {
           /* Perform the multiply-accumulate */
           sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
+                          ((q63_t) *px++ * (*py--))) >> 32);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -499,7 +501,7 @@ arm_status arm_conv_partial_fast_q31(
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -508,77 +510,83 @@ arm_status arm_conv_partial_fast_q31(
     }
 
 
-    /* --------------------------    
-     * Initializations of stage3    
+    /* --------------------------
+     * Initializations of stage3
      * -------------------------*/
 
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
      */
 
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
        The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
+    count = srcBLen - 1U;
 
     /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
+    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
     px = pSrc1;
 
     /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
+    pSrc2 = pIn2 + (srcBLen - 1U);
     py = pSrc2;
 
-    /* -------------------    
-     * Stage3 process    
+    /* -------------------
+     * Stage3 process
      * ------------------*/
 
-    while(blockSize3 > 0)
+    while (blockSize3 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+      while (k > 0U)
       {
         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
 
-      while(k > 0u)
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
       {
         /* Perform the multiply-accumulates */
         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py--))) >> 32);
+                        ((q63_t) *px++ * (*py--))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -589,15 +597,14 @@ arm_status arm_conv_partial_fast_q31(
       px = ++pSrc1;
       py = pSrc2;
 
-      /* Decrement the MAC count */
+      /* Decrement MAC count */
       count--;
 
       /* Decrement the loop counter */
       blockSize3--;
-
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -606,6 +613,6 @@ arm_status arm_conv_partial_fast_q31(
 
 }
 
-/**    
- * @} end of PartialConv group    
+/**
+  @} end of PartialConv group
  */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
new file mode 100644
index 00000000..05c3284f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
@@ -0,0 +1,386 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_opt_q15.c
+ * Description:  Partial convolution of Q15 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
+ */
+
+arm_status arm_conv_partial_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+        q63_t acc0;                                    /* Accumulator */
+        q31_t x1;                                      /* Temporary variables to hold state and coefficient values */
+        q31_t y1;                                      /* State variables */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+        arm_status status;                             /* Status variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulator */
+        q31_t x2, x3;                                  /* Temporary variables to hold state and coefficient values */
+        q31_t y2;                                      /* State variables */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Temporary pointer for scratch2 */
+    py = pScratch2;
+
+    /* pointer to take end of scratch2 buffer */
+    pScr2 = pScratch2 + srcBLen - 1;
+
+    /* points to smaller length sequence */
+    px = pIn2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = srcBLen >> 2U;
+
+    /* Copy smaller length input sequence in reverse order into second scratch buffer */
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner */
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = srcBLen % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner for remaining samples */
+      *pScr2-- = *px++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Initialze temporary scratch pointer */
+    pScr1 = pScratch1;
+
+    /* Assuming scratch1 buffer is aligned by 32-bit */
+    /* Fill (srcBLen - 1U) zeros in scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update temporary scratch pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
+
+    /* Copy (srcALen) samples in scratch buffer */
+    arm_copy_q15(pIn1, pScr1, srcALen);
+
+    /* Update pointers */
+    pScr1 += srcALen;
+
+    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Initialization of pIn2 pointer */
+    pIn2 = py;
+
+    pScratch1 += firstIndex;
+
+    pOut = pDst + firstIndex;
+
+    /* Actual convolution process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = (numPoints) >> 2;
+
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Read two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* Read next two samples from scratch1 buffer */
+      x2 = read_q15x2_ia (&pScr1);
+
+      tapCnt = (srcBLen) >> 2U;
+
+      while (tapCnt > 0U)
+      {
+
+        /* Read four samples from smaller buffer */
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+        y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+        /* multiply and accumlate */
+        acc0 = __SMLALD(x1, y1, acc0);
+        acc2 = __SMLALD(x2, y1, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        /* multiply and accumlate */
+        acc1 = __SMLALDX(x3, y1, acc1);
+
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* multiply and accumlate */
+        acc0 = __SMLALD(x2, y2, acc0);
+        acc2 = __SMLALD(x1, y2, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x1, x2, 0);
+#else
+        x3 = __PKHBT(x2, x1, 0);
+#endif
+
+        acc3 = __SMLALDX(x3, y1, acc3);
+        acc1 = __SMLALDX(x3, y2, acc1);
+
+        x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        acc3 = __SMLALDX(x3, y2, acc3);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Update scratch pointer for remaining samples of smaller length sequence */
+      pScr1 -= 4U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      tapCnt = (srcBLen) & 3U;
+
+      while (tapCnt > 0U)
+      {
+        /* accumlate the results */
+        acc0 += (*pScr1++ * *pIn2);
+        acc1 += (*pScr1++ * *pIn2);
+        acc2 += (*pScr1++ * *pIn2);
+        acc3 += (*pScr1++ * *pIn2++);
+
+        pScr1 -= 3U;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* Store the results in the accumulators in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Initialization of inputB pointer */
+      pIn2 = py;
+
+      pScratch1 += 4U;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numPoints & 0x3;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numPoints;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    /* Calculate convolution for remaining samples of Bigger length sequence */
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+
+      tapCnt = (srcBLen) >> 1U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* Read two samples from smaller buffer */
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+
+        acc0 = __SMLALD(x1, y1, acc0);
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      tapCnt = (srcBLen) & 1U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      while (tapCnt > 0U)
+      {
+        /* accumlate the results */
+        acc0 += (*pScr1++ * *pIn2++);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       ** Then store the output in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+      /* Initialization of inputB pointer */
+      pIn2 = py;
+
+      pScratch1 += 1U;
+
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
new file mode 100644
index 00000000..5ac2af41
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
@@ -0,0 +1,390 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_opt_q7.c
+ * Description:  Partial convolution of Q7 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+ */
+
+arm_status arm_conv_partial_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
+        q15_t x4;                                      /* Temporary input variable */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+  const q7_t *px;                                      /* Temporary input1 pointer */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+        arm_status status;
+        q7_t *pOut = pDst;                             /* Output pointer */
+        q7_t out0, out1, out2, out3;                   /* Temporary variables */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* pointer to take end of scratch2 buffer */
+    pScr2 = pScratch2;
+
+    /* points to smaller length sequence */
+    px = pIn2 + srcBLen - 1;
+
+    /* Apply loop unrolling and do 4 Copies simultaneously. */
+    k = srcBLen >> 2U;
+
+    /* First part of the processing with loop unrolling copies 4 data points at a time.
+     ** a second loop below copies for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner */
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, copy remaining samples here.
+     ** No loop unrolling is used. */
+    k = srcBLen % 0x4U;
+
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner for remaining samples */
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Initialze temporary scratch pointer */
+    pScr1 = pScratch1;
+
+    /* Fill (srcBLen - 1U) zeros in scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update temporary scratch pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Copy (srcALen) samples in scratch buffer */
+    /* Apply loop unrolling and do 4 Copies simultaneously. */
+    k = srcALen >> 2U;
+
+    /* First part of the processing with loop unrolling copies 4 data points at a time.
+     ** a second loop below copies for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner */
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, copy remaining samples here.
+     ** No loop unrolling is used. */
+    k = srcALen % 0x4U;
+
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner for remaining samples */
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update pointer */
+    pScr1 += (srcBLen - 1U);
+
+
+    /* Temporary pointer for scratch2 */
+    py = pScratch2;
+
+    /* Initialization of pIn2 pointer */
+    pIn2 = (q7_t *) py;
+
+    pScr2 = py;
+
+    pOut = pDst + firstIndex;
+
+    pScratch1 += firstIndex;
+
+    /* Actual convolution process starts here */
+    blkCnt = (numPoints) >> 2;
+
+    while (blkCnt > 0)
+    {
+      /* Initialize temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumulators */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Read two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* Read next two samples from scratch1 buffer */
+      x2 = read_q15x2_ia (&pScr1);
+
+      tapCnt = (srcBLen) >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read four samples from smaller buffer */
+        y1 = read_q15x2_ia (&pScr2);
+
+        /* multiply and accumlate */
+        acc0 = __SMLAD(x1, y1, acc0);
+        acc2 = __SMLAD(x2, y1, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        /* multiply and accumlate */
+        acc1 = __SMLADX(x3, y1, acc1);
+
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x1, x2, 0);
+#else
+        x3 = __PKHBT(x2, x1, 0);
+#endif
+
+        acc3 = __SMLADX(x3, y1, acc3);
+
+        /* Read four samples from smaller buffer */
+        y1 = read_q15x2_ia (&pScr2);
+
+        acc0 = __SMLAD(x2, y1, acc0);
+
+        acc2 = __SMLAD(x1, y1, acc2);
+
+        acc1 = __SMLADX(x3, y1, acc1);
+
+        x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        acc3 = __SMLADX(x3, y1, acc3);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Update scratch pointer for remaining samples of smaller length sequence */
+      pScr1 -= 4U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      tapCnt = (srcBLen) & 3U;
+
+      while (tapCnt > 0U)
+      {
+        /* accumlate the results */
+        acc0 += (*pScr1++ * *pScr2);
+        acc1 += (*pScr1++ * *pScr2);
+        acc2 += (*pScr1++ * *pScr2);
+        acc3 += (*pScr1++ * *pScr2++);
+
+        pScr1 -= 3U;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* Store the result in the accumulator in the destination buffer. */
+      out0 = (q7_t) (__SSAT(acc0 >> 7U, 8));
+      out1 = (q7_t) (__SSAT(acc1 >> 7U, 8));
+      out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
+      out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
+
+      write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
+
+      /* Initialization of inputB pointer */
+      pScr2 = py;
+
+      pScratch1 += 4U;
+    }
+
+    blkCnt = (numPoints) & 0x3;
+
+    /* Calculate convolution for remaining samples of Bigger length sequence */
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+
+      tapCnt = (srcBLen) >> 1U;
+
+      while (tapCnt > 0U)
+      {
+
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* Read two samples from smaller buffer */
+        y1 = read_q15x2_ia (&pScr2);
+
+        acc0 = __SMLAD(x1, y1, acc0);
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      tapCnt = (srcBLen) & 1U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      while (tapCnt > 0U)
+      {
+
+        /* accumlate the results */
+        acc0 += (*pScr1++ * *pScr2++);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
+
+      /* Initialization of inputB pointer */
+      pScr2 = py;
+
+      pScratch1 += 1U;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
new file mode 100644
index 00000000..15ea7960
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
@@ -0,0 +1,752 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_q15.c
+ * Description:  Partial convolution of Q15 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
+ */
+
+arm_status arm_conv_partial_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+
+#if defined (ARM_MATH_DSP)
+
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables to hold state and coefficient values */
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        uint32_t j, k, count, blkCnt, check;
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + firstIndex;
+    py = pSrc2;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* For loop unrolling by 4, this stage is divided into two. */
+    /* First part of this stage computes the MAC operations less than 4 */
+    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
+
+    /* The first part of the stage starts here */
+    while ((count < 4U) && (blockSize1 > 0U))
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Loop over number of MAC operations between
+       * inputA samples and inputB samples */
+      k = count;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = __SMLALD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* The second part of the stage starts here */
+    /* The internal loop, over count, is unrolled by 4 */
+    /* To, read the last two inputB samples using SIMD:
+     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
+    py = py - 1;
+
+    while (blockSize1 > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* For the next MAC operations, the pointer py is used without SIMD
+       * So, py is incremented by 1 */
+      py = py + 1U;
+
+      /* If the count is not a multiple of 4, compute any remaining MACs here.
+         No loop unrolling is used. */
+      k = count % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = __SMLALD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2 - 1U;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is the index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
+      {
+        py = py - 1U;
+
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+        acc3 = 0;
+
+
+        /* read x[0], x[1] samples */
+        x0 = read_q15x2 ((q15_t *) px);
+        /* read x[1], x[2] samples */
+        x1 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
+
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read the last two inputB samples using SIMD:
+           * y[srcBLen - 1] and y[srcBLen - 2] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+          acc0 = __SMLALDX(x0, c0, acc0);
+
+          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+          acc1 = __SMLALDX(x1, c0, acc1);
+
+          /* Read x[2], x[3] */
+          x2 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[3], x[4] */
+          x3 = read_q15x2 ((q15_t *) px + 1);
+
+          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+          acc2 = __SMLALDX(x2, c0, acc2);
+
+          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+          acc3 = __SMLALDX(x3, c0, acc3);
+
+          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+          acc0 = __SMLALDX(x2, c0, acc0);
+
+          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+          acc1 = __SMLALDX(x3, c0, acc1);
+
+          /* Read x[4], x[5] */
+          x0 = read_q15x2 ((q15_t *) px + 2);
+
+          /* Read x[5], x[6] */
+          x1 = read_q15x2 ((q15_t *) px + 3);
+          px += 4U;
+
+          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+          acc2 = __SMLALDX(x0, c0, acc2);
+
+          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+          acc3 = __SMLALDX(x1, c0, acc3);
+
+        } while (--k);
+
+        /* For the next MAC operations, SIMD is not used
+         * So, the 16 bit pointer if inputB, py is updated */
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        if (k == 1U)
+        {
+          /* Read y[srcBLen - 5] */
+          c0 = *(py+1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
+#else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+          /* Read x[7] */
+          x3 = read_q15x2 ((q15_t *) px);
+          px++;
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALD (x0, c0, acc0);
+          acc1 = __SMLALD (x1, c0, acc1);
+          acc2 = __SMLALDX(x1, c0, acc2);
+          acc3 = __SMLALDX(x3, c0, acc3);
+        }
+
+        if (k == 2U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
+
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+          px += 2U;
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALDX(x0, c0, acc0);
+          acc1 = __SMLALDX(x1, c0, acc1);
+          acc2 = __SMLALDX(x3, c0, acc2);
+          acc3 = __SMLALDX(x2, c0, acc3);
+        }
+
+        if (k == 3U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
+
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALDX(x0, c0, acc0);
+          acc1 = __SMLALDX(x1, c0, acc1);
+          acc2 = __SMLALDX(x3, c0, acc2);
+          acc3 = __SMLALDX(x2, c0, acc3);
+
+          c0 = *(py-1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
+#else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+          /* Read x[10] */
+          x3 =  read_q15x2 ((q15_t *) px + 2);
+          px += 3U;
+
+          /* Perform the multiply-accumulates */
+          acc0 = __SMLALDX(x1, c0, acc0);
+          acc1 = __SMLALD (x2, c0, acc1);
+          acc2 = __SMLALDX(x2, c0, acc2);
+          acc3 = __SMLALDX(x3, c0, acc3);
+        }
+
+        /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+
+      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+         No loop unrolling is used. */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+           a second loop below computes MACs for the remaining 1 to 3 samples. */
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
+
+        /* Increment the pointer pIn1 index, count by 1 */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    pIn2 = pSrc2 - 1U;
+    py = pIn2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    /* For loop unrolling by 4, this stage is divided into two. */
+    /* First part of this stage computes the MAC operations greater than 4 */
+    /* Second part of this stage computes the MAC operations less than or equal to 4 */
+
+    /* The first part of the stage starts here */
+    j = count >> 2U;
+
+    while ((j > 0U) && (blockSize3 > 0U))
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
+         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
+         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* For the next MAC operations, the pointer py is used without SIMD
+       * So, py is incremented by 1 */
+      py = py + 1U;
+
+      /* If the count is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = count % 0x4U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
+        sum = __SMLALD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pIn2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement loop counter */
+      blockSize3--;
+
+      j--;
+    }
+
+    /* The second part of the stage starts here */
+    /* SIMD is not used for the next MAC operations,
+     * so pointer py is updated to read only one sample at a time */
+    py = py + 1U;
+
+    while (blockSize3 > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum = __SMLALD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Loop to calculate convolution for output length number of values */
+    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
+    {
+      /* Initialize sum with zero to carry on MAC operations */
+      sum = 0;
+
+      /* Loop to perform MAC operations according to convolution equation */
+      for (j = 0U; j <= i; j++)
+      {
+        /* Check the array limitations */
+        if (((i - j) < srcBLen) && (j < srcALen))
+        {
+          /* z[i] += x[i-j] * y[j] */
+          sum += ((q31_t) pIn1[j] * pIn2[i - j]);
+        }
+      }
+
+      /* Store the output in the destination buffer */
+      pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
new file mode 100644
index 00000000..b8042ef5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
@@ -0,0 +1,634 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_q31.c
+ * Description:  Partial convolution of Q31 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q31() for a faster but less precise implementation of this function.
+ */
+
+arm_status arm_conv_partial_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulator */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + firstIndex;
+    py = pSrc2;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* The first stage starts here */
+    while (blockSize1 > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* x[0] * y[srcBLen - 1] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* x[1] * y[srcBLen - 2] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* x[2] * y[srcBLen - 3] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* x[3] * y[srcBLen - 4] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (sum >> 31);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unroll over blkCnt */
+      blkCnt = blockSize2 / 3;
+
+      while (blkCnt > 0U)
+      {
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+
+        /* read x[0], x[1] samples */
+        x0 = *px++;
+        x1 = *px++;
+
+        /* Apply loop unrolling and compute 3 MACs simultaneously. */
+        k = srcBLen / 3;
+
+        /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 2 samples. */
+        do
+        {
+          /* Read y[srcBLen - 1] sample */
+          c0 = *(py);
+
+          /* Read x[2] sample */
+          x2 = *(px);
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[0] * y[srcBLen - 1] */
+          acc0 += (q63_t) x0 * c0;
+          /* acc1 +=  x[1] * y[srcBLen - 1] */
+          acc1 += (q63_t) x1 * c0;
+          /* acc2 +=  x[2] * y[srcBLen - 1] */
+          acc2 += (q63_t) x2 * c0;
+
+          /* Read y[srcBLen - 2] sample */
+          c0 = *(py - 1U);
+
+          /* Read x[3] sample */
+          x0 = *(px + 1U);
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[1] * y[srcBLen - 2] */
+          acc0 += (q63_t) x1 * c0;
+          /* acc1 +=  x[2] * y[srcBLen - 2] */
+          acc1 += (q63_t) x2 * c0;
+          /* acc2 +=  x[3] * y[srcBLen - 2] */
+          acc2 += (q63_t) x0 * c0;
+
+          /* Read y[srcBLen - 3] sample */
+          c0 = *(py - 2U);
+
+          /* Read x[4] sample */
+          x1 = *(px + 2U);
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[2] * y[srcBLen - 3] */
+          acc0 += (q63_t) x2 * c0;
+          /* acc1 +=  x[3] * y[srcBLen - 2] */
+          acc1 += (q63_t) x0 * c0;
+          /* acc2 +=  x[4] * y[srcBLen - 2] */
+          acc2 += (q63_t) x1 * c0;
+
+
+          px += 3U;
+
+          py -= 3U;
+
+        } while (--k);
+
+        /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen - (3 * (srcBLen / 3));
+
+        while (k > 0U)
+        {
+          /* Read y[srcBLen - 5] sample */
+          c0 = *py--;
+          /* Read x[7] sample */
+          x2 = *px++;
+
+          /* Perform the multiply-accumulates */
+          /* acc0 +=  x[4] * y[srcBLen - 5] */
+          acc0 += (q63_t) x0 * c0;
+          /* acc1 +=  x[5] * y[srcBLen - 5] */
+          acc1 += (q63_t) x1 * c0;
+          /* acc2 +=  x[6] * y[srcBLen - 5] */
+          acc2 += (q63_t) x2 * c0;
+
+          /* Reuse the present samples for the next MAC */
+          x0 = x1;
+          x1 = x2;
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q31_t) (acc0 >> 31);
+        *pOut++ = (q31_t) (acc1 >> 31);
+        *pOut++ = (q31_t) (acc2 >> 31);
+
+        /* Increment the pointer pIn1 index, count by 3 */
+        count += 3U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
+        k = srcBLen >> 2U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        k = srcBLen % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q31_t) (sum >> 31);
+
+        /* Increment MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q31_t) (sum >> 31);
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The blockSize3 variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    while (blockSize3 > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (sum >> 31);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Loop to calculate convolution for output length number of values */
+    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
+    {
+      /* Initialize sum with zero to carry on MAC operations */
+      sum = 0;
+
+      /* Loop to perform MAC operations according to convolution equation */
+      for (j = 0U; j <= i; j++)
+      {
+        /* Check the array limitations */
+        if (((i - j) < srcBLen) && (j < srcALen))
+        {
+          /* z[i] += x[i-j] * y[j] */
+          sum += ((q63_t) pIn1[j] * pIn2[i - j]);
+        }
+      }
+
+      /* Store the output in the destination buffer */
+      pDst[i] = (q31_t) (sum >> 31U);
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
similarity index 54%
rename from Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c
rename to Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
index 61ed590e..882e6c5c 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
@@ -1,113 +1,102 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_q7.c   
-*   
-* Description:	Partial convolution of Q7 sequences.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_q7.c
+ * Description:  Partial convolution of Q7 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**   
- * @ingroup groupFilters   
+/**
+  @ingroup groupFilters
  */
 
-/**   
- * @addtogroup PartialConv   
- * @{   
+/**
+  @addtogroup PartialConv
+  @{
  */
 
-/**   
- * @brief Partial convolution of Q7 sequences.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *  
- * \par    
- * Refer the function arm_conv_partial_opt_q7() for a faster implementation of this function.
- *  
+/**
+  @brief         Partial convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_opt_q7() for a faster implementation of this function.
  */
 
 arm_status arm_conv_partial_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
 {
 
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer */
-  q7_t *pIn2;                                    /* inputB pointer */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t *px;                                      /* Intermediate inputA pointer */
-  q7_t *py;                                      /* Intermediate inputB pointer */
-  q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t input1, input2;
-  q15_t in1, in2;
-  q7_t x0, x1, x2, x3, c0, c1;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter */
-  arm_status status;
-
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;           /* Loop counters */
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
+#endif
 
   /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
   {
     /* Set status as ARM_MATH_ARGUMENT_ERROR */
     status = ARM_MATH_ARGUMENT_ERROR;
   }
   else
   {
-
     /* The algorithm implementation is based on the lengths of the inputs. */
     /* srcB is always made to slide across srcA. */
     /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
+    if (srcALen >= srcBLen)
     {
       /* Initialization of inputA pointer */
       pIn1 = pSrcA;
@@ -129,46 +118,44 @@ arm_status arm_conv_partial_q7(
       srcALen = j;
     }
 
-    /* Conditions to check which loopCounter holds   
+    /* Conditions to check which loopCounter holds
      * the first and last indices of the output samples to be calculated. */
     check = firstIndex + numPoints;
     blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
     blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
     blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
 
     /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
      * for every iteration. */
 
-    /* Set the output pointer to point to the firstIndex   
+    /* Set the output pointer to point to the firstIndex
      * of the output sample to be calculated. */
     pOut = pDst + firstIndex;
 
-    /* --------------------------   
-     * Initializations of stage1   
+    /* --------------------------
+     * Initializations of stage1
      * -------------------------*/
 
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
      */
 
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from from firstIndex   
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
        Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
+    count = 1U + firstIndex;
 
     /* Working pointer of inputA */
     px = pIn1;
@@ -177,31 +164,31 @@ arm_status arm_conv_partial_q7(
     pSrc2 = pIn2 + firstIndex;
     py = pSrc2;
 
-    /* ------------------------   
-     * Stage1 process   
+    /* ------------------------
+     * Stage1 process
      * ----------------------*/
 
     /* The first stage starts here */
-    while(blockSize1 > 0)
+    while (blockSize1 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
       {
         /* x[0] , x[1] */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* y[srcBLen - 1] , y[srcBLen - 2] */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* x[0] * y[srcBLen - 1] */
@@ -209,33 +196,39 @@ arm_status arm_conv_partial_q7(
         sum = __SMLAD(input1, input2, sum);
 
         /* x[2] , x[3] */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* y[srcBLen - 3] , y[srcBLen - 4] */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* x[2] * y[srcBLen - 3] */
         /* x[3] * y[srcBLen - 4] */
         sum = __SMLAD(input1, input2, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
 
-      while(k > 0u)
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum += ((q31_t) * px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -246,53 +239,56 @@ arm_status arm_conv_partial_q7(
       py = ++pSrc2;
       px = pIn1;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blockSize1--;
     }
 
-    /* --------------------------   
-     * Initializations of stage2   
+    /* --------------------------
+     * Initializations of stage2
      * ------------------------*/
 
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
      */
 
     /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
     {
-      px = pIn1 + firstIndex - srcBLen + 1;
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
     }
     else
     {
-      px = pIn1;
+      pSrc1 = pIn1;
     }
+    px = pSrc1;
 
     /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
+    pSrc2 = pIn2 + (srcBLen - 1U);
     py = pSrc2;
 
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
+    /* count is the index by which the pointer pIn1 to be incremented */
+    count = 0U;
 
-    /* -------------------   
-     * Stage2 process   
+    /* -------------------
+     * Stage2 process
      * ------------------*/
 
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
      * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
+    if (srcBLen >= 4U)
     {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
+#if defined (ARM_MATH_LOOPUNROLL)
 
-      while(blkCnt > 0u)
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
       {
         /* Set all accumulators to zero */
         acc0 = 0;
@@ -301,24 +297,24 @@ arm_status arm_conv_partial_q7(
         acc3 = 0;
 
         /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
 
         /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
+        k = srcBLen >> 2U;
 
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
          ** a second loop below computes MACs for the remaining 1 to 3 samples. */
         do
         {
           /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
+          c0 = *py--;
           /* Read y[srcBLen - 2] sample */
-          c1 = *(py--);
+          c1 = *py--;
 
           /* Read x[3] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* x[0] and x[1] are packed */
           in1 = (q15_t) x0;
@@ -354,7 +350,7 @@ arm_status arm_conv_partial_q7(
           acc2 = __SMLAD(input1, input2, acc2);
 
           /* Read x[4] sample */
-          x0 = *(px++);
+          x0 = *px++;
 
           /* x[3] and x[4] are packed */
           in1 = (q15_t) x3;
@@ -366,12 +362,12 @@ arm_status arm_conv_partial_q7(
           acc3 = __SMLAD(input1, input2, acc3);
 
           /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
+          c0 = *py--;
           /* Read y[srcBLen - 4] sample */
-          c1 = *(py--);
+          c1 = *py--;
 
           /* Read x[5] sample */
-          x1 = *(px++);
+          x1 = *px++;
 
           /* x[2] and x[3] are packed */
           in1 = (q15_t) x2;
@@ -407,7 +403,7 @@ arm_status arm_conv_partial_q7(
           acc2 = __SMLAD(input1, input2, acc2);
 
           /* Read x[6] sample */
-          x2 = *(px++);
+          x2 = *px++;
 
           /* x[5] and x[6] are packed */
           in1 = (q15_t) x1;
@@ -418,19 +414,18 @@ arm_status arm_conv_partial_q7(
           /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
           acc3 = __SMLAD(input1, input2, acc3);
 
-        } while(--k);
+        } while (--k);
 
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
          ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
+        k = srcBLen % 0x4U;
 
-        while(k > 0u)
+        while (k > 0U)
         {
           /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
+          c0 = *py--;
           /* Read x[7] sample */
-          x3 = *(px++);
+          x3 = *px++;
 
           /* Perform the multiply-accumulates */
           /* acc0 +=  x[4] * y[srcBLen - 5] */
@@ -458,74 +453,84 @@ arm_status arm_conv_partial_q7(
         *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8));
 
         /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
+        count += 4U;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
+        px = pSrc1 + count;
         py = pSrc2;
 
-
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
 
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
+      /* Loop unrolling: Compute remaining outputs */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+#else
 
-      while(blkCnt > 0u)
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (blkCnt > 0U)
       {
         /* Accumulator is made zero for every iteration */
         sum = 0;
 
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
+        /* Loop unrolling: Compute 4 outputs at a time */
+        k = srcBLen >> 2U;
 
+        while (k > 0U)
+        {
           /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) * px++;
-          in2 = (q15_t) * px++;
+          in1 = (q15_t) *px++;
+          in2 = (q15_t) *px++;
           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
           /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) * py--;
-          in2 = (q15_t) * py--;
+          in1 = (q15_t) *py--;
+          in2 = (q15_t) *py--;
           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           sum = __SMLAD(input1, input2, sum);
 
           /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) * px++;
-          in2 = (q15_t) * px++;
+          in1 = (q15_t) *px++;
+          in2 = (q15_t) *px++;
           input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
           /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) * py--;
-          in2 = (q15_t) * py--;
+          in1 = (q15_t) *py--;
+          in2 = (q15_t) *py--;
           input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           sum = __SMLAD(input1, input2, sum);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
+        /* Loop unrolling: Compute remaining outputs */
+        k = srcBLen % 0x4U;
+
+#else
 
-        while(k > 0u)
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (k > 0U)
         {
-          /* Perform the multiply-accumulates */
+          /* Perform the multiply-accumulate */
           sum += ((q31_t) * px++ * *py--);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -533,23 +538,23 @@ arm_status arm_conv_partial_q7(
         *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
 
         /* Increment the pointer pIn1 index, count by 1 */
- 	    count++;
+        count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-      	px = pIn1 + count;
-        py = pSrc2;	
+        px = pSrc1 + count;
+        py = pSrc2;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         blkCnt--;
       }
     }
     else
     {
-      /* If the srcBLen is not a multiple of 4,   
+      /* If the srcBLen is not a multiple of 4,
        * the blockSize2 loop cannot be unrolled by 4 */
       blkCnt = (uint32_t) blockSize2;
 
-      while(blkCnt > 0u)
+      while (blkCnt > 0U)
       {
         /* Accumulator is made zero for every iteration */
         sum = 0;
@@ -557,12 +562,12 @@ arm_status arm_conv_partial_q7(
         /* srcBLen number of MACS should be performed */
         k = srcBLen;
 
-        while(k > 0u)
+        while (k > 0U)
         {
           /* Perform the multiply-accumulate */
           sum += ((q31_t) * px++ * *py--);
 
-          /* Decrement the loop counter */
+          /* Decrement loop counter */
           k--;
         }
 
@@ -573,7 +578,7 @@ arm_status arm_conv_partial_q7(
         count++;
 
         /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
+        px = pSrc1 + count;
         py = pSrc2;
 
         /* Decrement the loop counter */
@@ -582,53 +587,53 @@ arm_status arm_conv_partial_q7(
     }
 
 
-    /* --------------------------   
-     * Initializations of stage3   
+    /* --------------------------
+     * Initializations of stage3
      * -------------------------*/
 
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
      */
 
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
        The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
+    count = srcBLen - 1U;
 
     /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
+    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
     px = pSrc1;
 
     /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
+    pSrc2 = pIn2 + (srcBLen - 1U);
     py = pSrc2;
 
-    /* -------------------   
-     * Stage3 process   
+    /* -------------------
+     * Stage3 process
      * ------------------*/
 
-    while(blockSize3 > 0)
+    while (blockSize3 > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
       {
         /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
@@ -636,34 +641,40 @@ arm_status arm_conv_partial_q7(
         sum = __SMLAD(input1, input2, sum);
 
         /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
         input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
         input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
         /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
         /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
         sum = __SMLAD(input1, input2, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulates */
         /* sum +=  x[srcALen-1] * y[srcBLen-1] */
         sum += ((q31_t) * px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -674,15 +685,14 @@ arm_status arm_conv_partial_q7(
       px = ++pSrc1;
       py = pSrc2;
 
-      /* Decrement the MAC count */
+      /* Decrement MAC count */
       count--;
 
       /* Decrement the loop counter */
       blockSize3--;
-
     }
 
-    /* set status as ARM_MATH_SUCCESS */
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
 
@@ -690,19 +700,18 @@ arm_status arm_conv_partial_q7(
   return (status);
 
 #else
+/* alternate version for CM0_FAMILY */
 
-  /* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* inputA pointer */
-  q7_t *pIn2 = pSrcB;                            /* inputB pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB;                            /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
 
   /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
   {
-    /* Set status as ARM_ARGUMENT_ERROR */
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
     status = ARM_MATH_ARGUMENT_ERROR;
   }
   else
@@ -714,10 +723,10 @@ arm_status arm_conv_partial_q7(
       sum = 0;
 
       /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
+      for (j = 0U; j <= i; j++)
       {
         /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
+        if (((i - j) < srcBLen) && (j < srcALen))
         {
           /* z[i] += x[i-j] * y[j] */
           sum += ((q15_t) pIn1[j] * (pIn2[i - j]));
@@ -725,17 +734,20 @@ arm_status arm_conv_partial_q7(
       }
 
       /* Store the output in the destination buffer */
-      pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
+      pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
     }
-    /* set status as ARM_SUCCESS as there are no argument errors */
+
+    /* Set status as ARM_MATH_SUCCESS */
     status = ARM_MATH_SUCCESS;
   }
+
+  /* Return to application */
   return (status);
 
-#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
-/**   
- * @} end of PartialConv group   
+/**
+  @} end of PartialConv group
  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
similarity index 52%
rename from Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c
rename to Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
index 8454a94f..8e37ac75 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
@@ -1,107 +1,89 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_q15.c   
-*   
-* Description:	Convolution of Q15 sequences.     
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_q15.c
+ * Description:  Convolution of Q15 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**   
- * @ingroup groupFilters   
+/**
+  @ingroup groupFilters
  */
 
-/**   
- * @addtogroup Conv   
- * @{   
+/**
+  @addtogroup Conv
+  @{
  */
 
-/**   
- * @brief Convolution of Q15 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 64-bit internal accumulator.   
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.   
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.   
- * This approach provides 33 guard bits and there is no risk of overflow.   
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.   
- *   
- * \par   
- * Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. 
- *
- * \par    
- * Refer the function arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
- *  
+/**
+  @brief         Convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+  @remark
+                   Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
  */
 
 void arm_conv_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
 {
 
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_DSP)
 
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
   /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
+  if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
     pIn1 = pSrcA;
@@ -124,32 +106,32 @@ void arm_conv_q15(
   }
 
   /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
    * for every iteration. */
 
-  /* The algorithm is implemented in three stages.   
+  /* The algorithm is implemented in three stages.
      The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
 
-  /* --------------------------   
-   * Initializations of stage1   
+  /* --------------------------
+   * Initializations of stage1
    * -------------------------*/
 
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
    */
 
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
+  /* In this stage the MAC operations are increased by 1 for every iteration.
      The count variable holds the number of MAC operations performed */
-  count = 1u;
+  count = 1U;
 
   /* Working pointer of inputA */
   px = pIn1;
@@ -157,9 +139,8 @@ void arm_conv_q15(
   /* Working pointer of inputB */
   py = pIn2;
 
-
-  /* ------------------------   
-   * Stage1 process   
+  /* ------------------------
+   * Stage1 process
    * ----------------------*/
 
   /* For loop unrolling by 4, this stage is divided into two. */
@@ -167,21 +148,21 @@ void arm_conv_q15(
   /* Second part of this stage computes the MAC operations greater than or equal to 4 */
 
   /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
+  while ((count < 4U) && (blockSize1 > 0U))
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Loop over number of MAC operations between   
+    /* Loop over number of MAC operations between
      * inputA samples and inputB samples */
     k = count;
 
-    while(k > 0u)
+    while (k > 0U)
     {
       /* Perform the multiply-accumulates */
       sum = __SMLALD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -192,55 +173,55 @@ void arm_conv_q15(
     py = pIn2 + count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
   /* The second part of the stage starts here */
   /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
+  /* To, read the last two inputB samples using SIMD:
    * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
   py = py - 1;
 
-  while(blockSize1 > 0u)
+  while (blockSize1 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
+    k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
       /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* For the next MAC operations, the pointer py is used without SIMD   
+    /* For the next MAC operations, the pointer py is used without SIMD
      * So, py is incremented by 1 */
-    py = py + 1u;
+    py = py + 1U;
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
      ** No loop unrolling is used. */
-    k = count % 0x4u;
+    k = count % 0x4U;
 
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       sum = __SMLALD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -248,52 +229,51 @@ void arm_conv_q15(
     *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
 
     /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
+    py = pIn2 + (count - 1U);
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
-  /* --------------------------   
-   * Initializations of stage2   
+  /* --------------------------
+   * Initializations of stage2
    * ------------------------*/
 
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
    */
 
   /* Working pointer of inputA */
   px = pIn1;
 
   /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
+  pSrc2 = pIn2 + (srcBLen - 1U);
   py = pSrc2;
 
   /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
+  count = 0U;
 
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
 
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
    * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
+  if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
-      py = py - 1u;
+      py = py - 1U;
 
       /* Set all accumulators to zero */
       acc0 = 0;
@@ -301,24 +281,23 @@ void arm_conv_q15(
       acc2 = 0;
       acc3 = 0;
 
-
       /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
+      x0 = read_q15x2 ((q15_t *) px);
 
+      /* read x[1], x[2] samples */
+      x1 = read_q15x2 ((q15_t *) px + 1);
+      px += 2U;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       do
       {
-        /* Read the last two inputB samples using SIMD:   
+        /* Read the last two inputB samples using SIMD:
          * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
+        c0 = read_q15x2_da ((q15_t **) &py);
 
         /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
         acc0 = __SMLALDX(x0, c0, acc0);
@@ -327,10 +306,10 @@ void arm_conv_q15(
         acc1 = __SMLALDX(x1, c0, acc1);
 
         /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
+        x2 = read_q15x2 ((q15_t *) px);
 
         /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
+        x3 = read_q15x2 ((q15_t *) px + 1);
 
         /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
         acc2 = __SMLALDX(x2, c0, acc2);
@@ -339,7 +318,7 @@ void arm_conv_q15(
         acc3 = __SMLALDX(x3, c0, acc3);
 
         /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
+        c0 = read_q15x2_da ((q15_t **) &py);
 
         /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
         acc0 = __SMLALDX(x2, c0, acc0);
@@ -348,11 +327,12 @@ void arm_conv_q15(
         acc1 = __SMLALDX(x3, c0, acc1);
 
         /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
+        x0 = read_q15x2 ((q15_t *) px + 2);
 
         /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
+        x1 = read_q15x2 ((q15_t *) px + 3);
+
+        px += 4U;
 
         /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
         acc2 = __SMLALDX(x0, c0, acc2);
@@ -360,88 +340,82 @@ void arm_conv_q15(
         /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
         acc3 = __SMLALDX(x1, c0, acc3);
 
-      } while(--k);
+      } while (--k);
 
-      /* For the next MAC operations, SIMD is not used   
+      /* For the next MAC operations, SIMD is not used
        * So, the 16 bit pointer if inputB, py is updated */
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      if(k == 1u)
+      if (k == 1U)
       {
         /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
+        c0 = *(py + 1);
 #ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
+        c0 = c0 << 16U;
 #else
-
         c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
         /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
+        x3 = read_q15x2 ((q15_t *) px);
+        px++;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALD(x0, c0, acc0);
         acc1 = __SMLALD(x1, c0, acc1);
         acc2 = __SMLALDX(x1, c0, acc2);
         acc3 = __SMLALDX(x3, c0, acc3);
       }
 
-      if(k == 2u)
+      if (k == 2U)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
+        x2 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALDX(x0, c0, acc0);
         acc1 = __SMLALDX(x1, c0, acc1);
         acc2 = __SMLALDX(x3, c0, acc2);
         acc3 = __SMLALDX(x2, c0, acc3);
       }
 
-      if(k == 3u)
+      if (k == 3U)
       {
         /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALDX(x0, c0, acc0);
         acc1 = __SMLALDX(x1, c0, acc1);
         acc2 = __SMLALDX(x3, c0, acc2);
         acc3 = __SMLALDX(x2, c0, acc3);
 
-		c0 = *(py-1);
-
+        c0 = *(py-1);
 #ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
+        c0 = c0 << 16U;
 #else
-
         c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
         /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
+        x3 =  read_q15x2 ((q15_t *) px + 2);
+        px += 3U;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALDX(x1, c0, acc0);
@@ -450,70 +424,60 @@ void arm_conv_q15(
         acc3 = __SMLALDX(x3, c0, acc3);
       }
 
-
-      /* Store the results in the accumulators in the destination buffer. */
-
+      /* Store the result in the accumulator in the destination buffer. */
 #ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
 #else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
 #endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
 
       /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
+      count += 4U;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pSrc2;
 
-       /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
      ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
+    blkCnt = blockSize2 % 0x4U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
-        sum += (q63_t) ((q31_t) * px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
 
         /* Decrement the loop counter */
         k--;
@@ -535,11 +499,11 @@ void arm_conv_q15(
   }
   else
   {
-    /* If the srcBLen is not a multiple of 4,   
+    /* If the srcBLen is not a multiple of 4,
      * the blockSize2 loop cannot be unrolled by 4 */
     blkCnt = blockSize2;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
@@ -547,10 +511,10 @@ void arm_conv_q15(
       /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += (q63_t) ((q31_t) * px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
 
         /* Decrement the loop counter */
         k--;
@@ -572,33 +536,32 @@ void arm_conv_q15(
   }
 
 
-  /* --------------------------   
-   * Initializations of stage3   
+  /* --------------------------
+   * Initializations of stage3
    * -------------------------*/
 
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
    */
 
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
      The blockSize3 variable holds the number of MAC operations performed */
-
-  blockSize3 = srcBLen - 1u;
+  blockSize3 = srcBLen - 1U;
 
   /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
   px = pSrc1;
 
   /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  pIn2 = pSrc2 - 1U;
   py = pIn2;
 
-  /* -------------------   
-   * Stage3 process   
+  /* -------------------
+   * Stage3 process
    * ------------------*/
 
   /* For loop unrolling by 4, this stage is divided into two. */
@@ -606,45 +569,46 @@ void arm_conv_q15(
   /* Second part of this stage computes the MAC operations less than or equal to 4 */
 
   /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
+  j = blockSize3 >> 2U;
 
-  while((j > 0u) && (blockSize3 > 0u))
+  while ((j > 0U) && (blockSize3 > 0U))
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
+    k = blockSize3 >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
+      /* Perform the multiply-accumulate */
+      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
        * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
        * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* For the next MAC operations, the pointer py is used without SIMD   
+    /* For the next MAC operations, the pointer py is used without SIMD
      * So, py is incremented by 1 */
-    py = py + 1u;
+    py = py + 1U;
 
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
+    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
      ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
+    k = blockSize3 % 0x4U;
 
-    while(k > 0u)
+    while (k > 0U)
     {
       /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
       sum = __SMLALD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -655,18 +619,18 @@ void arm_conv_q15(
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
 
     j--;
   }
 
   /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
+  /* SIMD is not used for the next MAC operations,
    * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
+  py = py + 1U;
 
-  while(blockSize3 > 0u)
+  while (blockSize3 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
@@ -674,13 +638,13 @@ void arm_conv_q15(
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
     k = blockSize3;
 
-    while(k > 0u)
+    while (k > 0U)
     {
       /* Perform the multiply-accumulates */
       /* sum +=  x[srcALen-1] * y[srcBLen-1] */
       sum = __SMLALD(*px++, *py--, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -691,44 +655,42 @@ void arm_conv_q15(
     px = ++pSrc1;
     py = pSrc2;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
-#else
-
-/* Run the below code for Cortex-M0 */
+#else /* #if defined (ARM_MATH_DSP) */
 
-  q15_t *pIn1 = pSrcA;                           /* input pointer */
-  q15_t *pIn2 = pSrcB;                           /* coefficient pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
 
-  /* Loop to calculate output of convolution for output length number of times */
+  /* Loop to calculate convolution for output length number of values */
   for (i = 0; i < (srcALen + srcBLen - 1); i++)
   {
     /* Initialize sum with zero to carry on MAC operations */
     sum = 0;
 
     /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
+    for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
+      if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
-        sum += (q31_t) pIn1[j] * (pIn2[i - j]);
+        sum += ((q31_t) pIn1[j] * pIn2[i - j]);
       }
     }
 
     /* Store the output in the destination buffer */
-    pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
+    pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
   }
 
-#endif /*  #if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)*/
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
-/**   
- * @} end of Conv group   
+/**
+  @} end of Conv group
  */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
new file mode 100644
index 00000000..590819b0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
@@ -0,0 +1,581 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_q31.c
+ * Description:  Convolution of Q31 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_fast_q31() for a faster but less precise implementation of this function.
+ */
+
+void arm_conv_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* x[1] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* x[2] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* x[3] * y[srcBLen - 4] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (q63_t) *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q31_t) (sum >> 31);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unroll by 3 */
+    blkCnt = blockSize2 / 3;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+
+      /* Apply loop unrolling and compute 3 MACs simultaneously. */
+      k = srcBLen / 3;
+
+      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
+      do
+      {
+        /* Read y[srcBLen - 1] sample */
+        c0 = *(py);
+        /* Read x[3] sample */
+        x2 = *(px);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[srcBLen - 1] */
+        acc0 += ((q63_t) x0 * c0);
+        /* acc1 +=  x[1] * y[srcBLen - 1] */
+        acc1 += ((q63_t) x1 * c0);
+        /* acc2 +=  x[2] * y[srcBLen - 1] */
+        acc2 += ((q63_t) x2 * c0);
+
+        /* Read y[srcBLen - 2] sample */
+        c0 = *(py - 1U);
+        /* Read x[4] sample */
+        x0 = *(px + 1U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[srcBLen - 2] */
+        acc0 += ((q63_t) x1 * c0);
+        /* acc1 +=  x[2] * y[srcBLen - 2] */
+        acc1 += ((q63_t) x2 * c0);
+        /* acc2 +=  x[3] * y[srcBLen - 2] */
+        acc2 += ((q63_t) x0 * c0);
+
+        /* Read y[srcBLen - 3] sample */
+        c0 = *(py - 2U);
+        /* Read x[5] sample */
+        x1 = *(px + 2U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[srcBLen - 3] */
+        acc0 += ((q63_t) x2 * c0);
+        /* acc1 +=  x[3] * y[srcBLen - 2] */
+        acc1 += ((q63_t) x0 * c0);
+        /* acc2 +=  x[4] * y[srcBLen - 2] */
+        acc2 += ((q63_t) x1 * c0);
+
+        /* update scratch pointers */
+        px += 3U;
+        py -= 3U;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen - (3 * (srcBLen / 3));
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *py--;
+        /* Read x[7] sample */
+        x2 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[srcBLen - 5] */
+        acc0 += ((q63_t) x0 * c0);
+        /* acc1 +=  x[5] * y[srcBLen - 5] */
+        acc1 += ((q63_t) x1 * c0);
+        /* acc2 +=  x[6] * y[srcBLen - 5] */
+        acc2 += ((q63_t) x2 * c0);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (acc0 >> 31);
+      *pOut++ = (q31_t) (acc1 >> 31);
+      *pOut++ = (q31_t) (acc2 >> 31);
+
+      /* Increment the pointer pIn1 index, count by 3 */
+      count += 3U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (sum >> 31);
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (sum >> 31);
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = blockSize3 >> 2U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = blockSize3 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q31_t) (sum >> 31);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i, j;                                 /* Loop counters */
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q63_t) pIn1[j] * pIn2[i - j]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    pDst[i] = (q31_t) (sum >> 31U);
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
new file mode 100644
index 00000000..f7491cfb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
@@ -0,0 +1,700 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_q7.c
+ * Description:  Convolution of Q7 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
+  @remark
+                   Refer to \ref arm_conv_opt_q7() for a faster implementation of this function.
+ */
+
+void arm_conv_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* x[0] , x[1] */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* y[srcBLen - 1] , y[srcBLen - 2] */
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* x[0] * y[srcBLen - 1] */
+      /* x[1] * y[srcBLen - 2] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* x[2] , x[3] */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* y[srcBLen - 3] , y[srcBLen - 4] */
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* x[2] * y[srcBLen - 3] */
+      /* x[3] * y[srcBLen - 4] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += ((q15_t) *px++ * *py--);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[srcBLen - 1] sample */
+        c0 = *py--;
+        /* Read y[srcBLen - 2] sample */
+        c1 = *py--;
+
+        /* Read x[3] sample */
+        x3 = *px++;
+
+        /* x[0] and x[1] are packed */
+        in1 = (q15_t) x0;
+        in2 = (q15_t) x1;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
+        in1 = (q15_t) c0;
+        in2 = (q15_t) c1;
+
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
+        acc0 = __SMLAD(input1, input2, acc0);
+
+        /* x[1] and x[2] are packed */
+        in1 = (q15_t) x1;
+        in2 = (q15_t) x2;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
+        acc1 = __SMLAD(input1, input2, acc1);
+
+        /* x[2] and x[3] are packed */
+        in1 = (q15_t) x2;
+        in2 = (q15_t) x3;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
+        acc2 = __SMLAD(input1, input2, acc2);
+
+        /* Read x[4] sample */
+        x0 = *px++;
+
+        /* x[3] and x[4] are packed */
+        in1 = (q15_t) x3;
+        in2 = (q15_t) x0;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
+        acc3 = __SMLAD(input1, input2, acc3);
+
+        /* Read y[srcBLen - 3] sample */
+        c0 = *py--;
+        /* Read y[srcBLen - 4] sample */
+        c1 = *py--;
+
+        /* Read x[5] sample */
+        x1 = *px++;
+
+        /* x[2] and x[3] are packed */
+        in1 = (q15_t) x2;
+        in2 = (q15_t) x3;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
+        in1 = (q15_t) c0;
+        in2 = (q15_t) c1;
+
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
+        acc0 = __SMLAD(input1, input2, acc0);
+
+        /* x[3] and x[4] are packed */
+        in1 = (q15_t) x3;
+        in2 = (q15_t) x0;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
+        acc1 = __SMLAD(input1, input2, acc1);
+
+        /* x[4] and x[5] are packed */
+        in1 = (q15_t) x0;
+        in2 = (q15_t) x1;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
+        acc2 = __SMLAD(input1, input2, acc2);
+
+        /* Read x[6] sample */
+        x2 = *px++;
+
+        /* x[5] and x[6] are packed */
+        in1 = (q15_t) x1;
+        in2 = (q15_t) x2;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
+        acc3 = __SMLAD(input1, input2, acc3);
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *py--;
+        /* Read x[7] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[srcBLen - 5] */
+        acc0 += ((q15_t) x0 * c0);
+        /* acc1 +=  x[5] * y[srcBLen - 5] */
+        acc1 += ((q15_t) x1 * c0);
+        /* acc2 +=  x[6] * y[srcBLen - 5] */
+        acc2 += ((q15_t) x2 * c0);
+        /* acc3 +=  x[7] * y[srcBLen - 5] */
+        acc3 += ((q15_t) x3 * c0);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
+      *pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8));
+      *pOut++ = (q7_t) (__SSAT(acc2 >> 7U, 8));
+      *pOut++ = (q7_t) (__SSAT(acc3 >> 7U, 8));
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+      while (k > 0U)
+      {
+
+        /* Reading two inputs of SrcA buffer and packing */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Reading two inputs of SrcB buffer and packing */
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Perform the multiply-accumulate */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Reading two inputs of SrcA buffer and packing */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Reading two inputs of SrcB buffer and packing */
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Perform the multiply-accumulate */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py--);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py--);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = blockSize3 >> 2U;
+
+    while (k > 0U)
+    {
+      /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = blockSize3 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum += ((q15_t) *px++ * *py--);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB;                            /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q15_t) pIn1[j] * pIn2[i - j]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
new file mode 100644
index 00000000..9aa648b7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
@@ -0,0 +1,893 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_f32.c
+ * Description:  Correlation of floating-point sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup Corr Correlation
+
+  Correlation is a mathematical operation that is similar to convolution.
+  As with convolution, correlation uses two signals to produce a third signal.
+  The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
+  Correlation is commonly used to measure the similarity between two signals.
+  It has applications in pattern recognition, cryptanalysis, and searching.
+  The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
+  Fast versions of the Q15 and Q31 functions are also provided.
+
+  @par           Algorithm
+                   Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively.
+                   The convolution of the two signals is denoted by
+  
+      c[n] = a[n] * b[n]
+  

+                   In correlation, one of the signals is flipped in time
+  
+       c[n] = a[n] * b[-n]
+  

+  @par
+                   and this is mathematically defined as
+                   \image html CorrelateEquation.gif
+  @par
+                   The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen.
+                   The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2).
+                   The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result.
+
+  @note
+                   The pDst should be initialized to all zeros before being used.
+
+  @par           Fixed-Point Behavior
+                   Correlation requires summing up a large number of intermediate products.
+                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+                   Refer to the function specific documentation below for further details of the particular algorithm used.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+ */
+
+void arm_correlate_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+  
+  const float32_t *pIn1;                               /* InputA pointer */
+  const float32_t *pIn2;                               /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1;
+        float32_t sum;
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;                         /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)
+  float32_t acc0, acc1, acc2, acc3;                    /* Accumulators */
+  float32_t x0, x1, x2, x3, c0;                        /* temporary variables for holding input and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we assume zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding has to be done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+
+    k = count & 0x3;
+#else
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] */
+      sum += *px++ * *py++;
+
+      /* x[1] * y[srcBLen - 3] */
+      sum += *px++ * *py++;
+
+      /* x[2] * y[srcBLen - 2] */
+      sum += *px++ * *py++;
+
+      /* x[3] * y[srcBLen - 1] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#endif /* #if defined(ARM_MATH_NEON) */
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen]   * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+#if defined(ARM_MATH_NEON)
+      float32x4_t c;
+      float32x4_t x1v;
+      float32x4_t x2v;
+      uint32x4_t x1v_u;
+      uint32x4_t x2v_u;
+      float32x4_t x;
+      uint32x4_t x_u;
+      float32x4_t res = vdupq_n_f32(0) ;
+#endif /* #if defined(ARM_MATH_NEON) */
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0.0f;
+      acc1 = 0.0f;
+      acc2 = 0.0f;
+      acc3 = 0.0f;
+
+#if defined(ARM_MATH_NEON)
+      /* Compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      res = vdupq_n_f32(0) ;
+
+      x1v = vld1q_f32(px);
+      px += 4;
+      do
+      {
+        x2v = vld1q_f32(px);
+        c = vld1q_f32(py);
+
+        py += 4;
+
+        x = x1v;
+        res = vmlaq_n_f32(res,x,c[0]);
+
+        x = vextq_f32(x1v,x2v,1);
+
+        res = vmlaq_n_f32(res,x,c[1]);
+
+        x = vextq_f32(x1v,x2v,2);
+
+	res = vmlaq_n_f32(res,x,c[2]);
+
+        x = vextq_f32(x1v,x2v,3);
+
+	res = vmlaq_n_f32(res,x,c[3]);
+
+        x1v = x2v;
+        px+=4;
+        x2v = vld1q_f32(px);
+
+      } while (--k);
+      
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen & 0x3;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *(py++);
+
+        res = vmlaq_n_f32(res,x1v,c0);
+
+        /* Reuse the present samples for the next MAC */
+        x1v[0] = x1v[1];
+        x1v[1] = x1v[2];
+        x1v[2] = x1v[3];
+
+        x1v[3] = *(px++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      px-=1;
+
+      acc0 = res[0];
+      acc1 = res[1];
+      acc2 = res[2];
+      acc3 = res[3];
+#else
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[0] sample */
+        c0 = *(py++);
+        /* Read x[3] sample */
+        x3 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[0] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[1] * y[0] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[2] * y[0] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[3] * y[0] */
+        acc3 += x3 * c0;
+
+        /* Read y[1] sample */
+        c0 = *(py++);
+        /* Read x[4] sample */
+        x0 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[1] */
+        acc0 += x1 * c0;
+        /* acc1 +=  x[2] * y[1] */
+        acc1 += x2 * c0;
+        /* acc2 +=  x[3] * y[1] */
+        acc2 += x3 * c0;
+        /* acc3 +=  x[4] * y[1] */
+        acc3 += x0 * c0;
+
+        /* Read y[2] sample */
+        c0 = *(py++);
+        /* Read x[5] sample */
+        x1 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[2] */
+        acc0 += x2 * c0;
+        /* acc1 +=  x[3] * y[2] */
+        acc1 += x3 * c0;
+        /* acc2 +=  x[4] * y[2] */
+        acc2 += x0 * c0;
+        /* acc3 +=  x[5] * y[2] */
+        acc3 += x1 * c0;
+
+        /* Read y[3] sample */
+        c0 = *(py++);
+        /* Read x[6] sample */
+        x2 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[3] * y[3] */
+        acc0 += x3 * c0;
+        /* acc1 +=  x[4] * y[3] */
+        acc1 += x0 * c0;
+        /* acc2 +=  x[5] * y[3] */
+        acc2 += x1 * c0;
+        /* acc3 +=  x[6] * y[3] */
+        acc3 += x2 * c0;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[4] sample */
+        c0 = *(py++);
+        /* Read x[7] sample */
+        x3 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[4] * y[4] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[5] * y[4] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[6] * y[4] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[7] * y[4] */
+        acc3 += x3 * c0;
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+#endif /* #if defined(ARM_MATH_NEON) */
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = acc0;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = acc1;
+      pOut += inc;
+
+      *pOut = acc2;
+      pOut += inc;
+
+      *pOut = acc3;
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+#else
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+
+        /* Decrement loop counter */
+        k--;
+      }
+#endif /* #if defined(ARM_MATH_NEON) */
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+      /* Loop over srcBLen */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+#else
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+#endif /* #if defined (ARM_MATH_NEON) */
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const float32_t *pIn1 = pSrcA;                       /* inputA pointer */
+  const float32_t *pIn2 = pSrcB + (srcBLen - 1U);      /* inputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and a varaible, inv is set to 1 */
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we assume zeroes
+   * in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * starting of the output buffer */
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * ending of the output buffer */
+  /* Once the zero padding is done the remaining of the output is calcualted
+   * using convolution but with the shorter signal time shifted. */
+
+  /* Calculate the length of the remaining sequence */
+  tot = ((srcALen + srcBLen) - 2U);
+
+  if (srcALen > srcBLen)
+  {
+    /* Calculating the number of zeros to be padded to the output */
+    j = srcALen - srcBLen;
+
+    /* Initialise the pointer after zero padding */
+    pDst += j;
+  }
+
+  else if (srcALen < srcBLen)
+  {
+    /* Initialization to inputB pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization to the end of inputA pointer */
+    pIn2 = pSrcA + (srcALen - 1U);
+
+    /* Initialisation of the pointer after zero padding */
+    pDst = pDst + tot;
+
+    /* Swapping the lengths */
+    j = srcALen;
+    srcALen = srcBLen;
+    srcBLen = j;
+
+    /* Setting the reverse flag */
+    inv = 1;
+
+  }
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i <= tot; i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0.0f;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if ((((i - j) < srcBLen) && (j < srcALen)))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += pIn1[j] * pIn2[-((int32_t) i - j)];
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    if (inv == 1)
+      *pDst-- = sum;
+    else
+      *pDst++ = sum;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
new file mode 100644
index 00000000..31fc6805
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
@@ -0,0 +1,345 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_fast_opt_q15.c
+ * Description:  Fast Q15 Correlation
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence.
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
+
+void arm_correlate_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch)
+{
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q31_t acc0;                                    /* Accumulators */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch;                       /* Temporary pointer for scratch */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, blkCnt, outBlockSize;              /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
+        uint32_t tapCnt;                               /* Loop count */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables for holding input and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  pScr1 = pScratch;
+
+  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+
+  /* Copy (srcALen) samples in scratch buffer */
+  arm_copy_q15(pIn1, pScr1, srcALen);
+
+  /* Update pointers */
+  pScr1 += srcALen;
+
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pIn2;
+
+
+  /* Actual correlation process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+      /* multiply and accumlate */
+      acc0 = __SMLAD(x1, y1, acc0);
+      acc2 = __SMLAD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumlate */
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      /* Read next two samples from scratch buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* multiply and accumlate */
+      acc0 = __SMLAD(x2, y2, acc0);
+      acc2 = __SMLAD(x1, y2, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+      acc1 = __SMLADX(x3, y2, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y2, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the results in the accumulators in the destination buffer. */
+    *pOut = (__SSAT(acc0 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc1 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc2 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc3 >> 15U, 16));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch += 4U;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Calculate correlation for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read next two samples from scratch buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+     ** Then store the output in the destination buffer. */
+    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch += 1U;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
new file mode 100644
index 00000000..0c0f12a0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
@@ -0,0 +1,614 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_fast_q15.c
+ * Description:  Fast Q15 Correlation
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
+
+void arm_correlate_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
+{
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
+
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first loop starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+       No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* x[0] * y[srcBLen - 1] */
+      sum = __SMLAD(*px++, *py++, sum);
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q15_t) (sum >> 15);
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is the index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* --------------------
+   * Stage2 process
+   * -------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Loop unroll over blockSize2, by 4 */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1] samples */
+      x0 = read_q15x2 ((q15_t *) px);
+      /* read x[1], x[2] samples */
+      x1 = read_q15x2 ((q15_t *) px + 1);
+	  px += 2U;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read the first two inputB samples using SIMD:
+         * y[0] and y[1] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
+        acc0 = __SMLAD(x0, c0, acc0);
+
+        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
+        acc1 = __SMLAD(x1, c0, acc1);
+
+        /* Read x[2], x[3] */
+        x2 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[3], x[4] */
+        x3 = read_q15x2 ((q15_t *) px + 1);
+
+        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
+        acc2 = __SMLAD(x2, c0, acc2);
+
+        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
+        acc3 = __SMLAD(x3, c0, acc3);
+
+        /* Read y[2] and y[3] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
+        acc0 = __SMLAD(x2, c0, acc0);
+
+        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
+        acc1 = __SMLAD(x3, c0, acc1);
+
+        /* Read x[4], x[5] */
+        x0 = read_q15x2 ((q15_t *) px + 2);
+
+        /* Read x[5], x[6] */
+        x1 = read_q15x2 ((q15_t *) px + 3);
+		px += 4U;
+
+        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
+        acc2 = __SMLAD(x0, c0, acc2);
+
+        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
+        acc3 = __SMLAD(x1, c0, acc3);
+
+      } while (--k);
+
+      /* For the next MAC operations, SIMD is not used
+       * So, the 16 bit pointer if inputB, py is updated */
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      if (k == 1U)
+      {
+        /* Read y[4] */
+        c0 = *py;
+
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[7] */
+        x3 = read_q15x2 ((q15_t *) px);
+		px++;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLAD (x0, c0, acc0);
+        acc1 = __SMLAD (x1, c0, acc1);
+        acc2 = __SMLADX(x1, c0, acc2);
+        acc3 = __SMLADX(x3, c0, acc3);
+      }
+
+      if (k == 2U)
+      {
+        /* Read y[4], y[5] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+		px += 2U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLAD(x0, c0, acc0);
+        acc1 = __SMLAD(x1, c0, acc1);
+        acc2 = __SMLAD(x3, c0, acc2);
+        acc3 = __SMLAD(x2, c0, acc3);
+      }
+
+      if (k == 3U)
+      {
+        /* Read y[4], y[5] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLAD(x0, c0, acc0);
+        acc1 = __SMLAD(x1, c0, acc1);
+        acc2 = __SMLAD(x3, c0, acc2);
+        acc3 = __SMLAD(x2, c0, acc3);
+
+        c0 = (*py);
+        /* Read y[6] */
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[10] */
+        x3 = read_q15x2 ((q15_t *) px + 2);
+		px += 3U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLADX(x1, c0, acc0);
+        acc1 = __SMLAD (x2, c0, acc1);
+        acc2 = __SMLADX(x2, c0, acc2);
+        acc3 = __SMLADX(x3, c0, acc3);
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (acc0 >> 15);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = (q15_t) (acc1 >> 15);
+      pOut += inc;
+
+      *pOut = (q15_t) (acc2 >> 15);
+      pOut += inc;
+
+      *pOut = (q15_t) (acc3 >> 15);
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q31_t) * px++ * *py++);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (sum >> 15);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q31_t) *px++ * *py++);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (sum >> 15);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      sum = __SMLAD(*px++, *py++, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q15_t) (sum >> 15);
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement the MAC count */
+    count--;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
similarity index 51%
rename from Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c
rename to Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
index 4857c30e..8686c52b 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
@@ -1,121 +1,106 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_fast_q31.c    
-*    
-* Description:	Fast Q31 Correlation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_fast_q31.c
+ * Description:  Fast Q31 Correlation
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**    
- * @ingroup groupFilters    
+/**
+  @ingroup groupFilters
  */
 
-/**    
- * @addtogroup Corr    
- * @{    
+/**
+  @addtogroup Corr
+  @{
  */
 
-/**    
- * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are accumulated in a 32-bit register in 2.30 format.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- *    
- * \par    
- * See arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.    
+/**
+  @brief         Correlation of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are accumulated in a 32-bit register in 2.30 format.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+
+ @remark
+                   Refer to \ref arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
  */
 
 void arm_correlate_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
 {
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
   /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
+  if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
+    outBlockSize = (2U * srcALen) - 1U;
 
-    /* When srcALen > srcBLen, zero padding is done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
      * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
 
     /* Updating the pointer position to non zero value */
     pOut += j;
@@ -124,10 +109,10 @@ void arm_correlate_fast_q31(
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -136,93 +121,97 @@ void arm_correlate_fast_q31(
 
     /* CORR(x, y) = Reverse order(CORR(y, x)) */
     /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
 
     /* Destination address modifier is set to -1 */
     inc = -1;
 
   }
 
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
 
-  /* --------------------------    
-   * Initializations of stage1    
+  /* --------------------------
+   * Initializations of stage1
    * -------------------------*/
 
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
    */
 
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
+  /* In this stage the MAC operations are increased by 1 for every iteration.
      The count variable holds the number of MAC operations performed */
-  count = 1u;
+  count = 1U;
 
   /* Working pointer of inputA */
   px = pIn1;
 
   /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
+  pSrc1 = pIn2 + (srcBLen - 1U);
   py = pSrc1;
 
-  /* ------------------------    
-   * Stage1 process    
+  /* ------------------------
+   * Stage1 process
    * ----------------------*/
 
   /* The first stage starts here */
-  while(blockSize1 > 0u)
+  while (blockSize1 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
+    k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    while (k > 0U)
     {
       /* x[0] * y[srcBLen - 4] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* x[1] * y[srcBLen - 3] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* x[2] * y[srcBLen - 2] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* x[3] * y[srcBLen - 1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
      ** No loop unrolling is used. */
-    k = count % 0x4u;
+    k = count % 0x4U;
 
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -235,21 +224,21 @@ void arm_correlate_fast_q31(
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
-  /* --------------------------    
-   * Initializations of stage2    
+  /* --------------------------
+   * Initializations of stage2
    * ------------------------*/
 
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
    */
 
   /* Working pointer of inputA */
@@ -259,21 +248,21 @@ void arm_correlate_fast_q31(
   py = pIn2;
 
   /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
+  count = 0U;
 
-  /* -------------------    
-   * Stage2 process    
+  /* -------------------
+   * Stage2 process
    * ------------------*/
 
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
    * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
+  if (srcBLen >= 4U)
   {
     /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
+    blkCnt = blockSize2 >> 2U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Set all accumulators to zero */
       acc0 = 0;
@@ -282,22 +271,21 @@ void arm_correlate_fast_q31(
       acc3 = 0;
 
       /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       do
       {
         /* Read y[0] sample */
-        c0 = *(py++);
-
+        c0 = *py++;
         /* Read x[3] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
         /* Perform the multiply-accumulate */
         /* acc0 +=  x[0] * y[0] */
@@ -309,13 +297,13 @@ void arm_correlate_fast_q31(
         /* acc3 +=  x[3] * y[0] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
 
-        /* Read y[1] sample */
-        c0 = *(py++);
 
+        /* Read y[1] sample */
+        c0 = *py++;
         /* Read x[4] sample */
-        x0 = *(px++);
+        x0 = *px++;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         /* acc0 +=  x[1] * y[1] */
         acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
         /* acc1 +=  x[2] * y[1] */
@@ -325,11 +313,11 @@ void arm_correlate_fast_q31(
         /* acc3 +=  x[4] * y[1] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
 
-        /* Read y[2] sample */
-        c0 = *(py++);
 
+        /* Read y[2] sample */
+        c0 = *py++;
         /* Read x[5] sample */
-        x1 = *(px++);
+        x1 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[2] * y[2] */
@@ -341,11 +329,11 @@ void arm_correlate_fast_q31(
         /* acc3 +=  x[5] * y[2] */
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
 
-        /* Read y[3] sample */
-        c0 = *(py++);
 
+        /* Read y[3] sample */
+        c0 = *py++;
         /* Read x[6] sample */
-        x2 = *(px++);
+        x2 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[3] * y[3] */
@@ -358,19 +346,18 @@ void arm_correlate_fast_q31(
         acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
 
 
-      } while(--k);
+      } while (--k);
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Read y[4] sample */
-        c0 = *(py++);
-
+        c0 = *py++;
         /* Read x[7] sample */
-        x3 = *(px++);
+        x3 = *px++;
 
         /* Perform the multiply-accumulates */
         /* acc0 +=  x[4] * y[4] */
@@ -387,7 +374,7 @@ void arm_correlate_fast_q31(
         x1 = x2;
         x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -406,58 +393,57 @@ void arm_correlate_fast_q31(
       pOut += inc;
 
       /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
+      count += 4U;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
      ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
+    blkCnt = blockSize2 % 0x4U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulates */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -466,39 +452,38 @@ void arm_correlate_fast_q31(
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
   else
   {
-    /* If the srcBLen is not a multiple of 4,    
+    /* If the srcBLen is not a multiple of 4,
      * the blockSize2 loop cannot be unrolled by 4 */
     blkCnt = blockSize2;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Loop over srcBLen */
+      /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulate */
         sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) * px++ * (*py++))) >> 32);
+                        ((q63_t) *px++ * (*py++))) >> 32);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -507,85 +492,89 @@ void arm_correlate_fast_q31(
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
-      /* Increment the MAC count */
+      /* Increment MAC count */
       count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
-  /* --------------------------    
-   * Initializations of stage3    
+
+  /* --------------------------
+   * Initializations of stage3
    * -------------------------*/
 
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
    */
 
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
      The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
+  count = srcBLen - 1U;
 
   /* Working pointer of inputA */
-  pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1u;
+  pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1U;
   px = pSrc1;
 
   /* Working pointer of inputB */
   py = pIn2;
 
-  /* -------------------    
-   * Stage3 process    
+  /* -------------------
+   * Stage3 process
    * ------------------*/
 
-  while(blockSize3 > 0u)
+  while (blockSize3 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
+    k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* sum += x[srcALen - srcBLen + 4] * y[3] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* sum += x[srcALen - srcBLen + 3] * y[2] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* sum += x[srcALen - srcBLen + 2] * y[1] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
       /* sum += x[srcALen - srcBLen + 1] * y[0] */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
      ** No loop unrolling is used. */
-    k = count % 0x4u;
+    k = count % 0x4U;
 
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) * px++ * (*py++))) >> 32);
+                      ((q63_t) *px++ * (*py++))) >> 32);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -598,15 +587,15 @@ void arm_correlate_fast_q31(
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the MAC count */
+    /* Decrement MAC count */
     count--;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 }
 
-/**    
- * @} end of Corr group    
+/**
+  @} end of Corr group
  */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
new file mode 100644
index 00000000..ae0ab454
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
@@ -0,0 +1,341 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_opt_q15.c
+ * Description:  Correlation of Q15 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+ @remark
+                   Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
+ */
+
+void arm_correlate_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch)
+{
+        q63_t acc0;                                    /* Accumulators */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1;                                  /* Temporary pointer for scratch1 */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, blkCnt, outBlockSize;              /* Loop counter */
+        int32_t inc = 1;                               /* Output pointer increment */
+        uint32_t tapCnt;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables for holding input1 and input2 values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (srcALen * 2U) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  pScr1 = pScratch;
+
+  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy (srcALen) samples in scratch buffer */
+  arm_copy_q15(pIn1, pScr1, srcALen);
+
+  /* Update pointers */
+  pScr1 += srcALen;
+
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pIn2;
+
+
+  /* Actual correlation process starts here */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+      /* multiply and accumlate */
+      acc0 = __SMLALD(x1, y1, acc0);
+      acc2 = __SMLALD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumlate */
+      acc1 = __SMLALDX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* multiply and accumlate */
+      acc0 = __SMLALD(x2, y2, acc0);
+      acc2 = __SMLALD(x1, y2, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLALDX(x3, y1, acc3);
+      acc1 = __SMLALDX(x3, y2, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLALDX(x3, y2, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+
+    /* Store the results in the accumulators in the destination buffer. */
+    *pOut = (__SSAT(acc0 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc1 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc2 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc3 >> 15U, 16));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch += 4U;
+  }
+
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Calculate correlation for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read next two samples from scratch1 buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch += 1U;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
new file mode 100644
index 00000000..10c6e709
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
@@ -0,0 +1,388 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_opt_q7.c
+ * Description:  Correlation of Q7 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
+ */
+
+void arm_correlate_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
+        q15_t x4;                                      /* Temporary input variable */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+        int32_t inc = 1;                               /* Output pointer increment */
+        uint32_t outBlockSize;                         /* Loop counter */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+        q7_t *pOut = pDst;                             /* Output pointer */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (srcALen * 2U) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+
+  /* Copy (srcBLen) samples in scratch buffer */
+  k = srcBLen >> 2U;
+
+  /* First part of the processing with loop unrolling copies 4 data points at a time.
+     a second loop below copies for the remaining 1 to 3 samples. */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* If the count is not a multiple of 4, copy remaining samples here.
+     No loop unrolling is used. */
+  k = srcBLen % 0x4U;
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy (srcALen) samples in scratch buffer */
+  /* Apply loop unrolling and do 4 Copies simultaneously. */
+  k = srcALen >> 2U;
+
+  /* First part of the processing with loop unrolling copies 4 data points at a time.
+     a second loop below copies for the remaining 1 to 3 samples. */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* If the count is not a multiple of 4, copy remaining samples here.
+     No loop unrolling is used. */
+  k = srcALen % 0x4U;
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    x4 = (q15_t) * pIn1++;
+    *pScr1++ = x4;
+
+    /* Decrement the loop counter */
+    k--;
+  }
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pScratch2;
+
+  /* Initialization of pScr2 pointer */
+  pScr2 = pScratch2;
+
+  /* Actual correlation process starts here */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia (&pScr2);
+
+      /* multiply and accumlate */
+      acc0 = __SMLAD(x1, y1, acc0);
+      acc2 = __SMLAD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumlate */
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia (&pScr2);
+
+      acc0 = __SMLAD(x2, y1, acc0);
+
+      acc2 = __SMLAD(x1, y1, acc2);
+
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pScr2);
+      acc1 += (*pScr1++ * *pScr2);
+      acc2 += (*pScr1++ * *pScr2);
+      acc3 += (*pScr1++ * *pScr2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8));
+    pOut += inc;
+    *pOut = (q7_t) (__SSAT(acc1 >> 7U, 8));
+    pOut += inc;
+    *pOut = (q7_t) (__SSAT(acc2 >> 7U, 8));
+    pOut += inc;
+    *pOut = (q7_t) (__SSAT(acc3 >> 7U, 8));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pScr2 = py;
+
+    pScratch1 += 4U;
+  }
+
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+  /* Calculate correlation for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+      acc0 += (*pScr1++ * *pScr2++);
+      acc0 += (*pScr1++ * *pScr2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+      /* accumlate the results */
+      acc0 += (*pScr1++ * *pScr2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pScr2 = py;
+
+    pScratch1 += 1U;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
similarity index 51%
rename from Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c
rename to Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
index 3dcf69e1..c8474959 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
@@ -1,104 +1,86 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_q15.c   
-*   
-* Description:	Correlation of Q15 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_q15.c
+ * Description:  Correlation of Q15 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**   
- * @ingroup groupFilters   
+/**
+  @ingroup groupFilters
  */
 
-/**   
- * @addtogroup Corr   
- * @{   
+/**
+  @addtogroup Corr
+  @{
  */
 
-/**   
- * @brief Correlation of Q15 sequences. 
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 64-bit internal accumulator.   
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.   
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.   
- * This approach provides 33 guard bits and there is no risk of overflow.   
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.   
- *   
- * \par   
- * Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4. 
- *
- * \par    
- * Refer the function arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
- * 
+/**
+  @brief         Correlation of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+  @remark
+                   Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
  */
 
 void arm_correlate_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
 {
 
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
+#if defined (ARM_MATH_DSP)
+
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -107,40 +89,39 @@ void arm_correlate_q15(
   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
   /* and the destination pointer modifier, inc is set to -1 */
   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
+  /* But to improve the performance,
    * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
+  /* If srcALen > srcBLen,
    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
+  /* If srcALen < srcBLen,
    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
+  if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
+    outBlockSize = (srcALen * 2U) - 1U;
 
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
      * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
   }
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -149,84 +130,85 @@ void arm_correlate_q15(
 
     /* CORR(x, y) = Reverse order(CORR(y, x)) */
     /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
 
-  /* --------------------------   
-   * Initializations of stage1   
+  /* --------------------------
+   * Initializations of stage1
    * -------------------------*/
 
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
    */
 
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
+  /* In this stage the MAC operations are increased by 1 for every iteration.
      The count variable holds the number of MAC operations performed */
-  count = 1u;
+  count = 1U;
 
   /* Working pointer of inputA */
   px = pIn1;
 
   /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
+  pSrc1 = pIn2 + (srcBLen - 1U);
   py = pSrc1;
 
-  /* ------------------------   
-   * Stage1 process   
+  /* ------------------------
+   * Stage1 process
    * ----------------------*/
 
   /* The first loop starts here */
-  while(blockSize1 > 0u)
+  while (blockSize1 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
+    k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    while (k > 0U)
     {
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
       /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
      ** No loop unrolling is used. */
-    k = count % 0x4u;
+    k = count % 0x4U;
 
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 1] */
       sum = __SMLALD(*px++, *py++, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -239,21 +221,21 @@ void arm_correlate_q15(
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
-  /* --------------------------   
-   * Initializations of stage2   
+  /* --------------------------
+   * Initializations of stage2
    * ------------------------*/
 
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
    */
 
   /* Working pointer of inputA */
@@ -262,22 +244,22 @@ void arm_correlate_q15(
   /* Working pointer of inputB */
   py = pIn2;
 
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
+  /* count is the index by which the pointer pIn1 to be incremented */
+  count = 0U;
 
-  /* -------------------   
-   * Stage2 process   
+  /* -------------------
+   * Stage2 process
    * ------------------*/
 
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Set all accumulators to zero */
       acc0 = 0;
@@ -286,21 +268,22 @@ void arm_correlate_q15(
       acc3 = 0;
 
       /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
+      x0 = read_q15x2 ((q15_t *) px);
+
       /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px + 1);
-	  px += 2u;
+      x1 = read_q15x2 ((q15_t *) px + 1);
+      px += 2U;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       do
       {
-        /* Read the first two inputB samples using SIMD:   
+        /* Read the first two inputB samples using SIMD:
          * y[0] and y[1] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
         acc0 = __SMLALD(x0, c0, acc0);
@@ -309,10 +292,10 @@ void arm_correlate_q15(
         acc1 = __SMLALD(x1, c0, acc1);
 
         /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
+        x2 = read_q15x2 ((q15_t *) px);
 
         /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px + 1);
+        x3 = read_q15x2 ((q15_t *) px + 1);
 
         /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
         acc2 = __SMLALD(x2, c0, acc2);
@@ -321,7 +304,7 @@ void arm_correlate_q15(
         acc3 = __SMLALD(x3, c0, acc3);
 
         /* Read y[2] and y[3] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
         acc0 = __SMLALD(x2, c0, acc0);
@@ -330,12 +313,11 @@ void arm_correlate_q15(
         acc1 = __SMLALD(x3, c0, acc1);
 
         /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px + 2);
+        x0 = read_q15x2 ((q15_t *) px + 2);
 
         /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px + 3);
-
-		px += 4u;
+        x1 = read_q15x2 ((q15_t *) px + 3);
+        px += 4U;
 
         /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
         acc2 = __SMLALD(x0, c0, acc2);
@@ -343,67 +325,64 @@ void arm_correlate_q15(
         /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
         acc3 = __SMLALD(x1, c0, acc3);
 
-      } while(--k);
+      } while (--k);
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      if(k == 1u)
+      if (k == 1U)
       {
         /* Read y[4] */
         c0 = *py;
 #ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
+        c0 = c0 << 16U;
 #else
-
         c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
 
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
         /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
+        x3 = read_q15x2 ((q15_t *) px);
+        px++;
 
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
+        /* Perform the multiply-accumulate */
+        acc0 = __SMLALD (x0, c0, acc0);
+        acc1 = __SMLALD (x1, c0, acc1);
         acc2 = __SMLALDX(x1, c0, acc2);
         acc3 = __SMLALDX(x3, c0, acc3);
       }
 
-      if(k == 2u)
+      if (k == 2U)
       {
         /* Read y[4], y[5] */
-        c0 = *__SIMD32(py);
+        c0 = read_q15x2 ((q15_t *) py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-		px += 2u;
+        x2 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALD(x0, c0, acc0);
         acc1 = __SMLALD(x1, c0, acc1);
         acc2 = __SMLALD(x3, c0, acc2);
         acc3 = __SMLALD(x2, c0, acc3);
       }
 
-      if(k == 3u)
+      if (k == 3U)
       {
         /* Read y[4], y[5] */
-        c0 = *__SIMD32(py)++;
+        c0 = read_q15x2_ia ((q15_t **) &py);
 
         /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
+        x3 = read_q15x2 ((q15_t *) px);
 
         /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
+        x2 = read_q15x2 ((q15_t *) px + 1);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         acc0 = __SMLALD(x0, c0, acc0);
         acc1 = __SMLALD(x1, c0, acc1);
         acc2 = __SMLALD(x3, c0, acc2);
@@ -413,19 +392,18 @@ void arm_correlate_q15(
 
         /* Read y[6] */
 #ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
+        c0 = c0 << 16U;
 #else
-
         c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
         /* Read x[10] */
-        x3 = _SIMD32_OFFSET(px + 2);
-		px += 3u;
+        x3 = read_q15x2 ((q15_t *) px + 2);
+        px += 3U;
 
         /* Perform the multiply-accumulates */
         acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
+        acc1 = __SMLALD (x2, c0, acc1);
         acc2 = __SMLALDX(x2, c0, acc2);
         acc3 = __SMLALDX(x3, c0, acc3);
       }
@@ -445,50 +423,50 @@ void arm_correlate_q15(
       pOut += inc;
 
       /* Increment the count by 4 as 4 output values are computed */
-      count += 4u;
+      count += 4U;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
      ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
+    blkCnt = blockSize2 % 0x4U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
-        sum += ((q63_t) * px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulates */
-        sum += ((q63_t) * px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
 
         /* Decrement the loop counter */
         k--;
@@ -512,22 +490,22 @@ void arm_correlate_q15(
   }
   else
   {
-    /* If the srcBLen is not a multiple of 4,   
+    /* If the srcBLen is not a multiple of 4,
      * the blockSize2 loop cannot be unrolled by 4 */
     blkCnt = blockSize2;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Loop over srcBLen */
+      /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += ((q63_t) * px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
 
         /* Decrement the loop counter */
         k--;
@@ -550,64 +528,65 @@ void arm_correlate_q15(
     }
   }
 
-  /* --------------------------   
-   * Initializations of stage3   
+
+  /* --------------------------
+   * Initializations of stage3
    * -------------------------*/
 
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
    */
 
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
      The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
+  count = srcBLen - 1U;
 
   /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
   px = pSrc1;
 
   /* Working pointer of inputB */
   py = pIn2;
 
-  /* -------------------   
-   * Stage3 process   
+  /* -------------------
+   * Stage3 process
    * ------------------*/
 
-  while(blockSize3 > 0u)
+  while (blockSize3 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
     /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
+    k = count >> 2U;
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
      ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
       /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLALD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
      ** No loop unrolling is used. */
-    k = count % 0x4u;
+    k = count % 0x4U;
 
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       sum = __SMLALD(*px++, *py++, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
@@ -620,23 +599,21 @@ void arm_correlate_q15(
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the MAC count */
+    /* Decrement MAC count */
     count--;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
-#else
-
-/* Run the below code for Cortex-M0 */
+#else /* #if defined (ARM_MATH_DSP) */
 
-  q15_t *pIn1 = pSrcA;                           /* inputA pointer               */
-  q15_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
-  q63_t sum;                                     /* Accumulators                  */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB + (srcBLen - 1U);          /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -644,20 +621,20 @@ void arm_correlate_q15(
   /* But CORR(x, y) is reverse of CORR(y, x) */
   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
   /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two   
-   * inputs of same length. But to improve the performance, we include zeroes   
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we include zeroes
    * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the   
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
    * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the  
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
    * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted  
+  /* Once the zero padding is done the remaining of the output is calcualted
    * using convolution but with the shorter signal time shifted. */
 
   /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
+  tot = ((srcALen + srcBLen) - 2U);
 
-  if(srcALen > srcBLen)
+  if (srcALen > srcBLen)
   {
     /* Calculating the number of zeros to be padded to the output */
     j = srcALen - srcBLen;
@@ -666,13 +643,13 @@ void arm_correlate_q15(
     pDst += j;
   }
 
-  else if(srcALen < srcBLen)
+  else if (srcALen < srcBLen)
   {
     /* Initialization to inputB pointer */
     pIn1 = pSrcB;
 
     /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
+    pIn2 = pSrcA + (srcALen - 1U);
 
     /* Initialisation of the pointer after zero padding */
     pDst = pDst + tot;
@@ -684,36 +661,36 @@ void arm_correlate_q15(
 
     /* Setting the reverse flag */
     inv = 1;
-
   }
 
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
+  /* Loop to calculate convolution for output length number of values */
+  for (i = 0U; i <= tot; i++)
   {
     /* Initialize sum with zero to carry on MAC operations */
     sum = 0;
 
     /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
+    for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
+      if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
         sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
       }
     }
+
     /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q15_t) __SSAT((sum >> 15u), 16u);
+    if (inv == 1)
+      *pDst-- = (q15_t) __SSAT((sum >> 15U), 16U);
     else
-      *pDst++ = (q15_t) __SSAT((sum >> 15u), 16u);
+      *pDst++ = (q15_t) __SSAT((sum >> 15U), 16U);
   }
 
-#endif /*#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE) */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
-/**   
- * @} end of Corr group   
+/**
+  @} end of Corr group
  */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
new file mode 100644
index 00000000..60c1b703
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
@@ -0,0 +1,682 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_q31.c
+ * Description:  Correlation of Q31 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_fast_q31() for a faster but less precise implementation of this function.
+ */
+
+void arm_correlate_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1;                                  /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables for holding input and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* x[1] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* x[2] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* x[3] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q31_t) (sum >> 31);
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unroll by 3 */
+    blkCnt = blockSize2 / 3;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+
+      /* read x[0], x[1] samples */
+      x0 = *px++;
+      x1 = *px++;
+
+      /* Apply loop unrolling and compute 3 MACs simultaneously. */
+      k = srcBLen / 3;
+
+      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
+      do
+      {
+        /* Read y[0] sample */
+        c0 = *(py);
+        /* Read x[2] sample */
+        x2 = *(px);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[0] */
+        acc0 += ((q63_t) x0 * c0);
+        /* acc1 +=  x[1] * y[0] */
+        acc1 += ((q63_t) x1 * c0);
+        /* acc2 +=  x[2] * y[0] */
+        acc2 += ((q63_t) x2 * c0);
+
+        /* Read y[1] sample */
+        c0 = *(py + 1U);
+        /* Read x[3] sample */
+        x0 = *(px + 1U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[1] */
+        acc0 += ((q63_t) x1 * c0);
+        /* acc1 +=  x[2] * y[1] */
+        acc1 += ((q63_t) x2 * c0);
+        /* acc2 +=  x[3] * y[1] */
+        acc2 += ((q63_t) x0 * c0);
+
+        /* Read y[2] sample */
+        c0 = *(py + 2U);
+        /* Read x[4] sample */
+        x1 = *(px + 2U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[2] */
+        acc0 += ((q63_t) x2 * c0);
+        /* acc1 +=  x[3] * y[2] */
+        acc1 += ((q63_t) x0 * c0);
+        /* acc2 +=  x[4] * y[2] */
+        acc2 += ((q63_t) x1 * c0);
+
+        /* update scratch pointers */
+        px += 3U;
+        py += 3U;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen - (3 * (srcBLen / 3));
+
+      while (k > 0U)
+      {
+        /* Read y[4] sample */
+        c0 = *(py++);
+
+        /* Read x[7] sample */
+        x2 = *(px++);
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[4] */
+        acc0 += ((q63_t) x0 * c0);
+        /* acc1 +=  x[5] * y[4] */
+        acc1 += ((q63_t) x1 * c0);
+        /* acc2 +=  x[6] * y[4] */
+        acc2 += ((q63_t) x2 * c0);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q31_t) (acc0 >> 31);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = (q31_t) (acc1 >> 31);
+      pOut += inc;
+
+      *pOut = (q31_t) (acc2 >> 31);
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 3 */
+      count += 3U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q31_t) (sum >> 31);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q31_t) (sum >> 31);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (q63_t) *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q31_t) (sum >> 31);
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB + (srcBLen - 1U);          /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and a varaible, inv is set to 1 */
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we include zeroes
+   * in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * starting of the output buffer */
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * ending of the output buffer */
+  /* Once the zero padding is done the remaining of the output is calcualted
+   * using correlation but with the shorter signal time shifted. */
+
+  /* Calculate the length of the remaining sequence */
+  tot = ((srcALen + srcBLen) - 2U);
+
+  if (srcALen > srcBLen)
+  {
+    /* Calculating the number of zeros to be padded to the output */
+    j = srcALen - srcBLen;
+
+    /* Initialise the pointer after zero padding */
+    pDst += j;
+  }
+
+  else if (srcALen < srcBLen)
+  {
+    /* Initialization to inputB pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization to the end of inputA pointer */
+    pIn2 = pSrcA + (srcALen - 1U);
+
+    /* Initialisation of the pointer after zero padding */
+    pDst = pDst + tot;
+
+    /* Swapping the lengths */
+    j = srcALen;
+    srcALen = srcBLen;
+    srcBLen = j;
+
+    /* Setting the reverse flag */
+    inv = 1;
+  }
+
+  /* Loop to calculate correlation for output length number of times */
+  for (i = 0U; i <= tot; i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to correlation equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    if (inv == 1)
+      *pDst-- = (q31_t) (sum >> 31U);
+    else
+      *pDst++ = (q31_t) (sum >> 31U);
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
similarity index 52%
rename from Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c
rename to Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
index 3ca89e52..0fa49ec4 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
@@ -1,104 +1,91 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_q7.c   
-*   
-* Description:	Correlation of Q7 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_q7.c
+ * Description:  Correlation of Q7 sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**   
- * @ingroup groupFilters   
+/**
+  @ingroup groupFilters
  */
 
-/**   
- * @addtogroup Corr   
- * @{   
+/**
+  @addtogroup Corr
+  @{
  */
 
-/**   
- * @brief Correlation of Q7 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 32-bit internal accumulator.   
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.   
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.   
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.   
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.   
- *
- * \par    
- * Refer the function arm_correlate_opt_q7() for a faster implementation of this function.
- * 
+/**
+  @brief         Correlation of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
+
+ @remark
+                   Refer to \ref arm_correlate_opt_q7() for a faster implementation of this function.
  */
 
 void arm_correlate_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst)
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst)
 {
 
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer               */
-  q7_t *pIn2;                                    /* inputB pointer               */
-  q7_t *pOut = pDst;                             /* output pointer               */
-  q7_t *px;                                      /* Intermediate inputA pointer  */
-  q7_t *py;                                      /* Intermediate inputB pointer  */
-  q7_t *pSrc1;                                   /* Intermediate pointers        */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q31_t input1, input2;                          /* temporary variables */
-  q15_t in1, in2;                                /* temporary variables */
-  q7_t x0, x1, x2, x3, c0, c1;                   /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;
-
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1;                                   /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables for holding input and coefficient values */
+#endif
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -107,40 +94,39 @@ void arm_correlate_q7(
   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
   /* and the destination pointer modifier, inc is set to -1 */
   /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
+  /* But to improve the performance,
    * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
+  /* If srcALen > srcBLen,
    * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
+  /* If srcALen < srcBLen,
    * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
+  if (srcALen >= srcBLen)
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
+    pIn1 = pSrcA;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
+    pIn2 = pSrcB;
 
     /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
+    outBlockSize = (2U * srcALen) - 1U;
 
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
      * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
 
     /* Updating the pointer position to non zero value */
     pOut += j;
-
   }
   else
   {
     /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
+    pIn1 = pSrcB;
 
     /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
+    pIn2 = pSrcA;
 
     /* srcBLen is always considered as shorter or equal to srcALen */
     j = srcBLen;
@@ -149,72 +135,72 @@ void arm_correlate_q7(
 
     /* CORR(x, y) = Reverse order(CORR(y, x)) */
     /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
 
     /* Destination address modifier is set to -1 */
     inc = -1;
-
   }
 
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
   blockSize3 = blockSize1;
 
-  /* --------------------------   
-   * Initializations of stage1   
+  /* --------------------------
+   * Initializations of stage1
    * -------------------------*/
 
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
    */
 
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
+  /* In this stage the MAC operations are increased by 1 for every iteration.
      The count variable holds the number of MAC operations performed */
-  count = 1u;
+  count = 1U;
 
   /* Working pointer of inputA */
   px = pIn1;
 
   /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
+  pSrc1 = pIn2 + (srcBLen - 1U);
   py = pSrc1;
 
-  /* ------------------------   
-   * Stage1 process   
+  /* ------------------------
+   * Stage1 process
    * ----------------------*/
 
   /* The first stage starts here */
-  while(blockSize1 > 0u)
+  while (blockSize1 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
     {
       /* x[0] , x[1] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
       /* y[srcBLen - 4] , y[srcBLen - 3] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
       /* x[0] * y[srcBLen - 4] */
@@ -222,40 +208,45 @@ void arm_correlate_q7(
       sum = __SMLAD(input1, input2, sum);
 
       /* x[2] , x[3] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
       input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
       /* y[srcBLen - 2] , y[srcBLen - 1] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
       input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
 
       /* x[2] * y[srcBLen - 2] */
       /* x[3] * y[srcBLen - 1] */
       sum = __SMLAD(input1, input2, sum);
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-    while(k > 0u)
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
+      /* Perform the multiply-accumulate */
       /* x[0] * y[srcBLen - 1] */
-      sum += (q31_t) ((q15_t) * px++ * *py++);
+      sum += (q31_t) ((q15_t) *px++ * *py++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
     /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+    *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
     /* Destination pointer is updated according to the address modifier, inc */
     pOut += inc;
 
@@ -263,21 +254,21 @@ void arm_correlate_q7(
     py = pSrc1 - count;
     px = pIn1;
 
-    /* Increment the MAC count */
+    /* Increment MAC count */
     count++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize1--;
   }
 
-  /* --------------------------   
-   * Initializations of stage2   
+  /* --------------------------
+   * Initializations of stage2
    * ------------------------*/
 
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
    */
 
   /* Working pointer of inputA */
@@ -287,21 +278,23 @@ void arm_correlate_q7(
   py = pIn2;
 
   /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
+  count = 0U;
 
-  /* -------------------   
-   * Stage2 process   
+  /* -------------------
+   * Stage2 process
    * ------------------*/
 
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
    * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
+  if (srcBLen >= 4U)
   {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Set all accumulators to zero */
       acc0 = 0;
@@ -315,9 +308,9 @@ void arm_correlate_q7(
       x2 = *px++;
 
       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+      k = srcBLen >> 2U;
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
        ** a second loop below computes MACs for the remaining 1 to 3 samples. */
       do
       {
@@ -333,13 +326,13 @@ void arm_correlate_q7(
         in1 = (q15_t) x0;
         in2 = (q15_t) x1;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* y[0] and y[1] are packed */
         in1 = (q15_t) c0;
         in2 = (q15_t) c1;
 
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc0 += x[0] * y[0] + x[1] * y[1]  */
         acc0 = __SMLAD(input1, input2, acc0);
@@ -348,7 +341,7 @@ void arm_correlate_q7(
         in1 = (q15_t) x1;
         in2 = (q15_t) x2;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc1 += x[1] * y[0] + x[2] * y[1] */
         acc1 = __SMLAD(input1, input2, acc1);
@@ -357,19 +350,19 @@ void arm_correlate_q7(
         in1 = (q15_t) x2;
         in2 = (q15_t) x3;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc2 += x[2] * y[0] + x[3] * y[1]  */
         acc2 = __SMLAD(input1, input2, acc2);
 
         /* Read x[4] sample */
-        x0 = *(px++);
+        x0 = *px++;
 
         /* x[3] and x[4] are packed */
         in1 = (q15_t) x3;
         in2 = (q15_t) x0;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc3 += x[3] * y[0] + x[4] * y[1]  */
         acc3 = __SMLAD(input1, input2, acc3);
@@ -386,13 +379,13 @@ void arm_correlate_q7(
         in1 = (q15_t) x2;
         in2 = (q15_t) x3;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* y[2] and y[3] are packed */
         in1 = (q15_t) c0;
         in2 = (q15_t) c1;
 
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc0 += x[2] * y[2] + x[3] * y[3]  */
         acc0 = __SMLAD(input1, input2, acc0);
@@ -401,7 +394,7 @@ void arm_correlate_q7(
         in1 = (q15_t) x3;
         in2 = (q15_t) x0;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc1 += x[3] * y[2] + x[4] * y[3]  */
         acc1 = __SMLAD(input1, input2, acc1);
@@ -410,7 +403,7 @@ void arm_correlate_q7(
         in1 = (q15_t) x0;
         in2 = (q15_t) x1;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc2 += x[4] * y[2] + x[5] * y[3]  */
         acc2 = __SMLAD(input1, input2, acc2);
@@ -422,22 +415,21 @@ void arm_correlate_q7(
         in1 = (q15_t) x1;
         in2 = (q15_t) x2;
 
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* acc3 += x[5] * y[2] + x[6] * y[3]  */
         acc3 = __SMLAD(input1, input2, acc3);
 
-      } while(--k);
+      } while (--k);
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
        ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      k = srcBLen % 0x4U;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Read y[4] sample */
         c0 = *py++;
-
         /* Read x[7] sample */
         x3 = *px++;
 
@@ -456,7 +448,7 @@ void arm_correlate_q7(
         x1 = x2;
         x2 = x3;
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
@@ -474,81 +466,94 @@ void arm_correlate_q7(
       *pOut = (q7_t) (__SSAT(acc3 >> 7, 8));
       pOut += inc;
 
-	  count += 4u;
+	  count += 4U;
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
       py = pIn2;
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
 
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+      while (k > 0U)
       {
+
         /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py++;
-        in2 = (q15_t) * py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        in1 = (q15_t) *py++;
+        in2 = (q15_t) *py++;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum = __SMLAD(input1, input2, sum);
 
         /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
         /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py++;
-        in2 = (q15_t) * py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+        in1 = (q15_t) *py++;
+        in2 = (q15_t) *py++;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
-        /* Perform the multiply-accumulates */
+        /* Perform the multiply-accumulate */
         sum = __SMLAD(input1, input2, sum);
 
-        /* Decrement the loop counter */
+        /* Decrement loop counter */
         k--;
       }
 
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
 
-      while(k > 0u)
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
       {
-        /* Perform the multiply-accumulates */
-        sum += ((q15_t) * px++ * *py++);
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py++);
 
         /* Decrement the loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+      *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
       /* Increment the pointer pIn1 index, count by 1 */
-	  count++;
+      count++;
 
       /* Update the inputA and inputB pointers for next MAC calculation */
       px = pIn1 + count;
@@ -560,29 +565,29 @@ void arm_correlate_q7(
   }
   else
   {
-    /* If the srcBLen is not a multiple of 4,   
+    /* If the srcBLen is not a multiple of 4,
      * the blockSize2 loop cannot be unrolled by 4 */
     blkCnt = blockSize2;
 
-    while(blkCnt > 0u)
+    while (blkCnt > 0U)
     {
       /* Accumulator is made zero for every iteration */
       sum = 0;
 
-      /* Loop over srcBLen */
+      /* srcBLen number of MACS should be performed */
       k = srcBLen;
 
-      while(k > 0u)
+      while (k > 0U)
       {
         /* Perform the multiply-accumulate */
-        sum += ((q15_t) * px++ * *py++);
+        sum += ((q15_t) *px++ * *py++);
 
         /* Decrement the loop counter */
         k--;
       }
 
       /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+      *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
       /* Destination pointer is updated according to the address modifier, inc */
       pOut += inc;
 
@@ -593,97 +598,103 @@ void arm_correlate_q7(
       px = pIn1 + count;
       py = pIn2;
 
-
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       blkCnt--;
     }
   }
 
-  /* --------------------------   
-   * Initializations of stage3   
+
+  /* --------------------------
+   * Initializations of stage3
    * -------------------------*/
 
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
    */
 
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
      The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
+  count = srcBLen - 1U;
 
   /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
   px = pSrc1;
 
   /* Working pointer of inputB */
   py = pIn2;
 
-  /* -------------------   
-   * Stage3 process   
+  /* -------------------
+   * Stage3 process
    * ------------------*/
 
-  while(blockSize3 > 0u)
+  while (blockSize3 > 0U)
   {
     /* Accumulator is made zero for every iteration */
     sum = 0;
 
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
+#if defined (ARM_MATH_LOOPUNROLL)
 
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
     {
       /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* y[0] , y[1] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* sum += x[srcALen - srcBLen + 1] * y[0] */
       /* sum += x[srcALen - srcBLen + 2] * y[1] */
       sum = __SMLAD(input1, input2, sum);
 
       /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* y[2] , y[3] */
-      in1 = (q15_t) * py++;
-      in2 = (q15_t) * py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
 
       /* sum += x[srcALen - srcBLen + 3] * y[2] */
       /* sum += x[srcALen - srcBLen + 4] * y[3] */
       sum = __SMLAD(input1, input2, sum);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
 
-    while(k > 0u)
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
     {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py++);
+      /* Perform the multiply-accumulate */
+      sum += ((q15_t) *px++ * *py++);
 
-      /* Decrement the loop counter */
+      /* Decrement loop counter */
       k--;
     }
 
     /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7, 8));
+    *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
     /* Destination pointer is updated according to the address modifier, inc */
     pOut += inc;
 
@@ -691,23 +702,22 @@ void arm_correlate_q7(
     px = ++pSrc1;
     py = pIn2;
 
-    /* Decrement the MAC count */
+    /* Decrement MAC count */
     count--;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     blockSize3--;
   }
 
 #else
+/* alternate version for CM0_FAMILY */
 
-/* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* inputA pointer */
-  q7_t *pIn2 = pSrcB + (srcBLen - 1u);           /* inputB pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB + (srcBLen - 1U);           /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
 
   /* The algorithm implementation is based on the lengths of the inputs. */
   /* srcB is always made to slide across srcA. */
@@ -715,20 +725,20 @@ void arm_correlate_q7(
   /* But CORR(x, y) is reverse of CORR(y, x) */
   /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
   /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two   
-   * inputs of same length. But to improve the performance, we include zeroes   
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we include zeroes
    * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the   
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
    * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the  
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
    * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted  
+  /* Once the zero padding is done the remaining of the output is calcualted
    * using convolution but with the shorter signal time shifted. */
 
   /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
+  tot = ((srcALen + srcBLen) - 2U);
 
-  if(srcALen > srcBLen)
+  if (srcALen > srcBLen)
   {
     /* Calculating the number of zeros to be padded to the output */
     j = srcALen - srcBLen;
@@ -737,13 +747,13 @@ void arm_correlate_q7(
     pDst += j;
   }
 
-  else if(srcALen < srcBLen)
+  else if (srcALen < srcBLen)
   {
     /* Initialization to inputB pointer */
     pIn1 = pSrcB;
 
     /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
+    pIn2 = pSrcA + (srcALen - 1U);
 
     /* Initialisation of the pointer after zero padding */
     pDst = pDst + tot;
@@ -755,36 +765,36 @@ void arm_correlate_q7(
 
     /* Setting the reverse flag */
     inv = 1;
-
   }
 
   /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
+  for (i = 0U; i <= tot; i++)
   {
-    /* Initialize sum with zero to carry on MAC operations */
+    /* Initialize sum with zero to carry out MAC operations */
     sum = 0;
 
     /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
+    for (j = 0U; j <= i; j++)
     {
       /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
+      if (((i - j) < srcBLen) && (j < srcALen))
       {
         /* z[i] += x[i-j] * y[j] */
         sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
       }
     }
+
     /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q7_t) __SSAT((sum >> 7u), 8u);
+    if (inv == 1)
+      *pDst-- = (q7_t) __SSAT((sum >> 7U), 8U);
     else
-      *pDst++ = (q7_t) __SSAT((sum >> 7u), 8u);
+      *pDst++ = (q7_t) __SSAT((sum >> 7U), 8U);
   }
 
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
 
 }
 
-/**   
- * @} end of Corr group   
+/**
+  @} end of Corr group
  */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
new file mode 100644
index 00000000..d91543c6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
@@ -0,0 +1,703 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_f32.c
+ * Description:  FIR decimation for floating-point sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator
+
+  These functions combine an FIR filter together with a decimator.
+  They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.
+  Conceptually, the functions are equivalent to the block diagram below:
+  \image html FIRDecimator.gif "Components included in the FIR Decimator functions"
+  When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized
+  cutoff frequency of 1/M in order to prevent aliasing distortion.
+  The user of the function is responsible for providing the filter coefficients.
+
+  The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.
+  Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the
+  samples output by the decimator are computed.
+  The functions operate on blocks of input and output data.
+  pSrc points to an array of blockSize input values and
+  pDst points to an array of blockSize/M output values.
+  In order to have an integer number of output samples blockSize
+  must always be a multiple of the decimation factor M.
+
+  The library provides separate functions for Q15, Q31 and floating-point data types.
+
+  @par           Algorithm:
+                   The FIR portion of the algorithm uses the standard form filter:
+  
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  

+                   where, b[n] are the filter coefficients.
+  @par
+                   The pCoeffs points to a coefficient array of size numTaps.
+                   Coefficients are stored in time reversed order.
+  @par
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to a state array of size numTaps + blockSize - 1.
+                   Samples in the state buffer are stored in the order:
+  @par
+  
+      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  

+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par            Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   - Checks to make sure that the size of the input is a multiple of the decimation factor.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  
+      arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
+      arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
+      arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
+  

+                   where M is the decimation factor; numTaps is the number of filter coefficients in the filter;
+                   pCoeffs is the address of the coefficient buffer;
+                   pState is the address of the state buffer.
+                   Be sure to set the values in the state buffer to zeros when doing static initialization.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR decimate filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point FIR decimator.
+  @param[in]     S         points to an instance of the floating-point FIR decimator structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_NEON)
+void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
+  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+  float32_t *px;                                 /* Temporary pointer for state buffer */
+  const float32_t *pb;                           /* Temporary pointer for coefficient buffer */
+  float32_t sum0;                                /* Accumulator */
+  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
+  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+  uint32_t blkCntN4;
+  float32_t *px0, *px1, *px2, *px3;
+  float32_t acc0, acc1, acc2, acc3;
+  float32_t x1, x2, x3;
+
+  float32x4_t accv,acc0v,acc1v,acc2v,acc3v;
+  float32x4_t x0v, x1v, x2v, x3v;
+  float32x4_t c0v;
+  float32x2_t temp;
+  float32x4_t sum0v;
+ 
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 4;
+  blkCntN4 = outBlockSize - (4 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = 4 * S->M;
+
+    do
+    {
+      *pStateCurnt++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
+    acc0v = vdupq_n_f32(0.0);
+    acc1v = vdupq_n_f32(0.0);
+    acc2v = vdupq_n_f32(0.0);
+    acc3v = vdupq_n_f32(0.0);
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Loop over the number of taps. 
+     ** Repeat until we've computed numTaps-4 coefficients. */
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0v = vld1q_f32(pb);
+      pb += 4;
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0v = vld1q_f32(px0);
+      x1v = vld1q_f32(px1);
+      x2v = vld1q_f32(px2);
+      x3v = vld1q_f32(px3);
+
+      px0 += 4;
+      px1 += 4;
+      px2 += 4;
+      px3 += 4;
+     
+      acc0v = vmlaq_f32(acc0v, x0v, c0v);
+      acc1v = vmlaq_f32(acc1v, x1v, c0v);
+      acc2v = vmlaq_f32(acc2v, x2v, c0v);
+      acc3v = vmlaq_f32(acc3v, x3v, c0v);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    temp = vpadd_f32(vget_low_f32(acc0v),vget_high_f32(acc0v));
+    accv[0] = temp[0] + temp[1];
+
+    temp = vpadd_f32(vget_low_f32(acc1v),vget_high_f32(acc1v));
+    accv[1] = temp[0] + temp[1];
+
+    temp = vpadd_f32(vget_low_f32(acc2v),vget_high_f32(acc2v));
+    accv[2] = temp[0] + temp[1];
+
+    temp = vpadd_f32(vget_low_f32(acc3v),vget_high_f32(acc3v));
+    accv[3] = temp[0] + temp[1];
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch  state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      accv[0] += x0 * c0;
+      accv[1] += x1 * c0;
+      accv[2] += x2 * c0;
+      accv[3] += x3 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + 4 * S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    vst1q_f32(pDst,accv);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN4 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCurnt++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0v =  vdupq_n_f32(0.0);
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Loop over the number of taps.
+     ** Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
+    {
+      c0v = vld1q_f32(pb);
+      pb += 4;
+
+      x0v = vld1q_f32(px);
+      px += 4;
+
+      sum0v = vmlaq_f32(sum0v, x0v, c0v);
+      
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    temp = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v));
+    sum0 = temp[0] + temp[1];
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = sum0;
+
+    /* Decrement the loop counter */
+    blkCntN4--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+  i = (numTaps - 1U) >> 2;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    sum0v = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,sum0v);
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    i--;
+  }
+}
+#else
+void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                          /* Points to the current sample of the state */
+        float32_t *px0;                                /* Temporary pointer for state buffer */
+  const float32_t *pb;                                 /* Temporary pointer for coefficient buffer */
+        float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
+        float32_t acc0;                                /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t *px1, *px2, *px3;
+        float32_t x1, x2, x3;
+        float32_t acc1, acc2, acc3;
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
+
+  /* Samples loop unrolled by 4 */
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
+    acc0 = 0.0f;
+    acc1 = 0.0f;
+    acc2 = 0.0f;
+    acc3 = 0.0f;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0 = *(px0++);
+      /* Read x[n-numTaps-1] sample for acc1 */
+      x1 = *(px1++);
+      /* Read x[n-numTaps-1] sample for acc2 */
+      x2 = *(px2++);
+      /* Read x[n-numTaps-1] sample for acc3 */
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 4;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = acc0;
+    *pDst++ = acc1;
+    *pDst++ = acc2;
+    *pDst++ = acc3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = outBlockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0.0f;
+
+    /* Initialize state pointer */
+    px0 = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = acc0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
new file mode 100644
index 00000000..c782392e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
@@ -0,0 +1,595 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_fast_q15.c
+ * Description:  Fast Q15 FIR Decimator
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR decimator (fast variant).
+  @param[in]     S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).
+                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+  @remark
+                   Refer to \ref arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+                   Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_decimate_init_q15() to initialize the filter structure.
+ */
+
+#if defined (ARM_MATH_DSP)
+
+void arm_fir_decimate_fast_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q31_t sum0;                                    /* Accumulators */
+        q31_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t c1;                                      /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 2;
+  blkCntN3 = outBlockSize - (2 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+    acc1 = 0;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc1 = __SMLAD(x1, c0, acc1);
+
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc1 = __SMLAD(x1, c0, acc1);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch state variables for acc0, acc1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc1 = __SMLAD(x1, c0, acc1);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 2;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN3 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
+      x0 = read_q15x2_ia (&px);
+
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
+      c1 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLAD(x0, c0, sum0);
+
+      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
+      x0 = read_q15x2_ia (&px);
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLAD(x0, c1, sum0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLAD(x0, c0, sum0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCntN3--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  i = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+}
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+void arm_fir_decimate_fast_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q31_t sum0;                                    /* Accumulators */
+        q31_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 2;
+  blkCntN3 = outBlockSize - (2 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+    acc1 = 0;
+
+    /* Initialize state pointer */
+    px0 = pState;
+    px1 = pState + S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the Read b[numTaps-1] coefficients */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-3] coefficients */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 2;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN3 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCntN3--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  i = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+}
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
new file mode 100644
index 00000000..f9a686d2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
@@ -0,0 +1,390 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_fast_q31.c
+ * Description:  Fast Q31 FIR Decimator
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR decimator (fast variant).
+  @param[in]     S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
+
+  @remark
+                   Refer to \ref arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
+                   Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_decimate_init_q31() to initialize the filter structure.
+ */
+
+void arm_fir_decimate_fast_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *px0;                                    /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t *px1, *px2, *px3;
+        q31_t x1, x2, x3;
+        q63_t acc1, acc2, acc3;
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
+
+  /* Samples loop unrolled by 4 */
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0 = *(px0++);
+      /* Read x[n-numTaps-1] sample for acc1 */
+      x1 = *(px1++);
+      /* Read x[n-numTaps-1] sample for acc2 */
+      x2 = *(px2++);
+      /* Read x[n-numTaps-1] sample for acc3 */
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 4;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 << 1);
+    *pDst++ = (q31_t) (acc1 << 1);
+    *pDst++ = (q31_t) (acc2 << 1);
+    *pDst++ = (q31_t) (acc3 << 1);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = outBlockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px0 = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 << 1);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
new file mode 100644
index 00000000..851fba29
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
@@ -0,0 +1,105 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_init_f32.c
+ * Description:  Floating-point FIR Decimator initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR decimator.
+  @param[in,out] S          points to an instance of the floating-point FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to the array of state variables.
+                   pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32().
+                   M is the decimation factor.
+ */
+
+arm_status arm_fir_decimate_init_f32(
+        arm_fir_decimate_instance_f32 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The size of the input block must be a multiple of the decimation factor */
+  if ((blockSize % M) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign filter taps */
+    S->numTaps = numTaps;
+
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    /* Assign Decimation Factor */
+    S->M = M;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
new file mode 100644
index 00000000..1c9894f4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
@@ -0,0 +1,106 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_init_q15.c
+ * Description:  Initialization function for the Q15 FIR Decimator
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 FIR decimator.
+  @param[in,out] S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process
+  @return        execution  status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to the array of state variables.
+                   pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples
+                   to the call arm_fir_decimate_q15().
+                   M is the decimation factor.
+ */
+
+arm_status arm_fir_decimate_init_q15(
+        arm_fir_decimate_instance_q15 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The size of the input block must be a multiple of the decimation factor */
+  if ((blockSize % M) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign filter taps */
+    S->numTaps = numTaps;
+
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    /* Assign Decimation Factor */
+    S->M = M;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
new file mode 100644
index 00000000..6317ec85
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
@@ -0,0 +1,105 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_init_q31.c
+ * Description:  Initialization function for Q31 FIR Decimation filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 FIR decimator.
+  @param[in,out] S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process
+  @return        execution  status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : blockSize is not a multiple of M
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to the array of state variables.
+                   pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31().
+                   M is the decimation factor.
+ */
+
+arm_status arm_fir_decimate_init_q31(
+        arm_fir_decimate_instance_q31 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The size of the input block must be a multiple of the decimation factor */
+  if ((blockSize % M) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign filter taps */
+    S->numTaps = numTaps;
+
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    /* Assign Decimation Factor */
+    S->M = M;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
new file mode 100644
index 00000000..4179194d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
@@ -0,0 +1,595 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_q15.c
+ * Description:  Q15 FIR Decimator
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR decimator.
+  @param[in]     S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+
+ @remark
+                   Refer to \ref arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function.
+ */
+
+#if defined (ARM_MATH_DSP)
+
+void arm_fir_decimate_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q63_t sum0;                                    /* Accumulators */
+        q63_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t c1;                                      /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 2;
+  blkCntN3 = outBlockSize - (2 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+    acc1 = 0;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLALD(x0, c0, acc0);
+      acc1 = __SMLALD(x1, c0, acc1);
+
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLALD(x0, c0, acc0);
+      acc1 = __SMLALD(x1, c0, acc1);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch state variables for acc0, acc1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLALD(x0, c0, acc0);
+      acc1 = __SMLALD(x1, c0, acc1);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 2;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN3 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
+      x0 = read_q15x2_ia (&px);
+
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
+      c1 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLALD(x0, c0, sum0);
+
+      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
+      x0 = read_q15x2_ia (&px);
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLALD(x0, c1, sum0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLALD(x0, c0, sum0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCntN3--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  i = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+}
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+void arm_fir_decimate_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q63_t sum0;                                    /* Accumulators */
+        q63_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 2;
+  blkCntN3 = outBlockSize - (2 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+    acc1 = 0;
+
+    /* Initialize state pointer */
+    px0 = pState;
+    px1 = pState + S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the Read b[numTaps-1] coefficients */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-3] coefficients */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 2;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN3 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCntN3--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  i = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+}
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
new file mode 100644
index 00000000..41cea049
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
@@ -0,0 +1,387 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_q31.c
+ * Description:  Q31 FIR Decimator
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR decimator.
+  @param[in]     S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
+                   After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+
+ @remark
+                   Refer to \ref arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function.
+ */
+
+void arm_fir_decimate_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *px0;                                    /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t *px1, *px2, *px3;
+        q31_t x1, x2, x3;
+        q63_t acc1, acc2, acc3;
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
+
+  /* Samples loop unrolled by 4 */
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0 = *(px0++);
+      /* Read x[n-numTaps-1] sample for acc1 */
+      x1 = *(px1++);
+      /* Read x[n-numTaps-1] sample for acc2 */
+      x2 = *(px2++);
+      /* Read x[n-numTaps-1] sample for acc3 */
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 4;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31);
+    *pDst++ = (q31_t) (acc1 >> 31);
+    *pDst++ = (q31_t) (acc2 >> 31);
+    *pDst++ = (q31_t) (acc3 >> 31);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = outBlockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px0 = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
new file mode 100644
index 00000000..8e5c7773
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
@@ -0,0 +1,715 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_f32.c
+ * Description:  Floating-point FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup FIR Finite Impulse Response (FIR) Filters
+
+  This set of functions implements Finite Impulse Response (FIR) filters
+  for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.
+  The functions operate on blocks of input and output data and each call to the function processes
+  blockSize samples through the filter.  pSrc and
+  pDst points to input and output arrays containing blockSize values.
+
+  @par           Algorithm
+                   The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.
+                   Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n].
+  
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  

+  @par
+                   \image html FIR.GIF "Finite Impulse Response filter"
+  @par
+                   pCoeffs points to a coefficient array of size numTaps.
+                   Coefficients are stored in time reversed order.
+  @par
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to a state array of size numTaps + blockSize - 1.
+                   Samples in the state buffer are stored in the following order.
+  @par
+  
+      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  

+  @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1.
+                   The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 4 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 4 different data type filter instance structures
+  
+      arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};
+  

+                   where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;
+                   pCoeffs is the address of the coefficient buffer.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point FIR filter.
+  @param[in]     S          points to an instance of the floating-point FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
+
+void arm_fir_f32(
+const arm_fir_instance_f32 * S,
+const float32_t * pSrc,
+float32_t * pDst,
+uint32_t blockSize)
+{
+   float32_t *pState = S->pState;                 /* State pointer */
+   const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
+   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+   float32_t *px;                                 /* Temporary pointers for state buffer */
+   const float32_t *pb;                           /* Temporary pointers for coefficient buffer */
+   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+   float32x4_t accv0,accv1,samples0,samples1,x0,x1,x2,xa,xb,x,b,accv;
+   uint32x4_t x0_u,x1_u,x2_u,xa_u,xb_u;
+   float32_t acc;
+
+   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+   /* pStateCurnt points to the location where the new input data should be written */
+   pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+   /* Loop unrolling */
+   blkCnt = blockSize >> 3;
+
+   while (blkCnt > 0U)
+   {
+      /* Copy 8 samples at a time into state buffers */
+      samples0 = vld1q_f32(pSrc);
+      vst1q_f32(pStateCurnt,samples0);
+
+      pStateCurnt += 4;
+      pSrc += 4 ;
+
+      samples1 = vld1q_f32(pSrc);
+      vst1q_f32(pStateCurnt,samples1);
+
+      pStateCurnt += 4;
+      pSrc += 4 ;
+
+      /* Set the accumulators to zero */
+      accv0 = vdupq_n_f32(0);
+      accv1 = vdupq_n_f32(0);
+
+      /* Initialize state pointer */
+      px = pState;
+
+      /* Initialize coefficient pointer */
+      pb = pCoeffs;
+
+      /* Loop unroling */
+      i = numTaps >> 2;
+
+      /* Perform the multiply-accumulates */
+      x0 = vld1q_f32(px);
+      x1 = vld1q_f32(px + 4);
+
+      while(i > 0)
+      {
+         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+         x2 = vld1q_f32(px + 8);
+         b = vld1q_f32(pb);
+         xa = x0;
+         xb = x1;
+         accv0 = vmlaq_n_f32(accv0,xa,b[0]);
+         accv1 = vmlaq_n_f32(accv1,xb,b[0]);
+
+         xa = vextq_f32(x0,x1,1);
+         xb = vextq_f32(x1,x2,1);
+         
+	 accv0 = vmlaq_n_f32(accv0,xa,b[1]);
+         accv1 = vmlaq_n_f32(accv1,xb,b[1]);
+
+	 xa = vextq_f32(x0,x1,2);
+         xb = vextq_f32(x1,x2,2);
+
+         accv0 = vmlaq_n_f32(accv0,xa,b[2]);
+         accv1 = vmlaq_n_f32(accv1,xb,b[2]);
+
+	 xa = vextq_f32(x0,x1,3);
+	 xb = vextq_f32(x1,x2,3);
+         
+ 	 accv0 = vmlaq_n_f32(accv0,xa,b[3]);
+         accv1 = vmlaq_n_f32(accv1,xb,b[3]);
+
+         pb += 4;
+         x0 = x1;
+         x1 = x2;
+         px += 4;
+         i--;
+
+      }
+
+      /* Tail */
+      i = numTaps & 3;
+      x2 = vld1q_f32(px + 8);
+
+      /* Perform the multiply-accumulates */
+      switch(i)
+      {
+         case 3:
+         {
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+           pb++;
+
+	   xa = vextq_f32(x0,x1,1);
+	   xb = vextq_f32(x1,x2,1);
+
+           accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+           pb++;
+
+           xa = vextq_f32(x0,x1,2);
+           xb = vextq_f32(x1,x2,2);
+           
+	   accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+         }
+         break;
+         case 2:
+         {
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+           pb++;
+
+           xa = vextq_f32(x0,x1,1);
+           xb = vextq_f32(x1,x2,1);
+           
+	   accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+         }
+         break;
+         case 1:
+         {
+           
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+         }
+         break;
+         default:
+         break;
+      }
+
+      /* The result is stored in the destination buffer. */
+      vst1q_f32(pDst,accv0);
+      pDst += 4;
+      vst1q_f32(pDst,accv1);
+      pDst += 4;
+
+      /* Advance state pointer by 8 for the next 8 samples */
+      pState = pState + 8;
+
+      blkCnt--;
+   }
+
+   /* Tail */
+   blkCnt = blockSize & 0x7;
+
+   while (blkCnt > 0U)
+   {
+      /* Copy one sample at a time into state buffer */
+      *pStateCurnt++ = *pSrc++;
+
+      /* Set the accumulator to zero */
+      acc = 0.0f;
+
+      /* Initialize state pointer */
+      px = pState;
+
+      /* Initialize Coefficient pointer */
+      pb = pCoeffs;
+
+      i = numTaps;
+
+      /* Perform the multiply-accumulates */
+      do
+      {
+         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+         acc += *px++ * *pb++;
+         i--;
+
+      } while (i > 0U);
+
+      /* The result is stored in the destination buffer. */
+      *pDst++ = acc;
+
+      /* Advance state pointer by 1 for the next sample */
+      pState = pState + 1;
+
+      blkCnt--;
+   }
+
+   /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+   /* Points to the start of the state buffer */
+   pStateCurnt = S->pState;
+
+   /* Copy numTaps number of values */
+   tapCnt = numTaps - 1U;
+
+   /* Copy data */
+   while (tapCnt > 0U)
+   {
+      *pStateCurnt++ = *pState++;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+   }
+
+}
+#else
+void arm_fir_f32(
+  const arm_fir_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px;                                 /* Temporary pointer for state buffer */
+  const float32_t *pb;                                 /* Temporary pointer for coefficient buffer */
+        float32_t acc0;                                /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
+        float32_t x0, x1, x2, x3, x4, x5, x6, x7;               /* Temporary variables to hold state values */
+        float32_t c0;                                           /* Temporary variable to hold coefficient value */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 8 output values simultaneously.
+   * The variables acc0 ... acc7 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+
+  blkCnt = blockSize >> 3U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0.0f;
+    acc1 = 0.0f;
+    acc2 = 0.0f;
+    acc3 = 0.0f;
+    acc4 = 0.0f;
+    acc5 = 0.0f;
+    acc6 = 0.0f;
+    acc7 = 0.0f;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* This is separated from the others to avoid
+     * a call to __aeabi_memmove which would be slower
+     */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Read the first 7 samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
+    x3 = *px++;
+    x4 = *px++;
+    x5 = *px++;
+    x6 = *px++;
+
+    /* Loop unrolling: process 8 taps at a time. */
+    tapCnt = numTaps >> 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample */
+      x7 = *(px++);
+
+      /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
+      acc0 += x0 * c0;
+
+      /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
+      acc1 += x1 * c0;
+
+      /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
+      acc2 += x2 * c0;
+
+      /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
+      acc3 += x3 * c0;
+
+      /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
+      acc4 += x4 * c0;
+
+      /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
+      acc5 += x5 * c0;
+
+      /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
+      acc6 += x6 * c0;
+
+      /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
+      acc7 += x7 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x1 * c0;
+      acc1 += x2 * c0;
+      acc2 += x3 * c0;
+      acc3 += x4 * c0;
+      acc4 += x5 * c0;
+      acc5 += x6 * c0;
+      acc6 += x7 * c0;
+      acc7 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-5] sample */
+      x1 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x2 * c0;
+      acc1 += x3 * c0;
+      acc2 += x4 * c0;
+      acc3 += x5 * c0;
+      acc4 += x6 * c0;
+      acc5 += x7 * c0;
+      acc6 += x0 * c0;
+      acc7 += x1 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x2 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x3 * c0;
+      acc1 += x4 * c0;
+      acc2 += x5 * c0;
+      acc3 += x6 * c0;
+      acc4 += x7 * c0;
+      acc5 += x0 * c0;
+      acc6 += x1 * c0;
+      acc7 += x2 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x3 = *(px++);
+      /* Perform the multiply-accumulates */
+      acc0 += x4 * c0;
+      acc1 += x5 * c0;
+      acc2 += x6 * c0;
+      acc3 += x7 * c0;
+      acc4 += x0 * c0;
+      acc5 += x1 * c0;
+      acc6 += x2 * c0;
+      acc7 += x3 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x4 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x5 * c0;
+      acc1 += x6 * c0;
+      acc2 += x7 * c0;
+      acc3 += x0 * c0;
+      acc4 += x1 * c0;
+      acc5 += x2 * c0;
+      acc6 += x3 * c0;
+      acc7 += x4 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x5 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x6 * c0;
+      acc1 += x7 * c0;
+      acc2 += x0 * c0;
+      acc3 += x1 * c0;
+      acc4 += x2 * c0;
+      acc5 += x3 * c0;
+      acc6 += x4 * c0;
+      acc7 += x5 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x6 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x7 * c0;
+      acc1 += x0 * c0;
+      acc2 += x1 * c0;
+      acc3 += x2 * c0;
+      acc4 += x3 * c0;
+      acc5 += x4 * c0;
+      acc6 += x5 * c0;
+      acc7 += x6 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    tapCnt = numTaps % 0x8U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x7 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+      acc4 += x4 * c0;
+      acc5 += x5 * c0;
+      acc6 += x6 * c0;
+      acc7 += x7 * c0;
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+      x2 = x3;
+      x3 = x4;
+      x4 = x5;
+      x5 = x6;
+      x6 = x7;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by 8 to process the next group of 8 samples */
+    pState = pState + 8;
+
+    /* The results in the 8 accumulators, store in the destination buffer. */
+    *pDst++ = acc0;
+    *pDst++ = acc1;
+    *pDst++ = acc2;
+    *pDst++ = acc3;
+    *pDst++ = acc4;
+    *pDst++ = acc5;
+    *pDst++ = acc6;
+    *pDst++ = acc7;
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x8U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0.0f;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    do
+    {
+      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+      acc0 += *px++ * *pb++;
+
+      i--;
+    } while (i > 0U);
+
+    /* Store result in destination buffer. */
+    *pDst++ = acc0;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+* @} end of FIR group
+*/
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
new file mode 100644
index 00000000..c81c809e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
@@ -0,0 +1,332 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_fast_q15.c
+ * Description:  Q15 Fast FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR filter (fast version).
+  @param[in]     S          points to an instance of the Q15 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+
+  @remark
+                   Refer to \ref arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_init_q15() to initialize the filter structure.
+ */
+
+void arm_fir_fast_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
+    px = pState;
+
+    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
+    pb = pCoeffs;
+
+    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
+    x0 = read_q15x2_ia (&px);
+
+    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
+    x2 = read_q15x2_ia (&px);
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc0 = __SMLAD(x0, c0, acc0);
+
+      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
+      acc2 = __SMLAD(x2, c0, acc2);
+
+      /* pack  x[n-N-1] and x[n-N-2] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read state x[n-N-4], x[n-N-5] */
+      x0 = read_q15x2_ia (&px);
+
+      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack  x[n-N-3] and x[n-N-4] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
+      acc3 = __SMLADX(x1, c0, acc3);
+
+      /* Read coefficients b[N-2], b[N-3] */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
+      acc0 = __SMLAD(x2, c0, acc0);
+
+      /* Read state x[n-N-6], x[n-N-7] with offset */
+      x2 = read_q15x2_ia (&px);
+
+      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
+      acc2 = __SMLAD(x0, c0, acc2);
+
+      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack  x[n-N-5] and x[n-N-6] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
+      acc3 = __SMLADX(x1, c0, acc3);
+
+      /* Decrement tap count */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps.
+       This is always be 2 taps since the filter length is even. */
+    if ((numTaps & 0x3U) != 0U)
+    {
+      /* Read last two coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulates */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc2 = __SMLAD(x2, c0, acc2);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read last state variables */
+      x0 = read_q15x2 (px);
+
+      /* Perform the multiply-accumulates */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* Perform the multiply-accumulates */
+      acc3 = __SMLADX(x1, c0, acc3);
+    }
+
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+       Then store the 4 outputs in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy two samples into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Use SIMD to hold states and coefficients */
+    px = pState;
+    pb = pCoeffs;
+
+    tapCnt = numTaps >> 1U;
+
+    do
+    {
+      acc0 += (q31_t) *px++ * *pb++;
+	  acc0 += (q31_t) *px++ * *pb++;
+
+      tapCnt--;
+    }
+    while (tapCnt > 0U);
+
+    /* The result is in 2.30 format. Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
new file mode 100644
index 00000000..009e4e99
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
@@ -0,0 +1,324 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_fast_q31.c
+ * Description:  Processing function for the Q31 Fast FIR filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR filter (fast version).
+  @param[in]     S          points to an instance of the Q31 structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+
+ @remark
+                   Refer to \ref arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.  Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_init_q31() to initialize the filter structure.
+ */
+
+IAR_ONLY_LOW_OPTIMIZATION_ENTER
+void arm_fir_fast_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px;                                     /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the first 3 samples from the state buffer:
+     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
+
+    /* Loop unrolling. Process 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps] coefficient */
+      c0 = *pb;
+
+      /* Read x[n-numTaps-3] sample */
+      x3 = *px;
+
+      /* acc0 +=  b[numTaps] * x[n-numTaps] */
+      multAcc_32x32_keep32_R(acc0, x0, c0);
+
+      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
+      multAcc_32x32_keep32_R(acc1, x1, c0);
+
+      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
+      multAcc_32x32_keep32_R(acc2, x2, c0);
+
+      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
+      multAcc_32x32_keep32_R(acc3, x3, c0);
+
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb + 1U);
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *(px + 1U);
+
+      /* Perform the multiply-accumulates */
+      multAcc_32x32_keep32_R(acc0, x1, c0);
+      multAcc_32x32_keep32_R(acc1, x2, c0);
+      multAcc_32x32_keep32_R(acc2, x3, c0);
+      multAcc_32x32_keep32_R(acc3, x0, c0);
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb + 2U);
+
+      /* Read x[n-numTaps-5] sample */
+      x1 = *(px + 2U);
+
+      /* Perform the multiply-accumulates */
+      multAcc_32x32_keep32_R(acc0, x2, c0);
+      multAcc_32x32_keep32_R(acc1, x3, c0);
+      multAcc_32x32_keep32_R(acc2, x0, c0);
+      multAcc_32x32_keep32_R(acc3, x1, c0);
+
+      /* Read the b[numTaps-3] coefficients */
+      c0 = *(pb + 3U);
+
+      /* Read x[n-numTaps-6] sample */
+      x2 = *(px + 3U);
+
+      /* Perform the multiply-accumulates */
+      multAcc_32x32_keep32_R(acc0, x3, c0);
+      multAcc_32x32_keep32_R(acc1, x0, c0);
+      multAcc_32x32_keep32_R(acc2, x1, c0);
+      multAcc_32x32_keep32_R(acc3, x2, c0);
+
+      /* update coefficient pointer */
+      pb += 4U;
+      px += 4U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x3 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      multAcc_32x32_keep32_R(acc0, x0, c0);
+      multAcc_32x32_keep32_R(acc1, x1, c0);
+      multAcc_32x32_keep32_R(acc2, x2, c0);
+      multAcc_32x32_keep32_R(acc3, x3, c0);
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+      x2 = x3;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31
+       Then store the 4 outputs in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 << 1);
+    *pDst++ = (q31_t) (acc1 << 1);
+    *pDst++ = (q31_t) (acc2 << 1);
+    *pDst++ = (q31_t) (acc3 << 1);
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    do
+    {
+      multAcc_32x32_keep32_R(acc0, (*px++), (*pb++));
+      i--;
+    } while (i > 0U);
+
+    /* The result is in 2.30 format. Convert to 1.31
+       Then store the output in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 << 1);
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+IAR_ONLY_LOW_OPTIMIZATION_EXIT
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
new file mode 100644
index 00000000..80024008
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
@@ -0,0 +1,81 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_f32.c
+ * Description:  Floating-point FIR filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR filter.
+  @param[in,out] S          points to an instance of the floating-point FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed per call
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to the array of state variables.
+                   pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().
+ */
+
+void arm_fir_init_f32(
+        arm_fir_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
new file mode 100644
index 00000000..66c69c0f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
@@ -0,0 +1,137 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_q15.c
+ * Description:  Q15 FIR filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 FIR filter.
+  @param[in,out] S          points to an instance of the Q15 FIR filter structure.
+  @param[in] 	 numTaps    number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+  @param[in]     pCoeffs    points to the filter coefficients buffer.
+  @param[in]     pState     points to the state buffer.
+  @param[in]     blockSize  number of samples processed per call.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : numTaps is not greater than or equal to 4 and even
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+                   Note that numTaps must be even and greater than or equal to 4.
+                   To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero.
+                   For example, to implement a filter with numTaps=3 and coefficients
+  
+      {0.3, -0.8, 0.3}
+  

+                   set numTaps=4 and use the coefficients:
+  
+      {0.3, -0.8, 0.3, 0}.
+  

+                   Similarly, to implement a two point filter
+  
+      {0.3, -0.3}
+  

+                   set numTaps=4 and use the coefficients:
+  
+      {0.3, -0.3, 0, 0}.
+  

+                   pState points to the array of state variables.
+                   pState is of length numTaps+blockSize, when running on Cortex-M4 and Cortex-M3  and is of length numTaps+blockSize-1, when running on Cortex-M0 where blockSize is the number of input samples processed by each call to arm_fir_q15().
+ */
+
+arm_status arm_fir_init_q15(
+        arm_fir_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+#if defined (ARM_MATH_DSP)
+
+  /* The Number of filter coefficients in the filter must be even and at least 4 */
+  if (numTaps & 0x1U)
+  {
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Assign filter taps */
+    S->numTaps = numTaps;
+
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Clear the state buffer.  The size is always (blockSize + numTaps ) */
+    memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+
+#else
+
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  status = ARM_MATH_SUCCESS;
+
+  return (status);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
new file mode 100644
index 00000000..00de3e10
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
@@ -0,0 +1,80 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_q31.c
+ * Description:  Q31 FIR filter initialization function.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 FIR filter.
+  @param[in,out] S          points to an instance of the Q31 FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+                   pState points to the array of state variables.
+                   pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().
+ */
+
+void arm_fir_init_q31(
+        arm_fir_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
new file mode 100644
index 00000000..1adb2e2a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
@@ -0,0 +1,81 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_q7.c
+ * Description:  Q7 FIR filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q7 FIR filter.
+  @param[in,out] S          points to an instance of the Q7 FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to the array of state variables.
+                   pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().
+ */
+
+void arm_fir_init_q7(
+        arm_fir_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q7_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
new file mode 100644
index 00000000..471f25fe
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
@@ -0,0 +1,914 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_f32.c
+ * Description:  Floating-point FIR interpolation sequences
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator
+
+  These functions combine an upsampler (zero stuffer) and an FIR filter.
+  They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.
+  Conceptually, the functions are equivalent to the block diagram below:
+  \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"
+  After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized
+  cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum.
+  The user of the function is responsible for providing the filter coefficients.
+
+  The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.
+  The upsampler inserts L-1 zeros between each sample.
+  Instead of multiplying by these zero values, the FIR filter is designed to skip them.
+  This leads to an efficient implementation without any wasted effort.
+  The functions operate on blocks of input and output data.
+  pSrc points to an array of blockSize input values and
+  pDst points to an array of blockSize*L output values.
+
+  The library provides separate functions for Q15, Q31, and floating-point data types.
+
+  @par           Algorithm
+                   The functions use a polyphase filter structure:
+  
+      y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
+      y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
+      ...
+      y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
+  

+                   This approach is more efficient than straightforward upsample-then-filter algorithms.
+                   With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter.
+  @par
+                   pCoeffs points to a coefficient array of size numTaps.
+                   numTaps must be a multiple of the interpolation factor L and this is checked by the
+                   initialization functions.
+                   Internally, the function divides the FIR filter's impulse response into shorter filters of length
+                   phaseLength=numTaps/L.
+                   Coefficients are stored in time reversed order.
+  
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to a state array of size blockSize + phaseLength - 1.
+                   Samples in the state buffer are stored in the order:
+  
+     {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
+  

+  @par
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   - Checks to make sure that the length of the filter is a multiple of the interpolation factor.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  
+      arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
+      arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
+      arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
+  

+  @par
+                   where L is the interpolation factor; phaseLength=numTaps/L is the
+                   length of each of the shorter FIR filters used internally,
+                   pCoeffs is the address of the coefficient buffer;
+                   pState is the address of the state buffer.
+                   Be sure to set the values in the state buffer to zeros when doing static initialization.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point FIR interpolator.
+  @param[in]     S          points to an instance of the floating-point FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
+void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
+  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+  float32_t *ptr1;                               /* Temporary pointers for state buffer */
+  const float32_t *ptr2;                         /* Temporary pointers for coefficient buffer */
+  float32_t sum0;                                /* Accumulators */
+  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
+  uint32_t i, blkCnt, j;                         /* Loop counters */
+  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
+  float32_t acc0, acc1, acc2, acc3;
+  float32_t x1, x2, x3;
+  uint32_t blkCntN4;
+  float32_t c1, c2, c3;
+
+  float32x4_t sum0v;
+  float32x4_t accV,accV0,accV1;
+  float32x4_t x0v,x1v,x2v,xa,xb;
+  uint32x4_t x0v_u,x1v_u,x2v_u,xa_u,xb_u;
+  float32x2_t tempV;
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = S->pState + (phaseLen - 1U);
+
+  /* Initialise  blkCnt */
+  blkCnt = blockSize >> 3;
+  blkCntN4 = blockSize & 7;
+
+  /* Loop unrolling */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input samples into the state buffer */
+    sum0v = vld1q_f32(pSrc);
+    vst1q_f32(pStateCurnt,sum0v);
+    pSrc += 4;
+    pStateCurnt += 4;
+
+    sum0v = vld1q_f32(pSrc);
+    vst1q_f32(pStateCurnt,sum0v);
+    pSrc += 4;
+    pStateCurnt += 4;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      accV0 = vdupq_n_f32(0.0);
+      accV1 = vdupq_n_f32(0.0);
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+     
+      x0v = vld1q_f32(ptr1);
+      x1v = vld1q_f32(ptr1 + 4);
+	
+      while (tapCnt > 0U)
+      {
+        /* Read the input samples */
+        x2v = vld1q_f32(ptr1 + 8);
+
+        /* Read the coefficients */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        accV0 = vmlaq_n_f32(accV0,x0v,c0);
+        accV1 = vmlaq_n_f32(accV1,x1v,c0);
+       
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c1 = *(ptr2 + S->L);
+	
+        xa = vextq_f32(x0v,x1v,1);
+        xb = vextq_f32(x1v,x2v,1);
+
+        accV0 = vmlaq_n_f32(accV0,xa,c1);
+        accV1 = vmlaq_n_f32(accV1,xb,c1);
+
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c2 = *(ptr2 + S->L * 2);
+	
+        xa = vextq_f32(x0v,x1v,2);
+        xb = vextq_f32(x1v,x2v,2);
+        
+	accV0 = vmlaq_n_f32(accV0,xa,c2);
+        accV1 = vmlaq_n_f32(accV1,xb,c2);
+
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c3 = *(ptr2 + S->L * 3);
+
+        xa = vextq_f32(x0v,x1v,3);
+        xb = vextq_f32(x1v,x2v,3);
+        
+	accV0 = vmlaq_n_f32(accV0,xa,c3);
+        accV1 = vmlaq_n_f32(accV1,xb,c3);
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+        ptr1 += 4;
+        x0v = x1v;
+        x1v = x2v;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      x2v = vld1q_f32(ptr1 + 8);
+
+      switch (tapCnt)
+      {
+        case 3:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,1);
+             xb = vextq_f32(x1v,x2v,1);
+
+             accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,2);
+             xb = vextq_f32(x1v,x2v,2);
+             
+	     accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+        break;
+
+        case 2:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,1);
+             xb = vextq_f32(x1v,x2v,1);
+             
+	     accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+        break;
+
+        case 1:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+        break;
+
+        default:
+        break;
+        
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst = accV0[0];
+      *(pDst + S->L) = accV0[1];
+      *(pDst + 2 * S->L) = accV0[2];
+      *(pDst + 3 * S->L) = accV0[3];
+
+      *(pDst + 4 * S->L) = accV1[0];
+      *(pDst + 5 * S->L) = accV1[1];
+      *(pDst + 6 * S->L) = accV1[2];
+      *(pDst + 7 * S->L) = accV1[3];
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 8;
+
+    pDst += S->L * 7;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+
+  while (blkCntN4 > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0v = vdupq_n_f32(0.0);
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the coefficient */
+        x1v[0] = *(ptr2);
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the input sample */
+        x0v = vld1q_f32(ptr1);
+        ptr1 += 4;
+
+        /* Read the coefficient */
+        x1v[1] = *(ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the coefficient */
+        x1v[2] = *(ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the coefficient */
+        x1v[3] = *(ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0v = vmlaq_f32(sum0v,x0v,x1v);
+       
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      tempV = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v));
+      sum0 = tempV[0] + tempV[1];
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *(ptr1++) * (*ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = sum0;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCntN4--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    sum0v = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,sum0v);
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+#else
+
+void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                          /* Points to the current sample of the state */
+        float32_t *ptr1;                               /* Temporary pointer for state buffer */
+  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
+        float32_t sum0;                                /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc0, acc1, acc2, acc3;
+        float32_t x0, x1, x2, x3;
+        float32_t c0, c1, c2, c3;
+#endif
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      acc0 = 0.0f;
+      acc1 = 0.0f;
+      acc2 = 0.0f;
+      acc3 = 0.0f;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x0 * c0;
+        acc1 += x1 * c0;
+        acc2 += x2 * c0;
+        acc3 += x3 * c0;
+
+        /* Read the coefficient */
+        c1 = *(ptr2 + S->L);
+
+        /* Read the input sample */
+        x0 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x1 * c1;
+        acc1 += x2 * c1;
+        acc2 += x3 * c1;
+        acc3 += x0 * c1;
+
+        /* Read the coefficient */
+        c2 = *(ptr2 + S->L * 2);
+
+        /* Read the input sample */
+        x1 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x2 * c2;
+        acc1 += x3 * c2;
+        acc2 += x0 * c2;
+        acc3 += x1 * c2;
+
+        /* Read the coefficient */
+        c3 = *(ptr2 + S->L * 3);
+
+        /* Read the input sample */
+        x2 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x3 * c3;
+        acc1 += x0 * c3;
+        acc2 += x1 * c3;
+        acc3 += x2 * c3;
+
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x0 * c0;
+        acc1 += x1 * c0;
+        acc2 += x2 * c0;
+        acc3 += x3 * c0;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* update states for next sample processing */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *(pDst           ) = acc0;
+      *(pDst +     S->L) = acc1;
+      *(pDst + 2 * S->L) = acc2;
+      *(pDst + 3 * S->L) = acc3;
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 4;
+
+    pDst += S->L * 3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0.0f;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0 += *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = sum0;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                        /* Points to the current sample of the state */
+        float32_t *ptr1;                               /* Temporary pointer for state buffer */
+  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
+        float32_t sum0;                                /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+  /* Total number of intput samples */
+  blkCnt = blockSize;
+
+  /* Loop over the blockSize. */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0.0f;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (i - 1U);
+
+      /* Loop over the polyPhase length */
+      tapCnt = phaseLen;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *ptr1++ * *ptr2;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = sum0;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  tapCnt = phaseLen - 1U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
new file mode 100644
index 00000000..3309463d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
@@ -0,0 +1,106 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_init_f32.c
+ * Description:  Floating-point FIR interpolator initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR interpolator.
+  @param[in,out] S         points to an instance of the floating-point FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a multiple of the interpolation factor L
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  

+  @par
+                   The length of the filter numTaps must be a multiple of the interpolation factor L.
+  @par
+                   pState points to the array of state variables.
+                   pState is of length (numTaps/L)+blockSize-1 words
+                   where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32().
+ */
+
+arm_status arm_fir_interpolate_init_f32(
+        arm_fir_interpolate_instance_f32 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The filter length must be a multiple of the interpolation factor */
+  if ((numTaps % L) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Assign Interpolation factor */
+    S->L = L;
+
+    /* Assign polyPhaseLength */
+    S->phaseLength = numTaps / L;
+
+    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
new file mode 100644
index 00000000..bae10c77
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
@@ -0,0 +1,106 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_init_q15.c
+ * Description:  Q15 FIR interpolator initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 FIR interpolator.
+  @param[in,out] S         points to an instance of the Q15 FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a multiple of the interpolation factor L
+
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  

+                   The length of the filter numTaps must be a multiple of the interpolation factor L.
+  @par
+                   pState points to the array of state variables.
+                   pState is of length (numTaps/L)+blockSize-1 words
+                   where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15().
+ */
+
+arm_status arm_fir_interpolate_init_q15(
+        arm_fir_interpolate_instance_q15 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The filter length must be a multiple of the interpolation factor */
+  if ((numTaps % L) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Assign Interpolation factor */
+    S->L = L;
+
+    /* Assign polyPhaseLength */
+    S->phaseLength = numTaps / L;
+
+    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
new file mode 100644
index 00000000..40c86008
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
@@ -0,0 +1,105 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_init_q31.c
+ * Description:  Q31 FIR interpolator initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 FIR interpolator.
+  @param[in,out] S         points to an instance of the Q31 FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length numTaps is not a multiple of the interpolation factor L
+ 
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  

+                   The length of the filter numTaps must be a multiple of the interpolation factor L.
+  @par
+                   pState points to the array of state variables.
+                   pState is of length (numTaps/L)+blockSize-1 words
+                   where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31().
+ */
+
+arm_status arm_fir_interpolate_init_q31(
+        arm_fir_interpolate_instance_q31 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The filter length must be a multiple of the interpolation factor */
+  if ((numTaps % L) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Assign Interpolation factor */
+    S->L = L;
+
+    /* Assign polyPhaseLength */
+    S->phaseLength = numTaps / L;
+
+    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
new file mode 100644
index 00000000..ad5194a5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
@@ -0,0 +1,479 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_q15.c
+ * Description:  Q15 FIR interpolation
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR interpolator.
+  @param[in]     S          points to an instance of the Q15 FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+
+void arm_fir_interpolate_q15(
+  const arm_fir_interpolate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2, acc3;
+        q15_t x0, x1, x2, x3;
+        q15_t c0, c1, c2, c3;
+#endif
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Read the coefficient */
+        c1 = *(ptr2 + S->L);
+
+        /* Read the input sample */
+        x0 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x1 * c1;
+        acc1 += (q63_t) x2 * c1;
+        acc2 += (q63_t) x3 * c1;
+        acc3 += (q63_t) x0 * c1;
+
+        /* Read the coefficient */
+        c2 = *(ptr2 + S->L * 2);
+
+        /* Read the input sample */
+        x1 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x2 * c2;
+        acc1 += (q63_t) x3 * c2;
+        acc2 += (q63_t) x0 * c2;
+        acc3 += (q63_t) x1 * c2;
+
+        /* Read the coefficient */
+        c3 = *(ptr2 + S->L * 3);
+
+        /* Read the input sample */
+        x2 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x3 * c3;
+        acc1 += (q63_t) x0 * c3;
+        acc2 += (q63_t) x1 * c3;
+        acc3 += (q63_t) x2 * c3;
+
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* update states for next sample processing */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *(pDst           ) = (q15_t) (__SSAT((acc0 >> 15), 16));
+      *(pDst +     S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
+      *(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16));
+      *(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16));
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 4;
+
+    pDst += S->L * 3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+  /* Total number of intput samples */
+  blkCnt = blockSize;
+
+  /* Loop over the blockSize. */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (i - 1U);
+
+      /* Loop over the polyPhase length */
+      tapCnt = phaseLen;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += ((q63_t) *ptr1++ * *ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* Store the result after converting to 1.15 format in the destination buffer. */
+      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  tapCnt = phaseLen - 1U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
new file mode 100644
index 00000000..ee79cdbf
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
@@ -0,0 +1,481 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_q31.c
+ * Description:  Q31 FIR interpolation
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR interpolator.
+  @param[in]     S          points to an instance of the Q31 FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L).
+                   since numTaps/L additions occur per output sample.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+ */
+
+void arm_fir_interpolate_q31(
+  const arm_fir_interpolate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2, acc3;
+        q31_t x0, x1, x2, x3;
+        q31_t c0, c1, c2, c3;
+#endif
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Read the coefficient */
+        c1 = *(ptr2 + S->L);
+
+        /* Read the input sample */
+        x0 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x1 * c1;
+        acc1 += (q63_t) x2 * c1;
+        acc2 += (q63_t) x3 * c1;
+        acc3 += (q63_t) x0 * c1;
+
+        /* Read the coefficient */
+        c2 = *(ptr2 + S->L * 2);
+
+        /* Read the input sample */
+        x1 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x2 * c2;
+        acc1 += (q63_t) x3 * c2;
+        acc2 += (q63_t) x0 * c2;
+        acc3 += (q63_t) x1 * c2;
+
+        /* Read the coefficient */
+        c3 = *(ptr2 + S->L * 3);
+
+        /* Read the input sample */
+        x2 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x3 * c3;
+        acc1 += (q63_t) x0 * c3;
+        acc2 += (q63_t) x1 * c3;
+        acc3 += (q63_t) x2 * c3;
+
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* update states for next sample processing */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *(pDst           ) = (q31_t) (acc0 >> 31);
+      *(pDst +     S->L) = (q31_t) (acc1 >> 31);
+      *(pDst + 2 * S->L) = (q31_t) (acc2 >> 31);
+      *(pDst + 3 * S->L) = (q31_t) (acc3 >> 31);
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 4;
+
+    pDst += S->L * 3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = (q31_t) (sum0 >> 31);
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+  /* Total number of intput samples */
+  blkCnt = blockSize;
+
+  /* Loop over the blockSize. */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (i - 1U);
+
+      /* Loop over the polyPhase length */
+      tapCnt = phaseLen;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += ((q63_t) *ptr1++ * *ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = (q31_t) (sum0 >> 31);
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  tapCnt = phaseLen - 1U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
new file mode 100644
index 00000000..8577fee3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
@@ -0,0 +1,453 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_f32.c
+ * Description:  Processing function for floating-point FIR Lattice filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters
+
+  This set of functions implements Finite Impulse Response (FIR) lattice filters
+  for Q15, Q31 and floating-point data types.  Lattice filters are used in a
+  variety of adaptive filter applications. The filter structure is feedforward and
+  the net impulse response is finite length.
+  The functions operate on blocks
+  of input and output data and each call to the function processes
+  blockSize samples through the filter.  pSrc and
+  pDst point to input and output arrays containing blockSize values.
+
+  @par           Algorithm
+                   \image html FIRLattice.gif "Finite Impulse Response Lattice filter"
+                   The following difference equation is implemented:
+  @par
+  
+      f0[n] = g0[n] = x[n]
+      fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
+      gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
+      y[n] = fM[n]
+  

+  @par
+                   pCoeffs points to tha array of reflection coefficients of size numStages.
+                   Reflection Coefficients are stored in the following order.
+  @par
+  
+      {k1, k2, ..., kM}
+  

+                   where M is number of stages
+  @par
+                   pState points to a state array of size numStages.
+                   The state variables (g values) hold previous inputs and are stored in the following order.
+  
+    {g0[n], g1[n], g2[n] ...gM-1[n]}
+  

+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
+  
+      arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
+      arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
+      arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
+  

+  @par
+                   where numStages is the number of stages in the filter;
+                   pState is the address of the state buffer;
+                   pCoeffs is the address of the coefficient buffer.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point FIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_fir_lattice_f32(
+  const arm_fir_lattice_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *px;                                 /* Temporary state pointer */
+  const float32_t *pk;                                 /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        float32_t fcurr0, fnext0, gnext0, gcurr0;      /* Temporary variables */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t fcurr1, fnext1, gnext1;              /* Temporary variables for second sample in loop unrolling */
+        float32_t fcurr2, fnext2, gnext2;              /* Temporary variables for third sample in loop unrolling */
+        float32_t fcurr3, fnext3, gnext3;              /* Temporary variables for fourth sample in loop unrolling */
+#endif
+
+  gcurr0 = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Read two samples from input buffer */
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+    fcurr1 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* Process first sample for first tap */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (fcurr0 * (*pk)) + gcurr0;
+
+    /* Process second sample for first tap */
+    fnext1 = (fcurr0 * (*pk)) + fcurr1;
+    gnext1 = (fcurr1 * (*pk)) + fcurr0;
+
+    /* Read next two samples from input buffer */
+    /* f0(n+2) = x(n+2) */
+    fcurr2 = *pSrc++;
+    fcurr3 = *pSrc++;
+
+    /* Process third sample for first tap */
+    fnext2 = (fcurr1 * (*pk)) + fcurr2;
+    gnext2 = (fcurr2 * (*pk)) + fcurr1;
+
+    /* Process fourth sample for first tap */
+    fnext3 = (fcurr2 * (*pk  )) + fcurr3;
+    gnext3 = (fcurr3 * (*pk++)) + fcurr2;
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = fcurr3;
+
+    /* Update of f values for next coefficient set processing */
+    fcurr0 = fnext0;
+    fcurr1 = fnext1;
+    fcurr2 = fnext2;
+    fcurr3 = fnext3;
+
+    /* Loop unrolling.  Process 4 taps at a time . */
+    stageCnt = (numStages - 1U) >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numStages-3 coefficients. */
+
+    /* Process 2nd, 3rd, 4th and 5th taps ... here */
+    while (stageCnt > 0U)
+    {
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Process first sample for 2nd, 6th .. tap */
+      /* Sample processing for K2, K6.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      /* Process second sample for 2nd, 6th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
+      /* Process third sample for 2nd, 6th .. tap */
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
+      /* Process fourth sample for 2nd, 6th .. tap */
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (fcurr3 * (*pk)) + gnext2;
+
+      gnext2 = (fcurr2 * (*pk)) + gnext1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g2(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K3, K7.... */
+      /* Process first sample for 3rd, 7th .. tap */
+      /* f3(n) = f2(n) +  K3 * g2(n-1) */
+      fcurr0 = (gcurr0 * (*pk)) + fnext0;
+
+      /* Process second sample for 3rd, 7th .. tap */
+      fcurr1 = (gnext0 * (*pk)) + fnext1;
+
+      /* Process third sample for 3rd, 7th .. tap */
+      fcurr2 = (gnext1 * (*pk)) + fnext2;
+
+      /* Process fourth sample for 3rd, 7th .. tap */
+      fcurr3 = (gnext2 * (*pk)) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g3(n) = f2(n) * K3  +  g2(n-1) */
+      gnext3 = (fnext3 * (*pk)) + gnext2;
+
+      gnext2 = (fnext2 * (*pk)) + gnext1;
+
+      gnext1 = (fnext1 * (*pk)) + gnext0;
+
+      gnext0 = (fnext0 * (*pk++)) + gcurr0;
+
+
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g3(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K4, K8.... */
+      /* Process first sample for 4th, 8th .. tap */
+      /* f4(n) = f3(n) +  K4 * g3(n-1) */
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      /* Process second sample for 4th, 8th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
+      /* Process third sample for 4th, 8th .. tap */
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
+      /* Process fourth sample for 4th, 8th .. tap */
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
+
+      /* g4(n) = f3(n) * K4  +  g3(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (fcurr3 * (*pk)) + gnext2;
+
+      gnext2 = (fcurr2 * (*pk)) + gnext1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g4(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K5, K9.... */
+      /* Process first sample for 5th, 9th .. tap */
+      /* f5(n) = f4(n) +  K5 * g4(n-1) */
+      fcurr0 = (gcurr0 * (*pk)) + fnext0;
+
+      /* Process second sample for 5th, 9th .. tap */
+      fcurr1 = (gnext0 * (*pk)) + fnext1;
+
+      /* Process third sample for 5th, 9th .. tap */
+      fcurr2 = (gnext1 * (*pk)) + fnext2;
+
+      /* Process fourth sample for 5th, 9th .. tap */
+      fcurr3 = (gnext2 * (*pk)) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g5(n) = f4(n) * K5  +  g4(n-1) */
+      gnext3 = (fnext3 * (*pk)) + gnext2;
+
+      gnext2 = (fnext2 * (*pk)) + gnext1;
+
+      gnext1 = (fnext1 * (*pk)) + gnext0;
+
+      gnext0 = (fnext0 * (*pk++)) + gcurr0;
+
+      stageCnt--;
+    }
+
+    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
+    stageCnt = (numStages - 1U) % 0x4U;
+
+    while (stageCnt > 0U)
+    {
+      gcurr0 = *px;
+
+      /* save g value in state buffer */
+      *px++ = gnext3;
+
+      /* Process four samples for last three taps here */
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      gnext3 = (fcurr3 * (*pk)) + gnext2;
+
+      gnext2 = (fcurr2 * (*pk)) + gnext1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+      /* Update of f values for next coefficient set processing */
+      fcurr0 = fnext0;
+      fcurr1 = fnext1;
+      fcurr2 = fnext2;
+      fcurr3 = fnext3;
+
+      stageCnt--;
+    }
+
+    /* The results in the 4 accumulators, store in the destination buffer. */
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+    *pDst++ = fcurr1;
+    *pDst++ = fcurr2;
+    *pDst++ = fcurr3;
+
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g2(n) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+    /* save g1(n) in state buffer */
+    *px++ = fcurr0;
+
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g2(n) from state buffer */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
new file mode 100644
index 00000000..c6aade1f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
@@ -0,0 +1,70 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_init_f32.c
+ * Description:  Floating-point FIR Lattice filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
+ */
+
+void arm_fir_lattice_init_f32(
+        arm_fir_lattice_instance_f32 * S,
+        uint16_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always numStages */
+  memset(pState, 0, (numStages) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
new file mode 100644
index 00000000..1cdfea36
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
@@ -0,0 +1,70 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_init_q15.c
+ * Description:  Q15 FIR Lattice filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
+ */
+
+void arm_fir_lattice_init_q15(
+        arm_fir_lattice_instance_q15 * S,
+        uint16_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always numStages */
+  memset(pState, 0, (numStages) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
new file mode 100644
index 00000000..0aef4ea4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
@@ -0,0 +1,70 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_init_q31.c
+ * Description:  Q31 FIR lattice filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
+ */
+
+void arm_fir_lattice_init_q31(
+        arm_fir_lattice_instance_q31 * S,
+        uint16_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always numStages */
+  memset(pState, 0, (numStages) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
new file mode 100644
index 00000000..59a000b8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
@@ -0,0 +1,506 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_q15.c
+ * Description:  Q15 FIR lattice filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_fir_lattice_q15(
+  const arm_fir_lattice_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *px;                                     /* Temporary state pointer */
+  const q15_t *pk;                                     /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        q31_t fcurr0, fnext0, gnext0, gcurr0;          /* Temporary variables */
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t fcurr1, fnext1, gnext1;                  /* Temporary variables for second sample in loop unrolling */
+  q31_t fcurr2, fnext2, gnext2;                  /* Temporary variables for third sample in loop unrolling */
+  q31_t fcurr3, fnext3, gnext3;                  /* Temporary variables for fourth sample in loop unrolling */
+#endif
+
+  gcurr0 = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Read two samples from input buffer */
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+    fcurr1 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* Process first sample for first tap */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext0, 16);
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
+
+    /* Process second sample for first tap */
+    fnext1 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + fcurr1;
+    fnext1 = __SSAT(fnext1, 16);
+    gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr0;
+    gnext1 = __SSAT(gnext1, 16);
+
+    /* Read next two samples from input buffer */
+    /* f0(n+2) = x(n+2) */
+    fcurr2 = *pSrc++;
+    fcurr3 = *pSrc++;
+
+    /* Process third sample for first tap */
+    fnext2 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr2;
+    fnext2 = __SSAT(fnext2, 16);
+    gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + fcurr1;
+    gnext2 = __SSAT(gnext2, 16);
+
+    /* Process fourth sample for first tap */
+    fnext3 = (q31_t) ((fcurr2 * (*pk  )) >> 15U) + fcurr3;
+    fnext3 = __SSAT(fnext3, 16);
+    gnext3 = (q31_t) ((fcurr3 * (*pk++)) >> 15U) + fcurr2;
+    gnext3 = __SSAT(gnext3, 16);
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = (q15_t) fcurr3;
+
+    /* Update of f values for next coefficient set processing */
+    fcurr0 = fnext0;
+    fcurr1 = fnext1;
+    fcurr2 = fnext2;
+    fcurr3 = fnext3;
+
+    /* Loop unrolling.  Process 4 taps at a time . */
+    stageCnt = (numStages - 1U) >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numStages-3 coefficients. */
+
+    /* Process 2nd, 3rd, 4th and 5th taps ... here */
+    while (stageCnt > 0U)
+    {
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Process first sample for 2nd, 6th .. tap */
+      /* Sample processing for K2, K6.... */
+      /* f1(n) = f0(n) +  K1 * g0(n-1) */
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      /* Process second sample for 2nd, 6th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+      fnext1 = __SSAT(fnext1, 16);
+
+      /* Process third sample for 2nd, 6th .. tap */
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+      fnext2 = __SSAT(fnext2, 16);
+
+      /* Process fourth sample for 2nd, 6th .. tap */
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+      fnext3 = __SSAT(fnext3, 16);
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Sample processing for K3, K7.... */
+      /* Process first sample for 3rd, 7th .. tap */
+      /* f3(n) = f2(n) +  K3 * g2(n-1) */
+      fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
+      fcurr0 = __SSAT(fcurr0, 16);
+
+      /* Process second sample for 3rd, 7th .. tap */
+      fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
+      fcurr1 = __SSAT(fcurr1, 16);
+
+      /* Process third sample for 3rd, 7th .. tap */
+      fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
+      fcurr2 = __SSAT(fcurr2, 16);
+
+      /* Process fourth sample for 3rd, 7th .. tap */
+      fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
+      fcurr3 = __SSAT(fcurr3, 16);
+
+      /* Calculation of state values for next stage */
+      /* g3(n) = f2(n) * K3  +  g2(n-1) */
+      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Sample processing for K4, K8.... */
+      /* Process first sample for 4th, 8th .. tap */
+      /* f4(n) = f3(n) +  K4 * g3(n-1) */
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      /* Process second sample for 4th, 8th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+      fnext1 = __SSAT(fnext1, 16);
+
+      /* Process third sample for 4th, 8th .. tap */
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+      fnext2 = __SSAT(fnext2, 16);
+
+      /* Process fourth sample for 4th, 8th .. tap */
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+      fnext3 = __SSAT(fnext3, 16);
+
+      /* g4(n) = f3(n) * K4  +  g3(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g4(n) in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Sample processing for K5, K9.... */
+      /* Process first sample for 5th, 9th .. tap */
+      /* f5(n) = f4(n) +  K5 * g4(n-1) */
+      fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
+      fcurr0 = __SSAT(fcurr0, 16);
+
+      /* Process second sample for 5th, 9th .. tap */
+      fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
+      fcurr1 = __SSAT(fcurr1, 16);
+
+      /* Process third sample for 5th, 9th .. tap */
+      fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
+      fcurr2 = __SSAT(fcurr2, 16);
+
+      /* Process fourth sample for 5th, 9th .. tap */
+      fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
+      fcurr3 = __SSAT(fcurr3, 16);
+
+      /* Calculation of state values for next stage */
+      /* g5(n) = f4(n) * K5  +  g4(n-1) */
+      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      stageCnt--;
+    }
+
+    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
+    stageCnt = (numStages - 1U) % 0x4U;
+
+    while (stageCnt > 0U)
+    {
+      gcurr0 = *px;
+
+      /* save g value in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Process four samples for last three taps here */
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+      fnext1 = __SSAT(fnext1, 16);
+
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+      fnext2 = __SSAT(fnext2, 16);
+
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+      fnext3 = __SSAT(fnext3, 16);
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* Update of f values for next coefficient set processing */
+      fcurr0 = fnext0;
+      fcurr1 = fnext1;
+      fcurr2 = fnext2;
+      fcurr3 = fnext3;
+
+      stageCnt--;
+    }
+
+    /* The results in the 4 accumulators, store in the destination buffer. */
+    /* y(n) = fN(n) */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(fcurr0, fcurr1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(fcurr2, fcurr3, 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(fcurr1, fcurr0, 16));
+    write_q15x2_ia (&pDst, __PKHBT(fcurr3, fcurr2, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g2(n) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext0, 16);
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
+
+    /* save g1(n) in state buffer */
+    *px++ = (q15_t) fcurr0;
+
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g2(n) from state buffer */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = (q15_t) gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = __SSAT(fcurr0, 16);
+
+    blkCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext, 16);
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
+
+    /* save f0(n) in state buffer */
+    *px++ = (q15_t) fcurr0;
+
+    /* f1(n) is saved in fcurr for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g1(n-1) from state buffer */
+      gcurr0 = *px;
+
+      /* save g0(n-1) in state buffer */
+      *px++ = (q15_t) gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = __SSAT(fcurr0, 16);
+
+    blkCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
new file mode 100644
index 00000000..9d292956
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
@@ -0,0 +1,505 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_q31.c
+ * Description:  Q31 FIR lattice filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
+ */
+
+void arm_fir_lattice_q31(
+  const arm_fir_lattice_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *px;                                     /* Temporary state pointer */
+  const q31_t *pk;                                     /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        q31_t fcurr0, fnext0, gnext0, gcurr0;          /* Temporary variables */
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t fcurr1, fnext1, gnext1;                  /* Temporary variables for second sample in loop unrolling */
+        q31_t fcurr2, fnext2, gnext2;                  /* Temporary variables for third sample in loop unrolling */
+        q31_t fcurr3, fnext3, gnext3;                  /* Temporary variables for fourth sample in loop unrolling */
+#endif
+
+  gcurr0 = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Read two samples from input buffer */
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+    fcurr1 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* Process first sample for first tap */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext0 << 1U) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
+
+    /* Process second sample for first tap */
+    fnext1 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
+    fnext1 = (fnext1 << 1U) + fcurr1;
+    gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+    gnext1 = (gnext1 << 1U) + fcurr0;
+
+    /* Read next two samples from input buffer */
+    /* f0(n+2) = x(n+2) */
+    fcurr2 = *pSrc++;
+    fcurr3 = *pSrc++;
+
+    /* Process third sample for first tap */
+    fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+    fnext2 = (fnext2 << 1U) + fcurr2;
+    gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+    gnext2 = (gnext2 << 1U) + fcurr1;
+
+    /* Process fourth sample for first tap */
+    fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk  )) >> 32U);
+    fnext3 = (fnext3 << 1U) + fcurr3;
+    gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk++)) >> 32U);
+    gnext3 = (gnext3 << 1U) + fcurr2;
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = fcurr3;
+
+    /* Update of f values for next coefficient set processing */
+    fcurr0 = fnext0;
+    fcurr1 = fnext1;
+    fcurr2 = fnext2;
+    fcurr3 = fnext3;
+
+    /* Loop unrolling.  Process 4 taps at a time . */
+    stageCnt = (numStages - 1U) >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numStages-3 coefficients. */
+
+    /* Process 2nd, 3rd, 4th and 5th taps ... here */
+    while (stageCnt > 0U)
+    {
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Process first sample for 2nd, 6th .. tap */
+      /* Sample processing for K2, K6.... */
+      /* f1(n) = f0(n) +  K1 * g0(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* Process second sample for 2nd, 6th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
+
+      /* Process third sample for 2nd, 6th .. tap */
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
+
+      /* Process fourth sample for 2nd, 6th .. tap */
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K3, K7.... */
+      /* Process first sample for 3rd, 7th .. tap */
+      /* f3(n) = f2(n) +  K3 * g2(n-1) */
+      fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fcurr0 = (fcurr0 << 1U) + fnext0;
+
+      /* Process second sample for 3rd, 7th .. tap */
+      fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fcurr1 = (fcurr1 << 1U) + fnext1;
+
+      /* Process third sample for 3rd, 7th .. tap */
+      fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fcurr2 = (fcurr2 << 1U) + fnext2;
+
+      /* Process fourth sample for 3rd, 7th .. tap */
+      fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fcurr3 = (fcurr3 << 1U) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g3(n) = f2(n) * K3  +  g2(n-1) */
+      gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K4, K8.... */
+      /* Process first sample for 4th, 8th .. tap */
+      /* f4(n) = f3(n) +  K4 * g3(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* Process second sample for 4th, 8th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
+
+      /* Process third sample for 4th, 8th .. tap */
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
+
+      /* Process fourth sample for 4th, 8th .. tap */
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
+
+      /* g4(n) = f3(n) * K4  +  g3(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g4(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K5, K9.... */
+      /* Process first sample for 5th, 9th .. tap */
+      /* f5(n) = f4(n) +  K5 * g4(n-1) */
+      fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fcurr0 = (fcurr0 << 1U) + fnext0;
+
+      /* Process second sample for 5th, 9th .. tap */
+      fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fcurr1 = (fcurr1 << 1U) + fnext1;
+
+      /* Process third sample for 5th, 9th .. tap */
+      fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fcurr2 = (fcurr2 << 1U) + fnext2;
+
+      /* Process fourth sample for 5th, 9th .. tap */
+      fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fcurr3 = (fcurr3 << 1U) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g5(n) = f4(n) * K5  +  g4(n-1) */
+      gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      stageCnt--;
+    }
+
+    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
+    stageCnt = (numStages - 1U) % 0x4U;
+
+    while (stageCnt > 0U)
+    {
+      gcurr0 = *px;
+
+      /* save g value in state buffer */
+      *px++ = gnext3;
+
+      /* Process four samples for last three taps here */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
+
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
+
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Update of f values for next coefficient set processing */
+      fcurr0 = fnext0;
+      fcurr1 = fnext1;
+      fcurr2 = fnext2;
+      fcurr3 = fnext3;
+
+      stageCnt--;
+    }
+
+    /* The results in the 4 accumulators, store in the destination buffer. */
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+    *pDst++ = fcurr1;
+    *pDst++ = fcurr2;
+    *pDst++ = fcurr3;
+
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g2(n) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext0 << 1U) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
+
+    /* save g1(n) in state buffer */
+    *px++ = fcurr0;
+
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g2(n) from state buffer */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+
+    blkCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext << 1U) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
+
+    /* save f0(n) in state buffer */
+    *px++ = fcurr0;
+
+    /* f1(n) is saved in fcurr for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g1(n-1) from state buffer */
+      gcurr0 = *px;
+
+      /* save g0(n-1) in state buffer */
+      *px++ = gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+
+    blkCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
new file mode 100644
index 00000000..48506a83
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
@@ -0,0 +1,332 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_q15.c
+ * Description:  Q15 FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR filter.
+  @param[in]     S          points to an instance of the Q15 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+
+  @remark
+                   Refer to \ref arm_fir_fast_q15() for a faster but less precise implementation of this function.
+ */
+
+void arm_fir_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q63_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
+    px = pState;
+
+    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
+    pb = pCoeffs;
+
+    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
+    x0 = read_q15x2_ia (&px);
+
+    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
+    x2 = read_q15x2_ia (&px);
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc0 = __SMLALD(x0, c0, acc0);
+
+      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
+      acc2 = __SMLALD(x2, c0, acc2);
+
+      /* pack  x[n-N-1] and x[n-N-2] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read state x[n-N-4], x[n-N-5] */
+      x0 = read_q15x2_ia (&px);
+
+      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
+      acc1 = __SMLALDX(x1, c0, acc1);
+
+      /* pack  x[n-N-3] and x[n-N-4] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
+      acc3 = __SMLALDX(x1, c0, acc3);
+
+      /* Read coefficients b[N-2], b[N-3] */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
+      acc0 = __SMLALD(x2, c0, acc0);
+
+      /* Read state x[n-N-6], x[n-N-7] with offset */
+      x2 = read_q15x2_ia (&px);
+
+      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
+      acc2 = __SMLALD(x0, c0, acc2);
+
+      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
+      acc1 = __SMLALDX(x1, c0, acc1);
+
+      /* pack  x[n-N-5] and x[n-N-6] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
+      acc3 = __SMLALDX(x1, c0, acc3);
+
+      /* Decrement tap count */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps.
+       This is always be 2 taps since the filter length is even. */
+    if ((numTaps & 0x3U) != 0U)
+    {
+      /* Read last two coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulates */
+      acc0 = __SMLALD(x0, c0, acc0);
+      acc2 = __SMLALD(x2, c0, acc2);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read last state variables */
+      x0 = read_q15x2 (px);
+
+      /* Perform the multiply-accumulates */
+      acc1 = __SMLALDX(x1, c0, acc1);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* Perform the multiply-accumulates */
+      acc3 = __SMLALDX(x1, c0, acc3);
+    }
+
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+       Then store the 4 outputs in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy two samples into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Use SIMD to hold states and coefficients */
+    px = pState;
+    pb = pCoeffs;
+
+    tapCnt = numTaps >> 1U;
+
+    do
+    {
+      acc0 += (q31_t) *px++ * *pb++;
+	  acc0 += (q31_t) *px++ * *pb++;
+
+      tapCnt--;
+    }
+    while (tapCnt > 0U);
+
+    /* The result is in 2.30 format. Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
new file mode 100644
index 00000000..518f87ae
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
@@ -0,0 +1,288 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_q31.c
+ * Description:  Q31 FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for Q31 FIR filter.
+  @param[in]     S          points to an instance of the Q31 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+ @remark
+                   Refer to \ref arm_fir_fast_q31() for a faster but less precise implementation of this filter.
+ */
+
+void arm_fir_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px;                                     /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2;                              /* Accumulators */
+        q31_t x0, x1, x2;                              /* Temporary variables to hold state values */
+        q31_t c0;                                      /* Temporary variable to hold coefficient value */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+
+  blkCnt = blockSize / 3;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 3 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the first 2 samples from the state buffer: x[n-numTaps], x[n-numTaps-1] */
+    x0 = *px++;
+    x1 = *px++;
+
+    /* Loop unrolling: process 3 taps at a time. */
+    tapCnt = numTaps / 3;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps] coefficient */
+      c0 = *pb;
+
+      /* Read x[n-numTaps-2] sample */
+      x2 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q63_t) x0 * c0);
+      acc1 += ((q63_t) x1 * c0);
+      acc2 += ((q63_t) x2 * c0);
+
+      /* Read the coefficient and state */
+      c0 = *(pb + 1U);
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q63_t) x1 * c0);
+      acc1 += ((q63_t) x2 * c0);
+      acc2 += ((q63_t) x0 * c0);
+
+      /* Read the coefficient and state */
+      c0 = *(pb + 2U);
+      x1 = *(px++);
+
+      /* update coefficient pointer */
+      pb += 3U;
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q63_t) x2 * c0);
+      acc1 += ((q63_t) x0 * c0);
+      acc2 += ((q63_t) x1 * c0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    tapCnt = numTaps % 0x3U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x2 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q63_t) x0 * c0);
+      acc1 += ((q63_t) x1 * c0);
+      acc2 += ((q63_t) x2 * c0);
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by 3 to process the next group of 3 samples */
+    pState = pState + 3;
+
+    /* The result is in 2.30 format. Convert to 1.31 and store in destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31U);
+    *pDst++ = (q31_t) (acc1 >> 31U);
+    *pDst++ = (q31_t) (acc2 >> 31U);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x3U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    do
+    {
+      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+      acc0 += (q63_t) *px++ * *pb++;
+
+      i--;
+    } while (i > 0U);
+
+    /* Result is in 2.62 format. Convert to 1.31 and store in destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31U);
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
new file mode 100644
index 00000000..7c9f5bf2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
@@ -0,0 +1,323 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_q7.c
+ * Description:  Q7 FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for Q7 FIR filter.
+  @param[in]     S          points to an instance of the Q7 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is converted to 18.7 format by discarding the low 7 bits.
+                   Finally, the result is truncated to 1.7 format.
+ */
+
+void arm_fir_q7(
+  const arm_fir_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        q7_t *pState = S->pState;                      /* State pointer */
+  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
+        q7_t *pStateCurnt;                             /* Points to the current sample of the state */
+        q7_t *px;                                      /* Temporary pointer for state buffer */
+  const q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q7_t x0, x1, x2, x3, c0;                       /* Temporary variables to hold state */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the first 3 samples from the state buffer:
+     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
+
+    /* Loop unrolling. Process 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps] coefficient */
+      c0 = *pb;
+
+      /* Read x[n-numTaps-3] sample */
+      x3 = *px;
+
+      /* acc0 +=  b[numTaps] * x[n-numTaps] */
+      acc0 += ((q15_t) x0 * c0);
+
+      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
+      acc1 += ((q15_t) x1 * c0);
+
+      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
+      acc2 += ((q15_t) x2 * c0);
+
+      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
+      acc3 += ((q15_t) x3 * c0);
+
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb + 1U);
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *(px + 1U);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q15_t) x1 * c0);
+      acc1 += ((q15_t) x2 * c0);
+      acc2 += ((q15_t) x3 * c0);
+      acc3 += ((q15_t) x0 * c0);
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb + 2U);
+
+      /* Read x[n-numTaps-5] sample */
+      x1 = *(px + 2U);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q15_t) x2 * c0);
+      acc1 += ((q15_t) x3 * c0);
+      acc2 += ((q15_t) x0 * c0);
+      acc3 += ((q15_t) x1 * c0);
+
+      /* Read the b[numTaps-3] coefficients */
+      c0 = *(pb + 3U);
+
+      /* Read x[n-numTaps-6] sample */
+      x2 = *(px + 3U);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q15_t) x3 * c0);
+      acc1 += ((q15_t) x0 * c0);
+      acc2 += ((q15_t) x1 * c0);
+      acc3 += ((q15_t) x2 * c0);
+
+      /* update coefficient pointer */
+      pb += 4U;
+      px += 4U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x3 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q15_t) x0 * c0);
+      acc1 += ((q15_t) x1 * c0);
+      acc2 += ((q15_t) x2 * c0);
+      acc3 += ((q15_t) x3 * c0);
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+      x2 = x3;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31
+       Then store the 4 outputs in the destination buffer. */
+    acc0 = __SSAT((acc0 >> 7U), 8);
+    *pDst++ = acc0;
+    acc1 = __SSAT((acc1 >> 7U), 8);
+    *pDst++ = acc1;
+    acc2 = __SSAT((acc2 >> 7U), 8);
+    *pDst++ = acc2;
+    acc3 = __SSAT((acc3 >> 7U), 8);
+    *pDst++ = acc3;
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    do
+    {
+      acc0 += (q15_t) * (px++) * (*(pb++));
+      i--;
+    } while (i > 0U);
+
+    /* The result is in 2.14 format. Convert to 1.7
+       Then store the output in the destination buffer. */
+    *pDst++ = __SSAT((acc0 >> 7U), 8);
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
new file mode 100644
index 00000000..d31ba4ce
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
@@ -0,0 +1,341 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_f32.c
+ * Description:  Floating-point sparse FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters
+
+  This group of functions implements sparse FIR filters.
+  Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.
+  Sparse filters are used for simulating reflections in communications and audio applications.
+
+  There are separate functions for Q7, Q15, Q31, and floating-point data types.
+  The functions operate on blocks  of input and output data and each call to the function processes
+  blockSize samples through the filter.  pSrc and
+  pDst points to input and output arrays respectively containing blockSize values.
+
+  @par           Algorithm
+                   The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients.
+                   This is in addition to the coefficient array b.
+                   The implementation essentially skips the multiplications by zero and leads to an efficient realization.
+  
+      y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
+  

+  @par
+                   \image html FIRSparse.gif "Sparse FIR filter.  b[n] represents the filter coefficients"
+  @par
+                   pCoeffs points to a coefficient array of size numTaps;
+                   pTapDelay points to an array of nonzero indices and is also of size numTaps;
+                   pState points to a state array of size maxDelay + blockSize, where
+                   maxDelay is the largest offset value that is ever used in the pTapDelay array.
+                   Some of the processing functions also require temporary working buffers.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 4 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 4 different data type filter instance structures
+  
+      arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+  

+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the sparse FIR filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point sparse FIR filter.
+  @param[in]     S           points to an instance of the floating-point sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
+ */
+
+void arm_fir_sparse_f32(
+        arm_fir_sparse_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        float32_t * pScratchIn,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *px;                                 /* Scratch buffer pointer */
+        float32_t *py = pState;                        /* Temporary pointers for state buffer */
+        float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
+        float32_t *pOut;                               /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
+
+
+  /* BlockSize of Input samples are copied into the state buffer */
+  /* StateIndex points to the starting position to write in the state buffer */
+  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, (int32_t *) pSrc, 1, blockSize);
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplications and store in destination buffer */
+    *pOut++ = *px++ * coeff;
+
+    *pOut++ = *px++ * coeff;
+
+    *pOut++ = *px++ * coeff;
+
+    *pOut++ = *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplication and store in destination buffer */
+    *pOut++ = *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Load the coefficient value and
+   * increment the coefficient buffer for the next set of state values */
+  coeff = *pCoeffs++;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Loop over the number of taps. */
+  tapCnt = (uint32_t) numTaps - 2U;
+
+  while (tapCnt > 0U)
+  {
+    /* Working pointer for state buffer is updated */
+    py = pState;
+
+    /* blockSize samples are read from the state buffer */
+    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                         (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+    /* Working pointer for the scratch buffer of state values */
+    px = pb;
+
+    /* Working pointer for scratch buffer of output values */
+    pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      *pOut++ += *px++ * coeff;
+
+      *pOut++ += *px++ * coeff;
+
+      *pOut++ += *px++ * coeff;
+
+      *pOut++ += *px++ * coeff;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      *pOut++ += *px++ * coeff;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Load the coefficient value and
+     * increment the coefficient buffer for the next set of state values */
+    coeff = *pCoeffs++;
+
+    /* Read Index, from where the state buffer should be read, is calculated. */
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+    /* Wraparound of readIndex */
+    if (readIndex < 0)
+    {
+      readIndex += (int32_t) delaySize;
+    }
+
+    /* Decrement tap loop counter */
+    tapCnt--;
+  }
+
+  /* Compute last tap without the final read of pTapDelay */
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pOut++ += *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
new file mode 100644
index 00000000..978ca465
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
@@ -0,0 +1,93 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_init_f32.c
+ * Description:  Floating-point sparse FIR filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point sparse FIR filter.
+  @param[in,out] S          points to an instance of the floating-point sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   pCoeffs holds the filter coefficients and has length numTaps.
+                   pState holds the filter's state variables and must be of length
+                   maxDelay + blockSize, where maxDelay
+                   is the maximum number of delay line values.
+                   blockSize is the 
+                   number of samples processed by the arm_fir_sparse_f32() function.
+ */
+
+void arm_fir_sparse_init_f32(
+        arm_fir_sparse_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Assign TapDelay pointer */
+  S->pTapDelay = pTapDelay;
+
+  /* Assign MaxDelay */
+  S->maxDelay = maxDelay;
+
+  /* reset the stateIndex to 0 */
+  S->stateIndex = 0U;
+
+  /* Clear state buffer and size is always maxDelay + blockSize */
+  memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
new file mode 100644
index 00000000..5f6ab549
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
@@ -0,0 +1,93 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_init_q15.c
+ * Description:  Q15 sparse FIR filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q15 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   pCoeffs holds the filter coefficients and has length numTaps.
+                   pState holds the filter's state variables and must be of length
+                   maxDelay + blockSize, where maxDelay
+                   is the maximum number of delay line values.
+                   blockSize is the
+                   number of words processed by arm_fir_sparse_q15() function.
+ */
+
+void arm_fir_sparse_init_q15(
+        arm_fir_sparse_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Assign TapDelay pointer */
+  S->pTapDelay = pTapDelay;
+
+  /* Assign MaxDelay */
+  S->maxDelay = maxDelay;
+
+  /* reset the stateIndex to 0 */
+  S->stateIndex = 0U;
+
+  /* Clear state buffer and size is always maxDelay + blockSize */
+  memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
new file mode 100644
index 00000000..ec9232c6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_init_q31.c
+ * Description:  Q31 sparse FIR filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q31 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   pCoeffs holds the filter coefficients and has length numTaps.
+                   pState holds the filter's state variables and must be of length
+                   maxDelay + blockSize, where maxDelay
+                   is the maximum number of delay line values.
+                   blockSize is the number of words processed by arm_fir_sparse_q31() function.
+ */
+
+void arm_fir_sparse_init_q31(
+        arm_fir_sparse_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Assign TapDelay pointer */
+  S->pTapDelay = pTapDelay;
+
+  /* Assign MaxDelay */
+  S->maxDelay = maxDelay;
+
+  /* reset the stateIndex to 0 */
+  S->stateIndex = 0U;
+
+  /* Clear state buffer and size is always maxDelay + blockSize */
+  memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
new file mode 100644
index 00000000..f72ea255
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
@@ -0,0 +1,93 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_init_q7.c
+ * Description:  Q7 sparse FIR filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q7 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q7 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   pCoeffs holds the filter coefficients and has length numTaps.
+                   pState holds the filter's state variables and must be of length
+                   maxDelay + blockSize, where maxDelay
+                   is the maximum number of delay line values.
+                   blockSize is the
+                   number of samples processed by the arm_fir_sparse_q7() function.
+ */
+
+void arm_fir_sparse_init_q7(
+        arm_fir_sparse_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Assign TapDelay pointer */
+  S->pTapDelay = pTapDelay;
+
+  /* Assign MaxDelay */
+  S->maxDelay = maxDelay;
+
+  /* reset the stateIndex to 0 */
+  S->stateIndex = 0U;
+
+  /* Clear state buffer and size is always maxDelay + blockSize */
+  memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
new file mode 100644
index 00000000..99002b8b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
@@ -0,0 +1,341 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_q15.c
+ * Description:  Q15 sparse FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q15 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     pScratchOut points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 32-bit accumulator.
+                   The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.
+                   Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.
+                   If the accumulator result overflows it will wrap around rather than saturate.
+                   After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.
+                   In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+ */
+
+void arm_fir_sparse_q15(
+        arm_fir_sparse_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        q15_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *px;                                     /* Temporary pointers for scratch buffer */
+        q15_t *py = pState;                            /* Temporary pointers for state buffer */
+        q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
+        q15_t *pOut = pDst;                            /* Working pointer for output */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
+        q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in1, in2;                                /* Temporary variables */
+#endif
+
+  /* BlockSize of Input samples are copied into the state buffer */
+  /* StateIndex points to the starting position to write in the state buffer */
+  arm_circularWrite_q15(py, (int32_t) delaySize, &S->stateIndex, 1,pSrc, 1, blockSize);
+
+  /* Loop over the number of taps. */
+  tapCnt = numTaps;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                       pb, pb, (int32_t) blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Load the coefficient value and
+   * increment the coefficient buffer for the next set of state values */
+  coeff = *pCoeffs++;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Loop over the number of taps. */
+  tapCnt = (uint32_t) numTaps - 2U;
+
+  while (tapCnt > 0U)
+  {
+    /* Working pointer for state buffer is updated */
+    py = pState;
+
+    /* blockSize samples are read from the state buffer */
+    arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                         pb, pb, (int32_t) blockSize, 1, blockSize);
+
+    /* Working pointer for the scratch buffer of state values */
+    px = pb;
+
+    /* Working pointer for scratch buffer of output values */
+    pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Load the coefficient value and
+     * increment the coefficient buffer for the next set of state values */
+    coeff = *pCoeffs++;
+
+    /* Read Index, from where the state buffer should be read, is calculated. */
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+    /* Wraparound of readIndex */
+    if (readIndex < 0)
+    {
+      readIndex += (int32_t) delaySize;
+    }
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Compute last tap without the final read of pTapDelay */
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                       pb, pb, (int32_t) blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* All the output values are in pScratchOut buffer.
+     Convert them into 1.15 format, saturate and store in the destination buffer. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    in1 = *pScr2++;
+    in2 = *pScr2++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    in1 = *pScr2++;
+    in2 = *pScr2++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
new file mode 100644
index 00000000..7c924316
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
@@ -0,0 +1,357 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_q31.c
+ * Description:  Q31 sparse FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q31 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 32-bit accumulator.
+                   The 1.31 x 1.31 multiplications are truncated to 2.30 format.
+                   This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.
+                   If the accumulator result overflows, it wraps around rather than saturate.
+                   In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+ */
+
+void arm_fir_sparse_q31(
+        arm_fir_sparse_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        q31_t * pScratchIn,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *px;                                     /* Scratch buffer pointer */
+        q31_t *py = pState;                            /* Temporary pointers for state buffer */
+        q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
+        q31_t *pOut;                                   /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
+        q31_t in;
+        q63_t out;                                     /* Temporary output variable */
+
+
+  /* BlockSize of Input samples are copied into the state buffer */
+  /* StateIndex points to the starting position to write in the state buffer */
+  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
+                        (int32_t *) pSrc, 1, blockSize);
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplications and store in destination buffer */
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplication and store in destination buffer */
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Load the coefficient value and
+   * increment the coefficient buffer for the next set of state values */
+  coeff = *pCoeffs++;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Loop over the number of taps. */
+  tapCnt = (uint32_t) numTaps - 2U;
+
+  while (tapCnt > 0U)
+  {
+    /* Working pointer for state buffer is updated */
+    py = pState;
+
+    /* blockSize samples are read from the state buffer */
+    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                         (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+    /* Working pointer for the scratch buffer of state values */
+    px = pb;
+
+    /* Working pointer for scratch buffer of output values */
+    pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Load the coefficient value and
+     * increment the coefficient buffer for the next set of state values */
+    coeff = *pCoeffs++;
+
+    /* Read Index, from where the state buffer should be read, is calculated. */
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+    /* Wraparound of readIndex */
+    if (readIndex < 0)
+    {
+      readIndex += (int32_t) delaySize;
+    }
+
+    /* Decrement tap loop counter */
+    tapCnt--;
+  }
+
+  /* Compute last tap without the final read of pTapDelay */
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    out = *pOut;
+    out += ((q63_t) *px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Working output pointer is updated */
+  pOut = pDst;
+
+  /* Output is converted into 1.31 format. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    in = *pOut << 1;
+    *pOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
new file mode 100644
index 00000000..9e3de091
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
@@ -0,0 +1,341 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_q7.c
+ * Description:  Q7 sparse FIR filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q7 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q7 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     pScratchOut points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is then converted to 18.7 format by discarding the low 7 bits.
+                   Finally, the result is truncated to 1.7 format.
+ */
+
+void arm_fir_sparse_q7(
+        arm_fir_sparse_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        q7_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize)
+{
+        q7_t *pState = S->pState;                      /* State pointer */
+  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
+        q7_t *px;                                      /* Scratch buffer pointer */
+        q7_t *py = pState;                             /* Temporary pointers for state buffer */
+        q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
+        q7_t *pOut = pDst;                             /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
+        q31_t in;
+        q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q7_t in1, in2, in3, in4;
+#endif
+
+  /* BlockSize of Input samples are copied into the state buffer */
+  /* StateIndex points to the starting position to write in the state buffer */
+  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, blockSize);
+
+  /* Loop over the number of taps. */
+  tapCnt = numTaps;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                   pb, pb, (int32_t) blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Load the coefficient value and
+   * increment the coefficient buffer for the next set of state values */
+  coeff = *pCoeffs++;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Loop over the number of taps. */
+  tapCnt = (uint32_t) numTaps - 2U;
+
+  while (tapCnt > 0U)
+  {
+    /* Working pointer for state buffer is updated */
+    py = pState;
+
+    /* blockSize samples are read from the state buffer */
+    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                        pb, pb, (int32_t) blockSize, 1, blockSize);
+
+    /* Working pointer for the scratch buffer of state values */
+    px = pb;
+
+    /* Working pointer for scratch buffer of output values */
+    pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      *pScratchOut++ = in;
+      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      *pScratchOut++ = in;
+      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      *pScratchOut++ = in;
+      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      *pScratchOut++ = in;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      in = *pScratchOut + ((q31_t) *px++ * coeff);
+      *pScratchOut++ = in;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Load the coefficient value and
+     * increment the coefficient buffer for the next set of state values */
+    coeff = *pCoeffs++;
+
+    /* Read Index, from where the state buffer should be read, is calculated. */
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+    /* Wraparound of readIndex */
+    if (readIndex < 0)
+    {
+      readIndex += (int32_t) delaySize;
+    }
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Compute last tap without the final read of pTapDelay */
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                      pb, pb, (int32_t) blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* All the output values are in pScratchOut buffer.
+     Convert them into 1.15 format, saturate and store in the destination buffer. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+    in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+    in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+    in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+
+    write_q7x4_ia (&pOut, __PACKq7(in1, in2, in3, in4));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
new file mode 100644
index 00000000..cc8bff68
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
@@ -0,0 +1,354 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_f32.c
+ * Description:  Floating-point IIR Lattice filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
+
+  This set of functions implements lattice filters
+  for Q15, Q31 and floating-point data types.  Lattice filters are used in a
+  variety of adaptive filter applications. The filter structure has feedforward and
+  feedback components and the net impulse response is infinite length.
+  The functions operate on blocks
+  of input and output data and each call to the function processes
+  blockSize samples through the filter.  pSrc and
+  pDst point to input and output arrays containing blockSize values.
+
+  @par           Algorithm
+                   \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
+  @par
+  
+      fN(n)   = x(n)
+      fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ..., 1
+      gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1
+      y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
+  

+  @par
+                   pkCoeffs points to array of reflection coefficients of size numStages.
+                   Reflection Coefficients are stored in time-reversed order.
+  @par
+  
+     {kN, kN-1, ..., k1}
+  

+  @par
+                  pvCoeffs points to the array of ladder coefficients of size (numStages+1).
+                  Ladder coefficients are stored in time-reversed order.
+  
+      {vN, vN-1, ..., v0}
+  

+  @par
+                   pState points to a state array of size numStages + blockSize.
+                   The state variables shown in the figure above (the g values) are stored in the pState array.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
+  
+      arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
+      arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
+      arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
+  

+  @par
+                   where numStages is the number of stages in the filter; pState points to the state buffer array;
+                   pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point IIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_iir_lattice_f32(
+  const arm_iir_lattice_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{       
+        float32_t *pState = S->pState;                   /* State pointer */
+        float32_t *pStateCur;                            /* State current pointer */
+        float32_t acc;                                   /* Accumlator */
+        float32_t fnext1, fnext2, gcurr1, gnext;         /* Temporary variables for lattice stages */
+        float32_t *px1, *px2, *pk, *pv;                  /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;               /* Number of stages */
+        uint32_t blkCnt, tapCnt;                         /* Temporary variables for counts */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t gcurr2;                                /* Temporary variables for lattice stages */
+        float32_t k1, k2;
+        float32_t v1, v2, v3, v4;
+#endif
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fnext2 = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0.0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read gN-1(n-1) from state buffer */
+      gcurr1 = *px1;
+
+      /* read reflection coefficient kN */
+      k1 = *pk;
+
+      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+      fnext1 = fnext2 - (k1 * gcurr1);
+
+      /* read ladder coefficient vN */
+      v1 = *pv;
+
+      /* read next reflection coefficient kN-1 */
+      k2 = *(pk + 1U);
+
+      /* Read gN-2(n-1) from state buffer */
+      gcurr2 = *(px1 + 1U);
+
+      /* read next ladder coefficient vN-1 */
+      v2 = *(pv + 1U);
+
+      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
+      fnext2 = fnext1 - (k2 * gcurr2);
+
+      /* gN(n)   = kN * fN-1(n) + gN-1(n-1) */
+      gnext = gcurr1 + (k1 * fnext1);
+
+      /* read reflection coefficient kN-2 */
+      k1 = *(pk + 2U);
+
+      /* write gN(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Read gN-3(n-1) from state buffer */
+      gcurr1 = *(px1 + 2U);
+
+      /* y(n) += gN(n) * vN  */
+      acc += (gnext * v1);
+
+      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
+      fnext1 = fnext2 - (k1 * gcurr1);
+
+      /* gN-1(n)   = kN-1 * fN-2(n) + gN-2(n-1) */
+      gnext = gcurr2 + (k2 * fnext2);
+
+      /* Read gN-4(n-1) from state buffer */
+      gcurr2 = *(px1 + 3U);
+
+      /* y(n) += gN-1(n) * vN-1  */
+      acc += (gnext * v2);
+
+      /* read reflection coefficient kN-3 */
+      k2 = *(pk + 3U);
+
+      /* write gN-1(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
+      fnext2 = fnext1 - (k2 * gcurr2);
+
+      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
+      gnext = gcurr1 + (k1 * fnext1);
+
+      /* read ladder coefficient vN-2 */
+      v3 = *(pv + 2U);
+
+      /* y(n) += gN-2(n) * vN-2  */
+      acc += (gnext * v3);
+
+      /* write gN-2(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* update pointer */
+      pk += 4U;
+
+      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
+      gnext = (fnext2 * k2) + gcurr2;
+
+      /* read next ladder coefficient vN-3 */
+      v4 = *(pv + 3U);
+
+      /* y(n) += gN-4(n) * vN-4  */
+      acc += (gnext * v4);
+
+      /* write gN-3(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* update pointers */
+      px1 += 4U;
+      pv += 4U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numStages % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numStages;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      gcurr1 = *px1++;
+      /* Process sample for last taps */
+      fnext1 = fnext2 - ((*pk) * gcurr1);
+      gnext = (fnext1 * (*pk++)) + gcurr1;
+      /* Output samples for last taps */
+      acc += (gnext * (*pv++));
+      *px2++ = gnext;
+      fnext2 = fnext1;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += (fnext2 * (*pv));
+
+    *px2++ = fnext2;
+
+    /* write out into pDst */
+    *pDst++ = acc;
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  /* Copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = numStages >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  tapCnt = numStages;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
new file mode 100644
index 00000000..459ed92d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_init_f32.c
+ * Description:  Floating-point IIR lattice filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point IIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point IIR lattice structure
+  @param[in]     numStages  number of stages in the filter
+  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in]     pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_iir_lattice_init_f32(
+  arm_iir_lattice_instance_f32 * S,
+  uint16_t numStages,
+  float32_t * pkCoeffs,
+  float32_t * pvCoeffs,
+  float32_t * pState,
+  uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign reflection coefficient pointer */
+  S->pkCoeffs = pkCoeffs;
+
+  /* Assign ladder coefficient pointer */
+  S->pvCoeffs = pvCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numStages */
+  memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
new file mode 100644
index 00000000..1e16932e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_init_q15.c
+ * Description:  Q15 IIR lattice filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief     Initialization function for the Q15 IIR lattice filter.
+  @param[in] S          points to an instance of the Q15 IIR lattice structure
+  @param[in] numStages  number of stages in the filter
+  @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in] pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in] blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_iir_lattice_init_q15(
+  arm_iir_lattice_instance_q15 * S,
+  uint16_t numStages,
+  q15_t * pkCoeffs,
+  q15_t * pvCoeffs,
+  q15_t * pState,
+  uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign reflection coefficient pointer */
+  S->pkCoeffs = pkCoeffs;
+
+  /* Assign ladder coefficient pointer */
+  S->pvCoeffs = pvCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numStages */
+  memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
new file mode 100644
index 00000000..a1efae0f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_init_q31.c
+ * Description:  Initialization function for the Q31 IIR lattice filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 IIR lattice structure
+  @param[in]     numStages  number of stages in the filter
+  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in]     pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_iir_lattice_init_q31(
+  arm_iir_lattice_instance_q31 * S,
+  uint16_t numStages,
+  q31_t * pkCoeffs,
+  q31_t * pvCoeffs,
+  q31_t * pState,
+  uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign reflection coefficient pointer */
+  S->pkCoeffs = pkCoeffs;
+
+  /* Assign ladder coefficient pointer */
+  S->pvCoeffs = pvCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numStages */
+  memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
new file mode 100644
index 00000000..2651dd56
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
@@ -0,0 +1,396 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_q15.c
+ * Description:  Q15 IIR Lattice filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+
+void arm_iir_lattice_q15(
+  const arm_iir_lattice_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pStateCur;                              /* State current pointer */
+        q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
+        q63_t acc;                                     /* Accumlator */
+        q15_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;             /* Number of stages */
+        uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
+        q15_t out;                                     /* Temporary variable for output */
+
+#if defined (ARM_MATH_DSP) && defined (ARM_MATH_LOOPUNROLL)
+        q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
+        q31_t v;                                       /* Temporary variable for ladder coefficient */
+#endif
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+#if defined (ARM_MATH_DSP)
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fcurr = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
+    /* Process sample for first tap */
+    gcurr = *px1++;
+    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+    fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
+    fnext = __SSAT(fnext, 16);
+
+    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
+    gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
+    gnext = __SSAT(gnext, 16);
+
+    /* write gN(n) into state for next sample processing */
+    *px2++ = (q15_t) gnext;
+
+    /* y(n) += gN(n) * vN */
+    acc += (q31_t) ((gnext * (*pv++)));
+
+    /* Update f values for next coefficient processing */
+    fcurr = fnext;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages - 1U) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Process sample for 2nd, 6th ...taps */
+      /* Read gN-2(n-1) from state buffer */
+      gcurr = *px1++;
+      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
+      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
+      fnext = __SSAT(fnext, 16);
+      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
+      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
+      gnext1 = (q15_t) __SSAT(gnext, 16);
+      /* write gN-1(n) into state for next sample processing */
+      *px2++ = (q15_t) gnext1;
+
+      /* Process sample for 3nd, 7th ...taps */
+      /* Read gN-3(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 3rd, 7th .. taps */
+      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
+      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
+      fcurr = __SSAT(fcurr, 16);
+      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
+      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
+      gnext2 = (q15_t) __SSAT(gnext, 16);
+      /* write gN-2(n) into state */
+      *px2++ = (q15_t) gnext2;
+
+      /* Read vN-1 and vN-2 at a time */
+      v = read_q15x2_ia (&pv);
+
+      /* Pack gN-1(n) and gN-2(n) */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+      gnext = __PKHBT(gnext1, gnext2, 16);
+#else
+      gnext = __PKHBT(gnext2, gnext1, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* y(n) += gN-1(n) * vN-1  */
+      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
+      /* y(n) += gN-2(n) * vN-2  */
+      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
+      acc = __SMLALD(gnext, v, acc);
+
+      /* Process sample for 4th, 8th ...taps */
+      /* Read gN-4(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 4th, 8th .. taps */
+      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
+      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
+      fnext = __SSAT(fnext, 16);
+      /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
+      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
+      gnext1 = (q15_t) __SSAT(gnext, 16);
+      /* write  gN-3(n) for the next sample process */
+      *px2++ = (q15_t) gnext1;
+
+      /* Process sample for 5th, 9th ...taps */
+      /* Read gN-5(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 5th, 9th .. taps */
+      /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
+      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
+      fcurr = __SSAT(fcurr, 16);
+      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
+      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
+      gnext2 = (q15_t) __SSAT(gnext, 16);
+      /* write      gN-4(n) for the next sample process */
+      *px2++ = (q15_t) gnext2;
+
+      /* Read vN-3 and vN-4 at a time */
+      v = read_q15x2_ia (&pv);
+
+      /* Pack gN-3(n) and gN-4(n) */
+#ifndef ARM_MATH_BIG_ENDIAN
+      gnext = __PKHBT(gnext1, gnext2, 16);
+#else
+      gnext = __PKHBT(gnext2, gnext1, 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* y(n) += gN-4(n) * vN-4  */
+      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
+      /* y(n) += gN-3(n) * vN-3  */
+      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
+      acc = __SMLALD(gnext, v, acc);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    fnext = fcurr;
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = (numStages - 1U) % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      gcurr = *px1++;
+      /* Process sample for last taps */
+      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
+      fnext = __SSAT(fnext, 16);
+      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
+      gnext = __SSAT(gnext, 16);
+
+      /* Output samples for last taps */
+      acc += (q31_t) (((q31_t) gnext * (*pv++)));
+      *px2++ = (q15_t) gnext;
+      fcurr = fnext;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += (q31_t) (((q31_t) fnext * (*pv++)));
+
+    out = (q15_t) __SSAT(acc >> 15, 16);
+    *px2++ = (q15_t) fnext;
+
+    /* write out into pDst */
+    *pDst++ = out;
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = numStages >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fcurr = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
+    tapCnt = numStages;
+
+    while (tapCnt > 0U)
+    {
+      gcurr = *px1++;
+      /* Process sample */
+      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+      fnext = fcurr - ((gcurr * (*pk)) >> 15);
+      fnext = __SSAT(fnext, 16);
+
+      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
+      gnext = ((fnext * (*pk++)) >> 15) + gcurr;
+      gnext = __SSAT(gnext, 16);
+
+      /* Output samples */
+      /* y(n) += gN(n) * vN */
+      acc += (q31_t) ((gnext * (*pv++)));
+
+      /* write gN(n) into state for next sample processing */
+      *px2++ = (q15_t) gnext;
+
+      /* Update f values for next coefficient processing */
+      fcurr = fnext;
+
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += (q31_t) ((fnext * (*pv++)));
+
+    out = (q15_t) __SSAT(acc >> 15, 16);
+    *px2++ = (q15_t) fnext;
+
+    /* write out into pDst */
+    *pDst++ = out;
+
+    /* Advance the state pointer by 1 to process the next group of samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  tapCnt = numStages;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
new file mode 100644
index 00000000..d0348fe4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
@@ -0,0 +1,356 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_q31.c
+ * Description:  Q31 IIR Lattice filter processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
+ */
+
+void arm_iir_lattice_q31(
+  const arm_iir_lattice_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{       
+        q31_t *pState = S->pState;                       /* State pointer */
+        q31_t *pStateCur;                                /* State current pointer */
+        q31_t fcurr, fnext = 0, gcurr = 0, gnext;        /* Temporary variables for lattice stages */
+        q63_t acc;                                       /* Accumlator */
+        q31_t *px1, *px2, *pk, *pv;                      /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;               /* Number of stages */
+        uint32_t blkCnt, tapCnt;                         /* Temporary variables for counts */
+
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+#if defined (ARM_MATH_DSP)
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fcurr = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
+    /* Process sample for first tap */
+    gcurr = *px1++;
+    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+    fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+
+    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
+    gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+
+    /* write gN-1(n-1) into state for next sample processing */
+    *px2++ = gnext;
+
+    /* y(n) += gN(n) * vN */
+    acc += ((q63_t) gnext * *pv++);
+
+    /* Update f values for next coefficient processing */
+    fcurr = fnext;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages - 1U) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Process sample for 2nd, 6th ...taps */
+      /* Read gN-2(n-1) from state buffer */
+      gcurr = *px1++;
+      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+      /* y(n) += gN-1(n) * vN-1  */
+      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
+      acc += ((q63_t) gnext * *pv++);
+      /* write gN-1(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Process sample for 3nd, 7th ...taps */
+      /* Read gN-3(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 3rd, 7th .. taps */
+      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
+      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
+      /* y(n) += gN-2(n) * vN-2  */
+      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
+      acc += ((q63_t) gnext * *pv++);
+      /* write gN-2(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Process sample for 4th, 8th ...taps */
+      /* Read gN-4(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 4th, 8th .. taps */
+      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+      /* y(n) += gN-3(n) * vN-3  */
+      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
+      acc += ((q63_t) gnext * *pv++);
+      /* write gN-3(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Process sample for 5th, 9th ...taps */
+      /* Read gN-5(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 5th, 9th .. taps */
+      /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
+      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
+      /* y(n) += gN-4(n) * vN-4  */
+      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
+      acc += ((q63_t) gnext * *pv++);
+
+      /* write gN-4(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    fnext = fcurr;
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = (numStages - 1U) % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      gcurr = *px1++;
+      /* Process sample for last taps */
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+
+      /* Output samples for last taps */
+      acc += ((q63_t) gnext * *pv++);
+      *px2++ = gnext;
+      fcurr = fnext;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += ((q63_t) fnext * *pv++);
+
+    *px2++ = fnext;
+
+    /* write out into pDst */
+    *pDst++ = (q31_t) (acc >> 31U);
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  /* Copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = numStages >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fcurr = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
+    tapCnt = numStages;
+
+    while (tapCnt > 0U)
+    {
+      gcurr = *px1++;
+      /* Process sample */
+      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+      fnext = clip_q63_to_q31(((q63_t) fcurr - ((q31_t) (((q63_t) gcurr * (*pk  )) >> 31))));
+
+      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
+      gnext = clip_q63_to_q31(((q63_t) gcurr + ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
+
+      /* Output samples */
+      /* y(n) += gN(n) * vN */
+      acc += ((q63_t) gnext * *pv++);
+
+      /* write gN-1(n-1) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Update f values for next coefficient processing */
+      fcurr = fnext;
+
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += ((q63_t) fnext * *pv++);
+
+    *px2++ = fnext;
+
+    /* write out into pDst */
+    *pDst++ = (q31_t) (acc >> 31U);
+
+    /* Advance the state pointer by 1 to process the next group of samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  tapCnt = numStages;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
new file mode 100644
index 00000000..edcb8e30
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
@@ -0,0 +1,533 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_f32.c
+ * Description:  Processing function for the floating-point LMS filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup LMS Least Mean Square (LMS) Filters
+
+  LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.
+  LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.
+  Adaptive filters are often used in communication systems, equalizers, and noise removal.
+  The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.
+  The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.
+
+  An LMS filter consists of two components as shown below.
+  The first component is a standard transversal or FIR filter.
+  The second component is a coefficient update mechanism.
+  The LMS filter has two input signals.
+  The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
+  That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
+  The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
+  This "error signal" tends towards zero as the filter adapts.
+  The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.
+  \image html LMS.gif "Internal structure of the Least Mean Square filter"
+
+  The functions operate on blocks of data and each call to the function processes
+  blockSize samples through the filter.
+  pSrc points to input signal, pRef points to reference signal,
+  pOut points to output signal and pErr points to error signal.
+  All arrays contain blockSize values.
+
+  The functions operate on a block-by-block basis.
+  Internally, the filter coefficients b[n] are updated on a sample-by-sample basis.
+  The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
+
+  @par           Algorithm
+                   The output signal y[n] is computed by a standard FIR filter:
+  
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  

+
+  @par
+                   The error signal equals the difference between the reference signal d[n] and the filter output:
+  
+      e[n] = d[n] - y[n].
+  

+
+  @par
+                   After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis:
+  
+      b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
+  

+                   where mu is the step size and controls the rate of coefficient convergence.
+  @par
+                   In the APIs, pCoeffs points to a coefficient array of size numTaps.
+                   Coefficients are stored in time reversed order.
+  @par
+  
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+  @par
+                   pState points to a state array of size numTaps + blockSize - 1.
+                   Samples in the state buffer are stored in the order:
+  @par
+  
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  

+  @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples.
+                   The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed.
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter and
+                   coefficient and state arrays cannot be shared among instances.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
+
+  @par
+                 Use of the initialization function is optional.
+                 However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                 To place an instance structure into a const data section, the instance structure must be manually initialized.
+                 Set the values in the state buffer to zeros before static initialization.
+                 The code below statically initializes each of the 3 different data type filter instance structures
+  
+     arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
+     arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
+     arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
+  

+                 where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;
+                 pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the LMS filter.
+                   The following issues must be considered:
+                   - Scaling of coefficients
+                   - Overflow and saturation
+
+  @par           Scaling of Coefficients
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range [-1 +1).
+                   The fixed-point functions have an additional scaling parameter postShift.
+                   At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.
+                   This essentially scales the filter coefficients by 2^postShift and
+                   allows the filter coefficients to exceed the range [+1 -1).
+                   The value of postShift is set by the user based on the expected gain through the system being modeled.
+
+  @par           Overflow and Saturation
+                   Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
+                   described separately as part of the function specific documentation below.
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point LMS filter.
+  @param[in]     S          points to an instance of the floating-point LMS filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[in]     pRef       points to the block of reference data
+  @param[out]    pOut       points to the block of output data
+  @param[out]    pErr       points to the block of error data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
+void arm_lms_f32(
+  const arm_lms_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pRef,
+  float32_t * pOut,
+  float32_t * pErr,
+  uint32_t blockSize)
+{
+  float32_t *pState = S->pState;                 /* State pointer */
+  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+  float32_t mu = S->mu;                          /* Adaptive factor */
+  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+  uint32_t tapCnt, blkCnt;                       /* Loop counters */
+  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
+  float32_t w = 0.0f;                            /* weight factor */
+
+  float32x4_t tempV, sumV, xV, bV;
+  float32x2_t tempV2;
+
+  e = 0.0f;
+  d = 0.0f;
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = (pCoeffs);
+
+    /* Set the accumulator to zero */
+    sum = 0.0f;
+    sumV = vdupq_n_f32(0.0);
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      sumV = vmlaq_f32(sumV, xV, bV);
+
+      px += 4; 
+      pb += 4;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+    tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+    sum = tempV2[0] + tempV2[1];
+
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (*px++) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* The result in the accumulator, store in the destination buffer. */
+    *pOut++ = sum;
+
+    /* Compute and store error */
+    d = (float32_t) (*pRef++);
+    e = d - sum;
+    *pErr++ = e;
+
+    /* Calculation of Weighting factor for the updating filter coefficients */
+    w = e * mu;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = (pCoeffs);
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      px += 4;
+      bV = vmlaq_n_f32(bV,xV,w);
+
+      vst1q_f32(pb,bV); 
+      pb += 4;
+
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb = *pb + (w * (*px++));
+      pb++;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+
+  /* Processing is complete. Now copy the last numTaps - 1 samples to the
+     satrt of the state buffer. This prepares the state buffer for the
+     next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* Process 4 taps at a time for (numTaps - 1U) samples copy */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    tempV = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,tempV); 
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+  /* Copy the remaining q31_t data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+
+}
+#else
+void arm_lms_f32(
+  const arm_lms_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize)
+{       
+        float32_t *pState = S->pState;                 /* State pointer */
+        float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+        float32_t mu = S->mu;                          /* Adaptive factor */
+        float32_t acc, e;                              /* Accumulator, error */
+        float32_t w;                                   /* Weight factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+
+  /* Initializations of error,  difference, Coefficient update */
+  e = 0.0f;
+  w = 0.0f;
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Set the accumulator to zero */
+    acc = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = acc;
+
+    /* Compute and store error */
+    e = (float32_t) *pRef++ - acc;
+    *pErr++ = e;
+
+    /* Calculation of Weighting factor for updating filter coefficients */
+    w = e * mu;
+
+    /* Initialize pState pointer */
+    /* Advance state pointer by 1 for the next sample */
+    px = pState++;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
new file mode 100644
index 00000000..d1618e01
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
@@ -0,0 +1,81 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_init_f32.c
+ * Description:  Floating-point LMS filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Initialization function for floating-point LMS filter.
+  @param[in]     S          points to an instance of the floating-point LMS filter structure
+  @param[in]     numTaps    number of filter coefficients
+  @param[in]     pCoeffs    points to coefficient buffer
+  @param[in]     pState     points to state buffer
+  @param[in]     mu         step size that controls filter coefficient updates
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().
+ */
+
+void arm_lms_init_f32(
+  arm_lms_instance_f32 * S,
+  uint16_t numTaps,
+  float32_t * pCoeffs,
+  float32_t * pState,
+  float32_t mu,
+  uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps */
+  memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
new file mode 100644
index 00000000..56c361b3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_init_q15.c
+ * Description:  Q15 LMS filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 LMS filter.
+  @param[in]     S          points to an instance of the Q15 LMS filter structure.
+  @param[in]     numTaps    number of filter coefficients.
+  @param[in]     pCoeffs    points to coefficient buffer.
+  @param[in]     pState     points to state buffer.
+  @param[in]     mu         step size that controls filter coefficient updates.
+  @param[in]     blockSize  number of samples to process.
+  @param[in]     postShift  bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   pState points to the array of state variables and size of array is
+                   numTaps+blockSize-1 samples, where blockSize is the number of
+                   input samples processed by each call to arm_lms_q15().
+ */
+
+void arm_lms_init_q15(
+  arm_lms_instance_q15 * S,
+  uint16_t numTaps,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  q15_t mu,
+  uint32_t blockSize,
+  uint32_t postShift)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Assign postShift value to be applied */
+  S->postShift = postShift;
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
new file mode 100644
index 00000000..559296a5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_init_q31.c
+ * Description:  Q31 LMS filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Initialization function for Q31 LMS filter.
+  @param[in]     S          points to an instance of the Q31 LMS filter structure
+  @param[in]     numTaps    number of filter coefficients
+  @param[in]     pCoeffs    points to coefficient buffer
+  @param[in]     pState     points to state buffer
+  @param[in]     mu         step size that controls filter coefficient updates
+  @param[in]     blockSize  number of samples to process
+  @param[in]     postShift  bit shift applied to coefficients
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   pState points to an array of length numTaps+blockSize-1 samples,
+                   where blockSize is the number of input samples processed by each call to
+                   arm_lms_q31().
+ */
+
+void arm_lms_init_q31(
+  arm_lms_instance_q31 * S,
+  uint16_t numTaps,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  q31_t mu,
+  uint32_t blockSize,
+  uint32_t postShift)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Assign postShift value to be applied */
+  S->postShift = postShift;
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
new file mode 100644
index 00000000..244de7f9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
@@ -0,0 +1,564 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_f32.c
+ * Description:  Processing function for the floating-point NLMS filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup LMS_NORM Normalized LMS Filters
+
+  This set of functions implements a commonly used adaptive filter.
+  It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization
+  factor which increases the adaptation rate of the filter.
+  The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.
+
+  A normalized least mean square (NLMS) filter consists of two components as shown below.
+  The first component is a standard transversal or FIR filter.
+  The second component is a coefficient update mechanism.
+  The NLMS filter has two input signals.
+  The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
+  That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
+  The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
+  This "error signal" tends towards zero as the filter adapts.
+  The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.
+  \image html LMS.gif "Internal structure of the NLMS adaptive filter"
+
+  The functions operate on blocks of data and each call to the function processes
+  blockSize samples through the filter.
+  pSrc points to input signal, pRef points to reference signal,
+  pOut points to output signal and pErr points to error signal.
+  All arrays contain blockSize values.
+
+  The functions operate on a block-by-block basis.
+  Internally, the filter coefficients b[n] are updated on a sample-by-sample basis.
+  The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
+
+ @par            Algorithm
+                   The output signal y[n] is computed by a standard FIR filter:
+  
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  

+
+ @par
+                   The error signal equals the difference between the reference signal d[n] and the filter output:
+  
+      e[n] = d[n] - y[n].
+  

+
+ @par
+                   After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:
+  
+     E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
+  

+                   The filter coefficients b[k] are then updated on a sample-by-sample basis:
+  
+      b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
+  

+                   where mu is the step size and controls the rate of coefficient convergence.
+ @par
+                   In the APIs, pCoeffs points to a coefficient array of size numTaps.
+                   Coefficients are stored in time reversed order.
+ @par
+  
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+ @par
+                   pState points to a state array of size numTaps + blockSize - 1.
+                   Samples in the state buffer are stored in the order:
+ @par
+  
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  

+ @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples.
+                   The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed.
+
+ @par            Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter and
+                   coefficient and state arrays cannot be shared among instances.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par            Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero.
+                   For Q7, Q15, and Q31 the following fields must also be initialized;
+                   recipTable, postShift
+ @par
+                   Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+ @par            Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.
+                   The following issues must be considered:
+                   - Scaling of coefficients
+                   - Overflow and saturation
+
+ @par            Scaling of Coefficients
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range [-1 +1).
+                   The fixed-point functions have an additional scaling parameter postShift.
+                   At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.
+                   This essentially scales the filter coefficients by 2^postShift and
+                   allows the filter coefficients to exceed the range [+1 -1).
+                   The value of postShift is set by the user based on the expected gain through the system being modeled.
+
+ @par            Overflow and Saturation
+                   Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
+                   described separately as part of the function specific documentation below.
+ */
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point normalized LMS filter.
+  @param[in]     S         points to an instance of the floating-point normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_NEON)
+void arm_lms_norm_f32(
+  arm_lms_norm_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pRef,
+  float32_t * pOut,
+  float32_t * pErr,
+  uint32_t blockSize)
+{
+  float32_t *pState = S->pState;                 /* State pointer */
+  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+  float32_t mu = S->mu;                          /* Adaptive factor */
+  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+  uint32_t tapCnt, blkCnt;                       /* Loop counters */
+  float32_t energy;                              /* Energy of the input */
+  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
+  float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
+
+  float32x4_t tempV, sumV, xV, bV;
+  float32x2_t tempV2;
+
+  /* Initializations of error,  difference, Coefficient update */
+  e = 0.0f;
+  d = 0.0f;
+  w = 0.0f;
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* Loop over blockSize number of values */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = (pCoeffs);
+
+    /* Read the sample from input buffer */
+    in = *pSrc++;
+
+    /* Update the energy calculation */
+    energy -= x0 * x0;
+    energy += in * in;
+
+    /* Set the accumulator to zero */
+    sum = 0.0f;
+    sumV = vdupq_n_f32(0.0);
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      sumV = vmlaq_f32(sumV, xV, bV);
+
+      px += 4; 
+      pb += 4;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+    tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+    sum = tempV2[0] + tempV2[1];
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (*px++) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* The result in the accumulator, store in the destination buffer. */
+    *pOut++ = sum;
+
+    /* Compute and store error */
+    d = (float32_t) (*pRef++);
+    e = d - sum;
+    *pErr++ = e;
+
+    /* Calculation of Weighting factor for updating filter coefficients */
+    /* epsilon value 0.000000119209289f */
+    w = (e * mu) / (energy + 0.000000119209289f);
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = (pCoeffs);
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      px += 4;
+      bV = vmlaq_n_f32(bV,xV,w);
+
+      vst1q_f32(pb,bV); 
+      pb += 4;
+
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    x0 = *pState;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  S->energy = energy;
+  S->x0 = x0;
+
+  /* Processing is complete. Now copy the last numTaps - 1 samples to the
+     satrt of the state buffer. This prepares the state buffer for the
+     next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* Process 4 taps at a time for (numTaps - 1U)/4 samples copy */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    tempV = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,tempV); 
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+  /* Copy the remaining q31_t data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+#else
+void arm_lms_norm_f32(
+        arm_lms_norm_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+        float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+        float32_t mu = S->mu;                          /* Adaptive factor */
+        float32_t acc, e;                              /* Accumulator, error */
+        float32_t w;                                   /* Weight factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        float32_t energy;                              /* Energy of the input */
+        float32_t x0, in;                              /* Temporary variable to hold input sample and state */
+
+  /* Initializations of error,  difference, Coefficient update */
+  e = 0.0f;
+  w = 0.0f;
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the sample from input buffer */
+    in = *pSrc++;
+
+    /* Update the energy calculation */
+    energy -= x0 * x0;
+    energy += in * in;
+
+    /* Set the accumulator to zero */
+    acc = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = acc;
+
+    /* Compute and store error */
+    e = (float32_t) *pRef++ - acc;
+    *pErr++ = e;
+
+    /* Calculation of Weighting factor for updating filter coefficients */
+    /* epsilon value 0.000000119209289f */
+    w = (e * mu) / (energy + 0.000000119209289f);
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    x0 = *pState;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Save energy and x0 values for the next frame */
+  S->energy = energy;
+  S->x0 = x0;
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
new file mode 100644
index 00000000..632510fe
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_init_f32.c
+ * Description:  Floating-point NLMS filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Initialization function for floating-point normalized LMS filter.
+  @param[in]     S         points to an instance of the floating-point LMS filter structure
+  @param[in]     numTaps   number of filter coefficients
+  @param[in]     pCoeffs   points to coefficient buffer
+  @param[in]     pState    points to state buffer
+  @param[in]     mu        step size that controls filter coefficient updates
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   pState points to an array of length numTaps+blockSize-1 samples,
+                   where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().
+ */
+
+void arm_lms_norm_init_f32(
+        arm_lms_norm_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Initialise Energy to zero */
+  S->energy = 0.0f;
+
+  /* Initialise x0 to zero */
+  S->x0 = 0.0f;
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
new file mode 100644
index 00000000..11b5f39f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
@@ -0,0 +1,98 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_init_q15.c
+ * Description:  Q15 NLMS filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Initialization function for Q15 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q15 normalized LMS filter structure.
+  @param[in]     numTaps   number of filter coefficients.
+  @param[in]     pCoeffs   points to coefficient buffer.
+  @param[in]     pState    points to state buffer.
+  @param[in]     mu        step size that controls filter coefficient updates.
+  @param[in]     blockSize number of samples to process.
+  @param[in]     postShift bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   pState points to the array of state variables and size of array is
+                   numTaps+blockSize-1 samples, where blockSize is the number of input samples processed
+                   by each call to arm_lms_norm_q15().
+ */
+
+void arm_lms_norm_init_q15(
+        arm_lms_norm_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint8_t postShift)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
+
+  /* Assign post Shift value applied to coefficients */
+  S->postShift = postShift;
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Initialize reciprocal pointer table */
+  S->recipTable = (q15_t *) armRecipTableQ15;
+
+  /* Initialise Energy to zero */
+  S->energy = 0;
+
+  /* Initialise x0 to zero */
+  S->x0 = 0;
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
new file mode 100644
index 00000000..79d629fc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
@@ -0,0 +1,97 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_init_q31.c
+ * Description:  Q31 NLMS filter initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Initialization function for Q31 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q31 normalized LMS filter structure.
+  @param[in]     numTaps   number of filter coefficients.
+  @param[in]     pCoeffs   points to coefficient buffer.
+  @param[in]     pState    points to state buffer.
+  @param[in]     mu        step size that controls filter coefficient updates.
+  @param[in]     blockSize number of samples to process.
+  @param[in]     postShift bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   pCoeffs points to the array of filter coefficients stored in time reversed order:
+  
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  

+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   pState points to an array of length numTaps+blockSize-1 samples,
+                   where blockSize is the number of input samples processed by each call to arm_lms_norm_q31().
+ */
+
+void arm_lms_norm_init_q31(
+        arm_lms_norm_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint8_t postShift)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
+
+  /* Assign post Shift value applied to coefficients */
+  S->postShift = postShift;
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Initialize reciprocal pointer table */
+  S->recipTable = (q31_t *) armRecipTableQ31;
+
+  /* Initialise Energy to zero */
+  S->energy = 0;
+
+  /* Initialise x0 to zero */
+  S->x0 = 0;
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
new file mode 100644
index 00000000..14bbdc71
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
@@ -0,0 +1,297 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_q15.c
+ * Description:  Processing function for Q15 normalized LMS filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q15 normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and
+                   multiplications yield a 2.30 result. The 2.30 intermediate results are
+                   accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full
+                   precision of intermediate multiplications is preserved. After all additions
+                   have been performed, the accumulator is truncated to 34.15 format by
+                   discarding low 15 bits. Lastly, the accumulator is saturated to yield a
+                   result in 1.15 format.
+ @par
+  	               In this filter, filter coefficients are updated for each sample and the
+                   updation of filter cofficients are saturted.
+ */
+
+void arm_lms_norm_q15(
+        arm_lms_norm_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q15_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q31_t energy;                                  /* Energy of the input */
+        q15_t e = 0, d = 0;                            /* Error, reference data sample */
+        q15_t w = 0, in;                               /* Weight factor and state */
+        q15_t x0;                                      /* Temporary variable to hold input sample */
+        q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
+        q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
+        q31_t coef;                                    /* Temporary variable for coefficient */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
+        int32_t uShift = (32 - lShift);
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the sample from input buffer */
+    in = *pSrc++;
+
+    /* Update the energy calculation */
+    energy -= (((q31_t) x0 * (x0)) >> 15);
+    energy += (((q31_t) in * (in)) >> 15);
+
+    /* Set the accumulator to zero */
+    acc = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Calc lower part of acc */
+    acc_l = acc & 0xffffffff;
+
+    /* Calc upper part of acc */
+    acc_h = (acc >> 32) & 0xffffffff;
+
+    /* Apply shift for lower part of acc and upper part of acc */
+    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+    /* Converting the result to 1.15 format and saturate the output */
+    acc = __SSAT(acc, 16U);
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = (q15_t) acc;
+
+    /* Compute and store error */
+    d = *pRef++;
+    e = d - (q15_t) acc;
+    *pErr++ = e;
+
+    /* Calculation of 1/energy */
+    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, &oneByEnergy, S->recipTable);
+
+    /* Calculation of e * mu value */
+    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
+
+    /* Calculation of (e * mu) * (1/energy) value */
+    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
+
+    /* Weighting factor for the normalized version */
+    w = (q15_t) __SSAT((q31_t) acc, 16);
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    x0 = *pState;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Save energy and x0 values for the next frame */
+  S->energy = (q15_t) energy;
+  S->x0 = x0;
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
new file mode 100644
index 00000000..34cc34a8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
@@ -0,0 +1,311 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_q31.c
+ * Description:  Processing function for the Q31 NLMS filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Processing function for Q31 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q31 normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(numTaps) bits. The reference signal should not be scaled down.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is shifted
+                   and saturated to 1.31 format to yield the final result.
+                   The output signal and error signal are in 1.31 format.
+ @par
+  	               In this filter, filter coefficients are updated for each sample and the
+                   updation of filter cofficients are saturted.
+ */
+
+void arm_lms_norm_q31(
+        arm_lms_norm_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+        q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q31_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q63_t energy;                                  /* Energy of the input */
+        q31_t e = 0;                                   /* Error data sample */
+        q31_t w = 0, in;                               /* Weight factor and state */
+        q31_t x0;                                      /* Temporary variable to hold input sample */
+        q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
+        q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
+        q31_t coef;                                    /* Temporary variable for coef */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the sample from input buffer */
+    in = *pSrc++;
+
+    /* Update the energy calculation */
+    energy = (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
+    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
+
+    /* Set the accumulator to zero */
+    acc = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* acc +=  b[N] * x[n-N] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-1] * x[n-N-1] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-2] * x[n-N-2] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-3] * x[n-N-3] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Converting the result to 1.31 format */
+    /* Calc lower part of acc */
+    acc_l = acc & 0xffffffff;
+
+    /* Calc upper part of acc */
+    acc_h = (acc >> 32) & 0xffffffff;
+
+    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = (q31_t) acc;
+
+    /* Compute and store error */
+    e = *pRef++ - (q31_t) acc;
+    *pErr++ = e;
+
+    /* Calculates the reciprocal of energy */
+    postShift = arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
+
+    /* Calculation of product of (e * mu) */
+    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
+
+    /* Weighting factor for the normalized version */
+    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+
+      /* coef is in 2.30 format */
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      /* get coef in 1.31 format by left shifting */
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      /* update coefficient buffer to next coefficient */
+      pb++;
+
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Read the sample from state buffer */
+    x0 = *pState;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Save energy and x0 values for the next frame */
+  S->energy = (q31_t) energy;
+  S->x0 = x0;
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
new file mode 100644
index 00000000..ce4fd31b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
@@ -0,0 +1,262 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_q15.c
+ * Description:  Processing function for Q15 LMS filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 LMS filter.
+  @param[in]     S         points to an instance of the Q15 LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+  @par
+                   In this filter, filter coefficients are updated for each sample and
+                   the updation of filter cofficients are saturted.
+ */
+
+void arm_lms_q15(
+  const arm_lms_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q15_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q15_t e = 0;                                   /* Error of data sample */
+        q15_t alpha;                                   /* Intermediate constant for taps update */
+        q31_t coef;                                    /* Temporary variable for coefficient */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
+        int32_t uShift = (32 - lShift);
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Set the accumulator to zero */
+    acc = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Calc lower part of acc */
+    acc_l = acc & 0xffffffff;
+
+    /* Calc upper part of acc */
+    acc_h = (acc >> 32) & 0xffffffff;
+
+    /* Apply shift for lower part of acc and upper part of acc */
+    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+    /* Converting the result to 1.15 format and saturate the output */
+    acc = __SSAT(acc, 16U);
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = (q15_t) acc;
+
+    /* Compute and store error */
+    e = *pRef++ - (q15_t) acc;
+    *pErr++ = (q15_t) e;
+
+    /* Compute alpha i.e. intermediate constant for taps update */
+    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
+
+    /* Initialize pState pointer */
+    /* Advance state pointer by 1 for the next sample */
+    px = pState++;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
new file mode 100644
index 00000000..b9f7a73d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
@@ -0,0 +1,283 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_q31.c
+ * Description:  Processing function for the Q31 LMS filter
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Processing function for Q31 LMS filter.
+  @param[in]     S         points to an instance of the Q31 LMS filter structure.
+  @param[in]     pSrc      points to the block of input data.
+  @param[in]     pRef      points to the block of reference data.
+  @param[out]    pOut      points to the block of output data.
+  @param[out]    pErr      points to the block of error data.
+  @param[in]     blockSize number of samples to process.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clips.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(numTaps) bits.
+                   The reference signal should not be scaled down.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is shifted
+                   and saturated to 1.31 format to yield the final result.
+                   The output signal and error signal are in 1.31 format.
+ @par
+                   In this filter, filter coefficients are updated for each sample and
+                   the updation of filter cofficients are saturted.
+ */
+
+void arm_lms_q31(
+  const arm_lms_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize)
+{       
+        q31_t *pState = S->pState;                     /* State pointer */
+        q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q31_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q31_t e = 0;                                   /* Error of data sample */
+        q31_t alpha;                                   /* Intermediate constant for taps update */
+        q31_t coef;                                    /* Temporary variable for coef */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Set the accumulator to zero */
+    acc = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* acc +=  b[N] * x[n-N] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-1] * x[n-N-1] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-2] * x[n-N-2] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-3] * x[n-N-3] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Converting the result to 1.31 format */
+    /* Calc lower part of acc */
+    acc_l = acc & 0xffffffff;
+
+    /* Calc upper part of acc */
+    acc_h = (acc >> 32) & 0xffffffff;
+
+    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = (q31_t) acc;
+
+    /* Compute and store error */
+    e = *pRef++ - (q31_t) acc;
+    *pErr++ = e;
+
+    /* Compute alpha i.e. intermediate constant for taps update */
+    alpha = (q31_t) (((q63_t) e * mu) >> 31);
+
+    /* Initialize pState pointer */
+    /* Advance state pointer by 1 for the next sample */
+    px = pState++;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+
+      /* coef is in 2.30 format */
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      /* get coef in 1.31 format by left shifting */
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      /* update coefficient buffer to next coefficient */
+      pb++;
+
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c
new file mode 100644
index 00000000..79d7be23
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c
@@ -0,0 +1,53 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        MatrixFunctions.c
+ * Description:  Combination of all matrix function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_mat_add_f32.c"
+#include "arm_mat_add_q15.c"
+#include "arm_mat_add_q31.c"
+#include "arm_mat_cmplx_mult_f32.c"
+#include "arm_mat_cmplx_mult_q15.c"
+#include "arm_mat_cmplx_mult_q31.c"
+#include "arm_mat_init_f32.c"
+#include "arm_mat_init_q15.c"
+#include "arm_mat_init_q31.c"
+#include "arm_mat_inverse_f32.c"
+#include "arm_mat_inverse_f64.c"
+#include "arm_mat_mult_f32.c"
+#include "arm_mat_mult_fast_q15.c"
+#include "arm_mat_mult_fast_q31.c"
+#include "arm_mat_mult_q15.c"
+#include "arm_mat_mult_q31.c"
+#include "arm_mat_scale_f32.c"
+#include "arm_mat_scale_q15.c"
+#include "arm_mat_scale_q31.c"
+#include "arm_mat_sub_f32.c"
+#include "arm_mat_sub_q15.c"
+#include "arm_mat_sub_q31.c"
+#include "arm_mat_trans_f32.c"
+#include "arm_mat_trans_q15.c"
+#include "arm_mat_trans_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
new file mode 100644
index 00000000..7f9ec085
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
@@ -0,0 +1,232 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_add_f32.c
+ * Description:  Floating-point matrix addition
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixAdd Matrix Addition
+
+  Adds two matrices.
+  \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"
+
+  The functions check to make sure that
+  pSrcA, pSrcB, and pDst have the same
+  number of rows and columns.
+ */
+
+/**
+  @addtogroup MatrixAdd
+  @{
+ */
+
+
+/**
+  @brief         Floating-point matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_NEON)
+/*
+
+Neon version is assuming the matrix is small enough.
+So no blocking is used for taking into account cache effects.
+For big matrix, there exist better libraries for Neon.
+
+*/
+arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A  */
+  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
+
+  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix  */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+     (pSrcA->numCols != pSrcB->numCols) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif
+  {
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+
+    /* Total number of samples in the input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+    blkCnt = numSamples >> 2U;
+
+    /* Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+      /* Add and then store the results in the destination buffer. */
+      vec1 = vld1q_f32(pIn1);
+      vec2 = vld1q_f32(pIn2);
+      res = vaddq_f32(vec1, vec2);
+      vst1q_f32(pOut, res);
+
+      /* update pointers to process next samples */
+      pIn1 += 4U;
+      pIn2 += 4U;
+      pOut += 4U;
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = numSamples % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+      /* Add and then store the results in the destination buffer. */
+      *pOut++ = (*pIn1++) + (*pIn2++);
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add and store result in destination buffer. */
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add and store result in destination buffer. */
+      *pOut++ = *pInA++ + *pInB++;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of MatrixAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
new file mode 100644
index 00000000..1e892fb3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
@@ -0,0 +1,149 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_add_q15.c
+ * Description:  Q15 matrix addition
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixAdd
+  @{
+ */
+
+/**
+  @brief         Q15 matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+arm_status arm_mat_add_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst)
+{
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+        
+        uint32_t numSamples;                           /* total number of elements in the matrix */
+        uint32_t blkCnt;                               /* loop counters */
+        arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
+
+      write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
new file mode 100644
index 00000000..a9616f35
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
@@ -0,0 +1,139 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_add_q31.c
+ * Description:  Q31 matrix addition
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixAdd
+  @{
+ */
+
+/**
+  @brief         Q31 matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+arm_status arm_mat_add_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
new file mode 100644
index 00000000..448122a6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
@@ -0,0 +1,631 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_mult_f32.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup CmplxMatrixMult  Complex Matrix Multiplication
+
+  Complex Matrix multiplication is only defined if the number of columns of the
+  first matrix equals the number of rows of the second matrix.
+  Multiplying an M x N matrix with an N x P matrix results
+  in an M x P matrix.
+  @par
+  When matrix size checking is enabled, the functions check:
+   - that the inner dimensions of pSrcA and pSrcB are equal;
+   - that the size of the output matrix equals the outer dimensions of pSrcA and pSrcB.
+ */
+
+
+/**
+  @addtogroup CmplxMatrixMult
+  @{
+ */
+
+/**
+  @brief         Floating-point Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_NEON)
+arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
+  float32_t sumReal1, sumImag1;                  /* accumulator */
+  float32_t a0, b0, c0, d0;
+  float32_t a1, a1B,b1, b1B, c1, d1;
+  float32_t sumReal2, sumImag2;                  /* accumulator */
+
+
+  float32x4x2_t a0V, a1V;
+  float32x4_t accR0,accI0, accR1,accI1,tempR, tempI;
+  float32x2_t accum = vdup_n_f32(0);
+  float32_t *pIn1B = pSrcA->pData;    
+
+  uint16_t col, i = 0U, j, rowCnt, row = numRowsA, colCnt;      /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+  float32_t sumReal1B, sumImag1B; 
+  float32_t sumReal2B, sumImag2B; 
+  float32_t *pxB;  
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+  {
+
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+
+    rowCnt = row >> 1;
+
+    /* Row loop */
+    while (rowCnt > 0U)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+      pxB = px + 2 * numColsB;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      while (col > 0U)
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal1 = 0.0f;
+        sumImag1 = 0.0f;
+        sumReal1B = 0.0f;
+        sumImag1B = 0.0f;
+
+        sumReal2 = 0.0f;
+        sumImag2 = 0.0f;
+        sumReal2B = 0.0f;
+        sumImag2B = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+        pIn1B = pIn1 + 2*numColsA;
+
+        accR0 = vdupq_n_f32(0.0);
+        accI0 = vdupq_n_f32(0.0);
+        accR1 = vdupq_n_f32(0.0);
+        accI1 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2;
+
+        /* Matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* Reading real part of complex matrix A */
+          a0V = vld2q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          a1V = vld2q_f32(pIn1B);  // load & separate real/imag pSrcA (de-interleave 2)
+
+          pIn1 += 8;
+          pIn1B += 8;
+
+          tempR[0] = *pIn2;
+          tempI[0] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[1] = *pIn2;
+          tempI[1] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[2] = *pIn2;
+          tempI[2] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[3] = *pIn2;
+          tempI[3] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          accR0 = vmlaq_f32(accR0,a0V.val[0],tempR);
+          accR0 = vmlsq_f32(accR0,a0V.val[1],tempI);
+
+          accI0 = vmlaq_f32(accI0,a0V.val[1],tempR);
+          accI0 = vmlaq_f32(accI0,a0V.val[0],tempI);
+
+          accR1 = vmlaq_f32(accR1,a1V.val[0],tempR);
+          accR1 = vmlsq_f32(accR1,a1V.val[1],tempI);
+
+          accI1 = vmlaq_f32(accI1,a1V.val[1],tempR);
+          accI1 = vmlaq_f32(accI1,a1V.val[0],tempI);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0));
+        sumReal1 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0));
+        sumImag1 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(accR1), vget_high_f32(accR1));
+        sumReal1B += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(accI1), vget_high_f32(accI1));
+        sumImag1B += accum[0] + accum[1];
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA & 3;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a1 = *pIn1;
+          a1B = *pIn1B;
+
+          c1 = *pIn2;
+
+          b1 = *(pIn1 + 1U);
+          b1B = *(pIn1B + 1U);
+
+          d1 = *(pIn2 + 1U);
+
+          sumReal1 += a1 * c1;
+          sumImag1 += b1 * c1;
+
+          sumReal1B += a1B * c1;
+          sumImag1B += b1B * c1;
+
+          pIn1 += 2U;
+          pIn1B += 2U;
+          pIn2 += 2 * numColsB;
+
+          sumReal2 -= b1 * d1;
+          sumImag2 += a1 * d1;
+
+          sumReal2B -= b1B * d1;
+          sumImag2B += a1B * d1;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        sumReal1 += sumReal2;
+        sumImag1 += sumImag2;
+
+        sumReal1B += sumReal2B;
+        sumImag1B += sumImag2B;
+
+        /* Store the result in the destination buffer */
+        *px++ = sumReal1;
+        *px++ = sumImag1;
+        *pxB++ = sumReal1B;
+        *pxB++ = sumImag1B;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement the column loop counter */
+        col--;
+      } 
+
+      /* Update the pointer pInA to point to the  starting address of the next 2 row */
+      i = i + 2*numColsB;
+      pInA = pInA + 4 * numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+    }
+
+    rowCnt = row & 1;
+    while (rowCnt > 0U)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      while (col > 0U)
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal1 = 0.0f;
+        sumImag1 = 0.0f;
+
+        sumReal2 = 0.0f;
+        sumImag2 = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+
+        accR0 = vdupq_n_f32(0.0);
+        accI0 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2;
+
+        /* Matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* Reading real part of complex matrix A */
+          a0V = vld2q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          pIn1 += 8;
+
+          tempR[0] = *pIn2;
+          tempI[0] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[1] = *pIn2;
+          tempI[1] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[2] = *pIn2;
+          tempI[2] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          tempR[3] = *pIn2;
+          tempI[3] = *(pIn2 + 1U);
+          pIn2 += 2 * numColsB;
+
+          accR0 = vmlaq_f32(accR0,a0V.val[0],tempR);
+          accR0 = vmlsq_f32(accR0,a0V.val[1],tempI);
+
+          accI0 = vmlaq_f32(accI0,a0V.val[1],tempR);
+          accI0 = vmlaq_f32(accI0,a0V.val[0],tempI);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0));
+        sumReal1 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0));
+        sumImag1 += accum[0] + accum[1];
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA & 3;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a1 = *pIn1;
+          c1 = *pIn2;
+
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          sumReal1 += a1 * c1;
+          sumImag1 += b1 * c1;
+
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          sumReal2 -= b1 * d1;
+          sumImag2 += a1 * d1;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        sumReal1 += sumReal2;
+        sumImag1 += sumImag2;
+
+        /* Store the result in the destination buffer */
+        *px++ = sumReal1;
+        *px++ = sumImag1;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement the column loop counter */
+        col--;
+
+      } 
+
+      /* Update the pointer pInA to point to the  starting address of the next row */
+      i = i + numColsB;
+      pInA = pInA + 2 * numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  float32_t sumReal, sumImag;                    /* Accumulator */
+  float32_t a1, b1, c1, d1;
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  float32_t a0, b0, c0, d0;
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal = 0.0f;
+        sumImag = 0.0f;
+
+        /* Initiate pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+
+          /* Reading real part of complex matrix A */
+          a0 = *pIn1;
+
+          /* Reading real part of complex matrix B */
+          c0 = *pIn2;
+
+          /* Reading imaginary part of complex matrix A */
+          b0 = *(pIn1 + 1U);
+
+          /* Reading imaginary part of complex matrix B */
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a0 * c0;
+          sumImag += b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b0 * d0;
+          sumImag += a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          a0 = *(pIn1     );
+          c0 = *(pIn2     );
+          b0 = *(pIn1 + 1U);
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a0 * c0;
+          sumImag += b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b0 * d0;
+          sumImag += a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          /* Decrement loop count */
+          colCnt--;
+        }
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = sumReal;
+        *px++ = sumImag;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + 2 * numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
new file mode 100644
index 00000000..9c417aa6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
@@ -0,0 +1,340 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mat_mult_q15.c
+ * Description:  Q15 complex matrix multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup CmplxMatrixMult
+  @{
+ */
+
+/**
+  @brief         Q15 Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @param[in]     pScratch   points to an array for storing intermediate results
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Conditions for optimum performance
+                   Input, output and state buffers should be aligned by 32-bit
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator. The inputs to the
+                   multiplications are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
+                   truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+ */
+
+arm_status arm_mat_cmplx_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pScratch)
+{
+        q15_t *pSrcBT = pScratch;                      /* input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A */
+        q63_t sumReal, sumImag;                        /* accumulator */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+
+#if defined (ARM_MATH_DSP)
+        q31_t prod1, prod2;
+        q31_t pSourceA, pSourceB;
+#else
+        q15_t a, b, c, d;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose */
+    do
+    {
+      /* The pointer px is set to starting address of column being processed */
+      px = pSrcBT + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Apply loop unrolling and exchange the columns with row elements */
+      col = numColsB >> 2;
+
+      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+         a second loop below computes the remaining 1 to 3 samples. */
+      while (col > 0U)
+      {
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
+       ** No loop unrolling is used. */
+      col = numColsB % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        col = numColsB;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i = i + 2U;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Reset variables for usage in following multiplication process */
+    row = numRowsA;
+    i = 0U;
+    px = pDst->pData;
+
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
+      pInB = pSrcBT;
+
+      /* column loop */
+      do
+      {
+        /* Set variable sum, that acts as accumulator, to zero */
+        sumReal = 0;
+        sumImag = 0;
+
+        /* Initiate pointer pInA to point to starting address of column being processed */
+        pInA = pSrcA->pData + i * 2;
+
+        /* Apply loop unrolling and compute 2 MACs simultaneously. */
+        colCnt = numColsA >> 1U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+#if defined (ARM_MATH_DSP)
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+          /* read real and imag values from pSrcA buffer */
+          a = *pInA;
+          b = *(pInA + 1U);
+          /* read real and imag values from pSrcB buffer */
+          c = *pInB;
+          d = *(pInB + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q31_t) a *c;
+          sumImag += (q31_t) a *d;
+          sumReal -= (q31_t) b *d;
+          sumImag += (q31_t) b *c;
+
+          /* read next real and imag values from pSrcA buffer */
+          a = *(pInA + 2U);
+          b = *(pInA + 3U);
+          /* read next real and imag values from pSrcB buffer */
+          c = *(pInB + 2U);
+          d = *(pInB + 3U);
+
+          /* update pointer */
+          pInA += 4U;
+
+          /* Multiply and Accumlates */
+          sumReal += (q31_t) a * c;
+          sumImag += (q31_t) a * d;
+          sumReal -= (q31_t) b * d;
+          sumImag += (q31_t) b * c;
+          /* update pointer */
+          pInB += 4U;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* process odd column samples */
+        if ((numColsA & 0x1U) > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+#if defined (ARM_MATH_DSP)
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          a = *pInA++;
+          b = *pInA++;
+          c = *pInB++;
+          d = *pInB++;
+
+          /* Multiply and Accumlates */
+          sumReal += (q31_t) a * c;
+          sumImag += (q31_t) a * d;
+          sumReal -= (q31_t) b * d;
+          sumImag += (q31_t) b * c;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+        }
+
+        /* Saturate and store result in destination buffer */
+        *px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
+        *px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      i = i + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
new file mode 100644
index 00000000..0060fcb7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
@@ -0,0 +1,283 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_mult_q31.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup CmplxMatrixMult
+  @{
+ */
+
+/**
+  @brief         Q31 Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit. There is no saturation
+                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
+                   distorts the result. The input signals should be scaled down to avoid intermediate
+                   overflows. The input is thus scaled down by log2(numColsA) bits
+                   to avoid overflows, as a total of numColsA additions are performed internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+ */
+
+arm_status arm_mat_cmplx_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  q63_t sumReal, sumImag;                        /* Accumulator */
+  q31_t a1, b1, c1, d1;
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t a0, b0, c0, d0;
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal = 0.0;
+        sumImag = 0.0;
+
+        /* Initiate pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+
+          /* Reading real part of complex matrix A */
+          a0 = *pIn1;
+
+          /* Reading real part of complex matrix B */
+          c0 = *pIn2;
+
+          /* Reading imaginary part of complex matrix A */
+          b0 = *(pIn1 + 1U);
+
+          /* Reading imaginary part of complex matrix B */
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a0 * c0;
+          sumImag += (q63_t) b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b0 * d0;
+          sumImag += (q63_t) a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
+
+          a0 = *(pIn1     );
+          c0 = *(pIn2     );
+          b0 = *(pIn1 + 1U);
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a0 * c0;
+          sumImag += (q63_t) b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b0 * d0;
+          sumImag += (q63_t) a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
+
+          /* Decrement loop count */
+          colCnt--;
+        }
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = (q31_t) clip_q63_to_q31(sumReal >> 31);
+        *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31);
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + 2 * numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
new file mode 100644
index 00000000..5fcd1219
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
@@ -0,0 +1,76 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_init_f32.c
+ * Description:  Floating-point matrix initialization
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixInit Matrix Initialization
+ 
+  Initializes the underlying matrix data structure.
+  The functions set the numRows,
+  numCols, and pData fields
+  of the matrix data structure.
+ */
+
+/**
+  @addtogroup MatrixInit
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix initialization.
+  @param[in,out] S         points to an instance of the floating-point matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
+
+void arm_mat_init_f32(
+  arm_matrix_instance_f32 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  float32_t * pData)
+{
+  /* Assign Number of Rows */
+  S->numRows = nRows;
+
+  /* Assign Number of Columns */
+  S->numCols = nColumns;
+
+  /* Assign Data pointer */
+  S->pData = pData;
+}
+
+/**
+  @} end of MatrixInit group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
new file mode 100644
index 00000000..28d8d65a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
@@ -0,0 +1,67 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_init_q15.c
+ * Description:  Q15 matrix initialization
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixInit
+  @{
+ */
+
+/**
+  @brief         Q15 matrix initialization.
+  @param[in,out] S         points to an instance of the floating-point matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
+
+void arm_mat_init_q15(
+  arm_matrix_instance_q15 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  q15_t * pData)
+{
+  /* Assign Number of Rows */
+  S->numRows = nRows;
+
+  /* Assign Number of Columns */
+  S->numCols = nColumns;
+
+  /* Assign Data pointer */
+  S->pData = pData;
+}
+
+/**
+  @} end of MatrixInit group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
new file mode 100644
index 00000000..b691edea
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
@@ -0,0 +1,72 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_init_q31.c
+ * Description:  Q31 matrix initialization
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixInit Matrix Initialization
+ 
+ */
+
+/**
+  @addtogroup MatrixInit
+  @{
+ */
+
+/**
+  @brief         Q31 matrix initialization.
+  @param[in,out] S         points to an instance of the Q31 matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
+
+void arm_mat_init_q31(
+  arm_matrix_instance_q31 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  q31_t * pData)
+{
+  /* Assign Number of Rows */
+  S->numRows = nRows;
+
+  /* Assign Number of Columns */
+  S->numCols = nColumns;
+
+  /* Assign Data pointer */
+  S->pData = pData;
+}
+
+/**
+  @} end of MatrixInit group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
new file mode 100644
index 00000000..df84b4d9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
@@ -0,0 +1,1127 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_inverse_f32.c
+ * Description:  Floating-point matrix inverse
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixInv Matrix Inverse
+
+  Computes the inverse of a matrix.
+
+  The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero).
+  The function checks that the input and output matrices are square and of the same size.
+
+  Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
+  inversion of floating-point matrices.
+
+  @par Algorithm
+  The Gauss-Jordan method is used to find the inverse.
+  The algorithm performs a sequence of elementary row-operations until it
+  reduces the input matrix to an identity matrix. Applying the same sequence
+  of elementary row-operations to an identity matrix yields the inverse matrix.
+  If the input matrix is singular, then the algorithm terminates and returns error status
+  ARM_MATH_SINGULAR.
+  \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
+ */
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix inverse.
+  @param[in]     pSrc      points to input matrix structure
+  @param[out]    pDst      points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
+ */
+#if defined(ARM_MATH_NEON)
+arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
+  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
+  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
+  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
+  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
+
+  float32_t maxC;                                /* maximum value in the column */
+
+  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+  float32x4_t vec1;
+  float32x4_t vec2;
+  float32x4_t tmpV;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
+     || (pSrc->numRows != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+   /*--------------------------------------------------------------------------------------------------------------
+   * Matrix Inverse can be solved using elementary row operations.
+   *
+   *  Gauss-Jordan Method:
+   *
+   *     1. First combine the identity matrix and the input matrix separated by a bar to form an
+   *        augmented matrix as follows:
+   *              _                  _         _         _
+   *             |  a11  a12 | 1   0  |       |  X11 X12  |
+   *             |           |        |   =   |           |
+   *             |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+   *
+   *    2. In our implementation, pDst Matrix is used as identity matrix.
+   *
+   *    3. Begin with the first row. Let i = 1.
+   *
+   *      4. Check to see if the pivot for column i is the greatest of the column.
+   *       The pivot is the element of the main diagonal that is on the current row.
+   *       For instance, if working with row i, then the pivot element is aii.
+   *       If the pivot is not the most significant of the columns, exchange that row with a row
+   *       below it that does contain the most significant value in column i. If the most
+   *         significant value of the column is zero, then an inverse to that matrix does not exist.
+   *       The most significant value of the column is the absolute maximum.
+   *
+   *      5. Divide every element of row i by the pivot.
+   *
+   *      6. For every row below and  row i, replace that row with the sum of that row and
+   *       a multiple of row i so that each new element in column i below row i is zero.
+   *
+   *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+   *       for every element below and above the main diagonal.
+   *
+   *    8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+   *       Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+   *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0f;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Decrement the loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Grab the most significant value from column l */
+      maxC = 0;
+
+      for (i = l; i < numRows; i++)
+      {
+        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
+        pInT1 += numCols;
+      }
+
+      /* Update the status if the matrix is singular */
+      if (maxC == 0.0f)
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Restore pInT1 */
+      pInT1 = pIn;
+
+      /* Destination pointer modifier */
+      k = 1U;
+
+      /* Check if the pivot element is the most significant of the column */
+      if ( (in > 0.0f ? in : -in) != maxC)
+      {
+        /* Loop over the number rows present below */
+        i = numRows - (l + 1U);
+
+        while (i > 0U)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * l);
+          pOutT2 = pOutT1 + (numCols * k);
+
+          /* Look for the most significant element to
+           * replace in the rows below */
+          if ((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            j = numCols - l;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Loop over number of columns of the destination matrix */
+            j = numCols;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the destination matrix */
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+          /* Update the destination pointer modifier */
+          k++;
+
+          /* Decrement the loop counter */
+          i--;
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0f))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pInT2 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *pPivotRowIn;
+      tmpV = vdupq_n_f32(1.0/in);
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      j = (numCols - l) >> 2;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        vec1 = vld1q_f32(pInT1);
+
+        vec1 = vmulq_f32(vec1, tmpV);
+        vst1q_f32(pInT1, vec1);
+        pInT1 += 4;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Tail */
+      j = (numCols - l) & 3;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        in1 = *pInT1;
+        *pInT1++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Loop over number of columns of the destination matrix */
+      j = numCols >> 2;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        vec1 = vld1q_f32(pInT2);
+
+        vec1 = vmulq_f32(vec1, tmpV);
+        vst1q_f32(pInT2, vec1);
+        pInT2 += 4;
+      
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Tail */
+      j = numCols & 3;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        in1 = *pInT2;
+        *pInT2++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pInT2 = pOut;
+
+      /* index used to check for pivot element */
+      i = 0U;
+
+      /* Loop over number of rows */
+      /*  to be replaced by the sum of that row and a multiple of row i */
+      k = numRows;
+
+      while (k > 0U)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+
+          pInT2 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+          tmpV = vdupq_n_f32(in);
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          j = (numCols - l) >> 2;
+	  
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            vec1 = vld1q_f32(pInT1);
+            vec2 = vld1q_f32(pPRT_in);
+            vec1 = vmlsq_f32(vec1, tmpV, vec2);
+            vst1q_f32(pInT1, vec1);
+            pPRT_in += 4;
+            pInT1 += 4;
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+	  /* Tail */
+          j = (numCols - l) & 3;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT1;
+            *pInT1++ = in1 - (in * *pPRT_in++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          j = numCols >> 2;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            vec1 = vld1q_f32(pInT2);
+            vec2 = vld1q_f32(pPRT_pDst);
+            vec1 = vmlsq_f32(vec1, tmpV, vec2);
+            vst1q_f32(pInT2, vec1);
+            pPRT_pDst += 4;
+            pInT2 += 4;
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+	  /* Tail */
+          j = numCols & 3;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT2;
+            *pInT2++ = in1 - (in * *pPRT_pDst++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+        }
+
+        /* Increment the temporary input pointer */
+        pInT1 = pInT1 + l;
+
+        /* Decrement the loop counter */
+        k--;
+
+        /* Increment the pivot index */
+        i++;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    if ((flag != 1U) && (in == 0.0f))
+    {
+      pIn = pSrc->pData;
+      for (i = 0; i < numRows * numCols; i++)
+      {
+        if (pIn[i] != 0.0f)
+            break;
+      }
+
+      if (i == numRows * numCols)
+        status = ARM_MATH_SINGULAR;
+    }
+  }
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
+  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
+  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
+  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
+  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
+
+#if defined (ARM_MATH_DSP)
+  float32_t maxC;                                /* maximum value in the column */
+
+  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _                  _         _         _
+     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
+     *                     |           |        |   =   |           |
+     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for column i is the greatest of the column.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is not the most significant of the columns, exchange that row with a row
+     *         below it that does contain the most significant value in column i. If the most
+     *         significant value of the column is zero, then an inverse to that matrix does not exist.
+     *         The most significant value of the column is the absolute maximum.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0f;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Grab the most significant value from column l */
+      maxC = 0;
+      for (i = l; i < numRows; i++)
+      {
+        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
+        pInT1 += numCols;
+      }
+
+      /* Update the status if the matrix is singular */
+      if (maxC == 0.0f)
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Restore pInT1  */
+      pInT1 = pIn;
+
+      /* Destination pointer modifier */
+      k = 1U;
+
+      /* Check if the pivot element is the most significant of the column */
+      if ( (in > 0.0f ? in : -in) != maxC)
+      {
+        /* Loop over the number rows present below */
+        i = numRows - (l + 1U);
+
+        while (i > 0U)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * l);
+          pOutT2 = pOutT1 + (numCols * k);
+
+          /* Look for the most significant element to
+           * replace in the rows below */
+          if ((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            j = numCols - l;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Loop over number of columns of the destination matrix */
+            j = numCols;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the destination matrix */
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+
+              /* Decrement loop counter */
+              j--;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+          /* Update the destination pointer modifier */
+          k++;
+
+          /* Decrement loop counter */
+          i--;
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0f))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pInT2 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *pPivotRowIn;
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      j = (numCols - l);
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        in1 = *pInT1;
+        *pInT1++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Loop over number of columns of the destination matrix */
+      j = numCols;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        in1 = *pInT2;
+        *pInT2++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pInT2 = pOut;
+
+      /* index used to check for pivot element */
+      i = 0U;
+
+      /* Loop over number of rows */
+      /*  to be replaced by the sum of that row and a multiple of row i */
+      k = numRows;
+
+      while (k > 0U)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+
+          pInT2 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          j = (numCols - l);
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT1;
+            *pInT1++ = in1 - (in * *pPRT_in++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          j = numCols;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT2;
+            *pInT2++ = in1 - (in * *pPRT_pDst++);
+
+            /* Decrement loop counter */
+            j--;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+
+        /* Decrement loop counter */
+        k--;
+
+        /* Increment pivot index */
+        i++;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+
+#else
+
+  float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _  _          _     _      _   _         _         _
+     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
+     *                     |  |            | | |        |   |   =   |           |
+     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0f;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Destination pointer modifier */
+      k = 1U;
+
+      /* Check if the pivot element is zero */
+      if (*pInT1 == 0.0f)
+      {
+        /* Loop over the number rows present below */
+        for (i = (l + 1U); i < numRows; i++)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * l);
+          pOutT2 = pOutT1 + (numCols * k);
+
+          /* Check if there is a non zero pivot element to
+           * replace in the rows below */
+          if (*pInT2 != 0.0f)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            for (j = 0U; j < (numCols - l); j++)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+            }
+
+            for (j = 0U; j < numCols; j++)
+            {
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+          /* Update the destination pointer modifier */
+          k++;
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0f))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pOutT1 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *(pIn + (l * numCols));
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      for (j = 0U; j < (numCols - l); j++)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        *pInT1 = *pInT1 / in;
+        pInT1++;
+      }
+      for (j = 0U; j < numCols; j++)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        *pOutT1 = *pOutT1 / in;
+        pOutT1++;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pOutT1 = pOut;
+
+      for (i = 0U; i < numRows; i++)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+          pOutT1 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          for (j = 0U; j < (numCols - l); j++)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            *pInT1 = *pInT1 - (in * *pPRT_in++);
+            pInT1++;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          for (j = 0U; j < numCols; j++)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
+            pOutT1++;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    if ((flag != 1U) && (in == 0.0f))
+    {
+      pIn = pSrc->pData;
+      for (i = 0; i < numRows * numCols; i++)
+      {
+        if (pIn[i] != 0.0f)
+            break;
+      }
+
+      if (i == numRows * numCols)
+        status = ARM_MATH_SINGULAR;
+    }
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of MatrixInv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
new file mode 100644
index 00000000..17390c80
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
@@ -0,0 +1,673 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_inverse_f64.c
+ * Description:  Floating-point matrix inverse
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+/**
+  @brief         Floating-point (64 bit) matrix inverse.
+  @param[in]     pSrc      points to input matrix structure
+  @param[out]    pDst      points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
+ */
+
+arm_status arm_mat_inverse_f64(
+  const arm_matrix_instance_f64 * pSrc,
+        arm_matrix_instance_f64 * pDst)
+{
+  float64_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float64_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float64_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
+  float64_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
+  float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
+  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
+  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
+
+#if defined (ARM_MATH_DSP)
+  float64_t maxC;                                /* maximum value in the column */
+
+  float64_t Xchg, in = 0.0, in1;                /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _                  _         _         _
+     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
+     *                     |           |        |   =   |           |
+     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for column i is the greatest of the column.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is not the most significant of the columns, exchange that row with a row
+     *         below it that does contain the most significant value in column i. If the most
+     *         significant value of the column is zero, then an inverse to that matrix does not exist.
+     *         The most significant value of the column is the absolute maximum.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Grab the most significant value from column l */
+      maxC = 0;
+      for (i = l; i < numRows; i++)
+      {
+        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
+        pInT1 += numCols;
+      }
+
+      /* Update the status if the matrix is singular */
+      if (maxC == 0.0)
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Restore pInT1  */
+      pInT1 = pIn;
+
+      /* Destination pointer modifier */
+      k = 1U;
+
+      /* Check if the pivot element is the most significant of the column */
+      if ( (in > 0.0 ? in : -in) != maxC)
+      {
+        /* Loop over the number rows present below */
+        i = numRows - (l + 1U);
+
+        while (i > 0U)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * l);
+          pOutT2 = pOutT1 + (numCols * k);
+
+          /* Look for the most significant element to
+           * replace in the rows below */
+          if ((*pInT2 > 0.0 ? *pInT2: -*pInT2) == maxC)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            j = numCols - l;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Loop over number of columns of the destination matrix */
+            j = numCols;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the destination matrix */
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+
+              /* Decrement loop counter */
+              j--;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+          /* Update the destination pointer modifier */
+          k++;
+
+          /* Decrement loop counter */
+          i--;
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pInT2 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *pPivotRowIn;
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      j = (numCols - l);
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        in1 = *pInT1;
+        *pInT1++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Loop over number of columns of the destination matrix */
+      j = numCols;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        in1 = *pInT2;
+        *pInT2++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pInT2 = pOut;
+
+      /* index used to check for pivot element */
+      i = 0U;
+
+      /* Loop over number of rows */
+      /*  to be replaced by the sum of that row and a multiple of row i */
+      k = numRows;
+
+      while (k > 0U)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+
+          pInT2 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          j = (numCols - l);
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT1;
+            *pInT1++ = in1 - (in * *pPRT_in++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          j = numCols;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT2;
+            *pInT2++ = in1 - (in * *pPRT_pDst++);
+
+            /* Decrement loop counter */
+            j--;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+
+        /* Decrement loop counter */
+        k--;
+
+        /* Increment pivot index */
+        i++;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+
+#else
+
+  float64_t Xchg, in = 0.0;                     /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _  _          _     _      _   _         _         _
+     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
+     *                     |  |            | | |        |   |   =   |           |
+     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Destination pointer modifier */
+      k = 1U;
+
+      /* Check if the pivot element is zero */
+      if (*pInT1 == 0.0)
+      {
+        /* Loop over the number rows present below */
+        for (i = (l + 1U); i < numRows; i++)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * l);
+          pOutT2 = pOutT1 + (numCols * k);
+
+          /* Check if there is a non zero pivot element to
+           * replace in the rows below */
+          if (*pInT2 != 0.0)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            for (j = 0U; j < (numCols - l); j++)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+            }
+
+            for (j = 0U; j < numCols; j++)
+            {
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+          /* Update the destination pointer modifier */
+          k++;
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pOutT1 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *(pIn + (l * numCols));
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      for (j = 0U; j < (numCols - l); j++)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        *pInT1 = *pInT1 / in;
+        pInT1++;
+      }
+      for (j = 0U; j < numCols; j++)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        *pOutT1 = *pOutT1 / in;
+        pOutT1++;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pOutT1 = pOut;
+
+      for (i = 0U; i < numRows; i++)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+          pOutT1 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          for (j = 0U; j < (numCols - l); j++)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            *pInT1 = *pInT1 - (in * *pPRT_in++);
+            pInT1++;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          for (j = 0U; j < numCols; j++)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
+            pOutT1++;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    if ((flag != 1U) && (in == 0.0))
+    {
+      pIn = pSrc->pData;
+      for (i = 0; i < numRows * numCols; i++)
+      {
+        if (pIn[i] != 0.0)
+            break;
+      }
+
+      if (i == numRows * numCols)
+        status = ARM_MATH_SINGULAR;
+    }
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixInv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
new file mode 100644
index 00000000..35517d60
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
@@ -0,0 +1,534 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_f32.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+ * @ingroup groupMatrix
+ */
+
+/**
+ * @defgroup MatrixMult Matrix Multiplication
+ *
+ * Multiplies two matrices.
+ *
+ * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"
+
+ * Matrix multiplication is only defined if the number of columns of the
+ * first matrix equals the number of rows of the second matrix.
+ * Multiplying an M x N matrix with an N x P matrix results
+ * in an M x P matrix.
+ * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
+ * pSrcA and pSrcB are equal; and (2) that the size of the output
+ * matrix equals the outer dimensions of pSrcA and pSrcB.
+ */
+
+
+/**
+ * @addtogroup MatrixMult
+ * @{
+ */
+
+/**
+ * @brief Floating-point matrix multiplication.
+ * @param[in]       *pSrcA points to the first input matrix structure
+ * @param[in]       *pSrcB points to the second input matrix structure
+ * @param[out]      *pDst points to output matrix structure
+ * @return     		The function returns either
+ * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
+ */
+#if defined(ARM_MATH_NEON)
+
+#define GROUPOFROWS 8
+
+arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  float32_t sum;                                 /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
+
+
+  float32_t in1, in2, in3, in4;
+  uint16_t col, i = 0U, j, row = numRowsA, rowCnt, colCnt;      /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+
+  float32x4_t a0V, a1V, a2V, a3V, a4V, a5V, a6V, a7V;
+  float32x4_t acc0,acc1,acc2,acc3,acc4,acc5,acc6,acc7,temp;
+  float32x2_t accum = vdup_n_f32(0);
+  float32_t *pIn1B = pSrcA->pData;    
+  float32_t *pIn1C = pSrcA->pData;    
+  float32_t *pIn1D = pSrcA->pData;  
+  float32_t *pIn1E = pSrcA->pData; 
+  float32_t *pIn1F = pSrcA->pData; 
+  float32_t *pIn1G = pSrcA->pData; 
+  float32_t *pIn1H = pSrcA->pData;   
+
+  float32_t *pxB,*pxC, *pxD, *pxE, *pxF, *pxG, *pxH;                                 /* Temporary output data matrix pointer */
+  float32_t sum0,sum1, sum2,sum3, sum4, sum5 , sum6, sum7;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* Row loop */
+    rowCnt = row >> 3;
+
+    while(rowCnt > 0)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + GROUPOFROWS*i;
+      pxB = px + numColsB;
+      pxC = px + 2*numColsB;
+      pxD = px + 3*numColsB;
+      pxE = px + 4*numColsB;
+      pxF = px + 5*numColsB;
+      pxG = px + 6*numColsB;
+      pxH = px + 7*numColsB;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum0 = 0.0f;
+        sum1 = 0.0f;
+        sum2 = 0.0f;
+        sum3 = 0.0f;
+        sum4 = 0.0f;
+        sum5 = 0.0f;
+        sum6 = 0.0f;
+        sum7 = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+        pIn1B = pIn1 + numColsA;
+        pIn1C = pIn1 + 2*numColsA;
+        pIn1D = pIn1 + 3*numColsA;
+        pIn1E = pIn1 + 4*numColsA;
+        pIn1F = pIn1 + 5*numColsA;
+        pIn1G = pIn1 + 6*numColsA;
+        pIn1H = pIn1 + 7*numColsA;
+
+        acc0 = vdupq_n_f32(0.0);
+        acc1 = vdupq_n_f32(0.0);
+        acc2 = vdupq_n_f32(0.0);
+        acc3 = vdupq_n_f32(0.0);
+        acc4 = vdupq_n_f32(0.0);
+        acc5 = vdupq_n_f32(0.0);
+        acc6 = vdupq_n_f32(0.0);
+        acc7 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* Matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a0V = vld1q_f32(pIn1);  
+          a1V = vld1q_f32(pIn1B);  
+          a2V = vld1q_f32(pIn1C); 
+          a3V = vld1q_f32(pIn1D); 
+          a4V = vld1q_f32(pIn1E); 
+          a5V = vld1q_f32(pIn1F); 
+          a6V = vld1q_f32(pIn1G); 
+          a7V = vld1q_f32(pIn1H); 
+
+	  pIn1 += 4;
+          pIn1B += 4;
+          pIn1C += 4;
+          pIn1D += 4;
+          pIn1E += 4;
+          pIn1F += 4;
+          pIn1G += 4;
+          pIn1H += 4;
+          
+          temp[0] = *pIn2;
+          pIn2 += numColsB;
+          temp[1] = *pIn2;
+          pIn2 += numColsB;
+          temp[2] = *pIn2;
+          pIn2 += numColsB;
+          temp[3] = *pIn2;
+          pIn2 += numColsB;
+
+          acc0 = vmlaq_f32(acc0,a0V,temp);
+          acc1 = vmlaq_f32(acc1,a1V,temp);
+          acc2 = vmlaq_f32(acc2,a2V,temp);
+          acc3 = vmlaq_f32(acc3,a3V,temp);
+          acc4 = vmlaq_f32(acc4,a4V,temp);
+          acc5 = vmlaq_f32(acc5,a5V,temp);
+          acc6 = vmlaq_f32(acc6,a6V,temp);
+          acc7 = vmlaq_f32(acc7,a7V,temp);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
+        sum0 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1));
+        sum1 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2));
+        sum2 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3));
+        sum3 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc4), vget_high_f32(acc4));
+        sum4 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc5), vget_high_f32(acc5));
+        sum5 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc6), vget_high_f32(acc6));
+        sum6 += accum[0] + accum[1];
+
+        accum = vpadd_f32(vget_low_f32(acc7), vget_high_f32(acc7));
+        sum7 += accum[0] + accum[1];
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA & 3;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          sum0 += *pIn1++ * (*pIn2);
+          sum1 += *pIn1B++ * (*pIn2);
+          sum2 += *pIn1C++ * (*pIn2);
+          sum3 += *pIn1D++ * (*pIn2);
+          sum4 += *pIn1E++ * (*pIn2);
+          sum5 += *pIn1F++ * (*pIn2);
+          sum6 += *pIn1G++ * (*pIn2);
+          sum7 += *pIn1H++ * (*pIn2);
+          pIn2 += numColsB;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        /* Store the result in the destination buffer */
+        *px++ = sum0;
+        *pxB++ = sum1;
+        *pxC++ = sum2;
+        *pxD++ = sum3;
+        *pxE++ = sum4;
+        *pxF++ = sum5;
+        *pxG++ = sum6;
+        *pxH++ = sum7;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + j;
+
+        /* Decrement the column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update the pointer pInA to point to the  starting address of the next row */
+      i = i + numColsB;
+      pInA = pInA + GROUPOFROWS*numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+    } 
+
+    /*
+
+    i was the index of a group of rows computed by previous loop.
+    Now i is the index of a row since below code is computing row per row
+    and no more group of row per group of rows.
+
+    */
+
+    i = GROUPOFROWS*i;
+    rowCnt = row & 7;
+
+    while(rowCnt > 0)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+
+        acc0 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* Matrix multiplication   */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a0V = vld1q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          pIn1 += 4;
+          
+          temp[0] = *pIn2;
+          pIn2 += numColsB;
+          temp[1] = *pIn2;
+          pIn2 += numColsB;
+          temp[2] = *pIn2;
+          pIn2 += numColsB;
+          temp[3] = *pIn2;
+          pIn2 += numColsB;
+
+          acc0 = vmlaq_f32(acc0,a0V,temp);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
+        sum += accum[0] + accum[1];
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA % 0x4U;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          sum += *pIn1++ * (*pIn2);
+          pIn2 += numColsB;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        /* Store the result in the destination buffer */
+        *px++ = sum;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + j;
+
+        /* Decrement the column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+
+      /* Update the pointer pInA to point to the  starting address of the next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+
+    } 
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  float32_t sum;                                 /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0.0f;
+
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining MACs */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize cntCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = sum;
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+ * @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
new file mode 100644
index 00000000..384974e0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
@@ -0,0 +1,483 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_fast_q15.c
+ * Description:  Q15 matrix multiplication (fast variant)
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q15 matrix multiplication (fast variant).
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @param[in]     pState     points to the array for storing intermediate results
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The difference between the function \ref arm_mat_mult_q15() and this fast variant is that
+                   the fast variant use a 32-bit rather than a 64-bit accumulator.
+                   The result of each 1.15 x 1.15 multiplication is truncated to
+                   2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
+                   format. Finally, the accumulator is saturated and converted to a 1.15 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides
+                   less precision since it discards the low 16 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
+                   as a total of numColsA additions are computed internally for each output element.
+  @remark
+                   Refer to \ref arm_mat_mult_q15() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision.
+ */
+
+arm_status arm_mat_mult_fast_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pState)
+{
+        q31_t sum;                                     /* Accumulator */
+        q15_t *pSrcBT = pState;                        /* Input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* Number of rows of input matrix A */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+
+#if defined (ARM_MATH_DSP)
+        q31_t in;                                      /* Temporary variable to hold the input value */
+        q31_t inA1, inB1, inA2, inB2;
+        q31_t sum2, sum3, sum4;
+        q15_t *pInA2, *pInB2, *px2;
+        uint32_t j = 0;
+#else
+        q15_t in;                                      /* Temporary variable to hold the input value */
+        q15_t inA1, inB1, inA2, inB2;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose */
+    do
+    {
+      /* The pointer px is set to starting address of column being processed */
+      px = pSrcBT + i;
+
+      /* Apply loop unrolling and exchange columns with row elements */
+      col = numColsB >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+       ** a second loop below computes the remaining 1 to 3 samples. */
+      while (col > 0U)
+      {
+
+#if defined (ARM_MATH_DSP)
+
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pInB);
+
+        /* Unpack and store one element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) in;
+#else
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *px = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        in = read_q15x2_ia ((q15_t **) &pInB);
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) in;
+#else
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+        px += numRowsB;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *px = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+        px += numRowsB;
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+        /* Read one element from row */
+        in = *pInB++;
+
+        /* Store one element in destination */
+        *px = in;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        in = *pInB++;
+        *px = in;
+        px += numRowsB;
+
+        in = *pInB++;
+        *px = in;
+        px += numRowsB;
+
+        in = *pInB++;
+        *px = in;
+        px += numRowsB;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
+       ** No loop unrolling is used. */
+      col = numColsB % 0x4U;
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pInB++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Reset variables for usage in following multiplication process */
+    row = numRowsA;
+    i = 0U;
+    px = pDst->pData;
+
+#if defined (ARM_MATH_DSP)
+    /* Process two rows from matrix A at a time and output two rows at a time */
+    row = row >> 1U;
+    px2 = px + numColsB;
+#endif
+
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    while (row > 0U)
+    {
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
+      pInB = pSrcBT;
+
+#if defined (ARM_MATH_DSP)
+      /* Process two (transposed) columns from matrix B at a time */
+      col = col >> 1U;
+      j = 0;
+#endif
+
+      /* column loop */
+      while (col > 0U)
+      {
+        /* Set variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initiate pointer pInA to point to starting address of column being processed */
+        pInA = pSrcA->pData + i;
+
+#if defined (ARM_MATH_DSP)
+        sum2 = 0;
+        sum3 = 0;
+        sum4 = 0;
+        pInB  = pSrcBT + j;
+        pInA2 = pInA + numColsA;
+        pInB2 = pInB + numRowsB;
+
+        /* Read in two elements at once - alows dual MAC instruction */
+        colCnt = numColsA >> 1U;
+#else
+        colCnt = numColsA >> 2U;
+#endif
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+#if defined (ARM_MATH_DSP)
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+
+          inA2 = read_q15x2_ia ((q15_t **) &pInA2);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB2);
+
+          /* Multiply and Accumlates */
+          sum  = __SMLAD(inA1, inB1, sum);
+          sum2 = __SMLAD(inA1, inB2, sum2);
+          sum3 = __SMLAD(inA2, inB1, sum3);
+          sum4 = __SMLAD(inA2, inB2, sum4);
+#else
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          inA1 = *pInA++;
+          inB1 = *pInB++;
+          /* Multiply and Accumlates */
+          sum += inA1 * inB1;
+
+          inA2 = *pInA++;
+          inB2 = *pInB++;
+          sum += inA2 * inB2;
+
+          inA1 = *pInA++;
+          inB1 = *pInB++;
+          sum += inA1 * inB1;
+
+          inA2 = *pInA++;
+          inB2 = *pInB++;
+          sum += inA2 * inB2;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* process odd column samples */
+#if defined (ARM_MATH_DSP)
+        if (numColsA & 1U) {
+          inA1 = *pInA++;
+          inB1 = *pInB++;
+          inA2 = *pInA2++;
+          inB2 = *pInB2++;
+          sum  += inA1 * inB1;
+          sum2 += inA1 * inB2;
+          sum3 += inA2 * inB1;
+          sum4 += inA2 * inB2;
+        }
+#else
+        colCnt = numColsA % 0x4U;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          sum += (q31_t) *pInA++ * *pInB++;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+#endif /* #if defined (ARM_MATH_DSP) */
+
+        /* Saturate and store result in destination buffer */
+        *px++  = (q15_t) (sum >> 15);
+
+#if defined (ARM_MATH_DSP)
+        *px++  = (q15_t) (sum2 >> 15);
+        *px2++ = (q15_t) (sum3 >> 15);
+        *px2++ = (q15_t) (sum4 >> 15);
+        j += numRowsB * 2;
+#endif
+
+        /* Decrement column loop counter */
+        col--;
+
+      }
+
+      i = i + numColsA;
+
+#if defined (ARM_MATH_DSP)
+      i = i + numColsA;
+      px = px2 + (numColsB & 1U);
+      px2 = px + numColsB;
+#endif
+
+      /* Decrement row loop counter */
+      row--;
+
+    }
+
+    /* Compute any remaining odd row/column below */
+
+#if defined (ARM_MATH_DSP)
+
+    /* Compute remaining output column */
+    if (numColsB & 1U) {
+
+      /* Avoid redundant computation of last element */
+      row = numRowsA & (~0x1);
+
+      /* Point to remaining unfilled column in output matrix */
+      px = pDst->pData + numColsB-1;
+      pInA = pSrcA->pData;
+
+      /* row loop */
+      while (row > 0)
+      {
+
+        /* point to last column in matrix B */
+        pInB  = pSrcBT + numRowsB * (numColsB-1);
+
+        /* Set variable sum, that acts as accumulator, to zero */
+        sum  = 0;
+
+        /* Compute 4 columns at once */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
+
+          sum  = __SMLAD(inA1, inB1, sum);
+          sum  = __SMLAD(inA2, inB2, sum);
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        colCnt = numColsA & 3U;
+        while (colCnt > 0U) {
+          sum += (q31_t) (*pInA++) * (*pInB++);
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px = (q15_t) (sum  >> 15);
+        px += numColsB;
+
+        /* Decrement row loop counter */
+        row--;
+      }
+    }
+
+    /* Compute remaining output row */
+    if (numRowsA & 1U) {
+
+      /* point to last row in output matrix */
+      px = pDst->pData + (numColsB) * (numRowsA-1);
+
+      pInB  = pSrcBT;
+      col = numColsB;
+      i = 0U;
+
+      /* col loop */
+      while (col > 0)
+      {
+        /* point to last row in matrix A */
+        pInA = pSrcA->pData + (numRowsA-1) * numColsA;
+
+        /* Set variable sum, that acts as accumulator, to zero */
+        sum  = 0;
+
+        /* Compute 4 columns at once */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
+
+          sum  = __SMLAD(inA1, inB1, sum);
+          sum  = __SMLAD(inA2, inB2, sum);
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        colCnt = numColsA % 4U;
+        while (colCnt > 0U) {
+          sum += (q31_t) (*pInA++) * (*pInB++);
+
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = (q15_t) (sum  >> 15);
+
+        /* Decrement column loop counter */
+        col--;
+      }
+    }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
new file mode 100644
index 00000000..0d753f7a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
@@ -0,0 +1,374 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_fast_q31.c
+ * Description:  Q31 matrix multiplication (fast variant)
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q31 matrix multiplication (fast variant).
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The difference between the function \ref arm_mat_mult_q31() and this fast variant is that
+                   the fast variant use a 32-bit rather than a 64-bit accumulator.
+                   The result of each 1.31 x 1.31 multiplication is truncated to
+                   2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
+                   format. Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides
+                   less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
+                   as a total of numColsA additions are computed internally for each output element.
+  @remark
+                   Refer to \ref arm_mat_mult_q31() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision.
+ */
+
+arm_status arm_mat_mult_fast_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA2;
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  q31_t *px2;
+  q31_t sum1, sum2, sum3, sum4;                  /* Accumulator */
+  q31_t inA1, inA2, inB1, inB2;
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    px = pDst->pData;
+
+    row = row >> 1U;
+    px2 = px + numColsB;
+
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    while (row > 0U)
+    {
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pInB = pSrcB->pData;
+
+      j = 0U;
+
+      col = col >> 1U;
+
+      /* column loop */
+      while (col > 0U)
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum1 = 0;
+        sum2 = 0;
+        sum3 = 0;
+        sum4 = 0;
+        
+        /* Initiate data pointers */
+        pInA = pSrcA->pData + i;
+        pInB = pSrcB->pData + j;
+        pInA2 = pInA + numColsA;
+        
+        colCnt = numColsA;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          inA1 = *pInA++;
+          inB1 = pInB[0];
+          inA2 = *pInA2++;
+          inB2 = pInB[1];
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
+          sum2 = __SMMLA(inA1, inB2, sum2);
+          sum3 = __SMMLA(inA2, inB1, sum3);
+          sum4 = __SMMLA(inA2, inB2, sum4);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum2 = (q31_t) ((((q63_t) sum2 << 32) + ((q63_t) inA1 * inB2)) >> 32);
+          sum3 = (q31_t) ((((q63_t) sum3 << 32) + ((q63_t) inA2 * inB1)) >> 32);
+          sum4 = (q31_t) ((((q63_t) sum4 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
+        *px++  = sum1 << 1;
+        *px++  = sum2 << 1;
+        *px2++ = sum3 << 1;
+        *px2++ = sum4 << 1;
+
+        j += 2;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i = i + (numColsA << 1U);
+      px  = px2 + (numColsB & 1U);
+      px2 = px  +  numColsB;
+
+      /* Decrement row loop counter */
+      row--;
+    }
+
+    /* Compute any remaining odd row/column below */
+
+    /* Compute remaining output column */
+    if (numColsB & 1U) {
+
+      /* Avoid redundant computation of last element */
+      row = numRowsA & (~1U);
+
+      /* Point to remaining unfilled column in output matrix */
+      px = pDst->pData + numColsB-1;
+      pInA = pSrcA->pData;
+
+      /* row loop */
+      while (row > 0)
+      {
+
+        /* point to last column in matrix B */
+        pInB  = pSrcB->pData + numColsB-1;
+
+        /* Set variable sum1, that acts as accumulator, to zero */
+        sum1  = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 columns at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining column */
+        colCnt = numColsA % 4U;
+
+#else
+
+        /* Initialize colCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U) {
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+          
+          colCnt--;
+        }
+
+        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
+        *px = sum1 << 1;
+        px += numColsB;
+
+        /* Decrement row loop counter */
+        row--;
+      }
+    }
+
+    /* Compute remaining output row */
+    if (numRowsA & 1U) {
+
+      /* point to last row in output matrix */
+      px = pDst->pData + (numColsB) * (numRowsA-1);
+
+      col = numColsB;
+      i = 0U;
+
+      /* col loop */
+      while (col > 0)
+      {
+
+        /* point to last row in matrix A */
+        pInA = pSrcA->pData + (numRowsA-1) * numColsA;
+        pInB  = pSrcB->pData + i;
+
+        /* Set variable sum1, that acts as accumulator, to zero */
+        sum1  = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 columns at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          inA1 = *pInA++;
+          inA2 = *pInA++;
+          inB1 = *pInB;
+          pInB += numColsB;
+          inB2 = *pInB;
+          pInB += numColsB;
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
+          sum1 = __SMMLA(inA2, inB2, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
+
+          inA1 = *pInA++;
+          inA2 = *pInA++;
+          inB1 = *pInB;
+          pInB += numColsB;
+          inB2 = *pInB;
+          pInB += numColsB;
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
+          sum1 = __SMMLA(inA2, inB2, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining column */
+        colCnt = numColsA % 4U;
+
+#else
+
+        /* Initialize colCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U) {
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+          colCnt--;
+        }
+
+        /* Saturate and store the result in the destination buffer */
+        *px++ = sum1 << 1;
+        i++;
+
+        /* Decrement col loop counter */
+        col--;
+      }
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
new file mode 100644
index 00000000..4a3bde84
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
@@ -0,0 +1,357 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_q15.c
+ * Description:  Q15 matrix multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q15 matrix multiplication.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @param[in]     pState     points to the array for storing intermediate results (Unused)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator. The inputs to the
+                   multiplications are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits
+                   and then saturated to 1.15 format.
+  @par
+                   Refer to \ref arm_mat_mult_fast_q15() for a faster but less precise version of this function.
+ */
+
+arm_status arm_mat_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pState)
+{
+        q63_t sum;                                     /* Accumulator */
+
+#if defined (ARM_MATH_DSP)                             /* != CM0 */
+
+        q15_t *pSrcBT = pState;                        /* Input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* Number of rows of input matrix A */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+        
+        q31_t in;                                      /* Temporary variable to hold the input value */
+        q31_t inA1, inB1, inA2, inB2;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose */
+    do
+    {
+      /* The pointer px is set to starting address of column being processed */
+      px = pSrcBT + i;
+
+      /* Apply loop unrolling and exchange columns with row elements */
+      col = numColsB >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+       ** a second loop below computes the remaining 1 to 3 samples. */
+      while (col > 0U)
+      {
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pInB);
+
+        /* Unpack and store one element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) in;
+#else
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *px = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pInB);
+
+        /* Unpack and store one element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) in;
+#else
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+        px += numRowsB;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *px = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+        px += numRowsB;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
+       ** No loop unrolling is used. */
+      col = numColsB % 0x4U;
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pInB++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Reset variables for usage in following multiplication process */
+    row = numRowsA;
+    i = 0U;
+    px = pDst->pData;
+
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
+      pInB = pSrcBT;
+
+      /* column loop */
+      do
+      {
+        /* Set variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initiate pointer pInA to point to starting address of column being processed */
+        pInA = pSrcA->pData + i;
+
+        /* Apply loop unrolling and compute 2 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+          sum = __SMLALD(inA1, inB1, sum);
+          sum = __SMLALD(inA2, inB2, sum);
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* process remaining column samples */
+        colCnt = numColsA % 0x4U;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          sum += *pInA++ * *pInB++;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Saturate and store result in destination buffer */
+        *px = (q15_t) (__SSAT((sum >> 15), 16));
+        px++;
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      i = i + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+        q15_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+        q15_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A    */
+        uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initiate pointer pIn1 to point to starting address of pSrcA */
+        pIn1 = pInA;
+
+        /* Matrix A columns number of MAC operations are to be performed */
+        colCnt = numColsA;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform multiply-accumulates */
+          sum += (q31_t) * pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Convert result from 34.30 to 1.15 format and store saturated value in destination buffer */
+
+        /* Saturate and store result in destination buffer */
+        *px++ = (q15_t) __SSAT((sum >> 15), 16);
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pSrcA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
new file mode 100644
index 00000000..88c87910
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
@@ -0,0 +1,196 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_q31.c
+ * Description:  Q31 matrix multiplication
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q31 matrix multiplication.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit. There is no saturation
+                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
+                   distorts the result. The input signals should be scaled down to avoid intermediate
+                   overflows. The input is thus scaled down by log2(numColsA) bits
+                   to avoid overflows, as a total of numColsA additions are performed internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+  @remark
+                   Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementation of this function.
+ */
+
+arm_status arm_mat_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  q63_t sum;                                     /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining MACs */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize cntCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Convert result from 2.62 to 1.31 format and store in destination buffer */
+        *px++ = (q31_t) (sum >> 31);
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
new file mode 100644
index 00000000..91c56b10
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
@@ -0,0 +1,221 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_scale_f32.c
+ * Description:  Multiplies a floating-point matrix by a scalar
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixScale Matrix Scale
+
+  Multiplies a matrix by a scalar.  This is accomplished by multiplying each element in the
+  matrix by the scalar.  For example:
+  \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
+
+  The function checks to make sure that the input and output matrices are of the same size.
+
+  In the fixed-point Q15 and Q31 functions, scale is represented by
+  a fractional multiplication scaleFract and an arithmetic shift shift.
+  The shift allows the gain of the scaling operation to exceed 1.0.
+  The overall scale factor applied to the fixed-point data is
+  
+      scale = scaleFract * 2^shift.
+  

+ */
+
+/**
+  @addtogroup MatrixScale
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix scaling.
+  @param[in]     pSrc       points to input matrix
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  float32_t scale,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix scaling     */
+
+
+  float32_t in1, in2, in3, in4;                  /* temporary variables */
+  float32_t out1, out2, out3, out4;              /* temporary variables */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    float32x4_t vec1;
+    float32x4_t res;
+
+    /* Total number of samples in the input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+    blkCnt = numSamples >> 2;
+
+    /* Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+      /* Scaling and results are stored in the destination buffer. */
+      vec1 = vld1q_f32(pIn);
+      res = vmulq_f32(vec1, vdupq_n_f32(scale));
+      vst1q_f32(pOut, res);
+
+      /* update pointers to process next sampels */
+      pIn += 4U;
+      pOut += 4U;
+
+      /* Decrement the numSamples loop counter */
+      blkCnt--;
+    }
+
+    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = numSamples % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+      /* The results are stored in the destination buffer. */
+      *pOut++ = (*pIn++) * scale;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        float32_t                 scale,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* Input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  uint32_t numSamples;                           /* Total number of elements in the matrix */
+  uint32_t blkCnt;                               /* Loop counters */
+  arm_status status;                             /* Status of matrix scaling */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+
+      /* Scale and store result in destination buffer. */
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+
+      /* Scale and store result in destination buffer. */
+      *pOut++ = (*pIn++) * scale;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of MatrixScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
new file mode 100644
index 00000000..79566702
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
@@ -0,0 +1,170 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_scale_q15.c
+ * Description:  Multiplies a Q15 matrix by a scalar
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixScale
+  @{
+ */
+
+/**
+  @brief         Q15 matrix scaling.
+  @param[in]     pSrc        points to input matrix
+  @param[in]     scaleFract  fractional portion of the scale factor
+  @param[in]     shift       number of bits to shift the result by
+  @param[out]    pDst        points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The input data *pSrc and scaleFract are in 1.15 format.
+                   These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+ */
+
+arm_status arm_mat_scale_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        q15_t                     scaleFract,
+        int32_t                   shift,
+        arm_matrix_instance_q15 * pDst)
+{
+        q15_t *pIn = pSrc->pData;                      /* Input data matrix pointer */
+        q15_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+        uint32_t numSamples;                           /* Total number of elements in the matrix */
+        uint32_t blkCnt;                               /* Loop counter */
+        arm_status status;                             /* Status of matrix scaling */
+        int32_t kShift = 15 - shift;                   /* Total shift to apply after scaling */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t inA1, inA2;
+        q31_t out1, out2, out3, out4;                  /* Temporary output variables */
+        q15_t in1, in2, in3, in4;                      /* Temporary input variables */
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * k */
+
+#if defined (ARM_MATH_DSP)
+      /* read 2 times 2 samples at a time from source */
+      inA1 = read_q15x2_ia ((q15_t **) &pIn);
+      inA2 = read_q15x2_ia ((q15_t **) &pIn);
+
+      /* Scale inputs and store result in temporary variables
+       * in single cycle by packing the outputs */
+      out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
+      out2 = (q31_t) ((q15_t) (inA1      ) * scaleFract);
+      out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
+      out4 = (q31_t) ((q15_t) (inA2      ) * scaleFract);
+
+      /* apply shifting */
+      out1 = out1 >> kShift;
+      out2 = out2 >> kShift;
+      out3 = out3 >> kShift;
+      out4 = out4 >> kShift;
+
+      /* saturate the output */
+      in1 = (q15_t) (__SSAT(out1, 16));
+      in2 = (q15_t) (__SSAT(out2, 16));
+      in3 = (q15_t) (__SSAT(out3, 16));
+      in4 = (q15_t) (__SSAT(out4, 16));
+
+      /* store result to destination */
+      write_q15x2_ia (&pOut, __PKHBT(in2, in1, 16));
+      write_q15x2_ia (&pOut, __PKHBT(in4, in3, 16));
+
+#else
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * k */
+
+      /* Scale, saturate and store result in destination buffer. */
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
new file mode 100644
index 00000000..7f2fe8b0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
@@ -0,0 +1,164 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_scale_q31.c
+ * Description:  Multiplies a Q31 matrix by a scalar
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixScale
+  @{
+ */
+
+/**
+  @brief         Q31 matrix scaling.
+  @param[in]     pSrc        points to input matrix
+  @param[in]     scaleFract  fractional portion of the scale factor
+  @param[in]     shift       number of bits to shift the result by
+  @param[out]    pDst        points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The input data *pSrc and scaleFract are in 1.31 format.
+                   These are multiplied to yield a 2.62 intermediate result which is shifted with saturation to 1.31 format.
+ */
+
+arm_status arm_mat_scale_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        q31_t                     scaleFract,
+        int32_t                   shift,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn = pSrc->pData;                      /* Input data matrix pointer */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+  uint32_t numSamples;                           /* Total number of elements in the matrix */
+  uint32_t blkCnt;                               /* Loop counter */
+  arm_status status;                             /* Status of matrix scaling */
+  int32_t kShift = shift + 1;                    /* Shift to apply after scaling */
+  q31_t in, out;                                 /* Temporary variabels */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * k */
+
+      /* Scale, saturate and store result in destination buffer. */
+      in = *pIn++;                                 /* read four inputs from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in << kShift;                          /* apply shifting */
+      if (in != (out >> kShift))                   /* saturate the results. */
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;                               /* Store result destination */
+
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
+
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
+
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * k */
+
+      /* Scale, saturate and store result in destination buffer. */
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
new file mode 100644
index 00000000..4f812a6c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
@@ -0,0 +1,226 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_sub_f32.c
+ * Description:  Floating-point matrix subtraction
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixSub Matrix Subtraction
+
+  Subtract two matrices.
+  \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
+
+  The functions check to make sure that
+  pSrcA, pSrcB, and pDst have the same
+  number of rows and columns.
+ */
+
+/**
+  @addtogroup MatrixSub
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+#if defined(ARM_MATH_NEON)
+arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
+
+
+  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
+
+
+  uint32_t numSamples;                           /* total number of elements in the matrix  */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+     (pSrcA->numCols != pSrcB->numCols) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+
+    /* Total number of samples in the input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+    blkCnt = numSamples >> 2U;
+
+    /* Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+      /* Subtract and then store the results in the destination buffer. */
+      /* Read values from source A */
+      vec1 = vld1q_f32(pIn1);
+      vec2 = vld1q_f32(pIn2);
+      res = vsubq_f32(vec1, vec2);
+      vst1q_f32(pOut, res);
+
+      /* Update pointers to process next samples */
+      pIn1 += 4U;
+      pIn2 += 4U;
+      pOut += 4U;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = numSamples % 0x4U;
+
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+      /* Subtract and then store the results in the destination buffer. */
+      *pOut++ = (*pIn1++) - (*pIn2++);
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (*pInA++) - (*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+  @} end of MatrixSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
new file mode 100644
index 00000000..37496ea7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
@@ -0,0 +1,144 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_sub_q15.c
+ * Description:  Q15 Matrix subtraction
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixSub
+  @{
+ */
+
+/**
+  @brief         Q15 matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+arm_status arm_mat_sub_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst)
+{
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+
+        uint32_t numSamples;                           /* total number of elements in the matrix */
+        uint32_t blkCnt;                               /* loop counters  */
+        arm_status status;                             /* status of matrix subtraction  */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract, Saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
+      write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
new file mode 100644
index 00000000..8a5e6930
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
@@ -0,0 +1,139 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_sub_q31.c
+ * Description:  Q31 matrix subtraction
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixSub
+  @{
+ */
+
+/**
+  @brief         Q31 matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+arm_status arm_mat_sub_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract, saturate and then store the results in the destination buffer. */
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract, saturate and store result in destination buffer. */
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
new file mode 100644
index 00000000..f0029494
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
@@ -0,0 +1,284 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_f32.c
+ * Description:  Floating-point matrix transpose
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixTrans Matrix Transpose
+
+  Tranposes a matrix.
+
+  Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix.
+  \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+#if defined(ARM_MATH_NEON)
+
+arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nColumns = pSrc->numCols;             /* number of columns */
+
+  uint16_t blkCnt, rowCnt, i = 0U, row = nRows;          /* loop counters */
+  arm_status status;                             /* status of matrix transpose  */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* Row loop */
+    rowCnt = row >> 2;
+    while (rowCnt > 0U)
+    {
+      float32x4_t row0V,row1V,row2V,row3V;
+      float32x4x2_t ra0,ra1,rb0,rb1;
+
+      blkCnt = nColumns >> 2;
+
+      /* The pointer px is set to starting address of the column being processed */
+      px = pOut + i;
+
+      /* Compute 4 outputs at a time.
+       ** a second loop below computes the remaining 1 to 3 samples. */
+      while (blkCnt > 0U)        /* Column loop */
+      {
+        row0V = vld1q_f32(pIn);
+        row1V = vld1q_f32(pIn + 1 * nColumns);
+        row2V = vld1q_f32(pIn + 2 * nColumns);
+        row3V = vld1q_f32(pIn + 3 * nColumns);
+        pIn += 4;
+
+        ra0 = vzipq_f32(row0V,row2V);
+        ra1 = vzipq_f32(row1V,row3V);
+
+        rb0 = vzipq_f32(ra0.val[0],ra1.val[0]);
+        rb1 = vzipq_f32(ra0.val[1],ra1.val[1]);
+
+        vst1q_f32(px,rb0.val[0]);
+        px += nRows;
+
+        vst1q_f32(px,rb0.val[1]);
+        px += nRows;
+
+        vst1q_f32(px,rb1.val[0]);
+        px += nRows;
+
+        vst1q_f32(px,rb1.val[1]);
+        px += nRows;
+
+        /* Decrement the column loop counter */
+        blkCnt--;
+      }
+
+      /* Perform matrix transpose for last 3 samples here. */
+      blkCnt = nColumns % 0x4U;
+
+      while (blkCnt > 0U)
+      {
+        /* Read and store the input element in the destination */
+        *px++ = *pIn;
+        *px++ = *(pIn + 1 * nColumns);
+        *px++ = *(pIn + 2 * nColumns);
+        *px++ = *(pIn + 3 * nColumns);
+        
+        px += (nRows - 4);
+        pIn++;
+
+        /* Decrement the column loop counter */
+        blkCnt--;
+      }
+
+      i += 4;
+      pIn += 3 * nColumns;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+
+    }         /* Row loop end  */
+
+    rowCnt = row & 3;
+    while (rowCnt > 0U)
+    {
+      blkCnt = nColumns ;
+      /* The pointer px is set to starting address of the column being processed */
+      px = pOut + i;
+
+      while (blkCnt > 0U)
+      {
+        /* Read and store the input element in the destination */
+        *px = *pIn++;
+
+        /* Update the pointer px to point to the next row of the transposed matrix */
+        px += nRows;
+
+        /* Decrement the column loop counter */
+        blkCnt--;
+      }
+      i++;
+      rowCnt -- ;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nCols = pSrc->numCols;                /* number of columns */
+  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer px is set to starting address of column being processed */
+      px = pOut + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+ * @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
new file mode 100644
index 00000000..3774e836
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
@@ -0,0 +1,182 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_q15.c
+ * Description:  Q15 matrix transpose
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Q15 matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+arm_status arm_mat_trans_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        arm_matrix_instance_q15 * pDst)
+{
+        q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+        uint16_t nRows = pSrc->numRows;                /* number of rows */
+        uint16_t nCols = pSrc->numCols;                /* number of columns */
+        uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+        arm_status status;                             /* status of matrix transpose */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;                                      /* variable to hold temporary output  */
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer pOut is set to starting address of column being processed */
+      pOut = pDst->pData + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pIn);
+
+        /* Unpack and store one element in  destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) in;
+#else
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *pOut = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update  pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pIn);
+
+        /* Unpack and store one element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) in;
+#else
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *pOut = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *pOut = *pIn++;
+
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
new file mode 100644
index 00000000..d6efd598
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
@@ -0,0 +1,146 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_q31.c
+ * Description:  Q31 matrix transpose
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Q31 matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+arm_status arm_mat_trans_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
+  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nCols = pSrc->numCols;                /* number of columns */
+  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer px is set to starting address of column being processed */
+      px = pOut + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
new file mode 100644
index 00000000..ae74d027
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
@@ -0,0 +1,53 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        StatisticsFunctions.c
+ * Description:  Combination of all statistics function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_max_f32.c"
+#include "arm_max_q15.c"
+#include "arm_max_q31.c"
+#include "arm_max_q7.c"
+#include "arm_mean_f32.c"
+#include "arm_mean_q15.c"
+#include "arm_mean_q31.c"
+#include "arm_mean_q7.c"
+#include "arm_min_f32.c"
+#include "arm_min_q15.c"
+#include "arm_min_q31.c"
+#include "arm_min_q7.c"
+#include "arm_power_f32.c"
+#include "arm_power_q15.c"
+#include "arm_power_q31.c"
+#include "arm_power_q7.c"
+#include "arm_rms_f32.c"
+#include "arm_rms_q15.c"
+#include "arm_rms_q31.c"
+#include "arm_std_f32.c"
+#include "arm_std_q15.c"
+#include "arm_std_q31.c"
+#include "arm_var_f32.c"
+#include "arm_var_q15.c"
+#include "arm_var_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
new file mode 100644
index 00000000..f6ffafe0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
@@ -0,0 +1,271 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_f32.c
+ * Description:  Maximum value of a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#if defined(ARM_MATH_NEON)
+#include 
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup Max Maximum
+
+  Computes the maximum value of an array of data.
+  The function returns both the maximum value and its position within the array.
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
+void arm_max_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult,
+  uint32_t * pIndex)
+{
+  float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
+  uint32_t blkCnt, outIndex, count;              /* loop counter */
+
+  float32x4_t outV, srcV;
+  float32x2_t outV2;
+
+  uint32x4_t idxV;
+  uint32x4_t maxIdx={ULONG_MAX,ULONG_MAX,ULONG_MAX,ULONG_MAX};
+  uint32x4_t index={4,5,6,7};
+  uint32x4_t delta={4,4,4,4};
+  uint32x4_t countV={0,1,2,3};
+  uint32x2_t countV2;
+
+  /* Initialise the count value. */
+  count = 0U;
+
+  /* Initialise the index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparison */
+  if (blockSize <= 3)
+  {
+      out = *pSrc++;
+
+      blkCnt = blockSize - 1;
+
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out < maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+  else
+  {
+      outV = vld1q_f32(pSrc);
+      pSrc += 4;
+ 
+      /* Compute 4 outputs at a time */
+      blkCnt = (blockSize - 4 ) >> 2U;
+    
+      while (blkCnt > 0U)
+      {
+        srcV = vld1q_f32(pSrc);
+        pSrc += 4;
+    
+        idxV = vcgtq_f32(srcV, outV);
+        outV = vbslq_f32(idxV, srcV, outV );
+        countV = vbslq_u32(idxV, index,countV );
+    
+        index = vaddq_u32(index,delta);
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      outV2 = vpmax_f32(vget_low_f32(outV),vget_high_f32(outV));
+      outV2 = vpmax_f32(outV2,outV2);
+      out = outV2[0];
+    
+      idxV = vceqq_f32(outV, vdupq_n_f32(out));
+      countV = vbslq_u32(idxV, countV,maxIdx);
+      
+      countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV));
+      countV2 = vpmin_u32(countV2,countV2);
+      outIndex = countV2[0];
+    
+      /* if (blockSize - 1U) is not multiple of 4 */
+      blkCnt = (blockSize - 4 ) % 4U;
+    
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out < maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt ;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#else
+void arm_max_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
new file mode 100644
index 00000000..dbead54f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
@@ -0,0 +1,148 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_q15.c
+ * Description:  Maximum value of a Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+
+void arm_max_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+        q15_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
new file mode 100644
index 00000000..5c6badfb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
@@ -0,0 +1,148 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_q31.c
+ * Description:  Maximum value of a Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+
+void arm_max_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+        q31_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
new file mode 100644
index 00000000..d4977e5f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
@@ -0,0 +1,148 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_q7.c
+ * Description:  Maximum value of a Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+
+void arm_max_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+        q7_t maxVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
new file mode 100644
index 00000000..3373f822
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
@@ -0,0 +1,166 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_f32.c
+ * Description:  Mean value of a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup mean Mean
+
+  Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
+  The underlying algorithm is used:
+
+  
+      Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
+  

+
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[in]     blockSize  number of samples in input vector.
+  @param[out]    pResult    mean value returned here.
+  @return        none
+ */
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_mean_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+  float32_t sum = 0.0f;                          /* Temporary result storage */
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+
+  uint32_t blkCnt;                               /* Loop counter */
+
+  float32_t in1, in2, in3, in4;
+  float32x4_t inV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    inV = vld1q_f32(pSrc);
+    sumV = vaddq_f32(sumV, inV);
+    
+    pSrc += 4;
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = sumV2[0] + sumV2[1];
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store the result to the destination */
+  *pResult = sum / (float32_t) blockSize;
+}
+#else
+void arm_mean_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (sum / blockSize);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
new file mode 100644
index 00000000..09e6da95
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
@@ -0,0 +1,114 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_q15.c
+ * Description:  Mean value of a Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.15 format and is accumulated in a 32-bit
+                   accumulator in 17.15 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.15 format.
+ */
+
+void arm_mean_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    sum += ((in << 16U) >> 16U);
+    sum +=  (in >> 16U);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    sum += ((in << 16U) >> 16U);
+    sum +=  (in >> 16U);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (q15_t) (sum / (int32_t) blockSize);
+}
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
new file mode 100644
index 00000000..7667ad82
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
@@ -0,0 +1,110 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_q31.c
+ * Description:  Mean value of a Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.31 format and is accumulated in a 64-bit
+                   accumulator in 33.31 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.31 format.
+ */
+
+void arm_mean_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (q31_t) (sum / blockSize);
+}
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
new file mode 100644
index 00000000..3f90ea8e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
@@ -0,0 +1,112 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_q7.c
+ * Description:  Mean value of a Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.7 format and is accumulated in a 32-bit
+                   accumulator in 25.7 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.7 format.
+ */
+
+void arm_mean_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    in = read_q7x4_ia ((q7_t **) &pSrc);
+    sum += ((in << 24U) >> 24U);
+    sum += ((in << 16U) >> 24U);
+    sum += ((in <<  8U) >> 24U);
+    sum +=  (in >> 24U);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (q7_t) (sum / (int32_t) blockSize);
+}
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
new file mode 100644
index 00000000..f6504aaf
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
@@ -0,0 +1,268 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_f32.c
+ * Description:  Minimum value of a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include 
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup Min Minimum
+
+  Computes the minimum value of an array of data.
+  The function returns both the minimum value and its position within the array.
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
+void arm_min_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult,
+  uint32_t * pIndex)
+{
+  float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
+  uint32_t blkCnt, outIndex, count;              /* loop counter */
+
+  float32x4_t outV, srcV;
+  float32x2_t outV2;
+
+  uint32x4_t idxV;
+  uint32x4_t maxIdx={ULONG_MAX,ULONG_MAX,ULONG_MAX,ULONG_MAX};
+  uint32x4_t index={4,5,6,7};
+  uint32x4_t delta={4,4,4,4};
+  uint32x4_t countV={0,1,2,3};
+  uint32x2_t countV2;
+
+  /* Initialise the count value. */
+  count = 0U;
+
+  /* Initialise the index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparison */
+  if (blockSize <= 3)
+  {
+      out = *pSrc++;
+
+      blkCnt = blockSize - 1;
+
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out > maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+  else
+  {
+      outV = vld1q_f32(pSrc);
+      pSrc += 4;
+    
+      /* Compute 4 outputs at a time */
+      blkCnt = (blockSize - 4 ) >> 2U;
+    
+      while (blkCnt > 0U)
+      {
+        srcV = vld1q_f32(pSrc);
+        pSrc += 4;
+    
+        idxV = vcltq_f32(srcV, outV);
+        outV = vbslq_f32(idxV, srcV, outV );
+        countV = vbslq_u32(idxV, index,countV );
+    
+        index = vaddq_u32(index,delta);
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      outV2 = vpmin_f32(vget_low_f32(outV),vget_high_f32(outV));
+      outV2 = vpmin_f32(outV2,outV2);
+      out = outV2[0];
+    
+      idxV = vceqq_f32(outV, vdupq_n_f32(out));
+      countV = vbslq_u32(idxV, countV,maxIdx);
+      
+      countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV));
+      countV2 = vpmin_u32(countV2,countV2);
+      outIndex = countV2[0];
+    
+      /* if (blockSize - 1U) is not multiple of 4 */
+      blkCnt = (blockSize - 4 ) % 4U;
+    
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out > maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt ;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#else
+void arm_min_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t minVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
new file mode 100644
index 00000000..67fd49e9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
@@ -0,0 +1,149 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_q15.c
+ * Description:  Minimum value of a Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+
+void arm_min_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+        q15_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
new file mode 100644
index 00000000..c3621734
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
@@ -0,0 +1,149 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_q31.c
+ * Description:  Minimum value of a Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+
+void arm_min_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+        q31_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
new file mode 100644
index 00000000..43296301
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
@@ -0,0 +1,149 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_q7.c
+ * Description:  Minimum value of a Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+
+void arm_min_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+        q7_t minVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
new file mode 100644
index 00000000..abf444b1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
@@ -0,0 +1,175 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_f32.c
+ * Description:  Sum of the squares of the elements of a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup power Power
+
+  Calculates the sum of the squares of the elements in the input vector.
+  The underlying algorithm is used:
+
+  
+      Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
+  

+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
+void arm_power_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+  float32_t sum = 0.0f;                          /* accumulator */
+  float32_t in;                                  /* Temporary variable to store input value */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* Compute Power and then store the result in a temporary variable, sum. */
+    inV = vld1q_f32(pSrc);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = sumV2[0] + sumV2[1];
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* compute power and then store the result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Store the result to the destination */
+  *pResult = sum;
+}
+#else
+void arm_power_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t in;                                  /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result to destination */
+  *pResult = sum;
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
new file mode 100644
index 00000000..62e567f3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
@@ -0,0 +1,132 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_q15.c
+ * Description:  Sum of the squares of the elements of a Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 34.30 format.
+ */
+
+void arm_power_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store packed input value */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
+
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
+#else
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in 34.30 format */
+  *pResult = sum;
+}
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
new file mode 100644
index 00000000..aa51d0fe
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
@@ -0,0 +1,121 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_q31.c
+ * Description:  Sum of the squares of the elements of a Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.31 format.
+                   Intermediate multiplication yields a 2.62 format, and this
+                   result is truncated to 2.48 format by discarding the lower 14 bits.
+                   The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+                   With 15 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 16.48 format.
+ */
+
+void arm_power_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q31_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and store result in a temporary variable sum, providing 15 guard bits. */
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store results in 16.48 format */
+  *pResult = sum;
+}
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
new file mode 100644
index 00000000..eefa8bae
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
@@ -0,0 +1,136 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_q7.c
+ * Description:  Sum of the squares of the elements of a Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.7 format.
+                   Intermediate multiplication yields a 2.14 format, and this
+                   result is added without saturation to an accumulator in 18.14 format.
+                   With 17 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 18.14 format.
+ */
+
+void arm_power_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
+        q7_t in;                                       /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store packed input value */
+        q31_t in1, in2;                                /* Temporary variables to store input value */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q7x4_ia ((q7_t **) &pSrc);
+
+    in1 = __SXTB16(__ROR(in32, 8));
+    in2 = __SXTB16(in32);
+
+    /* calculate power and accumulate to accumulator */
+    sum = __SMLAD(in1, in1, sum);
+    sum = __SMLAD(in2, in2, sum);
+#else
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in 18.14 format */
+  *pResult = sum;
+}
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
new file mode 100644
index 00000000..4f316fbe
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
@@ -0,0 +1,176 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rms_f32.c
+ * Description:  Root mean square value of the elements of a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup RMS Root mean square (RMS)
+
+  Calculates the Root Mean Square of the elements in the input vector.
+  The underlying algorithm is used:
+
+  
+      Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
+  

+
+  There are separate functions for floating point, Q31, and Q15 data types.
+ */
+
+/**
+  @addtogroup RMS
+  @{
+ */
+
+/**
+  @brief         Root Mean Square of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
+void arm_rms_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+  float32_t sum = 0.0f;                          /* accumulator */
+  float32_t in;                                  /* Temporary variable to store input value */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* Compute Power and then store the result in a temporary variable, sum. */
+    inV = vld1q_f32(pSrc);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = sumV2[0] + sumV2[1];
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* compute power and then store the result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Rms and store the result in the destination */
+  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
+}
+#else
+void arm_rms_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t in;                                  /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sum. */
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ( in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Rms and store result in destination */
+  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of RMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
new file mode 100644
index 00000000..c8a0a138
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rms_q15.c
+ * Description:  Root Mean Square of the elements of a Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup RMS
+  @{
+ */
+
+/**
+  @brief         Root Mean Square of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
+ */
+
+void arm_rms_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store input value */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute sum of squares and store result in a temporary variable. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
+
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
+#else
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ((q31_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Truncating and saturating the accumulator to 1.15 format */
+  /* Store result in destination */
+  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
+}
+
+/**
+  @} end of RMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
new file mode 100644
index 00000000..4cf086fe
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
@@ -0,0 +1,124 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rms_q31.c
+ * Description:  Root Mean Square of the elements of a Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup RMS
+  @{
+ */
+
+/**
+  @brief         Root Mean Square of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, and intermediate multiplication
+                   yields a 2.62 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows, it wraps around and distorts the result.
+                   In order to avoid overflows completely, the input signal must be scaled down by
+                   log2(blockSize) bits, as a total of blockSize additions are performed internally.
+                   Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
+ */
+
+void arm_rms_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        uint64_t sum = 0;                              /* Temporary result storage (can get never negative. changed type from q63 to uint64 */
+        q31_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sum. */
+    sum += ((q63_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ((q63_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
+  /* Compute Rms and store result in destination vector */
+  arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
+}
+
+/**
+  @} end of RMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
new file mode 100644
index 00000000..214a794f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
@@ -0,0 +1,188 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_std_f32.c
+ * Description:  Standard deviation of the elements of a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup STD Standard deviation
+
+  Calculates the standard deviation of the elements in the input vector.
+  The underlying algorithm is used:
+
+  
+      Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))
+
+      sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
+      sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
+  

+
+  There are separate functions for floating point, Q31, and Q15 data types.
+ */
+
+/**
+  @addtogroup STD
+  @{
+ */
+
+/**
+  @brief         Standard deviation of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    standard deviation value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_std_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+  float32_t var;
+  arm_var_f32(pSrc,blockSize,&var);
+  arm_sqrt_f32(var, pResult);
+}
+#else
+void arm_std_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
+        float32_t in;                                  /* Temporary variable to store input value */
+
+#ifndef ARM_MATH_CM0_FAMILY
+        float32_t meanOfSquares, mean, squareOfMean;   /* Temporary variables */
+#else
+        float32_t squareOfSum;                         /* Square of Sum */
+        float32_t var;                                 /* Temporary varaince storage */
+#endif
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += in * in;
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += in * in;
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += in * in;
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += in * in;
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ( in * in);
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+#ifndef ARM_MATH_CM0_FAMILY
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
+
+  /* Compute mean of all input values */
+  mean = sum / (float32_t) blockSize;
+
+  /* Compute square of mean */
+  squareOfMean = (mean * mean) * (((float32_t) blockSize) /
+                                  ((float32_t) blockSize - 1.0f));
+
+  /* Compute standard deviation and store result to destination */
+  arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
+
+#else
+  /* Run the below code for Cortex-M0 */
+
+  /* Compute square of sum */
+  squareOfSum = ((sum * sum) / (float32_t) blockSize);
+
+  /* Compute variance */
+  var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
+
+  /* Compute standard deviation and store result in destination */
+  arm_sqrt_f32(var, pResult);
+
+#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of STD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
new file mode 100644
index 00000000..70d142db
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
@@ -0,0 +1,161 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_std_q15.c
+ * Description:  Standard deviation of an array of Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup STD
+  @{
+ */
+
+/**
+  @brief         Standard deviation of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    standard deviation value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
+ */
+
+void arm_std_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Accumulator */
+        q31_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+  q31_t in32;                                    /* Temporary variable to store input value */
+#endif
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    /* Compute sum and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
+
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
+#else
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += (in * in);
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
+
+  /* Compute square of mean */
+  squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+
+  /* mean of squares minus the square of mean. */
+  /* Compute standard deviation and store result in destination */
+  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult);
+}
+
+/**
+  @} end of STD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
new file mode 100644
index 00000000..1452a695
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
@@ -0,0 +1,147 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_std_q31.c
+ * Description:  Standard deviation of the elements of a Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup STD
+  @{
+ */
+
+/**
+  @brief         Standard deviation of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[in]     blockSize  number of samples in input vector.
+  @param[out]    pResult    standard deviation value returned here.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, which is then downshifted by 8 bits
+                   which yields 1.23, and intermediate multiplication yields a 2.46 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   but provides only a 16 guard bits.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
+                   After division, internal variables should be Q18.46
+                   Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
+ */
+
+void arm_std_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Accumulator */
+        q63_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q31_t in;                                      /* Temporary variable to store input value */
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
+
+  /* Compute square of mean */
+  squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+
+  /* Compute standard deviation and store result in destination */
+  arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15U, pResult);
+}
+
+/**
+  @} end of STD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
new file mode 100644
index 00000000..18f5806f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
@@ -0,0 +1,234 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_var_f32.c
+ * Description:  Variance of the elements of a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup variance  Variance
+
+  Calculates the variance of the elements in the input vector.
+  The underlying algorithm used is the direct method sometimes referred to as the two-pass method:
+
+  
+      Result = sum(element - meanOfElements)^2) / numElement - 1
+
+      meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
+  

+
+  There are separate functions for floating point, Q31, and Q15 data types.
+ */
+
+/**
+  @addtogroup variance
+  @{
+ */
+
+/**
+  @brief         Variance of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_var_f32(
+           const float32_t * pSrc,
+                 uint32_t blockSize,
+                 float32_t * pResult)
+{
+  float32_t mean;
+
+  float32_t sum = 0.0f;                          /* accumulator */
+  float32_t in;                                  /* Temporary variable to store input value */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
+  float32x4_t avg;
+
+  arm_mean_f32(pSrc,blockSize,&mean);
+  avg = vdupq_n_f32(mean);
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* Compute Power and then store the result in a temporary variable, sum. */
+    inV = vld1q_f32(pSrc);
+    inV = vsubq_f32(inV, avg);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = sumV2[0] + sumV2[1];
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* compute power and then store the result in a temporary variable, sum. */
+    in = *pSrc++;
+    in = in - mean;
+    sum += in * in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Variance */
+  *pResult = sum / (float32_t)(blockSize - 1.0f);
+
+}
+
+#else
+void arm_var_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t fSum = 0.0f;
+        float32_t fMean, fValue;
+  const float32_t * pInput = pSrc;
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += *pInput++;
+    sum += *pInput++;
+    sum += *pInput++;
+    sum += *pInput++;
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += *pInput++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  fMean = sum / (float32_t) blockSize;
+
+  pInput = pSrc;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Variance */
+  *pResult = fSum / (float32_t)(blockSize - 1.0f);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of variance group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
new file mode 100644
index 00000000..42185227
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
@@ -0,0 +1,164 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_var_q15.c
+ * Description:  Variance of an array of Q15 type
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup variance
+  @{
+ */
+
+/**
+  @brief         Variance of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
+ */
+
+void arm_var_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Accumulator */
+        q31_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store input value */
+#endif
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    /* Compute sum and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
+
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
+#else
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+#if defined (ARM_MATH_DSP)
+    sumOfSquares = __SMLALD(in, in, sumOfSquares);
+#else
+    sumOfSquares += (in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
+
+  /* Compute square of mean */
+  squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+
+  /* mean of squares minus the square of mean. */
+  *pResult = (meanOfSquares - squareOfMean) >> 15U;
+}
+
+/**
+  @} end of variance group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
new file mode 100644
index 00000000..6b552db5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
@@ -0,0 +1,147 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_var_q31.c
+ * Description:  Variance of an array of Q31 type
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup variance
+  @{
+ */
+
+/**
+  @brief         Variance of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, which is then downshifted by 8 bits
+                   which yields 1.23, and intermediate multiplication yields a 2.46 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   but provides only a 16 guard bits.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
+                   After division, internal variables should be Q18.46
+                   Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
+ */
+
+void arm_var_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q63_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q31_t in;                                      /* Temporary variable to store input value */
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
+
+  /* Compute square of mean */
+  squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+
+  /* Compute variance and store result in destination */
+  *pResult = (meanOfSquares - squareOfMean) >> 15U;
+}
+
+/**
+  @} end of variance group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c
new file mode 100644
index 00000000..d1ab9d42
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c
@@ -0,0 +1,48 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        SupportFunctions.c
+ * Description:  Combination of all support function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_copy_f32.c"
+#include "arm_copy_q15.c"
+#include "arm_copy_q31.c"
+#include "arm_copy_q7.c"
+#include "arm_fill_f32.c"
+#include "arm_fill_q15.c"
+#include "arm_fill_q31.c"
+#include "arm_fill_q7.c"
+#include "arm_float_to_q15.c"
+#include "arm_float_to_q31.c"
+#include "arm_float_to_q7.c"
+#include "arm_q15_to_float.c"
+#include "arm_q15_to_q31.c"
+#include "arm_q15_to_q7.c"
+#include "arm_q31_to_float.c"
+#include "arm_q31_to_q15.c"
+#include "arm_q31_to_q7.c"
+#include "arm_q7_to_float.c"
+#include "arm_q7_to_q15.c"
+#include "arm_q7_to_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
new file mode 100644
index 00000000..a4eb6060
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
@@ -0,0 +1,152 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_f32.c
+ * Description:  Copies the elements of a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @defgroup copy Vector Copy
+
+  Copies sample by sample from source vector to destination vector.
+
+  
+      pDst[n] = pSrc[n];   0 <= n < blockSize.
+  

+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_copy_f32(
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t inV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+    /* Copy and then store the results in the destination buffer */
+    inV = vld1q_f32(pSrc);
+    vst1q_f32(pDst, inV);
+    pSrc += 4;
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+    /* Copy and then store the results in the destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_copy_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
new file mode 100644
index 00000000..0a356e7f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
@@ -0,0 +1,96 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_q15.c
+ * Description:  Copies the elements of a Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a Q15 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_copy_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* read 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
+    write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
new file mode 100644
index 00000000..72217158
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
@@ -0,0 +1,98 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_q31.c
+ * Description:  Copies the elements of a Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a Q31 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_copy_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
new file mode 100644
index 00000000..3d358885
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
@@ -0,0 +1,95 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_q7.c
+ * Description:  Copies the elements of a Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a Q7 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_copy_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* read 4 samples at a time */
+    write_q7x4_ia (&pDst, read_q7x4_ia ((q7_t **) &pSrc));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
new file mode 100644
index 00000000..e4f9301e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
@@ -0,0 +1,151 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_f32.c
+ * Description:  Fills a constant value into a floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @defgroup Fill Vector Fill
+
+  Fills the destination vector with a constant value.
+
+  
+      pDst[n] = value;   0 <= n < blockSize.
+  

+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a floating-point vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_fill_f32(
+  float32_t value,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+
+  float32x4_t inV = vdupq_n_f32(value);
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+    /* Fill the value in the destination buffer */
+    vst1q_f32(pDst, inV);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+    /* Fill the value in the destination buffer */
+    *pDst++ = value;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_fill_f32(
+  float32_t value,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
new file mode 100644
index 00000000..6296678f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
@@ -0,0 +1,100 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_q15.c
+ * Description:  Fills a constant value into a Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a Q15 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_fill_q15(
+  q15_t value,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t packedValue;                             /* value packed to 32 bits */
+
+  /* Packing two 16 bit values to 32 bit value in order to use SIMD */
+  packedValue = __PKHBT(value, value, 16U);
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* fill 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, packedValue);
+    write_q15x2_ia (&pDst, packedValue);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
new file mode 100644
index 00000000..001b8620
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
@@ -0,0 +1,98 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_q31.c
+ * Description:  Fills a constant value into a Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a Q31 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_fill_q31(
+  q31_t value,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
new file mode 100644
index 00000000..0c32aa0f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
@@ -0,0 +1,99 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_q7.c
+ * Description:  Fills a constant value into a Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a Q7 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_fill_q7(
+  q7_t value,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t packedValue;                             /* value packed to 32 bits */
+
+  /* Packing four 8 bit values to 32 bit value in order to use SIMD */
+  packedValue = __PACKq7(value, value, value, value);
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* fill 4 samples at a time */
+    write_q7x4_ia (&pDst, packedValue);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
new file mode 100644
index 00000000..a3c8bb2b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
@@ -0,0 +1,244 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q15.c
+ * Description:  Converts the elements of the floating-point vector to Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup float_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the floating-point vector to Q15 vector.
+  @param[in]     pSrc       points to the floating-point input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
+  

+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+
+  @note
+                   In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+                   defined in the preprocessor section of project options.
+ */
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_float_to_q15(
+  const float32_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32_t in;
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 32768.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 32768.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  #endif
+
+  int32x4_t cvt;
+  int16x4_t outV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+
+    pIn += 4;
+
+    cvt = vcvtq_n_s32_f32(inV,15);
+    outV = vqmovn_s32(cvt);
+
+    vst1_s16(pDst, outV);
+    pDst += 4;
+
+#else
+
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+
+    cvt = vcvtq_n_s32_f32(inV,15);
+    outV = vqmovn_s32(cvt);
+
+    vst1_s16(pDst, outV);
+    pDst += 4;
+    pIn += 4;
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    in = *pIn++;
+    in = (in * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_float_to_q15(
+  const float32_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 32768 */
+
+    /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 32768 */
+
+    /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of float_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c
new file mode 100644
index 00000000..214987f2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c
@@ -0,0 +1,252 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q31.c
+ * Description:  Converts the elements of the floating-point vector to Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup float_to_x  Convert 32-bit floating point value
+ */
+
+/**
+  @addtogroup float_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the floating-point vector to Q31 vector.
+  @param[in]     pSrc       points to the floating-point input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.
+  

+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+
+  @note
+                   In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+                   defined in the preprocessor section of project options.
+ */
+
+#if defined(ARM_MATH_NEON)
+void arm_float_to_q31(
+  const float32_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32_t in;
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 2147483648.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 2147483648.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  #endif
+
+  int32x4_t outV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+
+    /* C = A * 32768 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+
+    pIn += 4;
+
+    outV = vcvtq_n_s32_f32(inV,31);
+
+    vst1q_s32(pDst, outV);
+    pDst += 4;
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+
+    outV = vcvtq_n_s32_f32(inV,31);
+
+    vst1q_s32(pDst, outV);
+    pDst += 4;
+    pIn += 4;
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    in = *pIn++;
+    in = (in * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+
+}
+#else
+void arm_float_to_q31(
+  const float32_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 2147483648 */
+
+    /* convert from float to Q31 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 2147483648 */
+
+    /* convert from float to Q31 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of float_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c
new file mode 100644
index 00000000..3b7d6c6c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c
@@ -0,0 +1,253 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q7.c
+ * Description:  Converts the elements of the floating-point vector to Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup float_to_x
+  @{
+ */
+
+/**
+ * @brief Converts the elements of the floating-point vector to Q7 vector.
+ * @param[in]       *pSrc points to the floating-point input vector
+ * @param[out]      *pDst points to the Q7 output vector
+ * @param[in]       blockSize length of the input vector
+ * @return none.
+ *
+ *\par Description:
+ * \par
+ * The equation used for the conversion process is:
+ * 
+ * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.
+ * 

+ * \par Scaling and Overflow Behavior:
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ * \note
+ * In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+ * defined in the preprocessor section of project options.
+ */
+
+#if defined(ARM_MATH_NEON)
+void arm_float_to_q7(
+  const float32_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32_t in;
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 128.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 128.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  #endif
+
+  int32x4_t cvt;
+  int16x4_t cvt1,cvt2;
+  int8x8_t outV;
+
+  blkCnt = blockSize >> 3U;
+
+  /* Compute 8 outputs at a time.
+   ** a second loop below computes the remaining 1 to 7 samples. */
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+    /* C = A * 128 */
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+    cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+    cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+    
+    outV = vqmovn_s16(vcombine_s16(cvt1,cvt2));
+    vst1_s8(pDst, outV);
+    pDst += 8;
+
+#else
+
+    /* C = A * 128 */
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+
+    inV = vld1q_f32(pIn);
+    cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+
+    outV = vqmovn_s16(vcombine_s16(cvt1,cvt2));
+
+    vst1_s8(pDst, outV);
+    pDst += 8;
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 7;
+
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+    /* C = A * 128 */
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    in = *pIn++;
+    in = (in * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+    /* C = A * 128 */
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+}
+#else
+void arm_float_to_q7(
+  const float32_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 128 */
+
+    /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 128 */
+
+    /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+    *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of float_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c
new file mode 100644
index 00000000..a87946cc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c
@@ -0,0 +1,166 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q15_to_float.c
+ * Description:  Converts the elements of the Q15 vector to floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q15_to_x  Convert 16-bit Integer value
+ */
+
+/**
+  @addtogroup q15_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q15 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.
+  

+ */
+
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_q15_to_float(
+  const q15_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  const q15_t *pIn = pSrc;                             /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  int16x8_t inV;
+  int32x4_t inV0, inV1;
+  float32x4_t outV;
+
+  blkCnt = blockSize >> 3U;
+
+  /* Compute 8 outputs at a time.
+   ** a second loop below computes the remaining 1 to 7 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+    /* convert from q15 to float and then store the results in the destination buffer */
+    inV = vld1q_s16(pIn);
+    pIn += 8;
+
+    inV0 = vmovl_s16(vget_low_s16(inV));
+    inV1 = vmovl_s16(vget_high_s16(inV));
+
+    outV = vcvtq_n_f32_s32(inV0,15);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inV1,15);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+  
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 7;
+
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+    /* convert from q15 to float and then store the results in the destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q15_to_float(
+  const q15_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 32768.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of q15_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c
new file mode 100644
index 00000000..c7451215
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c
@@ -0,0 +1,138 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q15_to_q31.c
+ * Description:  Converts the elements of the Q15 vector to Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q15_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q15 vector to Q31 vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.
+  

+ */
+
+void arm_q15_to_q31(
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in1, in2;
+        q31_t out1, out2, out3, out4;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t)A << 16 */
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    in1 = read_q15x2_ia ((q15_t **) &pIn);
+    in2 = read_q15x2_ia ((q15_t **) &pIn);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+    /* extract lower 16 bits to 32 bit result */
+    out1 = in1 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out2 = in1 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out3 = in2 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out4 = in2 & 0xFFFF0000;
+
+#else
+
+    /* extract upper 16 bits to 32 bit result */
+    out1 = in1 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out2 = in1 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out3 = in2 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out4 = in2 << 16U;
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    *pDst++ = out1;
+    *pDst++ = out2;
+    *pDst++ = out3;
+    *pDst++ = out4;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 16 */
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) *pIn++ << 16;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of q15_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c
new file mode 100644
index 00000000..4f90d561
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c
@@ -0,0 +1,146 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q15_to_q7.c
+ * Description:  Converts the elements of the Q15 vector to Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q15_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q15 vector to Q7 vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the Q7 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.
+  

+ */
+
+void arm_q15_to_q7(
+  const q15_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in1, in2;
+        q31_t out1, out2;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) A >> 8 */
+
+    /* Convert from q15 to q7 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+    in1 = read_q15x2_ia ((q15_t **) &pIn);
+    in2 = read_q15x2_ia ((q15_t **) &pIn);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+    out1 = __PKHTB(in2, in1, 16);
+    out2 = __PKHBT(in2, in1, 16);
+
+#else
+
+    out1 = __PKHTB(in1, in2, 16);
+    out2 = __PKHBT(in1, in2, 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* rotate packed value by 24 */
+    out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
+
+    /* anding with 0xff00ff00 to get two 8 bit values */
+    out1 = out1 & 0xFF00FF00;
+    /* anding with 0x00ff00ff to get two 8 bit values */
+    out2 = out2 & 0x00FF00FF;
+
+    /* oring two values(contains two 8 bit values) to get four packed 8 bit values */
+    out1 = out1 | out2;
+
+    /* store 4 samples at a time to destiantion buffer */
+    write_q7x4_ia (&pDst, out1);
+
+#else
+
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) A >> 8 */
+
+    /* Convert from q15 to q7 and store result in destination buffer */
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of q15_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c
new file mode 100644
index 00000000..8ff9e7b5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c
@@ -0,0 +1,159 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q31_to_float.c
+ * Description:  Converts the elements of the Q31 vector to floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q31_to_x  Convert 32-bit Integer value
+ */
+
+/**
+  @addtogroup q31_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q31 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.
+  

+ */
+
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_q31_to_float(
+  const q31_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  int32x4_t inV;
+  float32x4_t outV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+    /* Convert from q31 to float and then store the results in the destination buffer */
+    inV = vld1q_s32(pIn);
+    pIn += 4;
+
+    outV = vcvtq_n_f32_s32(inV,31);
+
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+    /* Convert from q31 to float and then store the results in the destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q31_to_float(
+  const q31_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+
+    /* Convert from q31 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+
+    /* Convert from q31 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of q31_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c
new file mode 100644
index 00000000..8dac98d2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q31_to_q15.c
+ * Description:  Converts the elements of the Q31 vector to Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q31_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q31 vector to Q15 vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.
+  

+ */
+
+void arm_q31_to_q15(
+  const q31_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in1, in2, in3, in4;
+        q31_t out1, out2;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) (A >> 16) */
+
+    /* Convert from q31 to q15 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+    in1 = *pIn++;
+    in2 = *pIn++;
+    in3 = *pIn++;
+    in4 = *pIn++;
+
+    /* pack two higher 16-bit values from two 32-bit values */
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __PKHTB(in2, in1, 16);
+    out2 = __PKHTB(in4, in3, 16);
+#else
+    out1 = __PKHTB(in1, in2, 16);
+    out2 = __PKHTB(in3, in4, 16);
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2_ia (&pDst, out1);
+    write_q15x2_ia (&pDst, out2);
+
+#else
+
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) (A >> 16) */
+
+    /* Convert from q31 to q15 and store result in destination buffer */
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of q31_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c
new file mode 100644
index 00000000..80433d04
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c
@@ -0,0 +1,110 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q31_to_q7.c
+ * Description:  Converts the elements of the Q31 vector to Q7 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q31_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q31 vector to Q7 vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the Q7 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.
+  

+ */
+
+void arm_q31_to_q7(
+  const q31_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  q7_t out1, out2, out3, out4;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) (A >> 24) */
+
+    /* Convert from q31 to q7 and store result in destination buffer */
+
+    out1 = (q7_t) (*pIn++ >> 24);
+    out2 = (q7_t) (*pIn++ >> 24);
+    out3 = (q7_t) (*pIn++ >> 24);
+    out4 = (q7_t) (*pIn++ >> 24);
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) (A >> 24) */
+
+    /* Convert from q31 to q7 and store result in destination buffer */
+    *pDst++ = (q7_t) (*pIn++ >> 24);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of q31_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c
new file mode 100644
index 00000000..eee0d988
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c
@@ -0,0 +1,179 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q7_to_float.c
+ * Description:  Converts the elements of the Q7 vector to floating-point vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q7_to_x  Convert 8-bit Integer value
+ */
+
+/**
+  @addtogroup q7_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q7 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+ @par            Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.
+  

+ */
+
+#if defined(ARM_MATH_NEON)
+void arm_q7_to_float(
+  const q7_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  const q7_t *pIn = pSrc;                              /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  int8x16_t inV;
+  int16x8_t inVLO, inVHI;
+  int32x4_t inVLL, inVLH, inVHL, inVHH;
+  float32x4_t outV;
+
+  blkCnt = blockSize >> 4U;
+
+  /* Compute 16 outputs at a time.
+   ** a second loop below computes the remaining 1 to 15 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+    /* Convert from q7 to float and then store the results in the destination buffer */
+    inV = vld1q_s8(pIn);
+    pIn += 16;
+
+    inVLO = vmovl_s8(vget_low_s8(inV));
+    inVHI = vmovl_s8(vget_high_s8(inV));
+
+    inVLL = vmovl_s16(vget_low_s16(inVLO));
+    inVLH = vmovl_s16(vget_high_s16(inVLO));
+    inVHL = vmovl_s16(vget_low_s16(inVHI));
+    inVHH = vmovl_s16(vget_high_s16(inVHI));
+
+    outV = vcvtq_n_f32_s32(inVLL,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVLH,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVHL,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVHH,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 16, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 0xF;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+    /* Convert from q7 to float and then store the results in the destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q7_to_float(
+  const q7_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+
+    /* Convert from q7 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+
+    /* Convert from q7 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of q7_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c
new file mode 100644
index 00000000..78dae9e6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c
@@ -0,0 +1,143 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q7_to_q15.c
+ * Description:  Converts the elements of the Q7 vector to Q15 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q7_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q7 vector to Q15 vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.
+  

+ */
+
+void arm_q7_to_q15(
+  const q7_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t in1, in2;
+        q31_t out1, out2;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) A << 8 */
+
+    /* Convert from q7 to q15 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+    in = read_q7x4_ia ((q7_t **) &pIn);
+
+    /* rotatate in by 8 and extend two q7_t values to q15_t values */
+    in1 = __SXTB16(__ROR(in, 8));
+
+    /* extend remainig two q7_t values to q15_t values */
+    in2 = __SXTB16(in);
+
+    in1 = in1 << 8U;
+    in2 = in2 << 8U;
+
+    in1 = in1 & 0xFF00FF00;
+    in2 = in2 & 0xFF00FF00;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out2 = __PKHTB(in1, in2, 16);
+    out1 = __PKHBT(in2, in1, 16);
+#else
+    out1 = __PKHTB(in1, in2, 16);
+    out2 = __PKHBT(in2, in1, 16);
+#endif
+
+    write_q15x2_ia (&pDst, out1);
+    write_q15x2_ia (&pDst, out2);
+
+#else
+
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) A << 8 */
+
+    /* Convert from q7 to q15 and store result in destination buffer */
+    *pDst++ = (q15_t) * pIn++ << 8;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of q7_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c
new file mode 100644
index 00000000..9d5cde94
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c
@@ -0,0 +1,121 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q7_to_q31.c
+ * Description:  Converts the elements of the Q7 vector to Q31 vector
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q7_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q7 vector to Q31 vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  
+      pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.
+  

+ */
+
+void arm_q7_to_q31(
+  const q7_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        q31_t in;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 24 */
+
+    /* Convert from q7 to q31 and store result in destination buffer */
+    in = read_q7x4_ia ((q7_t **) &pIn);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
+    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
+    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
+    *pDst++ = (in & 0xFF000000);
+
+#else
+
+    *pDst++ = (in & 0xFF000000);
+    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
+    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
+    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 24 */
+
+    /* Convert from q7 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) * pIn++ << 24;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of q7_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c
new file mode 100644
index 00000000..fcd0d955
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c
@@ -0,0 +1,60 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        TransformFunctions.c
+ * Description:  Combination of all transform function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_bitreversal.c"
+#include "arm_bitreversal2.c"
+#include "arm_cfft_f32.c"
+#include "arm_cfft_q15.c"
+#include "arm_cfft_q31.c"
+#include "arm_cfft_radix2_f32.c"
+#include "arm_cfft_radix2_init_f32.c"
+#include "arm_cfft_radix2_init_q15.c"
+#include "arm_cfft_radix2_init_q31.c"
+#include "arm_cfft_radix2_q15.c"
+#include "arm_cfft_radix2_q31.c"
+#include "arm_cfft_radix4_f32.c"
+#include "arm_cfft_radix4_init_f32.c"
+#include "arm_cfft_radix4_init_q15.c"
+#include "arm_cfft_radix4_init_q31.c"
+#include "arm_cfft_radix4_q15.c"
+#include "arm_cfft_radix4_q31.c"
+#include "arm_cfft_radix8_f32.c"
+#include "arm_dct4_f32.c"
+#include "arm_dct4_init_f32.c"
+#include "arm_dct4_init_q15.c"
+#include "arm_dct4_init_q31.c"
+#include "arm_dct4_q15.c"
+#include "arm_dct4_q31.c"
+#include "arm_rfft_f32.c"
+#include "arm_rfft_fast_f32.c"
+#include "arm_rfft_fast_init_f32.c"
+#include "arm_rfft_init_f32.c"
+#include "arm_rfft_init_q15.c"
+#include "arm_rfft_init_q31.c"
+#include "arm_rfft_q15.c"
+#include "arm_rfft_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c
new file mode 100644
index 00000000..de95c598
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c
@@ -0,0 +1,229 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bitreversal.c
+ * Description:  Bitreversal functions
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @brief         In-place floating-point bit reversal function.
+  @param[in,out] pSrc         points to in-place floating-point data buffer
+  @param[in]     fftSize      length of FFT
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
+ */
+
+void arm_bitreversal_f32(
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
+{
+   uint16_t fftLenBy2, fftLenBy2p1;
+   uint16_t i, j;
+   float32_t in;
+
+   /*  Initializations */
+   j = 0U;
+   fftLenBy2 = fftSize >> 1U;
+   fftLenBy2p1 = (fftSize >> 1U) + 1U;
+
+   /* Bit Reversal Implementation */
+   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
+   {
+      if (i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         in = pSrc[2U * i];
+         pSrc[2U * i] = pSrc[2U * j];
+         pSrc[2U * j] = in;
+
+         /*  pSrc[i+1U] <-> pSrc[j+1U] */
+         in = pSrc[(2U * i) + 1U];
+         pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];
+         pSrc[(2U * j) + 1U] = in;
+
+         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
+         in = pSrc[2U * (i + fftLenBy2p1)];
+         pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];
+         pSrc[2U * (j + fftLenBy2p1)] = in;
+
+         /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */
+         in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (i + fftLenBy2p1)) + 1U] =
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;
+
+      }
+
+      /*  pSrc[i+1U] <-> pSrc[j+1U] */
+      in = pSrc[2U * (i + 1U)];
+      pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];
+      pSrc[2U * (j + fftLenBy2)] = in;
+
+      /*  pSrc[i+2U] <-> pSrc[j+2U] */
+      in = pSrc[(2U * (i + 1U)) + 1U];
+      pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];
+      pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
+
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
+
+      /*  Updating the bit reversal index depending on the fft length  */
+      pBitRevTab += bitRevFactor;
+   }
+}
+
+
+/**
+  @brief         In-place Q31 bit reversal function.
+  @param[in,out] pSrc         points to in-place Q31 data buffer.
+  @param[in]     fftLen       length of FFT.
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
+{
+   uint32_t fftLenBy2, fftLenBy2p1, i, j;
+   q31_t in;
+
+   /*  Initializations      */
+   j = 0U;
+   fftLenBy2 = fftLen / 2U;
+   fftLenBy2p1 = (fftLen / 2U) + 1U;
+
+   /* Bit Reversal Implementation */
+   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
+   {
+      if (i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         in = pSrc[2U * i];
+         pSrc[2U * i] = pSrc[2U * j];
+         pSrc[2U * j] = in;
+
+         /*  pSrc[i+1U] <-> pSrc[j+1U] */
+         in = pSrc[(2U * i) + 1U];
+         pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];
+         pSrc[(2U * j) + 1U] = in;
+
+         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
+         in = pSrc[2U * (i + fftLenBy2p1)];
+         pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];
+         pSrc[2U * (j + fftLenBy2p1)] = in;
+
+         /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */
+         in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (i + fftLenBy2p1)) + 1U] =
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;
+
+      }
+
+      /*  pSrc[i+1U] <-> pSrc[j+1U] */
+      in = pSrc[2U * (i + 1U)];
+      pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];
+      pSrc[2U * (j + fftLenBy2)] = in;
+
+      /*  pSrc[i+2U] <-> pSrc[j+2U] */
+      in = pSrc[(2U * (i + 1U)) + 1U];
+      pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];
+      pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
+
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
+
+      /*  Updating the bit reversal index depending on the fft length */
+      pBitRevTab += bitRevFactor;
+   }
+}
+
+
+
+/**
+  @brief         In-place Q15 bit reversal function.
+  @param[in,out] pSrc16       points to in-place Q15 data buffer
+  @param[in]     fftLen       length of FFT
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_q15(
+        q15_t * pSrc16,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
+{
+   q31_t *pSrc = (q31_t *) pSrc16;
+   q31_t in;
+   uint32_t fftLenBy2, fftLenBy2p1;
+   uint32_t i, j;
+
+   /*  Initializations */
+   j = 0U;
+   fftLenBy2 = fftLen / 2U;
+   fftLenBy2p1 = (fftLen / 2U) + 1U;
+
+   /* Bit Reversal Implementation */
+   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
+   {
+      if (i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         /*  pSrc[i+1U] <-> pSrc[j+1U] */
+         in = pSrc[i];
+         pSrc[i] = pSrc[j];
+         pSrc[j] = in;
+
+         /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
+         /*  pSrc[i + fftLenBy2p1+1U] <-> pSrc[j + fftLenBy2p1+1U] */
+         in = pSrc[i + fftLenBy2p1];
+         pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
+         pSrc[j + fftLenBy2p1] = in;
+      }
+
+      /*  pSrc[i+1U] <-> pSrc[j+fftLenBy2];         */
+      /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1U]  */
+      in = pSrc[i + 1U];
+      pSrc[i + 1U] = pSrc[j + fftLenBy2];
+      pSrc[j + fftLenBy2] = in;
+
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
+
+      /*  Updating the bit reversal index depending on the fft length  */
+      pBitRevTab += bitRevFactor;
+   }
+}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal2.S b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
similarity index 52%
rename from Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal2.S
rename to Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
index 4ea77e57..01c1e769 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal2.S
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
@@ -1,55 +1,43 @@
 ;/* ----------------------------------------------------------------------
-;* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-;*
-;* $Date:       19. March 2015 
-;* $Revision: 	V.1.4.5
-;*
-;* Project: 	CMSIS DSP Library
-;* Title:	    arm_bitreversal2.S
-;*
-;* Description:	This is the arm_bitreversal_32 function done in
-;*              assembly for maximum speed.  This function is called
-;*              after doing an fft to reorder the output.  The function
-;*              is loop unrolled by 2. arm_bitreversal_16 as well.
-;*
-;* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-;*
-;* Redistribution and use in source and binary forms, with or without
-;* modification, are permitted provided that the following conditions
-;* are met:
-;*   - Redistributions of source code must retain the above copyright
-;*     notice, this list of conditions and the following disclaimer.
-;*   - Redistributions in binary form must reproduce the above copyright
-;*     notice, this list of conditions and the following disclaimer in
-;*     the documentation and/or other materials provided with the
-;*     distribution.
-;*   - Neither the name of ARM LIMITED nor the names of its contributors
-;*     may be used to endorse or promote products derived from this
-;*     software without specific prior written permission.
-;*
-;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-;* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-;* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-;* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-;* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-;* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-;* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-;* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-;* POSSIBILITY OF SUCH DAMAGE.
-;* -------------------------------------------------------------------- */
-#if defined(__CC_ARM)       // Keil
+; * Project:      CMSIS DSP Library
+; * Title:        arm_bitreversal2.S
+; * Description:  arm_bitreversal_32 function done in assembly for maximum speed.
+; *               Called after doing an fft to reorder the output.
+; *               The function is loop unrolled by 2. arm_bitreversal_16 as well.
+; *
+; * $Date:        18. March 2019
+; * $Revision:    V1.5.2
+; *
+; * Target Processor: Cortex-M cores
+; * -------------------------------------------------------------------- */
+;/*
+; * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+#if   defined ( __CC_ARM )     /* Keil */
     #define CODESECT AREA     ||.text||, CODE, READONLY, ALIGN=2
     #define LABEL
-#elif defined(__IASMARM__)  // IAR
+#elif defined ( __IASMARM__ )  /* IAR */
     #define CODESECT SECTION `.text`:CODE
     #define PROC
     #define LABEL
     #define ENDP
     #define EXPORT PUBLIC
-#elif defined(__CSMC__)		/* Cosmic */
+#elif defined ( __CSMC__ )	   /* Cosmic */
 	#define	CODESECT	switch .text
 	#define THUMB
 	#define EXPORT	xdef
@@ -57,7 +45,15 @@
 	#define LABEL	:
 	#define ENDP
 	#define arm_bitreversal_32 _arm_bitreversal_32
-#elif defined (__GNUC__)    // GCC
+#elif defined ( __TI_ARM__ )   /* TI ARM */
+    #define THUMB    .thumb
+    #define CODESECT .text
+    #define EXPORT   .global
+    #define PROC     : .asmfunc
+    #define LABEL    :
+    #define ENDP     .endasmfunc
+    #define END
+#elif defined ( __GNUC__ )     /* GCC */
     #define THUMB .thumb
     #define CODESECT .section .text
     #define EXPORT .global
@@ -72,17 +68,26 @@
 	CODESECT
 	THUMB
 
-;/*
-;* @brief  In-place bit reversal function.
-;* @param[in, out] *pSrc        points to the in-place buffer of unknown 32-bit data type.
-;* @param[in]      bitRevLen    bit reversal table length
-;* @param[in]      *pBitRevTab  points to bit reversal table.
-;* @return none.
-;*/
+;/**
+;  @brief         In-place bit reversal function.
+;  @param[in,out] pSrc        points to the in-place buffer of unknown 32-bit data type
+;  @param[in]     bitRevLen   bit reversal table length
+;  @param[in]     pBitRevTab  points to bit reversal table
+;  @return        none
+; */
 	EXPORT arm_bitreversal_32
 	EXPORT arm_bitreversal_16
 
-#if defined(ARM_MATH_CM0) || defined(ARM_MATH_CM0PLUS)
+#if   defined ( __CC_ARM )     /* Keil */
+#elif defined ( __IASMARM__ )  /* IAR */
+#elif defined ( __CSMC__ )	   /* Cosmic */
+#elif defined ( __TI_ARM__ )   /* TI ARM */
+#elif defined ( __GNUC__ )     /* GCC */
+	.type   arm_bitreversal_16, %function
+	.type   arm_bitreversal_32, %function
+#endif
+
+#if defined (ARM_MATH_CM0_FAMILY)
 
 arm_bitreversal_32 PROC
 	ADDS     r3,r1,#1
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c
new file mode 100644
index 00000000..29d57571
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c
@@ -0,0 +1,99 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bitreversal2.c
+ * Description:  Bitreversal functions
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @brief         In-place 32 bit reversal function.
+  @param[in,out] pSrc        points to in-place buffer of unknown 32-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_32(
+        uint32_t *pSrc, 
+  const uint16_t bitRevLen, 
+  const uint16_t *pBitRevTab)
+{
+  uint32_t a, b, i, tmp;
+
+  for (i = 0; i < bitRevLen; )
+  {
+     a = pBitRevTab[i    ] >> 2;
+     b = pBitRevTab[i + 1] >> 2;
+
+     //real
+     tmp = pSrc[a];
+     pSrc[a] = pSrc[b];
+     pSrc[b] = tmp;
+
+     //complex
+     tmp = pSrc[a+1];
+     pSrc[a+1] = pSrc[b+1];
+     pSrc[b+1] = tmp;
+
+    i += 2;
+  }
+}
+
+
+/**
+  @brief         In-place 16 bit reversal function.
+  @param[in,out] pSrc        points to in-place buffer of unknown 16-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_16(
+        uint16_t *pSrc, 
+  const uint16_t bitRevLen, 
+  const uint16_t *pBitRevTab)
+{
+  uint16_t a, b, i, tmp;
+
+  for (i = 0; i < bitRevLen; )
+  {
+     a = pBitRevTab[i    ] >> 2;
+     b = pBitRevTab[i + 1] >> 2;
+
+     //real
+     tmp = pSrc[a];
+     pSrc[a] = pSrc[b];
+     pSrc[b] = tmp;
+
+     //complex
+     tmp = pSrc[a+1];
+     pSrc[a+1] = pSrc[b+1];
+     pSrc[b+1] = tmp;
+
+    i += 2;
+  }
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c
new file mode 100644
index 00000000..15dbb8f5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c
@@ -0,0 +1,629 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_f32.c
+ * Description:  Combined Radix Decimation in Frequency CFFT Floating point processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+extern void arm_radix8_butterfly_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
+
+extern void arm_bitreversal_32(
+        uint32_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @defgroup ComplexFFT Complex FFT Functions
+ 
+  @par
+                   The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
+                   Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
+                   than the DFT, especially for long lengths.
+                   The algorithms described in this section
+                   operate on complex data.  A separate set of functions is devoted to handling
+                   of real sequences.
+  @par
+                   There are separate algorithms for handling floating-point, Q15, and Q31 data
+                   types.  The algorithms available for each data type are described next.
+  @par
+                   The FFT functions operate in-place.  That is, the array holding the input data
+                   will also be used to hold the corresponding result.  The input data is complex
+                   and contains 2*fftLen interleaved values as shown below.
+                   
{real[0], imag[0], real[1], imag[1], ...} 

+                   The FFT result will be contained in the same array and the frequency domain
+                   values will have the same interleaving.
+ 
+  @par Floating-point
+                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
+                   stages are performed along with a single radix-2 or radix-4 stage, as needed.
+                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+                   a different twiddle factor table.
+  @par
+                   The function uses the standard FFT definition and output values may grow by a
+                   factor of fftLen when computing the forward transform.  The
+                   inverse transform includes a scale of 1/fftLen as part of the
+                   calculation and this matches the textbook definition of the inverse FFT.
+  @par
+                   Pre-initialized data structures containing twiddle factors and bit reversal
+                   tables are provided and defined in arm_const_structs.h.  Include
+                   this header in your function and then pass one of the constant structures as
+                   an argument to arm_cfft_f32.  For example:
+  @par
+                   arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)
+  @par
+                   computes a 64-point inverse complex FFT including bit reversal.
+                   The data structures are treated as constant data and not modified during the
+                   calculation.  The same data structure can be reused for multiple transforms
+                   including mixing forward and inverse transforms.
+  @par
+                   Earlier releases of the library provided separate radix-2 and radix-4
+                   algorithms that operated on floating-point data.  These functions are still
+                   provided but are deprecated.  The older functions are slower and less general
+                   than the new functions.
+  @par
+                   An example of initialization of the constants for the arm_cfft_f32 function follows:
+  @code
+                   const static arm_cfft_instance_f32 *S;
+                   ...
+                     switch (length) {
+                       case 16:
+                         S = &arm_cfft_sR_f32_len16;
+                         break;
+                       case 32:
+                         S = &arm_cfft_sR_f32_len32;
+                         break;
+                       case 64:
+                         S = &arm_cfft_sR_f32_len64;
+                         break;
+                       case 128:
+                         S = &arm_cfft_sR_f32_len128;
+                         break;
+                       case 256:
+                         S = &arm_cfft_sR_f32_len256;
+                         break;
+                       case 512:
+                         S = &arm_cfft_sR_f32_len512;
+                         break;
+                       case 1024:
+                         S = &arm_cfft_sR_f32_len1024;
+                         break;
+                       case 2048:
+                         S = &arm_cfft_sR_f32_len2048;
+                         break;
+                       case 4096:
+                         S = &arm_cfft_sR_f32_len4096;
+                         break;
+                     }
+  @endcode
+  @par Q15 and Q31
+                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-4
+                   stages are performed along with a single radix-2 stage, as needed.
+                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+                   a different twiddle factor table.
+  @par
+                   The function uses the standard FFT definition and output values may grow by a
+                   factor of fftLen when computing the forward transform.  The
+                   inverse transform includes a scale of 1/fftLen as part of the
+                   calculation and this matches the textbook definition of the inverse FFT.
+  @par
+                   Pre-initialized data structures containing twiddle factors and bit reversal
+                   tables are provided and defined in arm_const_structs.h.  Include
+                   this header in your function and then pass one of the constant structures as
+                   an argument to arm_cfft_q31. For example:
+  @par
+                   arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)
+  @par
+                   computes a 64-point inverse complex FFT including bit reversal.
+                   The data structures are treated as constant data and not modified during the
+                   calculation.  The same data structure can be reused for multiple transforms
+                   including mixing forward and inverse transforms.
+  @par
+                   Earlier releases of the library provided separate radix-2 and radix-4
+                   algorithms that operated on floating-point data.  These functions are still
+                   provided but are deprecated.  The older functions are slower and less general
+                   than the new functions.
+  @par
+                   An example of initialization of the constants for the arm_cfft_q31 function follows:
+  @code
+                   const static arm_cfft_instance_q31 *S;
+                   ...
+                     switch (length) {
+                       case 16:
+                         S = &arm_cfft_sR_q31_len16;
+                         break;
+                       case 32:
+                         S = &arm_cfft_sR_q31_len32;
+                         break;
+                       case 64:
+                         S = &arm_cfft_sR_q31_len64;
+                         break;
+                       case 128:
+                         S = &arm_cfft_sR_q31_len128;
+                         break;
+                       case 256:
+                         S = &arm_cfft_sR_q31_len256;
+                         break;
+                       case 512:
+                         S = &arm_cfft_sR_q31_len512;
+                         break;
+                       case 1024:
+                         S = &arm_cfft_sR_q31_len1024;
+                         break;
+                       case 2048:
+                         S = &arm_cfft_sR_q31_len2048;
+                         break;
+                       case 4096:
+                         S = &arm_cfft_sR_q31_len4096;
+                         break;
+                     }
+  @endcode
+ 
+ */
+
+void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
+{
+  uint32_t    L  = S->fftLen;
+  float32_t * pCol1, * pCol2, * pMid1, * pMid2;
+  float32_t * p2 = p1 + L;
+  const float32_t * tw = (float32_t *) S->pTwiddle;
+  float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
+  float32_t m0, m1, m2, m3;
+  uint32_t l;
+
+  pCol1 = p1;
+  pCol2 = p2;
+
+  /* Define new length */
+  L >>= 1;
+
+  /* Initialize mid pointers */
+  pMid1 = p1 + L;
+  pMid2 = p2 + L;
+
+  /* do two dot Fourier transform */
+  for (l = L >> 2; l > 0; l-- )
+  {
+    t1[0] = p1[0];
+    t1[1] = p1[1];
+    t1[2] = p1[2];
+    t1[3] = p1[3];
+
+    t2[0] = p2[0];
+    t2[1] = p2[1];
+    t2[2] = p2[2];
+    t2[3] = p2[3];
+
+    t3[0] = pMid1[0];
+    t3[1] = pMid1[1];
+    t3[2] = pMid1[2];
+    t3[3] = pMid1[3];
+
+    t4[0] = pMid2[0];
+    t4[1] = pMid2[1];
+    t4[2] = pMid2[2];
+    t4[3] = pMid2[3];
+
+    *p1++ = t1[0] + t2[0];
+    *p1++ = t1[1] + t2[1];
+    *p1++ = t1[2] + t2[2];
+    *p1++ = t1[3] + t2[3];    /* col 1 */
+
+    t2[0] = t1[0] - t2[0];
+    t2[1] = t1[1] - t2[1];
+    t2[2] = t1[2] - t2[2];
+    t2[3] = t1[3] - t2[3];    /* for col 2 */
+
+    *pMid1++ = t3[0] + t4[0];
+    *pMid1++ = t3[1] + t4[1];
+    *pMid1++ = t3[2] + t4[2];
+    *pMid1++ = t3[3] + t4[3]; /* col 1 */
+
+    t4[0] = t4[0] - t3[0];
+    t4[1] = t4[1] - t3[1];
+    t4[2] = t4[2] - t3[2];
+    t4[3] = t4[3] - t3[3];    /* for col 2 */
+
+    twR = *tw++;
+    twI = *tw++;
+
+    /* multiply by twiddle factors */
+    m0 = t2[0] * twR;
+    m1 = t2[1] * twI;
+    m2 = t2[1] * twR;
+    m3 = t2[0] * twI;
+
+    /* R  =  R  *  Tr - I * Ti */
+    *p2++ = m0 + m1;
+    /* I  =  I  *  Tr + R * Ti */
+    *p2++ = m2 - m3;
+
+    /* use vertical symmetry */
+    /*  0.9988 - 0.0491i <==> -0.0491 - 0.9988i */
+    m0 = t4[0] * twI;
+    m1 = t4[1] * twR;
+    m2 = t4[1] * twI;
+    m3 = t4[0] * twR;
+
+    *pMid2++ = m0 - m1;
+    *pMid2++ = m2 + m3;
+
+    twR = *tw++;
+    twI = *tw++;
+
+    m0 = t2[2] * twR;
+    m1 = t2[3] * twI;
+    m2 = t2[3] * twR;
+    m3 = t2[2] * twI;
+
+    *p2++ = m0 + m1;
+    *p2++ = m2 - m3;
+
+    m0 = t4[2] * twI;
+    m1 = t4[3] * twR;
+    m2 = t4[3] * twI;
+    m3 = t4[2] * twR;
+
+    *pMid2++ = m0 - m1;
+    *pMid2++ = m2 + m3;
+  }
+
+  /* first col */
+  arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 2U);
+
+  /* second col */
+  arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 2U);
+}
+
+void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
+{
+    uint32_t    L  = S->fftLen >> 1;
+    float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;
+    const float32_t *tw2, *tw3, *tw4;
+    float32_t * p2 = p1 + L;
+    float32_t * p3 = p2 + L;
+    float32_t * p4 = p3 + L;
+    float32_t t2[4], t3[4], t4[4], twR, twI;
+    float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1;
+    float32_t m0, m1, m2, m3;
+    uint32_t l, twMod2, twMod3, twMod4;
+
+    pCol1 = p1;         /* points to real values by default */
+    pCol2 = p2;
+    pCol3 = p3;
+    pCol4 = p4;
+    pEnd1 = p2 - 1;     /* points to imaginary values by default */
+    pEnd2 = p3 - 1;
+    pEnd3 = p4 - 1;
+    pEnd4 = pEnd3 + L;
+
+    tw2 = tw3 = tw4 = (float32_t *) S->pTwiddle;
+
+    L >>= 1;
+
+    /* do four dot Fourier transform */
+
+    twMod2 = 2;
+    twMod3 = 4;
+    twMod4 = 6;
+
+    /* TOP */
+    p1ap3_0 = p1[0] + p3[0];
+    p1sp3_0 = p1[0] - p3[0];
+    p1ap3_1 = p1[1] + p3[1];
+    p1sp3_1 = p1[1] - p3[1];
+
+    /* col 2 */
+    t2[0] = p1sp3_0 + p2[1] - p4[1];
+    t2[1] = p1sp3_1 - p2[0] + p4[0];
+    /* col 3 */
+    t3[0] = p1ap3_0 - p2[0] - p4[0];
+    t3[1] = p1ap3_1 - p2[1] - p4[1];
+    /* col 4 */
+    t4[0] = p1sp3_0 - p2[1] + p4[1];
+    t4[1] = p1sp3_1 + p2[0] - p4[0];
+    /* col 1 */
+    *p1++ = p1ap3_0 + p2[0] + p4[0];
+    *p1++ = p1ap3_1 + p2[1] + p4[1];
+
+    /* Twiddle factors are ones */
+    *p2++ = t2[0];
+    *p2++ = t2[1];
+    *p3++ = t3[0];
+    *p3++ = t3[1];
+    *p4++ = t4[0];
+    *p4++ = t4[1];
+
+    tw2 += twMod2;
+    tw3 += twMod3;
+    tw4 += twMod4;
+
+    for (l = (L - 2) >> 1; l > 0; l-- )
+    {
+      /* TOP */
+      p1ap3_0 = p1[0] + p3[0];
+      p1sp3_0 = p1[0] - p3[0];
+      p1ap3_1 = p1[1] + p3[1];
+      p1sp3_1 = p1[1] - p3[1];
+      /* col 2 */
+      t2[0] = p1sp3_0 + p2[1] - p4[1];
+      t2[1] = p1sp3_1 - p2[0] + p4[0];
+      /* col 3 */
+      t3[0] = p1ap3_0 - p2[0] - p4[0];
+      t3[1] = p1ap3_1 - p2[1] - p4[1];
+      /* col 4 */
+      t4[0] = p1sp3_0 - p2[1] + p4[1];
+      t4[1] = p1sp3_1 + p2[0] - p4[0];
+      /* col 1 - top */
+      *p1++ = p1ap3_0 + p2[0] + p4[0];
+      *p1++ = p1ap3_1 + p2[1] + p4[1];
+
+      /* BOTTOM */
+      p1ap3_1 = pEnd1[-1] + pEnd3[-1];
+      p1sp3_1 = pEnd1[-1] - pEnd3[-1];
+      p1ap3_0 = pEnd1[ 0] + pEnd3[0];
+      p1sp3_0 = pEnd1[ 0] - pEnd3[0];
+      /* col 2 */
+      t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1;
+      t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
+      /* col 3 */
+      t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
+      t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0];
+      /* col 4 */
+      t4[2] = pEnd2[ 0] - pEnd4[ 0] - p1sp3_1;
+      t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
+      /* col 1 - Bottom */
+      *pEnd1-- = p1ap3_0 + pEnd2[ 0] + pEnd4[ 0];
+      *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
+
+      /* COL 2 */
+      /* read twiddle factors */
+      twR = *tw2++;
+      twI = *tw2++;
+      /* multiply by twiddle factors */
+      /*  let    Z1 = a + i(b),   Z2 = c + i(d) */
+      /*   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d) */
+
+      /* Top */
+      m0 = t2[0] * twR;
+      m1 = t2[1] * twI;
+      m2 = t2[1] * twR;
+      m3 = t2[0] * twI;
+
+      *p2++ = m0 + m1;
+      *p2++ = m2 - m3;
+      /* use vertical symmetry col 2 */
+      /* 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i */
+      /* Bottom */
+      m0 = t2[3] * twI;
+      m1 = t2[2] * twR;
+      m2 = t2[2] * twI;
+      m3 = t2[3] * twR;
+
+      *pEnd2-- = m0 - m1;
+      *pEnd2-- = m2 + m3;
+
+      /* COL 3 */
+      twR = tw3[0];
+      twI = tw3[1];
+      tw3 += twMod3;
+      /* Top */
+      m0 = t3[0] * twR;
+      m1 = t3[1] * twI;
+      m2 = t3[1] * twR;
+      m3 = t3[0] * twI;
+
+      *p3++ = m0 + m1;
+      *p3++ = m2 - m3;
+      /* use vertical symmetry col 3 */
+      /* 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i */
+      /* Bottom */
+      m0 = -t3[3] * twR;
+      m1 =  t3[2] * twI;
+      m2 =  t3[2] * twR;
+      m3 =  t3[3] * twI;
+
+      *pEnd3-- = m0 - m1;
+      *pEnd3-- = m3 - m2;
+
+      /* COL 4 */
+      twR = tw4[0];
+      twI = tw4[1];
+      tw4 += twMod4;
+      /* Top */
+      m0 = t4[0] * twR;
+      m1 = t4[1] * twI;
+      m2 = t4[1] * twR;
+      m3 = t4[0] * twI;
+
+      *p4++ = m0 + m1;
+      *p4++ = m2 - m3;
+      /* use vertical symmetry col 4 */
+      /* 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i */
+      /* Bottom */
+      m0 = t4[3] * twI;
+      m1 = t4[2] * twR;
+      m2 = t4[2] * twI;
+      m3 = t4[3] * twR;
+
+      *pEnd4-- = m0 - m1;
+      *pEnd4-- = m2 + m3;
+    }
+
+    /* MIDDLE */
+    /* Twiddle factors are */
+    /*  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i */
+    p1ap3_0 = p1[0] + p3[0];
+    p1sp3_0 = p1[0] - p3[0];
+    p1ap3_1 = p1[1] + p3[1];
+    p1sp3_1 = p1[1] - p3[1];
+
+    /* col 2 */
+    t2[0] = p1sp3_0 + p2[1] - p4[1];
+    t2[1] = p1sp3_1 - p2[0] + p4[0];
+    /* col 3 */
+    t3[0] = p1ap3_0 - p2[0] - p4[0];
+    t3[1] = p1ap3_1 - p2[1] - p4[1];
+    /* col 4 */
+    t4[0] = p1sp3_0 - p2[1] + p4[1];
+    t4[1] = p1sp3_1 + p2[0] - p4[0];
+    /* col 1 - Top */
+    *p1++ = p1ap3_0 + p2[0] + p4[0];
+    *p1++ = p1ap3_1 + p2[1] + p4[1];
+
+    /* COL 2 */
+    twR = tw2[0];
+    twI = tw2[1];
+
+    m0 = t2[0] * twR;
+    m1 = t2[1] * twI;
+    m2 = t2[1] * twR;
+    m3 = t2[0] * twI;
+
+    *p2++ = m0 + m1;
+    *p2++ = m2 - m3;
+    /* COL 3 */
+    twR = tw3[0];
+    twI = tw3[1];
+
+    m0 = t3[0] * twR;
+    m1 = t3[1] * twI;
+    m2 = t3[1] * twR;
+    m3 = t3[0] * twI;
+
+    *p3++ = m0 + m1;
+    *p3++ = m2 - m3;
+    /* COL 4 */
+    twR = tw4[0];
+    twI = tw4[1];
+
+    m0 = t4[0] * twR;
+    m1 = t4[1] * twI;
+    m2 = t4[1] * twR;
+    m3 = t4[0] * twI;
+
+    *p4++ = m0 + m1;
+    *p4++ = m2 - m3;
+
+    /* first col */
+    arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* second col */
+    arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* third col */
+    arm_radix8_butterfly_f32 (pCol3, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* fourth col */
+    arm_radix8_butterfly_f32 (pCol4, L, (float32_t *) S->pTwiddle, 4U);
+}
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point complex FFT.
+  @param[in]     S              points to an instance of the floating-point CFFT structure
+  @param[in,out] p1             points to the complex data buffer of size 2*fftLen. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+void arm_cfft_f32(
+  const arm_cfft_instance_f32 * S,
+        float32_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+  uint32_t  L = S->fftLen, l;
+  float32_t invL, * pSrc;
+
+  if (ifftFlag == 1U)
+  {
+    /* Conjugate input data */
+    pSrc = p1 + 1;
+    for (l = 0; l < L; l++)
+    {
+      *pSrc = -*pSrc;
+      pSrc += 2;
+    }
+  }
+
+  switch (L)
+  {
+  case 16:
+  case 128:
+  case 1024:
+    arm_cfft_radix8by2_f32 ( (arm_cfft_instance_f32 *) S, p1);
+    break;
+  case 32:
+  case 256:
+  case 2048:
+    arm_cfft_radix8by4_f32 ( (arm_cfft_instance_f32 *) S, p1);
+    break;
+  case 64:
+  case 512:
+  case 4096:
+    arm_radix8_butterfly_f32 ( p1, L, (float32_t *) S->pTwiddle, 1);
+    break;
+  }
+
+  if ( bitReverseFlag )
+    arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
+
+  if (ifftFlag == 1U)
+  {
+    invL = 1.0f / (float32_t)L;
+
+    /* Conjugate and scale output data */
+    pSrc = p1;
+    for (l= 0; l < L; l++)
+    {
+      *pSrc++ *=   invL ;
+      *pSrc    = -(*pSrc) * invL;
+      pSrc++;
+    }
+  }
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
new file mode 100644
index 00000000..a47dd02f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
@@ -0,0 +1,332 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_q15.c
+ * Description:  Combined Radix Decimation in Q15 Frequency CFFT processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+extern void arm_radix4_butterfly_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint32_t twidCoefModifier);
+
+extern void arm_radix4_butterfly_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint32_t twidCoefModifier);
+
+extern void arm_bitreversal_16(
+        uint16_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
+
+void arm_cfft_radix4by2_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef);
+
+void arm_cfft_radix4by2_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 complex FFT.
+  @param[in]     S               points to an instance of Q15 CFFT structure
+  @param[in,out] p1              points to the complex data buffer of size 2*fftLen. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+void arm_cfft_q15(
+  const arm_cfft_instance_q15 * S,
+        q15_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+  uint32_t L = S->fftLen;
+
+  if (ifftFlag == 1U)
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
+       break;
+
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+  else
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
+       break;
+
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_q15  ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+
+  if ( bitReverseFlag )
+    arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+void arm_cfft_radix4by2_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef)
+{
+        uint32_t i;
+        uint32_t n2;
+        q15_t p0, p1, p2, p3;
+#if defined (ARM_MATH_DSP)
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
+  const q15_t *pC = pCoef;
+        q15_t *pSi = pSrc;
+        q15_t *pSl = pSrc + fftLen;
+#else
+        uint32_t l;
+        q15_t xt, yt, cosVal, sinVal;
+#endif
+
+  n2 = fftLen >> 1U;
+
+#if defined (ARM_MATH_DSP)
+
+  for (i = n2; i > 0; i--)
+  {
+      coeff = read_q15x2_ia ((q15_t **) &pC);
+
+      T = read_q15x2 (pSi);
+      T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
+
+      S = read_q15x2 (pSl);
+      S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
+
+      R = __QSUB16(T, S);
+
+      write_q15x2_ia (&pSi, __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      out1 = __SMUAD(coeff, R) >> 16U;
+      out2 = __SMUSDX(coeff, R);
+#else
+      out1 = __SMUSDX(R, coeff) >> 16U;
+      out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
+
+     l = i + n2;
+
+     xt =           (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+     pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+     yt =               (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+     pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+
+     pSrc[2 * l]     = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) +
+                        ((int16_t) (((q31_t) yt * sinVal) >> 16U))  );
+
+     pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) -
+                        ((int16_t) (((q31_t) xt * sinVal) >> 16U))   );
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+  /* first col */
+  arm_radix4_butterfly_q15( pSrc,          n2, (q15_t*)pCoef, 2U);
+
+  /* second col */
+  arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     p2 = pSrc[4 * i + 2];
+     p3 = pSrc[4 * i + 3];
+
+     p0 <<= 1U;
+     p1 <<= 1U;
+     p2 <<= 1U;
+     p3 <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = p2;
+     pSrc[4 * i + 3] = p3;
+  }
+
+}
+
+void arm_cfft_radix4by2_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef)
+{
+        uint32_t i;
+        uint32_t n2;
+        q15_t p0, p1, p2, p3;
+#if defined (ARM_MATH_DSP)
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
+  const q15_t *pC = pCoef;
+        q15_t *pSi = pSrc;
+        q15_t *pSl = pSrc + fftLen;
+#else
+        uint32_t l;
+        q15_t xt, yt, cosVal, sinVal;
+#endif
+
+  n2 = fftLen >> 1U;
+
+#if defined (ARM_MATH_DSP)
+
+  for (i = n2; i > 0; i--)
+  {
+     coeff = read_q15x2_ia ((q15_t **) &pC);
+
+     T = read_q15x2 (pSi);
+     T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
+
+     S = read_q15x2 (pSl);
+     S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
+
+     R = __QSUB16(T, S);
+
+     write_q15x2_ia (&pSi, __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+     out1 = __SMUSD(coeff, R) >> 16U;
+     out2 = __SMUADX(coeff, R);
+#else
+     out1 = __SMUADX(R, coeff) >> 16U;
+     out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+     write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
+
+     l = i + n2;
+
+     xt =           (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+     pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+     yt =               (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+     pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+
+     pSrc[2 * l]      = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) -
+                         ((int16_t) (((q31_t) yt * sinVal) >> 16U))  );
+
+     pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) +
+                        ((int16_t) (((q31_t) xt * sinVal) >> 16U))  );
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+  /* first col */
+  arm_radix4_butterfly_inverse_q15( pSrc,          n2, (q15_t*)pCoef, 2U);
+
+  /* second col */
+  arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     p2 = pSrc[4 * i + 2];
+     p3 = pSrc[4 * i + 3];
+
+     p0 <<= 1U;
+     p1 <<= 1U;
+     p2 <<= 1U;
+     p3 <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = p2;
+     pSrc[4 * i + 3] = p3;
+  }
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c
new file mode 100644
index 00000000..785942fd
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c
@@ -0,0 +1,254 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_q31.c
+ * Description:  Combined Radix Decimation in Frequency CFFT fixed point processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+extern void arm_radix4_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
+
+extern void arm_radix4_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
+
+extern void arm_bitreversal_32(
+        uint32_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
+
+void arm_cfft_radix4by2_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef);
+
+void arm_cfft_radix4by2_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 complex FFT.
+  @param[in]     S               points to an instance of the fixed-point CFFT structure
+  @param[in,out] p1              points to the complex data buffer of size 2*fftLen. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+void arm_cfft_q31(
+  const arm_cfft_instance_q31 * S,
+        q31_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+  uint32_t L = S->fftLen;
+
+  if (ifftFlag == 1U)
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_inverse_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
+       break;
+
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_inverse_q31 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+  else
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
+       break;
+
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_q31 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+
+  if ( bitReverseFlag )
+    arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+void arm_cfft_radix4by2_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef)
+{
+        uint32_t i, l;
+        uint32_t n2;
+        q31_t xt, yt, cosVal, sinVal;
+        q31_t p0, p1;
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
+
+     l = i + n2;
+
+     xt =          (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
+     pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
+
+     yt =              (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
+     pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
+
+     mult_32x32_keep32_R(p0, xt, cosVal);
+     mult_32x32_keep32_R(p1, yt, cosVal);
+     multAcc_32x32_keep32_R(p0, yt, sinVal);
+     multSub_32x32_keep32_R(p1, xt, sinVal);
+
+     pSrc[2 * l]     = p0 << 1;
+     pSrc[2 * l + 1] = p1 << 1;
+  }
+
+  /* first col */
+  arm_radix4_butterfly_q31 (pSrc,          n2, (q31_t*)pCoef, 2U);
+
+  /* second col */
+  arm_radix4_butterfly_q31 (pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     xt = pSrc[4 * i + 2];
+     yt = pSrc[4 * i + 3];
+
+     p0 <<= 1U;
+     p1 <<= 1U;
+     xt <<= 1U;
+     yt <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = xt;
+     pSrc[4 * i + 3] = yt;
+  }
+
+}
+
+void arm_cfft_radix4by2_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef)
+{
+  uint32_t i, l;
+  uint32_t n2;
+  q31_t xt, yt, cosVal, sinVal;
+  q31_t p0, p1;
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
+
+     l = i + n2;
+
+     xt =          (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
+     pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
+
+     yt =              (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
+     pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
+
+     mult_32x32_keep32_R(p0, xt, cosVal);
+     mult_32x32_keep32_R(p1, yt, cosVal);
+     multSub_32x32_keep32_R(p0, yt, sinVal);
+     multAcc_32x32_keep32_R(p1, xt, sinVal);
+
+     pSrc[2 * l]     = p0 << 1U;
+     pSrc[2 * l + 1] = p1 << 1U;
+  }
+
+  /* first col */
+  arm_radix4_butterfly_inverse_q31( pSrc,          n2, (q31_t*)pCoef, 2U);
+
+  /* second col */
+  arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     xt = pSrc[4 * i + 2];
+     yt = pSrc[4 * i + 3];
+
+     p0 <<= 1U;
+     p1 <<= 1U;
+     xt <<= 1U;
+     yt <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = xt;
+     pSrc[4 * i + 3] = yt;
+  }
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
new file mode 100644
index 00000000..c514fda9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
@@ -0,0 +1,470 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_f32.c
+ * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+void arm_radix2_butterfly_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix2_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
+
+extern void arm_bitreversal_f32(
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Radix-2 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future
+  @param[in]     S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix2_f32(
+const arm_cfft_radix2_instance_f32 * S,
+      float32_t * pSrc)
+{
+
+   if (S->ifftFlag == 1U)
+   {
+      /* Complex IFFT radix-2 */
+      arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier, S->onebyfftLen);
+   }
+   else
+   {
+      /* Complex FFT radix-2 */
+      arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier);
+   }
+
+   if (S->bitReverseFlag == 1U)
+   {
+      /* Bit Reversal */
+      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+   }
+
+}
+
+
+/**
+  @} end of ComplexFFT group
+ */
+
+
+
+/* ----------------------------------------------------------------------
+ ** Internal helper function used by the FFTs
+ ** ------------------------------------------------------------------- */
+
+/**
+  brief  Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  return        none
+ */
+
+void arm_radix2_butterfly_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        float32_t xt, yt, cosVal, sinVal;
+        float32_t p0, p1, p2, p3;
+        float32_t a0, a1;
+
+#if defined (ARM_MATH_DSP)
+
+   /*  Initializations for the first stage */
+   n2 = fftLen >> 1;
+   ia = 0;
+   i = 0;
+
+   // loop for groups
+   for (k = n2; k > 0; k--)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+
+      /*  Twiddle coefficients index modifier */
+      ia += twidCoefModifier;
+
+      /*  index calculation for the input as, */
+      /*  pSrc[i + 0], pSrc[i + fftLen/1] */
+      l = i + n2;
+
+      /*  Butterfly implementation */
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+      p0 = xt * cosVal;
+      p1 = yt * sinVal;
+      p2 = yt * cosVal;
+      p3 = xt * sinVal;
+
+      pSrc[2 * i]     = a0;
+      pSrc[2 * i + 1] = a1;
+
+      pSrc[2 * l]     = p0 + p1;
+      pSrc[2 * l + 1] = p2 - p3;
+
+      i++;
+   }                             // groups loop end
+
+   twidCoefModifier <<= 1U;
+
+   // loop for stage
+   for (k = n2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = p0 + p1;
+            pSrc[2 * l + 1] = p2 - p3;
+
+            i += n1;
+         } while ( i < fftLen );                        // butterfly loop end
+         j++;
+      } while ( j < n2);                          // groups loop end
+      twidCoefModifier <<= 1U;
+   }                             // stages loop end
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += 2)
+   {
+      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
+      xt = pSrc[2 * i] - pSrc[2 * i + 2];
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
+      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
+
+      pSrc[2 * i] = a0;
+      pSrc[2 * i + 1] = a1;
+      pSrc[2 * i + 2] = xt;
+      pSrc[2 * i + 3] = yt;
+   }                             // groups loop end
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+   n2 = fftLen;
+
+   // loop for stage
+   for (k = fftLen; k > 1; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = p0 + p1;
+            pSrc[2 * l + 1] = p2 - p3;
+
+            i += n1;
+         } while (i < fftLen);
+         j++;
+      } while (j < n2);
+      twidCoefModifier <<= 1U;
+   }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+
+void arm_radix2_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen)
+{
+
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        float32_t xt, yt, cosVal, sinVal;
+        float32_t p0, p1, p2, p3;
+        float32_t a0, a1;
+
+#if defined (ARM_MATH_DSP)
+
+   n2 = fftLen >> 1;
+   ia = 0;
+
+   // loop for groups
+   for (i = 0; i < n2; i++)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia += twidCoefModifier;
+
+      l = i + n2;
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+      p0 = xt * cosVal;
+      p1 = yt * sinVal;
+      p2 = yt * cosVal;
+      p3 = xt * sinVal;
+
+      pSrc[2 * i] = a0;
+      pSrc[2 * i + 1] = a1;
+
+      pSrc[2 * l]     = p0 - p1;
+      pSrc[2 * l + 1] = p2 + p3;
+   }                             // groups loop end
+
+   twidCoefModifier <<= 1U;
+
+   // loop for stage
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = p0 - p1;
+            pSrc[2 * l + 1] = p2 + p3;
+
+            i += n1;
+         } while ( i < fftLen );                 // butterfly loop end
+         j++;
+      } while (j < n2);                      // groups loop end
+
+      twidCoefModifier <<= 1U;
+   }                             // stages loop end
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += 2)
+   {
+      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
+      xt = pSrc[2 * i] - pSrc[2 * i + 2];
+
+      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
+      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
+
+      p0 = a0 * onebyfftLen;
+      p2 = xt * onebyfftLen;
+      p1 = a1 * onebyfftLen;
+      p3 = yt * onebyfftLen;
+
+      pSrc[2 * i] = p0;
+      pSrc[2 * i + 1] = p1;
+      pSrc[2 * i + 2] = p2;
+      pSrc[2 * i + 3] = p3;
+   }                             // butterfly loop end
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+   n2 = fftLen;
+
+   // loop for stage
+   for (k = fftLen; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = p0 - p1;
+            pSrc[2 * l + 1] = p2 + p3;
+
+            i += n1;
+         } while ( i < fftLen );                    // butterfly loop end
+         j++;
+      } while ( j < n2 );                      // groups loop end
+
+      twidCoefModifier = twidCoefModifier << 1U;
+   }                             // stages loop end
+
+   n1 = n2;
+   n2 = n2 >> 1;
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+
+      p0 = a0 * onebyfftLen;
+      p2 = xt * onebyfftLen;
+      p1 = a1 * onebyfftLen;
+      p3 = yt * onebyfftLen;
+
+      pSrc[2 * i] = p0;
+      pSrc[2 * l] = p2;
+
+      pSrc[2 * i + 1] = p1;
+      pSrc[2 * l + 1] = p3;
+   }                             // butterfly loop end
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
new file mode 100644
index 00000000..4a118401
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
@@ -0,0 +1,197 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_init_f32.c
+ * Description:  Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length
+
+  @par           Details
+                   The parameter ifftFlag controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+arm_status arm_cfft_radix2_init_f32(
+  arm_cfft_radix2_instance_f32 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (float32_t *) twiddleCoef;
+
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.000244140625;
+    break;
+
+  case 2048U:
+    /*  Initializations of structure parameters for 2048 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 2U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 2U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.00048828125;
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.0009765625f;
+    break;
+
+  case 512U:
+    /*  Initializations of structure parameters for 512 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 8U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 8U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.001953125;
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    S->onebyfftLen = 0.00390625f;
+    break;
+
+  case 128U:
+    /*  Initializations of structure parameters for 128 point FFT */
+    S->twidCoefModifier = 32U;
+    S->bitRevFactor = 32U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
+    S->onebyfftLen = 0.0078125;
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    S->onebyfftLen = 0.015625f;
+    break;
+
+  case 32U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 128U;
+    S->bitRevFactor = 128U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
+    S->onebyfftLen = 0.03125;
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    S->onebyfftLen = 0.0625f;
+    break;
+
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
new file mode 100644
index 00000000..a31b5694
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
@@ -0,0 +1,182 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_init_q15.c
+ * Description:  Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief                        Initialization function for the Q15 CFFT/CIFFT.
+  @deprecated                   Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
+  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT structure.
+  @param[in]     fftLen         length of the FFT.
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length
+
+  @par           Details
+                   The parameter ifftFlag controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+arm_status arm_cfft_radix2_init_q15(
+  arm_cfft_radix2_instance_q15 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+
+    break;
+
+  case 2048U:
+    /*  Initializations of structure parameters for 2048 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 2U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 2U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
+
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+    S->twidCoefModifier = 4U;
+    S->bitRevFactor = 4U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+
+    break;
+
+  case 512U:
+    /*  Initializations of structure parameters for 512 point FFT */
+    S->twidCoefModifier = 8U;
+    S->bitRevFactor = 8U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
+
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+
+    break;
+
+  case 128U:
+    /*  Initializations of structure parameters for 128 point FFT */
+    S->twidCoefModifier = 32U;
+    S->bitRevFactor = 32U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
+
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+
+    break;
+
+  case 32U:
+    /*  Initializations of structure parameters for 32 point FFT */
+    S->twidCoefModifier = 128U;
+    S->bitRevFactor = 128U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
+
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+
+    break;
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
new file mode 100644
index 00000000..2cf4fd55
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
@@ -0,0 +1,179 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_init_q31.c
+ * Description:  Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length
+
+  @par           Details
+                   The parameter ifftFlag controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+arm_status arm_cfft_radix2_init_q31(
+  arm_cfft_radix2_instance_q31 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
+
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+  /*  Initializations of Instance structure depending on the FFT length */
+  switch (S->fftLen)
+  {
+    /*  Initializations of structure parameters for 4096 point FFT */
+  case 4096U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    break;
+
+    /*  Initializations of structure parameters for 2048 point FFT */
+  case 2048U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 2U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 2U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
+    break;
+
+    /*  Initializations of structure parameters for 1024 point FFT */
+  case 1024U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    break;
+
+    /*  Initializations of structure parameters for 512 point FFT */
+  case 512U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 8U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 8U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    break;
+
+  case 128U:
+    /*  Initializations of structure parameters for 128 point FFT */
+    S->twidCoefModifier = 32U;
+    S->bitRevFactor = 32U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    break;
+
+  case 32U:
+    /*  Initializations of structure parameters for 32 point FFT */
+    S->twidCoefModifier = 128U;
+    S->bitRevFactor = 128U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    break;
+
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
new file mode 100644
index 00000000..fbb809e4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
@@ -0,0 +1,689 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_q15.c
+ * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+void arm_radix2_butterfly_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix2_butterfly_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_bitreversal_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the fixed-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix2_q15(
+  const arm_cfft_radix2_instance_q15 * S,
+        q15_t * pSrc)
+{
+
+  if (S->ifftFlag == 1U)
+  {
+    arm_radix2_butterfly_inverse_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+  else
+  {
+    arm_radix2_butterfly_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+
+  arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+void arm_radix2_butterfly_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+#if defined (ARM_MATH_DSP)
+
+  uint32_t i, j, k, l;
+  uint32_t n1, n2, ia;
+  q15_t in;
+  q31_t T, S, R;
+  q31_t coeff, out1, out2;
+
+  //N = fftLen;
+  n2 = fftLen;
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  // loop for groups
+  for (i = 0; i < n2; i++)
+  {
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    l = i + n2;
+
+    T = read_q15x2 (pSrc + (2 * i));
+    in = ((int16_t) (T & 0xFFFF)) >> 1;
+    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    S = read_q15x2 (pSrc + (2 * l));
+    in = ((int16_t) (S & 0xFFFF)) >> 1;
+    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __SMUAD(coeff, R) >> 16;
+    out2 = __SMUSDX(coeff, R);
+#else
+    out1 = __SMUSDX(R, coeff) >> 16U;
+    out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    i++;
+    l++;
+
+    T = read_q15x2 (pSrc + (2 * i));
+    in = ((int16_t) (T & 0xFFFF)) >> 1;
+    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    S = read_q15x2 (pSrc + (2 * l));
+    in = ((int16_t) (S & 0xFFFF)) >> 1;
+    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __SMUAD(coeff, R) >> 16;
+    out2 = __SMUSDX(coeff, R);
+#else
+
+    out1 = __SMUSDX(R, coeff) >> 16U;
+    out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+  /* loop for stage */
+  for (k = fftLen / 2; k > 2; k = k >> 1)
+  {
+    n1 = n2;
+    n2 = n2 >> 1;
+    ia = 0;
+
+    /* loop for groups */
+    for (j = 0; j < n2; j++)
+    {
+      coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+      ia = ia + twidCoefModifier;
+
+      /* loop for butterfly */
+      for (i = j; i < fftLen; i += n1)
+      {
+        l = i + n2;
+
+        T = read_q15x2 (pSrc + (2 * i));
+
+        S = read_q15x2 (pSrc + (2 * l));
+
+        R = __QSUB16(T, S);
+
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUAD(coeff, R) >> 16;
+        out2 = __SMUSDX(coeff, R);
+#else
+        out1 = __SMUSDX(R, coeff) >> 16U;
+        out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+        i += n1;
+
+        l = i + n2;
+
+        T = read_q15x2 (pSrc + (2 * i));
+
+        S = read_q15x2 (pSrc + (2 * l));
+
+        R = __QSUB16(T, S);
+
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUAD(coeff, R) >> 16;
+        out2 = __SMUSDX(coeff, R);
+#else
+        out1 = __SMUSDX(R, coeff) >> 16U;
+        out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+      } /* butterfly loop end */
+
+    } /* groups loop end */
+
+    twidCoefModifier = twidCoefModifier << 1U;
+  } /* stages loop end */
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+  ia = ia + twidCoefModifier;
+
+  /* loop for butterfly */
+  for (i = 0; i < fftLen; i += n1)
+  {
+    l = i + n2;
+
+    T = read_q15x2 (pSrc + (2 * i));
+
+    S = read_q15x2 (pSrc + (2 * l));
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
+
+    write_q15x2 (pSrc + (2 * l), R);
+
+    i += n1;
+    l = i + n2;
+
+    T = read_q15x2 (pSrc + (2 * i));
+
+    S = read_q15x2 (pSrc + (2 * l));
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
+
+    write_q15x2 (pSrc + (2 * l), R);
+
+  } /* groups loop end */
+
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  uint32_t i, j, k, l;
+  uint32_t n1, n2, ia;
+  q15_t xt, yt, cosVal, sinVal;
+
+
+  // N = fftLen;
+  n2 = fftLen;
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (j = 0; j < n2; j++)
+  {
+    cosVal = pCoef[(ia * 2)];
+    sinVal = pCoef[(ia * 2) + 1];
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    for (i = j; i < fftLen; i += n1)
+    {
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+      pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
+                         (pSrc[2 * i + 1] >> 1U)  ) >> 1U;
+
+      pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
+                     ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+
+      pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
+                          ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+
+    } /* butterfly loop end */
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+  /* loop for stage */
+  for (k = fftLen / 2; k > 2; k = k >> 1)
+  {
+    n1 = n2;
+    n2 = n2 >> 1;
+    ia = 0;
+
+    /* loop for groups */
+    for (j = 0; j < n2; j++)
+    {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      /* loop for butterfly */
+      for (i = j; i < fftLen; i += n1)
+      {
+        l = i + n2;
+        xt = pSrc[2 * i] - pSrc[2 * l];
+        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
+
+        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
+
+        pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
+                       ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+
+        pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
+                            ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+
+      } /* butterfly loop end */
+
+    } /* groups loop end */
+
+    twidCoefModifier = twidCoefModifier << 1U;
+  } /* stages loop end */
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (j = 0; j < n2; j++)
+  {
+    cosVal = pCoef[ia * 2];
+    sinVal = pCoef[(ia * 2) + 1];
+
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    for (i = j; i < fftLen; i += n1)
+    {
+      l = i + n2;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2 * l] = xt;
+
+      pSrc[2 * l + 1] = yt;
+
+    } /* butterfly loop end */
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+
+void arm_radix2_butterfly_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+#if defined (ARM_MATH_DSP)
+
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        q15_t in;
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
+
+  // N = fftLen;
+  n2 = fftLen;
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (i = 0; i < n2; i++)
+  {
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    l = i + n2;
+
+    T = read_q15x2 (pSrc + (2 * i));
+    in = ((int16_t) (T & 0xFFFF)) >> 1;
+    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    S = read_q15x2 (pSrc + (2 * l));
+    in = ((int16_t) (S & 0xFFFF)) >> 1;
+    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __SMUSD(coeff, R) >> 16;
+    out2 = __SMUADX(coeff, R);
+#else
+    out1 = __SMUADX(R, coeff) >> 16U;
+    out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    i++;
+    l++;
+
+    T = read_q15x2 (pSrc + (2 * i));
+    in = ((int16_t) (T & 0xFFFF)) >> 1;
+    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    S = read_q15x2 (pSrc + (2 * l));
+    in = ((int16_t) (S & 0xFFFF)) >> 1;
+    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __SMUSD(coeff, R) >> 16;
+    out2 = __SMUADX(coeff, R);
+#else
+    out1 = __SMUADX(R, coeff) >> 16U;
+    out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+  /* loop for stage */
+  for (k = fftLen / 2; k > 2; k = k >> 1)
+  {
+    n1 = n2;
+    n2 = n2 >> 1;
+    ia = 0;
+
+    /* loop for groups */
+    for (j = 0; j < n2; j++)
+    {
+      coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+      ia = ia + twidCoefModifier;
+
+      /* loop for butterfly */
+      for (i = j; i < fftLen; i += n1)
+      {
+        l = i + n2;
+
+        T = read_q15x2 (pSrc + (2 * i));
+
+        S = read_q15x2 (pSrc + (2 * l));
+
+        R = __QSUB16(T, S);
+
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUSD(coeff, R) >> 16;
+        out2 = __SMUADX(coeff, R);
+#else
+        out1 = __SMUADX(R, coeff) >> 16U;
+        out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+        i += n1;
+
+        l = i + n2;
+
+        T = read_q15x2 (pSrc + (2 * i));
+
+        S = read_q15x2 (pSrc + (2 * l));
+
+        R = __QSUB16(T, S);
+
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUSD(coeff, R) >> 16;
+        out2 = __SMUADX(coeff, R);
+#else
+        out1 = __SMUADX(R, coeff) >> 16U;
+        out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+      } /* butterfly loop end */
+
+    } /* groups loop end */
+
+    twidCoefModifier = twidCoefModifier << 1U;
+  } /* stages loop end */
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (j = 0; j < n2; j++)
+  {
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    for (i = j; i < fftLen; i += n1)
+    {
+      l = i + n2;
+
+      T = read_q15x2 (pSrc + (2 * i));
+
+      S = read_q15x2 (pSrc + (2 * l));
+
+      R = __QSUB16(T, S);
+
+      write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
+
+      write_q15x2 (pSrc + (2 * l), R);
+
+    } /* butterfly loop end */
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        q15_t xt, yt, cosVal, sinVal;
+
+  // N = fftLen;
+  n2 = fftLen;
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (j = 0; j < n2; j++)
+  {
+    cosVal = pCoef[(ia * 2)];
+    sinVal = pCoef[(ia * 2) + 1];
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    for (i = j; i < fftLen; i += n1)
+    {
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+      pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
+                         (pSrc[2 * i + 1] >> 1U)  ) >> 1U;
+
+      pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
+                     ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+
+      pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
+                         ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+
+    } /* butterfly loop end */
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+  /* loop for stage */
+  for (k = fftLen / 2; k > 2; k = k >> 1)
+  {
+    n1 = n2;
+    n2 = n2 >> 1;
+    ia = 0;
+
+    /* loop for groups */
+    for (j = 0; j < n2; j++)
+    {
+      cosVal = pCoef[(ia * 2)];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      /* loop for butterfly */
+      for (i = j; i < fftLen; i += n1)
+      {
+        l = i + n2;
+        xt = pSrc[2 * i] - pSrc[2 * l];
+        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
+
+        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
+
+        pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
+                       ((int16_t) (((q31_t) yt * sinVal) >> 16))  );
+
+        pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
+                           ((int16_t) (((q31_t) xt * sinVal) >> 16))  );
+
+      } /* butterfly loop end */
+
+    } /* groups loop end */
+
+    twidCoefModifier = twidCoefModifier << 1U;
+  } /* stages loop end */
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  cosVal = pCoef[(ia * 2)];
+  sinVal = pCoef[(ia * 2) + 1];
+
+  ia = ia + twidCoefModifier;
+
+  /* loop for butterfly */
+  for (i = 0; i < fftLen; i += n1)
+  {
+    l = i + n2;
+    xt = pSrc[2 * i] - pSrc[2 * l];
+    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+    pSrc[2 * l] = xt;
+
+    pSrc[2 * l + 1] = yt;
+
+  } /* groups loop end */
+
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
new file mode 100644
index 00000000..27f14080
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
@@ -0,0 +1,337 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_q31.c
+ * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+void arm_radix2_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix2_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_bitreversal_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the fixed-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix2_q31(
+  const arm_cfft_radix2_instance_q31 * S,
+        q31_t * pSrc)
+{
+
+   if (S->ifftFlag == 1U)
+   {
+      arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen,
+      S->pTwiddle, S->twidCoefModifier);
+   }
+   else
+   {
+      arm_radix2_butterfly_q31(pSrc, S->fftLen,
+      S->pTwiddle, S->twidCoefModifier);
+   }
+
+   arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+void arm_radix2_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+
+   unsigned i, j, k, l, m;
+   unsigned n1, n2, ia;
+   q31_t xt, yt, cosVal, sinVal;
+   q31_t p0, p1;
+
+   //N = fftLen;
+   n2 = fftLen;
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   // loop for groups
+   for (i = 0; i < n2; i++)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+      pSrc[2 * i + 1] =
+        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+
+      mult_32x32_keep32_R(p0, xt, cosVal);
+      mult_32x32_keep32_R(p1, yt, cosVal);
+      multAcc_32x32_keep32_R(p0, yt, sinVal);
+      multSub_32x32_keep32_R(p1, xt, sinVal);
+
+      pSrc[2U * l] = p0;
+      pSrc[2U * l + 1U] = p1;
+
+   }                             // groups loop end
+
+   twidCoefModifier <<= 1U;
+
+   // loop for stage
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      for (j = 0; j < n2; j++)
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         m = fftLen / n1;
+         do
+         {
+            l = i + n2;
+            xt = pSrc[2 * i] - pSrc[2 * l];
+            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
+
+            mult_32x32_keep32_R(p0, xt, cosVal);
+            mult_32x32_keep32_R(p1, yt, cosVal);
+            multAcc_32x32_keep32_R(p0, yt, sinVal);
+            multSub_32x32_keep32_R(p1, xt, sinVal);
+
+            pSrc[2U * l] = p0;
+            pSrc[2U * l + 1U] = p1;
+            i += n1;
+            m--;
+         } while ( m > 0);                   // butterfly loop end
+
+      }                           // groups loop end
+
+      twidCoefModifier <<= 1U;
+   }                             // stages loop end
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   cosVal = pCoef[ia * 2];
+   sinVal = pCoef[(ia * 2) + 1];
+   ia = ia + twidCoefModifier;
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2U * l] = xt;
+
+      pSrc[2U * l + 1U] = yt;
+
+      i += n1;
+      l = i + n2;
+
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2U * l] = xt;
+
+      pSrc[2U * l + 1U] = yt;
+
+   }                             // butterfly loop end
+
+}
+
+
+void arm_radix2_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+
+   unsigned i, j, k, l;
+   unsigned n1, n2, ia;
+   q31_t xt, yt, cosVal, sinVal;
+   q31_t p0, p1;
+
+   //N = fftLen;
+   n2 = fftLen;
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   // loop for groups
+   for (i = 0; i < n2; i++)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+      pSrc[2 * i + 1] =
+        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+
+      mult_32x32_keep32_R(p0, xt, cosVal);
+      mult_32x32_keep32_R(p1, yt, cosVal);
+      multSub_32x32_keep32_R(p0, yt, sinVal);
+      multAcc_32x32_keep32_R(p1, xt, sinVal);
+
+      pSrc[2U * l] = p0;
+      pSrc[2U * l + 1U] = p1;
+   }                             // groups loop end
+
+   twidCoefModifier = twidCoefModifier << 1U;
+
+   // loop for stage
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      for (j = 0; j < n2; j++)
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
+
+         // loop for butterfly
+         for (i = j; i < fftLen; i += n1)
+         {
+            l = i + n2;
+            xt = pSrc[2 * i] - pSrc[2 * l];
+            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
+
+            mult_32x32_keep32_R(p0, xt, cosVal);
+            mult_32x32_keep32_R(p1, yt, cosVal);
+            multSub_32x32_keep32_R(p0, yt, sinVal);
+            multAcc_32x32_keep32_R(p1, xt, sinVal);
+
+            pSrc[2U * l] = p0;
+            pSrc[2U * l + 1U] = p1;
+         }                         // butterfly loop end
+
+      }                           // groups loop end
+
+      twidCoefModifier = twidCoefModifier << 1U;
+   }                             // stages loop end
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   cosVal = pCoef[ia * 2];
+   sinVal = pCoef[(ia * 2) + 1];
+   ia = ia + twidCoefModifier;
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2U * l] = xt;
+
+      pSrc[2U * l + 1U] = yt;
+
+      i += n1;
+      l = i + n2;
+
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2U * l] = xt;
+
+      pSrc[2U * l + 1U] = yt;
+
+   }                             // butterfly loop end
+
+}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
similarity index 60%
rename from Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c
rename to Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
index b0f0a944..675a3037 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
@@ -1,102 +1,140 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_f32.c    
-*    
-* Description:	Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_f32.c
+ * Description:  Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
 extern void arm_bitreversal_f32(
-float32_t * pSrc,
-uint16_t fftSize,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab);
-
-/**    
-* @ingroup groupTransforms    
-*/
-
-/* ----------------------------------------------------------------------    
-** Internal helper function used by the FFTs    
-** ------------------------------------------------------------------- */
-
-/*    
-* @brief  Core function for the floating-point CFFT butterfly process.   
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
-* @param[in]      fftLen           length of the FFT.   
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.   
-*/
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
 void arm_radix4_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier)
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix4_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
+
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point Radix-4 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in]     S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix4_f32(
+  const arm_cfft_radix4_instance_f32 * S,
+        float32_t * pSrc)
 {
+   if (S->ifftFlag == 1U)
+   {
+      /*  Complex IFFT radix-4  */
+      arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier, S->onebyfftLen);
+   }
+   else
+   {
+      /*  Complex FFT radix-4  */
+      arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+   }
+
+   if (S->bitReverseFlag == 1U)
+   {
+      /*  Bit Reversal */
+      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+   }
 
-   float32_t co1, co2, co3, si1, si2, si3;
-   uint32_t ia1, ia2, ia3;
-   uint32_t i0, i1, i2, i3;
-   uint32_t n1, n2, j, k;
+}
 
-#ifndef ARM_MATH_CM0_FAMILY_FAMILY
+/**
+  @} end of ComplexFFT group
+ */
 
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
+/* ----------------------------------------------------------------------
+ * Internal helper function used by the FFTs
+ * ---------------------------------------------------------------------- */
 
-   float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-   float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-   Ybminusd;
-   float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-   float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-   float32_t *ptr1;
-   float32_t p0,p1,p2,p3,p4,p5;
-   float32_t a0,a1,a2,a3,a4,a5,a6,a7;
+/**
+  brief         Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to the twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  return        none
+ */
+
+void arm_radix4_butterfly_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+        float32_t co1, co2, co3, si1, si2, si3;
+        uint32_t ia1, ia2, ia3;
+        uint32_t i0, i1, i2, i3;
+        uint32_t n1, n2, j, k;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+        float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+        Ybminusd;
+        float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+        float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+        float32_t *ptr1;
+        float32_t p0,p1,p2,p3,p4,p5;
+        float32_t a0,a1,a2,a3,a4,a5,a6,a7;
 
    /*  Initializations for the first stage */
    n2 = fftLen;
    n1 = n2;
 
    /* n2 = fftLen/4 */
-   n2 >>= 2u;
-   i0 = 0u;
-   ia1 = 0u;
+   n2 >>= 2U;
+   i0 = 0U;
+   ia1 = 0U;
 
    j = n2;
 
@@ -109,17 +147,17 @@ uint16_t twidCoefModifier)
       i2 = i1 + n2;
       i3 = i2 + n2;
 
-      xaIn = pSrc[(2u * i0)];
-      yaIn = pSrc[(2u * i0) + 1u];
+      xaIn = pSrc[(2U * i0)];
+      yaIn = pSrc[(2U * i0) + 1U];
 
-      xbIn = pSrc[(2u * i1)];
-      ybIn = pSrc[(2u * i1) + 1u];
+      xbIn = pSrc[(2U * i1)];
+      ybIn = pSrc[(2U * i1) + 1U];
 
-      xcIn = pSrc[(2u * i2)];
-      ycIn = pSrc[(2u * i2) + 1u];
+      xcIn = pSrc[(2U * i2)];
+      ycIn = pSrc[(2U * i2) + 1U];
 
-      xdIn = pSrc[(2u * i3)];
-      ydIn = pSrc[(2u * i3) + 1u];
+      xdIn = pSrc[(2U * i3)];
+      ydIn = pSrc[(2U * i3) + 1U];
 
       /* xa + xc */
       Xaplusc = xaIn + xcIn;
@@ -132,8 +170,8 @@ uint16_t twidCoefModifier)
 
       /*  index calculation for the coefficients */
       ia2 = ia1 + ia1;
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
+      co2 = pCoef[ia2 * 2U];
+      si2 = pCoef[(ia2 * 2U) + 1U];
 
       /* xa - xc */
       Xaminusc = xaIn - xcIn;
@@ -145,9 +183,9 @@ uint16_t twidCoefModifier)
       Ybminusd = ybIn - ydIn;
 
       /* xa' = xa + xb + xc + xd */
-      pSrc[(2u * i0)] = Xaplusc + Xbplusd;
+      pSrc[(2U * i0)] = Xaplusc + Xbplusd;
       /* ya' = ya + yb + yc + yd */
-      pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
+      pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
 
       /* (xa - xc) + (yb - yd) */
       Xb12C_out = (Xaminusc + Ybminusd);
@@ -162,13 +200,13 @@ uint16_t twidCoefModifier)
       /* (ya - yc) + (xb - xd) */
       Yd12C_out = (Xbminusd + Yaminusc);
 
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
+      co1 = pCoef[ia1 * 2U];
+      si1 = pCoef[(ia1 * 2U) + 1U];
 
       /*  index calculation for the coefficients */
       ia3 = ia2 + ia1;
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
+      co3 = pCoef[ia3 * 2U];
+      si3 = pCoef[(ia3 * 2U) + 1U];
 
       Xb12_out = Xb12C_out * co1;
       Yb12_out = Yb12C_out * co1;
@@ -176,7 +214,7 @@ uint16_t twidCoefModifier)
       Yc12_out = Yc12C_out * co2;
       Xd12_out = Xd12C_out * co3;
       Yd12_out = Yd12C_out * co3;
-         
+
       /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
       //Xb12_out -= Yb12C_out * si1;
       p0 = Yb12C_out * si1;
@@ -195,7 +233,7 @@ uint16_t twidCoefModifier)
       /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
       //Yd12_out += Xd12C_out * si3;
       p5 = Xd12C_out * si3;
-      
+
       Xb12_out += p0;
       Yb12_out -= p1;
       Xc12_out += p2;
@@ -204,22 +242,22 @@ uint16_t twidCoefModifier)
       Yd12_out -= p5;
 
       /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-      pSrc[2u * i1] = Xc12_out;
+      pSrc[2U * i1] = Xc12_out;
 
       /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-      pSrc[(2u * i1) + 1u] = Yc12_out;
+      pSrc[(2U * i1) + 1U] = Yc12_out;
 
       /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-      pSrc[2u * i2] = Xb12_out;
+      pSrc[2U * i2] = Xb12_out;
 
       /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-      pSrc[(2u * i2) + 1u] = Yb12_out;
+      pSrc[(2U * i2) + 1U] = Yb12_out;
 
       /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-      pSrc[2u * i3] = Xd12_out;
+      pSrc[2U * i3] = Xd12_out;
 
       /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-      pSrc[(2u * i3) + 1u] = Yd12_out;
+      pSrc[(2U * i3) + 1U] = Yd12_out;
 
       /*  Twiddle coefficients index modifier */
       ia1 += twidCoefModifier;
@@ -228,17 +266,17 @@ uint16_t twidCoefModifier)
       i0++;
 
    }
-   while(--j);
+   while (--j);
 
-   twidCoefModifier <<= 2u;
+   twidCoefModifier <<= 2U;
 
    /*  Calculation of second stage to excluding last stage */
-   for (k = fftLen >> 2u; k > 4u; k >>= 2u)
+   for (k = fftLen >> 2U; k > 4U; k >>= 2U)
    {
       /*  Initializations for the first stage */
       n1 = n2;
-      n2 >>= 2u;
-      ia1 = 0u;
+      n2 >>= 2U;
+      ia1 = 0U;
 
       /*  Calculation of first stage */
       j = 0;
@@ -247,16 +285,16 @@ uint16_t twidCoefModifier)
          /*  index calculation for the coefficients */
          ia2 = ia1 + ia1;
          ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2u];
-         si1 = pCoef[(ia1 * 2u) + 1u];
-         co2 = pCoef[ia2 * 2u];
-         si2 = pCoef[(ia2 * 2u) + 1u];
-         co3 = pCoef[ia3 * 2u];
-         si3 = pCoef[(ia3 * 2u) + 1u];
+         co1 = pCoef[(ia1 * 2U)];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[(ia2 * 2U)];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[(ia3 * 2U)];
+         si3 = pCoef[(ia3 * 2U) + 1U];
 
          /*  Twiddle coefficients index modifier */
          ia1 += twidCoefModifier;
-      
+
          i0 = j;
          do
          {
@@ -266,17 +304,17 @@ uint16_t twidCoefModifier)
             i2 = i1 + n2;
             i3 = i2 + n2;
 
-            xaIn = pSrc[(2u * i0)];
-            yaIn = pSrc[(2u * i0) + 1u];
+            xaIn = pSrc[(2U * i0)];
+            yaIn = pSrc[(2U * i0) + 1U];
 
-            xbIn = pSrc[(2u * i1)];
-            ybIn = pSrc[(2u * i1) + 1u];
+            xbIn = pSrc[(2U * i1)];
+            ybIn = pSrc[(2U * i1) + 1U];
 
-            xcIn = pSrc[(2u * i2)];
-            ycIn = pSrc[(2u * i2) + 1u];
+            xcIn = pSrc[(2U * i2)];
+            ycIn = pSrc[(2U * i2) + 1U];
 
-            xdIn = pSrc[(2u * i3)];
-            ydIn = pSrc[(2u * i3) + 1u];
+            xdIn = pSrc[(2U * i3)];
+            ydIn = pSrc[(2U * i3) + 1U];
 
             /* xa - xc */
             Xaminusc = xaIn - xcIn;
@@ -309,8 +347,8 @@ uint16_t twidCoefModifier)
             /* (ya - yc) +  (xb - xd) */
             Yd12C_out = (Xbminusd + Yaminusc);
 
-            pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-            pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
+            pSrc[(2U * i0)] = Xaplusc + Xbplusd;
+            pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
 
             Xb12_out = Xb12C_out * co1;
             Yb12_out = Yb12C_out * co1;
@@ -318,7 +356,7 @@ uint16_t twidCoefModifier)
             Yc12_out = Yc12C_out * co2;
             Xd12_out = Xd12C_out * co3;
             Yd12_out = Yd12C_out * co3;
-         
+
             /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
             //Xb12_out -= Yb12C_out * si1;
             p0 = Yb12C_out * si1;
@@ -337,7 +375,7 @@ uint16_t twidCoefModifier)
             /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
             //Yd12_out += Xd12C_out * si3;
             p5 = Xd12C_out * si3;
-            
+
             Xb12_out += p0;
             Yb12_out -= p1;
             Xc12_out += p2;
@@ -346,28 +384,28 @@ uint16_t twidCoefModifier)
             Yd12_out -= p5;
 
             /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-            pSrc[2u * i1] = Xc12_out;
+            pSrc[2U * i1] = Xc12_out;
 
             /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-            pSrc[(2u * i1) + 1u] = Yc12_out;
+            pSrc[(2U * i1) + 1U] = Yc12_out;
 
             /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-            pSrc[2u * i2] = Xb12_out;
+            pSrc[2U * i2] = Xb12_out;
 
             /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-            pSrc[(2u * i2) + 1u] = Yb12_out;
+            pSrc[(2U * i2) + 1U] = Yb12_out;
 
             /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-            pSrc[2u * i3] = Xd12_out;
+            pSrc[2U * i3] = Xd12_out;
 
             /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-            pSrc[(2u * i3) + 1u] = Yd12_out;
+            pSrc[(2U * i3) + 1U] = Yd12_out;
 
             i0 += n1;
-         } while(i0 < fftLen);
+         } while (i0 < fftLen);
          j++;
-      } while(j <= (n2 - 1u));
-      twidCoefModifier <<= 2u;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
    }
 
    j = fftLen >> 2;
@@ -425,7 +463,7 @@ uint16_t twidCoefModifier)
       a6 = (Xaminusc - Ybminusd);
       /* yd' = (ya+xb-yc-xd) */
       a7 = (Xbminusd + Yaminusc);
-   
+
       ptr1[0] = a0;
       ptr1[1] = a1;
       ptr1[2] = a2;
@@ -436,24 +474,22 @@ uint16_t twidCoefModifier)
       ptr1[7] = a7;
 
       /* increment pointer by 8 */
-      ptr1 += 8u;
-   } while(--j);
+      ptr1 += 8U;
+   } while (--j);
 
 #else
 
-   float32_t t1, t2, r1, r2, s1, s2;
-
-   /* Run the below code for Cortex-M0 */
+        float32_t t1, t2, r1, r2, s1, s2;
 
-   /*  Initializations for the fft calculation */
+   /* Initializations for the fft calculation */
    n2 = fftLen;
    n1 = n2;
-   for (k = fftLen; k > 1u; k >>= 2u)
+   for (k = fftLen; k > 1U; k >>= 2U)
    {
       /*  Initializations for the fft calculation */
       n1 = n2;
-      n2 >>= 2u;
-      ia1 = 0u;
+      n2 >>= 2U;
+      ia1 = 0U;
 
       /*  FFT Calculation */
       j = 0;
@@ -462,12 +498,12 @@ uint16_t twidCoefModifier)
          /*  index calculation for the coefficients */
          ia2 = ia1 + ia1;
          ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2u];
-         si1 = pCoef[(ia1 * 2u) + 1u];
-         co2 = pCoef[ia2 * 2u];
-         si2 = pCoef[(ia2 * 2u) + 1u];
-         co3 = pCoef[ia3 * 2u];
-         si3 = pCoef[(ia3 * 2u) + 1u];
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
 
          /*  Twiddle coefficients index modifier */
          ia1 = ia1 + twidCoefModifier;
@@ -482,46 +518,46 @@ uint16_t twidCoefModifier)
             i3 = i2 + n2;
 
             /* xa + xc */
-            r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
+            r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];
 
             /* xa - xc */
-            r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
+            r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];
 
             /* ya + yc */
-            s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
+            s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
 
             /* ya - yc */
-            s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
+            s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
 
             /* xb + xd */
-            t1 = pSrc[2u * i1] + pSrc[2u * i3];
+            t1 = pSrc[2U * i1] + pSrc[2U * i3];
 
             /* xa' = xa + xb + xc + xd */
-            pSrc[2u * i0] = r1 + t1;
+            pSrc[2U * i0] = r1 + t1;
 
             /* xa + xc -(xb + xd) */
             r1 = r1 - t1;
 
             /* yb + yd */
-            t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
+            t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
 
             /* ya' = ya + yb + yc + yd */
-            pSrc[(2u * i0) + 1u] = s1 + t2;
+            pSrc[(2U * i0) + 1U] = s1 + t2;
 
             /* (ya + yc) - (yb + yd) */
             s1 = s1 - t2;
 
             /* (yb - yd) */
-            t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
+            t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
 
             /* (xb - xd) */
-            t2 = pSrc[2u * i1] - pSrc[2u * i3];
+            t2 = pSrc[2U * i1] - pSrc[2U * i3];
 
             /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-            pSrc[2u * i1] = (r1 * co2) + (s1 * si2);
+            pSrc[2U * i1] = (r1 * co2) + (s1 * si2);
 
             /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-            pSrc[(2u * i1) + 1u] = (s1 * co2) - (r1 * si2);
+            pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2);
 
             /* (xa - xc) + (yb - yd) */
             r1 = r2 + t1;
@@ -536,60 +572,60 @@ uint16_t twidCoefModifier)
             s2 = s2 + t2;
 
             /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-            pSrc[2u * i2] = (r1 * co1) + (s1 * si1);
+            pSrc[2U * i2] = (r1 * co1) + (s1 * si1);
 
             /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-            pSrc[(2u * i2) + 1u] = (s1 * co1) - (r1 * si1);
+            pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1);
 
             /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-            pSrc[2u * i3] = (r2 * co3) + (s2 * si3);
+            pSrc[2U * i3] = (r2 * co3) + (s2 * si3);
 
             /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-            pSrc[(2u * i3) + 1u] = (s2 * co3) - (r2 * si3);
-         
+            pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3);
+
             i0 += n1;
-         } while( i0 < fftLen);
+         } while ( i0 < fftLen);
          j++;
-      } while(j <= (n2 - 1u));
-      twidCoefModifier <<= 2u;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
    }
 
-#endif /* #ifndef ARM_MATH_CM0_FAMILY_FAMILY */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
 }
 
-/*    
-* @brief  Core function for the floating-point CIFFT butterfly process.   
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
-* @param[in]      fftLen           length of the FFT.   
-* @param[in]      *pCoef           points to twiddle coefficient buffer.   
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @param[in]      onebyfftLen      value of 1/fftLen.   
-* @return none.   
-*/
+/**
+  brief         Core function for the floating-point CIFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  param[in]     onebyfftLen      value of 1/fftLen
+  return        none
+ */
 
 void arm_radix4_butterfly_inverse_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen)
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen)
 {
-   float32_t co1, co2, co3, si1, si2, si3;
-   uint32_t ia1, ia2, ia3;
-   uint32_t i0, i1, i2, i3;
-   uint32_t n1, n2, j, k;
+        float32_t co1, co2, co3, si1, si2, si3;
+        uint32_t ia1, ia2, ia3;
+        uint32_t i0, i1, i2, i3;
+        uint32_t n1, n2, j, k;
 
-#ifndef ARM_MATH_CM0_FAMILY_FAMILY
+#if defined (ARM_MATH_LOOPUNROLL)
 
-   float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-   float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-   Ybminusd;
-   float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-   float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-   float32_t *ptr1;
-   float32_t p0,p1,p2,p3,p4,p5,p6,p7;
-   float32_t a0,a1,a2,a3,a4,a5,a6,a7;
+        float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+        float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+        Ybminusd;
+        float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+        float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+        float32_t *ptr1;
+        float32_t p0,p1,p2,p3,p4,p5,p6,p7;
+        float32_t a0,a1,a2,a3,a4,a5,a6,a7;
 
 
    /*  Initializations for the first stage */
@@ -597,9 +633,9 @@ float32_t onebyfftLen)
    n1 = n2;
 
    /* n2 = fftLen/4 */
-   n2 >>= 2u;
-   i0 = 0u;
-   ia1 = 0u;
+   n2 >>= 2U;
+   i0 = 0U;
+   ia1 = 0U;
 
    j = n2;
 
@@ -613,17 +649,17 @@ float32_t onebyfftLen)
       i3 = i2 + n2;
 
       /*  Butterfly implementation */
-      xaIn = pSrc[(2u * i0)];
-      yaIn = pSrc[(2u * i0) + 1u];
+      xaIn = pSrc[(2U * i0)];
+      yaIn = pSrc[(2U * i0) + 1U];
 
-      xcIn = pSrc[(2u * i2)];
-      ycIn = pSrc[(2u * i2) + 1u];
+      xcIn = pSrc[(2U * i2)];
+      ycIn = pSrc[(2U * i2) + 1U];
 
-      xbIn = pSrc[(2u * i1)];
-      ybIn = pSrc[(2u * i1) + 1u];
+      xbIn = pSrc[(2U * i1)];
+      ybIn = pSrc[(2U * i1) + 1U];
 
-      xdIn = pSrc[(2u * i3)];
-      ydIn = pSrc[(2u * i3) + 1u];
+      xdIn = pSrc[(2U * i3)];
+      ydIn = pSrc[(2U * i3) + 1U];
 
       /* xa + xc */
       Xaplusc = xaIn + xcIn;
@@ -636,8 +672,8 @@ float32_t onebyfftLen)
 
       /*  index calculation for the coefficients */
       ia2 = ia1 + ia1;
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
+      co2 = pCoef[ia2 * 2U];
+      si2 = pCoef[(ia2 * 2U) + 1U];
 
       /* xa - xc */
       Xaminusc = xaIn - xcIn;
@@ -649,10 +685,10 @@ float32_t onebyfftLen)
       Ybminusd = ybIn - ydIn;
 
       /* xa' = xa + xb + xc + xd */
-      pSrc[(2u * i0)] = Xaplusc + Xbplusd;
+      pSrc[(2U * i0)] = Xaplusc + Xbplusd;
 
       /* ya' = ya + yb + yc + yd */
-      pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
+      pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
 
       /* (xa - xc) - (yb - yd) */
       Xb12C_out = (Xaminusc - Ybminusd);
@@ -667,13 +703,13 @@ float32_t onebyfftLen)
       /* (ya - yc) - (xb - xd) */
       Yd12C_out = (Yaminusc - Xbminusd);
 
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
+      co1 = pCoef[ia1 * 2U];
+      si1 = pCoef[(ia1 * 2U) + 1U];
 
       /*  index calculation for the coefficients */
       ia3 = ia2 + ia1;
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
+      co3 = pCoef[ia3 * 2U];
+      si3 = pCoef[(ia3 * 2U) + 1U];
 
       Xb12_out = Xb12C_out * co1;
       Yb12_out = Yb12C_out * co1;
@@ -681,7 +717,7 @@ float32_t onebyfftLen)
       Yc12_out = Yc12C_out * co2;
       Xd12_out = Xd12C_out * co3;
       Yd12_out = Yd12C_out * co3;
-   
+
       /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
       //Xb12_out -= Yb12C_out * si1;
       p0 = Yb12C_out * si1;
@@ -700,7 +736,7 @@ float32_t onebyfftLen)
       /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
       //Yd12_out += Xd12C_out * si3;
       p5 = Xd12C_out * si3;
-      
+
       Xb12_out -= p0;
       Yb12_out += p1;
       Xc12_out -= p2;
@@ -709,40 +745,40 @@ float32_t onebyfftLen)
       Yd12_out += p5;
 
       /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      pSrc[2u * i1] = Xc12_out;
+      pSrc[2U * i1] = Xc12_out;
 
       /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      pSrc[(2u * i1) + 1u] = Yc12_out;
+      pSrc[(2U * i1) + 1U] = Yc12_out;
 
       /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      pSrc[2u * i2] = Xb12_out;
+      pSrc[2U * i2] = Xb12_out;
 
       /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      pSrc[(2u * i2) + 1u] = Yb12_out;
+      pSrc[(2U * i2) + 1U] = Yb12_out;
 
       /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      pSrc[2u * i3] = Xd12_out;
+      pSrc[2U * i3] = Xd12_out;
 
       /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      pSrc[(2u * i3) + 1u] = Yd12_out;
+      pSrc[(2U * i3) + 1U] = Yd12_out;
 
       /*  Twiddle coefficients index modifier */
       ia1 = ia1 + twidCoefModifier;
 
       /*  Updating input index */
-      i0 = i0 + 1u;
+      i0 = i0 + 1U;
 
-   } while(--j);
+   } while (--j);
 
-   twidCoefModifier <<= 2u;
+   twidCoefModifier <<= 2U;
 
    /*  Calculation of second stage to excluding last stage */
-   for (k = fftLen >> 2u; k > 4u; k >>= 2u)
+   for (k = fftLen >> 2U; k > 4U; k >>= 2U)
    {
       /*  Initializations for the first stage */
       n1 = n2;
-      n2 >>= 2u;
-      ia1 = 0u;
+      n2 >>= 2U;
+      ia1 = 0U;
 
       /*  Calculation of first stage */
       j = 0;
@@ -751,12 +787,12 @@ float32_t onebyfftLen)
          /*  index calculation for the coefficients */
          ia2 = ia1 + ia1;
          ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2u];
-         si1 = pCoef[(ia1 * 2u) + 1u];
-         co2 = pCoef[ia2 * 2u];
-         si2 = pCoef[(ia2 * 2u) + 1u];
-         co3 = pCoef[ia3 * 2u];
-         si3 = pCoef[(ia3 * 2u) + 1u];
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
 
          /*  Twiddle coefficients index modifier */
          ia1 = ia1 + twidCoefModifier;
@@ -770,17 +806,17 @@ float32_t onebyfftLen)
             i2 = i1 + n2;
             i3 = i2 + n2;
 
-            xaIn = pSrc[(2u * i0)];
-            yaIn = pSrc[(2u * i0) + 1u];
+            xaIn = pSrc[(2U * i0)];
+            yaIn = pSrc[(2U * i0) + 1U];
 
-            xbIn = pSrc[(2u * i1)];
-            ybIn = pSrc[(2u * i1) + 1u];
+            xbIn = pSrc[(2U * i1)];
+            ybIn = pSrc[(2U * i1) + 1U];
 
-            xcIn = pSrc[(2u * i2)];
-            ycIn = pSrc[(2u * i2) + 1u];
+            xcIn = pSrc[(2U * i2)];
+            ycIn = pSrc[(2U * i2) + 1U];
 
-            xdIn = pSrc[(2u * i3)];
-            ydIn = pSrc[(2u * i3) + 1u];
+            xdIn = pSrc[(2U * i3)];
+            ydIn = pSrc[(2U * i3) + 1U];
 
             /* xa - xc */
             Xaminusc = xaIn - xcIn;
@@ -813,8 +849,8 @@ float32_t onebyfftLen)
             /* (ya - yc) -  (xb - xd) */
             Yd12C_out = (Yaminusc - Xbminusd);
 
-            pSrc[(2u * i0)] = Xaplusc + Xbplusd;
-            pSrc[(2u * i0) + 1u] = Yaplusc + Ybplusd;
+            pSrc[(2U * i0)] = Xaplusc + Xbplusd;
+            pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
 
             Xb12_out = Xb12C_out * co1;
             Yb12_out = Yb12C_out * co1;
@@ -841,7 +877,7 @@ float32_t onebyfftLen)
             /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
             //Yd12_out += Xd12C_out * si3;
             p5 = Xd12C_out * si3;
-            
+
             Xb12_out -= p0;
             Yb12_out += p1;
             Xc12_out -= p2;
@@ -850,28 +886,28 @@ float32_t onebyfftLen)
             Yd12_out += p5;
 
             /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            pSrc[2u * i1] = Xc12_out;
+            pSrc[2U * i1] = Xc12_out;
 
             /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            pSrc[(2u * i1) + 1u] = Yc12_out;
+            pSrc[(2U * i1) + 1U] = Yc12_out;
 
             /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            pSrc[2u * i2] = Xb12_out;
+            pSrc[2U * i2] = Xb12_out;
 
             /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            pSrc[(2u * i2) + 1u] = Yb12_out;
+            pSrc[(2U * i2) + 1U] = Yb12_out;
 
             /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            pSrc[2u * i3] = Xd12_out;
+            pSrc[2U * i3] = Xd12_out;
 
             /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            pSrc[(2u * i3) + 1u] = Yd12_out;
+            pSrc[(2U * i3) + 1U] = Yd12_out;
 
             i0 += n1;
-         } while(i0 < fftLen);
+         } while (i0 < fftLen);
          j++;
-      } while(j <= (n2 - 1u));
-      twidCoefModifier <<= 2u;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
    }
    /*  Initializations of last stage */
 
@@ -914,7 +950,7 @@ float32_t onebyfftLen)
 
       /* (yb-yd) */
       Ybminusd = ybIn - ydIn;
-      
+
       /* xa' = (xa+xb+xc+xd) * onebyfftLen */
       a0 = (Xaplusc + Xbplusd);
       /* ya' = (ya+yb+yc+yd) * onebyfftLen */
@@ -931,7 +967,7 @@ float32_t onebyfftLen)
       a6 = (Xaminusc + Ybminusd);
       /* yd' = (ya-xb-yc+xd) * onebyfftLen */
       a7 = (Yaminusc - Xbminusd);
-   
+
       p0 = a0 * onebyfftLen;
       p1 = a1 * onebyfftLen;
       p2 = a2 * onebyfftLen;
@@ -940,7 +976,7 @@ float32_t onebyfftLen)
       p5 = a5 * onebyfftLen;
       p6 = a6 * onebyfftLen;
       p7 = a7 * onebyfftLen;
-   
+
       /* xa' = (xa+xb+xc+xd) * onebyfftLen */
       ptr1[0] = p0;
       /* ya' = (ya+yb+yc+yd) * onebyfftLen */
@@ -959,27 +995,25 @@ float32_t onebyfftLen)
       ptr1[7] = p7;
 
       /* increment source pointer by 8 for next calculations */
-      ptr1 = ptr1 + 8u;
+      ptr1 = ptr1 + 8U;
 
-   } while(--j);
+   } while (--j);
 
 #else
 
-   float32_t t1, t2, r1, r2, s1, s2;
-
-   /* Run the below code for Cortex-M0 */
+        float32_t t1, t2, r1, r2, s1, s2;
 
    /*  Initializations for the first stage */
    n2 = fftLen;
    n1 = n2;
 
    /*  Calculation of first stage */
-   for (k = fftLen; k > 4u; k >>= 2u)
+   for (k = fftLen; k > 4U; k >>= 2U)
    {
       /*  Initializations for the first stage */
       n1 = n2;
-      n2 >>= 2u;
-      ia1 = 0u;
+      n2 >>= 2U;
+      ia1 = 0U;
 
       /*  Calculation of first stage */
       j = 0;
@@ -988,12 +1022,12 @@ float32_t onebyfftLen)
          /*  index calculation for the coefficients */
          ia2 = ia1 + ia1;
          ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2u];
-         si1 = pCoef[(ia1 * 2u) + 1u];
-         co2 = pCoef[ia2 * 2u];
-         si2 = pCoef[(ia2 * 2u) + 1u];
-         co3 = pCoef[ia3 * 2u];
-         si3 = pCoef[(ia3 * 2u) + 1u];
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
 
          /*  Twiddle coefficients index modifier */
          ia1 = ia1 + twidCoefModifier;
@@ -1008,46 +1042,46 @@ float32_t onebyfftLen)
             i3 = i2 + n2;
 
             /* xa + xc */
-            r1 = pSrc[(2u * i0)] + pSrc[(2u * i2)];
+            r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];
 
             /* xa - xc */
-            r2 = pSrc[(2u * i0)] - pSrc[(2u * i2)];
+            r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];
 
             /* ya + yc */
-            s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
+            s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
 
             /* ya - yc */
-            s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
+            s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
 
             /* xb + xd */
-            t1 = pSrc[2u * i1] + pSrc[2u * i3];
+            t1 = pSrc[2U * i1] + pSrc[2U * i3];
 
             /* xa' = xa + xb + xc + xd */
-            pSrc[2u * i0] = r1 + t1;
+            pSrc[2U * i0] = r1 + t1;
 
             /* xa + xc -(xb + xd) */
             r1 = r1 - t1;
 
             /* yb + yd */
-            t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
+            t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
 
             /* ya' = ya + yb + yc + yd */
-            pSrc[(2u * i0) + 1u] = s1 + t2;
+            pSrc[(2U * i0) + 1U] = s1 + t2;
 
             /* (ya + yc) - (yb + yd) */
             s1 = s1 - t2;
 
             /* (yb - yd) */
-            t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
+            t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
 
             /* (xb - xd) */
-            t2 = pSrc[2u * i1] - pSrc[2u * i3];
+            t2 = pSrc[2U * i1] - pSrc[2U * i3];
 
             /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            pSrc[2u * i1] = (r1 * co2) - (s1 * si2);
+            pSrc[2U * i1] = (r1 * co2) - (s1 * si2);
 
             /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            pSrc[(2u * i1) + 1u] = (s1 * co2) + (r1 * si2);
+            pSrc[(2U * i1) + 1U] = (s1 * co2) + (r1 * si2);
 
             /* (xa - xc) - (yb - yd) */
             r1 = r2 - t1;
@@ -1062,29 +1096,29 @@ float32_t onebyfftLen)
             s2 = s2 - t2;
 
             /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            pSrc[2u * i2] = (r1 * co1) - (s1 * si1);
+            pSrc[2U * i2] = (r1 * co1) - (s1 * si1);
 
             /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            pSrc[(2u * i2) + 1u] = (s1 * co1) + (r1 * si1);
+            pSrc[(2U * i2) + 1U] = (s1 * co1) + (r1 * si1);
 
             /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            pSrc[2u * i3] = (r2 * co3) - (s2 * si3);
+            pSrc[2U * i3] = (r2 * co3) - (s2 * si3);
 
             /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            pSrc[(2u * i3) + 1u] = (s2 * co3) + (r2 * si3);
-         
+            pSrc[(2U * i3) + 1U] = (s2 * co3) + (r2 * si3);
+
             i0 += n1;
-         } while( i0 < fftLen);
+         } while ( i0 < fftLen);
          j++;
-      } while(j <= (n2 - 1u));
-      twidCoefModifier <<= 2u;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
    }
    /*  Initializations of last stage */
    n1 = n2;
-   n2 >>= 2u;
+   n2 >>= 2U;
 
    /*  Calculations of last stage */
-   for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
+   for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
    {
       /*  index calculation for the input as, */
       /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
@@ -1094,46 +1128,46 @@ float32_t onebyfftLen)
 
       /*  Butterfly implementation */
       /* xa + xc */
-      r1 = pSrc[2u * i0] + pSrc[2u * i2];
+      r1 = pSrc[2U * i0] + pSrc[2U * i2];
 
       /* xa - xc */
-      r2 = pSrc[2u * i0] - pSrc[2u * i2];
+      r2 = pSrc[2U * i0] - pSrc[2U * i2];
 
       /* ya + yc */
-      s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
+      s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
 
       /* ya - yc */
-      s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
+      s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
 
       /* xc + xd */
-      t1 = pSrc[2u * i1] + pSrc[2u * i3];
+      t1 = pSrc[2U * i1] + pSrc[2U * i3];
 
       /* xa' = xa + xb + xc + xd */
-      pSrc[2u * i0] = (r1 + t1) * onebyfftLen;
+      pSrc[2U * i0] = (r1 + t1) * onebyfftLen;
 
       /* (xa + xb) - (xc + xd) */
       r1 = r1 - t1;
 
       /* yb + yd */
-      t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
+      t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
 
       /* ya' = ya + yb + yc + yd */
-      pSrc[(2u * i0) + 1u] = (s1 + t2) * onebyfftLen;
+      pSrc[(2U * i0) + 1U] = (s1 + t2) * onebyfftLen;
 
       /* (ya + yc) - (yb + yd) */
       s1 = s1 - t2;
 
       /* (yb-yd) */
-      t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
+      t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
 
       /* (xb-xd) */
-      t2 = pSrc[2u * i1] - pSrc[2u * i3];
+      t2 = pSrc[2U * i1] - pSrc[2U * i3];
 
       /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      pSrc[2u * i1] = r1 * onebyfftLen;
+      pSrc[2U * i1] = r1 * onebyfftLen;
 
       /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      pSrc[(2u * i1) + 1u] = s1 * onebyfftLen;
+      pSrc[(2U * i1) + 1U] = s1 * onebyfftLen;
 
       /* (xa - xc) - (yb-yd) */
       r1 = r2 - t1;
@@ -1148,63 +1182,19 @@ float32_t onebyfftLen)
       s2 = s2 - t2;
 
       /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      pSrc[2u * i2] = r1 * onebyfftLen;
+      pSrc[2U * i2] = r1 * onebyfftLen;
 
       /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      pSrc[(2u * i2) + 1u] = s1 * onebyfftLen;
+      pSrc[(2U * i2) + 1U] = s1 * onebyfftLen;
 
       /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      pSrc[2u * i3] = r2 * onebyfftLen;
+      pSrc[2U * i3] = r2 * onebyfftLen;
 
       /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      pSrc[(2u * i3) + 1u] = s2 * onebyfftLen;
-   }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY_FAMILY */
-}
-
-/**    
-* @addtogroup ComplexFFT    
-* @{    
-*/
-
-/**    
-* @details    
-* @brief Processing function for the floating-point Radix-4 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in]      *S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure.   
-* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.   
-* @return none.   
-*/
-
-void arm_cfft_radix4_f32(
-const arm_cfft_radix4_instance_f32 * S,
-float32_t * pSrc)
-{
-
-   if(S->ifftFlag == 1u)
-   {
-      /*  Complex IFFT radix-4  */
-      arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier, S->onebyfftLen);
-   }
-   else
-   {
-      /*  Complex FFT radix-4  */
-      arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier);
-   }
-
-   if(S->bitReverseFlag == 1u)
-   {
-      /*  Bit Reversal */
-      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+      pSrc[(2U * i3) + 1U] = s2 * onebyfftLen;
    }
 
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 }
 
-/**    
-* @} end of ComplexFFT group    
-*/
 
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
new file mode 100644
index 00000000..539206de
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
@@ -0,0 +1,156 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_init_f32.c
+ * Description:  Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superceded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length
+
+  @par           Details
+                   The parameter ifftFlag controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+arm_status arm_cfft_radix4_init_f32(
+  arm_cfft_radix4_instance_f32 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (float32_t *) twiddleCoef;
+
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.000244140625;
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.0009765625f;
+    break;
+
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    S->onebyfftLen = 0.00390625f;
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    S->onebyfftLen = 0.015625f;
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    S->onebyfftLen = 0.0625f;
+    break;
+
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
new file mode 100644
index 00000000..1d830096
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
@@ -0,0 +1,145 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_init_q15.c
+ * Description:  Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+
+/**
+  @brief Initialization function for the Q15 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length
+
+  @par           Details
+                   The parameter ifftFlag controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+arm_status arm_cfft_radix4_init_q15(
+  arm_cfft_radix4_instance_q15 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+    S->twidCoefModifier = 4U;
+    S->bitRevFactor = 4U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+
+    break;
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
new file mode 100644
index 00000000..964b4c8a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
@@ -0,0 +1,141 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_init_q31.c
+ * Description:  Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+
+  @brief         Initialization function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT structure.
+  @param[in]     fftLen         length of the FFT.
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length
+
+  @par           Details
+                   The parameter ifftFlag controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter fftLen Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+arm_status arm_cfft_radix4_init_q31(
+  arm_cfft_radix4_instance_q31 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+  /*  Initializations of Instance structure depending on the FFT length */
+  switch (S->fftLen)
+  {
+    /*  Initializations of structure parameters for 4096 point FFT */
+  case 4096U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    break;
+
+    /*  Initializations of structure parameters for 1024 point FFT */
+  case 1024U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    break;
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
similarity index 57%
rename from Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c
rename to Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
index 1d1484d3..825a16b5 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
@@ -1,111 +1,95 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_q15.c    
-*    
-* Description:	This file has function definition of Radix-4 FFT & IFFT function and    
-*				In-place bit reversal using bit reversal table    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_q15.c
+ * Description:  This file has function definition of Radix-4 FFT & IFFT function and
+ *               In-place bit reversal using bit reversal table
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
 
 void arm_radix4_butterfly_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier);
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier);
 
 void arm_radix4_butterfly_inverse_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier);
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier);
 
 void arm_bitreversal_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
+        q15_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
 
-/**    
- * @ingroup groupTransforms    
+/**
+  @ingroup groupTransforms
  */
 
-/**    
- * @addtogroup ComplexFFT    
- * @{    
+/**
+  @addtogroup ComplexFFT
+  @{
  */
 
 
-/**    
- * @details    
- * @brief Processing function for the Q15 CFFT/CIFFT.   
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
- * @param[in]      *S    points to an instance of the Q15 CFFT/CIFFT structure.   
- * @param[in, out] *pSrc points to the complex data buffer. Processing occurs in-place.   
- * @return none.   
- *     
- * \par Input and output formats:    
- * \par    
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
- * Hence the output format is different for different FFT sizes.    
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:   
- * \par   
- * \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"    
- * \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"    
+/**
+  @brief               Processing function for the Q15 CFFT/CIFFT.
+  @deprecated          Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in]     S     points to an instance of the Q15 CFFT/CIFFT structure.
+  @param[in,out] pSrc  points to the complex data buffer. Processing occurs in-place.
+  @return        none
+ 
+  @par Input and output formats:
+                 Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                 Hence the output format is different for different FFT sizes.
+                 The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
+  @par
+                 \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"
+                 \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"
  */
 
 void arm_cfft_radix4_q15(
   const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc)
+        q15_t * pSrc)
 {
-  if(S->ifftFlag == 1u)
+  if (S->ifftFlag == 1U)
   {
     /*  Complex IFFT radix-4  */
-    arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier);
+    arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
   }
   else
   {
     /*  Complex FFT radix-4  */
-    arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
+    arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
   }
 
-  if(S->bitReverseFlag == 1u)
+  if (S->bitReverseFlag == 1U)
   {
     /*  Bit Reversal */
     arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
@@ -113,75 +97,73 @@ void arm_cfft_radix4_q15(
 
 }
 
-/**    
- * @} end of ComplexFFT group    
+/**
+  @} end of ComplexFFT group
  */
 
-/*    
-* Radix-4 FFT algorithm used is :    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 FFT:    
-* Wn = co1 + j * (- si1)    
-* W2n = co2 + j * (- si2)    
-* W3n = co3 + j * (- si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
-*    
-*/
+/*
+ * Radix-4 FFT algorithm used is :
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 FFT:
+ * Wn = co1 + j * (- si1)
+ * W2n = co2 + j * (- si2)
+ * W3n = co3 + j * (- si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
+ * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
+ * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
+ * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
+ *
+ */
 
-/**    
- * @brief  Core function for the Q15 CFFT butterfly process.   
- * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef16         points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
+/**
+  @brief         Core function for the Q15 CFFT butterfly process.
+  @param[in,out] pSrc16          points to the in-place buffer of Q15 data type
+  @param[in]     fftLen           length of the FFT
+  @param[in]     pCoef16         points to twiddle coefficient buffer
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
  */
 
 void arm_radix4_butterfly_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier)
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier)
 {
 
-#ifndef ARM_MATH_CM0_FAMILY
+#if defined (ARM_MATH_DSP)
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+        q31_t R, S, T, U;
+        q31_t C1, C2, C3, out1, out2;
+        uint32_t n1, n2, ic, i0, j, k;
 
-  q31_t R, S, T, U;
-  q31_t C1, C2, C3, out1, out2;
-  uint32_t n1, n2, ic, i0, j, k;
+        q15_t *ptr1;
+        q15_t *pSi0;
+        q15_t *pSi1;
+        q15_t *pSi2;
+        q15_t *pSi3;
 
-  q15_t *ptr1;
-  q15_t *pSi0;
-  q15_t *pSi1;
-  q15_t *pSi2;
-  q15_t *pSi3;
-
-  q31_t xaya, xbyb, xcyc, xdyd;
+        q31_t xaya, xbyb, xcyc, xdyd;
 
   /* Total process is divided into three stages */
 
@@ -192,14 +174,14 @@ void arm_radix4_butterfly_q15(
   n1 = n2;
 
   /* n2 = fftLen/4 */
-  n2 >>= 2u;
+  n2 >>= 2U;
 
   /* Index for twiddle coefficient */
-  ic = 0u;
+  ic = 0U;
 
   /* Index for input read and output write */
   j = n2;
-  
+
   pSi0 = pSrc16;
   pSi1 = pSi0 + 2 * n2;
   pSi2 = pSi1 + 2 * n2;
@@ -212,16 +194,18 @@ void arm_radix4_butterfly_q15(
   {
     /*  Butterfly implementation */
 
-    /*  Reading i0, i0+fftLen/2 inputs */
+    /* Reading i0, i0+fftLen/2 inputs */
     /* Read ya (real), xa(imag) input */
-    T = _SIMD32_OFFSET(pSi0);
-    T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
-    T = __SHADD16(T, 0); // it turns out doing this twice is 2 cycles, the alternative takes 3 cycles
-    //in = ((int16_t) (T & 0xFFFF)) >> 2;       // alternative code that takes 3 cycles
-    //T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
+    T = read_q15x2 (pSi0);
+    T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
+    T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the alternative takes 3 cycles */
+/*
+    in = ((int16_t) (T & 0xFFFF)) >> 2;       // alternative code that takes 3 cycles
+     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
+*/
 
     /* Read yc (real), xc(imag) input */
-    S = _SIMD32_OFFSET(pSi2);
+    S = read_q15x2 (pSi2);
     S = __SHADD16(S, 0);
     S = __SHADD16(S, 0);
 
@@ -233,12 +217,12 @@ void arm_radix4_butterfly_q15(
 
     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
     /* Read yb (real), xb(imag) input */
-    T = _SIMD32_OFFSET(pSi1);
+    T = read_q15x2 (pSi1);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* Read yd (real), xd(imag) input */
-    U = _SIMD32_OFFSET(pSi3);
+    U = read_q15x2 (pSi3);
     U = __SHADD16(U, 0);
     U = __SHADD16(U, 0);
 
@@ -248,46 +232,39 @@ void arm_radix4_butterfly_q15(
     /*  writing the butterfly processed i0 sample */
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    _SIMD32_OFFSET(pSi0) = __SHADD16(R, T);
-    pSi0 += 2;
+    write_q15x2_ia (&pSi0, __SHADD16(R, T));
 
     /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
     R = __QSUB16(R, T);
 
     /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
+    C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = __SMUAD(C2, R) >> 16u;
+    out1 = __SMUAD(C2, R) >> 16U;
     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
     out2 = __SMUSDX(C2, R);
-
 #else
-
     /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out1 = __SMUSDX(R, C2) >> 16u;
+    out1 = __SMUSDX(R, C2) >> 16U;
     /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
     out2 = __SMUAD(C2, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /*  Reading i0+fftLen/4 */
     /* T = packed(yb, xb) */
-    T = _SIMD32_OFFSET(pSi1);
+    T = read_q15x2 (pSi1);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* writing the butterfly processed i0 + fftLen/4 sample */
     /* writing output(xc', yc') in little endian format */
-    _SIMD32_OFFSET(pSi1) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi1 += 2;
+    write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
     /*  Butterfly calculations */
     /* U = packed(yd, xd) */
-    U = _SIMD32_OFFSET(pSi3);
+    U = read_q15x2 (pSi3);
     U = __SHADD16(U, 0);
     U = __SHADD16(U, 0);
 
@@ -295,76 +272,59 @@ void arm_radix4_butterfly_q15(
     T = __QSUB16(T, U);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
     R = __QASX(S, T);
     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
     S = __QSAX(S, T);
-
 #else
-
     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
     R = __QSAX(S, T);
     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
     S = __QASX(S, T);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
+    C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
     /*  Butterfly process for the i0+fftLen/2 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = __SMUAD(C1, S) >> 16u;
+    out1 = __SMUAD(C1, S) >> 16U;
     /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
     out2 = __SMUSDX(C1, S);
-
 #else
-
     /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out1 = __SMUSDX(S, C1) >> 16u;
+    out1 = __SMUSDX(S, C1) >> 16U;
     /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
     out2 = __SMUAD(C1, S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* writing output(xb', yb') in little endian format */
-    _SIMD32_OFFSET(pSi2) =
-      ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
-    pSi2 += 2;
-
+    write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF));
 
     /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
+    C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
     /*  Butterfly process for the i0+3fftLen/4 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = __SMUAD(C3, R) >> 16u;
+    out1 = __SMUAD(C3, R) >> 16U;
     /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
     out2 = __SMUSDX(C3, R);
-
 #else
-
     /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out1 = __SMUSDX(R, C3) >> 16u;
+    out1 = __SMUSDX(R, C3) >> 16U;
     /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
     out2 = __SMUAD(C3, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* writing output(xd', yd') in little endian format */
-    _SIMD32_OFFSET(pSi3) =
-      ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi3 += 2;
+    write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
     /*  Twiddle coefficients index modifier */
     ic = ic + twidCoefModifier;
 
-  } while(--j);
+  } while (--j);
   /* data is in 4.11(q11) format */
 
   /* end of first stage process */
@@ -373,26 +333,26 @@ void arm_radix4_butterfly_q15(
   /* start of middle stage process */
 
   /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
+  twidCoefModifier <<= 2U;
 
   /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
   {
     /*  Initializations for the middle stage */
     n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
+    n2 >>= 2U;
+    ic = 0U;
 
-    for (j = 0u; j <= (n2 - 1u); j++)
+    for (j = 0U; j <= (n2 - 1U); j++)
     {
       /*  index calculation for the coefficients */
-      C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-      C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-      C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
+      C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+      C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+      C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
 
       /*  Twiddle coefficients index modifier */
       ic = ic + twidCoefModifier;
-      
+
       pSi0 = pSrc16 + 2 * j;
       pSi1 = pSi0 + 2 * n2;
       pSi2 = pSi1 + 2 * n2;
@@ -403,10 +363,10 @@ void arm_radix4_butterfly_q15(
       {
         /*  Reading i0, i0+fftLen/2 inputs */
         /* Read ya (real), xa(imag) input */
-        T = _SIMD32_OFFSET(pSi0);
+        T = read_q15x2 (pSi0);
 
         /* Read yc (real), xc(imag) input */
-        S = _SIMD32_OFFSET(pSi2);
+        S = read_q15x2 (pSi2);
 
         /* R = packed( (ya + yc), (xa + xc)) */
         R = __QADD16(T, S);
@@ -416,10 +376,10 @@ void arm_radix4_butterfly_q15(
 
         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
         /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
+        T = read_q15x2 (pSi1);
 
         /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
+        U = read_q15x2 (pSi3);
 
         /* T = packed( (yb + yd), (xb + xd)) */
         T = __QADD16(T, U);
@@ -430,51 +390,45 @@ void arm_radix4_butterfly_q15(
         /* ya' = ya + yb + yc + yd */
         out1 = __SHADD16(R, T);
         out1 = __SHADD16(out1, 0);
-        _SIMD32_OFFSET(pSi0) = out1;
+        write_q15x2 (pSi0, out1);
         pSi0 += 2 * n1;
 
         /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
         R = __SHSUB16(R, T);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = __SMUAD(C2, R) >> 16u;
+        out1 = __SMUAD(C2, R) >> 16U;
 
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
         out2 = __SMUSDX(C2, R);
-
 #else
-
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out1 = __SMUSDX(R, C2) >> 16u;
+        out1 = __SMUSDX(R, C2) >> 16U;
 
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
         out2 = __SMUAD(C2, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /*  Reading i0+3fftLen/4 */
         /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
+        T = read_q15x2 (pSi1);
 
         /*  writing the butterfly processed i0 + fftLen/4 sample */
         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        _SIMD32_OFFSET(pSi1) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi1 += 2 * n1;
 
         /*  Butterfly calculations */
 
         /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
+        U = read_q15x2 (pSi3);
 
         /* T = packed(yb-yd, xb-xd) */
         T = __QSUB16(T, U);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
         R = __SHASX(S, T);
 
@@ -483,11 +437,9 @@ void arm_radix4_butterfly_q15(
 
 
         /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUAD(C1, S) >> 16u;
+        out1 = __SMUAD(C1, S) >> 16U;
         out2 = __SMUSDX(C1, S);
-
 #else
-
         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
         R = __SHSAX(S, T);
 
@@ -496,40 +448,33 @@ void arm_radix4_butterfly_q15(
 
 
         /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUSDX(S, C1) >> 16u;
+        out1 = __SMUSDX(S, C1) >> 16U;
         out2 = __SMUAD(C1, S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        _SIMD32_OFFSET(pSi2) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi2 += 2 * n1;
 
         /*  Butterfly process for the i0+3fftLen/4 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(C3, R) >> 16u;
+        out1 = __SMUAD(C3, R) >> 16U;
         out2 = __SMUSDX(C3, R);
-
 #else
-
-        out1 = __SMUSDX(R, C3) >> 16u;
+        out1 = __SMUSDX(R, C3) >> 16U;
         out2 = __SMUAD(C3, R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
         /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        _SIMD32_OFFSET(pSi3) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi3 += 2 * n1;
       }
     }
     /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
+    twidCoefModifier <<= 2U;
   }
   /* end of middle stage process */
 
@@ -550,16 +495,16 @@ void arm_radix4_butterfly_q15(
   do
   {
     /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD32(ptr1)++;
+    xaya = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD32(ptr1)++;
+    xbyb = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD32(ptr1)++;
+    xcyc = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xd (real), yd(imag) input */
-    xdyd = *__SIMD32(ptr1)++;
+    xdyd = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* R = packed((ya + yc), (xa + xc)) */
     R = __QADD16(xaya, xcyc);
@@ -568,19 +513,19 @@ void arm_radix4_butterfly_q15(
     T = __QADD16(xbyb, xdyd);
 
     /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
+    ptr1 = ptr1 - 8U;
 
 
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    *__SIMD32(ptr1)++ = __SHADD16(R, T);
+    write_q15x2_ia (&ptr1, __SHADD16(R, T));
 
     /* T = packed((yb + yd), (xb + xd)) */
     T = __QADD16(xbyb, xdyd);
 
     /* xc' = (xa-xb+xc-xd) */
     /* yc' = (ya-yb+yc-yd) */
-    *__SIMD32(ptr1)++ = __SHSUB16(R, T);
+    write_q15x2_ia (&ptr1, __SHSUB16(R, T));
 
     /* S = packed((ya - yc), (xa - xc)) */
     S = __QSUB16(xaya, xcyc);
@@ -590,30 +535,24 @@ void arm_radix4_butterfly_q15(
     U = __QSUB16(xbyb, xdyd);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
 
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
 #else
-
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
 
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-  } while(--j);
+  } while (--j);
 
   /* end of last stage process */
 
@@ -623,13 +562,11 @@ void arm_radix4_butterfly_q15(
   /* output is in 5.11(q11) format for the 16 point  */
 
 
-#else
+#else /* #if defined (ARM_MATH_DSP) */
 
-  /* Run the below code for Cortex-M0 */
-
-  q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
+        q15_t R0, R1, S0, S1, T0, T1, U0, U1;
+        q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
+        uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
 
   /* Total process is divided into three stages */
 
@@ -640,13 +577,13 @@ void arm_radix4_butterfly_q15(
   n1 = n2;
 
   /* n2 = fftLen/4 */
-  n2 >>= 2u;
+  n2 >>= 2U;
 
   /* Index for twiddle coefficient */
-  ic = 0u;
+  ic = 0U;
 
   /* Index for input read and output write */
-  i0 = 0u;
+  i0 = 0U;
   j = n2;
 
   /* Input is in 1.15(q15) format */
@@ -666,18 +603,18 @@ void arm_radix4_butterfly_q15(
 
     /* input is down scale by 4 to avoid overflow */
     /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u] >> 2u;
-    T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
+    T0 = pSrc16[i0 * 2U] >> 2U;
+    T1 = pSrc16[(i0 * 2U) + 1U] >> 2U;
 
     /* input is down scale by 4 to avoid overflow */
     /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u] >> 2u;
-    S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
+    S0 = pSrc16[i2 * 2U] >> 2U;
+    S1 = pSrc16[(i2 * 2U) + 1U] >> 2U;
 
     /* R0 = (ya + yc) */
-    R0 = __SSAT(T0 + S0, 16u);
+    R0 = __SSAT(T0 + S0, 16U);
     /* R1 = (xa + xc) */
-    R1 = __SSAT(T1 + S1, 16u);
+    R1 = __SSAT(T1 + S1, 16U);
 
     /* S0 = (ya - yc) */
     S0 = __SSAT(T0 - S0, 16);
@@ -687,55 +624,55 @@ void arm_radix4_butterfly_q15(
     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
     /* input is down scale by 4 to avoid overflow */
     /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
+    T0 = pSrc16[i1 * 2U] >> 2U;
+    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
 
     /* input is down scale by 4 to avoid overflow */
     /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1] >> 2u;
+    U0 = pSrc16[i3 * 2U] >> 2U;
+    U1 = pSrc16[(i3 * 2U) + 1] >> 2U;
 
     /* T0 = (yb + yd) */
-    T0 = __SSAT(T0 + U0, 16u);
+    T0 = __SSAT(T0 + U0, 16U);
     /* T1 = (xb + xd) */
-    T1 = __SSAT(T1 + U1, 16u);
+    T1 = __SSAT(T1 + U1, 16U);
 
     /*  writing the butterfly processed i0 sample */
     /* ya' = ya + yb + yc + yd */
     /* xa' = xa + xb + xc + xd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
+    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
+    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
 
     /* R0 = (ya + yc) - (yb + yd) */
     /* R1 = (xa + xc) - (xb + xd) */
-    R0 = __SSAT(R0 - T0, 16u);
-    R1 = __SSAT(R1 - T1, 16u);
+    R0 = __SSAT(R0 - T0, 16U);
+    R1 = __SSAT(R1 - T1, 16U);
 
     /* co2 & si2 are read from Coefficient pointer */
-    Co2 = pCoef16[2u * ic * 2u];
-    Si2 = pCoef16[(2u * ic * 2u) + 1];
+    Co2 = pCoef16[2U * ic * 2U];
+    Si2 = pCoef16[(2U * ic * 2U) + 1];
 
     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16u);
+    out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U);
     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16u);
+    out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U);
 
     /*  Reading i0+fftLen/4 */
     /* input is down scale by 4 to avoid overflow */
     /* T0 = yb, T1 =  xb */
-    T0 = pSrc16[i1 * 2u] >> 2;
-    T1 = pSrc16[(i1 * 2u) + 1] >> 2;
+    T0 = pSrc16[i1 * 2U] >> 2;
+    T1 = pSrc16[(i1 * 2U) + 1] >> 2;
 
     /* writing the butterfly processed i0 + fftLen/4 sample */
     /* writing output(xc', yc') in little endian format */
-    pSrc16[i1 * 2u] = out1;
-    pSrc16[(i1 * 2u) + 1] = out2;
+    pSrc16[i1 * 2U] = out1;
+    pSrc16[(i1 * 2U) + 1] = out2;
 
     /*  Butterfly calculations */
     /* input is down scale by 4 to avoid overflow */
     /* U0 = yd, U1 = xd */
-    U0 = pSrc16[i3 * 2u] >> 2;
-    U1 = pSrc16[(i3 * 2u) + 1] >> 2;
+    U0 = pSrc16[i3 * 2U] >> 2;
+    U1 = pSrc16[(i3 * 2U) + 1] >> 2;
     /* T0 = yb-yd */
     T0 = __SSAT(T0 - U0, 16);
     /* T1 = xb-xd */
@@ -746,12 +683,12 @@ void arm_radix4_butterfly_q15(
     R1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16);
 
     /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */
-    S0 = (q15_t) __SSAT(((q31_t) S0 + T1), 16u);
-    S1 = (q15_t) __SSAT(((q31_t) S1 - T0), 16u);
+    S0 = (q15_t) __SSAT(((q31_t) S0 + T1), 16U);
+    S1 = (q15_t) __SSAT(((q31_t) S1 - T0), 16U);
 
     /* co1 & si1 are read from Coefficient pointer */
-    Co1 = pCoef16[ic * 2u];
-    Si1 = pCoef16[(ic * 2u) + 1];
+    Co1 = pCoef16[ic * 2U];
+    Si1 = pCoef16[(ic * 2U) + 1];
     /*  Butterfly process for the i0+fftLen/2 sample */
     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
     out1 = (q15_t) ((Si1 * S1 + Co1 * S0) >> 16);
@@ -759,28 +696,28 @@ void arm_radix4_butterfly_q15(
     out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16);
 
     /* writing output(xb', yb') in little endian format */
-    pSrc16[i2 * 2u] = out1;
-    pSrc16[(i2 * 2u) + 1] = out2;
+    pSrc16[i2 * 2U] = out1;
+    pSrc16[(i2 * 2U) + 1] = out2;
 
     /* Co3 & si3 are read from Coefficient pointer */
-    Co3 = pCoef16[3u * (ic * 2u)];
-    Si3 = pCoef16[(3u * (ic * 2u)) + 1];
+    Co3 = pCoef16[3U * (ic * 2U)];
+    Si3 = pCoef16[(3U * (ic * 2U)) + 1];
     /*  Butterfly process for the i0+3fftLen/4 sample */
     /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16u);
+    out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U);
     /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16u);
+    out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U);
     /* writing output(xd', yd') in little endian format */
-    pSrc16[i3 * 2u] = out1;
-    pSrc16[(i3 * 2u) + 1] = out2;
+    pSrc16[i3 * 2U] = out1;
+    pSrc16[(i3 * 2U) + 1] = out2;
 
     /*  Twiddle coefficients index modifier */
     ic = ic + twidCoefModifier;
 
     /*  Updating input index */
-    i0 = i0 + 1u;
+    i0 = i0 + 1U;
 
-  } while(--j);
+  } while (--j);
   /* data is in 4.11(q11) format */
 
   /* end of first stage process */
@@ -789,25 +726,25 @@ void arm_radix4_butterfly_q15(
   /* start of middle stage process */
 
   /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
+  twidCoefModifier <<= 2U;
 
   /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
   {
     /*  Initializations for the middle stage */
     n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
+    n2 >>= 2U;
+    ic = 0U;
 
-    for (j = 0u; j <= (n2 - 1u); j++)
+    for (j = 0U; j <= (n2 - 1U); j++)
     {
       /*  index calculation for the coefficients */
-      Co1 = pCoef16[ic * 2u];
-      Si1 = pCoef16[(ic * 2u) + 1u];
-      Co2 = pCoef16[2u * (ic * 2u)];
-      Si2 = pCoef16[(2u * (ic * 2u)) + 1u];
-      Co3 = pCoef16[3u * (ic * 2u)];
-      Si3 = pCoef16[(3u * (ic * 2u)) + 1u];
+      Co1 = pCoef16[ic * 2U];
+      Si1 = pCoef16[(ic * 2U) + 1U];
+      Co2 = pCoef16[2U * (ic * 2U)];
+      Si2 = pCoef16[(2U * (ic * 2U)) + 1U];
+      Co3 = pCoef16[3U * (ic * 2U)];
+      Si3 = pCoef16[(3U * (ic * 2U)) + 1U];
 
       /*  Twiddle coefficients index modifier */
       ic = ic + twidCoefModifier;
@@ -823,12 +760,12 @@ void arm_radix4_butterfly_q15(
 
         /*  Reading i0, i0+fftLen/2 inputs */
         /* Read ya (real), xa(imag) input */
-        T0 = pSrc16[i0 * 2u];
-        T1 = pSrc16[(i0 * 2u) + 1u];
+        T0 = pSrc16[i0 * 2U];
+        T1 = pSrc16[(i0 * 2U) + 1U];
 
         /* Read yc (real), xc(imag) input */
-        S0 = pSrc16[i2 * 2u];
-        S1 = pSrc16[(i2 * 2u) + 1u];
+        S0 = pSrc16[i2 * 2U];
+        S1 = pSrc16[(i2 * 2U) + 1U];
 
         /* R0 = (ya + yc), R1 = (xa + xc) */
         R0 = __SSAT(T0 + S0, 16);
@@ -840,12 +777,12 @@ void arm_radix4_butterfly_q15(
 
         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
         /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
+        T0 = pSrc16[i1 * 2U];
+        T1 = pSrc16[(i1 * 2U) + 1U];
 
         /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
+        U0 = pSrc16[i3 * 2U];
+        U1 = pSrc16[(i3 * 2U) + 1U];
 
 
         /* T0 = (yb + yd), T1 = (xb + xd) */
@@ -856,73 +793,73 @@ void arm_radix4_butterfly_q15(
 
         /* xa' = xa + xb + xc + xd */
         /* ya' = ya + yb + yc + yd */
-        out1 = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
-        out2 = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
+        out1 = ((R0 >> 1U) + (T0 >> 1U)) >> 1U;
+        out2 = ((R1 >> 1U) + (T1 >> 1U)) >> 1U;
 
-        pSrc16[i0 * 2u] = out1;
-        pSrc16[(2u * i0) + 1u] = out2;
+        pSrc16[i0 * 2U] = out1;
+        pSrc16[(2U * i0) + 1U] = out2;
 
         /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-        R0 = (R0 >> 1u) - (T0 >> 1u);
-        R1 = (R1 >> 1u) - (T1 >> 1u);
+        R0 = (R0 >> 1U) - (T0 >> 1U);
+        R1 = (R1 >> 1U) - (T1 >> 1U);
 
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16u);
+        out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U);
 
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16u);
+        out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U);
 
         /*  Reading i0+3fftLen/4 */
         /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
+        T0 = pSrc16[i1 * 2U];
+        T1 = pSrc16[(i1 * 2U) + 1U];
 
         /*  writing the butterfly processed i0 + fftLen/4 sample */
         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        pSrc16[i1 * 2u] = out1;
-        pSrc16[(i1 * 2u) + 1u] = out2;
+        pSrc16[i1 * 2U] = out1;
+        pSrc16[(i1 * 2U) + 1U] = out2;
 
         /*  Butterfly calculations */
 
         /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
+        U0 = pSrc16[i3 * 2U];
+        U1 = pSrc16[(i3 * 2U) + 1U];
 
         /* T0 = yb-yd, T1 = xb-xd */
         T0 = __SSAT(T0 - U0, 16);
         T1 = __SSAT(T1 - U1, 16);
 
         /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */
-        R0 = (S0 >> 1u) - (T1 >> 1u);
-        R1 = (S1 >> 1u) + (T0 >> 1u);
+        R0 = (S0 >> 1U) - (T1 >> 1U);
+        R1 = (S1 >> 1U) + (T0 >> 1U);
 
         /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */
-        S0 = (S0 >> 1u) + (T1 >> 1u);
-        S1 = (S1 >> 1u) - (T0 >> 1u);
+        S0 = (S0 >> 1U) + (T1 >> 1U);
+        S1 = (S1 >> 1U) - (T0 >> 1U);
 
         /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = (q15_t) ((Co1 * S0 + Si1 * S1) >> 16u);
+        out1 = (q15_t) ((Co1 * S0 + Si1 * S1) >> 16U);
 
-        out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16u);
+        out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16U);
 
         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        pSrc16[i2 * 2u] = out1;
-        pSrc16[(i2 * 2u) + 1u] = out2;
+        pSrc16[i2 * 2U] = out1;
+        pSrc16[(i2 * 2U) + 1U] = out2;
 
         /*  Butterfly process for the i0+3fftLen/4 sample */
-        out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16u);
+        out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U);
 
-        out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16u);
+        out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U);
         /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
         /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
-        pSrc16[i3 * 2u] = out1;
-        pSrc16[(i3 * 2u) + 1u] = out2;
+        pSrc16[i3 * 2U] = out1;
+        pSrc16[(i3 * 2U) + 1U] = out2;
       }
     }
     /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
+    twidCoefModifier <<= 2U;
   }
   /* end of middle stage process */
 
@@ -934,12 +871,12 @@ void arm_radix4_butterfly_q15(
 
   /*  Initializations for the last stage */
   n1 = n2;
-  n2 >>= 2u;
+  n2 >>= 2U;
 
   /* start of last stage process */
 
   /*  Butterfly implementation */
-  for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
+  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
   {
     /*  index calculation for the input as, */
     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
@@ -949,70 +886,70 @@ void arm_radix4_butterfly_q15(
 
     /*  Reading i0, i0+fftLen/2 inputs */
     /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u];
-    T1 = pSrc16[(i0 * 2u) + 1u];
+    T0 = pSrc16[i0 * 2U];
+    T1 = pSrc16[(i0 * 2U) + 1U];
 
     /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u];
-    S1 = pSrc16[(i2 * 2u) + 1u];
+    S0 = pSrc16[i2 * 2U];
+    S1 = pSrc16[(i2 * 2U) + 1U];
 
     /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
+    R0 = __SSAT(T0 + S0, 16U);
+    R1 = __SSAT(T1 + S1, 16U);
 
     /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
+    S0 = __SSAT(T0 - S0, 16U);
+    S1 = __SSAT(T1 - S1, 16U);
 
     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
     /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
+    T0 = pSrc16[i1 * 2U];
+    T1 = pSrc16[(i1 * 2U) + 1U];
     /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
+    U0 = pSrc16[i3 * 2U];
+    U1 = pSrc16[(i3 * 2U) + 1U];
 
     /* T0 = (yb + yd), T1 = (xb + xd)) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
+    T0 = __SSAT(T0 + U0, 16U);
+    T1 = __SSAT(T1 + U1, 16U);
 
     /*  writing the butterfly processed i0 sample */
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
+    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
+    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
 
     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-    R0 = (R0 >> 1u) - (T0 >> 1u);
-    R1 = (R1 >> 1u) - (T1 >> 1u);
+    R0 = (R0 >> 1U) - (T0 >> 1U);
+    R1 = (R1 >> 1U) - (T1 >> 1U);
     /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
+    T0 = pSrc16[i1 * 2U];
+    T1 = pSrc16[(i1 * 2U) + 1U];
 
     /*  writing the butterfly processed i0 + fftLen/4 sample */
     /* xc' = (xa-xb+xc-xd) */
     /* yc' = (ya-yb+yc-yd) */
-    pSrc16[i1 * 2u] = R0;
-    pSrc16[(i1 * 2u) + 1u] = R1;
+    pSrc16[i1 * 2U] = R0;
+    pSrc16[(i1 * 2U) + 1U] = R1;
 
     /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
+    U0 = pSrc16[i3 * 2U];
+    U1 = pSrc16[(i3 * 2U) + 1U];
     /* T0 = (yb - yd), T1 = (xb - xd)  */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
+    T0 = __SSAT(T0 - U0, 16U);
+    T1 = __SSAT(T1 - U1, 16U);
 
     /*  writing the butterfly processed i0 + fftLen/2 sample */
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    pSrc16[i2 * 2u] = (S0 >> 1u) + (T1 >> 1u);
-    pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
+    pSrc16[i2 * 2U] = (S0 >> 1U) + (T1 >> 1U);
+    pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U);
 
     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    pSrc16[i3 * 2u] = (S0 >> 1u) - (T1 >> 1u);
-    pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
+    pSrc16[i3 * 2U] = (S0 >> 1U) - (T1 >> 1U);
+    pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U);
 
   }
 
@@ -1023,82 +960,80 @@ void arm_radix4_butterfly_q15(
   /* output is in 7.9(q9) format for the 64 point  */
   /* output is in 5.11(q11) format for the 16 point  */
 
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
 
 
-/**    
- * @brief  Core function for the Q15 CIFFT butterfly process.   
- * @param[in, out] *pSrc16          points to the in-place buffer of Q15 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef16         points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
+/**
+  @brief         Core function for the Q15 CIFFT butterfly process.
+  @param[in,out] pSrc16           points to the in-place buffer of Q15 data type
+  @param[in]     fftLen           length of the FFT
+  @param[in]     pCoef16          points to twiddle coefficient buffer
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
  */
 
-/*    
-* Radix-4 IFFT algorithm used is :    
-*    
-* CIFFT uses same twiddle coefficients as CFFT function    
-*  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]    
-*    
-*    
-* IFFT is implemented with following changes in equations from FFT    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 IFFT:    
-* Wn = co1 + j * (si1)    
-* W2n = co2 + j * (si2)    
-* W3n = co3 + j * (si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
-*    
-*/
+/*
+ * Radix-4 IFFT algorithm used is :
+ *
+ * CIFFT uses same twiddle coefficients as CFFT function
+ *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
+ *
+ *
+ * IFFT is implemented with following changes in equations from FFT
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 IFFT:
+ * Wn = co1 + j * (si1)
+ * W2n = co2 + j * (si2)
+ * W3n = co3 + j * (si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
+ * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
+ * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
+ * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
+ *
+ */
 
 void arm_radix4_butterfly_inverse_q15(
-  q15_t * pSrc16,
-  uint32_t fftLen,
-  q15_t * pCoef16,
-  uint32_t twidCoefModifier)
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier)
 {
 
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t R, S, T, U;
-  q31_t C1, C2, C3, out1, out2;
-  uint32_t n1, n2, ic, i0, j, k;
+#if defined (ARM_MATH_DSP)
 
-  q15_t *ptr1;
-  q15_t *pSi0;
-  q15_t *pSi1;
-  q15_t *pSi2;
-  q15_t *pSi3;
-
-  q31_t xaya, xbyb, xcyc, xdyd;
+        q31_t R, S, T, U;
+        q31_t C1, C2, C3, out1, out2;
+        uint32_t n1, n2, ic, i0, j, k;
+        
+        q15_t *ptr1;
+        q15_t *pSi0;
+        q15_t *pSi1;
+        q15_t *pSi2;
+        q15_t *pSi3;
+        
+        q31_t xaya, xbyb, xcyc, xdyd;
 
   /* Total process is divided into three stages */
 
@@ -1109,14 +1044,14 @@ void arm_radix4_butterfly_inverse_q15(
   n1 = n2;
 
   /* n2 = fftLen/4 */
-  n2 >>= 2u;
+  n2 >>= 2U;
 
   /* Index for twiddle coefficient */
-  ic = 0u;
+  ic = 0U;
 
   /* Index for input read and output write */
   j = n2;
-  
+
   pSi0 = pSrc16;
   pSi1 = pSi0 + 2 * n2;
   pSi2 = pSi1 + 2 * n2;
@@ -1131,12 +1066,12 @@ void arm_radix4_butterfly_inverse_q15(
 
     /*  Reading i0, i0+fftLen/2 inputs */
     /* Read ya (real), xa(imag) input */
-    T = _SIMD32_OFFSET(pSi0);
+    T = read_q15x2 (pSi0);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* Read yc (real), xc(imag) input */
-    S = _SIMD32_OFFSET(pSi2);
+    S = read_q15x2 (pSi2);
     S = __SHADD16(S, 0);
     S = __SHADD16(S, 0);
 
@@ -1148,12 +1083,12 @@ void arm_radix4_butterfly_inverse_q15(
 
     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
     /* Read yb (real), xb(imag) input */
-    T = _SIMD32_OFFSET(pSi1);
+    T = read_q15x2 (pSi1);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* Read yd (real), xd(imag) input */
-    U = _SIMD32_OFFSET(pSi3);
+    U = read_q15x2 (pSi3);
     U = __SHADD16(U, 0);
     U = __SHADD16(U, 0);
 
@@ -1163,46 +1098,39 @@ void arm_radix4_butterfly_inverse_q15(
     /*  writing the butterfly processed i0 sample */
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    _SIMD32_OFFSET(pSi0) = __SHADD16(R, T);
-    pSi0 += 2;
+    write_q15x2_ia (&pSi0, __SHADD16(R, T));
 
     /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
     R = __QSUB16(R, T);
 
     /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
+    C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = __SMUSD(C2, R) >> 16u;
+    out1 = __SMUSD(C2, R) >> 16U;
     /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
     out2 = __SMUADX(C2, R);
-
 #else
-
     /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out1 = __SMUADX(C2, R) >> 16u;
+    out1 = __SMUADX(C2, R) >> 16U;
     /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
     out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /*  Reading i0+fftLen/4 */
     /* T = packed(yb, xb) */
-    T = _SIMD32_OFFSET(pSi1);
+    T = read_q15x2 (pSi1);
     T = __SHADD16(T, 0);
     T = __SHADD16(T, 0);
 
     /* writing the butterfly processed i0 + fftLen/4 sample */
     /* writing output(xc', yc') in little endian format */
-    _SIMD32_OFFSET(pSi1) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi1 += 2;
+    write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
     /*  Butterfly calculations */
     /* U = packed(yd, xd) */
-    U = _SIMD32_OFFSET(pSi3);
+    U = read_q15x2 (pSi3);
     U = __SHADD16(U, 0);
     U = __SHADD16(U, 0);
 
@@ -1210,76 +1138,59 @@ void arm_radix4_butterfly_inverse_q15(
     T = __QSUB16(T, U);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
     R = __QSAX(S, T);
     /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
     S = __QASX(S, T);
-
 #else
-
     /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
     R = __QASX(S, T);
     /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
     S = __QSAX(S, T);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
+    C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
     /*  Butterfly process for the i0+fftLen/2 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = __SMUSD(C1, S) >> 16u;
+    out1 = __SMUSD(C1, S) >> 16U;
     /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
     out2 = __SMUADX(C1, S);
-
 #else
-
     /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out1 = __SMUADX(C1, S) >> 16u;
+    out1 = __SMUADX(C1, S) >> 16U;
     /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
     out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* writing output(xb', yb') in little endian format */
-    _SIMD32_OFFSET(pSi2) =
-      ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF);
-    pSi2 += 2;
-
+    write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF));
 
     /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
+    C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
     /*  Butterfly process for the i0+3fftLen/4 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = __SMUSD(C3, R) >> 16u;
+    out1 = __SMUSD(C3, R) >> 16U;
     /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
     out2 = __SMUADX(C3, R);
-
 #else
-
     /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out1 = __SMUADX(C3, R) >> 16u;
+    out1 = __SMUADX(C3, R) >> 16U;
     /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
     out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
     /* writing output(xd', yd') in little endian format */
-    _SIMD32_OFFSET(pSi3) =
-      ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-    pSi3 += 2;
+    write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
 
     /*  Twiddle coefficients index modifier */
     ic = ic + twidCoefModifier;
 
-  } while(--j);
+  } while (--j);
   /* data is in 4.11(q11) format */
 
   /* end of first stage process */
@@ -1288,26 +1199,26 @@ void arm_radix4_butterfly_inverse_q15(
   /* start of middle stage process */
 
   /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
+  twidCoefModifier <<= 2U;
 
   /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
   {
     /*  Initializations for the middle stage */
     n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
+    n2 >>= 2U;
+    ic = 0U;
 
-    for (j = 0u; j <= (n2 - 1u); j++)
+    for (j = 0U; j <= (n2 - 1U); j++)
     {
       /*  index calculation for the coefficients */
-      C1 = _SIMD32_OFFSET(pCoef16 + (2u * ic));
-      C2 = _SIMD32_OFFSET(pCoef16 + (4u * ic));
-      C3 = _SIMD32_OFFSET(pCoef16 + (6u * ic));
+      C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+      C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+      C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
 
       /*  Twiddle coefficients index modifier */
       ic = ic + twidCoefModifier;
-      
+
       pSi0 = pSrc16 + 2 * j;
       pSi1 = pSi0 + 2 * n2;
       pSi2 = pSi1 + 2 * n2;
@@ -1318,10 +1229,10 @@ void arm_radix4_butterfly_inverse_q15(
       {
         /*  Reading i0, i0+fftLen/2 inputs */
         /* Read ya (real), xa(imag) input */
-        T = _SIMD32_OFFSET(pSi0);
+        T = read_q15x2 (pSi0);
 
         /* Read yc (real), xc(imag) input */
-        S = _SIMD32_OFFSET(pSi2);
+        S = read_q15x2 (pSi2);
 
         /* R = packed( (ya + yc), (xa + xc)) */
         R = __QADD16(T, S);
@@ -1331,10 +1242,10 @@ void arm_radix4_butterfly_inverse_q15(
 
         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
         /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
+        T = read_q15x2 (pSi1);
 
         /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
+        U = read_q15x2 (pSi3);
 
         /* T = packed( (yb + yd), (xb + xd)) */
         T = __QADD16(T, U);
@@ -1345,106 +1256,89 @@ void arm_radix4_butterfly_inverse_q15(
         /* ya' = ya + yb + yc + yd */
         out1 = __SHADD16(R, T);
         out1 = __SHADD16(out1, 0);
-        _SIMD32_OFFSET(pSi0) = out1;
+        write_q15x2 (pSi0, out1);
         pSi0 += 2 * n1;
 
         /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
         R = __SHSUB16(R, T);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = __SMUSD(C2, R) >> 16u;
+        out1 = __SMUSD(C2, R) >> 16U;
 
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
         out2 = __SMUADX(C2, R);
-
 #else
-
         /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out1 = __SMUADX(R, C2) >> 16u;
+        out1 = __SMUADX(R, C2) >> 16U;
 
         /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
         out2 = __SMUSD(__QSUB16(0, C2), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /*  Reading i0+3fftLen/4 */
         /* Read yb (real), xb(imag) input */
-        T = _SIMD32_OFFSET(pSi1);
+        T = read_q15x2 (pSi1);
 
         /*  writing the butterfly processed i0 + fftLen/4 sample */
         /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
         /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        _SIMD32_OFFSET(pSi1) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi1 += 2 * n1;
 
         /*  Butterfly calculations */
 
         /* Read yd (real), xd(imag) input */
-        U = _SIMD32_OFFSET(pSi3);
+        U = read_q15x2 (pSi3);
 
         /* T = packed(yb-yd, xb-xd) */
         T = __QSUB16(T, U);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
         R = __SHSAX(S, T);
 
         /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
         S = __SHASX(S, T);
 
-
         /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUSD(C1, S) >> 16u;
+        out1 = __SMUSD(C1, S) >> 16U;
         out2 = __SMUADX(C1, S);
-
 #else
-
         /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
         R = __SHASX(S, T);
 
         /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
         S = __SHSAX(S, T);
 
-
         /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUADX(S, C1) >> 16u;
+        out1 = __SMUADX(S, C1) >> 16U;
         out2 = __SMUSD(__QSUB16(0, C1), S);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
         /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        _SIMD32_OFFSET(pSi2) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi2 += 2 * n1;
 
         /*  Butterfly process for the i0+3fftLen/4 sample */
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(C3, R) >> 16u;
+        out1 = __SMUSD(C3, R) >> 16U;
         out2 = __SMUADX(C3, R);
-
 #else
-
-        out1 = __SMUADX(C3, R) >> 16u;
+        out1 = __SMUADX(C3, R) >> 16U;
         out2 = __SMUSD(__QSUB16(0, C3), R);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
         /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
         /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        _SIMD32_OFFSET(pSi3) =
-          ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
+        write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
         pSi3 += 2 * n1;
       }
     }
     /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
+    twidCoefModifier <<= 2U;
   }
   /* end of middle stage process */
 
@@ -1464,16 +1358,16 @@ void arm_radix4_butterfly_inverse_q15(
   do
   {
     /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD32(ptr1)++;
+    xaya = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD32(ptr1)++;
+    xbyb = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD32(ptr1)++;
+    xcyc = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* Read xd (real), yd(imag) input */
-    xdyd = *__SIMD32(ptr1)++;
+    xdyd = read_q15x2_ia ((q15_t **) &ptr1);
 
     /* R = packed((ya + yc), (xa + xc)) */
     R = __QADD16(xaya, xcyc);
@@ -1482,19 +1376,19 @@ void arm_radix4_butterfly_inverse_q15(
     T = __QADD16(xbyb, xdyd);
 
     /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
+    ptr1 = ptr1 - 8U;
 
 
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    *__SIMD32(ptr1)++ = __SHADD16(R, T);
+    write_q15x2_ia (&ptr1, __SHADD16(R, T));
 
     /* T = packed((yb + yd), (xb + xd)) */
     T = __QADD16(xbyb, xdyd);
 
     /* xc' = (xa-xb+xc-xd) */
     /* yc' = (ya-yb+yc-yd) */
-    *__SIMD32(ptr1)++ = __SHSUB16(R, T);
+    write_q15x2_ia (&ptr1, __SHSUB16(R, T));
 
     /* S = packed((ya - yc), (xa - xc)) */
     S = __QSUB16(xaya, xcyc);
@@ -1504,31 +1398,24 @@ void arm_radix4_butterfly_inverse_q15(
     U = __QSUB16(xbyb, xdyd);
 
 #ifndef ARM_MATH_BIG_ENDIAN
-
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
 
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
 #else
-
     /* xb' = (xa+yb-xc-yd) */
     /* yb' = (ya-xb-yc+xd) */
-    *__SIMD32(ptr1)++ = __SHSAX(S, U);
-
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
 
     /* xd' = (xa-yb-xc+yd) */
     /* yd' = (ya+xb-yc-xd) */
-    *__SIMD32(ptr1)++ = __SHASX(S, U);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
 
-  } while(--j);
+  } while (--j);
 
   /* end of last stage  process */
 
@@ -1538,13 +1425,11 @@ void arm_radix4_butterfly_inverse_q15(
   /* output is in 5.11(q11) format for the 16 point  */
 
 
-#else
-
-  /* Run the below code for Cortex-M0 */
+#else /* arm_radix4_butterfly_inverse_q15 */
 
-  q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-  q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-  uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
+        q15_t R0, R1, S0, S1, T0, T1, U0, U1;
+        q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
+        uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
 
   /* Total process is divided into three stages */
 
@@ -1555,13 +1440,13 @@ void arm_radix4_butterfly_inverse_q15(
   n1 = n2;
 
   /* n2 = fftLen/4 */
-  n2 >>= 2u;
+  n2 >>= 2U;
 
   /* Index for twiddle coefficient */
-  ic = 0u;
+  ic = 0U;
 
   /* Index for input read and output write */
-  i0 = 0u;
+  i0 = 0U;
 
   j = n2;
 
@@ -1581,71 +1466,71 @@ void arm_radix4_butterfly_inverse_q15(
     /*  Reading i0, i0+fftLen/2 inputs */
     /* input is down scale by 4 to avoid overflow */
     /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u] >> 2u;
-    T1 = pSrc16[(i0 * 2u) + 1u] >> 2u;
+    T0 = pSrc16[i0 * 2U] >> 2U;
+    T1 = pSrc16[(i0 * 2U) + 1U] >> 2U;
     /* input is down scale by 4 to avoid overflow */
     /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u] >> 2u;
-    S1 = pSrc16[(i2 * 2u) + 1u] >> 2u;
+    S0 = pSrc16[i2 * 2U] >> 2U;
+    S1 = pSrc16[(i2 * 2U) + 1U] >> 2U;
 
     /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
+    R0 = __SSAT(T0 + S0, 16U);
+    R1 = __SSAT(T1 + S1, 16U);
     /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
+    S0 = __SSAT(T0 - S0, 16U);
+    S1 = __SSAT(T1 - S1, 16U);
 
     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
     /* input is down scale by 4 to avoid overflow */
     /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
+    T0 = pSrc16[i1 * 2U] >> 2U;
+    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
     /* Read yd (real), xd(imag) input */
     /* input is down scale by 4 to avoid overflow */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
+    U0 = pSrc16[i3 * 2U] >> 2U;
+    U1 = pSrc16[(i3 * 2U) + 1U] >> 2U;
 
     /* T0 = (yb + yd), T1 = (xb + xd) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
+    T0 = __SSAT(T0 + U0, 16U);
+    T1 = __SSAT(T1 + U1, 16U);
 
     /*  writing the butterfly processed i0 sample */
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
+    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
+    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
 
     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */
-    R0 = __SSAT(R0 - T0, 16u);
-    R1 = __SSAT(R1 - T1, 16u);
+    R0 = __SSAT(R0 - T0, 16U);
+    R1 = __SSAT(R1 - T1, 16U);
     /* co2 & si2 are read from Coefficient pointer */
-    Co2 = pCoef16[2u * ic * 2u];
-    Si2 = pCoef16[(2u * ic * 2u) + 1u];
+    Co2 = pCoef16[2U * ic * 2U];
+    Si2 = pCoef16[(2U * ic * 2U) + 1U];
     /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
-    out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16u);
+    out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16U);
     /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-    out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16u);
+    out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16U);
 
     /*  Reading i0+fftLen/4 */
     /* input is down scale by 4 to avoid overflow */
     /* T0 = yb, T1 = xb */
-    T0 = pSrc16[i1 * 2u] >> 2u;
-    T1 = pSrc16[(i1 * 2u) + 1u] >> 2u;
+    T0 = pSrc16[i1 * 2U] >> 2U;
+    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
 
     /* writing the butterfly processed i0 + fftLen/4 sample */
     /* writing output(xc', yc') in little endian format */
-    pSrc16[i1 * 2u] = out1;
-    pSrc16[(i1 * 2u) + 1u] = out2;
+    pSrc16[i1 * 2U] = out1;
+    pSrc16[(i1 * 2U) + 1U] = out2;
 
     /*  Butterfly calculations */
     /* input is down scale by 4 to avoid overflow */
     /* U0 = yd, U1 = xd) */
-    U0 = pSrc16[i3 * 2u] >> 2u;
-    U1 = pSrc16[(i3 * 2u) + 1u] >> 2u;
+    U0 = pSrc16[i3 * 2U] >> 2U;
+    U1 = pSrc16[(i3 * 2U) + 1U] >> 2U;
 
     /* T0 = yb-yd, T1 = xb-xd) */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
+    T0 = __SSAT(T0 - U0, 16U);
+    T1 = __SSAT(T1 - U1, 16U);
     /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
     R0 = (q15_t) __SSAT((q31_t) (S0 + T1), 16);
     R1 = (q15_t) __SSAT((q31_t) (S1 - T0), 16);
@@ -1654,36 +1539,36 @@ void arm_radix4_butterfly_inverse_q15(
     S1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16);
 
     /* co1 & si1 are read from Coefficient pointer */
-    Co1 = pCoef16[ic * 2u];
-    Si1 = pCoef16[(ic * 2u) + 1u];
+    Co1 = pCoef16[ic * 2U];
+    Si1 = pCoef16[(ic * 2U) + 1U];
     /*  Butterfly process for the i0+fftLen/2 sample */
     /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
-    out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16u);
+    out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U);
     /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
-    out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16u);
+    out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U);
     /* writing output(xb', yb') in little endian format */
-    pSrc16[i2 * 2u] = out1;
-    pSrc16[(i2 * 2u) + 1u] = out2;
+    pSrc16[i2 * 2U] = out1;
+    pSrc16[(i2 * 2U) + 1U] = out2;
 
     /* Co3 & si3 are read from Coefficient pointer */
-    Co3 = pCoef16[3u * ic * 2u];
-    Si3 = pCoef16[(3u * ic * 2u) + 1u];
+    Co3 = pCoef16[3U * ic * 2U];
+    Si3 = pCoef16[(3U * ic * 2U) + 1U];
     /*  Butterfly process for the i0+3fftLen/4 sample */
     /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
-    out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16u);
+    out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U);
     /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
-    out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16u);
+    out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U);
     /* writing output(xd', yd') in little endian format */
-    pSrc16[i3 * 2u] = out1;
-    pSrc16[(i3 * 2u) + 1u] = out2;
+    pSrc16[i3 * 2U] = out1;
+    pSrc16[(i3 * 2U) + 1U] = out2;
 
     /*  Twiddle coefficients index modifier */
     ic = ic + twidCoefModifier;
 
     /*  Updating input index */
-    i0 = i0 + 1u;
+    i0 = i0 + 1U;
 
-  } while(--j);
+  } while (--j);
 
   /*  End of first stage process */
 
@@ -1693,25 +1578,25 @@ void arm_radix4_butterfly_inverse_q15(
   /*  Start of Middle stage process */
 
   /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2u;
+  twidCoefModifier <<= 2U;
 
   /*  Calculation of Middle stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
   {
     /*  Initializations for the middle stage */
     n1 = n2;
-    n2 >>= 2u;
-    ic = 0u;
+    n2 >>= 2U;
+    ic = 0U;
 
-    for (j = 0u; j <= (n2 - 1u); j++)
+    for (j = 0U; j <= (n2 - 1U); j++)
     {
       /*  index calculation for the coefficients */
-      Co1 = pCoef16[ic * 2u];
-      Si1 = pCoef16[(ic * 2u) + 1u];
-      Co2 = pCoef16[2u * ic * 2u];
-      Si2 = pCoef16[2u * ic * 2u + 1u];
-      Co3 = pCoef16[3u * ic * 2u];
-      Si3 = pCoef16[(3u * ic * 2u) + 1u];
+      Co1 = pCoef16[ic * 2U];
+      Si1 = pCoef16[(ic * 2U) + 1U];
+      Co2 = pCoef16[2U * ic * 2U];
+      Si2 = pCoef16[2U * ic * 2U + 1U];
+      Co3 = pCoef16[3U * ic * 2U];
+      Si3 = pCoef16[(3U * ic * 2U) + 1U];
 
       /*  Twiddle coefficients index modifier */
       ic = ic + twidCoefModifier;
@@ -1727,43 +1612,43 @@ void arm_radix4_butterfly_inverse_q15(
 
         /*  Reading i0, i0+fftLen/2 inputs */
         /* Read ya (real), xa(imag) input */
-        T0 = pSrc16[i0 * 2u];
-        T1 = pSrc16[(i0 * 2u) + 1u];
+        T0 = pSrc16[i0 * 2U];
+        T1 = pSrc16[(i0 * 2U) + 1U];
 
         /* Read yc (real), xc(imag) input */
-        S0 = pSrc16[i2 * 2u];
-        S1 = pSrc16[(i2 * 2u) + 1u];
+        S0 = pSrc16[i2 * 2U];
+        S1 = pSrc16[(i2 * 2U) + 1U];
 
 
         /* R0 = (ya + yc), R1 = (xa + xc) */
-        R0 = __SSAT(T0 + S0, 16u);
-        R1 = __SSAT(T1 + S1, 16u);
+        R0 = __SSAT(T0 + S0, 16U);
+        R1 = __SSAT(T1 + S1, 16U);
         /* S0 = (ya - yc), S1 = (xa - xc) */
-        S0 = __SSAT(T0 - S0, 16u);
-        S1 = __SSAT(T1 - S1, 16u);
+        S0 = __SSAT(T0 - S0, 16U);
+        S1 = __SSAT(T1 - S1, 16U);
 
         /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
         /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
+        T0 = pSrc16[i1 * 2U];
+        T1 = pSrc16[(i1 * 2U) + 1U];
 
         /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
+        U0 = pSrc16[i3 * 2U];
+        U1 = pSrc16[(i3 * 2U) + 1U];
 
         /* T0 = (yb + yd), T1 = (xb + xd) */
-        T0 = __SSAT(T0 + U0, 16u);
-        T1 = __SSAT(T1 + U1, 16u);
+        T0 = __SSAT(T0 + U0, 16U);
+        T1 = __SSAT(T1 + U1, 16U);
 
         /*  writing the butterfly processed i0 sample */
         /* xa' = xa + xb + xc + xd */
         /* ya' = ya + yb + yc + yd */
-        pSrc16[i0 * 2u] = ((R0 >> 1u) + (T0 >> 1u)) >> 1u;
-        pSrc16[(i0 * 2u) + 1u] = ((R1 >> 1u) + (T1 >> 1u)) >> 1u;
+        pSrc16[i0 * 2U] = ((R0 >> 1U) + (T0 >> 1U)) >> 1U;
+        pSrc16[(i0 * 2U) + 1U] = ((R1 >> 1U) + (T1 >> 1U)) >> 1U;
 
         /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-        R0 = (R0 >> 1u) - (T0 >> 1u);
-        R1 = (R1 >> 1u) - (T1 >> 1u);
+        R0 = (R0 >> 1U) - (T0 >> 1U);
+        R1 = (R1 >> 1U) - (T1 >> 1U);
 
         /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
         out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16);
@@ -1772,54 +1657,54 @@ void arm_radix4_butterfly_inverse_q15(
 
         /*  Reading i0+3fftLen/4 */
         /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2u];
-        T1 = pSrc16[(i1 * 2u) + 1u];
+        T0 = pSrc16[i1 * 2U];
+        T1 = pSrc16[(i1 * 2U) + 1U];
 
         /*  writing the butterfly processed i0 + fftLen/4 sample */
         /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
         /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-        pSrc16[i1 * 2u] = out1;
-        pSrc16[(i1 * 2u) + 1u] = out2;
+        pSrc16[i1 * 2U] = out1;
+        pSrc16[(i1 * 2U) + 1U] = out2;
 
         /*  Butterfly calculations */
         /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2u];
-        U1 = pSrc16[(i3 * 2u) + 1u];
+        U0 = pSrc16[i3 * 2U];
+        U1 = pSrc16[(i3 * 2U) + 1U];
 
         /* T0 = yb-yd, T1 = xb-xd) */
-        T0 = __SSAT(T0 - U0, 16u);
-        T1 = __SSAT(T1 - U1, 16u);
+        T0 = __SSAT(T0 - U0, 16U);
+        T1 = __SSAT(T1 - U1, 16U);
 
         /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
-        R0 = (S0 >> 1u) + (T1 >> 1u);
-        R1 = (S1 >> 1u) - (T0 >> 1u);
+        R0 = (S0 >> 1U) + (T1 >> 1U);
+        R1 = (S1 >> 1U) - (T0 >> 1U);
 
         /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
-        S0 = (S0 >> 1u) - (T1 >> 1u);
-        S1 = (S1 >> 1u) + (T0 >> 1u);
+        S0 = (S0 >> 1U) - (T1 >> 1U);
+        S1 = (S1 >> 1U) + (T0 >> 1U);
 
         /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16u);
-        out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16u);
+        out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U);
+        out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U);
         /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
         /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
-        pSrc16[i2 * 2u] = out1;
-        pSrc16[(i2 * 2u) + 1u] = out2;
+        pSrc16[i2 * 2U] = out1;
+        pSrc16[(i2 * 2U) + 1U] = out2;
 
         /*  Butterfly process for the i0+3fftLen/4 sample */
-        out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16u);
+        out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U);
 
-        out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16u);
+        out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U);
         /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
         /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
-        pSrc16[i3 * 2u] = out1;
-        pSrc16[(i3 * 2u) + 1u] = out2;
+        pSrc16[i3 * 2U] = out1;
+        pSrc16[(i3 * 2U) + 1U] = out2;
 
 
       }
     }
     /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2u;
+    twidCoefModifier <<= 2U;
   }
   /*  End of Middle stages process */
 
@@ -1834,10 +1719,10 @@ void arm_radix4_butterfly_inverse_q15(
 
   /*  Initializations for the last stage */
   n1 = n2;
-  n2 >>= 2u;
+  n2 >>= 2U;
 
   /*  Butterfly implementation */
-  for (i0 = 0u; i0 <= (fftLen - n1); i0 += n1)
+  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
   {
     /*  index calculation for the input as, */
     /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
@@ -1847,70 +1732,70 @@ void arm_radix4_butterfly_inverse_q15(
 
     /*  Reading i0, i0+fftLen/2 inputs */
     /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2u];
-    T1 = pSrc16[(i0 * 2u) + 1u];
+    T0 = pSrc16[i0 * 2U];
+    T1 = pSrc16[(i0 * 2U) + 1U];
     /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2u];
-    S1 = pSrc16[(i2 * 2u) + 1u];
+    S0 = pSrc16[i2 * 2U];
+    S1 = pSrc16[(i2 * 2U) + 1U];
 
     /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16u);
-    R1 = __SSAT(T1 + S1, 16u);
+    R0 = __SSAT(T0 + S0, 16U);
+    R1 = __SSAT(T1 + S1, 16U);
     /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16u);
-    S1 = __SSAT(T1 - S1, 16u);
+    S0 = __SSAT(T0 - S0, 16U);
+    S1 = __SSAT(T1 - S1, 16U);
 
     /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
     /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
+    T0 = pSrc16[i1 * 2U];
+    T1 = pSrc16[(i1 * 2U) + 1U];
     /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
+    U0 = pSrc16[i3 * 2U];
+    U1 = pSrc16[(i3 * 2U) + 1U];
 
     /* T0 = (yb + yd), T1 = (xb + xd) */
-    T0 = __SSAT(T0 + U0, 16u);
-    T1 = __SSAT(T1 + U1, 16u);
+    T0 = __SSAT(T0 + U0, 16U);
+    T1 = __SSAT(T1 + U1, 16U);
 
     /*  writing the butterfly processed i0 sample */
     /* xa' = xa + xb + xc + xd */
     /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2u] = (R0 >> 1u) + (T0 >> 1u);
-    pSrc16[(i0 * 2u) + 1u] = (R1 >> 1u) + (T1 >> 1u);
+    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
+    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
 
     /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-    R0 = (R0 >> 1u) - (T0 >> 1u);
-    R1 = (R1 >> 1u) - (T1 >> 1u);
+    R0 = (R0 >> 1U) - (T0 >> 1U);
+    R1 = (R1 >> 1U) - (T1 >> 1U);
 
     /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2u];
-    T1 = pSrc16[(i1 * 2u) + 1u];
+    T0 = pSrc16[i1 * 2U];
+    T1 = pSrc16[(i1 * 2U) + 1U];
 
     /*  writing the butterfly processed i0 + fftLen/4 sample */
     /* xc' = (xa-xb+xc-xd) */
     /* yc' = (ya-yb+yc-yd) */
-    pSrc16[i1 * 2u] = R0;
-    pSrc16[(i1 * 2u) + 1u] = R1;
+    pSrc16[i1 * 2U] = R0;
+    pSrc16[(i1 * 2U) + 1U] = R1;
 
     /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2u];
-    U1 = pSrc16[(i3 * 2u) + 1u];
+    U0 = pSrc16[i3 * 2U];
+    U1 = pSrc16[(i3 * 2U) + 1U];
     /* T0 = (yb - yd), T1 = (xb - xd) */
-    T0 = __SSAT(T0 - U0, 16u);
-    T1 = __SSAT(T1 - U1, 16u);
+    T0 = __SSAT(T0 - U0, 16U);
+    T1 = __SSAT(T1 - U1, 16U);
 
     /*  writing the butterfly processed i0 + fftLen/2 sample */
     /* xb' = (xa-yb-xc+yd) */
     /* yb' = (ya+xb-yc-xd) */
-    pSrc16[i2 * 2u] = (S0 >> 1u) - (T1 >> 1u);
-    pSrc16[(i2 * 2u) + 1u] = (S1 >> 1u) + (T0 >> 1u);
+    pSrc16[i2 * 2U] = (S0 >> 1U) - (T1 >> 1U);
+    pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U);
 
 
     /*  writing the butterfly processed i0 + 3fftLen/4 sample */
     /* xd' = (xa+yb-xc-yd) */
     /* yd' = (ya-xb-yc+xd) */
-    pSrc16[i3 * 2u] = (S0 >> 1u) + (T1 >> 1u);
-    pSrc16[(i3 * 2u) + 1u] = (S1 >> 1u) - (T0 >> 1u);
+    pSrc16[i3 * 2U] = (S0 >> 1U) + (T1 >> 1U);
+    pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U);
   }
   /* end of last stage  process */
 
@@ -1919,6 +1804,6 @@ void arm_radix4_butterfly_inverse_q15(
   /* output is in 7.9(q9) format for the 64 point  */
   /* output is in 5.11(q11) format for the 16 point  */
 
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+#endif /* #if defined (ARM_MATH_DSP) */
 
 }
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
new file mode 100644
index 00000000..b7ea7e5e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
@@ -0,0 +1,827 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_q31.c
+ * Description:  This file has function definition of Radix-4 FFT & IFFT function and
+ *               In-place bit reversal using bit reversal table
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+void arm_radix4_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
+
+void arm_radix4_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
+
+void arm_bitreversal_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in]     S    points to an instance of the Q31 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place
+  @return        none
+ 
+  @par Input and output formats:
+                 Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                 Hence the output format is different for different FFT sizes.
+                 The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
+  @par
+                 \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"
+                 \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"
+ */
+
+void arm_cfft_radix4_q31(
+  const arm_cfft_radix4_instance_q31 * S,
+        q31_t * pSrc)
+{
+  if (S->ifftFlag == 1U)
+  {
+    /* Complex IFFT radix-4 */
+    arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+  else
+  {
+    /* Complex FFT radix-4 */
+    arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+
+  if (S->bitReverseFlag == 1U)
+  {
+    /*  Bit Reversal */
+    arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+  }
+
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+/*
+ * Radix-4 FFT algorithm used is :
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 FFT:
+ * Wn = co1 + j * (- si1)
+ * W2n = co2 + j * (- si2)
+ * W3n = co3 + j * (- si3)
+ *
+ *  Butterfly implementation:
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
+ * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
+ * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
+ * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
+ *
+ */
+
+/**
+  @brief         Core function for the Q31 CFFT butterfly process.
+  @param[in,out] pSrc             points to the in-place buffer of Q31 data type.
+  @param[in]     fftLen           length of the FFT.
+  @param[in]     pCoef            points to twiddle coefficient buffer.
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
+ */
+
+void arm_radix4_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier)
+{
+        uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
+        q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+        
+        q31_t xa, xb, xc, xd;
+        q31_t ya, yb, yc, yd;
+        q31_t xa_out, xb_out, xc_out, xd_out;
+        q31_t ya_out, yb_out, yc_out, yd_out;
+        
+        q31_t *ptr1;
+
+  /* Total process is divided into three stages */
+
+  /* process first stage, middle stages, & last stage */
+
+
+  /* start of first stage process */
+
+  /*  Initializations for the first stage */
+  n2 = fftLen;
+  n1 = n2;
+  /* n2 = fftLen/4 */
+  n2 >>= 2U;
+  i0 = 0U;
+  ia1 = 0U;
+
+  j = n2;
+
+  /*  Calculation of first stage */
+  do
+  {
+    /*  index calculation for the input as, */
+    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
+    i1 = i0 + n2;
+    i2 = i1 + n2;
+    i3 = i2 + n2;
+
+    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
+
+    /*  Butterfly implementation */
+    /* xa + xc */
+    r1 = (pSrc[(2U * i0)] >> 4U) + (pSrc[(2U * i2)] >> 4U);
+    /* xa - xc */
+    r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U);
+
+    /* xb + xd */
+    t1 = (pSrc[(2U * i1)] >> 4U) + (pSrc[(2U * i3)] >> 4U);
+
+    /* ya + yc */
+    s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);
+    /* ya - yc */
+    s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U);
+
+    /* xa' = xa + xb + xc + xd */
+    pSrc[2U * i0] = (r1 + t1);
+    /* (xa + xc) - (xb + xd) */
+    r1 = r1 - t1;
+    /* yb + yd */
+    t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U);
+
+    /* ya' = ya + yb + yc + yd */
+    pSrc[(2U * i0) + 1U] = (s1 + t2);
+
+    /* (ya + yc) - (yb + yd) */
+    s1 = s1 - t2;
+
+    /* yb - yd */
+    t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);
+    /* xb - xd */
+    t2 = (pSrc[(2U * i1)] >> 4U) - (pSrc[(2U * i3)] >> 4U);
+
+    /*  index calculation for the coefficients */
+    ia2 = 2U * ia1;
+    co2 = pCoef[(ia2 * 2U)];
+    si2 = pCoef[(ia2 * 2U) + 1U];
+
+    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+    pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
+                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U;
+
+    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+    pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
+                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U;
+
+    /* (xa - xc) + (yb - yd) */
+    r1 = r2 + t1;
+    /* (xa - xc) - (yb - yd) */
+    r2 = r2 - t1;
+
+    /* (ya - yc) - (xb - xd) */
+    s1 = s2 - t2;
+    /* (ya - yc) + (xb - xd) */
+    s2 = s2 + t2;
+
+    co1 = pCoef[(ia1 * 2U)];
+    si1 = pCoef[(ia1 * 2U) + 1U];
+
+    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+    pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
+                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U;
+
+    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+    pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
+                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U;
+
+    /*  index calculation for the coefficients */
+    ia3 = 3U * ia1;
+    co3 = pCoef[(ia3 * 2U)];
+    si3 = pCoef[(ia3 * 2U) + 1U];
+
+    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+    pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
+                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U;
+
+    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+    pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
+                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U;
+
+    /*  Twiddle coefficients index modifier */
+    ia1 = ia1 + twidCoefModifier;
+
+    /*  Updating input index */
+    i0 = i0 + 1U;
+
+  } while (--j);
+
+  /* end of first stage process */
+
+  /* data is in 5.27(q27) format */
+
+
+  /* start of Middle stages process */
+
+
+  /* each stage in middle stages provides two down scaling of the input */
+
+  twidCoefModifier <<= 2U;
+
+
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
+  {
+    /*  Initializations for the first stage */
+    n1 = n2;
+    n2 >>= 2U;
+    ia1 = 0U;
+
+    /*  Calculation of first stage */
+    for (j = 0U; j <= (n2 - 1U); j++)
+    {
+      /*  index calculation for the coefficients */
+      ia2 = ia1 + ia1;
+      ia3 = ia2 + ia1;
+      co1 = pCoef[(ia1 * 2U)];
+      si1 = pCoef[(ia1 * 2U) + 1U];
+      co2 = pCoef[(ia2 * 2U)];
+      si2 = pCoef[(ia2 * 2U) + 1U];
+      co3 = pCoef[(ia3 * 2U)];
+      si3 = pCoef[(ia3 * 2U) + 1U];
+      /*  Twiddle coefficients index modifier */
+      ia1 = ia1 + twidCoefModifier;
+
+      for (i0 = j; i0 < fftLen; i0 += n1)
+      {
+        /*  index calculation for the input as, */
+        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
+        i1 = i0 + n2;
+        i2 = i1 + n2;
+        i3 = i2 + n2;
+
+        /*  Butterfly implementation */
+        /* xa + xc */
+        r1 = pSrc[2U * i0] + pSrc[2U * i2];
+        /* xa - xc */
+        r2 = pSrc[2U * i0] - pSrc[2U * i2];
+
+        /* ya + yc */
+        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
+        /* ya - yc */
+        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
+
+        /* xb + xd */
+        t1 = pSrc[2U * i1] + pSrc[2U * i3];
+
+        /* xa' = xa + xb + xc + xd */
+        pSrc[2U * i0] = (r1 + t1) >> 2U;
+        /* xa + xc -(xb + xd) */
+        r1 = r1 - t1;
+
+        /* yb + yd */
+        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
+        /* ya' = ya + yb + yc + yd */
+        pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U;
+
+        /* (ya + yc) - (yb + yd) */
+        s1 = s1 - t2;
+
+        /* (yb - yd) */
+        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
+        /* (xb - xd) */
+        t2 = pSrc[2U * i1] - pSrc[2U * i3];
+
+        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+        pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
+                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U;
+
+        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+        pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
+                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U;
+
+        /* (xa - xc) + (yb - yd) */
+        r1 = r2 + t1;
+        /* (xa - xc) - (yb - yd) */
+        r2 = r2 - t1;
+
+        /* (ya - yc) -  (xb - xd) */
+        s1 = s2 - t2;
+        /* (ya - yc) +  (xb - xd) */
+        s2 = s2 + t2;
+
+        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+        pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
+                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U;
+
+        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+        pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
+                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U;
+
+        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+        pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
+                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U;
+
+        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+        pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
+                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U;
+      }
+    }
+    twidCoefModifier <<= 2U;
+  }
+
+  /* End of Middle stages process */
+
+  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
+  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
+  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
+  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
+
+
+  /* start of Last stage process */
+  /*  Initializations for the last stage */
+  j = fftLen >> 2;
+  ptr1 = &pSrc[0];
+
+  /*  Calculations of last stage */
+  do
+  {
+    /* Read xa (real), ya(imag) input */
+    xa = *ptr1++;
+    ya = *ptr1++;
+
+    /* Read xb (real), yb(imag) input */
+    xb = *ptr1++;
+    yb = *ptr1++;
+
+    /* Read xc (real), yc(imag) input */
+    xc = *ptr1++;
+    yc = *ptr1++;
+
+    /* Read xc (real), yc(imag) input */
+    xd = *ptr1++;
+    yd = *ptr1++;
+
+    /* xa' = xa + xb + xc + xd */
+    xa_out = xa + xb + xc + xd;
+
+    /* ya' = ya + yb + yc + yd */
+    ya_out = ya + yb + yc + yd;
+
+    /* pointer updation for writing */
+    ptr1 = ptr1 - 8U;
+
+    /* writing xa' and ya' */
+    *ptr1++ = xa_out;
+    *ptr1++ = ya_out;
+
+    xc_out = (xa - xb + xc - xd);
+    yc_out = (ya - yb + yc - yd);
+
+    /* writing xc' and yc' */
+    *ptr1++ = xc_out;
+    *ptr1++ = yc_out;
+
+    xb_out = (xa + yb - xc - yd);
+    yb_out = (ya - xb - yc + xd);
+
+    /* writing xb' and yb' */
+    *ptr1++ = xb_out;
+    *ptr1++ = yb_out;
+
+    xd_out = (xa - yb - xc + yd);
+    yd_out = (ya + xb - yc - xd);
+
+    /* writing xd' and yd' */
+    *ptr1++ = xd_out;
+    *ptr1++ = yd_out;
+
+
+  } while (--j);
+
+  /* output is in 11.21(q21) format for the 1024 point */
+  /* output is in 9.23(q23) format for the 256 point */
+  /* output is in 7.25(q25) format for the 64 point */
+  /* output is in 5.27(q27) format for the 16 point */
+
+  /* End of last stage process */
+
+}
+
+
+/**
+  @brief         Core function for the Q31 CIFFT butterfly process.
+  @param[in,out] pSrc             points to the in-place buffer of Q31 data type.
+  @param[in]     fftLen           length of the FFT.
+  @param[in]     pCoef            points to twiddle coefficient buffer.
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
+ */
+
+/*
+ * Radix-4 IFFT algorithm used is :
+ *
+ * CIFFT uses same twiddle coefficients as CFFT Function
+ *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
+ *
+ *
+ * IFFT is implemented with following changes in equations from FFT
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 IFFT:
+ * Wn = co1 + j * (si1)
+ * W2n = co2 + j * (si2)
+ * W3n = co3 + j * (si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
+ * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
+ * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
+ * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
+ *
+ */
+
+void arm_radix4_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier)
+{
+        uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
+        q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+        q31_t xa, xb, xc, xd;
+        q31_t ya, yb, yc, yd;
+        q31_t xa_out, xb_out, xc_out, xd_out;
+        q31_t ya_out, yb_out, yc_out, yd_out;
+        
+        q31_t *ptr1;
+
+  /* input is be 1.31(q31) format for all FFT sizes */
+  /* Total process is divided into three stages */
+  /* process first stage, middle stages, & last stage */
+
+  /* Start of first stage process */
+
+  /* Initializations for the first stage */
+  n2 = fftLen;
+  n1 = n2;
+  /* n2 = fftLen/4 */
+  n2 >>= 2U;
+  i0 = 0U;
+  ia1 = 0U;
+
+  j = n2;
+
+  do
+  {
+    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
+
+    /*  index calculation for the input as, */
+    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
+    i1 = i0 + n2;
+    i2 = i1 + n2;
+    i3 = i2 + n2;
+
+    /*  Butterfly implementation */
+    /* xa + xc */
+    r1 = (pSrc[2U * i0] >> 4U) + (pSrc[2U * i2] >> 4U);
+    /* xa - xc */
+    r2 = (pSrc[2U * i0] >> 4U) - (pSrc[2U * i2] >> 4U);
+
+    /* xb + xd */
+    t1 = (pSrc[2U * i1] >> 4U) + (pSrc[2U * i3] >> 4U);
+
+    /* ya + yc */
+    s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);
+    /* ya - yc */
+    s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U);
+
+    /* xa' = xa + xb + xc + xd */
+    pSrc[2U * i0] = (r1 + t1);
+    /* (xa + xc) - (xb + xd) */
+    r1 = r1 - t1;
+    /* yb + yd */
+    t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U);
+    /* ya' = ya + yb + yc + yd */
+    pSrc[(2U * i0) + 1U] = (s1 + t2);
+
+    /* (ya + yc) - (yb + yd) */
+    s1 = s1 - t2;
+
+    /* yb - yd */
+    t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);
+    /* xb - xd */
+    t2 = (pSrc[2U * i1] >> 4U) - (pSrc[2U * i3] >> 4U);
+
+    /*  index calculation for the coefficients */
+    ia2 = 2U * ia1;
+    co2 = pCoef[ia2 * 2U];
+    si2 = pCoef[(ia2 * 2U) + 1U];
+
+    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+    pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
+                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U;
+
+    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+    pSrc[2U * i1 + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
+                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U;
+
+    /* (xa - xc) - (yb - yd) */
+    r1 = r2 - t1;
+    /* (xa - xc) + (yb - yd) */
+    r2 = r2 + t1;
+
+    /* (ya - yc) + (xb - xd) */
+    s1 = s2 + t2;
+    /* (ya - yc) - (xb - xd) */
+    s2 = s2 - t2;
+
+    co1 = pCoef[ia1 * 2U];
+    si1 = pCoef[(ia1 * 2U) + 1U];
+
+    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+    pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
+                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U;
+
+    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+    pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
+                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U;
+
+    /*  index calculation for the coefficients */
+    ia3 = 3U * ia1;
+    co3 = pCoef[ia3 * 2U];
+    si3 = pCoef[(ia3 * 2U) + 1U];
+
+    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+    pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
+                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U;
+
+    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+    pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
+                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U;
+
+    /*  Twiddle coefficients index modifier */
+    ia1 = ia1 + twidCoefModifier;
+
+    /*  Updating input index */
+    i0 = i0 + 1U;
+
+  } while (--j);
+
+  /* data is in 5.27(q27) format */
+  /* each stage provides two down scaling of the input */
+
+
+  /* Start of Middle stages process */
+
+  twidCoefModifier <<= 2U;
+
+  /*  Calculation of second stage to excluding last stage */
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
+  {
+    /*  Initializations for the first stage */
+    n1 = n2;
+    n2 >>= 2U;
+    ia1 = 0U;
+
+    for (j = 0; j <= (n2 - 1U); j++)
+    {
+      /*  index calculation for the coefficients */
+      ia2 = ia1 + ia1;
+      ia3 = ia2 + ia1;
+      co1 = pCoef[(ia1 * 2U)];
+      si1 = pCoef[(ia1 * 2U) + 1U];
+      co2 = pCoef[(ia2 * 2U)];
+      si2 = pCoef[(ia2 * 2U) + 1U];
+      co3 = pCoef[(ia3 * 2U)];
+      si3 = pCoef[(ia3 * 2U) + 1U];
+      /*  Twiddle coefficients index modifier */
+      ia1 = ia1 + twidCoefModifier;
+
+      for (i0 = j; i0 < fftLen; i0 += n1)
+      {
+        /*  index calculation for the input as, */
+        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
+        i1 = i0 + n2;
+        i2 = i1 + n2;
+        i3 = i2 + n2;
+
+        /*  Butterfly implementation */
+        /* xa + xc */
+        r1 = pSrc[2U * i0] + pSrc[2U * i2];
+        /* xa - xc */
+        r2 = pSrc[2U * i0] - pSrc[2U * i2];
+
+        /* ya + yc */
+        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
+        /* ya - yc */
+        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
+
+        /* xb + xd */
+        t1 = pSrc[2U * i1] + pSrc[2U * i3];
+
+        /* xa' = xa + xb + xc + xd */
+        pSrc[2U * i0] = (r1 + t1) >> 2U;
+        /* xa + xc -(xb + xd) */
+        r1 = r1 - t1;
+        /* yb + yd */
+        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
+        /* ya' = ya + yb + yc + yd */
+        pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U;
+
+        /* (ya + yc) - (yb + yd) */
+        s1 = s1 - t2;
+
+        /* (yb - yd) */
+        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
+        /* (xb - xd) */
+        t2 = pSrc[2U * i1] - pSrc[2U * i3];
+
+        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+        pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32U)) -
+                         ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U;
+
+        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+        pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32U)) +
+                                ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U;
+
+        /* (xa - xc) - (yb - yd) */
+        r1 = r2 - t1;
+        /* (xa - xc) + (yb - yd) */
+        r2 = r2 + t1;
+
+        /* (ya - yc) +  (xb - xd) */
+        s1 = s2 + t2;
+        /* (ya - yc) -  (xb - xd) */
+        s2 = s2 - t2;
+
+        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+        pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
+                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U;
+
+        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+        pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
+                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U;
+
+        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+        pSrc[(2U * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
+                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U;
+
+        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+        pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
+                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U;
+      }
+    }
+    twidCoefModifier <<= 2U;
+  }
+
+  /* End of Middle stages process */
+
+  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
+  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
+  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
+  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
+
+
+  /* Start of last stage process */
+
+
+  /*  Initializations for the last stage */
+  j = fftLen >> 2;
+  ptr1 = &pSrc[0];
+
+  /*  Calculations of last stage */
+  do
+  {
+    /* Read xa (real), ya(imag) input */
+    xa = *ptr1++;
+    ya = *ptr1++;
+
+    /* Read xb (real), yb(imag) input */
+    xb = *ptr1++;
+    yb = *ptr1++;
+
+    /* Read xc (real), yc(imag) input */
+    xc = *ptr1++;
+    yc = *ptr1++;
+
+    /* Read xc (real), yc(imag) input */
+    xd = *ptr1++;
+    yd = *ptr1++;
+
+    /* xa' = xa + xb + xc + xd */
+    xa_out = xa + xb + xc + xd;
+
+    /* ya' = ya + yb + yc + yd */
+    ya_out = ya + yb + yc + yd;
+
+    /* pointer updation for writing */
+    ptr1 = ptr1 - 8U;
+
+    /* writing xa' and ya' */
+    *ptr1++ = xa_out;
+    *ptr1++ = ya_out;
+
+    xc_out = (xa - xb + xc - xd);
+    yc_out = (ya - yb + yc - yd);
+
+    /* writing xc' and yc' */
+    *ptr1++ = xc_out;
+    *ptr1++ = yc_out;
+
+    xb_out = (xa - yb - xc + yd);
+    yb_out = (ya + xb - yc - xd);
+
+    /* writing xb' and yb' */
+    *ptr1++ = xb_out;
+    *ptr1++ = yb_out;
+
+    xd_out = (xa + yb - xc - yd);
+    yd_out = (ya - xb - yc + xd);
+
+    /* writing xd' and yd' */
+    *ptr1++ = xd_out;
+    *ptr1++ = yd_out;
+
+  } while (--j);
+
+  /* output is in 11.21(q21) format for the 1024 point */
+  /* output is in 9.23(q23) format for the 256 point */
+  /* output is in 7.25(q25) format for the 64 point */
+  /* output is in 5.27(q27) format for the 16 point */
+
+  /* End of last stage process */
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
new file mode 100644
index 00000000..ae749774
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
@@ -0,0 +1,285 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix8_f32.c
+ * Description:  Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+
+/* ----------------------------------------------------------------------
+ * Internal helper function used by the FFTs
+ * -------------------------------------------------------------------- */
+
+/**
+  brief         Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type.
+  param[in]     fftLen           length of the FFT.
+  param[in]     pCoef            points to the twiddle coefficient buffer.
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  return        none
+*/
+
+void arm_radix8_butterfly_f32(
+  float32_t * pSrc,
+  uint16_t fftLen,
+  const float32_t * pCoef,
+  uint16_t twidCoefModifier)
+{
+   uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
+   uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
+   uint32_t id;
+   uint32_t n1, n2, j;
+
+   float32_t r1, r2, r3, r4, r5, r6, r7, r8;
+   float32_t t1, t2;
+   float32_t s1, s2, s3, s4, s5, s6, s7, s8;
+   float32_t p1, p2, p3, p4;
+   float32_t co2, co3, co4, co5, co6, co7, co8;
+   float32_t si2, si3, si4, si5, si6, si7, si8;
+   const float32_t C81 = 0.70710678118f;
+
+   n2 = fftLen;
+
+   do
+   {
+      n1 = n2;
+      n2 = n2 >> 3;
+      i1 = 0;
+
+      do
+      {
+         i2 = i1 + n2;
+         i3 = i2 + n2;
+         i4 = i3 + n2;
+         i5 = i4 + n2;
+         i6 = i5 + n2;
+         i7 = i6 + n2;
+         i8 = i7 + n2;
+         r1 = pSrc[2 * i1] + pSrc[2 * i5];
+         r5 = pSrc[2 * i1] - pSrc[2 * i5];
+         r2 = pSrc[2 * i2] + pSrc[2 * i6];
+         r6 = pSrc[2 * i2] - pSrc[2 * i6];
+         r3 = pSrc[2 * i3] + pSrc[2 * i7];
+         r7 = pSrc[2 * i3] - pSrc[2 * i7];
+         r4 = pSrc[2 * i4] + pSrc[2 * i8];
+         r8 = pSrc[2 * i4] - pSrc[2 * i8];
+         t1 = r1 - r3;
+         r1 = r1 + r3;
+         r3 = r2 - r4;
+         r2 = r2 + r4;
+         pSrc[2 * i1] = r1 + r2;
+         pSrc[2 * i5] = r1 - r2;
+         r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
+         s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
+         r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
+         s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
+         s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
+         s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
+         r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
+         s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
+         t2 = r1 - s3;
+         r1 = r1 + s3;
+         s3 = r2 - r4;
+         r2 = r2 + r4;
+         pSrc[2 * i1 + 1] = r1 + r2;
+         pSrc[2 * i5 + 1] = r1 - r2;
+         pSrc[2 * i3]     = t1 + s3;
+         pSrc[2 * i7]     = t1 - s3;
+         pSrc[2 * i3 + 1] = t2 - r3;
+         pSrc[2 * i7 + 1] = t2 + r3;
+         r1 = (r6 - r8) * C81;
+         r6 = (r6 + r8) * C81;
+         r2 = (s6 - s8) * C81;
+         s6 = (s6 + s8) * C81;
+         t1 = r5 - r1;
+         r5 = r5 + r1;
+         r8 = r7 - r6;
+         r7 = r7 + r6;
+         t2 = s5 - r2;
+         s5 = s5 + r2;
+         s8 = s7 - s6;
+         s7 = s7 + s6;
+         pSrc[2 * i2]     = r5 + s7;
+         pSrc[2 * i8]     = r5 - s7;
+         pSrc[2 * i6]     = t1 + s8;
+         pSrc[2 * i4]     = t1 - s8;
+         pSrc[2 * i2 + 1] = s5 - r7;
+         pSrc[2 * i8 + 1] = s5 + r7;
+         pSrc[2 * i6 + 1] = t2 - r8;
+         pSrc[2 * i4 + 1] = t2 + r8;
+
+         i1 += n1;
+      } while (i1 < fftLen);
+
+      if (n2 < 8)
+         break;
+
+      ia1 = 0;
+      j = 1;
+
+      do
+      {
+         /*  index calculation for the coefficients */
+         id  = ia1 + twidCoefModifier;
+         ia1 = id;
+         ia2 = ia1 + id;
+         ia3 = ia2 + id;
+         ia4 = ia3 + id;
+         ia5 = ia4 + id;
+         ia6 = ia5 + id;
+         ia7 = ia6 + id;
+
+         co2 = pCoef[2 * ia1];
+         co3 = pCoef[2 * ia2];
+         co4 = pCoef[2 * ia3];
+         co5 = pCoef[2 * ia4];
+         co6 = pCoef[2 * ia5];
+         co7 = pCoef[2 * ia6];
+         co8 = pCoef[2 * ia7];
+         si2 = pCoef[2 * ia1 + 1];
+         si3 = pCoef[2 * ia2 + 1];
+         si4 = pCoef[2 * ia3 + 1];
+         si5 = pCoef[2 * ia4 + 1];
+         si6 = pCoef[2 * ia5 + 1];
+         si7 = pCoef[2 * ia6 + 1];
+         si8 = pCoef[2 * ia7 + 1];
+
+         i1 = j;
+
+         do
+         {
+            /*  index calculation for the input */
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+            i4 = i3 + n2;
+            i5 = i4 + n2;
+            i6 = i5 + n2;
+            i7 = i6 + n2;
+            i8 = i7 + n2;
+            r1 = pSrc[2 * i1] + pSrc[2 * i5];
+            r5 = pSrc[2 * i1] - pSrc[2 * i5];
+            r2 = pSrc[2 * i2] + pSrc[2 * i6];
+            r6 = pSrc[2 * i2] - pSrc[2 * i6];
+            r3 = pSrc[2 * i3] + pSrc[2 * i7];
+            r7 = pSrc[2 * i3] - pSrc[2 * i7];
+            r4 = pSrc[2 * i4] + pSrc[2 * i8];
+            r8 = pSrc[2 * i4] - pSrc[2 * i8];
+            t1 = r1 - r3;
+            r1 = r1 + r3;
+            r3 = r2 - r4;
+            r2 = r2 + r4;
+            pSrc[2 * i1] = r1 + r2;
+            r2 = r1 - r2;
+            s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
+            s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
+            s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
+            s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
+            s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
+            s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
+            s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
+            s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
+            t2 = s1 - s3;
+            s1 = s1 + s3;
+            s3 = s2 - s4;
+            s2 = s2 + s4;
+            r1 = t1 + s3;
+            t1 = t1 - s3;
+            pSrc[2 * i1 + 1] = s1 + s2;
+            s2 = s1 - s2;
+            s1 = t2 - r3;
+            t2 = t2 + r3;
+            p1 = co5 * r2;
+            p2 = si5 * s2;
+            p3 = co5 * s2;
+            p4 = si5 * r2;
+            pSrc[2 * i5]     = p1 + p2;
+            pSrc[2 * i5 + 1] = p3 - p4;
+            p1 = co3 * r1;
+            p2 = si3 * s1;
+            p3 = co3 * s1;
+            p4 = si3 * r1;
+            pSrc[2 * i3]     = p1 + p2;
+            pSrc[2 * i3 + 1] = p3 - p4;
+            p1 = co7 * t1;
+            p2 = si7 * t2;
+            p3 = co7 * t2;
+            p4 = si7 * t1;
+            pSrc[2 * i7]     = p1 + p2;
+            pSrc[2 * i7 + 1] = p3 - p4;
+            r1 = (r6 - r8) * C81;
+            r6 = (r6 + r8) * C81;
+            s1 = (s6 - s8) * C81;
+            s6 = (s6 + s8) * C81;
+            t1 = r5 - r1;
+            r5 = r5 + r1;
+            r8 = r7 - r6;
+            r7 = r7 + r6;
+            t2 = s5 - s1;
+            s5 = s5 + s1;
+            s8 = s7 - s6;
+            s7 = s7 + s6;
+            r1 = r5 + s7;
+            r5 = r5 - s7;
+            r6 = t1 + s8;
+            t1 = t1 - s8;
+            s1 = s5 - r7;
+            s5 = s5 + r7;
+            s6 = t2 - r8;
+            t2 = t2 + r8;
+            p1 = co2 * r1;
+            p2 = si2 * s1;
+            p3 = co2 * s1;
+            p4 = si2 * r1;
+            pSrc[2 * i2]     = p1 + p2;
+            pSrc[2 * i2 + 1] = p3 - p4;
+            p1 = co8 * r5;
+            p2 = si8 * s5;
+            p3 = co8 * s5;
+            p4 = si8 * r5;
+            pSrc[2 * i8]     = p1 + p2;
+            pSrc[2 * i8 + 1] = p3 - p4;
+            p1 = co6 * r6;
+            p2 = si6 * s6;
+            p3 = co6 * s6;
+            p4 = si6 * r6;
+            pSrc[2 * i6]     = p1 + p2;
+            pSrc[2 * i6 + 1] = p3 - p4;
+            p1 = co4 * t1;
+            p2 = si4 * t2;
+            p3 = co4 * t2;
+            p4 = si4 * t1;
+            pSrc[2 * i4]     = p1 + p2;
+            pSrc[2 * i4 + 1] = p3 - p4;
+
+            i1 += n1;
+         } while (i1 < fftLen);
+
+         j++;
+      } while (j < n2);
+
+      twidCoefModifier <<= 3;
+   } while (n2 > 7);
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c
new file mode 100644
index 00000000..729ebf1d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c
@@ -0,0 +1,448 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_f32.c
+ * Description:  Processing function of DCT4 & IDCT4 F32
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @defgroup DCT4_IDCT4 DCT Type IV Functions
+
+  Representation of signals by minimum number of values is important for storage and transmission.
+  The possibility of large discontinuity between the beginning and end of a period of a signal
+  in DFT can be avoided by extending the signal so that it is even-symmetric.
+  Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the
+  spectrum and is very widely used in signal and image coding applications.
+  The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.
+  DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.
+  
+  DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.
+  Reordering of the input data makes the computation of DCT just a problem of
+  computing the DFT of a real signal with a few additional operations.
+  This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.
+  
+  DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.
+  DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.
+  DCT2 implementation can be described in the following steps:
+  - Re-ordering input
+  - Calculating Real FFT
+  - Multiplication of weights and Real FFT output and getting real part from the product.
+  
+  This process is explained by the block diagram below:
+  \image html DCT4.gif "Discrete Cosine Transform - type-IV"
+ 
+  @par           Algorithm
+                   The N-point type-IV DCT is defined as a real, linear transformation by the formula:
+                   \image html DCT4Equation.gif
+                   where k = 0, 1, 2, ..., N-1
+  @par
+                   Its inverse is defined as follows:
+                   \image html IDCT4Equation.gif
+                   where n = 0, 1, 2, ..., N-1
+  @par
+                   The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).
+                   The symmetry of the transform matrix indicates that the fast algorithms for the forward
+                   and inverse transform computation are identical.
+                   Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
+ 
+  @par           Lengths supported by the transform:
+                   As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192.
+                   The library provides separate functions for Q15, Q31, and floating-point data types.
+
+  @par           Instance Structure
+                   The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.
+                   A separate instance structure must be defined for each transform.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+                 
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Initializes Real FFT as its process function is used internally in DCT4, by calling \ref arm_rfft_init_f32().
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Manually initialize the instance structure as follows:
+  
+      arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+      arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+      arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+  

+                   where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;
+                   \c normalize is normalizing factor used and is equal to sqrt(2/N);
+                   \c pTwiddle points to the twiddle factor table;
+                   \c pCosFactor points to the cosFactor table;
+                   \c pRfft points to the real FFT instance;
+                   \c pCfft points to the complex FFT instance;
+                   The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()
+                   and arm_rfft_f32() respectively for details regarding static initialization.
+ 
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the DCT4 transform functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+ /**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point DCT4/IDCT4.
+  @param[in]     S             points to an instance of the floating-point DCT4/IDCT4 structure
+  @param[in]     pState        points to state buffer
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer
+  @return        none
+ */
+
+void arm_dct4_f32(
+  const arm_dct4_instance_f32 * S,
+        float32_t * pState,
+        float32_t * pInlineBuffer)
+{
+  const float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
+  const float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
+        float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
+        float32_t in;                                  /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
+
+
+  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
+   * along with some pre-processing and post-processing.
+   * Computational procedure is explained as follows:
+   * (a) Pre-processing involves multiplying input with cos factor,
+   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
+   *              where,
+   *                 r(n) -- output of preprocessing
+   *                 u(n) -- input to preprocessing(actual Source buffer)
+   * (b) Calculation of DCT2 using FFT is divided into three steps:
+   *                  Step1: Re-ordering of even and odd elements of input.
+   *                  Step2: Calculating FFT of the re-ordered input.
+   *                  Step3: Taking the real part of the product of FFT output and weights.
+   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
+   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *                        where,
+   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
+   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
+   */
+
+  /*-------- Pre-processing ------------*/
+  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
+  arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
+  arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
+
+  /* ----------------------------------------------------------------
+   * Step1: Re-ordering of even and odd elements as
+   *             pState[i] =  pInlineBuffer[2*i] and
+   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
+   ---------------------------------------------------------------------*/
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
+  pS2 = pState + (S->N - 1U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
+  i = S->Nby2 >> 2U;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  do
+  {
+    /* Re-ordering of even and odd elements */
+    /* pState[i] =  pInlineBuffer[2*i] */
+    *pS1++ = *pbuff++;
+    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
+  i = S->N >> 2U;
+
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.
+   * Compute 4 outputs at a time */
+  do
+  {
+    /* Writing the re-ordered output back to inplace input buffer */
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
+   * ---------------------------------------------------------- */
+  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
+  arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
+
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
+
+  /* ----------- Post-processing ---------- */
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *       Hence, Y4(0) = Y2(0)/2  */
+  /* Getting only real part from the output and Converting to DCT-IV */
+
+  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
+  i = (S->N - 1U) >> 2U;
+
+  /* pbuff initialized to input buffer. */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
+  in = *pS1++ * (float32_t) 0.5;
+  /* input buffer acts as inplace, so output values are stored in the input itself. */
+  *pbuff++ = in;
+
+  /* pState pointer is incremented twice as the real values are located alternatively in the array */
+  pS1++;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  do
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    /* points to the next real value */
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  i = (S->N - 1U) % 0x4U;
+
+  while (i > 0U)
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+
+    /* points to the next real value */
+    pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  }
+
+
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+
+  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
+  i = S->N >> 2U;
+
+  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  pbuff = pInlineBuffer;
+
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
+  do
+  {
+    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+#else
+
+  /* Initializing the loop counter to N/2 */
+  i = S->Nby2;
+
+  do
+  {
+    /* Re-ordering of even and odd elements */
+    /* pState[i] =  pInlineBuffer[2*i] */
+    *pS1++ = *pbuff++;
+    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
+    *pS2-- = *pbuff++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Initializing the loop counter */
+  i = S->N;
+
+  do
+  {
+    /* Writing the re-ordered output back to inplace input buffer */
+    *pbuff++ = *pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
+   * ---------------------------------------------------------- */
+  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
+  arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
+
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
+
+  /* ----------- Post-processing ---------- */
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *       Hence, Y4(0) = Y2(0)/2  */
+  /* Getting only real part from the output and Converting to DCT-IV */
+
+  /* pbuff initialized to input buffer. */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
+  in = *pS1++ * (float32_t) 0.5;
+  /* input buffer acts as inplace, so output values are stored in the input itself. */
+  *pbuff++ = in;
+
+  /* pState pointer is incremented twice as the real values are located alternatively in the array */
+  pS1++;
+
+  /* Initializing the loop counter */
+  i = (S->N - 1U);
+
+  do
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+
+    /* points to the next real value */
+    pS1++;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+
+  /* Initializing loop counter */
+  i = S->N;
+
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
+  pbuff = pInlineBuffer;
+
+  do
+  {
+    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
new file mode 100644
index 00000000..7522454b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
@@ -0,0 +1,131 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_init_f32.c
+ * Description:  Initialization function of DCT-4 & IDCT4 F32
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup DCT4_IDCT4
+ */
+
+
+/**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point DCT4/IDCT4.
+  @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure
+  @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure
+  @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure
+  @param[in]     N			length of the DCT4
+  @param[in]     Nby2       half of the length of the DCT4
+  @param[in]     normalize  normalizing factor.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform length
+
+  @par           Normalizing factor
+                   The normalizing factor is sqrt(2/N), which depends on the size of transform N.
+                   Floating-point normalizing factors are mentioned in the table below for different DCT sizes:
+
+                   \image html dct4NormalizingF32Table.gif
+ */
+
+arm_status arm_dct4_init_f32(
+  arm_dct4_instance_f32 * S,
+  arm_rfft_instance_f32 * S_RFFT,
+  arm_cfft_radix4_instance_f32 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  float32_t normalize)
+{
+  /* Initialize the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+
+  /* Initialize the DCT4 length */
+  S->N = N;
+
+  /* Initialize the half of DCT4 length */
+  S->Nby2 = Nby2;
+
+  /* Initialize the DCT4 Normalizing factor */
+  S->normalize = normalize;
+
+  /* Initialize Real FFT Instance */
+  S->pRfft = S_RFFT;
+
+  /* Initialize Complex FFT Instance */
+  S->pCfft = S_CFFT;
+
+  switch (N)
+  {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
+    /* Initialize the table modifier values */
+  case 8192U:
+    S->pTwiddle = Weights_8192;
+    S->pCosFactor = cos_factors_8192;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
+  case 2048U:
+    S->pTwiddle = Weights_2048;
+    S->pCosFactor = cos_factors_2048;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
+  case 512U:
+    S->pTwiddle = Weights_512;
+    S->pCosFactor = cos_factors_512;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
+  case 128U:
+    S->pTwiddle = Weights_128;
+    S->pCosFactor = cos_factors_128;
+    break;
+  #endif
+  default:
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+
+  /* Initialize the RFFT/RIFFT Function */
+  arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U);
+
+  /* return the status of DCT4 Init function */
+  return (status);
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
new file mode 100644
index 00000000..c5d834ac
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
@@ -0,0 +1,130 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_init_q15.c
+ * Description:  Initialization function of DCT-4 & IDCT4 Q15
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup DCT4_IDCT4
+ */
+
+/**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 DCT4/IDCT4.
+  @param[in,out] S         points to an instance of Q15 DCT4/IDCT4 structure
+  @param[in]     S_RFFT    points to an instance of Q15 RFFT/RIFFT structure
+  @param[in]     S_CFFT    points to an instance of Q15 CFFT/CIFFT structure
+  @param[in]     N          length of the DCT4
+  @param[in]     Nby2       half of the length of the DCT4
+  @param[in]     normalize  normalizing factor
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform length
+
+  @par           Normalizing factor
+                   The normalizing factor is sqrt(2/N), which depends on the size of transform N.
+                   Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:
+
+                   \image html dct4NormalizingQ15Table.gif
+ */
+
+arm_status arm_dct4_init_q15(
+  arm_dct4_instance_q15 * S,
+  arm_rfft_instance_q15 * S_RFFT,
+  arm_cfft_radix4_instance_q15 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  q15_t normalize)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /* Initialize the DCT4 length */
+  S->N = N;
+
+  /* Initialize the half of DCT4 length */
+  S->Nby2 = Nby2;
+
+  /* Initialize the DCT4 Normalizing factor */
+  S->normalize = normalize;
+
+  /* Initialize Real FFT Instance */
+  S->pRfft = S_RFFT;
+
+  /* Initialize Complex FFT Instance */
+  S->pCfft = S_CFFT;
+
+  switch (N)
+  {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
+    /* Initialize the table modifier values */
+  case 8192U:
+    S->pTwiddle = WeightsQ15_8192;
+    S->pCosFactor = cos_factorsQ15_8192;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
+  case 2048U:
+    S->pTwiddle = WeightsQ15_2048;
+    S->pCosFactor = cos_factorsQ15_2048;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
+  case 512U:
+    S->pTwiddle = WeightsQ15_512;
+    S->pCosFactor = cos_factorsQ15_512;
+    break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
+  case 128U:
+    S->pTwiddle = WeightsQ15_128;
+    S->pCosFactor = cos_factorsQ15_128;
+    break;
+  #endif 
+
+  default:
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+
+  /* Initialize the RFFT/RIFFT */
+  arm_rfft_init_q15(S->pRfft, S->N, 0U, 1U);
+
+  /* return the status of DCT4 Init function */
+  return (status);
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
new file mode 100644
index 00000000..c0294d78
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
@@ -0,0 +1,130 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_init_q31.c
+ * Description:  Initialization function of DCT-4 & IDCT4 Q31
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup DCT4_IDCT4
+ */
+
+
+/**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief  Initialization function for the Q31 DCT4/IDCT4.
+  @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
+  @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
+  @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
+  @param[in]     N          length of the DCT4.
+  @param[in]     Nby2       half of the length of the DCT4.
+  @param[in]     normalize  normalizing factor.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : N is not a supported transform length
+
+  @par           Normalizing factor:
+                   The normalizing factor is sqrt(2/N), which depends on the size of transform N.
+                   Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:
+
+                   \image html dct4NormalizingQ31Table.gif
+ */
+
+arm_status arm_dct4_init_q31(
+  arm_dct4_instance_q31 * S,
+  arm_rfft_instance_q31 * S_RFFT,
+  arm_cfft_radix4_instance_q31 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  q31_t normalize)
+{
+  /* Initialize the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /* Initialize the DCT4 length */
+  S->N = N;
+
+  /* Initialize the half of DCT4 length */
+  S->Nby2 = Nby2;
+
+  /* Initialize the DCT4 Normalizing factor */
+  S->normalize = normalize;
+
+  /* Initialize Real FFT Instance */
+  S->pRfft = S_RFFT;
+
+  /* Initialize Complex FFT Instance */
+  S->pCfft = S_CFFT;
+
+  switch (N)
+  {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
+    /* Initialize the table modifier values */
+  case 8192U:
+    S->pTwiddle = WeightsQ31_8192;
+    S->pCosFactor = cos_factorsQ31_8192;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
+  case 2048U:
+    S->pTwiddle = WeightsQ31_2048;
+    S->pCosFactor = cos_factorsQ31_2048;
+    break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
+  case 512U:
+    S->pTwiddle = WeightsQ31_512;
+    S->pCosFactor = cos_factorsQ31_512;
+    break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
+  case 128U:
+    S->pTwiddle = WeightsQ31_128;
+    S->pCosFactor = cos_factorsQ31_128;
+    break;
+  #endif
+  default:
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+
+  /* Initialize the RFFT/RIFFT Function */
+  arm_rfft_init_q31(S->pRfft,  S->N, 0U, 1U);
+
+  /* return the status of DCT4 Init function */
+  return (status);
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
similarity index 50%
rename from Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c
rename to Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
index b6b3712c..ba263004 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
@@ -1,125 +1,111 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_q15.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 Q15.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_q15.c
+ * Description:  Processing function of DCT4 & IDCT4 Q15
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
+/**
+  @addtogroup DCT4_IDCT4
+  @{
  */
 
-/**    
- * @brief Processing function for the Q15 DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the Q15 DCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- *     
- * \par Input an output formats:    
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.    
- * Number of bits downscaled, depends on the size of the transform.    
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:     
- *    
- * \image html dct4FormatsQ15Table.gif    
+/**
+  @brief         Processing function for the Q15 DCT4/IDCT4.
+  @param[in]     S             points to an instance of the Q15 DCT4 structure.
+  @param[in]     pState        points to state buffer.
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+  @return        none
+ 
+  @par           Input an output formats
+                   Internally inputs are downscaled in the RFFT process function to avoid overflows.
+                   Number of bits downscaled, depends on the size of the transform. The input and output
+                   formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
+
+                   \image html dct4FormatsQ15Table.gif
  */
 
 void arm_dct4_q15(
   const arm_dct4_instance_q15 * S,
-  q15_t * pState,
-  q15_t * pInlineBuffer)
+        q15_t * pState,
+        q15_t * pInlineBuffer)
 {
-  uint32_t i;                                    /* Loop counter */
-  q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-  q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-  q15_t in;                                      /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
+  const q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
+  const q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
+        q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
+        q15_t in;                                      /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
+
+
+  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
+   * along with some pre-processing and post-processing.
+   * Computational procedure is explained as follows:
+   * (a) Pre-processing involves multiplying input with cos factor,
+   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
+   *              where,
+   *                 r(n) -- output of preprocessing
+   *                 u(n) -- input to preprocessing(actual Source buffer)
+   * (b) Calculation of DCT2 using FFT is divided into three steps:
+   *                  Step1: Re-ordering of even and odd elements of input.
+   *                  Step2: Calculating FFT of the re-ordered input.
+   *                  Step3: Taking the real part of the product of FFT output and weights.
+   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
+   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *                        where,
+   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
+   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
    */
 
-        /*-------- Pre-processing ------------*/
+  /*-------- Pre-processing ------------*/
   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q15(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q15(pInlineBuffer, 1, pInlineBuffer, S->N);
+  arm_mult_q15 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
+  arm_shift_q15 (pInlineBuffer, 1, pInlineBuffer, S->N);
 
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
+  /* ----------------------------------------------------------------
+   * Step1: Re-ordering of even and odd elements as
+   *             pState[i] =  pInlineBuffer[2*i] and
+   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
    ---------------------------------------------------------------------*/
 
   /* pS1 initialized to pState */
   pS1 = pState;
 
   /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
+  pS2 = pState + (S->N - 1U);
 
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
 
 
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = (uint32_t) S->Nby2 >> 2u;
+  i = S->Nby2 >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   do
   {
@@ -138,9 +124,9 @@ void arm_dct4_q15(
     *pS1++ = *pbuff++;
     *pS2-- = *pbuff++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
@@ -149,9 +135,9 @@ void arm_dct4_q15(
   pS1 = pState;
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
+  i = S->N >> 2U;
 
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.
    * Compute 4 outputs at a time */
   do
   {
@@ -163,32 +149,32 @@ void arm_dct4_q15(
 
     /* Decrement the loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
 
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
 
- /*----------------------------------------------------------------------    
-  *  Step3: Multiply the FFT output with the weights.    
-  *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
 
-  /* The output of complex multiplication is in 3.13 format.    
+  /* The output of complex multiplication is in 3.13 format.
    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15(pState, 2, pState, S->N * 2);
+  arm_shift_q15 (pState, 2, pState, S->N * 2);
 
   /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
    *       Hence, Y4(0) = Y2(0)/2  */
   /* Getting only real part from the output and Converting to DCT-IV */
 
   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = ((uint32_t) S->N - 1u) >> 2u;
+  i = (S->N - 1U) >> 2U;
 
   /* pbuff initialized to input buffer. */
   pbuff = pInlineBuffer;
@@ -197,14 +183,14 @@ void arm_dct4_q15(
   pS1 = pState;
 
   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
+  in = *pS1++ >> 1U;
   /* input buffer acts as inplace, so output values are stored in the input itself. */
   *pbuff++ = in;
 
   /* pState pointer is incremented twice as the real values are located alternatively in the array */
   pS1++;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   do
   {
@@ -229,30 +215,31 @@ void arm_dct4_q15(
 
     /* Decrement the loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  i = ((uint32_t) S->N - 1u) % 0x4u;
+  i = (S->N - 1U) % 0x4U;
 
-  while(i > 0u)
+  while (i > 0U)
   {
     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
 
-   /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
+  i = S->N >> 2U;
 
   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
   pbuff = pInlineBuffer;
@@ -273,17 +260,15 @@ void arm_dct4_q15(
     in = *pbuff;
     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initializing the loop counter to N/2 */
-  i = (uint32_t) S->Nby2;
+  i = S->Nby2;
 
   do
   {
@@ -295,7 +280,7 @@ void arm_dct4_q15(
 
     /* Decrement the loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
@@ -304,7 +289,7 @@ void arm_dct4_q15(
   pS1 = pState;
 
   /* Initializing the loop counter */
-  i = (uint32_t) S->N;
+  i = S->N;
 
   do
   {
@@ -313,33 +298,30 @@ void arm_dct4_q15(
 
     /* Decrement the loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
 
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
 
- /*----------------------------------------------------------------------    
-  *  Step3: Multiply the FFT output with the weights.    
-  *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15(pState, weights, pState, S->N);
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
 
-  /* The output of complex multiplication is in 3.13 format.    
+  /* The output of complex multiplication is in 3.13 format.
    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15(pState, 2, pState, S->N * 2);
+  arm_shift_q15 (pState, 2, pState, S->N * 2);
 
   /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
    *       Hence, Y4(0) = Y2(0)/2  */
   /* Getting only real part from the output and Converting to DCT-IV */
 
-  /* Initializing the loop counter */
-  i = ((uint32_t) S->N - 1u);
-
   /* pbuff initialized to input buffer. */
   pbuff = pInlineBuffer;
 
@@ -347,32 +329,36 @@ void arm_dct4_q15(
   pS1 = pState;
 
   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
+  in = *pS1++ >> 1U;
   /* input buffer acts as inplace, so output values are stored in the input itself. */
   *pbuff++ = in;
 
   /* pState pointer is incremented twice as the real values are located alternatively in the array */
   pS1++;
 
+  /* Initializing the loop counter */
+  i = (S->N - 1U);
+
   do
   {
     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
-   /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
+  /* Initializing loop counter */
+  i = S->N;
 
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
   pbuff = pInlineBuffer;
 
   do
@@ -381,14 +367,15 @@ void arm_dct4_q15(
     in = *pbuff;
     *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
-  } while(i > 0u);
 
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+  } while (i > 0U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
 }
 
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
similarity index 52%
rename from Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c
rename to Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
index 6f2c2b37..5757083f 100644
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
@@ -1,125 +1,114 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_q31.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 Q31.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_q31.c
+ * Description:  Processing function of DCT4 & IDCT4 Q31
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
 
 #include "arm_math.h"
 
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
+/**
+  @addtogroup DCT4_IDCT4
+  @{
  */
 
-/**    
- * @brief Processing function for the Q31 DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the Q31 DCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- * \par Input an output formats:    
- * Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,    
- * as the conversion from DCT2 to DCT4 involves one subtraction.    
- * Internally inputs are downscaled in the RFFT process function to avoid overflows.    
- * Number of bits downscaled, depends on the size of the transform.    
- * The input and output formats for different DCT sizes and number of bits to upscale are mentioned in the table below:     
- *    
- * \image html dct4FormatsQ31Table.gif    
+/**
+  @brief         Processing function for the Q31 DCT4/IDCT4.
+  @param[in]     S             points to an instance of the Q31 DCT4 structure.
+  @param[in]     pState        points to state buffer.
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+  @return        none
+
+  @par           Input an output formats
+                   Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,
+                   as the conversion from DCT2 to DCT4 involves one subtraction.
+                   Internally inputs are downscaled in the RFFT process function to avoid overflows.
+                   Number of bits downscaled, depends on the size of the transform.
+                   The input and output formats for different DCT sizes and number of bits to upscale are
+                   mentioned in the table below:
+
+                   \image html dct4FormatsQ31Table.gif
  */
 
 void arm_dct4_q31(
   const arm_dct4_instance_q31 * S,
-  q31_t * pState,
-  q31_t * pInlineBuffer)
+        q31_t * pState,
+        q31_t * pInlineBuffer)
 {
-  uint16_t i;                                    /* Loop counter */
-  q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-  q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-  q31_t in;                                      /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
+  const q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
+  const q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
+        q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
+        q31_t in;                                      /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
+
+
+  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
+   * along with some pre-processing and post-processing.
+   * Computational procedure is explained as follows:
+   * (a) Pre-processing involves multiplying input with cos factor,
+   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
+   *              where,
+   *                 r(n) -- output of preprocessing
+   *                 u(n) -- input to preprocessing(actual Source buffer)
+   * (b) Calculation of DCT2 using FFT is divided into three steps:
+   *                  Step1: Re-ordering of even and odd elements of input.
+   *                  Step2: Calculating FFT of the re-ordered input.
+   *                  Step3: Taking the real part of the product of FFT output and weights.
+   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
+   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *                        where,
+   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
+   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
    */
 
-        /*-------- Pre-processing ------------*/
+  /*-------- Pre-processing ------------*/
   /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q31(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q31(pInlineBuffer, 1, pInlineBuffer, S->N);
+  arm_mult_q31 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
+  arm_shift_q31 (pInlineBuffer, 1, pInlineBuffer, S->N);
 
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
+  /* ----------------------------------------------------------------
+   * Step1: Re-ordering of even and odd elements as
+   *             pState[i] =  pInlineBuffer[2*i] and
+   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
    ---------------------------------------------------------------------*/
 
   /* pS1 initialized to pState */
   pS1 = pState;
 
   /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
+  pS2 = pState + (S->N - 1U);
 
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
 
-#ifndef ARM_MATH_CM0_FAMILY
 
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
+#if defined (ARM_MATH_LOOPUNROLL)
 
   /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = S->Nby2 >> 2u;
+  i = S->Nby2 >> 2U;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   do
   {
@@ -138,9 +127,9 @@ void arm_dct4_q31(
     *pS1++ = *pbuff++;
     *pS2-- = *pbuff++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
@@ -149,9 +138,9 @@ void arm_dct4_q31(
   pS1 = pState;
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2u;
+  i = S->N >> 2U;
 
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.
    * Compute 4 outputs at a time */
   do
   {
@@ -163,32 +152,32 @@ void arm_dct4_q31(
 
     /* Decrement the loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
 
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
 
-  /*----------------------------------------------------------------------    
-   *  Step3: Multiply the FFT output with the weights.    
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
    *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
+  arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
 
-  /* The output of complex multiplication is in 3.29 format.    
+  /* The output of complex multiplication is in 3.29 format.
    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
-  arm_shift_q31(pState, 2, pState, S->N * 2);
+  arm_shift_q31 (pState, 2, pState, S->N * 2);
 
   /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
    *       Hence, Y4(0) = Y2(0)/2  */
   /* Getting only real part from the output and Converting to DCT-IV */
 
   /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = (S->N - 1u) >> 2u;
+  i = (S->N - 1U) >> 2U;
 
   /* pbuff initialized to input buffer. */
   pbuff = pInlineBuffer;
@@ -197,14 +186,14 @@ void arm_dct4_q31(
   pS1 = pState;
 
   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
+  in = *pS1++ >> 1U;
   /* input buffer acts as inplace, so output values are stored in the input itself. */
   *pbuff++ = in;
 
   /* pState pointer is incremented twice as the real values are located alternatively in the array */
   pS1++;
 
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
    ** a second loop below computes the remaining 1 to 3 samples. */
   do
   {
@@ -229,30 +218,31 @@ void arm_dct4_q31(
 
     /* Decrement the loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
    ** No loop unrolling is used. */
-  i = (S->N - 1u) % 0x4u;
+  i = (S->N - 1U) % 0x4U;
 
-  while(i > 0u)
+  while (i > 0U)
   {
     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
 
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
   /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2u;
+  i = S->N >> 2U;
 
   /* pbuff initialized to the pInlineBuffer(now contains the output values) */
   pbuff = pInlineBuffer;
@@ -273,15 +263,13 @@ void arm_dct4_q31(
     in = *pbuff;
     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
 
 #else
 
-  /* Run the below code for Cortex-M0 */
-
   /* Initializing the loop counter to N/2 */
   i = S->Nby2;
 
@@ -295,7 +283,7 @@ void arm_dct4_q31(
 
     /* Decrement the loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
   /* pbuff initialized to input buffer */
   pbuff = pInlineBuffer;
@@ -313,27 +301,27 @@ void arm_dct4_q31(
 
     /* Decrement the loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
 
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
    * ---------------------------------------------------------- */
   /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31(S->pRfft, pInlineBuffer, pState);
+  arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
 
-  /*----------------------------------------------------------------------    
-   *  Step3: Multiply the FFT output with the weights.    
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
    *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31(pState, weights, pState, S->N);
+  arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
 
-  /* The output of complex multiplication is in 3.29 format.    
+  /* The output of complex multiplication is in 3.29 format.
    * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
   arm_shift_q31(pState, 2, pState, S->N * 2);
 
   /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
    *       Hence, Y4(0) = Y2(0)/2  */
   /* Getting only real part from the output and Converting to DCT-IV */
 
@@ -344,7 +332,7 @@ void arm_dct4_q31(
   pS1 = pState;
 
   /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1u;
+  in = *pS1++ >> 1U;
   /* input buffer acts as inplace, so output values are stored in the input itself. */
   *pbuff++ = in;
 
@@ -352,28 +340,28 @@ void arm_dct4_q31(
   pS1++;
 
   /* Initializing the loop counter */
-  i = (S->N - 1u);
+  i = (S->N - 1U);
 
-  while(i > 0u)
+  while (i > 0U)
   {
     /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
     /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
     in = *pS1++ - in;
     *pbuff++ = in;
+
     /* points to the next real value */
     pS1++;
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
   }
 
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
 
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
+  /* Initializing loop counter */
   i = S->N;
 
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
   pbuff = pInlineBuffer;
 
   do
@@ -382,14 +370,14 @@ void arm_dct4_q31(
     in = *pbuff;
     *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
 
-    /* Decrement the loop counter */
+    /* Decrement loop counter */
     i--;
-  } while(i > 0u);
+  } while (i > 0U);
 
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
 
 }
 
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c
new file mode 100644
index 00000000..2ad336d9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c
@@ -0,0 +1,309 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_f32.c
+ * Description:  RFFT & RIFFT Floating point process function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/* ----------------------------------------------------------------------
+ * Internal functions prototypes
+ * -------------------------------------------------------------------- */
+
+extern void arm_radix4_butterfly_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
+
+extern void arm_radix4_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
+
+extern void arm_bitreversal_f32(
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+void arm_split_rfft_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier);
+
+void arm_split_rifft_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point RFFT/RIFFT.
+  @deprecated    Do not use this function.  It has been superceded by \ref arm_rfft_fast_f32 and will be removed in the future.
+  @param[in]     S    points to an instance of the floating-point RFFT/RIFFT structure
+  @param[in]     pSrc points to the input buffer
+  @param[out]    pDst points to the output buffer
+  @return        none
+ */
+
+void arm_rfft_f32(
+  const arm_rfft_instance_f32 * S,
+        float32_t * pSrc,
+        float32_t * pDst)
+{
+  const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
+
+  /* Calculation of Real IFFT of input */
+  if (S->ifftFlagR == 1U)
+  {
+     /*  Real IFFT core process */
+     arm_split_rifft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+
+
+     /* Complex radix-4 IFFT process */
+     arm_radix4_butterfly_inverse_f32 (pDst, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier, S_CFFT->onebyfftLen);
+
+    /* Bit reversal process */
+    if (S->bitReverseFlagR == 1U)
+    {
+      arm_bitreversal_f32 (pDst, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
+    }
+  }
+  else
+  {
+    /* Calculation of RFFT of input */
+
+    /* Complex radix-4 FFT process */
+    arm_radix4_butterfly_f32 (pSrc, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
+
+    /* Bit reversal process */
+    if (S->bitReverseFlagR == 1U)
+    {
+      arm_bitreversal_f32 (pSrc, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
+    }
+
+    /*  Real FFT core process */
+    arm_split_rfft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  }
+
+}
+
+/**
+  @} end of RealFFT group
+ */
+
+/**
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+void arm_split_rfft_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier)
+{
+        uint32_t i;                                    /* Loop Counter */
+        float32_t outR, outI;                          /* Temporary variables for output */
+  const float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
+        float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
+        float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U];      /* temp pointers for output buffer */
+        float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U];      /* temp pointers for input buffer */
+
+  /* Init coefficient pointers */
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
+
+  i = fftLen - 1U;
+
+  while (i > 0U)
+  {
+     /*
+       outR = (  pSrc[2 * i]             * pATable[2 * i]
+               - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+               + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+               + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               + pIn[2 * i]             * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
+
+    /* read pATable[2 * i] */
+    CoefA1 = *pCoefA++;
+    /* pATable[2 * i + 1] */
+    CoefA2 = *pCoefA;
+
+    /* pSrc[2 * i] * pATable[2 * i] */
+    outR = *pSrc1 * CoefA1;
+    /* pSrc[2 * i] * CoefA2 */
+    outI = *pSrc1++ * CoefA2;
+
+    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
+    outR -= (*pSrc1 + *pSrc2) * CoefA2;
+    /* pSrc[2 * i + 1] * CoefA1 */
+    outI += *pSrc1++ * CoefA1;
+
+    CoefB1 = *pCoefB;
+
+    /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
+    outI -= *pSrc2-- * CoefB1;
+    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
+    outI -= *pSrc2 * CoefA2;
+
+    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
+    outR += *pSrc2-- * CoefB1;
+
+    /* write output */
+    *pDst1++ = outR;
+    *pDst1++ = outI;
+
+    /* write complex conjugate output */
+    *pDst2-- = -outI;
+    *pDst2-- = outR;
+
+    /* update coefficient pointer */
+    pCoefB = pCoefB + (modifier * 2U);
+    pCoefA = pCoefA + ((modifier * 2U) - 1U);
+
+    i--;
+
+  }
+
+  pDst[2U * fftLen] = pSrc[0] - pSrc[1];
+  pDst[(2U * fftLen) + 1U] = 0.0f;
+
+  pDst[0] = pSrc[0] + pSrc[1];
+  pDst[1] = 0.0f;
+
+}
+
+
+/**
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+void arm_split_rifft_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier)
+{
+        float32_t outR, outI;                          /* Temporary variables for output */
+  const float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
+        float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
+        float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U];
+
+  pCoefA = &pATable[0];
+  pCoefB = &pBTable[0];
+
+  while (fftLen > 0U)
+  {
+     /*
+       outR = (  pIn[2 * i]             * pATable[2 * i]
+               + pIn[2 * i + 1]         * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               - pIn[2 * i]             * pATable[2 * i + 1]
+               - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
+
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
+
+     /* outR = (pSrc[2 * i] * CoefA1 */
+     outR = *pSrc1 * CoefA1;
+
+     /* - pSrc[2 * i] * CoefA2 */
+     outI = -(*pSrc1++) * CoefA2;
+
+     /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
+     outR += (*pSrc1 + *pSrc2) * CoefA2;
+
+     /* pSrc[2 * i + 1] * CoefA1 */
+     outI += (*pSrc1++) * CoefA1;
+
+     CoefB1 = *pCoefB;
+
+     /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
+     outI -= *pSrc2-- * CoefB1;
+
+     /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
+     outR += *pSrc2 * CoefB1;
+
+     /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
+     outI += *pSrc2-- * CoefA2;
+
+     /* write output */
+     *pDst++ = outR;
+     *pDst++ = outI;
+
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (modifier * 2);
+     pCoefA = pCoefA + (modifier * 2 - 1);
+
+     /* Decrement loop count */
+     fftLen--;
+  }
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
new file mode 100644
index 00000000..ebaa7d95
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
@@ -0,0 +1,320 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_f32.c
+ * Description:  RFFT & RIFFT Floating point process function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+void stage_rfft_f32(
+  const arm_rfft_fast_instance_f32 * S,
+        float32_t * p,
+        float32_t * pOut)
+{
+        uint32_t  k;                                /* Loop Counter */
+        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float32_t * pCoeff = S->pTwiddleRFFT;       /* Points to RFFT Twiddle factors */
+        float32_t *pA = p;                          /* increasing pointer */
+        float32_t *pB = p;                          /* decreasing pointer */
+        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float32_t t1a, t1b;                         /* temporary variables */
+        float32_t p0, p1, p2, p3;                   /* temporary variables */
+
+
+   k = (S->Sint).fftLen - 1;
+
+   /* Pack first and last sample of the frequency domain together */
+
+   xBR = pB[0];
+   xBI = pB[1];
+   xAR = pA[0];
+   xAI = pA[1];
+
+   twR = *pCoeff++ ;
+   twI = *pCoeff++ ;
+
+   // U1 = XA(1) + XB(1); % It is real
+   t1a = xBR + xAR  ;
+
+   // U2 = XB(1) - XA(1); % It is imaginary
+   t1b = xBI + xAI  ;
+
+   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+   *pOut++ = 0.5f * ( t1a + t1b );
+   *pOut++ = 0.5f * ( t1a - t1b );
+
+   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
+   pB  = p + 2*k;
+   pA += 2;
+
+   do
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+      xBI = pB[1];
+      xBR = pB[0];
+      xAR = pA[0];
+      xAI = pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xBR - xAR ;
+      t1b = xBI + xAI ;
+
+      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+      p0 = twR * t1a;
+      p1 = twI * t1a;
+      p2 = twR * t1b;
+      p3 = twI * t1b;
+
+      *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR
+      *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   } while (k > 0U);
+}
+
+/* Prepares data for inverse cfft */
+void merge_rfft_f32(
+  const arm_rfft_fast_instance_f32 * S,
+        float32_t * p,
+        float32_t * pOut)
+{
+        uint32_t  k;                                /* Loop Counter */
+        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float32_t *pCoeff = S->pTwiddleRFFT;        /* Points to RFFT Twiddle factors */
+        float32_t *pA = p;                          /* increasing pointer */
+        float32_t *pB = p;                          /* decreasing pointer */
+        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float32_t t1a, t1b, r, s, t, u;             /* temporary variables */
+
+   k = (S->Sint).fftLen - 1;
+
+   xAR = pA[0];
+   xAI = pA[1];
+
+   pCoeff += 2 ;
+
+   *pOut++ = 0.5f * ( xAR + xAI );
+   *pOut++ = 0.5f * ( xAR - xAI );
+
+   pB  =  p + 2*k ;
+   pA +=  2	   ;
+
+   while (k > 0U)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xBI =   pB[1]    ;
+      xBR =   pB[0]    ;
+      xAR =  pA[0];
+      xAI =  pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xAR - xBR ;
+      t1b = xAI + xBI ;
+
+      r = twR * t1a;
+      s = twI * t1b;
+      t = twI * t1a;
+      u = twR * t1b;
+
+      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
+      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
+      *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR
+      *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   }
+
+}
+
+/**
+  @ingroup groupTransforms
+*/
+
+/**
+  @defgroup RealFFT Real FFT Functions
+ 
+  @par
+                   The CMSIS DSP library includes specialized algorithms for computing the
+                   FFT of real data sequences.  The FFT is defined over complex data but
+                   in many applications the input is real.  Real FFT algorithms take advantage
+                   of the symmetry properties of the FFT and have a speed advantage over complex
+                   algorithms of the same length.
+  @par
+                   The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
+  @par
+                   The real length N forward FFT of a sequence is computed using the steps shown below.
+  @par
+                   \image html RFFT.gif "Real Fast Fourier Transform"
+  @par
+                   The real sequence is initially treated as if it were complex to perform a CFFT.
+                   Later, a processing stage reshapes the data to obtain half of the frequency spectrum
+                   in complex format. Except the first complex number that contains the two real numbers
+                   X[0] and X[N/2] all the data is complex. In other words, the first complex sample
+                   contains two real values packed.
+  @par
+                   The input for the inverse RFFT should keep the same format as the output of the
+                   forward RFFT. A first processing stage pre-process the data to later perform an
+                   inverse CFFT.
+  @par
+                   \image html RIFFT.gif "Real Inverse Fast Fourier Transform"
+  @par
+                   The algorithms for floating-point, Q15, and Q31 data are slightly different
+                   and we describe each algorithm in turn.
+  @par           Floating-point
+                   The main functions are \ref arm_rfft_fast_f32() and \ref arm_rfft_fast_init_f32().
+                   The older functions \ref arm_rfft_f32() and \ref arm_rfft_init_f32() have been deprecated
+                   but are still documented.
+  @par
+                   The FFT of a real N-point sequence has even symmetry in the frequency domain. 
+                   The second half of the data equals the conjugate of the first half flipped in frequency. 
+                   Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers.
+                   These are packed into the output array in alternating real and imaginary components:
+  @par
+                   X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ...
+                   real[(N/2)-1], imag[(N/2)-1 }
+  @par
+                   It happens that the first complex number (real[0], imag[0]) is actually
+                   all real. real[0] represents the DC offset, and imag[0] should be 0.
+                   (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is
+                   the first harmonic and so on.
+  @par
+                   The real FFT functions pack the frequency domain data in this fashion.
+                   The forward transform outputs the data in this form and the inverse
+                   transform expects input data in this form. The function always performs
+                   the needed bitreversal so that the input and output data is always in
+                   normal order. The functions support lengths of [32, 64, 128, ..., 4096]
+                   samples.
+  @par           Q15 and Q31
+                   The real algorithms are defined in a similar manner and utilize N/2 complex
+                   transforms behind the scenes.
+  @par
+                   The complex transforms used internally include scaling to prevent fixed-point
+                   overflows.  The overall scaling equals 1/(fftLen/2).
+  @par
+                   A separate instance structure must be defined for each transform used but
+                   twiddle factor and bit reversal tables can be reused.
+  @par
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                    - Sets the values of the internal structure fields.
+                    - Initializes twiddle factor table and bit reversal table pointers.
+                    - Initializes the internal complex FFT data structure.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure
+                   cannot be placed into a const data section. To place an instance structure
+                   into a const data section, the instance structure should be manually
+                   initialized as follows:
+  
+      arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+      arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+  

+                   where fftLenReal is the length of the real transform;
+                   fftLenBy2 length of  the internal complex transform.
+                   ifftFlagR Selects forward (=0) or inverse (=1) transform.
+                   bitReverseFlagR Selects bit reversed output (=0) or normal order
+                   output (=1).
+                   twidCoefRModifier stride modifier for the twiddle factor table.
+                   The value is based on the FFT length;
+                   pTwiddleARealpoints to the A array of twiddle coefficients;
+                   pTwiddleBRealpoints to the B array of twiddle coefficients;
+                   pCfft points to the CFFT Instance structure. The CFFT structure
+                   must also be initialized.  Refer to arm_cfft_radix4_f32() for details regarding
+                   static initialization of the complex FFT instance structure.
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+*/
+
+/**
+  @brief         Processing function for the floating-point real FFT.
+  @param[in]     S         points to an arm_rfft_fast_instance_f32 structure
+  @param[in]     p         points to input buffer
+  @param[in]     pOut      points to output buffer
+  @param[in]     ifftFlag
+                   - value = 0: RFFT
+                   - value = 1: RIFFT
+  @return        none
+*/
+
+void arm_rfft_fast_f32(
+  arm_rfft_fast_instance_f32 * S,
+  float32_t * p,
+  float32_t * pOut,
+  uint8_t ifftFlag)
+{
+   arm_cfft_instance_f32 * Sint = &(S->Sint);
+   Sint->fftLen = S->fftLenRFFT / 2;
+
+   /* Calculation of Real FFT */
+   if (ifftFlag)
+   {
+      /*  Real FFT compression */
+      merge_rfft_f32(S, p, pOut);
+
+      /* Complex radix-4 IFFT process */
+      arm_cfft_f32( Sint, pOut, ifftFlag, 1);
+   }
+   else
+   {
+      /* Calculation of RFFT of input */
+      arm_cfft_f32( Sint, p, ifftFlag, 1);
+
+      /*  Real FFT extraction */
+      stage_rfft_f32(S, p, pOut);
+   }
+}
+
+/**
+* @} end of RealFFT group
+*/
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
new file mode 100644
index 00000000..ca510cd5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
@@ -0,0 +1,344 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_init_f32.c
+ * Description:  Split Radix Decimation in Frequency CFFT Floating point processing function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
+
+/**
+  @brief         Initialization function for the 32pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_32_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 16U;
+  S->fftLenRFFT = 32U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_16_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_16;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_32;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
+
+/**
+  @brief         Initialization function for the 64pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_64_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 32U;
+  S->fftLenRFFT = 64U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_32_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_32;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_64;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
+
+/**
+  @brief         Initialization function for the 128pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_128_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 64U;
+  S->fftLenRFFT = 128U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_64_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_64;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_128;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
+
+/**
+  @brief         Initialization function for the 256pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+*/
+
+arm_status arm_rfft_256_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 128U;
+  S->fftLenRFFT = 256U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_128;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_256;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
+
+/**
+  @brief         Initialization function for the 512pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_512_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 256U;
+  S->fftLenRFFT = 512U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_256;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_512;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
+/**
+  @brief         Initialization function for the 1024pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_1024_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 512U;
+  S->fftLenRFFT = 1024U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_512;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_1024;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
+/**
+  @brief         Initialization function for the 2048pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+arm_status arm_rfft_2048_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 1024U;
+  S->fftLenRFFT = 2048U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_1024_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_1024;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_2048;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
+/**
+* @brief         Initialization function for the 4096pt floating-point real FFT.
+* @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+arm_status arm_rfft_4096_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_cfft_instance_f32 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 2048U;
+  S->fftLenRFFT = 4096U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLE_2048_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;
+  Sint->pTwiddle     = (float32_t *) twiddleCoef_2048;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_4096;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+/**
+  @brief         Initialization function for the floating-point real FFT.
+  @param[in,out] S       points to an arm_rfft_fast_instance_f32 structure
+  @param[in]     fftLen  length of the Real Sequence
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLen is not a supported length
+
+  @par           Description
+                   The parameter fftLen specifies the length of RFFT/CIFFT process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+arm_status arm_rfft_fast_init_f32(
+  arm_rfft_fast_instance_f32 * S,
+  uint16_t fftLen)
+{
+  typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f32 *);
+  fft_init_ptr fptr = 0x0;
+
+  switch (fftLen)
+  {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
+  case 4096U:
+    fptr = arm_rfft_4096_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
+  case 2048U:
+    fptr = arm_rfft_2048_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
+  case 1024U:
+    fptr = arm_rfft_1024_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
+  case 512U:
+    fptr = arm_rfft_512_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
+  case 256U:
+    fptr = arm_rfft_256_fast_init_f32;
+    break;
+#endif
+#if (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
+  case 128U:
+    fptr = arm_rfft_128_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
+  case 64U:
+    fptr = arm_rfft_64_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
+  case 32U:
+    fptr = arm_rfft_32_fast_init_f32;
+    break;
+#endif
+  default:
+    return ARM_MATH_ARGUMENT_ERROR;
+  }
+
+  if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR;
+  return fptr( S );
+
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
new file mode 100644
index 00000000..3d57a212
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
@@ -0,0 +1,139 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_init_f32.c
+ * Description:  RFFT & RIFFT Floating point initialisation function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point RFFT/RIFFT.
+  @deprecated    Do not use this function. It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed in the future.
+  @param[in,out] S             points to an instance of the floating-point RFFT/RIFFT structure
+  @param[in,out] S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLenReal     length of the FFT.
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported length
+
+  @par Description
+                   The parameter fftLenRealspecifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 128, 512, 2048.
+  @par
+                   The parameter ifftFlagR controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
+ */
+
+arm_status arm_rfft_init_f32(
+  arm_rfft_instance_f32 * S,
+  arm_cfft_radix4_instance_f32 * S_CFFT,
+  uint32_t fftLenReal,
+  uint32_t ifftFlagR,
+  uint32_t bitReverseFlag)
+{
+
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /*  Initialize the Real FFT length */
+  S->fftLenReal = (uint16_t) fftLenReal;
+
+  /*  Initialize the Complex FFT length */
+  S->fftLenBy2 = (uint16_t) fftLenReal / 2U;
+
+  /*  Initialize the Twiddle coefficientA pointer */
+  S->pTwiddleAReal = (float32_t *) realCoefA;
+
+  /*  Initialize the Twiddle coefficientB pointer */
+  S->pTwiddleBReal = (float32_t *) realCoefB;
+
+  /*  Initialize the Flag for selection of RFFT or RIFFT */
+  S->ifftFlagR = (uint8_t) ifftFlagR;
+
+  /*  Initialize the Flag for calculation Bit reversal or not */
+  S->bitReverseFlagR = (uint8_t) bitReverseFlag;
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLenReal)
+  {
+    /* Init table modifier value */
+  case 8192U:
+    S->twidCoefRModifier = 1U;
+    break;
+  case 2048U:
+    S->twidCoefRModifier = 4U;
+    break;
+  case 512U:
+    S->twidCoefRModifier = 16U;
+    break;
+  case 128U:
+    S->twidCoefRModifier = 64U;
+    break;
+  default:
+    /*  Reporting argument error if rfftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  /* Init Complex FFT Instance */
+  S->pCfft = S_CFFT;
+
+  if (S->ifftFlagR)
+  {
+    /* Initializes the CIFFT Module for fftLenreal/2 length */
+    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1U, 0U);
+  }
+  else
+  {
+    /* Initializes the CFFT Module for fftLenreal/2 length */
+    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0U, 0U);
+  }
+
+  /* return the status of RFFT Init function */
+  return (status);
+
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
new file mode 100644
index 00000000..fb4c66cd
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
@@ -0,0 +1,158 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_init_q15.c
+ * Description:  RFFT & RIFFT Q15 initialisation function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 RFFT/RIFFT.
+  @param[in,out] S              points to an instance of the Q15 RFFT/RIFFT structure
+  @param[in]     fftLenReal     length of the FFT
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported length
+
+  @par           Details
+                   The parameter fftLenReal specifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
+  @par
+                   The parameter ifftFlagR controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
+ */
+
+arm_status arm_rfft_init_q15(
+    arm_rfft_instance_q15 * S,
+    uint32_t fftLenReal,
+    uint32_t ifftFlagR,
+    uint32_t bitReverseFlag)
+{
+    /*  Initialise the default arm status */
+    arm_status status = ARM_MATH_SUCCESS;
+
+    /*  Initialize the Real FFT length */
+    S->fftLenReal = (uint16_t) fftLenReal;
+
+    /*  Initialize the Twiddle coefficientA pointer */
+    S->pTwiddleAReal = (q15_t *) realCoefAQ15;
+
+    /*  Initialize the Twiddle coefficientB pointer */
+    S->pTwiddleBReal = (q15_t *) realCoefBQ15;
+
+    /*  Initialize the Flag for selection of RFFT or RIFFT */
+    S->ifftFlagR = (uint8_t) ifftFlagR;
+
+    /*  Initialize the Flag for calculation Bit reversal or not */
+    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
+
+    /*  Initialization of coef modifier depending on the FFT length */
+    switch (S->fftLenReal)
+    {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+    case 8192U:
+        S->twidCoefRModifier = 1U;
+        S->pCfft = &arm_cfft_sR_q15_len4096;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+    case 4096U:
+        S->twidCoefRModifier = 2U;
+        S->pCfft = &arm_cfft_sR_q15_len2048;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+    case 2048U:
+        S->twidCoefRModifier = 4U;
+        S->pCfft = &arm_cfft_sR_q15_len1024;
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+    case 1024U:
+        S->twidCoefRModifier = 8U;
+        S->pCfft = &arm_cfft_sR_q15_len512;
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+    case 512U:
+        S->twidCoefRModifier = 16U;
+        S->pCfft = &arm_cfft_sR_q15_len256;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+    case 256U:
+        S->twidCoefRModifier = 32U;
+        S->pCfft = &arm_cfft_sR_q15_len128;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+    case 128U:
+        S->twidCoefRModifier = 64U;
+        S->pCfft = &arm_cfft_sR_q15_len64;
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+    case 64U:
+        S->twidCoefRModifier = 128U;
+        S->pCfft = &arm_cfft_sR_q15_len32;
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+    case 32U:
+        S->twidCoefRModifier = 256U;
+        S->pCfft = &arm_cfft_sR_q15_len16;
+        break;
+#endif
+    default:
+        /*  Reporting argument error if rfftSize is not valid value */
+        status = ARM_MATH_ARGUMENT_ERROR;
+        break;
+    }
+
+    /* return the status of RFFT Init function */
+    return (status);
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
new file mode 100644
index 00000000..efae1ea5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
@@ -0,0 +1,160 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_init_q31.c
+ * Description:  RFFT & RIFFT Q31 initialisation function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 RFFT/RIFFT.
+  @param[in,out] S              points to an instance of the Q31 RFFT/RIFFT structure
+  @param[in]     fftLenReal     length of the FFT
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : fftLenReal is not a supported length
+
+  @par           Details
+                   The parameter fftLenReal specifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
+  @par
+                   The parameter ifftFlagR controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
+*/
+
+arm_status arm_rfft_init_q31(
+    arm_rfft_instance_q31 * S,
+    uint32_t fftLenReal,
+    uint32_t ifftFlagR,
+    uint32_t bitReverseFlag)
+{
+    /*  Initialise the default arm status */
+    arm_status status = ARM_MATH_SUCCESS;
+
+    /*  Initialize the Real FFT length */
+    S->fftLenReal = (uint16_t) fftLenReal;
+
+    /*  Initialize the Twiddle coefficientA pointer */
+    S->pTwiddleAReal = (q31_t *) realCoefAQ31;
+
+    /*  Initialize the Twiddle coefficientB pointer */
+    S->pTwiddleBReal = (q31_t *) realCoefBQ31;
+
+    /*  Initialize the Flag for selection of RFFT or RIFFT */
+    S->ifftFlagR = (uint8_t) ifftFlagR;
+
+    /*  Initialize the Flag for calculation Bit reversal or not */
+    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
+
+    /*  Initialization of coef modifier depending on the FFT length */
+    switch (S->fftLenReal)
+    {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+    case 8192U:
+        S->twidCoefRModifier = 1U;
+        S->pCfft = &arm_cfft_sR_q31_len4096;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+    case 4096U:
+        S->twidCoefRModifier = 2U;
+        S->pCfft = &arm_cfft_sR_q31_len2048;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+    case 2048U:
+        S->twidCoefRModifier = 4U;
+        S->pCfft = &arm_cfft_sR_q31_len1024;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+    case 1024U:
+        S->twidCoefRModifier = 8U;
+        S->pCfft = &arm_cfft_sR_q31_len512;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+    case 512U:
+        S->twidCoefRModifier = 16U;
+        S->pCfft = &arm_cfft_sR_q31_len256;
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+    case 256U:
+        S->twidCoefRModifier = 32U;
+        S->pCfft = &arm_cfft_sR_q31_len128;
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+    case 128U:
+        S->twidCoefRModifier = 64U;
+        S->pCfft = &arm_cfft_sR_q31_len64;
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+    case 64U:
+        S->twidCoefRModifier = 128U;
+        S->pCfft = &arm_cfft_sR_q31_len32;
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+    case 32U:
+        S->twidCoefRModifier = 256U;
+        S->pCfft = &arm_cfft_sR_q31_len16;
+        break;
+#endif
+    default:
+        /*  Reporting argument error if rfftSize is not valid value */
+        status = ARM_MATH_ARGUMENT_ERROR;
+        break;
+    }
+
+    /* return the status of RFFT Init function */
+    return (status);
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c
new file mode 100644
index 00000000..29d12b78
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c
@@ -0,0 +1,380 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_q15.c
+ * Description:  RFFT & RIFFT Q15 process function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/* ----------------------------------------------------------------------
+ * Internal functions prototypes
+ * -------------------------------------------------------------------- */
+
+void arm_split_rfft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier);
+
+void arm_split_rifft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier);
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 RFFT/RIFFT.
+  @param[in]     S     points to an instance of the Q15 RFFT/RIFFT structure
+  @param[in]     pSrc  points to input buffer
+  @param[out]    pDst  points to output buffer
+  @return        none
+
+  @par           Input an output formats
+                   Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                   Hence the output format is different for different RFFT sizes.
+                   The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
+  @par
+                   \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"
+  @par
+                   \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"
+ */
+
+void arm_rfft_q15(
+  const arm_rfft_instance_q15 * S,
+        q15_t * pSrc,
+        q15_t * pDst)
+{
+  const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
+        uint32_t L2 = S->fftLenReal >> 1U;
+        uint32_t i;
+
+  /* Calculation of RIFFT of input */
+  if (S->ifftFlagR == 1U)
+  {
+     /*  Real IFFT core process */
+     arm_split_rifft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+
+     /* Complex IFFT process */
+     arm_cfft_q15 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
+
+     for(i = 0; i < S->fftLenReal; i++)
+     {
+        pDst[i] = pDst[i] << 1U;
+     }
+  }
+  else
+  {
+     /* Calculation of RFFT of input */
+
+     /* Complex FFT process */
+     arm_cfft_q15 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
+
+     /*  Real FFT core process */
+     arm_split_rfft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  }
+
+}
+
+/**
+  @} end of RealFFT group
+ */
+
+/**
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+
+  @par
+                   The function implements a Real FFT
+ */
+
+void arm_split_rfft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier)
+{       
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q15_t *pSrc1, *pSrc2;
+#if defined (ARM_MATH_DSP)
+        q15_t *pD1, *pD2;
+#endif
+
+  /* Init coefficient pointers */
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
+
+  pSrc1 = &pSrc[2];
+  pSrc2 = &pSrc[(2U * fftLen) - 2U];
+
+#if defined (ARM_MATH_DSP)
+
+    i = 1U;
+    pD1 = pDst + 2;
+    pD2 = pDst + (4U * fftLen) - 2;
+
+    for (i = fftLen - 1; i > 0; i--)
+    {
+        /*
+          outR = (  pSrc[2 * i]             * pATable[2 * i]
+                  - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+                  + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+                  + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+          outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                  + pIn[2 * i]             * pATable[2 * i + 1]
+                  + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                  - pIn[2 * n - 2 * i + 1] * pBTable[2 * i])
+         */
+
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
+        outR = __SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA));
+#else
+        /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
+        outR = -(__SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA)));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
+        outR = __SMLAD(read_q15x2 (pSrc2), read_q15x2((q15_t *) pCoefB), outR) >> 16U;
+
+        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+#ifndef ARM_MATH_BIG_ENDIAN
+        outI = __SMUSDX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
+#else
+        outI = __SMUSDX(read_q15x2 ((q15_t *) pCoefB), read_q15x2_da (&pSrc2));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
+        outI = __SMLADX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), outI);
+
+        /* write output */
+        *pD1++ = (q15_t) outR;
+        *pD1++ = outI >> 16U;
+
+        /* write complex conjugate output */
+        pD2[0] = (q15_t) outR;
+        pD2[1] = -(outI >> 16U);
+        pD2 -= 2;
+
+        /* update coefficient pointer */
+        pCoefB = pCoefB + (2U * modifier);
+        pCoefA = pCoefA + (2U * modifier);
+    }
+
+    pDst[2U * fftLen]      = (pSrc[0] - pSrc[1]) >> 1U;
+    pDst[2U * fftLen + 1U] = 0;
+
+    pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
+    pDst[1] = 0;
+
+#else
+
+    i = 1U;
+
+    while (i < fftLen)
+    {
+        /*
+          outR = (  pSrc[2 * i]             * pATable[2 * i]
+                  - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+                  + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+                  + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+        */
+
+        outR = *pSrc1 * *pCoefA;
+        outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
+        outR = outR + (*pSrc2 * *pCoefB);
+        outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;
+
+        /*
+          outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                  + pIn[2 * i]             * pATable[2 * i + 1]
+                  + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                  - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+        */
+
+        outI = *pSrc2 * *(pCoefB + 1);
+        outI = outI - (*(pSrc2 + 1) * *pCoefB);
+        outI = outI + (*(pSrc1 + 1) * *pCoefA);
+        outI = outI + (*pSrc1 * *(pCoefA + 1));
+
+        /* update input pointers */
+        pSrc1 += 2U;
+        pSrc2 -= 2U;
+
+        /* write output */
+        pDst[2U * i] = (q15_t) outR;
+        pDst[2U * i + 1U] = outI >> 16U;
+
+        /* write complex conjugate output */
+        pDst[(4U * fftLen) - (2U * i)] = (q15_t) outR;
+        pDst[((4U * fftLen) - (2U * i)) + 1U] = -(outI >> 16U);
+
+        /* update coefficient pointer */
+        pCoefB = pCoefB + (2U * modifier);
+        pCoefA = pCoefA + (2U * modifier);
+
+        i++;
+    }
+
+    pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
+    pDst[2U * fftLen + 1U] = 0;
+
+    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
+    pDst[1] = 0;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+}
+
+
+/**
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+
+  @par
+                   The function implements a Real IFFT
+ */
+
+void arm_split_rifft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier)
+{
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q15_t *pSrc1, *pSrc2;
+        q15_t *pDst1 = &pDst[0];
+
+  pCoefA = &pATable[0];
+  pCoefB = &pBTable[0];
+
+  pSrc1 = &pSrc[0];
+  pSrc2 = &pSrc[2 * fftLen];
+
+  i = fftLen;
+  while (i > 0U)
+  {
+      /*
+        outR = (  pIn[2 * i]             * pATable[2 * i]
+                + pIn[2 * i + 1]         * pATable[2 * i + 1]
+                + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+                - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+        outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                - pIn[2 * i]             * pATable[2 * i + 1]
+                - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+       */
+
+#if defined (ARM_MATH_DSP)
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      /* pIn[2 * n - 2 * i] * pBTable[2 * i] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
+      outR = __SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB));
+#else
+      /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
+      outR = -(__SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB)));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + pIn[2 * n - 2 * i] * pBTable[2 * i] */
+      outR = __SMLAD(read_q15x2(pSrc1), read_q15x2 ((q15_t *) pCoefA), outR) >> 16U;
+
+      /* -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+      outI = __SMUADX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
+
+      /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      outI = __SMLSDX(read_q15x2 ((q15_t *) pCoefA), read_q15x2_ia (&pSrc1), -outI);
+#else
+      outI = __SMLSDX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), -outI);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* write output */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst1, __PKHBT(outR, (outI >> 16U), 16));
+#else
+      write_q15x2_ia (&pDst1, __PKHBT((outI >> 16U), outR, 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+
+#else  /* #if defined (ARM_MATH_DSP) */
+
+      outR = *pSrc2 * *pCoefB;
+      outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
+      outR = outR + (*pSrc1 * *pCoefA);
+      outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
+
+      outI = *(pSrc1 + 1) * *pCoefA;
+      outI = outI - (*pSrc1 * *(pCoefA + 1));
+      outI = outI - (*pSrc2 * *(pCoefB + 1));
+      outI = outI - (*(pSrc2 + 1) * *(pCoefB));
+
+      /* update input pointers */
+      pSrc1 += 2U;
+      pSrc2 -= 2U;
+
+      /* write output */
+      *pDst1++ = (q15_t) outR;
+      *pDst1++ = (q15_t) (outI >> 16);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+      /* update coefficient pointer */
+      pCoefB = pCoefB + (2 * modifier);
+      pCoefA = pCoefA + (2 * modifier);
+
+      i--;
+  }
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c
new file mode 100644
index 00000000..0cc595b1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c
@@ -0,0 +1,292 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_q31.c
+ * Description:  FFT & RIFFT Q31 process function
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.6.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math.h"
+
+/* ----------------------------------------------------------------------
+ * Internal functions prototypes
+ * -------------------------------------------------------------------- */
+
+void arm_split_rfft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier);
+
+void arm_split_rifft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier);
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 RFFT/RIFFT.
+  @param[in]     S     points to an instance of the Q31 RFFT/RIFFT structure
+  @param[in]     pSrc  points to input buffer
+  @param[out]    pDst  points to output buffer
+  @return        none
+
+  @par           Input an output formats
+                   Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                   Hence the output format is different for different RFFT sizes.
+                   The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
+  @par
+                   \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"
+  @par
+                   \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"
+ */
+
+void arm_rfft_q31(
+  const arm_rfft_instance_q31 * S,
+        q31_t * pSrc,
+        q31_t * pDst)
+{
+  const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
+        uint32_t L2 = S->fftLenReal >> 1U;
+        uint32_t i;
+
+  /* Calculation of RIFFT of input */
+  if (S->ifftFlagR == 1U)
+  {
+     /*  Real IFFT core process */
+     arm_split_rifft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+
+     /* Complex IFFT process */
+     arm_cfft_q31 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
+
+     for(i = 0; i < S->fftLenReal; i++)
+     {
+        pDst[i] = pDst[i] << 1U;
+     }
+  }
+  else
+  {
+     /* Calculation of RFFT of input */
+
+     /* Complex FFT process */
+     arm_cfft_q31 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
+
+     /*  Real FFT core process */
+     arm_split_rfft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  }
+
+}
+
+/**
+  @} end of RealFFT group
+ */
+
+/**
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+void arm_split_rfft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier)
+{
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
+        q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[4 * fftLen - 1];
+        q31_t *pIn1 =  &pSrc[2], *pIn2 =  &pSrc[2 * fftLen - 1];
+
+  /* Init coefficient pointers */
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
+
+  i = fftLen - 1U;
+
+  while (i > 0U)
+  {
+     /*
+       outR = (  pSrc[2 * i]             * pATable[2 * i]
+               - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+               + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+               + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               + pIn[2 * i]             * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
+
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
+
+     /* outR = (pSrc[2 * i] * pATable[2 * i] */
+     mult_32x32_keep32_R (outR, *pIn1, CoefA1);
+
+     /* outI = pIn[2 * i] * pATable[2 * i + 1] */
+     mult_32x32_keep32_R (outI, *pIn1++, CoefA2);
+
+     /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
+     multSub_32x32_keep32_R (outR, *pIn1, CoefA2);
+
+     /* (pIn[2 * i + 1] * pATable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
+
+     /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
+     multSub_32x32_keep32_R (outR, *pIn2, CoefA2);
+     CoefB1 = *pCoefB;
+
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
+
+     /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
+
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefA2);
+
+     /* write output */
+     *pOut1++ = outR;
+     *pOut1++ = outI;
+
+     /* write complex conjugate output */
+     *pOut2-- = -outI;
+     *pOut2-- = outR;
+
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (2 * modifier);
+     pCoefA = pCoefA + (2 * modifier - 1);
+
+     /* Decrement loop count */
+     i--;
+  }
+
+  pDst[2 * fftLen]     = (pSrc[0] - pSrc[1]) >> 1U;
+  pDst[2 * fftLen + 1] = 0;
+
+  pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
+  pDst[1] = 0;
+}
+
+
+/**
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+void arm_split_rifft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier)
+{       
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
+        q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[2 * fftLen + 1];
+
+  pCoefA = &pATable[0];
+  pCoefB = &pBTable[0];
+
+  while (fftLen > 0U)
+  {
+     /*
+       outR = (  pIn[2 * i]             * pATable[2 * i]
+               + pIn[2 * i + 1]         * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               - pIn[2 * i]             * pATable[2 * i + 1]
+               - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
+
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
+
+     /* outR = (pIn[2 * i] * pATable[2 * i] */
+     mult_32x32_keep32_R (outR, *pIn1, CoefA1);
+
+     /* - pIn[2 * i] * pATable[2 * i + 1] */
+     mult_32x32_keep32_R (outI, *pIn1++, -CoefA2);
+
+     /* pIn[2 * i + 1] * pATable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn1, CoefA2);
+
+     /* pIn[2 * i + 1] * pATable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
+
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefA2);
+     CoefB1 = *pCoefB;
+
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
+
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
+
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn2--, CoefA2);
+
+     /* write output */
+     *pDst++ = outR;
+     *pDst++ = outI;
+
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (modifier * 2);
+     pCoefA = pCoefA + (modifier * 2 - 1);
+
+     /* Decrement loop count */
+     fftLen--;
+  }
+
+}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c
deleted file mode 100644
index 04edf0cd..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_f32.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_abs_f32.c    
-*    
-* Description:	Vector absolute value.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include 
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup BasicAbs Vector Absolute Value        
- *        
- * Computes the absolute value of a vector on an element-by-element basis.        
- *        
- * 
        
- *     pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.        
- * 
        
- *        
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**        
- * @addtogroup BasicAbs        
- * @{        
- */
-
-/**        
- * @brief Floating-point vector absolute value.        
- * @param[in]       *pSrc points to the input buffer        
- * @param[out]      *pDst points to the output buffer        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- */
-
-void arm_abs_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Calculate absolute and then store the results in the destination buffer. */
-    /* read sample from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-    in3 = *(pSrc + 2);
-
-    /* find absolute value */
-    in1 = fabsf(in1);
-
-    /* read sample from source */
-    in4 = *(pSrc + 3);
-
-    /* find absolute value */
-    in2 = fabsf(in2);
-
-    /* read sample from source */
-    *pDst = in1;
-
-    /* find absolute value */
-    in3 = fabsf(in3);
-
-    /* find absolute value */
-    in4 = fabsf(in4);
-
-    /* store result to destination */
-    *(pDst + 1) = in2;
-
-    /* store result to destination */
-    *(pDst + 2) = in3;
-
-    /* store result to destination */
-    *(pDst + 3) = in4;
-
-
-    /* Update source pointer to process next sampels */
-    pSrc += 4u;
-
-    /* Update destination pointer to process next sampels */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY   */
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Calculate absolute and then store the results in the destination buffer. */
-    *pDst++ = fabsf(*pSrc++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicAbs group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c
deleted file mode 100644
index 314054e8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q15.c
+++ /dev/null
@@ -1,179 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_abs_q15.c    
-*    
-* Description:	Q15 vector absolute value.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAbs    
- * @{    
- */
-
-/**    
- * @brief Q15 vector absolute value.    
- * @param[in]       *pSrc points to the input buffer    
- * @param[out]      *pDst points to the output buffer    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.    
- */
-
-void arm_abs_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  __SIMD32_TYPE *simd;
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t in1;                                     /* Input value1 */
-  q15_t in2;                                     /* Input value2 */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  simd = __SIMD32_CONST(pDst);
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read two inputs */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-
-
-    /* Store the Absolute result in the destination buffer by packing the two values, in a single cycle */
-#ifndef  ARM_MATH_BIG_ENDIAN
-    *simd++ =
-      __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
-              ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
-
-#else
-
-
-    *simd++ =
-      __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
-              ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *simd++ =
-      __PKHBT(((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)),
-              ((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)), 16);
-
-#else
-
-
-    *simd++ =
-      __PKHBT(((in2 > 0) ? in2 : (q15_t)__QSUB16(0, in2)),
-              ((in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1)), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-  pDst = (q15_t *)simd;
-	
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read the input */
-    in1 = *pSrc++;
-
-    /* Calculate absolute value of input and then store the result in the destination buffer. */
-    *pDst++ = (in1 > 0) ? in1 : (q15_t)__QSUB16(0, in1);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* Temporary input variable */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read the input */
-    in = *pSrc++;
-
-    /* Calculate absolute value of input and then store the result in the destination buffer. */
-    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of BasicAbs group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c
deleted file mode 100644
index 0ba24365..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q31.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_abs_q31.c    
-*    
-* Description:	Q31 vector absolute value.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAbs    
- * @{    
- */
-
-
-/**    
- * @brief Q31 vector absolute value.    
- * @param[in]       *pSrc points to the input buffer    
- * @param[out]      *pDst points to the output buffer    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.    
- */
-
-void arm_abs_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in;                                      /* Input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = (in1 > 0) ? in1 : (q31_t)__QSUB(0, in1);
-    *pDst++ = (in2 > 0) ? in2 : (q31_t)__QSUB(0, in2);
-    *pDst++ = (in3 > 0) ? in3 : (q31_t)__QSUB(0, in3);
-    *pDst++ = (in4 > 0) ? in4 : (q31_t)__QSUB(0, in4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY   */
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Calculate absolute value of the input (if -1 then saturated to 0x7fffffff) and then store the results in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of BasicAbs group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c
deleted file mode 100644
index 5bbf59bb..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_abs_q7.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_abs_q7.c    
-*    
-* Description:	Q7 vector absolute value.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @addtogroup BasicAbs        
- * @{        
- */
-
-/**        
- * @brief Q7 vector absolute value.        
- * @param[in]       *pSrc points to the input buffer        
- * @param[out]      *pDst points to the output buffer        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- *    
- * \par Conditions for optimum performance    
- *  Input and output buffers should be aligned by 32-bit    
- *    
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.        
- */
-
-void arm_abs_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q7_t in;                                       /* Input value1 */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;                      /* temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* temporary output variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read inputs */
-    in1 = (q31_t) * pSrc;
-    in2 = (q31_t) * (pSrc + 1);
-    in3 = (q31_t) * (pSrc + 2);
-
-    /* find absolute value */
-    out1 = (in1 > 0) ? in1 : (q31_t)__QSUB8(0, in1);
-
-    /* read input */
-    in4 = (q31_t) * (pSrc + 3);
-
-    /* find absolute value */
-    out2 = (in2 > 0) ? in2 : (q31_t)__QSUB8(0, in2);
-
-    /* store result to destination */
-    *pDst = (q7_t) out1;
-
-    /* find absolute value */
-    out3 = (in3 > 0) ? in3 : (q31_t)__QSUB8(0, in3);
-
-    /* find absolute value */
-    out4 = (in4 > 0) ? in4 : (q31_t)__QSUB8(0, in4);
-
-    /* store result to destination */
-    *(pDst + 1) = (q7_t) out2;
-
-    /* store result to destination */
-    *(pDst + 2) = (q7_t) out3;
-
-    /* store result to destination */
-    *(pDst + 3) = (q7_t) out4;
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-#endif //      #define ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0u)
-  {
-    /* C = |A| */
-    /* Read the input */
-    in = *pSrc++;
-
-    /* Store the Absolute result in the destination buffer */
-    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? 0x7f : -in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicAbs group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c
deleted file mode 100644
index de0e9462..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_add_f32.c    
-*    
-* Description:	Floating-point vector addition.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup BasicAdd Vector Addition        
- *        
- * Element-by-element addition of two vectors.        
- *        
- * 
        
- *     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.        
- * 
        
- *        
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup BasicAdd        
- * @{        
- */
-
-/**        
- * @brief Floating-point vector addition.        
- * @param[in]       *pSrcA points to the first input vector        
- * @param[in]       *pSrcB points to the second input vector        
- * @param[out]      *pDst points to the output vector        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- */
-
-void arm_add_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* temporary input variabels */
-  float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-
-    /* read four inputs from sourceA and four inputs from sourceB */
-    inA1 = *pSrcA;
-    inB1 = *pSrcB;
-    inA2 = *(pSrcA + 1);
-    inB2 = *(pSrcB + 1);
-    inA3 = *(pSrcA + 2);
-    inB3 = *(pSrcB + 2);
-    inA4 = *(pSrcA + 3);
-    inB4 = *(pSrcB + 3);
-
-    /* C = A + B */
-    /* add and store result to destination */
-    *pDst = inA1 + inB1;
-    *(pDst + 1) = inA2 + inB2;
-    *(pDst + 2) = inA3 + inB3;
-    *(pDst + 3) = inA4 + inB4;
-
-    /* update pointers to process next samples */
-    pSrcA += 4u;
-    pSrcB += 4u;
-    pDst += 4u;
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (*pSrcA++) + (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicAdd group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c
deleted file mode 100644
index be5771dc..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q15.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_add_q15.c    
-*    
-* Description:	Q15 vector addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAdd    
- * @{    
- */
-
-/**    
- * @brief Q15 vector addition.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_add_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inB1, inB2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    inA1 = *__SIMD32(pSrcA)++;
-    inA2 = *__SIMD32(pSrcA)++;
-    inB1 = *__SIMD32(pSrcB)++;
-    inB2 = *__SIMD32(pSrcB)++;
-
-    *__SIMD32(pDst)++ = __QADD16(inA1, inB1);
-    *__SIMD32(pDst)++ = __QADD16(inA2, inB2);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ + *pSrcB++), 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**    
- * @} end of BasicAdd group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c
deleted file mode 100644
index f8946770..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q31.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_add_q31.c    
-*    
-* Description:	Q31 vector addition.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAdd    
- * @{    
- */
-
-
-/**    
- * @brief Q31 vector addition.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_add_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;
-  q31_t inB1, inB2, inB3, inB4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    *pDst++ = __QADD(inA1, inB1);
-    *pDst++ = __QADD(inA2, inB2);
-    *pDst++ = __QADD(inA3, inB3);
-    *pDst++ = __QADD(inA4, inB4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ + *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of BasicAdd group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c
deleted file mode 100644
index ce31b0dc..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_q7.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_add_q7.c    
-*    
-* Description:	Q7 vector addition.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicAdd    
- * @{    
- */
-
-/**    
- * @brief Q7 vector addition.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
- */
-
-void arm_add_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT(*pSrcA++ + *pSrcB++, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + B */
-    /* Add and then store the results in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ + *pSrcB++, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**    
- * @} end of BasicAdd group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c
deleted file mode 100644
index 61a0dc1e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_f32.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_dot_prod_f32.c    
-*    
-* Description:	Floating-point dot product.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath
- */
-
-/**
- * @defgroup dot_prod Vector Dot Product
- *
- * Computes the dot product of two vectors.
- * The vectors are multiplied element-by-element and then summed.
- *
- * 
- *     sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
- * 
     
- *
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup dot_prod    
- * @{    
- */
-
-/**    
- * @brief Dot product of floating-point vectors.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[in]       blockSize number of samples in each vector    
- * @param[out]      *result output result returned here    
- * @return none.    
- */
-
-
-void arm_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t blockSize,
-  float32_t * result)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer */
-    sum += (*pSrcA++) * (*pSrcB++);
-    sum += (*pSrcA++) * (*pSrcB++);
-    sum += (*pSrcA++) * (*pSrcB++);
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-  /* Store the result back in the destination buffer */
-  *result = sum;
-}
-
-/**    
- * @} end of dot_prod group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c
deleted file mode 100644
index c7bdb26c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q15.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_dot_prod_q15.c    
-*    
-* Description:	Q15 dot product.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup dot_prod    
- * @{    
- */
-
-/**    
- * @brief Dot product of Q15 vectors.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[in]       blockSize number of samples in each vector    
- * @param[out]      *result output result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these    
- * results are added to a 64-bit accumulator in 34.30 format.    
- * Nonsaturating additions are used and given that there are 33 guard bits in the accumulator    
- * there is no risk of overflow.    
- * The return result is in 34.30 format.    
- */
-
-void arm_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
-    sum = __SMLALD(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the results in a temporary buffer. */
-    sum = __SMLALD(*pSrcA++, *pSrcB++, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the results in a temporary buffer. */
-    sum += (q63_t) ((q31_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the result in the destination buffer in 34.30 format */
-  *result = sum;
-
-}
-
-/**    
- * @} end of dot_prod group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c
deleted file mode 100644
index d372a27c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q31.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_dot_prod_q31.c    
-*    
-* Description:	Q31 dot product.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup dot_prod    
- * @{    
- */
-
-/**    
- * @brief Dot product of Q31 vectors.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[in]       blockSize number of samples in each vector    
- * @param[out]      *result output result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these    
- * are truncated to 2.48 format by discarding the lower 14 bits.    
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.    
- * There are 15 guard bits in the accumulator and there is no risk of overflow as long as    
- * the length of the vectors is less than 2^16 elements.    
- * The return result is in 16.48 format.    
- */
-
-void arm_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;
-  q31_t inB1, inB2, inB3, inB4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    sum += ((q63_t) inA1 * inB1) >> 14u;
-    sum += ((q63_t) inA2 * inB2) >> 14u;
-    sum += ((q63_t) inA3 * inB3) >> 14u;
-    sum += ((q63_t) inA4 * inB4) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Calculate dot product and then store the result in a temporary buffer. */
-    sum += ((q63_t) * pSrcA++ * *pSrcB++) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result in the destination buffer in 16.48 format */
-  *result = sum;
-}
-
-/**    
- * @} end of dot_prod group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c
deleted file mode 100644
index efd7ad28..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_dot_prod_q7.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_dot_prod_q7.c    
-*    
-* Description:	Q7 dot product.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup dot_prod    
- * @{    
- */
-
-/**    
- * @brief Dot product of Q7 vectors.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[in]       blockSize number of samples in each vector    
- * @param[out]      *result output result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these    
- * results are added to an accumulator in 18.14 format.    
- * Nonsaturating additions are used and there is no danger of wrap around as long as    
- * the vectors are less than 2^18 elements long.    
- * The return result is in 18.14 format.    
- */
-
-void arm_dot_prod_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  uint32_t blockSize,
-  q31_t * result)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-  q31_t sum = 0;                                 /* Temporary variables to store output */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t input1, input2;                          /* Temporary variables to store input */
-  q31_t inA1, inA2, inB1, inB2;                  /* Temporary variables to store input */
-
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read 4 samples at a time from sourceA */
-    input1 = *__SIMD32(pSrcA)++;
-    /* read 4 samples at a time from sourceB */
-    input2 = *__SIMD32(pSrcB)++;
-
-    /* extract two q7_t samples to q15_t samples */
-    inA1 = __SXTB16(__ROR(input1, 8));
-    /* extract reminaing two samples */
-    inA2 = __SXTB16(input1);
-    /* extract two q7_t samples to q15_t samples */
-    inB1 = __SXTB16(__ROR(input2, 8));
-    /* extract reminaing two samples */
-    inB2 = __SXTB16(input2);
-
-    /* multiply and accumulate two samples at a time */
-    sum = __SMLAD(inA1, inB1, sum);
-    sum = __SMLAD(inA2, inB2, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Dot product and then store the results in a temporary buffer. */
-    sum = __SMLAD(*pSrcA++, *pSrcB++, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-    /* Dot product and then store the results in a temporary buffer. */
-    sum += (q31_t) ((q15_t) * pSrcA++ * *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  /* Store the result in the destination buffer in 18.14 format */
-  *result = sum;
-}
-
-/**    
- * @} end of dot_prod group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c
deleted file mode 100644
index 9e62276d..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_f32.c
+++ /dev/null
@@ -1,174 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mult_f32.c    
-*    
-* Description:	Floating-point vector multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup BasicMult Vector Multiplication        
- *        
- * Element-by-element multiplication of two vectors.        
- *        
- * 
        
- *     pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.        
- * 
        
- *        
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup BasicMult        
- * @{        
- */
-
-/**        
- * @brief Floating-point vector multiplication.        
- * @param[in]       *pSrcA points to the first input vector        
- * @param[in]       *pSrcB points to the second input vector        
- * @param[out]      *pDst points to the output vector        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- */
-
-void arm_mult_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counters */
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* temporary input variables */
-  float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
-  float32_t out1, out2, out3, out4;              /* temporary output variables */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the results in output buffer */
-    /* read sample from sourceA */
-    inA1 = *pSrcA;
-    /* read sample from sourceB */
-    inB1 = *pSrcB;
-    /* read sample from sourceA */
-    inA2 = *(pSrcA + 1);
-    /* read sample from sourceB */
-    inB2 = *(pSrcB + 1);
-
-    /* out = sourceA * sourceB */
-    out1 = inA1 * inB1;
-
-    /* read sample from sourceA */
-    inA3 = *(pSrcA + 2);
-    /* read sample from sourceB */
-    inB3 = *(pSrcB + 2);
-
-    /* out = sourceA * sourceB */
-    out2 = inA2 * inB2;
-
-    /* read sample from sourceA */
-    inA4 = *(pSrcA + 3);
-
-    /* store result to destination buffer */
-    *pDst = out1;
-
-    /* read sample from sourceB */
-    inB4 = *(pSrcB + 3);
-
-    /* out = sourceA * sourceB */
-    out3 = inA3 * inB3;
-
-    /* store result to destination buffer */
-    *(pDst + 1) = out2;
-
-    /* out = sourceA * sourceB */
-    out4 = inA4 * inB4;
-    /* store result to destination buffer */
-    *(pDst + 2) = out3;
-    /* store result to destination buffer */
-    *(pDst + 3) = out4;
-
-
-    /* update pointers to process next samples */
-    pSrcA += 4u;
-    pSrcB += 4u;
-    pDst += 4u;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the results in output buffer */
-    *pDst++ = (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicMult group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c
deleted file mode 100644
index 2ef3dd2a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q15.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mult_q15.c    
-*    
-* Description:	Q15 vector multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicMult    
- * @{    
- */
-
-
-/**    
- * @brief           Q15 vector multiplication    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_mult_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inB1, inB2;                  /* temporary input variables */
-  q15_t out1, out2, out3, out4;                  /* temporary output variables */
-  q31_t mul1, mul2, mul3, mul4;                  /* temporary variables */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read two samples at a time from sourceA */
-    inA1 = *__SIMD32(pSrcA)++;
-    /* read two samples at a time from sourceB */
-    inB1 = *__SIMD32(pSrcB)++;
-    /* read two samples at a time from sourceA */
-    inA2 = *__SIMD32(pSrcA)++;
-    /* read two samples at a time from sourceB */
-    inB2 = *__SIMD32(pSrcB)++;
-
-    /* multiply mul = sourceA * sourceB */
-    mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul2 = (q31_t) ((q15_t) inA1 * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
-    mul4 = (q31_t) ((q15_t) inA2 * (q15_t) inB2);
-
-    /* saturate result to 16 bit */
-    out1 = (q15_t) __SSAT(mul1 >> 15, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15, 16);
-
-    /* store the result */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
-#else
-
-    *__SIMD32(pDst)++ = __PKHBT(out2, out1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(out4, out3, 16);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the result in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c
deleted file mode 100644
index 14ae82b2..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q31.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mult_q31.c    
-*    
-* Description:	Q31 vector multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicMult    
- * @{    
- */
-
-/**    
- * @brief Q31 vector multiplication.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_mult_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;                  /* temporary input variables */
-  q31_t inB1, inB2, inB3, inB4;                  /* temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* temporary output variables */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB2) >> 32;
-    out3 = ((q63_t) inA3 * inB3) >> 32;
-    out4 = ((q63_t) inA4 * inB4) >> 32;
-
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    *pDst++ = out1 << 1u;
-    *pDst++ = out2 << 1u;
-    *pDst++ = out3 << 1u;
-    *pDst++ = out4 << 1u;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inB1 = *pSrcB++;
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out1 = __SSAT(out1, 31);
-    *pDst++ = out1 << 1u;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and then store the results in the destination buffer. */
-    *pDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) (*pSrcA++) * (*pSrcB++)) >> 31);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-  
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-}
-
-/**    
- * @} end of BasicMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c
deleted file mode 100644
index c1347f54..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_mult_q7.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mult_q7.c    
-*    
-* Description:	Q7 vector multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicMult    
- * @{    
- */
-
-/**    
- * @brief           Q7 vector multiplication    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
- */
-
-void arm_mult_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q7_t out1, out2, out3, out4;                   /* Temporary variables to store the product */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the results in temporary variables */
-    out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-
-    /* Store the results of 4 inputs in the destination buffer in single cycle by packing */
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * B */
-    /* Multiply the inputs and store the result in the destination buffer */
-    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c
deleted file mode 100644
index 70205eab..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_f32.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_negate_f32.c    
-*    
-* Description:	Negates floating-point vectors.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup negate Vector Negate        
- *        
- * Negates the elements of a vector.        
- *        
- * 
        
- *     pDst[n] = -pSrc[n],   0 <= n < blockSize.        
- * 
        
- *
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**        
- * @addtogroup negate        
- * @{        
- */
-
-/**        
- * @brief  Negates the elements of a floating-point vector.        
- * @param[in]  *pSrc points to the input vector        
- * @param[out]  *pDst points to the output vector        
- * @param[in]  blockSize number of samples in the vector        
- * @return none.        
- */
-
-void arm_negate_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read inputs from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-    in3 = *(pSrc + 2);
-    in4 = *(pSrc + 3);
-
-    /* negate the input */
-    in1 = -in1;
-    in2 = -in2;
-    in3 = -in3;
-    in4 = -in4;
-
-    /* store the result to destination */
-    *pDst = in1;
-    *(pDst + 1) = in2;
-    *(pDst + 2) = in3;
-    *(pDst + 3) = in4;
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the results in the destination buffer. */
-    *pDst++ = -*pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of negate group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c
deleted file mode 100644
index e6d8a96f..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q15.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_negate_q15.c    
-*    
-* Description:	Negates Q15 vectors.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @addtogroup negate        
- * @{        
- */
-
-/**        
- * @brief  Negates the elements of a Q15 vector.        
- * @param[in]  *pSrc points to the input vector        
- * @param[out]  *pDst points to the output vector        
- * @param[in]  blockSize number of samples in the vector        
- * @return none.        
- *    
- * \par Conditions for optimum performance    
- *  Input and output buffers should be aligned by 32-bit    
- *    
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.        
- */
-
-void arm_negate_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q15_t in;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2;                                /* Temporary variables */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Read two inputs at a time */
-    in1 = _SIMD32_OFFSET(pSrc);
-    in2 = _SIMD32_OFFSET(pSrc + 2);
-
-    /* negate two samples at a time */
-    in1 = __QSUB16(0, in1);
-
-    /* negate two samples at a time */
-    in2 = __QSUB16(0, in2);
-
-    /* store the result to destination 2 samples at a time */
-    _SIMD32_OFFSET(pDst) = in1;
-    /* store the result to destination 2 samples at a time */
-    _SIMD32_OFFSET(pDst + 2) = in2;
-
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the result in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of negate group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c
deleted file mode 100644
index bab0fe33..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q31.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_negate_q31.c    
-*    
-* Description:	Negates Q31 vectors.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup negate    
- * @{    
- */
-
-/**    
- * @brief  Negates the elements of a Q31 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.    
- */
-
-void arm_negate_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t in;                                      /* Temporary variable */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = __QSUB(0, in1);
-    *pDst++ = __QSUB(0, in2);
-    *pDst++ = __QSUB(0, in3);
-    *pDst++ = __QSUB(0, in4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the result in the destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of negate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c
deleted file mode 100644
index 8ceec6a8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_negate_q7.c
+++ /dev/null
@@ -1,125 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_negate_q7.c    
-*    
-* Description:	Negates Q7 vectors.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup negate    
- * @{    
- */
-
-/**    
- * @brief  Negates the elements of a Q7 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.    
- */
-
-void arm_negate_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q7_t in;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t input;                                   /* Input values1-4 */
-  q31_t zero = 0x00000000;
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Read four inputs */
-    input = *__SIMD32(pSrc)++;
-
-    /* Store the Negated results in the destination buffer in a single cycle by packing the results */
-    *__SIMD32(pDst)++ = __QSUB8(zero, input);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = -A */
-    /* Negate and then store the results in the destination buffer. */ \
-      in = *pSrc++;
-    *pDst++ = (in == (q7_t) 0x80) ? 0x7f : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of negate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c
deleted file mode 100644
index 0fc1f7f6..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_f32.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_offset_f32.c    
-*    
-* Description:	Floating-point vector offset.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup offset Vector Offset        
- *        
- * Adds a constant offset to each element of a vector.        
- *        
- * 
        
- *     pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.        
- * 
        
- *        
- * The functions support in-place computation allowing the source and
- * destination pointers to reference the same memory buffer.
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**        
- * @addtogroup offset        
- * @{        
- */
-
-/**        
- * @brief  Adds a constant offset to a floating-point vector.        
- * @param[in]  *pSrc points to the input vector        
- * @param[in]  offset is the offset to be added        
- * @param[out]  *pDst points to the output vector        
- * @param[in]  blockSize number of samples in the vector        
- * @return none.        
- */
-
-
-void arm_offset_f32(
-  float32_t * pSrc,
-  float32_t offset,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    /* read samples from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-
-    /* add offset to input */
-    in1 = in1 + offset;
-
-    /* read samples from source */
-    in3 = *(pSrc + 2);
-
-    /* add offset to input */
-    in2 = in2 + offset;
-
-    /* read samples from source */
-    in4 = *(pSrc + 3);
-
-    /* add offset to input */
-    in3 = in3 + offset;
-
-    /* store result to destination */
-    *pDst = in1;
-
-    /* add offset to input */
-    in4 = in4 + offset;
-
-    /* store result to destination */
-    *(pDst + 1) = in2;
-
-    /* store result to destination */
-    *(pDst + 2) = in3;
-
-    /* store result to destination */
-    *(pDst + 3) = in4;
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (*pSrc++) + offset;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of offset group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c
deleted file mode 100644
index 72ad128c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q15.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_offset_q15.c    
-*    
-* Description:	Q15 vector offset.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup offset    
- * @{    
- */
-
-/**    
- * @brief  Adds a constant offset to a Q15 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[in]  offset is the offset to be added    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.    
- */
-
-void arm_offset_q15(
-  q15_t * pSrc,
-  q15_t offset,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t offset_packed;                           /* Offset packed to 32 bit */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
-  offset_packed = __PKHBT(offset, offset, 16);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer, 2 samples at a time. */
-    *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
-    *__SIMD32(pDst)++ = __QADD16(*__SIMD32(pSrc)++, offset_packed);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrc++ + offset), 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of offset group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c
deleted file mode 100644
index 376f22be..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q31.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_offset_q31.c    
-*    
-* Description:	Q31 vector offset.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup offset    
- * @{    
- */
-
-/**    
- * @brief  Adds a constant offset to a Q31 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[in]  offset is the offset to be added    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.    
- */
-
-void arm_offset_q31(
-  q31_t * pSrc,
-  q31_t offset,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination buffer. */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = __QADD(in1, offset);
-    *pDst++ = __QADD(in2, offset);
-    *pDst++ = __QADD(in3, offset);
-    *pDst++ = __QADD(in4, offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = __QADD(*pSrc++, offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of offset group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c
deleted file mode 100644
index 726a734b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_offset_q7.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_offset_q7.c    
-*    
-* Description:	Q7 vector offset.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup offset    
- * @{    
- */
-
-/**    
- * @brief  Adds a constant offset to a Q7 vector.    
- * @param[in]  *pSrc points to the input vector    
- * @param[in]  offset is the offset to be added    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] are saturated.    
- */
-
-void arm_offset_q7(
-  q7_t * pSrc,
-  q7_t offset,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t offset_packed;                           /* Offset packed to 32 bit */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
-  offset_packed = __PACKq7(offset, offset, offset, offset);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the results in the destination bufferfor 4 samples at a time. */
-    *__SIMD32(pDst)++ = __QADD8(*__SIMD32(pSrc)++, offset_packed);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A + offset */
-    /* Add offset and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) * pSrc++ + offset, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of offset group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c
deleted file mode 100644
index 73edd7db..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_f32.c
+++ /dev/null
@@ -1,169 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_scale_f32.c    
-*    
-* Description:	Multiplies a floating-point vector by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup scale Vector Scale        
- *        
- * Multiply a vector by a scalar value.  For floating-point data, the algorithm used is:        
- *        
- * 
        
- *     pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.        
- * 
        
- *        
- * In the fixed-point Q7, Q15, and Q31 functions, scale is represented by        
- * a fractional multiplication scaleFract and an arithmetic shift shift.        
- * The shift allows the gain of the scaling operation to exceed 1.0.        
- * The algorithm used with fixed-point data is:        
- *        
- * 
        
- *     pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.        
- * 
        
- *        
- * The overall scale factor applied to the fixed-point data is        
- * 
        
- *     scale = scaleFract * 2^shift.        
- * 
        
- *
- * The functions support in-place computation allowing the source and destination
- * pointers to reference the same memory buffer.
- */
-
-/**        
- * @addtogroup scale        
- * @{        
- */
-
-/**        
- * @brief Multiplies a floating-point vector by a scalar.        
- * @param[in]       *pSrc points to the input vector        
- * @param[in]       scale scale factor to be applied        
- * @param[out]      *pDst points to the output vector        
- * @param[in]       blockSize number of samples in the vector        
- * @return none.        
- */
-
-
-void arm_scale_f32(
-  float32_t * pSrc,
-  float32_t scale,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;                  /* temporary variabels */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A * scale */
-    /* Scale the input and then store the results in the destination buffer. */
-    /* read input samples from source */
-    in1 = *pSrc;
-    in2 = *(pSrc + 1);
-
-    /* multiply with scaling factor */
-    in1 = in1 * scale;
-
-    /* read input sample from source */
-    in3 = *(pSrc + 2);
-
-    /* multiply with scaling factor */
-    in2 = in2 * scale;
-
-    /* read input sample from source */
-    in4 = *(pSrc + 3);
-
-    /* multiply with scaling factor */
-    in3 = in3 * scale;
-    in4 = in4 * scale;
-    /* store the result to destination */
-    *pDst = in1;
-    *(pDst + 1) = in2;
-    *(pDst + 2) = in3;
-    *(pDst + 3) = in4;
-
-    /* update pointers to process next samples */
-    pSrc += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (*pSrc++) * scale;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of scale group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c
deleted file mode 100644
index 7071c77b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q15.c
+++ /dev/null
@@ -1,162 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_scale_q15.c    
-*    
-* Description:	Multiplies a Q15 vector by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup scale    
- * @{    
- */
-
-/**    
- * @brief Multiplies a Q15 vector by a scalar.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       scaleFract fractional portion of the scale value    
- * @param[in]       shift number of bits to shift the result by    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in the vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The input data *pSrc and scaleFract are in 1.15 format.    
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.    
- */
-
-
-void arm_scale_q15(
-  q15_t * pSrc,
-  q15_t scaleFract,
-  int8_t shift,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  int8_t kShift = 15 - shift;                    /* shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q15_t in1, in2, in3, in4;
-  q31_t inA1, inA2;                              /* Temporary variables */
-  q31_t out1, out2, out3, out4;
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Reading 2 inputs from memory */
-    inA1 = *__SIMD32(pSrc)++;
-    inA2 = *__SIMD32(pSrc)++;
-
-    /* C = A * scale */
-    /* Scale the inputs and then store the 2 results in the destination buffer        
-     * in single cycle by packing the outputs */
-    out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
-    out2 = (q31_t) ((q15_t) inA1 * scaleFract);
-    out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
-    out4 = (q31_t) ((q15_t) inA2 * scaleFract);
-
-    /* apply shifting */
-    out1 = out1 >> kShift;
-    out2 = out2 >> kShift;
-    out3 = out3 >> kShift;
-    out4 = out4 >> kShift;
-
-    /* saturate the output */
-    in1 = (q15_t) (__SSAT(out1, 16));
-    in2 = (q15_t) (__SSAT(out2, 16));
-    in3 = (q15_t) (__SSAT(out3, 16));
-    in4 = (q15_t) (__SSAT(out4, 16));
-
-    /* store the result to destination */
-    *__SIMD32(pDst)++ = __PKHBT(in2, in1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(in4, in3, 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT(((q31_t) * pSrc++ * scaleFract) >> kShift, 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of scale group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c
deleted file mode 100644
index bd8b96cf..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q31.c
+++ /dev/null
@@ -1,239 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_scale_q31.c    
-*    
-* Description:	Multiplies a Q31 vector by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
- * @ingroup groupMath       
- */
-
-/**       
- * @addtogroup scale       
- * @{       
- */
-
-/**       
- * @brief Multiplies a Q31 vector by a scalar.       
- * @param[in]       *pSrc points to the input vector       
- * @param[in]       scaleFract fractional portion of the scale value       
- * @param[in]       shift number of bits to shift the result by       
- * @param[out]      *pDst points to the output vector       
- * @param[in]       blockSize number of samples in the vector       
- * @return none.       
- *       
- * Scaling and Overflow Behavior:       
- * \par       
- * The input data *pSrc and scaleFract are in 1.31 format.       
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.       
- */
-
-void arm_scale_q31(
-  q31_t * pSrc,
-  q31_t scaleFract,
-  int8_t shift,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  int8_t kShift = shift + 1;                     /* Shift to apply after scaling */
-  int8_t sign = (kShift & 0x80);
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in, out;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2, in3, in4;                      /* temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* temporary output variabels */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  if(sign == 0u)
-  {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* read four inputs from source */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
-
-      /* multiply input with scaler value */
-      in1 = ((q63_t) in1 * scaleFract) >> 32;
-      in2 = ((q63_t) in2 * scaleFract) >> 32;
-      in3 = ((q63_t) in3 * scaleFract) >> 32;
-      in4 = ((q63_t) in4 * scaleFract) >> 32;
-
-      /* apply shifting */
-      out1 = in1 << kShift;
-      out2 = in2 << kShift;
-
-      /* saturate the results. */
-      if(in1 != (out1 >> kShift))
-        out1 = 0x7FFFFFFF ^ (in1 >> 31);
-
-      if(in2 != (out2 >> kShift))
-        out2 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      out3 = in3 << kShift;
-      out4 = in4 << kShift;
-
-      *pDst = out1;
-      *(pDst + 1) = out2;
-
-      if(in3 != (out3 >> kShift))
-        out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
-      if(in4 != (out4 >> kShift))
-        out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
-      /* Store result destination */
-      *(pDst + 2) = out3;
-      *(pDst + 3) = out4;
-
-      /* Update pointers to process next sampels */
-      pSrc += 4u;
-      pDst += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-  }
-  else
-  {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* read four inputs from source */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
-
-      /* multiply input with scaler value */
-      in1 = ((q63_t) in1 * scaleFract) >> 32;
-      in2 = ((q63_t) in2 * scaleFract) >> 32;
-      in3 = ((q63_t) in3 * scaleFract) >> 32;
-      in4 = ((q63_t) in4 * scaleFract) >> 32;
-
-      /* apply shifting */
-      out1 = in1 >> -kShift;
-      out2 = in2 >> -kShift;
-
-      out3 = in3 >> -kShift;
-      out4 = in4 >> -kShift;
-
-      /* Store result destination */
-      *pDst = out1;
-      *(pDst + 1) = out2;
-
-      *(pDst + 2) = out3;
-      *(pDst + 3) = out4;
-
-      /* Update pointers to process next sampels */
-      pSrc += 4u;
-      pDst += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  if(sign == 0)
-  {
-	  while(blkCnt > 0u)
-	  {
-		/* C = A * scale */
-		/* Scale the input and then store the result in the destination buffer. */
-		in = *pSrc++;
-		in = ((q63_t) in * scaleFract) >> 32;
-
-		out = in << kShift;
-		
-		if(in != (out >> kShift))
-			out = 0x7FFFFFFF ^ (in >> 31);
-
-		*pDst++ = out;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	  }
-  }
-  else
-  {
-	  while(blkCnt > 0u)
-	  {
-		/* C = A * scale */
-		/* Scale the input and then store the result in the destination buffer. */
-		in = *pSrc++;
-		in = ((q63_t) in * scaleFract) >> 32;
-
-		out = in >> -kShift;
-
-		*pDst++ = out;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	  }
-  
-  }
-}
-
-/**       
- * @} end of scale group       
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c
deleted file mode 100644
index c0f71b5c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_scale_q7.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_scale_q7.c    
-*    
-* Description:	Multiplies a Q7 vector by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup scale    
- * @{    
- */
-
-/**    
- * @brief Multiplies a Q7 vector by a scalar.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       scaleFract fractional portion of the scale value    
- * @param[in]       shift number of bits to shift the result by    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in the vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The input data *pSrc and scaleFract are in 1.7 format.    
- * These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.    
- */
-
-void arm_scale_q7(
-  q7_t * pSrc,
-  q7_t scaleFract,
-  int8_t shift,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  int8_t kShift = 7 - shift;                     /* shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q7_t in1, in2, in3, in4, out1, out2, out3, out4;      /* Temporary variables to store input & output */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Reading 4 inputs from memory */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    /* C = A * scale */
-    /* Scale the inputs and then store the results in the temporary variables. */
-    out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
-    out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
-    out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
-    out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
-
-    /* Packing the individual outputs into 32bit and storing in    
-     * destination buffer in single write */
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) (__SSAT(((*pSrc++) * scaleFract) >> kShift, 8));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A * scale */
-    /* Scale the input and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) (__SSAT((((q15_t) * pSrc++ * scaleFract) >> kShift), 8));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of scale group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c
deleted file mode 100644
index 6fee000c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q15.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_shift_q15.c    
-*    
-* Description:	Shifts the elements of a Q15 vector by a specified number of bits.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup shift    
- * @{    
- */
-
-/**    
- * @brief  Shifts the elements of a Q15 vector a specified number of bits.    
- * @param[in]  *pSrc points to the input vector    
- * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.    
- * @param[out]  *pDst points to the output vector    
- * @param[in]  blockSize number of samples in the vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_shift_q15(
-  q15_t * pSrc,
-  int8_t shiftBits,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  uint8_t sign;                                  /* Sign of shiftBits */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t in1, in2;                                /* Temporary variables */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Getting the sign of shiftBits */
-  sign = (shiftBits & 0x80);
-
-  /* If the shift value is positive then do right shift else left shift */
-  if(sign == 0u)
-  {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* Read 2 inputs */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-      /* C = A << shiftBits */
-      /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
-                                  __SSAT((in2 << shiftBits), 16), 16);
-
-#else
-
-      *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
-                                  __SSAT((in1 << shiftBits), 16), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pDst)++ = __PKHBT(__SSAT((in1 << shiftBits), 16),
-                                  __SSAT((in2 << shiftBits), 16), 16);
-
-#else
-
-      *__SIMD32(pDst)++ = __PKHBT(__SSAT((in2 << shiftBits), 16),
-                                  __SSAT((in1 << shiftBits), 16), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* C = A << shiftBits */
-      /* Shift and then store the results in the destination buffer. */
-      *pDst++ = __SSAT((*pSrc++ << shiftBits), 16);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* Read 2 inputs */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-      /* C = A >> shiftBits */
-      /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
-                                  (in2 >> -shiftBits), 16);
-
-#else
-
-      *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
-                                  (in1 >> -shiftBits), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pDst)++ = __PKHBT((in1 >> -shiftBits),
-                                  (in2 >> -shiftBits), 16);
-
-#else
-
-      *__SIMD32(pDst)++ = __PKHBT((in2 >> -shiftBits),
-                                  (in1 >> -shiftBits), 16);
-
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* C = A >> shiftBits */
-      /* Shift the inputs and then store the results in the destination buffer. */
-      *pDst++ = (*pSrc++ >> -shiftBits);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Getting the sign of shiftBits */
-  sign = (shiftBits & 0x80);
-
-  /* If the shift value is positive then do right shift else left shift */
-  if(sign == 0u)
-  {
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* C = A << shiftBits */
-      /* Shift and then store the results in the destination buffer. */
-      *pDst++ = __SSAT(((q31_t) * pSrc++ << shiftBits), 16);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* C = A >> shiftBits */
-      /* Shift the inputs and then store the results in the destination buffer. */
-      *pDst++ = (*pSrc++ >> -shiftBits);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of shift group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c
deleted file mode 100644
index e1bb5703..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q31.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_shift_q31.c    
-*    
-* Description:	Shifts the elements of a Q31 vector by a specified number of bits.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-/**        
- * @defgroup shift Vector Shift        
- *        
- * Shifts the elements of a fixed-point vector by a specified number of bits.        
- * There are separate functions for Q7, Q15, and Q31 data types.        
- * The underlying algorithm used is:        
- *        
- * 
        
- *     pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.        
- * 
        
- *        
- * If shift is positive then the elements of the vector are shifted to the left.        
- * If shift is negative then the elements of the vector are shifted to the right.        
- *
- * The functions support in-place computation allowing the source and destination
- * pointers to reference the same memory buffer.
- */
-
-/**        
- * @addtogroup shift        
- * @{        
- */
-
-/**        
- * @brief  Shifts the elements of a Q31 vector a specified number of bits.        
- * @param[in]  *pSrc points to the input vector        
- * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.        
- * @param[out]  *pDst points to the output vector        
- * @param[in]  blockSize number of samples in the vector        
- * @return none.        
- *        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.        
- */
-
-void arm_shift_q31(
-  q31_t * pSrc,
-  int8_t shiftBits,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t in1, in2, in3, in4;                      /* Temporary input variables */
-  q31_t out1, out2, out3, out4;                  /* Temporary output variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-
-  if(sign == 0u)
-  {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C = A  << shiftBits */
-      /* Shift the input and then store the results in the destination buffer. */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      out1 = in1 << shiftBits;
-      in3 = *(pSrc + 2);
-      out2 = in2 << shiftBits;
-      in4 = *(pSrc + 3);
-      if(in1 != (out1 >> shiftBits))
-        out1 = 0x7FFFFFFF ^ (in1 >> 31);
-
-      if(in2 != (out2 >> shiftBits))
-        out2 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      *pDst = out1;
-      out3 = in3 << shiftBits;
-      *(pDst + 1) = out2;
-      out4 = in4 << shiftBits;
-
-      if(in3 != (out3 >> shiftBits))
-        out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
-      if(in4 != (out4 >> shiftBits))
-        out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
-      *(pDst + 2) = out3;
-      *(pDst + 3) = out4;
-
-      /* Update destination pointer to process next sampels */
-      pSrc += 4u;
-      pDst += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C = A >>  shiftBits */
-      /* Shift the input and then store the results in the destination buffer. */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
-
-      *pDst = (in1 >> -shiftBits);
-      *(pDst + 1) = (in2 >> -shiftBits);
-      *(pDst + 2) = (in3 >> -shiftBits);
-      *(pDst + 3) = (in4 >> -shiftBits);
-
-
-      pSrc += 4u;
-      pDst += 4u;
-
-      blkCnt--;
-    }
-
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A (>> or <<) shiftBits */
-    /* Shift the input and then store the result in the destination buffer. */
-    *pDst++ = (sign == 0u) ? clip_q63_to_q31((q63_t) * pSrc++ << shiftBits) :
-      (*pSrc++ >> -shiftBits);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-}
-
-/**        
- * @} end of shift group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c
deleted file mode 100644
index 20ae427d..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_shift_q7.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_shift_q7.c    
-*    
-* Description:	Processing function for the Q7 Shifting    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @addtogroup shift        
- * @{        
- */
-
-
-/**        
- * @brief  Shifts the elements of a Q7 vector a specified number of bits.        
- * @param[in]  *pSrc points to the input vector        
- * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.        
- * @param[out]  *pDst points to the output vector        
- * @param[in]  blockSize number of samples in the vector        
- * @return none.        
- *    
- * \par Conditions for optimum performance    
- *  Input and output buffers should be aligned by 32-bit    
- *    
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * Results outside of the allowable Q7 range [0x8 0x7F] will be saturated.        
- */
-
-void arm_shift_q7(
-  q7_t * pSrc,
-  int8_t shiftBits,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  uint8_t sign;                                  /* Sign of shiftBits */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q7_t in1;                                      /* Input value1 */
-  q7_t in2;                                      /* Input value2 */
-  q7_t in3;                                      /* Input value3 */
-  q7_t in4;                                      /* Input value4 */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Getting the sign of shiftBits */
-  sign = (shiftBits & 0x80);
-
-  /* If the shift value is positive then do right shift else left shift */
-  if(sign == 0u)
-  {
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C = A << shiftBits */
-      /* Read 4 inputs */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
-
-      /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
-      *__SIMD32(pDst)++ = __PACKq7(__SSAT((in1 << shiftBits), 8),
-                                   __SSAT((in2 << shiftBits), 8),
-                                   __SSAT((in3 << shiftBits), 8),
-                                   __SSAT((in4 << shiftBits), 8));
-      /* Update source pointer to process next sampels */
-      pSrc += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* C = A << shiftBits */
-      /* Shift the input and then store the result in the destination buffer. */
-      *pDst++ = (q7_t) __SSAT((*pSrc++ << shiftBits), 8);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    shiftBits = -shiftBits;
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C = A >> shiftBits */
-      /* Read 4 inputs */
-      in1 = *pSrc;
-      in2 = *(pSrc + 1);
-      in3 = *(pSrc + 2);
-      in4 = *(pSrc + 3);
-
-      /* Store the Shifted result in the destination buffer in single cycle by packing the outputs */
-      *__SIMD32(pDst)++ = __PACKq7((in1 >> shiftBits), (in2 >> shiftBits),
-                                   (in3 >> shiftBits), (in4 >> shiftBits));
-
-
-      pSrc += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* C = A >> shiftBits */
-      /* Shift the input and then store the result in the destination buffer. */
-      in1 = *pSrc++;
-      *pDst++ = (in1 >> shiftBits);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Getting the sign of shiftBits */
-  sign = (shiftBits & 0x80);
-
-  /* If the shift value is positive then do right shift else left shift */
-  if(sign == 0u)
-  {
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* C = A << shiftBits */
-      /* Shift the input and then store the result in the destination buffer. */
-      *pDst++ = (q7_t) __SSAT(((q15_t) * pSrc++ << shiftBits), 8);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* C = A >> shiftBits */
-      /* Shift the input and then store the result in the destination buffer. */
-      *pDst++ = (*pSrc++ >> -shiftBits);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-}
-
-/**        
- * @} end of shift group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c
deleted file mode 100644
index 90ad37a5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_f32.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sub_f32.c    
-*    
-* Description:	Floating-point vector subtraction.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMath        
- */
-
-/**        
- * @defgroup BasicSub Vector Subtraction        
- *        
- * Element-by-element subtraction of two vectors.        
- *        
- * 
        
- *     pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.        
- * 
        
- *        
- * There are separate functions for floating-point, Q7, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup BasicSub        
- * @{        
- */
-
-
-/**        
- * @brief Floating-point vector subtraction.        
- * @param[in]       *pSrcA points to the first input vector        
- * @param[in]       *pSrcB points to the second input vector        
- * @param[out]      *pDst points to the output vector        
- * @param[in]       blockSize number of samples in each vector        
- * @return none.        
- */
-
-void arm_sub_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* temporary variables */
-  float32_t inB1, inB2, inB3, inB4;              /* temporary variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the results in the destination buffer. */
-    /* Read 4 input samples from sourceA and sourceB */
-    inA1 = *pSrcA;
-    inB1 = *pSrcB;
-    inA2 = *(pSrcA + 1);
-    inB2 = *(pSrcB + 1);
-    inA3 = *(pSrcA + 2);
-    inB3 = *(pSrcB + 2);
-    inA4 = *(pSrcA + 3);
-    inB4 = *(pSrcB + 3);
-
-    /* dst = srcA - srcB */
-    /* subtract and store the result */
-    *pDst = inA1 - inB1;
-    *(pDst + 1) = inA2 - inB2;
-    *(pDst + 2) = inA3 - inB3;
-    *(pDst + 3) = inA4 - inB4;
-
-
-    /* Update pointers to process next sampels */
-    pSrcA += 4u;
-    pSrcB += 4u;
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the results in the destination buffer. */
-    *pDst++ = (*pSrcA++) - (*pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of BasicSub group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c
deleted file mode 100644
index 1f66b6db..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q15.c
+++ /dev/null
@@ -1,140 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sub_q15.c    
-*    
-* Description:	Q15 vector subtraction.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicSub    
- * @{    
- */
-
-/**    
- * @brief Q15 vector subtraction.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_sub_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2;
-  q31_t inB1, inB2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the results in the destination buffer two samples at a time. */
-    inA1 = *__SIMD32(pSrcA)++;
-    inA2 = *__SIMD32(pSrcA)++;
-    inB1 = *__SIMD32(pSrcB)++;
-    inB2 = *__SIMD32(pSrcB)++;
-
-    *__SIMD32(pDst)++ = __QSUB16(inA1, inB1);
-    *__SIMD32(pDst)++ = __QSUB16(inA2, inB2);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT(((q31_t) * pSrcA++ - *pSrcB++), 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**    
- * @} end of BasicSub group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c
deleted file mode 100644
index e37f7907..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q31.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sub_q31.c    
-*    
-* Description:	Q31 vector subtraction.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicSub    
- * @{    
- */
-
-/**    
- * @brief Q31 vector subtraction.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_sub_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inA1, inA2, inA3, inA4;
-  q31_t inB1, inB2, inB3, inB4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the results in the destination buffer. */
-    inA1 = *pSrcA++;
-    inA2 = *pSrcA++;
-    inB1 = *pSrcB++;
-    inB2 = *pSrcB++;
-
-    inA3 = *pSrcA++;
-    inA4 = *pSrcA++;
-    inB3 = *pSrcB++;
-    inB4 = *pSrcB++;
-
-    *pDst++ = __QSUB(inA1, inB1);
-    *pDst++ = __QSUB(inA2, inB2);
-    *pDst++ = __QSUB(inA3, inB3);
-    *pDst++ = __QSUB(inA4, inB4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrcA++ - *pSrcB++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of BasicSub group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c b/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c
deleted file mode 100644
index 00ce32bd..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_sub_q7.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sub_q7.c    
-*    
-* Description:	Q7 vector subtraction.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMath    
- */
-
-/**    
- * @addtogroup BasicSub    
- * @{    
- */
-
-/**    
- * @brief Q7 vector subtraction.    
- * @param[in]       *pSrcA points to the first input vector    
- * @param[in]       *pSrcB points to the second input vector    
- * @param[out]      *pDst points to the output vector    
- * @param[in]       blockSize number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
- */
-
-void arm_sub_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the results in the destination buffer 4 samples at a time. */
-    *__SIMD32(pDst)++ = __QSUB8(*__SIMD32(pSrcA)++, *__SIMD32(pSrcB)++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = __SSAT(*pSrcA++ - *pSrcB++, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A - B */
-    /* Subtract and then store the result in the destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) * pSrcA++ - *pSrcB++, 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**    
- * @} end of BasicSub group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c b/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c
deleted file mode 100644
index 4debe4bc..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_common_tables.c
+++ /dev/null
@@ -1,27251 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_common_tables.c    
-*    
-* Description:	This file has common tables like fft twiddle factors, Bitreverse, reciprocal etc which are used across different functions    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup CFFT_CIFFT Complex FFT Tables  
- * @{    
- */
-
-/**    
-* \par    
-* Pseudo code for Generation of Bit reversal Table is    
-* \par    
-* 
for(l=1;l <= N/4;l++)    
-* {    
-*   for(i=0;i> 1;    
-*  } 
    
-* \par    
-* where N = 4096	logN2 = 12   
-* \par    
-* N is the maximum FFT Size supported    
-*/
-
-/*    
-* @brief  Table for bit reversal process    
-*/
-const uint16_t armBitRevTable[1024] = {
-   0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x80, 0x480, 0x280, 
-   0x680, 0x180, 0x580, 0x380, 0x780, 0x40, 0x440, 0x240, 0x640, 0x140, 
-   0x540, 0x340, 0x740, 0xc0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0, 
-   0x7c0, 0x20, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0xa0, 
-   0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x60, 0x460, 0x260, 
-   0x660, 0x160, 0x560, 0x360, 0x760, 0xe0, 0x4e0, 0x2e0, 0x6e0, 0x1e0, 
-   0x5e0, 0x3e0, 0x7e0, 0x10, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310, 
-   0x710, 0x90, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x50, 
-   0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0xd0, 0x4d0, 0x2d0, 
-   0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x30, 0x430, 0x230, 0x630, 0x130, 
-   0x530, 0x330, 0x730, 0xb0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0, 
-   0x7b0, 0x70, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0xf0, 
-   0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x8, 0x408, 0x208, 
-   0x608, 0x108, 0x508, 0x308, 0x708, 0x88, 0x488, 0x288, 0x688, 0x188, 
-   0x588, 0x388, 0x788, 0x48, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348, 
-   0x748, 0xc8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x28, 
-   0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0xa8, 0x4a8, 0x2a8, 
-   0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x68, 0x468, 0x268, 0x668, 0x168, 
-   0x568, 0x368, 0x768, 0xe8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8, 
-   0x7e8, 0x18, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x98, 
-   0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x58, 0x458, 0x258, 
-   0x658, 0x158, 0x558, 0x358, 0x758, 0xd8, 0x4d8, 0x2d8, 0x6d8, 0x1d8, 
-   0x5d8, 0x3d8, 0x7d8, 0x38, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338, 
-   0x738, 0xb8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x78, 
-   0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0xf8, 0x4f8, 0x2f8, 
-   0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x4, 0x404, 0x204, 0x604, 0x104, 
-   0x504, 0x304, 0x704, 0x84, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384, 
-   0x784, 0x44, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0xc4, 
-   0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x24, 0x424, 0x224, 
-   0x624, 0x124, 0x524, 0x324, 0x724, 0xa4, 0x4a4, 0x2a4, 0x6a4, 0x1a4, 
-   0x5a4, 0x3a4, 0x7a4, 0x64, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364, 
-   0x764, 0xe4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x14, 
-   0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x94, 0x494, 0x294, 
-   0x694, 0x194, 0x594, 0x394, 0x794, 0x54, 0x454, 0x254, 0x654, 0x154, 
-   0x554, 0x354, 0x754, 0xd4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4, 
-   0x7d4, 0x34, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0xb4, 
-   0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x74, 0x474, 0x274, 
-   0x674, 0x174, 0x574, 0x374, 0x774, 0xf4, 0x4f4, 0x2f4, 0x6f4, 0x1f4, 
-   0x5f4, 0x3f4, 0x7f4, 0xc, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c, 
-   0x70c, 0x8c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x4c, 
-   0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0xcc, 0x4cc, 0x2cc, 
-   0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x2c, 0x42c, 0x22c, 0x62c, 0x12c, 
-   0x52c, 0x32c, 0x72c, 0xac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac, 
-   0x7ac, 0x6c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0xec, 
-   0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x1c, 0x41c, 0x21c, 
-   0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x9c, 0x49c, 0x29c, 0x69c, 0x19c, 
-   0x59c, 0x39c, 0x79c, 0x5c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c, 
-   0x75c, 0xdc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x3c, 
-   0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0xbc, 0x4bc, 0x2bc, 
-   0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x7c, 0x47c, 0x27c, 0x67c, 0x17c, 
-   0x57c, 0x37c, 0x77c, 0xfc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc, 
-   0x7fc, 0x2, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x82, 
-   0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x42, 0x442, 0x242, 
-   0x642, 0x142, 0x542, 0x342, 0x742, 0xc2, 0x4c2, 0x2c2, 0x6c2, 0x1c2, 
-   0x5c2, 0x3c2, 0x7c2, 0x22, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322, 
-   0x722, 0xa2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x62, 
-   0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0xe2, 0x4e2, 0x2e2, 
-   0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x12, 0x412, 0x212, 0x612, 0x112, 
-   0x512, 0x312, 0x712, 0x92, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392, 
-   0x792, 0x52, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0xd2, 
-   0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x32, 0x432, 0x232, 
-   0x632, 0x132, 0x532, 0x332, 0x732, 0xb2, 0x4b2, 0x2b2, 0x6b2, 0x1b2, 
-   0x5b2, 0x3b2, 0x7b2, 0x72, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372, 
-   0x772, 0xf2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0xa, 
-   0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x8a, 0x48a, 0x28a, 
-   0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x4a, 0x44a, 0x24a, 0x64a, 0x14a, 
-   0x54a, 0x34a, 0x74a, 0xca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca, 
-   0x7ca, 0x2a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0xaa, 
-   0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x6a, 0x46a, 0x26a, 
-   0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0xea, 0x4ea, 0x2ea, 0x6ea, 0x1ea, 
-   0x5ea, 0x3ea, 0x7ea, 0x1a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a, 
-   0x71a, 0x9a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a, 
-   0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0xda, 0x4da, 0x2da, 
-   0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x3a, 0x43a, 0x23a, 0x63a, 0x13a, 
-   0x53a, 0x33a, 0x73a, 0xba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba, 
-   0x7ba, 0x7a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0xfa, 
-   0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x6, 0x406, 0x206, 
-   0x606, 0x106, 0x506, 0x306, 0x706, 0x86, 0x486, 0x286, 0x686, 0x186, 
-   0x586, 0x386, 0x786, 0x46, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346, 
-   0x746, 0xc6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x26, 
-   0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0xa6, 0x4a6, 0x2a6, 
-   0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x66, 0x466, 0x266, 0x666, 0x166, 
-   0x566, 0x366, 0x766, 0xe6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6, 
-   0x7e6, 0x16, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x96, 
-   0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x56, 0x456, 0x256, 
-   0x656, 0x156, 0x556, 0x356, 0x756, 0xd6, 0x4d6, 0x2d6, 0x6d6, 0x1d6, 
-   0x5d6, 0x3d6, 0x7d6, 0x36, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336, 
-   0x736, 0xb6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x76, 
-   0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0xf6, 0x4f6, 0x2f6, 
-   0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0xe, 0x40e, 0x20e, 0x60e, 0x10e, 
-   0x50e, 0x30e, 0x70e, 0x8e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e, 
-   0x78e, 0x4e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0xce, 
-   0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x2e, 0x42e, 0x22e, 
-   0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0xae, 0x4ae, 0x2ae, 0x6ae, 0x1ae, 
-   0x5ae, 0x3ae, 0x7ae, 0x6e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e, 
-   0x76e, 0xee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x1e, 
-   0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x9e, 0x49e, 0x29e, 
-   0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x5e, 0x45e, 0x25e, 0x65e, 0x15e, 
-   0x55e, 0x35e, 0x75e, 0xde, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de, 
-   0x7de, 0x3e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0xbe, 
-   0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x7e, 0x47e, 0x27e, 
-   0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0xfe, 0x4fe, 0x2fe, 0x6fe, 0x1fe, 
-   0x5fe, 0x3fe, 0x7fe, 0x1 
-};
-
-
-/*    
-* @brief  Floating-point Twiddle factors Table Generation    
-*/
-
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 16	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-const float32_t twiddleCoef_16[32] = {
-    1.000000000f,  0.000000000f,
-    0.923879533f,  0.382683432f,
-    0.707106781f,  0.707106781f,
-    0.382683432f,  0.923879533f,
-    0.000000000f,  1.000000000f,
-   -0.382683432f,  0.923879533f,
-   -0.707106781f,  0.707106781f,
-   -0.923879533f,  0.382683432f,
-   -1.000000000f,  0.000000000f,
-   -0.923879533f, -0.382683432f,
-   -0.707106781f, -0.707106781f,
-   -0.382683432f, -0.923879533f,
-   -0.000000000f, -1.000000000f,
-    0.382683432f, -0.923879533f,
-    0.707106781f, -0.707106781f,
-    0.923879533f, -0.382683432f
-};
-
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 32	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-const float32_t twiddleCoef_32[64] = {
-    1.000000000f,  0.000000000f,
-    0.980785280f,  0.195090322f,
-    0.923879533f,  0.382683432f,
-    0.831469612f,  0.555570233f,
-    0.707106781f,  0.707106781f,
-    0.555570233f,  0.831469612f,
-    0.382683432f,  0.923879533f,
-    0.195090322f,  0.980785280f,
-    0.000000000f,  1.000000000f,
-   -0.195090322f,  0.980785280f,
-   -0.382683432f,  0.923879533f,
-   -0.555570233f,  0.831469612f,
-   -0.707106781f,  0.707106781f,
-   -0.831469612f,  0.555570233f,
-   -0.923879533f,  0.382683432f,
-   -0.980785280f,  0.195090322f,
-   -1.000000000f,  0.000000000f,
-   -0.980785280f, -0.195090322f,
-   -0.923879533f, -0.382683432f,
-   -0.831469612f, -0.555570233f,
-   -0.707106781f, -0.707106781f,
-   -0.555570233f, -0.831469612f,
-   -0.382683432f, -0.923879533f,
-   -0.195090322f, -0.980785280f,
-   -0.000000000f, -1.000000000f,
-    0.195090322f, -0.980785280f,
-    0.382683432f, -0.923879533f,
-    0.555570233f, -0.831469612f,
-    0.707106781f, -0.707106781f,
-    0.831469612f, -0.555570233f,
-    0.923879533f, -0.382683432f,
-    0.980785280f, -0.195090322f
-};
-
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 64	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-const float32_t twiddleCoef_64[128] = {
-    1.000000000f,  0.000000000f,
-    0.995184727f,  0.098017140f,
-    0.980785280f,  0.195090322f,
-    0.956940336f,  0.290284677f,
-    0.923879533f,  0.382683432f,
-    0.881921264f,  0.471396737f,
-    0.831469612f,  0.555570233f,
-    0.773010453f,  0.634393284f,
-    0.707106781f,  0.707106781f,
-    0.634393284f,  0.773010453f,
-    0.555570233f,  0.831469612f,
-    0.471396737f,  0.881921264f,
-    0.382683432f,  0.923879533f,
-    0.290284677f,  0.956940336f,
-    0.195090322f,  0.980785280f,
-    0.098017140f,  0.995184727f,
-    0.000000000f,  1.000000000f,
-   -0.098017140f,  0.995184727f,
-   -0.195090322f,  0.980785280f,
-   -0.290284677f,  0.956940336f,
-   -0.382683432f,  0.923879533f,
-   -0.471396737f,  0.881921264f,
-   -0.555570233f,  0.831469612f,
-   -0.634393284f,  0.773010453f,
-   -0.707106781f,  0.707106781f,
-   -0.773010453f,  0.634393284f,
-   -0.831469612f,  0.555570233f,
-   -0.881921264f,  0.471396737f,
-   -0.923879533f,  0.382683432f,
-   -0.956940336f,  0.290284677f,
-   -0.980785280f,  0.195090322f,
-   -0.995184727f,  0.098017140f,
-   -1.000000000f,  0.000000000f,
-   -0.995184727f, -0.098017140f,
-   -0.980785280f, -0.195090322f,
-   -0.956940336f, -0.290284677f,
-   -0.923879533f, -0.382683432f,
-   -0.881921264f, -0.471396737f,
-   -0.831469612f, -0.555570233f,
-   -0.773010453f, -0.634393284f,
-   -0.707106781f, -0.707106781f,
-   -0.634393284f, -0.773010453f,
-   -0.555570233f, -0.831469612f,
-   -0.471396737f, -0.881921264f,
-   -0.382683432f, -0.923879533f,
-   -0.290284677f, -0.956940336f,
-   -0.195090322f, -0.980785280f,
-   -0.098017140f, -0.995184727f,
-   -0.000000000f, -1.000000000f,
-    0.098017140f, -0.995184727f,
-    0.195090322f, -0.980785280f,
-    0.290284677f, -0.956940336f,
-    0.382683432f, -0.923879533f,
-    0.471396737f, -0.881921264f,
-    0.555570233f, -0.831469612f,
-    0.634393284f, -0.773010453f,
-    0.707106781f, -0.707106781f,
-    0.773010453f, -0.634393284f,
-    0.831469612f, -0.555570233f,
-    0.881921264f, -0.471396737f,
-    0.923879533f, -0.382683432f,
-    0.956940336f, -0.290284677f,
-    0.980785280f, -0.195090322f,
-    0.995184727f, -0.098017140f
-};
-
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 128	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-
-const float32_t twiddleCoef_128[256] = {
-    1.000000000f	,	0.000000000f	,
-    0.998795456f	,	0.049067674f	,
-    0.995184727f	,	0.098017140f	,
-    0.989176510f	,	0.146730474f	,
-    0.980785280f	,	0.195090322f	,
-    0.970031253f	,	0.242980180f	,
-    0.956940336f	,	0.290284677f	,
-    0.941544065f	,	0.336889853f	,
-    0.923879533f	,	0.382683432f	,
-    0.903989293f	,	0.427555093f	,
-    0.881921264f	,	0.471396737f	,
-    0.857728610f	,	0.514102744f	,
-    0.831469612f	,	0.555570233f	,
-    0.803207531f	,	0.595699304f	,
-    0.773010453f	,	0.634393284f	,
-    0.740951125f	,	0.671558955f	,
-    0.707106781f	,	0.707106781f	,
-    0.671558955f	,	0.740951125f	,
-    0.634393284f	,	0.773010453f	,
-    0.595699304f	,	0.803207531f	,
-    0.555570233f	,	0.831469612f	,
-    0.514102744f	,	0.857728610f	,
-    0.471396737f	,	0.881921264f	,
-    0.427555093f	,	0.903989293f	,
-    0.382683432f	,	0.923879533f	,
-    0.336889853f	,	0.941544065f	,
-    0.290284677f	,	0.956940336f	,
-    0.242980180f	,	0.970031253f	,
-    0.195090322f	,	0.980785280f	,
-    0.146730474f	,	0.989176510f	,
-    0.098017140f	,	0.995184727f	,
-    0.049067674f	,	0.998795456f	,
-    0.000000000f	,	1.000000000f	,
-    -0.049067674f	,	0.998795456f	,
-    -0.098017140f	,	0.995184727f	,
-    -0.146730474f	,	0.989176510f	,
-    -0.195090322f	,	0.980785280f	,
-    -0.242980180f	,	0.970031253f	,
-    -0.290284677f	,	0.956940336f	,
-    -0.336889853f	,	0.941544065f	,
-    -0.382683432f	,	0.923879533f	,
-    -0.427555093f	,	0.903989293f	,
-    -0.471396737f	,	0.881921264f	,
-    -0.514102744f	,	0.857728610f	,
-    -0.555570233f	,	0.831469612f	,
-    -0.595699304f	,	0.803207531f	,
-    -0.634393284f	,	0.773010453f	,
-    -0.671558955f	,	0.740951125f	,
-    -0.707106781f	,	0.707106781f	,
-    -0.740951125f	,	0.671558955f	,
-    -0.773010453f	,	0.634393284f	,
-    -0.803207531f	,	0.595699304f	,
-    -0.831469612f	,	0.555570233f	,
-    -0.857728610f	,	0.514102744f	,
-    -0.881921264f	,	0.471396737f	,
-    -0.903989293f	,	0.427555093f	,
-    -0.923879533f	,	0.382683432f	,
-    -0.941544065f	,	0.336889853f	,
-    -0.956940336f	,	0.290284677f	,
-    -0.970031253f	,	0.242980180f	,
-    -0.980785280f	,	0.195090322f	,
-    -0.989176510f	,	0.146730474f	,
-    -0.995184727f	,	0.098017140f	,
-    -0.998795456f	,	0.049067674f	,
-    -1.000000000f	,	0.000000000f	,
-    -0.998795456f	,	-0.049067674f	,
-    -0.995184727f	,	-0.098017140f	,
-    -0.989176510f	,	-0.146730474f	,
-    -0.980785280f	,	-0.195090322f	,
-    -0.970031253f	,	-0.242980180f	,
-    -0.956940336f	,	-0.290284677f	,
-    -0.941544065f	,	-0.336889853f	,
-    -0.923879533f	,	-0.382683432f	,
-    -0.903989293f	,	-0.427555093f	,
-    -0.881921264f	,	-0.471396737f	,
-    -0.857728610f	,	-0.514102744f	,
-    -0.831469612f	,	-0.555570233f	,
-    -0.803207531f	,	-0.595699304f	,
-    -0.773010453f	,	-0.634393284f	,
-    -0.740951125f	,	-0.671558955f	,
-    -0.707106781f	,	-0.707106781f	,
-    -0.671558955f	,	-0.740951125f	,
-    -0.634393284f	,	-0.773010453f	,
-    -0.595699304f	,	-0.803207531f	,
-    -0.555570233f	,	-0.831469612f	,
-    -0.514102744f	,	-0.857728610f	,
-    -0.471396737f	,	-0.881921264f	,
-    -0.427555093f	,	-0.903989293f	,
-    -0.382683432f	,	-0.923879533f	,
-    -0.336889853f	,	-0.941544065f	,
-    -0.290284677f	,	-0.956940336f	,
-    -0.242980180f	,	-0.970031253f	,
-    -0.195090322f	,	-0.980785280f	,
-    -0.146730474f	,	-0.989176510f	,
-    -0.098017140f	,	-0.995184727f	,
-    -0.049067674f	,	-0.998795456f	,
-    -0.000000000f	,	-1.000000000f	,
-    0.049067674f	,	-0.998795456f	,
-    0.098017140f	,	-0.995184727f	,
-    0.146730474f	,	-0.989176510f	,
-    0.195090322f	,	-0.980785280f	,
-    0.242980180f	,	-0.970031253f	,
-    0.290284677f	,	-0.956940336f	,
-    0.336889853f	,	-0.941544065f	,
-    0.382683432f	,	-0.923879533f	,
-    0.427555093f	,	-0.903989293f	,
-    0.471396737f	,	-0.881921264f	,
-    0.514102744f	,	-0.857728610f	,
-    0.555570233f	,	-0.831469612f	,
-    0.595699304f	,	-0.803207531f	,
-    0.634393284f	,	-0.773010453f	,
-    0.671558955f	,	-0.740951125f	,
-    0.707106781f	,	-0.707106781f	,
-    0.740951125f	,	-0.671558955f	,
-    0.773010453f	,	-0.634393284f	,
-    0.803207531f	,	-0.595699304f	,
-    0.831469612f	,	-0.555570233f	,
-    0.857728610f	,	-0.514102744f	,
-    0.881921264f	,	-0.471396737f	,
-    0.903989293f	,	-0.427555093f	,
-    0.923879533f	,	-0.382683432f	,
-    0.941544065f	,	-0.336889853f	,
-    0.956940336f	,	-0.290284677f	,
-    0.970031253f	,	-0.242980180f	,
-    0.980785280f	,	-0.195090322f	,
-    0.989176510f	,	-0.146730474f	,
-    0.995184727f	,	-0.098017140f	,
-    0.998795456f	,	-0.049067674f
-};
-
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 256	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-const float32_t twiddleCoef_256[512] = {
-    1.000000000f,  0.000000000f,
-    0.999698819f,  0.024541229f,
-    0.998795456f,  0.049067674f,
-    0.997290457f,  0.073564564f,
-    0.995184727f,  0.098017140f,
-    0.992479535f,  0.122410675f,
-    0.989176510f,  0.146730474f,
-    0.985277642f,  0.170961889f,
-    0.980785280f,  0.195090322f,
-    0.975702130f,  0.219101240f,
-    0.970031253f,  0.242980180f,
-    0.963776066f,  0.266712757f,
-    0.956940336f,  0.290284677f,
-    0.949528181f,  0.313681740f,
-    0.941544065f,  0.336889853f,
-    0.932992799f,  0.359895037f,
-    0.923879533f,  0.382683432f,
-    0.914209756f,  0.405241314f,
-    0.903989293f,  0.427555093f,
-    0.893224301f,  0.449611330f,
-    0.881921264f,  0.471396737f,
-    0.870086991f,  0.492898192f,
-    0.857728610f,  0.514102744f,
-    0.844853565f,  0.534997620f,
-    0.831469612f,  0.555570233f,
-    0.817584813f,  0.575808191f,
-    0.803207531f,  0.595699304f,
-    0.788346428f,  0.615231591f,
-    0.773010453f,  0.634393284f,
-    0.757208847f,  0.653172843f,
-    0.740951125f,  0.671558955f,
-    0.724247083f,  0.689540545f,
-    0.707106781f,  0.707106781f,
-    0.689540545f,  0.724247083f,
-    0.671558955f,  0.740951125f,
-    0.653172843f,  0.757208847f,
-    0.634393284f,  0.773010453f,
-    0.615231591f,  0.788346428f,
-    0.595699304f,  0.803207531f,
-    0.575808191f,  0.817584813f,
-    0.555570233f,  0.831469612f,
-    0.534997620f,  0.844853565f,
-    0.514102744f,  0.857728610f,
-    0.492898192f,  0.870086991f,
-    0.471396737f,  0.881921264f,
-    0.449611330f,  0.893224301f,
-    0.427555093f,  0.903989293f,
-    0.405241314f,  0.914209756f,
-    0.382683432f,  0.923879533f,
-    0.359895037f,  0.932992799f,
-    0.336889853f,  0.941544065f,
-    0.313681740f,  0.949528181f,
-    0.290284677f,  0.956940336f,
-    0.266712757f,  0.963776066f,
-    0.242980180f,  0.970031253f,
-    0.219101240f,  0.975702130f,
-    0.195090322f,  0.980785280f,
-    0.170961889f,  0.985277642f,
-    0.146730474f,  0.989176510f,
-    0.122410675f,  0.992479535f,
-    0.098017140f,  0.995184727f,
-    0.073564564f,  0.997290457f,
-    0.049067674f,  0.998795456f,
-    0.024541229f,  0.999698819f,
-    0.000000000f,  1.000000000f,
-   -0.024541229f,  0.999698819f,
-   -0.049067674f,  0.998795456f,
-   -0.073564564f,  0.997290457f,
-   -0.098017140f,  0.995184727f,
-   -0.122410675f,  0.992479535f,
-   -0.146730474f,  0.989176510f,
-   -0.170961889f,  0.985277642f,
-   -0.195090322f,  0.980785280f,
-   -0.219101240f,  0.975702130f,
-   -0.242980180f,  0.970031253f,
-   -0.266712757f,  0.963776066f,
-   -0.290284677f,  0.956940336f,
-   -0.313681740f,  0.949528181f,
-   -0.336889853f,  0.941544065f,
-   -0.359895037f,  0.932992799f,
-   -0.382683432f,  0.923879533f,
-   -0.405241314f,  0.914209756f,
-   -0.427555093f,  0.903989293f,
-   -0.449611330f,  0.893224301f,
-   -0.471396737f,  0.881921264f,
-   -0.492898192f,  0.870086991f,
-   -0.514102744f,  0.857728610f,
-   -0.534997620f,  0.844853565f,
-   -0.555570233f,  0.831469612f,
-   -0.575808191f,  0.817584813f,
-   -0.595699304f,  0.803207531f,
-   -0.615231591f,  0.788346428f,
-   -0.634393284f,  0.773010453f,
-   -0.653172843f,  0.757208847f,
-   -0.671558955f,  0.740951125f,
-   -0.689540545f,  0.724247083f,
-   -0.707106781f,  0.707106781f,
-   -0.724247083f,  0.689540545f,
-   -0.740951125f,  0.671558955f,
-   -0.757208847f,  0.653172843f,
-   -0.773010453f,  0.634393284f,
-   -0.788346428f,  0.615231591f,
-   -0.803207531f,  0.595699304f,
-   -0.817584813f,  0.575808191f,
-   -0.831469612f,  0.555570233f,
-   -0.844853565f,  0.534997620f,
-   -0.857728610f,  0.514102744f,
-   -0.870086991f,  0.492898192f,
-   -0.881921264f,  0.471396737f,
-   -0.893224301f,  0.449611330f,
-   -0.903989293f,  0.427555093f,
-   -0.914209756f,  0.405241314f,
-   -0.923879533f,  0.382683432f,
-   -0.932992799f,  0.359895037f,
-   -0.941544065f,  0.336889853f,
-   -0.949528181f,  0.313681740f,
-   -0.956940336f,  0.290284677f,
-   -0.963776066f,  0.266712757f,
-   -0.970031253f,  0.242980180f,
-   -0.975702130f,  0.219101240f,
-   -0.980785280f,  0.195090322f,
-   -0.985277642f,  0.170961889f,
-   -0.989176510f,  0.146730474f,
-   -0.992479535f,  0.122410675f,
-   -0.995184727f,  0.098017140f,
-   -0.997290457f,  0.073564564f,
-   -0.998795456f,  0.049067674f,
-   -0.999698819f,  0.024541229f,
-   -1.000000000f,  0.000000000f,
-   -0.999698819f, -0.024541229f,
-   -0.998795456f, -0.049067674f,
-   -0.997290457f, -0.073564564f,
-   -0.995184727f, -0.098017140f,
-   -0.992479535f, -0.122410675f,
-   -0.989176510f, -0.146730474f,
-   -0.985277642f, -0.170961889f,
-   -0.980785280f, -0.195090322f,
-   -0.975702130f, -0.219101240f,
-   -0.970031253f, -0.242980180f,
-   -0.963776066f, -0.266712757f,
-   -0.956940336f, -0.290284677f,
-   -0.949528181f, -0.313681740f,
-   -0.941544065f, -0.336889853f,
-   -0.932992799f, -0.359895037f,
-   -0.923879533f, -0.382683432f,
-   -0.914209756f, -0.405241314f,
-   -0.903989293f, -0.427555093f,
-   -0.893224301f, -0.449611330f,
-   -0.881921264f, -0.471396737f,
-   -0.870086991f, -0.492898192f,
-   -0.857728610f, -0.514102744f,
-   -0.844853565f, -0.534997620f,
-   -0.831469612f, -0.555570233f,
-   -0.817584813f, -0.575808191f,
-   -0.803207531f, -0.595699304f,
-   -0.788346428f, -0.615231591f,
-   -0.773010453f, -0.634393284f,
-   -0.757208847f, -0.653172843f,
-   -0.740951125f, -0.671558955f,
-   -0.724247083f, -0.689540545f,
-   -0.707106781f, -0.707106781f,
-   -0.689540545f, -0.724247083f,
-   -0.671558955f, -0.740951125f,
-   -0.653172843f, -0.757208847f,
-   -0.634393284f, -0.773010453f,
-   -0.615231591f, -0.788346428f,
-   -0.595699304f, -0.803207531f,
-   -0.575808191f, -0.817584813f,
-   -0.555570233f, -0.831469612f,
-   -0.534997620f, -0.844853565f,
-   -0.514102744f, -0.857728610f,
-   -0.492898192f, -0.870086991f,
-   -0.471396737f, -0.881921264f,
-   -0.449611330f, -0.893224301f,
-   -0.427555093f, -0.903989293f,
-   -0.405241314f, -0.914209756f,
-   -0.382683432f, -0.923879533f,
-   -0.359895037f, -0.932992799f,
-   -0.336889853f, -0.941544065f,
-   -0.313681740f, -0.949528181f,
-   -0.290284677f, -0.956940336f,
-   -0.266712757f, -0.963776066f,
-   -0.242980180f, -0.970031253f,
-   -0.219101240f, -0.975702130f,
-   -0.195090322f, -0.980785280f,
-   -0.170961889f, -0.985277642f,
-   -0.146730474f, -0.989176510f,
-   -0.122410675f, -0.992479535f,
-   -0.098017140f, -0.995184727f,
-   -0.073564564f, -0.997290457f,
-   -0.049067674f, -0.998795456f,
-   -0.024541229f, -0.999698819f,
-   -0.000000000f, -1.000000000f,
-    0.024541229f, -0.999698819f,
-    0.049067674f, -0.998795456f,
-    0.073564564f, -0.997290457f,
-    0.098017140f, -0.995184727f,
-    0.122410675f, -0.992479535f,
-    0.146730474f, -0.989176510f,
-    0.170961889f, -0.985277642f,
-    0.195090322f, -0.980785280f,
-    0.219101240f, -0.975702130f,
-    0.242980180f, -0.970031253f,
-    0.266712757f, -0.963776066f,
-    0.290284677f, -0.956940336f,
-    0.313681740f, -0.949528181f,
-    0.336889853f, -0.941544065f,
-    0.359895037f, -0.932992799f,
-    0.382683432f, -0.923879533f,
-    0.405241314f, -0.914209756f,
-    0.427555093f, -0.903989293f,
-    0.449611330f, -0.893224301f,
-    0.471396737f, -0.881921264f,
-    0.492898192f, -0.870086991f,
-    0.514102744f, -0.857728610f,
-    0.534997620f, -0.844853565f,
-    0.555570233f, -0.831469612f,
-    0.575808191f, -0.817584813f,
-    0.595699304f, -0.803207531f,
-    0.615231591f, -0.788346428f,
-    0.634393284f, -0.773010453f,
-    0.653172843f, -0.757208847f,
-    0.671558955f, -0.740951125f,
-    0.689540545f, -0.724247083f,
-    0.707106781f, -0.707106781f,
-    0.724247083f, -0.689540545f,
-    0.740951125f, -0.671558955f,
-    0.757208847f, -0.653172843f,
-    0.773010453f, -0.634393284f,
-    0.788346428f, -0.615231591f,
-    0.803207531f, -0.595699304f,
-    0.817584813f, -0.575808191f,
-    0.831469612f, -0.555570233f,
-    0.844853565f, -0.534997620f,
-    0.857728610f, -0.514102744f,
-    0.870086991f, -0.492898192f,
-    0.881921264f, -0.471396737f,
-    0.893224301f, -0.449611330f,
-    0.903989293f, -0.427555093f,
-    0.914209756f, -0.405241314f,
-    0.923879533f, -0.382683432f,
-    0.932992799f, -0.359895037f,
-    0.941544065f, -0.336889853f,
-    0.949528181f, -0.313681740f,
-    0.956940336f, -0.290284677f,
-    0.963776066f, -0.266712757f,
-    0.970031253f, -0.242980180f,
-    0.975702130f, -0.219101240f,
-    0.980785280f, -0.195090322f,
-    0.985277642f, -0.170961889f,
-    0.989176510f, -0.146730474f,
-    0.992479535f, -0.122410675f,
-    0.995184727f, -0.098017140f,
-    0.997290457f, -0.073564564f,
-    0.998795456f, -0.049067674f,
-    0.999698819f, -0.024541229f
-};
-
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 512	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-const float32_t twiddleCoef_512[1024] = {
-    1.000000000f,  0.000000000f,
-    0.999924702f,  0.012271538f,
-    0.999698819f,  0.024541229f,
-    0.999322385f,  0.036807223f,
-    0.998795456f,  0.049067674f,
-    0.998118113f,  0.061320736f,
-    0.997290457f,  0.073564564f,
-    0.996312612f,  0.085797312f,
-    0.995184727f,  0.098017140f,
-    0.993906970f,  0.110222207f,
-    0.992479535f,  0.122410675f,
-    0.990902635f,  0.134580709f,
-    0.989176510f,  0.146730474f,
-    0.987301418f,  0.158858143f,
-    0.985277642f,  0.170961889f,
-    0.983105487f,  0.183039888f,
-    0.980785280f,  0.195090322f,
-    0.978317371f,  0.207111376f,
-    0.975702130f,  0.219101240f,
-    0.972939952f,  0.231058108f,
-    0.970031253f,  0.242980180f,
-    0.966976471f,  0.254865660f,
-    0.963776066f,  0.266712757f,
-    0.960430519f,  0.278519689f,
-    0.956940336f,  0.290284677f,
-    0.953306040f,  0.302005949f,
-    0.949528181f,  0.313681740f,
-    0.945607325f,  0.325310292f,
-    0.941544065f,  0.336889853f,
-    0.937339012f,  0.348418680f,
-    0.932992799f,  0.359895037f,
-    0.928506080f,  0.371317194f,
-    0.923879533f,  0.382683432f,
-    0.919113852f,  0.393992040f,
-    0.914209756f,  0.405241314f,
-    0.909167983f,  0.416429560f,
-    0.903989293f,  0.427555093f,
-    0.898674466f,  0.438616239f,
-    0.893224301f,  0.449611330f,
-    0.887639620f,  0.460538711f,
-    0.881921264f,  0.471396737f,
-    0.876070094f,  0.482183772f,
-    0.870086991f,  0.492898192f,
-    0.863972856f,  0.503538384f,
-    0.857728610f,  0.514102744f,
-    0.851355193f,  0.524589683f,
-    0.844853565f,  0.534997620f,
-    0.838224706f,  0.545324988f,
-    0.831469612f,  0.555570233f,
-    0.824589303f,  0.565731811f,
-    0.817584813f,  0.575808191f,
-    0.810457198f,  0.585797857f,
-    0.803207531f,  0.595699304f,
-    0.795836905f,  0.605511041f,
-    0.788346428f,  0.615231591f,
-    0.780737229f,  0.624859488f,
-    0.773010453f,  0.634393284f,
-    0.765167266f,  0.643831543f,
-    0.757208847f,  0.653172843f,
-    0.749136395f,  0.662415778f,
-    0.740951125f,  0.671558955f,
-    0.732654272f,  0.680600998f,
-    0.724247083f,  0.689540545f,
-    0.715730825f,  0.698376249f,
-    0.707106781f,  0.707106781f,
-    0.698376249f,  0.715730825f,
-    0.689540545f,  0.724247083f,
-    0.680600998f,  0.732654272f,
-    0.671558955f,  0.740951125f,
-    0.662415778f,  0.749136395f,
-    0.653172843f,  0.757208847f,
-    0.643831543f,  0.765167266f,
-    0.634393284f,  0.773010453f,
-    0.624859488f,  0.780737229f,
-    0.615231591f,  0.788346428f,
-    0.605511041f,  0.795836905f,
-    0.595699304f,  0.803207531f,
-    0.585797857f,  0.810457198f,
-    0.575808191f,  0.817584813f,
-    0.565731811f,  0.824589303f,
-    0.555570233f,  0.831469612f,
-    0.545324988f,  0.838224706f,
-    0.534997620f,  0.844853565f,
-    0.524589683f,  0.851355193f,
-    0.514102744f,  0.857728610f,
-    0.503538384f,  0.863972856f,
-    0.492898192f,  0.870086991f,
-    0.482183772f,  0.876070094f,
-    0.471396737f,  0.881921264f,
-    0.460538711f,  0.887639620f,
-    0.449611330f,  0.893224301f,
-    0.438616239f,  0.898674466f,
-    0.427555093f,  0.903989293f,
-    0.416429560f,  0.909167983f,
-    0.405241314f,  0.914209756f,
-    0.393992040f,  0.919113852f,
-    0.382683432f,  0.923879533f,
-    0.371317194f,  0.928506080f,
-    0.359895037f,  0.932992799f,
-    0.348418680f,  0.937339012f,
-    0.336889853f,  0.941544065f,
-    0.325310292f,  0.945607325f,
-    0.313681740f,  0.949528181f,
-    0.302005949f,  0.953306040f,
-    0.290284677f,  0.956940336f,
-    0.278519689f,  0.960430519f,
-    0.266712757f,  0.963776066f,
-    0.254865660f,  0.966976471f,
-    0.242980180f,  0.970031253f,
-    0.231058108f,  0.972939952f,
-    0.219101240f,  0.975702130f,
-    0.207111376f,  0.978317371f,
-    0.195090322f,  0.980785280f,
-    0.183039888f,  0.983105487f,
-    0.170961889f,  0.985277642f,
-    0.158858143f,  0.987301418f,
-    0.146730474f,  0.989176510f,
-    0.134580709f,  0.990902635f,
-    0.122410675f,  0.992479535f,
-    0.110222207f,  0.993906970f,
-    0.098017140f,  0.995184727f,
-    0.085797312f,  0.996312612f,
-    0.073564564f,  0.997290457f,
-    0.061320736f,  0.998118113f,
-    0.049067674f,  0.998795456f,
-    0.036807223f,  0.999322385f,
-    0.024541229f,  0.999698819f,
-    0.012271538f,  0.999924702f,
-    0.000000000f,  1.000000000f,
-   -0.012271538f,  0.999924702f,
-   -0.024541229f,  0.999698819f,
-   -0.036807223f,  0.999322385f,
-   -0.049067674f,  0.998795456f,
-   -0.061320736f,  0.998118113f,
-   -0.073564564f,  0.997290457f,
-   -0.085797312f,  0.996312612f,
-   -0.098017140f,  0.995184727f,
-   -0.110222207f,  0.993906970f,
-   -0.122410675f,  0.992479535f,
-   -0.134580709f,  0.990902635f,
-   -0.146730474f,  0.989176510f,
-   -0.158858143f,  0.987301418f,
-   -0.170961889f,  0.985277642f,
-   -0.183039888f,  0.983105487f,
-   -0.195090322f,  0.980785280f,
-   -0.207111376f,  0.978317371f,
-   -0.219101240f,  0.975702130f,
-   -0.231058108f,  0.972939952f,
-   -0.242980180f,  0.970031253f,
-   -0.254865660f,  0.966976471f,
-   -0.266712757f,  0.963776066f,
-   -0.278519689f,  0.960430519f,
-   -0.290284677f,  0.956940336f,
-   -0.302005949f,  0.953306040f,
-   -0.313681740f,  0.949528181f,
-   -0.325310292f,  0.945607325f,
-   -0.336889853f,  0.941544065f,
-   -0.348418680f,  0.937339012f,
-   -0.359895037f,  0.932992799f,
-   -0.371317194f,  0.928506080f,
-   -0.382683432f,  0.923879533f,
-   -0.393992040f,  0.919113852f,
-   -0.405241314f,  0.914209756f,
-   -0.416429560f,  0.909167983f,
-   -0.427555093f,  0.903989293f,
-   -0.438616239f,  0.898674466f,
-   -0.449611330f,  0.893224301f,
-   -0.460538711f,  0.887639620f,
-   -0.471396737f,  0.881921264f,
-   -0.482183772f,  0.876070094f,
-   -0.492898192f,  0.870086991f,
-   -0.503538384f,  0.863972856f,
-   -0.514102744f,  0.857728610f,
-   -0.524589683f,  0.851355193f,
-   -0.534997620f,  0.844853565f,
-   -0.545324988f,  0.838224706f,
-   -0.555570233f,  0.831469612f,
-   -0.565731811f,  0.824589303f,
-   -0.575808191f,  0.817584813f,
-   -0.585797857f,  0.810457198f,
-   -0.595699304f,  0.803207531f,
-   -0.605511041f,  0.795836905f,
-   -0.615231591f,  0.788346428f,
-   -0.624859488f,  0.780737229f,
-   -0.634393284f,  0.773010453f,
-   -0.643831543f,  0.765167266f,
-   -0.653172843f,  0.757208847f,
-   -0.662415778f,  0.749136395f,
-   -0.671558955f,  0.740951125f,
-   -0.680600998f,  0.732654272f,
-   -0.689540545f,  0.724247083f,
-   -0.698376249f,  0.715730825f,
-   -0.707106781f,  0.707106781f,
-   -0.715730825f,  0.698376249f,
-   -0.724247083f,  0.689540545f,
-   -0.732654272f,  0.680600998f,
-   -0.740951125f,  0.671558955f,
-   -0.749136395f,  0.662415778f,
-   -0.757208847f,  0.653172843f,
-   -0.765167266f,  0.643831543f,
-   -0.773010453f,  0.634393284f,
-   -0.780737229f,  0.624859488f,
-   -0.788346428f,  0.615231591f,
-   -0.795836905f,  0.605511041f,
-   -0.803207531f,  0.595699304f,
-   -0.810457198f,  0.585797857f,
-   -0.817584813f,  0.575808191f,
-   -0.824589303f,  0.565731811f,
-   -0.831469612f,  0.555570233f,
-   -0.838224706f,  0.545324988f,
-   -0.844853565f,  0.534997620f,
-   -0.851355193f,  0.524589683f,
-   -0.857728610f,  0.514102744f,
-   -0.863972856f,  0.503538384f,
-   -0.870086991f,  0.492898192f,
-   -0.876070094f,  0.482183772f,
-   -0.881921264f,  0.471396737f,
-   -0.887639620f,  0.460538711f,
-   -0.893224301f,  0.449611330f,
-   -0.898674466f,  0.438616239f,
-   -0.903989293f,  0.427555093f,
-   -0.909167983f,  0.416429560f,
-   -0.914209756f,  0.405241314f,
-   -0.919113852f,  0.393992040f,
-   -0.923879533f,  0.382683432f,
-   -0.928506080f,  0.371317194f,
-   -0.932992799f,  0.359895037f,
-   -0.937339012f,  0.348418680f,
-   -0.941544065f,  0.336889853f,
-   -0.945607325f,  0.325310292f,
-   -0.949528181f,  0.313681740f,
-   -0.953306040f,  0.302005949f,
-   -0.956940336f,  0.290284677f,
-   -0.960430519f,  0.278519689f,
-   -0.963776066f,  0.266712757f,
-   -0.966976471f,  0.254865660f,
-   -0.970031253f,  0.242980180f,
-   -0.972939952f,  0.231058108f,
-   -0.975702130f,  0.219101240f,
-   -0.978317371f,  0.207111376f,
-   -0.980785280f,  0.195090322f,
-   -0.983105487f,  0.183039888f,
-   -0.985277642f,  0.170961889f,
-   -0.987301418f,  0.158858143f,
-   -0.989176510f,  0.146730474f,
-   -0.990902635f,  0.134580709f,
-   -0.992479535f,  0.122410675f,
-   -0.993906970f,  0.110222207f,
-   -0.995184727f,  0.098017140f,
-   -0.996312612f,  0.085797312f,
-   -0.997290457f,  0.073564564f,
-   -0.998118113f,  0.061320736f,
-   -0.998795456f,  0.049067674f,
-   -0.999322385f,  0.036807223f,
-   -0.999698819f,  0.024541229f,
-   -0.999924702f,  0.012271538f,
-   -1.000000000f,  0.000000000f,
-   -0.999924702f, -0.012271538f,
-   -0.999698819f, -0.024541229f,
-   -0.999322385f, -0.036807223f,
-   -0.998795456f, -0.049067674f,
-   -0.998118113f, -0.061320736f,
-   -0.997290457f, -0.073564564f,
-   -0.996312612f, -0.085797312f,
-   -0.995184727f, -0.098017140f,
-   -0.993906970f, -0.110222207f,
-   -0.992479535f, -0.122410675f,
-   -0.990902635f, -0.134580709f,
-   -0.989176510f, -0.146730474f,
-   -0.987301418f, -0.158858143f,
-   -0.985277642f, -0.170961889f,
-   -0.983105487f, -0.183039888f,
-   -0.980785280f, -0.195090322f,
-   -0.978317371f, -0.207111376f,
-   -0.975702130f, -0.219101240f,
-   -0.972939952f, -0.231058108f,
-   -0.970031253f, -0.242980180f,
-   -0.966976471f, -0.254865660f,
-   -0.963776066f, -0.266712757f,
-   -0.960430519f, -0.278519689f,
-   -0.956940336f, -0.290284677f,
-   -0.953306040f, -0.302005949f,
-   -0.949528181f, -0.313681740f,
-   -0.945607325f, -0.325310292f,
-   -0.941544065f, -0.336889853f,
-   -0.937339012f, -0.348418680f,
-   -0.932992799f, -0.359895037f,
-   -0.928506080f, -0.371317194f,
-   -0.923879533f, -0.382683432f,
-   -0.919113852f, -0.393992040f,
-   -0.914209756f, -0.405241314f,
-   -0.909167983f, -0.416429560f,
-   -0.903989293f, -0.427555093f,
-   -0.898674466f, -0.438616239f,
-   -0.893224301f, -0.449611330f,
-   -0.887639620f, -0.460538711f,
-   -0.881921264f, -0.471396737f,
-   -0.876070094f, -0.482183772f,
-   -0.870086991f, -0.492898192f,
-   -0.863972856f, -0.503538384f,
-   -0.857728610f, -0.514102744f,
-   -0.851355193f, -0.524589683f,
-   -0.844853565f, -0.534997620f,
-   -0.838224706f, -0.545324988f,
-   -0.831469612f, -0.555570233f,
-   -0.824589303f, -0.565731811f,
-   -0.817584813f, -0.575808191f,
-   -0.810457198f, -0.585797857f,
-   -0.803207531f, -0.595699304f,
-   -0.795836905f, -0.605511041f,
-   -0.788346428f, -0.615231591f,
-   -0.780737229f, -0.624859488f,
-   -0.773010453f, -0.634393284f,
-   -0.765167266f, -0.643831543f,
-   -0.757208847f, -0.653172843f,
-   -0.749136395f, -0.662415778f,
-   -0.740951125f, -0.671558955f,
-   -0.732654272f, -0.680600998f,
-   -0.724247083f, -0.689540545f,
-   -0.715730825f, -0.698376249f,
-   -0.707106781f, -0.707106781f,
-   -0.698376249f, -0.715730825f,
-   -0.689540545f, -0.724247083f,
-   -0.680600998f, -0.732654272f,
-   -0.671558955f, -0.740951125f,
-   -0.662415778f, -0.749136395f,
-   -0.653172843f, -0.757208847f,
-   -0.643831543f, -0.765167266f,
-   -0.634393284f, -0.773010453f,
-   -0.624859488f, -0.780737229f,
-   -0.615231591f, -0.788346428f,
-   -0.605511041f, -0.795836905f,
-   -0.595699304f, -0.803207531f,
-   -0.585797857f, -0.810457198f,
-   -0.575808191f, -0.817584813f,
-   -0.565731811f, -0.824589303f,
-   -0.555570233f, -0.831469612f,
-   -0.545324988f, -0.838224706f,
-   -0.534997620f, -0.844853565f,
-   -0.524589683f, -0.851355193f,
-   -0.514102744f, -0.857728610f,
-   -0.503538384f, -0.863972856f,
-   -0.492898192f, -0.870086991f,
-   -0.482183772f, -0.876070094f,
-   -0.471396737f, -0.881921264f,
-   -0.460538711f, -0.887639620f,
-   -0.449611330f, -0.893224301f,
-   -0.438616239f, -0.898674466f,
-   -0.427555093f, -0.903989293f,
-   -0.416429560f, -0.909167983f,
-   -0.405241314f, -0.914209756f,
-   -0.393992040f, -0.919113852f,
-   -0.382683432f, -0.923879533f,
-   -0.371317194f, -0.928506080f,
-   -0.359895037f, -0.932992799f,
-   -0.348418680f, -0.937339012f,
-   -0.336889853f, -0.941544065f,
-   -0.325310292f, -0.945607325f,
-   -0.313681740f, -0.949528181f,
-   -0.302005949f, -0.953306040f,
-   -0.290284677f, -0.956940336f,
-   -0.278519689f, -0.960430519f,
-   -0.266712757f, -0.963776066f,
-   -0.254865660f, -0.966976471f,
-   -0.242980180f, -0.970031253f,
-   -0.231058108f, -0.972939952f,
-   -0.219101240f, -0.975702130f,
-   -0.207111376f, -0.978317371f,
-   -0.195090322f, -0.980785280f,
-   -0.183039888f, -0.983105487f,
-   -0.170961889f, -0.985277642f,
-   -0.158858143f, -0.987301418f,
-   -0.146730474f, -0.989176510f,
-   -0.134580709f, -0.990902635f,
-   -0.122410675f, -0.992479535f,
-   -0.110222207f, -0.993906970f,
-   -0.098017140f, -0.995184727f,
-   -0.085797312f, -0.996312612f,
-   -0.073564564f, -0.997290457f,
-   -0.061320736f, -0.998118113f,
-   -0.049067674f, -0.998795456f,
-   -0.036807223f, -0.999322385f,
-   -0.024541229f, -0.999698819f,
-   -0.012271538f, -0.999924702f,
-   -0.000000000f, -1.000000000f,
-    0.012271538f, -0.999924702f,
-    0.024541229f, -0.999698819f,
-    0.036807223f, -0.999322385f,
-    0.049067674f, -0.998795456f,
-    0.061320736f, -0.998118113f,
-    0.073564564f, -0.997290457f,
-    0.085797312f, -0.996312612f,
-    0.098017140f, -0.995184727f,
-    0.110222207f, -0.993906970f,
-    0.122410675f, -0.992479535f,
-    0.134580709f, -0.990902635f,
-    0.146730474f, -0.989176510f,
-    0.158858143f, -0.987301418f,
-    0.170961889f, -0.985277642f,
-    0.183039888f, -0.983105487f,
-    0.195090322f, -0.980785280f,
-    0.207111376f, -0.978317371f,
-    0.219101240f, -0.975702130f,
-    0.231058108f, -0.972939952f,
-    0.242980180f, -0.970031253f,
-    0.254865660f, -0.966976471f,
-    0.266712757f, -0.963776066f,
-    0.278519689f, -0.960430519f,
-    0.290284677f, -0.956940336f,
-    0.302005949f, -0.953306040f,
-    0.313681740f, -0.949528181f,
-    0.325310292f, -0.945607325f,
-    0.336889853f, -0.941544065f,
-    0.348418680f, -0.937339012f,
-    0.359895037f, -0.932992799f,
-    0.371317194f, -0.928506080f,
-    0.382683432f, -0.923879533f,
-    0.393992040f, -0.919113852f,
-    0.405241314f, -0.914209756f,
-    0.416429560f, -0.909167983f,
-    0.427555093f, -0.903989293f,
-    0.438616239f, -0.898674466f,
-    0.449611330f, -0.893224301f,
-    0.460538711f, -0.887639620f,
-    0.471396737f, -0.881921264f,
-    0.482183772f, -0.876070094f,
-    0.492898192f, -0.870086991f,
-    0.503538384f, -0.863972856f,
-    0.514102744f, -0.857728610f,
-    0.524589683f, -0.851355193f,
-    0.534997620f, -0.844853565f,
-    0.545324988f, -0.838224706f,
-    0.555570233f, -0.831469612f,
-    0.565731811f, -0.824589303f,
-    0.575808191f, -0.817584813f,
-    0.585797857f, -0.810457198f,
-    0.595699304f, -0.803207531f,
-    0.605511041f, -0.795836905f,
-    0.615231591f, -0.788346428f,
-    0.624859488f, -0.780737229f,
-    0.634393284f, -0.773010453f,
-    0.643831543f, -0.765167266f,
-    0.653172843f, -0.757208847f,
-    0.662415778f, -0.749136395f,
-    0.671558955f, -0.740951125f,
-    0.680600998f, -0.732654272f,
-    0.689540545f, -0.724247083f,
-    0.698376249f, -0.715730825f,
-    0.707106781f, -0.707106781f,
-    0.715730825f, -0.698376249f,
-    0.724247083f, -0.689540545f,
-    0.732654272f, -0.680600998f,
-    0.740951125f, -0.671558955f,
-    0.749136395f, -0.662415778f,
-    0.757208847f, -0.653172843f,
-    0.765167266f, -0.643831543f,
-    0.773010453f, -0.634393284f,
-    0.780737229f, -0.624859488f,
-    0.788346428f, -0.615231591f,
-    0.795836905f, -0.605511041f,
-    0.803207531f, -0.595699304f,
-    0.810457198f, -0.585797857f,
-    0.817584813f, -0.575808191f,
-    0.824589303f, -0.565731811f,
-    0.831469612f, -0.555570233f,
-    0.838224706f, -0.545324988f,
-    0.844853565f, -0.534997620f,
-    0.851355193f, -0.524589683f,
-    0.857728610f, -0.514102744f,
-    0.863972856f, -0.503538384f,
-    0.870086991f, -0.492898192f,
-    0.876070094f, -0.482183772f,
-    0.881921264f, -0.471396737f,
-    0.887639620f, -0.460538711f,
-    0.893224301f, -0.449611330f,
-    0.898674466f, -0.438616239f,
-    0.903989293f, -0.427555093f,
-    0.909167983f, -0.416429560f,
-    0.914209756f, -0.405241314f,
-    0.919113852f, -0.393992040f,
-    0.923879533f, -0.382683432f,
-    0.928506080f, -0.371317194f,
-    0.932992799f, -0.359895037f,
-    0.937339012f, -0.348418680f,
-    0.941544065f, -0.336889853f,
-    0.945607325f, -0.325310292f,
-    0.949528181f, -0.313681740f,
-    0.953306040f, -0.302005949f,
-    0.956940336f, -0.290284677f,
-    0.960430519f, -0.278519689f,
-    0.963776066f, -0.266712757f,
-    0.966976471f, -0.254865660f,
-    0.970031253f, -0.242980180f,
-    0.972939952f, -0.231058108f,
-    0.975702130f, -0.219101240f,
-    0.978317371f, -0.207111376f,
-    0.980785280f, -0.195090322f,
-    0.983105487f, -0.183039888f,
-    0.985277642f, -0.170961889f,
-    0.987301418f, -0.158858143f,
-    0.989176510f, -0.146730474f,
-    0.990902635f, -0.134580709f,
-    0.992479535f, -0.122410675f,
-    0.993906970f, -0.110222207f,
-    0.995184727f, -0.098017140f,
-    0.996312612f, -0.085797312f,
-    0.997290457f, -0.073564564f,
-    0.998118113f, -0.061320736f,
-    0.998795456f, -0.049067674f,
-    0.999322385f, -0.036807223f,
-    0.999698819f, -0.024541229f,
-    0.999924702f, -0.012271538f
-};
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 1024	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-const float32_t twiddleCoef_1024[2048] = {
-1.000000000f	,	0.000000000f	,
-0.999981175f	,	0.006135885f	,
-0.999924702f	,	0.012271538f	,
-0.999830582f	,	0.018406730f	,
-0.999698819f	,	0.024541229f	,
-0.999529418f	,	0.030674803f	,
-0.999322385f	,	0.036807223f	,
-0.999077728f	,	0.042938257f	,
-0.998795456f	,	0.049067674f	,
-0.998475581f	,	0.055195244f	,
-0.998118113f	,	0.061320736f	,
-0.997723067f	,	0.067443920f	,
-0.997290457f	,	0.073564564f	,
-0.996820299f	,	0.079682438f	,
-0.996312612f	,	0.085797312f	,
-0.995767414f	,	0.091908956f	,
-0.995184727f	,	0.098017140f	,
-0.994564571f	,	0.104121634f	,
-0.993906970f	,	0.110222207f	,
-0.993211949f	,	0.116318631f	,
-0.992479535f	,	0.122410675f	,
-0.991709754f	,	0.128498111f	,
-0.990902635f	,	0.134580709f	,
-0.990058210f	,	0.140658239f	,
-0.989176510f	,	0.146730474f	,
-0.988257568f	,	0.152797185f	,
-0.987301418f	,	0.158858143f	,
-0.986308097f	,	0.164913120f	,
-0.985277642f	,	0.170961889f	,
-0.984210092f	,	0.177004220f	,
-0.983105487f	,	0.183039888f	,
-0.981963869f	,	0.189068664f	,
-0.980785280f	,	0.195090322f	,
-0.979569766f	,	0.201104635f	,
-0.978317371f	,	0.207111376f	,
-0.977028143f	,	0.213110320f	,
-0.975702130f	,	0.219101240f	,
-0.974339383f	,	0.225083911f	,
-0.972939952f	,	0.231058108f	,
-0.971503891f	,	0.237023606f	,
-0.970031253f	,	0.242980180f	,
-0.968522094f	,	0.248927606f	,
-0.966976471f	,	0.254865660f	,
-0.965394442f	,	0.260794118f	,
-0.963776066f	,	0.266712757f	,
-0.962121404f	,	0.272621355f	,
-0.960430519f	,	0.278519689f	,
-0.958703475f	,	0.284407537f	,
-0.956940336f	,	0.290284677f	,
-0.955141168f	,	0.296150888f	,
-0.953306040f	,	0.302005949f	,
-0.951435021f	,	0.307849640f	,
-0.949528181f	,	0.313681740f	,
-0.947585591f	,	0.319502031f	,
-0.945607325f	,	0.325310292f	,
-0.943593458f	,	0.331106306f	,
-0.941544065f	,	0.336889853f	,
-0.939459224f	,	0.342660717f	,
-0.937339012f	,	0.348418680f	,
-0.935183510f	,	0.354163525f	,
-0.932992799f	,	0.359895037f	,
-0.930766961f	,	0.365612998f	,
-0.928506080f	,	0.371317194f	,
-0.926210242f	,	0.377007410f	,
-0.923879533f	,	0.382683432f	,
-0.921514039f	,	0.388345047f	,
-0.919113852f	,	0.393992040f	,
-0.916679060f	,	0.399624200f	,
-0.914209756f	,	0.405241314f	,
-0.911706032f	,	0.410843171f	,
-0.909167983f	,	0.416429560f	,
-0.906595705f	,	0.422000271f	,
-0.903989293f	,	0.427555093f	,
-0.901348847f	,	0.433093819f	,
-0.898674466f	,	0.438616239f	,
-0.895966250f	,	0.444122145f	,
-0.893224301f	,	0.449611330f	,
-0.890448723f	,	0.455083587f	,
-0.887639620f	,	0.460538711f	,
-0.884797098f	,	0.465976496f	,
-0.881921264f	,	0.471396737f	,
-0.879012226f	,	0.476799230f	,
-0.876070094f	,	0.482183772f	,
-0.873094978f	,	0.487550160f	,
-0.870086991f	,	0.492898192f	,
-0.867046246f	,	0.498227667f	,
-0.863972856f	,	0.503538384f	,
-0.860866939f	,	0.508830143f	,
-0.857728610f	,	0.514102744f	,
-0.854557988f	,	0.519355990f	,
-0.851355193f	,	0.524589683f	,
-0.848120345f	,	0.529803625f	,
-0.844853565f	,	0.534997620f	,
-0.841554977f	,	0.540171473f	,
-0.838224706f	,	0.545324988f	,
-0.834862875f	,	0.550457973f	,
-0.831469612f	,	0.555570233f	,
-0.828045045f	,	0.560661576f	,
-0.824589303f	,	0.565731811f	,
-0.821102515f	,	0.570780746f	,
-0.817584813f	,	0.575808191f	,
-0.814036330f	,	0.580813958f	,
-0.810457198f	,	0.585797857f	,
-0.806847554f	,	0.590759702f	,
-0.803207531f	,	0.595699304f	,
-0.799537269f	,	0.600616479f	,
-0.795836905f	,	0.605511041f	,
-0.792106577f	,	0.610382806f	,
-0.788346428f	,	0.615231591f	,
-0.784556597f	,	0.620057212f	,
-0.780737229f	,	0.624859488f	,
-0.776888466f	,	0.629638239f	,
-0.773010453f	,	0.634393284f	,
-0.769103338f	,	0.639124445f	,
-0.765167266f	,	0.643831543f	,
-0.761202385f	,	0.648514401f	,
-0.757208847f	,	0.653172843f	,
-0.753186799f	,	0.657806693f	,
-0.749136395f	,	0.662415778f	,
-0.745057785f	,	0.666999922f	,
-0.740951125f	,	0.671558955f	,
-0.736816569f	,	0.676092704f	,
-0.732654272f	,	0.680600998f	,
-0.728464390f	,	0.685083668f	,
-0.724247083f	,	0.689540545f	,
-0.720002508f	,	0.693971461f	,
-0.715730825f	,	0.698376249f	,
-0.711432196f	,	0.702754744f	,
-0.707106781f	,	0.707106781f	,
-0.702754744f	,	0.711432196f	,
-0.698376249f	,	0.715730825f	,
-0.693971461f	,	0.720002508f	,
-0.689540545f	,	0.724247083f	,
-0.685083668f	,	0.728464390f	,
-0.680600998f	,	0.732654272f	,
-0.676092704f	,	0.736816569f	,
-0.671558955f	,	0.740951125f	,
-0.666999922f	,	0.745057785f	,
-0.662415778f	,	0.749136395f	,
-0.657806693f	,	0.753186799f	,
-0.653172843f	,	0.757208847f	,
-0.648514401f	,	0.761202385f	,
-0.643831543f	,	0.765167266f	,
-0.639124445f	,	0.769103338f	,
-0.634393284f	,	0.773010453f	,
-0.629638239f	,	0.776888466f	,
-0.624859488f	,	0.780737229f	,
-0.620057212f	,	0.784556597f	,
-0.615231591f	,	0.788346428f	,
-0.610382806f	,	0.792106577f	,
-0.605511041f	,	0.795836905f	,
-0.600616479f	,	0.799537269f	,
-0.595699304f	,	0.803207531f	,
-0.590759702f	,	0.806847554f	,
-0.585797857f	,	0.810457198f	,
-0.580813958f	,	0.814036330f	,
-0.575808191f	,	0.817584813f	,
-0.570780746f	,	0.821102515f	,
-0.565731811f	,	0.824589303f	,
-0.560661576f	,	0.828045045f	,
-0.555570233f	,	0.831469612f	,
-0.550457973f	,	0.834862875f	,
-0.545324988f	,	0.838224706f	,
-0.540171473f	,	0.841554977f	,
-0.534997620f	,	0.844853565f	,
-0.529803625f	,	0.848120345f	,
-0.524589683f	,	0.851355193f	,
-0.519355990f	,	0.854557988f	,
-0.514102744f	,	0.857728610f	,
-0.508830143f	,	0.860866939f	,
-0.503538384f	,	0.863972856f	,
-0.498227667f	,	0.867046246f	,
-0.492898192f	,	0.870086991f	,
-0.487550160f	,	0.873094978f	,
-0.482183772f	,	0.876070094f	,
-0.476799230f	,	0.879012226f	,
-0.471396737f	,	0.881921264f	,
-0.465976496f	,	0.884797098f	,
-0.460538711f	,	0.887639620f	,
-0.455083587f	,	0.890448723f	,
-0.449611330f	,	0.893224301f	,
-0.444122145f	,	0.895966250f	,
-0.438616239f	,	0.898674466f	,
-0.433093819f	,	0.901348847f	,
-0.427555093f	,	0.903989293f	,
-0.422000271f	,	0.906595705f	,
-0.416429560f	,	0.909167983f	,
-0.410843171f	,	0.911706032f	,
-0.405241314f	,	0.914209756f	,
-0.399624200f	,	0.916679060f	,
-0.393992040f	,	0.919113852f	,
-0.388345047f	,	0.921514039f	,
-0.382683432f	,	0.923879533f	,
-0.377007410f	,	0.926210242f	,
-0.371317194f	,	0.928506080f	,
-0.365612998f	,	0.930766961f	,
-0.359895037f	,	0.932992799f	,
-0.354163525f	,	0.935183510f	,
-0.348418680f	,	0.937339012f	,
-0.342660717f	,	0.939459224f	,
-0.336889853f	,	0.941544065f	,
-0.331106306f	,	0.943593458f	,
-0.325310292f	,	0.945607325f	,
-0.319502031f	,	0.947585591f	,
-0.313681740f	,	0.949528181f	,
-0.307849640f	,	0.951435021f	,
-0.302005949f	,	0.953306040f	,
-0.296150888f	,	0.955141168f	,
-0.290284677f	,	0.956940336f	,
-0.284407537f	,	0.958703475f	,
-0.278519689f	,	0.960430519f	,
-0.272621355f	,	0.962121404f	,
-0.266712757f	,	0.963776066f	,
-0.260794118f	,	0.965394442f	,
-0.254865660f	,	0.966976471f	,
-0.248927606f	,	0.968522094f	,
-0.242980180f	,	0.970031253f	,
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-0.881921264f	,	-0.471396737f	,
-0.884797098f	,	-0.465976496f	,
-0.887639620f	,	-0.460538711f	,
-0.890448723f	,	-0.455083587f	,
-0.893224301f	,	-0.449611330f	,
-0.895966250f	,	-0.444122145f	,
-0.898674466f	,	-0.438616239f	,
-0.901348847f	,	-0.433093819f	,
-0.903989293f	,	-0.427555093f	,
-0.906595705f	,	-0.422000271f	,
-0.909167983f	,	-0.416429560f	,
-0.911706032f	,	-0.410843171f	,
-0.914209756f	,	-0.405241314f	,
-0.916679060f	,	-0.399624200f	,
-0.919113852f	,	-0.393992040f	,
-0.921514039f	,	-0.388345047f	,
-0.923879533f	,	-0.382683432f	,
-0.926210242f	,	-0.377007410f	,
-0.928506080f	,	-0.371317194f	,
-0.930766961f	,	-0.365612998f	,
-0.932992799f	,	-0.359895037f	,
-0.935183510f	,	-0.354163525f	,
-0.937339012f	,	-0.348418680f	,
-0.939459224f	,	-0.342660717f	,
-0.941544065f	,	-0.336889853f	,
-0.943593458f	,	-0.331106306f	,
-0.945607325f	,	-0.325310292f	,
-0.947585591f	,	-0.319502031f	,
-0.949528181f	,	-0.313681740f	,
-0.951435021f	,	-0.307849640f	,
-0.953306040f	,	-0.302005949f	,
-0.955141168f	,	-0.296150888f	,
-0.956940336f	,	-0.290284677f	,
-0.958703475f	,	-0.284407537f	,
-0.960430519f	,	-0.278519689f	,
-0.962121404f	,	-0.272621355f	,
-0.963776066f	,	-0.266712757f	,
-0.965394442f	,	-0.260794118f	,
-0.966976471f	,	-0.254865660f	,
-0.968522094f	,	-0.248927606f	,
-0.970031253f	,	-0.242980180f	,
-0.971503891f	,	-0.237023606f	,
-0.972939952f	,	-0.231058108f	,
-0.974339383f	,	-0.225083911f	,
-0.975702130f	,	-0.219101240f	,
-0.977028143f	,	-0.213110320f	,
-0.978317371f	,	-0.207111376f	,
-0.979569766f	,	-0.201104635f	,
-0.980785280f	,	-0.195090322f	,
-0.981963869f	,	-0.189068664f	,
-0.983105487f	,	-0.183039888f	,
-0.984210092f	,	-0.177004220f	,
-0.985277642f	,	-0.170961889f	,
-0.986308097f	,	-0.164913120f	,
-0.987301418f	,	-0.158858143f	,
-0.988257568f	,	-0.152797185f	,
-0.989176510f	,	-0.146730474f	,
-0.990058210f	,	-0.140658239f	,
-0.990902635f	,	-0.134580709f	,
-0.991709754f	,	-0.128498111f	,
-0.992479535f	,	-0.122410675f	,
-0.993211949f	,	-0.116318631f	,
-0.993906970f	,	-0.110222207f	,
-0.994564571f	,	-0.104121634f	,
-0.995184727f	,	-0.098017140f	,
-0.995767414f	,	-0.091908956f	,
-0.996312612f	,	-0.085797312f	,
-0.996820299f	,	-0.079682438f	,
-0.997290457f	,	-0.073564564f	,
-0.997723067f	,	-0.067443920f	,
-0.998118113f	,	-0.061320736f	,
-0.998475581f	,	-0.055195244f	,
-0.998795456f	,	-0.049067674f	,
-0.999077728f	,	-0.042938257f	,
-0.999322385f	,	-0.036807223f	,
-0.999529418f	,	-0.030674803f	,
-0.999698819f	,	-0.024541229f	,
-0.999830582f	,	-0.018406730f	,
-0.999924702f	,	-0.012271538f	,
-0.999981175f	,	-0.006135885f
-};
-
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 2048	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-const float32_t twiddleCoef_2048[4096] = {
-    1.000000000f,  0.000000000f,
-    0.999995294f,  0.003067957f,
-    0.999981175f,  0.006135885f,
-    0.999957645f,  0.009203755f,
-    0.999924702f,  0.012271538f,
-    0.999882347f,  0.015339206f,
-    0.999830582f,  0.018406730f,
-    0.999769405f,  0.021474080f,
-    0.999698819f,  0.024541229f,
-    0.999618822f,  0.027608146f,
-    0.999529418f,  0.030674803f,
-    0.999430605f,  0.033741172f,
-    0.999322385f,  0.036807223f,
-    0.999204759f,  0.039872928f,
-    0.999077728f,  0.042938257f,
-    0.998941293f,  0.046003182f,
-    0.998795456f,  0.049067674f,
-    0.998640218f,  0.052131705f,
-    0.998475581f,  0.055195244f,
-    0.998301545f,  0.058258265f,
-    0.998118113f,  0.061320736f,
-    0.997925286f,  0.064382631f,
-    0.997723067f,  0.067443920f,
-    0.997511456f,  0.070504573f,
-    0.997290457f,  0.073564564f,
-    0.997060070f,  0.076623861f,
-    0.996820299f,  0.079682438f,
-    0.996571146f,  0.082740265f,
-    0.996312612f,  0.085797312f,
-    0.996044701f,  0.088853553f,
-    0.995767414f,  0.091908956f,
-    0.995480755f,  0.094963495f,
-    0.995184727f,  0.098017140f,
-    0.994879331f,  0.101069863f,
-    0.994564571f,  0.104121634f,
-    0.994240449f,  0.107172425f,
-    0.993906970f,  0.110222207f,
-    0.993564136f,  0.113270952f,
-    0.993211949f,  0.116318631f,
-    0.992850414f,  0.119365215f,
-    0.992479535f,  0.122410675f,
-    0.992099313f,  0.125454983f,
-    0.991709754f,  0.128498111f,
-    0.991310860f,  0.131540029f,
-    0.990902635f,  0.134580709f,
-    0.990485084f,  0.137620122f,
-    0.990058210f,  0.140658239f,
-    0.989622017f,  0.143695033f,
-    0.989176510f,  0.146730474f,
-    0.988721692f,  0.149764535f,
-    0.988257568f,  0.152797185f,
-    0.987784142f,  0.155828398f,
-    0.987301418f,  0.158858143f,
-    0.986809402f,  0.161886394f,
-    0.986308097f,  0.164913120f,
-    0.985797509f,  0.167938295f,
-    0.985277642f,  0.170961889f,
-    0.984748502f,  0.173983873f,
-    0.984210092f,  0.177004220f,
-    0.983662419f,  0.180022901f,
-    0.983105487f,  0.183039888f,
-    0.982539302f,  0.186055152f,
-    0.981963869f,  0.189068664f,
-    0.981379193f,  0.192080397f,
-    0.980785280f,  0.195090322f,
-    0.980182136f,  0.198098411f,
-    0.979569766f,  0.201104635f,
-    0.978948175f,  0.204108966f,
-    0.978317371f,  0.207111376f,
-    0.977677358f,  0.210111837f,
-    0.977028143f,  0.213110320f,
-    0.976369731f,  0.216106797f,
-    0.975702130f,  0.219101240f,
-    0.975025345f,  0.222093621f,
-    0.974339383f,  0.225083911f,
-    0.973644250f,  0.228072083f,
-    0.972939952f,  0.231058108f,
-    0.972226497f,  0.234041959f,
-    0.971503891f,  0.237023606f,
-    0.970772141f,  0.240003022f,
-    0.970031253f,  0.242980180f,
-    0.969281235f,  0.245955050f,
-    0.968522094f,  0.248927606f,
-    0.967753837f,  0.251897818f,
-    0.966976471f,  0.254865660f,
-    0.966190003f,  0.257831102f,
-    0.965394442f,  0.260794118f,
-    0.964589793f,  0.263754679f,
-    0.963776066f,  0.266712757f,
-    0.962953267f,  0.269668326f,
-    0.962121404f,  0.272621355f,
-    0.961280486f,  0.275571819f,
-    0.960430519f,  0.278519689f,
-    0.959571513f,  0.281464938f,
-    0.958703475f,  0.284407537f,
-    0.957826413f,  0.287347460f,
-    0.956940336f,  0.290284677f,
-    0.956045251f,  0.293219163f,
-    0.955141168f,  0.296150888f,
-    0.954228095f,  0.299079826f,
-    0.953306040f,  0.302005949f,
-    0.952375013f,  0.304929230f,
-    0.951435021f,  0.307849640f,
-    0.950486074f,  0.310767153f,
-    0.949528181f,  0.313681740f,
-    0.948561350f,  0.316593376f,
-    0.947585591f,  0.319502031f,
-    0.946600913f,  0.322407679f,
-    0.945607325f,  0.325310292f,
-    0.944604837f,  0.328209844f,
-    0.943593458f,  0.331106306f,
-    0.942573198f,  0.333999651f,
-    0.941544065f,  0.336889853f,
-    0.940506071f,  0.339776884f,
-    0.939459224f,  0.342660717f,
-    0.938403534f,  0.345541325f,
-    0.937339012f,  0.348418680f,
-    0.936265667f,  0.351292756f,
-    0.935183510f,  0.354163525f,
-    0.934092550f,  0.357030961f,
-    0.932992799f,  0.359895037f,
-    0.931884266f,  0.362755724f,
-    0.930766961f,  0.365612998f,
-    0.929640896f,  0.368466830f,
-    0.928506080f,  0.371317194f,
-    0.927362526f,  0.374164063f,
-    0.926210242f,  0.377007410f,
-    0.925049241f,  0.379847209f,
-    0.923879533f,  0.382683432f,
-    0.922701128f,  0.385516054f,
-    0.921514039f,  0.388345047f,
-    0.920318277f,  0.391170384f,
-    0.919113852f,  0.393992040f,
-    0.917900776f,  0.396809987f,
-    0.916679060f,  0.399624200f,
-    0.915448716f,  0.402434651f,
-    0.914209756f,  0.405241314f,
-    0.912962190f,  0.408044163f,
-    0.911706032f,  0.410843171f,
-    0.910441292f,  0.413638312f,
-    0.909167983f,  0.416429560f,
-    0.907886116f,  0.419216888f,
-    0.906595705f,  0.422000271f,
-    0.905296759f,  0.424779681f,
-    0.903989293f,  0.427555093f,
-    0.902673318f,  0.430326481f,
-    0.901348847f,  0.433093819f,
-    0.900015892f,  0.435857080f,
-    0.898674466f,  0.438616239f,
-    0.897324581f,  0.441371269f,
-    0.895966250f,  0.444122145f,
-    0.894599486f,  0.446868840f,
-    0.893224301f,  0.449611330f,
-    0.891840709f,  0.452349587f,
-    0.890448723f,  0.455083587f,
-    0.889048356f,  0.457813304f,
-    0.887639620f,  0.460538711f,
-    0.886222530f,  0.463259784f,
-    0.884797098f,  0.465976496f,
-    0.883363339f,  0.468688822f,
-    0.881921264f,  0.471396737f,
-    0.880470889f,  0.474100215f,
-    0.879012226f,  0.476799230f,
-    0.877545290f,  0.479493758f,
-    0.876070094f,  0.482183772f,
-    0.874586652f,  0.484869248f,
-    0.873094978f,  0.487550160f,
-    0.871595087f,  0.490226483f,
-    0.870086991f,  0.492898192f,
-    0.868570706f,  0.495565262f,
-    0.867046246f,  0.498227667f,
-    0.865513624f,  0.500885383f,
-    0.863972856f,  0.503538384f,
-    0.862423956f,  0.506186645f,
-    0.860866939f,  0.508830143f,
-    0.859301818f,  0.511468850f,
-    0.857728610f,  0.514102744f,
-    0.856147328f,  0.516731799f,
-    0.854557988f,  0.519355990f,
-    0.852960605f,  0.521975293f,
-    0.851355193f,  0.524589683f,
-    0.849741768f,  0.527199135f,
-    0.848120345f,  0.529803625f,
-    0.846490939f,  0.532403128f,
-    0.844853565f,  0.534997620f,
-    0.843208240f,  0.537587076f,
-    0.841554977f,  0.540171473f,
-    0.839893794f,  0.542750785f,
-    0.838224706f,  0.545324988f,
-    0.836547727f,  0.547894059f,
-    0.834862875f,  0.550457973f,
-    0.833170165f,  0.553016706f,
-    0.831469612f,  0.555570233f,
-    0.829761234f,  0.558118531f,
-    0.828045045f,  0.560661576f,
-    0.826321063f,  0.563199344f,
-    0.824589303f,  0.565731811f,
-    0.822849781f,  0.568258953f,
-    0.821102515f,  0.570780746f,
-    0.819347520f,  0.573297167f,
-    0.817584813f,  0.575808191f,
-    0.815814411f,  0.578313796f,
-    0.814036330f,  0.580813958f,
-    0.812250587f,  0.583308653f,
-    0.810457198f,  0.585797857f,
-    0.808656182f,  0.588281548f,
-    0.806847554f,  0.590759702f,
-    0.805031331f,  0.593232295f,
-    0.803207531f,  0.595699304f,
-    0.801376172f,  0.598160707f,
-    0.799537269f,  0.600616479f,
-    0.797690841f,  0.603066599f,
-    0.795836905f,  0.605511041f,
-    0.793975478f,  0.607949785f,
-    0.792106577f,  0.610382806f,
-    0.790230221f,  0.612810082f,
-    0.788346428f,  0.615231591f,
-    0.786455214f,  0.617647308f,
-    0.784556597f,  0.620057212f,
-    0.782650596f,  0.622461279f,
-    0.780737229f,  0.624859488f,
-    0.778816512f,  0.627251815f,
-    0.776888466f,  0.629638239f,
-    0.774953107f,  0.632018736f,
-    0.773010453f,  0.634393284f,
-    0.771060524f,  0.636761861f,
-    0.769103338f,  0.639124445f,
-    0.767138912f,  0.641481013f,
-    0.765167266f,  0.643831543f,
-    0.763188417f,  0.646176013f,
-    0.761202385f,  0.648514401f,
-    0.759209189f,  0.650846685f,
-    0.757208847f,  0.653172843f,
-    0.755201377f,  0.655492853f,
-    0.753186799f,  0.657806693f,
-    0.751165132f,  0.660114342f,
-    0.749136395f,  0.662415778f,
-    0.747100606f,  0.664710978f,
-    0.745057785f,  0.666999922f,
-    0.743007952f,  0.669282588f,
-    0.740951125f,  0.671558955f,
-    0.738887324f,  0.673829000f,
-    0.736816569f,  0.676092704f,
-    0.734738878f,  0.678350043f,
-    0.732654272f,  0.680600998f,
-    0.730562769f,  0.682845546f,
-    0.728464390f,  0.685083668f,
-    0.726359155f,  0.687315341f,
-    0.724247083f,  0.689540545f,
-    0.722128194f,  0.691759258f,
-    0.720002508f,  0.693971461f,
-    0.717870045f,  0.696177131f,
-    0.715730825f,  0.698376249f,
-    0.713584869f,  0.700568794f,
-    0.711432196f,  0.702754744f,
-    0.709272826f,  0.704934080f,
-    0.707106781f,  0.707106781f,
-    0.704934080f,  0.709272826f,
-    0.702754744f,  0.711432196f,
-    0.700568794f,  0.713584869f,
-    0.698376249f,  0.715730825f,
-    0.696177131f,  0.717870045f,
-    0.693971461f,  0.720002508f,
-    0.691759258f,  0.722128194f,
-    0.689540545f,  0.724247083f,
-    0.687315341f,  0.726359155f,
-    0.685083668f,  0.728464390f,
-    0.682845546f,  0.730562769f,
-    0.680600998f,  0.732654272f,
-    0.678350043f,  0.734738878f,
-    0.676092704f,  0.736816569f,
-    0.673829000f,  0.738887324f,
-    0.671558955f,  0.740951125f,
-    0.669282588f,  0.743007952f,
-    0.666999922f,  0.745057785f,
-    0.664710978f,  0.747100606f,
-    0.662415778f,  0.749136395f,
-    0.660114342f,  0.751165132f,
-    0.657806693f,  0.753186799f,
-    0.655492853f,  0.755201377f,
-    0.653172843f,  0.757208847f,
-    0.650846685f,  0.759209189f,
-    0.648514401f,  0.761202385f,
-    0.646176013f,  0.763188417f,
-    0.643831543f,  0.765167266f,
-    0.641481013f,  0.767138912f,
-    0.639124445f,  0.769103338f,
-    0.636761861f,  0.771060524f,
-    0.634393284f,  0.773010453f,
-    0.632018736f,  0.774953107f,
-    0.629638239f,  0.776888466f,
-    0.627251815f,  0.778816512f,
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-    0.994879331f, -0.101069863f,
-    0.995184727f, -0.098017140f,
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-    0.995767414f, -0.091908956f,
-    0.996044701f, -0.088853553f,
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-    0.996571146f, -0.082740265f,
-    0.996820299f, -0.079682438f,
-    0.997060070f, -0.076623861f,
-    0.997290457f, -0.073564564f,
-    0.997511456f, -0.070504573f,
-    0.997723067f, -0.067443920f,
-    0.997925286f, -0.064382631f,
-    0.998118113f, -0.061320736f,
-    0.998301545f, -0.058258265f,
-    0.998475581f, -0.055195244f,
-    0.998640218f, -0.052131705f,
-    0.998795456f, -0.049067674f,
-    0.998941293f, -0.046003182f,
-    0.999077728f, -0.042938257f,
-    0.999204759f, -0.039872928f,
-    0.999322385f, -0.036807223f,
-    0.999430605f, -0.033741172f,
-    0.999529418f, -0.030674803f,
-    0.999618822f, -0.027608146f,
-    0.999698819f, -0.024541229f,
-    0.999769405f, -0.021474080f,
-    0.999830582f, -0.018406730f,
-    0.999882347f, -0.015339206f,
-    0.999924702f, -0.012271538f,
-    0.999957645f, -0.009203755f,
-    0.999981175f, -0.006135885f,
-    0.999995294f, -0.003067957f
-};
-
-/**    
-* \par    
-* Example code for Floating-point Twiddle factors Generation:    
-* \par    
-* 
for(i = 0; i< N/; i++)    
-* {    
-*	twiddleCoef[2*i]= cos(i * 2*PI/(float)N);    
-*	twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 4096	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are in interleaved fashion    
-*     
-*/
-const float32_t twiddleCoef_4096[8192] = {
-    1.000000000f,  0.000000000f,
-    0.999998823f,  0.001533980f,
-    0.999995294f,  0.003067957f,
-    0.999989411f,  0.004601926f,
-    0.999981175f,  0.006135885f,
-    0.999970586f,  0.007669829f,
-    0.999957645f,  0.009203755f,
-    0.999942350f,  0.010737659f,
-    0.999924702f,  0.012271538f,
-    0.999904701f,  0.013805389f,
-    0.999882347f,  0.015339206f,
-    0.999857641f,  0.016872988f,
-    0.999830582f,  0.018406730f,
-    0.999801170f,  0.019940429f,
-    0.999769405f,  0.021474080f,
-    0.999735288f,  0.023007681f,
-    0.999698819f,  0.024541229f,
-    0.999659997f,  0.026074718f,
-    0.999618822f,  0.027608146f,
-    0.999575296f,  0.029141509f,
-    0.999529418f,  0.030674803f,
-    0.999481187f,  0.032208025f,
-    0.999430605f,  0.033741172f,
-    0.999377670f,  0.035274239f,
-    0.999322385f,  0.036807223f,
-    0.999264747f,  0.038340120f,
-    0.999204759f,  0.039872928f,
-    0.999142419f,  0.041405641f,
-    0.999077728f,  0.042938257f,
-    0.999010686f,  0.044470772f,
-    0.998941293f,  0.046003182f,
-    0.998869550f,  0.047535484f,
-    0.998795456f,  0.049067674f,
-    0.998719012f,  0.050599749f,
-    0.998640218f,  0.052131705f,
-    0.998559074f,  0.053663538f,
-    0.998475581f,  0.055195244f,
-    0.998389737f,  0.056726821f,
-    0.998301545f,  0.058258265f,
-    0.998211003f,  0.059789571f,
-    0.998118113f,  0.061320736f,
-    0.998022874f,  0.062851758f,
-    0.997925286f,  0.064382631f,
-    0.997825350f,  0.065913353f,
-    0.997723067f,  0.067443920f,
-    0.997618435f,  0.068974328f,
-    0.997511456f,  0.070504573f,
-    0.997402130f,  0.072034653f,
-    0.997290457f,  0.073564564f,
-    0.997176437f,  0.075094301f,
-    0.997060070f,  0.076623861f,
-    0.996941358f,  0.078153242f,
-    0.996820299f,  0.079682438f,
-    0.996696895f,  0.081211447f,
-    0.996571146f,  0.082740265f,
-    0.996443051f,  0.084268888f,
-    0.996312612f,  0.085797312f,
-    0.996179829f,  0.087325535f,
-    0.996044701f,  0.088853553f,
-    0.995907229f,  0.090381361f,
-    0.995767414f,  0.091908956f,
-    0.995625256f,  0.093436336f,
-    0.995480755f,  0.094963495f,
-    0.995333912f,  0.096490431f,
-    0.995184727f,  0.098017140f,
-    0.995033199f,  0.099543619f,
-    0.994879331f,  0.101069863f,
-    0.994723121f,  0.102595869f,
-    0.994564571f,  0.104121634f,
-    0.994403680f,  0.105647154f,
-    0.994240449f,  0.107172425f,
-    0.994074879f,  0.108697444f,
-    0.993906970f,  0.110222207f,
-    0.993736722f,  0.111746711f,
-    0.993564136f,  0.113270952f,
-    0.993389211f,  0.114794927f,
-    0.993211949f,  0.116318631f,
-    0.993032350f,  0.117842062f,
-    0.992850414f,  0.119365215f,
-    0.992666142f,  0.120888087f,
-    0.992479535f,  0.122410675f,
-    0.992290591f,  0.123932975f,
-    0.992099313f,  0.125454983f,
-    0.991905700f,  0.126976696f,
-    0.991709754f,  0.128498111f,
-    0.991511473f,  0.130019223f,
-    0.991310860f,  0.131540029f,
-    0.991107914f,  0.133060525f,
-    0.990902635f,  0.134580709f,
-    0.990695025f,  0.136100575f,
-    0.990485084f,  0.137620122f,
-    0.990272812f,  0.139139344f,
-    0.990058210f,  0.140658239f,
-    0.989841278f,  0.142176804f,
-    0.989622017f,  0.143695033f,
-    0.989400428f,  0.145212925f,
-    0.989176510f,  0.146730474f,
-    0.988950265f,  0.148247679f,
-    0.988721692f,  0.149764535f,
-    0.988490793f,  0.151281038f,
-    0.988257568f,  0.152797185f,
-    0.988022017f,  0.154312973f,
-    0.987784142f,  0.155828398f,
-    0.987543942f,  0.157343456f,
-    0.987301418f,  0.158858143f,
-    0.987056571f,  0.160372457f,
-    0.986809402f,  0.161886394f,
-    0.986559910f,  0.163399949f,
-    0.986308097f,  0.164913120f,
-    0.986053963f,  0.166425904f,
-    0.985797509f,  0.167938295f,
-    0.985538735f,  0.169450291f,
-    0.985277642f,  0.170961889f,
-    0.985014231f,  0.172473084f,
-    0.984748502f,  0.173983873f,
-    0.984480455f,  0.175494253f,
-    0.984210092f,  0.177004220f,
-    0.983937413f,  0.178513771f,
-    0.983662419f,  0.180022901f,
-    0.983385110f,  0.181531608f,
-    0.983105487f,  0.183039888f,
-    0.982823551f,  0.184547737f,
-    0.982539302f,  0.186055152f,
-    0.982252741f,  0.187562129f,
-    0.981963869f,  0.189068664f,
-    0.981672686f,  0.190574755f,
-    0.981379193f,  0.192080397f,
-    0.981083391f,  0.193585587f,
-    0.980785280f,  0.195090322f,
-    0.980484862f,  0.196594598f,
-    0.980182136f,  0.198098411f,
-    0.979877104f,  0.199601758f,
-    0.979569766f,  0.201104635f,
-    0.979260123f,  0.202607039f,
-    0.978948175f,  0.204108966f,
-    0.978633924f,  0.205610413f,
-    0.978317371f,  0.207111376f,
-    0.977998515f,  0.208611852f,
-    0.977677358f,  0.210111837f,
-    0.977353900f,  0.211611327f,
-    0.977028143f,  0.213110320f,
-    0.976700086f,  0.214608811f,
-    0.976369731f,  0.216106797f,
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-    0.979569766f, -0.201104635f,
-    0.979877104f, -0.199601758f,
-    0.980182136f, -0.198098411f,
-    0.980484862f, -0.196594598f,
-    0.980785280f, -0.195090322f,
-    0.981083391f, -0.193585587f,
-    0.981379193f, -0.192080397f,
-    0.981672686f, -0.190574755f,
-    0.981963869f, -0.189068664f,
-    0.982252741f, -0.187562129f,
-    0.982539302f, -0.186055152f,
-    0.982823551f, -0.184547737f,
-    0.983105487f, -0.183039888f,
-    0.983385110f, -0.181531608f,
-    0.983662419f, -0.180022901f,
-    0.983937413f, -0.178513771f,
-    0.984210092f, -0.177004220f,
-    0.984480455f, -0.175494253f,
-    0.984748502f, -0.173983873f,
-    0.985014231f, -0.172473084f,
-    0.985277642f, -0.170961889f,
-    0.985538735f, -0.169450291f,
-    0.985797509f, -0.167938295f,
-    0.986053963f, -0.166425904f,
-    0.986308097f, -0.164913120f,
-    0.986559910f, -0.163399949f,
-    0.986809402f, -0.161886394f,
-    0.987056571f, -0.160372457f,
-    0.987301418f, -0.158858143f,
-    0.987543942f, -0.157343456f,
-    0.987784142f, -0.155828398f,
-    0.988022017f, -0.154312973f,
-    0.988257568f, -0.152797185f,
-    0.988490793f, -0.151281038f,
-    0.988721692f, -0.149764535f,
-    0.988950265f, -0.148247679f,
-    0.989176510f, -0.146730474f,
-    0.989400428f, -0.145212925f,
-    0.989622017f, -0.143695033f,
-    0.989841278f, -0.142176804f,
-    0.990058210f, -0.140658239f,
-    0.990272812f, -0.139139344f,
-    0.990485084f, -0.137620122f,
-    0.990695025f, -0.136100575f,
-    0.990902635f, -0.134580709f,
-    0.991107914f, -0.133060525f,
-    0.991310860f, -0.131540029f,
-    0.991511473f, -0.130019223f,
-    0.991709754f, -0.128498111f,
-    0.991905700f, -0.126976696f,
-    0.992099313f, -0.125454983f,
-    0.992290591f, -0.123932975f,
-    0.992479535f, -0.122410675f,
-    0.992666142f, -0.120888087f,
-    0.992850414f, -0.119365215f,
-    0.993032350f, -0.117842062f,
-    0.993211949f, -0.116318631f,
-    0.993389211f, -0.114794927f,
-    0.993564136f, -0.113270952f,
-    0.993736722f, -0.111746711f,
-    0.993906970f, -0.110222207f,
-    0.994074879f, -0.108697444f,
-    0.994240449f, -0.107172425f,
-    0.994403680f, -0.105647154f,
-    0.994564571f, -0.104121634f,
-    0.994723121f, -0.102595869f,
-    0.994879331f, -0.101069863f,
-    0.995033199f, -0.099543619f,
-    0.995184727f, -0.098017140f,
-    0.995333912f, -0.096490431f,
-    0.995480755f, -0.094963495f,
-    0.995625256f, -0.093436336f,
-    0.995767414f, -0.091908956f,
-    0.995907229f, -0.090381361f,
-    0.996044701f, -0.088853553f,
-    0.996179829f, -0.087325535f,
-    0.996312612f, -0.085797312f,
-    0.996443051f, -0.084268888f,
-    0.996571146f, -0.082740265f,
-    0.996696895f, -0.081211447f,
-    0.996820299f, -0.079682438f,
-    0.996941358f, -0.078153242f,
-    0.997060070f, -0.076623861f,
-    0.997176437f, -0.075094301f,
-    0.997290457f, -0.073564564f,
-    0.997402130f, -0.072034653f,
-    0.997511456f, -0.070504573f,
-    0.997618435f, -0.068974328f,
-    0.997723067f, -0.067443920f,
-    0.997825350f, -0.065913353f,
-    0.997925286f, -0.064382631f,
-    0.998022874f, -0.062851758f,
-    0.998118113f, -0.061320736f,
-    0.998211003f, -0.059789571f,
-    0.998301545f, -0.058258265f,
-    0.998389737f, -0.056726821f,
-    0.998475581f, -0.055195244f,
-    0.998559074f, -0.053663538f,
-    0.998640218f, -0.052131705f,
-    0.998719012f, -0.050599749f,
-    0.998795456f, -0.049067674f,
-    0.998869550f, -0.047535484f,
-    0.998941293f, -0.046003182f,
-    0.999010686f, -0.044470772f,
-    0.999077728f, -0.042938257f,
-    0.999142419f, -0.041405641f,
-    0.999204759f, -0.039872928f,
-    0.999264747f, -0.038340120f,
-    0.999322385f, -0.036807223f,
-    0.999377670f, -0.035274239f,
-    0.999430605f, -0.033741172f,
-    0.999481187f, -0.032208025f,
-    0.999529418f, -0.030674803f,
-    0.999575296f, -0.029141509f,
-    0.999618822f, -0.027608146f,
-    0.999659997f, -0.026074718f,
-    0.999698819f, -0.024541229f,
-    0.999735288f, -0.023007681f,
-    0.999769405f, -0.021474080f,
-    0.999801170f, -0.019940429f,
-    0.999830582f, -0.018406730f,
-    0.999857641f, -0.016872988f,
-    0.999882347f, -0.015339206f,
-    0.999904701f, -0.013805389f,
-    0.999924702f, -0.012271538f,
-    0.999942350f, -0.010737659f,
-    0.999957645f, -0.009203755f,
-    0.999970586f, -0.007669829f,
-    0.999981175f, -0.006135885f,
-    0.999989411f, -0.004601926f,
-    0.999995294f, -0.003067957f,
-    0.999998823f, -0.001533980f
-};
-
-/*    
-* @brief  Q31 Twiddle factors Table    
-*/
-
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 16	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_16_q31[24] = {
-    0x7FFFFFFF, 0x00000000,
-    0x7641AF3C, 0x30FBC54D,
-    0x5A82799A, 0x5A82799A,
-    0x30FBC54D, 0x7641AF3C,
-    0x00000000, 0x7FFFFFFF,
-    0xCF043AB2, 0x7641AF3C,
-    0xA57D8666, 0x5A82799A,
-    0x89BE50C3, 0x30FBC54D,
-    0x80000000, 0x00000000,
-    0x89BE50C3, 0xCF043AB2,
-    0xA57D8666, 0xA57D8666,
-    0xCF043AB2, 0x89BE50C3
-};
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 32	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_32_q31[48] = {
-    0x7FFFFFFF, 0x00000000,
-    0x7D8A5F3F, 0x18F8B83C,
-    0x7641AF3C, 0x30FBC54D,
-    0x6A6D98A4, 0x471CECE6,
-    0x5A82799A, 0x5A82799A,
-    0x471CECE6, 0x6A6D98A4,
-    0x30FBC54D, 0x7641AF3C,
-    0x18F8B83C, 0x7D8A5F3F,
-    0x00000000, 0x7FFFFFFF,
-    0xE70747C3, 0x7D8A5F3F,
-    0xCF043AB2, 0x7641AF3C,
-    0xB8E31319, 0x6A6D98A4,
-    0xA57D8666, 0x5A82799A,
-    0x9592675B, 0x471CECE6,
-    0x89BE50C3, 0x30FBC54D,
-    0x8275A0C0, 0x18F8B83C,
-    0x80000000, 0x00000000,
-    0x8275A0C0, 0xE70747C3,
-    0x89BE50C3, 0xCF043AB2,
-    0x9592675B, 0xB8E31319,
-    0xA57D8666, 0xA57D8666,
-    0xB8E31319, 0x9592675B,
-    0xCF043AB2, 0x89BE50C3,
-    0xE70747C3, 0x8275A0C0
-};
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 64	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_64_q31[96] = {
-    0x7FFFFFFF, 0x00000000,
-    0x7F62368F, 0x0C8BD35E,
-    0x7D8A5F3F, 0x18F8B83C,
-    0x7A7D055B, 0x25280C5D,
-    0x7641AF3C, 0x30FBC54D,
-    0x70E2CBC6, 0x3C56BA70,
-    0x6A6D98A4, 0x471CECE6,
-    0x62F201AC, 0x5133CC94,
-    0x5A82799A, 0x5A82799A,
-    0x5133CC94, 0x62F201AC,
-    0x471CECE6, 0x6A6D98A4,
-    0x3C56BA70, 0x70E2CBC6,
-    0x30FBC54D, 0x7641AF3C,
-    0x25280C5D, 0x7A7D055B,
-    0x18F8B83C, 0x7D8A5F3F,
-    0x0C8BD35E, 0x7F62368F,
-    0x00000000, 0x7FFFFFFF,
-    0xF3742CA1, 0x7F62368F,
-    0xE70747C3, 0x7D8A5F3F,
-    0xDAD7F3A2, 0x7A7D055B,
-    0xCF043AB2, 0x7641AF3C,
-    0xC3A9458F, 0x70E2CBC6,
-    0xB8E31319, 0x6A6D98A4,
-    0xAECC336B, 0x62F201AC,
-    0xA57D8666, 0x5A82799A,
-    0x9D0DFE53, 0x5133CC94,
-    0x9592675B, 0x471CECE6,
-    0x8F1D343A, 0x3C56BA70,
-    0x89BE50C3, 0x30FBC54D,
-    0x8582FAA4, 0x25280C5D,
-    0x8275A0C0, 0x18F8B83C,
-    0x809DC970, 0x0C8BD35E,
-    0x80000000, 0x00000000,
-    0x809DC970, 0xF3742CA1,
-    0x8275A0C0, 0xE70747C3,
-    0x8582FAA4, 0xDAD7F3A2,
-    0x89BE50C3, 0xCF043AB2,
-    0x8F1D343A, 0xC3A9458F,
-    0x9592675B, 0xB8E31319,
-    0x9D0DFE53, 0xAECC336B,
-    0xA57D8666, 0xA57D8666,
-    0xAECC336B, 0x9D0DFE53,
-    0xB8E31319, 0x9592675B,
-    0xC3A9458F, 0x8F1D343A,
-    0xCF043AB2, 0x89BE50C3,
-    0xDAD7F3A2, 0x8582FAA4,
-    0xE70747C3, 0x8275A0C0,
-    0xF3742CA1, 0x809DC970
-};
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 128	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_128_q31[192] = {
-    0x7FFFFFFF, 0x00000000,
-    0x7FD8878D, 0x0647D97C,
-    0x7F62368F, 0x0C8BD35E,
-    0x7E9D55FC, 0x12C8106E,
-    0x7D8A5F3F, 0x18F8B83C,
-    0x7C29FBEE, 0x1F19F97B,
-    0x7A7D055B, 0x25280C5D,
-    0x78848413, 0x2B1F34EB,
-    0x7641AF3C, 0x30FBC54D,
-    0x73B5EBD0, 0x36BA2013,
-    0x70E2CBC6, 0x3C56BA70,
-    0x6DCA0D14, 0x41CE1E64,
-    0x6A6D98A4, 0x471CECE6,
-    0x66CF811F, 0x4C3FDFF3,
-    0x62F201AC, 0x5133CC94,
-    0x5ED77C89, 0x55F5A4D2,
-    0x5A82799A, 0x5A82799A,
-    0x55F5A4D2, 0x5ED77C89,
-    0x5133CC94, 0x62F201AC,
-    0x4C3FDFF3, 0x66CF811F,
-    0x471CECE6, 0x6A6D98A4,
-    0x41CE1E64, 0x6DCA0D14,
-    0x3C56BA70, 0x70E2CBC6,
-    0x36BA2013, 0x73B5EBD0,
-    0x30FBC54D, 0x7641AF3C,
-    0x2B1F34EB, 0x78848413,
-    0x25280C5D, 0x7A7D055B,
-    0x1F19F97B, 0x7C29FBEE,
-    0x18F8B83C, 0x7D8A5F3F,
-    0x12C8106E, 0x7E9D55FC,
-    0x0C8BD35E, 0x7F62368F,
-    0x0647D97C, 0x7FD8878D,
-    0x00000000, 0x7FFFFFFF,
-    0xF9B82683, 0x7FD8878D,
-    0xF3742CA1, 0x7F62368F,
-    0xED37EF91, 0x7E9D55FC,
-    0xE70747C3, 0x7D8A5F3F,
-    0xE0E60684, 0x7C29FBEE,
-    0xDAD7F3A2, 0x7A7D055B,
-    0xD4E0CB14, 0x78848413,
-    0xCF043AB2, 0x7641AF3C,
-    0xC945DFEC, 0x73B5EBD0,
-    0xC3A9458F, 0x70E2CBC6,
-    0xBE31E19B, 0x6DCA0D14,
-    0xB8E31319, 0x6A6D98A4,
-    0xB3C0200C, 0x66CF811F,
-    0xAECC336B, 0x62F201AC,
-    0xAA0A5B2D, 0x5ED77C89,
-    0xA57D8666, 0x5A82799A,
-    0xA1288376, 0x55F5A4D2,
-    0x9D0DFE53, 0x5133CC94,
-    0x99307EE0, 0x4C3FDFF3,
-    0x9592675B, 0x471CECE6,
-    0x9235F2EB, 0x41CE1E64,
-    0x8F1D343A, 0x3C56BA70,
-    0x8C4A142F, 0x36BA2013,
-    0x89BE50C3, 0x30FBC54D,
-    0x877B7BEC, 0x2B1F34EB,
-    0x8582FAA4, 0x25280C5D,
-    0x83D60411, 0x1F19F97B,
-    0x8275A0C0, 0x18F8B83C,
-    0x8162AA03, 0x12C8106E,
-    0x809DC970, 0x0C8BD35E,
-    0x80277872, 0x0647D97C,
-    0x80000000, 0x00000000,
-    0x80277872, 0xF9B82683,
-    0x809DC970, 0xF3742CA1,
-    0x8162AA03, 0xED37EF91,
-    0x8275A0C0, 0xE70747C3,
-    0x83D60411, 0xE0E60684,
-    0x8582FAA4, 0xDAD7F3A2,
-    0x877B7BEC, 0xD4E0CB14,
-    0x89BE50C3, 0xCF043AB2,
-    0x8C4A142F, 0xC945DFEC,
-    0x8F1D343A, 0xC3A9458F,
-    0x9235F2EB, 0xBE31E19B,
-    0x9592675B, 0xB8E31319,
-    0x99307EE0, 0xB3C0200C,
-    0x9D0DFE53, 0xAECC336B,
-    0xA1288376, 0xAA0A5B2D,
-    0xA57D8666, 0xA57D8666,
-    0xAA0A5B2D, 0xA1288376,
-    0xAECC336B, 0x9D0DFE53,
-    0xB3C0200C, 0x99307EE0,
-    0xB8E31319, 0x9592675B,
-    0xBE31E19B, 0x9235F2EB,
-    0xC3A9458F, 0x8F1D343A,
-    0xC945DFEC, 0x8C4A142F,
-    0xCF043AB2, 0x89BE50C3,
-    0xD4E0CB14, 0x877B7BEC,
-    0xDAD7F3A2, 0x8582FAA4,
-    0xE0E60684, 0x83D60411,
-    0xE70747C3, 0x8275A0C0,
-    0xED37EF91, 0x8162AA03,
-    0xF3742CA1, 0x809DC970,
-    0xF9B82683, 0x80277872
-};
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 256	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_256_q31[384] = {
-    0x7FFFFFFF, 0x00000000,
-    0x7FF62182, 0x03242ABF,
-    0x7FD8878D, 0x0647D97C,
-    0x7FA736B4, 0x096A9049,
-    0x7F62368F, 0x0C8BD35E,
-    0x7F0991C3, 0x0FAB272B,
-    0x7E9D55FC, 0x12C8106E,
-    0x7E1D93E9, 0x15E21444,
-    0x7D8A5F3F, 0x18F8B83C,
-    0x7CE3CEB1, 0x1C0B826A,
-    0x7C29FBEE, 0x1F19F97B,
-    0x7B5D039D, 0x2223A4C5,
-    0x7A7D055B, 0x25280C5D,
-    0x798A23B1, 0x2826B928,
-    0x78848413, 0x2B1F34EB,
-    0x776C4EDB, 0x2E110A62,
-    0x7641AF3C, 0x30FBC54D,
-    0x7504D345, 0x33DEF287,
-    0x73B5EBD0, 0x36BA2013,
-    0x72552C84, 0x398CDD32,
-    0x70E2CBC6, 0x3C56BA70,
-    0x6F5F02B1, 0x3F1749B7,
-    0x6DCA0D14, 0x41CE1E64,
-    0x6C242960, 0x447ACD50,
-    0x6A6D98A4, 0x471CECE6,
-    0x68A69E81, 0x49B41533,
-    0x66CF811F, 0x4C3FDFF3,
-    0x64E88926, 0x4EBFE8A4,
-    0x62F201AC, 0x5133CC94,
-    0x60EC3830, 0x539B2AEF,
-    0x5ED77C89, 0x55F5A4D2,
-    0x5CB420DF, 0x5842DD54,
-    0x5A82799A, 0x5A82799A,
-    0x5842DD54, 0x5CB420DF,
-    0x55F5A4D2, 0x5ED77C89,
-    0x539B2AEF, 0x60EC3830,
-    0x5133CC94, 0x62F201AC,
-    0x4EBFE8A4, 0x64E88926,
-    0x4C3FDFF3, 0x66CF811F,
-    0x49B41533, 0x68A69E81,
-    0x471CECE6, 0x6A6D98A4,
-    0x447ACD50, 0x6C242960,
-    0x41CE1E64, 0x6DCA0D14,
-    0x3F1749B7, 0x6F5F02B1,
-    0x3C56BA70, 0x70E2CBC6,
-    0x398CDD32, 0x72552C84,
-    0x36BA2013, 0x73B5EBD0,
-    0x33DEF287, 0x7504D345,
-    0x30FBC54D, 0x7641AF3C,
-    0x2E110A62, 0x776C4EDB,
-    0x2B1F34EB, 0x78848413,
-    0x2826B928, 0x798A23B1,
-    0x25280C5D, 0x7A7D055B,
-    0x2223A4C5, 0x7B5D039D,
-    0x1F19F97B, 0x7C29FBEE,
-    0x1C0B826A, 0x7CE3CEB1,
-    0x18F8B83C, 0x7D8A5F3F,
-    0x15E21444, 0x7E1D93E9,
-    0x12C8106E, 0x7E9D55FC,
-    0x0FAB272B, 0x7F0991C3,
-    0x0C8BD35E, 0x7F62368F,
-    0x096A9049, 0x7FA736B4,
-    0x0647D97C, 0x7FD8878D,
-    0x03242ABF, 0x7FF62182,
-    0x00000000, 0x7FFFFFFF,
-    0xFCDBD541, 0x7FF62182,
-    0xF9B82683, 0x7FD8878D,
-    0xF6956FB6, 0x7FA736B4,
-    0xF3742CA1, 0x7F62368F,
-    0xF054D8D4, 0x7F0991C3,
-    0xED37EF91, 0x7E9D55FC,
-    0xEA1DEBBB, 0x7E1D93E9,
-    0xE70747C3, 0x7D8A5F3F,
-    0xE3F47D95, 0x7CE3CEB1,
-    0xE0E60684, 0x7C29FBEE,
-    0xDDDC5B3A, 0x7B5D039D,
-    0xDAD7F3A2, 0x7A7D055B,
-    0xD7D946D7, 0x798A23B1,
-    0xD4E0CB14, 0x78848413,
-    0xD1EEF59E, 0x776C4EDB,
-    0xCF043AB2, 0x7641AF3C,
-    0xCC210D78, 0x7504D345,
-    0xC945DFEC, 0x73B5EBD0,
-    0xC67322CD, 0x72552C84,
-    0xC3A9458F, 0x70E2CBC6,
-    0xC0E8B648, 0x6F5F02B1,
-    0xBE31E19B, 0x6DCA0D14,
-    0xBB8532AF, 0x6C242960,
-    0xB8E31319, 0x6A6D98A4,
-    0xB64BEACC, 0x68A69E81,
-    0xB3C0200C, 0x66CF811F,
-    0xB140175B, 0x64E88926,
-    0xAECC336B, 0x62F201AC,
-    0xAC64D510, 0x60EC3830,
-    0xAA0A5B2D, 0x5ED77C89,
-    0xA7BD22AB, 0x5CB420DF,
-    0xA57D8666, 0x5A82799A,
-    0xA34BDF20, 0x5842DD54,
-    0xA1288376, 0x55F5A4D2,
-    0x9F13C7D0, 0x539B2AEF,
-    0x9D0DFE53, 0x5133CC94,
-    0x9B1776D9, 0x4EBFE8A4,
-    0x99307EE0, 0x4C3FDFF3,
-    0x9759617E, 0x49B41533,
-    0x9592675B, 0x471CECE6,
-    0x93DBD69F, 0x447ACD50,
-    0x9235F2EB, 0x41CE1E64,
-    0x90A0FD4E, 0x3F1749B7,
-    0x8F1D343A, 0x3C56BA70,
-    0x8DAAD37B, 0x398CDD32,
-    0x8C4A142F, 0x36BA2013,
-    0x8AFB2CBA, 0x33DEF287,
-    0x89BE50C3, 0x30FBC54D,
-    0x8893B124, 0x2E110A62,
-    0x877B7BEC, 0x2B1F34EB,
-    0x8675DC4E, 0x2826B928,
-    0x8582FAA4, 0x25280C5D,
-    0x84A2FC62, 0x2223A4C5,
-    0x83D60411, 0x1F19F97B,
-    0x831C314E, 0x1C0B826A,
-    0x8275A0C0, 0x18F8B83C,
-    0x81E26C16, 0x15E21444,
-    0x8162AA03, 0x12C8106E,
-    0x80F66E3C, 0x0FAB272B,
-    0x809DC970, 0x0C8BD35E,
-    0x8058C94C, 0x096A9049,
-    0x80277872, 0x0647D97C,
-    0x8009DE7D, 0x03242ABF,
-    0x80000000, 0x00000000,
-    0x8009DE7D, 0xFCDBD541,
-    0x80277872, 0xF9B82683,
-    0x8058C94C, 0xF6956FB6,
-    0x809DC970, 0xF3742CA1,
-    0x80F66E3C, 0xF054D8D4,
-    0x8162AA03, 0xED37EF91,
-    0x81E26C16, 0xEA1DEBBB,
-    0x8275A0C0, 0xE70747C3,
-    0x831C314E, 0xE3F47D95,
-    0x83D60411, 0xE0E60684,
-    0x84A2FC62, 0xDDDC5B3A,
-    0x8582FAA4, 0xDAD7F3A2,
-    0x8675DC4E, 0xD7D946D7,
-    0x877B7BEC, 0xD4E0CB14,
-    0x8893B124, 0xD1EEF59E,
-    0x89BE50C3, 0xCF043AB2,
-    0x8AFB2CBA, 0xCC210D78,
-    0x8C4A142F, 0xC945DFEC,
-    0x8DAAD37B, 0xC67322CD,
-    0x8F1D343A, 0xC3A9458F,
-    0x90A0FD4E, 0xC0E8B648,
-    0x9235F2EB, 0xBE31E19B,
-    0x93DBD69F, 0xBB8532AF,
-    0x9592675B, 0xB8E31319,
-    0x9759617E, 0xB64BEACC,
-    0x99307EE0, 0xB3C0200C,
-    0x9B1776D9, 0xB140175B,
-    0x9D0DFE53, 0xAECC336B,
-    0x9F13C7D0, 0xAC64D510,
-    0xA1288376, 0xAA0A5B2D,
-    0xA34BDF20, 0xA7BD22AB,
-    0xA57D8666, 0xA57D8666,
-    0xA7BD22AB, 0xA34BDF20,
-    0xAA0A5B2D, 0xA1288376,
-    0xAC64D510, 0x9F13C7D0,
-    0xAECC336B, 0x9D0DFE53,
-    0xB140175B, 0x9B1776D9,
-    0xB3C0200C, 0x99307EE0,
-    0xB64BEACC, 0x9759617E,
-    0xB8E31319, 0x9592675B,
-    0xBB8532AF, 0x93DBD69F,
-    0xBE31E19B, 0x9235F2EB,
-    0xC0E8B648, 0x90A0FD4E,
-    0xC3A9458F, 0x8F1D343A,
-    0xC67322CD, 0x8DAAD37B,
-    0xC945DFEC, 0x8C4A142F,
-    0xCC210D78, 0x8AFB2CBA,
-    0xCF043AB2, 0x89BE50C3,
-    0xD1EEF59E, 0x8893B124,
-    0xD4E0CB14, 0x877B7BEC,
-    0xD7D946D7, 0x8675DC4E,
-    0xDAD7F3A2, 0x8582FAA4,
-    0xDDDC5B3A, 0x84A2FC62,
-    0xE0E60684, 0x83D60411,
-    0xE3F47D95, 0x831C314E,
-    0xE70747C3, 0x8275A0C0,
-    0xEA1DEBBB, 0x81E26C16,
-    0xED37EF91, 0x8162AA03,
-    0xF054D8D4, 0x80F66E3C,
-    0xF3742CA1, 0x809DC970,
-    0xF6956FB6, 0x8058C94C,
-    0xF9B82683, 0x80277872,
-    0xFCDBD541, 0x8009DE7D
-};
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 512	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_512_q31[768] = {
-    0x7FFFFFFF, 0x00000000,
-    0x7FFD885A, 0x01921D1F,
-    0x7FF62182, 0x03242ABF,
-    0x7FE9CBC0, 0x04B6195D,
-    0x7FD8878D, 0x0647D97C,
-    0x7FC25596, 0x07D95B9E,
-    0x7FA736B4, 0x096A9049,
-    0x7F872BF3, 0x0AFB6805,
-    0x7F62368F, 0x0C8BD35E,
-    0x7F3857F5, 0x0E1BC2E3,
-    0x7F0991C3, 0x0FAB272B,
-    0x7ED5E5C6, 0x1139F0CE,
-    0x7E9D55FC, 0x12C8106E,
-    0x7E5FE493, 0x145576B1,
-    0x7E1D93E9, 0x15E21444,
-    0x7DD6668E, 0x176DD9DE,
-    0x7D8A5F3F, 0x18F8B83C,
-    0x7D3980EC, 0x1A82A025,
-    0x7CE3CEB1, 0x1C0B826A,
-    0x7C894BDD, 0x1D934FE5,
-    0x7C29FBEE, 0x1F19F97B,
-    0x7BC5E28F, 0x209F701C,
-    0x7B5D039D, 0x2223A4C5,
-    0x7AEF6323, 0x23A6887E,
-    0x7A7D055B, 0x25280C5D,
-    0x7A05EEAD, 0x26A82185,
-    0x798A23B1, 0x2826B928,
-    0x7909A92C, 0x29A3C484,
-    0x78848413, 0x2B1F34EB,
-    0x77FAB988, 0x2C98FBBA,
-    0x776C4EDB, 0x2E110A62,
-    0x76D94988, 0x2F875262,
-    0x7641AF3C, 0x30FBC54D,
-    0x75A585CF, 0x326E54C7,
-    0x7504D345, 0x33DEF287,
-    0x745F9DD1, 0x354D9056,
-    0x73B5EBD0, 0x36BA2013,
-    0x7307C3D0, 0x382493B0,
-    0x72552C84, 0x398CDD32,
-    0x719E2CD2, 0x3AF2EEB7,
-    0x70E2CBC6, 0x3C56BA70,
-    0x70231099, 0x3DB832A5,
-    0x6F5F02B1, 0x3F1749B7,
-    0x6E96A99C, 0x4073F21D,
-    0x6DCA0D14, 0x41CE1E64,
-    0x6CF934FB, 0x4325C135,
-    0x6C242960, 0x447ACD50,
-    0x6B4AF278, 0x45CD358F,
-    0x6A6D98A4, 0x471CECE6,
-    0x698C246C, 0x4869E664,
-    0x68A69E81, 0x49B41533,
-    0x67BD0FBC, 0x4AFB6C97,
-    0x66CF811F, 0x4C3FDFF3,
-    0x65DDFBD3, 0x4D8162C4,
-    0x64E88926, 0x4EBFE8A4,
-    0x63EF328F, 0x4FFB654D,
-    0x62F201AC, 0x5133CC94,
-    0x61F1003E, 0x5269126E,
-    0x60EC3830, 0x539B2AEF,
-    0x5FE3B38D, 0x54CA0A4A,
-    0x5ED77C89, 0x55F5A4D2,
-    0x5DC79D7C, 0x571DEEF9,
-    0x5CB420DF, 0x5842DD54,
-    0x5B9D1153, 0x59646497,
-    0x5A82799A, 0x5A82799A,
-    0x59646497, 0x5B9D1153,
-    0x5842DD54, 0x5CB420DF,
-    0x571DEEF9, 0x5DC79D7C,
-    0x55F5A4D2, 0x5ED77C89,
-    0x54CA0A4A, 0x5FE3B38D,
-    0x539B2AEF, 0x60EC3830,
-    0x5269126E, 0x61F1003E,
-    0x5133CC94, 0x62F201AC,
-    0x4FFB654D, 0x63EF328F,
-    0x4EBFE8A4, 0x64E88926,
-    0x4D8162C4, 0x65DDFBD3,
-    0x4C3FDFF3, 0x66CF811F,
-    0x4AFB6C97, 0x67BD0FBC,
-    0x49B41533, 0x68A69E81,
-    0x4869E664, 0x698C246C,
-    0x471CECE6, 0x6A6D98A4,
-    0x45CD358F, 0x6B4AF278,
-    0x447ACD50, 0x6C242960,
-    0x4325C135, 0x6CF934FB,
-    0x41CE1E64, 0x6DCA0D14,
-    0x4073F21D, 0x6E96A99C,
-    0x3F1749B7, 0x6F5F02B1,
-    0x3DB832A5, 0x70231099,
-    0x3C56BA70, 0x70E2CBC6,
-    0x3AF2EEB7, 0x719E2CD2,
-    0x398CDD32, 0x72552C84,
-    0x382493B0, 0x7307C3D0,
-    0x36BA2013, 0x73B5EBD0,
-    0x354D9056, 0x745F9DD1,
-    0x33DEF287, 0x7504D345,
-    0x326E54C7, 0x75A585CF,
-    0x30FBC54D, 0x7641AF3C,
-    0x2F875262, 0x76D94988,
-    0x2E110A62, 0x776C4EDB,
-    0x2C98FBBA, 0x77FAB988,
-    0x2B1F34EB, 0x78848413,
-    0x29A3C484, 0x7909A92C,
-    0x2826B928, 0x798A23B1,
-    0x26A82185, 0x7A05EEAD,
-    0x25280C5D, 0x7A7D055B,
-    0x23A6887E, 0x7AEF6323,
-    0x2223A4C5, 0x7B5D039D,
-    0x209F701C, 0x7BC5E28F,
-    0x1F19F97B, 0x7C29FBEE,
-    0x1D934FE5, 0x7C894BDD,
-    0x1C0B826A, 0x7CE3CEB1,
-    0x1A82A025, 0x7D3980EC,
-    0x18F8B83C, 0x7D8A5F3F,
-    0x176DD9DE, 0x7DD6668E,
-    0x15E21444, 0x7E1D93E9,
-    0x145576B1, 0x7E5FE493,
-    0x12C8106E, 0x7E9D55FC,
-    0x1139F0CE, 0x7ED5E5C6,
-    0x0FAB272B, 0x7F0991C3,
-    0x0E1BC2E3, 0x7F3857F5,
-    0x0C8BD35E, 0x7F62368F,
-    0x0AFB6805, 0x7F872BF3,
-    0x096A9049, 0x7FA736B4,
-    0x07D95B9E, 0x7FC25596,
-    0x0647D97C, 0x7FD8878D,
-    0x04B6195D, 0x7FE9CBC0,
-    0x03242ABF, 0x7FF62182,
-    0x01921D1F, 0x7FFD885A,
-    0x00000000, 0x7FFFFFFF,
-    0xFE6DE2E0, 0x7FFD885A,
-    0xFCDBD541, 0x7FF62182,
-    0xFB49E6A2, 0x7FE9CBC0,
-    0xF9B82683, 0x7FD8878D,
-    0xF826A461, 0x7FC25596,
-    0xF6956FB6, 0x7FA736B4,
-    0xF50497FA, 0x7F872BF3,
-    0xF3742CA1, 0x7F62368F,
-    0xF1E43D1C, 0x7F3857F5,
-    0xF054D8D4, 0x7F0991C3,
-    0xEEC60F31, 0x7ED5E5C6,
-    0xED37EF91, 0x7E9D55FC,
-    0xEBAA894E, 0x7E5FE493,
-    0xEA1DEBBB, 0x7E1D93E9,
-    0xE8922621, 0x7DD6668E,
-    0xE70747C3, 0x7D8A5F3F,
-    0xE57D5FDA, 0x7D3980EC,
-    0xE3F47D95, 0x7CE3CEB1,
-    0xE26CB01A, 0x7C894BDD,
-    0xE0E60684, 0x7C29FBEE,
-    0xDF608FE3, 0x7BC5E28F,
-    0xDDDC5B3A, 0x7B5D039D,
-    0xDC597781, 0x7AEF6323,
-    0xDAD7F3A2, 0x7A7D055B,
-    0xD957DE7A, 0x7A05EEAD,
-    0xD7D946D7, 0x798A23B1,
-    0xD65C3B7B, 0x7909A92C,
-    0xD4E0CB14, 0x78848413,
-    0xD3670445, 0x77FAB988,
-    0xD1EEF59E, 0x776C4EDB,
-    0xD078AD9D, 0x76D94988,
-    0xCF043AB2, 0x7641AF3C,
-    0xCD91AB38, 0x75A585CF,
-    0xCC210D78, 0x7504D345,
-    0xCAB26FA9, 0x745F9DD1,
-    0xC945DFEC, 0x73B5EBD0,
-    0xC7DB6C50, 0x7307C3D0,
-    0xC67322CD, 0x72552C84,
-    0xC50D1148, 0x719E2CD2,
-    0xC3A9458F, 0x70E2CBC6,
-    0xC247CD5A, 0x70231099,
-    0xC0E8B648, 0x6F5F02B1,
-    0xBF8C0DE2, 0x6E96A99C,
-    0xBE31E19B, 0x6DCA0D14,
-    0xBCDA3ECA, 0x6CF934FB,
-    0xBB8532AF, 0x6C242960,
-    0xBA32CA70, 0x6B4AF278,
-    0xB8E31319, 0x6A6D98A4,
-    0xB796199B, 0x698C246C,
-    0xB64BEACC, 0x68A69E81,
-    0xB5049368, 0x67BD0FBC,
-    0xB3C0200C, 0x66CF811F,
-    0xB27E9D3B, 0x65DDFBD3,
-    0xB140175B, 0x64E88926,
-    0xB0049AB2, 0x63EF328F,
-    0xAECC336B, 0x62F201AC,
-    0xAD96ED91, 0x61F1003E,
-    0xAC64D510, 0x60EC3830,
-    0xAB35F5B5, 0x5FE3B38D,
-    0xAA0A5B2D, 0x5ED77C89,
-    0xA8E21106, 0x5DC79D7C,
-    0xA7BD22AB, 0x5CB420DF,
-    0xA69B9B68, 0x5B9D1153,
-    0xA57D8666, 0x5A82799A,
-    0xA462EEAC, 0x59646497,
-    0xA34BDF20, 0x5842DD54,
-    0xA2386283, 0x571DEEF9,
-    0xA1288376, 0x55F5A4D2,
-    0xA01C4C72, 0x54CA0A4A,
-    0x9F13C7D0, 0x539B2AEF,
-    0x9E0EFFC1, 0x5269126E,
-    0x9D0DFE53, 0x5133CC94,
-    0x9C10CD70, 0x4FFB654D,
-    0x9B1776D9, 0x4EBFE8A4,
-    0x9A22042C, 0x4D8162C4,
-    0x99307EE0, 0x4C3FDFF3,
-    0x9842F043, 0x4AFB6C97,
-    0x9759617E, 0x49B41533,
-    0x9673DB94, 0x4869E664,
-    0x9592675B, 0x471CECE6,
-    0x94B50D87, 0x45CD358F,
-    0x93DBD69F, 0x447ACD50,
-    0x9306CB04, 0x4325C135,
-    0x9235F2EB, 0x41CE1E64,
-    0x91695663, 0x4073F21D,
-    0x90A0FD4E, 0x3F1749B7,
-    0x8FDCEF66, 0x3DB832A5,
-    0x8F1D343A, 0x3C56BA70,
-    0x8E61D32D, 0x3AF2EEB7,
-    0x8DAAD37B, 0x398CDD32,
-    0x8CF83C30, 0x382493B0,
-    0x8C4A142F, 0x36BA2013,
-    0x8BA0622F, 0x354D9056,
-    0x8AFB2CBA, 0x33DEF287,
-    0x8A5A7A30, 0x326E54C7,
-    0x89BE50C3, 0x30FBC54D,
-    0x8926B677, 0x2F875262,
-    0x8893B124, 0x2E110A62,
-    0x88054677, 0x2C98FBBA,
-    0x877B7BEC, 0x2B1F34EB,
-    0x86F656D3, 0x29A3C484,
-    0x8675DC4E, 0x2826B928,
-    0x85FA1152, 0x26A82185,
-    0x8582FAA4, 0x25280C5D,
-    0x85109CDC, 0x23A6887E,
-    0x84A2FC62, 0x2223A4C5,
-    0x843A1D70, 0x209F701C,
-    0x83D60411, 0x1F19F97B,
-    0x8376B422, 0x1D934FE5,
-    0x831C314E, 0x1C0B826A,
-    0x82C67F13, 0x1A82A025,
-    0x8275A0C0, 0x18F8B83C,
-    0x82299971, 0x176DD9DE,
-    0x81E26C16, 0x15E21444,
-    0x81A01B6C, 0x145576B1,
-    0x8162AA03, 0x12C8106E,
-    0x812A1A39, 0x1139F0CE,
-    0x80F66E3C, 0x0FAB272B,
-    0x80C7A80A, 0x0E1BC2E3,
-    0x809DC970, 0x0C8BD35E,
-    0x8078D40D, 0x0AFB6805,
-    0x8058C94C, 0x096A9049,
-    0x803DAA69, 0x07D95B9E,
-    0x80277872, 0x0647D97C,
-    0x80163440, 0x04B6195D,
-    0x8009DE7D, 0x03242ABF,
-    0x800277A5, 0x01921D1F,
-    0x80000000, 0x00000000,
-    0x800277A5, 0xFE6DE2E0,
-    0x8009DE7D, 0xFCDBD541,
-    0x80163440, 0xFB49E6A2,
-    0x80277872, 0xF9B82683,
-    0x803DAA69, 0xF826A461,
-    0x8058C94C, 0xF6956FB6,
-    0x8078D40D, 0xF50497FA,
-    0x809DC970, 0xF3742CA1,
-    0x80C7A80A, 0xF1E43D1C,
-    0x80F66E3C, 0xF054D8D4,
-    0x812A1A39, 0xEEC60F31,
-    0x8162AA03, 0xED37EF91,
-    0x81A01B6C, 0xEBAA894E,
-    0x81E26C16, 0xEA1DEBBB,
-    0x82299971, 0xE8922621,
-    0x8275A0C0, 0xE70747C3,
-    0x82C67F13, 0xE57D5FDA,
-    0x831C314E, 0xE3F47D95,
-    0x8376B422, 0xE26CB01A,
-    0x83D60411, 0xE0E60684,
-    0x843A1D70, 0xDF608FE3,
-    0x84A2FC62, 0xDDDC5B3A,
-    0x85109CDC, 0xDC597781,
-    0x8582FAA4, 0xDAD7F3A2,
-    0x85FA1152, 0xD957DE7A,
-    0x8675DC4E, 0xD7D946D7,
-    0x86F656D3, 0xD65C3B7B,
-    0x877B7BEC, 0xD4E0CB14,
-    0x88054677, 0xD3670445,
-    0x8893B124, 0xD1EEF59E,
-    0x8926B677, 0xD078AD9D,
-    0x89BE50C3, 0xCF043AB2,
-    0x8A5A7A30, 0xCD91AB38,
-    0x8AFB2CBA, 0xCC210D78,
-    0x8BA0622F, 0xCAB26FA9,
-    0x8C4A142F, 0xC945DFEC,
-    0x8CF83C30, 0xC7DB6C50,
-    0x8DAAD37B, 0xC67322CD,
-    0x8E61D32D, 0xC50D1148,
-    0x8F1D343A, 0xC3A9458F,
-    0x8FDCEF66, 0xC247CD5A,
-    0x90A0FD4E, 0xC0E8B648,
-    0x91695663, 0xBF8C0DE2,
-    0x9235F2EB, 0xBE31E19B,
-    0x9306CB04, 0xBCDA3ECA,
-    0x93DBD69F, 0xBB8532AF,
-    0x94B50D87, 0xBA32CA70,
-    0x9592675B, 0xB8E31319,
-    0x9673DB94, 0xB796199B,
-    0x9759617E, 0xB64BEACC,
-    0x9842F043, 0xB5049368,
-    0x99307EE0, 0xB3C0200C,
-    0x9A22042C, 0xB27E9D3B,
-    0x9B1776D9, 0xB140175B,
-    0x9C10CD70, 0xB0049AB2,
-    0x9D0DFE53, 0xAECC336B,
-    0x9E0EFFC1, 0xAD96ED91,
-    0x9F13C7D0, 0xAC64D510,
-    0xA01C4C72, 0xAB35F5B5,
-    0xA1288376, 0xAA0A5B2D,
-    0xA2386283, 0xA8E21106,
-    0xA34BDF20, 0xA7BD22AB,
-    0xA462EEAC, 0xA69B9B68,
-    0xA57D8666, 0xA57D8666,
-    0xA69B9B68, 0xA462EEAC,
-    0xA7BD22AB, 0xA34BDF20,
-    0xA8E21106, 0xA2386283,
-    0xAA0A5B2D, 0xA1288376,
-    0xAB35F5B5, 0xA01C4C72,
-    0xAC64D510, 0x9F13C7D0,
-    0xAD96ED91, 0x9E0EFFC1,
-    0xAECC336B, 0x9D0DFE53,
-    0xB0049AB2, 0x9C10CD70,
-    0xB140175B, 0x9B1776D9,
-    0xB27E9D3B, 0x9A22042C,
-    0xB3C0200C, 0x99307EE0,
-    0xB5049368, 0x9842F043,
-    0xB64BEACC, 0x9759617E,
-    0xB796199B, 0x9673DB94,
-    0xB8E31319, 0x9592675B,
-    0xBA32CA70, 0x94B50D87,
-    0xBB8532AF, 0x93DBD69F,
-    0xBCDA3ECA, 0x9306CB04,
-    0xBE31E19B, 0x9235F2EB,
-    0xBF8C0DE2, 0x91695663,
-    0xC0E8B648, 0x90A0FD4E,
-    0xC247CD5A, 0x8FDCEF66,
-    0xC3A9458F, 0x8F1D343A,
-    0xC50D1148, 0x8E61D32D,
-    0xC67322CD, 0x8DAAD37B,
-    0xC7DB6C50, 0x8CF83C30,
-    0xC945DFEC, 0x8C4A142F,
-    0xCAB26FA9, 0x8BA0622F,
-    0xCC210D78, 0x8AFB2CBA,
-    0xCD91AB38, 0x8A5A7A30,
-    0xCF043AB2, 0x89BE50C3,
-    0xD078AD9D, 0x8926B677,
-    0xD1EEF59E, 0x8893B124,
-    0xD3670445, 0x88054677,
-    0xD4E0CB14, 0x877B7BEC,
-    0xD65C3B7B, 0x86F656D3,
-    0xD7D946D7, 0x8675DC4E,
-    0xD957DE7A, 0x85FA1152,
-    0xDAD7F3A2, 0x8582FAA4,
-    0xDC597781, 0x85109CDC,
-    0xDDDC5B3A, 0x84A2FC62,
-    0xDF608FE3, 0x843A1D70,
-    0xE0E60684, 0x83D60411,
-    0xE26CB01A, 0x8376B422,
-    0xE3F47D95, 0x831C314E,
-    0xE57D5FDA, 0x82C67F13,
-    0xE70747C3, 0x8275A0C0,
-    0xE8922621, 0x82299971,
-    0xEA1DEBBB, 0x81E26C16,
-    0xEBAA894E, 0x81A01B6C,
-    0xED37EF91, 0x8162AA03,
-    0xEEC60F31, 0x812A1A39,
-    0xF054D8D4, 0x80F66E3C,
-    0xF1E43D1C, 0x80C7A80A,
-    0xF3742CA1, 0x809DC970,
-    0xF50497FA, 0x8078D40D,
-    0xF6956FB6, 0x8058C94C,
-    0xF826A461, 0x803DAA69,
-    0xF9B82683, 0x80277872,
-    0xFB49E6A2, 0x80163440,
-    0xFCDBD541, 0x8009DE7D,
-    0xFE6DE2E0, 0x800277A5
-};
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 1024	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_1024_q31[1536] = {
-    0x7FFFFFFF, 0x00000000,
-    0x7FFF6216, 0x00C90F88,
-    0x7FFD885A, 0x01921D1F,
-    0x7FFA72D1, 0x025B26D7,
-    0x7FF62182, 0x03242ABF,
-    0x7FF09477, 0x03ED26E6,
-    0x7FE9CBC0, 0x04B6195D,
-    0x7FE1C76B, 0x057F0034,
-    0x7FD8878D, 0x0647D97C,
-    0x7FCE0C3E, 0x0710A344,
-    0x7FC25596, 0x07D95B9E,
-    0x7FB563B2, 0x08A2009A,
-    0x7FA736B4, 0x096A9049,
-    0x7F97CEBC, 0x0A3308BC,
-    0x7F872BF3, 0x0AFB6805,
-    0x7F754E7F, 0x0BC3AC35,
-    0x7F62368F, 0x0C8BD35E,
-    0x7F4DE450, 0x0D53DB92,
-    0x7F3857F5, 0x0E1BC2E3,
-    0x7F2191B4, 0x0EE38765,
-    0x7F0991C3, 0x0FAB272B,
-    0x7EF0585F, 0x1072A047,
-    0x7ED5E5C6, 0x1139F0CE,
-    0x7EBA3A39, 0x120116D4,
-    0x7E9D55FC, 0x12C8106E,
-    0x7E7F3956, 0x138EDBB0,
-    0x7E5FE493, 0x145576B1,
-    0x7E3F57FE, 0x151BDF85,
-    0x7E1D93E9, 0x15E21444,
-    0x7DFA98A7, 0x16A81305,
-    0x7DD6668E, 0x176DD9DE,
-    0x7DB0FDF7, 0x183366E8,
-    0x7D8A5F3F, 0x18F8B83C,
-    0x7D628AC5, 0x19BDCBF2,
-    0x7D3980EC, 0x1A82A025,
-    0x7D0F4218, 0x1B4732EF,
-    0x7CE3CEB1, 0x1C0B826A,
-    0x7CB72724, 0x1CCF8CB3,
-    0x7C894BDD, 0x1D934FE5,
-    0x7C5A3D4F, 0x1E56CA1E,
-    0x7C29FBEE, 0x1F19F97B,
-    0x7BF88830, 0x1FDCDC1A,
-    0x7BC5E28F, 0x209F701C,
-    0x7B920B89, 0x2161B39F,
-    0x7B5D039D, 0x2223A4C5,
-    0x7B26CB4F, 0x22E541AE,
-    0x7AEF6323, 0x23A6887E,
-    0x7AB6CBA3, 0x24677757,
-    0x7A7D055B, 0x25280C5D,
-    0x7A4210D8, 0x25E845B5,
-    0x7A05EEAD, 0x26A82185,
-    0x79C89F6D, 0x27679DF4,
-    0x798A23B1, 0x2826B928,
-    0x794A7C11, 0x28E5714A,
-    0x7909A92C, 0x29A3C484,
-    0x78C7ABA1, 0x2A61B101,
-    0x78848413, 0x2B1F34EB,
-    0x78403328, 0x2BDC4E6F,
-    0x77FAB988, 0x2C98FBBA,
-    0x77B417DF, 0x2D553AFB,
-    0x776C4EDB, 0x2E110A62,
-    0x77235F2D, 0x2ECC681E,
-    0x76D94988, 0x2F875262,
-    0x768E0EA5, 0x3041C760,
-    0x7641AF3C, 0x30FBC54D,
-    0x75F42C0A, 0x31B54A5D,
-    0x75A585CF, 0x326E54C7,
-    0x7555BD4B, 0x3326E2C2,
-    0x7504D345, 0x33DEF287,
-    0x74B2C883, 0x3496824F,
-    0x745F9DD1, 0x354D9056,
-    0x740B53FA, 0x36041AD9,
-    0x73B5EBD0, 0x36BA2013,
-    0x735F6626, 0x376F9E46,
-    0x7307C3D0, 0x382493B0,
-    0x72AF05A6, 0x38D8FE93,
-    0x72552C84, 0x398CDD32,
-    0x71FA3948, 0x3A402DD1,
-    0x719E2CD2, 0x3AF2EEB7,
-    0x71410804, 0x3BA51E29,
-    0x70E2CBC6, 0x3C56BA70,
-    0x708378FE, 0x3D07C1D5,
-    0x70231099, 0x3DB832A5,
-    0x6FC19385, 0x3E680B2C,
-    0x6F5F02B1, 0x3F1749B7,
-    0x6EFB5F12, 0x3FC5EC97,
-    0x6E96A99C, 0x4073F21D,
-    0x6E30E349, 0x4121589A,
-    0x6DCA0D14, 0x41CE1E64,
-    0x6D6227FA, 0x427A41D0,
-    0x6CF934FB, 0x4325C135,
-    0x6C8F351C, 0x43D09AEC,
-    0x6C242960, 0x447ACD50,
-    0x6BB812D0, 0x452456BC,
-    0x6B4AF278, 0x45CD358F,
-    0x6ADCC964, 0x46756827,
-    0x6A6D98A4, 0x471CECE6,
-    0x69FD614A, 0x47C3C22E,
-    0x698C246C, 0x4869E664,
-    0x6919E320, 0x490F57EE,
-    0x68A69E81, 0x49B41533,
-    0x683257AA, 0x4A581C9D,
-    0x67BD0FBC, 0x4AFB6C97,
-    0x6746C7D7, 0x4B9E038F,
-    0x66CF811F, 0x4C3FDFF3,
-    0x66573CBB, 0x4CE10034,
-    0x65DDFBD3, 0x4D8162C4,
-    0x6563BF92, 0x4E210617,
-    0x64E88926, 0x4EBFE8A4,
-    0x646C59BF, 0x4F5E08E3,
-    0x63EF328F, 0x4FFB654D,
-    0x637114CC, 0x5097FC5E,
-    0x62F201AC, 0x5133CC94,
-    0x6271FA69, 0x51CED46E,
-    0x61F1003E, 0x5269126E,
-    0x616F146B, 0x53028517,
-    0x60EC3830, 0x539B2AEF,
-    0x60686CCE, 0x5433027D,
-    0x5FE3B38D, 0x54CA0A4A,
-    0x5F5E0DB3, 0x556040E2,
-    0x5ED77C89, 0x55F5A4D2,
-    0x5E50015D, 0x568A34A9,
-    0x5DC79D7C, 0x571DEEF9,
-    0x5D3E5236, 0x57B0D256,
-    0x5CB420DF, 0x5842DD54,
-    0x5C290ACC, 0x58D40E8C,
-    0x5B9D1153, 0x59646497,
-    0x5B1035CF, 0x59F3DE12,
-    0x5A82799A, 0x5A82799A,
-    0x59F3DE12, 0x5B1035CF,
-    0x59646497, 0x5B9D1153,
-    0x58D40E8C, 0x5C290ACC,
-    0x5842DD54, 0x5CB420DF,
-    0x57B0D256, 0x5D3E5236,
-    0x571DEEF9, 0x5DC79D7C,
-    0x568A34A9, 0x5E50015D,
-    0x55F5A4D2, 0x5ED77C89,
-    0x556040E2, 0x5F5E0DB3,
-    0x54CA0A4A, 0x5FE3B38D,
-    0x5433027D, 0x60686CCE,
-    0x539B2AEF, 0x60EC3830,
-    0x53028517, 0x616F146B,
-    0x5269126E, 0x61F1003E,
-    0x51CED46E, 0x6271FA69,
-    0x5133CC94, 0x62F201AC,
-    0x5097FC5E, 0x637114CC,
-    0x4FFB654D, 0x63EF328F,
-    0x4F5E08E3, 0x646C59BF,
-    0x4EBFE8A4, 0x64E88926,
-    0x4E210617, 0x6563BF92,
-    0x4D8162C4, 0x65DDFBD3,
-    0x4CE10034, 0x66573CBB,
-    0x4C3FDFF3, 0x66CF811F,
-    0x4B9E038F, 0x6746C7D7,
-    0x4AFB6C97, 0x67BD0FBC,
-    0x4A581C9D, 0x683257AA,
-    0x49B41533, 0x68A69E81,
-    0x490F57EE, 0x6919E320,
-    0x4869E664, 0x698C246C,
-    0x47C3C22E, 0x69FD614A,
-    0x471CECE6, 0x6A6D98A4,
-    0x46756827, 0x6ADCC964,
-    0x45CD358F, 0x6B4AF278,
-    0x452456BC, 0x6BB812D0,
-    0x447ACD50, 0x6C242960,
-    0x43D09AEC, 0x6C8F351C,
-    0x4325C135, 0x6CF934FB,
-    0x427A41D0, 0x6D6227FA,
-    0x41CE1E64, 0x6DCA0D14,
-    0x4121589A, 0x6E30E349,
-    0x4073F21D, 0x6E96A99C,
-    0x3FC5EC97, 0x6EFB5F12,
-    0x3F1749B7, 0x6F5F02B1,
-    0x3E680B2C, 0x6FC19385,
-    0x3DB832A5, 0x70231099,
-    0x3D07C1D5, 0x708378FE,
-    0x3C56BA70, 0x70E2CBC6,
-    0x3BA51E29, 0x71410804,
-    0x3AF2EEB7, 0x719E2CD2,
-    0x3A402DD1, 0x71FA3948,
-    0x398CDD32, 0x72552C84,
-    0x38D8FE93, 0x72AF05A6,
-    0x382493B0, 0x7307C3D0,
-    0x376F9E46, 0x735F6626,
-    0x36BA2013, 0x73B5EBD0,
-    0x36041AD9, 0x740B53FA,
-    0x354D9056, 0x745F9DD1,
-    0x3496824F, 0x74B2C883,
-    0x33DEF287, 0x7504D345,
-    0x3326E2C2, 0x7555BD4B,
-    0x326E54C7, 0x75A585CF,
-    0x31B54A5D, 0x75F42C0A,
-    0x30FBC54D, 0x7641AF3C,
-    0x3041C760, 0x768E0EA5,
-    0x2F875262, 0x76D94988,
-    0x2ECC681E, 0x77235F2D,
-    0x2E110A62, 0x776C4EDB,
-    0x2D553AFB, 0x77B417DF,
-    0x2C98FBBA, 0x77FAB988,
-    0x2BDC4E6F, 0x78403328,
-    0x2B1F34EB, 0x78848413,
-    0x2A61B101, 0x78C7ABA1,
-    0x29A3C484, 0x7909A92C,
-    0x28E5714A, 0x794A7C11,
-    0x2826B928, 0x798A23B1,
-    0x27679DF4, 0x79C89F6D,
-    0x26A82185, 0x7A05EEAD,
-    0x25E845B5, 0x7A4210D8,
-    0x25280C5D, 0x7A7D055B,
-    0x24677757, 0x7AB6CBA3,
-    0x23A6887E, 0x7AEF6323,
-    0x22E541AE, 0x7B26CB4F,
-    0x2223A4C5, 0x7B5D039D,
-    0x2161B39F, 0x7B920B89,
-    0x209F701C, 0x7BC5E28F,
-    0x1FDCDC1A, 0x7BF88830,
-    0x1F19F97B, 0x7C29FBEE,
-    0x1E56CA1E, 0x7C5A3D4F,
-    0x1D934FE5, 0x7C894BDD,
-    0x1CCF8CB3, 0x7CB72724,
-    0x1C0B826A, 0x7CE3CEB1,
-    0x1B4732EF, 0x7D0F4218,
-    0x1A82A025, 0x7D3980EC,
-    0x19BDCBF2, 0x7D628AC5,
-    0x18F8B83C, 0x7D8A5F3F,
-    0x183366E8, 0x7DB0FDF7,
-    0x176DD9DE, 0x7DD6668E,
-    0x16A81305, 0x7DFA98A7,
-    0x15E21444, 0x7E1D93E9,
-    0x151BDF85, 0x7E3F57FE,
-    0x145576B1, 0x7E5FE493,
-    0x138EDBB0, 0x7E7F3956,
-    0x12C8106E, 0x7E9D55FC,
-    0x120116D4, 0x7EBA3A39,
-    0x1139F0CE, 0x7ED5E5C6,
-    0x1072A047, 0x7EF0585F,
-    0x0FAB272B, 0x7F0991C3,
-    0x0EE38765, 0x7F2191B4,
-    0x0E1BC2E3, 0x7F3857F5,
-    0x0D53DB92, 0x7F4DE450,
-    0x0C8BD35E, 0x7F62368F,
-    0x0BC3AC35, 0x7F754E7F,
-    0x0AFB6805, 0x7F872BF3,
-    0x0A3308BC, 0x7F97CEBC,
-    0x096A9049, 0x7FA736B4,
-    0x08A2009A, 0x7FB563B2,
-    0x07D95B9E, 0x7FC25596,
-    0x0710A344, 0x7FCE0C3E,
-    0x0647D97C, 0x7FD8878D,
-    0x057F0034, 0x7FE1C76B,
-    0x04B6195D, 0x7FE9CBC0,
-    0x03ED26E6, 0x7FF09477,
-    0x03242ABF, 0x7FF62182,
-    0x025B26D7, 0x7FFA72D1,
-    0x01921D1F, 0x7FFD885A,
-    0x00C90F88, 0x7FFF6216,
-    0x00000000, 0x7FFFFFFF,
-    0xFF36F078, 0x7FFF6216,
-    0xFE6DE2E0, 0x7FFD885A,
-    0xFDA4D928, 0x7FFA72D1,
-    0xFCDBD541, 0x7FF62182,
-    0xFC12D919, 0x7FF09477,
-    0xFB49E6A2, 0x7FE9CBC0,
-    0xFA80FFCB, 0x7FE1C76B,
-    0xF9B82683, 0x7FD8878D,
-    0xF8EF5CBB, 0x7FCE0C3E,
-    0xF826A461, 0x7FC25596,
-    0xF75DFF65, 0x7FB563B2,
-    0xF6956FB6, 0x7FA736B4,
-    0xF5CCF743, 0x7F97CEBC,
-    0xF50497FA, 0x7F872BF3,
-    0xF43C53CA, 0x7F754E7F,
-    0xF3742CA1, 0x7F62368F,
-    0xF2AC246D, 0x7F4DE450,
-    0xF1E43D1C, 0x7F3857F5,
-    0xF11C789A, 0x7F2191B4,
-    0xF054D8D4, 0x7F0991C3,
-    0xEF8D5FB8, 0x7EF0585F,
-    0xEEC60F31, 0x7ED5E5C6,
-    0xEDFEE92B, 0x7EBA3A39,
-    0xED37EF91, 0x7E9D55FC,
-    0xEC71244F, 0x7E7F3956,
-    0xEBAA894E, 0x7E5FE493,
-    0xEAE4207A, 0x7E3F57FE,
-    0xEA1DEBBB, 0x7E1D93E9,
-    0xE957ECFB, 0x7DFA98A7,
-    0xE8922621, 0x7DD6668E,
-    0xE7CC9917, 0x7DB0FDF7,
-    0xE70747C3, 0x7D8A5F3F,
-    0xE642340D, 0x7D628AC5,
-    0xE57D5FDA, 0x7D3980EC,
-    0xE4B8CD10, 0x7D0F4218,
-    0xE3F47D95, 0x7CE3CEB1,
-    0xE330734C, 0x7CB72724,
-    0xE26CB01A, 0x7C894BDD,
-    0xE1A935E1, 0x7C5A3D4F,
-    0xE0E60684, 0x7C29FBEE,
-    0xE02323E5, 0x7BF88830,
-    0xDF608FE3, 0x7BC5E28F,
-    0xDE9E4C60, 0x7B920B89,
-    0xDDDC5B3A, 0x7B5D039D,
-    0xDD1ABE51, 0x7B26CB4F,
-    0xDC597781, 0x7AEF6323,
-    0xDB9888A8, 0x7AB6CBA3,
-    0xDAD7F3A2, 0x7A7D055B,
-    0xDA17BA4A, 0x7A4210D8,
-    0xD957DE7A, 0x7A05EEAD,
-    0xD898620C, 0x79C89F6D,
-    0xD7D946D7, 0x798A23B1,
-    0xD71A8EB5, 0x794A7C11,
-    0xD65C3B7B, 0x7909A92C,
-    0xD59E4EFE, 0x78C7ABA1,
-    0xD4E0CB14, 0x78848413,
-    0xD423B190, 0x78403328,
-    0xD3670445, 0x77FAB988,
-    0xD2AAC504, 0x77B417DF,
-    0xD1EEF59E, 0x776C4EDB,
-    0xD13397E1, 0x77235F2D,
-    0xD078AD9D, 0x76D94988,
-    0xCFBE389F, 0x768E0EA5,
-    0xCF043AB2, 0x7641AF3C,
-    0xCE4AB5A2, 0x75F42C0A,
-    0xCD91AB38, 0x75A585CF,
-    0xCCD91D3D, 0x7555BD4B,
-    0xCC210D78, 0x7504D345,
-    0xCB697DB0, 0x74B2C883,
-    0xCAB26FA9, 0x745F9DD1,
-    0xC9FBE527, 0x740B53FA,
-    0xC945DFEC, 0x73B5EBD0,
-    0xC89061BA, 0x735F6626,
-    0xC7DB6C50, 0x7307C3D0,
-    0xC727016C, 0x72AF05A6,
-    0xC67322CD, 0x72552C84,
-    0xC5BFD22E, 0x71FA3948,
-    0xC50D1148, 0x719E2CD2,
-    0xC45AE1D7, 0x71410804,
-    0xC3A9458F, 0x70E2CBC6,
-    0xC2F83E2A, 0x708378FE,
-    0xC247CD5A, 0x70231099,
-    0xC197F4D3, 0x6FC19385,
-    0xC0E8B648, 0x6F5F02B1,
-    0xC03A1368, 0x6EFB5F12,
-    0xBF8C0DE2, 0x6E96A99C,
-    0xBEDEA765, 0x6E30E349,
-    0xBE31E19B, 0x6DCA0D14,
-    0xBD85BE2F, 0x6D6227FA,
-    0xBCDA3ECA, 0x6CF934FB,
-    0xBC2F6513, 0x6C8F351C,
-    0xBB8532AF, 0x6C242960,
-    0xBADBA943, 0x6BB812D0,
-    0xBA32CA70, 0x6B4AF278,
-    0xB98A97D8, 0x6ADCC964,
-    0xB8E31319, 0x6A6D98A4,
-    0xB83C3DD1, 0x69FD614A,
-    0xB796199B, 0x698C246C,
-    0xB6F0A811, 0x6919E320,
-    0xB64BEACC, 0x68A69E81,
-    0xB5A7E362, 0x683257AA,
-    0xB5049368, 0x67BD0FBC,
-    0xB461FC70, 0x6746C7D7,
-    0xB3C0200C, 0x66CF811F,
-    0xB31EFFCB, 0x66573CBB,
-    0xB27E9D3B, 0x65DDFBD3,
-    0xB1DEF9E8, 0x6563BF92,
-    0xB140175B, 0x64E88926,
-    0xB0A1F71C, 0x646C59BF,
-    0xB0049AB2, 0x63EF328F,
-    0xAF6803A1, 0x637114CC,
-    0xAECC336B, 0x62F201AC,
-    0xAE312B91, 0x6271FA69,
-    0xAD96ED91, 0x61F1003E,
-    0xACFD7AE8, 0x616F146B,
-    0xAC64D510, 0x60EC3830,
-    0xABCCFD82, 0x60686CCE,
-    0xAB35F5B5, 0x5FE3B38D,
-    0xAA9FBF1D, 0x5F5E0DB3,
-    0xAA0A5B2D, 0x5ED77C89,
-    0xA975CB56, 0x5E50015D,
-    0xA8E21106, 0x5DC79D7C,
-    0xA84F2DA9, 0x5D3E5236,
-    0xA7BD22AB, 0x5CB420DF,
-    0xA72BF173, 0x5C290ACC,
-    0xA69B9B68, 0x5B9D1153,
-    0xA60C21ED, 0x5B1035CF,
-    0xA57D8666, 0x5A82799A,
-    0xA4EFCA31, 0x59F3DE12,
-    0xA462EEAC, 0x59646497,
-    0xA3D6F533, 0x58D40E8C,
-    0xA34BDF20, 0x5842DD54,
-    0xA2C1ADC9, 0x57B0D256,
-    0xA2386283, 0x571DEEF9,
-    0xA1AFFEA2, 0x568A34A9,
-    0xA1288376, 0x55F5A4D2,
-    0xA0A1F24C, 0x556040E2,
-    0xA01C4C72, 0x54CA0A4A,
-    0x9F979331, 0x5433027D,
-    0x9F13C7D0, 0x539B2AEF,
-    0x9E90EB94, 0x53028517,
-    0x9E0EFFC1, 0x5269126E,
-    0x9D8E0596, 0x51CED46E,
-    0x9D0DFE53, 0x5133CC94,
-    0x9C8EEB33, 0x5097FC5E,
-    0x9C10CD70, 0x4FFB654D,
-    0x9B93A640, 0x4F5E08E3,
-    0x9B1776D9, 0x4EBFE8A4,
-    0x9A9C406D, 0x4E210617,
-    0x9A22042C, 0x4D8162C4,
-    0x99A8C344, 0x4CE10034,
-    0x99307EE0, 0x4C3FDFF3,
-    0x98B93828, 0x4B9E038F,
-    0x9842F043, 0x4AFB6C97,
-    0x97CDA855, 0x4A581C9D,
-    0x9759617E, 0x49B41533,
-    0x96E61CDF, 0x490F57EE,
-    0x9673DB94, 0x4869E664,
-    0x96029EB5, 0x47C3C22E,
-    0x9592675B, 0x471CECE6,
-    0x9523369B, 0x46756827,
-    0x94B50D87, 0x45CD358F,
-    0x9447ED2F, 0x452456BC,
-    0x93DBD69F, 0x447ACD50,
-    0x9370CAE4, 0x43D09AEC,
-    0x9306CB04, 0x4325C135,
-    0x929DD805, 0x427A41D0,
-    0x9235F2EB, 0x41CE1E64,
-    0x91CF1CB6, 0x4121589A,
-    0x91695663, 0x4073F21D,
-    0x9104A0ED, 0x3FC5EC97,
-    0x90A0FD4E, 0x3F1749B7,
-    0x903E6C7A, 0x3E680B2C,
-    0x8FDCEF66, 0x3DB832A5,
-    0x8F7C8701, 0x3D07C1D5,
-    0x8F1D343A, 0x3C56BA70,
-    0x8EBEF7FB, 0x3BA51E29,
-    0x8E61D32D, 0x3AF2EEB7,
-    0x8E05C6B7, 0x3A402DD1,
-    0x8DAAD37B, 0x398CDD32,
-    0x8D50FA59, 0x38D8FE93,
-    0x8CF83C30, 0x382493B0,
-    0x8CA099D9, 0x376F9E46,
-    0x8C4A142F, 0x36BA2013,
-    0x8BF4AC05, 0x36041AD9,
-    0x8BA0622F, 0x354D9056,
-    0x8B4D377C, 0x3496824F,
-    0x8AFB2CBA, 0x33DEF287,
-    0x8AAA42B4, 0x3326E2C2,
-    0x8A5A7A30, 0x326E54C7,
-    0x8A0BD3F5, 0x31B54A5D,
-    0x89BE50C3, 0x30FBC54D,
-    0x8971F15A, 0x3041C760,
-    0x8926B677, 0x2F875262,
-    0x88DCA0D3, 0x2ECC681E,
-    0x8893B124, 0x2E110A62,
-    0x884BE820, 0x2D553AFB,
-    0x88054677, 0x2C98FBBA,
-    0x87BFCCD7, 0x2BDC4E6F,
-    0x877B7BEC, 0x2B1F34EB,
-    0x8738545E, 0x2A61B101,
-    0x86F656D3, 0x29A3C484,
-    0x86B583EE, 0x28E5714A,
-    0x8675DC4E, 0x2826B928,
-    0x86376092, 0x27679DF4,
-    0x85FA1152, 0x26A82185,
-    0x85BDEF27, 0x25E845B5,
-    0x8582FAA4, 0x25280C5D,
-    0x8549345C, 0x24677757,
-    0x85109CDC, 0x23A6887E,
-    0x84D934B0, 0x22E541AE,
-    0x84A2FC62, 0x2223A4C5,
-    0x846DF476, 0x2161B39F,
-    0x843A1D70, 0x209F701C,
-    0x840777CF, 0x1FDCDC1A,
-    0x83D60411, 0x1F19F97B,
-    0x83A5C2B0, 0x1E56CA1E,
-    0x8376B422, 0x1D934FE5,
-    0x8348D8DB, 0x1CCF8CB3,
-    0x831C314E, 0x1C0B826A,
-    0x82F0BDE8, 0x1B4732EF,
-    0x82C67F13, 0x1A82A025,
-    0x829D753A, 0x19BDCBF2,
-    0x8275A0C0, 0x18F8B83C,
-    0x824F0208, 0x183366E8,
-    0x82299971, 0x176DD9DE,
-    0x82056758, 0x16A81305,
-    0x81E26C16, 0x15E21444,
-    0x81C0A801, 0x151BDF85,
-    0x81A01B6C, 0x145576B1,
-    0x8180C6A9, 0x138EDBB0,
-    0x8162AA03, 0x12C8106E,
-    0x8145C5C6, 0x120116D4,
-    0x812A1A39, 0x1139F0CE,
-    0x810FA7A0, 0x1072A047,
-    0x80F66E3C, 0x0FAB272B,
-    0x80DE6E4C, 0x0EE38765,
-    0x80C7A80A, 0x0E1BC2E3,
-    0x80B21BAF, 0x0D53DB92,
-    0x809DC970, 0x0C8BD35E,
-    0x808AB180, 0x0BC3AC35,
-    0x8078D40D, 0x0AFB6805,
-    0x80683143, 0x0A3308BC,
-    0x8058C94C, 0x096A9049,
-    0x804A9C4D, 0x08A2009A,
-    0x803DAA69, 0x07D95B9E,
-    0x8031F3C1, 0x0710A344,
-    0x80277872, 0x0647D97C,
-    0x801E3894, 0x057F0034,
-    0x80163440, 0x04B6195D,
-    0x800F6B88, 0x03ED26E6,
-    0x8009DE7D, 0x03242ABF,
-    0x80058D2E, 0x025B26D7,
-    0x800277A5, 0x01921D1F,
-    0x80009DE9, 0x00C90F88,
-    0x80000000, 0x00000000,
-    0x80009DE9, 0xFF36F078,
-    0x800277A5, 0xFE6DE2E0,
-    0x80058D2E, 0xFDA4D928,
-    0x8009DE7D, 0xFCDBD541,
-    0x800F6B88, 0xFC12D919,
-    0x80163440, 0xFB49E6A2,
-    0x801E3894, 0xFA80FFCB,
-    0x80277872, 0xF9B82683,
-    0x8031F3C1, 0xF8EF5CBB,
-    0x803DAA69, 0xF826A461,
-    0x804A9C4D, 0xF75DFF65,
-    0x8058C94C, 0xF6956FB6,
-    0x80683143, 0xF5CCF743,
-    0x8078D40D, 0xF50497FA,
-    0x808AB180, 0xF43C53CA,
-    0x809DC970, 0xF3742CA1,
-    0x80B21BAF, 0xF2AC246D,
-    0x80C7A80A, 0xF1E43D1C,
-    0x80DE6E4C, 0xF11C789A,
-    0x80F66E3C, 0xF054D8D4,
-    0x810FA7A0, 0xEF8D5FB8,
-    0x812A1A39, 0xEEC60F31,
-    0x8145C5C6, 0xEDFEE92B,
-    0x8162AA03, 0xED37EF91,
-    0x8180C6A9, 0xEC71244F,
-    0x81A01B6C, 0xEBAA894E,
-    0x81C0A801, 0xEAE4207A,
-    0x81E26C16, 0xEA1DEBBB,
-    0x82056758, 0xE957ECFB,
-    0x82299971, 0xE8922621,
-    0x824F0208, 0xE7CC9917,
-    0x8275A0C0, 0xE70747C3,
-    0x829D753A, 0xE642340D,
-    0x82C67F13, 0xE57D5FDA,
-    0x82F0BDE8, 0xE4B8CD10,
-    0x831C314E, 0xE3F47D95,
-    0x8348D8DB, 0xE330734C,
-    0x8376B422, 0xE26CB01A,
-    0x83A5C2B0, 0xE1A935E1,
-    0x83D60411, 0xE0E60684,
-    0x840777CF, 0xE02323E5,
-    0x843A1D70, 0xDF608FE3,
-    0x846DF476, 0xDE9E4C60,
-    0x84A2FC62, 0xDDDC5B3A,
-    0x84D934B0, 0xDD1ABE51,
-    0x85109CDC, 0xDC597781,
-    0x8549345C, 0xDB9888A8,
-    0x8582FAA4, 0xDAD7F3A2,
-    0x85BDEF27, 0xDA17BA4A,
-    0x85FA1152, 0xD957DE7A,
-    0x86376092, 0xD898620C,
-    0x8675DC4E, 0xD7D946D7,
-    0x86B583EE, 0xD71A8EB5,
-    0x86F656D3, 0xD65C3B7B,
-    0x8738545E, 0xD59E4EFE,
-    0x877B7BEC, 0xD4E0CB14,
-    0x87BFCCD7, 0xD423B190,
-    0x88054677, 0xD3670445,
-    0x884BE820, 0xD2AAC504,
-    0x8893B124, 0xD1EEF59E,
-    0x88DCA0D3, 0xD13397E1,
-    0x8926B677, 0xD078AD9D,
-    0x8971F15A, 0xCFBE389F,
-    0x89BE50C3, 0xCF043AB2,
-    0x8A0BD3F5, 0xCE4AB5A2,
-    0x8A5A7A30, 0xCD91AB38,
-    0x8AAA42B4, 0xCCD91D3D,
-    0x8AFB2CBA, 0xCC210D78,
-    0x8B4D377C, 0xCB697DB0,
-    0x8BA0622F, 0xCAB26FA9,
-    0x8BF4AC05, 0xC9FBE527,
-    0x8C4A142F, 0xC945DFEC,
-    0x8CA099D9, 0xC89061BA,
-    0x8CF83C30, 0xC7DB6C50,
-    0x8D50FA59, 0xC727016C,
-    0x8DAAD37B, 0xC67322CD,
-    0x8E05C6B7, 0xC5BFD22E,
-    0x8E61D32D, 0xC50D1148,
-    0x8EBEF7FB, 0xC45AE1D7,
-    0x8F1D343A, 0xC3A9458F,
-    0x8F7C8701, 0xC2F83E2A,
-    0x8FDCEF66, 0xC247CD5A,
-    0x903E6C7A, 0xC197F4D3,
-    0x90A0FD4E, 0xC0E8B648,
-    0x9104A0ED, 0xC03A1368,
-    0x91695663, 0xBF8C0DE2,
-    0x91CF1CB6, 0xBEDEA765,
-    0x9235F2EB, 0xBE31E19B,
-    0x929DD805, 0xBD85BE2F,
-    0x9306CB04, 0xBCDA3ECA,
-    0x9370CAE4, 0xBC2F6513,
-    0x93DBD69F, 0xBB8532AF,
-    0x9447ED2F, 0xBADBA943,
-    0x94B50D87, 0xBA32CA70,
-    0x9523369B, 0xB98A97D8,
-    0x9592675B, 0xB8E31319,
-    0x96029EB5, 0xB83C3DD1,
-    0x9673DB94, 0xB796199B,
-    0x96E61CDF, 0xB6F0A811,
-    0x9759617E, 0xB64BEACC,
-    0x97CDA855, 0xB5A7E362,
-    0x9842F043, 0xB5049368,
-    0x98B93828, 0xB461FC70,
-    0x99307EE0, 0xB3C0200C,
-    0x99A8C344, 0xB31EFFCB,
-    0x9A22042C, 0xB27E9D3B,
-    0x9A9C406D, 0xB1DEF9E8,
-    0x9B1776D9, 0xB140175B,
-    0x9B93A640, 0xB0A1F71C,
-    0x9C10CD70, 0xB0049AB2,
-    0x9C8EEB33, 0xAF6803A1,
-    0x9D0DFE53, 0xAECC336B,
-    0x9D8E0596, 0xAE312B91,
-    0x9E0EFFC1, 0xAD96ED91,
-    0x9E90EB94, 0xACFD7AE8,
-    0x9F13C7D0, 0xAC64D510,
-    0x9F979331, 0xABCCFD82,
-    0xA01C4C72, 0xAB35F5B5,
-    0xA0A1F24C, 0xAA9FBF1D,
-    0xA1288376, 0xAA0A5B2D,
-    0xA1AFFEA2, 0xA975CB56,
-    0xA2386283, 0xA8E21106,
-    0xA2C1ADC9, 0xA84F2DA9,
-    0xA34BDF20, 0xA7BD22AB,
-    0xA3D6F533, 0xA72BF173,
-    0xA462EEAC, 0xA69B9B68,
-    0xA4EFCA31, 0xA60C21ED,
-    0xA57D8666, 0xA57D8666,
-    0xA60C21ED, 0xA4EFCA31,
-    0xA69B9B68, 0xA462EEAC,
-    0xA72BF173, 0xA3D6F533,
-    0xA7BD22AB, 0xA34BDF20,
-    0xA84F2DA9, 0xA2C1ADC9,
-    0xA8E21106, 0xA2386283,
-    0xA975CB56, 0xA1AFFEA2,
-    0xAA0A5B2D, 0xA1288376,
-    0xAA9FBF1D, 0xA0A1F24C,
-    0xAB35F5B5, 0xA01C4C72,
-    0xABCCFD82, 0x9F979331,
-    0xAC64D510, 0x9F13C7D0,
-    0xACFD7AE8, 0x9E90EB94,
-    0xAD96ED91, 0x9E0EFFC1,
-    0xAE312B91, 0x9D8E0596,
-    0xAECC336B, 0x9D0DFE53,
-    0xAF6803A1, 0x9C8EEB33,
-    0xB0049AB2, 0x9C10CD70,
-    0xB0A1F71C, 0x9B93A640,
-    0xB140175B, 0x9B1776D9,
-    0xB1DEF9E8, 0x9A9C406D,
-    0xB27E9D3B, 0x9A22042C,
-    0xB31EFFCB, 0x99A8C344,
-    0xB3C0200C, 0x99307EE0,
-    0xB461FC70, 0x98B93828,
-    0xB5049368, 0x9842F043,
-    0xB5A7E362, 0x97CDA855,
-    0xB64BEACC, 0x9759617E,
-    0xB6F0A811, 0x96E61CDF,
-    0xB796199B, 0x9673DB94,
-    0xB83C3DD1, 0x96029EB5,
-    0xB8E31319, 0x9592675B,
-    0xB98A97D8, 0x9523369B,
-    0xBA32CA70, 0x94B50D87,
-    0xBADBA943, 0x9447ED2F,
-    0xBB8532AF, 0x93DBD69F,
-    0xBC2F6513, 0x9370CAE4,
-    0xBCDA3ECA, 0x9306CB04,
-    0xBD85BE2F, 0x929DD805,
-    0xBE31E19B, 0x9235F2EB,
-    0xBEDEA765, 0x91CF1CB6,
-    0xBF8C0DE2, 0x91695663,
-    0xC03A1368, 0x9104A0ED,
-    0xC0E8B648, 0x90A0FD4E,
-    0xC197F4D3, 0x903E6C7A,
-    0xC247CD5A, 0x8FDCEF66,
-    0xC2F83E2A, 0x8F7C8701,
-    0xC3A9458F, 0x8F1D343A,
-    0xC45AE1D7, 0x8EBEF7FB,
-    0xC50D1148, 0x8E61D32D,
-    0xC5BFD22E, 0x8E05C6B7,
-    0xC67322CD, 0x8DAAD37B,
-    0xC727016C, 0x8D50FA59,
-    0xC7DB6C50, 0x8CF83C30,
-    0xC89061BA, 0x8CA099D9,
-    0xC945DFEC, 0x8C4A142F,
-    0xC9FBE527, 0x8BF4AC05,
-    0xCAB26FA9, 0x8BA0622F,
-    0xCB697DB0, 0x8B4D377C,
-    0xCC210D78, 0x8AFB2CBA,
-    0xCCD91D3D, 0x8AAA42B4,
-    0xCD91AB38, 0x8A5A7A30,
-    0xCE4AB5A2, 0x8A0BD3F5,
-    0xCF043AB2, 0x89BE50C3,
-    0xCFBE389F, 0x8971F15A,
-    0xD078AD9D, 0x8926B677,
-    0xD13397E1, 0x88DCA0D3,
-    0xD1EEF59E, 0x8893B124,
-    0xD2AAC504, 0x884BE820,
-    0xD3670445, 0x88054677,
-    0xD423B190, 0x87BFCCD7,
-    0xD4E0CB14, 0x877B7BEC,
-    0xD59E4EFE, 0x8738545E,
-    0xD65C3B7B, 0x86F656D3,
-    0xD71A8EB5, 0x86B583EE,
-    0xD7D946D7, 0x8675DC4E,
-    0xD898620C, 0x86376092,
-    0xD957DE7A, 0x85FA1152,
-    0xDA17BA4A, 0x85BDEF27,
-    0xDAD7F3A2, 0x8582FAA4,
-    0xDB9888A8, 0x8549345C,
-    0xDC597781, 0x85109CDC,
-    0xDD1ABE51, 0x84D934B0,
-    0xDDDC5B3A, 0x84A2FC62,
-    0xDE9E4C60, 0x846DF476,
-    0xDF608FE3, 0x843A1D70,
-    0xE02323E5, 0x840777CF,
-    0xE0E60684, 0x83D60411,
-    0xE1A935E1, 0x83A5C2B0,
-    0xE26CB01A, 0x8376B422,
-    0xE330734C, 0x8348D8DB,
-    0xE3F47D95, 0x831C314E,
-    0xE4B8CD10, 0x82F0BDE8,
-    0xE57D5FDA, 0x82C67F13,
-    0xE642340D, 0x829D753A,
-    0xE70747C3, 0x8275A0C0,
-    0xE7CC9917, 0x824F0208,
-    0xE8922621, 0x82299971,
-    0xE957ECFB, 0x82056758,
-    0xEA1DEBBB, 0x81E26C16,
-    0xEAE4207A, 0x81C0A801,
-    0xEBAA894E, 0x81A01B6C,
-    0xEC71244F, 0x8180C6A9,
-    0xED37EF91, 0x8162AA03,
-    0xEDFEE92B, 0x8145C5C6,
-    0xEEC60F31, 0x812A1A39,
-    0xEF8D5FB8, 0x810FA7A0,
-    0xF054D8D4, 0x80F66E3C,
-    0xF11C789A, 0x80DE6E4C,
-    0xF1E43D1C, 0x80C7A80A,
-    0xF2AC246D, 0x80B21BAF,
-    0xF3742CA1, 0x809DC970,
-    0xF43C53CA, 0x808AB180,
-    0xF50497FA, 0x8078D40D,
-    0xF5CCF743, 0x80683143,
-    0xF6956FB6, 0x8058C94C,
-    0xF75DFF65, 0x804A9C4D,
-    0xF826A461, 0x803DAA69,
-    0xF8EF5CBB, 0x8031F3C1,
-    0xF9B82683, 0x80277872,
-    0xFA80FFCB, 0x801E3894,
-    0xFB49E6A2, 0x80163440,
-    0xFC12D919, 0x800F6B88,
-    0xFCDBD541, 0x8009DE7D,
-    0xFDA4D928, 0x80058D2E,
-    0xFE6DE2E0, 0x800277A5,
-    0xFF36F078, 0x80009DE9
-};
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 2048	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_2048_q31[3072] = {
-    0x7FFFFFFF, 0x00000000,
-    0x7FFFD885, 0x006487E3,
-    0x7FFF6216, 0x00C90F88,
-    0x7FFE9CB2, 0x012D96B0,
-    0x7FFD885A, 0x01921D1F,
-    0x7FFC250F, 0x01F6A296,
-    0x7FFA72D1, 0x025B26D7,
-    0x7FF871A1, 0x02BFA9A4,
-    0x7FF62182, 0x03242ABF,
-    0x7FF38273, 0x0388A9E9,
-    0x7FF09477, 0x03ED26E6,
-    0x7FED5790, 0x0451A176,
-    0x7FE9CBC0, 0x04B6195D,
-    0x7FE5F108, 0x051A8E5C,
-    0x7FE1C76B, 0x057F0034,
-    0x7FDD4EEC, 0x05E36EA9,
-    0x7FD8878D, 0x0647D97C,
-    0x7FD37152, 0x06AC406F,
-    0x7FCE0C3E, 0x0710A344,
-    0x7FC85853, 0x077501BE,
-    0x7FC25596, 0x07D95B9E,
-    0x7FBC040A, 0x083DB0A7,
-    0x7FB563B2, 0x08A2009A,
-    0x7FAE7494, 0x09064B3A,
-    0x7FA736B4, 0x096A9049,
-    0x7F9FAA15, 0x09CECF89,
-    0x7F97CEBC, 0x0A3308BC,
-    0x7F8FA4AF, 0x0A973BA5,
-    0x7F872BF3, 0x0AFB6805,
-    0x7F7E648B, 0x0B5F8D9F,
-    0x7F754E7F, 0x0BC3AC35,
-    0x7F6BE9D4, 0x0C27C389,
-    0x7F62368F, 0x0C8BD35E,
-    0x7F5834B6, 0x0CEFDB75,
-    0x7F4DE450, 0x0D53DB92,
-    0x7F434563, 0x0DB7D376,
-    0x7F3857F5, 0x0E1BC2E3,
-    0x7F2D1C0E, 0x0E7FA99D,
-    0x7F2191B4, 0x0EE38765,
-    0x7F15B8EE, 0x0F475BFE,
-    0x7F0991C3, 0x0FAB272B,
-    0x7EFD1C3C, 0x100EE8AD,
-    0x7EF0585F, 0x1072A047,
-    0x7EE34635, 0x10D64DBC,
-    0x7ED5E5C6, 0x1139F0CE,
-    0x7EC8371A, 0x119D8940,
-    0x7EBA3A39, 0x120116D4,
-    0x7EABEF2C, 0x1264994E,
-    0x7E9D55FC, 0x12C8106E,
-    0x7E8E6EB1, 0x132B7BF9,
-    0x7E7F3956, 0x138EDBB0,
-    0x7E6FB5F3, 0x13F22F57,
-    0x7E5FE493, 0x145576B1,
-    0x7E4FC53E, 0x14B8B17F,
-    0x7E3F57FE, 0x151BDF85,
-    0x7E2E9CDF, 0x157F0086,
-    0x7E1D93E9, 0x15E21444,
-    0x7E0C3D29, 0x16451A83,
-    0x7DFA98A7, 0x16A81305,
-    0x7DE8A670, 0x170AFD8D,
-    0x7DD6668E, 0x176DD9DE,
-    0x7DC3D90D, 0x17D0A7BB,
-    0x7DB0FDF7, 0x183366E8,
-    0x7D9DD55A, 0x18961727,
-    0x7D8A5F3F, 0x18F8B83C,
-    0x7D769BB5, 0x195B49E9,
-    0x7D628AC5, 0x19BDCBF2,
-    0x7D4E2C7E, 0x1A203E1B,
-    0x7D3980EC, 0x1A82A025,
-    0x7D24881A, 0x1AE4F1D6,
-    0x7D0F4218, 0x1B4732EF,
-    0x7CF9AEF0, 0x1BA96334,
-    0x7CE3CEB1, 0x1C0B826A,
-    0x7CCDA168, 0x1C6D9053,
-    0x7CB72724, 0x1CCF8CB3,
-    0x7CA05FF1, 0x1D31774D,
-    0x7C894BDD, 0x1D934FE5,
-    0x7C71EAF8, 0x1DF5163F,
-    0x7C5A3D4F, 0x1E56CA1E,
-    0x7C4242F2, 0x1EB86B46,
-    0x7C29FBEE, 0x1F19F97B,
-    0x7C116853, 0x1F7B7480,
-    0x7BF88830, 0x1FDCDC1A,
-    0x7BDF5B94, 0x203E300D,
-    0x7BC5E28F, 0x209F701C,
-    0x7BAC1D31, 0x21009C0B,
-    0x7B920B89, 0x2161B39F,
-    0x7B77ADA8, 0x21C2B69C,
-    0x7B5D039D, 0x2223A4C5,
-    0x7B420D7A, 0x22847DDF,
-    0x7B26CB4F, 0x22E541AE,
-    0x7B0B3D2C, 0x2345EFF7,
-    0x7AEF6323, 0x23A6887E,
-    0x7AD33D45, 0x24070B07,
-    0x7AB6CBA3, 0x24677757,
-    0x7A9A0E4F, 0x24C7CD32,
-    0x7A7D055B, 0x25280C5D,
-    0x7A5FB0D8, 0x2588349D,
-    0x7A4210D8, 0x25E845B5,
-    0x7A24256E, 0x26483F6C,
-    0x7A05EEAD, 0x26A82185,
-    0x79E76CA6, 0x2707EBC6,
-    0x79C89F6D, 0x27679DF4,
-    0x79A98715, 0x27C737D2,
-    0x798A23B1, 0x2826B928,
-    0x796A7554, 0x288621B9,
-    0x794A7C11, 0x28E5714A,
-    0x792A37FE, 0x2944A7A2,
-    0x7909A92C, 0x29A3C484,
-    0x78E8CFB1, 0x2A02C7B8,
-    0x78C7ABA1, 0x2A61B101,
-    0x78A63D10, 0x2AC08025,
-    0x78848413, 0x2B1F34EB,
-    0x786280BF, 0x2B7DCF17,
-    0x78403328, 0x2BDC4E6F,
-    0x781D9B64, 0x2C3AB2B9,
-    0x77FAB988, 0x2C98FBBA,
-    0x77D78DAA, 0x2CF72939,
-    0x77B417DF, 0x2D553AFB,
-    0x7790583D, 0x2DB330C7,
-    0x776C4EDB, 0x2E110A62,
-    0x7747FBCE, 0x2E6EC792,
-    0x77235F2D, 0x2ECC681E,
-    0x76FE790E, 0x2F29EBCC,
-    0x76D94988, 0x2F875262,
-    0x76B3D0B3, 0x2FE49BA6,
-    0x768E0EA5, 0x3041C760,
-    0x76680376, 0x309ED555,
-    0x7641AF3C, 0x30FBC54D,
-    0x761B1211, 0x3158970D,
-    0x75F42C0A, 0x31B54A5D,
-    0x75CCFD42, 0x3211DF03,
-    0x75A585CF, 0x326E54C7,
-    0x757DC5CA, 0x32CAAB6F,
-    0x7555BD4B, 0x3326E2C2,
-    0x752D6C6C, 0x3382FA88,
-    0x7504D345, 0x33DEF287,
-    0x74DBF1EF, 0x343ACA87,
-    0x74B2C883, 0x3496824F,
-    0x7489571B, 0x34F219A7,
-    0x745F9DD1, 0x354D9056,
-    0x74359CBD, 0x35A8E624,
-    0x740B53FA, 0x36041AD9,
-    0x73E0C3A3, 0x365F2E3B,
-    0x73B5EBD0, 0x36BA2013,
-    0x738ACC9E, 0x3714F02A,
-    0x735F6626, 0x376F9E46,
-    0x7333B883, 0x37CA2A30,
-    0x7307C3D0, 0x382493B0,
-    0x72DB8828, 0x387EDA8E,
-    0x72AF05A6, 0x38D8FE93,
-    0x72823C66, 0x3932FF87,
-    0x72552C84, 0x398CDD32,
-    0x7227D61C, 0x39E6975D,
-    0x71FA3948, 0x3A402DD1,
-    0x71CC5626, 0x3A99A057,
-    0x719E2CD2, 0x3AF2EEB7,
-    0x716FBD68, 0x3B4C18BA,
-    0x71410804, 0x3BA51E29,
-    0x71120CC5, 0x3BFDFECD,
-    0x70E2CBC6, 0x3C56BA70,
-    0x70B34524, 0x3CAF50DA,
-    0x708378FE, 0x3D07C1D5,
-    0x70536771, 0x3D600D2B,
-    0x70231099, 0x3DB832A5,
-    0x6FF27496, 0x3E10320D,
-    0x6FC19385, 0x3E680B2C,
-    0x6F906D84, 0x3EBFBDCC,
-    0x6F5F02B1, 0x3F1749B7,
-    0x6F2D532C, 0x3F6EAEB8,
-    0x6EFB5F12, 0x3FC5EC97,
-    0x6EC92682, 0x401D0320,
-    0x6E96A99C, 0x4073F21D,
-    0x6E63E87F, 0x40CAB957,
-    0x6E30E349, 0x4121589A,
-    0x6DFD9A1B, 0x4177CFB0,
-    0x6DCA0D14, 0x41CE1E64,
-    0x6D963C54, 0x42244480,
-    0x6D6227FA, 0x427A41D0,
-    0x6D2DD027, 0x42D0161E,
-    0x6CF934FB, 0x4325C135,
-    0x6CC45697, 0x437B42E1,
-    0x6C8F351C, 0x43D09AEC,
-    0x6C59D0A9, 0x4425C923,
-    0x6C242960, 0x447ACD50,
-    0x6BEE3F62, 0x44CFA73F,
-    0x6BB812D0, 0x452456BC,
-    0x6B81A3CD, 0x4578DB93,
-    0x6B4AF278, 0x45CD358F,
-    0x6B13FEF5, 0x4621647C,
-    0x6ADCC964, 0x46756827,
-    0x6AA551E8, 0x46C9405C,
-    0x6A6D98A4, 0x471CECE6,
-    0x6A359DB9, 0x47706D93,
-    0x69FD614A, 0x47C3C22E,
-    0x69C4E37A, 0x4816EA85,
-    0x698C246C, 0x4869E664,
-    0x69532442, 0x48BCB598,
-    0x6919E320, 0x490F57EE,
-    0x68E06129, 0x4961CD32,
-    0x68A69E81, 0x49B41533,
-    0x686C9B4B, 0x4A062FBD,
-    0x683257AA, 0x4A581C9D,
-    0x67F7D3C4, 0x4AA9DBA1,
-    0x67BD0FBC, 0x4AFB6C97,
-    0x67820BB6, 0x4B4CCF4D,
-    0x6746C7D7, 0x4B9E038F,
-    0x670B4443, 0x4BEF092D,
-    0x66CF811F, 0x4C3FDFF3,
-    0x66937E90, 0x4C9087B1,
-    0x66573CBB, 0x4CE10034,
-    0x661ABBC5, 0x4D31494B,
-    0x65DDFBD3, 0x4D8162C4,
-    0x65A0FD0B, 0x4DD14C6E,
-    0x6563BF92, 0x4E210617,
-    0x6526438E, 0x4E708F8F,
-    0x64E88926, 0x4EBFE8A4,
-    0x64AA907F, 0x4F0F1126,
-    0x646C59BF, 0x4F5E08E3,
-    0x642DE50D, 0x4FACCFAB,
-    0x63EF328F, 0x4FFB654D,
-    0x63B0426D, 0x5049C999,
-    0x637114CC, 0x5097FC5E,
-    0x6331A9D4, 0x50E5FD6C,
-    0x62F201AC, 0x5133CC94,
-    0x62B21C7B, 0x518169A4,
-    0x6271FA69, 0x51CED46E,
-    0x62319B9D, 0x521C0CC1,
-    0x61F1003E, 0x5269126E,
-    0x61B02876, 0x52B5E545,
-    0x616F146B, 0x53028517,
-    0x612DC446, 0x534EF1B5,
-    0x60EC3830, 0x539B2AEF,
-    0x60AA704F, 0x53E73097,
-    0x60686CCE, 0x5433027D,
-    0x60262DD5, 0x547EA073,
-    0x5FE3B38D, 0x54CA0A4A,
-    0x5FA0FE1E, 0x55153FD4,
-    0x5F5E0DB3, 0x556040E2,
-    0x5F1AE273, 0x55AB0D46,
-    0x5ED77C89, 0x55F5A4D2,
-    0x5E93DC1F, 0x56400757,
-    0x5E50015D, 0x568A34A9,
-    0x5E0BEC6E, 0x56D42C99,
-    0x5DC79D7C, 0x571DEEF9,
-    0x5D8314B0, 0x57677B9D,
-    0x5D3E5236, 0x57B0D256,
-    0x5CF95638, 0x57F9F2F7,
-    0x5CB420DF, 0x5842DD54,
-    0x5C6EB258, 0x588B913F,
-    0x5C290ACC, 0x58D40E8C,
-    0x5BE32A67, 0x591C550E,
-    0x5B9D1153, 0x59646497,
-    0x5B56BFBD, 0x59AC3CFD,
-    0x5B1035CF, 0x59F3DE12,
-    0x5AC973B4, 0x5A3B47AA,
-    0x5A82799A, 0x5A82799A,
-    0x5A3B47AA, 0x5AC973B4,
-    0x59F3DE12, 0x5B1035CF,
-    0x59AC3CFD, 0x5B56BFBD,
-    0x59646497, 0x5B9D1153,
-    0x591C550E, 0x5BE32A67,
-    0x58D40E8C, 0x5C290ACC,
-    0x588B913F, 0x5C6EB258,
-    0x5842DD54, 0x5CB420DF,
-    0x57F9F2F7, 0x5CF95638,
-    0x57B0D256, 0x5D3E5236,
-    0x57677B9D, 0x5D8314B0,
-    0x571DEEF9, 0x5DC79D7C,
-    0x56D42C99, 0x5E0BEC6E,
-    0x568A34A9, 0x5E50015D,
-    0x56400757, 0x5E93DC1F,
-    0x55F5A4D2, 0x5ED77C89,
-    0x55AB0D46, 0x5F1AE273,
-    0x556040E2, 0x5F5E0DB3,
-    0x55153FD4, 0x5FA0FE1E,
-    0x54CA0A4A, 0x5FE3B38D,
-    0x547EA073, 0x60262DD5,
-    0x5433027D, 0x60686CCE,
-    0x53E73097, 0x60AA704F,
-    0x539B2AEF, 0x60EC3830,
-    0x534EF1B5, 0x612DC446,
-    0x53028517, 0x616F146B,
-    0x52B5E545, 0x61B02876,
-    0x5269126E, 0x61F1003E,
-    0x521C0CC1, 0x62319B9D,
-    0x51CED46E, 0x6271FA69,
-    0x518169A4, 0x62B21C7B,
-    0x5133CC94, 0x62F201AC,
-    0x50E5FD6C, 0x6331A9D4,
-    0x5097FC5E, 0x637114CC,
-    0x5049C999, 0x63B0426D,
-    0x4FFB654D, 0x63EF328F,
-    0x4FACCFAB, 0x642DE50D,
-    0x4F5E08E3, 0x646C59BF,
-    0x4F0F1126, 0x64AA907F,
-    0x4EBFE8A4, 0x64E88926,
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-    0x4E210617, 0x6563BF92,
-    0x4DD14C6E, 0x65A0FD0B,
-    0x4D8162C4, 0x65DDFBD3,
-    0x4D31494B, 0x661ABBC5,
-    0x4CE10034, 0x66573CBB,
-    0x4C9087B1, 0x66937E90,
-    0x4C3FDFF3, 0x66CF811F,
-    0x4BEF092D, 0x670B4443,
-    0x4B9E038F, 0x6746C7D7,
-    0x4B4CCF4D, 0x67820BB6,
-    0x4AFB6C97, 0x67BD0FBC,
-    0x4AA9DBA1, 0x67F7D3C4,
-    0x4A581C9D, 0x683257AA,
-    0x4A062FBD, 0x686C9B4B,
-    0x49B41533, 0x68A69E81,
-    0x4961CD32, 0x68E06129,
-    0x490F57EE, 0x6919E320,
-    0x48BCB598, 0x69532442,
-    0x4869E664, 0x698C246C,
-    0x4816EA85, 0x69C4E37A,
-    0x47C3C22E, 0x69FD614A,
-    0x47706D93, 0x6A359DB9,
-    0x471CECE6, 0x6A6D98A4,
-    0x46C9405C, 0x6AA551E8,
-    0x46756827, 0x6ADCC964,
-    0x4621647C, 0x6B13FEF5,
-    0x45CD358F, 0x6B4AF278,
-    0x4578DB93, 0x6B81A3CD,
-    0x452456BC, 0x6BB812D0,
-    0x44CFA73F, 0x6BEE3F62,
-    0x447ACD50, 0x6C242960,
-    0x4425C923, 0x6C59D0A9,
-    0x43D09AEC, 0x6C8F351C,
-    0x437B42E1, 0x6CC45697,
-    0x4325C135, 0x6CF934FB,
-    0x42D0161E, 0x6D2DD027,
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-    0x42244480, 0x6D963C54,
-    0x41CE1E64, 0x6DCA0D14,
-    0x4177CFB0, 0x6DFD9A1B,
-    0x4121589A, 0x6E30E349,
-    0x40CAB957, 0x6E63E87F,
-    0x4073F21D, 0x6E96A99C,
-    0x401D0320, 0x6EC92682,
-    0x3FC5EC97, 0x6EFB5F12,
-    0x3F6EAEB8, 0x6F2D532C,
-    0x3F1749B7, 0x6F5F02B1,
-    0x3EBFBDCC, 0x6F906D84,
-    0x3E680B2C, 0x6FC19385,
-    0x3E10320D, 0x6FF27496,
-    0x3DB832A5, 0x70231099,
-    0x3D600D2B, 0x70536771,
-    0x3D07C1D5, 0x708378FE,
-    0x3CAF50DA, 0x70B34524,
-    0x3C56BA70, 0x70E2CBC6,
-    0x3BFDFECD, 0x71120CC5,
-    0x3BA51E29, 0x71410804,
-    0x3B4C18BA, 0x716FBD68,
-    0x3AF2EEB7, 0x719E2CD2,
-    0x3A99A057, 0x71CC5626,
-    0x3A402DD1, 0x71FA3948,
-    0x39E6975D, 0x7227D61C,
-    0x398CDD32, 0x72552C84,
-    0x3932FF87, 0x72823C66,
-    0x38D8FE93, 0x72AF05A6,
-    0x387EDA8E, 0x72DB8828,
-    0x382493B0, 0x7307C3D0,
-    0x37CA2A30, 0x7333B883,
-    0x376F9E46, 0x735F6626,
-    0x3714F02A, 0x738ACC9E,
-    0x36BA2013, 0x73B5EBD0,
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-    0x36041AD9, 0x740B53FA,
-    0x35A8E624, 0x74359CBD,
-    0x354D9056, 0x745F9DD1,
-    0x34F219A7, 0x7489571B,
-    0x3496824F, 0x74B2C883,
-    0x343ACA87, 0x74DBF1EF,
-    0x33DEF287, 0x7504D345,
-    0x3382FA88, 0x752D6C6C,
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-    0x32CAAB6F, 0x757DC5CA,
-    0x326E54C7, 0x75A585CF,
-    0x3211DF03, 0x75CCFD42,
-    0x31B54A5D, 0x75F42C0A,
-    0x3158970D, 0x761B1211,
-    0x30FBC54D, 0x7641AF3C,
-    0x309ED555, 0x76680376,
-    0x3041C760, 0x768E0EA5,
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-    0x2F29EBCC, 0x76FE790E,
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-    0x2E6EC792, 0x7747FBCE,
-    0x2E110A62, 0x776C4EDB,
-    0x2DB330C7, 0x7790583D,
-    0x2D553AFB, 0x77B417DF,
-    0x2CF72939, 0x77D78DAA,
-    0x2C98FBBA, 0x77FAB988,
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-    0x2BDC4E6F, 0x78403328,
-    0x2B7DCF17, 0x786280BF,
-    0x2B1F34EB, 0x78848413,
-    0x2AC08025, 0x78A63D10,
-    0x2A61B101, 0x78C7ABA1,
-    0x2A02C7B8, 0x78E8CFB1,
-    0x29A3C484, 0x7909A92C,
-    0x2944A7A2, 0x792A37FE,
-    0x28E5714A, 0x794A7C11,
-    0x288621B9, 0x796A7554,
-    0x2826B928, 0x798A23B1,
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-    0x27679DF4, 0x79C89F6D,
-    0x2707EBC6, 0x79E76CA6,
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-    0x26483F6C, 0x7A24256E,
-    0x25E845B5, 0x7A4210D8,
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-    0x24C7CD32, 0x7A9A0E4F,
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-    0x22E541AE, 0x7B26CB4F,
-    0x22847DDF, 0x7B420D7A,
-    0x2223A4C5, 0x7B5D039D,
-    0x21C2B69C, 0x7B77ADA8,
-    0x2161B39F, 0x7B920B89,
-    0x21009C0B, 0x7BAC1D31,
-    0x209F701C, 0x7BC5E28F,
-    0x203E300D, 0x7BDF5B94,
-    0x1FDCDC1A, 0x7BF88830,
-    0x1F7B7480, 0x7C116853,
-    0x1F19F97B, 0x7C29FBEE,
-    0x1EB86B46, 0x7C4242F2,
-    0x1E56CA1E, 0x7C5A3D4F,
-    0x1DF5163F, 0x7C71EAF8,
-    0x1D934FE5, 0x7C894BDD,
-    0x1D31774D, 0x7CA05FF1,
-    0x1CCF8CB3, 0x7CB72724,
-    0x1C6D9053, 0x7CCDA168,
-    0x1C0B826A, 0x7CE3CEB1,
-    0x1BA96334, 0x7CF9AEF0,
-    0x1B4732EF, 0x7D0F4218,
-    0x1AE4F1D6, 0x7D24881A,
-    0x1A82A025, 0x7D3980EC,
-    0x1A203E1B, 0x7D4E2C7E,
-    0x19BDCBF2, 0x7D628AC5,
-    0x195B49E9, 0x7D769BB5,
-    0x18F8B83C, 0x7D8A5F3F,
-    0x18961727, 0x7D9DD55A,
-    0x183366E8, 0x7DB0FDF7,
-    0x17D0A7BB, 0x7DC3D90D,
-    0x176DD9DE, 0x7DD6668E,
-    0x170AFD8D, 0x7DE8A670,
-    0x16A81305, 0x7DFA98A7,
-    0x16451A83, 0x7E0C3D29,
-    0x15E21444, 0x7E1D93E9,
-    0x157F0086, 0x7E2E9CDF,
-    0x151BDF85, 0x7E3F57FE,
-    0x14B8B17F, 0x7E4FC53E,
-    0x145576B1, 0x7E5FE493,
-    0x13F22F57, 0x7E6FB5F3,
-    0x138EDBB0, 0x7E7F3956,
-    0x132B7BF9, 0x7E8E6EB1,
-    0x12C8106E, 0x7E9D55FC,
-    0x1264994E, 0x7EABEF2C,
-    0x120116D4, 0x7EBA3A39,
-    0x119D8940, 0x7EC8371A,
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-    0x0EE38765, 0x7F2191B4,
-    0x0E7FA99D, 0x7F2D1C0E,
-    0x0E1BC2E3, 0x7F3857F5,
-    0x0DB7D376, 0x7F434563,
-    0x0D53DB92, 0x7F4DE450,
-    0x0CEFDB75, 0x7F5834B6,
-    0x0C8BD35E, 0x7F62368F,
-    0x0C27C389, 0x7F6BE9D4,
-    0x0BC3AC35, 0x7F754E7F,
-    0x0B5F8D9F, 0x7F7E648B,
-    0x0AFB6805, 0x7F872BF3,
-    0x0A973BA5, 0x7F8FA4AF,
-    0x0A3308BC, 0x7F97CEBC,
-    0x09CECF89, 0x7F9FAA15,
-    0x096A9049, 0x7FA736B4,
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-    0x08A2009A, 0x7FB563B2,
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-    0x07D95B9E, 0x7FC25596,
-    0x077501BE, 0x7FC85853,
-    0x0710A344, 0x7FCE0C3E,
-    0x06AC406F, 0x7FD37152,
-    0x0647D97C, 0x7FD8878D,
-    0x05E36EA9, 0x7FDD4EEC,
-    0x057F0034, 0x7FE1C76B,
-    0x051A8E5C, 0x7FE5F108,
-    0x04B6195D, 0x7FE9CBC0,
-    0x0451A176, 0x7FED5790,
-    0x03ED26E6, 0x7FF09477,
-    0x0388A9E9, 0x7FF38273,
-    0x03242ABF, 0x7FF62182,
-    0x02BFA9A4, 0x7FF871A1,
-    0x025B26D7, 0x7FFA72D1,
-    0x01F6A296, 0x7FFC250F,
-    0x01921D1F, 0x7FFD885A,
-    0x012D96B0, 0x7FFE9CB2,
-    0x00C90F88, 0x7FFF6216,
-    0x006487E3, 0x7FFFD885,
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-    0xFF36F078, 0x7FFF6216,
-    0xFED2694F, 0x7FFE9CB2,
-    0xFE6DE2E0, 0x7FFD885A,
-    0xFE095D69, 0x7FFC250F,
-    0xFDA4D928, 0x7FFA72D1,
-    0xFD40565B, 0x7FF871A1,
-    0xFCDBD541, 0x7FF62182,
-    0xFC775616, 0x7FF38273,
-    0xFC12D919, 0x7FF09477,
-    0xFBAE5E89, 0x7FED5790,
-    0xFB49E6A2, 0x7FE9CBC0,
-    0xFAE571A4, 0x7FE5F108,
-    0xFA80FFCB, 0x7FE1C76B,
-    0xFA1C9156, 0x7FDD4EEC,
-    0xF9B82683, 0x7FD8878D,
-    0xF953BF90, 0x7FD37152,
-    0xF8EF5CBB, 0x7FCE0C3E,
-    0xF88AFE41, 0x7FC85853,
-    0xF826A461, 0x7FC25596,
-    0xF7C24F58, 0x7FBC040A,
-    0xF75DFF65, 0x7FB563B2,
-    0xF6F9B4C5, 0x7FAE7494,
-    0xF6956FB6, 0x7FA736B4,
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-    0xF5CCF743, 0x7F97CEBC,
-    0xF568C45A, 0x7F8FA4AF,
-    0xF50497FA, 0x7F872BF3,
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-    0xF43C53CA, 0x7F754E7F,
-    0xF3D83C76, 0x7F6BE9D4,
-    0xF3742CA1, 0x7F62368F,
-    0xF310248A, 0x7F5834B6,
-    0xF2AC246D, 0x7F4DE450,
-    0xF2482C89, 0x7F434563,
-    0xF1E43D1C, 0x7F3857F5,
-    0xF1805662, 0x7F2D1C0E,
-    0xF11C789A, 0x7F2191B4,
-    0xF0B8A401, 0x7F15B8EE,
-    0xF054D8D4, 0x7F0991C3,
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-    0xEF8D5FB8, 0x7EF0585F,
-    0xEF29B243, 0x7EE34635,
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-    0xED37EF91, 0x7E9D55FC,
-    0xECD48406, 0x7E8E6EB1,
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-    0xEBAA894E, 0x7E5FE493,
-    0xEB474E80, 0x7E4FC53E,
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-    0xE9BAE57C, 0x7E0C3D29,
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-    0xE8F50273, 0x7DE8A670,
-    0xE8922621, 0x7DD6668E,
-    0xE82F5844, 0x7DC3D90D,
-    0xE7CC9917, 0x7DB0FDF7,
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-    0xE70747C3, 0x7D8A5F3F,
-    0xE6A4B616, 0x7D769BB5,
-    0xE642340D, 0x7D628AC5,
-    0xE5DFC1E4, 0x7D4E2C7E,
-    0xE57D5FDA, 0x7D3980EC,
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-    0xE3F47D95, 0x7CE3CEB1,
-    0xE3926FAC, 0x7CCDA168,
-    0xE330734C, 0x7CB72724,
-    0xE2CE88B2, 0x7CA05FF1,
-    0xE26CB01A, 0x7C894BDD,
-    0xE20AE9C1, 0x7C71EAF8,
-    0xE1A935E1, 0x7C5A3D4F,
-    0xE14794B9, 0x7C4242F2,
-    0xE0E60684, 0x7C29FBEE,
-    0xE0848B7F, 0x7C116853,
-    0xE02323E5, 0x7BF88830,
-    0xDFC1CFF2, 0x7BDF5B94,
-    0xDF608FE3, 0x7BC5E28F,
-    0xDEFF63F4, 0x7BAC1D31,
-    0xDE9E4C60, 0x7B920B89,
-    0xDE3D4963, 0x7B77ADA8,
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-    0xDD7B8220, 0x7B420D7A,
-    0xDD1ABE51, 0x7B26CB4F,
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-    0xDC597781, 0x7AEF6323,
-    0xDBF8F4F8, 0x7AD33D45,
-    0xDB9888A8, 0x7AB6CBA3,
-    0xDB3832CD, 0x7A9A0E4F,
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-    0xDA77CB62, 0x7A5FB0D8,
-    0xDA17BA4A, 0x7A4210D8,
-    0xD9B7C093, 0x7A24256E,
-    0xD957DE7A, 0x7A05EEAD,
-    0xD8F81439, 0x79E76CA6,
-    0xD898620C, 0x79C89F6D,
-    0xD838C82D, 0x79A98715,
-    0xD7D946D7, 0x798A23B1,
-    0xD779DE46, 0x796A7554,
-    0xD71A8EB5, 0x794A7C11,
-    0xD6BB585D, 0x792A37FE,
-    0xD65C3B7B, 0x7909A92C,
-    0xD5FD3847, 0x78E8CFB1,
-    0xD59E4EFE, 0x78C7ABA1,
-    0xD53F7FDA, 0x78A63D10,
-    0xD4E0CB14, 0x78848413,
-    0xD48230E8, 0x786280BF,
-    0xD423B190, 0x78403328,
-    0xD3C54D46, 0x781D9B64,
-    0xD3670445, 0x77FAB988,
-    0xD308D6C6, 0x77D78DAA,
-    0xD2AAC504, 0x77B417DF,
-    0xD24CCF38, 0x7790583D,
-    0xD1EEF59E, 0x776C4EDB,
-    0xD191386D, 0x7747FBCE,
-    0xD13397E1, 0x77235F2D,
-    0xD0D61433, 0x76FE790E,
-    0xD078AD9D, 0x76D94988,
-    0xD01B6459, 0x76B3D0B3,
-    0xCFBE389F, 0x768E0EA5,
-    0xCF612AAA, 0x76680376,
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-    0xCC7D0577, 0x752D6C6C,
-    0xCC210D78, 0x7504D345,
-    0xCBC53578, 0x74DBF1EF,
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-    0xCB0DE658, 0x7489571B,
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-    0xCA5719DB, 0x74359CBD,
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-    0xC945DFEC, 0x73B5EBD0,
-    0xC8EB0FD6, 0x738ACC9E,
-    0xC89061BA, 0x735F6626,
-    0xC835D5D0, 0x7333B883,
-    0xC7DB6C50, 0x7307C3D0,
-    0xC7812571, 0x72DB8828,
-    0xC727016C, 0x72AF05A6,
-    0xC6CD0079, 0x72823C66,
-    0xC67322CD, 0x72552C84,
-    0xC61968A2, 0x7227D61C,
-    0xC5BFD22E, 0x71FA3948,
-    0xC5665FA8, 0x71CC5626,
-    0xC50D1148, 0x719E2CD2,
-    0xC4B3E746, 0x716FBD68,
-    0xC45AE1D7, 0x71410804,
-    0xC4020132, 0x71120CC5,
-    0xC3A9458F, 0x70E2CBC6,
-    0xC350AF25, 0x70B34524,
-    0xC2F83E2A, 0x708378FE,
-    0xC29FF2D4, 0x70536771,
-    0xC247CD5A, 0x70231099,
-    0xC1EFCDF2, 0x6FF27496,
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-    0xC1404233, 0x6F906D84,
-    0xC0E8B648, 0x6F5F02B1,
-    0xC0915147, 0x6F2D532C,
-    0xC03A1368, 0x6EFB5F12,
-    0xBFE2FCDF, 0x6EC92682,
-    0xBF8C0DE2, 0x6E96A99C,
-    0xBF3546A8, 0x6E63E87F,
-    0xBEDEA765, 0x6E30E349,
-    0xBE88304F, 0x6DFD9A1B,
-    0xBE31E19B, 0x6DCA0D14,
-    0xBDDBBB7F, 0x6D963C54,
-    0xBD85BE2F, 0x6D6227FA,
-    0xBD2FE9E1, 0x6D2DD027,
-    0xBCDA3ECA, 0x6CF934FB,
-    0xBC84BD1E, 0x6CC45697,
-    0xBC2F6513, 0x6C8F351C,
-    0xBBDA36DC, 0x6C59D0A9,
-    0xBB8532AF, 0x6C242960,
-    0xBB3058C0, 0x6BEE3F62,
-    0xBADBA943, 0x6BB812D0,
-    0xBA87246C, 0x6B81A3CD,
-    0xBA32CA70, 0x6B4AF278,
-    0xB9DE9B83, 0x6B13FEF5,
-    0xB98A97D8, 0x6ADCC964,
-    0xB936BFA3, 0x6AA551E8,
-    0xB8E31319, 0x6A6D98A4,
-    0xB88F926C, 0x6A359DB9,
-    0xB83C3DD1, 0x69FD614A,
-    0xB7E9157A, 0x69C4E37A,
-    0xB796199B, 0x698C246C,
-    0xB7434A67, 0x69532442,
-    0xB6F0A811, 0x6919E320,
-    0xB69E32CD, 0x68E06129,
-    0xB64BEACC, 0x68A69E81,
-    0xB5F9D042, 0x686C9B4B,
-    0xB5A7E362, 0x683257AA,
-    0xB556245E, 0x67F7D3C4,
-    0xB5049368, 0x67BD0FBC,
-    0xB4B330B2, 0x67820BB6,
-    0xB461FC70, 0x6746C7D7,
-    0xB410F6D2, 0x670B4443,
-    0xB3C0200C, 0x66CF811F,
-    0xB36F784E, 0x66937E90,
-    0xB31EFFCB, 0x66573CBB,
-    0xB2CEB6B5, 0x661ABBC5,
-    0xB27E9D3B, 0x65DDFBD3,
-    0xB22EB392, 0x65A0FD0B,
-    0xB1DEF9E8, 0x6563BF92,
-    0xB18F7070, 0x6526438E,
-    0xB140175B, 0x64E88926,
-    0xB0F0EEDA, 0x64AA907F,
-    0xB0A1F71C, 0x646C59BF,
-    0xB0533055, 0x642DE50D,
-    0xB0049AB2, 0x63EF328F,
-    0xAFB63667, 0x63B0426D,
-    0xAF6803A1, 0x637114CC,
-    0xAF1A0293, 0x6331A9D4,
-    0xAECC336B, 0x62F201AC,
-    0xAE7E965B, 0x62B21C7B,
-    0xAE312B91, 0x6271FA69,
-    0xADE3F33E, 0x62319B9D,
-    0xAD96ED91, 0x61F1003E,
-    0xAD4A1ABA, 0x61B02876,
-    0xACFD7AE8, 0x616F146B,
-    0xACB10E4A, 0x612DC446,
-    0xAC64D510, 0x60EC3830,
-    0xAC18CF68, 0x60AA704F,
-    0xABCCFD82, 0x60686CCE,
-    0xAB815F8C, 0x60262DD5,
-    0xAB35F5B5, 0x5FE3B38D,
-    0xAAEAC02B, 0x5FA0FE1E,
-    0xAA9FBF1D, 0x5F5E0DB3,
-    0xAA54F2B9, 0x5F1AE273,
-    0xAA0A5B2D, 0x5ED77C89,
-    0xA9BFF8A8, 0x5E93DC1F,
-    0xA975CB56, 0x5E50015D,
-    0xA92BD366, 0x5E0BEC6E,
-    0xA8E21106, 0x5DC79D7C,
-    0xA8988463, 0x5D8314B0,
-    0xA84F2DA9, 0x5D3E5236,
-    0xA8060D08, 0x5CF95638,
-    0xA7BD22AB, 0x5CB420DF,
-    0xA7746EC0, 0x5C6EB258,
-    0xA72BF173, 0x5C290ACC,
-    0xA6E3AAF2, 0x5BE32A67,
-    0xA69B9B68, 0x5B9D1153,
-    0xA653C302, 0x5B56BFBD,
-    0xA60C21ED, 0x5B1035CF,
-    0xA5C4B855, 0x5AC973B4,
-    0xA57D8666, 0x5A82799A,
-    0xA5368C4B, 0x5A3B47AA,
-    0xA4EFCA31, 0x59F3DE12,
-    0xA4A94042, 0x59AC3CFD,
-    0xA462EEAC, 0x59646497,
-    0xA41CD598, 0x591C550E,
-    0xA3D6F533, 0x58D40E8C,
-    0xA3914DA7, 0x588B913F,
-    0xA34BDF20, 0x5842DD54,
-    0xA306A9C7, 0x57F9F2F7,
-    0xA2C1ADC9, 0x57B0D256,
-    0xA27CEB4F, 0x57677B9D,
-    0xA2386283, 0x571DEEF9,
-    0xA1F41391, 0x56D42C99,
-    0xA1AFFEA2, 0x568A34A9,
-    0xA16C23E1, 0x56400757,
-    0xA1288376, 0x55F5A4D2,
-    0xA0E51D8C, 0x55AB0D46,
-    0xA0A1F24C, 0x556040E2,
-    0xA05F01E1, 0x55153FD4,
-    0xA01C4C72, 0x54CA0A4A,
-    0x9FD9D22A, 0x547EA073,
-    0x9F979331, 0x5433027D,
-    0x9F558FB0, 0x53E73097,
-    0x9F13C7D0, 0x539B2AEF,
-    0x9ED23BB9, 0x534EF1B5,
-    0x9E90EB94, 0x53028517,
-    0x9E4FD789, 0x52B5E545,
-    0x9E0EFFC1, 0x5269126E,
-    0x9DCE6462, 0x521C0CC1,
-    0x9D8E0596, 0x51CED46E,
-    0x9D4DE384, 0x518169A4,
-    0x9D0DFE53, 0x5133CC94,
-    0x9CCE562B, 0x50E5FD6C,
-    0x9C8EEB33, 0x5097FC5E,
-    0x9C4FBD92, 0x5049C999,
-    0x9C10CD70, 0x4FFB654D,
-    0x9BD21AF2, 0x4FACCFAB,
-    0x9B93A640, 0x4F5E08E3,
-    0x9B556F80, 0x4F0F1126,
-    0x9B1776D9, 0x4EBFE8A4,
-    0x9AD9BC71, 0x4E708F8F,
-    0x9A9C406D, 0x4E210617,
-    0x9A5F02F5, 0x4DD14C6E,
-    0x9A22042C, 0x4D8162C4,
-    0x99E5443A, 0x4D31494B,
-    0x99A8C344, 0x4CE10034,
-    0x996C816F, 0x4C9087B1,
-    0x99307EE0, 0x4C3FDFF3,
-    0x98F4BBBC, 0x4BEF092D,
-    0x98B93828, 0x4B9E038F,
-    0x987DF449, 0x4B4CCF4D,
-    0x9842F043, 0x4AFB6C97,
-    0x98082C3B, 0x4AA9DBA1,
-    0x97CDA855, 0x4A581C9D,
-    0x979364B5, 0x4A062FBD,
-    0x9759617E, 0x49B41533,
-    0x971F9ED6, 0x4961CD32,
-    0x96E61CDF, 0x490F57EE,
-    0x96ACDBBD, 0x48BCB598,
-    0x9673DB94, 0x4869E664,
-    0x963B1C85, 0x4816EA85,
-    0x96029EB5, 0x47C3C22E,
-    0x95CA6246, 0x47706D93,
-    0x9592675B, 0x471CECE6,
-    0x955AAE17, 0x46C9405C,
-    0x9523369B, 0x46756827,
-    0x94EC010B, 0x4621647C,
-    0x94B50D87, 0x45CD358F,
-    0x947E5C32, 0x4578DB93,
-    0x9447ED2F, 0x452456BC,
-    0x9411C09D, 0x44CFA73F,
-    0x93DBD69F, 0x447ACD50,
-    0x93A62F56, 0x4425C923,
-    0x9370CAE4, 0x43D09AEC,
-    0x933BA968, 0x437B42E1,
-    0x9306CB04, 0x4325C135,
-    0x92D22FD8, 0x42D0161E,
-    0x929DD805, 0x427A41D0,
-    0x9269C3AC, 0x42244480,
-    0x9235F2EB, 0x41CE1E64,
-    0x920265E4, 0x4177CFB0,
-    0x91CF1CB6, 0x4121589A,
-    0x919C1780, 0x40CAB957,
-    0x91695663, 0x4073F21D,
-    0x9136D97D, 0x401D0320,
-    0x9104A0ED, 0x3FC5EC97,
-    0x90D2ACD3, 0x3F6EAEB8,
-    0x90A0FD4E, 0x3F1749B7,
-    0x906F927B, 0x3EBFBDCC,
-    0x903E6C7A, 0x3E680B2C,
-    0x900D8B69, 0x3E10320D,
-    0x8FDCEF66, 0x3DB832A5,
-    0x8FAC988E, 0x3D600D2B,
-    0x8F7C8701, 0x3D07C1D5,
-    0x8F4CBADB, 0x3CAF50DA,
-    0x8F1D343A, 0x3C56BA70,
-    0x8EEDF33B, 0x3BFDFECD,
-    0x8EBEF7FB, 0x3BA51E29,
-    0x8E904298, 0x3B4C18BA,
-    0x8E61D32D, 0x3AF2EEB7,
-    0x8E33A9D9, 0x3A99A057,
-    0x8E05C6B7, 0x3A402DD1,
-    0x8DD829E4, 0x39E6975D,
-    0x8DAAD37B, 0x398CDD32,
-    0x8D7DC399, 0x3932FF87,
-    0x8D50FA59, 0x38D8FE93,
-    0x8D2477D8, 0x387EDA8E,
-    0x8CF83C30, 0x382493B0,
-    0x8CCC477D, 0x37CA2A30,
-    0x8CA099D9, 0x376F9E46,
-    0x8C753361, 0x3714F02A,
-    0x8C4A142F, 0x36BA2013,
-    0x8C1F3C5C, 0x365F2E3B,
-    0x8BF4AC05, 0x36041AD9,
-    0x8BCA6342, 0x35A8E624,
-    0x8BA0622F, 0x354D9056,
-    0x8B76A8E4, 0x34F219A7,
-    0x8B4D377C, 0x3496824F,
-    0x8B240E10, 0x343ACA87,
-    0x8AFB2CBA, 0x33DEF287,
-    0x8AD29393, 0x3382FA88,
-    0x8AAA42B4, 0x3326E2C2,
-    0x8A823A35, 0x32CAAB6F,
-    0x8A5A7A30, 0x326E54C7,
-    0x8A3302BD, 0x3211DF03,
-    0x8A0BD3F5, 0x31B54A5D,
-    0x89E4EDEE, 0x3158970D,
-    0x89BE50C3, 0x30FBC54D,
-    0x8997FC89, 0x309ED555,
-    0x8971F15A, 0x3041C760,
-    0x894C2F4C, 0x2FE49BA6,
-    0x8926B677, 0x2F875262,
-    0x890186F1, 0x2F29EBCC,
-    0x88DCA0D3, 0x2ECC681E,
-    0x88B80431, 0x2E6EC792,
-    0x8893B124, 0x2E110A62,
-    0x886FA7C2, 0x2DB330C7,
-    0x884BE820, 0x2D553AFB,
-    0x88287255, 0x2CF72939,
-    0x88054677, 0x2C98FBBA,
-    0x87E2649B, 0x2C3AB2B9,
-    0x87BFCCD7, 0x2BDC4E6F,
-    0x879D7F40, 0x2B7DCF17,
-    0x877B7BEC, 0x2B1F34EB,
-    0x8759C2EF, 0x2AC08025,
-    0x8738545E, 0x2A61B101,
-    0x8717304E, 0x2A02C7B8,
-    0x86F656D3, 0x29A3C484,
-    0x86D5C802, 0x2944A7A2,
-    0x86B583EE, 0x28E5714A,
-    0x86958AAB, 0x288621B9,
-    0x8675DC4E, 0x2826B928,
-    0x865678EA, 0x27C737D2,
-    0x86376092, 0x27679DF4,
-    0x86189359, 0x2707EBC6,
-    0x85FA1152, 0x26A82185,
-    0x85DBDA91, 0x26483F6C,
-    0x85BDEF27, 0x25E845B5,
-    0x85A04F28, 0x2588349D,
-    0x8582FAA4, 0x25280C5D,
-    0x8565F1B0, 0x24C7CD32,
-    0x8549345C, 0x24677757,
-    0x852CC2BA, 0x24070B07,
-    0x85109CDC, 0x23A6887E,
-    0x84F4C2D3, 0x2345EFF7,
-    0x84D934B0, 0x22E541AE,
-    0x84BDF285, 0x22847DDF,
-    0x84A2FC62, 0x2223A4C5,
-    0x84885257, 0x21C2B69C,
-    0x846DF476, 0x2161B39F,
-    0x8453E2CE, 0x21009C0B,
-    0x843A1D70, 0x209F701C,
-    0x8420A46B, 0x203E300D,
-    0x840777CF, 0x1FDCDC1A,
-    0x83EE97AC, 0x1F7B7480,
-    0x83D60411, 0x1F19F97B,
-    0x83BDBD0D, 0x1EB86B46,
-    0x83A5C2B0, 0x1E56CA1E,
-    0x838E1507, 0x1DF5163F,
-    0x8376B422, 0x1D934FE5,
-    0x835FA00E, 0x1D31774D,
-    0x8348D8DB, 0x1CCF8CB3,
-    0x83325E97, 0x1C6D9053,
-    0x831C314E, 0x1C0B826A,
-    0x8306510F, 0x1BA96334,
-    0x82F0BDE8, 0x1B4732EF,
-    0x82DB77E5, 0x1AE4F1D6,
-    0x82C67F13, 0x1A82A025,
-    0x82B1D381, 0x1A203E1B,
-    0x829D753A, 0x19BDCBF2,
-    0x8289644A, 0x195B49E9,
-    0x8275A0C0, 0x18F8B83C,
-    0x82622AA5, 0x18961727,
-    0x824F0208, 0x183366E8,
-    0x823C26F2, 0x17D0A7BB,
-    0x82299971, 0x176DD9DE,
-    0x8217598F, 0x170AFD8D,
-    0x82056758, 0x16A81305,
-    0x81F3C2D7, 0x16451A83,
-    0x81E26C16, 0x15E21444,
-    0x81D16320, 0x157F0086,
-    0x81C0A801, 0x151BDF85,
-    0x81B03AC1, 0x14B8B17F,
-    0x81A01B6C, 0x145576B1,
-    0x81904A0C, 0x13F22F57,
-    0x8180C6A9, 0x138EDBB0,
-    0x8171914E, 0x132B7BF9,
-    0x8162AA03, 0x12C8106E,
-    0x815410D3, 0x1264994E,
-    0x8145C5C6, 0x120116D4,
-    0x8137C8E6, 0x119D8940,
-    0x812A1A39, 0x1139F0CE,
-    0x811CB9CA, 0x10D64DBC,
-    0x810FA7A0, 0x1072A047,
-    0x8102E3C3, 0x100EE8AD,
-    0x80F66E3C, 0x0FAB272B,
-    0x80EA4712, 0x0F475BFE,
-    0x80DE6E4C, 0x0EE38765,
-    0x80D2E3F1, 0x0E7FA99D,
-    0x80C7A80A, 0x0E1BC2E3,
-    0x80BCBA9C, 0x0DB7D376,
-    0x80B21BAF, 0x0D53DB92,
-    0x80A7CB49, 0x0CEFDB75,
-    0x809DC970, 0x0C8BD35E,
-    0x8094162B, 0x0C27C389,
-    0x808AB180, 0x0BC3AC35,
-    0x80819B74, 0x0B5F8D9F,
-    0x8078D40D, 0x0AFB6805,
-    0x80705B50, 0x0A973BA5,
-    0x80683143, 0x0A3308BC,
-    0x806055EA, 0x09CECF89,
-    0x8058C94C, 0x096A9049,
-    0x80518B6B, 0x09064B3A,
-    0x804A9C4D, 0x08A2009A,
-    0x8043FBF6, 0x083DB0A7,
-    0x803DAA69, 0x07D95B9E,
-    0x8037A7AC, 0x077501BE,
-    0x8031F3C1, 0x0710A344,
-    0x802C8EAD, 0x06AC406F,
-    0x80277872, 0x0647D97C,
-    0x8022B113, 0x05E36EA9,
-    0x801E3894, 0x057F0034,
-    0x801A0EF7, 0x051A8E5C,
-    0x80163440, 0x04B6195D,
-    0x8012A86F, 0x0451A176,
-    0x800F6B88, 0x03ED26E6,
-    0x800C7D8C, 0x0388A9E9,
-    0x8009DE7D, 0x03242ABF,
-    0x80078E5E, 0x02BFA9A4,
-    0x80058D2E, 0x025B26D7,
-    0x8003DAF0, 0x01F6A296,
-    0x800277A5, 0x01921D1F,
-    0x8001634D, 0x012D96B0,
-    0x80009DE9, 0x00C90F88,
-    0x8000277A, 0x006487E3,
-    0x80000000, 0x00000000,
-    0x8000277A, 0xFF9B781D,
-    0x80009DE9, 0xFF36F078,
-    0x8001634D, 0xFED2694F,
-    0x800277A5, 0xFE6DE2E0,
-    0x8003DAF0, 0xFE095D69,
-    0x80058D2E, 0xFDA4D928,
-    0x80078E5E, 0xFD40565B,
-    0x8009DE7D, 0xFCDBD541,
-    0x800C7D8C, 0xFC775616,
-    0x800F6B88, 0xFC12D919,
-    0x8012A86F, 0xFBAE5E89,
-    0x80163440, 0xFB49E6A2,
-    0x801A0EF7, 0xFAE571A4,
-    0x801E3894, 0xFA80FFCB,
-    0x8022B113, 0xFA1C9156,
-    0x80277872, 0xF9B82683,
-    0x802C8EAD, 0xF953BF90,
-    0x8031F3C1, 0xF8EF5CBB,
-    0x8037A7AC, 0xF88AFE41,
-    0x803DAA69, 0xF826A461,
-    0x8043FBF6, 0xF7C24F58,
-    0x804A9C4D, 0xF75DFF65,
-    0x80518B6B, 0xF6F9B4C5,
-    0x8058C94C, 0xF6956FB6,
-    0x806055EA, 0xF6313076,
-    0x80683143, 0xF5CCF743,
-    0x80705B50, 0xF568C45A,
-    0x8078D40D, 0xF50497FA,
-    0x80819B74, 0xF4A07260,
-    0x808AB180, 0xF43C53CA,
-    0x8094162B, 0xF3D83C76,
-    0x809DC970, 0xF3742CA1,
-    0x80A7CB49, 0xF310248A,
-    0x80B21BAF, 0xF2AC246D,
-    0x80BCBA9C, 0xF2482C89,
-    0x80C7A80A, 0xF1E43D1C,
-    0x80D2E3F1, 0xF1805662,
-    0x80DE6E4C, 0xF11C789A,
-    0x80EA4712, 0xF0B8A401,
-    0x80F66E3C, 0xF054D8D4,
-    0x8102E3C3, 0xEFF11752,
-    0x810FA7A0, 0xEF8D5FB8,
-    0x811CB9CA, 0xEF29B243,
-    0x812A1A39, 0xEEC60F31,
-    0x8137C8E6, 0xEE6276BF,
-    0x8145C5C6, 0xEDFEE92B,
-    0x815410D3, 0xED9B66B2,
-    0x8162AA03, 0xED37EF91,
-    0x8171914E, 0xECD48406,
-    0x8180C6A9, 0xEC71244F,
-    0x81904A0C, 0xEC0DD0A8,
-    0x81A01B6C, 0xEBAA894E,
-    0x81B03AC1, 0xEB474E80,
-    0x81C0A801, 0xEAE4207A,
-    0x81D16320, 0xEA80FF79,
-    0x81E26C16, 0xEA1DEBBB,
-    0x81F3C2D7, 0xE9BAE57C,
-    0x82056758, 0xE957ECFB,
-    0x8217598F, 0xE8F50273,
-    0x82299971, 0xE8922621,
-    0x823C26F2, 0xE82F5844,
-    0x824F0208, 0xE7CC9917,
-    0x82622AA5, 0xE769E8D8,
-    0x8275A0C0, 0xE70747C3,
-    0x8289644A, 0xE6A4B616,
-    0x829D753A, 0xE642340D,
-    0x82B1D381, 0xE5DFC1E4,
-    0x82C67F13, 0xE57D5FDA,
-    0x82DB77E5, 0xE51B0E2A,
-    0x82F0BDE8, 0xE4B8CD10,
-    0x8306510F, 0xE4569CCB,
-    0x831C314E, 0xE3F47D95,
-    0x83325E97, 0xE3926FAC,
-    0x8348D8DB, 0xE330734C,
-    0x835FA00E, 0xE2CE88B2,
-    0x8376B422, 0xE26CB01A,
-    0x838E1507, 0xE20AE9C1,
-    0x83A5C2B0, 0xE1A935E1,
-    0x83BDBD0D, 0xE14794B9,
-    0x83D60411, 0xE0E60684,
-    0x83EE97AC, 0xE0848B7F,
-    0x840777CF, 0xE02323E5,
-    0x8420A46B, 0xDFC1CFF2,
-    0x843A1D70, 0xDF608FE3,
-    0x8453E2CE, 0xDEFF63F4,
-    0x846DF476, 0xDE9E4C60,
-    0x84885257, 0xDE3D4963,
-    0x84A2FC62, 0xDDDC5B3A,
-    0x84BDF285, 0xDD7B8220,
-    0x84D934B0, 0xDD1ABE51,
-    0x84F4C2D3, 0xDCBA1008,
-    0x85109CDC, 0xDC597781,
-    0x852CC2BA, 0xDBF8F4F8,
-    0x8549345C, 0xDB9888A8,
-    0x8565F1B0, 0xDB3832CD,
-    0x8582FAA4, 0xDAD7F3A2,
-    0x85A04F28, 0xDA77CB62,
-    0x85BDEF27, 0xDA17BA4A,
-    0x85DBDA91, 0xD9B7C093,
-    0x85FA1152, 0xD957DE7A,
-    0x86189359, 0xD8F81439,
-    0x86376092, 0xD898620C,
-    0x865678EA, 0xD838C82D,
-    0x8675DC4E, 0xD7D946D7,
-    0x86958AAB, 0xD779DE46,
-    0x86B583EE, 0xD71A8EB5,
-    0x86D5C802, 0xD6BB585D,
-    0x86F656D3, 0xD65C3B7B,
-    0x8717304E, 0xD5FD3847,
-    0x8738545E, 0xD59E4EFE,
-    0x8759C2EF, 0xD53F7FDA,
-    0x877B7BEC, 0xD4E0CB14,
-    0x879D7F40, 0xD48230E8,
-    0x87BFCCD7, 0xD423B190,
-    0x87E2649B, 0xD3C54D46,
-    0x88054677, 0xD3670445,
-    0x88287255, 0xD308D6C6,
-    0x884BE820, 0xD2AAC504,
-    0x886FA7C2, 0xD24CCF38,
-    0x8893B124, 0xD1EEF59E,
-    0x88B80431, 0xD191386D,
-    0x88DCA0D3, 0xD13397E1,
-    0x890186F1, 0xD0D61433,
-    0x8926B677, 0xD078AD9D,
-    0x894C2F4C, 0xD01B6459,
-    0x8971F15A, 0xCFBE389F,
-    0x8997FC89, 0xCF612AAA,
-    0x89BE50C3, 0xCF043AB2,
-    0x89E4EDEE, 0xCEA768F2,
-    0x8A0BD3F5, 0xCE4AB5A2,
-    0x8A3302BD, 0xCDEE20FC,
-    0x8A5A7A30, 0xCD91AB38,
-    0x8A823A35, 0xCD355490,
-    0x8AAA42B4, 0xCCD91D3D,
-    0x8AD29393, 0xCC7D0577,
-    0x8AFB2CBA, 0xCC210D78,
-    0x8B240E10, 0xCBC53578,
-    0x8B4D377C, 0xCB697DB0,
-    0x8B76A8E4, 0xCB0DE658,
-    0x8BA0622F, 0xCAB26FA9,
-    0x8BCA6342, 0xCA5719DB,
-    0x8BF4AC05, 0xC9FBE527,
-    0x8C1F3C5C, 0xC9A0D1C4,
-    0x8C4A142F, 0xC945DFEC,
-    0x8C753361, 0xC8EB0FD6,
-    0x8CA099D9, 0xC89061BA,
-    0x8CCC477D, 0xC835D5D0,
-    0x8CF83C30, 0xC7DB6C50,
-    0x8D2477D8, 0xC7812571,
-    0x8D50FA59, 0xC727016C,
-    0x8D7DC399, 0xC6CD0079,
-    0x8DAAD37B, 0xC67322CD,
-    0x8DD829E4, 0xC61968A2,
-    0x8E05C6B7, 0xC5BFD22E,
-    0x8E33A9D9, 0xC5665FA8,
-    0x8E61D32D, 0xC50D1148,
-    0x8E904298, 0xC4B3E746,
-    0x8EBEF7FB, 0xC45AE1D7,
-    0x8EEDF33B, 0xC4020132,
-    0x8F1D343A, 0xC3A9458F,
-    0x8F4CBADB, 0xC350AF25,
-    0x8F7C8701, 0xC2F83E2A,
-    0x8FAC988E, 0xC29FF2D4,
-    0x8FDCEF66, 0xC247CD5A,
-    0x900D8B69, 0xC1EFCDF2,
-    0x903E6C7A, 0xC197F4D3,
-    0x906F927B, 0xC1404233,
-    0x90A0FD4E, 0xC0E8B648,
-    0x90D2ACD3, 0xC0915147,
-    0x9104A0ED, 0xC03A1368,
-    0x9136D97D, 0xBFE2FCDF,
-    0x91695663, 0xBF8C0DE2,
-    0x919C1780, 0xBF3546A8,
-    0x91CF1CB6, 0xBEDEA765,
-    0x920265E4, 0xBE88304F,
-    0x9235F2EB, 0xBE31E19B,
-    0x9269C3AC, 0xBDDBBB7F,
-    0x929DD805, 0xBD85BE2F,
-    0x92D22FD8, 0xBD2FE9E1,
-    0x9306CB04, 0xBCDA3ECA,
-    0x933BA968, 0xBC84BD1E,
-    0x9370CAE4, 0xBC2F6513,
-    0x93A62F56, 0xBBDA36DC,
-    0x93DBD69F, 0xBB8532AF,
-    0x9411C09D, 0xBB3058C0,
-    0x9447ED2F, 0xBADBA943,
-    0x947E5C32, 0xBA87246C,
-    0x94B50D87, 0xBA32CA70,
-    0x94EC010B, 0xB9DE9B83,
-    0x9523369B, 0xB98A97D8,
-    0x955AAE17, 0xB936BFA3,
-    0x9592675B, 0xB8E31319,
-    0x95CA6246, 0xB88F926C,
-    0x96029EB5, 0xB83C3DD1,
-    0x963B1C85, 0xB7E9157A,
-    0x9673DB94, 0xB796199B,
-    0x96ACDBBD, 0xB7434A67,
-    0x96E61CDF, 0xB6F0A811,
-    0x971F9ED6, 0xB69E32CD,
-    0x9759617E, 0xB64BEACC,
-    0x979364B5, 0xB5F9D042,
-    0x97CDA855, 0xB5A7E362,
-    0x98082C3B, 0xB556245E,
-    0x9842F043, 0xB5049368,
-    0x987DF449, 0xB4B330B2,
-    0x98B93828, 0xB461FC70,
-    0x98F4BBBC, 0xB410F6D2,
-    0x99307EE0, 0xB3C0200C,
-    0x996C816F, 0xB36F784E,
-    0x99A8C344, 0xB31EFFCB,
-    0x99E5443A, 0xB2CEB6B5,
-    0x9A22042C, 0xB27E9D3B,
-    0x9A5F02F5, 0xB22EB392,
-    0x9A9C406D, 0xB1DEF9E8,
-    0x9AD9BC71, 0xB18F7070,
-    0x9B1776D9, 0xB140175B,
-    0x9B556F80, 0xB0F0EEDA,
-    0x9B93A640, 0xB0A1F71C,
-    0x9BD21AF2, 0xB0533055,
-    0x9C10CD70, 0xB0049AB2,
-    0x9C4FBD92, 0xAFB63667,
-    0x9C8EEB33, 0xAF6803A1,
-    0x9CCE562B, 0xAF1A0293,
-    0x9D0DFE53, 0xAECC336B,
-    0x9D4DE384, 0xAE7E965B,
-    0x9D8E0596, 0xAE312B91,
-    0x9DCE6462, 0xADE3F33E,
-    0x9E0EFFC1, 0xAD96ED91,
-    0x9E4FD789, 0xAD4A1ABA,
-    0x9E90EB94, 0xACFD7AE8,
-    0x9ED23BB9, 0xACB10E4A,
-    0x9F13C7D0, 0xAC64D510,
-    0x9F558FB0, 0xAC18CF68,
-    0x9F979331, 0xABCCFD82,
-    0x9FD9D22A, 0xAB815F8C,
-    0xA01C4C72, 0xAB35F5B5,
-    0xA05F01E1, 0xAAEAC02B,
-    0xA0A1F24C, 0xAA9FBF1D,
-    0xA0E51D8C, 0xAA54F2B9,
-    0xA1288376, 0xAA0A5B2D,
-    0xA16C23E1, 0xA9BFF8A8,
-    0xA1AFFEA2, 0xA975CB56,
-    0xA1F41391, 0xA92BD366,
-    0xA2386283, 0xA8E21106,
-    0xA27CEB4F, 0xA8988463,
-    0xA2C1ADC9, 0xA84F2DA9,
-    0xA306A9C7, 0xA8060D08,
-    0xA34BDF20, 0xA7BD22AB,
-    0xA3914DA7, 0xA7746EC0,
-    0xA3D6F533, 0xA72BF173,
-    0xA41CD598, 0xA6E3AAF2,
-    0xA462EEAC, 0xA69B9B68,
-    0xA4A94042, 0xA653C302,
-    0xA4EFCA31, 0xA60C21ED,
-    0xA5368C4B, 0xA5C4B855,
-    0xA57D8666, 0xA57D8666,
-    0xA5C4B855, 0xA5368C4B,
-    0xA60C21ED, 0xA4EFCA31,
-    0xA653C302, 0xA4A94042,
-    0xA69B9B68, 0xA462EEAC,
-    0xA6E3AAF2, 0xA41CD598,
-    0xA72BF173, 0xA3D6F533,
-    0xA7746EC0, 0xA3914DA7,
-    0xA7BD22AB, 0xA34BDF20,
-    0xA8060D08, 0xA306A9C7,
-    0xA84F2DA9, 0xA2C1ADC9,
-    0xA8988463, 0xA27CEB4F,
-    0xA8E21106, 0xA2386283,
-    0xA92BD366, 0xA1F41391,
-    0xA975CB56, 0xA1AFFEA2,
-    0xA9BFF8A8, 0xA16C23E1,
-    0xAA0A5B2D, 0xA1288376,
-    0xAA54F2B9, 0xA0E51D8C,
-    0xAA9FBF1D, 0xA0A1F24C,
-    0xAAEAC02B, 0xA05F01E1,
-    0xAB35F5B5, 0xA01C4C72,
-    0xAB815F8C, 0x9FD9D22A,
-    0xABCCFD82, 0x9F979331,
-    0xAC18CF68, 0x9F558FB0,
-    0xAC64D510, 0x9F13C7D0,
-    0xACB10E4A, 0x9ED23BB9,
-    0xACFD7AE8, 0x9E90EB94,
-    0xAD4A1ABA, 0x9E4FD789,
-    0xAD96ED91, 0x9E0EFFC1,
-    0xADE3F33E, 0x9DCE6462,
-    0xAE312B91, 0x9D8E0596,
-    0xAE7E965B, 0x9D4DE384,
-    0xAECC336B, 0x9D0DFE53,
-    0xAF1A0293, 0x9CCE562B,
-    0xAF6803A1, 0x9C8EEB33,
-    0xAFB63667, 0x9C4FBD92,
-    0xB0049AB2, 0x9C10CD70,
-    0xB0533055, 0x9BD21AF2,
-    0xB0A1F71C, 0x9B93A640,
-    0xB0F0EEDA, 0x9B556F80,
-    0xB140175B, 0x9B1776D9,
-    0xB18F7070, 0x9AD9BC71,
-    0xB1DEF9E8, 0x9A9C406D,
-    0xB22EB392, 0x9A5F02F5,
-    0xB27E9D3B, 0x9A22042C,
-    0xB2CEB6B5, 0x99E5443A,
-    0xB31EFFCB, 0x99A8C344,
-    0xB36F784E, 0x996C816F,
-    0xB3C0200C, 0x99307EE0,
-    0xB410F6D2, 0x98F4BBBC,
-    0xB461FC70, 0x98B93828,
-    0xB4B330B2, 0x987DF449,
-    0xB5049368, 0x9842F043,
-    0xB556245E, 0x98082C3B,
-    0xB5A7E362, 0x97CDA855,
-    0xB5F9D042, 0x979364B5,
-    0xB64BEACC, 0x9759617E,
-    0xB69E32CD, 0x971F9ED6,
-    0xB6F0A811, 0x96E61CDF,
-    0xB7434A67, 0x96ACDBBD,
-    0xB796199B, 0x9673DB94,
-    0xB7E9157A, 0x963B1C85,
-    0xB83C3DD1, 0x96029EB5,
-    0xB88F926C, 0x95CA6246,
-    0xB8E31319, 0x9592675B,
-    0xB936BFA3, 0x955AAE17,
-    0xB98A97D8, 0x9523369B,
-    0xB9DE9B83, 0x94EC010B,
-    0xBA32CA70, 0x94B50D87,
-    0xBA87246C, 0x947E5C32,
-    0xBADBA943, 0x9447ED2F,
-    0xBB3058C0, 0x9411C09D,
-    0xBB8532AF, 0x93DBD69F,
-    0xBBDA36DC, 0x93A62F56,
-    0xBC2F6513, 0x9370CAE4,
-    0xBC84BD1E, 0x933BA968,
-    0xBCDA3ECA, 0x9306CB04,
-    0xBD2FE9E1, 0x92D22FD8,
-    0xBD85BE2F, 0x929DD805,
-    0xBDDBBB7F, 0x9269C3AC,
-    0xBE31E19B, 0x9235F2EB,
-    0xBE88304F, 0x920265E4,
-    0xBEDEA765, 0x91CF1CB6,
-    0xBF3546A8, 0x919C1780,
-    0xBF8C0DE2, 0x91695663,
-    0xBFE2FCDF, 0x9136D97D,
-    0xC03A1368, 0x9104A0ED,
-    0xC0915147, 0x90D2ACD3,
-    0xC0E8B648, 0x90A0FD4E,
-    0xC1404233, 0x906F927B,
-    0xC197F4D3, 0x903E6C7A,
-    0xC1EFCDF2, 0x900D8B69,
-    0xC247CD5A, 0x8FDCEF66,
-    0xC29FF2D4, 0x8FAC988E,
-    0xC2F83E2A, 0x8F7C8701,
-    0xC350AF25, 0x8F4CBADB,
-    0xC3A9458F, 0x8F1D343A,
-    0xC4020132, 0x8EEDF33B,
-    0xC45AE1D7, 0x8EBEF7FB,
-    0xC4B3E746, 0x8E904298,
-    0xC50D1148, 0x8E61D32D,
-    0xC5665FA8, 0x8E33A9D9,
-    0xC5BFD22E, 0x8E05C6B7,
-    0xC61968A2, 0x8DD829E4,
-    0xC67322CD, 0x8DAAD37B,
-    0xC6CD0079, 0x8D7DC399,
-    0xC727016C, 0x8D50FA59,
-    0xC7812571, 0x8D2477D8,
-    0xC7DB6C50, 0x8CF83C30,
-    0xC835D5D0, 0x8CCC477D,
-    0xC89061BA, 0x8CA099D9,
-    0xC8EB0FD6, 0x8C753361,
-    0xC945DFEC, 0x8C4A142F,
-    0xC9A0D1C4, 0x8C1F3C5C,
-    0xC9FBE527, 0x8BF4AC05,
-    0xCA5719DB, 0x8BCA6342,
-    0xCAB26FA9, 0x8BA0622F,
-    0xCB0DE658, 0x8B76A8E4,
-    0xCB697DB0, 0x8B4D377C,
-    0xCBC53578, 0x8B240E10,
-    0xCC210D78, 0x8AFB2CBA,
-    0xCC7D0577, 0x8AD29393,
-    0xCCD91D3D, 0x8AAA42B4,
-    0xCD355490, 0x8A823A35,
-    0xCD91AB38, 0x8A5A7A30,
-    0xCDEE20FC, 0x8A3302BD,
-    0xCE4AB5A2, 0x8A0BD3F5,
-    0xCEA768F2, 0x89E4EDEE,
-    0xCF043AB2, 0x89BE50C3,
-    0xCF612AAA, 0x8997FC89,
-    0xCFBE389F, 0x8971F15A,
-    0xD01B6459, 0x894C2F4C,
-    0xD078AD9D, 0x8926B677,
-    0xD0D61433, 0x890186F1,
-    0xD13397E1, 0x88DCA0D3,
-    0xD191386D, 0x88B80431,
-    0xD1EEF59E, 0x8893B124,
-    0xD24CCF38, 0x886FA7C2,
-    0xD2AAC504, 0x884BE820,
-    0xD308D6C6, 0x88287255,
-    0xD3670445, 0x88054677,
-    0xD3C54D46, 0x87E2649B,
-    0xD423B190, 0x87BFCCD7,
-    0xD48230E8, 0x879D7F40,
-    0xD4E0CB14, 0x877B7BEC,
-    0xD53F7FDA, 0x8759C2EF,
-    0xD59E4EFE, 0x8738545E,
-    0xD5FD3847, 0x8717304E,
-    0xD65C3B7B, 0x86F656D3,
-    0xD6BB585D, 0x86D5C802,
-    0xD71A8EB5, 0x86B583EE,
-    0xD779DE46, 0x86958AAB,
-    0xD7D946D7, 0x8675DC4E,
-    0xD838C82D, 0x865678EA,
-    0xD898620C, 0x86376092,
-    0xD8F81439, 0x86189359,
-    0xD957DE7A, 0x85FA1152,
-    0xD9B7C093, 0x85DBDA91,
-    0xDA17BA4A, 0x85BDEF27,
-    0xDA77CB62, 0x85A04F28,
-    0xDAD7F3A2, 0x8582FAA4,
-    0xDB3832CD, 0x8565F1B0,
-    0xDB9888A8, 0x8549345C,
-    0xDBF8F4F8, 0x852CC2BA,
-    0xDC597781, 0x85109CDC,
-    0xDCBA1008, 0x84F4C2D3,
-    0xDD1ABE51, 0x84D934B0,
-    0xDD7B8220, 0x84BDF285,
-    0xDDDC5B3A, 0x84A2FC62,
-    0xDE3D4963, 0x84885257,
-    0xDE9E4C60, 0x846DF476,
-    0xDEFF63F4, 0x8453E2CE,
-    0xDF608FE3, 0x843A1D70,
-    0xDFC1CFF2, 0x8420A46B,
-    0xE02323E5, 0x840777CF,
-    0xE0848B7F, 0x83EE97AC,
-    0xE0E60684, 0x83D60411,
-    0xE14794B9, 0x83BDBD0D,
-    0xE1A935E1, 0x83A5C2B0,
-    0xE20AE9C1, 0x838E1507,
-    0xE26CB01A, 0x8376B422,
-    0xE2CE88B2, 0x835FA00E,
-    0xE330734C, 0x8348D8DB,
-    0xE3926FAC, 0x83325E97,
-    0xE3F47D95, 0x831C314E,
-    0xE4569CCB, 0x8306510F,
-    0xE4B8CD10, 0x82F0BDE8,
-    0xE51B0E2A, 0x82DB77E5,
-    0xE57D5FDA, 0x82C67F13,
-    0xE5DFC1E4, 0x82B1D381,
-    0xE642340D, 0x829D753A,
-    0xE6A4B616, 0x8289644A,
-    0xE70747C3, 0x8275A0C0,
-    0xE769E8D8, 0x82622AA5,
-    0xE7CC9917, 0x824F0208,
-    0xE82F5844, 0x823C26F2,
-    0xE8922621, 0x82299971,
-    0xE8F50273, 0x8217598F,
-    0xE957ECFB, 0x82056758,
-    0xE9BAE57C, 0x81F3C2D7,
-    0xEA1DEBBB, 0x81E26C16,
-    0xEA80FF79, 0x81D16320,
-    0xEAE4207A, 0x81C0A801,
-    0xEB474E80, 0x81B03AC1,
-    0xEBAA894E, 0x81A01B6C,
-    0xEC0DD0A8, 0x81904A0C,
-    0xEC71244F, 0x8180C6A9,
-    0xECD48406, 0x8171914E,
-    0xED37EF91, 0x8162AA03,
-    0xED9B66B2, 0x815410D3,
-    0xEDFEE92B, 0x8145C5C6,
-    0xEE6276BF, 0x8137C8E6,
-    0xEEC60F31, 0x812A1A39,
-    0xEF29B243, 0x811CB9CA,
-    0xEF8D5FB8, 0x810FA7A0,
-    0xEFF11752, 0x8102E3C3,
-    0xF054D8D4, 0x80F66E3C,
-    0xF0B8A401, 0x80EA4712,
-    0xF11C789A, 0x80DE6E4C,
-    0xF1805662, 0x80D2E3F1,
-    0xF1E43D1C, 0x80C7A80A,
-    0xF2482C89, 0x80BCBA9C,
-    0xF2AC246D, 0x80B21BAF,
-    0xF310248A, 0x80A7CB49,
-    0xF3742CA1, 0x809DC970,
-    0xF3D83C76, 0x8094162B,
-    0xF43C53CA, 0x808AB180,
-    0xF4A07260, 0x80819B74,
-    0xF50497FA, 0x8078D40D,
-    0xF568C45A, 0x80705B50,
-    0xF5CCF743, 0x80683143,
-    0xF6313076, 0x806055EA,
-    0xF6956FB6, 0x8058C94C,
-    0xF6F9B4C5, 0x80518B6B,
-    0xF75DFF65, 0x804A9C4D,
-    0xF7C24F58, 0x8043FBF6,
-    0xF826A461, 0x803DAA69,
-    0xF88AFE41, 0x8037A7AC,
-    0xF8EF5CBB, 0x8031F3C1,
-    0xF953BF90, 0x802C8EAD,
-    0xF9B82683, 0x80277872,
-    0xFA1C9156, 0x8022B113,
-    0xFA80FFCB, 0x801E3894,
-    0xFAE571A4, 0x801A0EF7,
-    0xFB49E6A2, 0x80163440,
-    0xFBAE5E89, 0x8012A86F,
-    0xFC12D919, 0x800F6B88,
-    0xFC775616, 0x800C7D8C,
-    0xFCDBD541, 0x8009DE7D,
-    0xFD40565B, 0x80078E5E,
-    0xFDA4D928, 0x80058D2E,
-    0xFE095D69, 0x8003DAF0,
-    0xFE6DE2E0, 0x800277A5,
-    0xFED2694F, 0x8001634D,
-    0xFF36F078, 0x80009DE9,
-    0xFF9B781D, 0x8000277A
-};
-
-/**    
-* \par   
-* Example code for Q31 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefQ31[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefQ31[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 4096	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to Q31(Fixed point 1.31):    
-*	round(twiddleCoefQ31(i) * pow(2, 31))    
-*    
-*/
-const q31_t twiddleCoef_4096_q31[6144] = 
-{
-    0x7FFFFFFF, 0x00000000,
-    0x7FFFF621, 0x003243F5,
-    0x7FFFD885, 0x006487E3,
-    0x7FFFA72C, 0x0096CBC1,
-    0x7FFF6216, 0x00C90F88,
-    0x7FFF0942, 0x00FB532F,
-    0x7FFE9CB2, 0x012D96B0,
-    0x7FFE1C64, 0x015FDA03,
-    0x7FFD885A, 0x01921D1F,
-    0x7FFCE093, 0x01C45FFE,
-    0x7FFC250F, 0x01F6A296,
-    0x7FFB55CE, 0x0228E4E1,
-    0x7FFA72D1, 0x025B26D7,
-    0x7FF97C17, 0x028D6870,
-    0x7FF871A1, 0x02BFA9A4,
-    0x7FF7536F, 0x02F1EA6B,
-    0x7FF62182, 0x03242ABF,
-    0x7FF4DBD8, 0x03566A96,
-    0x7FF38273, 0x0388A9E9,
-    0x7FF21553, 0x03BAE8B1,
-    0x7FF09477, 0x03ED26E6,
-    0x7FEEFFE1, 0x041F647F,
-    0x7FED5790, 0x0451A176,
-    0x7FEB9B85, 0x0483DDC3,
-    0x7FE9CBC0, 0x04B6195D,
-    0x7FE7E840, 0x04E8543D,
-    0x7FE5F108, 0x051A8E5C,
-    0x7FE3E616, 0x054CC7B0,
-    0x7FE1C76B, 0x057F0034,
-    0x7FDF9508, 0x05B137DF,
-    0x7FDD4EEC, 0x05E36EA9,
-    0x7FDAF518, 0x0615A48A,
-    0x7FD8878D, 0x0647D97C,
-    0x7FD6064B, 0x067A0D75,
-    0x7FD37152, 0x06AC406F,
-    0x7FD0C8A3, 0x06DE7261,
-    0x7FCE0C3E, 0x0710A344,
-    0x7FCB3C23, 0x0742D310,
-    0x7FC85853, 0x077501BE,
-    0x7FC560CF, 0x07A72F45,
-    0x7FC25596, 0x07D95B9E,
-    0x7FBF36A9, 0x080B86C1,
-    0x7FBC040A, 0x083DB0A7,
-    0x7FB8BDB7, 0x086FD947,
-    0x7FB563B2, 0x08A2009A,
-    0x7FB1F5FC, 0x08D42698,
-    0x7FAE7494, 0x09064B3A,
-    0x7FAADF7C, 0x09386E77,
-    0x7FA736B4, 0x096A9049,
-    0x7FA37A3C, 0x099CB0A7,
-    0x7F9FAA15, 0x09CECF89,
-    0x7F9BC63F, 0x0A00ECE8,
-    0x7F97CEBC, 0x0A3308BC,
-    0x7F93C38C, 0x0A6522FE,
-    0x7F8FA4AF, 0x0A973BA5,
-    0x7F8B7226, 0x0AC952AA,
-    0x7F872BF3, 0x0AFB6805,
-    0x7F82D214, 0x0B2D7BAE,
-    0x7F7E648B, 0x0B5F8D9F,
-    0x7F79E35A, 0x0B919DCE,
-    0x7F754E7F, 0x0BC3AC35,
-    0x7F70A5FD, 0x0BF5B8CB,
-    0x7F6BE9D4, 0x0C27C389,
-    0x7F671A04, 0x0C59CC67,
-    0x7F62368F, 0x0C8BD35E,
-    0x7F5D3F75, 0x0CBDD865,
-    0x7F5834B6, 0x0CEFDB75,
-    0x7F531654, 0x0D21DC87,
-    0x7F4DE450, 0x0D53DB92,
-    0x7F489EAA, 0x0D85D88F,
-    0x7F434563, 0x0DB7D376,
-    0x7F3DD87C, 0x0DE9CC3F,
-    0x7F3857F5, 0x0E1BC2E3,
-    0x7F32C3D0, 0x0E4DB75B,
-    0x7F2D1C0E, 0x0E7FA99D,
-    0x7F2760AF, 0x0EB199A3,
-    0x7F2191B4, 0x0EE38765,
-    0x7F1BAF1E, 0x0F1572DC,
-    0x7F15B8EE, 0x0F475BFE,
-    0x7F0FAF24, 0x0F7942C6,
-    0x7F0991C3, 0x0FAB272B,
-    0x7F0360CB, 0x0FDD0925,
-    0x7EFD1C3C, 0x100EE8AD,
-    0x7EF6C418, 0x1040C5BB,
-    0x7EF0585F, 0x1072A047,
-    0x7EE9D913, 0x10A4784A,
-    0x7EE34635, 0x10D64DBC,
-    0x7EDC9FC6, 0x11082096,
-    0x7ED5E5C6, 0x1139F0CE,
-    0x7ECF1837, 0x116BBE5F,
-    0x7EC8371A, 0x119D8940,
-    0x7EC1426F, 0x11CF516A,
-    0x7EBA3A39, 0x120116D4,
-    0x7EB31E77, 0x1232D978,
-    0x7EABEF2C, 0x1264994E,
-    0x7EA4AC58, 0x1296564D,
-    0x7E9D55FC, 0x12C8106E,
-    0x7E95EC19, 0x12F9C7AA,
-    0x7E8E6EB1, 0x132B7BF9,
-    0x7E86DDC5, 0x135D2D53,
-    0x7E7F3956, 0x138EDBB0,
-    0x7E778165, 0x13C0870A,
-    0x7E6FB5F3, 0x13F22F57,
-    0x7E67D702, 0x1423D492,
-    0x7E5FE493, 0x145576B1,
-    0x7E57DEA6, 0x148715AD,
-    0x7E4FC53E, 0x14B8B17F,
-    0x7E47985B, 0x14EA4A1F,
-    0x7E3F57FE, 0x151BDF85,
-    0x7E37042A, 0x154D71AA,
-    0x7E2E9CDF, 0x157F0086,
-    0x7E26221E, 0x15B08C11,
-    0x7E1D93E9, 0x15E21444,
-    0x7E14F242, 0x16139917,
-    0x7E0C3D29, 0x16451A83,
-    0x7E03749F, 0x1676987F,
-    0x7DFA98A7, 0x16A81305,
-    0x7DF1A942, 0x16D98A0C,
-    0x7DE8A670, 0x170AFD8D,
-    0x7DDF9034, 0x173C6D80,
-    0x7DD6668E, 0x176DD9DE,
-    0x7DCD2981, 0x179F429F,
-    0x7DC3D90D, 0x17D0A7BB,
-    0x7DBA7534, 0x1802092C,
-    0x7DB0FDF7, 0x183366E8,
-    0x7DA77359, 0x1864C0E9,
-    0x7D9DD55A, 0x18961727,
-    0x7D9423FB, 0x18C7699B,
-    0x7D8A5F3F, 0x18F8B83C,
-    0x7D808727, 0x192A0303,
-    0x7D769BB5, 0x195B49E9,
-    0x7D6C9CE9, 0x198C8CE6,
-    0x7D628AC5, 0x19BDCBF2,
-    0x7D58654C, 0x19EF0706,
-    0x7D4E2C7E, 0x1A203E1B,
-    0x7D43E05E, 0x1A517127,
-    0x7D3980EC, 0x1A82A025,
-    0x7D2F0E2A, 0x1AB3CB0C,
-    0x7D24881A, 0x1AE4F1D6,
-    0x7D19EEBE, 0x1B161479,
-    0x7D0F4218, 0x1B4732EF,
-    0x7D048228, 0x1B784D30,
-    0x7CF9AEF0, 0x1BA96334,
-    0x7CEEC873, 0x1BDA74F5,
-    0x7CE3CEB1, 0x1C0B826A,
-    0x7CD8C1AD, 0x1C3C8B8C,
-    0x7CCDA168, 0x1C6D9053,
-    0x7CC26DE5, 0x1C9E90B8,
-    0x7CB72724, 0x1CCF8CB3,
-    0x7CABCD27, 0x1D00843C,
-    0x7CA05FF1, 0x1D31774D,
-    0x7C94DF82, 0x1D6265DD,
-    0x7C894BDD, 0x1D934FE5,
-    0x7C7DA504, 0x1DC4355D,
-    0x7C71EAF8, 0x1DF5163F,
-    0x7C661DBB, 0x1E25F281,
-    0x7C5A3D4F, 0x1E56CA1E,
-    0x7C4E49B6, 0x1E879D0C,
-    0x7C4242F2, 0x1EB86B46,
-    0x7C362904, 0x1EE934C2,
-    0x7C29FBEE, 0x1F19F97B,
-    0x7C1DBBB2, 0x1F4AB967,
-    0x7C116853, 0x1F7B7480,
-    0x7C0501D1, 0x1FAC2ABF,
-    0x7BF88830, 0x1FDCDC1A,
-    0x7BEBFB70, 0x200D888C,
-    0x7BDF5B94, 0x203E300D,
-    0x7BD2A89E, 0x206ED295,
-    0x7BC5E28F, 0x209F701C,
-    0x7BB9096A, 0x20D0089B,
-    0x7BAC1D31, 0x21009C0B,
-    0x7B9F1DE5, 0x21312A65,
-    0x7B920B89, 0x2161B39F,
-    0x7B84E61E, 0x219237B4,
-    0x7B77ADA8, 0x21C2B69C,
-    0x7B6A6227, 0x21F3304E,
-    0x7B5D039D, 0x2223A4C5,
-    0x7B4F920E, 0x225413F8,
-    0x7B420D7A, 0x22847DDF,
-    0x7B3475E4, 0x22B4E274,
-    0x7B26CB4F, 0x22E541AE,
-    0x7B190DBB, 0x23159B87,
-    0x7B0B3D2C, 0x2345EFF7,
-    0x7AFD59A3, 0x23763EF7,
-    0x7AEF6323, 0x23A6887E,
-    0x7AE159AE, 0x23D6CC86,
-    0x7AD33D45, 0x24070B07,
-    0x7AC50DEB, 0x243743FA,
-    0x7AB6CBA3, 0x24677757,
-    0x7AA8766E, 0x2497A517,
-    0x7A9A0E4F, 0x24C7CD32,
-    0x7A8B9348, 0x24F7EFA1,
-    0x7A7D055B, 0x25280C5D,
-    0x7A6E648A, 0x2558235E,
-    0x7A5FB0D8, 0x2588349D,
-    0x7A50EA46, 0x25B84012,
-    0x7A4210D8, 0x25E845B5,
-    0x7A33248F, 0x26184581,
-    0x7A24256E, 0x26483F6C,
-    0x7A151377, 0x26783370,
-    0x7A05EEAD, 0x26A82185,
-    0x79F6B711, 0x26D809A5,
-    0x79E76CA6, 0x2707EBC6,
-    0x79D80F6F, 0x2737C7E3,
-    0x79C89F6D, 0x27679DF4,
-    0x79B91CA4, 0x27976DF1,
-    0x79A98715, 0x27C737D2,
-    0x7999DEC3, 0x27F6FB92,
-    0x798A23B1, 0x2826B928,
-    0x797A55E0, 0x2856708C,
-    0x796A7554, 0x288621B9,
-    0x795A820E, 0x28B5CCA5,
-    0x794A7C11, 0x28E5714A,
-    0x793A6360, 0x29150FA1,
-    0x792A37FE, 0x2944A7A2,
-    0x7919F9EB, 0x29743945,
-    0x7909A92C, 0x29A3C484,
-    0x78F945C3, 0x29D34958,
-    0x78E8CFB1, 0x2A02C7B8,
-    0x78D846FB, 0x2A323F9D,
-    0x78C7ABA1, 0x2A61B101,
-    0x78B6FDA8, 0x2A911BDB,
-    0x78A63D10, 0x2AC08025,
-    0x789569DE, 0x2AEFDDD8,
-    0x78848413, 0x2B1F34EB,
-    0x78738BB3, 0x2B4E8558,
-    0x786280BF, 0x2B7DCF17,
-    0x7851633B, 0x2BAD1221,
-    0x78403328, 0x2BDC4E6F,
-    0x782EF08B, 0x2C0B83F9,
-    0x781D9B64, 0x2C3AB2B9,
-    0x780C33B8, 0x2C69DAA6,
-    0x77FAB988, 0x2C98FBBA,
-    0x77E92CD8, 0x2CC815ED,
-    0x77D78DAA, 0x2CF72939,
-    0x77C5DC01, 0x2D263595,
-    0x77B417DF, 0x2D553AFB,
-    0x77A24148, 0x2D843963,
-    0x7790583D, 0x2DB330C7,
-    0x777E5CC3, 0x2DE2211E,
-    0x776C4EDB, 0x2E110A62,
-    0x775A2E88, 0x2E3FEC8B,
-    0x7747FBCE, 0x2E6EC792,
-    0x7735B6AE, 0x2E9D9B70,
-    0x77235F2D, 0x2ECC681E,
-    0x7710F54B, 0x2EFB2D94,
-    0x76FE790E, 0x2F29EBCC,
-    0x76EBEA77, 0x2F58A2BD,
-    0x76D94988, 0x2F875262,
-    0x76C69646, 0x2FB5FAB2,
-    0x76B3D0B3, 0x2FE49BA6,
-    0x76A0F8D2, 0x30133538,
-    0x768E0EA5, 0x3041C760,
-    0x767B1230, 0x30705217,
-    0x76680376, 0x309ED555,
-    0x7654E279, 0x30CD5114,
-    0x7641AF3C, 0x30FBC54D,
-    0x762E69C3, 0x312A31F8,
-    0x761B1211, 0x3158970D,
-    0x7607A827, 0x3186F487,
-    0x75F42C0A, 0x31B54A5D,
-    0x75E09DBD, 0x31E39889,
-    0x75CCFD42, 0x3211DF03,
-    0x75B94A9C, 0x32401DC5,
-    0x75A585CF, 0x326E54C7,
-    0x7591AEDD, 0x329C8402,
-    0x757DC5CA, 0x32CAAB6F,
-    0x7569CA98, 0x32F8CB07,
-    0x7555BD4B, 0x3326E2C2,
-    0x75419DE6, 0x3354F29A,
-    0x752D6C6C, 0x3382FA88,
-    0x751928E0, 0x33B0FA84,
-    0x7504D345, 0x33DEF287,
-    0x74F06B9E, 0x340CE28A,
-    0x74DBF1EF, 0x343ACA87,
-    0x74C7663A, 0x3468AA76,
-    0x74B2C883, 0x3496824F,
-    0x749E18CD, 0x34C4520D,
-    0x7489571B, 0x34F219A7,
-    0x74748371, 0x351FD917,
-    0x745F9DD1, 0x354D9056,
-    0x744AA63E, 0x357B3F5D,
-    0x74359CBD, 0x35A8E624,
-    0x74208150, 0x35D684A5,
-    0x740B53FA, 0x36041AD9,
-    0x73F614C0, 0x3631A8B7,
-    0x73E0C3A3, 0x365F2E3B,
-    0x73CB60A7, 0x368CAB5C,
-    0x73B5EBD0, 0x36BA2013,
-    0x73A06522, 0x36E78C5A,
-    0x738ACC9E, 0x3714F02A,
-    0x73752249, 0x37424B7A,
-    0x735F6626, 0x376F9E46,
-    0x73499838, 0x379CE884,
-    0x7333B883, 0x37CA2A30,
-    0x731DC709, 0x37F76340,
-    0x7307C3D0, 0x382493B0,
-    0x72F1AED8, 0x3851BB76,
-    0x72DB8828, 0x387EDA8E,
-    0x72C54FC0, 0x38ABF0EF,
-    0x72AF05A6, 0x38D8FE93,
-    0x7298A9DC, 0x39060372,
-    0x72823C66, 0x3932FF87,
-    0x726BBD48, 0x395FF2C9,
-    0x72552C84, 0x398CDD32,
-    0x723E8A1F, 0x39B9BEBB,
-    0x7227D61C, 0x39E6975D,
-    0x7211107D, 0x3A136712,
-    0x71FA3948, 0x3A402DD1,
-    0x71E3507F, 0x3A6CEB95,
-    0x71CC5626, 0x3A99A057,
-    0x71B54A40, 0x3AC64C0F,
-    0x719E2CD2, 0x3AF2EEB7,
-    0x7186FDDE, 0x3B1F8847,
-    0x716FBD68, 0x3B4C18BA,
-    0x71586B73, 0x3B78A007,
-    0x71410804, 0x3BA51E29,
-    0x7129931E, 0x3BD19317,
-    0x71120CC5, 0x3BFDFECD,
-    0x70FA74FB, 0x3C2A6142,
-    0x70E2CBC6, 0x3C56BA70,
-    0x70CB1127, 0x3C830A4F,
-    0x70B34524, 0x3CAF50DA,
-    0x709B67C0, 0x3CDB8E09,
-    0x708378FE, 0x3D07C1D5,
-    0x706B78E3, 0x3D33EC39,
-    0x70536771, 0x3D600D2B,
-    0x703B44AC, 0x3D8C24A7,
-    0x70231099, 0x3DB832A5,
-    0x700ACB3B, 0x3DE4371F,
-    0x6FF27496, 0x3E10320D,
-    0x6FDA0CAD, 0x3E3C2369,
-    0x6FC19385, 0x3E680B2C,
-    0x6FA90920, 0x3E93E94F,
-    0x6F906D84, 0x3EBFBDCC,
-    0x6F77C0B3, 0x3EEB889C,
-    0x6F5F02B1, 0x3F1749B7,
-    0x6F463383, 0x3F430118,
-    0x6F2D532C, 0x3F6EAEB8,
-    0x6F1461AF, 0x3F9A528F,
-    0x6EFB5F12, 0x3FC5EC97,
-    0x6EE24B57, 0x3FF17CCA,
-    0x6EC92682, 0x401D0320,
-    0x6EAFF098, 0x40487F93,
-    0x6E96A99C, 0x4073F21D,
-    0x6E7D5193, 0x409F5AB6,
-    0x6E63E87F, 0x40CAB957,
-    0x6E4A6E65, 0x40F60DFB,
-    0x6E30E349, 0x4121589A,
-    0x6E17472F, 0x414C992E,
-    0x6DFD9A1B, 0x4177CFB0,
-    0x6DE3DC11, 0x41A2FC1A,
-    0x6DCA0D14, 0x41CE1E64,
-    0x6DB02D29, 0x41F93688,
-    0x6D963C54, 0x42244480,
-    0x6D7C3A98, 0x424F4845,
-    0x6D6227FA, 0x427A41D0,
-    0x6D48047E, 0x42A5311A,
-    0x6D2DD027, 0x42D0161E,
-    0x6D138AFA, 0x42FAF0D4,
-    0x6CF934FB, 0x4325C135,
-    0x6CDECE2E, 0x4350873C,
-    0x6CC45697, 0x437B42E1,
-    0x6CA9CE3A, 0x43A5F41E,
-    0x6C8F351C, 0x43D09AEC,
-    0x6C748B3F, 0x43FB3745,
-    0x6C59D0A9, 0x4425C923,
-    0x6C3F055D, 0x4450507E,
-    0x6C242960, 0x447ACD50,
-    0x6C093CB6, 0x44A53F93,
-    0x6BEE3F62, 0x44CFA73F,
-    0x6BD3316A, 0x44FA044F,
-    0x6BB812D0, 0x452456BC,
-    0x6B9CE39B, 0x454E9E80,
-    0x6B81A3CD, 0x4578DB93,
-    0x6B66536A, 0x45A30DF0,
-    0x6B4AF278, 0x45CD358F,
-    0x6B2F80FA, 0x45F7526B,
-    0x6B13FEF5, 0x4621647C,
-    0x6AF86C6C, 0x464B6BBD,
-    0x6ADCC964, 0x46756827,
-    0x6AC115E1, 0x469F59B4,
-    0x6AA551E8, 0x46C9405C,
-    0x6A897D7D, 0x46F31C1A,
-    0x6A6D98A4, 0x471CECE6,
-    0x6A51A361, 0x4746B2BC,
-    0x6A359DB9, 0x47706D93,
-    0x6A1987B0, 0x479A1D66,
-    0x69FD614A, 0x47C3C22E,
-    0x69E12A8C, 0x47ED5BE6,
-    0x69C4E37A, 0x4816EA85,
-    0x69A88C18, 0x48406E07,
-    0x698C246C, 0x4869E664,
-    0x696FAC78, 0x48935397,
-    0x69532442, 0x48BCB598,
-    0x69368BCE, 0x48E60C62,
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-    0x29D34958, 0x78F945C3,
-    0x29A3C484, 0x7909A92C,
-    0x29743945, 0x7919F9EB,
-    0x2944A7A2, 0x792A37FE,
-    0x29150FA1, 0x793A6360,
-    0x28E5714A, 0x794A7C11,
-    0x28B5CCA5, 0x795A820E,
-    0x288621B9, 0x796A7554,
-    0x2856708C, 0x797A55E0,
-    0x2826B928, 0x798A23B1,
-    0x27F6FB92, 0x7999DEC3,
-    0x27C737D2, 0x79A98715,
-    0x27976DF1, 0x79B91CA4,
-    0x27679DF4, 0x79C89F6D,
-    0x2737C7E3, 0x79D80F6F,
-    0x2707EBC6, 0x79E76CA6,
-    0x26D809A5, 0x79F6B711,
-    0x26A82185, 0x7A05EEAD,
-    0x26783370, 0x7A151377,
-    0x26483F6C, 0x7A24256E,
-    0x26184581, 0x7A33248F,
-    0x25E845B5, 0x7A4210D8,
-    0x25B84012, 0x7A50EA46,
-    0x2588349D, 0x7A5FB0D8,
-    0x2558235E, 0x7A6E648A,
-    0x25280C5D, 0x7A7D055B,
-    0x24F7EFA1, 0x7A8B9348,
-    0x24C7CD32, 0x7A9A0E4F,
-    0x2497A517, 0x7AA8766E,
-    0x24677757, 0x7AB6CBA3,
-    0x243743FA, 0x7AC50DEB,
-    0x24070B07, 0x7AD33D45,
-    0x23D6CC86, 0x7AE159AE,
-    0x23A6887E, 0x7AEF6323,
-    0x23763EF7, 0x7AFD59A3,
-    0x2345EFF7, 0x7B0B3D2C,
-    0x23159B87, 0x7B190DBB,
-    0x22E541AE, 0x7B26CB4F,
-    0x22B4E274, 0x7B3475E4,
-    0x22847DDF, 0x7B420D7A,
-    0x225413F8, 0x7B4F920E,
-    0x2223A4C5, 0x7B5D039D,
-    0x21F3304E, 0x7B6A6227,
-    0x21C2B69C, 0x7B77ADA8,
-    0x219237B4, 0x7B84E61E,
-    0x2161B39F, 0x7B920B89,
-    0x21312A65, 0x7B9F1DE5,
-    0x21009C0B, 0x7BAC1D31,
-    0x20D0089B, 0x7BB9096A,
-    0x209F701C, 0x7BC5E28F,
-    0x206ED295, 0x7BD2A89E,
-    0x203E300D, 0x7BDF5B94,
-    0x200D888C, 0x7BEBFB70,
-    0x1FDCDC1A, 0x7BF88830,
-    0x1FAC2ABF, 0x7C0501D1,
-    0x1F7B7480, 0x7C116853,
-    0x1F4AB967, 0x7C1DBBB2,
-    0x1F19F97B, 0x7C29FBEE,
-    0x1EE934C2, 0x7C362904,
-    0x1EB86B46, 0x7C4242F2,
-    0x1E879D0C, 0x7C4E49B6,
-    0x1E56CA1E, 0x7C5A3D4F,
-    0x1E25F281, 0x7C661DBB,
-    0x1DF5163F, 0x7C71EAF8,
-    0x1DC4355D, 0x7C7DA504,
-    0x1D934FE5, 0x7C894BDD,
-    0x1D6265DD, 0x7C94DF82,
-    0x1D31774D, 0x7CA05FF1,
-    0x1D00843C, 0x7CABCD27,
-    0x1CCF8CB3, 0x7CB72724,
-    0x1C9E90B8, 0x7CC26DE5,
-    0x1C6D9053, 0x7CCDA168,
-    0x1C3C8B8C, 0x7CD8C1AD,
-    0x1C0B826A, 0x7CE3CEB1,
-    0x1BDA74F5, 0x7CEEC873,
-    0x1BA96334, 0x7CF9AEF0,
-    0x1B784D30, 0x7D048228,
-    0x1B4732EF, 0x7D0F4218,
-    0x1B161479, 0x7D19EEBE,
-    0x1AE4F1D6, 0x7D24881A,
-    0x1AB3CB0C, 0x7D2F0E2A,
-    0x1A82A025, 0x7D3980EC,
-    0x1A517127, 0x7D43E05E,
-    0x1A203E1B, 0x7D4E2C7E,
-    0x19EF0706, 0x7D58654C,
-    0x19BDCBF2, 0x7D628AC5,
-    0x198C8CE6, 0x7D6C9CE9,
-    0x195B49E9, 0x7D769BB5,
-    0x192A0303, 0x7D808727,
-    0x18F8B83C, 0x7D8A5F3F,
-    0x18C7699B, 0x7D9423FB,
-    0x18961727, 0x7D9DD55A,
-    0x1864C0E9, 0x7DA77359,
-    0x183366E8, 0x7DB0FDF7,
-    0x1802092C, 0x7DBA7534,
-    0x17D0A7BB, 0x7DC3D90D,
-    0x179F429F, 0x7DCD2981,
-    0x176DD9DE, 0x7DD6668E,
-    0x173C6D80, 0x7DDF9034,
-    0x170AFD8D, 0x7DE8A670,
-    0x16D98A0C, 0x7DF1A942,
-    0x16A81305, 0x7DFA98A7,
-    0x1676987F, 0x7E03749F,
-    0x16451A83, 0x7E0C3D29,
-    0x16139917, 0x7E14F242,
-    0x15E21444, 0x7E1D93E9,
-    0x15B08C11, 0x7E26221E,
-    0x157F0086, 0x7E2E9CDF,
-    0x154D71AA, 0x7E37042A,
-    0x151BDF85, 0x7E3F57FE,
-    0x14EA4A1F, 0x7E47985B,
-    0x14B8B17F, 0x7E4FC53E,
-    0x148715AD, 0x7E57DEA6,
-    0x145576B1, 0x7E5FE493,
-    0x1423D492, 0x7E67D702,
-    0x13F22F57, 0x7E6FB5F3,
-    0x13C0870A, 0x7E778165,
-    0x138EDBB0, 0x7E7F3956,
-    0x135D2D53, 0x7E86DDC5,
-    0x132B7BF9, 0x7E8E6EB1,
-    0x12F9C7AA, 0x7E95EC19,
-    0x12C8106E, 0x7E9D55FC,
-    0x1296564D, 0x7EA4AC58,
-    0x1264994E, 0x7EABEF2C,
-    0x1232D978, 0x7EB31E77,
-    0x120116D4, 0x7EBA3A39,
-    0x11CF516A, 0x7EC1426F,
-    0x119D8940, 0x7EC8371A,
-    0x116BBE5F, 0x7ECF1837,
-    0x1139F0CE, 0x7ED5E5C6,
-    0x11082096, 0x7EDC9FC6,
-    0x10D64DBC, 0x7EE34635,
-    0x10A4784A, 0x7EE9D913,
-    0x1072A047, 0x7EF0585F,
-    0x1040C5BB, 0x7EF6C418,
-    0x100EE8AD, 0x7EFD1C3C,
-    0x0FDD0925, 0x7F0360CB,
-    0x0FAB272B, 0x7F0991C3,
-    0x0F7942C6, 0x7F0FAF24,
-    0x0F475BFE, 0x7F15B8EE,
-    0x0F1572DC, 0x7F1BAF1E,
-    0x0EE38765, 0x7F2191B4,
-    0x0EB199A3, 0x7F2760AF,
-    0x0E7FA99D, 0x7F2D1C0E,
-    0x0E4DB75B, 0x7F32C3D0,
-    0x0E1BC2E3, 0x7F3857F5,
-    0x0DE9CC3F, 0x7F3DD87C,
-    0x0DB7D376, 0x7F434563,
-    0x0D85D88F, 0x7F489EAA,
-    0x0D53DB92, 0x7F4DE450,
-    0x0D21DC87, 0x7F531654,
-    0x0CEFDB75, 0x7F5834B6,
-    0x0CBDD865, 0x7F5D3F75,
-    0x0C8BD35E, 0x7F62368F,
-    0x0C59CC67, 0x7F671A04,
-    0x0C27C389, 0x7F6BE9D4,
-    0x0BF5B8CB, 0x7F70A5FD,
-    0x0BC3AC35, 0x7F754E7F,
-    0x0B919DCE, 0x7F79E35A,
-    0x0B5F8D9F, 0x7F7E648B,
-    0x0B2D7BAE, 0x7F82D214,
-    0x0AFB6805, 0x7F872BF3,
-    0x0AC952AA, 0x7F8B7226,
-    0x0A973BA5, 0x7F8FA4AF,
-    0x0A6522FE, 0x7F93C38C,
-    0x0A3308BC, 0x7F97CEBC,
-    0x0A00ECE8, 0x7F9BC63F,
-    0x09CECF89, 0x7F9FAA15,
-    0x099CB0A7, 0x7FA37A3C,
-    0x096A9049, 0x7FA736B4,
-    0x09386E77, 0x7FAADF7C,
-    0x09064B3A, 0x7FAE7494,
-    0x08D42698, 0x7FB1F5FC,
-    0x08A2009A, 0x7FB563B2,
-    0x086FD947, 0x7FB8BDB7,
-    0x083DB0A7, 0x7FBC040A,
-    0x080B86C1, 0x7FBF36A9,
-    0x07D95B9E, 0x7FC25596,
-    0x07A72F45, 0x7FC560CF,
-    0x077501BE, 0x7FC85853,
-    0x0742D310, 0x7FCB3C23,
-    0x0710A344, 0x7FCE0C3E,
-    0x06DE7261, 0x7FD0C8A3,
-    0x06AC406F, 0x7FD37152,
-    0x067A0D75, 0x7FD6064B,
-    0x0647D97C, 0x7FD8878D,
-    0x0615A48A, 0x7FDAF518,
-    0x05E36EA9, 0x7FDD4EEC,
-    0x05B137DF, 0x7FDF9508,
-    0x057F0034, 0x7FE1C76B,
-    0x054CC7B0, 0x7FE3E616,
-    0x051A8E5C, 0x7FE5F108,
-    0x04E8543D, 0x7FE7E840,
-    0x04B6195D, 0x7FE9CBC0,
-    0x0483DDC3, 0x7FEB9B85,
-    0x0451A176, 0x7FED5790,
-    0x041F647F, 0x7FEEFFE1,
-    0x03ED26E6, 0x7FF09477,
-    0x03BAE8B1, 0x7FF21553,
-    0x0388A9E9, 0x7FF38273,
-    0x03566A96, 0x7FF4DBD8,
-    0x03242ABF, 0x7FF62182,
-    0x02F1EA6B, 0x7FF7536F,
-    0x02BFA9A4, 0x7FF871A1,
-    0x028D6870, 0x7FF97C17,
-    0x025B26D7, 0x7FFA72D1,
-    0x0228E4E1, 0x7FFB55CE,
-    0x01F6A296, 0x7FFC250F,
-    0x01C45FFE, 0x7FFCE093,
-    0x01921D1F, 0x7FFD885A,
-    0x015FDA03, 0x7FFE1C64,
-    0x012D96B0, 0x7FFE9CB2,
-    0x00FB532F, 0x7FFF0942,
-    0x00C90F88, 0x7FFF6216,
-    0x0096CBC1, 0x7FFFA72C,
-    0x006487E3, 0x7FFFD885,
-    0x003243F5, 0x7FFFF621,
-    0x00000000, 0x7FFFFFFF,
-    0xFFCDBC0A, 0x7FFFF621,
-    0xFF9B781D, 0x7FFFD885,
-    0xFF69343E, 0x7FFFA72C,
-    0xFF36F078, 0x7FFF6216,
-    0xFF04ACD0, 0x7FFF0942,
-    0xFED2694F, 0x7FFE9CB2,
-    0xFEA025FC, 0x7FFE1C64,
-    0xFE6DE2E0, 0x7FFD885A,
-    0xFE3BA001, 0x7FFCE093,
-    0xFE095D69, 0x7FFC250F,
-    0xFDD71B1E, 0x7FFB55CE,
-    0xFDA4D928, 0x7FFA72D1,
-    0xFD72978F, 0x7FF97C17,
-    0xFD40565B, 0x7FF871A1,
-    0xFD0E1594, 0x7FF7536F,
-    0xFCDBD541, 0x7FF62182,
-    0xFCA99569, 0x7FF4DBD8,
-    0xFC775616, 0x7FF38273,
-    0xFC45174E, 0x7FF21553,
-    0xFC12D919, 0x7FF09477,
-    0xFBE09B80, 0x7FEEFFE1,
-    0xFBAE5E89, 0x7FED5790,
-    0xFB7C223C, 0x7FEB9B85,
-    0xFB49E6A2, 0x7FE9CBC0,
-    0xFB17ABC2, 0x7FE7E840,
-    0xFAE571A4, 0x7FE5F108,
-    0xFAB3384F, 0x7FE3E616,
-    0xFA80FFCB, 0x7FE1C76B,
-    0xFA4EC820, 0x7FDF9508,
-    0xFA1C9156, 0x7FDD4EEC,
-    0xF9EA5B75, 0x7FDAF518,
-    0xF9B82683, 0x7FD8878D,
-    0xF985F28A, 0x7FD6064B,
-    0xF953BF90, 0x7FD37152,
-    0xF9218D9E, 0x7FD0C8A3,
-    0xF8EF5CBB, 0x7FCE0C3E,
-    0xF8BD2CEF, 0x7FCB3C23,
-    0xF88AFE41, 0x7FC85853,
-    0xF858D0BA, 0x7FC560CF,
-    0xF826A461, 0x7FC25596,
-    0xF7F4793E, 0x7FBF36A9,
-    0xF7C24F58, 0x7FBC040A,
-    0xF79026B8, 0x7FB8BDB7,
-    0xF75DFF65, 0x7FB563B2,
-    0xF72BD967, 0x7FB1F5FC,
-    0xF6F9B4C5, 0x7FAE7494,
-    0xF6C79188, 0x7FAADF7C,
-    0xF6956FB6, 0x7FA736B4,
-    0xF6634F58, 0x7FA37A3C,
-    0xF6313076, 0x7F9FAA15,
-    0xF5FF1317, 0x7F9BC63F,
-    0xF5CCF743, 0x7F97CEBC,
-    0xF59ADD01, 0x7F93C38C,
-    0xF568C45A, 0x7F8FA4AF,
-    0xF536AD55, 0x7F8B7226,
-    0xF50497FA, 0x7F872BF3,
-    0xF4D28451, 0x7F82D214,
-    0xF4A07260, 0x7F7E648B,
-    0xF46E6231, 0x7F79E35A,
-    0xF43C53CA, 0x7F754E7F,
-    0xF40A4734, 0x7F70A5FD,
-    0xF3D83C76, 0x7F6BE9D4,
-    0xF3A63398, 0x7F671A04,
-    0xF3742CA1, 0x7F62368F,
-    0xF342279A, 0x7F5D3F75,
-    0xF310248A, 0x7F5834B6,
-    0xF2DE2378, 0x7F531654,
-    0xF2AC246D, 0x7F4DE450,
-    0xF27A2770, 0x7F489EAA,
-    0xF2482C89, 0x7F434563,
-    0xF21633C0, 0x7F3DD87C,
-    0xF1E43D1C, 0x7F3857F5,
-    0xF1B248A5, 0x7F32C3D0,
-    0xF1805662, 0x7F2D1C0E,
-    0xF14E665C, 0x7F2760AF,
-    0xF11C789A, 0x7F2191B4,
-    0xF0EA8D23, 0x7F1BAF1E,
-    0xF0B8A401, 0x7F15B8EE,
-    0xF086BD39, 0x7F0FAF24,
-    0xF054D8D4, 0x7F0991C3,
-    0xF022F6DA, 0x7F0360CB,
-    0xEFF11752, 0x7EFD1C3C,
-    0xEFBF3A44, 0x7EF6C418,
-    0xEF8D5FB8, 0x7EF0585F,
-    0xEF5B87B5, 0x7EE9D913,
-    0xEF29B243, 0x7EE34635,
-    0xEEF7DF6A, 0x7EDC9FC6,
-    0xEEC60F31, 0x7ED5E5C6,
-    0xEE9441A0, 0x7ECF1837,
-    0xEE6276BF, 0x7EC8371A,
-    0xEE30AE95, 0x7EC1426F,
-    0xEDFEE92B, 0x7EBA3A39,
-    0xEDCD2687, 0x7EB31E77,
-    0xED9B66B2, 0x7EABEF2C,
-    0xED69A9B2, 0x7EA4AC58,
-    0xED37EF91, 0x7E9D55FC,
-    0xED063855, 0x7E95EC19,
-    0xECD48406, 0x7E8E6EB1,
-    0xECA2D2AC, 0x7E86DDC5,
-    0xEC71244F, 0x7E7F3956,
-    0xEC3F78F5, 0x7E778165,
-    0xEC0DD0A8, 0x7E6FB5F3,
-    0xEBDC2B6D, 0x7E67D702,
-    0xEBAA894E, 0x7E5FE493,
-    0xEB78EA52, 0x7E57DEA6,
-    0xEB474E80, 0x7E4FC53E,
-    0xEB15B5E0, 0x7E47985B,
-    0xEAE4207A, 0x7E3F57FE,
-    0xEAB28E55, 0x7E37042A,
-    0xEA80FF79, 0x7E2E9CDF,
-    0xEA4F73EE, 0x7E26221E,
-    0xEA1DEBBB, 0x7E1D93E9,
-    0xE9EC66E8, 0x7E14F242,
-    0xE9BAE57C, 0x7E0C3D29,
-    0xE9896780, 0x7E03749F,
-    0xE957ECFB, 0x7DFA98A7,
-    0xE92675F4, 0x7DF1A942,
-    0xE8F50273, 0x7DE8A670,
-    0xE8C3927F, 0x7DDF9034,
-    0xE8922621, 0x7DD6668E,
-    0xE860BD60, 0x7DCD2981,
-    0xE82F5844, 0x7DC3D90D,
-    0xE7FDF6D3, 0x7DBA7534,
-    0xE7CC9917, 0x7DB0FDF7,
-    0xE79B3F16, 0x7DA77359,
-    0xE769E8D8, 0x7D9DD55A,
-    0xE7389664, 0x7D9423FB,
-    0xE70747C3, 0x7D8A5F3F,
-    0xE6D5FCFC, 0x7D808727,
-    0xE6A4B616, 0x7D769BB5,
-    0xE6737319, 0x7D6C9CE9,
-    0xE642340D, 0x7D628AC5,
-    0xE610F8F9, 0x7D58654C,
-    0xE5DFC1E4, 0x7D4E2C7E,
-    0xE5AE8ED8, 0x7D43E05E,
-    0xE57D5FDA, 0x7D3980EC,
-    0xE54C34F3, 0x7D2F0E2A,
-    0xE51B0E2A, 0x7D24881A,
-    0xE4E9EB86, 0x7D19EEBE,
-    0xE4B8CD10, 0x7D0F4218,
-    0xE487B2CF, 0x7D048228,
-    0xE4569CCB, 0x7CF9AEF0,
-    0xE4258B0A, 0x7CEEC873,
-    0xE3F47D95, 0x7CE3CEB1,
-    0xE3C37473, 0x7CD8C1AD,
-    0xE3926FAC, 0x7CCDA168,
-    0xE3616F47, 0x7CC26DE5,
-    0xE330734C, 0x7CB72724,
-    0xE2FF7BC3, 0x7CABCD27,
-    0xE2CE88B2, 0x7CA05FF1,
-    0xE29D9A22, 0x7C94DF82,
-    0xE26CB01A, 0x7C894BDD,
-    0xE23BCAA2, 0x7C7DA504,
-    0xE20AE9C1, 0x7C71EAF8,
-    0xE1DA0D7E, 0x7C661DBB,
-    0xE1A935E1, 0x7C5A3D4F,
-    0xE17862F3, 0x7C4E49B6,
-    0xE14794B9, 0x7C4242F2,
-    0xE116CB3D, 0x7C362904,
-    0xE0E60684, 0x7C29FBEE,
-    0xE0B54698, 0x7C1DBBB2,
-    0xE0848B7F, 0x7C116853,
-    0xE053D541, 0x7C0501D1,
-    0xE02323E5, 0x7BF88830,
-    0xDFF27773, 0x7BEBFB70,
-    0xDFC1CFF2, 0x7BDF5B94,
-    0xDF912D6A, 0x7BD2A89E,
-    0xDF608FE3, 0x7BC5E28F,
-    0xDF2FF764, 0x7BB9096A,
-    0xDEFF63F4, 0x7BAC1D31,
-    0xDECED59B, 0x7B9F1DE5,
-    0xDE9E4C60, 0x7B920B89,
-    0xDE6DC84B, 0x7B84E61E,
-    0xDE3D4963, 0x7B77ADA8,
-    0xDE0CCFB1, 0x7B6A6227,
-    0xDDDC5B3A, 0x7B5D039D,
-    0xDDABEC07, 0x7B4F920E,
-    0xDD7B8220, 0x7B420D7A,
-    0xDD4B1D8B, 0x7B3475E4,
-    0xDD1ABE51, 0x7B26CB4F,
-    0xDCEA6478, 0x7B190DBB,
-    0xDCBA1008, 0x7B0B3D2C,
-    0xDC89C108, 0x7AFD59A3,
-    0xDC597781, 0x7AEF6323,
-    0xDC293379, 0x7AE159AE,
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-    0xDBC8BC05, 0x7AC50DEB,
-    0xDB9888A8, 0x7AB6CBA3,
-    0xDB685AE8, 0x7AA8766E,
-    0xDB3832CD, 0x7A9A0E4F,
-    0xDB08105E, 0x7A8B9348,
-    0xDAD7F3A2, 0x7A7D055B,
-    0xDAA7DCA1, 0x7A6E648A,
-    0xDA77CB62, 0x7A5FB0D8,
-    0xDA47BFED, 0x7A50EA46,
-    0xDA17BA4A, 0x7A4210D8,
-    0xD9E7BA7E, 0x7A33248F,
-    0xD9B7C093, 0x7A24256E,
-    0xD987CC8F, 0x7A151377,
-    0xD957DE7A, 0x7A05EEAD,
-    0xD927F65B, 0x79F6B711,
-    0xD8F81439, 0x79E76CA6,
-    0xD8C8381C, 0x79D80F6F,
-    0xD898620C, 0x79C89F6D,
-    0xD868920F, 0x79B91CA4,
-    0xD838C82D, 0x79A98715,
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-    0xD7D946D7, 0x798A23B1,
-    0xD7A98F73, 0x797A55E0,
-    0xD779DE46, 0x796A7554,
-    0xD74A335A, 0x795A820E,
-    0xD71A8EB5, 0x794A7C11,
-    0xD6EAF05E, 0x793A6360,
-    0xD6BB585D, 0x792A37FE,
-    0xD68BC6BA, 0x7919F9EB,
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-    0xD62CB6A7, 0x78F945C3,
-    0xD5FD3847, 0x78E8CFB1,
-    0xD5CDC062, 0x78D846FB,
-    0xD59E4EFE, 0x78C7ABA1,
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-    0xD4B17AA7, 0x78738BB3,
-    0xD48230E8, 0x786280BF,
-    0xD452EDDE, 0x7851633B,
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-    0xD3F47C06, 0x782EF08B,
-    0xD3C54D46, 0x781D9B64,
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-    0xD2AAC504, 0x77B417DF,
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-    0xCBC53578, 0x74DBF1EF,
-    0xCB975589, 0x74C7663A,
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-    0xCB0DE658, 0x7489571B,
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-    0xCA5719DB, 0x74359CBD,
-    0xCA297B5A, 0x74208150,
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-    0x8004AA31, 0x0228E4E1,
-    0x8003DAF0, 0x01F6A296,
-    0x80031F6C, 0x01C45FFE,
-    0x800277A5, 0x01921D1F,
-    0x8001E39B, 0x015FDA03,
-    0x8001634D, 0x012D96B0,
-    0x8000F6BD, 0x00FB532F,
-    0x80009DE9, 0x00C90F88,
-    0x800058D3, 0x0096CBC1,
-    0x8000277A, 0x006487E3,
-    0x800009DE, 0x003243F5,
-    0x80000000, 0x00000000,
-    0x800009DE, 0xFFCDBC0A,
-    0x8000277A, 0xFF9B781D,
-    0x800058D3, 0xFF69343E,
-    0x80009DE9, 0xFF36F078,
-    0x8000F6BD, 0xFF04ACD0,
-    0x8001634D, 0xFED2694F,
-    0x8001E39B, 0xFEA025FC,
-    0x800277A5, 0xFE6DE2E0,
-    0x80031F6C, 0xFE3BA001,
-    0x8003DAF0, 0xFE095D69,
-    0x8004AA31, 0xFDD71B1E,
-    0x80058D2E, 0xFDA4D928,
-    0x800683E8, 0xFD72978F,
-    0x80078E5E, 0xFD40565B,
-    0x8008AC90, 0xFD0E1594,
-    0x8009DE7D, 0xFCDBD541,
-    0x800B2427, 0xFCA99569,
-    0x800C7D8C, 0xFC775616,
-    0x800DEAAC, 0xFC45174E,
-    0x800F6B88, 0xFC12D919,
-    0x8011001E, 0xFBE09B80,
-    0x8012A86F, 0xFBAE5E89,
-    0x8014647A, 0xFB7C223C,
-    0x80163440, 0xFB49E6A2,
-    0x801817BF, 0xFB17ABC2,
-    0x801A0EF7, 0xFAE571A4,
-    0x801C19E9, 0xFAB3384F,
-    0x801E3894, 0xFA80FFCB,
-    0x80206AF8, 0xFA4EC820,
-    0x8022B113, 0xFA1C9156,
-    0x80250AE7, 0xF9EA5B75,
-    0x80277872, 0xF9B82683,
-    0x8029F9B4, 0xF985F28A,
-    0x802C8EAD, 0xF953BF90,
-    0x802F375C, 0xF9218D9E,
-    0x8031F3C1, 0xF8EF5CBB,
-    0x8034C3DC, 0xF8BD2CEF,
-    0x8037A7AC, 0xF88AFE41,
-    0x803A9F31, 0xF858D0BA,
-    0x803DAA69, 0xF826A461,
-    0x8040C956, 0xF7F4793E,
-    0x8043FBF6, 0xF7C24F58,
-    0x80474248, 0xF79026B8,
-    0x804A9C4D, 0xF75DFF65,
-    0x804E0A03, 0xF72BD967,
-    0x80518B6B, 0xF6F9B4C5,
-    0x80552083, 0xF6C79188,
-    0x8058C94C, 0xF6956FB6,
-    0x805C85C3, 0xF6634F58,
-    0x806055EA, 0xF6313076,
-    0x806439C0, 0xF5FF1317,
-    0x80683143, 0xF5CCF743,
-    0x806C3C73, 0xF59ADD01,
-    0x80705B50, 0xF568C45A,
-    0x80748DD9, 0xF536AD55,
-    0x8078D40D, 0xF50497FA,
-    0x807D2DEB, 0xF4D28451,
-    0x80819B74, 0xF4A07260,
-    0x80861CA5, 0xF46E6231,
-    0x808AB180, 0xF43C53CA,
-    0x808F5A02, 0xF40A4734,
-    0x8094162B, 0xF3D83C76,
-    0x8098E5FB, 0xF3A63398,
-    0x809DC970, 0xF3742CA1,
-    0x80A2C08B, 0xF342279A,
-    0x80A7CB49, 0xF310248A,
-    0x80ACE9AB, 0xF2DE2378,
-    0x80B21BAF, 0xF2AC246D,
-    0x80B76155, 0xF27A2770,
-    0x80BCBA9C, 0xF2482C89,
-    0x80C22783, 0xF21633C0,
-    0x80C7A80A, 0xF1E43D1C,
-    0x80CD3C2F, 0xF1B248A5,
-    0x80D2E3F1, 0xF1805662,
-    0x80D89F51, 0xF14E665C,
-    0x80DE6E4C, 0xF11C789A,
-    0x80E450E2, 0xF0EA8D23,
-    0x80EA4712, 0xF0B8A401,
-    0x80F050DB, 0xF086BD39,
-    0x80F66E3C, 0xF054D8D4,
-    0x80FC9F35, 0xF022F6DA,
-    0x8102E3C3, 0xEFF11752,
-    0x81093BE8, 0xEFBF3A44,
-    0x810FA7A0, 0xEF8D5FB8,
-    0x811626EC, 0xEF5B87B5,
-    0x811CB9CA, 0xEF29B243,
-    0x81236039, 0xEEF7DF6A,
-    0x812A1A39, 0xEEC60F31,
-    0x8130E7C8, 0xEE9441A0,
-    0x8137C8E6, 0xEE6276BF,
-    0x813EBD90, 0xEE30AE95,
-    0x8145C5C6, 0xEDFEE92B,
-    0x814CE188, 0xEDCD2687,
-    0x815410D3, 0xED9B66B2,
-    0x815B53A8, 0xED69A9B2,
-    0x8162AA03, 0xED37EF91,
-    0x816A13E6, 0xED063855,
-    0x8171914E, 0xECD48406,
-    0x8179223A, 0xECA2D2AC,
-    0x8180C6A9, 0xEC71244F,
-    0x81887E9A, 0xEC3F78F5,
-    0x81904A0C, 0xEC0DD0A8,
-    0x819828FD, 0xEBDC2B6D,
-    0x81A01B6C, 0xEBAA894E,
-    0x81A82159, 0xEB78EA52,
-    0x81B03AC1, 0xEB474E80,
-    0x81B867A4, 0xEB15B5E0,
-    0x81C0A801, 0xEAE4207A,
-    0x81C8FBD5, 0xEAB28E55,
-    0x81D16320, 0xEA80FF79,
-    0x81D9DDE1, 0xEA4F73EE,
-    0x81E26C16, 0xEA1DEBBB,
-    0x81EB0DBD, 0xE9EC66E8,
-    0x81F3C2D7, 0xE9BAE57C,
-    0x81FC8B60, 0xE9896780,
-    0x82056758, 0xE957ECFB,
-    0x820E56BE, 0xE92675F4,
-    0x8217598F, 0xE8F50273,
-    0x82206FCB, 0xE8C3927F,
-    0x82299971, 0xE8922621,
-    0x8232D67E, 0xE860BD60,
-    0x823C26F2, 0xE82F5844,
-    0x82458ACB, 0xE7FDF6D3,
-    0x824F0208, 0xE7CC9917,
-    0x82588CA6, 0xE79B3F16,
-    0x82622AA5, 0xE769E8D8,
-    0x826BDC04, 0xE7389664,
-    0x8275A0C0, 0xE70747C3,
-    0x827F78D8, 0xE6D5FCFC,
-    0x8289644A, 0xE6A4B616,
-    0x82936316, 0xE6737319,
-    0x829D753A, 0xE642340D,
-    0x82A79AB3, 0xE610F8F9,
-    0x82B1D381, 0xE5DFC1E4,
-    0x82BC1FA1, 0xE5AE8ED8,
-    0x82C67F13, 0xE57D5FDA,
-    0x82D0F1D5, 0xE54C34F3,
-    0x82DB77E5, 0xE51B0E2A,
-    0x82E61141, 0xE4E9EB86,
-    0x82F0BDE8, 0xE4B8CD10,
-    0x82FB7DD8, 0xE487B2CF,
-    0x8306510F, 0xE4569CCB,
-    0x8311378C, 0xE4258B0A,
-    0x831C314E, 0xE3F47D95,
-    0x83273E52, 0xE3C37473,
-    0x83325E97, 0xE3926FAC,
-    0x833D921A, 0xE3616F47,
-    0x8348D8DB, 0xE330734C,
-    0x835432D8, 0xE2FF7BC3,
-    0x835FA00E, 0xE2CE88B2,
-    0x836B207D, 0xE29D9A22,
-    0x8376B422, 0xE26CB01A,
-    0x83825AFB, 0xE23BCAA2,
-    0x838E1507, 0xE20AE9C1,
-    0x8399E244, 0xE1DA0D7E,
-    0x83A5C2B0, 0xE1A935E1,
-    0x83B1B649, 0xE17862F3,
-    0x83BDBD0D, 0xE14794B9,
-    0x83C9D6FB, 0xE116CB3D,
-    0x83D60411, 0xE0E60684,
-    0x83E2444D, 0xE0B54698,
-    0x83EE97AC, 0xE0848B7F,
-    0x83FAFE2E, 0xE053D541,
-    0x840777CF, 0xE02323E5,
-    0x8414048F, 0xDFF27773,
-    0x8420A46B, 0xDFC1CFF2,
-    0x842D5761, 0xDF912D6A,
-    0x843A1D70, 0xDF608FE3,
-    0x8446F695, 0xDF2FF764,
-    0x8453E2CE, 0xDEFF63F4,
-    0x8460E21A, 0xDECED59B,
-    0x846DF476, 0xDE9E4C60,
-    0x847B19E1, 0xDE6DC84B,
-    0x84885257, 0xDE3D4963,
-    0x84959DD9, 0xDE0CCFB1,
-    0x84A2FC62, 0xDDDC5B3A,
-    0x84B06DF1, 0xDDABEC07,
-    0x84BDF285, 0xDD7B8220,
-    0x84CB8A1B, 0xDD4B1D8B,
-    0x84D934B0, 0xDD1ABE51,
-    0x84E6F244, 0xDCEA6478,
-    0x84F4C2D3, 0xDCBA1008,
-    0x8502A65C, 0xDC89C108,
-    0x85109CDC, 0xDC597781,
-    0x851EA652, 0xDC293379,
-    0x852CC2BA, 0xDBF8F4F8,
-    0x853AF214, 0xDBC8BC05,
-    0x8549345C, 0xDB9888A8,
-    0x85578991, 0xDB685AE8,
-    0x8565F1B0, 0xDB3832CD,
-    0x85746CB7, 0xDB08105E,
-    0x8582FAA4, 0xDAD7F3A2,
-    0x85919B75, 0xDAA7DCA1,
-    0x85A04F28, 0xDA77CB62,
-    0x85AF15B9, 0xDA47BFED,
-    0x85BDEF27, 0xDA17BA4A,
-    0x85CCDB70, 0xD9E7BA7E,
-    0x85DBDA91, 0xD9B7C093,
-    0x85EAEC88, 0xD987CC8F,
-    0x85FA1152, 0xD957DE7A,
-    0x860948EE, 0xD927F65B,
-    0x86189359, 0xD8F81439,
-    0x8627F090, 0xD8C8381C,
-    0x86376092, 0xD898620C,
-    0x8646E35B, 0xD868920F,
-    0x865678EA, 0xD838C82D,
-    0x8666213C, 0xD809046D,
-    0x8675DC4E, 0xD7D946D7,
-    0x8685AA1F, 0xD7A98F73,
-    0x86958AAB, 0xD779DE46,
-    0x86A57DF1, 0xD74A335A,
-    0x86B583EE, 0xD71A8EB5,
-    0x86C59C9F, 0xD6EAF05E,
-    0x86D5C802, 0xD6BB585D,
-    0x86E60614, 0xD68BC6BA,
-    0x86F656D3, 0xD65C3B7B,
-    0x8706BA3C, 0xD62CB6A7,
-    0x8717304E, 0xD5FD3847,
-    0x8727B904, 0xD5CDC062,
-    0x8738545E, 0xD59E4EFE,
-    0x87490257, 0xD56EE424,
-    0x8759C2EF, 0xD53F7FDA,
-    0x876A9621, 0xD5102227,
-    0x877B7BEC, 0xD4E0CB14,
-    0x878C744C, 0xD4B17AA7,
-    0x879D7F40, 0xD48230E8,
-    0x87AE9CC5, 0xD452EDDE,
-    0x87BFCCD7, 0xD423B190,
-    0x87D10F75, 0xD3F47C06,
-    0x87E2649B, 0xD3C54D46,
-    0x87F3CC47, 0xD3962559,
-    0x88054677, 0xD3670445,
-    0x8816D327, 0xD337EA12,
-    0x88287255, 0xD308D6C6,
-    0x883A23FE, 0xD2D9CA6A,
-    0x884BE820, 0xD2AAC504,
-    0x885DBEB7, 0xD27BC69C,
-    0x886FA7C2, 0xD24CCF38,
-    0x8881A33C, 0xD21DDEE1,
-    0x8893B124, 0xD1EEF59E,
-    0x88A5D177, 0xD1C01374,
-    0x88B80431, 0xD191386D,
-    0x88CA4951, 0xD162648F,
-    0x88DCA0D3, 0xD13397E1,
-    0x88EF0AB4, 0xD104D26B,
-    0x890186F1, 0xD0D61433,
-    0x89141589, 0xD0A75D42,
-    0x8926B677, 0xD078AD9D,
-    0x893969B9, 0xD04A054D,
-    0x894C2F4C, 0xD01B6459,
-    0x895F072D, 0xCFECCAC7,
-    0x8971F15A, 0xCFBE389F,
-    0x8984EDCF, 0xCF8FADE8,
-    0x8997FC89, 0xCF612AAA,
-    0x89AB1D86, 0xCF32AEEB,
-    0x89BE50C3, 0xCF043AB2,
-    0x89D1963C, 0xCED5CE08,
-    0x89E4EDEE, 0xCEA768F2,
-    0x89F857D8, 0xCE790B78,
-    0x8A0BD3F5, 0xCE4AB5A2,
-    0x8A1F6242, 0xCE1C6776,
-    0x8A3302BD, 0xCDEE20FC,
-    0x8A46B563, 0xCDBFE23A,
-    0x8A5A7A30, 0xCD91AB38,
-    0x8A6E5122, 0xCD637BFD,
-    0x8A823A35, 0xCD355490,
-    0x8A963567, 0xCD0734F8,
-    0x8AAA42B4, 0xCCD91D3D,
-    0x8ABE6219, 0xCCAB0D65,
-    0x8AD29393, 0xCC7D0577,
-    0x8AE6D71F, 0xCC4F057B,
-    0x8AFB2CBA, 0xCC210D78,
-    0x8B0F9461, 0xCBF31D75,
-    0x8B240E10, 0xCBC53578,
-    0x8B3899C5, 0xCB975589,
-    0x8B4D377C, 0xCB697DB0,
-    0x8B61E732, 0xCB3BADF2,
-    0x8B76A8E4, 0xCB0DE658,
-    0x8B8B7C8F, 0xCAE026E8,
-    0x8BA0622F, 0xCAB26FA9,
-    0x8BB559C1, 0xCA84C0A2,
-    0x8BCA6342, 0xCA5719DB,
-    0x8BDF7EAF, 0xCA297B5A,
-    0x8BF4AC05, 0xC9FBE527,
-    0x8C09EB40, 0xC9CE5748,
-    0x8C1F3C5C, 0xC9A0D1C4,
-    0x8C349F58, 0xC97354A3,
-    0x8C4A142F, 0xC945DFEC,
-    0x8C5F9ADD, 0xC91873A5,
-    0x8C753361, 0xC8EB0FD6,
-    0x8C8ADDB6, 0xC8BDB485,
-    0x8CA099D9, 0xC89061BA,
-    0x8CB667C7, 0xC863177B,
-    0x8CCC477D, 0xC835D5D0,
-    0x8CE238F6, 0xC8089CBF,
-    0x8CF83C30, 0xC7DB6C50,
-    0x8D0E5127, 0xC7AE4489,
-    0x8D2477D8, 0xC7812571,
-    0x8D3AB03F, 0xC7540F10,
-    0x8D50FA59, 0xC727016C,
-    0x8D675623, 0xC6F9FC8D,
-    0x8D7DC399, 0xC6CD0079,
-    0x8D9442B7, 0xC6A00D36,
-    0x8DAAD37B, 0xC67322CD,
-    0x8DC175E0, 0xC6464144,
-    0x8DD829E4, 0xC61968A2,
-    0x8DEEEF82, 0xC5EC98ED,
-    0x8E05C6B7, 0xC5BFD22E,
-    0x8E1CAF80, 0xC593146A,
-    0x8E33A9D9, 0xC5665FA8,
-    0x8E4AB5BF, 0xC539B3F0,
-    0x8E61D32D, 0xC50D1148,
-    0x8E790222, 0xC4E077B8,
-    0x8E904298, 0xC4B3E746,
-    0x8EA7948C, 0xC4875FF8,
-    0x8EBEF7FB, 0xC45AE1D7,
-    0x8ED66CE1, 0xC42E6CE8,
-    0x8EEDF33B, 0xC4020132,
-    0x8F058B04, 0xC3D59EBD,
-    0x8F1D343A, 0xC3A9458F,
-    0x8F34EED8, 0xC37CF5B0,
-    0x8F4CBADB, 0xC350AF25,
-    0x8F64983F, 0xC32471F6,
-    0x8F7C8701, 0xC2F83E2A,
-    0x8F94871D, 0xC2CC13C7,
-    0x8FAC988E, 0xC29FF2D4,
-    0x8FC4BB53, 0xC273DB58,
-    0x8FDCEF66, 0xC247CD5A,
-    0x8FF534C4, 0xC21BC8E0,
-    0x900D8B69, 0xC1EFCDF2,
-    0x9025F352, 0xC1C3DC96,
-    0x903E6C7A, 0xC197F4D3,
-    0x9056F6DF, 0xC16C16B0,
-    0x906F927B, 0xC1404233,
-    0x90883F4C, 0xC1147763,
-    0x90A0FD4E, 0xC0E8B648,
-    0x90B9CC7C, 0xC0BCFEE7,
-    0x90D2ACD3, 0xC0915147,
-    0x90EB9E50, 0xC065AD70,
-    0x9104A0ED, 0xC03A1368,
-    0x911DB4A8, 0xC00E8335,
-    0x9136D97D, 0xBFE2FCDF,
-    0x91500F67, 0xBFB7806C,
-    0x91695663, 0xBF8C0DE2,
-    0x9182AE6C, 0xBF60A54A,
-    0x919C1780, 0xBF3546A8,
-    0x91B5919A, 0xBF09F204,
-    0x91CF1CB6, 0xBEDEA765,
-    0x91E8B8D0, 0xBEB366D1,
-    0x920265E4, 0xBE88304F,
-    0x921C23EE, 0xBE5D03E5,
-    0x9235F2EB, 0xBE31E19B,
-    0x924FD2D6, 0xBE06C977,
-    0x9269C3AC, 0xBDDBBB7F,
-    0x9283C567, 0xBDB0B7BA,
-    0x929DD805, 0xBD85BE2F,
-    0x92B7FB82, 0xBD5ACEE5,
-    0x92D22FD8, 0xBD2FE9E1,
-    0x92EC7505, 0xBD050F2C,
-    0x9306CB04, 0xBCDA3ECA,
-    0x932131D1, 0xBCAF78C3,
-    0x933BA968, 0xBC84BD1E,
-    0x935631C5, 0xBC5A0BE1,
-    0x9370CAE4, 0xBC2F6513,
-    0x938B74C0, 0xBC04C8BA,
-    0x93A62F56, 0xBBDA36DC,
-    0x93C0FAA2, 0xBBAFAF81,
-    0x93DBD69F, 0xBB8532AF,
-    0x93F6C34A, 0xBB5AC06C,
-    0x9411C09D, 0xBB3058C0,
-    0x942CCE95, 0xBB05FBB0,
-    0x9447ED2F, 0xBADBA943,
-    0x94631C64, 0xBAB1617F,
-    0x947E5C32, 0xBA87246C,
-    0x9499AC95, 0xBA5CF210,
-    0x94B50D87, 0xBA32CA70,
-    0x94D07F05, 0xBA08AD94,
-    0x94EC010B, 0xB9DE9B83,
-    0x95079393, 0xB9B49442,
-    0x9523369B, 0xB98A97D8,
-    0x953EEA1E, 0xB960A64B,
-    0x955AAE17, 0xB936BFA3,
-    0x95768282, 0xB90CE3E6,
-    0x9592675B, 0xB8E31319,
-    0x95AE5C9E, 0xB8B94D44,
-    0x95CA6246, 0xB88F926C,
-    0x95E6784F, 0xB865E299,
-    0x96029EB5, 0xB83C3DD1,
-    0x961ED573, 0xB812A419,
-    0x963B1C85, 0xB7E9157A,
-    0x965773E7, 0xB7BF91F8,
-    0x9673DB94, 0xB796199B,
-    0x96905387, 0xB76CAC68,
-    0x96ACDBBD, 0xB7434A67,
-    0x96C97431, 0xB719F39D,
-    0x96E61CDF, 0xB6F0A811,
-    0x9702D5C2, 0xB6C767CA,
-    0x971F9ED6, 0xB69E32CD,
-    0x973C7816, 0xB6750921,
-    0x9759617E, 0xB64BEACC,
-    0x97765B0A, 0xB622D7D5,
-    0x979364B5, 0xB5F9D042,
-    0x97B07E7A, 0xB5D0D41A,
-    0x97CDA855, 0xB5A7E362,
-    0x97EAE241, 0xB57EFE21,
-    0x98082C3B, 0xB556245E,
-    0x9825863D, 0xB52D561E,
-    0x9842F043, 0xB5049368,
-    0x98606A48, 0xB4DBDC42,
-    0x987DF449, 0xB4B330B2,
-    0x989B8E3F, 0xB48A90C0,
-    0x98B93828, 0xB461FC70,
-    0x98D6F1FE, 0xB43973C9,
-    0x98F4BBBC, 0xB410F6D2,
-    0x9912955E, 0xB3E88591,
-    0x99307EE0, 0xB3C0200C,
-    0x994E783C, 0xB397C649,
-    0x996C816F, 0xB36F784E,
-    0x998A9A73, 0xB3473622,
-    0x99A8C344, 0xB31EFFCB,
-    0x99C6FBDE, 0xB2F6D54F,
-    0x99E5443A, 0xB2CEB6B5,
-    0x9A039C56, 0xB2A6A401,
-    0x9A22042C, 0xB27E9D3B,
-    0x9A407BB8, 0xB256A26A,
-    0x9A5F02F5, 0xB22EB392,
-    0x9A7D99DD, 0xB206D0BA,
-    0x9A9C406D, 0xB1DEF9E8,
-    0x9ABAF6A0, 0xB1B72F23,
-    0x9AD9BC71, 0xB18F7070,
-    0x9AF891DB, 0xB167BDD6,
-    0x9B1776D9, 0xB140175B,
-    0x9B366B67, 0xB1187D05,
-    0x9B556F80, 0xB0F0EEDA,
-    0x9B748320, 0xB0C96CDF,
-    0x9B93A640, 0xB0A1F71C,
-    0x9BB2D8DD, 0xB07A8D97,
-    0x9BD21AF2, 0xB0533055,
-    0x9BF16C7A, 0xB02BDF5C,
-    0x9C10CD70, 0xB0049AB2,
-    0x9C303DCF, 0xAFDD625F,
-    0x9C4FBD92, 0xAFB63667,
-    0x9C6F4CB5, 0xAF8F16D0,
-    0x9C8EEB33, 0xAF6803A1,
-    0x9CAE9907, 0xAF40FCE0,
-    0x9CCE562B, 0xAF1A0293,
-    0x9CEE229C, 0xAEF314BF,
-    0x9D0DFE53, 0xAECC336B,
-    0x9D2DE94D, 0xAEA55E9D,
-    0x9D4DE384, 0xAE7E965B,
-    0x9D6DECF4, 0xAE57DAAA,
-    0x9D8E0596, 0xAE312B91,
-    0x9DAE2D68, 0xAE0A8916,
-    0x9DCE6462, 0xADE3F33E,
-    0x9DEEAA82, 0xADBD6A10,
-    0x9E0EFFC1, 0xAD96ED91,
-    0x9E2F641A, 0xAD707DC8,
-    0x9E4FD789, 0xAD4A1ABA,
-    0x9E705A09, 0xAD23C46D,
-    0x9E90EB94, 0xACFD7AE8,
-    0x9EB18C26, 0xACD73E30,
-    0x9ED23BB9, 0xACB10E4A,
-    0x9EF2FA48, 0xAC8AEB3E,
-    0x9F13C7D0, 0xAC64D510,
-    0x9F34A449, 0xAC3ECBC7,
-    0x9F558FB0, 0xAC18CF68,
-    0x9F7689FF, 0xABF2DFFA,
-    0x9F979331, 0xABCCFD82,
-    0x9FB8AB41, 0xABA72806,
-    0x9FD9D22A, 0xAB815F8C,
-    0x9FFB07E7, 0xAB5BA41A,
-    0xA01C4C72, 0xAB35F5B5,
-    0xA03D9FC7, 0xAB105464,
-    0xA05F01E1, 0xAAEAC02B,
-    0xA08072BA, 0xAAC53912,
-    0xA0A1F24C, 0xAA9FBF1D,
-    0xA0C38094, 0xAA7A5253,
-    0xA0E51D8C, 0xAA54F2B9,
-    0xA106C92E, 0xAA2FA055,
-    0xA1288376, 0xAA0A5B2D,
-    0xA14A4C5E, 0xA9E52347,
-    0xA16C23E1, 0xA9BFF8A8,
-    0xA18E09F9, 0xA99ADB56,
-    0xA1AFFEA2, 0xA975CB56,
-    0xA1D201D7, 0xA950C8AF,
-    0xA1F41391, 0xA92BD366,
-    0xA21633CD, 0xA906EB81,
-    0xA2386283, 0xA8E21106,
-    0xA25A9FB1, 0xA8BD43FA,
-    0xA27CEB4F, 0xA8988463,
-    0xA29F4559, 0xA873D246,
-    0xA2C1ADC9, 0xA84F2DA9,
-    0xA2E4249A, 0xA82A9693,
-    0xA306A9C7, 0xA8060D08,
-    0xA3293D4B, 0xA7E1910E,
-    0xA34BDF20, 0xA7BD22AB,
-    0xA36E8F40, 0xA798C1E4,
-    0xA3914DA7, 0xA7746EC0,
-    0xA3B41A4F, 0xA7502943,
-    0xA3D6F533, 0xA72BF173,
-    0xA3F9DE4D, 0xA707C756,
-    0xA41CD598, 0xA6E3AAF2,
-    0xA43FDB0F, 0xA6BF9C4B,
-    0xA462EEAC, 0xA69B9B68,
-    0xA4861069, 0xA677A84E,
-    0xA4A94042, 0xA653C302,
-    0xA4CC7E31, 0xA62FEB8B,
-    0xA4EFCA31, 0xA60C21ED,
-    0xA513243B, 0xA5E8662F,
-    0xA5368C4B, 0xA5C4B855,
-    0xA55A025B, 0xA5A11865,
-    0xA57D8666, 0xA57D8666,
-    0xA5A11865, 0xA55A025B,
-    0xA5C4B855, 0xA5368C4B,
-    0xA5E8662F, 0xA513243B,
-    0xA60C21ED, 0xA4EFCA31,
-    0xA62FEB8B, 0xA4CC7E31,
-    0xA653C302, 0xA4A94042,
-    0xA677A84E, 0xA4861069,
-    0xA69B9B68, 0xA462EEAC,
-    0xA6BF9C4B, 0xA43FDB0F,
-    0xA6E3AAF2, 0xA41CD598,
-    0xA707C756, 0xA3F9DE4D,
-    0xA72BF173, 0xA3D6F533,
-    0xA7502943, 0xA3B41A4F,
-    0xA7746EC0, 0xA3914DA7,
-    0xA798C1E4, 0xA36E8F40,
-    0xA7BD22AB, 0xA34BDF20,
-    0xA7E1910E, 0xA3293D4B,
-    0xA8060D08, 0xA306A9C7,
-    0xA82A9693, 0xA2E4249A,
-    0xA84F2DA9, 0xA2C1ADC9,
-    0xA873D246, 0xA29F4559,
-    0xA8988463, 0xA27CEB4F,
-    0xA8BD43FA, 0xA25A9FB1,
-    0xA8E21106, 0xA2386283,
-    0xA906EB81, 0xA21633CD,
-    0xA92BD366, 0xA1F41391,
-    0xA950C8AF, 0xA1D201D7,
-    0xA975CB56, 0xA1AFFEA2,
-    0xA99ADB56, 0xA18E09F9,
-    0xA9BFF8A8, 0xA16C23E1,
-    0xA9E52347, 0xA14A4C5E,
-    0xAA0A5B2D, 0xA1288376,
-    0xAA2FA055, 0xA106C92E,
-    0xAA54F2B9, 0xA0E51D8C,
-    0xAA7A5253, 0xA0C38094,
-    0xAA9FBF1D, 0xA0A1F24C,
-    0xAAC53912, 0xA08072BA,
-    0xAAEAC02B, 0xA05F01E1,
-    0xAB105464, 0xA03D9FC7,
-    0xAB35F5B5, 0xA01C4C72,
-    0xAB5BA41A, 0x9FFB07E7,
-    0xAB815F8C, 0x9FD9D22A,
-    0xABA72806, 0x9FB8AB41,
-    0xABCCFD82, 0x9F979331,
-    0xABF2DFFA, 0x9F7689FF,
-    0xAC18CF68, 0x9F558FB0,
-    0xAC3ECBC7, 0x9F34A449,
-    0xAC64D510, 0x9F13C7D0,
-    0xAC8AEB3E, 0x9EF2FA48,
-    0xACB10E4A, 0x9ED23BB9,
-    0xACD73E30, 0x9EB18C26,
-    0xACFD7AE8, 0x9E90EB94,
-    0xAD23C46D, 0x9E705A09,
-    0xAD4A1ABA, 0x9E4FD789,
-    0xAD707DC8, 0x9E2F641A,
-    0xAD96ED91, 0x9E0EFFC1,
-    0xADBD6A10, 0x9DEEAA82,
-    0xADE3F33E, 0x9DCE6462,
-    0xAE0A8916, 0x9DAE2D68,
-    0xAE312B91, 0x9D8E0596,
-    0xAE57DAAA, 0x9D6DECF4,
-    0xAE7E965B, 0x9D4DE384,
-    0xAEA55E9D, 0x9D2DE94D,
-    0xAECC336B, 0x9D0DFE53,
-    0xAEF314BF, 0x9CEE229C,
-    0xAF1A0293, 0x9CCE562B,
-    0xAF40FCE0, 0x9CAE9907,
-    0xAF6803A1, 0x9C8EEB33,
-    0xAF8F16D0, 0x9C6F4CB5,
-    0xAFB63667, 0x9C4FBD92,
-    0xAFDD625F, 0x9C303DCF,
-    0xB0049AB2, 0x9C10CD70,
-    0xB02BDF5C, 0x9BF16C7A,
-    0xB0533055, 0x9BD21AF2,
-    0xB07A8D97, 0x9BB2D8DD,
-    0xB0A1F71C, 0x9B93A640,
-    0xB0C96CDF, 0x9B748320,
-    0xB0F0EEDA, 0x9B556F80,
-    0xB1187D05, 0x9B366B67,
-    0xB140175B, 0x9B1776D9,
-    0xB167BDD6, 0x9AF891DB,
-    0xB18F7070, 0x9AD9BC71,
-    0xB1B72F23, 0x9ABAF6A0,
-    0xB1DEF9E8, 0x9A9C406D,
-    0xB206D0BA, 0x9A7D99DD,
-    0xB22EB392, 0x9A5F02F5,
-    0xB256A26A, 0x9A407BB8,
-    0xB27E9D3B, 0x9A22042C,
-    0xB2A6A401, 0x9A039C56,
-    0xB2CEB6B5, 0x99E5443A,
-    0xB2F6D54F, 0x99C6FBDE,
-    0xB31EFFCB, 0x99A8C344,
-    0xB3473622, 0x998A9A73,
-    0xB36F784E, 0x996C816F,
-    0xB397C649, 0x994E783C,
-    0xB3C0200C, 0x99307EE0,
-    0xB3E88591, 0x9912955E,
-    0xB410F6D2, 0x98F4BBBC,
-    0xB43973C9, 0x98D6F1FE,
-    0xB461FC70, 0x98B93828,
-    0xB48A90C0, 0x989B8E3F,
-    0xB4B330B2, 0x987DF449,
-    0xB4DBDC42, 0x98606A48,
-    0xB5049368, 0x9842F043,
-    0xB52D561E, 0x9825863D,
-    0xB556245E, 0x98082C3B,
-    0xB57EFE21, 0x97EAE241,
-    0xB5A7E362, 0x97CDA855,
-    0xB5D0D41A, 0x97B07E7A,
-    0xB5F9D042, 0x979364B5,
-    0xB622D7D5, 0x97765B0A,
-    0xB64BEACC, 0x9759617E,
-    0xB6750921, 0x973C7816,
-    0xB69E32CD, 0x971F9ED6,
-    0xB6C767CA, 0x9702D5C2,
-    0xB6F0A811, 0x96E61CDF,
-    0xB719F39D, 0x96C97431,
-    0xB7434A67, 0x96ACDBBD,
-    0xB76CAC68, 0x96905387,
-    0xB796199B, 0x9673DB94,
-    0xB7BF91F8, 0x965773E7,
-    0xB7E9157A, 0x963B1C85,
-    0xB812A419, 0x961ED573,
-    0xB83C3DD1, 0x96029EB5,
-    0xB865E299, 0x95E6784F,
-    0xB88F926C, 0x95CA6246,
-    0xB8B94D44, 0x95AE5C9E,
-    0xB8E31319, 0x9592675B,
-    0xB90CE3E6, 0x95768282,
-    0xB936BFA3, 0x955AAE17,
-    0xB960A64B, 0x953EEA1E,
-    0xB98A97D8, 0x9523369B,
-    0xB9B49442, 0x95079393,
-    0xB9DE9B83, 0x94EC010B,
-    0xBA08AD94, 0x94D07F05,
-    0xBA32CA70, 0x94B50D87,
-    0xBA5CF210, 0x9499AC95,
-    0xBA87246C, 0x947E5C32,
-    0xBAB1617F, 0x94631C64,
-    0xBADBA943, 0x9447ED2F,
-    0xBB05FBB0, 0x942CCE95,
-    0xBB3058C0, 0x9411C09D,
-    0xBB5AC06C, 0x93F6C34A,
-    0xBB8532AF, 0x93DBD69F,
-    0xBBAFAF81, 0x93C0FAA2,
-    0xBBDA36DC, 0x93A62F56,
-    0xBC04C8BA, 0x938B74C0,
-    0xBC2F6513, 0x9370CAE4,
-    0xBC5A0BE1, 0x935631C5,
-    0xBC84BD1E, 0x933BA968,
-    0xBCAF78C3, 0x932131D1,
-    0xBCDA3ECA, 0x9306CB04,
-    0xBD050F2C, 0x92EC7505,
-    0xBD2FE9E1, 0x92D22FD8,
-    0xBD5ACEE5, 0x92B7FB82,
-    0xBD85BE2F, 0x929DD805,
-    0xBDB0B7BA, 0x9283C567,
-    0xBDDBBB7F, 0x9269C3AC,
-    0xBE06C977, 0x924FD2D6,
-    0xBE31E19B, 0x9235F2EB,
-    0xBE5D03E5, 0x921C23EE,
-    0xBE88304F, 0x920265E4,
-    0xBEB366D1, 0x91E8B8D0,
-    0xBEDEA765, 0x91CF1CB6,
-    0xBF09F204, 0x91B5919A,
-    0xBF3546A8, 0x919C1780,
-    0xBF60A54A, 0x9182AE6C,
-    0xBF8C0DE2, 0x91695663,
-    0xBFB7806C, 0x91500F67,
-    0xBFE2FCDF, 0x9136D97D,
-    0xC00E8335, 0x911DB4A8,
-    0xC03A1368, 0x9104A0ED,
-    0xC065AD70, 0x90EB9E50,
-    0xC0915147, 0x90D2ACD3,
-    0xC0BCFEE7, 0x90B9CC7C,
-    0xC0E8B648, 0x90A0FD4E,
-    0xC1147763, 0x90883F4C,
-    0xC1404233, 0x906F927B,
-    0xC16C16B0, 0x9056F6DF,
-    0xC197F4D3, 0x903E6C7A,
-    0xC1C3DC96, 0x9025F352,
-    0xC1EFCDF2, 0x900D8B69,
-    0xC21BC8E0, 0x8FF534C4,
-    0xC247CD5A, 0x8FDCEF66,
-    0xC273DB58, 0x8FC4BB53,
-    0xC29FF2D4, 0x8FAC988E,
-    0xC2CC13C7, 0x8F94871D,
-    0xC2F83E2A, 0x8F7C8701,
-    0xC32471F6, 0x8F64983F,
-    0xC350AF25, 0x8F4CBADB,
-    0xC37CF5B0, 0x8F34EED8,
-    0xC3A9458F, 0x8F1D343A,
-    0xC3D59EBD, 0x8F058B04,
-    0xC4020132, 0x8EEDF33B,
-    0xC42E6CE8, 0x8ED66CE1,
-    0xC45AE1D7, 0x8EBEF7FB,
-    0xC4875FF8, 0x8EA7948C,
-    0xC4B3E746, 0x8E904298,
-    0xC4E077B8, 0x8E790222,
-    0xC50D1148, 0x8E61D32D,
-    0xC539B3F0, 0x8E4AB5BF,
-    0xC5665FA8, 0x8E33A9D9,
-    0xC593146A, 0x8E1CAF80,
-    0xC5BFD22E, 0x8E05C6B7,
-    0xC5EC98ED, 0x8DEEEF82,
-    0xC61968A2, 0x8DD829E4,
-    0xC6464144, 0x8DC175E0,
-    0xC67322CD, 0x8DAAD37B,
-    0xC6A00D36, 0x8D9442B7,
-    0xC6CD0079, 0x8D7DC399,
-    0xC6F9FC8D, 0x8D675623,
-    0xC727016C, 0x8D50FA59,
-    0xC7540F10, 0x8D3AB03F,
-    0xC7812571, 0x8D2477D8,
-    0xC7AE4489, 0x8D0E5127,
-    0xC7DB6C50, 0x8CF83C30,
-    0xC8089CBF, 0x8CE238F6,
-    0xC835D5D0, 0x8CCC477D,
-    0xC863177B, 0x8CB667C7,
-    0xC89061BA, 0x8CA099D9,
-    0xC8BDB485, 0x8C8ADDB6,
-    0xC8EB0FD6, 0x8C753361,
-    0xC91873A5, 0x8C5F9ADD,
-    0xC945DFEC, 0x8C4A142F,
-    0xC97354A3, 0x8C349F58,
-    0xC9A0D1C4, 0x8C1F3C5C,
-    0xC9CE5748, 0x8C09EB40,
-    0xC9FBE527, 0x8BF4AC05,
-    0xCA297B5A, 0x8BDF7EAF,
-    0xCA5719DB, 0x8BCA6342,
-    0xCA84C0A2, 0x8BB559C1,
-    0xCAB26FA9, 0x8BA0622F,
-    0xCAE026E8, 0x8B8B7C8F,
-    0xCB0DE658, 0x8B76A8E4,
-    0xCB3BADF2, 0x8B61E732,
-    0xCB697DB0, 0x8B4D377C,
-    0xCB975589, 0x8B3899C5,
-    0xCBC53578, 0x8B240E10,
-    0xCBF31D75, 0x8B0F9461,
-    0xCC210D78, 0x8AFB2CBA,
-    0xCC4F057B, 0x8AE6D71F,
-    0xCC7D0577, 0x8AD29393,
-    0xCCAB0D65, 0x8ABE6219,
-    0xCCD91D3D, 0x8AAA42B4,
-    0xCD0734F8, 0x8A963567,
-    0xCD355490, 0x8A823A35,
-    0xCD637BFD, 0x8A6E5122,
-    0xCD91AB38, 0x8A5A7A30,
-    0xCDBFE23A, 0x8A46B563,
-    0xCDEE20FC, 0x8A3302BD,
-    0xCE1C6776, 0x8A1F6242,
-    0xCE4AB5A2, 0x8A0BD3F5,
-    0xCE790B78, 0x89F857D8,
-    0xCEA768F2, 0x89E4EDEE,
-    0xCED5CE08, 0x89D1963C,
-    0xCF043AB2, 0x89BE50C3,
-    0xCF32AEEB, 0x89AB1D86,
-    0xCF612AAA, 0x8997FC89,
-    0xCF8FADE8, 0x8984EDCF,
-    0xCFBE389F, 0x8971F15A,
-    0xCFECCAC7, 0x895F072D,
-    0xD01B6459, 0x894C2F4C,
-    0xD04A054D, 0x893969B9,
-    0xD078AD9D, 0x8926B677,
-    0xD0A75D42, 0x89141589,
-    0xD0D61433, 0x890186F1,
-    0xD104D26B, 0x88EF0AB4,
-    0xD13397E1, 0x88DCA0D3,
-    0xD162648F, 0x88CA4951,
-    0xD191386D, 0x88B80431,
-    0xD1C01374, 0x88A5D177,
-    0xD1EEF59E, 0x8893B124,
-    0xD21DDEE1, 0x8881A33C,
-    0xD24CCF38, 0x886FA7C2,
-    0xD27BC69C, 0x885DBEB7,
-    0xD2AAC504, 0x884BE820,
-    0xD2D9CA6A, 0x883A23FE,
-    0xD308D6C6, 0x88287255,
-    0xD337EA12, 0x8816D327,
-    0xD3670445, 0x88054677,
-    0xD3962559, 0x87F3CC47,
-    0xD3C54D46, 0x87E2649B,
-    0xD3F47C06, 0x87D10F75,
-    0xD423B190, 0x87BFCCD7,
-    0xD452EDDE, 0x87AE9CC5,
-    0xD48230E8, 0x879D7F40,
-    0xD4B17AA7, 0x878C744C,
-    0xD4E0CB14, 0x877B7BEC,
-    0xD5102227, 0x876A9621,
-    0xD53F7FDA, 0x8759C2EF,
-    0xD56EE424, 0x87490257,
-    0xD59E4EFE, 0x8738545E,
-    0xD5CDC062, 0x8727B904,
-    0xD5FD3847, 0x8717304E,
-    0xD62CB6A7, 0x8706BA3C,
-    0xD65C3B7B, 0x86F656D3,
-    0xD68BC6BA, 0x86E60614,
-    0xD6BB585D, 0x86D5C802,
-    0xD6EAF05E, 0x86C59C9F,
-    0xD71A8EB5, 0x86B583EE,
-    0xD74A335A, 0x86A57DF1,
-    0xD779DE46, 0x86958AAB,
-    0xD7A98F73, 0x8685AA1F,
-    0xD7D946D7, 0x8675DC4E,
-    0xD809046D, 0x8666213C,
-    0xD838C82D, 0x865678EA,
-    0xD868920F, 0x8646E35B,
-    0xD898620C, 0x86376092,
-    0xD8C8381C, 0x8627F090,
-    0xD8F81439, 0x86189359,
-    0xD927F65B, 0x860948EE,
-    0xD957DE7A, 0x85FA1152,
-    0xD987CC8F, 0x85EAEC88,
-    0xD9B7C093, 0x85DBDA91,
-    0xD9E7BA7E, 0x85CCDB70,
-    0xDA17BA4A, 0x85BDEF27,
-    0xDA47BFED, 0x85AF15B9,
-    0xDA77CB62, 0x85A04F28,
-    0xDAA7DCA1, 0x85919B75,
-    0xDAD7F3A2, 0x8582FAA4,
-    0xDB08105E, 0x85746CB7,
-    0xDB3832CD, 0x8565F1B0,
-    0xDB685AE8, 0x85578991,
-    0xDB9888A8, 0x8549345C,
-    0xDBC8BC05, 0x853AF214,
-    0xDBF8F4F8, 0x852CC2BA,
-    0xDC293379, 0x851EA652,
-    0xDC597781, 0x85109CDC,
-    0xDC89C108, 0x8502A65C,
-    0xDCBA1008, 0x84F4C2D3,
-    0xDCEA6478, 0x84E6F244,
-    0xDD1ABE51, 0x84D934B0,
-    0xDD4B1D8B, 0x84CB8A1B,
-    0xDD7B8220, 0x84BDF285,
-    0xDDABEC07, 0x84B06DF1,
-    0xDDDC5B3A, 0x84A2FC62,
-    0xDE0CCFB1, 0x84959DD9,
-    0xDE3D4963, 0x84885257,
-    0xDE6DC84B, 0x847B19E1,
-    0xDE9E4C60, 0x846DF476,
-    0xDECED59B, 0x8460E21A,
-    0xDEFF63F4, 0x8453E2CE,
-    0xDF2FF764, 0x8446F695,
-    0xDF608FE3, 0x843A1D70,
-    0xDF912D6A, 0x842D5761,
-    0xDFC1CFF2, 0x8420A46B,
-    0xDFF27773, 0x8414048F,
-    0xE02323E5, 0x840777CF,
-    0xE053D541, 0x83FAFE2E,
-    0xE0848B7F, 0x83EE97AC,
-    0xE0B54698, 0x83E2444D,
-    0xE0E60684, 0x83D60411,
-    0xE116CB3D, 0x83C9D6FB,
-    0xE14794B9, 0x83BDBD0D,
-    0xE17862F3, 0x83B1B649,
-    0xE1A935E1, 0x83A5C2B0,
-    0xE1DA0D7E, 0x8399E244,
-    0xE20AE9C1, 0x838E1507,
-    0xE23BCAA2, 0x83825AFB,
-    0xE26CB01A, 0x8376B422,
-    0xE29D9A22, 0x836B207D,
-    0xE2CE88B2, 0x835FA00E,
-    0xE2FF7BC3, 0x835432D8,
-    0xE330734C, 0x8348D8DB,
-    0xE3616F47, 0x833D921A,
-    0xE3926FAC, 0x83325E97,
-    0xE3C37473, 0x83273E52,
-    0xE3F47D95, 0x831C314E,
-    0xE4258B0A, 0x8311378C,
-    0xE4569CCB, 0x8306510F,
-    0xE487B2CF, 0x82FB7DD8,
-    0xE4B8CD10, 0x82F0BDE8,
-    0xE4E9EB86, 0x82E61141,
-    0xE51B0E2A, 0x82DB77E5,
-    0xE54C34F3, 0x82D0F1D5,
-    0xE57D5FDA, 0x82C67F13,
-    0xE5AE8ED8, 0x82BC1FA1,
-    0xE5DFC1E4, 0x82B1D381,
-    0xE610F8F9, 0x82A79AB3,
-    0xE642340D, 0x829D753A,
-    0xE6737319, 0x82936316,
-    0xE6A4B616, 0x8289644A,
-    0xE6D5FCFC, 0x827F78D8,
-    0xE70747C3, 0x8275A0C0,
-    0xE7389664, 0x826BDC04,
-    0xE769E8D8, 0x82622AA5,
-    0xE79B3F16, 0x82588CA6,
-    0xE7CC9917, 0x824F0208,
-    0xE7FDF6D3, 0x82458ACB,
-    0xE82F5844, 0x823C26F2,
-    0xE860BD60, 0x8232D67E,
-    0xE8922621, 0x82299971,
-    0xE8C3927F, 0x82206FCB,
-    0xE8F50273, 0x8217598F,
-    0xE92675F4, 0x820E56BE,
-    0xE957ECFB, 0x82056758,
-    0xE9896780, 0x81FC8B60,
-    0xE9BAE57C, 0x81F3C2D7,
-    0xE9EC66E8, 0x81EB0DBD,
-    0xEA1DEBBB, 0x81E26C16,
-    0xEA4F73EE, 0x81D9DDE1,
-    0xEA80FF79, 0x81D16320,
-    0xEAB28E55, 0x81C8FBD5,
-    0xEAE4207A, 0x81C0A801,
-    0xEB15B5E0, 0x81B867A4,
-    0xEB474E80, 0x81B03AC1,
-    0xEB78EA52, 0x81A82159,
-    0xEBAA894E, 0x81A01B6C,
-    0xEBDC2B6D, 0x819828FD,
-    0xEC0DD0A8, 0x81904A0C,
-    0xEC3F78F5, 0x81887E9A,
-    0xEC71244F, 0x8180C6A9,
-    0xECA2D2AC, 0x8179223A,
-    0xECD48406, 0x8171914E,
-    0xED063855, 0x816A13E6,
-    0xED37EF91, 0x8162AA03,
-    0xED69A9B2, 0x815B53A8,
-    0xED9B66B2, 0x815410D3,
-    0xEDCD2687, 0x814CE188,
-    0xEDFEE92B, 0x8145C5C6,
-    0xEE30AE95, 0x813EBD90,
-    0xEE6276BF, 0x8137C8E6,
-    0xEE9441A0, 0x8130E7C8,
-    0xEEC60F31, 0x812A1A39,
-    0xEEF7DF6A, 0x81236039,
-    0xEF29B243, 0x811CB9CA,
-    0xEF5B87B5, 0x811626EC,
-    0xEF8D5FB8, 0x810FA7A0,
-    0xEFBF3A44, 0x81093BE8,
-    0xEFF11752, 0x8102E3C3,
-    0xF022F6DA, 0x80FC9F35,
-    0xF054D8D4, 0x80F66E3C,
-    0xF086BD39, 0x80F050DB,
-    0xF0B8A401, 0x80EA4712,
-    0xF0EA8D23, 0x80E450E2,
-    0xF11C789A, 0x80DE6E4C,
-    0xF14E665C, 0x80D89F51,
-    0xF1805662, 0x80D2E3F1,
-    0xF1B248A5, 0x80CD3C2F,
-    0xF1E43D1C, 0x80C7A80A,
-    0xF21633C0, 0x80C22783,
-    0xF2482C89, 0x80BCBA9C,
-    0xF27A2770, 0x80B76155,
-    0xF2AC246D, 0x80B21BAF,
-    0xF2DE2378, 0x80ACE9AB,
-    0xF310248A, 0x80A7CB49,
-    0xF342279A, 0x80A2C08B,
-    0xF3742CA1, 0x809DC970,
-    0xF3A63398, 0x8098E5FB,
-    0xF3D83C76, 0x8094162B,
-    0xF40A4734, 0x808F5A02,
-    0xF43C53CA, 0x808AB180,
-    0xF46E6231, 0x80861CA5,
-    0xF4A07260, 0x80819B74,
-    0xF4D28451, 0x807D2DEB,
-    0xF50497FA, 0x8078D40D,
-    0xF536AD55, 0x80748DD9,
-    0xF568C45A, 0x80705B50,
-    0xF59ADD01, 0x806C3C73,
-    0xF5CCF743, 0x80683143,
-    0xF5FF1317, 0x806439C0,
-    0xF6313076, 0x806055EA,
-    0xF6634F58, 0x805C85C3,
-    0xF6956FB6, 0x8058C94C,
-    0xF6C79188, 0x80552083,
-    0xF6F9B4C5, 0x80518B6B,
-    0xF72BD967, 0x804E0A03,
-    0xF75DFF65, 0x804A9C4D,
-    0xF79026B8, 0x80474248,
-    0xF7C24F58, 0x8043FBF6,
-    0xF7F4793E, 0x8040C956,
-    0xF826A461, 0x803DAA69,
-    0xF858D0BA, 0x803A9F31,
-    0xF88AFE41, 0x8037A7AC,
-    0xF8BD2CEF, 0x8034C3DC,
-    0xF8EF5CBB, 0x8031F3C1,
-    0xF9218D9E, 0x802F375C,
-    0xF953BF90, 0x802C8EAD,
-    0xF985F28A, 0x8029F9B4,
-    0xF9B82683, 0x80277872,
-    0xF9EA5B75, 0x80250AE7,
-    0xFA1C9156, 0x8022B113,
-    0xFA4EC820, 0x80206AF8,
-    0xFA80FFCB, 0x801E3894,
-    0xFAB3384F, 0x801C19E9,
-    0xFAE571A4, 0x801A0EF7,
-    0xFB17ABC2, 0x801817BF,
-    0xFB49E6A2, 0x80163440,
-    0xFB7C223C, 0x8014647A,
-    0xFBAE5E89, 0x8012A86F,
-    0xFBE09B80, 0x8011001E,
-    0xFC12D919, 0x800F6B88,
-    0xFC45174E, 0x800DEAAC,
-    0xFC775616, 0x800C7D8C,
-    0xFCA99569, 0x800B2427,
-    0xFCDBD541, 0x8009DE7D,
-    0xFD0E1594, 0x8008AC90,
-    0xFD40565B, 0x80078E5E,
-    0xFD72978F, 0x800683E8,
-    0xFDA4D928, 0x80058D2E,
-    0xFDD71B1E, 0x8004AA31,
-    0xFE095D69, 0x8003DAF0,
-    0xFE3BA001, 0x80031F6C,
-    0xFE6DE2E0, 0x800277A5,
-    0xFEA025FC, 0x8001E39B,
-    0xFED2694F, 0x8001634D,
-    0xFF04ACD0, 0x8000F6BD,
-    0xFF36F078, 0x80009DE9,
-    0xFF69343E, 0x800058D3,
-    0xFF9B781D, 0x8000277A,
-    0xFFCDBC0A, 0x800009DE
-};
-
-
-
-/*    
-* @brief  q15 Twiddle factors Table    
-*/
-
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 16	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_16_q15[24] = {
-    0x7FFF, 0x0000,
-    0x7641, 0x30FB,
-    0x5A82, 0x5A82,
-    0x30FB, 0x7641,
-    0x0000, 0x7FFF,
-    0xCF04, 0x7641,
-    0xA57D, 0x5A82,
-    0x89BE, 0x30FB,
-    0x8000, 0x0000,
-    0x89BE, 0xCF04,
-    0xA57D, 0xA57D,
-    0xCF04, 0x89BE
-};
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 32	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_32_q15[48] = {
-    0x7FFF, 0x0000,
-    0x7D8A, 0x18F8,
-    0x7641, 0x30FB,
-    0x6A6D, 0x471C,
-    0x5A82, 0x5A82,
-    0x471C, 0x6A6D,
-    0x30FB, 0x7641,
-    0x18F8, 0x7D8A,
-    0x0000, 0x7FFF,
-    0xE707, 0x7D8A,
-    0xCF04, 0x7641,
-    0xB8E3, 0x6A6D,
-    0xA57D, 0x5A82,
-    0x9592, 0x471C,
-    0x89BE, 0x30FB,
-    0x8275, 0x18F8,
-    0x8000, 0x0000,
-    0x8275, 0xE707,
-    0x89BE, 0xCF04,
-    0x9592, 0xB8E3,
-    0xA57D, 0xA57D,
-    0xB8E3, 0x9592,
-    0xCF04, 0x89BE,
-    0xE707, 0x8275
-};
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 64	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_64_q15[96] = {
-    0x7FFF, 0x0000,
-    0x7F62, 0x0C8B,
-    0x7D8A, 0x18F8,
-    0x7A7D, 0x2528,
-    0x7641, 0x30FB,
-    0x70E2, 0x3C56,
-    0x6A6D, 0x471C,
-    0x62F2, 0x5133,
-    0x5A82, 0x5A82,
-    0x5133, 0x62F2,
-    0x471C, 0x6A6D,
-    0x3C56, 0x70E2,
-    0x30FB, 0x7641,
-    0x2528, 0x7A7D,
-    0x18F8, 0x7D8A,
-    0x0C8B, 0x7F62,
-    0x0000, 0x7FFF,
-    0xF374, 0x7F62,
-    0xE707, 0x7D8A,
-    0xDAD7, 0x7A7D,
-    0xCF04, 0x7641,
-    0xC3A9, 0x70E2,
-    0xB8E3, 0x6A6D,
-    0xAECC, 0x62F2,
-    0xA57D, 0x5A82,
-    0x9D0D, 0x5133,
-    0x9592, 0x471C,
-    0x8F1D, 0x3C56,
-    0x89BE, 0x30FB,
-    0x8582, 0x2528,
-    0x8275, 0x18F8,
-    0x809D, 0x0C8B,
-    0x8000, 0x0000,
-    0x809D, 0xF374,
-    0x8275, 0xE707,
-    0x8582, 0xDAD7,
-    0x89BE, 0xCF04,
-    0x8F1D, 0xC3A9,
-    0x9592, 0xB8E3,
-    0x9D0D, 0xAECC,
-    0xA57D, 0xA57D,
-    0xAECC, 0x9D0D,
-    0xB8E3, 0x9592,
-    0xC3A9, 0x8F1D,
-    0xCF04, 0x89BE,
-    0xDAD7, 0x8582,
-    0xE707, 0x8275,
-    0xF374, 0x809D
-};
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 128	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_128_q15[192] = {
-    0x7FFF, 0x0000,
-    0x7FD8, 0x0647,
-    0x7F62, 0x0C8B,
-    0x7E9D, 0x12C8,
-    0x7D8A, 0x18F8,
-    0x7C29, 0x1F19,
-    0x7A7D, 0x2528,
-    0x7884, 0x2B1F,
-    0x7641, 0x30FB,
-    0x73B5, 0x36BA,
-    0x70E2, 0x3C56,
-    0x6DCA, 0x41CE,
-    0x6A6D, 0x471C,
-    0x66CF, 0x4C3F,
-    0x62F2, 0x5133,
-    0x5ED7, 0x55F5,
-    0x5A82, 0x5A82,
-    0x55F5, 0x5ED7,
-    0x5133, 0x62F2,
-    0x4C3F, 0x66CF,
-    0x471C, 0x6A6D,
-    0x41CE, 0x6DCA,
-    0x3C56, 0x70E2,
-    0x36BA, 0x73B5,
-    0x30FB, 0x7641,
-    0x2B1F, 0x7884,
-    0x2528, 0x7A7D,
-    0x1F19, 0x7C29,
-    0x18F8, 0x7D8A,
-    0x12C8, 0x7E9D,
-    0x0C8B, 0x7F62,
-    0x0647, 0x7FD8,
-    0x0000, 0x7FFF,
-    0xF9B8, 0x7FD8,
-    0xF374, 0x7F62,
-    0xED37, 0x7E9D,
-    0xE707, 0x7D8A,
-    0xE0E6, 0x7C29,
-    0xDAD7, 0x7A7D,
-    0xD4E0, 0x7884,
-    0xCF04, 0x7641,
-    0xC945, 0x73B5,
-    0xC3A9, 0x70E2,
-    0xBE31, 0x6DCA,
-    0xB8E3, 0x6A6D,
-    0xB3C0, 0x66CF,
-    0xAECC, 0x62F2,
-    0xAA0A, 0x5ED7,
-    0xA57D, 0x5A82,
-    0xA128, 0x55F5,
-    0x9D0D, 0x5133,
-    0x9930, 0x4C3F,
-    0x9592, 0x471C,
-    0x9235, 0x41CE,
-    0x8F1D, 0x3C56,
-    0x8C4A, 0x36BA,
-    0x89BE, 0x30FB,
-    0x877B, 0x2B1F,
-    0x8582, 0x2528,
-    0x83D6, 0x1F19,
-    0x8275, 0x18F8,
-    0x8162, 0x12C8,
-    0x809D, 0x0C8B,
-    0x8027, 0x0647,
-    0x8000, 0x0000,
-    0x8027, 0xF9B8,
-    0x809D, 0xF374,
-    0x8162, 0xED37,
-    0x8275, 0xE707,
-    0x83D6, 0xE0E6,
-    0x8582, 0xDAD7,
-    0x877B, 0xD4E0,
-    0x89BE, 0xCF04,
-    0x8C4A, 0xC945,
-    0x8F1D, 0xC3A9,
-    0x9235, 0xBE31,
-    0x9592, 0xB8E3,
-    0x9930, 0xB3C0,
-    0x9D0D, 0xAECC,
-    0xA128, 0xAA0A,
-    0xA57D, 0xA57D,
-    0xAA0A, 0xA128,
-    0xAECC, 0x9D0D,
-    0xB3C0, 0x9930,
-    0xB8E3, 0x9592,
-    0xBE31, 0x9235,
-    0xC3A9, 0x8F1D,
-    0xC945, 0x8C4A,
-    0xCF04, 0x89BE,
-    0xD4E0, 0x877B,
-    0xDAD7, 0x8582,
-    0xE0E6, 0x83D6,
-    0xE707, 0x8275,
-    0xED37, 0x8162,
-    0xF374, 0x809D,
-    0xF9B8, 0x8027
-};
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 256	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_256_q15[384] = {
-    0x7FFF, 0x0000,
-    0x7FF6, 0x0324,
-    0x7FD8, 0x0647,
-    0x7FA7, 0x096A,
-    0x7F62, 0x0C8B,
-    0x7F09, 0x0FAB,
-    0x7E9D, 0x12C8,
-    0x7E1D, 0x15E2,
-    0x7D8A, 0x18F8,
-    0x7CE3, 0x1C0B,
-    0x7C29, 0x1F19,
-    0x7B5D, 0x2223,
-    0x7A7D, 0x2528,
-    0x798A, 0x2826,
-    0x7884, 0x2B1F,
-    0x776C, 0x2E11,
-    0x7641, 0x30FB,
-    0x7504, 0x33DE,
-    0x73B5, 0x36BA,
-    0x7255, 0x398C,
-    0x70E2, 0x3C56,
-    0x6F5F, 0x3F17,
-    0x6DCA, 0x41CE,
-    0x6C24, 0x447A,
-    0x6A6D, 0x471C,
-    0x68A6, 0x49B4,
-    0x66CF, 0x4C3F,
-    0x64E8, 0x4EBF,
-    0x62F2, 0x5133,
-    0x60EC, 0x539B,
-    0x5ED7, 0x55F5,
-    0x5CB4, 0x5842,
-    0x5A82, 0x5A82,
-    0x5842, 0x5CB4,
-    0x55F5, 0x5ED7,
-    0x539B, 0x60EC,
-    0x5133, 0x62F2,
-    0x4EBF, 0x64E8,
-    0x4C3F, 0x66CF,
-    0x49B4, 0x68A6,
-    0x471C, 0x6A6D,
-    0x447A, 0x6C24,
-    0x41CE, 0x6DCA,
-    0x3F17, 0x6F5F,
-    0x3C56, 0x70E2,
-    0x398C, 0x7255,
-    0x36BA, 0x73B5,
-    0x33DE, 0x7504,
-    0x30FB, 0x7641,
-    0x2E11, 0x776C,
-    0x2B1F, 0x7884,
-    0x2826, 0x798A,
-    0x2528, 0x7A7D,
-    0x2223, 0x7B5D,
-    0x1F19, 0x7C29,
-    0x1C0B, 0x7CE3,
-    0x18F8, 0x7D8A,
-    0x15E2, 0x7E1D,
-    0x12C8, 0x7E9D,
-    0x0FAB, 0x7F09,
-    0x0C8B, 0x7F62,
-    0x096A, 0x7FA7,
-    0x0647, 0x7FD8,
-    0x0324, 0x7FF6,
-    0x0000, 0x7FFF,
-    0xFCDB, 0x7FF6,
-    0xF9B8, 0x7FD8,
-    0xF695, 0x7FA7,
-    0xF374, 0x7F62,
-    0xF054, 0x7F09,
-    0xED37, 0x7E9D,
-    0xEA1D, 0x7E1D,
-    0xE707, 0x7D8A,
-    0xE3F4, 0x7CE3,
-    0xE0E6, 0x7C29,
-    0xDDDC, 0x7B5D,
-    0xDAD7, 0x7A7D,
-    0xD7D9, 0x798A,
-    0xD4E0, 0x7884,
-    0xD1EE, 0x776C,
-    0xCF04, 0x7641,
-    0xCC21, 0x7504,
-    0xC945, 0x73B5,
-    0xC673, 0x7255,
-    0xC3A9, 0x70E2,
-    0xC0E8, 0x6F5F,
-    0xBE31, 0x6DCA,
-    0xBB85, 0x6C24,
-    0xB8E3, 0x6A6D,
-    0xB64B, 0x68A6,
-    0xB3C0, 0x66CF,
-    0xB140, 0x64E8,
-    0xAECC, 0x62F2,
-    0xAC64, 0x60EC,
-    0xAA0A, 0x5ED7,
-    0xA7BD, 0x5CB4,
-    0xA57D, 0x5A82,
-    0xA34B, 0x5842,
-    0xA128, 0x55F5,
-    0x9F13, 0x539B,
-    0x9D0D, 0x5133,
-    0x9B17, 0x4EBF,
-    0x9930, 0x4C3F,
-    0x9759, 0x49B4,
-    0x9592, 0x471C,
-    0x93DB, 0x447A,
-    0x9235, 0x41CE,
-    0x90A0, 0x3F17,
-    0x8F1D, 0x3C56,
-    0x8DAA, 0x398C,
-    0x8C4A, 0x36BA,
-    0x8AFB, 0x33DE,
-    0x89BE, 0x30FB,
-    0x8893, 0x2E11,
-    0x877B, 0x2B1F,
-    0x8675, 0x2826,
-    0x8582, 0x2528,
-    0x84A2, 0x2223,
-    0x83D6, 0x1F19,
-    0x831C, 0x1C0B,
-    0x8275, 0x18F8,
-    0x81E2, 0x15E2,
-    0x8162, 0x12C8,
-    0x80F6, 0x0FAB,
-    0x809D, 0x0C8B,
-    0x8058, 0x096A,
-    0x8027, 0x0647,
-    0x8009, 0x0324,
-    0x8000, 0x0000,
-    0x8009, 0xFCDB,
-    0x8027, 0xF9B8,
-    0x8058, 0xF695,
-    0x809D, 0xF374,
-    0x80F6, 0xF054,
-    0x8162, 0xED37,
-    0x81E2, 0xEA1D,
-    0x8275, 0xE707,
-    0x831C, 0xE3F4,
-    0x83D6, 0xE0E6,
-    0x84A2, 0xDDDC,
-    0x8582, 0xDAD7,
-    0x8675, 0xD7D9,
-    0x877B, 0xD4E0,
-    0x8893, 0xD1EE,
-    0x89BE, 0xCF04,
-    0x8AFB, 0xCC21,
-    0x8C4A, 0xC945,
-    0x8DAA, 0xC673,
-    0x8F1D, 0xC3A9,
-    0x90A0, 0xC0E8,
-    0x9235, 0xBE31,
-    0x93DB, 0xBB85,
-    0x9592, 0xB8E3,
-    0x9759, 0xB64B,
-    0x9930, 0xB3C0,
-    0x9B17, 0xB140,
-    0x9D0D, 0xAECC,
-    0x9F13, 0xAC64,
-    0xA128, 0xAA0A,
-    0xA34B, 0xA7BD,
-    0xA57D, 0xA57D,
-    0xA7BD, 0xA34B,
-    0xAA0A, 0xA128,
-    0xAC64, 0x9F13,
-    0xAECC, 0x9D0D,
-    0xB140, 0x9B17,
-    0xB3C0, 0x9930,
-    0xB64B, 0x9759,
-    0xB8E3, 0x9592,
-    0xBB85, 0x93DB,
-    0xBE31, 0x9235,
-    0xC0E8, 0x90A0,
-    0xC3A9, 0x8F1D,
-    0xC673, 0x8DAA,
-    0xC945, 0x8C4A,
-    0xCC21, 0x8AFB,
-    0xCF04, 0x89BE,
-    0xD1EE, 0x8893,
-    0xD4E0, 0x877B,
-    0xD7D9, 0x8675,
-    0xDAD7, 0x8582,
-    0xDDDC, 0x84A2,
-    0xE0E6, 0x83D6,
-    0xE3F4, 0x831C,
-    0xE707, 0x8275,
-    0xEA1D, 0x81E2,
-    0xED37, 0x8162,
-    0xF054, 0x80F6,
-    0xF374, 0x809D,
-    0xF695, 0x8058,
-    0xF9B8, 0x8027,
-    0xFCDB, 0x8009
-};
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 512	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_512_q15[768] = {
-    0x7FFF, 0x0000,
-    0x7FFD, 0x0192,
-    0x7FF6, 0x0324,
-    0x7FE9, 0x04B6,
-    0x7FD8, 0x0647,
-    0x7FC2, 0x07D9,
-    0x7FA7, 0x096A,
-    0x7F87, 0x0AFB,
-    0x7F62, 0x0C8B,
-    0x7F38, 0x0E1B,
-    0x7F09, 0x0FAB,
-    0x7ED5, 0x1139,
-    0x7E9D, 0x12C8,
-    0x7E5F, 0x1455,
-    0x7E1D, 0x15E2,
-    0x7DD6, 0x176D,
-    0x7D8A, 0x18F8,
-    0x7D39, 0x1A82,
-    0x7CE3, 0x1C0B,
-    0x7C89, 0x1D93,
-    0x7C29, 0x1F19,
-    0x7BC5, 0x209F,
-    0x7B5D, 0x2223,
-    0x7AEF, 0x23A6,
-    0x7A7D, 0x2528,
-    0x7A05, 0x26A8,
-    0x798A, 0x2826,
-    0x7909, 0x29A3,
-    0x7884, 0x2B1F,
-    0x77FA, 0x2C98,
-    0x776C, 0x2E11,
-    0x76D9, 0x2F87,
-    0x7641, 0x30FB,
-    0x75A5, 0x326E,
-    0x7504, 0x33DE,
-    0x745F, 0x354D,
-    0x73B5, 0x36BA,
-    0x7307, 0x3824,
-    0x7255, 0x398C,
-    0x719E, 0x3AF2,
-    0x70E2, 0x3C56,
-    0x7023, 0x3DB8,
-    0x6F5F, 0x3F17,
-    0x6E96, 0x4073,
-    0x6DCA, 0x41CE,
-    0x6CF9, 0x4325,
-    0x6C24, 0x447A,
-    0x6B4A, 0x45CD,
-    0x6A6D, 0x471C,
-    0x698C, 0x4869,
-    0x68A6, 0x49B4,
-    0x67BD, 0x4AFB,
-    0x66CF, 0x4C3F,
-    0x65DD, 0x4D81,
-    0x64E8, 0x4EBF,
-    0x63EF, 0x4FFB,
-    0x62F2, 0x5133,
-    0x61F1, 0x5269,
-    0x60EC, 0x539B,
-    0x5FE3, 0x54CA,
-    0x5ED7, 0x55F5,
-    0x5DC7, 0x571D,
-    0x5CB4, 0x5842,
-    0x5B9D, 0x5964,
-    0x5A82, 0x5A82,
-    0x5964, 0x5B9D,
-    0x5842, 0x5CB4,
-    0x571D, 0x5DC7,
-    0x55F5, 0x5ED7,
-    0x54CA, 0x5FE3,
-    0x539B, 0x60EC,
-    0x5269, 0x61F1,
-    0x5133, 0x62F2,
-    0x4FFB, 0x63EF,
-    0x4EBF, 0x64E8,
-    0x4D81, 0x65DD,
-    0x4C3F, 0x66CF,
-    0x4AFB, 0x67BD,
-    0x49B4, 0x68A6,
-    0x4869, 0x698C,
-    0x471C, 0x6A6D,
-    0x45CD, 0x6B4A,
-    0x447A, 0x6C24,
-    0x4325, 0x6CF9,
-    0x41CE, 0x6DCA,
-    0x4073, 0x6E96,
-    0x3F17, 0x6F5F,
-    0x3DB8, 0x7023,
-    0x3C56, 0x70E2,
-    0x3AF2, 0x719E,
-    0x398C, 0x7255,
-    0x3824, 0x7307,
-    0x36BA, 0x73B5,
-    0x354D, 0x745F,
-    0x33DE, 0x7504,
-    0x326E, 0x75A5,
-    0x30FB, 0x7641,
-    0x2F87, 0x76D9,
-    0x2E11, 0x776C,
-    0x2C98, 0x77FA,
-    0x2B1F, 0x7884,
-    0x29A3, 0x7909,
-    0x2826, 0x798A,
-    0x26A8, 0x7A05,
-    0x2528, 0x7A7D,
-    0x23A6, 0x7AEF,
-    0x2223, 0x7B5D,
-    0x209F, 0x7BC5,
-    0x1F19, 0x7C29,
-    0x1D93, 0x7C89,
-    0x1C0B, 0x7CE3,
-    0x1A82, 0x7D39,
-    0x18F8, 0x7D8A,
-    0x176D, 0x7DD6,
-    0x15E2, 0x7E1D,
-    0x1455, 0x7E5F,
-    0x12C8, 0x7E9D,
-    0x1139, 0x7ED5,
-    0x0FAB, 0x7F09,
-    0x0E1B, 0x7F38,
-    0x0C8B, 0x7F62,
-    0x0AFB, 0x7F87,
-    0x096A, 0x7FA7,
-    0x07D9, 0x7FC2,
-    0x0647, 0x7FD8,
-    0x04B6, 0x7FE9,
-    0x0324, 0x7FF6,
-    0x0192, 0x7FFD,
-    0x0000, 0x7FFF,
-    0xFE6D, 0x7FFD,
-    0xFCDB, 0x7FF6,
-    0xFB49, 0x7FE9,
-    0xF9B8, 0x7FD8,
-    0xF826, 0x7FC2,
-    0xF695, 0x7FA7,
-    0xF504, 0x7F87,
-    0xF374, 0x7F62,
-    0xF1E4, 0x7F38,
-    0xF054, 0x7F09,
-    0xEEC6, 0x7ED5,
-    0xED37, 0x7E9D,
-    0xEBAA, 0x7E5F,
-    0xEA1D, 0x7E1D,
-    0xE892, 0x7DD6,
-    0xE707, 0x7D8A,
-    0xE57D, 0x7D39,
-    0xE3F4, 0x7CE3,
-    0xE26C, 0x7C89,
-    0xE0E6, 0x7C29,
-    0xDF60, 0x7BC5,
-    0xDDDC, 0x7B5D,
-    0xDC59, 0x7AEF,
-    0xDAD7, 0x7A7D,
-    0xD957, 0x7A05,
-    0xD7D9, 0x798A,
-    0xD65C, 0x7909,
-    0xD4E0, 0x7884,
-    0xD367, 0x77FA,
-    0xD1EE, 0x776C,
-    0xD078, 0x76D9,
-    0xCF04, 0x7641,
-    0xCD91, 0x75A5,
-    0xCC21, 0x7504,
-    0xCAB2, 0x745F,
-    0xC945, 0x73B5,
-    0xC7DB, 0x7307,
-    0xC673, 0x7255,
-    0xC50D, 0x719E,
-    0xC3A9, 0x70E2,
-    0xC247, 0x7023,
-    0xC0E8, 0x6F5F,
-    0xBF8C, 0x6E96,
-    0xBE31, 0x6DCA,
-    0xBCDA, 0x6CF9,
-    0xBB85, 0x6C24,
-    0xBA32, 0x6B4A,
-    0xB8E3, 0x6A6D,
-    0xB796, 0x698C,
-    0xB64B, 0x68A6,
-    0xB504, 0x67BD,
-    0xB3C0, 0x66CF,
-    0xB27E, 0x65DD,
-    0xB140, 0x64E8,
-    0xB004, 0x63EF,
-    0xAECC, 0x62F2,
-    0xAD96, 0x61F1,
-    0xAC64, 0x60EC,
-    0xAB35, 0x5FE3,
-    0xAA0A, 0x5ED7,
-    0xA8E2, 0x5DC7,
-    0xA7BD, 0x5CB4,
-    0xA69B, 0x5B9D,
-    0xA57D, 0x5A82,
-    0xA462, 0x5964,
-    0xA34B, 0x5842,
-    0xA238, 0x571D,
-    0xA128, 0x55F5,
-    0xA01C, 0x54CA,
-    0x9F13, 0x539B,
-    0x9E0E, 0x5269,
-    0x9D0D, 0x5133,
-    0x9C10, 0x4FFB,
-    0x9B17, 0x4EBF,
-    0x9A22, 0x4D81,
-    0x9930, 0x4C3F,
-    0x9842, 0x4AFB,
-    0x9759, 0x49B4,
-    0x9673, 0x4869,
-    0x9592, 0x471C,
-    0x94B5, 0x45CD,
-    0x93DB, 0x447A,
-    0x9306, 0x4325,
-    0x9235, 0x41CE,
-    0x9169, 0x4073,
-    0x90A0, 0x3F17,
-    0x8FDC, 0x3DB8,
-    0x8F1D, 0x3C56,
-    0x8E61, 0x3AF2,
-    0x8DAA, 0x398C,
-    0x8CF8, 0x3824,
-    0x8C4A, 0x36BA,
-    0x8BA0, 0x354D,
-    0x8AFB, 0x33DE,
-    0x8A5A, 0x326E,
-    0x89BE, 0x30FB,
-    0x8926, 0x2F87,
-    0x8893, 0x2E11,
-    0x8805, 0x2C98,
-    0x877B, 0x2B1F,
-    0x86F6, 0x29A3,
-    0x8675, 0x2826,
-    0x85FA, 0x26A8,
-    0x8582, 0x2528,
-    0x8510, 0x23A6,
-    0x84A2, 0x2223,
-    0x843A, 0x209F,
-    0x83D6, 0x1F19,
-    0x8376, 0x1D93,
-    0x831C, 0x1C0B,
-    0x82C6, 0x1A82,
-    0x8275, 0x18F8,
-    0x8229, 0x176D,
-    0x81E2, 0x15E2,
-    0x81A0, 0x1455,
-    0x8162, 0x12C8,
-    0x812A, 0x1139,
-    0x80F6, 0x0FAB,
-    0x80C7, 0x0E1B,
-    0x809D, 0x0C8B,
-    0x8078, 0x0AFB,
-    0x8058, 0x096A,
-    0x803D, 0x07D9,
-    0x8027, 0x0647,
-    0x8016, 0x04B6,
-    0x8009, 0x0324,
-    0x8002, 0x0192,
-    0x8000, 0x0000,
-    0x8002, 0xFE6D,
-    0x8009, 0xFCDB,
-    0x8016, 0xFB49,
-    0x8027, 0xF9B8,
-    0x803D, 0xF826,
-    0x8058, 0xF695,
-    0x8078, 0xF504,
-    0x809D, 0xF374,
-    0x80C7, 0xF1E4,
-    0x80F6, 0xF054,
-    0x812A, 0xEEC6,
-    0x8162, 0xED37,
-    0x81A0, 0xEBAA,
-    0x81E2, 0xEA1D,
-    0x8229, 0xE892,
-    0x8275, 0xE707,
-    0x82C6, 0xE57D,
-    0x831C, 0xE3F4,
-    0x8376, 0xE26C,
-    0x83D6, 0xE0E6,
-    0x843A, 0xDF60,
-    0x84A2, 0xDDDC,
-    0x8510, 0xDC59,
-    0x8582, 0xDAD7,
-    0x85FA, 0xD957,
-    0x8675, 0xD7D9,
-    0x86F6, 0xD65C,
-    0x877B, 0xD4E0,
-    0x8805, 0xD367,
-    0x8893, 0xD1EE,
-    0x8926, 0xD078,
-    0x89BE, 0xCF04,
-    0x8A5A, 0xCD91,
-    0x8AFB, 0xCC21,
-    0x8BA0, 0xCAB2,
-    0x8C4A, 0xC945,
-    0x8CF8, 0xC7DB,
-    0x8DAA, 0xC673,
-    0x8E61, 0xC50D,
-    0x8F1D, 0xC3A9,
-    0x8FDC, 0xC247,
-    0x90A0, 0xC0E8,
-    0x9169, 0xBF8C,
-    0x9235, 0xBE31,
-    0x9306, 0xBCDA,
-    0x93DB, 0xBB85,
-    0x94B5, 0xBA32,
-    0x9592, 0xB8E3,
-    0x9673, 0xB796,
-    0x9759, 0xB64B,
-    0x9842, 0xB504,
-    0x9930, 0xB3C0,
-    0x9A22, 0xB27E,
-    0x9B17, 0xB140,
-    0x9C10, 0xB004,
-    0x9D0D, 0xAECC,
-    0x9E0E, 0xAD96,
-    0x9F13, 0xAC64,
-    0xA01C, 0xAB35,
-    0xA128, 0xAA0A,
-    0xA238, 0xA8E2,
-    0xA34B, 0xA7BD,
-    0xA462, 0xA69B,
-    0xA57D, 0xA57D,
-    0xA69B, 0xA462,
-    0xA7BD, 0xA34B,
-    0xA8E2, 0xA238,
-    0xAA0A, 0xA128,
-    0xAB35, 0xA01C,
-    0xAC64, 0x9F13,
-    0xAD96, 0x9E0E,
-    0xAECC, 0x9D0D,
-    0xB004, 0x9C10,
-    0xB140, 0x9B17,
-    0xB27E, 0x9A22,
-    0xB3C0, 0x9930,
-    0xB504, 0x9842,
-    0xB64B, 0x9759,
-    0xB796, 0x9673,
-    0xB8E3, 0x9592,
-    0xBA32, 0x94B5,
-    0xBB85, 0x93DB,
-    0xBCDA, 0x9306,
-    0xBE31, 0x9235,
-    0xBF8C, 0x9169,
-    0xC0E8, 0x90A0,
-    0xC247, 0x8FDC,
-    0xC3A9, 0x8F1D,
-    0xC50D, 0x8E61,
-    0xC673, 0x8DAA,
-    0xC7DB, 0x8CF8,
-    0xC945, 0x8C4A,
-    0xCAB2, 0x8BA0,
-    0xCC21, 0x8AFB,
-    0xCD91, 0x8A5A,
-    0xCF04, 0x89BE,
-    0xD078, 0x8926,
-    0xD1EE, 0x8893,
-    0xD367, 0x8805,
-    0xD4E0, 0x877B,
-    0xD65C, 0x86F6,
-    0xD7D9, 0x8675,
-    0xD957, 0x85FA,
-    0xDAD7, 0x8582,
-    0xDC59, 0x8510,
-    0xDDDC, 0x84A2,
-    0xDF60, 0x843A,
-    0xE0E6, 0x83D6,
-    0xE26C, 0x8376,
-    0xE3F4, 0x831C,
-    0xE57D, 0x82C6,
-    0xE707, 0x8275,
-    0xE892, 0x8229,
-    0xEA1D, 0x81E2,
-    0xEBAA, 0x81A0,
-    0xED37, 0x8162,
-    0xEEC6, 0x812A,
-    0xF054, 0x80F6,
-    0xF1E4, 0x80C7,
-    0xF374, 0x809D,
-    0xF504, 0x8078,
-    0xF695, 0x8058,
-    0xF826, 0x803D,
-    0xF9B8, 0x8027,
-    0xFB49, 0x8016,
-    0xFCDB, 0x8009,
-    0xFE6D, 0x8002
-};
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 1024	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_1024_q15[1536] = {
-    0x7FFF, 0x0000,
-    0x7FFF, 0x00C9,
-    0x7FFD, 0x0192,
-    0x7FFA, 0x025B,
-    0x7FF6, 0x0324,
-    0x7FF0, 0x03ED,
-    0x7FE9, 0x04B6,
-    0x7FE1, 0x057F,
-    0x7FD8, 0x0647,
-    0x7FCE, 0x0710,
-    0x7FC2, 0x07D9,
-    0x7FB5, 0x08A2,
-    0x7FA7, 0x096A,
-    0x7F97, 0x0A33,
-    0x7F87, 0x0AFB,
-    0x7F75, 0x0BC3,
-    0x7F62, 0x0C8B,
-    0x7F4D, 0x0D53,
-    0x7F38, 0x0E1B,
-    0x7F21, 0x0EE3,
-    0x7F09, 0x0FAB,
-    0x7EF0, 0x1072,
-    0x7ED5, 0x1139,
-    0x7EBA, 0x1201,
-    0x7E9D, 0x12C8,
-    0x7E7F, 0x138E,
-    0x7E5F, 0x1455,
-    0x7E3F, 0x151B,
-    0x7E1D, 0x15E2,
-    0x7DFA, 0x16A8,
-    0x7DD6, 0x176D,
-    0x7DB0, 0x1833,
-    0x7D8A, 0x18F8,
-    0x7D62, 0x19BD,
-    0x7D39, 0x1A82,
-    0x7D0F, 0x1B47,
-    0x7CE3, 0x1C0B,
-    0x7CB7, 0x1CCF,
-    0x7C89, 0x1D93,
-    0x7C5A, 0x1E56,
-    0x7C29, 0x1F19,
-    0x7BF8, 0x1FDC,
-    0x7BC5, 0x209F,
-    0x7B92, 0x2161,
-    0x7B5D, 0x2223,
-    0x7B26, 0x22E5,
-    0x7AEF, 0x23A6,
-    0x7AB6, 0x2467,
-    0x7A7D, 0x2528,
-    0x7A42, 0x25E8,
-    0x7A05, 0x26A8,
-    0x79C8, 0x2767,
-    0x798A, 0x2826,
-    0x794A, 0x28E5,
-    0x7909, 0x29A3,
-    0x78C7, 0x2A61,
-    0x7884, 0x2B1F,
-    0x7840, 0x2BDC,
-    0x77FA, 0x2C98,
-    0x77B4, 0x2D55,
-    0x776C, 0x2E11,
-    0x7723, 0x2ECC,
-    0x76D9, 0x2F87,
-    0x768E, 0x3041,
-    0x7641, 0x30FB,
-    0x75F4, 0x31B5,
-    0x75A5, 0x326E,
-    0x7555, 0x3326,
-    0x7504, 0x33DE,
-    0x74B2, 0x3496,
-    0x745F, 0x354D,
-    0x740B, 0x3604,
-    0x73B5, 0x36BA,
-    0x735F, 0x376F,
-    0x7307, 0x3824,
-    0x72AF, 0x38D8,
-    0x7255, 0x398C,
-    0x71FA, 0x3A40,
-    0x719E, 0x3AF2,
-    0x7141, 0x3BA5,
-    0x70E2, 0x3C56,
-    0x7083, 0x3D07,
-    0x7023, 0x3DB8,
-    0x6FC1, 0x3E68,
-    0x6F5F, 0x3F17,
-    0x6EFB, 0x3FC5,
-    0x6E96, 0x4073,
-    0x6E30, 0x4121,
-    0x6DCA, 0x41CE,
-    0x6D62, 0x427A,
-    0x6CF9, 0x4325,
-    0x6C8F, 0x43D0,
-    0x6C24, 0x447A,
-    0x6BB8, 0x4524,
-    0x6B4A, 0x45CD,
-    0x6ADC, 0x4675,
-    0x6A6D, 0x471C,
-    0x69FD, 0x47C3,
-    0x698C, 0x4869,
-    0x6919, 0x490F,
-    0x68A6, 0x49B4,
-    0x6832, 0x4A58,
-    0x67BD, 0x4AFB,
-    0x6746, 0x4B9E,
-    0x66CF, 0x4C3F,
-    0x6657, 0x4CE1,
-    0x65DD, 0x4D81,
-    0x6563, 0x4E21,
-    0x64E8, 0x4EBF,
-    0x646C, 0x4F5E,
-    0x63EF, 0x4FFB,
-    0x6371, 0x5097,
-    0x62F2, 0x5133,
-    0x6271, 0x51CE,
-    0x61F1, 0x5269,
-    0x616F, 0x5302,
-    0x60EC, 0x539B,
-    0x6068, 0x5433,
-    0x5FE3, 0x54CA,
-    0x5F5E, 0x5560,
-    0x5ED7, 0x55F5,
-    0x5E50, 0x568A,
-    0x5DC7, 0x571D,
-    0x5D3E, 0x57B0,
-    0x5CB4, 0x5842,
-    0x5C29, 0x58D4,
-    0x5B9D, 0x5964,
-    0x5B10, 0x59F3,
-    0x5A82, 0x5A82,
-    0x59F3, 0x5B10,
-    0x5964, 0x5B9D,
-    0x58D4, 0x5C29,
-    0x5842, 0x5CB4,
-    0x57B0, 0x5D3E,
-    0x571D, 0x5DC7,
-    0x568A, 0x5E50,
-    0x55F5, 0x5ED7,
-    0x5560, 0x5F5E,
-    0x54CA, 0x5FE3,
-    0x5433, 0x6068,
-    0x539B, 0x60EC,
-    0x5302, 0x616F,
-    0x5269, 0x61F1,
-    0x51CE, 0x6271,
-    0x5133, 0x62F2,
-    0x5097, 0x6371,
-    0x4FFB, 0x63EF,
-    0x4F5E, 0x646C,
-    0x4EBF, 0x64E8,
-    0x4E21, 0x6563,
-    0x4D81, 0x65DD,
-    0x4CE1, 0x6657,
-    0x4C3F, 0x66CF,
-    0x4B9E, 0x6746,
-    0x4AFB, 0x67BD,
-    0x4A58, 0x6832,
-    0x49B4, 0x68A6,
-    0x490F, 0x6919,
-    0x4869, 0x698C,
-    0x47C3, 0x69FD,
-    0x471C, 0x6A6D,
-    0x4675, 0x6ADC,
-    0x45CD, 0x6B4A,
-    0x4524, 0x6BB8,
-    0x447A, 0x6C24,
-    0x43D0, 0x6C8F,
-    0x4325, 0x6CF9,
-    0x427A, 0x6D62,
-    0x41CE, 0x6DCA,
-    0x4121, 0x6E30,
-    0x4073, 0x6E96,
-    0x3FC5, 0x6EFB,
-    0x3F17, 0x6F5F,
-    0x3E68, 0x6FC1,
-    0x3DB8, 0x7023,
-    0x3D07, 0x7083,
-    0x3C56, 0x70E2,
-    0x3BA5, 0x7141,
-    0x3AF2, 0x719E,
-    0x3A40, 0x71FA,
-    0x398C, 0x7255,
-    0x38D8, 0x72AF,
-    0x3824, 0x7307,
-    0x376F, 0x735F,
-    0x36BA, 0x73B5,
-    0x3604, 0x740B,
-    0x354D, 0x745F,
-    0x3496, 0x74B2,
-    0x33DE, 0x7504,
-    0x3326, 0x7555,
-    0x326E, 0x75A5,
-    0x31B5, 0x75F4,
-    0x30FB, 0x7641,
-    0x3041, 0x768E,
-    0x2F87, 0x76D9,
-    0x2ECC, 0x7723,
-    0x2E11, 0x776C,
-    0x2D55, 0x77B4,
-    0x2C98, 0x77FA,
-    0x2BDC, 0x7840,
-    0x2B1F, 0x7884,
-    0x2A61, 0x78C7,
-    0x29A3, 0x7909,
-    0x28E5, 0x794A,
-    0x2826, 0x798A,
-    0x2767, 0x79C8,
-    0x26A8, 0x7A05,
-    0x25E8, 0x7A42,
-    0x2528, 0x7A7D,
-    0x2467, 0x7AB6,
-    0x23A6, 0x7AEF,
-    0x22E5, 0x7B26,
-    0x2223, 0x7B5D,
-    0x2161, 0x7B92,
-    0x209F, 0x7BC5,
-    0x1FDC, 0x7BF8,
-    0x1F19, 0x7C29,
-    0x1E56, 0x7C5A,
-    0x1D93, 0x7C89,
-    0x1CCF, 0x7CB7,
-    0x1C0B, 0x7CE3,
-    0x1B47, 0x7D0F,
-    0x1A82, 0x7D39,
-    0x19BD, 0x7D62,
-    0x18F8, 0x7D8A,
-    0x1833, 0x7DB0,
-    0x176D, 0x7DD6,
-    0x16A8, 0x7DFA,
-    0x15E2, 0x7E1D,
-    0x151B, 0x7E3F,
-    0x1455, 0x7E5F,
-    0x138E, 0x7E7F,
-    0x12C8, 0x7E9D,
-    0x1201, 0x7EBA,
-    0x1139, 0x7ED5,
-    0x1072, 0x7EF0,
-    0x0FAB, 0x7F09,
-    0x0EE3, 0x7F21,
-    0x0E1B, 0x7F38,
-    0x0D53, 0x7F4D,
-    0x0C8B, 0x7F62,
-    0x0BC3, 0x7F75,
-    0x0AFB, 0x7F87,
-    0x0A33, 0x7F97,
-    0x096A, 0x7FA7,
-    0x08A2, 0x7FB5,
-    0x07D9, 0x7FC2,
-    0x0710, 0x7FCE,
-    0x0647, 0x7FD8,
-    0x057F, 0x7FE1,
-    0x04B6, 0x7FE9,
-    0x03ED, 0x7FF0,
-    0x0324, 0x7FF6,
-    0x025B, 0x7FFA,
-    0x0192, 0x7FFD,
-    0x00C9, 0x7FFF,
-    0x0000, 0x7FFF,
-    0xFF36, 0x7FFF,
-    0xFE6D, 0x7FFD,
-    0xFDA4, 0x7FFA,
-    0xFCDB, 0x7FF6,
-    0xFC12, 0x7FF0,
-    0xFB49, 0x7FE9,
-    0xFA80, 0x7FE1,
-    0xF9B8, 0x7FD8,
-    0xF8EF, 0x7FCE,
-    0xF826, 0x7FC2,
-    0xF75D, 0x7FB5,
-    0xF695, 0x7FA7,
-    0xF5CC, 0x7F97,
-    0xF504, 0x7F87,
-    0xF43C, 0x7F75,
-    0xF374, 0x7F62,
-    0xF2AC, 0x7F4D,
-    0xF1E4, 0x7F38,
-    0xF11C, 0x7F21,
-    0xF054, 0x7F09,
-    0xEF8D, 0x7EF0,
-    0xEEC6, 0x7ED5,
-    0xEDFE, 0x7EBA,
-    0xED37, 0x7E9D,
-    0xEC71, 0x7E7F,
-    0xEBAA, 0x7E5F,
-    0xEAE4, 0x7E3F,
-    0xEA1D, 0x7E1D,
-    0xE957, 0x7DFA,
-    0xE892, 0x7DD6,
-    0xE7CC, 0x7DB0,
-    0xE707, 0x7D8A,
-    0xE642, 0x7D62,
-    0xE57D, 0x7D39,
-    0xE4B8, 0x7D0F,
-    0xE3F4, 0x7CE3,
-    0xE330, 0x7CB7,
-    0xE26C, 0x7C89,
-    0xE1A9, 0x7C5A,
-    0xE0E6, 0x7C29,
-    0xE023, 0x7BF8,
-    0xDF60, 0x7BC5,
-    0xDE9E, 0x7B92,
-    0xDDDC, 0x7B5D,
-    0xDD1A, 0x7B26,
-    0xDC59, 0x7AEF,
-    0xDB98, 0x7AB6,
-    0xDAD7, 0x7A7D,
-    0xDA17, 0x7A42,
-    0xD957, 0x7A05,
-    0xD898, 0x79C8,
-    0xD7D9, 0x798A,
-    0xD71A, 0x794A,
-    0xD65C, 0x7909,
-    0xD59E, 0x78C7,
-    0xD4E0, 0x7884,
-    0xD423, 0x7840,
-    0xD367, 0x77FA,
-    0xD2AA, 0x77B4,
-    0xD1EE, 0x776C,
-    0xD133, 0x7723,
-    0xD078, 0x76D9,
-    0xCFBE, 0x768E,
-    0xCF04, 0x7641,
-    0xCE4A, 0x75F4,
-    0xCD91, 0x75A5,
-    0xCCD9, 0x7555,
-    0xCC21, 0x7504,
-    0xCB69, 0x74B2,
-    0xCAB2, 0x745F,
-    0xC9FB, 0x740B,
-    0xC945, 0x73B5,
-    0xC890, 0x735F,
-    0xC7DB, 0x7307,
-    0xC727, 0x72AF,
-    0xC673, 0x7255,
-    0xC5BF, 0x71FA,
-    0xC50D, 0x719E,
-    0xC45A, 0x7141,
-    0xC3A9, 0x70E2,
-    0xC2F8, 0x7083,
-    0xC247, 0x7023,
-    0xC197, 0x6FC1,
-    0xC0E8, 0x6F5F,
-    0xC03A, 0x6EFB,
-    0xBF8C, 0x6E96,
-    0xBEDE, 0x6E30,
-    0xBE31, 0x6DCA,
-    0xBD85, 0x6D62,
-    0xBCDA, 0x6CF9,
-    0xBC2F, 0x6C8F,
-    0xBB85, 0x6C24,
-    0xBADB, 0x6BB8,
-    0xBA32, 0x6B4A,
-    0xB98A, 0x6ADC,
-    0xB8E3, 0x6A6D,
-    0xB83C, 0x69FD,
-    0xB796, 0x698C,
-    0xB6F0, 0x6919,
-    0xB64B, 0x68A6,
-    0xB5A7, 0x6832,
-    0xB504, 0x67BD,
-    0xB461, 0x6746,
-    0xB3C0, 0x66CF,
-    0xB31E, 0x6657,
-    0xB27E, 0x65DD,
-    0xB1DE, 0x6563,
-    0xB140, 0x64E8,
-    0xB0A1, 0x646C,
-    0xB004, 0x63EF,
-    0xAF68, 0x6371,
-    0xAECC, 0x62F2,
-    0xAE31, 0x6271,
-    0xAD96, 0x61F1,
-    0xACFD, 0x616F,
-    0xAC64, 0x60EC,
-    0xABCC, 0x6068,
-    0xAB35, 0x5FE3,
-    0xAA9F, 0x5F5E,
-    0xAA0A, 0x5ED7,
-    0xA975, 0x5E50,
-    0xA8E2, 0x5DC7,
-    0xA84F, 0x5D3E,
-    0xA7BD, 0x5CB4,
-    0xA72B, 0x5C29,
-    0xA69B, 0x5B9D,
-    0xA60C, 0x5B10,
-    0xA57D, 0x5A82,
-    0xA4EF, 0x59F3,
-    0xA462, 0x5964,
-    0xA3D6, 0x58D4,
-    0xA34B, 0x5842,
-    0xA2C1, 0x57B0,
-    0xA238, 0x571D,
-    0xA1AF, 0x568A,
-    0xA128, 0x55F5,
-    0xA0A1, 0x5560,
-    0xA01C, 0x54CA,
-    0x9F97, 0x5433,
-    0x9F13, 0x539B,
-    0x9E90, 0x5302,
-    0x9E0E, 0x5269,
-    0x9D8E, 0x51CE,
-    0x9D0D, 0x5133,
-    0x9C8E, 0x5097,
-    0x9C10, 0x4FFB,
-    0x9B93, 0x4F5E,
-    0x9B17, 0x4EBF,
-    0x9A9C, 0x4E21,
-    0x9A22, 0x4D81,
-    0x99A8, 0x4CE1,
-    0x9930, 0x4C3F,
-    0x98B9, 0x4B9E,
-    0x9842, 0x4AFB,
-    0x97CD, 0x4A58,
-    0x9759, 0x49B4,
-    0x96E6, 0x490F,
-    0x9673, 0x4869,
-    0x9602, 0x47C3,
-    0x9592, 0x471C,
-    0x9523, 0x4675,
-    0x94B5, 0x45CD,
-    0x9447, 0x4524,
-    0x93DB, 0x447A,
-    0x9370, 0x43D0,
-    0x9306, 0x4325,
-    0x929D, 0x427A,
-    0x9235, 0x41CE,
-    0x91CF, 0x4121,
-    0x9169, 0x4073,
-    0x9104, 0x3FC5,
-    0x90A0, 0x3F17,
-    0x903E, 0x3E68,
-    0x8FDC, 0x3DB8,
-    0x8F7C, 0x3D07,
-    0x8F1D, 0x3C56,
-    0x8EBE, 0x3BA5,
-    0x8E61, 0x3AF2,
-    0x8E05, 0x3A40,
-    0x8DAA, 0x398C,
-    0x8D50, 0x38D8,
-    0x8CF8, 0x3824,
-    0x8CA0, 0x376F,
-    0x8C4A, 0x36BA,
-    0x8BF4, 0x3604,
-    0x8BA0, 0x354D,
-    0x8B4D, 0x3496,
-    0x8AFB, 0x33DE,
-    0x8AAA, 0x3326,
-    0x8A5A, 0x326E,
-    0x8A0B, 0x31B5,
-    0x89BE, 0x30FB,
-    0x8971, 0x3041,
-    0x8926, 0x2F87,
-    0x88DC, 0x2ECC,
-    0x8893, 0x2E11,
-    0x884B, 0x2D55,
-    0x8805, 0x2C98,
-    0x87BF, 0x2BDC,
-    0x877B, 0x2B1F,
-    0x8738, 0x2A61,
-    0x86F6, 0x29A3,
-    0x86B5, 0x28E5,
-    0x8675, 0x2826,
-    0x8637, 0x2767,
-    0x85FA, 0x26A8,
-    0x85BD, 0x25E8,
-    0x8582, 0x2528,
-    0x8549, 0x2467,
-    0x8510, 0x23A6,
-    0x84D9, 0x22E5,
-    0x84A2, 0x2223,
-    0x846D, 0x2161,
-    0x843A, 0x209F,
-    0x8407, 0x1FDC,
-    0x83D6, 0x1F19,
-    0x83A5, 0x1E56,
-    0x8376, 0x1D93,
-    0x8348, 0x1CCF,
-    0x831C, 0x1C0B,
-    0x82F0, 0x1B47,
-    0x82C6, 0x1A82,
-    0x829D, 0x19BD,
-    0x8275, 0x18F8,
-    0x824F, 0x1833,
-    0x8229, 0x176D,
-    0x8205, 0x16A8,
-    0x81E2, 0x15E2,
-    0x81C0, 0x151B,
-    0x81A0, 0x1455,
-    0x8180, 0x138E,
-    0x8162, 0x12C8,
-    0x8145, 0x1201,
-    0x812A, 0x1139,
-    0x810F, 0x1072,
-    0x80F6, 0x0FAB,
-    0x80DE, 0x0EE3,
-    0x80C7, 0x0E1B,
-    0x80B2, 0x0D53,
-    0x809D, 0x0C8B,
-    0x808A, 0x0BC3,
-    0x8078, 0x0AFB,
-    0x8068, 0x0A33,
-    0x8058, 0x096A,
-    0x804A, 0x08A2,
-    0x803D, 0x07D9,
-    0x8031, 0x0710,
-    0x8027, 0x0647,
-    0x801E, 0x057F,
-    0x8016, 0x04B6,
-    0x800F, 0x03ED,
-    0x8009, 0x0324,
-    0x8005, 0x025B,
-    0x8002, 0x0192,
-    0x8000, 0x00C9,
-    0x8000, 0x0000,
-    0x8000, 0xFF36,
-    0x8002, 0xFE6D,
-    0x8005, 0xFDA4,
-    0x8009, 0xFCDB,
-    0x800F, 0xFC12,
-    0x8016, 0xFB49,
-    0x801E, 0xFA80,
-    0x8027, 0xF9B8,
-    0x8031, 0xF8EF,
-    0x803D, 0xF826,
-    0x804A, 0xF75D,
-    0x8058, 0xF695,
-    0x8068, 0xF5CC,
-    0x8078, 0xF504,
-    0x808A, 0xF43C,
-    0x809D, 0xF374,
-    0x80B2, 0xF2AC,
-    0x80C7, 0xF1E4,
-    0x80DE, 0xF11C,
-    0x80F6, 0xF054,
-    0x810F, 0xEF8D,
-    0x812A, 0xEEC6,
-    0x8145, 0xEDFE,
-    0x8162, 0xED37,
-    0x8180, 0xEC71,
-    0x81A0, 0xEBAA,
-    0x81C0, 0xEAE4,
-    0x81E2, 0xEA1D,
-    0x8205, 0xE957,
-    0x8229, 0xE892,
-    0x824F, 0xE7CC,
-    0x8275, 0xE707,
-    0x829D, 0xE642,
-    0x82C6, 0xE57D,
-    0x82F0, 0xE4B8,
-    0x831C, 0xE3F4,
-    0x8348, 0xE330,
-    0x8376, 0xE26C,
-    0x83A5, 0xE1A9,
-    0x83D6, 0xE0E6,
-    0x8407, 0xE023,
-    0x843A, 0xDF60,
-    0x846D, 0xDE9E,
-    0x84A2, 0xDDDC,
-    0x84D9, 0xDD1A,
-    0x8510, 0xDC59,
-    0x8549, 0xDB98,
-    0x8582, 0xDAD7,
-    0x85BD, 0xDA17,
-    0x85FA, 0xD957,
-    0x8637, 0xD898,
-    0x8675, 0xD7D9,
-    0x86B5, 0xD71A,
-    0x86F6, 0xD65C,
-    0x8738, 0xD59E,
-    0x877B, 0xD4E0,
-    0x87BF, 0xD423,
-    0x8805, 0xD367,
-    0x884B, 0xD2AA,
-    0x8893, 0xD1EE,
-    0x88DC, 0xD133,
-    0x8926, 0xD078,
-    0x8971, 0xCFBE,
-    0x89BE, 0xCF04,
-    0x8A0B, 0xCE4A,
-    0x8A5A, 0xCD91,
-    0x8AAA, 0xCCD9,
-    0x8AFB, 0xCC21,
-    0x8B4D, 0xCB69,
-    0x8BA0, 0xCAB2,
-    0x8BF4, 0xC9FB,
-    0x8C4A, 0xC945,
-    0x8CA0, 0xC890,
-    0x8CF8, 0xC7DB,
-    0x8D50, 0xC727,
-    0x8DAA, 0xC673,
-    0x8E05, 0xC5BF,
-    0x8E61, 0xC50D,
-    0x8EBE, 0xC45A,
-    0x8F1D, 0xC3A9,
-    0x8F7C, 0xC2F8,
-    0x8FDC, 0xC247,
-    0x903E, 0xC197,
-    0x90A0, 0xC0E8,
-    0x9104, 0xC03A,
-    0x9169, 0xBF8C,
-    0x91CF, 0xBEDE,
-    0x9235, 0xBE31,
-    0x929D, 0xBD85,
-    0x9306, 0xBCDA,
-    0x9370, 0xBC2F,
-    0x93DB, 0xBB85,
-    0x9447, 0xBADB,
-    0x94B5, 0xBA32,
-    0x9523, 0xB98A,
-    0x9592, 0xB8E3,
-    0x9602, 0xB83C,
-    0x9673, 0xB796,
-    0x96E6, 0xB6F0,
-    0x9759, 0xB64B,
-    0x97CD, 0xB5A7,
-    0x9842, 0xB504,
-    0x98B9, 0xB461,
-    0x9930, 0xB3C0,
-    0x99A8, 0xB31E,
-    0x9A22, 0xB27E,
-    0x9A9C, 0xB1DE,
-    0x9B17, 0xB140,
-    0x9B93, 0xB0A1,
-    0x9C10, 0xB004,
-    0x9C8E, 0xAF68,
-    0x9D0D, 0xAECC,
-    0x9D8E, 0xAE31,
-    0x9E0E, 0xAD96,
-    0x9E90, 0xACFD,
-    0x9F13, 0xAC64,
-    0x9F97, 0xABCC,
-    0xA01C, 0xAB35,
-    0xA0A1, 0xAA9F,
-    0xA128, 0xAA0A,
-    0xA1AF, 0xA975,
-    0xA238, 0xA8E2,
-    0xA2C1, 0xA84F,
-    0xA34B, 0xA7BD,
-    0xA3D6, 0xA72B,
-    0xA462, 0xA69B,
-    0xA4EF, 0xA60C,
-    0xA57D, 0xA57D,
-    0xA60C, 0xA4EF,
-    0xA69B, 0xA462,
-    0xA72B, 0xA3D6,
-    0xA7BD, 0xA34B,
-    0xA84F, 0xA2C1,
-    0xA8E2, 0xA238,
-    0xA975, 0xA1AF,
-    0xAA0A, 0xA128,
-    0xAA9F, 0xA0A1,
-    0xAB35, 0xA01C,
-    0xABCC, 0x9F97,
-    0xAC64, 0x9F13,
-    0xACFD, 0x9E90,
-    0xAD96, 0x9E0E,
-    0xAE31, 0x9D8E,
-    0xAECC, 0x9D0D,
-    0xAF68, 0x9C8E,
-    0xB004, 0x9C10,
-    0xB0A1, 0x9B93,
-    0xB140, 0x9B17,
-    0xB1DE, 0x9A9C,
-    0xB27E, 0x9A22,
-    0xB31E, 0x99A8,
-    0xB3C0, 0x9930,
-    0xB461, 0x98B9,
-    0xB504, 0x9842,
-    0xB5A7, 0x97CD,
-    0xB64B, 0x9759,
-    0xB6F0, 0x96E6,
-    0xB796, 0x9673,
-    0xB83C, 0x9602,
-    0xB8E3, 0x9592,
-    0xB98A, 0x9523,
-    0xBA32, 0x94B5,
-    0xBADB, 0x9447,
-    0xBB85, 0x93DB,
-    0xBC2F, 0x9370,
-    0xBCDA, 0x9306,
-    0xBD85, 0x929D,
-    0xBE31, 0x9235,
-    0xBEDE, 0x91CF,
-    0xBF8C, 0x9169,
-    0xC03A, 0x9104,
-    0xC0E8, 0x90A0,
-    0xC197, 0x903E,
-    0xC247, 0x8FDC,
-    0xC2F8, 0x8F7C,
-    0xC3A9, 0x8F1D,
-    0xC45A, 0x8EBE,
-    0xC50D, 0x8E61,
-    0xC5BF, 0x8E05,
-    0xC673, 0x8DAA,
-    0xC727, 0x8D50,
-    0xC7DB, 0x8CF8,
-    0xC890, 0x8CA0,
-    0xC945, 0x8C4A,
-    0xC9FB, 0x8BF4,
-    0xCAB2, 0x8BA0,
-    0xCB69, 0x8B4D,
-    0xCC21, 0x8AFB,
-    0xCCD9, 0x8AAA,
-    0xCD91, 0x8A5A,
-    0xCE4A, 0x8A0B,
-    0xCF04, 0x89BE,
-    0xCFBE, 0x8971,
-    0xD078, 0x8926,
-    0xD133, 0x88DC,
-    0xD1EE, 0x8893,
-    0xD2AA, 0x884B,
-    0xD367, 0x8805,
-    0xD423, 0x87BF,
-    0xD4E0, 0x877B,
-    0xD59E, 0x8738,
-    0xD65C, 0x86F6,
-    0xD71A, 0x86B5,
-    0xD7D9, 0x8675,
-    0xD898, 0x8637,
-    0xD957, 0x85FA,
-    0xDA17, 0x85BD,
-    0xDAD7, 0x8582,
-    0xDB98, 0x8549,
-    0xDC59, 0x8510,
-    0xDD1A, 0x84D9,
-    0xDDDC, 0x84A2,
-    0xDE9E, 0x846D,
-    0xDF60, 0x843A,
-    0xE023, 0x8407,
-    0xE0E6, 0x83D6,
-    0xE1A9, 0x83A5,
-    0xE26C, 0x8376,
-    0xE330, 0x8348,
-    0xE3F4, 0x831C,
-    0xE4B8, 0x82F0,
-    0xE57D, 0x82C6,
-    0xE642, 0x829D,
-    0xE707, 0x8275,
-    0xE7CC, 0x824F,
-    0xE892, 0x8229,
-    0xE957, 0x8205,
-    0xEA1D, 0x81E2,
-    0xEAE4, 0x81C0,
-    0xEBAA, 0x81A0,
-    0xEC71, 0x8180,
-    0xED37, 0x8162,
-    0xEDFE, 0x8145,
-    0xEEC6, 0x812A,
-    0xEF8D, 0x810F,
-    0xF054, 0x80F6,
-    0xF11C, 0x80DE,
-    0xF1E4, 0x80C7,
-    0xF2AC, 0x80B2,
-    0xF374, 0x809D,
-    0xF43C, 0x808A,
-    0xF504, 0x8078,
-    0xF5CC, 0x8068,
-    0xF695, 0x8058,
-    0xF75D, 0x804A,
-    0xF826, 0x803D,
-    0xF8EF, 0x8031,
-    0xF9B8, 0x8027,
-    0xFA80, 0x801E,
-    0xFB49, 0x8016,
-    0xFC12, 0x800F,
-    0xFCDB, 0x8009,
-    0xFDA4, 0x8005,
-    0xFE6D, 0x8002,
-    0xFF36, 0x8000
-};
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 2048	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_2048_q15[3072] = {
-    0x7FFF, 0x0000,
-    0x7FFF, 0x0064,
-    0x7FFF, 0x00C9,
-    0x7FFE, 0x012D,
-    0x7FFD, 0x0192,
-    0x7FFC, 0x01F6,
-    0x7FFA, 0x025B,
-    0x7FF8, 0x02BF,
-    0x7FF6, 0x0324,
-    0x7FF3, 0x0388,
-    0x7FF0, 0x03ED,
-    0x7FED, 0x0451,
-    0x7FE9, 0x04B6,
-    0x7FE5, 0x051A,
-    0x7FE1, 0x057F,
-    0x7FDD, 0x05E3,
-    0x7FD8, 0x0647,
-    0x7FD3, 0x06AC,
-    0x7FCE, 0x0710,
-    0x7FC8, 0x0775,
-    0x7FC2, 0x07D9,
-    0x7FBC, 0x083D,
-    0x7FB5, 0x08A2,
-    0x7FAE, 0x0906,
-    0x7FA7, 0x096A,
-    0x7F9F, 0x09CE,
-    0x7F97, 0x0A33,
-    0x7F8F, 0x0A97,
-    0x7F87, 0x0AFB,
-    0x7F7E, 0x0B5F,
-    0x7F75, 0x0BC3,
-    0x7F6B, 0x0C27,
-    0x7F62, 0x0C8B,
-    0x7F58, 0x0CEF,
-    0x7F4D, 0x0D53,
-    0x7F43, 0x0DB7,
-    0x7F38, 0x0E1B,
-    0x7F2D, 0x0E7F,
-    0x7F21, 0x0EE3,
-    0x7F15, 0x0F47,
-    0x7F09, 0x0FAB,
-    0x7EFD, 0x100E,
-    0x7EF0, 0x1072,
-    0x7EE3, 0x10D6,
-    0x7ED5, 0x1139,
-    0x7EC8, 0x119D,
-    0x7EBA, 0x1201,
-    0x7EAB, 0x1264,
-    0x7E9D, 0x12C8,
-    0x7E8E, 0x132B,
-    0x7E7F, 0x138E,
-    0x7E6F, 0x13F2,
-    0x7E5F, 0x1455,
-    0x7E4F, 0x14B8,
-    0x7E3F, 0x151B,
-    0x7E2E, 0x157F,
-    0x7E1D, 0x15E2,
-    0x7E0C, 0x1645,
-    0x7DFA, 0x16A8,
-    0x7DE8, 0x170A,
-    0x7DD6, 0x176D,
-    0x7DC3, 0x17D0,
-    0x7DB0, 0x1833,
-    0x7D9D, 0x1896,
-    0x7D8A, 0x18F8,
-    0x7D76, 0x195B,
-    0x7D62, 0x19BD,
-    0x7D4E, 0x1A20,
-    0x7D39, 0x1A82,
-    0x7D24, 0x1AE4,
-    0x7D0F, 0x1B47,
-    0x7CF9, 0x1BA9,
-    0x7CE3, 0x1C0B,
-    0x7CCD, 0x1C6D,
-    0x7CB7, 0x1CCF,
-    0x7CA0, 0x1D31,
-    0x7C89, 0x1D93,
-    0x7C71, 0x1DF5,
-    0x7C5A, 0x1E56,
-    0x7C42, 0x1EB8,
-    0x7C29, 0x1F19,
-    0x7C11, 0x1F7B,
-    0x7BF8, 0x1FDC,
-    0x7BDF, 0x203E,
-    0x7BC5, 0x209F,
-    0x7BAC, 0x2100,
-    0x7B92, 0x2161,
-    0x7B77, 0x21C2,
-    0x7B5D, 0x2223,
-    0x7B42, 0x2284,
-    0x7B26, 0x22E5,
-    0x7B0B, 0x2345,
-    0x7AEF, 0x23A6,
-    0x7AD3, 0x2407,
-    0x7AB6, 0x2467,
-    0x7A9A, 0x24C7,
-    0x7A7D, 0x2528,
-    0x7A5F, 0x2588,
-    0x7A42, 0x25E8,
-    0x7A24, 0x2648,
-    0x7A05, 0x26A8,
-    0x79E7, 0x2707,
-    0x79C8, 0x2767,
-    0x79A9, 0x27C7,
-    0x798A, 0x2826,
-    0x796A, 0x2886,
-    0x794A, 0x28E5,
-    0x792A, 0x2944,
-    0x7909, 0x29A3,
-    0x78E8, 0x2A02,
-    0x78C7, 0x2A61,
-    0x78A6, 0x2AC0,
-    0x7884, 0x2B1F,
-    0x7862, 0x2B7D,
-    0x7840, 0x2BDC,
-    0x781D, 0x2C3A,
-    0x77FA, 0x2C98,
-    0x77D7, 0x2CF7,
-    0x77B4, 0x2D55,
-    0x7790, 0x2DB3,
-    0x776C, 0x2E11,
-    0x7747, 0x2E6E,
-    0x7723, 0x2ECC,
-    0x76FE, 0x2F29,
-    0x76D9, 0x2F87,
-    0x76B3, 0x2FE4,
-    0x768E, 0x3041,
-    0x7668, 0x309E,
-    0x7641, 0x30FB,
-    0x761B, 0x3158,
-    0x75F4, 0x31B5,
-    0x75CC, 0x3211,
-    0x75A5, 0x326E,
-    0x757D, 0x32CA,
-    0x7555, 0x3326,
-    0x752D, 0x3382,
-    0x7504, 0x33DE,
-    0x74DB, 0x343A,
-    0x74B2, 0x3496,
-    0x7489, 0x34F2,
-    0x745F, 0x354D,
-    0x7435, 0x35A8,
-    0x740B, 0x3604,
-    0x73E0, 0x365F,
-    0x73B5, 0x36BA,
-    0x738A, 0x3714,
-    0x735F, 0x376F,
-    0x7333, 0x37CA,
-    0x7307, 0x3824,
-    0x72DB, 0x387E,
-    0x72AF, 0x38D8,
-    0x7282, 0x3932,
-    0x7255, 0x398C,
-    0x7227, 0x39E6,
-    0x71FA, 0x3A40,
-    0x71CC, 0x3A99,
-    0x719E, 0x3AF2,
-    0x716F, 0x3B4C,
-    0x7141, 0x3BA5,
-    0x7112, 0x3BFD,
-    0x70E2, 0x3C56,
-    0x70B3, 0x3CAF,
-    0x7083, 0x3D07,
-    0x7053, 0x3D60,
-    0x7023, 0x3DB8,
-    0x6FF2, 0x3E10,
-    0x6FC1, 0x3E68,
-    0x6F90, 0x3EBF,
-    0x6F5F, 0x3F17,
-    0x6F2D, 0x3F6E,
-    0x6EFB, 0x3FC5,
-    0x6EC9, 0x401D,
-    0x6E96, 0x4073,
-    0x6E63, 0x40CA,
-    0x6E30, 0x4121,
-    0x6DFD, 0x4177,
-    0x6DCA, 0x41CE,
-    0x6D96, 0x4224,
-    0x6D62, 0x427A,
-    0x6D2D, 0x42D0,
-    0x6CF9, 0x4325,
-    0x6CC4, 0x437B,
-    0x6C8F, 0x43D0,
-    0x6C59, 0x4425,
-    0x6C24, 0x447A,
-    0x6BEE, 0x44CF,
-    0x6BB8, 0x4524,
-    0x6B81, 0x4578,
-    0x6B4A, 0x45CD,
-    0x6B13, 0x4621,
-    0x6ADC, 0x4675,
-    0x6AA5, 0x46C9,
-    0x6A6D, 0x471C,
-    0x6A35, 0x4770,
-    0x69FD, 0x47C3,
-    0x69C4, 0x4816,
-    0x698C, 0x4869,
-    0x6953, 0x48BC,
-    0x6919, 0x490F,
-    0x68E0, 0x4961,
-    0x68A6, 0x49B4,
-    0x686C, 0x4A06,
-    0x6832, 0x4A58,
-    0x67F7, 0x4AA9,
-    0x67BD, 0x4AFB,
-    0x6782, 0x4B4C,
-    0x6746, 0x4B9E,
-    0x670B, 0x4BEF,
-    0x66CF, 0x4C3F,
-    0x6693, 0x4C90,
-    0x6657, 0x4CE1,
-    0x661A, 0x4D31,
-    0x65DD, 0x4D81,
-    0x65A0, 0x4DD1,
-    0x6563, 0x4E21,
-    0x6526, 0x4E70,
-    0x64E8, 0x4EBF,
-    0x64AA, 0x4F0F,
-    0x646C, 0x4F5E,
-    0x642D, 0x4FAC,
-    0x63EF, 0x4FFB,
-    0x63B0, 0x5049,
-    0x6371, 0x5097,
-    0x6331, 0x50E5,
-    0x62F2, 0x5133,
-    0x62B2, 0x5181,
-    0x6271, 0x51CE,
-    0x6231, 0x521C,
-    0x61F1, 0x5269,
-    0x61B0, 0x52B5,
-    0x616F, 0x5302,
-    0x612D, 0x534E,
-    0x60EC, 0x539B,
-    0x60AA, 0x53E7,
-    0x6068, 0x5433,
-    0x6026, 0x547E,
-    0x5FE3, 0x54CA,
-    0x5FA0, 0x5515,
-    0x5F5E, 0x5560,
-    0x5F1A, 0x55AB,
-    0x5ED7, 0x55F5,
-    0x5E93, 0x5640,
-    0x5E50, 0x568A,
-    0x5E0B, 0x56D4,
-    0x5DC7, 0x571D,
-    0x5D83, 0x5767,
-    0x5D3E, 0x57B0,
-    0x5CF9, 0x57F9,
-    0x5CB4, 0x5842,
-    0x5C6E, 0x588B,
-    0x5C29, 0x58D4,
-    0x5BE3, 0x591C,
-    0x5B9D, 0x5964,
-    0x5B56, 0x59AC,
-    0x5B10, 0x59F3,
-    0x5AC9, 0x5A3B,
-    0x5A82, 0x5A82,
-    0x5A3B, 0x5AC9,
-    0x59F3, 0x5B10,
-    0x59AC, 0x5B56,
-    0x5964, 0x5B9D,
-    0x591C, 0x5BE3,
-    0x58D4, 0x5C29,
-    0x588B, 0x5C6E,
-    0x5842, 0x5CB4,
-    0x57F9, 0x5CF9,
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-    0x8F4C, 0x3CAF,
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-    0x8EED, 0x3BFD,
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-    0x8E61, 0x3AF2,
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-    0x8B4D, 0x3496,
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-    0x8AD2, 0x3382,
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-    0x8A82, 0x32CA,
-    0x8A5A, 0x326E,
-    0x8A33, 0x3211,
-    0x8A0B, 0x31B5,
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-    0x8997, 0x309E,
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-    0x8901, 0x2F29,
-    0x88DC, 0x2ECC,
-    0x88B8, 0x2E6E,
-    0x8893, 0x2E11,
-    0x886F, 0x2DB3,
-    0x884B, 0x2D55,
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-    0x8805, 0x2C98,
-    0x87E2, 0x2C3A,
-    0x87BF, 0x2BDC,
-    0x879D, 0x2B7D,
-    0x877B, 0x2B1F,
-    0x8759, 0x2AC0,
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-    0x83EE, 0x1F7B,
-    0x83D6, 0x1F19,
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-    0x835F, 0x1D31,
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-    0x831C, 0x1C0B,
-    0x8306, 0x1BA9,
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-    0x82C6, 0x1A82,
-    0x82B1, 0x1A20,
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-    0x824F, 0x1833,
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-    0x8162, 0x12C8,
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-    0x8145, 0x1201,
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-    0x812A, 0x1139,
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-    0x80D2, 0x0E7F,
-    0x80C7, 0x0E1B,
-    0x80BC, 0x0DB7,
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-    0x8094, 0x0C27,
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-    0x8081, 0x0B5F,
-    0x8078, 0x0AFB,
-    0x8070, 0x0A97,
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-    0x8058, 0x096A,
-    0x8051, 0x0906,
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-    0x803D, 0x07D9,
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-    0x8031, 0x0710,
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-    0x8016, 0x04B6,
-    0x8012, 0x0451,
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-    0x800C, 0x0388,
-    0x8009, 0x0324,
-    0x8007, 0x02BF,
-    0x8005, 0x025B,
-    0x8003, 0x01F6,
-    0x8002, 0x0192,
-    0x8001, 0x012D,
-    0x8000, 0x00C9,
-    0x8000, 0x0064,
-    0x8000, 0x0000,
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-    0x8000, 0xFF36,
-    0x8001, 0xFED2,
-    0x8002, 0xFE6D,
-    0x8003, 0xFE09,
-    0x8005, 0xFDA4,
-    0x8007, 0xFD40,
-    0x8009, 0xFCDB,
-    0x800C, 0xFC77,
-    0x800F, 0xFC12,
-    0x8012, 0xFBAE,
-    0x8016, 0xFB49,
-    0x801A, 0xFAE5,
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-    0x8022, 0xFA1C,
-    0x8027, 0xF9B8,
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-    0x8068, 0xF5CC,
-    0x8070, 0xF568,
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-    0x8289, 0xE6A4,
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-    0x933B, 0xBC84,
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-    0x95CA, 0xB88F,
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-    0x9793, 0xB5F9,
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-    0x9842, 0xB504,
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-    0x99A8, 0xB31E,
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-    0x9A5F, 0xB22E,
-    0x9A9C, 0xB1DE,
-    0x9AD9, 0xB18F,
-    0x9B17, 0xB140,
-    0x9B55, 0xB0F0,
-    0x9B93, 0xB0A1,
-    0x9BD2, 0xB053,
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-    0xA1F4, 0xA92B,
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-    0xA391, 0xA774,
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-    0xA4A9, 0xA653,
-    0xA4EF, 0xA60C,
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-    0xA5C4, 0xA536,
-    0xA60C, 0xA4EF,
-    0xA653, 0xA4A9,
-    0xA69B, 0xA462,
-    0xA6E3, 0xA41C,
-    0xA72B, 0xA3D6,
-    0xA774, 0xA391,
-    0xA7BD, 0xA34B,
-    0xA806, 0xA306,
-    0xA84F, 0xA2C1,
-    0xA898, 0xA27C,
-    0xA8E2, 0xA238,
-    0xA92B, 0xA1F4,
-    0xA975, 0xA1AF,
-    0xA9BF, 0xA16C,
-    0xAA0A, 0xA128,
-    0xAA54, 0xA0E5,
-    0xAA9F, 0xA0A1,
-    0xAAEA, 0xA05F,
-    0xAB35, 0xA01C,
-    0xAB81, 0x9FD9,
-    0xABCC, 0x9F97,
-    0xAC18, 0x9F55,
-    0xAC64, 0x9F13,
-    0xACB1, 0x9ED2,
-    0xACFD, 0x9E90,
-    0xAD4A, 0x9E4F,
-    0xAD96, 0x9E0E,
-    0xADE3, 0x9DCE,
-    0xAE31, 0x9D8E,
-    0xAE7E, 0x9D4D,
-    0xAECC, 0x9D0D,
-    0xAF1A, 0x9CCE,
-    0xAF68, 0x9C8E,
-    0xAFB6, 0x9C4F,
-    0xB004, 0x9C10,
-    0xB053, 0x9BD2,
-    0xB0A1, 0x9B93,
-    0xB0F0, 0x9B55,
-    0xB140, 0x9B17,
-    0xB18F, 0x9AD9,
-    0xB1DE, 0x9A9C,
-    0xB22E, 0x9A5F,
-    0xB27E, 0x9A22,
-    0xB2CE, 0x99E5,
-    0xB31E, 0x99A8,
-    0xB36F, 0x996C,
-    0xB3C0, 0x9930,
-    0xB410, 0x98F4,
-    0xB461, 0x98B9,
-    0xB4B3, 0x987D,
-    0xB504, 0x9842,
-    0xB556, 0x9808,
-    0xB5A7, 0x97CD,
-    0xB5F9, 0x9793,
-    0xB64B, 0x9759,
-    0xB69E, 0x971F,
-    0xB6F0, 0x96E6,
-    0xB743, 0x96AC,
-    0xB796, 0x9673,
-    0xB7E9, 0x963B,
-    0xB83C, 0x9602,
-    0xB88F, 0x95CA,
-    0xB8E3, 0x9592,
-    0xB936, 0x955A,
-    0xB98A, 0x9523,
-    0xB9DE, 0x94EC,
-    0xBA32, 0x94B5,
-    0xBA87, 0x947E,
-    0xBADB, 0x9447,
-    0xBB30, 0x9411,
-    0xBB85, 0x93DB,
-    0xBBDA, 0x93A6,
-    0xBC2F, 0x9370,
-    0xBC84, 0x933B,
-    0xBCDA, 0x9306,
-    0xBD2F, 0x92D2,
-    0xBD85, 0x929D,
-    0xBDDB, 0x9269,
-    0xBE31, 0x9235,
-    0xBE88, 0x9202,
-    0xBEDE, 0x91CF,
-    0xBF35, 0x919C,
-    0xBF8C, 0x9169,
-    0xBFE2, 0x9136,
-    0xC03A, 0x9104,
-    0xC091, 0x90D2,
-    0xC0E8, 0x90A0,
-    0xC140, 0x906F,
-    0xC197, 0x903E,
-    0xC1EF, 0x900D,
-    0xC247, 0x8FDC,
-    0xC29F, 0x8FAC,
-    0xC2F8, 0x8F7C,
-    0xC350, 0x8F4C,
-    0xC3A9, 0x8F1D,
-    0xC402, 0x8EED,
-    0xC45A, 0x8EBE,
-    0xC4B3, 0x8E90,
-    0xC50D, 0x8E61,
-    0xC566, 0x8E33,
-    0xC5BF, 0x8E05,
-    0xC619, 0x8DD8,
-    0xC673, 0x8DAA,
-    0xC6CD, 0x8D7D,
-    0xC727, 0x8D50,
-    0xC781, 0x8D24,
-    0xC7DB, 0x8CF8,
-    0xC835, 0x8CCC,
-    0xC890, 0x8CA0,
-    0xC8EB, 0x8C75,
-    0xC945, 0x8C4A,
-    0xC9A0, 0x8C1F,
-    0xC9FB, 0x8BF4,
-    0xCA57, 0x8BCA,
-    0xCAB2, 0x8BA0,
-    0xCB0D, 0x8B76,
-    0xCB69, 0x8B4D,
-    0xCBC5, 0x8B24,
-    0xCC21, 0x8AFB,
-    0xCC7D, 0x8AD2,
-    0xCCD9, 0x8AAA,
-    0xCD35, 0x8A82,
-    0xCD91, 0x8A5A,
-    0xCDEE, 0x8A33,
-    0xCE4A, 0x8A0B,
-    0xCEA7, 0x89E4,
-    0xCF04, 0x89BE,
-    0xCF61, 0x8997,
-    0xCFBE, 0x8971,
-    0xD01B, 0x894C,
-    0xD078, 0x8926,
-    0xD0D6, 0x8901,
-    0xD133, 0x88DC,
-    0xD191, 0x88B8,
-    0xD1EE, 0x8893,
-    0xD24C, 0x886F,
-    0xD2AA, 0x884B,
-    0xD308, 0x8828,
-    0xD367, 0x8805,
-    0xD3C5, 0x87E2,
-    0xD423, 0x87BF,
-    0xD482, 0x879D,
-    0xD4E0, 0x877B,
-    0xD53F, 0x8759,
-    0xD59E, 0x8738,
-    0xD5FD, 0x8717,
-    0xD65C, 0x86F6,
-    0xD6BB, 0x86D5,
-    0xD71A, 0x86B5,
-    0xD779, 0x8695,
-    0xD7D9, 0x8675,
-    0xD838, 0x8656,
-    0xD898, 0x8637,
-    0xD8F8, 0x8618,
-    0xD957, 0x85FA,
-    0xD9B7, 0x85DB,
-    0xDA17, 0x85BD,
-    0xDA77, 0x85A0,
-    0xDAD7, 0x8582,
-    0xDB38, 0x8565,
-    0xDB98, 0x8549,
-    0xDBF8, 0x852C,
-    0xDC59, 0x8510,
-    0xDCBA, 0x84F4,
-    0xDD1A, 0x84D9,
-    0xDD7B, 0x84BD,
-    0xDDDC, 0x84A2,
-    0xDE3D, 0x8488,
-    0xDE9E, 0x846D,
-    0xDEFF, 0x8453,
-    0xDF60, 0x843A,
-    0xDFC1, 0x8420,
-    0xE023, 0x8407,
-    0xE084, 0x83EE,
-    0xE0E6, 0x83D6,
-    0xE147, 0x83BD,
-    0xE1A9, 0x83A5,
-    0xE20A, 0x838E,
-    0xE26C, 0x8376,
-    0xE2CE, 0x835F,
-    0xE330, 0x8348,
-    0xE392, 0x8332,
-    0xE3F4, 0x831C,
-    0xE456, 0x8306,
-    0xE4B8, 0x82F0,
-    0xE51B, 0x82DB,
-    0xE57D, 0x82C6,
-    0xE5DF, 0x82B1,
-    0xE642, 0x829D,
-    0xE6A4, 0x8289,
-    0xE707, 0x8275,
-    0xE769, 0x8262,
-    0xE7CC, 0x824F,
-    0xE82F, 0x823C,
-    0xE892, 0x8229,
-    0xE8F5, 0x8217,
-    0xE957, 0x8205,
-    0xE9BA, 0x81F3,
-    0xEA1D, 0x81E2,
-    0xEA80, 0x81D1,
-    0xEAE4, 0x81C0,
-    0xEB47, 0x81B0,
-    0xEBAA, 0x81A0,
-    0xEC0D, 0x8190,
-    0xEC71, 0x8180,
-    0xECD4, 0x8171,
-    0xED37, 0x8162,
-    0xED9B, 0x8154,
-    0xEDFE, 0x8145,
-    0xEE62, 0x8137,
-    0xEEC6, 0x812A,
-    0xEF29, 0x811C,
-    0xEF8D, 0x810F,
-    0xEFF1, 0x8102,
-    0xF054, 0x80F6,
-    0xF0B8, 0x80EA,
-    0xF11C, 0x80DE,
-    0xF180, 0x80D2,
-    0xF1E4, 0x80C7,
-    0xF248, 0x80BC,
-    0xF2AC, 0x80B2,
-    0xF310, 0x80A7,
-    0xF374, 0x809D,
-    0xF3D8, 0x8094,
-    0xF43C, 0x808A,
-    0xF4A0, 0x8081,
-    0xF504, 0x8078,
-    0xF568, 0x8070,
-    0xF5CC, 0x8068,
-    0xF631, 0x8060,
-    0xF695, 0x8058,
-    0xF6F9, 0x8051,
-    0xF75D, 0x804A,
-    0xF7C2, 0x8043,
-    0xF826, 0x803D,
-    0xF88A, 0x8037,
-    0xF8EF, 0x8031,
-    0xF953, 0x802C,
-    0xF9B8, 0x8027,
-    0xFA1C, 0x8022,
-    0xFA80, 0x801E,
-    0xFAE5, 0x801A,
-    0xFB49, 0x8016,
-    0xFBAE, 0x8012,
-    0xFC12, 0x800F,
-    0xFC77, 0x800C,
-    0xFCDB, 0x8009,
-    0xFD40, 0x8007,
-    0xFDA4, 0x8005,
-    0xFE09, 0x8003,
-    0xFE6D, 0x8002,
-    0xFED2, 0x8001,
-    0xFF36, 0x8000,
-    0xFF9B, 0x8000
-};
-
-/**    
-* \par   
-* Example code for q15 Twiddle factors Generation::    
-* \par    
-* 
for(i = 0; i< 3N/4; i++)    
-* {    
-*    twiddleCoefq15[2*i]= cos(i * 2*PI/(float)N);    
-*    twiddleCoefq15[2*i+1]= sin(i * 2*PI/(float)N);    
-* } 
    
-* \par    
-* where N = 4096	and PI = 3.14159265358979    
-* \par    
-* Cos and Sin values are interleaved fashion    
-* \par    
-* Convert Floating point to q15(Fixed point 1.15):    
-*	round(twiddleCoefq15(i) * pow(2, 15))    
-*    
-*/
-const q15_t twiddleCoef_4096_q15[6144] = 
-{
-    0x7FFF, 0x0000,
-    0x7FFF, 0x0032,
-    0x7FFF, 0x0064,
-    0x7FFF, 0x0096,
-    0x7FFF, 0x00C9,
-    0x7FFF, 0x00FB,
-    0x7FFE, 0x012D,
-    0x7FFE, 0x015F,
-    0x7FFD, 0x0192,
-    0x7FFC, 0x01C4,
-    0x7FFC, 0x01F6,
-    0x7FFB, 0x0228,
-    0x7FFA, 0x025B,
-    0x7FF9, 0x028D,
-    0x7FF8, 0x02BF,
-    0x7FF7, 0x02F1,
-    0x7FF6, 0x0324,
-    0x7FF4, 0x0356,
-    0x7FF3, 0x0388,
-    0x7FF2, 0x03BA,
-    0x7FF0, 0x03ED,
-    0x7FEE, 0x041F,
-    0x7FED, 0x0451,
-    0x7FEB, 0x0483,
-    0x7FE9, 0x04B6,
-    0x7FE7, 0x04E8,
-    0x7FE5, 0x051A,
-    0x7FE3, 0x054C,
-    0x7FE1, 0x057F,
-    0x7FDF, 0x05B1,
-    0x7FDD, 0x05E3,
-    0x7FDA, 0x0615,
-    0x7FD8, 0x0647,
-    0x7FD6, 0x067A,
-    0x7FD3, 0x06AC,
-    0x7FD0, 0x06DE,
-    0x7FCE, 0x0710,
-    0x7FCB, 0x0742,
-    0x7FC8, 0x0775,
-    0x7FC5, 0x07A7,
-    0x7FC2, 0x07D9,
-    0x7FBF, 0x080B,
-    0x7FBC, 0x083D,
-    0x7FB8, 0x086F,
-    0x7FB5, 0x08A2,
-    0x7FB1, 0x08D4,
-    0x7FAE, 0x0906,
-    0x7FAA, 0x0938,
-    0x7FA7, 0x096A,
-    0x7FA3, 0x099C,
-    0x7F9F, 0x09CE,
-    0x7F9B, 0x0A00,
-    0x7F97, 0x0A33,
-    0x7F93, 0x0A65,
-    0x7F8F, 0x0A97,
-    0x7F8B, 0x0AC9,
-    0x7F87, 0x0AFB,
-    0x7F82, 0x0B2D,
-    0x7F7E, 0x0B5F,
-    0x7F79, 0x0B91,
-    0x7F75, 0x0BC3,
-    0x7F70, 0x0BF5,
-    0x7F6B, 0x0C27,
-    0x7F67, 0x0C59,
-    0x7F62, 0x0C8B,
-    0x7F5D, 0x0CBD,
-    0x7F58, 0x0CEF,
-    0x7F53, 0x0D21,
-    0x7F4D, 0x0D53,
-    0x7F48, 0x0D85,
-    0x7F43, 0x0DB7,
-    0x7F3D, 0x0DE9,
-    0x7F38, 0x0E1B,
-    0x7F32, 0x0E4D,
-    0x7F2D, 0x0E7F,
-    0x7F27, 0x0EB1,
-    0x7F21, 0x0EE3,
-    0x7F1B, 0x0F15,
-    0x7F15, 0x0F47,
-    0x7F0F, 0x0F79,
-    0x7F09, 0x0FAB,
-    0x7F03, 0x0FDD,
-    0x7EFD, 0x100E,
-    0x7EF6, 0x1040,
-    0x7EF0, 0x1072,
-    0x7EE9, 0x10A4,
-    0x7EE3, 0x10D6,
-    0x7EDC, 0x1108,
-    0x7ED5, 0x1139,
-    0x7ECF, 0x116B,
-    0x7EC8, 0x119D,
-    0x7EC1, 0x11CF,
-    0x7EBA, 0x1201,
-    0x7EB3, 0x1232,
-    0x7EAB, 0x1264,
-    0x7EA4, 0x1296,
-    0x7E9D, 0x12C8,
-    0x7E95, 0x12F9,
-    0x7E8E, 0x132B,
-    0x7E86, 0x135D,
-    0x7E7F, 0x138E,
-    0x7E77, 0x13C0,
-    0x7E6F, 0x13F2,
-    0x7E67, 0x1423,
-    0x7E5F, 0x1455,
-    0x7E57, 0x1487,
-    0x7E4F, 0x14B8,
-    0x7E47, 0x14EA,
-    0x7E3F, 0x151B,
-    0x7E37, 0x154D,
-    0x7E2E, 0x157F,
-    0x7E26, 0x15B0,
-    0x7E1D, 0x15E2,
-    0x7E14, 0x1613,
-    0x7E0C, 0x1645,
-    0x7E03, 0x1676,
-    0x7DFA, 0x16A8,
-    0x7DF1, 0x16D9,
-    0x7DE8, 0x170A,
-    0x7DDF, 0x173C,
-    0x7DD6, 0x176D,
-    0x7DCD, 0x179F,
-    0x7DC3, 0x17D0,
-    0x7DBA, 0x1802,
-    0x7DB0, 0x1833,
-    0x7DA7, 0x1864,
-    0x7D9D, 0x1896,
-    0x7D94, 0x18C7,
-    0x7D8A, 0x18F8,
-    0x7D80, 0x192A,
-    0x7D76, 0x195B,
-    0x7D6C, 0x198C,
-    0x7D62, 0x19BD,
-    0x7D58, 0x19EF,
-    0x7D4E, 0x1A20,
-    0x7D43, 0x1A51,
-    0x7D39, 0x1A82,
-    0x7D2F, 0x1AB3,
-    0x7D24, 0x1AE4,
-    0x7D19, 0x1B16,
-    0x7D0F, 0x1B47,
-    0x7D04, 0x1B78,
-    0x7CF9, 0x1BA9,
-    0x7CEE, 0x1BDA,
-    0x7CE3, 0x1C0B,
-    0x7CD8, 0x1C3C,
-    0x7CCD, 0x1C6D,
-    0x7CC2, 0x1C9E,
-    0x7CB7, 0x1CCF,
-    0x7CAB, 0x1D00,
-    0x7CA0, 0x1D31,
-    0x7C94, 0x1D62,
-    0x7C89, 0x1D93,
-    0x7C7D, 0x1DC4,
-    0x7C71, 0x1DF5,
-    0x7C66, 0x1E25,
-    0x7C5A, 0x1E56,
-    0x7C4E, 0x1E87,
-    0x7C42, 0x1EB8,
-    0x7C36, 0x1EE9,
-    0x7C29, 0x1F19,
-    0x7C1D, 0x1F4A,
-    0x7C11, 0x1F7B,
-    0x7C05, 0x1FAC,
-    0x7BF8, 0x1FDC,
-    0x7BEB, 0x200D,
-    0x7BDF, 0x203E,
-    0x7BD2, 0x206E,
-    0x7BC5, 0x209F,
-    0x7BB9, 0x20D0,
-    0x7BAC, 0x2100,
-    0x7B9F, 0x2131,
-    0x7B92, 0x2161,
-    0x7B84, 0x2192,
-    0x7B77, 0x21C2,
-    0x7B6A, 0x21F3,
-    0x7B5D, 0x2223,
-    0x7B4F, 0x2254,
-    0x7B42, 0x2284,
-    0x7B34, 0x22B4,
-    0x7B26, 0x22E5,
-    0x7B19, 0x2315,
-    0x7B0B, 0x2345,
-    0x7AFD, 0x2376,
-    0x7AEF, 0x23A6,
-    0x7AE1, 0x23D6,
-    0x7AD3, 0x2407,
-    0x7AC5, 0x2437,
-    0x7AB6, 0x2467,
-    0x7AA8, 0x2497,
-    0x7A9A, 0x24C7,
-    0x7A8B, 0x24F7,
-    0x7A7D, 0x2528,
-    0x7A6E, 0x2558,
-    0x7A5F, 0x2588,
-    0x7A50, 0x25B8,
-    0x7A42, 0x25E8,
-    0x7A33, 0x2618,
-    0x7A24, 0x2648,
-    0x7A15, 0x2678,
-    0x7A05, 0x26A8,
-    0x79F6, 0x26D8,
-    0x79E7, 0x2707,
-    0x79D8, 0x2737,
-    0x79C8, 0x2767,
-    0x79B9, 0x2797,
-    0x79A9, 0x27C7,
-    0x7999, 0x27F6,
-    0x798A, 0x2826,
-    0x797A, 0x2856,
-    0x796A, 0x2886,
-    0x795A, 0x28B5,
-    0x794A, 0x28E5,
-    0x793A, 0x2915,
-    0x792A, 0x2944,
-    0x7919, 0x2974,
-    0x7909, 0x29A3,
-    0x78F9, 0x29D3,
-    0x78E8, 0x2A02,
-    0x78D8, 0x2A32,
-    0x78C7, 0x2A61,
-    0x78B6, 0x2A91,
-    0x78A6, 0x2AC0,
-    0x7895, 0x2AEF,
-    0x7884, 0x2B1F,
-    0x7873, 0x2B4E,
-    0x7862, 0x2B7D,
-    0x7851, 0x2BAD,
-    0x7840, 0x2BDC,
-    0x782E, 0x2C0B,
-    0x781D, 0x2C3A,
-    0x780C, 0x2C69,
-    0x77FA, 0x2C98,
-    0x77E9, 0x2CC8,
-    0x77D7, 0x2CF7,
-    0x77C5, 0x2D26,
-    0x77B4, 0x2D55,
-    0x77A2, 0x2D84,
-    0x7790, 0x2DB3,
-    0x777E, 0x2DE2,
-    0x776C, 0x2E11,
-    0x775A, 0x2E3F,
-    0x7747, 0x2E6E,
-    0x7735, 0x2E9D,
-    0x7723, 0x2ECC,
-    0x7710, 0x2EFB,
-    0x76FE, 0x2F29,
-    0x76EB, 0x2F58,
-    0x76D9, 0x2F87,
-    0x76C6, 0x2FB5,
-    0x76B3, 0x2FE4,
-    0x76A0, 0x3013,
-    0x768E, 0x3041,
-    0x767B, 0x3070,
-    0x7668, 0x309E,
-    0x7654, 0x30CD,
-    0x7641, 0x30FB,
-    0x762E, 0x312A,
-    0x761B, 0x3158,
-    0x7607, 0x3186,
-    0x75F4, 0x31B5,
-    0x75E0, 0x31E3,
-    0x75CC, 0x3211,
-    0x75B9, 0x3240,
-    0x75A5, 0x326E,
-    0x7591, 0x329C,
-    0x757D, 0x32CA,
-    0x7569, 0x32F8,
-    0x7555, 0x3326,
-    0x7541, 0x3354,
-    0x752D, 0x3382,
-    0x7519, 0x33B0,
-    0x7504, 0x33DE,
-    0x74F0, 0x340C,
-    0x74DB, 0x343A,
-    0x74C7, 0x3468,
-    0x74B2, 0x3496,
-    0x749E, 0x34C4,
-    0x7489, 0x34F2,
-    0x7474, 0x351F,
-    0x745F, 0x354D,
-    0x744A, 0x357B,
-    0x7435, 0x35A8,
-    0x7420, 0x35D6,
-    0x740B, 0x3604,
-    0x73F6, 0x3631,
-    0x73E0, 0x365F,
-    0x73CB, 0x368C,
-    0x73B5, 0x36BA,
-    0x73A0, 0x36E7,
-    0x738A, 0x3714,
-    0x7375, 0x3742,
-    0x735F, 0x376F,
-    0x7349, 0x379C,
-    0x7333, 0x37CA,
-    0x731D, 0x37F7,
-    0x7307, 0x3824,
-    0x72F1, 0x3851,
-    0x72DB, 0x387E,
-    0x72C5, 0x38AB,
-    0x72AF, 0x38D8,
-    0x7298, 0x3906,
-    0x7282, 0x3932,
-    0x726B, 0x395F,
-    0x7255, 0x398C,
-    0x723E, 0x39B9,
-    0x7227, 0x39E6,
-    0x7211, 0x3A13,
-    0x71FA, 0x3A40,
-    0x71E3, 0x3A6C,
-    0x71CC, 0x3A99,
-    0x71B5, 0x3AC6,
-    0x719E, 0x3AF2,
-    0x7186, 0x3B1F,
-    0x716F, 0x3B4C,
-    0x7158, 0x3B78,
-    0x7141, 0x3BA5,
-    0x7129, 0x3BD1,
-    0x7112, 0x3BFD,
-    0x70FA, 0x3C2A,
-    0x70E2, 0x3C56,
-    0x70CB, 0x3C83,
-    0x70B3, 0x3CAF,
-    0x709B, 0x3CDB,
-    0x7083, 0x3D07,
-    0x706B, 0x3D33,
-    0x7053, 0x3D60,
-    0x703B, 0x3D8C,
-    0x7023, 0x3DB8,
-    0x700A, 0x3DE4,
-    0x6FF2, 0x3E10,
-    0x6FDA, 0x3E3C,
-    0x6FC1, 0x3E68,
-    0x6FA9, 0x3E93,
-    0x6F90, 0x3EBF,
-    0x6F77, 0x3EEB,
-    0x6F5F, 0x3F17,
-    0x6F46, 0x3F43,
-    0x6F2D, 0x3F6E,
-    0x6F14, 0x3F9A,
-    0x6EFB, 0x3FC5,
-    0x6EE2, 0x3FF1,
-    0x6EC9, 0x401D,
-    0x6EAF, 0x4048,
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-    0x0E7F, 0x7F2D,
-    0x0E4D, 0x7F32,
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-    0x0064, 0x7FFF,
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-    0xB83C, 0x69FD,
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-    0x8130, 0x116B,
-    0x812A, 0x1139,
-    0x8123, 0x1108,
-    0x811C, 0x10D6,
-    0x8116, 0x10A4,
-    0x810F, 0x1072,
-    0x8109, 0x1040,
-    0x8102, 0x100E,
-    0x80FC, 0x0FDD,
-    0x80F6, 0x0FAB,
-    0x80F0, 0x0F79,
-    0x80EA, 0x0F47,
-    0x80E4, 0x0F15,
-    0x80DE, 0x0EE3,
-    0x80D8, 0x0EB1,
-    0x80D2, 0x0E7F,
-    0x80CD, 0x0E4D,
-    0x80C7, 0x0E1B,
-    0x80C2, 0x0DE9,
-    0x80BC, 0x0DB7,
-    0x80B7, 0x0D85,
-    0x80B2, 0x0D53,
-    0x80AC, 0x0D21,
-    0x80A7, 0x0CEF,
-    0x80A2, 0x0CBD,
-    0x809D, 0x0C8B,
-    0x8098, 0x0C59,
-    0x8094, 0x0C27,
-    0x808F, 0x0BF5,
-    0x808A, 0x0BC3,
-    0x8086, 0x0B91,
-    0x8081, 0x0B5F,
-    0x807D, 0x0B2D,
-    0x8078, 0x0AFB,
-    0x8074, 0x0AC9,
-    0x8070, 0x0A97,
-    0x806C, 0x0A65,
-    0x8068, 0x0A33,
-    0x8064, 0x0A00,
-    0x8060, 0x09CE,
-    0x805C, 0x099C,
-    0x8058, 0x096A,
-    0x8055, 0x0938,
-    0x8051, 0x0906,
-    0x804E, 0x08D4,
-    0x804A, 0x08A2,
-    0x8047, 0x086F,
-    0x8043, 0x083D,
-    0x8040, 0x080B,
-    0x803D, 0x07D9,
-    0x803A, 0x07A7,
-    0x8037, 0x0775,
-    0x8034, 0x0742,
-    0x8031, 0x0710,
-    0x802F, 0x06DE,
-    0x802C, 0x06AC,
-    0x8029, 0x067A,
-    0x8027, 0x0647,
-    0x8025, 0x0615,
-    0x8022, 0x05E3,
-    0x8020, 0x05B1,
-    0x801E, 0x057F,
-    0x801C, 0x054C,
-    0x801A, 0x051A,
-    0x8018, 0x04E8,
-    0x8016, 0x04B6,
-    0x8014, 0x0483,
-    0x8012, 0x0451,
-    0x8011, 0x041F,
-    0x800F, 0x03ED,
-    0x800D, 0x03BA,
-    0x800C, 0x0388,
-    0x800B, 0x0356,
-    0x8009, 0x0324,
-    0x8008, 0x02F1,
-    0x8007, 0x02BF,
-    0x8006, 0x028D,
-    0x8005, 0x025B,
-    0x8004, 0x0228,
-    0x8003, 0x01F6,
-    0x8003, 0x01C4,
-    0x8002, 0x0192,
-    0x8001, 0x015F,
-    0x8001, 0x012D,
-    0x8000, 0x00FB,
-    0x8000, 0x00C9,
-    0x8000, 0x0096,
-    0x8000, 0x0064,
-    0x8000, 0x0032,
-    0x8000, 0x0000,
-    0x8000, 0xFFCD,
-    0x8000, 0xFF9B,
-    0x8000, 0xFF69,
-    0x8000, 0xFF36,
-    0x8000, 0xFF04,
-    0x8001, 0xFED2,
-    0x8001, 0xFEA0,
-    0x8002, 0xFE6D,
-    0x8003, 0xFE3B,
-    0x8003, 0xFE09,
-    0x8004, 0xFDD7,
-    0x8005, 0xFDA4,
-    0x8006, 0xFD72,
-    0x8007, 0xFD40,
-    0x8008, 0xFD0E,
-    0x8009, 0xFCDB,
-    0x800B, 0xFCA9,
-    0x800C, 0xFC77,
-    0x800D, 0xFC45,
-    0x800F, 0xFC12,
-    0x8011, 0xFBE0,
-    0x8012, 0xFBAE,
-    0x8014, 0xFB7C,
-    0x8016, 0xFB49,
-    0x8018, 0xFB17,
-    0x801A, 0xFAE5,
-    0x801C, 0xFAB3,
-    0x801E, 0xFA80,
-    0x8020, 0xFA4E,
-    0x8022, 0xFA1C,
-    0x8025, 0xF9EA,
-    0x8027, 0xF9B8,
-    0x8029, 0xF985,
-    0x802C, 0xF953,
-    0x802F, 0xF921,
-    0x8031, 0xF8EF,
-    0x8034, 0xF8BD,
-    0x8037, 0xF88A,
-    0x803A, 0xF858,
-    0x803D, 0xF826,
-    0x8040, 0xF7F4,
-    0x8043, 0xF7C2,
-    0x8047, 0xF790,
-    0x804A, 0xF75D,
-    0x804E, 0xF72B,
-    0x8051, 0xF6F9,
-    0x8055, 0xF6C7,
-    0x8058, 0xF695,
-    0x805C, 0xF663,
-    0x8060, 0xF631,
-    0x8064, 0xF5FF,
-    0x8068, 0xF5CC,
-    0x806C, 0xF59A,
-    0x8070, 0xF568,
-    0x8074, 0xF536,
-    0x8078, 0xF504,
-    0x807D, 0xF4D2,
-    0x8081, 0xF4A0,
-    0x8086, 0xF46E,
-    0x808A, 0xF43C,
-    0x808F, 0xF40A,
-    0x8094, 0xF3D8,
-    0x8098, 0xF3A6,
-    0x809D, 0xF374,
-    0x80A2, 0xF342,
-    0x80A7, 0xF310,
-    0x80AC, 0xF2DE,
-    0x80B2, 0xF2AC,
-    0x80B7, 0xF27A,
-    0x80BC, 0xF248,
-    0x80C2, 0xF216,
-    0x80C7, 0xF1E4,
-    0x80CD, 0xF1B2,
-    0x80D2, 0xF180,
-    0x80D8, 0xF14E,
-    0x80DE, 0xF11C,
-    0x80E4, 0xF0EA,
-    0x80EA, 0xF0B8,
-    0x80F0, 0xF086,
-    0x80F6, 0xF054,
-    0x80FC, 0xF022,
-    0x8102, 0xEFF1,
-    0x8109, 0xEFBF,
-    0x810F, 0xEF8D,
-    0x8116, 0xEF5B,
-    0x811C, 0xEF29,
-    0x8123, 0xEEF7,
-    0x812A, 0xEEC6,
-    0x8130, 0xEE94,
-    0x8137, 0xEE62,
-    0x813E, 0xEE30,
-    0x8145, 0xEDFE,
-    0x814C, 0xEDCD,
-    0x8154, 0xED9B,
-    0x815B, 0xED69,
-    0x8162, 0xED37,
-    0x816A, 0xED06,
-    0x8171, 0xECD4,
-    0x8179, 0xECA2,
-    0x8180, 0xEC71,
-    0x8188, 0xEC3F,
-    0x8190, 0xEC0D,
-    0x8198, 0xEBDC,
-    0x81A0, 0xEBAA,
-    0x81A8, 0xEB78,
-    0x81B0, 0xEB47,
-    0x81B8, 0xEB15,
-    0x81C0, 0xEAE4,
-    0x81C8, 0xEAB2,
-    0x81D1, 0xEA80,
-    0x81D9, 0xEA4F,
-    0x81E2, 0xEA1D,
-    0x81EB, 0xE9EC,
-    0x81F3, 0xE9BA,
-    0x81FC, 0xE989,
-    0x8205, 0xE957,
-    0x820E, 0xE926,
-    0x8217, 0xE8F5,
-    0x8220, 0xE8C3,
-    0x8229, 0xE892,
-    0x8232, 0xE860,
-    0x823C, 0xE82F,
-    0x8245, 0xE7FD,
-    0x824F, 0xE7CC,
-    0x8258, 0xE79B,
-    0x8262, 0xE769,
-    0x826B, 0xE738,
-    0x8275, 0xE707,
-    0x827F, 0xE6D5,
-    0x8289, 0xE6A4,
-    0x8293, 0xE673,
-    0x829D, 0xE642,
-    0x82A7, 0xE610,
-    0x82B1, 0xE5DF,
-    0x82BC, 0xE5AE,
-    0x82C6, 0xE57D,
-    0x82D0, 0xE54C,
-    0x82DB, 0xE51B,
-    0x82E6, 0xE4E9,
-    0x82F0, 0xE4B8,
-    0x82FB, 0xE487,
-    0x8306, 0xE456,
-    0x8311, 0xE425,
-    0x831C, 0xE3F4,
-    0x8327, 0xE3C3,
-    0x8332, 0xE392,
-    0x833D, 0xE361,
-    0x8348, 0xE330,
-    0x8354, 0xE2FF,
-    0x835F, 0xE2CE,
-    0x836B, 0xE29D,
-    0x8376, 0xE26C,
-    0x8382, 0xE23B,
-    0x838E, 0xE20A,
-    0x8399, 0xE1DA,
-    0x83A5, 0xE1A9,
-    0x83B1, 0xE178,
-    0x83BD, 0xE147,
-    0x83C9, 0xE116,
-    0x83D6, 0xE0E6,
-    0x83E2, 0xE0B5,
-    0x83EE, 0xE084,
-    0x83FA, 0xE053,
-    0x8407, 0xE023,
-    0x8414, 0xDFF2,
-    0x8420, 0xDFC1,
-    0x842D, 0xDF91,
-    0x843A, 0xDF60,
-    0x8446, 0xDF2F,
-    0x8453, 0xDEFF,
-    0x8460, 0xDECE,
-    0x846D, 0xDE9E,
-    0x847B, 0xDE6D,
-    0x8488, 0xDE3D,
-    0x8495, 0xDE0C,
-    0x84A2, 0xDDDC,
-    0x84B0, 0xDDAB,
-    0x84BD, 0xDD7B,
-    0x84CB, 0xDD4B,
-    0x84D9, 0xDD1A,
-    0x84E6, 0xDCEA,
-    0x84F4, 0xDCBA,
-    0x8502, 0xDC89,
-    0x8510, 0xDC59,
-    0x851E, 0xDC29,
-    0x852C, 0xDBF8,
-    0x853A, 0xDBC8,
-    0x8549, 0xDB98,
-    0x8557, 0xDB68,
-    0x8565, 0xDB38,
-    0x8574, 0xDB08,
-    0x8582, 0xDAD7,
-    0x8591, 0xDAA7,
-    0x85A0, 0xDA77,
-    0x85AF, 0xDA47,
-    0x85BD, 0xDA17,
-    0x85CC, 0xD9E7,
-    0x85DB, 0xD9B7,
-    0x85EA, 0xD987,
-    0x85FA, 0xD957,
-    0x8609, 0xD927,
-    0x8618, 0xD8F8,
-    0x8627, 0xD8C8,
-    0x8637, 0xD898,
-    0x8646, 0xD868,
-    0x8656, 0xD838,
-    0x8666, 0xD809,
-    0x8675, 0xD7D9,
-    0x8685, 0xD7A9,
-    0x8695, 0xD779,
-    0x86A5, 0xD74A,
-    0x86B5, 0xD71A,
-    0x86C5, 0xD6EA,
-    0x86D5, 0xD6BB,
-    0x86E6, 0xD68B,
-    0x86F6, 0xD65C,
-    0x8706, 0xD62C,
-    0x8717, 0xD5FD,
-    0x8727, 0xD5CD,
-    0x8738, 0xD59E,
-    0x8749, 0xD56E,
-    0x8759, 0xD53F,
-    0x876A, 0xD510,
-    0x877B, 0xD4E0,
-    0x878C, 0xD4B1,
-    0x879D, 0xD482,
-    0x87AE, 0xD452,
-    0x87BF, 0xD423,
-    0x87D1, 0xD3F4,
-    0x87E2, 0xD3C5,
-    0x87F3, 0xD396,
-    0x8805, 0xD367,
-    0x8816, 0xD337,
-    0x8828, 0xD308,
-    0x883A, 0xD2D9,
-    0x884B, 0xD2AA,
-    0x885D, 0xD27B,
-    0x886F, 0xD24C,
-    0x8881, 0xD21D,
-    0x8893, 0xD1EE,
-    0x88A5, 0xD1C0,
-    0x88B8, 0xD191,
-    0x88CA, 0xD162,
-    0x88DC, 0xD133,
-    0x88EF, 0xD104,
-    0x8901, 0xD0D6,
-    0x8914, 0xD0A7,
-    0x8926, 0xD078,
-    0x8939, 0xD04A,
-    0x894C, 0xD01B,
-    0x895F, 0xCFEC,
-    0x8971, 0xCFBE,
-    0x8984, 0xCF8F,
-    0x8997, 0xCF61,
-    0x89AB, 0xCF32,
-    0x89BE, 0xCF04,
-    0x89D1, 0xCED5,
-    0x89E4, 0xCEA7,
-    0x89F8, 0xCE79,
-    0x8A0B, 0xCE4A,
-    0x8A1F, 0xCE1C,
-    0x8A33, 0xCDEE,
-    0x8A46, 0xCDBF,
-    0x8A5A, 0xCD91,
-    0x8A6E, 0xCD63,
-    0x8A82, 0xCD35,
-    0x8A96, 0xCD07,
-    0x8AAA, 0xCCD9,
-    0x8ABE, 0xCCAB,
-    0x8AD2, 0xCC7D,
-    0x8AE6, 0xCC4F,
-    0x8AFB, 0xCC21,
-    0x8B0F, 0xCBF3,
-    0x8B24, 0xCBC5,
-    0x8B38, 0xCB97,
-    0x8B4D, 0xCB69,
-    0x8B61, 0xCB3B,
-    0x8B76, 0xCB0D,
-    0x8B8B, 0xCAE0,
-    0x8BA0, 0xCAB2,
-    0x8BB5, 0xCA84,
-    0x8BCA, 0xCA57,
-    0x8BDF, 0xCA29,
-    0x8BF4, 0xC9FB,
-    0x8C09, 0xC9CE,
-    0x8C1F, 0xC9A0,
-    0x8C34, 0xC973,
-    0x8C4A, 0xC945,
-    0x8C5F, 0xC918,
-    0x8C75, 0xC8EB,
-    0x8C8A, 0xC8BD,
-    0x8CA0, 0xC890,
-    0x8CB6, 0xC863,
-    0x8CCC, 0xC835,
-    0x8CE2, 0xC808,
-    0x8CF8, 0xC7DB,
-    0x8D0E, 0xC7AE,
-    0x8D24, 0xC781,
-    0x8D3A, 0xC754,
-    0x8D50, 0xC727,
-    0x8D67, 0xC6F9,
-    0x8D7D, 0xC6CD,
-    0x8D94, 0xC6A0,
-    0x8DAA, 0xC673,
-    0x8DC1, 0xC646,
-    0x8DD8, 0xC619,
-    0x8DEE, 0xC5EC,
-    0x8E05, 0xC5BF,
-    0x8E1C, 0xC593,
-    0x8E33, 0xC566,
-    0x8E4A, 0xC539,
-    0x8E61, 0xC50D,
-    0x8E79, 0xC4E0,
-    0x8E90, 0xC4B3,
-    0x8EA7, 0xC487,
-    0x8EBE, 0xC45A,
-    0x8ED6, 0xC42E,
-    0x8EED, 0xC402,
-    0x8F05, 0xC3D5,
-    0x8F1D, 0xC3A9,
-    0x8F34, 0xC37C,
-    0x8F4C, 0xC350,
-    0x8F64, 0xC324,
-    0x8F7C, 0xC2F8,
-    0x8F94, 0xC2CC,
-    0x8FAC, 0xC29F,
-    0x8FC4, 0xC273,
-    0x8FDC, 0xC247,
-    0x8FF5, 0xC21B,
-    0x900D, 0xC1EF,
-    0x9025, 0xC1C3,
-    0x903E, 0xC197,
-    0x9056, 0xC16C,
-    0x906F, 0xC140,
-    0x9088, 0xC114,
-    0x90A0, 0xC0E8,
-    0x90B9, 0xC0BC,
-    0x90D2, 0xC091,
-    0x90EB, 0xC065,
-    0x9104, 0xC03A,
-    0x911D, 0xC00E,
-    0x9136, 0xBFE2,
-    0x9150, 0xBFB7,
-    0x9169, 0xBF8C,
-    0x9182, 0xBF60,
-    0x919C, 0xBF35,
-    0x91B5, 0xBF09,
-    0x91CF, 0xBEDE,
-    0x91E8, 0xBEB3,
-    0x9202, 0xBE88,
-    0x921C, 0xBE5D,
-    0x9235, 0xBE31,
-    0x924F, 0xBE06,
-    0x9269, 0xBDDB,
-    0x9283, 0xBDB0,
-    0x929D, 0xBD85,
-    0x92B7, 0xBD5A,
-    0x92D2, 0xBD2F,
-    0x92EC, 0xBD05,
-    0x9306, 0xBCDA,
-    0x9321, 0xBCAF,
-    0x933B, 0xBC84,
-    0x9356, 0xBC5A,
-    0x9370, 0xBC2F,
-    0x938B, 0xBC04,
-    0x93A6, 0xBBDA,
-    0x93C0, 0xBBAF,
-    0x93DB, 0xBB85,
-    0x93F6, 0xBB5A,
-    0x9411, 0xBB30,
-    0x942C, 0xBB05,
-    0x9447, 0xBADB,
-    0x9463, 0xBAB1,
-    0x947E, 0xBA87,
-    0x9499, 0xBA5C,
-    0x94B5, 0xBA32,
-    0x94D0, 0xBA08,
-    0x94EC, 0xB9DE,
-    0x9507, 0xB9B4,
-    0x9523, 0xB98A,
-    0x953E, 0xB960,
-    0x955A, 0xB936,
-    0x9576, 0xB90C,
-    0x9592, 0xB8E3,
-    0x95AE, 0xB8B9,
-    0x95CA, 0xB88F,
-    0x95E6, 0xB865,
-    0x9602, 0xB83C,
-    0x961E, 0xB812,
-    0x963B, 0xB7E9,
-    0x9657, 0xB7BF,
-    0x9673, 0xB796,
-    0x9690, 0xB76C,
-    0x96AC, 0xB743,
-    0x96C9, 0xB719,
-    0x96E6, 0xB6F0,
-    0x9702, 0xB6C7,
-    0x971F, 0xB69E,
-    0x973C, 0xB675,
-    0x9759, 0xB64B,
-    0x9776, 0xB622,
-    0x9793, 0xB5F9,
-    0x97B0, 0xB5D0,
-    0x97CD, 0xB5A7,
-    0x97EA, 0xB57E,
-    0x9808, 0xB556,
-    0x9825, 0xB52D,
-    0x9842, 0xB504,
-    0x9860, 0xB4DB,
-    0x987D, 0xB4B3,
-    0x989B, 0xB48A,
-    0x98B9, 0xB461,
-    0x98D6, 0xB439,
-    0x98F4, 0xB410,
-    0x9912, 0xB3E8,
-    0x9930, 0xB3C0,
-    0x994E, 0xB397,
-    0x996C, 0xB36F,
-    0x998A, 0xB347,
-    0x99A8, 0xB31E,
-    0x99C6, 0xB2F6,
-    0x99E5, 0xB2CE,
-    0x9A03, 0xB2A6,
-    0x9A22, 0xB27E,
-    0x9A40, 0xB256,
-    0x9A5F, 0xB22E,
-    0x9A7D, 0xB206,
-    0x9A9C, 0xB1DE,
-    0x9ABA, 0xB1B7,
-    0x9AD9, 0xB18F,
-    0x9AF8, 0xB167,
-    0x9B17, 0xB140,
-    0x9B36, 0xB118,
-    0x9B55, 0xB0F0,
-    0x9B74, 0xB0C9,
-    0x9B93, 0xB0A1,
-    0x9BB2, 0xB07A,
-    0x9BD2, 0xB053,
-    0x9BF1, 0xB02B,
-    0x9C10, 0xB004,
-    0x9C30, 0xAFDD,
-    0x9C4F, 0xAFB6,
-    0x9C6F, 0xAF8F,
-    0x9C8E, 0xAF68,
-    0x9CAE, 0xAF40,
-    0x9CCE, 0xAF1A,
-    0x9CEE, 0xAEF3,
-    0x9D0D, 0xAECC,
-    0x9D2D, 0xAEA5,
-    0x9D4D, 0xAE7E,
-    0x9D6D, 0xAE57,
-    0x9D8E, 0xAE31,
-    0x9DAE, 0xAE0A,
-    0x9DCE, 0xADE3,
-    0x9DEE, 0xADBD,
-    0x9E0E, 0xAD96,
-    0x9E2F, 0xAD70,
-    0x9E4F, 0xAD4A,
-    0x9E70, 0xAD23,
-    0x9E90, 0xACFD,
-    0x9EB1, 0xACD7,
-    0x9ED2, 0xACB1,
-    0x9EF2, 0xAC8A,
-    0x9F13, 0xAC64,
-    0x9F34, 0xAC3E,
-    0x9F55, 0xAC18,
-    0x9F76, 0xABF2,
-    0x9F97, 0xABCC,
-    0x9FB8, 0xABA7,
-    0x9FD9, 0xAB81,
-    0x9FFB, 0xAB5B,
-    0xA01C, 0xAB35,
-    0xA03D, 0xAB10,
-    0xA05F, 0xAAEA,
-    0xA080, 0xAAC5,
-    0xA0A1, 0xAA9F,
-    0xA0C3, 0xAA7A,
-    0xA0E5, 0xAA54,
-    0xA106, 0xAA2F,
-    0xA128, 0xAA0A,
-    0xA14A, 0xA9E5,
-    0xA16C, 0xA9BF,
-    0xA18E, 0xA99A,
-    0xA1AF, 0xA975,
-    0xA1D2, 0xA950,
-    0xA1F4, 0xA92B,
-    0xA216, 0xA906,
-    0xA238, 0xA8E2,
-    0xA25A, 0xA8BD,
-    0xA27C, 0xA898,
-    0xA29F, 0xA873,
-    0xA2C1, 0xA84F,
-    0xA2E4, 0xA82A,
-    0xA306, 0xA806,
-    0xA329, 0xA7E1,
-    0xA34B, 0xA7BD,
-    0xA36E, 0xA798,
-    0xA391, 0xA774,
-    0xA3B4, 0xA750,
-    0xA3D6, 0xA72B,
-    0xA3F9, 0xA707,
-    0xA41C, 0xA6E3,
-    0xA43F, 0xA6BF,
-    0xA462, 0xA69B,
-    0xA486, 0xA677,
-    0xA4A9, 0xA653,
-    0xA4CC, 0xA62F,
-    0xA4EF, 0xA60C,
-    0xA513, 0xA5E8,
-    0xA536, 0xA5C4,
-    0xA55A, 0xA5A1,
-    0xA57D, 0xA57D,
-    0xA5A1, 0xA55A,
-    0xA5C4, 0xA536,
-    0xA5E8, 0xA513,
-    0xA60C, 0xA4EF,
-    0xA62F, 0xA4CC,
-    0xA653, 0xA4A9,
-    0xA677, 0xA486,
-    0xA69B, 0xA462,
-    0xA6BF, 0xA43F,
-    0xA6E3, 0xA41C,
-    0xA707, 0xA3F9,
-    0xA72B, 0xA3D6,
-    0xA750, 0xA3B4,
-    0xA774, 0xA391,
-    0xA798, 0xA36E,
-    0xA7BD, 0xA34B,
-    0xA7E1, 0xA329,
-    0xA806, 0xA306,
-    0xA82A, 0xA2E4,
-    0xA84F, 0xA2C1,
-    0xA873, 0xA29F,
-    0xA898, 0xA27C,
-    0xA8BD, 0xA25A,
-    0xA8E2, 0xA238,
-    0xA906, 0xA216,
-    0xA92B, 0xA1F4,
-    0xA950, 0xA1D2,
-    0xA975, 0xA1AF,
-    0xA99A, 0xA18E,
-    0xA9BF, 0xA16C,
-    0xA9E5, 0xA14A,
-    0xAA0A, 0xA128,
-    0xAA2F, 0xA106,
-    0xAA54, 0xA0E5,
-    0xAA7A, 0xA0C3,
-    0xAA9F, 0xA0A1,
-    0xAAC5, 0xA080,
-    0xAAEA, 0xA05F,
-    0xAB10, 0xA03D,
-    0xAB35, 0xA01C,
-    0xAB5B, 0x9FFB,
-    0xAB81, 0x9FD9,
-    0xABA7, 0x9FB8,
-    0xABCC, 0x9F97,
-    0xABF2, 0x9F76,
-    0xAC18, 0x9F55,
-    0xAC3E, 0x9F34,
-    0xAC64, 0x9F13,
-    0xAC8A, 0x9EF2,
-    0xACB1, 0x9ED2,
-    0xACD7, 0x9EB1,
-    0xACFD, 0x9E90,
-    0xAD23, 0x9E70,
-    0xAD4A, 0x9E4F,
-    0xAD70, 0x9E2F,
-    0xAD96, 0x9E0E,
-    0xADBD, 0x9DEE,
-    0xADE3, 0x9DCE,
-    0xAE0A, 0x9DAE,
-    0xAE31, 0x9D8E,
-    0xAE57, 0x9D6D,
-    0xAE7E, 0x9D4D,
-    0xAEA5, 0x9D2D,
-    0xAECC, 0x9D0D,
-    0xAEF3, 0x9CEE,
-    0xAF1A, 0x9CCE,
-    0xAF40, 0x9CAE,
-    0xAF68, 0x9C8E,
-    0xAF8F, 0x9C6F,
-    0xAFB6, 0x9C4F,
-    0xAFDD, 0x9C30,
-    0xB004, 0x9C10,
-    0xB02B, 0x9BF1,
-    0xB053, 0x9BD2,
-    0xB07A, 0x9BB2,
-    0xB0A1, 0x9B93,
-    0xB0C9, 0x9B74,
-    0xB0F0, 0x9B55,
-    0xB118, 0x9B36,
-    0xB140, 0x9B17,
-    0xB167, 0x9AF8,
-    0xB18F, 0x9AD9,
-    0xB1B7, 0x9ABA,
-    0xB1DE, 0x9A9C,
-    0xB206, 0x9A7D,
-    0xB22E, 0x9A5F,
-    0xB256, 0x9A40,
-    0xB27E, 0x9A22,
-    0xB2A6, 0x9A03,
-    0xB2CE, 0x99E5,
-    0xB2F6, 0x99C6,
-    0xB31E, 0x99A8,
-    0xB347, 0x998A,
-    0xB36F, 0x996C,
-    0xB397, 0x994E,
-    0xB3C0, 0x9930,
-    0xB3E8, 0x9912,
-    0xB410, 0x98F4,
-    0xB439, 0x98D6,
-    0xB461, 0x98B9,
-    0xB48A, 0x989B,
-    0xB4B3, 0x987D,
-    0xB4DB, 0x9860,
-    0xB504, 0x9842,
-    0xB52D, 0x9825,
-    0xB556, 0x9808,
-    0xB57E, 0x97EA,
-    0xB5A7, 0x97CD,
-    0xB5D0, 0x97B0,
-    0xB5F9, 0x9793,
-    0xB622, 0x9776,
-    0xB64B, 0x9759,
-    0xB675, 0x973C,
-    0xB69E, 0x971F,
-    0xB6C7, 0x9702,
-    0xB6F0, 0x96E6,
-    0xB719, 0x96C9,
-    0xB743, 0x96AC,
-    0xB76C, 0x9690,
-    0xB796, 0x9673,
-    0xB7BF, 0x9657,
-    0xB7E9, 0x963B,
-    0xB812, 0x961E,
-    0xB83C, 0x9602,
-    0xB865, 0x95E6,
-    0xB88F, 0x95CA,
-    0xB8B9, 0x95AE,
-    0xB8E3, 0x9592,
-    0xB90C, 0x9576,
-    0xB936, 0x955A,
-    0xB960, 0x953E,
-    0xB98A, 0x9523,
-    0xB9B4, 0x9507,
-    0xB9DE, 0x94EC,
-    0xBA08, 0x94D0,
-    0xBA32, 0x94B5,
-    0xBA5C, 0x9499,
-    0xBA87, 0x947E,
-    0xBAB1, 0x9463,
-    0xBADB, 0x9447,
-    0xBB05, 0x942C,
-    0xBB30, 0x9411,
-    0xBB5A, 0x93F6,
-    0xBB85, 0x93DB,
-    0xBBAF, 0x93C0,
-    0xBBDA, 0x93A6,
-    0xBC04, 0x938B,
-    0xBC2F, 0x9370,
-    0xBC5A, 0x9356,
-    0xBC84, 0x933B,
-    0xBCAF, 0x9321,
-    0xBCDA, 0x9306,
-    0xBD05, 0x92EC,
-    0xBD2F, 0x92D2,
-    0xBD5A, 0x92B7,
-    0xBD85, 0x929D,
-    0xBDB0, 0x9283,
-    0xBDDB, 0x9269,
-    0xBE06, 0x924F,
-    0xBE31, 0x9235,
-    0xBE5D, 0x921C,
-    0xBE88, 0x9202,
-    0xBEB3, 0x91E8,
-    0xBEDE, 0x91CF,
-    0xBF09, 0x91B5,
-    0xBF35, 0x919C,
-    0xBF60, 0x9182,
-    0xBF8C, 0x9169,
-    0xBFB7, 0x9150,
-    0xBFE2, 0x9136,
-    0xC00E, 0x911D,
-    0xC03A, 0x9104,
-    0xC065, 0x90EB,
-    0xC091, 0x90D2,
-    0xC0BC, 0x90B9,
-    0xC0E8, 0x90A0,
-    0xC114, 0x9088,
-    0xC140, 0x906F,
-    0xC16C, 0x9056,
-    0xC197, 0x903E,
-    0xC1C3, 0x9025,
-    0xC1EF, 0x900D,
-    0xC21B, 0x8FF5,
-    0xC247, 0x8FDC,
-    0xC273, 0x8FC4,
-    0xC29F, 0x8FAC,
-    0xC2CC, 0x8F94,
-    0xC2F8, 0x8F7C,
-    0xC324, 0x8F64,
-    0xC350, 0x8F4C,
-    0xC37C, 0x8F34,
-    0xC3A9, 0x8F1D,
-    0xC3D5, 0x8F05,
-    0xC402, 0x8EED,
-    0xC42E, 0x8ED6,
-    0xC45A, 0x8EBE,
-    0xC487, 0x8EA7,
-    0xC4B3, 0x8E90,
-    0xC4E0, 0x8E79,
-    0xC50D, 0x8E61,
-    0xC539, 0x8E4A,
-    0xC566, 0x8E33,
-    0xC593, 0x8E1C,
-    0xC5BF, 0x8E05,
-    0xC5EC, 0x8DEE,
-    0xC619, 0x8DD8,
-    0xC646, 0x8DC1,
-    0xC673, 0x8DAA,
-    0xC6A0, 0x8D94,
-    0xC6CD, 0x8D7D,
-    0xC6F9, 0x8D67,
-    0xC727, 0x8D50,
-    0xC754, 0x8D3A,
-    0xC781, 0x8D24,
-    0xC7AE, 0x8D0E,
-    0xC7DB, 0x8CF8,
-    0xC808, 0x8CE2,
-    0xC835, 0x8CCC,
-    0xC863, 0x8CB6,
-    0xC890, 0x8CA0,
-    0xC8BD, 0x8C8A,
-    0xC8EB, 0x8C75,
-    0xC918, 0x8C5F,
-    0xC945, 0x8C4A,
-    0xC973, 0x8C34,
-    0xC9A0, 0x8C1F,
-    0xC9CE, 0x8C09,
-    0xC9FB, 0x8BF4,
-    0xCA29, 0x8BDF,
-    0xCA57, 0x8BCA,
-    0xCA84, 0x8BB5,
-    0xCAB2, 0x8BA0,
-    0xCAE0, 0x8B8B,
-    0xCB0D, 0x8B76,
-    0xCB3B, 0x8B61,
-    0xCB69, 0x8B4D,
-    0xCB97, 0x8B38,
-    0xCBC5, 0x8B24,
-    0xCBF3, 0x8B0F,
-    0xCC21, 0x8AFB,
-    0xCC4F, 0x8AE6,
-    0xCC7D, 0x8AD2,
-    0xCCAB, 0x8ABE,
-    0xCCD9, 0x8AAA,
-    0xCD07, 0x8A96,
-    0xCD35, 0x8A82,
-    0xCD63, 0x8A6E,
-    0xCD91, 0x8A5A,
-    0xCDBF, 0x8A46,
-    0xCDEE, 0x8A33,
-    0xCE1C, 0x8A1F,
-    0xCE4A, 0x8A0B,
-    0xCE79, 0x89F8,
-    0xCEA7, 0x89E4,
-    0xCED5, 0x89D1,
-    0xCF04, 0x89BE,
-    0xCF32, 0x89AB,
-    0xCF61, 0x8997,
-    0xCF8F, 0x8984,
-    0xCFBE, 0x8971,
-    0xCFEC, 0x895F,
-    0xD01B, 0x894C,
-    0xD04A, 0x8939,
-    0xD078, 0x8926,
-    0xD0A7, 0x8914,
-    0xD0D6, 0x8901,
-    0xD104, 0x88EF,
-    0xD133, 0x88DC,
-    0xD162, 0x88CA,
-    0xD191, 0x88B8,
-    0xD1C0, 0x88A5,
-    0xD1EE, 0x8893,
-    0xD21D, 0x8881,
-    0xD24C, 0x886F,
-    0xD27B, 0x885D,
-    0xD2AA, 0x884B,
-    0xD2D9, 0x883A,
-    0xD308, 0x8828,
-    0xD337, 0x8816,
-    0xD367, 0x8805,
-    0xD396, 0x87F3,
-    0xD3C5, 0x87E2,
-    0xD3F4, 0x87D1,
-    0xD423, 0x87BF,
-    0xD452, 0x87AE,
-    0xD482, 0x879D,
-    0xD4B1, 0x878C,
-    0xD4E0, 0x877B,
-    0xD510, 0x876A,
-    0xD53F, 0x8759,
-    0xD56E, 0x8749,
-    0xD59E, 0x8738,
-    0xD5CD, 0x8727,
-    0xD5FD, 0x8717,
-    0xD62C, 0x8706,
-    0xD65C, 0x86F6,
-    0xD68B, 0x86E6,
-    0xD6BB, 0x86D5,
-    0xD6EA, 0x86C5,
-    0xD71A, 0x86B5,
-    0xD74A, 0x86A5,
-    0xD779, 0x8695,
-    0xD7A9, 0x8685,
-    0xD7D9, 0x8675,
-    0xD809, 0x8666,
-    0xD838, 0x8656,
-    0xD868, 0x8646,
-    0xD898, 0x8637,
-    0xD8C8, 0x8627,
-    0xD8F8, 0x8618,
-    0xD927, 0x8609,
-    0xD957, 0x85FA,
-    0xD987, 0x85EA,
-    0xD9B7, 0x85DB,
-    0xD9E7, 0x85CC,
-    0xDA17, 0x85BD,
-    0xDA47, 0x85AF,
-    0xDA77, 0x85A0,
-    0xDAA7, 0x8591,
-    0xDAD7, 0x8582,
-    0xDB08, 0x8574,
-    0xDB38, 0x8565,
-    0xDB68, 0x8557,
-    0xDB98, 0x8549,
-    0xDBC8, 0x853A,
-    0xDBF8, 0x852C,
-    0xDC29, 0x851E,
-    0xDC59, 0x8510,
-    0xDC89, 0x8502,
-    0xDCBA, 0x84F4,
-    0xDCEA, 0x84E6,
-    0xDD1A, 0x84D9,
-    0xDD4B, 0x84CB,
-    0xDD7B, 0x84BD,
-    0xDDAB, 0x84B0,
-    0xDDDC, 0x84A2,
-    0xDE0C, 0x8495,
-    0xDE3D, 0x8488,
-    0xDE6D, 0x847B,
-    0xDE9E, 0x846D,
-    0xDECE, 0x8460,
-    0xDEFF, 0x8453,
-    0xDF2F, 0x8446,
-    0xDF60, 0x843A,
-    0xDF91, 0x842D,
-    0xDFC1, 0x8420,
-    0xDFF2, 0x8414,
-    0xE023, 0x8407,
-    0xE053, 0x83FA,
-    0xE084, 0x83EE,
-    0xE0B5, 0x83E2,
-    0xE0E6, 0x83D6,
-    0xE116, 0x83C9,
-    0xE147, 0x83BD,
-    0xE178, 0x83B1,
-    0xE1A9, 0x83A5,
-    0xE1DA, 0x8399,
-    0xE20A, 0x838E,
-    0xE23B, 0x8382,
-    0xE26C, 0x8376,
-    0xE29D, 0x836B,
-    0xE2CE, 0x835F,
-    0xE2FF, 0x8354,
-    0xE330, 0x8348,
-    0xE361, 0x833D,
-    0xE392, 0x8332,
-    0xE3C3, 0x8327,
-    0xE3F4, 0x831C,
-    0xE425, 0x8311,
-    0xE456, 0x8306,
-    0xE487, 0x82FB,
-    0xE4B8, 0x82F0,
-    0xE4E9, 0x82E6,
-    0xE51B, 0x82DB,
-    0xE54C, 0x82D0,
-    0xE57D, 0x82C6,
-    0xE5AE, 0x82BC,
-    0xE5DF, 0x82B1,
-    0xE610, 0x82A7,
-    0xE642, 0x829D,
-    0xE673, 0x8293,
-    0xE6A4, 0x8289,
-    0xE6D5, 0x827F,
-    0xE707, 0x8275,
-    0xE738, 0x826B,
-    0xE769, 0x8262,
-    0xE79B, 0x8258,
-    0xE7CC, 0x824F,
-    0xE7FD, 0x8245,
-    0xE82F, 0x823C,
-    0xE860, 0x8232,
-    0xE892, 0x8229,
-    0xE8C3, 0x8220,
-    0xE8F5, 0x8217,
-    0xE926, 0x820E,
-    0xE957, 0x8205,
-    0xE989, 0x81FC,
-    0xE9BA, 0x81F3,
-    0xE9EC, 0x81EB,
-    0xEA1D, 0x81E2,
-    0xEA4F, 0x81D9,
-    0xEA80, 0x81D1,
-    0xEAB2, 0x81C8,
-    0xEAE4, 0x81C0,
-    0xEB15, 0x81B8,
-    0xEB47, 0x81B0,
-    0xEB78, 0x81A8,
-    0xEBAA, 0x81A0,
-    0xEBDC, 0x8198,
-    0xEC0D, 0x8190,
-    0xEC3F, 0x8188,
-    0xEC71, 0x8180,
-    0xECA2, 0x8179,
-    0xECD4, 0x8171,
-    0xED06, 0x816A,
-    0xED37, 0x8162,
-    0xED69, 0x815B,
-    0xED9B, 0x8154,
-    0xEDCD, 0x814C,
-    0xEDFE, 0x8145,
-    0xEE30, 0x813E,
-    0xEE62, 0x8137,
-    0xEE94, 0x8130,
-    0xEEC6, 0x812A,
-    0xEEF7, 0x8123,
-    0xEF29, 0x811C,
-    0xEF5B, 0x8116,
-    0xEF8D, 0x810F,
-    0xEFBF, 0x8109,
-    0xEFF1, 0x8102,
-    0xF022, 0x80FC,
-    0xF054, 0x80F6,
-    0xF086, 0x80F0,
-    0xF0B8, 0x80EA,
-    0xF0EA, 0x80E4,
-    0xF11C, 0x80DE,
-    0xF14E, 0x80D8,
-    0xF180, 0x80D2,
-    0xF1B2, 0x80CD,
-    0xF1E4, 0x80C7,
-    0xF216, 0x80C2,
-    0xF248, 0x80BC,
-    0xF27A, 0x80B7,
-    0xF2AC, 0x80B2,
-    0xF2DE, 0x80AC,
-    0xF310, 0x80A7,
-    0xF342, 0x80A2,
-    0xF374, 0x809D,
-    0xF3A6, 0x8098,
-    0xF3D8, 0x8094,
-    0xF40A, 0x808F,
-    0xF43C, 0x808A,
-    0xF46E, 0x8086,
-    0xF4A0, 0x8081,
-    0xF4D2, 0x807D,
-    0xF504, 0x8078,
-    0xF536, 0x8074,
-    0xF568, 0x8070,
-    0xF59A, 0x806C,
-    0xF5CC, 0x8068,
-    0xF5FF, 0x8064,
-    0xF631, 0x8060,
-    0xF663, 0x805C,
-    0xF695, 0x8058,
-    0xF6C7, 0x8055,
-    0xF6F9, 0x8051,
-    0xF72B, 0x804E,
-    0xF75D, 0x804A,
-    0xF790, 0x8047,
-    0xF7C2, 0x8043,
-    0xF7F4, 0x8040,
-    0xF826, 0x803D,
-    0xF858, 0x803A,
-    0xF88A, 0x8037,
-    0xF8BD, 0x8034,
-    0xF8EF, 0x8031,
-    0xF921, 0x802F,
-    0xF953, 0x802C,
-    0xF985, 0x8029,
-    0xF9B8, 0x8027,
-    0xF9EA, 0x8025,
-    0xFA1C, 0x8022,
-    0xFA4E, 0x8020,
-    0xFA80, 0x801E,
-    0xFAB3, 0x801C,
-    0xFAE5, 0x801A,
-    0xFB17, 0x8018,
-    0xFB49, 0x8016,
-    0xFB7C, 0x8014,
-    0xFBAE, 0x8012,
-    0xFBE0, 0x8011,
-    0xFC12, 0x800F,
-    0xFC45, 0x800D,
-    0xFC77, 0x800C,
-    0xFCA9, 0x800B,
-    0xFCDB, 0x8009,
-    0xFD0E, 0x8008,
-    0xFD40, 0x8007,
-    0xFD72, 0x8006,
-    0xFDA4, 0x8005,
-    0xFDD7, 0x8004,
-    0xFE09, 0x8003,
-    0xFE3B, 0x8003,
-    0xFE6D, 0x8002,
-    0xFEA0, 0x8001,
-    0xFED2, 0x8001,
-    0xFF04, 0x8000,
-    0xFF36, 0x8000,
-    0xFF69, 0x8000,
-    0xFF9B, 0x8000,
-    0xFFCD, 0x8000
-};
-
-
-/**    
-* @} end of CFFT_CIFFT group    
-*/
-
-/*    
-* @brief  Q15 table for reciprocal    
-*/
-const q15_t ALIGN4 armRecipTableQ15[64] = {
- 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
- 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
- 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
- 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
- 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
- 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
- 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
- 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
- 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
- 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
- 0x41CC, 0x4146, 0x40C2, 0x4040
-};
-
-/*    
-* @brief  Q31 table for reciprocal    
-*/
-const q31_t armRecipTableQ31[64] = {
-  0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
-  0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
-  0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
-  0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
-  0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
-  0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
-  0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
-  0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
-  0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
-  0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
-  0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
-};
-
-const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH] = 
-{
-   //8x2, size 20
-   8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112
-};
-
-const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH] = 
-{
-   //8x4, size 48
-   8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208,
-   80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208,
-   152,224, 176,208, 184,232, 216,240, 200,224, 232,240
-};
-
-const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH] = 
-{   
-   //radix 8, size 56
-   8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200, 
-   96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400, 
-   184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480, 
-   368,424, 376,488, 440,496
-};
-
-const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] = 
-{
-   //8x2, size 208
-   8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768, 
-   80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520, 
-   144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776, 
-   208,328, 216,840, 224,392, 232,904, 240,456, 248,968, 264,528, 272,320, 
-   280,592, 288,768, 296,656, 304,328, 312,720, 328,784, 344,848, 352,400, 
-   360,912, 368,464, 376,976, 384,576, 392,536, 400,832, 408,600, 416,584, 
-   424,664, 432,840, 440,728, 448,592, 456,792, 464,848, 472,856, 480,600, 
-   488,920, 496,856, 504,984, 520,544, 528,576, 536,608, 552,672, 560,608, 
-   568,736, 576,768, 584,800, 592,832, 600,864, 608,800, 616,928, 624,864, 
-   632,992, 648,672, 656,896, 664,928, 688,904, 696,744, 704,896, 712,808, 
-   720,912, 728,872, 736,928, 744,936, 752,920, 760,1000, 776,800, 784,832, 
-   792,864, 808,904, 816,864, 824,920, 840,864, 856,880, 872,944, 888,1008, 
-   904,928, 912,960, 920,992, 944,968, 952,1000, 968,992, 984,1008
-};
-
-const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] = 
-{
-   //8x4, size 440
-   8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640, 
-   80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768, 
-   144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384, 
-   200,896, 208,1408, 216,1920, 224,448, 232,960, 240,1472, 248,1984, 
-   256,512, 264,520, 272,1032, 280,1544, 288,640, 296,584, 304,1096, 312,1608, 
-   320,768, 328,648, 336,1160, 344,1672, 352,896, 360,712, 368,1224, 376,1736, 
-   384,520, 392,776, 400,1288, 408,1800, 416,648, 424,840, 432,1352, 440,1864, 
-   448,776, 456,904, 464,1416, 472,1928, 480,904, 488,968, 496,1480, 504,1992, 
-   520,528, 512,1024, 528,1040, 536,1552, 544,1152, 552,592, 560,1104, 
-   568,1616, 576,1280, 584,656, 592,1168, 600,1680, 608,1408, 616,720, 
-   624,1232, 632,1744, 640,1032, 648,784, 656,1296, 664,1808, 672,1160, 
-   680,848, 688,1360, 696,1872, 704,1288, 712,912, 720,1424, 728,1936, 
-   736,1416, 744,976, 752,1488, 760,2000, 768,1536, 776,1552, 784,1048, 
-   792,1560, 800,1664, 808,1680, 816,1112, 824,1624, 832,1792, 840,1808, 
-   848,1176, 856,1688, 864,1920, 872,1936, 880,1240, 888,1752, 896,1544, 
-   904,1560, 912,1304, 920,1816, 928,1672, 936,1688, 944,1368, 952,1880, 
-   960,1800, 968,1816, 976,1432, 984,1944, 992,1928, 1000,1944, 1008,1496, 
-   1016,2008, 1032,1152, 1040,1056, 1048,1568, 1064,1408, 1072,1120, 
-   1080,1632, 1088,1536, 1096,1160, 1104,1184, 1112,1696, 1120,1552, 
-   1128,1416, 1136,1248, 1144,1760, 1160,1664, 1168,1312, 1176,1824, 
-   1184,1544, 1192,1920, 1200,1376, 1208,1888, 1216,1568, 1224,1672, 
-   1232,1440, 1240,1952, 1248,1560, 1256,1928, 1264,1504, 1272,2016, 
-   1288,1312, 1296,1408, 1304,1576, 1320,1424, 1328,1416, 1336,1640, 
-   1344,1792, 1352,1824, 1360,1920, 1368,1704, 1376,1800, 1384,1432, 
-   1392,1928, 1400,1768, 1416,1680, 1432,1832, 1440,1576, 1448,1936, 
-   1456,1832, 1464,1896, 1472,1808, 1480,1688, 1488,1936, 1496,1960, 
-   1504,1816, 1512,1944, 1520,1944, 1528,2024, 1560,1584, 1592,1648, 
-   1600,1792, 1608,1920, 1616,1800, 1624,1712, 1632,1808, 1640,1936, 
-   1648,1816, 1656,1776, 1672,1696, 1688,1840, 1704,1952, 1712,1928, 
-   1720,1904, 1728,1824, 1736,1952, 1744,1832, 1752,1968, 1760,1840, 
-   1768,1960, 1776,1944, 1784,2032, 1864,1872, 1848,1944, 1872,1888, 
-   1880,1904, 1888,1984, 1896,2000, 1912,2032, 1904,2016, 1976,2032,
-   1960,1968, 2008,2032, 1992,2016, 2024,2032
-};
-
-const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] = 
-{
-   //radix 8, size 448
-   8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576, 
-   80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152, 
-   152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216, 
-   216,1728, 224,2240, 232,2752, 240,3264, 248,3776, 264,768, 272,1280, 
-   280,1792, 288,2304, 296,2816, 304,3328, 312,3840, 328,832, 336,1344, 
-   344,1856, 352,2368, 360,2880, 368,3392, 376,3904, 392,896, 400,1408, 
-   408,1920, 416,2432, 424,2944, 432,3456, 440,3968, 456,960, 464,1472, 
-   472,1984, 480,2496, 488,3008, 496,3520, 504,4032, 528,1032, 536,1544, 
-   544,2056, 552,2568, 560,3080, 568,3592, 592,1096, 600,1608, 608,2120, 
-   616,2632, 624,3144, 632,3656, 656,1160, 664,1672, 672,2184, 680,2696, 
-   688,3208, 696,3720, 720,1224, 728,1736, 736,2248, 744,2760, 752,3272, 
-   760,3784, 784,1288, 792,1800, 800,2312, 808,2824, 816,3336, 824,3848, 
-   848,1352, 856,1864, 864,2376, 872,2888, 880,3400, 888,3912, 912,1416, 
-   920,1928, 928,2440, 936,2952, 944,3464, 952,3976, 976,1480, 984,1992, 
-   992,2504, 1000,3016, 1008,3528, 1016,4040, 1048,1552, 1056,2064, 1064,2576, 
-   1072,3088, 1080,3600, 1112,1616, 1120,2128, 1128,2640, 1136,3152, 
-   1144,3664, 1176,1680, 1184,2192, 1192,2704, 1200,3216, 1208,3728, 
-   1240,1744, 1248,2256, 1256,2768, 1264,3280, 1272,3792, 1304,1808, 
-   1312,2320, 1320,2832, 1328,3344, 1336,3856, 1368,1872, 1376,2384, 
-   1384,2896, 1392,3408, 1400,3920, 1432,1936, 1440,2448, 1448,2960, 
-   1456,3472, 1464,3984, 1496,2000, 1504,2512, 1512,3024, 1520,3536, 
-   1528,4048, 1568,2072, 1576,2584, 1584,3096, 1592,3608, 1632,2136, 
-   1640,2648, 1648,3160, 1656,3672, 1696,2200, 1704,2712, 1712,3224, 
-   1720,3736, 1760,2264, 1768,2776, 1776,3288, 1784,3800, 1824,2328, 
-   1832,2840, 1840,3352, 1848,3864, 1888,2392, 1896,2904, 1904,3416, 
-   1912,3928, 1952,2456, 1960,2968, 1968,3480, 1976,3992, 2016,2520, 
-   2024,3032, 2032,3544, 2040,4056, 2088,2592, 2096,3104, 2104,3616, 
-   2152,2656, 2160,3168, 2168,3680, 2216,2720, 2224,3232, 2232,3744, 
-   2280,2784, 2288,3296, 2296,3808, 2344,2848, 2352,3360, 2360,3872, 
-   2408,2912, 2416,3424, 2424,3936, 2472,2976, 2480,3488, 2488,4000, 
-   2536,3040, 2544,3552, 2552,4064, 2608,3112, 2616,3624, 2672,3176, 
-   2680,3688, 2736,3240, 2744,3752, 2800,3304, 2808,3816, 2864,3368, 
-   2872,3880, 2928,3432, 2936,3944, 2992,3496, 3000,4008, 3056,3560, 
-   3064,4072, 3128,3632, 3192,3696, 3256,3760, 3320,3824, 3384,3888, 
-   3448,3952, 3512,4016, 3576,4080
-};
-
-const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH] = 
-{
-   //8x2, size 1800
-   8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048, 
-   72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048, 
-   136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696, 
-   192,2112, 200,6208, 208,2624, 216,6720, 224,3136, 232,7232, 240,3648, 
-   248,7744, 256,2048, 264,4224, 272,640, 280,4736, 288,1152, 296,5248, 
-   304,1664, 312,5760, 320,2176, 328,6272, 336,2688, 344,6784, 352,3200, 
-   360,7296, 368,3712, 376,7808, 384,2112, 392,4288, 400,704, 408,4800, 
-   416,1216, 424,5312, 432,1728, 440,5824, 448,2240, 456,6336, 464,2752, 
-   472,6848, 480,3264, 488,7360, 496,3776, 504,7872, 512,2048, 520,4352, 
-   528,768, 536,4864, 544,1280, 552,5376, 560,1792, 568,5888, 576,2304, 
-   584,6400, 592,2816, 600,6912, 608,3328, 616,7424, 624,3840, 632,7936, 
-   640,2176, 648,4416, 656,832, 664,4928, 672,1344, 680,5440, 688,1856, 
-   696,5952, 704,2368, 712,6464, 720,2880, 728,6976, 736,3392, 744,7488, 
-   752,3904, 760,8000, 768,2112, 776,4480, 784,896, 792,4992, 800,1408, 
-   808,5504, 816,1920, 824,6016, 832,2432, 840,6528, 848,2944, 856,7040, 
-   864,3456, 872,7552, 880,3968, 888,8064, 896,2240, 904,4544, 912,960, 
-   920,5056, 928,1472, 936,5568, 944,1984, 952,6080, 960,2496, 968,6592, 
-   976,3008, 984,7104, 992,3520, 1000,7616, 1008,4032, 1016,8128, 1024,4096, 
-   1032,4104, 1040,4352, 1048,4616, 1056,4104, 1064,5128, 1072,1544, 
-   1080,5640, 1088,2056, 1096,6152, 1104,2568, 1112,6664, 1120,3080, 
-   1128,7176, 1136,3592, 1144,7688, 1152,6144, 1160,4168, 1168,6400, 
-   1176,4680, 1184,6152, 1192,5192, 1200,1608, 1208,5704, 1216,2120, 
-   1224,6216, 1232,2632, 1240,6728, 1248,3144, 1256,7240, 1264,3656, 
-   1272,7752, 1280,4160, 1288,4232, 1296,4416, 1304,4744, 1312,4168, 
-   1320,5256, 1328,1672, 1336,5768, 1344,2184, 1352,6280, 1360,2696, 
-   1368,6792, 1376,3208, 1384,7304, 1392,3720, 1400,7816, 1408,6208, 
-   1416,4296, 1424,6464, 1432,4808, 1440,6216, 1448,5320, 1456,1736, 
-   1464,5832, 1472,2248, 1480,6344, 1488,2760, 1496,6856, 1504,3272, 
-   1512,7368, 1520,3784, 1528,7880, 1536,4224, 1544,4360, 1552,4480, 
-   1560,4872, 1568,4232, 1576,5384, 1584,1800, 1592,5896, 1600,2312, 
-   1608,6408, 1616,2824, 1624,6920, 1632,3336, 1640,7432, 1648,3848, 
-   1656,7944, 1664,6272, 1672,4424, 1680,6528, 1688,4936, 1696,6280, 
-   1704,5448, 1712,1864, 1720,5960, 1728,2376, 1736,6472, 1744,2888, 
-   1752,6984, 1760,3400, 1768,7496, 1776,3912, 1784,8008, 1792,4288, 
-   1800,4488, 1808,4544, 1816,5000, 1824,4296, 1832,5512, 1840,1928, 
-   1848,6024, 1856,2440, 1864,6536, 1872,2952, 1880,7048, 1888,3464, 
-   1896,7560, 1904,3976, 1912,8072, 1920,6336, 1928,4552, 1936,6592, 
-   1944,5064, 1952,6344, 1960,5576, 1968,1992, 1976,6088, 1984,2504, 
-   1992,6600, 2000,3016, 2008,7112, 2016,3528, 2024,7624, 2032,4040, 
-   2040,8136, 2056,4112, 2064,2112, 2072,4624, 2080,4352, 2088,5136, 
-   2096,4480, 2104,5648, 2120,6160, 2128,2576, 2136,6672, 2144,3088, 
-   2152,7184, 2160,3600, 2168,7696, 2176,2560, 2184,4176, 2192,2816, 
-   2200,4688, 2208,2568, 2216,5200, 2224,2824, 2232,5712, 2240,2576, 
-   2248,6224, 2256,2640, 2264,6736, 2272,3152, 2280,7248, 2288,3664, 
-   2296,7760, 2312,4240, 2320,2432, 2328,4752, 2336,6400, 2344,5264, 
-   2352,6528, 2360,5776, 2368,2816, 2376,6288, 2384,2704, 2392,6800, 
-   2400,3216, 2408,7312, 2416,3728, 2424,7824, 2432,2624, 2440,4304, 
-   2448,2880, 2456,4816, 2464,2632, 2472,5328, 2480,2888, 2488,5840, 
-   2496,2640, 2504,6352, 2512,2768, 2520,6864, 2528,3280, 2536,7376, 
-   2544,3792, 2552,7888, 2568,4368, 2584,4880, 2592,4416, 2600,5392, 
-   2608,4544, 2616,5904, 2632,6416, 2640,2832, 2648,6928, 2656,3344, 
-   2664,7440, 2672,3856, 2680,7952, 2696,4432, 2704,2944, 2712,4944, 
-   2720,4432, 2728,5456, 2736,2952, 2744,5968, 2752,2944, 2760,6480, 
-   2768,2896, 2776,6992, 2784,3408, 2792,7504, 2800,3920, 2808,8016, 
-   2824,4496, 2840,5008, 2848,6464, 2856,5520, 2864,6592, 2872,6032, 
-   2888,6544, 2896,2960, 2904,7056, 2912,3472, 2920,7568, 2928,3984, 
-   2936,8080, 2952,4560, 2960,3008, 2968,5072, 2976,6480, 2984,5584, 
-   2992,3016, 3000,6096, 3016,6608, 3032,7120, 3040,3536, 3048,7632, 
-   3056,4048, 3064,8144, 3072,4608, 3080,4120, 3088,4864, 3096,4632, 
-   3104,4616, 3112,5144, 3120,4872, 3128,5656, 3136,4624, 3144,6168, 
-   3152,4880, 3160,6680, 3168,4632, 3176,7192, 3184,3608, 3192,7704, 
-   3200,6656, 3208,4184, 3216,6912, 3224,4696, 3232,6664, 3240,5208, 
-   3248,6920, 3256,5720, 3264,6672, 3272,6232, 3280,6928, 3288,6744, 
-   3296,6680, 3304,7256, 3312,3672, 3320,7768, 3328,4672, 3336,4248, 
-   3344,4928, 3352,4760, 3360,4680, 3368,5272, 3376,4936, 3384,5784, 
-   3392,4688, 3400,6296, 3408,4944, 3416,6808, 3424,4696, 3432,7320, 
-   3440,3736, 3448,7832, 3456,6720, 3464,4312, 3472,6976, 3480,4824, 
-   3488,6728, 3496,5336, 3504,6984, 3512,5848, 3520,6736, 3528,6360, 
-   3536,6992, 3544,6872, 3552,6744, 3560,7384, 3568,3800, 3576,7896, 
-   3584,4736, 3592,4376, 3600,4992, 3608,4888, 3616,4744, 3624,5400, 
-   3632,5000, 3640,5912, 3648,4752, 3656,6424, 3664,5008, 3672,6936, 
-   3680,4760, 3688,7448, 3696,3864, 3704,7960, 3712,6784, 3720,4440, 
-   3728,7040, 3736,4952, 3744,6792, 3752,5464, 3760,7048, 3768,5976, 
-   3776,6800, 3784,6488, 3792,7056, 3800,7000, 3808,6808, 3816,7512, 
-   3824,3928, 3832,8024, 3840,4800, 3848,4504, 3856,5056, 3864,5016, 
-   3872,4808, 3880,5528, 3888,5064, 3896,6040, 3904,4816, 3912,6552, 
-   3920,5072, 3928,7064, 3936,4824, 3944,7576, 3952,3992, 3960,8088, 
-   3968,6848, 3976,4568, 3984,7104, 3992,5080, 4000,6856, 4008,5592, 
-   4016,7112, 4024,6104, 4032,6864, 4040,6616, 4048,7120, 4056,7128, 
-   4064,6872, 4072,7640, 4080,7128, 4088,8152, 4104,4128, 4112,4160, 
-   4120,4640, 4136,5152, 4144,4232, 4152,5664, 4160,4352, 4168,6176, 
-   4176,4416, 4184,6688, 4192,4616, 4200,7200, 4208,4744, 4216,7712, 
-   4224,4608, 4232,4616, 4240,4672, 4248,4704, 4256,4640, 4264,5216, 
-   4272,4704, 4280,5728, 4288,4864, 4296,6240, 4304,4928, 4312,6752, 
-   4320,4632, 4328,7264, 4336,4760, 4344,7776, 4360,4640, 4368,4416, 
-   4376,4768, 4384,6152, 4392,5280, 4400,6280, 4408,5792, 4424,6304, 
-   4440,6816, 4448,6664, 4456,7328, 4464,6792, 4472,7840, 4480,4624, 
-   4488,4632, 4496,4688, 4504,4832, 4512,6168, 4520,5344, 4528,6296, 
-   4536,5856, 4544,4880, 4552,6368, 4560,4944, 4568,6880, 4576,6680, 
-   4584,7392, 4592,6808, 4600,7904, 4608,6144, 4616,6152, 4624,6208, 
-   4632,4896, 4640,6176, 4648,5408, 4656,6240, 4664,5920, 4672,6400, 
-   4680,6432, 4688,6464, 4696,6944, 4704,6432, 4712,7456, 4720,4808, 
-   4728,7968, 4736,6656, 4744,6664, 4752,6720, 4760,4960, 4768,6688, 
-   4776,5472, 4784,6752, 4792,5984, 4800,6912, 4808,6496, 4816,6976, 
-   4824,7008, 4832,6944, 4840,7520, 4848,7008, 4856,8032, 4864,6160, 
-   4872,6168, 4880,6224, 4888,5024, 4896,6216, 4904,5536, 4912,6344, 
-   4920,6048, 4928,6416, 4936,6560, 4944,6480, 4952,7072, 4960,6728, 
-   4968,7584, 4976,6856, 4984,8096, 4992,6672, 5000,6680, 5008,6736, 
-   5016,5088, 5024,6232, 5032,5600, 5040,6360, 5048,6112, 5056,6928, 
-   5064,6624, 5072,6992, 5080,7136, 5088,6744, 5096,7648, 5104,6872, 
-   5112,8160, 5128,5152, 5136,5376, 5144,5408, 5168,5384, 5176,5672, 
-   5184,5376, 5192,6184, 5200,5392, 5208,6696, 5216,5408, 5224,7208, 
-   5232,5400, 5240,7720, 5248,7168, 5256,7200, 5264,7424, 5272,7456, 
-   5280,7176, 5288,7208, 5296,7432, 5304,5736, 5312,7184, 5320,6248, 
-   5328,7440, 5336,6760, 5344,7192, 5352,7272, 5360,7448, 5368,7784, 
-   5384,5408, 5392,5440, 5400,5472, 5408,6184, 5416,7208, 5424,5448, 
-   5432,5800, 5448,6312, 5464,6824, 5472,6696, 5480,7336, 5488,6824, 
-   5496,7848, 5504,7232, 5512,7264, 5520,7488, 5528,7520, 5536,7240, 
-   5544,7272, 5552,7496, 5560,5864, 5568,7248, 5576,6376, 5584,7504, 
-   5592,6888, 5600,7256, 5608,7400, 5616,7512, 5624,7912, 5632,7168, 
-   5640,7176, 5648,7232, 5656,7240, 5664,7200, 5672,7208, 5680,7264, 
-   5688,5928, 5696,7424, 5704,6440, 5712,7488, 5720,6952, 5728,7456, 
-   5736,7464, 5744,7520, 5752,7976, 5760,7296, 5768,7328, 5776,7552, 
-   5784,7584, 5792,7304, 5800,7336, 5808,7560, 5816,5992, 5824,7312, 
-   5832,6504, 5840,7568, 5848,7016, 5856,7320, 5864,7528, 5872,7576, 
-   5880,8040, 5888,7184, 5896,7192, 5904,7248, 5912,7256, 5920,6248, 
-   5928,7272, 5936,6376, 5944,6056, 5952,7440, 5960,6568, 5968,7504, 
-   5976,7080, 5984,6760, 5992,7592, 6000,6888, 6008,8104, 6016,7360, 
-   6024,7392, 6032,7616, 6040,7648, 6048,7368, 6056,7400, 6064,7624, 
-   6072,6120, 6080,7376, 6088,6632, 6096,7632, 6104,7144, 6112,7384, 
-   6120,7656, 6128,7640, 6136,8168, 6168,6240, 6192,6216, 6200,7264, 
-   6232,6704, 6248,7216, 6256,6680, 6264,7728, 6272,6656, 6280,6664, 
-   6288,6912, 6296,6496, 6304,6688, 6312,6696, 6320,6944, 6328,7520, 
-   6336,6672, 6344,6680, 6352,6928, 6360,6768, 6368,6704, 6376,7280, 
-   6384,6744, 6392,7792, 6408,6432, 6424,6752, 6440,7432, 6448,6536, 
-   6456,7560, 6472,6944, 6488,6832, 6496,6920, 6504,7344, 6512,7048, 
-   6520,7856, 6528,6720, 6536,6728, 6544,6976, 6552,7008, 6560,6752, 
-   6568,7448, 6576,7008, 6584,7576, 6592,6736, 6600,6744, 6608,6992, 
-   6616,6896, 6624,6936, 6632,7408, 6640,7064, 6648,7920, 6712,7280, 
-   6744,6960, 6760,7472, 6768,6936, 6776,7984, 6800,6848, 6808,6856, 
-   6832,6880, 6840,6888, 6848,7040, 6856,7048, 6864,7104, 6872,7024, 
-   6880,7072, 6888,7536, 6896,7136, 6904,8048, 6952,7496, 6968,7624, 
-   6984,7008, 7000,7088, 7016,7600, 7024,7112, 7032,8112, 7056,7104, 
-   7064,7112, 7080,7512, 7088,7136, 7096,7640, 7128,7152, 7144,7664, 
-   7160,8176, 7176,7200, 7192,7216, 7224,7272, 7240,7264, 7256,7280, 
-   7288,7736, 7296,7680, 7304,7712, 7312,7936, 7320,7968, 7328,7688, 
-   7336,7720, 7344,7944, 7352,7976, 7360,7696, 7368,7728, 7376,7952, 
-   7384,7984, 7392,7704, 7400,7736, 7408,7960, 7416,7800, 7432,7456, 
-   7448,7472, 7480,7592, 7496,7520, 7512,7536, 7528,7976, 7544,7864, 
-   7552,7744, 7560,7776, 7568,8000, 7576,8032, 7584,7752, 7592,7784, 
-   7600,8008, 7608,8040, 7616,7760, 7624,7792, 7632,8016, 7640,8048, 
-   7648,7768, 7656,7800, 7664,8024, 7672,7928, 7688,7712, 7704,7728, 
-   7752,7776, 7768,7792, 7800,7992, 7816,7840, 7824,8064, 7832,8096, 
-   7856,8072, 7864,8104, 7872,8064, 7880,8072, 7888,8080, 7896,8112, 
-   7904,8096, 7912,8104, 7920,8088, 7928,8056, 7944,7968, 7960,7984, 
-   8008,8032, 8024,8048, 8056,8120, 8072,8096, 8080,8128, 8088,8160, 
-   8112,8136, 8120,8168, 8136,8160, 8152,8176
-};
-
-const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH] = 
-{
-   //8x2, size 3808
-   8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024, 
-   72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824, 
-   128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752, 
-   184,14848, 192,3072, 200,7168, 208,11264, 216,15360, 224,3584, 232,7680, 
-   240,11776, 248,15872, 256,1024, 264,4160, 272,8256, 280,12352, 288,576, 
-   296,4672, 304,8768, 312,12864, 320,1088, 328,5184, 336,9280, 344,13376, 
-   352,1600, 360,5696, 368,9792, 376,13888, 384,2112, 392,6208, 400,10304, 
-   408,14400, 416,2624, 424,6720, 432,10816, 440,14912, 448,3136, 456,7232, 
-   464,11328, 472,15424, 480,3648, 488,7744, 496,11840, 504,15936, 512,2048, 
-   520,4224, 528,8320, 536,12416, 544,640, 552,4736, 560,8832, 568,12928, 
-   576,1152, 584,5248, 592,9344, 600,13440, 608,1664, 616,5760, 624,9856, 
-   632,13952, 640,2176, 648,6272, 656,10368, 664,14464, 672,2688, 680,6784, 
-   688,10880, 696,14976, 704,3200, 712,7296, 720,11392, 728,15488, 736,3712, 
-   744,7808, 752,11904, 760,16000, 768,3072, 776,4288, 784,8384, 792,12480, 
-   800,3200, 808,4800, 816,8896, 824,12992, 832,1216, 840,5312, 848,9408, 
-   856,13504, 864,1728, 872,5824, 880,9920, 888,14016, 896,2240, 904,6336, 
-   912,10432, 920,14528, 928,2752, 936,6848, 944,10944, 952,15040, 960,3264, 
-   968,7360, 976,11456, 984,15552, 992,3776, 1000,7872, 1008,11968, 1016,16064, 
-   1032,4352, 1040,8448, 1048,12544, 1056,3072, 1064,4864, 1072,8960, 
-   1080,13056, 1088,1280, 1096,5376, 1104,9472, 1112,13568, 1120,1792, 
-   1128,5888, 1136,9984, 1144,14080, 1152,2304, 1160,6400, 1168,10496, 
-   1176,14592, 1184,2816, 1192,6912, 1200,11008, 1208,15104, 1216,3328, 
-   1224,7424, 1232,11520, 1240,15616, 1248,3840, 1256,7936, 1264,12032, 
-   1272,16128, 1288,4416, 1296,8512, 1304,12608, 1312,3328, 1320,4928, 
-   1328,9024, 1336,13120, 1352,5440, 1360,9536, 1368,13632, 1376,1856, 
-   1384,5952, 1392,10048, 1400,14144, 1408,2368, 1416,6464, 1424,10560, 
-   1432,14656, 1440,2880, 1448,6976, 1456,11072, 1464,15168, 1472,3392, 
-   1480,7488, 1488,11584, 1496,15680, 1504,3904, 1512,8000, 1520,12096, 
-   1528,16192, 1536,2112, 1544,4480, 1552,8576, 1560,12672, 1568,2240, 
-   1576,4992, 1584,9088, 1592,13184, 1600,2368, 1608,5504, 1616,9600, 
-   1624,13696, 1632,1920, 1640,6016, 1648,10112, 1656,14208, 1664,2432, 
-   1672,6528, 1680,10624, 1688,14720, 1696,2944, 1704,7040, 1712,11136, 
-   1720,15232, 1728,3456, 1736,7552, 1744,11648, 1752,15744, 1760,3968, 
-   1768,8064, 1776,12160, 1784,16256, 1792,3136, 1800,4544, 1808,8640, 
-   1816,12736, 1824,3264, 1832,5056, 1840,9152, 1848,13248, 1856,3392, 
-   1864,5568, 1872,9664, 1880,13760, 1888,1984, 1896,6080, 1904,10176, 
-   1912,14272, 1920,2496, 1928,6592, 1936,10688, 1944,14784, 1952,3008, 
-   1960,7104, 1968,11200, 1976,15296, 1984,3520, 1992,7616, 2000,11712, 
-   2008,15808, 2016,4032, 2024,8128, 2032,12224, 2040,16320, 2048,4096, 
-   2056,4104, 2064,8200, 2072,12296, 2080,4224, 2088,4616, 2096,8712, 
-   2104,12808, 2112,4352, 2120,5128, 2128,9224, 2136,13320, 2144,4480, 
-   2152,5640, 2160,9736, 2168,13832, 2176,4104, 2184,6152, 2192,10248, 
-   2200,14344, 2208,2568, 2216,6664, 2224,10760, 2232,14856, 2240,3080, 
-   2248,7176, 2256,11272, 2264,15368, 2272,3592, 2280,7688, 2288,11784, 
-   2296,15880, 2304,5120, 2312,4168, 2320,8264, 2328,12360, 2336,5248, 
-   2344,4680, 2352,8776, 2360,12872, 2368,5376, 2376,5192, 2384,9288, 
-   2392,13384, 2400,5504, 2408,5704, 2416,9800, 2424,13896, 2432,5128, 
-   2440,6216, 2448,10312, 2456,14408, 2464,2632, 2472,6728, 2480,10824, 
-   2488,14920, 2496,3144, 2504,7240, 2512,11336, 2520,15432, 2528,3656, 
-   2536,7752, 2544,11848, 2552,15944, 2560,6144, 2568,4232, 2576,8328, 
-   2584,12424, 2592,6272, 2600,4744, 2608,8840, 2616,12936, 2624,6400, 
-   2632,5256, 2640,9352, 2648,13448, 2656,6528, 2664,5768, 2672,9864, 
-   2680,13960, 2688,6152, 2696,6280, 2704,10376, 2712,14472, 2720,6280, 
-   2728,6792, 2736,10888, 2744,14984, 2752,3208, 2760,7304, 2768,11400, 
-   2776,15496, 2784,3720, 2792,7816, 2800,11912, 2808,16008, 2816,7168, 
-   2824,4296, 2832,8392, 2840,12488, 2848,7296, 2856,4808, 2864,8904, 
-   2872,13000, 2880,7424, 2888,5320, 2896,9416, 2904,13512, 2912,7552, 
-   2920,5832, 2928,9928, 2936,14024, 2944,7176, 2952,6344, 2960,10440, 
-   2968,14536, 2976,7304, 2984,6856, 2992,10952, 3000,15048, 3008,3272, 
-   3016,7368, 3024,11464, 3032,15560, 3040,3784, 3048,7880, 3056,11976, 
-   3064,16072, 3072,4160, 3080,4360, 3088,8456, 3096,12552, 3104,4288, 
-   3112,4872, 3120,8968, 3128,13064, 3136,4416, 3144,5384, 3152,9480, 
-   3160,13576, 3168,4544, 3176,5896, 3184,9992, 3192,14088, 3200,4168, 
-   3208,6408, 3216,10504, 3224,14600, 3232,4296, 3240,6920, 3248,11016, 
-   3256,15112, 3264,3336, 3272,7432, 3280,11528, 3288,15624, 3296,3848, 
-   3304,7944, 3312,12040, 3320,16136, 3328,5184, 3336,4424, 3344,8520, 
-   3352,12616, 3360,5312, 3368,4936, 3376,9032, 3384,13128, 3392,5440, 
-   3400,5448, 3408,9544, 3416,13640, 3424,5568, 3432,5960, 3440,10056, 
-   3448,14152, 3456,5192, 3464,6472, 3472,10568, 3480,14664, 3488,5320, 
-   3496,6984, 3504,11080, 3512,15176, 3520,5448, 3528,7496, 3536,11592, 
-   3544,15688, 3552,3912, 3560,8008, 3568,12104, 3576,16200, 3584,6208, 
-   3592,4488, 3600,8584, 3608,12680, 3616,6336, 3624,5000, 3632,9096, 
-   3640,13192, 3648,6464, 3656,5512, 3664,9608, 3672,13704, 3680,6592, 
-   3688,6024, 3696,10120, 3704,14216, 3712,6216, 3720,6536, 3728,10632, 
-   3736,14728, 3744,6344, 3752,7048, 3760,11144, 3768,15240, 3776,6472, 
-   3784,7560, 3792,11656, 3800,15752, 3808,3976, 3816,8072, 3824,12168, 
-   3832,16264, 3840,7232, 3848,4552, 3856,8648, 3864,12744, 3872,7360, 
-   3880,5064, 3888,9160, 3896,13256, 3904,7488, 3912,5576, 3920,9672, 
-   3928,13768, 3936,7616, 3944,6088, 3952,10184, 3960,14280, 3968,7240, 
-   3976,6600, 3984,10696, 3992,14792, 4000,7368, 4008,7112, 4016,11208, 
-   4024,15304, 4032,7496, 4040,7624, 4048,11720, 4056,15816, 4064,7624, 
-   4072,8136, 4080,12232, 4088,16328, 4096,8192, 4104,4112, 4112,8208, 
-   4120,12304, 4128,8320, 4136,4624, 4144,8720, 4152,12816, 4160,8448, 
-   4168,5136, 4176,9232, 4184,13328, 4192,8576, 4200,5648, 4208,9744, 
-   4216,13840, 4224,8200, 4232,6160, 4240,10256, 4248,14352, 4256,8328, 
-   4264,6672, 4272,10768, 4280,14864, 4288,8456, 4296,7184, 4304,11280, 
-   4312,15376, 4320,8584, 4328,7696, 4336,11792, 4344,15888, 4352,9216, 
-   4360,9232, 4368,8272, 4376,12368, 4384,9344, 4392,4688, 4400,8784, 
-   4408,12880, 4416,9472, 4424,5200, 4432,9296, 4440,13392, 4448,9600, 
-   4456,5712, 4464,9808, 4472,13904, 4480,9224, 4488,6224, 4496,10320, 
-   4504,14416, 4512,9352, 4520,6736, 4528,10832, 4536,14928, 4544,9480, 
-   4552,7248, 4560,11344, 4568,15440, 4576,9608, 4584,7760, 4592,11856, 
-   4600,15952, 4608,10240, 4616,10256, 4624,8336, 4632,12432, 4640,10368, 
-   4648,4752, 4656,8848, 4664,12944, 4672,10496, 4680,5264, 4688,9360, 
-   4696,13456, 4704,10624, 4712,5776, 4720,9872, 4728,13968, 4736,10248, 
-   4744,6288, 4752,10384, 4760,14480, 4768,10376, 4776,6800, 4784,10896, 
-   4792,14992, 4800,10504, 4808,7312, 4816,11408, 4824,15504, 4832,10632, 
-   4840,7824, 4848,11920, 4856,16016, 4864,11264, 4872,11280, 4880,8400, 
-   4888,12496, 4896,11392, 4904,11408, 4912,8912, 4920,13008, 4928,11520, 
-   4936,5328, 4944,9424, 4952,13520, 4960,11648, 4968,5840, 4976,9936, 
-   4984,14032, 4992,11272, 5000,6352, 5008,10448, 5016,14544, 5024,11400, 
-   5032,6864, 5040,10960, 5048,15056, 5056,11528, 5064,7376, 5072,11472, 
-   5080,15568, 5088,11656, 5096,7888, 5104,11984, 5112,16080, 5120,8256, 
-   5128,8272, 5136,8464, 5144,12560, 5152,8384, 5160,8400, 5168,8976, 
-   5176,13072, 5184,8512, 5192,5392, 5200,9488, 5208,13584, 5216,8640, 
-   5224,5904, 5232,10000, 5240,14096, 5248,8264, 5256,6416, 5264,10512, 
-   5272,14608, 5280,8392, 5288,6928, 5296,11024, 5304,15120, 5312,8520, 
-   5320,7440, 5328,11536, 5336,15632, 5344,8648, 5352,7952, 5360,12048, 
-   5368,16144, 5376,9280, 5384,9296, 5392,8528, 5400,12624, 5408,9408, 
-   5416,9424, 5424,9040, 5432,13136, 5440,9536, 5448,5456, 5456,9552, 
-   5464,13648, 5472,9664, 5480,5968, 5488,10064, 5496,14160, 5504,9288, 
-   5512,6480, 5520,10576, 5528,14672, 5536,9416, 5544,6992, 5552,11088, 
-   5560,15184, 5568,9544, 5576,7504, 5584,11600, 5592,15696, 5600,9672, 
-   5608,8016, 5616,12112, 5624,16208, 5632,10304, 5640,10320, 5648,8592, 
-   5656,12688, 5664,10432, 5672,10448, 5680,9104, 5688,13200, 5696,10560, 
-   5704,10576, 5712,9616, 5720,13712, 5728,10688, 5736,6032, 5744,10128, 
-   5752,14224, 5760,10312, 5768,6544, 5776,10640, 5784,14736, 5792,10440, 
-   5800,7056, 5808,11152, 5816,15248, 5824,10568, 5832,7568, 5840,11664, 
-   5848,15760, 5856,10696, 5864,8080, 5872,12176, 5880,16272, 5888,11328, 
-   5896,11344, 5904,8656, 5912,12752, 5920,11456, 5928,11472, 5936,9168, 
-   5944,13264, 5952,11584, 5960,11600, 5968,9680, 5976,13776, 5984,11712, 
-   5992,6096, 6000,10192, 6008,14288, 6016,11336, 6024,6608, 6032,10704, 
-   6040,14800, 6048,11464, 6056,7120, 6064,11216, 6072,15312, 6080,11592, 
-   6088,7632, 6096,11728, 6104,15824, 6112,11720, 6120,8144, 6128,12240, 
-   6136,16336, 6144,12288, 6152,12304, 6160,8216, 6168,12312, 6176,12416, 
-   6184,12432, 6192,8728, 6200,12824, 6208,12544, 6216,12560, 6224,9240, 
-   6232,13336, 6240,12672, 6248,12688, 6256,9752, 6264,13848, 6272,12296, 
-   6280,12312, 6288,10264, 6296,14360, 6304,12424, 6312,6680, 6320,10776, 
-   6328,14872, 6336,12552, 6344,7192, 6352,11288, 6360,15384, 6368,12680, 
-   6376,7704, 6384,11800, 6392,15896, 6400,13312, 6408,13328, 6416,8280, 
-   6424,12376, 6432,13440, 6440,13456, 6448,8792, 6456,12888, 6464,13568, 
-   6472,13584, 6480,9304, 6488,13400, 6496,13696, 6504,13712, 6512,9816, 
-   6520,13912, 6528,13320, 6536,13336, 6544,10328, 6552,14424, 6560,13448, 
-   6568,6744, 6576,10840, 6584,14936, 6592,13576, 6600,7256, 6608,11352, 
-   6616,15448, 6624,13704, 6632,7768, 6640,11864, 6648,15960, 6656,14336, 
-   6664,14352, 6672,8344, 6680,12440, 6688,14464, 6696,14480, 6704,8856, 
-   6712,12952, 6720,14592, 6728,14608, 6736,9368, 6744,13464, 6752,14720, 
-   6760,14736, 6768,9880, 6776,13976, 6784,14344, 6792,14360, 6800,10392, 
-   6808,14488, 6816,14472, 6824,14488, 6832,10904, 6840,15000, 6848,14600, 
-   6856,7320, 6864,11416, 6872,15512, 6880,14728, 6888,7832, 6896,11928, 
-   6904,16024, 6912,15360, 6920,15376, 6928,8408, 6936,12504, 6944,15488, 
-   6952,15504, 6960,8920, 6968,13016, 6976,15616, 6984,15632, 6992,9432, 
-   7000,13528, 7008,15744, 7016,15760, 7024,9944, 7032,14040, 7040,15368, 
-   7048,15384, 7056,10456, 7064,14552, 7072,15496, 7080,15512, 7088,10968, 
-   7096,15064, 7104,15624, 7112,7384, 7120,11480, 7128,15576, 7136,15752, 
-   7144,7896, 7152,11992, 7160,16088, 7168,12352, 7176,12368, 7184,8472, 
-   7192,12568, 7200,12480, 7208,12496, 7216,8984, 7224,13080, 7232,12608, 
-   7240,12624, 7248,9496, 7256,13592, 7264,12736, 7272,12752, 7280,10008, 
-   7288,14104, 7296,12360, 7304,12376, 7312,10520, 7320,14616, 7328,12488, 
-   7336,12504, 7344,11032, 7352,15128, 7360,12616, 7368,7448, 7376,11544, 
-   7384,15640, 7392,12744, 7400,7960, 7408,12056, 7416,16152, 7424,13376, 
-   7432,13392, 7440,8536, 7448,12632, 7456,13504, 7464,13520, 7472,9048, 
-   7480,13144, 7488,13632, 7496,13648, 7504,9560, 7512,13656, 7520,13760, 
-   7528,13776, 7536,10072, 7544,14168, 7552,13384, 7560,13400, 7568,10584, 
-   7576,14680, 7584,13512, 7592,13528, 7600,11096, 7608,15192, 7616,13640, 
-   7624,13656, 7632,11608, 7640,15704, 7648,13768, 7656,8024, 7664,12120, 
-   7672,16216, 7680,14400, 7688,14416, 7696,8600, 7704,12696, 7712,14528, 
-   7720,14544, 7728,9112, 7736,13208, 7744,14656, 7752,14672, 7760,9624, 
-   7768,13720, 7776,14784, 7784,14800, 7792,10136, 7800,14232, 7808,14408, 
-   7816,14424, 7824,10648, 7832,14744, 7840,14536, 7848,14552, 7856,11160, 
-   7864,15256, 7872,14664, 7880,14680, 7888,11672, 7896,15768, 7904,14792, 
-   7912,8088, 7920,12184, 7928,16280, 7936,15424, 7944,15440, 7952,8664, 
-   7960,12760, 7968,15552, 7976,15568, 7984,9176, 7992,13272, 8000,15680, 
-   8008,15696, 8016,9688, 8024,13784, 8032,15808, 8040,15824, 8048,10200, 
-   8056,14296, 8064,15432, 8072,15448, 8080,10712, 8088,14808, 8096,15560, 
-   8104,15576, 8112,11224, 8120,15320, 8128,15688, 8136,15704, 8144,11736, 
-   8152,15832, 8160,15816, 8168,15832, 8176,12248, 8184,16344, 8200,8320, 
-   8208,8224, 8216,12320, 8232,10368, 8240,8736, 8248,12832, 8256,8448, 
-   8264,8384, 8272,9248, 8280,13344, 8288,9232, 8296,10432, 8304,9760, 
-   8312,13856, 8328,12416, 8336,10272, 8344,14368, 8352,12296, 8360,14464, 
-   8368,10784, 8376,14880, 8384,8456, 8392,12480, 8400,11296, 8408,15392, 
-   8416,12552, 8424,14528, 8432,11808, 8440,15904, 8448,9216, 8456,8576, 
-   8464,9232, 8472,12384, 8480,9248, 8488,10624, 8496,8800, 8504,12896, 
-   8512,9472, 8520,8640, 8528,9312, 8536,13408, 8544,9296, 8552,10688, 
-   8560,9824, 8568,13920, 8576,9224, 8584,12672, 8592,10336, 8600,14432, 
-   8608,13320, 8616,14720, 8624,10848, 8632,14944, 8640,9480, 8648,12736, 
-   8656,11360, 8664,15456, 8672,13576, 8680,14784, 8688,11872, 8696,15968, 
-   8704,12288, 8712,12416, 8720,12296, 8728,12448, 8736,12304, 8744,10376, 
-   8752,8864, 8760,12960, 8768,12352, 8776,12480, 8784,9376, 8792,13472, 
-   8800,12368, 8808,10440, 8816,9888, 8824,13984, 8832,12320, 8840,12424, 
-   8848,10400, 8856,14496, 8864,12312, 8872,14472, 8880,10912, 8888,15008, 
-   8896,12384, 8904,12488, 8912,11424, 8920,15520, 8928,12568, 8936,14536, 
-   8944,11936, 8952,16032, 8960,12544, 8968,12672, 8976,12552, 8984,12512, 
-   8992,12560, 9000,10632, 9008,12568, 9016,13024, 9024,12608, 9032,12736, 
-   9040,9440, 9048,13536, 9056,12624, 9064,10696, 9072,9952, 9080,14048, 
-   9088,9240, 9096,12680, 9104,10464, 9112,14560, 9120,13336, 9128,14728, 
-   9136,10976, 9144,15072, 9152,9496, 9160,12744, 9168,11488, 9176,15584, 
-   9184,13592, 9192,14792, 9200,12000, 9208,16096, 9224,9344, 9232,9248, 
-   9240,12576, 9256,11392, 9264,12560, 9272,13088, 9280,9472, 9288,9408, 
-   9296,9504, 9304,13600, 9312,9488, 9320,11456, 9328,10016, 9336,14112, 
-   9352,13440, 9360,10528, 9368,14624, 9376,12360, 9384,15488, 9392,11040, 
-   9400,15136, 9408,9480, 9416,13504, 9424,11552, 9432,15648, 9440,12616, 
-   9448,15552, 9456,12064, 9464,16160, 9480,9600, 9488,9504, 9496,12640, 
-   9512,11648, 9520,12624, 9528,13152, 9544,9664, 9552,9568, 9560,13664, 
-   9576,11712, 9584,10080, 9592,14176, 9608,13696, 9616,10592, 9624,14688, 
-   9632,13384, 9640,15744, 9648,11104, 9656,15200, 9672,13760, 9680,11616, 
-   9688,15712, 9696,13640, 9704,15808, 9712,12128, 9720,16224, 9728,13312, 
-   9736,13440, 9744,13320, 9752,12704, 9760,13328, 9768,11400, 9776,13336, 
-   9784,13216, 9792,13376, 9800,13504, 9808,13384, 9816,13728, 9824,13392, 
-   9832,11464, 9840,10144, 9848,14240, 9856,13344, 9864,13448, 9872,10656, 
-   9880,14752, 9888,12376, 9896,15496, 9904,11168, 9912,15264, 9920,13408, 
-   9928,13512, 9936,11680, 9944,15776, 9952,12632, 9960,15560, 9968,12192, 
-   9976,16288, 9984,13568, 9992,13696, 10000,13576, 10008,12768, 10016,13584, 
-   10024,11656, 10032,13592, 10040,13280, 10048,13632, 10056,13760, 
-   10064,13640, 10072,13792, 10080,13648, 10088,11720, 10096,10208, 
-   10104,14304, 10112,13600, 10120,13704, 10128,10720, 10136,14816, 
-   10144,13400, 10152,15752, 10160,11232, 10168,15328, 10176,13664, 
-   10184,13768, 10192,11744, 10200,15840, 10208,13656, 10216,15816, 
-   10224,12256, 10232,16352, 10248,10272, 10256,10368, 10264,12328, 
-   10280,10384, 10288,10376, 10296,12840, 10304,11264, 10312,11296, 
-   10320,11392, 10328,13352, 10336,11272, 10344,10448, 10352,11400, 
-   10360,13864, 10376,12432, 10392,14376, 10400,12328, 10408,14480, 
-   10416,10792, 10424,14888, 10432,11280, 10440,12496, 10448,11304, 
-   10456,15400, 10464,11288, 10472,14544, 10480,11816, 10488,15912, 
-   10496,11264, 10504,11272, 10512,11280, 10520,12392, 10528,11296, 
-   10536,10640, 10544,12496, 10552,12904, 10560,11328, 10568,11360, 
-   10576,11456, 10584,13416, 10592,11336, 10600,10704, 10608,11464, 
-   10616,13928, 10624,11392, 10632,12688, 10640,11304, 10648,14440, 
-   10656,13352, 10664,14736, 10672,10856, 10680,14952, 10688,11344, 
-   10696,12752, 10704,11368, 10712,15464, 10720,11352, 10728,14800, 
-   10736,11880, 10744,15976, 10752,14336, 10760,14368, 10768,14464, 
-   10776,12456, 10784,14344, 10792,14376, 10800,14472, 10808,12968, 
-   10816,15360, 10824,15392, 10832,15488, 10840,13480, 10848,15368, 
-   10856,15400, 10864,15496, 10872,13992, 10880,14352, 10888,12440, 
-   10896,14480, 10904,14504, 10912,14360, 10920,14488, 10928,14488, 
-   10936,15016, 10944,15376, 10952,12504, 10960,11432, 10968,15528, 
-   10976,15384, 10984,14552, 10992,11944, 11000,16040, 11008,14400, 
-   11016,14432, 11024,14528, 11032,12520, 11040,14408, 11048,14440, 
-   11056,14536, 11064,13032, 11072,15424, 11080,15456, 11088,15552, 
-   11096,13544, 11104,15432, 11112,15464, 11120,15560, 11128,14056, 
-   11136,14416, 11144,12696, 11152,14544, 11160,14568, 11168,14424, 
-   11176,14744, 11184,14552, 11192,15080, 11200,15440, 11208,12760, 
-   11216,11496, 11224,15592, 11232,15448, 11240,14808, 11248,12008, 
-   11256,16104, 11272,11296, 11280,11392, 11288,12584, 11304,11408, 
-   11312,12688, 11320,13096, 11328,11520, 11336,11552, 11344,11648, 
-   11352,13608, 11360,11528, 11368,11472, 11376,11656, 11384,14120, 
-   11400,13456, 11416,14632, 11424,12392, 11432,15504, 11440,14440, 
-   11448,15144, 11456,11536, 11464,13520, 11472,11560, 11480,15656, 
-   11488,11544, 11496,15568, 11504,12072, 11512,16168, 11528,11552, 
-   11536,11648, 11544,12648, 11560,11664, 11568,12752, 11576,13160, 
-   11592,11616, 11600,11712, 11608,13672, 11624,11728, 11632,11720, 
-   11640,14184, 11656,13712, 11672,14696, 11680,13416, 11688,15760, 
-   11696,15464, 11704,15208, 11720,13776, 11736,15720, 11744,13672, 
-   11752,15824, 11760,12136, 11768,16232, 11776,14592, 11784,14624, 
-   11792,14720, 11800,12712, 11808,14600, 11816,14632, 11824,14728, 
-   11832,13224, 11840,15616, 11848,15648, 11856,15744, 11864,13736, 
-   11872,15624, 11880,15656, 11888,15752, 11896,14248, 11904,14608, 
-   11912,13464, 11920,14736, 11928,14760, 11936,14616, 11944,15512, 
-   11952,14744, 11960,15272, 11968,15632, 11976,13528, 11984,15760, 
-   11992,15784, 12000,15640, 12008,15576, 12016,12200, 12024,16296, 
-   12032,14656, 12040,14688, 12048,14784, 12056,12776, 12064,14664, 
-   12072,14696, 12080,14792, 12088,13288, 12096,15680, 12104,15712, 
-   12112,15808, 12120,13800, 12128,15688, 12136,15720, 12144,15816, 
-   12152,14312, 12160,14672, 12168,13720, 12176,14800, 12184,14824, 
-   12192,14680, 12200,15768, 12208,14808, 12216,15336, 12224,15696, 
-   12232,13784, 12240,15824, 12248,15848, 12256,15704, 12264,15832, 
-   12272,15832, 12280,16360, 12312,12336, 12344,12848, 12352,12544, 
-   12360,12552, 12368,12560, 12376,13360, 12384,12576, 12392,12584, 
-   12400,13336, 12408,13872, 12424,12448, 12440,14384, 12456,14496, 
-   12464,14472, 12472,14896, 12480,12672, 12488,12512, 12496,12688, 
-   12504,15408, 12512,12680, 12520,14560, 12528,14728, 12536,15920, 
-   12544,13312, 12552,13320, 12560,13328, 12568,13336, 12576,13344, 
-   12584,13352, 12592,13360, 12600,12912, 12608,13568, 12616,13576, 
-   12624,13584, 12632,13424, 12640,13600, 12648,13608, 12656,13400, 
-   12664,13936, 12672,13440, 12680,12704, 12688,13456, 12696,14448, 
-   12704,13448, 12712,14752, 12720,15496, 12728,14960, 12736,13696, 
-   12744,12768, 12752,13712, 12760,15472, 12768,13704, 12776,14816, 
-   12784,15752, 12792,15984, 12800,14336, 12808,14464, 12816,14344, 
-   12824,14472, 12832,14352, 12840,14480, 12848,14360, 12856,12976, 
-   12864,14400, 12872,14528, 12880,14408, 12888,13488, 12896,14416, 
-   12904,14544, 12912,14424, 12920,14000, 12928,14368, 12936,14496, 
-   12944,14376, 12952,14512, 12960,14384, 12968,14504, 12976,14488, 
-   12984,15024, 12992,14432, 13000,14560, 13008,14440, 13016,15536, 
-   13024,14448, 13032,14568, 13040,14744, 13048,16048, 13056,14592, 
-   13064,14720, 13072,14600, 13080,14728, 13088,14608, 13096,14736, 
-   13104,14616, 13112,14744, 13120,14656, 13128,14784, 13136,14664, 
-   13144,13552, 13152,14672, 13160,14800, 13168,14680, 13176,14064, 
-   13184,14624, 13192,14752, 13200,14632, 13208,14576, 13216,13464, 
-   13224,14760, 13232,15512, 13240,15088, 13248,14688, 13256,14816, 
-   13264,14696, 13272,15600, 13280,13720, 13288,14824, 13296,15768, 
-   13304,16112, 13336,13360, 13368,14616, 13376,13568, 13384,13576, 
-   13392,13584, 13400,13616, 13408,13600, 13416,13608, 13424,13592, 
-   13432,14128, 13448,13472, 13464,14640, 13480,15520, 13488,14536, 
-   13496,15152, 13504,13696, 13512,13536, 13520,13712, 13528,15664, 
-   13536,13704, 13544,15584, 13552,14792, 13560,16176, 13592,13616, 
-   13624,14680, 13656,13680, 13688,14192, 13704,13728, 13720,14704, 
-   13736,15776, 13744,15560, 13752,15216, 13768,13792, 13784,15728, 
-   13800,15840, 13808,15816, 13816,16240, 13824,15360, 13832,15488, 
-   13840,15368, 13848,15496, 13856,15376, 13864,15504, 13872,15384, 
-   13880,15512, 13888,15424, 13896,15552, 13904,15432, 13912,15560, 
-   13920,15440, 13928,15568, 13936,15448, 13944,14256, 13952,15392, 
-   13960,15520, 13968,15400, 13976,14768, 13984,15408, 13992,15528, 
-   14000,14552, 14008,15280, 14016,15456, 14024,15584, 14032,15464, 
-   14040,15792, 14048,15472, 14056,15592, 14064,14808, 14072,16304, 
-   14080,15616, 14088,15744, 14096,15624, 14104,15752, 14112,15632, 
-   14120,15760, 14128,15640, 14136,15768, 14144,15680, 14152,15808, 
-   14160,15688, 14168,15816, 14176,15696, 14184,15824, 14192,15704, 
-   14200,14320, 14208,15648, 14216,15776, 14224,15656, 14232,14832, 
-   14240,15664, 14248,15784, 14256,15576, 14264,15344, 14272,15712, 
-   14280,15840, 14288,15720, 14296,15856, 14304,15728, 14312,15848, 
-   14320,15832, 14328,16368, 14392,14488, 14400,14592, 14408,14600, 
-   14416,14608, 14424,14616, 14432,14624, 14440,14632, 14448,14640, 
-   14456,15512, 14504,14512, 14520,14904, 14528,14720, 14536,14728, 
-   14544,14736, 14552,15416, 14560,14752, 14568,14576, 14584,15928,
-   14576,14760, 14592,15360, 14600,15368, 14608,15376, 14616,15384, 
-   14624,15392, 14632,15400, 14640,15408, 14648,15416, 14656,15616, 
-   14664,15624, 14672,15632, 14680,15640, 14688,15648, 14696,15656, 
-   14704,15664, 14712,15576, 14720,15488, 14728,15496, 14736,15504, 
-   14744,15512, 14752,15520, 14760,14768, 14776,14968, 14768,15528, 
-   14784,15744, 14792,15752, 14800,15760, 14808,15480, 14816,15776, 
-   14824,14832, 14840,15992, 14832,15784, 14856,14864, 14864,14880, 
-   14872,14896, 14880,14976, 14888,14992, 14896,15008, 14904,15024, 
-   14912,15104, 14920,15120, 14928,15136, 14936,15152, 14944,15232, 
-   14952,15248, 14960,15264, 14968,15280, 14984,15008, 15000,15024, 
-   15016,15024, 15040,15112, 15048,15128, 15056,15144, 15064,15544, 
-   15072,15240, 15080,15256, 15088,15272, 15096,16056, 15104,15872, 
-   15112,15888, 15120,15904, 15128,15920, 15136,16000, 15144,16016, 
-   15152,16032, 15160,16048, 15168,16128, 15176,16144, 15184,16160, 
-   15192,16176, 15200,16256, 15208,16272, 15216,16288, 15224,16304, 
-   15232,15880, 15240,15896, 15248,15912, 15256,15928, 15264,16008, 
-   15272,16024, 15280,16040, 15288,16056, 15296,16136, 15304,16152, 
-   15312,16168, 15320,15608, 15328,16264, 15336,16280, 15344,16296, 
-   15352,16120, 15416,15512, 15424,15616, 15432,15624, 15440,15632, 
-   15448,15640, 15456,15648, 15464,15656, 15472,15664, 15480,15768, 
-   15528,15536, 15544,16048, 15552,15744, 15560,15752, 15568,15760, 
-   15576,15672, 15584,15776, 15592,15600, 15600,15784, 15608,16184, 
-   15672,15768, 15736,15832, 15784,15792, 15800,16304, 15848,15856, 
-   15880,16000, 15864,16248, 15888,16000, 15896,16008, 15904,16000, 
-   15912,16016, 15920,16008, 15928,16024, 15936,16128, 15944,16160, 
-   15952,16256, 15960,16288, 15968,16136, 15976,16168, 15984,16264, 
-   15992,16296, 16008,16032, 16024,16040, 16064,16144, 16040,16048, 
-   16072,16176, 16080,16272, 16088,16304, 16096,16152, 16104,16184, 
-   16112,16280, 16136,16256, 16120,16312, 16144,16256, 16152,16264, 
-   16160,16256, 16168,16272, 16176,16264, 16184,16280, 16200,16208, 
-   16208,16224, 16216,16240, 16224,16320, 16232,16336, 16240,16352, 
-   16248,16368, 16264,16288, 16280,16296, 16296,16304, 16344,16368,
-   16328,16352, 16360,16368
-};
-
-const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH] = 
-{
-   //radix 8, size 4032
-   8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512, 
-   72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184, 
-   128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600, 
-   184,29696, 192,1536, 200,5632, 208,9728, 216,13824, 224,17920, 232,22016, 
-   240,26112, 248,30208, 256,2048, 264,6144, 272,10240, 280,14336, 288,18432, 
-   296,22528, 304,26624, 312,30720, 320,2560, 328,6656, 336,10752, 344,14848, 
-   352,18944, 360,23040, 368,27136, 376,31232, 384,3072, 392,7168, 400,11264, 
-   408,15360, 416,19456, 424,23552, 432,27648, 440,31744, 448,3584, 456,7680, 
-   464,11776, 472,15872, 480,19968, 488,24064, 496,28160, 504,32256, 520,4160, 
-   528,8256, 536,12352, 544,16448, 552,20544, 560,24640, 568,28736, 584,4672, 
-   592,8768, 600,12864, 608,16960, 616,21056, 624,25152, 632,29248, 640,1088, 
-   648,5184, 656,9280, 664,13376, 672,17472, 680,21568, 688,25664, 696,29760, 
-   704,1600, 712,5696, 720,9792, 728,13888, 736,17984, 744,22080, 752,26176, 
-   760,30272, 768,2112, 776,6208, 784,10304, 792,14400, 800,18496, 808,22592, 
-   816,26688, 824,30784, 832,2624, 840,6720, 848,10816, 856,14912, 864,19008, 
-   872,23104, 880,27200, 888,31296, 896,3136, 904,7232, 912,11328, 920,15424, 
-   928,19520, 936,23616, 944,27712, 952,31808, 960,3648, 968,7744, 976,11840, 
-   984,15936, 992,20032, 1000,24128, 1008,28224, 1016,32320, 1032,4224, 
-   1040,8320, 1048,12416, 1056,16512, 1064,20608, 1072,24704, 1080,28800, 
-   1096,4736, 1104,8832, 1112,12928, 1120,17024, 1128,21120, 1136,25216, 
-   1144,29312, 1160,5248, 1168,9344, 1176,13440, 1184,17536, 1192,21632, 
-   1200,25728, 1208,29824, 1216,1664, 1224,5760, 1232,9856, 1240,13952, 
-   1248,18048, 1256,22144, 1264,26240, 1272,30336, 1280,2176, 1288,6272, 
-   1296,10368, 1304,14464, 1312,18560, 1320,22656, 1328,26752, 1336,30848, 
-   1344,2688, 1352,6784, 1360,10880, 1368,14976, 1376,19072, 1384,23168, 
-   1392,27264, 1400,31360, 1408,3200, 1416,7296, 1424,11392, 1432,15488, 
-   1440,19584, 1448,23680, 1456,27776, 1464,31872, 1472,3712, 1480,7808, 
-   1488,11904, 1496,16000, 1504,20096, 1512,24192, 1520,28288, 1528,32384, 
-   1544,4288, 1552,8384, 1560,12480, 1568,16576, 1576,20672, 1584,24768, 
-   1592,28864, 1608,4800, 1616,8896, 1624,12992, 1632,17088, 1640,21184, 
-   1648,25280, 1656,29376, 1672,5312, 1680,9408, 1688,13504, 1696,17600, 
-   1704,21696, 1712,25792, 1720,29888, 1736,5824, 1744,9920, 1752,14016, 
-   1760,18112, 1768,22208, 1776,26304, 1784,30400, 1792,2240, 1800,6336, 
-   1808,10432, 1816,14528, 1824,18624, 1832,22720, 1840,26816, 1848,30912, 
-   1856,2752, 1864,6848, 1872,10944, 1880,15040, 1888,19136, 1896,23232, 
-   1904,27328, 1912,31424, 1920,3264, 1928,7360, 1936,11456, 1944,15552, 
-   1952,19648, 1960,23744, 1968,27840, 1976,31936, 1984,3776, 1992,7872, 
-   2000,11968, 2008,16064, 2016,20160, 2024,24256, 2032,28352, 2040,32448, 
-   2056,4352, 2064,8448, 2072,12544, 2080,16640, 2088,20736, 2096,24832, 
-   2104,28928, 2120,4864, 2128,8960, 2136,13056, 2144,17152, 2152,21248, 
-   2160,25344, 2168,29440, 2184,5376, 2192,9472, 2200,13568, 2208,17664, 
-   2216,21760, 2224,25856, 2232,29952, 2248,5888, 2256,9984, 2264,14080, 
-   2272,18176, 2280,22272, 2288,26368, 2296,30464, 2312,6400, 2320,10496, 
-   2328,14592, 2336,18688, 2344,22784, 2352,26880, 2360,30976, 2368,2816, 
-   2376,6912, 2384,11008, 2392,15104, 2400,19200, 2408,23296, 2416,27392, 
-   2424,31488, 2432,3328, 2440,7424, 2448,11520, 2456,15616, 2464,19712, 
-   2472,23808, 2480,27904, 2488,32000, 2496,3840, 2504,7936, 2512,12032, 
-   2520,16128, 2528,20224, 2536,24320, 2544,28416, 2552,32512, 2568,4416, 
-   2576,8512, 2584,12608, 2592,16704, 2600,20800, 2608,24896, 2616,28992, 
-   2632,4928, 2640,9024, 2648,13120, 2656,17216, 2664,21312, 2672,25408, 
-   2680,29504, 2696,5440, 2704,9536, 2712,13632, 2720,17728, 2728,21824, 
-   2736,25920, 2744,30016, 2760,5952, 2768,10048, 2776,14144, 2784,18240, 
-   2792,22336, 2800,26432, 2808,30528, 2824,6464, 2832,10560, 2840,14656, 
-   2848,18752, 2856,22848, 2864,26944, 2872,31040, 2888,6976, 2896,11072, 
-   2904,15168, 2912,19264, 2920,23360, 2928,27456, 2936,31552, 2944,3392, 
-   2952,7488, 2960,11584, 2968,15680, 2976,19776, 2984,23872, 2992,27968, 
-   3000,32064, 3008,3904, 3016,8000, 3024,12096, 3032,16192, 3040,20288, 
-   3048,24384, 3056,28480, 3064,32576, 3080,4480, 3088,8576, 3096,12672, 
-   3104,16768, 3112,20864, 3120,24960, 3128,29056, 3144,4992, 3152,9088, 
-   3160,13184, 3168,17280, 3176,21376, 3184,25472, 3192,29568, 3208,5504, 
-   3216,9600, 3224,13696, 3232,17792, 3240,21888, 3248,25984, 3256,30080, 
-   3272,6016, 3280,10112, 3288,14208, 3296,18304, 3304,22400, 3312,26496, 
-   3320,30592, 3336,6528, 3344,10624, 3352,14720, 3360,18816, 3368,22912, 
-   3376,27008, 3384,31104, 3400,7040, 3408,11136, 3416,15232, 3424,19328, 
-   3432,23424, 3440,27520, 3448,31616, 3464,7552, 3472,11648, 3480,15744, 
-   3488,19840, 3496,23936, 3504,28032, 3512,32128, 3520,3968, 3528,8064, 
-   3536,12160, 3544,16256, 3552,20352, 3560,24448, 3568,28544, 3576,32640, 
-   3592,4544, 3600,8640, 3608,12736, 3616,16832, 3624,20928, 3632,25024, 
-   3640,29120, 3656,5056, 3664,9152, 3672,13248, 3680,17344, 3688,21440, 
-   3696,25536, 3704,29632, 3720,5568, 3728,9664, 3736,13760, 3744,17856, 
-   3752,21952, 3760,26048, 3768,30144, 3784,6080, 3792,10176, 3800,14272, 
-   3808,18368, 3816,22464, 3824,26560, 3832,30656, 3848,6592, 3856,10688, 
-   3864,14784, 3872,18880, 3880,22976, 3888,27072, 3896,31168, 3912,7104, 
-   3920,11200, 3928,15296, 3936,19392, 3944,23488, 3952,27584, 3960,31680, 
-   3976,7616, 3984,11712, 3992,15808, 4000,19904, 4008,24000, 4016,28096, 
-   4024,32192, 4040,8128, 4048,12224, 4056,16320, 4064,20416, 4072,24512, 
-   4080,28608, 4088,32704, 4112,8200, 4120,12296, 4128,16392, 4136,20488, 
-   4144,24584, 4152,28680, 4168,4616, 4176,8712, 4184,12808, 4192,16904, 
-   4200,21000, 4208,25096, 4216,29192, 4232,5128, 4240,9224, 4248,13320, 
-   4256,17416, 4264,21512, 4272,25608, 4280,29704, 4296,5640, 4304,9736, 
-   4312,13832, 4320,17928, 4328,22024, 4336,26120, 4344,30216, 4360,6152, 
-   4368,10248, 4376,14344, 4384,18440, 4392,22536, 4400,26632, 4408,30728, 
-   4424,6664, 4432,10760, 4440,14856, 4448,18952, 4456,23048, 4464,27144, 
-   4472,31240, 4488,7176, 4496,11272, 4504,15368, 4512,19464, 4520,23560, 
-   4528,27656, 4536,31752, 4552,7688, 4560,11784, 4568,15880, 4576,19976, 
-   4584,24072, 4592,28168, 4600,32264, 4624,8264, 4632,12360, 4640,16456, 
-   4648,20552, 4656,24648, 4664,28744, 4688,8776, 4696,12872, 4704,16968, 
-   4712,21064, 4720,25160, 4728,29256, 4744,5192, 4752,9288, 4760,13384, 
-   4768,17480, 4776,21576, 4784,25672, 4792,29768, 4808,5704, 4816,9800, 
-   4824,13896, 4832,17992, 4840,22088, 4848,26184, 4856,30280, 4872,6216, 
-   4880,10312, 4888,14408, 4896,18504, 4904,22600, 4912,26696, 4920,30792, 
-   4936,6728, 4944,10824, 4952,14920, 4960,19016, 4968,23112, 4976,27208, 
-   4984,31304, 5000,7240, 5008,11336, 5016,15432, 5024,19528, 5032,23624, 
-   5040,27720, 5048,31816, 5064,7752, 5072,11848, 5080,15944, 5088,20040, 
-   5096,24136, 5104,28232, 5112,32328, 5136,8328, 5144,12424, 5152,16520, 
-   5160,20616, 5168,24712, 5176,28808, 5200,8840, 5208,12936, 5216,17032, 
-   5224,21128, 5232,25224, 5240,29320, 5264,9352, 5272,13448, 5280,17544, 
-   5288,21640, 5296,25736, 5304,29832, 5320,5768, 5328,9864, 5336,13960, 
-   5344,18056, 5352,22152, 5360,26248, 5368,30344, 5384,6280, 5392,10376, 
-   5400,14472, 5408,18568, 5416,22664, 5424,26760, 5432,30856, 5448,6792, 
-   5456,10888, 5464,14984, 5472,19080, 5480,23176, 5488,27272, 5496,31368, 
-   5512,7304, 5520,11400, 5528,15496, 5536,19592, 5544,23688, 5552,27784, 
-   5560,31880, 5576,7816, 5584,11912, 5592,16008, 5600,20104, 5608,24200, 
-   5616,28296, 5624,32392, 5648,8392, 5656,12488, 5664,16584, 5672,20680, 
-   5680,24776, 5688,28872, 5712,8904, 5720,13000, 5728,17096, 5736,21192, 
-   5744,25288, 5752,29384, 5776,9416, 5784,13512, 5792,17608, 5800,21704, 
-   5808,25800, 5816,29896, 5840,9928, 5848,14024, 5856,18120, 5864,22216, 
-   5872,26312, 5880,30408, 5896,6344, 5904,10440, 5912,14536, 5920,18632, 
-   5928,22728, 5936,26824, 5944,30920, 5960,6856, 5968,10952, 5976,15048, 
-   5984,19144, 5992,23240, 6000,27336, 6008,31432, 6024,7368, 6032,11464, 
-   6040,15560, 6048,19656, 6056,23752, 6064,27848, 6072,31944, 6088,7880, 
-   6096,11976, 6104,16072, 6112,20168, 6120,24264, 6128,28360, 6136,32456, 
-   6160,8456, 6168,12552, 6176,16648, 6184,20744, 6192,24840, 6200,28936, 
-   6224,8968, 6232,13064, 6240,17160, 6248,21256, 6256,25352, 6264,29448, 
-   6288,9480, 6296,13576, 6304,17672, 6312,21768, 6320,25864, 6328,29960, 
-   6352,9992, 6360,14088, 6368,18184, 6376,22280, 6384,26376, 6392,30472, 
-   6416,10504, 6424,14600, 6432,18696, 6440,22792, 6448,26888, 6456,30984, 
-   6472,6920, 6480,11016, 6488,15112, 6496,19208, 6504,23304, 6512,27400, 
-   6520,31496, 6536,7432, 6544,11528, 6552,15624, 6560,19720, 6568,23816, 
-   6576,27912, 6584,32008, 6600,7944, 6608,12040, 6616,16136, 6624,20232, 
-   6632,24328, 6640,28424, 6648,32520, 6672,8520, 6680,12616, 6688,16712, 
-   6696,20808, 6704,24904, 6712,29000, 6736,9032, 6744,13128, 6752,17224, 
-   6760,21320, 6768,25416, 6776,29512, 6800,9544, 6808,13640, 6816,17736, 
-   6824,21832, 6832,25928, 6840,30024, 6864,10056, 6872,14152, 6880,18248, 
-   6888,22344, 6896,26440, 6904,30536, 6928,10568, 6936,14664, 6944,18760, 
-   6952,22856, 6960,26952, 6968,31048, 6992,11080, 7000,15176, 7008,19272, 
-   7016,23368, 7024,27464, 7032,31560, 7048,7496, 7056,11592, 7064,15688, 
-   7072,19784, 7080,23880, 7088,27976, 7096,32072, 7112,8008, 7120,12104, 
-   7128,16200, 7136,20296, 7144,24392, 7152,28488, 7160,32584, 7184,8584, 
-   7192,12680, 7200,16776, 7208,20872, 7216,24968, 7224,29064, 7248,9096, 
-   7256,13192, 7264,17288, 7272,21384, 7280,25480, 7288,29576, 7312,9608, 
-   7320,13704, 7328,17800, 7336,21896, 7344,25992, 7352,30088, 7376,10120, 
-   7384,14216, 7392,18312, 7400,22408, 7408,26504, 7416,30600, 7440,10632, 
-   7448,14728, 7456,18824, 7464,22920, 7472,27016, 7480,31112, 7504,11144, 
-   7512,15240, 7520,19336, 7528,23432, 7536,27528, 7544,31624, 7568,11656, 
-   7576,15752, 7584,19848, 7592,23944, 7600,28040, 7608,32136, 7624,8072, 
-   7632,12168, 7640,16264, 7648,20360, 7656,24456, 7664,28552, 7672,32648, 
-   7696,8648, 7704,12744, 7712,16840, 7720,20936, 7728,25032, 7736,29128, 
-   7760,9160, 7768,13256, 7776,17352, 7784,21448, 7792,25544, 7800,29640, 
-   7824,9672, 7832,13768, 7840,17864, 7848,21960, 7856,26056, 7864,30152, 
-   7888,10184, 7896,14280, 7904,18376, 7912,22472, 7920,26568, 7928,30664, 
-   7952,10696, 7960,14792, 7968,18888, 7976,22984, 7984,27080, 7992,31176, 
-   8016,11208, 8024,15304, 8032,19400, 8040,23496, 8048,27592, 8056,31688, 
-   8080,11720, 8088,15816, 8096,19912, 8104,24008, 8112,28104, 8120,32200, 
-   8144,12232, 8152,16328, 8160,20424, 8168,24520, 8176,28616, 8184,32712, 
-   8216,12304, 8224,16400, 8232,20496, 8240,24592, 8248,28688, 8272,8720, 
-   8280,12816, 8288,16912, 8296,21008, 8304,25104, 8312,29200, 8336,9232, 
-   8344,13328, 8352,17424, 8360,21520, 8368,25616, 8376,29712, 8400,9744, 
-   8408,13840, 8416,17936, 8424,22032, 8432,26128, 8440,30224, 8464,10256, 
-   8472,14352, 8480,18448, 8488,22544, 8496,26640, 8504,30736, 8528,10768, 
-   8536,14864, 8544,18960, 8552,23056, 8560,27152, 8568,31248, 8592,11280, 
-   8600,15376, 8608,19472, 8616,23568, 8624,27664, 8632,31760, 8656,11792, 
-   8664,15888, 8672,19984, 8680,24080, 8688,28176, 8696,32272, 8728,12368, 
-   8736,16464, 8744,20560, 8752,24656, 8760,28752, 8792,12880, 8800,16976, 
-   8808,21072, 8816,25168, 8824,29264, 8848,9296, 8856,13392, 8864,17488, 
-   8872,21584, 8880,25680, 8888,29776, 8912,9808, 8920,13904, 8928,18000, 
-   8936,22096, 8944,26192, 8952,30288, 8976,10320, 8984,14416, 8992,18512, 
-   9000,22608, 9008,26704, 9016,30800, 9040,10832, 9048,14928, 9056,19024, 
-   9064,23120, 9072,27216, 9080,31312, 9104,11344, 9112,15440, 9120,19536, 
-   9128,23632, 9136,27728, 9144,31824, 9168,11856, 9176,15952, 9184,20048, 
-   9192,24144, 9200,28240, 9208,32336, 9240,12432, 9248,16528, 9256,20624, 
-   9264,24720, 9272,28816, 9304,12944, 9312,17040, 9320,21136, 9328,25232, 
-   9336,29328, 9368,13456, 9376,17552, 9384,21648, 9392,25744, 9400,29840, 
-   9424,9872, 9432,13968, 9440,18064, 9448,22160, 9456,26256, 9464,30352, 
-   9488,10384, 9496,14480, 9504,18576, 9512,22672, 9520,26768, 9528,30864, 
-   9552,10896, 9560,14992, 9568,19088, 9576,23184, 9584,27280, 9592,31376, 
-   9616,11408, 9624,15504, 9632,19600, 9640,23696, 9648,27792, 9656,31888, 
-   9680,11920, 9688,16016, 9696,20112, 9704,24208, 9712,28304, 9720,32400, 
-   9752,12496, 9760,16592, 9768,20688, 9776,24784, 9784,28880, 9816,13008, 
-   9824,17104, 9832,21200, 9840,25296, 9848,29392, 9880,13520, 9888,17616, 
-   9896,21712, 9904,25808, 9912,29904, 9944,14032, 9952,18128, 9960,22224, 
-   9968,26320, 9976,30416, 10000,10448, 10008,14544, 10016,18640, 10024,22736, 
-   10032,26832, 10040,30928, 10064,10960, 10072,15056, 10080,19152, 
-   10088,23248, 10096,27344, 10104,31440, 10128,11472, 10136,15568, 
-   10144,19664, 10152,23760, 10160,27856, 10168,31952, 10192,11984, 
-   10200,16080, 10208,20176, 10216,24272, 10224,28368, 10232,32464, 
-   10264,12560, 10272,16656, 10280,20752, 10288,24848, 10296,28944, 
-   10328,13072, 10336,17168, 10344,21264, 10352,25360, 10360,29456, 
-   10392,13584, 10400,17680, 10408,21776, 10416,25872, 10424,29968, 
-   10456,14096, 10464,18192, 10472,22288, 10480,26384, 10488,30480, 
-   10520,14608, 10528,18704, 10536,22800, 10544,26896, 10552,30992, 
-   10576,11024, 10584,15120, 10592,19216, 10600,23312, 10608,27408, 
-   10616,31504, 10640,11536, 10648,15632, 10656,19728, 10664,23824, 
-   10672,27920, 10680,32016, 10704,12048, 10712,16144, 10720,20240, 
-   10728,24336, 10736,28432, 10744,32528, 10776,12624, 10784,16720, 
-   10792,20816, 10800,24912, 10808,29008, 10840,13136, 10848,17232, 
-   10856,21328, 10864,25424, 10872,29520, 10904,13648, 10912,17744, 
-   10920,21840, 10928,25936, 10936,30032, 10968,14160, 10976,18256, 
-   10984,22352, 10992,26448, 11000,30544, 11032,14672, 11040,18768, 
-   11048,22864, 11056,26960, 11064,31056, 11096,15184, 11104,19280, 
-   11112,23376, 11120,27472, 11128,31568, 11152,11600, 11160,15696, 
-   11168,19792, 11176,23888, 11184,27984, 11192,32080, 11216,12112, 
-   11224,16208, 11232,20304, 11240,24400, 11248,28496, 11256,32592, 
-   11288,12688, 11296,16784, 11304,20880, 11312,24976, 11320,29072, 
-   11352,13200, 11360,17296, 11368,21392, 11376,25488, 11384,29584, 
-   11416,13712, 11424,17808, 11432,21904, 11440,26000, 11448,30096, 
-   11480,14224, 11488,18320, 11496,22416, 11504,26512, 11512,30608, 
-   11544,14736, 11552,18832, 11560,22928, 11568,27024, 11576,31120, 
-   11608,15248, 11616,19344, 11624,23440, 11632,27536, 11640,31632, 
-   11672,15760, 11680,19856, 11688,23952, 11696,28048, 11704,32144, 
-   11728,12176, 11736,16272, 11744,20368, 11752,24464, 11760,28560, 
-   11768,32656, 11800,12752, 11808,16848, 11816,20944, 11824,25040, 
-   11832,29136, 11864,13264, 11872,17360, 11880,21456, 11888,25552, 
-   11896,29648, 11928,13776, 11936,17872, 11944,21968, 11952,26064, 
-   11960,30160, 11992,14288, 12000,18384, 12008,22480, 12016,26576, 
-   12024,30672, 12056,14800, 12064,18896, 12072,22992, 12080,27088, 
-   12088,31184, 12120,15312, 12128,19408, 12136,23504, 12144,27600, 
-   12152,31696, 12184,15824, 12192,19920, 12200,24016, 12208,28112, 
-   12216,32208, 12248,16336, 12256,20432, 12264,24528, 12272,28624, 
-   12280,32720, 12320,16408, 12328,20504, 12336,24600, 12344,28696, 
-   12376,12824, 12384,16920, 12392,21016, 12400,25112, 12408,29208, 
-   12440,13336, 12448,17432, 12456,21528, 12464,25624, 12472,29720, 
-   12504,13848, 12512,17944, 12520,22040, 12528,26136, 12536,30232, 
-   12568,14360, 12576,18456, 12584,22552, 12592,26648, 12600,30744, 
-   12632,14872, 12640,18968, 12648,23064, 12656,27160, 12664,31256, 
-   12696,15384, 12704,19480, 12712,23576, 12720,27672, 12728,31768, 
-   12760,15896, 12768,19992, 12776,24088, 12784,28184, 12792,32280, 
-   12832,16472, 12840,20568, 12848,24664, 12856,28760, 12896,16984, 
-   12904,21080, 12912,25176, 12920,29272, 12952,13400, 12960,17496, 
-   12968,21592, 12976,25688, 12984,29784, 13016,13912, 13024,18008, 
-   13032,22104, 13040,26200, 13048,30296, 13080,14424, 13088,18520, 
-   13096,22616, 13104,26712, 13112,30808, 13144,14936, 13152,19032, 
-   13160,23128, 13168,27224, 13176,31320, 13208,15448, 13216,19544, 
-   13224,23640, 13232,27736, 13240,31832, 13272,15960, 13280,20056, 
-   13288,24152, 13296,28248, 13304,32344, 13344,16536, 13352,20632, 
-   13360,24728, 13368,28824, 13408,17048, 13416,21144, 13424,25240, 
-   13432,29336, 13472,17560, 13480,21656, 13488,25752, 13496,29848, 
-   13528,13976, 13536,18072, 13544,22168, 13552,26264, 13560,30360, 
-   13592,14488, 13600,18584, 13608,22680, 13616,26776, 13624,30872, 
-   13656,15000, 13664,19096, 13672,23192, 13680,27288, 13688,31384, 
-   13720,15512, 13728,19608, 13736,23704, 13744,27800, 13752,31896, 
-   13784,16024, 13792,20120, 13800,24216, 13808,28312, 13816,32408, 
-   13856,16600, 13864,20696, 13872,24792, 13880,28888, 13920,17112, 
-   13928,21208, 13936,25304, 13944,29400, 13984,17624, 13992,21720, 
-   14000,25816, 14008,29912, 14048,18136, 14056,22232, 14064,26328, 
-   14072,30424, 14104,14552, 14112,18648, 14120,22744, 14128,26840, 
-   14136,30936, 14168,15064, 14176,19160, 14184,23256, 14192,27352, 
-   14200,31448, 14232,15576, 14240,19672, 14248,23768, 14256,27864, 
-   14264,31960, 14296,16088, 14304,20184, 14312,24280, 14320,28376, 
-   14328,32472, 14368,16664, 14376,20760, 14384,24856, 14392,28952, 
-   14432,17176, 14440,21272, 14448,25368, 14456,29464, 14496,17688, 
-   14504,21784, 14512,25880, 14520,29976, 14560,18200, 14568,22296, 
-   14576,26392, 14584,30488, 14624,18712, 14632,22808, 14640,26904, 
-   14648,31000, 14680,15128, 14688,19224, 14696,23320, 14704,27416, 
-   14712,31512, 14744,15640, 14752,19736, 14760,23832, 14768,27928, 
-   14776,32024, 14808,16152, 14816,20248, 14824,24344, 14832,28440, 
-   14840,32536, 14880,16728, 14888,20824, 14896,24920, 14904,29016, 
-   14944,17240, 14952,21336, 14960,25432, 14968,29528, 15008,17752, 
-   15016,21848, 15024,25944, 15032,30040, 15072,18264, 15080,22360, 
-   15088,26456, 15096,30552, 15136,18776, 15144,22872, 15152,26968, 
-   15160,31064, 15200,19288, 15208,23384, 15216,27480, 15224,31576, 
-   15256,15704, 15264,19800, 15272,23896, 15280,27992, 15288,32088, 
-   15320,16216, 15328,20312, 15336,24408, 15344,28504, 15352,32600, 
-   15392,16792, 15400,20888, 15408,24984, 15416,29080, 15456,17304, 
-   15464,21400, 15472,25496, 15480,29592, 15520,17816, 15528,21912, 
-   15536,26008, 15544,30104, 15584,18328, 15592,22424, 15600,26520, 
-   15608,30616, 15648,18840, 15656,22936, 15664,27032, 15672,31128, 
-   15712,19352, 15720,23448, 15728,27544, 15736,31640, 15776,19864, 
-   15784,23960, 15792,28056, 15800,32152, 15832,16280, 15840,20376, 
-   15848,24472, 15856,28568, 15864,32664, 15904,16856, 15912,20952, 
-   15920,25048, 15928,29144, 15968,17368, 15976,21464, 15984,25560, 
-   15992,29656, 16032,17880, 16040,21976, 16048,26072, 16056,30168, 
-   16096,18392, 16104,22488, 16112,26584, 16120,30680, 16160,18904, 
-   16168,23000, 16176,27096, 16184,31192, 16224,19416, 16232,23512, 
-   16240,27608, 16248,31704, 16288,19928, 16296,24024, 16304,28120, 
-   16312,32216, 16352,20440, 16360,24536, 16368,28632, 16376,32728, 
-   16424,20512, 16432,24608, 16440,28704, 16480,16928, 16488,21024, 
-   16496,25120, 16504,29216, 16544,17440, 16552,21536, 16560,25632, 
-   16568,29728, 16608,17952, 16616,22048, 16624,26144, 16632,30240, 
-   16672,18464, 16680,22560, 16688,26656, 16696,30752, 16736,18976, 
-   16744,23072, 16752,27168, 16760,31264, 16800,19488, 16808,23584, 
-   16816,27680, 16824,31776, 16864,20000, 16872,24096, 16880,28192, 
-   16888,32288, 16936,20576, 16944,24672, 16952,28768, 17000,21088, 
-   17008,25184, 17016,29280, 17056,17504, 17064,21600, 17072,25696, 
-   17080,29792, 17120,18016, 17128,22112, 17136,26208, 17144,30304, 
-   17184,18528, 17192,22624, 17200,26720, 17208,30816, 17248,19040, 
-   17256,23136, 17264,27232, 17272,31328, 17312,19552, 17320,23648, 
-   17328,27744, 17336,31840, 17376,20064, 17384,24160, 17392,28256, 
-   17400,32352, 17448,20640, 17456,24736, 17464,28832, 17512,21152, 
-   17520,25248, 17528,29344, 17576,21664, 17584,25760, 17592,29856, 
-   17632,18080, 17640,22176, 17648,26272, 17656,30368, 17696,18592, 
-   17704,22688, 17712,26784, 17720,30880, 17760,19104, 17768,23200, 
-   17776,27296, 17784,31392, 17824,19616, 17832,23712, 17840,27808, 
-   17848,31904, 17888,20128, 17896,24224, 17904,28320, 17912,32416, 
-   17960,20704, 17968,24800, 17976,28896, 18024,21216, 18032,25312, 
-   18040,29408, 18088,21728, 18096,25824, 18104,29920, 18152,22240, 
-   18160,26336, 18168,30432, 18208,18656, 18216,22752, 18224,26848, 
-   18232,30944, 18272,19168, 18280,23264, 18288,27360, 18296,31456, 
-   18336,19680, 18344,23776, 18352,27872, 18360,31968, 18400,20192, 
-   18408,24288, 18416,28384, 18424,32480, 18472,20768, 18480,24864, 
-   18488,28960, 18536,21280, 18544,25376, 18552,29472, 18600,21792, 
-   18608,25888, 18616,29984, 18664,22304, 18672,26400, 18680,30496, 
-   18728,22816, 18736,26912, 18744,31008, 18784,19232, 18792,23328, 
-   18800,27424, 18808,31520, 18848,19744, 18856,23840, 18864,27936, 
-   18872,32032, 18912,20256, 18920,24352, 18928,28448, 18936,32544, 
-   18984,20832, 18992,24928, 19000,29024, 19048,21344, 19056,25440, 
-   19064,29536, 19112,21856, 19120,25952, 19128,30048, 19176,22368, 
-   19184,26464, 19192,30560, 19240,22880, 19248,26976, 19256,31072, 
-   19304,23392, 19312,27488, 19320,31584, 19360,19808, 19368,23904, 
-   19376,28000, 19384,32096, 19424,20320, 19432,24416, 19440,28512, 
-   19448,32608, 19496,20896, 19504,24992, 19512,29088, 19560,21408, 
-   19568,25504, 19576,29600, 19624,21920, 19632,26016, 19640,30112, 
-   19688,22432, 19696,26528, 19704,30624, 19752,22944, 19760,27040, 
-   19768,31136, 19816,23456, 19824,27552, 19832,31648, 19880,23968, 
-   19888,28064, 19896,32160, 19936,20384, 19944,24480, 19952,28576, 
-   19960,32672, 20008,20960, 20016,25056, 20024,29152, 20072,21472, 
-   20080,25568, 20088,29664, 20136,21984, 20144,26080, 20152,30176, 
-   20200,22496, 20208,26592, 20216,30688, 20264,23008, 20272,27104, 
-   20280,31200, 20328,23520, 20336,27616, 20344,31712, 20392,24032, 
-   20400,28128, 20408,32224, 20456,24544, 20464,28640, 20472,32736, 
-   20528,24616, 20536,28712, 20584,21032, 20592,25128, 20600,29224, 
-   20648,21544, 20656,25640, 20664,29736, 20712,22056, 20720,26152, 
-   20728,30248, 20776,22568, 20784,26664, 20792,30760, 20840,23080, 
-   20848,27176, 20856,31272, 20904,23592, 20912,27688, 20920,31784, 
-   20968,24104, 20976,28200, 20984,32296, 21040,24680, 21048,28776, 
-   21104,25192, 21112,29288, 21160,21608, 21168,25704, 21176,29800, 
-   21224,22120, 21232,26216, 21240,30312, 21288,22632, 21296,26728, 
-   21304,30824, 21352,23144, 21360,27240, 21368,31336, 21416,23656, 
-   21424,27752, 21432,31848, 21480,24168, 21488,28264, 21496,32360, 
-   21552,24744, 21560,28840, 21616,25256, 21624,29352, 21680,25768, 
-   21688,29864, 21736,22184, 21744,26280, 21752,30376, 21800,22696, 
-   21808,26792, 21816,30888, 21864,23208, 21872,27304, 21880,31400, 
-   21928,23720, 21936,27816, 21944,31912, 21992,24232, 22000,28328, 
-   22008,32424, 22064,24808, 22072,28904, 22128,25320, 22136,29416, 
-   22192,25832, 22200,29928, 22256,26344, 22264,30440, 22312,22760, 
-   22320,26856, 22328,30952, 22376,23272, 22384,27368, 22392,31464, 
-   22440,23784, 22448,27880, 22456,31976, 22504,24296, 22512,28392, 
-   22520,32488, 22576,24872, 22584,28968, 22640,25384, 22648,29480, 
-   22704,25896, 22712,29992, 22768,26408, 22776,30504, 22832,26920, 
-   22840,31016, 22888,23336, 22896,27432, 22904,31528, 22952,23848, 
-   22960,27944, 22968,32040, 23016,24360, 23024,28456, 23032,32552, 
-   23088,24936, 23096,29032, 23152,25448, 23160,29544, 23216,25960, 
-   23224,30056, 23280,26472, 23288,30568, 23344,26984, 23352,31080, 
-   23408,27496, 23416,31592, 23464,23912, 23472,28008, 23480,32104, 
-   23528,24424, 23536,28520, 23544,32616, 23600,25000, 23608,29096, 
-   23664,25512, 23672,29608, 23728,26024, 23736,30120, 23792,26536, 
-   23800,30632, 23856,27048, 23864,31144, 23920,27560, 23928,31656, 
-   23984,28072, 23992,32168, 24040,24488, 24048,28584, 24056,32680, 
-   24112,25064, 24120,29160, 24176,25576, 24184,29672, 24240,26088, 
-   24248,30184, 24304,26600, 24312,30696, 24368,27112, 24376,31208, 
-   24432,27624, 24440,31720, 24496,28136, 24504,32232, 24560,28648, 
-   24568,32744, 24632,28720, 24688,25136, 24696,29232, 24752,25648, 
-   24760,29744, 24816,26160, 24824,30256, 24880,26672, 24888,30768, 
-   24944,27184, 24952,31280, 25008,27696, 25016,31792, 25072,28208, 
-   25080,32304, 25144,28784, 25208,29296, 25264,25712, 25272,29808, 
-   25328,26224, 25336,30320, 25392,26736, 25400,30832, 25456,27248, 
-   25464,31344, 25520,27760, 25528,31856, 25584,28272, 25592,32368, 
-   25656,28848, 25720,29360, 25784,29872, 25840,26288, 25848,30384, 
-   25904,26800, 25912,30896, 25968,27312, 25976,31408, 26032,27824, 
-   26040,31920, 26096,28336, 26104,32432, 26168,28912, 26232,29424, 
-   26296,29936, 26360,30448, 26416,26864, 26424,30960, 26480,27376, 
-   26488,31472, 26544,27888, 26552,31984, 26608,28400, 26616,32496, 
-   26680,28976, 26744,29488, 26808,30000, 26872,30512, 26936,31024, 
-   26992,27440, 27000,31536, 27056,27952, 27064,32048, 27120,28464, 
-   27128,32560, 27192,29040, 27256,29552, 27320,30064, 27384,30576, 
-   27448,31088, 27512,31600, 27568,28016, 27576,32112, 27632,28528, 
-   27640,32624, 27704,29104, 27768,29616, 27832,30128, 27896,30640, 
-   27960,31152, 28024,31664, 28088,32176, 28144,28592, 28152,32688, 
-   28216,29168, 28280,29680, 28344,30192, 28408,30704, 28472,31216, 
-   28536,31728, 28600,32240, 28664,32752, 28792,29240, 28856,29752, 
-   28920,30264, 28984,30776, 29048,31288, 29112,31800, 29176,32312, 
-   29368,29816, 29432,30328, 29496,30840, 29560,31352, 29624,31864, 
-   29688,32376, 29944,30392, 30008,30904, 30072,31416, 30136,31928, 
-   30200,32440, 30520,30968, 30584,31480, 30648,31992, 30712,32504, 
-   31096,31544, 31160,32056, 31224,32568, 31672,32120, 31736,32632, 
-   32248,32696
-};
-
-
-const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH] = 
-{
-   //radix 4, size 12
-   8,64, 16,32, 24,96, 40,80, 56,112, 88,104
-};
-
-const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH] = 
-{
-   //4x2, size 24
-   8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144,
-   88,208, 104,176, 120,240, 152,200, 184,232
-};
-
-const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH] = 
-{   
-   //radix 4, size 56
-   8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352,
-   112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432,
-   232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472
-};
-
-const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH] = 
-{
-   //4x2, size 112
-   8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192,
-   104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608,
-   208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912,
-   328,592, 344,848, 360,720, 368,464, 376,976, 392,560, 408,816, 424,688, 440,944, 456,624,
-   472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968,
-   664,808, 696,936, 728,872, 760,1000, 824,920, 888,984
-};
-
-const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH] = 
-{
-   //radix 4, size 240
-   8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640,
-   88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320,
-   168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960,
-   248,1984, 264,1056, 272,544, 280,1568, 296,1312, 304,800, 312,1824, 328,1184, 336,672,
-   344,1696, 352,416, 360,1440, 368,928, 376,1952, 392,1120, 400,608, 408,1632, 424,1376,
-   432,864, 440,1888, 456,1248, 464,736, 472,1760, 488,1504, 496,992, 504,2016, 520,1040,
-   536,1552, 552,1296, 560,784, 568,1808, 584,1168, 592,656, 600,1680, 616,1424, 624,912,
-   632,1936, 648,1104, 664,1616, 680,1360, 688,848, 696,1872, 712,1232, 728,1744, 744,1488,
-   752,976, 760,2000, 776,1072, 792,1584, 808,1328, 824,1840, 840,1200, 856,1712, 872,1456,
-   880,944, 888,1968, 904,1136, 920,1648, 936,1392, 952,1904, 968,1264, 984,1776, 1000,1520,
-   1016,2032, 1048,1544, 1064,1288, 1080,1800, 1096,1160, 1112,1672, 1128,1416, 1144,1928,
-   1176,1608, 1192,1352, 1208,1864, 1240,1736, 1256,1480, 1272,1992, 1304,1576, 1336,1832,
-   1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816,
-   1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976
-};
-
-const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH] = 
-{
-   //4x2, size 480
-   8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280,
-   88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640,
-   168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944,
-   240,1920, 248,3968, 264,2112, 272,1088, 280,3136, 288,576, 296,2624, 304,1600, 312,3648,
-   328,2368, 336,1344, 344,3392, 352,832, 360,2880, 368,1856, 376,3904, 392,2240, 400,1216,
-   408,3264, 416,704, 424,2752, 432,1728, 440,3776, 456,2496, 464,1472, 472,3520, 480,960,
-   488,3008, 496,1984, 504,4032, 520,2080, 528,1056, 536,3104, 552,2592, 560,1568, 568,3616,
-   584,2336, 592,1312, 600,3360, 608,800, 616,2848, 624,1824, 632,3872, 648,2208, 656,1184,
-   664,3232, 680,2720, 688,1696, 696,3744, 712,2464, 720,1440, 728,3488, 736,928, 744,2976,
-   752,1952, 760,4000, 776,2144, 784,1120, 792,3168, 808,2656, 816,1632, 824,3680, 840,2400,
-   848,1376, 856,3424, 872,2912, 880,1888, 888,3936, 904,2272, 912,1248, 920,3296, 936,2784,
-   944,1760, 952,3808, 968,2528, 976,1504, 984,3552, 1000,3040, 1008,2016, 1016,4064,
-   1032,2064, 1048,3088, 1064,2576, 1072,1552, 1080,3600, 1096,2320, 1104,1296, 1112,3344,
-   1128,2832, 1136,1808, 1144,3856, 1160,2192, 1176,3216, 1192,2704, 1200,1680, 1208,3728,
-   1224,2448, 1232,1424, 1240,3472, 1256,2960, 1264,1936, 1272,3984, 1288,2128, 1304,3152,
-   1320,2640, 1328,1616, 1336,3664, 1352,2384, 1368,3408, 1384,2896, 1392,1872, 1400,3920,
-   1416,2256, 1432,3280, 1448,2768, 1456,1744, 1464,3792, 1480,2512, 1496,3536, 1512,3024,
-   1520,2000, 1528,4048, 1544,2096, 1560,3120, 1576,2608, 1592,3632, 1608,2352, 1624,3376,
-   1640,2864, 1648,1840, 1656,3888, 1672,2224, 1688,3248, 1704,2736, 1720,3760, 1736,2480,
-   1752,3504, 1768,2992, 1776,1968, 1784,4016, 1800,2160, 1816,3184, 1832,2672, 1848,3696,
-   1864,2416, 1880,3440, 1896,2928, 1912,3952, 1928,2288, 1944,3312, 1960,2800, 1976,3824,
-   1992,2544, 2008,3568, 2024,3056, 2040,4080, 2072,3080, 2088,2568, 2104,3592, 2120,2312,
-   2136,3336, 2152,2824, 2168,3848, 2200,3208, 2216,2696, 2232,3720, 2248,2440, 2264,3464,
-   2280,2952, 2296,3976, 2328,3144, 2344,2632, 2360,3656, 2392,3400, 2408,2888, 2424,3912,
-   2456,3272, 2472,2760, 2488,3784, 2520,3528, 2536,3016, 2552,4040, 2584,3112, 2616,3624,
-   2648,3368, 2664,2856, 2680,3880, 2712,3240, 2744,3752, 2776,3496, 2792,2984, 2808,4008,
-   2840,3176, 2872,3688, 2904,3432, 2936,3944, 2968,3304, 3000,3816, 3032,3560, 3064,4072,
-   3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928,
-   3512,3800, 3576,4056, 3704,3896, 3832,4024
-};
-
-const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] = 
-{
-    //radix 4, size 992
-    8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608, 
-    80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352, 
-    144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864, 
-    208,2816, 216,6912, 224,1792, 232,5888, 240,3840, 248,7936, 264,4224, 272,2176, 
-    280,6272, 288,1152, 296,5248, 304,3200, 312,7296, 320,640, 328,4736, 336,2688, 
-    344,6784, 352,1664, 360,5760, 368,3712, 376,7808, 392,4480, 400,2432, 408,6528, 
-    416,1408, 424,5504, 432,3456, 440,7552, 448,896, 456,4992, 464,2944, 472,7040, 
-    480,1920, 488,6016, 496,3968, 504,8064, 520,4160, 528,2112, 536,6208, 544,1088, 
-    552,5184, 560,3136, 568,7232, 584,4672, 592,2624, 600,6720, 608,1600, 616,5696, 
-    624,3648, 632,7744, 648,4416, 656,2368, 664,6464, 672,1344, 680,5440, 688,3392, 
-    696,7488, 704,832, 712,4928, 720,2880, 728,6976, 736,1856, 744,5952, 752,3904, 
-    760,8000, 776,4288, 784,2240, 792,6336, 800,1216, 808,5312, 816,3264, 824,7360, 
-    840,4800, 848,2752, 856,6848, 864,1728, 872,5824, 880,3776, 888,7872, 904,4544, 
-    912,2496, 920,6592, 928,1472, 936,5568, 944,3520, 952,7616, 968,5056, 976,3008, 
-    984,7104, 992,1984, 1000,6080, 1008,4032, 1016,8128, 1032,4128, 1040,2080, 
-    1048,6176, 1064,5152, 1072,3104, 1080,7200, 1096,4640, 1104,2592, 1112,6688, 
-    1120,1568, 1128,5664, 1136,3616, 1144,7712, 1160,4384, 1168,2336, 1176,6432, 
-    1184,1312, 1192,5408, 1200,3360, 1208,7456, 1224,4896, 1232,2848, 1240,6944, 
-    1248,1824, 1256,5920, 1264,3872, 1272,7968, 1288,4256, 1296,2208, 1304,6304, 
-    1320,5280, 1328,3232, 1336,7328, 1352,4768, 1360,2720, 1368,6816, 1376,1696, 
-    1384,5792, 1392,3744, 1400,7840, 1416,4512, 1424,2464, 1432,6560, 1448,5536, 
-    1456,3488, 1464,7584, 1480,5024, 1488,2976, 1496,7072, 1504,1952, 1512,6048, 
-    1520,4000, 1528,8096, 1544,4192, 1552,2144, 1560,6240, 1576,5216, 1584,3168, 
-    1592,7264, 1608,4704, 1616,2656, 1624,6752, 1640,5728, 1648,3680, 1656,7776, 
-    1672,4448, 1680,2400, 1688,6496, 1704,5472, 1712,3424, 1720,7520, 1736,4960, 
-    1744,2912, 1752,7008, 1760,1888, 1768,5984, 1776,3936, 1784,8032, 1800,4320, 
-    1808,2272, 1816,6368, 1832,5344, 1840,3296, 1848,7392, 1864,4832, 1872,2784, 
-    1880,6880, 1896,5856, 1904,3808, 1912,7904, 1928,4576, 1936,2528, 1944,6624, 
-    1960,5600, 1968,3552, 1976,7648, 1992,5088, 2000,3040, 2008,7136, 2024,6112, 
-    2032,4064, 2040,8160, 2056,4112, 2072,6160, 2088,5136, 2096,3088, 2104,7184, 
-    2120,4624, 2128,2576, 2136,6672, 2152,5648, 2160,3600, 2168,7696, 2184,4368, 
-    2192,2320, 2200,6416, 2216,5392, 2224,3344, 2232,7440, 2248,4880, 2256,2832, 
-    2264,6928, 2280,5904, 2288,3856, 2296,7952, 2312,4240, 2328,6288, 2344,5264, 
-    2352,3216, 2360,7312, 2376,4752, 2384,2704, 2392,6800, 2408,5776, 2416,3728, 
-    2424,7824, 2440,4496, 2456,6544, 2472,5520, 2480,3472, 2488,7568, 2504,5008, 
-    2512,2960, 2520,7056, 2536,6032, 2544,3984, 2552,8080, 2568,4176, 2584,6224, 
-    2600,5200, 2608,3152, 2616,7248, 2632,4688, 2648,6736, 2664,5712, 2672,3664, 
-    2680,7760, 2696,4432, 2712,6480, 2728,5456, 2736,3408, 2744,7504, 2760,4944, 
-    2768,2896, 2776,6992, 2792,5968, 2800,3920, 2808,8016, 2824,4304, 2840,6352, 
-    2856,5328, 2864,3280, 2872,7376, 2888,4816, 2904,6864, 2920,5840, 2928,3792, 
-    2936,7888, 2952,4560, 2968,6608, 2984,5584, 2992,3536, 3000,7632, 3016,5072, 
-    3032,7120, 3048,6096, 3056,4048, 3064,8144, 3080,4144, 3096,6192, 3112,5168, 
-    3128,7216, 3144,4656, 3160,6704, 3176,5680, 3184,3632, 3192,7728, 3208,4400, 
-    3224,6448, 3240,5424, 3248,3376, 3256,7472, 3272,4912, 3288,6960, 3304,5936, 
-    3312,3888, 3320,7984, 3336,4272, 3352,6320, 3368,5296, 3384,7344, 3400,4784, 
-    3416,6832, 3432,5808, 3440,3760, 3448,7856, 3464,4528, 3480,6576, 3496,5552, 
-    3512,7600, 3528,5040, 3544,7088, 3560,6064, 3568,4016, 3576,8112, 3592,4208, 
-    3608,6256, 3624,5232, 3640,7280, 3656,4720, 3672,6768, 3688,5744, 3704,7792, 
-    3720,4464, 3736,6512, 3752,5488, 3768,7536, 3784,4976, 3800,7024, 3816,6000, 
-    3824,3952, 3832,8048, 3848,4336, 3864,6384, 3880,5360, 3896,7408, 3912,4848, 
-    3928,6896, 3944,5872, 3960,7920, 3976,4592, 3992,6640, 4008,5616, 4024,7664, 
-    4040,5104, 4056,7152, 4072,6128, 4088,8176, 4120,6152, 4136,5128, 4152,7176, 
-    4168,4616, 4184,6664, 4200,5640, 4216,7688, 4232,4360, 4248,6408, 4264,5384, 
-    4280,7432, 4296,4872, 4312,6920, 4328,5896, 4344,7944, 4376,6280, 4392,5256, 
-    4408,7304, 4424,4744, 4440,6792, 4456,5768, 4472,7816, 4504,6536, 4520,5512, 
-    4536,7560, 4552,5000, 4568,7048, 4584,6024, 4600,8072, 4632,6216, 4648,5192, 
-    4664,7240, 4696,6728, 4712,5704, 4728,7752, 4760,6472, 4776,5448, 4792,7496, 
-    4808,4936, 4824,6984, 4840,5960, 4856,8008, 4888,6344, 4904,5320, 4920,7368, 
-    4952,6856, 4968,5832, 4984,7880, 5016,6600, 5032,5576, 5048,7624, 5080,7112, 
-    5096,6088, 5112,8136, 5144,6184, 5176,7208, 5208,6696, 5224,5672, 5240,7720, 
-    5272,6440, 5288,5416, 5304,7464, 5336,6952, 5352,5928, 5368,7976, 5400,6312, 
-    5432,7336, 5464,6824, 5480,5800, 5496,7848, 5528,6568, 5560,7592, 5592,7080, 
-    5608,6056, 5624,8104, 5656,6248, 5688,7272, 5720,6760, 5752,7784, 5784,6504, 
-    5816,7528, 5848,7016, 5864,5992, 5880,8040, 5912,6376, 5944,7400, 5976,6888, 
-    6008,7912, 6040,6632, 6072,7656, 6104,7144, 6136,8168, 6200,7192, 6232,6680, 
-    6264,7704, 6296,6424, 6328,7448, 6360,6936, 6392,7960, 6456,7320, 6488,6808, 
-    6520,7832, 6584,7576, 6616,7064, 6648,8088, 6712,7256, 6776,7768, 6840,7512, 
-    6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736, 
-    7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056 
-};
-
-const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] = 
-{
-    //4x2, size 1984
-    8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024, 
-    72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512, 
-    136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848, 
-    192,1536, 200,9728, 208,5632, 216,13824, 224,3584, 232,11776, 240,7680, 
-    248,15872, 264,8448, 272,4352, 280,12544, 288,2304, 296,10496, 304,6400, 
-    312,14592, 320,1280, 328,9472, 336,5376, 344,13568, 352,3328, 360,11520, 
-    368,7424, 376,15616, 384,768, 392,8960, 400,4864, 408,13056, 416,2816, 
-    424,11008, 432,6912, 440,15104, 448,1792, 456,9984, 464,5888, 472,14080, 
-    480,3840, 488,12032, 496,7936, 504,16128, 520,8320, 528,4224, 536,12416, 
-    544,2176, 552,10368, 560,6272, 568,14464, 576,1152, 584,9344, 592,5248, 
-    600,13440, 608,3200, 616,11392, 624,7296, 632,15488, 648,8832, 656,4736, 
-    664,12928, 672,2688, 680,10880, 688,6784, 696,14976, 704,1664, 712,9856, 
-    720,5760, 728,13952, 736,3712, 744,11904, 752,7808, 760,16000, 776,8576, 
-    784,4480, 792,12672, 800,2432, 808,10624, 816,6528, 824,14720, 832,1408, 
-    840,9600, 848,5504, 856,13696, 864,3456, 872,11648, 880,7552, 888,15744, 
-    904,9088, 912,4992, 920,13184, 928,2944, 936,11136, 944,7040, 952,15232, 
-    960,1920, 968,10112, 976,6016, 984,14208, 992,3968, 1000,12160, 1008,8064, 
-    1016,16256, 1032,8256, 1040,4160, 1048,12352, 1056,2112, 1064,10304, 1072,6208, 
-    1080,14400, 1096,9280, 1104,5184, 1112,13376, 1120,3136, 1128,11328, 1136,7232, 
-    1144,15424, 1160,8768, 1168,4672, 1176,12864, 1184,2624, 1192,10816, 1200,6720, 
-    1208,14912, 1216,1600, 1224,9792, 1232,5696, 1240,13888, 1248,3648, 1256,11840, 
-    1264,7744, 1272,15936, 1288,8512, 1296,4416, 1304,12608, 1312,2368, 1320,10560, 
-    1328,6464, 1336,14656, 1352,9536, 1360,5440, 1368,13632, 1376,3392, 1384,11584, 
-    1392,7488, 1400,15680, 1416,9024, 1424,4928, 1432,13120, 1440,2880, 1448,11072, 
-    1456,6976, 1464,15168, 1472,1856, 1480,10048, 1488,5952, 1496,14144, 1504,3904, 
-    1512,12096, 1520,8000, 1528,16192, 1544,8384, 1552,4288, 1560,12480, 1568,2240, 
-    1576,10432, 1584,6336, 1592,14528, 1608,9408, 1616,5312, 1624,13504, 1632,3264, 
-    1640,11456, 1648,7360, 1656,15552, 1672,8896, 1680,4800, 1688,12992, 1696,2752, 
-    1704,10944, 1712,6848, 1720,15040, 1736,9920, 1744,5824, 1752,14016, 1760,3776, 
-    1768,11968, 1776,7872, 1784,16064, 1800,8640, 1808,4544, 1816,12736, 1824,2496, 
-    1832,10688, 1840,6592, 1848,14784, 1864,9664, 1872,5568, 1880,13760, 1888,3520, 
-    1896,11712, 1904,7616, 1912,15808, 1928,9152, 1936,5056, 1944,13248, 1952,3008, 
-    1960,11200, 1968,7104, 1976,15296, 1992,10176, 2000,6080, 2008,14272, 2016,4032, 
-    2024,12224, 2032,8128, 2040,16320, 2056,8224, 2064,4128, 2072,12320, 2088,10272, 
-    2096,6176, 2104,14368, 2120,9248, 2128,5152, 2136,13344, 2144,3104, 2152,11296, 
-    2160,7200, 2168,15392, 2184,8736, 2192,4640, 2200,12832, 2208,2592, 2216,10784, 
-    2224,6688, 2232,14880, 2248,9760, 2256,5664, 2264,13856, 2272,3616, 2280,11808, 
-    2288,7712, 2296,15904, 2312,8480, 2320,4384, 2328,12576, 2344,10528, 2352,6432, 
-    2360,14624, 2376,9504, 2384,5408, 2392,13600, 2400,3360, 2408,11552, 2416,7456, 
-    2424,15648, 2440,8992, 2448,4896, 2456,13088, 2464,2848, 2472,11040, 2480,6944, 
-    2488,15136, 2504,10016, 2512,5920, 2520,14112, 2528,3872, 2536,12064, 2544,7968, 
-    2552,16160, 2568,8352, 2576,4256, 2584,12448, 2600,10400, 2608,6304, 2616,14496, 
-    2632,9376, 2640,5280, 2648,13472, 2656,3232, 2664,11424, 2672,7328, 2680,15520, 
-    2696,8864, 2704,4768, 2712,12960, 2728,10912, 2736,6816, 2744,15008, 2760,9888, 
-    2768,5792, 2776,13984, 2784,3744, 2792,11936, 2800,7840, 2808,16032, 2824,8608, 
-    2832,4512, 2840,12704, 2856,10656, 2864,6560, 2872,14752, 2888,9632, 2896,5536, 
-    2904,13728, 2912,3488, 2920,11680, 2928,7584, 2936,15776, 2952,9120, 2960,5024, 
-    2968,13216, 2984,11168, 2992,7072, 3000,15264, 3016,10144, 3024,6048, 
-    3032,14240, 3040,4000, 3048,12192, 3056,8096, 3064,16288, 3080,8288, 3088,4192, 
-    3096,12384, 3112,10336, 3120,6240, 3128,14432, 3144,9312, 3152,5216, 3160,13408, 
-    3176,11360, 3184,7264, 3192,15456, 3208,8800, 3216,4704, 3224,12896, 3240,10848, 
-    3248,6752, 3256,14944, 3272,9824, 3280,5728, 3288,13920, 3296,3680, 3304,11872, 
-    3312,7776, 3320,15968, 3336,8544, 3344,4448, 3352,12640, 3368,10592, 3376,6496, 
-    3384,14688, 3400,9568, 3408,5472, 3416,13664, 3432,11616, 3440,7520, 3448,15712, 
-    3464,9056, 3472,4960, 3480,13152, 3496,11104, 3504,7008, 3512,15200, 3528,10080, 
-    3536,5984, 3544,14176, 3552,3936, 3560,12128, 3568,8032, 3576,16224, 3592,8416, 
-    3600,4320, 3608,12512, 3624,10464, 3632,6368, 3640,14560, 3656,9440, 3664,5344, 
-    3672,13536, 3688,11488, 3696,7392, 3704,15584, 3720,8928, 3728,4832, 3736,13024, 
-    3752,10976, 3760,6880, 3768,15072, 3784,9952, 3792,5856, 3800,14048, 3816,12000, 
-    3824,7904, 3832,16096, 3848,8672, 3856,4576, 3864,12768, 3880,10720, 3888,6624, 
-    3896,14816, 3912,9696, 3920,5600, 3928,13792, 3944,11744, 3952,7648, 3960,15840, 
-    3976,9184, 3984,5088, 3992,13280, 4008,11232, 4016,7136, 4024,15328, 4040,10208, 
-    4048,6112, 4056,14304, 4072,12256, 4080,8160, 4088,16352, 4104,8208, 4120,12304, 
-    4136,10256, 4144,6160, 4152,14352, 4168,9232, 4176,5136, 4184,13328, 4200,11280, 
-    4208,7184, 4216,15376, 4232,8720, 4240,4624, 4248,12816, 4264,10768, 4272,6672, 
-    4280,14864, 4296,9744, 4304,5648, 4312,13840, 4328,11792, 4336,7696, 4344,15888, 
-    4360,8464, 4376,12560, 4392,10512, 4400,6416, 4408,14608, 4424,9488, 4432,5392, 
-    4440,13584, 4456,11536, 4464,7440, 4472,15632, 4488,8976, 4496,4880, 4504,13072, 
-    4520,11024, 4528,6928, 4536,15120, 4552,10000, 4560,5904, 4568,14096, 
-    4584,12048, 4592,7952, 4600,16144, 4616,8336, 4632,12432, 4648,10384, 4656,6288, 
-    4664,14480, 4680,9360, 4688,5264, 4696,13456, 4712,11408, 4720,7312, 4728,15504, 
-    4744,8848, 4760,12944, 4776,10896, 4784,6800, 4792,14992, 4808,9872, 4816,5776, 
-    4824,13968, 4840,11920, 4848,7824, 4856,16016, 4872,8592, 4888,12688, 
-    4904,10640, 4912,6544, 4920,14736, 4936,9616, 4944,5520, 4952,13712, 4968,11664, 
-    4976,7568, 4984,15760, 5000,9104, 5016,13200, 5032,11152, 5040,7056, 5048,15248, 
-    5064,10128, 5072,6032, 5080,14224, 5096,12176, 5104,8080, 5112,16272, 5128,8272, 
-    5144,12368, 5160,10320, 5168,6224, 5176,14416, 5192,9296, 5208,13392, 
-    5224,11344, 5232,7248, 5240,15440, 5256,8784, 5272,12880, 5288,10832, 5296,6736, 
-    5304,14928, 5320,9808, 5328,5712, 5336,13904, 5352,11856, 5360,7760, 5368,15952, 
-    5384,8528, 5400,12624, 5416,10576, 5424,6480, 5432,14672, 5448,9552, 5464,13648, 
-    5480,11600, 5488,7504, 5496,15696, 5512,9040, 5528,13136, 5544,11088, 5552,6992, 
-    5560,15184, 5576,10064, 5584,5968, 5592,14160, 5608,12112, 5616,8016, 
-    5624,16208, 5640,8400, 5656,12496, 5672,10448, 5680,6352, 5688,14544, 5704,9424, 
-    5720,13520, 5736,11472, 5744,7376, 5752,15568, 5768,8912, 5784,13008, 
-    5800,10960, 5808,6864, 5816,15056, 5832,9936, 5848,14032, 5864,11984, 5872,7888, 
-    5880,16080, 5896,8656, 5912,12752, 5928,10704, 5936,6608, 5944,14800, 5960,9680, 
-    5976,13776, 5992,11728, 6000,7632, 6008,15824, 6024,9168, 6040,13264, 
-    6056,11216, 6064,7120, 6072,15312, 6088,10192, 6104,14288, 6120,12240, 
-    6128,8144, 6136,16336, 6152,8240, 6168,12336, 6184,10288, 6200,14384, 6216,9264, 
-    6232,13360, 6248,11312, 6256,7216, 6264,15408, 6280,8752, 6296,12848, 
-    6312,10800, 6320,6704, 6328,14896, 6344,9776, 6360,13872, 6376,11824, 6384,7728, 
-    6392,15920, 6408,8496, 6424,12592, 6440,10544, 6456,14640, 6472,9520, 
-    6488,13616, 6504,11568, 6512,7472, 6520,15664, 6536,9008, 6552,13104, 
-    6568,11056, 6576,6960, 6584,15152, 6600,10032, 6616,14128, 6632,12080, 
-    6640,7984, 6648,16176, 6664,8368, 6680,12464, 6696,10416, 6712,14512, 6728,9392, 
-    6744,13488, 6760,11440, 6768,7344, 6776,15536, 6792,8880, 6808,12976, 
-    6824,10928, 6840,15024, 6856,9904, 6872,14000, 6888,11952, 6896,7856, 
-    6904,16048, 6920,8624, 6936,12720, 6952,10672, 6968,14768, 6984,9648, 
-    7000,13744, 7016,11696, 7024,7600, 7032,15792, 7048,9136, 7064,13232, 
-    7080,11184, 7096,15280, 7112,10160, 7128,14256, 7144,12208, 7152,8112, 
-    7160,16304, 7176,8304, 7192,12400, 7208,10352, 7224,14448, 7240,9328, 
-    7256,13424, 7272,11376, 7288,15472, 7304,8816, 7320,12912, 7336,10864, 
-    7352,14960, 7368,9840, 7384,13936, 7400,11888, 7408,7792, 7416,15984, 7432,8560, 
-    7448,12656, 7464,10608, 7480,14704, 7496,9584, 7512,13680, 7528,11632, 
-    7544,15728, 7560,9072, 7576,13168, 7592,11120, 7608,15216, 7624,10096, 
-    7640,14192, 7656,12144, 7664,8048, 7672,16240, 7688,8432, 7704,12528, 
-    7720,10480, 7736,14576, 7752,9456, 7768,13552, 7784,11504, 7800,15600, 
-    7816,8944, 7832,13040, 7848,10992, 7864,15088, 7880,9968, 7896,14064, 
-    7912,12016, 7928,16112, 7944,8688, 7960,12784, 7976,10736, 7992,14832, 
-    8008,9712, 8024,13808, 8040,11760, 8056,15856, 8072,9200, 8088,13296, 
-    8104,11248, 8120,15344, 8136,10224, 8152,14320, 8168,12272, 8184,16368, 
-    8216,12296, 8232,10248, 8248,14344, 8264,9224, 8280,13320, 8296,11272, 
-    8312,15368, 8328,8712, 8344,12808, 8360,10760, 8376,14856, 8392,9736, 
-    8408,13832, 8424,11784, 8440,15880, 8472,12552, 8488,10504, 8504,14600, 
-    8520,9480, 8536,13576, 8552,11528, 8568,15624, 8584,8968, 8600,13064, 
-    8616,11016, 8632,15112, 8648,9992, 8664,14088, 8680,12040, 8696,16136, 
-    8728,12424, 8744,10376, 8760,14472, 8776,9352, 8792,13448, 8808,11400, 
-    8824,15496, 8856,12936, 8872,10888, 8888,14984, 8904,9864, 8920,13960, 
-    8936,11912, 8952,16008, 8984,12680, 9000,10632, 9016,14728, 9032,9608, 
-    9048,13704, 9064,11656, 9080,15752, 9112,13192, 9128,11144, 9144,15240, 
-    9160,10120, 9176,14216, 9192,12168, 9208,16264, 9240,12360, 9256,10312, 
-    9272,14408, 9304,13384, 9320,11336, 9336,15432, 9368,12872, 9384,10824, 
-    9400,14920, 9416,9800, 9432,13896, 9448,11848, 9464,15944, 9496,12616, 
-    9512,10568, 9528,14664, 9560,13640, 9576,11592, 9592,15688, 9624,13128, 
-    9640,11080, 9656,15176, 9672,10056, 9688,14152, 9704,12104, 9720,16200, 
-    9752,12488, 9768,10440, 9784,14536, 9816,13512, 9832,11464, 9848,15560, 
-    9880,13000, 9896,10952, 9912,15048, 9944,14024, 9960,11976, 9976,16072, 
-    10008,12744, 10024,10696, 10040,14792, 10072,13768, 10088,11720, 10104,15816, 
-    10136,13256, 10152,11208, 10168,15304, 10200,14280, 10216,12232, 10232,16328, 
-    10264,12328, 10296,14376, 10328,13352, 10344,11304, 10360,15400, 10392,12840, 
-    10408,10792, 10424,14888, 10456,13864, 10472,11816, 10488,15912, 10520,12584, 
-    10552,14632, 10584,13608, 10600,11560, 10616,15656, 10648,13096, 10664,11048, 
-    10680,15144, 10712,14120, 10728,12072, 10744,16168, 10776,12456, 10808,14504, 
-    10840,13480, 10856,11432, 10872,15528, 10904,12968, 10936,15016, 10968,13992, 
-    10984,11944, 11000,16040, 11032,12712, 11064,14760, 11096,13736, 11112,11688, 
-    11128,15784, 11160,13224, 11192,15272, 11224,14248, 11240,12200, 11256,16296, 
-    11288,12392, 11320,14440, 11352,13416, 11384,15464, 11416,12904, 11448,14952, 
-    11480,13928, 11496,11880, 11512,15976, 11544,12648, 11576,14696, 11608,13672, 
-    11640,15720, 11672,13160, 11704,15208, 11736,14184, 11752,12136, 11768,16232, 
-    11800,12520, 11832,14568, 11864,13544, 11896,15592, 11928,13032, 11960,15080, 
-    11992,14056, 12024,16104, 12056,12776, 12088,14824, 12120,13800, 12152,15848, 
-    12184,13288, 12216,15336, 12248,14312, 12280,16360, 12344,14360, 12376,13336, 
-    12408,15384, 12440,12824, 12472,14872, 12504,13848, 12536,15896, 12600,14616, 
-    12632,13592, 12664,15640, 12696,13080, 12728,15128, 12760,14104, 12792,16152, 
-    12856,14488, 12888,13464, 12920,15512, 12984,15000, 13016,13976, 13048,16024, 
-    13112,14744, 13144,13720, 13176,15768, 13240,15256, 13272,14232, 13304,16280, 
-    13368,14424, 13432,15448, 13496,14936, 13528,13912, 13560,15960, 13624,14680, 
-    13688,15704, 13752,15192, 13784,14168, 13816,16216, 13880,14552, 13944,15576, 
-    14008,15064, 14072,16088, 14136,14808, 14200,15832, 14264,15320, 14328,16344, 
-    14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184, 
-    14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248 
-};
-
-const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] = 
-{
-    //radix 4, size 4032
-    8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048, 
-    72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720, 
-    128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312, 
-    184,29696, 192,3072, 200,19456, 208,11264, 216,27648, 224,7168, 232,23552, 
-    240,15360, 248,31744, 256,512, 264,16896, 272,8704, 280,25088, 288,4608, 
-    296,20992, 304,12800, 312,29184, 320,2560, 328,18944, 336,10752, 344,27136, 
-    352,6656, 360,23040, 368,14848, 376,31232, 384,1536, 392,17920, 400,9728, 
-    408,26112, 416,5632, 424,22016, 432,13824, 440,30208, 448,3584, 456,19968, 
-    464,11776, 472,28160, 480,7680, 488,24064, 496,15872, 504,32256, 520,16640, 
-    528,8448, 536,24832, 544,4352, 552,20736, 560,12544, 568,28928, 576,2304, 
-    584,18688, 592,10496, 600,26880, 608,6400, 616,22784, 624,14592, 632,30976, 
-    640,1280, 648,17664, 656,9472, 664,25856, 672,5376, 680,21760, 688,13568, 
-    696,29952, 704,3328, 712,19712, 720,11520, 728,27904, 736,7424, 744,23808, 
-    752,15616, 760,32000, 776,17152, 784,8960, 792,25344, 800,4864, 808,21248, 
-    816,13056, 824,29440, 832,2816, 840,19200, 848,11008, 856,27392, 864,6912, 
-    872,23296, 880,15104, 888,31488, 896,1792, 904,18176, 912,9984, 920,26368, 
-    928,5888, 936,22272, 944,14080, 952,30464, 960,3840, 968,20224, 976,12032, 
-    984,28416, 992,7936, 1000,24320, 1008,16128, 1016,32512, 1032,16512, 1040,8320, 
-    1048,24704, 1056,4224, 1064,20608, 1072,12416, 1080,28800, 1088,2176, 
-    1096,18560, 1104,10368, 1112,26752, 1120,6272, 1128,22656, 1136,14464, 
-    1144,30848, 1160,17536, 1168,9344, 1176,25728, 1184,5248, 1192,21632, 
-    1200,13440, 1208,29824, 1216,3200, 1224,19584, 1232,11392, 1240,27776, 
-    1248,7296, 1256,23680, 1264,15488, 1272,31872, 1288,17024, 1296,8832, 
-    1304,25216, 1312,4736, 1320,21120, 1328,12928, 1336,29312, 1344,2688, 
-    1352,19072, 1360,10880, 1368,27264, 1376,6784, 1384,23168, 1392,14976, 
-    1400,31360, 1408,1664, 1416,18048, 1424,9856, 1432,26240, 1440,5760, 1448,22144, 
-    1456,13952, 1464,30336, 1472,3712, 1480,20096, 1488,11904, 1496,28288, 
-    1504,7808, 1512,24192, 1520,16000, 1528,32384, 1544,16768, 1552,8576, 
-    1560,24960, 1568,4480, 1576,20864, 1584,12672, 1592,29056, 1600,2432, 
-    1608,18816, 1616,10624, 1624,27008, 1632,6528, 1640,22912, 1648,14720, 
-    1656,31104, 1672,17792, 1680,9600, 1688,25984, 1696,5504, 1704,21888, 
-    1712,13696, 1720,30080, 1728,3456, 1736,19840, 1744,11648, 1752,28032, 
-    1760,7552, 1768,23936, 1776,15744, 1784,32128, 1800,17280, 1808,9088, 
-    1816,25472, 1824,4992, 1832,21376, 1840,13184, 1848,29568, 1856,2944, 
-    1864,19328, 1872,11136, 1880,27520, 1888,7040, 1896,23424, 1904,15232, 
-    1912,31616, 1928,18304, 1936,10112, 1944,26496, 1952,6016, 1960,22400, 
-    1968,14208, 1976,30592, 1984,3968, 1992,20352, 2000,12160, 2008,28544, 
-    2016,8064, 2024,24448, 2032,16256, 2040,32640, 2056,16448, 2064,8256, 
-    2072,24640, 2080,4160, 2088,20544, 2096,12352, 2104,28736, 2120,18496, 
-    2128,10304, 2136,26688, 2144,6208, 2152,22592, 2160,14400, 2168,30784, 
-    2184,17472, 2192,9280, 2200,25664, 2208,5184, 2216,21568, 2224,13376, 
-    2232,29760, 2240,3136, 2248,19520, 2256,11328, 2264,27712, 2272,7232, 
-    2280,23616, 2288,15424, 2296,31808, 2312,16960, 2320,8768, 2328,25152, 
-    2336,4672, 2344,21056, 2352,12864, 2360,29248, 2368,2624, 2376,19008, 
-    2384,10816, 2392,27200, 2400,6720, 2408,23104, 2416,14912, 2424,31296, 
-    2440,17984, 2448,9792, 2456,26176, 2464,5696, 2472,22080, 2480,13888, 
-    2488,30272, 2496,3648, 2504,20032, 2512,11840, 2520,28224, 2528,7744, 
-    2536,24128, 2544,15936, 2552,32320, 2568,16704, 2576,8512, 2584,24896, 
-    2592,4416, 2600,20800, 2608,12608, 2616,28992, 2632,18752, 2640,10560, 
-    2648,26944, 2656,6464, 2664,22848, 2672,14656, 2680,31040, 2696,17728, 
-    2704,9536, 2712,25920, 2720,5440, 2728,21824, 2736,13632, 2744,30016, 2752,3392, 
-    2760,19776, 2768,11584, 2776,27968, 2784,7488, 2792,23872, 2800,15680, 
-    2808,32064, 2824,17216, 2832,9024, 2840,25408, 2848,4928, 2856,21312, 
-    2864,13120, 2872,29504, 2888,19264, 2896,11072, 2904,27456, 2912,6976, 
-    2920,23360, 2928,15168, 2936,31552, 2952,18240, 2960,10048, 2968,26432, 
-    2976,5952, 2984,22336, 2992,14144, 3000,30528, 3008,3904, 3016,20288, 
-    3024,12096, 3032,28480, 3040,8000, 3048,24384, 3056,16192, 3064,32576, 
-    3080,16576, 3088,8384, 3096,24768, 3104,4288, 3112,20672, 3120,12480, 
-    3128,28864, 3144,18624, 3152,10432, 3160,26816, 3168,6336, 3176,22720, 
-    3184,14528, 3192,30912, 3208,17600, 3216,9408, 3224,25792, 3232,5312, 
-    3240,21696, 3248,13504, 3256,29888, 3272,19648, 3280,11456, 3288,27840, 
-    3296,7360, 3304,23744, 3312,15552, 3320,31936, 3336,17088, 3344,8896, 
-    3352,25280, 3360,4800, 3368,21184, 3376,12992, 3384,29376, 3400,19136, 
-    3408,10944, 3416,27328, 3424,6848, 3432,23232, 3440,15040, 3448,31424, 
-    3464,18112, 3472,9920, 3480,26304, 3488,5824, 3496,22208, 3504,14016, 
-    3512,30400, 3520,3776, 3528,20160, 3536,11968, 3544,28352, 3552,7872, 
-    3560,24256, 3568,16064, 3576,32448, 3592,16832, 3600,8640, 3608,25024, 
-    3616,4544, 3624,20928, 3632,12736, 3640,29120, 3656,18880, 3664,10688, 
-    3672,27072, 3680,6592, 3688,22976, 3696,14784, 3704,31168, 3720,17856, 
-    3728,9664, 3736,26048, 3744,5568, 3752,21952, 3760,13760, 3768,30144, 
-    3784,19904, 3792,11712, 3800,28096, 3808,7616, 3816,24000, 3824,15808, 
-    3832,32192, 3848,17344, 3856,9152, 3864,25536, 3872,5056, 3880,21440, 
-    3888,13248, 3896,29632, 3912,19392, 3920,11200, 3928,27584, 3936,7104, 
-    3944,23488, 3952,15296, 3960,31680, 3976,18368, 3984,10176, 3992,26560, 
-    4000,6080, 4008,22464, 4016,14272, 4024,30656, 4040,20416, 4048,12224, 
-    4056,28608, 4064,8128, 4072,24512, 4080,16320, 4088,32704, 4104,16416, 
-    4112,8224, 4120,24608, 4136,20512, 4144,12320, 4152,28704, 4168,18464, 
-    4176,10272, 4184,26656, 4192,6176, 4200,22560, 4208,14368, 4216,30752, 
-    4232,17440, 4240,9248, 4248,25632, 4256,5152, 4264,21536, 4272,13344, 
-    4280,29728, 4296,19488, 4304,11296, 4312,27680, 4320,7200, 4328,23584, 
-    4336,15392, 4344,31776, 4360,16928, 4368,8736, 4376,25120, 4384,4640, 
-    4392,21024, 4400,12832, 4408,29216, 4424,18976, 4432,10784, 4440,27168, 
-    4448,6688, 4456,23072, 4464,14880, 4472,31264, 4488,17952, 4496,9760, 
-    4504,26144, 4512,5664, 4520,22048, 4528,13856, 4536,30240, 4552,20000, 
-    4560,11808, 4568,28192, 4576,7712, 4584,24096, 4592,15904, 4600,32288, 
-    4616,16672, 4624,8480, 4632,24864, 4648,20768, 4656,12576, 4664,28960, 
-    4680,18720, 4688,10528, 4696,26912, 4704,6432, 4712,22816, 4720,14624, 
-    4728,31008, 4744,17696, 4752,9504, 4760,25888, 4768,5408, 4776,21792, 
-    4784,13600, 4792,29984, 4808,19744, 4816,11552, 4824,27936, 4832,7456, 
-    4840,23840, 4848,15648, 4856,32032, 4872,17184, 4880,8992, 4888,25376, 
-    4904,21280, 4912,13088, 4920,29472, 4936,19232, 4944,11040, 4952,27424, 
-    4960,6944, 4968,23328, 4976,15136, 4984,31520, 5000,18208, 5008,10016, 
-    5016,26400, 5024,5920, 5032,22304, 5040,14112, 5048,30496, 5064,20256, 
-    5072,12064, 5080,28448, 5088,7968, 5096,24352, 5104,16160, 5112,32544, 
-    5128,16544, 5136,8352, 5144,24736, 5160,20640, 5168,12448, 5176,28832, 
-    5192,18592, 5200,10400, 5208,26784, 5216,6304, 5224,22688, 5232,14496, 
-    5240,30880, 5256,17568, 5264,9376, 5272,25760, 5288,21664, 5296,13472, 
-    5304,29856, 5320,19616, 5328,11424, 5336,27808, 5344,7328, 5352,23712, 
-    5360,15520, 5368,31904, 5384,17056, 5392,8864, 5400,25248, 5416,21152, 
-    5424,12960, 5432,29344, 5448,19104, 5456,10912, 5464,27296, 5472,6816, 
-    5480,23200, 5488,15008, 5496,31392, 5512,18080, 5520,9888, 5528,26272, 
-    5536,5792, 5544,22176, 5552,13984, 5560,30368, 5576,20128, 5584,11936, 
-    5592,28320, 5600,7840, 5608,24224, 5616,16032, 5624,32416, 5640,16800, 
-    5648,8608, 5656,24992, 5672,20896, 5680,12704, 5688,29088, 5704,18848, 
-    5712,10656, 5720,27040, 5728,6560, 5736,22944, 5744,14752, 5752,31136, 
-    5768,17824, 5776,9632, 5784,26016, 5800,21920, 5808,13728, 5816,30112, 
-    5832,19872, 5840,11680, 5848,28064, 5856,7584, 5864,23968, 5872,15776, 
-    5880,32160, 5896,17312, 5904,9120, 5912,25504, 5928,21408, 5936,13216, 
-    5944,29600, 5960,19360, 5968,11168, 5976,27552, 5984,7072, 5992,23456, 
-    6000,15264, 6008,31648, 6024,18336, 6032,10144, 6040,26528, 6056,22432, 
-    6064,14240, 6072,30624, 6088,20384, 6096,12192, 6104,28576, 6112,8096, 
-    6120,24480, 6128,16288, 6136,32672, 6152,16480, 6160,8288, 6168,24672, 
-    6184,20576, 6192,12384, 6200,28768, 6216,18528, 6224,10336, 6232,26720, 
-    6248,22624, 6256,14432, 6264,30816, 6280,17504, 6288,9312, 6296,25696, 
-    6312,21600, 6320,13408, 6328,29792, 6344,19552, 6352,11360, 6360,27744, 
-    6368,7264, 6376,23648, 6384,15456, 6392,31840, 6408,16992, 6416,8800, 
-    6424,25184, 6440,21088, 6448,12896, 6456,29280, 6472,19040, 6480,10848, 
-    6488,27232, 6496,6752, 6504,23136, 6512,14944, 6520,31328, 6536,18016, 
-    6544,9824, 6552,26208, 6568,22112, 6576,13920, 6584,30304, 6600,20064, 
-    6608,11872, 6616,28256, 6624,7776, 6632,24160, 6640,15968, 6648,32352, 
-    6664,16736, 6672,8544, 6680,24928, 6696,20832, 6704,12640, 6712,29024, 
-    6728,18784, 6736,10592, 6744,26976, 6760,22880, 6768,14688, 6776,31072, 
-    6792,17760, 6800,9568, 6808,25952, 6824,21856, 6832,13664, 6840,30048, 
-    6856,19808, 6864,11616, 6872,28000, 6880,7520, 6888,23904, 6896,15712, 
-    6904,32096, 6920,17248, 6928,9056, 6936,25440, 6952,21344, 6960,13152, 
-    6968,29536, 6984,19296, 6992,11104, 7000,27488, 7016,23392, 7024,15200, 
-    7032,31584, 7048,18272, 7056,10080, 7064,26464, 7080,22368, 7088,14176, 
-    7096,30560, 7112,20320, 7120,12128, 7128,28512, 7136,8032, 7144,24416, 
-    7152,16224, 7160,32608, 7176,16608, 7184,8416, 7192,24800, 7208,20704, 
-    7216,12512, 7224,28896, 7240,18656, 7248,10464, 7256,26848, 7272,22752, 
-    7280,14560, 7288,30944, 7304,17632, 7312,9440, 7320,25824, 7336,21728, 
-    7344,13536, 7352,29920, 7368,19680, 7376,11488, 7384,27872, 7400,23776, 
-    7408,15584, 7416,31968, 7432,17120, 7440,8928, 7448,25312, 7464,21216, 
-    7472,13024, 7480,29408, 7496,19168, 7504,10976, 7512,27360, 7528,23264, 
-    7536,15072, 7544,31456, 7560,18144, 7568,9952, 7576,26336, 7592,22240, 
-    7600,14048, 7608,30432, 7624,20192, 7632,12000, 7640,28384, 7648,7904, 
-    7656,24288, 7664,16096, 7672,32480, 7688,16864, 7696,8672, 7704,25056, 
-    7720,20960, 7728,12768, 7736,29152, 7752,18912, 7760,10720, 7768,27104, 
-    7784,23008, 7792,14816, 7800,31200, 7816,17888, 7824,9696, 7832,26080, 
-    7848,21984, 7856,13792, 7864,30176, 7880,19936, 7888,11744, 7896,28128, 
-    7912,24032, 7920,15840, 7928,32224, 7944,17376, 7952,9184, 7960,25568, 
-    7976,21472, 7984,13280, 7992,29664, 8008,19424, 8016,11232, 8024,27616, 
-    8040,23520, 8048,15328, 8056,31712, 8072,18400, 8080,10208, 8088,26592, 
-    8104,22496, 8112,14304, 8120,30688, 8136,20448, 8144,12256, 8152,28640, 
-    8168,24544, 8176,16352, 8184,32736, 8200,16400, 8216,24592, 8232,20496, 
-    8240,12304, 8248,28688, 8264,18448, 8272,10256, 8280,26640, 8296,22544, 
-    8304,14352, 8312,30736, 8328,17424, 8336,9232, 8344,25616, 8360,21520, 
-    8368,13328, 8376,29712, 8392,19472, 8400,11280, 8408,27664, 8424,23568, 
-    8432,15376, 8440,31760, 8456,16912, 8464,8720, 8472,25104, 8488,21008, 
-    8496,12816, 8504,29200, 8520,18960, 8528,10768, 8536,27152, 8552,23056, 
-    8560,14864, 8568,31248, 8584,17936, 8592,9744, 8600,26128, 8616,22032, 
-    8624,13840, 8632,30224, 8648,19984, 8656,11792, 8664,28176, 8680,24080, 
-    8688,15888, 8696,32272, 8712,16656, 8728,24848, 8744,20752, 8752,12560, 
-    8760,28944, 8776,18704, 8784,10512, 8792,26896, 8808,22800, 8816,14608, 
-    8824,30992, 8840,17680, 8848,9488, 8856,25872, 8872,21776, 8880,13584, 
-    8888,29968, 8904,19728, 8912,11536, 8920,27920, 8936,23824, 8944,15632, 
-    8952,32016, 8968,17168, 8984,25360, 9000,21264, 9008,13072, 9016,29456, 
-    9032,19216, 9040,11024, 9048,27408, 9064,23312, 9072,15120, 9080,31504, 
-    9096,18192, 9104,10000, 9112,26384, 9128,22288, 9136,14096, 9144,30480, 
-    9160,20240, 9168,12048, 9176,28432, 9192,24336, 9200,16144, 9208,32528, 
-    9224,16528, 9240,24720, 9256,20624, 9264,12432, 9272,28816, 9288,18576, 
-    9296,10384, 9304,26768, 9320,22672, 9328,14480, 9336,30864, 9352,17552, 
-    9368,25744, 9384,21648, 9392,13456, 9400,29840, 9416,19600, 9424,11408, 
-    9432,27792, 9448,23696, 9456,15504, 9464,31888, 9480,17040, 9496,25232, 
-    9512,21136, 9520,12944, 9528,29328, 9544,19088, 9552,10896, 9560,27280, 
-    9576,23184, 9584,14992, 9592,31376, 9608,18064, 9616,9872, 9624,26256, 
-    9640,22160, 9648,13968, 9656,30352, 9672,20112, 9680,11920, 9688,28304, 
-    9704,24208, 9712,16016, 9720,32400, 9736,16784, 9752,24976, 9768,20880, 
-    9776,12688, 9784,29072, 9800,18832, 9808,10640, 9816,27024, 9832,22928, 
-    9840,14736, 9848,31120, 9864,17808, 9880,26000, 9896,21904, 9904,13712, 
-    9912,30096, 9928,19856, 9936,11664, 9944,28048, 9960,23952, 9968,15760, 
-    9976,32144, 9992,17296, 10008,25488, 10024,21392, 10032,13200, 10040,29584, 
-    10056,19344, 10064,11152, 10072,27536, 10088,23440, 10096,15248, 10104,31632, 
-    10120,18320, 10136,26512, 10152,22416, 10160,14224, 10168,30608, 10184,20368, 
-    10192,12176, 10200,28560, 10216,24464, 10224,16272, 10232,32656, 10248,16464, 
-    10264,24656, 10280,20560, 10288,12368, 10296,28752, 10312,18512, 10328,26704, 
-    10344,22608, 10352,14416, 10360,30800, 10376,17488, 10392,25680, 10408,21584, 
-    10416,13392, 10424,29776, 10440,19536, 10448,11344, 10456,27728, 10472,23632, 
-    10480,15440, 10488,31824, 10504,16976, 10520,25168, 10536,21072, 10544,12880, 
-    10552,29264, 10568,19024, 10576,10832, 10584,27216, 10600,23120, 10608,14928, 
-    10616,31312, 10632,18000, 10648,26192, 10664,22096, 10672,13904, 10680,30288, 
-    10696,20048, 10704,11856, 10712,28240, 10728,24144, 10736,15952, 10744,32336, 
-    10760,16720, 10776,24912, 10792,20816, 10800,12624, 10808,29008, 10824,18768, 
-    10840,26960, 10856,22864, 10864,14672, 10872,31056, 10888,17744, 10904,25936, 
-    10920,21840, 10928,13648, 10936,30032, 10952,19792, 10960,11600, 10968,27984, 
-    10984,23888, 10992,15696, 11000,32080, 11016,17232, 11032,25424, 11048,21328, 
-    11056,13136, 11064,29520, 11080,19280, 11096,27472, 11112,23376, 11120,15184, 
-    11128,31568, 11144,18256, 11160,26448, 11176,22352, 11184,14160, 11192,30544, 
-    11208,20304, 11216,12112, 11224,28496, 11240,24400, 11248,16208, 11256,32592, 
-    11272,16592, 11288,24784, 11304,20688, 11312,12496, 11320,28880, 11336,18640, 
-    11352,26832, 11368,22736, 11376,14544, 11384,30928, 11400,17616, 11416,25808, 
-    11432,21712, 11440,13520, 11448,29904, 11464,19664, 11480,27856, 11496,23760, 
-    11504,15568, 11512,31952, 11528,17104, 11544,25296, 11560,21200, 11568,13008, 
-    11576,29392, 11592,19152, 11608,27344, 11624,23248, 11632,15056, 11640,31440, 
-    11656,18128, 11672,26320, 11688,22224, 11696,14032, 11704,30416, 11720,20176, 
-    11728,11984, 11736,28368, 11752,24272, 11760,16080, 11768,32464, 11784,16848, 
-    11800,25040, 11816,20944, 11824,12752, 11832,29136, 11848,18896, 11864,27088, 
-    11880,22992, 11888,14800, 11896,31184, 11912,17872, 11928,26064, 11944,21968, 
-    11952,13776, 11960,30160, 11976,19920, 11992,28112, 12008,24016, 12016,15824, 
-    12024,32208, 12040,17360, 12056,25552, 12072,21456, 12080,13264, 12088,29648, 
-    12104,19408, 12120,27600, 12136,23504, 12144,15312, 12152,31696, 12168,18384, 
-    12184,26576, 12200,22480, 12208,14288, 12216,30672, 12232,20432, 12248,28624, 
-    12264,24528, 12272,16336, 12280,32720, 12296,16432, 12312,24624, 12328,20528, 
-    12344,28720, 12360,18480, 12376,26672, 12392,22576, 12400,14384, 12408,30768, 
-    12424,17456, 12440,25648, 12456,21552, 12464,13360, 12472,29744, 12488,19504, 
-    12504,27696, 12520,23600, 12528,15408, 12536,31792, 12552,16944, 12568,25136, 
-    12584,21040, 12592,12848, 12600,29232, 12616,18992, 12632,27184, 12648,23088, 
-    12656,14896, 12664,31280, 12680,17968, 12696,26160, 12712,22064, 12720,13872, 
-    12728,30256, 12744,20016, 12760,28208, 12776,24112, 12784,15920, 12792,32304, 
-    12808,16688, 12824,24880, 12840,20784, 12856,28976, 12872,18736, 12888,26928, 
-    12904,22832, 12912,14640, 12920,31024, 12936,17712, 12952,25904, 12968,21808, 
-    12976,13616, 12984,30000, 13000,19760, 13016,27952, 13032,23856, 13040,15664, 
-    13048,32048, 13064,17200, 13080,25392, 13096,21296, 13112,29488, 13128,19248, 
-    13144,27440, 13160,23344, 13168,15152, 13176,31536, 13192,18224, 13208,26416, 
-    13224,22320, 13232,14128, 13240,30512, 13256,20272, 13272,28464, 13288,24368, 
-    13296,16176, 13304,32560, 13320,16560, 13336,24752, 13352,20656, 13368,28848, 
-    13384,18608, 13400,26800, 13416,22704, 13424,14512, 13432,30896, 13448,17584, 
-    13464,25776, 13480,21680, 13496,29872, 13512,19632, 13528,27824, 13544,23728, 
-    13552,15536, 13560,31920, 13576,17072, 13592,25264, 13608,21168, 13624,29360, 
-    13640,19120, 13656,27312, 13672,23216, 13680,15024, 13688,31408, 13704,18096, 
-    13720,26288, 13736,22192, 13744,14000, 13752,30384, 13768,20144, 13784,28336, 
-    13800,24240, 13808,16048, 13816,32432, 13832,16816, 13848,25008, 13864,20912, 
-    13880,29104, 13896,18864, 13912,27056, 13928,22960, 13936,14768, 13944,31152, 
-    13960,17840, 13976,26032, 13992,21936, 14008,30128, 14024,19888, 14040,28080, 
-    14056,23984, 14064,15792, 14072,32176, 14088,17328, 14104,25520, 14120,21424, 
-    14136,29616, 14152,19376, 14168,27568, 14184,23472, 14192,15280, 14200,31664, 
-    14216,18352, 14232,26544, 14248,22448, 14264,30640, 14280,20400, 14296,28592, 
-    14312,24496, 14320,16304, 14328,32688, 14344,16496, 14360,24688, 14376,20592, 
-    14392,28784, 14408,18544, 14424,26736, 14440,22640, 14456,30832, 14472,17520, 
-    14488,25712, 14504,21616, 14520,29808, 14536,19568, 14552,27760, 14568,23664, 
-    14576,15472, 14584,31856, 14600,17008, 14616,25200, 14632,21104, 14648,29296, 
-    14664,19056, 14680,27248, 14696,23152, 14704,14960, 14712,31344, 14728,18032, 
-    14744,26224, 14760,22128, 14776,30320, 14792,20080, 14808,28272, 14824,24176, 
-    14832,15984, 14840,32368, 14856,16752, 14872,24944, 14888,20848, 14904,29040, 
-    14920,18800, 14936,26992, 14952,22896, 14968,31088, 14984,17776, 15000,25968, 
-    15016,21872, 15032,30064, 15048,19824, 15064,28016, 15080,23920, 15088,15728, 
-    15096,32112, 15112,17264, 15128,25456, 15144,21360, 15160,29552, 15176,19312, 
-    15192,27504, 15208,23408, 15224,31600, 15240,18288, 15256,26480, 15272,22384, 
-    15288,30576, 15304,20336, 15320,28528, 15336,24432, 15344,16240, 15352,32624, 
-    15368,16624, 15384,24816, 15400,20720, 15416,28912, 15432,18672, 15448,26864, 
-    15464,22768, 15480,30960, 15496,17648, 15512,25840, 15528,21744, 15544,29936, 
-    15560,19696, 15576,27888, 15592,23792, 15608,31984, 15624,17136, 15640,25328, 
-    15656,21232, 15672,29424, 15688,19184, 15704,27376, 15720,23280, 15736,31472, 
-    15752,18160, 15768,26352, 15784,22256, 15800,30448, 15816,20208, 15832,28400, 
-    15848,24304, 15856,16112, 15864,32496, 15880,16880, 15896,25072, 15912,20976, 
-    15928,29168, 15944,18928, 15960,27120, 15976,23024, 15992,31216, 16008,17904, 
-    16024,26096, 16040,22000, 16056,30192, 16072,19952, 16088,28144, 16104,24048, 
-    16120,32240, 16136,17392, 16152,25584, 16168,21488, 16184,29680, 16200,19440, 
-    16216,27632, 16232,23536, 16248,31728, 16264,18416, 16280,26608, 16296,22512, 
-    16312,30704, 16328,20464, 16344,28656, 16360,24560, 16376,32752, 16408,24584, 
-    16424,20488, 16440,28680, 16456,18440, 16472,26632, 16488,22536, 16504,30728, 
-    16520,17416, 16536,25608, 16552,21512, 16568,29704, 16584,19464, 16600,27656, 
-    16616,23560, 16632,31752, 16648,16904, 16664,25096, 16680,21000, 16696,29192, 
-    16712,18952, 16728,27144, 16744,23048, 16760,31240, 16776,17928, 16792,26120, 
-    16808,22024, 16824,30216, 16840,19976, 16856,28168, 16872,24072, 16888,32264, 
-    16920,24840, 16936,20744, 16952,28936, 16968,18696, 16984,26888, 17000,22792, 
-    17016,30984, 17032,17672, 17048,25864, 17064,21768, 17080,29960, 17096,19720, 
-    17112,27912, 17128,23816, 17144,32008, 17176,25352, 17192,21256, 17208,29448, 
-    17224,19208, 17240,27400, 17256,23304, 17272,31496, 17288,18184, 17304,26376, 
-    17320,22280, 17336,30472, 17352,20232, 17368,28424, 17384,24328, 17400,32520, 
-    17432,24712, 17448,20616, 17464,28808, 17480,18568, 17496,26760, 17512,22664, 
-    17528,30856, 17560,25736, 17576,21640, 17592,29832, 17608,19592, 17624,27784, 
-    17640,23688, 17656,31880, 17688,25224, 17704,21128, 17720,29320, 17736,19080, 
-    17752,27272, 17768,23176, 17784,31368, 17800,18056, 17816,26248, 17832,22152, 
-    17848,30344, 17864,20104, 17880,28296, 17896,24200, 17912,32392, 17944,24968, 
-    17960,20872, 17976,29064, 17992,18824, 18008,27016, 18024,22920, 18040,31112, 
-    18072,25992, 18088,21896, 18104,30088, 18120,19848, 18136,28040, 18152,23944, 
-    18168,32136, 18200,25480, 18216,21384, 18232,29576, 18248,19336, 18264,27528, 
-    18280,23432, 18296,31624, 18328,26504, 18344,22408, 18360,30600, 18376,20360, 
-    18392,28552, 18408,24456, 18424,32648, 18456,24648, 18472,20552, 18488,28744, 
-    18520,26696, 18536,22600, 18552,30792, 18584,25672, 18600,21576, 18616,29768, 
-    18632,19528, 18648,27720, 18664,23624, 18680,31816, 18712,25160, 18728,21064, 
-    18744,29256, 18760,19016, 18776,27208, 18792,23112, 18808,31304, 18840,26184, 
-    18856,22088, 18872,30280, 18888,20040, 18904,28232, 18920,24136, 18936,32328, 
-    18968,24904, 18984,20808, 19000,29000, 19032,26952, 19048,22856, 19064,31048, 
-    19096,25928, 19112,21832, 19128,30024, 19144,19784, 19160,27976, 19176,23880, 
-    19192,32072, 19224,25416, 19240,21320, 19256,29512, 19288,27464, 19304,23368, 
-    19320,31560, 19352,26440, 19368,22344, 19384,30536, 19400,20296, 19416,28488, 
-    19432,24392, 19448,32584, 19480,24776, 19496,20680, 19512,28872, 19544,26824, 
-    19560,22728, 19576,30920, 19608,25800, 19624,21704, 19640,29896, 19672,27848, 
-    19688,23752, 19704,31944, 19736,25288, 19752,21192, 19768,29384, 19800,27336, 
-    19816,23240, 19832,31432, 19864,26312, 19880,22216, 19896,30408, 19912,20168, 
-    19928,28360, 19944,24264, 19960,32456, 19992,25032, 20008,20936, 20024,29128, 
-    20056,27080, 20072,22984, 20088,31176, 20120,26056, 20136,21960, 20152,30152, 
-    20184,28104, 20200,24008, 20216,32200, 20248,25544, 20264,21448, 20280,29640, 
-    20312,27592, 20328,23496, 20344,31688, 20376,26568, 20392,22472, 20408,30664, 
-    20440,28616, 20456,24520, 20472,32712, 20504,24616, 20536,28712, 20568,26664, 
-    20584,22568, 20600,30760, 20632,25640, 20648,21544, 20664,29736, 20696,27688, 
-    20712,23592, 20728,31784, 20760,25128, 20776,21032, 20792,29224, 20824,27176, 
-    20840,23080, 20856,31272, 20888,26152, 20904,22056, 20920,30248, 20952,28200, 
-    20968,24104, 20984,32296, 21016,24872, 21048,28968, 21080,26920, 21096,22824, 
-    21112,31016, 21144,25896, 21160,21800, 21176,29992, 21208,27944, 21224,23848, 
-    21240,32040, 21272,25384, 21304,29480, 21336,27432, 21352,23336, 21368,31528, 
-    21400,26408, 21416,22312, 21432,30504, 21464,28456, 21480,24360, 21496,32552, 
-    21528,24744, 21560,28840, 21592,26792, 21608,22696, 21624,30888, 21656,25768, 
-    21688,29864, 21720,27816, 21736,23720, 21752,31912, 21784,25256, 21816,29352, 
-    21848,27304, 21864,23208, 21880,31400, 21912,26280, 21928,22184, 21944,30376, 
-    21976,28328, 21992,24232, 22008,32424, 22040,25000, 22072,29096, 22104,27048, 
-    22120,22952, 22136,31144, 22168,26024, 22200,30120, 22232,28072, 22248,23976, 
-    22264,32168, 22296,25512, 22328,29608, 22360,27560, 22376,23464, 22392,31656, 
-    22424,26536, 22456,30632, 22488,28584, 22504,24488, 22520,32680, 22552,24680, 
-    22584,28776, 22616,26728, 22648,30824, 22680,25704, 22712,29800, 22744,27752, 
-    22760,23656, 22776,31848, 22808,25192, 22840,29288, 22872,27240, 22888,23144, 
-    22904,31336, 22936,26216, 22968,30312, 23000,28264, 23016,24168, 23032,32360, 
-    23064,24936, 23096,29032, 23128,26984, 23160,31080, 23192,25960, 23224,30056, 
-    23256,28008, 23272,23912, 23288,32104, 23320,25448, 23352,29544, 23384,27496, 
-    23416,31592, 23448,26472, 23480,30568, 23512,28520, 23528,24424, 23544,32616, 
-    23576,24808, 23608,28904, 23640,26856, 23672,30952, 23704,25832, 23736,29928, 
-    23768,27880, 23800,31976, 23832,25320, 23864,29416, 23896,27368, 23928,31464, 
-    23960,26344, 23992,30440, 24024,28392, 24040,24296, 24056,32488, 24088,25064, 
-    24120,29160, 24152,27112, 24184,31208, 24216,26088, 24248,30184, 24280,28136, 
-    24312,32232, 24344,25576, 24376,29672, 24408,27624, 24440,31720, 24472,26600, 
-    24504,30696, 24536,28648, 24568,32744, 24632,28696, 24664,26648, 24696,30744, 
-    24728,25624, 24760,29720, 24792,27672, 24824,31768, 24856,25112, 24888,29208, 
-    24920,27160, 24952,31256, 24984,26136, 25016,30232, 25048,28184, 25080,32280, 
-    25144,28952, 25176,26904, 25208,31000, 25240,25880, 25272,29976, 25304,27928, 
-    25336,32024, 25400,29464, 25432,27416, 25464,31512, 25496,26392, 25528,30488, 
-    25560,28440, 25592,32536, 25656,28824, 25688,26776, 25720,30872, 25784,29848, 
-    25816,27800, 25848,31896, 25912,29336, 25944,27288, 25976,31384, 26008,26264, 
-    26040,30360, 26072,28312, 26104,32408, 26168,29080, 26200,27032, 26232,31128, 
-    26296,30104, 26328,28056, 26360,32152, 26424,29592, 26456,27544, 26488,31640, 
-    26552,30616, 26584,28568, 26616,32664, 26680,28760, 26744,30808, 26808,29784, 
-    26840,27736, 26872,31832, 26936,29272, 26968,27224, 27000,31320, 27064,30296, 
-    27096,28248, 27128,32344, 27192,29016, 27256,31064, 27320,30040, 27352,27992, 
-    27384,32088, 27448,29528, 27512,31576, 27576,30552, 27608,28504, 27640,32600, 
-    27704,28888, 27768,30936, 27832,29912, 27896,31960, 27960,29400, 28024,31448, 
-    28088,30424, 28120,28376, 28152,32472, 28216,29144, 28280,31192, 28344,30168, 
-    28408,32216, 28472,29656, 28536,31704, 28600,30680, 28664,32728, 28792,30776, 
-    28856,29752, 28920,31800, 28984,29240, 29048,31288, 29112,30264, 29176,32312, 
-    29304,31032, 29368,30008, 29432,32056, 29560,31544, 29624,30520, 29688,32568, 
-    29816,30904, 29944,31928, 30072,31416, 30136,30392, 30200,32440, 30328,31160, 
-    30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376, 
-    31480,32120, 31736,32632, 32248,32504 
-};
-
-/**    
-* \par    
-* Example code for Floating-point RFFT Twiddle factors Generation:    
-* \par    
-* 
TW = exp(2*pi*i*[0:L/2-1]/L - pi/2*i).' 
    
-* \par    
-* Real and Imag values are in interleaved fashion    
-*/
-const float32_t twiddleCoef_rfft_32[32] = {
-0.0f			,	1.0f			,
-0.195090322f	,	0.98078528f 	,
-0.382683432f	,	0.923879533f	,
-0.555570233f	,	0.831469612f	,
-0.707106781f	,	0.707106781f	,
-0.831469612f	,	0.555570233f	,
-0.923879533f	,	0.382683432f    ,	
-0.98078528f		,	0.195090322f	,
-1.0f			,	0.0f			,
-0.98078528f		,	-0.195090322f	,
-0.923879533f	,	-0.382683432f	,
-0.831469612f	,	-0.555570233f	,
-0.707106781f	,	-0.707106781f	,
-0.555570233f	,	-0.831469612f	,
-0.382683432f	,	-0.923879533f	,
-0.195090322f	,	-0.98078528f	
-};
-
-const float32_t twiddleCoef_rfft_64[64] = {
-0.0f,	1.0f,
-0.098017140329561f,	0.995184726672197f,
-0.195090322016128f,	0.98078528040323f,
-0.290284677254462f,	0.956940335732209f,
-0.38268343236509f,	0.923879532511287f,
-0.471396736825998f,	0.881921264348355f,
-0.555570233019602f,	0.831469612302545f,
-0.634393284163645f,	0.773010453362737f,
-0.707106781186547f,	0.707106781186548f,
-0.773010453362737f,	0.634393284163645f,
-0.831469612302545f,	0.555570233019602f,
-0.881921264348355f,	0.471396736825998f,
-0.923879532511287f,	0.38268343236509f,
-0.956940335732209f,	0.290284677254462f,
-0.98078528040323f,	0.195090322016128f,
-0.995184726672197f,	0.098017140329561f,
-1.0f,	0.0f,
-0.995184726672197f,	-0.098017140329561f,
-0.98078528040323f,	-0.195090322016128f,
-0.956940335732209f,	-0.290284677254462f,
-0.923879532511287f,	-0.38268343236509f,
-0.881921264348355f,	-0.471396736825998f,
-0.831469612302545f,	-0.555570233019602f,
-0.773010453362737f,	-0.634393284163645f,
-0.707106781186548f,	-0.707106781186547f,
-0.634393284163645f,	-0.773010453362737f,
-0.555570233019602f,	-0.831469612302545f,
-0.471396736825998f,	-0.881921264348355f,
-0.38268343236509f,	-0.923879532511287f,
-0.290284677254462f,	-0.956940335732209f,
-0.195090322016129f,	-0.98078528040323f,
-0.098017140329561f,	-0.995184726672197f
-};
-
-const float32_t twiddleCoef_rfft_128[128] = {
-    0.000000000f,  1.000000000f,
-    0.049067674f,  0.998795456f,
-    0.098017140f,  0.995184727f,
-    0.146730474f,  0.989176510f,
-    0.195090322f,  0.980785280f,
-    0.242980180f,  0.970031253f,
-    0.290284677f,  0.956940336f,
-    0.336889853f,  0.941544065f,
-    0.382683432f,  0.923879533f,
-    0.427555093f,  0.903989293f,
-    0.471396737f,  0.881921264f,
-    0.514102744f,  0.857728610f,
-    0.555570233f,  0.831469612f,
-    0.595699304f,  0.803207531f,
-    0.634393284f,  0.773010453f,
-    0.671558955f,  0.740951125f,
-    0.707106781f,  0.707106781f,
-    0.740951125f,  0.671558955f,
-    0.773010453f,  0.634393284f,
-    0.803207531f,  0.595699304f,
-    0.831469612f,  0.555570233f,
-    0.857728610f,  0.514102744f,
-    0.881921264f,  0.471396737f,
-    0.903989293f,  0.427555093f,
-    0.923879533f,  0.382683432f,
-    0.941544065f,  0.336889853f,
-    0.956940336f,  0.290284677f,
-    0.970031253f,  0.242980180f,
-    0.980785280f,  0.195090322f,
-    0.989176510f,  0.146730474f,
-    0.995184727f,  0.098017140f,
-    0.998795456f,  0.049067674f,
-    1.000000000f,  0.000000000f,
-    0.998795456f, -0.049067674f,
-    0.995184727f, -0.098017140f,
-    0.989176510f, -0.146730474f,
-    0.980785280f, -0.195090322f,
-    0.970031253f, -0.242980180f,
-    0.956940336f, -0.290284677f,
-    0.941544065f, -0.336889853f,
-    0.923879533f, -0.382683432f,
-    0.903989293f, -0.427555093f,
-    0.881921264f, -0.471396737f,
-    0.857728610f, -0.514102744f,
-    0.831469612f, -0.555570233f,
-    0.803207531f, -0.595699304f,
-    0.773010453f, -0.634393284f,
-    0.740951125f, -0.671558955f,
-    0.707106781f, -0.707106781f,
-    0.671558955f, -0.740951125f,
-    0.634393284f, -0.773010453f,
-    0.595699304f, -0.803207531f,
-    0.555570233f, -0.831469612f,
-    0.514102744f, -0.857728610f,
-    0.471396737f, -0.881921264f,
-    0.427555093f, -0.903989293f,
-    0.382683432f, -0.923879533f,
-    0.336889853f, -0.941544065f,
-    0.290284677f, -0.956940336f,
-    0.242980180f, -0.970031253f,
-    0.195090322f, -0.980785280f,
-    0.146730474f, -0.989176510f,
-    0.098017140f, -0.995184727f,
-    0.049067674f, -0.998795456f
-};
-
-const float32_t twiddleCoef_rfft_256[256] = {
-    0.000000000f,  1.000000000f,
-    0.024541229f,  0.999698819f,
-    0.049067674f,  0.998795456f,
-    0.073564564f,  0.997290457f,
-    0.098017140f,  0.995184727f,
-    0.122410675f,  0.992479535f,
-    0.146730474f,  0.989176510f,
-    0.170961889f,  0.985277642f,
-    0.195090322f,  0.980785280f,
-    0.219101240f,  0.975702130f,
-    0.242980180f,  0.970031253f,
-    0.266712757f,  0.963776066f,
-    0.290284677f,  0.956940336f,
-    0.313681740f,  0.949528181f,
-    0.336889853f,  0.941544065f,
-    0.359895037f,  0.932992799f,
-    0.382683432f,  0.923879533f,
-    0.405241314f,  0.914209756f,
-    0.427555093f,  0.903989293f,
-    0.449611330f,  0.893224301f,
-    0.471396737f,  0.881921264f,
-    0.492898192f,  0.870086991f,
-    0.514102744f,  0.857728610f,
-    0.534997620f,  0.844853565f,
-    0.555570233f,  0.831469612f,
-    0.575808191f,  0.817584813f,
-    0.595699304f,  0.803207531f,
-    0.615231591f,  0.788346428f,
-    0.634393284f,  0.773010453f,
-    0.653172843f,  0.757208847f,
-    0.671558955f,  0.740951125f,
-    0.689540545f,  0.724247083f,
-    0.707106781f,  0.707106781f,
-    0.724247083f,  0.689540545f,
-    0.740951125f,  0.671558955f,
-    0.757208847f,  0.653172843f,
-    0.773010453f,  0.634393284f,
-    0.788346428f,  0.615231591f,
-    0.803207531f,  0.595699304f,
-    0.817584813f,  0.575808191f,
-    0.831469612f,  0.555570233f,
-    0.844853565f,  0.534997620f,
-    0.857728610f,  0.514102744f,
-    0.870086991f,  0.492898192f,
-    0.881921264f,  0.471396737f,
-    0.893224301f,  0.449611330f,
-    0.903989293f,  0.427555093f,
-    0.914209756f,  0.405241314f,
-    0.923879533f,  0.382683432f,
-    0.932992799f,  0.359895037f,
-    0.941544065f,  0.336889853f,
-    0.949528181f,  0.313681740f,
-    0.956940336f,  0.290284677f,
-    0.963776066f,  0.266712757f,
-    0.970031253f,  0.242980180f,
-    0.975702130f,  0.219101240f,
-    0.980785280f,  0.195090322f,
-    0.985277642f,  0.170961889f,
-    0.989176510f,  0.146730474f,
-    0.992479535f,  0.122410675f,
-    0.995184727f,  0.098017140f,
-    0.997290457f,  0.073564564f,
-    0.998795456f,  0.049067674f,
-    0.999698819f,  0.024541229f,
-    1.000000000f,  0.000000000f,
-    0.999698819f, -0.024541229f,
-    0.998795456f, -0.049067674f,
-    0.997290457f, -0.073564564f,
-    0.995184727f, -0.098017140f,
-    0.992479535f, -0.122410675f,
-    0.989176510f, -0.146730474f,
-    0.985277642f, -0.170961889f,
-    0.980785280f, -0.195090322f,
-    0.975702130f, -0.219101240f,
-    0.970031253f, -0.242980180f,
-    0.963776066f, -0.266712757f,
-    0.956940336f, -0.290284677f,
-    0.949528181f, -0.313681740f,
-    0.941544065f, -0.336889853f,
-    0.932992799f, -0.359895037f,
-    0.923879533f, -0.382683432f,
-    0.914209756f, -0.405241314f,
-    0.903989293f, -0.427555093f,
-    0.893224301f, -0.449611330f,
-    0.881921264f, -0.471396737f,
-    0.870086991f, -0.492898192f,
-    0.857728610f, -0.514102744f,
-    0.844853565f, -0.534997620f,
-    0.831469612f, -0.555570233f,
-    0.817584813f, -0.575808191f,
-    0.803207531f, -0.595699304f,
-    0.788346428f, -0.615231591f,
-    0.773010453f, -0.634393284f,
-    0.757208847f, -0.653172843f,
-    0.740951125f, -0.671558955f,
-    0.724247083f, -0.689540545f,
-    0.707106781f, -0.707106781f,
-    0.689540545f, -0.724247083f,
-    0.671558955f, -0.740951125f,
-    0.653172843f, -0.757208847f,
-    0.634393284f, -0.773010453f,
-    0.615231591f, -0.788346428f,
-    0.595699304f, -0.803207531f,
-    0.575808191f, -0.817584813f,
-    0.555570233f, -0.831469612f,
-    0.534997620f, -0.844853565f,
-    0.514102744f, -0.857728610f,
-    0.492898192f, -0.870086991f,
-    0.471396737f, -0.881921264f,
-    0.449611330f, -0.893224301f,
-    0.427555093f, -0.903989293f,
-    0.405241314f, -0.914209756f,
-    0.382683432f, -0.923879533f,
-    0.359895037f, -0.932992799f,
-    0.336889853f, -0.941544065f,
-    0.313681740f, -0.949528181f,
-    0.290284677f, -0.956940336f,
-    0.266712757f, -0.963776066f,
-    0.242980180f, -0.970031253f,
-    0.219101240f, -0.975702130f,
-    0.195090322f, -0.980785280f,
-    0.170961889f, -0.985277642f,
-    0.146730474f, -0.989176510f,
-    0.122410675f, -0.992479535f,
-    0.098017140f, -0.995184727f,
-    0.073564564f, -0.997290457f,
-    0.049067674f, -0.998795456f,
-    0.024541229f, -0.999698819f
-};
-
-const float32_t twiddleCoef_rfft_512[512] = {
-    0.000000000f,  1.000000000f,
-    0.012271538f,  0.999924702f,
-    0.024541229f,  0.999698819f,
-    0.036807223f,  0.999322385f,
-    0.049067674f,  0.998795456f,
-    0.061320736f,  0.998118113f,
-    0.073564564f,  0.997290457f,
-    0.085797312f,  0.996312612f,
-    0.098017140f,  0.995184727f,
-    0.110222207f,  0.993906970f,
-    0.122410675f,  0.992479535f,
-    0.134580709f,  0.990902635f,
-    0.146730474f,  0.989176510f,
-    0.158858143f,  0.987301418f,
-    0.170961889f,  0.985277642f,
-    0.183039888f,  0.983105487f,
-    0.195090322f,  0.980785280f,
-    0.207111376f,  0.978317371f,
-    0.219101240f,  0.975702130f,
-    0.231058108f,  0.972939952f,
-    0.242980180f,  0.970031253f,
-    0.254865660f,  0.966976471f,
-    0.266712757f,  0.963776066f,
-    0.278519689f,  0.960430519f,
-    0.290284677f,  0.956940336f,
-    0.302005949f,  0.953306040f,
-    0.313681740f,  0.949528181f,
-    0.325310292f,  0.945607325f,
-    0.336889853f,  0.941544065f,
-    0.348418680f,  0.937339012f,
-    0.359895037f,  0.932992799f,
-    0.371317194f,  0.928506080f,
-    0.382683432f,  0.923879533f,
-    0.393992040f,  0.919113852f,
-    0.405241314f,  0.914209756f,
-    0.416429560f,  0.909167983f,
-    0.427555093f,  0.903989293f,
-    0.438616239f,  0.898674466f,
-    0.449611330f,  0.893224301f,
-    0.460538711f,  0.887639620f,
-    0.471396737f,  0.881921264f,
-    0.482183772f,  0.876070094f,
-    0.492898192f,  0.870086991f,
-    0.503538384f,  0.863972856f,
-    0.514102744f,  0.857728610f,
-    0.524589683f,  0.851355193f,
-    0.534997620f,  0.844853565f,
-    0.545324988f,  0.838224706f,
-    0.555570233f,  0.831469612f,
-    0.565731811f,  0.824589303f,
-    0.575808191f,  0.817584813f,
-    0.585797857f,  0.810457198f,
-    0.595699304f,  0.803207531f,
-    0.605511041f,  0.795836905f,
-    0.615231591f,  0.788346428f,
-    0.624859488f,  0.780737229f,
-    0.634393284f,  0.773010453f,
-    0.643831543f,  0.765167266f,
-    0.653172843f,  0.757208847f,
-    0.662415778f,  0.749136395f,
-    0.671558955f,  0.740951125f,
-    0.680600998f,  0.732654272f,
-    0.689540545f,  0.724247083f,
-    0.698376249f,  0.715730825f,
-    0.707106781f,  0.707106781f,
-    0.715730825f,  0.698376249f,
-    0.724247083f,  0.689540545f,
-    0.732654272f,  0.680600998f,
-    0.740951125f,  0.671558955f,
-    0.749136395f,  0.662415778f,
-    0.757208847f,  0.653172843f,
-    0.765167266f,  0.643831543f,
-    0.773010453f,  0.634393284f,
-    0.780737229f,  0.624859488f,
-    0.788346428f,  0.615231591f,
-    0.795836905f,  0.605511041f,
-    0.803207531f,  0.595699304f,
-    0.810457198f,  0.585797857f,
-    0.817584813f,  0.575808191f,
-    0.824589303f,  0.565731811f,
-    0.831469612f,  0.555570233f,
-    0.838224706f,  0.545324988f,
-    0.844853565f,  0.534997620f,
-    0.851355193f,  0.524589683f,
-    0.857728610f,  0.514102744f,
-    0.863972856f,  0.503538384f,
-    0.870086991f,  0.492898192f,
-    0.876070094f,  0.482183772f,
-    0.881921264f,  0.471396737f,
-    0.887639620f,  0.460538711f,
-    0.893224301f,  0.449611330f,
-    0.898674466f,  0.438616239f,
-    0.903989293f,  0.427555093f,
-    0.909167983f,  0.416429560f,
-    0.914209756f,  0.405241314f,
-    0.919113852f,  0.393992040f,
-    0.923879533f,  0.382683432f,
-    0.928506080f,  0.371317194f,
-    0.932992799f,  0.359895037f,
-    0.937339012f,  0.348418680f,
-    0.941544065f,  0.336889853f,
-    0.945607325f,  0.325310292f,
-    0.949528181f,  0.313681740f,
-    0.953306040f,  0.302005949f,
-    0.956940336f,  0.290284677f,
-    0.960430519f,  0.278519689f,
-    0.963776066f,  0.266712757f,
-    0.966976471f,  0.254865660f,
-    0.970031253f,  0.242980180f,
-    0.972939952f,  0.231058108f,
-    0.975702130f,  0.219101240f,
-    0.978317371f,  0.207111376f,
-    0.980785280f,  0.195090322f,
-    0.983105487f,  0.183039888f,
-    0.985277642f,  0.170961889f,
-    0.987301418f,  0.158858143f,
-    0.989176510f,  0.146730474f,
-    0.990902635f,  0.134580709f,
-    0.992479535f,  0.122410675f,
-    0.993906970f,  0.110222207f,
-    0.995184727f,  0.098017140f,
-    0.996312612f,  0.085797312f,
-    0.997290457f,  0.073564564f,
-    0.998118113f,  0.061320736f,
-    0.998795456f,  0.049067674f,
-    0.999322385f,  0.036807223f,
-    0.999698819f,  0.024541229f,
-    0.999924702f,  0.012271538f,
-    1.000000000f,  0.000000000f,
-    0.999924702f, -0.012271538f,
-    0.999698819f, -0.024541229f,
-    0.999322385f, -0.036807223f,
-    0.998795456f, -0.049067674f,
-    0.998118113f, -0.061320736f,
-    0.997290457f, -0.073564564f,
-    0.996312612f, -0.085797312f,
-    0.995184727f, -0.098017140f,
-    0.993906970f, -0.110222207f,
-    0.992479535f, -0.122410675f,
-    0.990902635f, -0.134580709f,
-    0.989176510f, -0.146730474f,
-    0.987301418f, -0.158858143f,
-    0.985277642f, -0.170961889f,
-    0.983105487f, -0.183039888f,
-    0.980785280f, -0.195090322f,
-    0.978317371f, -0.207111376f,
-    0.975702130f, -0.219101240f,
-    0.972939952f, -0.231058108f,
-    0.970031253f, -0.242980180f,
-    0.966976471f, -0.254865660f,
-    0.963776066f, -0.266712757f,
-    0.960430519f, -0.278519689f,
-    0.956940336f, -0.290284677f,
-    0.953306040f, -0.302005949f,
-    0.949528181f, -0.313681740f,
-    0.945607325f, -0.325310292f,
-    0.941544065f, -0.336889853f,
-    0.937339012f, -0.348418680f,
-    0.932992799f, -0.359895037f,
-    0.928506080f, -0.371317194f,
-    0.923879533f, -0.382683432f,
-    0.919113852f, -0.393992040f,
-    0.914209756f, -0.405241314f,
-    0.909167983f, -0.416429560f,
-    0.903989293f, -0.427555093f,
-    0.898674466f, -0.438616239f,
-    0.893224301f, -0.449611330f,
-    0.887639620f, -0.460538711f,
-    0.881921264f, -0.471396737f,
-    0.876070094f, -0.482183772f,
-    0.870086991f, -0.492898192f,
-    0.863972856f, -0.503538384f,
-    0.857728610f, -0.514102744f,
-    0.851355193f, -0.524589683f,
-    0.844853565f, -0.534997620f,
-    0.838224706f, -0.545324988f,
-    0.831469612f, -0.555570233f,
-    0.824589303f, -0.565731811f,
-    0.817584813f, -0.575808191f,
-    0.810457198f, -0.585797857f,
-    0.803207531f, -0.595699304f,
-    0.795836905f, -0.605511041f,
-    0.788346428f, -0.615231591f,
-    0.780737229f, -0.624859488f,
-    0.773010453f, -0.634393284f,
-    0.765167266f, -0.643831543f,
-    0.757208847f, -0.653172843f,
-    0.749136395f, -0.662415778f,
-    0.740951125f, -0.671558955f,
-    0.732654272f, -0.680600998f,
-    0.724247083f, -0.689540545f,
-    0.715730825f, -0.698376249f,
-    0.707106781f, -0.707106781f,
-    0.698376249f, -0.715730825f,
-    0.689540545f, -0.724247083f,
-    0.680600998f, -0.732654272f,
-    0.671558955f, -0.740951125f,
-    0.662415778f, -0.749136395f,
-    0.653172843f, -0.757208847f,
-    0.643831543f, -0.765167266f,
-    0.634393284f, -0.773010453f,
-    0.624859488f, -0.780737229f,
-    0.615231591f, -0.788346428f,
-    0.605511041f, -0.795836905f,
-    0.595699304f, -0.803207531f,
-    0.585797857f, -0.810457198f,
-    0.575808191f, -0.817584813f,
-    0.565731811f, -0.824589303f,
-    0.555570233f, -0.831469612f,
-    0.545324988f, -0.838224706f,
-    0.534997620f, -0.844853565f,
-    0.524589683f, -0.851355193f,
-    0.514102744f, -0.857728610f,
-    0.503538384f, -0.863972856f,
-    0.492898192f, -0.870086991f,
-    0.482183772f, -0.876070094f,
-    0.471396737f, -0.881921264f,
-    0.460538711f, -0.887639620f,
-    0.449611330f, -0.893224301f,
-    0.438616239f, -0.898674466f,
-    0.427555093f, -0.903989293f,
-    0.416429560f, -0.909167983f,
-    0.405241314f, -0.914209756f,
-    0.393992040f, -0.919113852f,
-    0.382683432f, -0.923879533f,
-    0.371317194f, -0.928506080f,
-    0.359895037f, -0.932992799f,
-    0.348418680f, -0.937339012f,
-    0.336889853f, -0.941544065f,
-    0.325310292f, -0.945607325f,
-    0.313681740f, -0.949528181f,
-    0.302005949f, -0.953306040f,
-    0.290284677f, -0.956940336f,
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-    0.024541229f, -0.999698819f,
-    0.012271538f, -0.999924702f
-};
-
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-};
-
-const float32_t twiddleCoef_rfft_4096[4096] = {
-    0.000000000f,  1.000000000f,
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-    0.133060525f, -0.991107914f,
-    0.131540029f, -0.991310860f,
-    0.130019223f, -0.991511473f,
-    0.128498111f, -0.991709754f,
-    0.126976696f, -0.991905700f,
-    0.125454983f, -0.992099313f,
-    0.123932975f, -0.992290591f,
-    0.122410675f, -0.992479535f,
-    0.120888087f, -0.992666142f,
-    0.119365215f, -0.992850414f,
-    0.117842062f, -0.993032350f,
-    0.116318631f, -0.993211949f,
-    0.114794927f, -0.993389211f,
-    0.113270952f, -0.993564136f,
-    0.111746711f, -0.993736722f,
-    0.110222207f, -0.993906970f,
-    0.108697444f, -0.994074879f,
-    0.107172425f, -0.994240449f,
-    0.105647154f, -0.994403680f,
-    0.104121634f, -0.994564571f,
-    0.102595869f, -0.994723121f,
-    0.101069863f, -0.994879331f,
-    0.099543619f, -0.995033199f,
-    0.098017140f, -0.995184727f,
-    0.096490431f, -0.995333912f,
-    0.094963495f, -0.995480755f,
-    0.093436336f, -0.995625256f,
-    0.091908956f, -0.995767414f,
-    0.090381361f, -0.995907229f,
-    0.088853553f, -0.996044701f,
-    0.087325535f, -0.996179829f,
-    0.085797312f, -0.996312612f,
-    0.084268888f, -0.996443051f,
-    0.082740265f, -0.996571146f,
-    0.081211447f, -0.996696895f,
-    0.079682438f, -0.996820299f,
-    0.078153242f, -0.996941358f,
-    0.076623861f, -0.997060070f,
-    0.075094301f, -0.997176437f,
-    0.073564564f, -0.997290457f,
-    0.072034653f, -0.997402130f,
-    0.070504573f, -0.997511456f,
-    0.068974328f, -0.997618435f,
-    0.067443920f, -0.997723067f,
-    0.065913353f, -0.997825350f,
-    0.064382631f, -0.997925286f,
-    0.062851758f, -0.998022874f,
-    0.061320736f, -0.998118113f,
-    0.059789571f, -0.998211003f,
-    0.058258265f, -0.998301545f,
-    0.056726821f, -0.998389737f,
-    0.055195244f, -0.998475581f,
-    0.053663538f, -0.998559074f,
-    0.052131705f, -0.998640218f,
-    0.050599749f, -0.998719012f,
-    0.049067674f, -0.998795456f,
-    0.047535484f, -0.998869550f,
-    0.046003182f, -0.998941293f,
-    0.044470772f, -0.999010686f,
-    0.042938257f, -0.999077728f,
-    0.041405641f, -0.999142419f,
-    0.039872928f, -0.999204759f,
-    0.038340120f, -0.999264747f,
-    0.036807223f, -0.999322385f,
-    0.035274239f, -0.999377670f,
-    0.033741172f, -0.999430605f,
-    0.032208025f, -0.999481187f,
-    0.030674803f, -0.999529418f,
-    0.029141509f, -0.999575296f,
-    0.027608146f, -0.999618822f,
-    0.026074718f, -0.999659997f,
-    0.024541229f, -0.999698819f,
-    0.023007681f, -0.999735288f,
-    0.021474080f, -0.999769405f,
-    0.019940429f, -0.999801170f,
-    0.018406730f, -0.999830582f,
-    0.016872988f, -0.999857641f,
-    0.015339206f, -0.999882347f,
-    0.013805389f, -0.999904701f,
-    0.012271538f, -0.999924702f,
-    0.010737659f, -0.999942350f,
-    0.009203755f, -0.999957645f,
-    0.007669829f, -0.999970586f,
-    0.006135885f, -0.999981175f,
-    0.004601926f, -0.999989411f,
-    0.003067957f, -0.999995294f,
-    0.001533980f, -0.999998823f
-};
-
-
-/**   
- * \par    
- * Example code for the generation of the floating-point sine table:
- * 
- * tableSize = 512;    
- * for(n = 0; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n]=sin(2*pi*n/tableSize);    
- * }
    
- * \par    
- * where pi value is  3.14159265358979    
- */
-
-const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = {
-   0.00000000f, 0.01227154f, 0.02454123f, 0.03680722f, 0.04906767f, 0.06132074f,
-   0.07356456f, 0.08579731f, 0.09801714f, 0.11022221f, 0.12241068f, 0.13458071f,
-   0.14673047f, 0.15885814f, 0.17096189f, 0.18303989f, 0.19509032f, 0.20711138f,
-   0.21910124f, 0.23105811f, 0.24298018f, 0.25486566f, 0.26671276f, 0.27851969f,
-   0.29028468f, 0.30200595f, 0.31368174f, 0.32531029f, 0.33688985f, 0.34841868f,
-   0.35989504f, 0.37131719f, 0.38268343f, 0.39399204f, 0.40524131f, 0.41642956f,
-   0.42755509f, 0.43861624f, 0.44961133f, 0.46053871f, 0.47139674f, 0.48218377f,
-   0.49289819f, 0.50353838f, 0.51410274f, 0.52458968f, 0.53499762f, 0.54532499f,
-   0.55557023f, 0.56573181f, 0.57580819f, 0.58579786f, 0.59569930f, 0.60551104f,
-   0.61523159f, 0.62485949f, 0.63439328f, 0.64383154f, 0.65317284f, 0.66241578f,
-   0.67155895f, 0.68060100f, 0.68954054f, 0.69837625f, 0.70710678f, 0.71573083f,
-   0.72424708f, 0.73265427f, 0.74095113f, 0.74913639f, 0.75720885f, 0.76516727f,
-   0.77301045f, 0.78073723f, 0.78834643f, 0.79583690f, 0.80320753f, 0.81045720f,
-   0.81758481f, 0.82458930f, 0.83146961f, 0.83822471f, 0.84485357f, 0.85135519f,
-   0.85772861f, 0.86397286f, 0.87008699f, 0.87607009f, 0.88192126f, 0.88763962f,
-   0.89322430f, 0.89867447f, 0.90398929f, 0.90916798f, 0.91420976f, 0.91911385f,
-   0.92387953f, 0.92850608f, 0.93299280f, 0.93733901f, 0.94154407f, 0.94560733f,
-   0.94952818f, 0.95330604f, 0.95694034f, 0.96043052f, 0.96377607f, 0.96697647f,
-   0.97003125f, 0.97293995f, 0.97570213f, 0.97831737f, 0.98078528f, 0.98310549f,
-   0.98527764f, 0.98730142f, 0.98917651f, 0.99090264f, 0.99247953f, 0.99390697f,
-   0.99518473f, 0.99631261f, 0.99729046f, 0.99811811f, 0.99879546f, 0.99932238f,
-   0.99969882f, 0.99992470f, 1.00000000f, 0.99992470f, 0.99969882f, 0.99932238f,
-   0.99879546f, 0.99811811f, 0.99729046f, 0.99631261f, 0.99518473f, 0.99390697f,
-   0.99247953f, 0.99090264f, 0.98917651f, 0.98730142f, 0.98527764f, 0.98310549f,
-   0.98078528f, 0.97831737f, 0.97570213f, 0.97293995f, 0.97003125f, 0.96697647f,
-   0.96377607f, 0.96043052f, 0.95694034f, 0.95330604f, 0.94952818f, 0.94560733f,
-   0.94154407f, 0.93733901f, 0.93299280f, 0.92850608f, 0.92387953f, 0.91911385f,
-   0.91420976f, 0.90916798f, 0.90398929f, 0.89867447f, 0.89322430f, 0.88763962f,
-   0.88192126f, 0.87607009f, 0.87008699f, 0.86397286f, 0.85772861f, 0.85135519f,
-   0.84485357f, 0.83822471f, 0.83146961f, 0.82458930f, 0.81758481f, 0.81045720f,
-   0.80320753f, 0.79583690f, 0.78834643f, 0.78073723f, 0.77301045f, 0.76516727f,
-   0.75720885f, 0.74913639f, 0.74095113f, 0.73265427f, 0.72424708f, 0.71573083f,
-   0.70710678f, 0.69837625f, 0.68954054f, 0.68060100f, 0.67155895f, 0.66241578f,
-   0.65317284f, 0.64383154f, 0.63439328f, 0.62485949f, 0.61523159f, 0.60551104f,
-   0.59569930f, 0.58579786f, 0.57580819f, 0.56573181f, 0.55557023f, 0.54532499f,
-   0.53499762f, 0.52458968f, 0.51410274f, 0.50353838f, 0.49289819f, 0.48218377f,
-   0.47139674f, 0.46053871f, 0.44961133f, 0.43861624f, 0.42755509f, 0.41642956f,
-   0.40524131f, 0.39399204f, 0.38268343f, 0.37131719f, 0.35989504f, 0.34841868f,
-   0.33688985f, 0.32531029f, 0.31368174f, 0.30200595f, 0.29028468f, 0.27851969f,
-   0.26671276f, 0.25486566f, 0.24298018f, 0.23105811f, 0.21910124f, 0.20711138f,
-   0.19509032f, 0.18303989f, 0.17096189f, 0.15885814f, 0.14673047f, 0.13458071f,
-   0.12241068f, 0.11022221f, 0.09801714f, 0.08579731f, 0.07356456f, 0.06132074f,
-   0.04906767f, 0.03680722f, 0.02454123f, 0.01227154f, 0.00000000f, -0.01227154f,
-   -0.02454123f, -0.03680722f, -0.04906767f, -0.06132074f, -0.07356456f,
-   -0.08579731f, -0.09801714f, -0.11022221f, -0.12241068f, -0.13458071f,
-   -0.14673047f, -0.15885814f, -0.17096189f, -0.18303989f, -0.19509032f, 
-   -0.20711138f, -0.21910124f, -0.23105811f, -0.24298018f, -0.25486566f, 
-   -0.26671276f, -0.27851969f, -0.29028468f, -0.30200595f, -0.31368174f, 
-   -0.32531029f, -0.33688985f, -0.34841868f, -0.35989504f, -0.37131719f, 
-   -0.38268343f, -0.39399204f, -0.40524131f, -0.41642956f, -0.42755509f, 
-   -0.43861624f, -0.44961133f, -0.46053871f, -0.47139674f, -0.48218377f, 
-   -0.49289819f, -0.50353838f, -0.51410274f, -0.52458968f, -0.53499762f, 
-   -0.54532499f, -0.55557023f, -0.56573181f, -0.57580819f, -0.58579786f, 
-   -0.59569930f, -0.60551104f, -0.61523159f, -0.62485949f, -0.63439328f, 
-   -0.64383154f, -0.65317284f, -0.66241578f, -0.67155895f, -0.68060100f, 
-   -0.68954054f, -0.69837625f, -0.70710678f, -0.71573083f, -0.72424708f, 
-   -0.73265427f, -0.74095113f, -0.74913639f, -0.75720885f, -0.76516727f, 
-   -0.77301045f, -0.78073723f, -0.78834643f, -0.79583690f, -0.80320753f, 
-   -0.81045720f, -0.81758481f, -0.82458930f, -0.83146961f, -0.83822471f, 
-   -0.84485357f, -0.85135519f, -0.85772861f, -0.86397286f, -0.87008699f, 
-   -0.87607009f, -0.88192126f, -0.88763962f, -0.89322430f, -0.89867447f, 
-   -0.90398929f, -0.90916798f, -0.91420976f, -0.91911385f, -0.92387953f, 
-   -0.92850608f, -0.93299280f, -0.93733901f, -0.94154407f, -0.94560733f, 
-   -0.94952818f, -0.95330604f, -0.95694034f, -0.96043052f, -0.96377607f, 
-   -0.96697647f, -0.97003125f, -0.97293995f, -0.97570213f, -0.97831737f, 
-   -0.98078528f, -0.98310549f, -0.98527764f, -0.98730142f, -0.98917651f, 
-   -0.99090264f, -0.99247953f, -0.99390697f, -0.99518473f, -0.99631261f, 
-   -0.99729046f, -0.99811811f, -0.99879546f, -0.99932238f, -0.99969882f, 
-   -0.99992470f, -1.00000000f, -0.99992470f, -0.99969882f, -0.99932238f, 
-   -0.99879546f, -0.99811811f, -0.99729046f, -0.99631261f, -0.99518473f, 
-   -0.99390697f, -0.99247953f, -0.99090264f, -0.98917651f, -0.98730142f, 
-   -0.98527764f, -0.98310549f, -0.98078528f, -0.97831737f, -0.97570213f, 
-   -0.97293995f, -0.97003125f, -0.96697647f, -0.96377607f, -0.96043052f, 
-   -0.95694034f, -0.95330604f, -0.94952818f, -0.94560733f, -0.94154407f, 
-   -0.93733901f, -0.93299280f, -0.92850608f, -0.92387953f, -0.91911385f, 
-   -0.91420976f, -0.90916798f, -0.90398929f, -0.89867447f, -0.89322430f, 
-   -0.88763962f, -0.88192126f, -0.87607009f, -0.87008699f, -0.86397286f, 
-   -0.85772861f, -0.85135519f, -0.84485357f, -0.83822471f, -0.83146961f, 
-   -0.82458930f, -0.81758481f, -0.81045720f, -0.80320753f, -0.79583690f, 
-   -0.78834643f, -0.78073723f, -0.77301045f, -0.76516727f, -0.75720885f, 
-   -0.74913639f, -0.74095113f, -0.73265427f, -0.72424708f, -0.71573083f, 
-   -0.70710678f, -0.69837625f, -0.68954054f, -0.68060100f, -0.67155895f, 
-   -0.66241578f, -0.65317284f, -0.64383154f, -0.63439328f, -0.62485949f, 
-   -0.61523159f, -0.60551104f, -0.59569930f, -0.58579786f, -0.57580819f, 
-   -0.56573181f, -0.55557023f, -0.54532499f, -0.53499762f, -0.52458968f, 
-   -0.51410274f, -0.50353838f, -0.49289819f, -0.48218377f, -0.47139674f, 
-   -0.46053871f, -0.44961133f, -0.43861624f, -0.42755509f, -0.41642956f, 
-   -0.40524131f, -0.39399204f, -0.38268343f, -0.37131719f, -0.35989504f, 
-   -0.34841868f, -0.33688985f, -0.32531029f, -0.31368174f, -0.30200595f, 
-   -0.29028468f, -0.27851969f, -0.26671276f, -0.25486566f, -0.24298018f, 
-   -0.23105811f, -0.21910124f, -0.20711138f, -0.19509032f, -0.18303989f, 
-   -0.17096189f, -0.15885814f, -0.14673047f, -0.13458071f, -0.12241068f, 
-   -0.11022221f, -0.09801714f, -0.08579731f, -0.07356456f, -0.06132074f, 
-   -0.04906767f, -0.03680722f, -0.02454123f, -0.01227154f, -0.00000000f
-};
-
-/**   
- * \par    
- * Table values are in Q31 (1.31 fixed-point format) and generation is done in 
- * three steps.  First,  generate sin values in floating point:    
- * 
- * tableSize = 512;      
- * for(n = 0; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n]= sin(2*pi*n/tableSize);    
- * } 
    
- * where pi value is  3.14159265358979    
- * \par    
- * Second, convert floating-point to Q31 (Fixed point):
- *	(sinTable[i] * pow(2, 31))    
- * \par    
- * Finally, round to the nearest integer value:
- * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
- */
-const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = {
-   0x00000000, 0x01921D20, 0x03242ABF, 0x04B6195D, 0x0647D97C, 0x07D95B9E, 
-   0x096A9049, 0x0AFB6805, 0x0C8BD35E, 0x0E1BC2E4, 0x0FAB272B, 0x1139F0CF, 
-   0x12C8106F, 0x145576B1, 0x15E21445, 0x176DD9DE, 0x18F8B83C, 0x1A82A026, 
-   0x1C0B826A, 0x1D934FE5, 0x1F19F97B, 0x209F701C, 0x2223A4C5, 0x23A6887F, 
-   0x25280C5E, 0x26A82186, 0x2826B928, 0x29A3C485, 0x2B1F34EB, 0x2C98FBBA, 
-   0x2E110A62, 0x2F875262, 0x30FBC54D, 0x326E54C7, 0x33DEF287, 0x354D9057, 
-   0x36BA2014, 0x382493B0, 0x398CDD32, 0x3AF2EEB7, 0x3C56BA70, 0x3DB832A6, 
-   0x3F1749B8, 0x4073F21D, 0x41CE1E65, 0x4325C135, 0x447ACD50, 0x45CD358F, 
-   0x471CECE7, 0x4869E665, 0x49B41533, 0x4AFB6C98, 0x4C3FDFF4, 0x4D8162C4, 
-   0x4EBFE8A5, 0x4FFB654D, 0x5133CC94, 0x5269126E, 0x539B2AF0, 0x54CA0A4B, 
-   0x55F5A4D2, 0x571DEEFA, 0x5842DD54, 0x59646498, 0x5A82799A, 0x5B9D1154, 
-   0x5CB420E0, 0x5DC79D7C, 0x5ED77C8A, 0x5FE3B38D, 0x60EC3830, 0x61F1003F, 
-   0x62F201AC, 0x63EF3290, 0x64E88926, 0x65DDFBD3, 0x66CF8120, 0x67BD0FBD, 
-   0x68A69E81, 0x698C246C, 0x6A6D98A4, 0x6B4AF279, 0x6C242960, 0x6CF934FC, 
-   0x6DCA0D14, 0x6E96A99D, 0x6F5F02B2, 0x7023109A, 0x70E2CBC6, 0x719E2CD2, 
-   0x72552C85, 0x7307C3D0, 0x73B5EBD1, 0x745F9DD1, 0x7504D345, 0x75A585CF, 
-   0x7641AF3D, 0x76D94989, 0x776C4EDB, 0x77FAB989, 0x78848414, 0x7909A92D, 
-   0x798A23B1, 0x7A05EEAD, 0x7A7D055B, 0x7AEF6323, 0x7B5D039E, 0x7BC5E290, 
-   0x7C29FBEE, 0x7C894BDE, 0x7CE3CEB2, 0x7D3980EC, 0x7D8A5F40, 0x7DD6668F, 
-   0x7E1D93EA, 0x7E5FE493, 0x7E9D55FC, 0x7ED5E5C6, 0x7F0991C4, 0x7F3857F6, 
-   0x7F62368F, 0x7F872BF3, 0x7FA736B4, 0x7FC25596, 0x7FD8878E, 0x7FE9CBC0, 
-   0x7FF62182, 0x7FFD885A, 0x7FFFFFFF, 0x7FFD885A, 0x7FF62182, 0x7FE9CBC0, 
-   0x7FD8878E, 0x7FC25596, 0x7FA736B4, 0x7F872BF3, 0x7F62368F, 0x7F3857F6, 
-   0x7F0991C4, 0x7ED5E5C6, 0x7E9D55FC, 0x7E5FE493, 0x7E1D93EA, 0x7DD6668F, 
-   0x7D8A5F40, 0x7D3980EC, 0x7CE3CEB2, 0x7C894BDE, 0x7C29FBEE, 0x7BC5E290, 
-   0x7B5D039E, 0x7AEF6323, 0x7A7D055B, 0x7A05EEAD, 0x798A23B1, 0x7909A92D, 
-   0x78848414, 0x77FAB989, 0x776C4EDB, 0x76D94989, 0x7641AF3D, 0x75A585CF, 
-   0x7504D345, 0x745F9DD1, 0x73B5EBD1, 0x7307C3D0, 0x72552C85, 0x719E2CD2, 
-   0x70E2CBC6, 0x7023109A, 0x6F5F02B2, 0x6E96A99D, 0x6DCA0D14, 0x6CF934FC, 
-   0x6C242960, 0x6B4AF279, 0x6A6D98A4, 0x698C246C, 0x68A69E81, 0x67BD0FBD, 
-   0x66CF8120, 0x65DDFBD3, 0x64E88926, 0x63EF3290, 0x62F201AC, 0x61F1003F, 
-   0x60EC3830, 0x5FE3B38D, 0x5ED77C8A, 0x5DC79D7C, 0x5CB420E0, 0x5B9D1154, 
-   0x5A82799A, 0x59646498, 0x5842DD54, 0x571DEEFA, 0x55F5A4D2, 0x54CA0A4B, 
-   0x539B2AF0, 0x5269126E, 0x5133CC94, 0x4FFB654D, 0x4EBFE8A5, 0x4D8162C4, 
-   0x4C3FDFF4, 0x4AFB6C98, 0x49B41533, 0x4869E665, 0x471CECE7, 0x45CD358F, 
-   0x447ACD50, 0x4325C135, 0x41CE1E65, 0x4073F21D, 0x3F1749B8, 0x3DB832A6, 
-   0x3C56BA70, 0x3AF2EEB7, 0x398CDD32, 0x382493B0, 0x36BA2014, 0x354D9057, 
-   0x33DEF287, 0x326E54C7, 0x30FBC54D, 0x2F875262, 0x2E110A62, 0x2C98FBBA, 
-   0x2B1F34EB, 0x29A3C485, 0x2826B928, 0x26A82186, 0x25280C5E, 0x23A6887F, 
-   0x2223A4C5, 0x209F701C, 0x1F19F97B, 0x1D934FE5, 0x1C0B826A, 0x1A82A026, 
-   0x18F8B83C, 0x176DD9DE, 0x15E21445, 0x145576B1, 0x12C8106F, 0x1139F0CF, 
-   0x0FAB272B, 0x0E1BC2E4, 0x0C8BD35E, 0x0AFB6805, 0x096A9049, 0x07D95B9E, 
-   0x0647D97C, 0x04B6195D, 0x03242ABF, 0x01921D20, 0x00000000, 0xFE6DE2E0, 
-   0xFCDBD541, 0xFB49E6A3, 0xF9B82684, 0xF826A462, 0xF6956FB7, 0xF50497FB, 
-   0xF3742CA2, 0xF1E43D1C, 0xF054D8D5, 0xEEC60F31, 0xED37EF91, 0xEBAA894F, 
-   0xEA1DEBBB, 0xE8922622, 0xE70747C4, 0xE57D5FDA, 0xE3F47D96, 0xE26CB01B, 
-   0xE0E60685, 0xDF608FE4, 0xDDDC5B3B, 0xDC597781, 0xDAD7F3A2, 0xD957DE7A, 
-   0xD7D946D8, 0xD65C3B7B, 0xD4E0CB15, 0xD3670446, 0xD1EEF59E, 0xD078AD9E, 
-   0xCF043AB3, 0xCD91AB39, 0xCC210D79, 0xCAB26FA9, 0xC945DFEC, 0xC7DB6C50, 
-   0xC67322CE, 0xC50D1149, 0xC3A94590, 0xC247CD5A, 0xC0E8B648, 0xBF8C0DE3, 
-   0xBE31E19B, 0xBCDA3ECB, 0xBB8532B0, 0xBA32CA71, 0xB8E31319, 0xB796199B, 
-   0xB64BEACD, 0xB5049368, 0xB3C0200C, 0xB27E9D3C, 0xB140175B, 0xB0049AB3, 
-   0xAECC336C, 0xAD96ED92, 0xAC64D510, 0xAB35F5B5, 0xAA0A5B2E, 0xA8E21106, 
-   0xA7BD22AC, 0xA69B9B68, 0xA57D8666, 0xA462EEAC, 0xA34BDF20, 0xA2386284, 
-   0xA1288376, 0xA01C4C73, 0x9F13C7D0, 0x9E0EFFC1, 0x9D0DFE54, 0x9C10CD70, 
-   0x9B1776DA, 0x9A22042D, 0x99307EE0, 0x9842F043, 0x9759617F, 0x9673DB94, 
-   0x9592675C, 0x94B50D87, 0x93DBD6A0, 0x9306CB04, 0x9235F2EC, 0x91695663, 
-   0x90A0FD4E, 0x8FDCEF66, 0x8F1D343A, 0x8E61D32E, 0x8DAAD37B, 0x8CF83C30, 
-   0x8C4A142F, 0x8BA0622F, 0x8AFB2CBB, 0x8A5A7A31, 0x89BE50C3, 0x8926B677, 
-   0x8893B125, 0x88054677, 0x877B7BEC, 0x86F656D3, 0x8675DC4F, 0x85FA1153, 
-   0x8582FAA5, 0x85109CDD, 0x84A2FC62, 0x843A1D70, 0x83D60412, 0x8376B422, 
-   0x831C314E, 0x82C67F14, 0x8275A0C0, 0x82299971, 0x81E26C16, 0x81A01B6D, 
-   0x8162AA04, 0x812A1A3A, 0x80F66E3C, 0x80C7A80A, 0x809DC971, 0x8078D40D, 
-   0x8058C94C, 0x803DAA6A, 0x80277872, 0x80163440, 0x8009DE7E, 0x800277A6, 
-   0x80000000, 0x800277A6, 0x8009DE7E, 0x80163440, 0x80277872, 0x803DAA6A, 
-   0x8058C94C, 0x8078D40D, 0x809DC971, 0x80C7A80A, 0x80F66E3C, 0x812A1A3A, 
-   0x8162AA04, 0x81A01B6D, 0x81E26C16, 0x82299971, 0x8275A0C0, 0x82C67F14, 
-   0x831C314E, 0x8376B422, 0x83D60412, 0x843A1D70, 0x84A2FC62, 0x85109CDD, 
-   0x8582FAA5, 0x85FA1153, 0x8675DC4F, 0x86F656D3, 0x877B7BEC, 0x88054677, 
-   0x8893B125, 0x8926B677, 0x89BE50C3, 0x8A5A7A31, 0x8AFB2CBB, 0x8BA0622F, 
-   0x8C4A142F, 0x8CF83C30, 0x8DAAD37B, 0x8E61D32E, 0x8F1D343A, 0x8FDCEF66, 
-   0x90A0FD4E, 0x91695663, 0x9235F2EC, 0x9306CB04, 0x93DBD6A0, 0x94B50D87, 
-   0x9592675C, 0x9673DB94, 0x9759617F, 0x9842F043, 0x99307EE0, 0x9A22042D, 
-   0x9B1776DA, 0x9C10CD70, 0x9D0DFE54, 0x9E0EFFC1, 0x9F13C7D0, 0xA01C4C73, 
-   0xA1288376, 0xA2386284, 0xA34BDF20, 0xA462EEAC, 0xA57D8666, 0xA69B9B68, 
-   0xA7BD22AC, 0xA8E21106, 0xAA0A5B2E, 0xAB35F5B5, 0xAC64D510, 0xAD96ED92, 
-   0xAECC336C, 0xB0049AB3, 0xB140175B, 0xB27E9D3C, 0xB3C0200C, 0xB5049368, 
-   0xB64BEACD, 0xB796199B, 0xB8E31319, 0xBA32CA71, 0xBB8532B0, 0xBCDA3ECB, 
-   0xBE31E19B, 0xBF8C0DE3, 0xC0E8B648, 0xC247CD5A, 0xC3A94590, 0xC50D1149, 
-   0xC67322CE, 0xC7DB6C50, 0xC945DFEC, 0xCAB26FA9, 0xCC210D79, 0xCD91AB39, 
-   0xCF043AB3, 0xD078AD9E, 0xD1EEF59E, 0xD3670446, 0xD4E0CB15, 0xD65C3B7B, 
-   0xD7D946D8, 0xD957DE7A, 0xDAD7F3A2, 0xDC597781, 0xDDDC5B3B, 0xDF608FE4, 
-   0xE0E60685, 0xE26CB01B, 0xE3F47D96, 0xE57D5FDA, 0xE70747C4, 0xE8922622, 
-   0xEA1DEBBB, 0xEBAA894F, 0xED37EF91, 0xEEC60F31, 0xF054D8D5, 0xF1E43D1C, 
-   0xF3742CA2, 0xF50497FB, 0xF6956FB7, 0xF826A462, 0xF9B82684, 0xFB49E6A3, 
-   0xFCDBD541, 0xFE6DE2E0, 0x00000000 
-};
-
-/**   
- * \par    
- * Table values are in Q15 (1.15 fixed-point format) and generation is done in 
- * three steps.  First,  generate sin values in floating point:    
- * 
- * tableSize = 512;      
- * for(n = 0; n < (tableSize + 1); n++)    
- * {    
- *	sinTable[n]= sin(2*pi*n/tableSize);    
- * } 
    
- * where pi value is  3.14159265358979    
- * \par    
- * Second, convert floating-point to Q15 (Fixed point):
- *	(sinTable[i] * pow(2, 15))    
- * \par    
- * Finally, round to the nearest integer value:
- * 	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);    
- */
-const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = {
-   0x0000, 0x0192, 0x0324, 0x04B6, 0x0648, 0x07D9, 0x096B, 0x0AFB, 0x0C8C, 0x0E1C, 0x0FAB, 0x113A, 0x12C8,
-   0x1455, 0x15E2, 0x176E, 0x18F9, 0x1A83, 0x1C0C, 0x1D93, 0x1F1A, 0x209F, 0x2224, 0x23A7, 0x2528, 0x26A8,
-   0x2827, 0x29A4, 0x2B1F, 0x2C99, 0x2E11, 0x2F87, 0x30FC, 0x326E, 0x33DF, 0x354E, 0x36BA, 0x3825, 0x398D,
-   0x3AF3, 0x3C57, 0x3DB8, 0x3F17, 0x4074, 0x41CE, 0x4326, 0x447B, 0x45CD, 0x471D, 0x486A, 0x49B4, 0x4AFB,
-   0x4C40, 0x4D81, 0x4EC0, 0x4FFB, 0x5134, 0x5269, 0x539B, 0x54CA, 0x55F6, 0x571E, 0x5843, 0x5964, 0x5A82,
-   0x5B9D, 0x5CB4, 0x5DC8, 0x5ED7, 0x5FE4, 0x60EC, 0x61F1, 0x62F2, 0x63EF, 0x64E9, 0x65DE, 0x66D0, 0x67BD,
-   0x68A7, 0x698C, 0x6A6E, 0x6B4B, 0x6C24, 0x6CF9, 0x6DCA, 0x6E97, 0x6F5F, 0x7023, 0x70E3, 0x719E, 0x7255,
-   0x7308, 0x73B6, 0x7460, 0x7505, 0x75A6, 0x7642, 0x76D9, 0x776C, 0x77FB, 0x7885, 0x790A, 0x798A, 0x7A06,
-   0x7A7D, 0x7AEF, 0x7B5D, 0x7BC6, 0x7C2A, 0x7C89, 0x7CE4, 0x7D3A, 0x7D8A, 0x7DD6, 0x7E1E, 0x7E60, 0x7E9D,
-   0x7ED6, 0x7F0A, 0x7F38, 0x7F62, 0x7F87, 0x7FA7, 0x7FC2, 0x7FD9, 0x7FEA, 0x7FF6, 0x7FFE, 0x7FFF, 0x7FFE,
-   0x7FF6, 0x7FEA, 0x7FD9, 0x7FC2, 0x7FA7, 0x7F87, 0x7F62, 0x7F38, 0x7F0A, 0x7ED6, 0x7E9D, 0x7E60, 0x7E1E,
-   0x7DD6, 0x7D8A, 0x7D3A, 0x7CE4, 0x7C89, 0x7C2A, 0x7BC6, 0x7B5D, 0x7AEF, 0x7A7D, 0x7A06, 0x798A, 0x790A,
-   0x7885, 0x77FB, 0x776C, 0x76D9, 0x7642, 0x75A6, 0x7505, 0x7460, 0x73B6, 0x7308, 0x7255, 0x719E, 0x70E3,
-   0x7023, 0x6F5F, 0x6E97, 0x6DCA, 0x6CF9, 0x6C24, 0x6B4B, 0x6A6E, 0x698C, 0x68A7, 0x67BD, 0x66D0, 0x65DE,
-   0x64E9, 0x63EF, 0x62F2, 0x61F1, 0x60EC, 0x5FE4, 0x5ED7, 0x5DC8, 0x5CB4, 0x5B9D, 0x5A82, 0x5964, 0x5843,
-   0x571E, 0x55F6, 0x54CA, 0x539B, 0x5269, 0x5134, 0x4FFB, 0x4EC0, 0x4D81, 0x4C40, 0x4AFB, 0x49B4, 0x486A,
-   0x471D, 0x45CD, 0x447B, 0x4326, 0x41CE, 0x4074, 0x3F17, 0x3DB8, 0x3C57, 0x3AF3, 0x398D, 0x3825, 0x36BA,
-   0x354E, 0x33DF, 0x326E, 0x30FC, 0x2F87, 0x2E11, 0x2C99, 0x2B1F, 0x29A4, 0x2827, 0x26A8, 0x2528, 0x23A7,
-   0x2224, 0x209F, 0x1F1A, 0x1D93, 0x1C0C, 0x1A83, 0x18F9, 0x176E, 0x15E2, 0x1455, 0x12C8, 0x113A, 0x0FAB,
-   0x0E1C, 0x0C8C, 0x0AFB, 0x096B, 0x07D9, 0x0648, 0x04B6, 0x0324, 0x0192, 0x0000, 0xFE6E, 0xFCDC, 0xFB4A,
-   0xF9B8, 0xF827, 0xF695, 0xF505, 0xF374, 0xF1E4, 0xF055, 0xEEC6, 0xED38, 0xEBAB, 0xEA1E, 0xE892, 0xE707,
-   0xE57D, 0xE3F4, 0xE26D, 0xE0E6, 0xDF61, 0xDDDC, 0xDC59, 0xDAD8, 0xD958, 0xD7D9, 0xD65C, 0xD4E1, 0xD367,
-   0xD1EF, 0xD079, 0xCF04, 0xCD92, 0xCC21, 0xCAB2, 0xC946, 0xC7DB, 0xC673, 0xC50D, 0xC3A9, 0xC248, 0xC0E9,
-   0xBF8C, 0xBE32, 0xBCDA, 0xBB85, 0xBA33, 0xB8E3, 0xB796, 0xB64C, 0xB505, 0xB3C0, 0xB27F, 0xB140, 0xB005,
-   0xAECC, 0xAD97, 0xAC65, 0xAB36, 0xAA0A, 0xA8E2, 0xA7BD, 0xA69C, 0xA57E, 0xA463, 0xA34C, 0xA238, 0xA129,
-   0xA01C, 0x9F14, 0x9E0F, 0x9D0E, 0x9C11, 0x9B17, 0x9A22, 0x9930, 0x9843, 0x9759, 0x9674, 0x9592, 0x94B5,
-   0x93DC, 0x9307, 0x9236, 0x9169, 0x90A1, 0x8FDD, 0x8F1D, 0x8E62, 0x8DAB, 0x8CF8, 0x8C4A, 0x8BA0, 0x8AFB,
-   0x8A5A, 0x89BE, 0x8927, 0x8894, 0x8805, 0x877B, 0x86F6, 0x8676, 0x85FA, 0x8583, 0x8511, 0x84A3, 0x843A,
-   0x83D6, 0x8377, 0x831C, 0x82C6, 0x8276, 0x822A, 0x81E2, 0x81A0, 0x8163, 0x812A, 0x80F6, 0x80C8, 0x809E,
-   0x8079, 0x8059, 0x803E, 0x8027, 0x8016, 0x800A, 0x8002, 0x8000, 0x8002, 0x800A, 0x8016, 0x8027, 0x803E,
-   0x8059, 0x8079, 0x809E, 0x80C8, 0x80F6, 0x812A, 0x8163, 0x81A0, 0x81E2, 0x822A, 0x8276, 0x82C6, 0x831C,
-   0x8377, 0x83D6, 0x843A, 0x84A3, 0x8511, 0x8583, 0x85FA, 0x8676, 0x86F6, 0x877B, 0x8805, 0x8894, 0x8927,
-   0x89BE, 0x8A5A, 0x8AFB, 0x8BA0, 0x8C4A, 0x8CF8, 0x8DAB, 0x8E62, 0x8F1D, 0x8FDD, 0x90A1, 0x9169, 0x9236,
-   0x9307, 0x93DC, 0x94B5, 0x9592, 0x9674, 0x9759, 0x9843, 0x9930, 0x9A22, 0x9B17, 0x9C11, 0x9D0E, 0x9E0F,
-   0x9F14, 0xA01C, 0xA129, 0xA238, 0xA34C, 0xA463, 0xA57E, 0xA69C, 0xA7BD, 0xA8E2, 0xAA0A, 0xAB36, 0xAC65,
-   0xAD97, 0xAECC, 0xB005, 0xB140, 0xB27F, 0xB3C0, 0xB505, 0xB64C, 0xB796, 0xB8E3, 0xBA33, 0xBB85, 0xBCDA,
-   0xBE32, 0xBF8C, 0xC0E9, 0xC248, 0xC3A9, 0xC50D, 0xC673, 0xC7DB, 0xC946, 0xCAB2, 0xCC21, 0xCD92, 0xCF04,
-   0xD079, 0xD1EF, 0xD367, 0xD4E1, 0xD65C, 0xD7D9, 0xD958, 0xDAD8, 0xDC59, 0xDDDC, 0xDF61, 0xE0E6, 0xE26D,
-   0xE3F4, 0xE57D, 0xE707, 0xE892, 0xEA1E, 0xEBAB, 0xED38, 0xEEC6, 0xF055, 0xF1E4, 0xF374, 0xF505, 0xF695,
-   0xF827, 0xF9B8, 0xFB4A, 0xFCDC, 0xFE6E, 0x0000
-};
diff --git a/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c b/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c
deleted file mode 100644
index 6a47e19e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/CommonTables/arm_const_structs.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/* ---------------------------------------------------------------------- 
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved. 
-* 
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5
-* 
-* Project: 	    CMSIS DSP Library 
-* Title:	    arm_const_structs.c 
-* 
-* Description:	This file has constant structs that are initialized for
-*              user convenience.  For example, some can be given as 
-*              arguments to the arm_cfft_f32() function.
-* 
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_const_structs.h"
-
-//Floating-point structs
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
-	16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE__16_TABLE_LENGTH
-};
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
-	32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE__32_TABLE_LENGTH
-};
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
-	64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE__64_TABLE_LENGTH
-};
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
-	128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
-};
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
-	256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
-};
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
-	512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
-};
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
-	1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE1024_TABLE_LENGTH
-};
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
-	2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE2048_TABLE_LENGTH
-};
-
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
-	4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE4096_TABLE_LENGTH
-};
-
-//Fixed-point structs
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
-	16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
-	32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
-	64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
-	128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
-	256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
-	512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
-	1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
-	2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
-	4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
-};
-
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
-	16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
-	32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
-	64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
-	128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
-	256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
-	512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
-	1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
-	2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
-};
-
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
-	4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
-};
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
deleted file mode 100644
index e8b50586..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_f32.c    
-*    
-* Description:	Floating-point complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup cmplx_conj Complex Conjugate        
- *        
- * Conjugates the elements of a complex data vector.        
- *       
- * The pSrc points to the source data and        
- * pDst points to the where the result should be written.        
- * numSamples specifies the number of complex samples        
- * and the data in each array is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * Each array has a total of 2*numSamples values.        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup cmplx_conj        
- * @{        
- */
-
-/**        
- * @brief  Floating-point complex conjugate.        
- * @param  *pSrc points to the input vector        
- * @param  *pDst points to the output vector        
- * @param  numSamples number of complex samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inR1, inR2, inR3, inR4;
-  float32_t inI1, inI2, inI3, inI4;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* read real input samples */
-    inR1 = pSrc[0];
-    /* store real samples to destination */
-    pDst[0] = inR1;
-    inR2 = pSrc[2];
-    pDst[2] = inR2;
-    inR3 = pSrc[4];
-    pDst[4] = inR3;
-    inR4 = pSrc[6];
-    pDst[6] = inR4;
-
-    /* read imaginary input samples */
-    inI1 = pSrc[1];
-    inI2 = pSrc[3];
-
-    /* conjugate input */
-    inI1 = -inI1;
-
-    /* read imaginary input samples */
-    inI3 = pSrc[5];
-
-    /* conjugate input */
-    inI2 = -inI2;
-
-    /* read imaginary input samples */
-    inI4 = pSrc[7];
-
-    /* conjugate input */
-    inI3 = -inI3;
-
-    /* store imaginary samples to destination */
-    pDst[1] = inI1;
-    pDst[3] = inI2;
-
-    /* conjugate input */
-    inI4 = -inI4;
-
-    /* store imaginary samples to destination */
-    pDst[5] = inI3;
-
-    /* increment source pointer by 8 to process next sampels */
-    pSrc += 8u;
-
-    /* store imaginary sample to destination */
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to store next samples */
-    pDst += 8u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* realOut + j (imagOut) = realIn + j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_conj group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
deleted file mode 100644
index 7e93c21e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_q15.c    
-*    
-* Description:	Q15 complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_conj    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex conjugate.    
- * @param  *pSrc points to the input vector    
- * @param  *pDst points to the output vector    
- * @param  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.    
- */
-
-void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t zero = 0;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    in1 = __QASX(zero, in1);
-    in2 = __QASX(zero, in2);
-    in3 = __QASX(zero, in3);
-    in4 = __QASX(zero, in4);
-
-#else
-
-    in1 = __QSAX(zero, in1);
-    in2 = __QSAX(zero, in2);
-    in3 = __QSAX(zero, in3);
-    in4 = __QSAX(zero, in4);
-
-#endif //       #ifndef ARM_MATH_BIG_ENDIAN
-
-    in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
-    in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16);
-    in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
-    in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
-
-    *__SIMD32(pDst)++ = in1;
-    *__SIMD32(pDst)++ = in2;
-    *__SIMD32(pDst)++ = in3;
-    *__SIMD32(pDst)++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    *pDst++ = __SSAT(-*pSrc++, 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  q15_t in;
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut + j (imagOut) = realIn+ j (-1) imagIn */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? 0x7fff : -in;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_conj group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
deleted file mode 100644
index 79746d8b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
+++ /dev/null
@@ -1,180 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_conj_q31.c    
-*    
-* Description:	Q31 complex conjugate.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @addtogroup cmplx_conj        
- * @{        
- */
-
-/**        
- * @brief  Q31 complex conjugate.        
- * @param  *pSrc points to the input vector        
- * @param  *pDst points to the output vector        
- * @param  numSamples number of complex samples in each vector        
- * @return none.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.        
- */
-
-void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in;                                      /* Input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t inR1, inR2, inR3, inR4;                  /* Temporary real variables */
-  q31_t inI1, inI2, inI3, inI4;                  /* Temporary imaginary variables */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    /* read real input sample */
-    inR1 = pSrc[0];
-    /* store real input sample */
-    pDst[0] = inR1;
-
-    /* read imaginary input sample */
-    inI1 = pSrc[1];
-
-    /* read real input sample */
-    inR2 = pSrc[2];
-    /* store real input sample */
-    pDst[2] = inR2;
-
-    /* read imaginary input sample */
-    inI2 = pSrc[3];
-
-    /* negate imaginary input sample */
-    inI1 = __QSUB(0, inI1);
-
-    /* read real input sample */
-    inR3 = pSrc[4];
-    /* store real input sample */
-    pDst[4] = inR3;
-
-    /* read imaginary input sample */
-    inI3 = pSrc[5];
-
-    /* negate imaginary input sample */
-    inI2 = __QSUB(0, inI2);
-
-    /* read real input sample */
-    inR4 = pSrc[6];
-    /* store real input sample */
-    pDst[6] = inR4;
-
-    /* negate imaginary input sample */
-    inI3 = __QSUB(0, inI3);
-
-    /* store imaginary input sample */
-    inI4 = pSrc[7];
-
-    /* store imaginary input samples */
-    pDst[1] = inI1;
-
-    /* negate imaginary input sample */
-    inI4 = __QSUB(0, inI4);
-
-    /* store imaginary input samples */
-    pDst[3] = inI2;
-
-    /* increment source pointer by 8 to proecess next samples */
-    pSrc += 8u;
-
-    /* store imaginary input samples */
-    pDst[5] = inI3;
-    pDst[7] = inI4;
-
-    /* increment destination pointer by 8 to process next samples */
-    pDst += 8u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0]+jC[1] = A[0]+ j (-1) A[1] */
-    /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-    /* Saturated to 0x7fffffff if the input is -1(0x80000000) */
-    *pDst++ = *pSrc++;
-    in = *pSrc++;
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_conj group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
deleted file mode 100644
index 6f06a882..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_f32.c    
-*    
-* Description:	Floating-point complex dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @defgroup cmplx_dot_prod Complex Dot Product    
- *    
- * Computes the dot product of two complex vectors.    
- * The vectors are multiplied element-by-element and then summed.    
- *   
- * The pSrcA points to the first complex input vector and    
- * pSrcB points to the second complex input vector.    
- * numSamples specifies the number of complex samples    
- * and the data in each array is stored in an interleaved fashion    
- * (real, imag, real, imag, ...).    
- * Each array has a total of 2*numSamples values.    
- *    
- * The underlying algorithm is used:    
- * 
    
- * realResult=0;    
- * imagResult=0;    
- * for(n=0; n    
- *    
- * There are separate functions for floating-point, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Floating-point complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- */
-
-void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult)
-{
-  float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result storage */
-  float32_t a0,b0,c0,d0;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-    
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++; 
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-    
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++; 
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples & 0x3u;
-
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-      /* Decrement the loop counter */
-      numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the real and imaginary results in the destination buffers */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
deleted file mode 100644
index 5ee86ada..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_q15.c    
-*    
-* Description:	Processing function for the Q15 Complex Dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.    
- * These are accumulated in a 64-bit accumulator with 34.30 precision.    
- * As a final step, the accumulators are converted to 8.24 format.    
- * The return results realResult and imagResult are in 8.24 format.    
- */
-
-void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult)
-{
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-  q15_t a0,b0,c0,d0;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += (q31_t)a0 * c0;
-      imag_sum += (q31_t)a0 * d0;
-      real_sum -= (q31_t)b0 * d0;
-      imag_sum += (q31_t)b0 * c0;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += a0 * c0;
-      imag_sum += a0 * d0;
-      real_sum -= b0 * d0;
-      imag_sum += b0 * c0;
-
-
-      /* Decrement the loop counter */
-      numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the real and imaginary results in 8.24 format  */
-  /* Convert real data in 34.30 to 8.24 by 6 right shifts */
-  *realResult = (q31_t) (real_sum >> 6);
-  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
-  *imagResult = (q31_t) (imag_sum >> 6);
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
deleted file mode 100644
index 9b7170f5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_dot_prod_q31.c    
-*    
-* Description:	Q31 complex dot product    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_dot_prod    
- * @{    
- */
-
-/**    
- * @brief  Q31 complex dot product    
- * @param  *pSrcA points to the first input vector    
- * @param  *pSrcB points to the second input vector    
- * @param  numSamples number of complex samples in each vector    
- * @param  *realResult real part of the result returned here    
- * @param  *imagResult imaginary part of the result returned here    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.    
- * The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.    
- * Additions are nonsaturating and no overflow will occur as long as numSamples is less than 32768.    
- * The return results realResult and imagResult are in 16.48 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult)
-{
-  q63_t real_sum = 0, imag_sum = 0;              /* Temporary result storage */
-  q31_t a0,b0,c0,d0;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-      
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-  /* If the numSamples  is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-      a0 = *pSrcA++;
-      b0 = *pSrcA++;
-      c0 = *pSrcB++;
-      d0 = *pSrcB++;  
-  
-      real_sum += ((q63_t)a0 * c0) >> 14;
-      imag_sum += ((q63_t)a0 * d0) >> 14;
-      real_sum -= ((q63_t)b0 * d0) >> 14;
-      imag_sum += ((q63_t)b0 * c0) >> 14;
-
-      /* Decrement the loop counter */
-      numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the real and imaginary results in 16.48 format  */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**    
- * @} end of cmplx_dot_prod group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
deleted file mode 100644
index deb8a29f..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_f32.c    
-*    
-* Description:	Floating-point complex magnitude.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @defgroup cmplx_mag Complex Magnitude    
- *    
- * Computes the magnitude of the elements of a complex data vector.    
- *   
- * The pSrc points to the source data and    
- * pDst points to the where the result should be written.    
- * numSamples specifies the number of complex samples    
- * in the input array and the data is stored in an interleaved fashion    
- * (real, imag, real, imag, ...).    
- * The input array has a total of 2*numSamples values;    
- * the output array has a total of numSamples values.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * for(n=0; n    
- *    
- * There are separate functions for floating-point, Q15, and Q31 data types.    
- */
-
-/**    
- * @addtogroup cmplx_mag    
- * @{    
- */
-/**    
- * @brief Floating-point complex magnitude.    
- * @param[in]       *pSrc points to complex input buffer    
- * @param[out]      *pDst points to real output buffer    
- * @param[in]       numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- */
-
-
-void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t realIn, imagIn;                      /* Temporary variables to hold input values */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* out = sqrt((real * real) + (imag * imag)) */
-    realIn = *pSrc++;
-    imagIn = *pSrc++;
-    /* store the result in the destination buffer. */
-    arm_sqrt_f32((realIn * realIn) + (imagIn * imagIn), pDst++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_mag group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
deleted file mode 100644
index d7125854..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_q15.c    
-*    
-* Description:	Q15 complex magnitude.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag    
- * @{    
- */
-
-
-/**    
- * @brief  Q15 complex magnitude    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.    
- */
-
-void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) ((acc0) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc1) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc2) >> 17), pDst++);
-    arm_sqrt_q15((q15_t) ((acc3) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to hold input values */
-
-  while(numSamples > 0u)
-  {
-    /* out = sqrt(real * real + imag * imag) */
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-
-    /* store the result in 2.14 format in the destination buffer. */
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_mag group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
deleted file mode 100644
index 2880f577..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_q31.c    
-*    
-* Description:	Q31 complex magnitude    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @addtogroup cmplx_mag        
- * @{        
- */
-
-/**        
- * @brief  Q31 complex magnitude        
- * @param  *pSrc points to the complex input vector        
- * @param  *pDst points to the real output vector        
- * @param  numSamples number of complex samples in the input vector        
- * @return none.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.        
- * Input down scaling is not required.        
- */
-
-void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t real, imag;                              /* Temporary variables to hold input values */
-  q31_t acc0, acc1;                              /* Accumulators */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t real1, real2, imag1, imag2;              /* Temporary variables to hold input values */
-  q31_t out1, out2, out3, out4;                  /* Accumulators */
-  q63_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
-
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* read complex input from source buffer */
-    real1 = pSrc[0];
-    imag1 = pSrc[1];
-    real2 = pSrc[2];
-    imag2 = pSrc[3];
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* read complex input from source buffer */
-    real1 = pSrc[4];
-    imag1 = pSrc[5];
-    real2 = pSrc[6];
-    imag2 = pSrc[7];
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[0]);
-
-    /* calculate power of input values */
-    mul1 = (q63_t) real1 *real1;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[1]);
-
-    /* calculate power of input values */
-    mul2 = (q63_t) imag1 *imag1;
-    mul3 = (q63_t) real2 *real2;
-    mul4 = (q63_t) imag2 *imag2;
-
-    /* get the result to 3.29 format */
-    out1 = (q31_t) (mul1 >> 33);
-    out2 = (q31_t) (mul2 >> 33);
-    out3 = (q31_t) (mul3 >> 33);
-    out4 = (q31_t) (mul4 >> 33);
-
-    /* add real and imaginary accumulators */
-    out1 = out1 + out2;
-    out3 = out3 + out4;
-
-    /* calculate square root */
-    arm_sqrt_q31(out1, &pDst[2]);
-
-    /* increment destination by 8 to process next samples */
-    pSrc += 8u;
-
-    /* calculate square root */
-    arm_sqrt_q31(out3, &pDst[3]);
-
-    /* increment destination by 4 to process next samples */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 2.30 format in the destination buffer. */
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_mag group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
deleted file mode 100644
index 71b0a1ea..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_f32.c    
-*    
-* Description:	Floating-point complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup cmplx_mag_squared Complex Magnitude Squared        
- *        
- * Computes the magnitude squared of the elements of a complex data vector.        
- *       
- * The pSrc points to the source data and        
- * pDst points to the where the result should be written.        
- * numSamples specifies the number of complex samples        
- * in the input array and the data is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The input array has a total of 2*numSamples values;        
- * the output array has a total of numSamples values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup cmplx_mag_squared        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex magnitude squared        
- * @param[in]  *pSrc points to the complex input vector        
- * @param[out]  *pDst points to the real output vector        
- * @param[in]  numSamples number of complex samples in the input vector        
- * @return none.        
- */
-
-void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t real, imag;                          /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  float32_t real1, real2, real3, real4;          /* Temporary variables to hold real values */
-  float32_t imag1, imag2, imag3, imag4;          /* Temporary variables to hold imaginary values */
-  float32_t mul1, mul2, mul3, mul4;              /* Temporary variables */
-  float32_t mul5, mul6, mul7, mul8;              /* Temporary variables */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output values */
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    /* read real input sample from source buffer */
-    real1 = pSrc[0];
-    /* read imaginary input sample from source buffer */
-    imag1 = pSrc[1];
-
-    /* calculate power of real value */
-    mul1 = real1 * real1;
-
-    /* read real input sample from source buffer */
-    real2 = pSrc[2];
-
-    /* calculate power of imaginary value */
-    mul2 = imag1 * imag1;
-
-    /* read imaginary input sample from source buffer */
-    imag2 = pSrc[3];
-
-    /* calculate power of real value */
-    mul3 = real2 * real2;
-
-    /* read real input sample from source buffer */
-    real3 = pSrc[4];
-
-    /* calculate power of imaginary value */
-    mul4 = imag2 * imag2;
-
-    /* read imaginary input sample from source buffer */
-    imag3 = pSrc[5];
-
-    /* calculate power of real value */
-    mul5 = real3 * real3;
-    /* calculate power of imaginary value */
-    mul6 = imag3 * imag3;
-
-    /* read real input sample from source buffer */
-    real4 = pSrc[6];
-
-    /* accumulate real and imaginary powers */
-    out1 = mul1 + mul2;
-
-    /* read imaginary input sample from source buffer */
-    imag4 = pSrc[7];
-
-    /* accumulate real and imaginary powers */
-    out2 = mul3 + mul4;
-
-    /* calculate power of real value */
-    mul7 = real4 * real4;
-    /* calculate power of imaginary value */
-    mul8 = imag4 * imag4;
-
-    /* store output to destination */
-    pDst[0] = out1;
-
-    /* accumulate real and imaginary powers */
-    out3 = mul5 + mul6;
-
-    /* store output to destination */
-    pDst[1] = out2;
-
-    /* accumulate real and imaginary powers */
-    out4 = mul7 + mul8;
-
-    /* store output to destination */
-    pDst[2] = out3;
-
-    /* increment destination pointer by 8 to process next samples */
-    pSrc += 8u;
-
-    /* store output to destination */
-    pDst[3] = out4;
-
-    /* increment destination pointer by 4 to process next samples */
-    pDst += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    /* out = (real * real) + (imag * imag) */
-    /* store the result in the destination buffer. */
-    *pDst++ = (real * real) + (imag * imag);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of cmplx_mag_squared group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
deleted file mode 100644
index c669fb6e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_q15.c    
-*    
-* Description:	Q15 complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag_squared    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex magnitude squared    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.    
- */
-
-void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-  q31_t in1, in2, in3, in4;
-  q31_t acc2, acc3;
-
-  /*loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    in2 = *__SIMD32(pSrc)++;
-    in3 = *__SIMD32(pSrc)++;
-    in4 = *__SIMD32(pSrc)++;
-
-    acc0 = __SMUAD(in1, in1);
-    acc1 = __SMUAD(in2, in2);
-    acc2 = __SMUAD(in3, in3);
-    acc3 = __SMUAD(in4, in4);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-    *pDst++ = (q15_t) (acc1 >> 17);
-    *pDst++ = (q15_t) (acc2 >> 17);
-    *pDst++ = (q15_t) (acc3 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    in1 = *__SIMD32(pSrc)++;
-    acc0 = __SMUAD(in1, in1);
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t real, imag;                              /* Temporary variables to store real and imaginary values */
-
-  while(numSamples > 0u)
-  {
-    /* out = ((real * real) + (imag * imag)) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (real * real);
-    acc1 = (imag * imag);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_mag_squared group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
deleted file mode 100644
index 25f1e842..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
+++ /dev/null
@@ -1,161 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cmplx_mag_squared_q31.c    
-*    
-* Description:	Q31 complex magnitude squared.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup cmplx_mag_squared    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex magnitude squared    
- * @param  *pSrc points to the complex input vector    
- * @param  *pDst points to the real output vector    
- * @param  numSamples number of complex samples in the input vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t real, imag;                              /* Temporary variables to store real and imaginary values */
-  q31_t acc0, acc1;                              /* Accumulators */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* out = ((real * real) + (imag * imag)) */
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement the loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of cmplx_mag_squared group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
deleted file mode 100644
index 0f04562d..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_f32.c    
-*    
-* Description:	Floating-point complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication        
- *        
- * Multiplies a complex vector by another complex vector and generates a complex result.        
- * The data in the complex arrays is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The parameter numSamples represents the number of complex        
- * samples processed.  The complex arrays have a total of 2*numSamples        
- * real values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup CmplxByCmplxMult        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex-by-complex multiplication        
- * @param[in]  *pSrcA points to the first input vector        
- * @param[in]  *pSrcB points to the second input vector        
- * @param[out]  *pDst  points to the output vector        
- * @param[in]  numSamples number of complex samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples)
-{
-  float32_t a1, b1, c1, d1;                      /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t a2, b2, c2, d2;                      /* Temporary variables to store real and imaginary values */
-  float32_t acc1, acc2, acc3, acc4;
-
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA;                /* A[2 * i] */
-    c1 = *pSrcB;                /* B[2 * i] */
-
-    b1 = *(pSrcA + 1);          /* A[2 * i + 1] */
-    acc1 = a1 * c1;             /* acc1 = A[2 * i] * B[2 * i] */
-
-    a2 = *(pSrcA + 2);          /* A[2 * i + 2] */
-    acc2 = (b1 * c1);           /* acc2 = A[2 * i + 1] * B[2 * i] */
-
-    d1 = *(pSrcB + 1);          /* B[2 * i + 1] */
-    c2 = *(pSrcB + 2);          /* B[2 * i + 2] */
-    acc1 -= b1 * d1;            /* acc1 =      A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    d2 = *(pSrcB + 3);          /* B[2 * i + 3] */
-    acc3 = a2 * c2;             /* acc3 =       A[2 * i + 2] * B[2 * i + 2] */
-
-    b2 = *(pSrcA + 3);          /* A[2 * i + 3] */
-    acc2 += (a1 * d1);          /* acc2 =      A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1] */
-
-    a1 = *(pSrcA + 4);          /* A[2 * i + 4] */
-    acc4 = (a2 * d2);           /* acc4 =   A[2 * i + 2] * B[2 * i + 3] */
-
-    c1 = *(pSrcB + 4);          /* B[2 * i + 4] */
-    acc3 -= (b2 * d2);          /* acc3 =       A[2 * i + 2] * B[2 * i + 2] - A[2 * i + 3] * B[2 * i + 3] */
-    *pDst = acc1;               /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1] */
-
-    b1 = *(pSrcA + 5);          /* A[2 * i + 5] */
-    acc4 += b2 * c2;            /* acc4 =   A[2 * i + 2] * B[2 * i + 3] + A[2 * i + 3] * B[2 * i + 2] */
-
-    *(pDst + 1) = acc2;         /* C[2 * i + 1] = A[2 * i + 1] * B[2 * i] + A[2 * i] * B[2 * i + 1]  */
-    acc1 = (a1 * c1);
-
-    d1 = *(pSrcB + 5);
-    acc2 = (b1 * c1);
-
-    *(pDst + 2) = acc3;
-    *(pDst + 3) = acc4;
-
-    a2 = *(pSrcA + 6);
-    acc1 -= (b1 * d1);
-
-    c2 = *(pSrcB + 6);
-    acc2 += (a1 * d1);
-
-    b2 = *(pSrcA + 7);
-    acc3 = (a2 * c2);
-
-    d2 = *(pSrcB + 7);
-    acc4 = (b2 * c2);
-
-    *(pDst + 4) = acc1;
-    pSrcA += 8u;
-
-    acc3 -= (b2 * d2);
-    acc4 += (a2 * d2);
-
-    *(pDst + 5) = acc2;
-    pSrcB += 8u;
-
-    *(pDst + 6) = acc3;
-    *(pDst + 7) = acc4;
-
-    pDst += 8u;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a1 = *pSrcA++;
-    b1 = *pSrcA++;
-    c1 = *pSrcB++;
-    d1 = *pSrcB++;
-
-    /* store the result in the destination buffer. */
-    *pDst++ = (a1 * c1) - (b1 * d1);
-    *pDst++ = (a1 * d1) + (b1 * c1);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of CmplxByCmplxMult group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
deleted file mode 100644
index f135b980..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_q15.c    
-*    
-* Description:	Q15 complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByCmplxMult    
- * @{    
- */
-
-/**    
- * @brief  Q15 complex-by-complex multiplication    
- * @param[in]  *pSrcA points to the first input vector    
- * @param[in]  *pSrcB points to the second input vector    
- * @param[out]  *pDst  points to the output vector    
- * @param[in]  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.    
- */
-
-void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples)
-{
-  q15_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17);
-    /* store the result in 3.13 format in the destination buffer. */
-    *pDst++ =
-      (q15_t) (q31_t) (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17);
-
-    /* Decrement the blockSize loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of CmplxByCmplxMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
deleted file mode 100644
index 6dfea931..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
+++ /dev/null
@@ -1,326 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_cmplx_q31.c    
-*    
-* Description:	Q31 complex-by-complex multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByCmplxMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex-by-complex multiplication    
- * @param[in]  *pSrcA points to the first input vector    
- * @param[in]  *pSrcB points to the second input vector    
- * @param[out]  *pDst  points to the output vector    
- * @param[in]  numSamples number of complex samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.    
- * Input down scaling is not required.    
- */
-
-void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples)
-{
-  q31_t a, b, c, d;                              /* Temporary variables to store real and imaginary values */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t mul1, mul2, mul3, mul4;
-  q31_t out1, out2;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 1u;
-
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.     
-   ** a second loop below computes the remaining 1 sample. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.     
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x2u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    mul1 = (q31_t) (((q63_t) a * c) >> 32);
-    mul2 = (q31_t) (((q63_t) b * d) >> 32);
-    mul3 = (q31_t) (((q63_t) a * d) >> 32);
-    mul4 = (q31_t) (((q63_t) b * c) >> 32);
-
-    mul1 = (mul1 >> 1);
-    mul2 = (mul2 >> 1);
-    mul3 = (mul3 >> 1);
-    mul4 = (mul4 >> 1);
-
-    out1 = mul1 - mul2;
-    out2 = mul3 + mul4;
-
-    /* store the real result in 3.29 format in the destination buffer. */
-    *pDst++ = out1;
-    /* store the imag result in 3.29 format in the destination buffer. */
-    *pDst++ = out2;
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of CmplxByCmplxMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
deleted file mode 100644
index c7a7df43..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_f32.c    
-*    
-* Description:	Floating-point complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupCmplxMath        
- */
-
-/**        
- * @defgroup CmplxByRealMult Complex-by-Real Multiplication        
- *        
- * Multiplies a complex vector by a real vector and generates a complex result.        
- * The data in the complex arrays is stored in an interleaved fashion        
- * (real, imag, real, imag, ...).        
- * The parameter numSamples represents the number of complex        
- * samples processed.  The complex arrays have a total of 2*numSamples        
- * real values while the real array has a total of numSamples        
- * real values.        
- *        
- * The underlying algorithm is used:        
- *        
- * 
        
- * for(n=0; n        
- *        
- * There are separate functions for floating-point, Q15, and Q31 data types.        
- */
-
-/**        
- * @addtogroup CmplxByRealMult        
- * @{        
- */
-
-
-/**        
- * @brief  Floating-point complex-by-real multiplication        
- * @param[in]  *pSrcCmplx points to the complex input vector        
- * @param[in]  *pSrcReal points to the real input vector        
- * @param[out]  *pCmplxDst points to the complex output vector        
- * @param[in]  numSamples number of samples in each vector        
- * @return none.        
- */
-
-void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t inA1, inA2, inA3, inA4;              /* Temporary variables to hold input data */
-  float32_t inA5, inA6, inA7, inA8;              /* Temporary variables to hold input data */
-  float32_t inB1, inB2, inB3, inB4;              /* Temporary variables to hold input data */
-  float32_t out1, out2, out3, out4;              /* Temporary variables to hold output data */
-  float32_t out5, out6, out7, out8;              /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read input from complex input buffer */
-    inA1 = pSrcCmplx[0];
-    inA2 = pSrcCmplx[1];
-    /* read input from real input buffer */
-    inB1 = pSrcReal[0];
-
-    /* read input from complex input buffer */
-    inA3 = pSrcCmplx[2];
-
-    /* multiply complex buffer real input with real buffer input */
-    out1 = inA1 * inB1;
-
-    /* read input from complex input buffer */
-    inA4 = pSrcCmplx[3];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out2 = inA2 * inB1;
-
-    /* read input from real input buffer */
-    inB2 = pSrcReal[1];
-    /* read input from complex input buffer */
-    inA5 = pSrcCmplx[4];
-
-    /* multiply complex buffer real input with real buffer input */
-    out3 = inA3 * inB2;
-
-    /* read input from complex input buffer */
-    inA6 = pSrcCmplx[5];
-    /* read input from real input buffer */
-    inB3 = pSrcReal[2];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out4 = inA4 * inB2;
-
-    /* read input from complex input buffer */
-    inA7 = pSrcCmplx[6];
-
-    /* multiply complex buffer real input with real buffer input */
-    out5 = inA5 * inB3;
-
-    /* read input from complex input buffer */
-    inA8 = pSrcCmplx[7];
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out6 = inA6 * inB3;
-
-    /* read input from real input buffer */
-    inB4 = pSrcReal[3];
-
-    /* store result to destination bufer */
-    pCmplxDst[0] = out1;
-
-    /* multiply complex buffer real input with real buffer input */
-    out7 = inA7 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[1] = out2;
-
-    /* multiply complex buffer imaginary input with real buffer input */
-    out8 = inA8 * inB4;
-
-    /* store result to destination bufer */
-    pCmplxDst[2] = out3;
-    pCmplxDst[3] = out4;
-    pCmplxDst[4] = out5;
-
-    /* incremnet complex input buffer by 8 to process next samples */
-    pSrcCmplx += 8u;
-
-    /* store result to destination bufer */
-    pCmplxDst[5] = out6;
-
-    /* increment real input buffer by 4 to process next samples */
-    pSrcReal += 4u;
-
-    /* store result to destination bufer */
-    pCmplxDst[6] = out7;
-    pCmplxDst[7] = out8;
-
-    /* increment destination buffer by 8 to process next sampels */
-    pCmplxDst += 8u;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-    *pCmplxDst++ = (*pSrcCmplx++) * (in);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-}
-
-/**        
- * @} end of CmplxByRealMult group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
deleted file mode 100644
index cd9642b8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_q15.c    
-*    
-* Description:	Q15 complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByRealMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q15 complex-by-real multiplication    
- * @param[in]  *pSrcCmplx points to the complex input vector    
- * @param[in]  *pSrcReal points to the real input vector    
- * @param[out]  *pCmplxDst points to the complex output vector    
- * @param[in]  numSamples number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  q15_t in;                                      /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA1, inA2;                              /* Temporary variables to hold input data */
-  q31_t inB1;                                    /* Temporary variables to hold input data */
-  q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read complex number both real and imaginary from complex input buffer */
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    /* read two real values at a time from real input buffer */
-    inB1 = *__SIMD32(pSrcReal)++;
-    /* read complex number both real and imaginary from complex input buffer */
-    inA2 = *__SIMD32(pSrcCmplx)++;
-
-    /* multiply complex number with real numbers */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
-#else
-
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* saturate the result */
-    out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
-
-    /* pack real and imaginary outputs and store them to destination */
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    inA1 = *__SIMD32(pSrcCmplx)++;
-    inB1 = *__SIMD32(pSrcReal)++;
-    inA2 = *__SIMD32(pSrcCmplx)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    mul1 = (q31_t) ((q15_t) (inA1) * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2) * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-
-#else
-
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1 * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = (q15_t) __SSAT(mul1 >> 15u, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15u, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15u, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15u, 16);
-
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out1, out2, 16);
-    *__SIMD32(pCmplxDst)++ = __PKHBT(out3, out4, 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut = realA * realB.            */
-    /* imagOut = imagA * realB.                */
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-    *pCmplxDst++ =
-      (q15_t) __SSAT((((q31_t) (*pSrcCmplx++) * (in)) >> 15), 16);
-
-    /* Decrement the numSamples loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of CmplxByRealMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
deleted file mode 100644
index e4e11ab0..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
+++ /dev/null
@@ -1,223 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cmplx_mult_real_q31.c    
-*    
-* Description:	Q31 complex by real multiplication    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupCmplxMath    
- */
-
-/**    
- * @addtogroup CmplxByRealMult    
- * @{    
- */
-
-
-/**    
- * @brief  Q31 complex-by-real multiplication    
- * @param[in]  *pSrcCmplx points to the complex input vector    
- * @param[in]  *pSrcReal points to the real input vector    
- * @param[out]  *pCmplxDst points to the complex output vector    
- * @param[in]  numSamples number of samples in each vector    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- */
-
-void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples)
-{
-  q31_t inA1;                                    /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  uint32_t blkCnt;                               /* loop counters */
-  q31_t inA2, inA3, inA4;                        /* Temporary variables to hold input data */
-  q31_t inB1, inB2;                              /* Temporary variabels to hold input data */
-  q31_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-
-  /* loop Unrolling */
-  blkCnt = numSamples >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-    inB2 = *pSrcReal++;
-    /* read imaginary input from complex input buffer */
-    inA3 = *pSrcCmplx++;
-    inA4 = *pSrcCmplx++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-    out3 = ((q63_t) inA3 * inB2) >> 32;
-    out4 = ((q63_t) inA4 * inB2) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-    out3 = __SSAT(out3, 31);
-    out4 = __SSAT(out4, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-    out3 = out3 << 1;
-    out4 = out4 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-    *pCmplxDst++ = out3;
-    *pCmplxDst++ = out4;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-  /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = numSamples % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C[2 * i] = A[2 * i] * B[i].            */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i].        */
-    /* read real input from complex input buffer */
-    inA1 = *pSrcCmplx++;
-    inA2 = *pSrcCmplx++;
-    /* read input from real input bufer */
-    inB1 = *pSrcReal++;
-
-    /* multiply complex input with real input */
-    out1 = ((q63_t) inA1 * inB1) >> 32;
-    out2 = ((q63_t) inA2 * inB1) >> 32;
-
-    /* sature the result */
-    out1 = __SSAT(out1, 31);
-    out2 = __SSAT(out2, 31);
-
-    /* get result in 1.31 format */
-    out1 = out1 << 1;
-    out2 = out2 << 1;
-
-    /* store the result to destination buffer */
-    *pCmplxDst++ = out1;
-    *pCmplxDst++ = out2;
-
-    /* Decrement the numSamples loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(numSamples > 0u)
-  {
-    /* realOut = realA * realB.            */
-    /* imagReal = imagA * realB.               */
-    inA1 = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-    *pCmplxDst++ =
-      (q31_t) clip_q63_to_q31(((q63_t) * pSrcCmplx++ * inA1) >> 31);
-
-    /* Decrement the numSamples loop counter */
-    numSamples--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of CmplxByRealMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
deleted file mode 100644
index b1f35d6c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_f32.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_f32.c    
-*    
-* Description:	Floating-point PID Control initialization function    
-*				   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point PID Control.   
- * @param[in,out] *S points to an instance of the PID structure.   
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state & 1 = reset the state.   
- * @return none.   
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag)
-{
-
-  /* Derived coefficient A0 */
-  S->A0 = S->Kp + S->Ki + S->Kd;
-
-  /* Derived coefficient A1 */
-  S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(float32_t));
-  }
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
deleted file mode 100644
index 94a0ee74..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q15.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_q15.c    
-*    
-* Description:	Q15 PID Control initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @details    
- * @param[in,out] *S points to an instance of the Q15 PID structure.    
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.    
- * @return none.    
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficients and pack into A1 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-  S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
-
-#else
-
-  S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q15_t));
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;                                    /*to store the sum */
-
-  /* Derived coefficient A0 */
-  temp = S->Kp + S->Ki + S->Kd;
-  S->A0 = (q15_t) __SSAT(temp, 16);
-
-  /* Derived coefficients and pack into A1 */
-  temp = -(S->Kd + S->Kd + S->Kp);
-  S->A1 = (q15_t) __SSAT(temp, 16);
-  S->A2 = S->Kd;
-
-
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q15_t));
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
deleted file mode 100644
index 3927647f..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_init_q31.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_init_q31.c    
-*    
-* Description:	Q31 PID Control initialization function     
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q31 PID Control.   
- * @param[in,out] *S points to an instance of the Q31 PID structure.   
- * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.   
- * @return none.    
- * \par Description:   
- * \par    
- * The resetStateFlag specifies whether to set state to zero or not. \n   
- * The function computes the structure fields: A0, A1 A2    
- * using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)    
- * also sets the state variables to all zeros.    
- */
-
-void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficient A1 */
-  S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t temp;
-
-  /* Derived coefficient A0 */
-  temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
-  S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
-
-  /* Derived coefficient A1 */
-  temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
-  S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if(resetStateFlag)
-  {
-    /* Clear the state buffer.  The size will be always 3 samples */
-    memset(S->state, 0, 3u * sizeof(q31_t));
-  }
-
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
deleted file mode 100644
index fb108fd6..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_f32.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_f32.c    
-*    
-* Description:	Floating-point PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the floating-point PID Control.   
-* @param[in] *S	Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S)
-{
-
-  /* Clear the state buffer.  The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(float32_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c b/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
deleted file mode 100644
index 1e48c43a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q15.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_q15.c    
-*    
-* Description:	Q15 PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the Q15 PID Control.   
-* @param[in] *S		Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S)
-{
-  /* Reset state to zero, The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(q15_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
deleted file mode 100644
index 419d2dbf..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_pid_reset_q31.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_pid_reset_q31.c    
-*    
-* Description:	Q31 PID Control reset function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
- /**    
- * @addtogroup PID    
- * @{    
- */
-
-/**    
-* @brief  Reset function for the Q31 PID Control.   
-* @param[in] *S	Instance pointer of PID control data structure.   
-* @return none.    
-* \par Description:   
-* The function resets the state buffer to zeros.    
-*/
-void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S)
-{
-
-  /* Clear the state buffer.  The size will be always 3 samples */
-  memset(S->state, 0, 3u * sizeof(q31_t));
-}
-
-/**    
- * @} end of PID group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c b/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
deleted file mode 100644
index 3024cbc9..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_f32.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_cos_f32.c    
-*    
-* Description:	Sine and Cosine calculation for floating-point values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupController    
- */
-
-/**    
- * @defgroup SinCos Sine Cosine   
- *    
- * Computes the trigonometric sine and cosine values using a combination of table lookup   
- * and linear interpolation.     
- * There are separate functions for Q31 and floating-point data types.   
- * The input to the floating-point version is in degrees while the   
- * fixed-point Q31 have a scaled input with the range   
- * [-1 0.9999] mapping to [-180 +180] degrees.   
- *
- * The floating point function also allows values that are out of the usual range. When this happens, the function will
- * take extra time to adjust the input value to the range of [-180 180].
- *   
- * The implementation is based on table lookup using 360 values together with linear interpolation.   
- * The steps used are:   
- *  -# Calculation of the nearest integer table index.   
- *  -# Compute the fractional portion (fract) of the input.   
- *  -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.      
- *  -# Sine value is computed as  *psinVal = y0 + (fract * (y1 - y0)).    
- *  -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.      
- *  -# Cosine value is computed as  *pcosVal = y0 + (fract * (y1 - y0)).    
- */
-
- /**    
- * @addtogroup SinCos    
- * @{    
- */
-
-/**    
- * @brief  Floating-point sin_cos function.   
- * @param[in]  theta    input value in degrees    
- * @param[out] *pSinVal points to the processed sine output.    
- * @param[out] *pCosVal points to the processed cos output.    
- * @return none.   
- */
-
-void arm_sin_cos_f32(
-  float32_t theta,
-  float32_t * pSinVal,
-  float32_t * pCosVal)
-{
-  float32_t fract, in;                             /* Temporary variables for input, output */
-  uint16_t indexS, indexC;                         /* Index variable */
-  float32_t f1, f2, d1, d2;                        /* Two nearest output values */
-  int32_t n;
-  float32_t findex, Dn, Df, temp;
-
-  /* input x is in degrees */
-  /* Scale the input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
-  in = theta * 0.00277777777778f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if(in < 0.0f)
-  {
-    n--;
-  }
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
-  indexS = ((uint16_t)findex) & 0x1ff;
-  indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
-
-  /* fractional value calculation */
-  fract = findex - (float32_t) indexS;
-
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_f32[indexC+0];
-  f2 = sinTable_f32[indexC+1];
-  d1 = -sinTable_f32[indexS+0];
-  d2 = -sinTable_f32[indexS+1];
-
-  Dn = 0.0122718463030f; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*(d1 + d2) - 2*Df;
-  temp = fract*temp + (3*Df - (d2 + 2*d1)*Dn);
-  temp = fract*temp + d1*Dn;
-
-  /* Calculation of cosine value */
-  *pCosVal = fract*temp + f1;
-  
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_f32[indexS+0];
-  f2 = sinTable_f32[indexS+1];
-  d1 = sinTable_f32[indexC+0];
-  d2 = sinTable_f32[indexC+1];
-
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*(d1 + d2) - 2*Df;
-  temp = fract*temp + (3*Df - (d2 + 2*d1)*Dn);
-  temp = fract*temp + d1*Dn;
-  
-  /* Calculation of sine value */
-  *pSinVal = fract*temp + f1;
-}
-/**    
- * @} end of SinCos group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c b/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c
deleted file mode 100644
index 2e96bedb..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/ControllerFunctions/arm_sin_cos_q31.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_cos_q31.c    
-*    
-* Description:	Cosine & Sine calculation for Q31 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupController    
- */
-
- /**    
- * @addtogroup SinCos    
- * @{    
- */
-
-/**    
- * @brief  Q31 sin_cos function.   
- * @param[in]  theta    scaled input value in degrees    
- * @param[out] *pSinVal points to the processed sine output.    
- * @param[out] *pCosVal points to the processed cosine output.    
- * @return none.   
- *    
- * The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].   
- *    
- */
-
-void arm_sin_cos_q31(
-  q31_t theta,
-  q31_t * pSinVal,
-  q31_t * pCosVal)
-{
-  q31_t fract;                                 /* Temporary variables for input, output */
-  uint16_t indexS, indexC;                     /* Index variable */
-  q31_t f1, f2, d1, d2;                        /* Two nearest output values */
-  q31_t Dn, Df;
-  q63_t temp;
-  
-  /* Calculate the nearest index */
-  indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT;
-  indexC = (indexS + 128) & 0x1ff;
-
-  /* Calculation of fractional value */
-  fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;
-  
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_q31[indexC+0];
-  f2 = sinTable_q31[indexC+1];
-  d1 = -sinTable_q31[indexS+0];
-  d2 = -sinTable_q31[indexS+1];
-
-  Dn = 0x1921FB5; // delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*((q63_t)d1 + d2);
-  temp = temp - ((q63_t)Df << 32);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + (q63_t)d1*Dn;
-  temp = (q63_t)fract*(temp >> 31);
-
-  /* Calculation of cosine value */
-  *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
-  
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_q31[indexS+0];
-  f2 = sinTable_q31[indexS+1];
-  d1 = sinTable_q31[indexC+0];
-  d2 = sinTable_q31[indexC+1];
-
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn*((q63_t)d1 + d2);
-  temp = temp - ((q63_t)Df << 32);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + ((3*(q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1))*Dn);
-  temp = (q63_t)fract*(temp >> 31);
-  temp = temp + (q63_t)d1*Dn;
-  temp = (q63_t)fract*(temp >> 31);
-  
-  /* Calculation of sine value */
-  *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
-}
-
-/**    
- * @} end of SinCos group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c
deleted file mode 100644
index a12dd14a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_f32.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cos_f32.c    
-*    
-* Description:	Fast cosine calculation for floating-point values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-/**    
- * @ingroup groupFastMath    
- */
-
-/**    
- * @defgroup cos Cosine    
- *    
- * Computes the trigonometric cosine function using a combination of table lookup   
- * and cubic interpolation.  There are separate functions for   
- * Q15, Q31, and floating-point data types.   
- * The input to the floating-point version is in radians while the   
- * fixed-point Q15 and Q31 have a scaled input with the range   
- * [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
- * value of 2*pi wraps around to 0.
- *   
- * The implementation is based on table lookup using 256 values together with cubic interpolation.   
- * The steps used are:   
- *  -# Calculation of the nearest integer table index   
- *  -# Fetch the four table values a, b, c, and d     
- *  -# Compute the fractional portion (fract) of the table index.   
- *  -# Calculation of wa, wb, wc, wd    
- *  -# The final result equals a*wa + b*wb + c*wc + d*wd   
- *   
- * where   
- * 
    
- *    a=Table[index-1];    
- *    b=Table[index+0];    
- *    c=Table[index+1];    
- *    d=Table[index+2];    
- * 
   
- * and   
- * 
    
- *    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;    
- *    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;    
- *    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;    
- *    wd=(1/6)*fract.^3 - (1/6)*fract;    
- * 
    
- */
-
- /**    
- * @addtogroup cos    
- * @{    
- */
-
-/**   
- * @brief  Fast approximation to the trigonometric cosine function for floating-point data.   
- * @param[in] x input value in radians.   
- * @return cos(x).   
- */
-
-float32_t arm_cos_f32(
-  float32_t x)
-{
-  float32_t cosVal, fract, in;                   /* Temporary variables for input, output */
-  uint16_t index;                                /* Index variable */
-  float32_t a, b;                                /* Two nearest output values */
-  int32_t n;
-  float32_t findex;
-
-  /* input x is in radians */
-  /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
-  in = x * 0.159154943092f + 0.25f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if(in < 0.0f)
-  {
-    n--;
-  }
-
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
-  index = ((uint16_t)findex) & 0x1ff;
-
-  /* fractional value calculation */
-  fract = findex - (float32_t) index;
-
-  /* Read two nearest values of input value from the cos table */
-  a = sinTable_f32[index];
-  b = sinTable_f32[index+1];
-
-  /* Linear interpolation process */
-  cosVal = (1.0f-fract)*a + fract*b;
-
-  /* Return the output value */
-  return (cosVal);
-}
-
-/**    
- * @} end of cos group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c
deleted file mode 100644
index 7cfac3bf..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q15.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cos_q15.c    
-*    
-* Description:	Fast cosine calculation for Q15 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup cos    
- * @{    
- */
-
-/**   
- * @brief Fast approximation to the trigonometric cosine function for Q15 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  cos(x).   
- *   
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian
- * value in the range [0 2*pi).
- */
-
-q15_t arm_cos_q15(
-  q15_t x)
-{
-  q15_t sinVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q15_t a, b;                                    /* Four nearest output values */
-  q15_t fract;                                   /* Temporary values for fractional values */
-
-  /* add 0.25 (pi/2) to read sine table */
-  x += 0x2000;
-  if(x < 0)
-  {   /* convert negative numbers to corresponding positive ones */
-      x = x + 0x8000;
-  }
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q15[index];
-  b = sinTable_q15[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (q31_t)(0x8000-fract)*a >> 16;
-  sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
-
-  return sinVal << 1;
-}
-
-/**    
- * @} end of cos group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c
deleted file mode 100644
index 6b198c8c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_cos_q31.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_cos_q31.c    
-*    
-* Description:	Fast cosine calculation for Q31 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup cos    
- * @{    
- */
-
-/**   
- * @brief Fast approximation to the trigonometric cosine function for Q31 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  cos(x).   
- *   
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian
- * value in the range [0 2*pi).
- */
-
-q31_t arm_cos_q31(
-  q31_t x)
-{
-  q31_t cosVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q31_t a, b;                                    /* Four nearest output values */
-  q31_t fract;                                   /* Temporary values for fractional values */
-
-  /* add 0.25 (pi/2) to read sine table */
-  x += 0x20000000;
-  if(x < 0)
-  {   /* convert negative numbers to corresponding positive ones */
-      x = x + 0x80000000;
-  }
-  
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q31[index];
-  b = sinTable_q31[index+1];
-
-  /* Linear interpolation process */
-  cosVal = (q63_t)(0x80000000-fract)*a >> 32;
-  cosVal = (q31_t)((((q63_t)cosVal << 32) + ((q63_t)fract*b)) >> 32);
-
-  return cosVal << 1;
-}
-
-/**    
- * @} end of cos group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c
deleted file mode 100644
index c708abf4..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_f32.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_f32.c    
-*    
-* Description:	Fast sine calculation for floating-point values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
-/**    
- * @defgroup sin Sine    
- *    
- * Computes the trigonometric sine function using a combination of table lookup   
- * and cubic interpolation.  There are separate functions for   
- * Q15, Q31, and floating-point data types.   
- * The input to the floating-point version is in radians while the   
- * fixed-point Q15 and Q31 have a scaled input with the range   
- * [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
- * value of 2*pi wraps around to 0.
- *   
- * The implementation is based on table lookup using 256 values together with cubic interpolation.   
- * The steps used are:   
- *  -# Calculation of the nearest integer table index   
- *  -# Fetch the four table values a, b, c, and d     
- *  -# Compute the fractional portion (fract) of the table index.   
- *  -# Calculation of wa, wb, wc, wd    
- *  -# The final result equals a*wa + b*wb + c*wc + d*wd   
- *   
- * where   
- * 
    
- *    a=Table[index-1];    
- *    b=Table[index+0];    
- *    c=Table[index+1];    
- *    d=Table[index+2];    
- * 
   
- * and   
- * 
    
- *    wa=-(1/6)*fract.^3 + (1/2)*fract.^2 - (1/3)*fract;    
- *    wb=(1/2)*fract.^3 - fract.^2 - (1/2)*fract + 1;    
- *    wc=-(1/2)*fract.^3+(1/2)*fract.^2+fract;    
- *    wd=(1/6)*fract.^3 - (1/6)*fract;    
- * 
    
- */
-
-/**    
- * @addtogroup sin    
- * @{    
- */
-
-/**   
- * @brief  Fast approximation to the trigonometric sine function for floating-point data.   
- * @param[in] x input value in radians.   
- * @return  sin(x).   
- */
-
-float32_t arm_sin_f32(
-  float32_t x)
-{
-  float32_t sinVal, fract, in;                           /* Temporary variables for input, output */
-  uint16_t index;                                        /* Index variable */
-  float32_t a, b;                                        /* Two nearest output values */
-  int32_t n;
-  float32_t findex;
-
-  /* input x is in radians */
-  /* Scale the input to [0 1] range from [0 2*PI] , divide input by 2*pi */
-  in = x * 0.159154943092f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if(x < 0.0f)
-  {
-    n--;
-  }
-
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  findex = (float32_t) FAST_MATH_TABLE_SIZE * in;
-  index = ((uint16_t)findex) & 0x1ff;
-
-  /* fractional value calculation */
-  fract = findex - (float32_t) index;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_f32[index];
-  b = sinTable_f32[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (1.0f-fract)*a + fract*b;
-
-  /* Return the output value */
-  return (sinVal);
-}
-
-/**    
- * @} end of sin group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c
deleted file mode 100644
index 0f802c61..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q15.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_q15.c    
-*    
-* Description:	Fast sine calculation for Q15 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup sin    
- * @{    
- */
-
-/**   
- * @brief Fast approximation to the trigonometric sine function for Q15 data.   
- * @param[in] x Scaled input value in radians.   
- * @return  sin(x).   
- *   
- * The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi).
- */
-
-q15_t arm_sin_q15(
-  q15_t x)
-{
-  q15_t sinVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q15_t a, b;                                    /* Four nearest output values */
-  q15_t fract;                                   /* Temporary values for fractional values */
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q15[index];
-  b = sinTable_q15[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (q31_t)(0x8000-fract)*a >> 16;
-  sinVal = (q15_t)((((q31_t)sinVal << 16) + ((q31_t)fract*b)) >> 16);
-
-  return sinVal << 1;
-}
-
-/**    
- * @} end of sin group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c
deleted file mode 100644
index 36112ab8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sin_q31.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_sin_q31.c    
-*    
-* Description:	Fast sine calculation for Q31 values.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupFastMath    
- */
-
- /**    
- * @addtogroup sin    
- * @{    
- */
-
-/**   
- * @brief Fast approximation to the trigonometric sine function for Q31 data.
- * @param[in] x Scaled input value in radians.
- * @return  sin(x).
- *
- * The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*pi). */
-
-q31_t arm_sin_q31(
-  q31_t x)
-{
-  q31_t sinVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variables */
-  q31_t a, b;                                    /* Four nearest output values */
-  q31_t fract;                                   /* Temporary values for fractional values */
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q31[index];
-  b = sinTable_q31[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (q63_t)(0x80000000-fract)*a >> 32;
-  sinVal = (q31_t)((((q63_t)sinVal << 32) + ((q63_t)fract*b)) >> 32);
-
-  return sinVal << 1;
-}
-
-/**    
- * @} end of sin group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c
deleted file mode 100644
index 60a3a216..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q15.c
+++ /dev/null
@@ -1,155 +0,0 @@
-/* ----------------------------------------------------------------------     
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.  
-*     
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*     
-* Project:      CMSIS DSP Library  
-* Title:		arm_sqrt_q15.c     
-*     
-* Description:	Q15 square root function.    
-*     
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-
-/**     
- * @ingroup groupFastMath     
- */
-
-/**     
- * @addtogroup SQRT     
- * @{     
- */
-
-  /**    
-   * @brief  Q15 square root function.    
-   * @param[in]   in     input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.    
-   * @param[out]  *pOut  square root of input value.    
-   * @return The function returns ARM_MATH_SUCCESS if the input value is positive
-   * and ARM_MATH_ARGUMENT_ERROR if the input is negative.  For
-   * negative inputs, the function returns *pOut = 0.
-   */
-
-arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut)
-{
-  q15_t number, temp1, var1, signBits1, half;
-  q31_t bits_val1;
-  float32_t temp_float1;
-  union
-  {
-    q31_t fracval;
-    float32_t floatval;
-  } tempconv;
-
-  number = in;
-
-  /* If the input is a positive number then compute the signBits. */
-  if(number > 0)
-  {
-    signBits1 = __CLZ(number) - 17;
-
-    /* Shift by the number of signBits1 */
-    if((signBits1 % 2) == 0)
-    {
-      number = number << signBits1;
-    }
-    else
-    {
-      number = number << (signBits1 - 1);
-    }
-
-    /* Calculate half value of the number */
-    half = number >> 1;
-    /* Store the number for later use */
-    temp1 = number;
-
-    /*Convert to float */
-    temp_float1 = number * 3.051757812500000e-005f;
-    /*Store as integer */
-    tempconv.floatval = temp_float1;
-    bits_val1 = tempconv.fracval;
-    /* Subtract the shifted value from the magic number to give intial guess */
-    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  // gives initial guess  
-    /* Store as float */
-    tempconv.fracval = bits_val1;
-    temp_float1 = tempconv.floatval;
-    /* Convert to integer format */
-    var1 = (q31_t) (temp_float1 * 16384);
-
-    /* 1st iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-    /* 2nd iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-    /* 3rd iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-
-    /* Multiply the inverse square root with the original value */
-    var1 = ((q15_t) (((q31_t) temp1 * var1) >> 15)) << 1;
-
-    /* Shift the output down accordingly */
-    if((signBits1 % 2) == 0)
-    {
-      var1 = var1 >> (signBits1 / 2);
-    }
-    else
-    {
-      var1 = var1 >> ((signBits1 - 1) / 2);
-    }
-    *pOut = var1;
-
-    return (ARM_MATH_SUCCESS);
-  }
-  /* If the number is a negative number then store zero as its square root value */
-  else
-  {
-    *pOut = 0;
-    return (ARM_MATH_ARGUMENT_ERROR);
-  }
-}
-
-/**     
- * @} end of SQRT group     
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c
deleted file mode 100644
index e0fc4736..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FastMathFunctions/arm_sqrt_q31.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------     
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.  
-*     
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*     
-* Project:      CMSIS DSP Library  
-* Title:		arm_sqrt_q31.c     
-*     
-* Description:	Q31 square root function.    
-*     
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**     
- * @ingroup groupFastMath     
- */
-
-/**     
- * @addtogroup SQRT     
- * @{     
- */
-
-/**    
- * @brief Q31 square root function.    
- * @param[in]   in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.    
- * @param[out]  *pOut square root of input value.    
- * @return The function returns ARM_MATH_SUCCESS if the input value is positive
- * and ARM_MATH_ARGUMENT_ERROR if the input is negative.  For
- * negative inputs, the function returns *pOut = 0.
- */
-
-arm_status arm_sqrt_q31(
-  q31_t in,
-  q31_t * pOut)
-{
-  q31_t number, temp1, bits_val1, var1, signBits1, half;
-  float32_t temp_float1;
-  union
-  {
-      q31_t fracval;
-      float32_t floatval;
-  } tempconv;
-
-  number = in;
-
-  /* If the input is a positive number then compute the signBits. */
-  if(number > 0)
-  {
-    signBits1 = __CLZ(number) - 1;
-
-    /* Shift by the number of signBits1 */
-    if((signBits1 % 2) == 0)
-    {
-      number = number << signBits1;
-    }
-    else
-    {
-      number = number << (signBits1 - 1);
-    }
-
-    /* Calculate half value of the number */
-    half = number >> 1;
-    /* Store the number for later use */
-    temp1 = number;
-
-    /*Convert to float */
-    temp_float1 = number * 4.6566128731e-010f;
-    /*Store as integer */
-    tempconv.floatval = temp_float1;
-    bits_val1 = tempconv.fracval;
-    /* Subtract the shifted value from the magic number to give intial guess */
-    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  // gives initial guess  
-    /* Store as float */
-    tempconv.fracval = bits_val1;
-    temp_float1 = tempconv.floatval;
-    /* Convert to integer format */
-    var1 = (q31_t) (temp_float1 * 1073741824);
-
-    /* 1st iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-    /* 2nd iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-    /* 3rd iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-
-    /* Multiply the inverse square root with the original value */
-    var1 = ((q31_t) (((q63_t) temp1 * var1) >> 31)) << 1;
-
-    /* Shift the output down accordingly */
-    if((signBits1 % 2) == 0)
-    {
-      var1 = var1 >> (signBits1 / 2);
-    }
-    else
-    {
-      var1 = var1 >> ((signBits1 - 1) / 2);
-    }
-    *pOut = var1;
-
-    return (ARM_MATH_SUCCESS);
-  }
-  /* If the number is a negative number then store zero as its square root value */
-  else
-  {
-    *pOut = 0;
-    return (ARM_MATH_ARGUMENT_ERROR);
-  }
-}
-
-/**     
- * @} end of SQRT group     
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
deleted file mode 100644
index 967260f2..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_32x64_init_q31.c    
-*    
-* Description:	High precision Q31 Biquad cascade filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1_32x64    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           	points to an instance of the high precision Q31 Biquad cascade filter structure.    
- * @param[in]     numStages     number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs      points to the filter coefficients.    
- * @param[in]     *pState       points to the state buffer.    
- * @param[in]     postShift     Shift to be applied after the accumulator.  Varies according to the coefficients format.    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState points to state variables array and size of each state variable is 1.63 format.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the state array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cas_df1_32x64_init_q31(
-  arm_biquad_cas_df1_32x64_ins_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q63_t * pState,
-  uint8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q63_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1_32x64 group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
deleted file mode 100644
index e54f40ea..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
+++ /dev/null
@@ -1,561 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_32x64_q31.c    
-*    
-* Description:	High precision Q31 Biquad cascade filter processing function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter    
- *    
- * This function implements a high precision Biquad cascade filter which operates on    
- * Q31 data values.  The filter coefficients are in 1.31 format and the state variables    
- * are in 1.63 format.  The double precision state variables reduce quantization noise    
- * in the filter and provide a cleaner output.    
- * These filters are particularly useful when implementing filters in which the    
- * singularities are close to the unit circle.  This is common for low pass or high    
- * pass filters with very low cutoff frequencies.    
- *    
- * The function operates on blocks of input and output data    
- * and each call to the function processes blockSize samples through    
- * the filter. pSrc and pDst points to input and output arrays    
- * containing blockSize Q31 values.    
- *    
- * \par Algorithm    
- * Each Biquad stage implements a second order filter using the difference equation:    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
- * 
    
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.    
- * \image html Biquad.gif "Single Biquad filter stage"    
- * Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.    
- * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.    
- * Pay careful attention to the sign of the feedback coefficients.    
- * Some design tools use the difference equation    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
- * 
    
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.    
- *    
- * \par    
- * Higher order filters are realized as a cascade of second order sections.    
- * numStages refers to the number of second order stages used.    
- * For example, an 8th order filter would be realized with numStages=4 second order stages.    
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"    
- * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).    
- *    
- * \par    
- * The pState points to state variables array .    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2] and each state variable in 1.63 format to improve precision.    
- * The state variables are arranged in the array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- *    
- * \par    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values of data in 1.63 format.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- *    
- * \par Init Function    
- * There is also an associated initialization function which performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero. 
- *
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * For example, to statically initialize the filter instance structure use    
- * 
    
- *     arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};    
- * 
    
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; postShift shift to be applied which is described in detail below.    
- * \par Fixed-Point Behavior    
- * Care must be taken while using Biquad Cascade 32x64 filter function.    
- * Following issues must be considered:    
- * - Scaling of coefficients    
- * - Filter gain    
- * - Overflow and saturation    
- *    
- * \par    
- * Filter coefficients are represented as fractional values and    
- * restricted to lie in the range [-1 +1).    
- * The processing function has an additional scaling parameter postShift    
- * which allows the filter coefficients to exceed the range [+1 -1).    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"    
- * This essentially scales the filter coefficients by 2^postShift.    
- * For example, to realize the coefficients    
- * 
    
- *    {1.5, -0.8, 1.2, 1.6, -0.9}    
- * 
    
- * set the Coefficient array to:    
- * 
    
- *    {0.75, -0.4, 0.6, 0.8, -0.45}    
- * 
    
- * and set postShift=1    
- *    
- * \par    
- * The second thing to keep in mind is the gain through the filter.    
- * The frequency response of a Biquad filter is a function of its coefficients.    
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.    
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.    
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.    
- *    
- * \par    
- * The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.    
- * This is described in the function specific documentation below.    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1_32x64    
- * @{    
- */
-
-/**    
- * @details    
-    
- * @param[in]  *S points to an instance of the high precision Q31 Biquad cascade filter.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).    
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to    
- * 1.31 format by discarding the low 32 bits.    
- *    
- * \par    
- * Two related functions are provided in the CMSIS DSP library.    
- * arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.    
- * arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.    
- */
-
-void arm_biquad_cas_df1_32x64_q31(
-  const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q63_t *pState = S->pState;                     /*  state pointer initialization  */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q63_t acc;                                     /*  accumulator                   */
-  q31_t Xn1, Xn2;                                /*  Input Filter state variables        */
-  q63_t Yn1, Yn2;                                /*  Output Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-  q31_t acc_l, acc_h;                            /*  temporary output               */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = (q31_t) (pState[0]);
-    Xn2 = (q31_t) (pState[1]);
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /* The variable acc hold output value that is being computed and    
-     * stored in the destination buffer    
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling. Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* The result is converted to 1.63 , Yn2 variable is reused */
-      Yn2 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut = acc_h;
-
-      /* Read the second input into Xn2, to reuse the value */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc +=  b1 * x[n-1] */
-      acc = (q63_t) Xn *b1;
-
-      /* acc =  b0 * x[n] */
-      acc += (q63_t) Xn2 *b0;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn1 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn2, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn1, a2);
-
-      /* The result is converted to 1.63, Yn1 variable is reused */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Read the third input into Xn1, to reuse the value */
-      Xn1 = *pIn++;
-
-      /* The result is converted to 1.31 */
-      /* Store the output in the destination buffer. */
-      *(pOut + 1u) = acc_h;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn1 *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn2 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* The result is converted to 1.63, Yn2 variable is reused  */
-      Yn2 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *(pOut + 2u) = acc_h;
-
-      /* Read the fourth input into Xn, to reuse the value */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn2, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn1, a2);
-
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *(pOut + 3u) = acc_h;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* update output pointer */
-      pOut += 4u;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut++ = acc_h;
-      //Yn1 = acc << shift; 
-
-      /* Store the output in the destination buffer in 1.31 format. */
-//      *pOut++ = (q31_t) (acc >> (32 - shift)); 
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage output is given as input to the second stage. */
-    pIn = pDst;
-
-    /* Reset to destination buffer working pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = (q63_t) Xn1;
-    *pState++ = (q63_t) Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* The variable acc hold output value that is being computed and        
-     * stored in the destination buffer            
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]            
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn *b0;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 *b1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 *b2;
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut++ = acc_h;
-
-      //Yn1 = acc << shift; 
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      //*pOut++ = (q31_t) (acc >> (32 - shift)); 
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage output is given as input to the second stage. */
-    pIn = pDst;
-
-    /* Reset to destination buffer working pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = (q63_t) Xn1;
-    *pState++ = (q63_t) Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*    #ifndef ARM_MATH_CM0_FAMILY     */
-}
-
-  /**    
-   * @} end of BiquadCascadeDF1_32x64 group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
deleted file mode 100644
index a8a7adf8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
+++ /dev/null
@@ -1,425 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_f32.c    
-*    
-* Description:	Processing function for the    
-*               floating-point Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure    
- *    
- * This set of functions implements arbitrary order recursive (IIR) filters.    
- * The filters are implemented as a cascade of second order Biquad sections.    
- * The functions support Q15, Q31 and floating-point data types.  
- * Fast version of Q15 and Q31 also supported on CortexM4 and Cortex-M3.    
- *    
- * The functions operate on blocks of input and output data and each call to the function    
- * processes blockSize samples through the filter.    
- * pSrc points to the array of input data and    
- * pDst points to the array of output data.    
- * Both arrays contain blockSize values.    
- *    
- * \par Algorithm    
- * Each Biquad stage implements a second order filter using the difference equation:    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
- * 
    
- * A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.    
- * \image html Biquad.gif "Single Biquad filter stage"    
- * Coefficients b0, b1 and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.    
- * Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.    
- * Pay careful attention to the sign of the feedback coefficients.    
- * Some design tools use the difference equation    
- * 
    
- *     y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]    
- * 
    
- * In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.    
- *    
- * \par    
- * Higher order filters are realized as a cascade of second order sections.    
- * numStages refers to the number of second order stages used.    
- * For example, an 8th order filter would be realized with numStages=4 second order stages.    
- * \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"    
- * A 9th order filter would be realized with numStages=5 second order stages with the coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).    
- *    
- * \par    
- * The pState points to state variables array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- *    
- * \par    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Init Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *     arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};    
- *     arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};    
- *     arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};    
- * 
    
- * where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; postShift shift to be applied.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.    
- * Following issues must be considered:    
- * - Scaling of coefficients    
- * - Filter gain    
- * - Overflow and saturation    
- *    
- * \par    
- * Scaling of coefficients:     
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift    
- * which allow the filter coefficients to exceed the range [+1 -1).    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"    
- * This essentially scales the filter coefficients by 2^postShift.    
- * For example, to realize the coefficients    
- * 
    
- *    {1.5, -0.8, 1.2, 1.6, -0.9}    
- * 
    
- * set the pCoeffs array to:    
- * 
    
- *    {0.75, -0.4, 0.6, 0.8, -0.45}    
- * 
    
- * and set postShift=1    
- *    
- * \par    
- * Filter gain:     
- * The frequency response of a Biquad filter is a function of its coefficients.    
- * It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.    
- * This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.    
- * To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.    
- *    
- * \par    
- * Overflow and saturation:     
- * For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @param[in]  *S         points to an instance of the floating-point Biquad cascade structure.    
- * @param[in]  *pSrc      points to the block of input data.    
- * @param[out] *pDst      points to the block of output data.    
- * @param[in]  blockSize  number of samples to process per call.    
- * @return     none.    
- *    
- */
-
-void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /*  source pointer            */
-  float32_t *pOut = pDst;                        /*  destination pointer       */
-  float32_t *pState = S->pState;                 /*  pState pointer            */
-  float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-  float32_t acc;                                 /*  Simulates the accumulator */
-  float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-  float32_t Xn1, Xn2, Yn1, Yn2;                  /*  Filter pState variables   */
-  float32_t Xn;                                  /*  temporary input           */
-  uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the first input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the third input */
-      Xn1 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-
-      /* Read the forth input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = blockSize & 0x3u;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* decrement the loop counter */
-      sample--;
-
-    }
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:        
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1]   + a2 * y[n-2]        
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY         */
-
-}
-
-
-  /**    
-   * @} end of BiquadCascadeDF1 group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
deleted file mode 100644
index 1cd441e9..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_fast_q15.c    
-*    
-* Description:	Fast processing function for the    
-*				Q15 Biquad cascade filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).    
- * The 2.30 accumulator is then shifted by postShift bits and the result truncated to 1.15 format by discarding the low 16 bits.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_biquad_cascade_df1_init_q15() to initialize the filter structure.    
- *    
- */
-
-void arm_biquad_cascade_df1_fast_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q31_t in;                                      /*  Temporary variable to hold input value       */
-  q31_t out;                                     /*  Temporary variable to hold output value      */
-  q31_t b0;                                      /*  Temporary variable to hold bo value          */
-  q31_t b1, a1;                                  /*  Filter coefficients                          */
-  q31_t state_in, state_out;                     /*  Filter state variables                       */
-  q31_t acc;                                     /*  Accumulator                                  */
-  int32_t shift = (int32_t) (15 - S->postShift); /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = S->numStages;         /*  Stage loop counter                           */
-
-
-
-  do
-  {
-
-    /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = *__SIMD32(pCoeffs)++;
-
-    /* Read the b1 and b2 coefficients using SIMD */
-    b1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the a1 and a2 coefficients using SIMD */
-    a1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = *__SIMD32(pState)++;
-
-    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = *__SIMD32(pState)--;
-
-    /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:       
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     */
-    sample = blockSize >> 1u;
-
-    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.    
-     ** a second loop below computes the remaining 1 sample. */
-    while(sample > 0u)
-    {
-
-      /* Read the input */
-      in = *__SIMD32(pIn)++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUAD(b0, in);
-      /* acc =  b1 * x[n-1] + acc +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
-      state_out = __PKHBT(state_out >> 16, (out), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUADX(b0, in);
-      /* acc0 =  b1 * x[n-1] , acc0 +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-
-      /* Store the output in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in >> 16, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-      /* Decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-
-    if((blockSize & 0x1u) != 0u)
-    {
-      /* Read the input */
-      in = *pIn++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      out = __SMUAD(b0, in);
-
-#else
-
-      out = __SMUADX(b0, in);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) out;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer.  */
-    /*  Subsequent (numStages - 1) occur in-place in the output buffer  */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the state array */
-    *__SIMD32(pState)++ = state_in;
-    *__SIMD32(pState)++ = state_out;
-
-
-    /* Decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-}
-
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
deleted file mode 100644
index 7a17e3da..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_fast_q31.c    
-*    
-* Description:	Processing function for the    
-*				Q31 Fast Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in]  *S        points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return 	   none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function    
- * arm_biquad_cascade_df1_init_q31() to initialize filter structure.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_biquad_cascade_df1_init_q31() to initialize the filter structure.    
- */
-
-void arm_biquad_cascade_df1_fast_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t acc = 0;                                 /*  accumulator                   */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn;                                      /*  temporary input               */
-  int32_t shift = (int32_t) S->postShift + 1;    /*  Shift to be applied to the output */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variables acc ... acc3 hold output values that are being computed:       
-     *       
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]       
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      //acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);
-      mult_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b1 * x[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);   
-      multAcc_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b[2] * x[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31 , Yn2 variable is reused */
-      Yn2 = acc << shift;
-
-      /* Read the second input */
-      Xn2 = *(pIn + 1u);
-
-      /* Store the output in the destination buffer. */
-      *pOut = Yn2;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      //acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);
-      mult_32x32_keep32_R(acc, b0, Xn2);
-      /* acc +=  b1 * x[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);
-      multAcc_32x32_keep32_R(acc, b1, Xn);
-      /* acc +=  b[2] * x[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);
-      multAcc_32x32_keep32_R(acc, b2, Xn1);
-      /* acc +=  a1 * y[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, a1, Yn2);
-      /* acc +=  a2 * y[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
-      multAcc_32x32_keep32_R(acc, a2, Yn1);
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Read the third input  */
-      Xn1 = *(pIn + 2u);
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 1u) = Yn1;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      //acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);
-      mult_32x32_keep32_R(acc, b0, Xn1);
-      /* acc +=  b1 * x[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, b1, Xn2);
-      /* acc +=  b[2] * x[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);
-      multAcc_32x32_keep32_R(acc, b2, Xn);
-      /* acc +=  a1 * y[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31, Yn2 variable is reused  */
-      Yn2 = acc << shift;
-
-      /* Read the forth input */
-      Xn = *(pIn + 3u);
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 2u) = Yn2;
-      pIn += 4u;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      //acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
-      mult_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b1 * x[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
-      multAcc_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b[2] * x[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, a1, Yn2);
-      /* acc +=  a2 * y[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);
-      multAcc_32x32_keep32_R(acc, a2, Yn1);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      Xn2 = Xn1;
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Xn1 = Xn     */
-      Xn1 = Xn;
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 3u) = Yn1;
-      pOut += 4u;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-   while(sample > 0u)
-   {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      //acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);
-      mult_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b1 * x[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);
-      multAcc_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b[2] * x[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      //acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31  */
-      acc = acc << shift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = acc;
-
-      /* decrement the loop counter */
-      sample--;
-   }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-}
-
-/**    
-  * @} end of BiquadCascadeDF1 group    
-  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
deleted file mode 100644
index e090f251..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_init_f32.c    
-*    
-* Description:  floating-point Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- * @brief  Initialization function for the floating-point Biquad cascade filter.    
- * @param[in,out] *S           points to an instance of the floating-point Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients array.    
- * @param[in]     *pState      points to the state array.    
- * @return        none    
- *    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- *    
- */
-
-void arm_biquad_cascade_df1_init_f32(
-  arm_biquad_casd_df1_inst_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
deleted file mode 100644
index 72f02b75..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df1_init_q15.c    
-*    
-* Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients.    
- * @param[in]     *pState      points to the state buffer.    
- * @param[in]     postShift    Shift to be applied to the accumulator result. Varies according to the coefficients format    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 6*numStages values.    
- * The zero coefficient between b1 and b2 facilities  use of 16-bit SIMD instructions on the Cortex-M4.    
- *    
- * \par    
- * The state variables are stored in the array pState.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df1_init_q15(
-  arm_biquad_casd_df1_inst_q15 * S,
-  uint8_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
deleted file mode 100644
index fec08d98..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_init_q31.c    
-*    
-* Description:	Q31 Biquad cascade DirectFormI(DF1) filter initialization function.    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S           points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]     numStages    number of 2nd order stages in the filter.    
- * @param[in]     *pCoeffs     points to the filter coefficients buffer.    
- * @param[in]     *pState      points to the state buffer.    
- * @param[in]     postShift    Shift to be applied after the accumulator.  Varies according to the coefficients format    
- * @return        none    
- *    
- * Coefficient and State Ordering:    
- *    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState points to state variables array.    
- * Each Biquad stage has 4 state variables x[n-1], x[n-2], y[n-1], and y[n-2].    
- * The state variables are arranged in the pState array as:    
- * 
    
- *     {x[n-1], x[n-2], y[n-1], y[n-2]}    
- * 
    
- * The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.    
- * The state array has a total length of 4*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df1_init_q31(
-  arm_biquad_casd_df1_inst_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
deleted file mode 100644
index 43bf90ba..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
+++ /dev/null
@@ -1,411 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_q15.c    
-*    
-* Description:	Processing function for the    
-*				Q15 Biquad cascade DirectFormI(DF1) filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 Biquad cascade filter.    
- * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[out] *pDst points to the location where the output result is written.    
- * @param[in]  blockSize number of samples to process per call.    
- * @return none.    
- *    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is then shifted by postShift bits to truncate the result to 1.15 format by discarding the low 16 bits.    
- * Finally, the result is saturated to 1.15 format.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_biquad_cascade_df1_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q31_t in;                                      /*  Temporary variable to hold input value       */
-  q31_t out;                                     /*  Temporary variable to hold output value      */
-  q31_t b0;                                      /*  Temporary variable to hold bo value          */
-  q31_t b1, a1;                                  /*  Filter coefficients                          */
-  q31_t state_in, state_out;                     /*  Filter state variables                       */
-  q31_t acc_l, acc_h;
-  q63_t acc;                                     /*  Accumulator                                  */
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
-  int32_t uShift = (32 - lShift);
-
-  do
-  {
-    /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = *__SIMD32(pCoeffs)++;
-
-    /* Read the b1 and b2 coefficients using SIMD */
-    b1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the a1 and a2 coefficients using SIMD */
-    a1 = *__SIMD32(pCoeffs)++;
-
-    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = *__SIMD32(pState)++;
-
-    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = *__SIMD32(pState)--;
-
-    /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-    sample = blockSize >> 1u;
-
-    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.    
-     ** a second loop below computes the remaining 1 sample. */
-    while(sample > 0u)
-    {
-
-      /* Read the input */
-      in = *__SIMD32(pIn)++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUAD(b0, in);
-
-      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, (in >> 16), 16);
-      state_out = __PKHBT(state_out >> 16, (out), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUADX(b0, in);
-      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Store the output in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT(state_out, out, 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT(out, state_out >> 16, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in >> 16, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-      /* Decrement the loop counter */
-      sample--;
-
-    }
-
-    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-
-    if((blockSize & 0x1u) != 0u)
-    {
-      /* Read the input */
-      in = *pIn++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      out = __SMUAD(b0, in);
-
-#else
-
-      out = __SMUADX(b0, in);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) out;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc   */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-
-#else
-
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    }
-
-    /*  The first stage goes from the input wire to the output wire.  */
-    /*  Subsequent numStages occur in-place in the output wire  */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the state array */
-    *__SIMD32(pState)++ = state_in;
-    *__SIMD32(pState)++ = state_out;
-
-
-    /* Decrement the loop counter */
-    stage--;
-
-  } while(stage > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn = pSrc;                             /*  Source pointer                               */
-  q15_t *pOut = pDst;                            /*  Destination pointer                          */
-  q15_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q15_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q15_t Xn;                                      /*  temporary input               */
-  q63_t acc;                                     /*  Accumulator                                  */
-  int32_t shift = (15 - (int32_t) S->postShift); /*  Post shift                                   */
-  q15_t *pState = S->pState;                     /*  State pointer                                */
-  q15_t *pCoeffs = S->pCoeffs;                   /*  Coefficient pointer                          */
-  uint32_t sample, stage = (uint32_t) S->numStages;     /*  Stage loop counter                           */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    pCoeffs++;  // skip the 0 coefficient
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:         
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]         
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) b0 *Xn;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q31_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q31_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q31_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q31_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = __SSAT((acc >> shift), 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q15_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*     #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-/**    
- * @} end of BiquadCascadeDF1 group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
deleted file mode 100644
index c30163e6..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
+++ /dev/null
@@ -1,405 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df1_q31.c    
-*    
-* Description:	Processing function for the    
-*				Q31 Biquad cascade filter    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF1    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 Biquad cascade filter.    
- * @param[in]  *S         points to an instance of the Q31 Biquad cascade structure.    
- * @param[in]  *pSrc      points to the block of input data.    
- * @param[out] *pDst      points to the block of output data.    
- * @param[in]  blockSize  number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).    
- * After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by postShift bits and the result truncated to    
- * 1.31 format by discarding the low 32 bits.    
- *    
- * \par    
- * Refer to the function arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_biquad_cascade_df1_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q63_t acc;                                     /*  accumulator                   */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-  q31_t *pIn = pSrc;                             /*  input pointer initialization  */
-  q31_t *pOut = pDst;                            /*  output pointer initialization */
-  q31_t *pState = S->pState;                     /*  pState pointer initialization */
-  q31_t *pCoeffs = S->pCoeffs;                   /*  coeff pointer initialization  */
-  q31_t Xn1, Xn2, Yn1, Yn2;                      /*  Filter state variables        */
-  q31_t b0, b1, b2, a1, a2;                      /*  Filter coefficients           */
-  q31_t Xn;                                      /*  temporary input               */
-  uint32_t sample, stage = S->numStages;         /*  loop counters                     */
-
-
-#ifndef ARM_MATH_CM0_FAMILY_FAMILY
-
-  q31_t acc_l, acc_h;                            /*  temporary output variables    */
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:    
-     *    
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]    
-     */
-
-    sample = blockSize >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31 , Yn2 variable is reused */
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn2;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn1;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn2;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn1;
-
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Read the third input  */
-      Xn1 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn1;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn2;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31, Yn2 variable is reused  */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Read the forth input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn2;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn1;
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = Yn1;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    sample = (blockSize & 0x3u);
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = acc >> lShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q31_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /*      The variables acc holds the output value that is computed:         
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]         
-     */
-
-    sample = blockSize;
-
-    while(sample > 0u)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) b0 *Xn;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q63_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q63_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = acc >> lShift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1    */
-      /* Xn1 = Xn     */
-      /* Yn2 = Yn1    */
-      /* Yn1 = acc    */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q31_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while(--stage);
-
-#endif /*  #ifndef ARM_MATH_CM0_FAMILY_FAMILY */
-}
-
-
-
-
-/**    
-  * @} end of BiquadCascadeDF1 group    
-  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
deleted file mode 100644
index 024034c1..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df2T_f32.c    
-*    
-* Description:  Processing function for the floating-point transposed    
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
-* @ingroup groupFilters       
-*/
-
-/**       
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
-*       
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
-* The filters are implemented as a cascade of second order Biquad sections.       
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
-* Only floating-point data is supported.       
-*       
-* This function operate on blocks of input and output data and each call to the function       
-* processes blockSize samples through the filter.       
-* pSrc points to the array of input data and       
-* pDst points to the array of output data.       
-* Both arrays contain blockSize values.       
-*       
-* \par Algorithm       
-* Each Biquad stage implements a second order filter using the difference equation:       
-* 
       
-*    y[n] = b0 * x[n] + d1       
-*    d1 = b1 * x[n] + a1 * y[n] + d2       
-*    d2 = b2 * x[n] + a2 * y[n]       
-* 
       
-* where d1 and d2 represent the two state values.       
-*       
-* \par       
-* A Biquad filter using a transposed Direct Form II structure is shown below.       
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
-* Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
-* Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
-* Pay careful attention to the sign of the feedback coefficients.       
-* Some design tools flip the sign of the feedback coefficients:       
-* 
       
-*    y[n] = b0 * x[n] + d1;       
-*    d1 = b1 * x[n] - a1 * y[n] + d2;       
-*    d2 = b2 * x[n] - a2 * y[n];       
-* 
       
-* In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
-*       
-* \par       
-* Higher order filters are realized as a cascade of second order sections.       
-* numStages refers to the number of second order stages used.       
-* For example, an 8th order filter would be realized with numStages=4 second order stages.       
-* A 9th order filter would be realized with numStages=5 second order stages with the       
-* coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
-*       
-* \par       
-* pState points to the state variable array.       
-* Each Biquad stage has 2 state variables d1 and d2.       
-* The state variables are arranged in the pState array as:       
-* 
       
-*     {d11, d12, d21, d22, ...}       
-* 
       
-* where d1x refers to the state variables for the first Biquad and       
-* d2x refers to the state variables for the second Biquad.       
-* The state array has a total length of 2*numStages values.       
-* The state variables are updated after each block of data is processed; the coefficients are untouched.       
-*       
-* \par       
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
-* That is why the Direct Form I structure supports Q15 and Q31 data types.    
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
-*       
-* \par Instance Structure       
-* The coefficients and state variables for a filter are stored together in an instance data structure.       
-* A separate instance structure must be defined for each filter.       
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
-*       
-* \par Init Functions       
-* There is also an associated initialization function.      
-* The initialization function performs following operations:       
-* - Sets the values of the internal structure fields.       
-* - Zeros out the values in the state buffer.       
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
-*       
-* \par       
-* Use of the initialization function is optional.       
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
-* To place an instance structure into a const data section, the instance structure must be manually initialized.       
-* Set the values in the state buffer to zeros before static initialization.       
-* For example, to statically initialize the instance structure use       
-* 
       
-*     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
-* 
       
-* where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
-* pCoeffs is the address of the coefficient buffer;        
-*       
-*/
-
-/**       
-* @addtogroup BiquadCascadeDF2T       
-* @{       
-*/
-
-/**      
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
-* @param[in]  *S        points to an instance of the filter data structure.      
-* @param[in]  *pSrc     points to the block of input data.      
-* @param[out] *pDst     points to the block of output data      
-* @param[in]  blockSize number of samples to process.      
-* @return none.      
-*/
-
-
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_df2T_f32(
-const arm_biquad_cascade_df2T_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-
-   float32_t *pIn = pSrc;                         /*  source pointer            */
-   float32_t *pOut = pDst;                        /*  destination pointer       */
-   float32_t *pState = S->pState;                 /*  State pointer             */
-   float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-   float32_t acc1;                                /*  accumulator               */
-   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-   float32_t Xn1;                                 /*  temporary input           */
-   float32_t d1, d2;                              /*  state variables           */
-   uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-#if defined(ARM_MATH_CM7)
-	
-   float32_t Xn2, Xn3, Xn4, Xn5, Xn6, Xn7, Xn8;   /*  Input State variables     */
-   float32_t Xn9, Xn10, Xn11, Xn12, Xn13, Xn14, Xn15, Xn16;
-   float32_t acc2, acc3, acc4, acc5, acc6, acc7;  /*  Simulates the accumulator */
-   float32_t acc8, acc9, acc10, acc11, acc12, acc13, acc14, acc15, acc16;
-
-   do
-   {
-      /* Reading the coefficients */ 
-      b0 = pCoeffs[0]; 
-      b1 = pCoeffs[1]; 
-      b2 = pCoeffs[2]; 
-      a1 = pCoeffs[3]; 
-      /* Apply loop unrolling and compute 16 output values simultaneously. */ 
-      sample = blockSize >> 4u; 
-      a2 = pCoeffs[4]; 
-
-      /*Reading the state values */ 
-      d1 = pState[0]; 
-      d2 = pState[1]; 
-
-      pCoeffs += 5u;
-
-      
-      /* First part of the processing with loop unrolling.  Compute 16 outputs at a time.       
-       ** a second loop below computes the remaining 1 to 15 samples. */
-      while(sample > 0u) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the first 2 inputs. 2 cycles */
-         Xn1  = pIn[0 ];
-         Xn2  = pIn[1 ];
-
-         /* Sample 1. 5 cycles */
-         Xn3  = pIn[2 ];
-         acc1 = b0 * Xn1 + d1;
-         
-         Xn4  = pIn[3 ];
-         d1 = b1 * Xn1 + d2;
-         
-         Xn5  = pIn[4 ];
-         d2 = b2 * Xn1;
-         
-         Xn6  = pIn[5 ];
-         d1 += a1 * acc1;
-         
-         Xn7  = pIn[6 ];
-         d2 += a2 * acc1;
-
-         /* Sample 2. 5 cycles */
-         Xn8  = pIn[7 ];
-         acc2 = b0 * Xn2 + d1;
-         
-         Xn9  = pIn[8 ];
-         d1 = b1 * Xn2 + d2;
-         
-         Xn10 = pIn[9 ];
-         d2 = b2 * Xn2;
-         
-         Xn11 = pIn[10];
-         d1 += a1 * acc2;
-         
-         Xn12 = pIn[11];
-         d2 += a2 * acc2;
-
-         /* Sample 3. 5 cycles */
-         Xn13 = pIn[12];
-         acc3 = b0 * Xn3 + d1;
-         
-         Xn14 = pIn[13];
-         d1 = b1 * Xn3 + d2;
-         
-         Xn15 = pIn[14];
-         d2 = b2 * Xn3;
-         
-         Xn16 = pIn[15];
-         d1 += a1 * acc3;
-         
-         pIn += 16;
-         d2 += a2 * acc3;
-
-         /* Sample 4. 5 cycles */
-         acc4 = b0 * Xn4 + d1;
-         d1 = b1 * Xn4 + d2;
-         d2 = b2 * Xn4;
-         d1 += a1 * acc4;
-         d2 += a2 * acc4;
-
-         /* Sample 5. 5 cycles */
-         acc5 = b0 * Xn5 + d1;
-         d1 = b1 * Xn5 + d2;
-         d2 = b2 * Xn5;
-         d1 += a1 * acc5;
-         d2 += a2 * acc5;
-
-         /* Sample 6. 5 cycles */
-         acc6 = b0 * Xn6 + d1;
-         d1 = b1 * Xn6 + d2;
-         d2 = b2 * Xn6;
-         d1 += a1 * acc6;
-         d2 += a2 * acc6;
-
-         /* Sample 7. 5 cycles */
-         acc7 = b0 * Xn7 + d1;
-         d1 = b1 * Xn7 + d2;
-         d2 = b2 * Xn7;
-         d1 += a1 * acc7;
-         d2 += a2 * acc7;
-
-         /* Sample 8. 5 cycles */
-         acc8 = b0 * Xn8 + d1;
-         d1 = b1 * Xn8 + d2;
-         d2 = b2 * Xn8;
-         d1 += a1 * acc8;
-         d2 += a2 * acc8;
-
-         /* Sample 9. 5 cycles */
-         acc9 = b0 * Xn9 + d1;
-         d1 = b1 * Xn9 + d2;
-         d2 = b2 * Xn9;
-         d1 += a1 * acc9;
-         d2 += a2 * acc9;
-
-         /* Sample 10. 5 cycles */
-         acc10 = b0 * Xn10 + d1;
-         d1 = b1 * Xn10 + d2;
-         d2 = b2 * Xn10;
-         d1 += a1 * acc10;
-         d2 += a2 * acc10;
-
-         /* Sample 11. 5 cycles */
-         acc11 = b0 * Xn11 + d1;
-         d1 = b1 * Xn11 + d2;
-         d2 = b2 * Xn11;
-         d1 += a1 * acc11;
-         d2 += a2 * acc11;
-
-         /* Sample 12. 5 cycles */
-         acc12 = b0 * Xn12 + d1;
-         d1 = b1 * Xn12 + d2;
-         d2 = b2 * Xn12;
-         d1 += a1 * acc12;
-         d2 += a2 * acc12;
-
-         /* Sample 13. 5 cycles */
-         acc13 = b0 * Xn13 + d1;         
-         d1 = b1 * Xn13 + d2;         
-         d2 = b2 * Xn13;
-         
-         pOut[0 ] = acc1 ;
-         d1 += a1 * acc13;
-         
-         pOut[1 ] = acc2 ;	
-         d2 += a2 * acc13;
-
-         /* Sample 14. 5 cycles */
-         pOut[2 ] = acc3 ;	
-         acc14 = b0 * Xn14 + d1;
-             
-         pOut[3 ] = acc4 ;
-         d1 = b1 * Xn14 + d2;
-          
-         pOut[4 ] = acc5 ; 
-         d2 = b2 * Xn14;
-         
-         pOut[5 ] = acc6 ;	  
-         d1 += a1 * acc14;
-         
-         pOut[6 ] = acc7 ;	
-         d2 += a2 * acc14;
-
-         /* Sample 15. 5 cycles */
-         pOut[7 ] = acc8 ;
-         pOut[8 ] = acc9 ;  
-         acc15 = b0 * Xn15 + d1;
-              
-         pOut[9 ] = acc10;	
-         d1 = b1 * Xn15 + d2;
-         
-         pOut[10] = acc11;	
-         d2 = b2 * Xn15;
-         
-         pOut[11] = acc12;
-         d1 += a1 * acc15;
-         
-         pOut[12] = acc13;
-         d2 += a2 * acc15;
-
-         /* Sample 16. 5 cycles */
-         pOut[13] = acc14;	
-         acc16 = b0 * Xn16 + d1;
-         
-         pOut[14] = acc15;	
-         d1 = b1 * Xn16 + d2;
-         
-         pOut[15] = acc16;
-         d2 = b2 * Xn16;
-         
-         sample--;	 
-         d1 += a1 * acc16;
-         
-         pOut += 16;
-         d2 += a2 * acc16;
-      }
-
-      sample = blockSize & 0xFu;
-      while(sample > 0u) {
-         Xn1 = *pIn;         
-         acc1 = b0 * Xn1 + d1;
-         
-         pIn++;
-         d1 = b1 * Xn1 + d2;
-         
-         *pOut = acc1; 
-         d2 = b2 * Xn1;
-         
-         pOut++;
-         d1 += a1 * acc1;
-         
-         sample--;	
-         d2 += a2 * acc1; 
-      }
-
-      /* Store the updated state variables back into the state array */ 
-      pState[0] = d1; 
-      /* The current stage input is given as the output to the next stage */ 
-      pIn = pDst; 
-      
-      pState[1] = d2; 
-      /* decrement the loop counter */ 
-      stage--; 
-
-      pState += 2u;
-
-      /*Reset the output working pointer */ 
-      pOut = pDst; 
-
-   } while(stage > 0u);
-	
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-   /* Run the below code for Cortex-M0 */
-
-   do
-   {
-      /* Reading the coefficients */
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-
-      sample = blockSize;
-
-      while(sample > 0u)
-      {
-         /* Read the input */
-         Xn1 = *pIn++;
-
-         /* y[n] = b0 * x[n] + d1 */
-         acc1 = (b0 * Xn1) + d1;
-
-         /* Store the result in the accumulator in the destination buffer. */
-         *pOut++ = acc1;
-
-         /* Every time after the output is computed state should be updated. */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
-
-         /* d2 = b2 * x[n] + a2 * y[n] */
-         d2 = (b2 * Xn1) + (a2 * acc1);
-
-         /* decrement the loop counter */
-         sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while(stage > 0u);
-	 
-#else
-
-   float32_t Xn2, Xn3, Xn4;                  	  /*  Input State variables     */
-   float32_t acc2, acc3, acc4;              		  /*  accumulator               */
-
-
-   float32_t p0, p1, p2, p3, p4, A1;
-
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
-   do
-   {
-      /* Reading the coefficients */     
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-      
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-      /* Apply loop unrolling and compute 4 output values simultaneously. */
-      sample = blockSize >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-   ** a second loop below computes the remaining 1 to 3 samples. */
-      while(sample > 0u) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the four inputs */
-         Xn1 = pIn[0];
-         Xn2 = pIn[1];
-         Xn3 = pIn[2];
-         Xn4 = pIn[3];
-         pIn += 4;     
-
-         p0 = b0 * Xn1; 
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p0 = b0 * Xn2; 
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn2;
-         acc2 = p0 + d1;
-         p0 = b0 * Xn3;	 
-         p3 = a1 * acc2; 
-         p2 = b2 * Xn2;                                 
-         A1 = p1 + p3;
-         p4 = a2 * acc2;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn3;
-         acc3 = p0 + d1;
-         p0 = b0 * Xn4;	
-         p3 = a1 * acc3;
-         p2 = b2 * Xn3;
-         A1 = p1 + p3;
-         p4 = a2 * acc3;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         acc4 = p0 + d1;
-         p1 = b1 * Xn4;
-         p3 = a1 * acc4;
-         p2 = b2 * Xn4;
-         A1 = p1 + p3;
-         p4 = a2 * acc4;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         pOut[0] = acc1;	
-         pOut[1] = acc2;	
-         pOut[2] = acc3;	
-         pOut[3] = acc4;
-		 pOut += 4;
-				 
-         sample--;	       
-      }
-
-      sample = blockSize & 0x3u;
-      while(sample > 0u) {
-         Xn1 = *pIn++;
-
-         p0 = b0 * Xn1; 
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-	
-         *pOut++ = acc1;
-         
-         sample--;	       
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while(stage > 0u);
-
-#endif 
-
-}
-LOW_OPTIMIZATION_EXIT
-
-/**       
-   * @} end of BiquadCascadeDF2T group       
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
deleted file mode 100644
index 967075e2..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
+++ /dev/null
@@ -1,603 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_df2T_f64.c    
-*    
-* Description:  Processing function for the floating-point transposed    
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
-* @ingroup groupFilters       
-*/
-
-/**       
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
-*       
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
-* The filters are implemented as a cascade of second order Biquad sections.       
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
-* Only floating-point data is supported.       
-*       
-* This function operate on blocks of input and output data and each call to the function       
-* processes blockSize samples through the filter.       
-* pSrc points to the array of input data and       
-* pDst points to the array of output data.       
-* Both arrays contain blockSize values.       
-*       
-* \par Algorithm       
-* Each Biquad stage implements a second order filter using the difference equation:       
-* 
       
-*    y[n] = b0 * x[n] + d1       
-*    d1 = b1 * x[n] + a1 * y[n] + d2       
-*    d2 = b2 * x[n] + a2 * y[n]       
-* 
       
-* where d1 and d2 represent the two state values.       
-*       
-* \par       
-* A Biquad filter using a transposed Direct Form II structure is shown below.       
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
-* Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
-* Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
-* Pay careful attention to the sign of the feedback coefficients.       
-* Some design tools flip the sign of the feedback coefficients:       
-* 
       
-*    y[n] = b0 * x[n] + d1;       
-*    d1 = b1 * x[n] - a1 * y[n] + d2;       
-*    d2 = b2 * x[n] - a2 * y[n];       
-* 
       
-* In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
-*       
-* \par       
-* Higher order filters are realized as a cascade of second order sections.       
-* numStages refers to the number of second order stages used.       
-* For example, an 8th order filter would be realized with numStages=4 second order stages.       
-* A 9th order filter would be realized with numStages=5 second order stages with the       
-* coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
-*       
-* \par       
-* pState points to the state variable array.       
-* Each Biquad stage has 2 state variables d1 and d2.       
-* The state variables are arranged in the pState array as:       
-* 
       
-*     {d11, d12, d21, d22, ...}       
-* 
       
-* where d1x refers to the state variables for the first Biquad and       
-* d2x refers to the state variables for the second Biquad.       
-* The state array has a total length of 2*numStages values.       
-* The state variables are updated after each block of data is processed; the coefficients are untouched.       
-*       
-* \par       
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
-* That is why the Direct Form I structure supports Q15 and Q31 data types.    
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
-*       
-* \par Instance Structure       
-* The coefficients and state variables for a filter are stored together in an instance data structure.       
-* A separate instance structure must be defined for each filter.       
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
-*       
-* \par Init Functions       
-* There is also an associated initialization function.      
-* The initialization function performs following operations:       
-* - Sets the values of the internal structure fields.       
-* - Zeros out the values in the state buffer.       
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
-*       
-* \par       
-* Use of the initialization function is optional.       
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
-* To place an instance structure into a const data section, the instance structure must be manually initialized.       
-* Set the values in the state buffer to zeros before static initialization.       
-* For example, to statically initialize the instance structure use       
-* 
       
-*     arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};       
-* 
       
-* where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
-* pCoeffs is the address of the coefficient buffer;        
-*       
-*/
-
-/**       
-* @addtogroup BiquadCascadeDF2T       
-* @{       
-*/
-
-/**      
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
-* @param[in]  *S        points to an instance of the filter data structure.      
-* @param[in]  *pSrc     points to the block of input data.      
-* @param[out] *pDst     points to the block of output data      
-* @param[in]  blockSize number of samples to process.      
-* @return none.      
-*/
-
-
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_df2T_f64(
-const arm_biquad_cascade_df2T_instance_f64 * S,
-float64_t * pSrc,
-float64_t * pDst,
-uint32_t blockSize)
-{
-
-   float64_t *pIn = pSrc;                         /*  source pointer            */
-   float64_t *pOut = pDst;                        /*  destination pointer       */
-   float64_t *pState = S->pState;                 /*  State pointer             */
-   float64_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-   float64_t acc1;                                /*  accumulator               */
-   float64_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-   float64_t Xn1;                                 /*  temporary input           */
-   float64_t d1, d2;                              /*  state variables           */
-   uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-#if defined(ARM_MATH_CM7)
-	
-   float64_t Xn2, Xn3, Xn4, Xn5, Xn6, Xn7, Xn8;   /*  Input State variables     */
-   float64_t Xn9, Xn10, Xn11, Xn12, Xn13, Xn14, Xn15, Xn16;
-   float64_t acc2, acc3, acc4, acc5, acc6, acc7;  /*  Simulates the accumulator */
-   float64_t acc8, acc9, acc10, acc11, acc12, acc13, acc14, acc15, acc16;
-
-   do
-   {
-      /* Reading the coefficients */ 
-      b0 = pCoeffs[0]; 
-      b1 = pCoeffs[1]; 
-      b2 = pCoeffs[2]; 
-      a1 = pCoeffs[3]; 
-      /* Apply loop unrolling and compute 16 output values simultaneously. */ 
-      sample = blockSize >> 4u; 
-      a2 = pCoeffs[4]; 
-
-      /*Reading the state values */ 
-      d1 = pState[0]; 
-      d2 = pState[1]; 
-
-      pCoeffs += 5u;
-
-      
-      /* First part of the processing with loop unrolling.  Compute 16 outputs at a time.       
-       ** a second loop below computes the remaining 1 to 15 samples. */
-      while(sample > 0u) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the first 2 inputs. 2 cycles */
-         Xn1  = pIn[0 ];
-         Xn2  = pIn[1 ];
-
-         /* Sample 1. 5 cycles */
-         Xn3  = pIn[2 ];
-         acc1 = b0 * Xn1 + d1;
-         
-         Xn4  = pIn[3 ];
-         d1 = b1 * Xn1 + d2;
-         
-         Xn5  = pIn[4 ];
-         d2 = b2 * Xn1;
-         
-         Xn6  = pIn[5 ];
-         d1 += a1 * acc1;
-         
-         Xn7  = pIn[6 ];
-         d2 += a2 * acc1;
-
-         /* Sample 2. 5 cycles */
-         Xn8  = pIn[7 ];
-         acc2 = b0 * Xn2 + d1;
-         
-         Xn9  = pIn[8 ];
-         d1 = b1 * Xn2 + d2;
-         
-         Xn10 = pIn[9 ];
-         d2 = b2 * Xn2;
-         
-         Xn11 = pIn[10];
-         d1 += a1 * acc2;
-         
-         Xn12 = pIn[11];
-         d2 += a2 * acc2;
-
-         /* Sample 3. 5 cycles */
-         Xn13 = pIn[12];
-         acc3 = b0 * Xn3 + d1;
-         
-         Xn14 = pIn[13];
-         d1 = b1 * Xn3 + d2;
-         
-         Xn15 = pIn[14];
-         d2 = b2 * Xn3;
-         
-         Xn16 = pIn[15];
-         d1 += a1 * acc3;
-         
-         pIn += 16;
-         d2 += a2 * acc3;
-
-         /* Sample 4. 5 cycles */
-         acc4 = b0 * Xn4 + d1;
-         d1 = b1 * Xn4 + d2;
-         d2 = b2 * Xn4;
-         d1 += a1 * acc4;
-         d2 += a2 * acc4;
-
-         /* Sample 5. 5 cycles */
-         acc5 = b0 * Xn5 + d1;
-         d1 = b1 * Xn5 + d2;
-         d2 = b2 * Xn5;
-         d1 += a1 * acc5;
-         d2 += a2 * acc5;
-
-         /* Sample 6. 5 cycles */
-         acc6 = b0 * Xn6 + d1;
-         d1 = b1 * Xn6 + d2;
-         d2 = b2 * Xn6;
-         d1 += a1 * acc6;
-         d2 += a2 * acc6;
-
-         /* Sample 7. 5 cycles */
-         acc7 = b0 * Xn7 + d1;
-         d1 = b1 * Xn7 + d2;
-         d2 = b2 * Xn7;
-         d1 += a1 * acc7;
-         d2 += a2 * acc7;
-
-         /* Sample 8. 5 cycles */
-         acc8 = b0 * Xn8 + d1;
-         d1 = b1 * Xn8 + d2;
-         d2 = b2 * Xn8;
-         d1 += a1 * acc8;
-         d2 += a2 * acc8;
-
-         /* Sample 9. 5 cycles */
-         acc9 = b0 * Xn9 + d1;
-         d1 = b1 * Xn9 + d2;
-         d2 = b2 * Xn9;
-         d1 += a1 * acc9;
-         d2 += a2 * acc9;
-
-         /* Sample 10. 5 cycles */
-         acc10 = b0 * Xn10 + d1;
-         d1 = b1 * Xn10 + d2;
-         d2 = b2 * Xn10;
-         d1 += a1 * acc10;
-         d2 += a2 * acc10;
-
-         /* Sample 11. 5 cycles */
-         acc11 = b0 * Xn11 + d1;
-         d1 = b1 * Xn11 + d2;
-         d2 = b2 * Xn11;
-         d1 += a1 * acc11;
-         d2 += a2 * acc11;
-
-         /* Sample 12. 5 cycles */
-         acc12 = b0 * Xn12 + d1;
-         d1 = b1 * Xn12 + d2;
-         d2 = b2 * Xn12;
-         d1 += a1 * acc12;
-         d2 += a2 * acc12;
-
-         /* Sample 13. 5 cycles */
-         acc13 = b0 * Xn13 + d1;         
-         d1 = b1 * Xn13 + d2;         
-         d2 = b2 * Xn13;
-         
-         pOut[0 ] = acc1 ;
-         d1 += a1 * acc13;
-         
-         pOut[1 ] = acc2 ;	
-         d2 += a2 * acc13;
-
-         /* Sample 14. 5 cycles */
-         pOut[2 ] = acc3 ;	
-         acc14 = b0 * Xn14 + d1;
-             
-         pOut[3 ] = acc4 ;
-         d1 = b1 * Xn14 + d2;
-          
-         pOut[4 ] = acc5 ; 
-         d2 = b2 * Xn14;
-         
-         pOut[5 ] = acc6 ;	  
-         d1 += a1 * acc14;
-         
-         pOut[6 ] = acc7 ;	
-         d2 += a2 * acc14;
-
-         /* Sample 15. 5 cycles */
-         pOut[7 ] = acc8 ;
-         pOut[8 ] = acc9 ;  
-         acc15 = b0 * Xn15 + d1;
-              
-         pOut[9 ] = acc10;	
-         d1 = b1 * Xn15 + d2;
-         
-         pOut[10] = acc11;	
-         d2 = b2 * Xn15;
-         
-         pOut[11] = acc12;
-         d1 += a1 * acc15;
-         
-         pOut[12] = acc13;
-         d2 += a2 * acc15;
-
-         /* Sample 16. 5 cycles */
-         pOut[13] = acc14;	
-         acc16 = b0 * Xn16 + d1;
-         
-         pOut[14] = acc15;	
-         d1 = b1 * Xn16 + d2;
-         
-         pOut[15] = acc16;
-         d2 = b2 * Xn16;
-         
-         sample--;	 
-         d1 += a1 * acc16;
-         
-         pOut += 16;
-         d2 += a2 * acc16;
-      }
-
-      sample = blockSize & 0xFu;
-      while(sample > 0u) {
-         Xn1 = *pIn;         
-         acc1 = b0 * Xn1 + d1;
-         
-         pIn++;
-         d1 = b1 * Xn1 + d2;
-         
-         *pOut = acc1; 
-         d2 = b2 * Xn1;
-         
-         pOut++;
-         d1 += a1 * acc1;
-         
-         sample--;	
-         d2 += a2 * acc1; 
-      }
-
-      /* Store the updated state variables back into the state array */ 
-      pState[0] = d1; 
-      /* The current stage input is given as the output to the next stage */ 
-      pIn = pDst; 
-      
-      pState[1] = d2; 
-      /* decrement the loop counter */ 
-      stage--; 
-
-      pState += 2u;
-
-      /*Reset the output working pointer */ 
-      pOut = pDst; 
-
-   } while(stage > 0u);
-	
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-   /* Run the below code for Cortex-M0 */
-
-   do
-   {
-      /* Reading the coefficients */
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-
-      sample = blockSize;
-
-      while(sample > 0u)
-      {
-         /* Read the input */
-         Xn1 = *pIn++;
-
-         /* y[n] = b0 * x[n] + d1 */
-         acc1 = (b0 * Xn1) + d1;
-
-         /* Store the result in the accumulator in the destination buffer. */
-         *pOut++ = acc1;
-
-         /* Every time after the output is computed state should be updated. */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
-
-         /* d2 = b2 * x[n] + a2 * y[n] */
-         d2 = (b2 * Xn1) + (a2 * acc1);
-
-         /* decrement the loop counter */
-         sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while(stage > 0u);
-	 
-#else
-
-   float64_t Xn2, Xn3, Xn4;                  	  /*  Input State variables     */
-   float64_t acc2, acc3, acc4;              		  /*  accumulator               */
-
-
-   float64_t p0, p1, p2, p3, p4, A1;
-
-   /* Run the below code for Cortex-M4 and Cortex-M3 */
-   do
-   {
-      /* Reading the coefficients */     
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-      
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-      /* Apply loop unrolling and compute 4 output values simultaneously. */
-      sample = blockSize >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-   ** a second loop below computes the remaining 1 to 3 samples. */
-      while(sample > 0u) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         /* Read the four inputs */
-         Xn1 = pIn[0];
-         Xn2 = pIn[1];
-         Xn3 = pIn[2];
-         Xn4 = pIn[3];
-         pIn += 4;     
-
-         p0 = b0 * Xn1; 
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p0 = b0 * Xn2; 
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn2;
-         acc2 = p0 + d1;
-         p0 = b0 * Xn3;	 
-         p3 = a1 * acc2; 
-         p2 = b2 * Xn2;                                 
-         A1 = p1 + p3;
-         p4 = a2 * acc2;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         p1 = b1 * Xn3;
-         acc3 = p0 + d1;
-         p0 = b0 * Xn4;	
-         p3 = a1 * acc3;
-         p2 = b2 * Xn3;
-         A1 = p1 + p3;
-         p4 = a2 * acc3;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         acc4 = p0 + d1;
-         p1 = b1 * Xn4;
-         p3 = a1 * acc4;
-         p2 = b2 * Xn4;
-         A1 = p1 + p3;
-         p4 = a2 * acc4;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-
-         pOut[0] = acc1;	
-         pOut[1] = acc2;	
-         pOut[2] = acc3;	
-         pOut[3] = acc4;
-				 pOut += 4;
-				 
-         sample--;	       
-      }
-
-      sample = blockSize & 0x3u;
-      while(sample > 0u) {
-         Xn1 = *pIn++;
-
-         p0 = b0 * Xn1; 
-         p1 = b1 * Xn1;
-         acc1 = p0 + d1;
-         p3 = a1 * acc1;
-         p2 = b2 * Xn1;
-         A1 = p1 + p3;
-         p4 = a2 * acc1;
-         d1 = A1 + d2;
-         d2 = p2 + p4;
-	
-         *pOut++ = acc1;
-         
-         sample--;	       
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stage--;
-
-   } while(stage > 0u);
-
-#endif 
-
-}
-LOW_OPTIMIZATION_EXIT
-
-/**       
-   * @} end of BiquadCascadeDF2T group       
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
deleted file mode 100644
index cba8bdd3..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df2T_init_f32.c    
-*    
-* Description:  Initialization function for the floating-point transposed   
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF2T    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.   
- * @param[in,out] *S           points to an instance of the filter data structure.   
- * @param[in]     numStages    number of 2nd order stages in the filter.   
- * @param[in]     *pCoeffs     points to the filter coefficients.   
- * @param[in]     *pState      points to the state buffer.   
- * @return        none   
- *    
- * Coefficient and State Ordering:    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 2 state variables d1, and d2.    
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.    
- * The state array has a total length of 2*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df2T_init_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 2 * numStages */
-  memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF2T group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
deleted file mode 100644
index 5ed2db9e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_df2T_init_f64.c    
-*    
-* Description:  Initialization function for the floating-point transposed   
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF2T    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.   
- * @param[in,out] *S           points to an instance of the filter data structure.   
- * @param[in]     numStages    number of 2nd order stages in the filter.   
- * @param[in]     *pCoeffs     points to the filter coefficients.   
- * @param[in]     *pState      points to the state buffer.   
- * @return        none   
- *    
- * Coefficient and State Ordering:    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 2 state variables d1, and d2.    
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.    
- * The state array has a total length of 2*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_df2T_init_f64(
-  arm_biquad_cascade_df2T_instance_f64 * S,
-  uint8_t numStages,
-  float64_t * pCoeffs,
-  float64_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 2 * numStages */
-  memset(pState, 0, (2u * (uint32_t) numStages) * sizeof(float64_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF2T group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
deleted file mode 100644
index 9722e5cf..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
+++ /dev/null
@@ -1,683 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_biquad_cascade_stereo_df2T_f32.c    
-*    
-* Description:  Processing function for the floating-point transposed    
-*               direct form II Biquad cascade filter. 2 channels  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
-* @ingroup groupFilters       
-*/
-
-/**       
-* @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure       
-*       
-* This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.       
-* The filters are implemented as a cascade of second order Biquad sections.       
-* These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.      
-* Only floating-point data is supported.       
-*       
-* This function operate on blocks of input and output data and each call to the function       
-* processes blockSize samples through the filter.       
-* pSrc points to the array of input data and       
-* pDst points to the array of output data.       
-* Both arrays contain blockSize values.       
-*       
-* \par Algorithm       
-* Each Biquad stage implements a second order filter using the difference equation:       
-* 
       
-*    y[n] = b0 * x[n] + d1       
-*    d1 = b1 * x[n] + a1 * y[n] + d2       
-*    d2 = b2 * x[n] + a2 * y[n]       
-* 
       
-* where d1 and d2 represent the two state values.       
-*       
-* \par       
-* A Biquad filter using a transposed Direct Form II structure is shown below.       
-* \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"       
-* Coefficients b0, b1, and b2  multiply the input signal x[n] and are referred to as the feedforward coefficients.       
-* Coefficients a1 and a2 multiply the output signal y[n] and are referred to as the feedback coefficients.       
-* Pay careful attention to the sign of the feedback coefficients.       
-* Some design tools flip the sign of the feedback coefficients:       
-* 
       
-*    y[n] = b0 * x[n] + d1;       
-*    d1 = b1 * x[n] - a1 * y[n] + d2;       
-*    d2 = b2 * x[n] - a2 * y[n];       
-* 
       
-* In this case the feedback coefficients a1 and a2 must be negated when used with the CMSIS DSP Library.       
-*       
-* \par       
-* Higher order filters are realized as a cascade of second order sections.       
-* numStages refers to the number of second order stages used.       
-* For example, an 8th order filter would be realized with numStages=4 second order stages.       
-* A 9th order filter would be realized with numStages=5 second order stages with the       
-* coefficients for one of the stages configured as a first order filter (b2=0 and a2=0).       
-*       
-* \par       
-* pState points to the state variable array.       
-* Each Biquad stage has 2 state variables d1 and d2.       
-* The state variables are arranged in the pState array as:       
-* 
       
-*     {d11, d12, d21, d22, ...}       
-* 
       
-* where d1x refers to the state variables for the first Biquad and       
-* d2x refers to the state variables for the second Biquad.       
-* The state array has a total length of 2*numStages values.       
-* The state variables are updated after each block of data is processed; the coefficients are untouched.       
-*       
-* \par       
-* The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.    
-* The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.    
-* That is why the Direct Form I structure supports Q15 and Q31 data types.    
-* The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables d1 and d2.    
-* Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.    
-* The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.    
-*       
-* \par Instance Structure       
-* The coefficients and state variables for a filter are stored together in an instance data structure.       
-* A separate instance structure must be defined for each filter.       
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.       
-*       
-* \par Init Functions       
-* There is also an associated initialization function.      
-* The initialization function performs following operations:       
-* - Sets the values of the internal structure fields.       
-* - Zeros out the values in the state buffer.       
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
-*       
-* \par       
-* Use of the initialization function is optional.       
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.       
-* To place an instance structure into a const data section, the instance structure must be manually initialized.       
-* Set the values in the state buffer to zeros before static initialization.       
-* For example, to statically initialize the instance structure use       
-* 
       
-*     arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};       
-* 
       
-* where numStages is the number of Biquad stages in the filter; pState is the address of the state buffer.       
-* pCoeffs is the address of the coefficient buffer;        
-*       
-*/
-
-/**       
-* @addtogroup BiquadCascadeDF2T       
-* @{       
-*/
-
-/**      
-* @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.      
-* @param[in]  *S        points to an instance of the filter data structure.      
-* @param[in]  *pSrc     points to the block of input data.      
-* @param[out] *pDst     points to the block of output data      
-* @param[in]  blockSize number of samples to process.      
-* @return none.      
-*/
-
-
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_stereo_df2T_f32(
-const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-
-    float32_t *pIn = pSrc;                         /*  source pointer            */
-    float32_t *pOut = pDst;                        /*  destination pointer       */
-    float32_t *pState = S->pState;                 /*  State pointer             */
-    float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-    float32_t acc1a, acc1b;                        /*  accumulator               */
-    float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-    float32_t Xn1a, Xn1b;                          /*  temporary input           */
-    float32_t d1a, d2a, d1b, d2b;                  /*  state variables           */
-    uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-#if defined(ARM_MATH_CM7)
-	
-    float32_t Xn2a, Xn3a, Xn4a, Xn5a, Xn6a, Xn7a, Xn8a;         /*  Input State variables     */
-    float32_t Xn2b, Xn3b, Xn4b, Xn5b, Xn6b, Xn7b, Xn8b;         /*  Input State variables     */
-    float32_t acc2a, acc3a, acc4a, acc5a, acc6a, acc7a, acc8a;  /*  Simulates the accumulator */
-    float32_t acc2b, acc3b, acc4b, acc5b, acc6b, acc7b, acc8b;  /*  Simulates the accumulator */
-
-    do
-    {
-        /* Reading the coefficients */ 
-        b0 = pCoeffs[0]; 
-        b1 = pCoeffs[1]; 
-        b2 = pCoeffs[2]; 
-        a1 = pCoeffs[3]; 
-        /* Apply loop unrolling and compute 8 output values simultaneously. */ 
-        sample = blockSize >> 3u; 
-        a2 = pCoeffs[4]; 
-
-        /*Reading the state values */ 
-        d1a = pState[0]; 
-        d2a = pState[1]; 
-        d1b = pState[2]; 
-        d2b = pState[3]; 
-
-        pCoeffs += 5u;
-
-        /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.       
-        ** a second loop below computes the remaining 1 to 7 samples. */
-        while(sample > 0u) {
-
-            /* y[n] = b0 * x[n] + d1 */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            /* d2 = b2 * x[n] + a2 * y[n] */
-
-            /* Read the first 2 inputs. 2 cycles */
-            Xn1a  = pIn[0 ];
-            Xn1b  = pIn[1 ];
-
-            /* Sample 1. 5 cycles */
-            Xn2a  = pIn[2 ];
-            acc1a = b0 * Xn1a + d1a;
-
-            Xn2b  = pIn[3 ];
-            d1a = b1 * Xn1a + d2a;
-
-            Xn3a  = pIn[4 ];
-            d2a = b2 * Xn1a;
-
-            Xn3b  = pIn[5 ];
-            d1a += a1 * acc1a;
-
-            Xn4a  = pIn[6 ];
-            d2a += a2 * acc1a;
-
-            /* Sample 2. 5 cycles */
-            Xn4b  = pIn[7 ];
-            acc1b = b0 * Xn1b + d1b;
-
-            Xn5a  = pIn[8 ];
-            d1b = b1 * Xn1b + d2b;
-
-            Xn5b = pIn[9 ];
-            d2b = b2 * Xn1b;
-
-            Xn6a = pIn[10];
-            d1b += a1 * acc1b;
-
-            Xn6b = pIn[11];
-            d2b += a2 * acc1b;
-
-            /* Sample 3. 5 cycles */
-            Xn7a = pIn[12];
-            acc2a = b0 * Xn2a + d1a;
-
-            Xn7b = pIn[13];
-            d1a = b1 * Xn2a + d2a;
-
-            Xn8a = pIn[14];
-            d2a = b2 * Xn2a;
-
-            Xn8b = pIn[15];
-            d1a += a1 * acc2a;
-
-            pIn += 16;
-            d2a += a2 * acc2a;
-
-            /* Sample 4. 5 cycles */
-            acc2b = b0 * Xn2b + d1b;
-            d1b = b1 * Xn2b + d2b;
-            d2b = b2 * Xn2b;
-            d1b += a1 * acc2b;
-            d2b += a2 * acc2b;
-
-            /* Sample 5. 5 cycles */
-            acc3a = b0 * Xn3a + d1a;
-            d1a = b1 * Xn3a + d2a;
-            d2a = b2 * Xn3a;
-            d1a += a1 * acc3a;
-            d2a += a2 * acc3a;
-
-            /* Sample 6. 5 cycles */
-            acc3b = b0 * Xn3b + d1b;
-            d1b = b1 * Xn3b + d2b;
-            d2b = b2 * Xn3b;
-            d1b += a1 * acc3b;
-            d2b += a2 * acc3b;
-
-            /* Sample 7. 5 cycles */
-            acc4a = b0 * Xn4a + d1a;
-            d1a = b1 * Xn4a + d2a;
-            d2a = b2 * Xn4a;
-            d1a += a1 * acc4a;
-            d2a += a2 * acc4a;
-
-            /* Sample 8. 5 cycles */
-            acc4b = b0 * Xn4b + d1b;
-            d1b = b1 * Xn4b + d2b;
-            d2b = b2 * Xn4b;
-            d1b += a1 * acc4b;
-            d2b += a2 * acc4b;
-
-            /* Sample 9. 5 cycles */
-            acc5a = b0 * Xn5a + d1a;
-            d1a = b1 * Xn5a + d2a;
-            d2a = b2 * Xn5a;
-            d1a += a1 * acc5a;
-            d2a += a2 * acc5a;
-
-            /* Sample 10. 5 cycles */
-            acc5b = b0 * Xn5b + d1b;
-            d1b = b1 * Xn5b + d2b;
-            d2b = b2 * Xn5b;
-            d1b += a1 * acc5b;
-            d2b += a2 * acc5b;
-
-            /* Sample 11. 5 cycles */
-            acc6a = b0 * Xn6a + d1a;
-            d1a = b1 * Xn6a + d2a;
-            d2a = b2 * Xn6a;
-            d1a += a1 * acc6a;
-            d2a += a2 * acc6a;
-
-            /* Sample 12. 5 cycles */
-            acc6b = b0 * Xn6b + d1b;
-            d1b = b1 * Xn6b + d2b;
-            d2b = b2 * Xn6b;
-            d1b += a1 * acc6b;
-            d2b += a2 * acc6b;
-
-            /* Sample 13. 5 cycles */
-            acc7a = b0 * Xn7a + d1a;         
-            d1a = b1 * Xn7a + d2a;   
-            
-            pOut[0 ] = acc1a ;      
-            d2a = b2 * Xn7a;
-
-            pOut[1 ] = acc1b ;	
-            d1a += a1 * acc7a;
-
-            pOut[2 ] = acc2a ;	
-            d2a += a2 * acc7a;
-
-            /* Sample 14. 5 cycles */
-            pOut[3 ] = acc2b ;
-            acc7b = b0 * Xn7b + d1b;
-
-            pOut[4 ] = acc3a ; 
-            d1b = b1 * Xn7b + d2b;
-
-            pOut[5 ] = acc3b ;	
-            d2b = b2 * Xn7b;
-
-            pOut[6 ] = acc4a ;	  
-            d1b += a1 * acc7b;
-
-            pOut[7 ] = acc4b ;
-            d2b += a2 * acc7b;
-
-            /* Sample 15. 5 cycles */
-            pOut[8 ] = acc5a ;  
-            acc8a = b0 * Xn8a + d1a;
-
-            pOut[9 ] = acc5b;	
-            d1a = b1 * Xn8a + d2a;
-
-            pOut[10] = acc6a;	
-            d2a = b2 * Xn8a;
-
-            pOut[11] = acc6b;
-            d1a += a1 * acc8a;
-
-            pOut[12] = acc7a;
-            d2a += a2 * acc8a;
-
-            /* Sample 16. 5 cycles */
-            pOut[13] = acc7b;	
-            acc8b = b0 * Xn8b + d1b;
-
-            pOut[14] = acc8a;	
-            d1b = b1 * Xn8b + d2b;
-
-            pOut[15] = acc8b;
-            d2b = b2 * Xn8b;
-
-            sample--;	 
-            d1b += a1 * acc8b;
-
-            pOut += 16;
-            d2b += a2 * acc8b;
-        }
-
-        sample = blockSize & 0x7u;
-        while(sample > 0u) {
-            /* Read the input */
-            Xn1a = *pIn++; //Channel a
-            Xn1b = *pIn++; //Channel b
-
-            /* y[n] = b0 * x[n] + d1 */
-            acc1a = (b0 * Xn1a) + d1a;
-            acc1b = (b0 * Xn1b) + d1b;
-
-            /* Store the result in the accumulator in the destination buffer. */
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
-
-            /* Every time after the output is computed state should be updated. */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-            d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-            /* d2 = b2 * x[n] + a2 * y[n] */
-            d2a = (b2 * Xn1a) + (a2 * acc1a);
-            d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-            sample--;	
-        }
-
-        /* Store the updated state variables back into the state array */ 
-        pState[0] = d1a; 
-        pState[1] = d2a;         
-
-        pState[2] = d1b; 
-        pState[3] = d2b; 
-        
-        /* The current stage input is given as the output to the next stage */ 
-        pIn = pDst; 
-        /* decrement the loop counter */ 
-        stage--; 
-
-        pState += 4u;
-        /*Reset the output working pointer */ 
-        pOut = pDst; 
-
-    } while(stage > 0u);
-	
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-    /* Run the below code for Cortex-M0 */
-
-    do
-    {
-        /* Reading the coefficients */
-        b0 = *pCoeffs++;
-        b1 = *pCoeffs++;
-        b2 = *pCoeffs++;
-        a1 = *pCoeffs++;
-        a2 = *pCoeffs++;
-
-        /*Reading the state values */
-        d1a = pState[0];
-        d2a = pState[1];
-        d1b = pState[2];
-        d2b = pState[3];
-
-
-        sample = blockSize;
-
-        while(sample > 0u)
-        {
-            /* Read the input */
-            Xn1a = *pIn++; //Channel a
-            Xn1b = *pIn++; //Channel b
-
-            /* y[n] = b0 * x[n] + d1 */
-            acc1a = (b0 * Xn1a) + d1a;
-            acc1b = (b0 * Xn1b) + d1b;
-
-            /* Store the result in the accumulator in the destination buffer. */
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
-
-            /* Every time after the output is computed state should be updated. */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-            d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-            /* d2 = b2 * x[n] + a2 * y[n] */
-            d2a = (b2 * Xn1a) + (a2 * acc1a);
-            d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-            /* decrement the loop counter */
-            sample--;
-        }
-
-        /* Store the updated state variables back into the state array */
-        *pState++ = d1a;
-        *pState++ = d2a;
-        *pState++ = d1b;
-        *pState++ = d2b;
-
-        /* The current stage input is given as the output to the next stage */
-        pIn = pDst;
-
-        /*Reset the output working pointer */
-        pOut = pDst;
-
-        /* decrement the loop counter */
-        stage--;
-
-    } while(stage > 0u);
-	 
-#else
-
-    float32_t Xn2a, Xn3a, Xn4a;                          /*  Input State variables     */
-    float32_t Xn2b, Xn3b, Xn4b;                          /*  Input State variables     */
-    float32_t acc2a, acc3a, acc4a;                       /*  accumulator               */
-    float32_t acc2b, acc3b, acc4b;                       /*  accumulator               */
-    float32_t p0a, p1a, p2a, p3a, p4a, A1a;
-    float32_t p0b, p1b, p2b, p3b, p4b, A1b;
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    do
-    {
-        /* Reading the coefficients */     
-        b0 = *pCoeffs++;
-        b1 = *pCoeffs++;
-        b2 = *pCoeffs++;
-        a1 = *pCoeffs++;
-        a2 = *pCoeffs++;      
-
-        /*Reading the state values */
-        d1a = pState[0];
-        d2a = pState[1];
-        d1b = pState[2];
-        d2b = pState[3];
-
-        /* Apply loop unrolling and compute 4 output values simultaneously. */
-        sample = blockSize >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-        ** a second loop below computes the remaining 1 to 3 samples. */
-        while(sample > 0u) {
-
-            /* y[n] = b0 * x[n] + d1 */
-            /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-            /* d2 = b2 * x[n] + a2 * y[n] */
-
-            /* Read the four inputs */
-            Xn1a = pIn[0];
-            Xn1b = pIn[1];
-            Xn2a = pIn[2];
-            Xn2b = pIn[3];
-            Xn3a = pIn[4];
-            Xn3b = pIn[5];
-            Xn4a = pIn[6];
-            Xn4b = pIn[7];
-            pIn += 8;     
-            
-            p0a = b0 * Xn1a; 
-            p0b = b0 * Xn1b; 
-            p1a = b1 * Xn1a;
-            p1b = b1 * Xn1b;
-            acc1a = p0a + d1a;
-            acc1b = p0b + d1b;
-            p0a = b0 * Xn2a; 
-            p0b = b0 * Xn2b; 
-            p3a = a1 * acc1a;
-            p3b = a1 * acc1b;
-            p2a = b2 * Xn1a;
-            p2b = b2 * Xn1b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc1a;
-            p4b = a2 * acc1b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-            
-            p1a = b1 * Xn2a;
-            p1b = b1 * Xn2b;
-            acc2a = p0a + d1a;
-            acc2b = p0b + d1b;
-            p0a = b0 * Xn3a; 
-            p0b = b0 * Xn3b; 
-            p3a = a1 * acc2a;
-            p3b = a1 * acc2b;
-            p2a = b2 * Xn2a;
-            p2b = b2 * Xn2b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc2a;
-            p4b = a2 * acc2b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-            
-            p1a = b1 * Xn3a;
-            p1b = b1 * Xn3b;
-            acc3a = p0a + d1a;
-            acc3b = p0b + d1b;
-            p0a = b0 * Xn4a; 
-            p0b = b0 * Xn4b; 
-            p3a = a1 * acc3a;
-            p3b = a1 * acc3b;
-            p2a = b2 * Xn3a;
-            p2b = b2 * Xn3b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc3a;
-            p4b = a2 * acc3b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-            
-            acc4a = p0a + d1a;
-            acc4b = p0b + d1b;
-            p1a = b1 * Xn4a;
-            p1b = b1 * Xn4b;
-            p3a = a1 * acc4a;
-            p3b = a1 * acc4b;
-            p2a = b2 * Xn4a;
-            p2b = b2 * Xn4b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc4a;
-            p4b = a2 * acc4b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            pOut[0] = acc1a;	
-            pOut[1] = acc1b;	
-            pOut[2] = acc2a;	
-            pOut[3] = acc2b;
-            pOut[4] = acc3a;	
-            pOut[5] = acc3b;	
-            pOut[6] = acc4a;	
-            pOut[7] = acc4b;
-            pOut += 8;
-             
-            sample--;	       
-        }
-
-        sample = blockSize & 0x3u;
-        while(sample > 0u) {
-            Xn1a = *pIn++;
-            Xn1b = *pIn++;
-
-            p0a = b0 * Xn1a; 
-            p0b = b0 * Xn1b; 
-            p1a = b1 * Xn1a;
-            p1b = b1 * Xn1b;
-            acc1a = p0a + d1a;
-            acc1b = p0b + d1b;
-            p3a = a1 * acc1a;
-            p3b = a1 * acc1b;
-            p2a = b2 * Xn1a;
-            p2b = b2 * Xn1b;
-            A1a = p1a + p3a;
-            A1b = p1b + p3b;
-            p4a = a2 * acc1a;
-            p4b = a2 * acc1b;
-            d1a = A1a + d2a;
-            d1b = A1b + d2b;
-            d2a = p2a + p4a;
-            d2b = p2b + p4b;
-
-            *pOut++ = acc1a;
-            *pOut++ = acc1b;
-
-            sample--;	       
-        }
-
-        /* Store the updated state variables back into the state array */
-        *pState++ = d1a;
-        *pState++ = d2a;
-        *pState++ = d1b;
-        *pState++ = d2b;
-
-        /* The current stage input is given as the output to the next stage */
-        pIn = pDst;
-
-        /*Reset the output working pointer */
-        pOut = pDst;
-
-        /* decrement the loop counter */
-        stage--;
-
-    } while(stage > 0u);
-
-#endif 
-
-}
-LOW_OPTIMIZATION_EXIT
-
-/**       
-   * @} end of BiquadCascadeDF2T group       
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
deleted file mode 100644
index 3ec432f7..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_biquad_cascade_stereo_df2T_init_f32.c    
-*    
-* Description:  Initialization function for the floating-point transposed   
-*               direct form II Biquad cascade filter.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup BiquadCascadeDF2T    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.   
- * @param[in,out] *S           points to an instance of the filter data structure.   
- * @param[in]     numStages    number of 2nd order stages in the filter.   
- * @param[in]     *pCoeffs     points to the filter coefficients.   
- * @param[in]     *pState      points to the state buffer.   
- * @return        none   
- *    
- * Coefficient and State Ordering:    
- * \par    
- * The coefficients are stored in the array pCoeffs in the following order:    
- * 
    
- *     {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}    
- * 
    
- *    
- * \par    
- * where b1x and a1x are the coefficients for the first stage,    
- * b2x and a2x are the coefficients for the second stage,    
- * and so on.  The pCoeffs array contains a total of 5*numStages values.    
- *    
- * \par    
- * The pState is a pointer to state array.    
- * Each Biquad stage has 2 state variables d1, and d2 for each channel.    
- * The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.    
- * The state array has a total length of 2*numStages values.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- */
-
-void arm_biquad_cascade_stereo_df2T_init_f32(
-  arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4u * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**    
- * @} end of BiquadCascadeDF2T group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c
deleted file mode 100644
index 65f7ab8a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_f32.c
+++ /dev/null
@@ -1,647 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_f32.c    
-*    
-* Description:	Convolution of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup Conv Convolution    
- *    
- * Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.    
- * Convolution is similar to correlation and is frequently used in filtering and data analysis.    
- * The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.    
- * The library also provides fast versions of the Q15 and Q31 functions on Cortex-M4 and Cortex-M3.    
- *    
- * \par Algorithm    
- * Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively.    
- * Then the convolution    
- *    
- * 
    
- *                   c[n] = a[n] * b[n]    
- * 
    
- *    
- * \par    
- * is defined as    
- * \image html ConvolutionEquation.gif    
- * \par    
- * Note that c[n] is of length srcALen + srcBLen - 1 and is defined over the interval n=0, 1, 2, ..., srcALen + srcBLen - 2.    
- * pSrcA points to the first input vector of length srcALen and    
- * pSrcB points to the second input vector of length srcBLen.    
- * The output result is written to pDst and the calling function must allocate srcALen+srcBLen-1 words for the result.    
- *    
- * \par    
- * Conceptually, when two signals a[n] and b[n] are convolved,    
- * the signal b[n] slides over a[n].    
- * For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.    
- *    
- * \par    
- * Note that convolution is a commutative operation:    
- *    
- * 
    
- *                   a[n] * b[n] = b[n] * a[n].    
- * 
    
- *    
- * \par    
- * This means that switching the A and B arguments to the convolution functions has no effect.    
- *    
- * Fixed-Point Behavior    
- *    
- * \par    
- * Convolution requires summing up a large number of intermediate products.    
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.    
- * Refer to the function specific documentation below for further details of the particular algorithm used.    
- *
- *
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions 
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of floating-point sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- */
-
-void arm_conv_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1;                               /* inputA pointer */
-  float32_t *pIn2;                               /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
-  float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counters */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.    
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum += *px++ * *py--;
-
-      /* x[1] * y[srcBLen - 2] */
-      sum += *px++ * *py--;
-
-      /* x[2] * y[srcBLen - 3] */
-      sum += *px++ * *py--;
-
-      /* x[3] * y[srcBLen - 4] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-
-        /* Read x[3] sample */
-        x3 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 += x0 * c0;
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 += x1 * c0;
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 += x2 * c0;
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] */
-        acc3 += x3 * c0;
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py--);
-
-        /* Read x[4] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 += x1 * c0;
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 += x2 * c0;
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 += x3 * c0;
-        /* acc3 +=  x[4] * y[srcBLen - 2] */
-        acc3 += x0 * c0;
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-
-        /* Read x[5] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 += x2 * c0;
-        /* acc1 +=  x[3] * y[srcBLen - 2] */
-        acc1 += x3 * c0;
-        /* acc2 +=  x[4] * y[srcBLen - 2] */
-        acc2 += x0 * c0;
-        /* acc3 +=  x[5] * y[srcBLen - 2] */
-        acc3 += x1 * c0;
-
-        /* Read y[srcBLen - 4] sample */
-        c0 = *(py--);
-
-        /* Read x[6] sample */
-        x2 = *(px + 3u);
-        px += 4u;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[srcBLen - 4] */
-        acc0 += x3 * c0;
-        /* acc1 +=  x[4] * y[srcBLen - 4] */
-        acc1 += x0 * c0;
-        /* acc2 +=  x[5] * y[srcBLen - 4] */
-        acc2 += x1 * c0;
-        /* acc3 +=  x[6] * y[srcBLen - 4] */
-        acc3 += x2 * c0;
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 += x3 * c0;
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-      *pOut++ = acc1;
-      *pOut++ = acc2;
-      *pOut++ = acc3;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum += *px++ * *py--;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i < ((srcALen + srcBLen) - 1u); i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0.0f;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += pIn1[j] * pIn2[i - j];
-      }
-    }
-    /* Store the output in the destination buffer */
-    pDst[i] = sum;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
deleted file mode 100644
index ad1d7090..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
+++ /dev/null
@@ -1,543 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *     
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results    
- * but provides only a single guard bit. There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.    
- *    
- * \par    
- * See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.    
- */
-
-void arm_conv_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  uint32_t tapCnt;                               /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifdef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* Pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2 + srcBLen - 1;
-
-  /* points to smaller length sequence */
-  px = pIn2;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-
-  /* Copy smaller length input sequence in reverse order into second scratch buffer */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1u) zeros in scratch1 buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = py;
-
-  /* First part of the processing with loop unrolling process 4 data points at a time.       
-   ** a second loop below process for the remaining 1 to 3 samples. */
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = _SIMD32_OFFSET(pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x2, y2, acc0);
-      acc2 = __SMLAD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-	  a = *pScr1;
-	  b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-	  a = *(pScr1 + 2);
-	  b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* update scratch pointers */
-      pIn2 += 4u;
-      pScr1 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c
deleted file mode 100644
index a8a4ffee..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_fast_q15.c
+++ /dev/null
@@ -1,1410 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_fast_q15.c   
-*   
-* Description:	Fast Q15 Convolution.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-* 
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Conv   
- * @{   
- */
-
-/**   
- * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * This fast version uses a 32-bit accumulator with 2.30 format.   
- * The accumulator maintains full precision of the intermediate multiplication results   
- * but provides only a single guard bit. There is no saturation on intermediate additions.   
- * Thus, if the accumulator overflows it wraps around and distorts the result.   
- * The input signals should be scaled down to avoid intermediate overflows.   
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,   
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.   
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.   
- *   
- * \par   
- * See arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.   
- */
-
-void arm_conv_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between   
-     * inputA samples and inputB samples */
-    k = count;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ = __PKHBT((acc0 >> 15), (acc1 >> 15), 16);
-      *__SIMD32(pOut)++ = __PKHBT((acc2 >> 15), (acc3 >> 15), 16);
-
-#else
-
-      *__SIMD32(pOut)++ = __PKHBT((acc1 >> 15), (acc0 >> 15), 16);
-      *__SIMD32(pOut)++ = __PKHBT((acc3 >> 15), (acc2 >> 15), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
-
-  while((j > 0u) && (blockSize3 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD   
-     * So, py is incremented by 1 */
-    py = py + 1u;
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-  uint32_t blockSize1, blockSize2, blockSize3, j, k, count, blkCnt;     /* loop counter */
-  q15_t a, b;
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between   
-     * inputA samples and inputB samples */
-    k = count;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:   
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1u);
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;	  
-
-      /* read x[0], x[1] samples */
-	  a = *px++;
-	  b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *px;
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *px;
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x2 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  x2 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  a = *(px + 2);
-	  b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px+1);
-		px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		a = *(px+2);
-		b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-	  *pOut++ = (q15_t)(acc0 >> 15);
-	  *pOut++ = (q15_t)(acc1 >> 15);
-	  *pOut++ = (q15_t)(acc2 >> 15);
-	  *pOut++ = (q15_t)(acc3 >> 15);
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  pIn2 = pSrc2 - 1u;
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2u;
-
-  while((j > 0u) && (blockSize3 > 0u))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {	
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,   
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1u;
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-}
-
-/**   
- * @} end of Conv group   
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c
deleted file mode 100644
index c21bcd25..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q15.c
+++ /dev/null
@@ -1,545 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_opt_q15.c    
-*    
-* Description:	Convolution of Q15 sequences.      
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q15 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).    
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *    
- *       
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * This approach provides 33 guard bits and there is no risk of overflow.    
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.    
- *  
- *   
- * \par    
- * Refer to arm_conv_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.     
- * 
- *  
- */
-
-void arm_conv_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  uint32_t tapCnt;                               /* loop count */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2 + srcBLen - 1;
-
-  /* points to smaller length sequence */
-  px = pIn2;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  /* Copy smaller length input sequence in reverse order into second scratch buffer */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr2-- = *px++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = py;
-
-  /* First part of the processing with loop unrolling process 4 data points at a time.       
-   ** a second loop below process for the remaining 1 to 3 samples. */
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x1, y1, acc0);
-      acc2 = __SMLALD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = _SIMD32_OFFSET(pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x2, y2, acc0);
-      acc2 = __SMLALD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-	  a = *pScr1;
-	  b = *(pScr1 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-	  a = *(pScr1 + 2);
-	  b = *(pScr1 + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-      pScr1 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pOut)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read next two samples from scratch1 buffer */
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c
deleted file mode 100644
index 71c06958..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_opt_q7.c
+++ /dev/null
@@ -1,435 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_opt_q7.c    
-*    
-* Description:	Convolution of Q7 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q7 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).   
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
- *       
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.    
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.    
- *
- */
-
-void arm_conv_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2;
-
-  /* points to smaller length sequence */
-  px = pIn2 + srcBLen - 1;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * px--;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = (q7_t *) py;
-
-  pScr2 = py;
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-      acc0 = __SMLAD(x2, y1, acc0);
-
-      acc2 = __SMLAD(x1, y1, acc2);
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      pScr2 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2);
-      acc1 += (*pScr1++ * *pScr2);
-      acc2 += (*pScr1++ * *pScr2);
-      acc3 += (*pScr1++ * *pScr2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    out0 = (q7_t) (__SSAT(acc0 >> 7u, 8));
-    out1 = (q7_t) (__SSAT(acc1 >> 7u, 8));
-    out2 = (q7_t) (__SSAT(acc2 >> 7u, 8));
-    out3 = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-    *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-      acc0 += (*pScr1++ * *pScr2++);
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c
deleted file mode 100644
index af7ec9b7..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_f32.c
+++ /dev/null
@@ -1,669 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_f32.c    
-*    
-* Description:	Partial convolution of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup PartialConv Partial Convolution    
- *    
- * Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.    
- * Each function has two additional arguments.    
- * firstIndex specifies the starting index of the subset of output samples.    
- * numPoints is the number of output samples to compute.    
- * The function computes the output in the range    
- * [firstIndex, ..., firstIndex+numPoints-1].    
- * The output array pDst contains numPoints values.    
- *    
- * The allowable range of output indices is [0 srcALen+srcBLen-2].    
- * If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.    
- * Otherwise the functions return ARM_MATH_SUCCESS.    
- * \note Refer arm_conv_f32() for details on fixed point behavior.   
- *
- * 
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15 of partial convolution.  Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of partial convolution
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of floating-point sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- */
-
-arm_status arm_conv_partial_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulator */
-  float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count = 0u, blkCnt, check;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds    
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = ((int32_t) check - blockSize3) -
-      (blockSize1 + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex    
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------    
-     * Initializations of stage1    
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from from firstIndex    
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc1 = pIn2 + firstIndex;
-    py = pSrc1;
-
-    /* ------------------------    
-     * Stage1 process    
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum += *px++ * *py--;
-
-        /* x[1] * y[srcBLen - 2] */
-        sum += *px++ * *py--;
-
-        /* x[2] * y[srcBLen - 3] */
-        sum += *px++ * *py--;
-
-        /* x[3] * y[srcBLen - 4] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc1;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------    
-     * Initializations of stage2    
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------    
-     * Stage2 process    
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0.0f;
-        acc1 = 0.0f;
-        acc2 = 0.0f;
-        acc3 = 0.0f;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-        x2 = *(px++);
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py--);
-
-          /* Read x[3] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += x0 * c0;
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += x1 * c0;
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += x2 * c0;
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] */
-          acc3 += x3 * c0;
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py--);
-
-          /* Read x[4] sample */
-          x0 = *(px++);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += x1 * c0;
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += x2 * c0;
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += x3 * c0;
-          /* acc3 +=  x[4] * y[srcBLen - 2] */
-          acc3 += x0 * c0;
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py--);
-
-          /* Read x[5] sample */
-          x1 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += x2 * c0;
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += x3 * c0;
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += x0 * c0;
-          /* acc3 +=  x[5] * y[srcBLen - 2] */
-          acc3 += x1 * c0;
-
-          /* Read y[srcBLen - 4] sample */
-          c0 = *(py--);
-
-          /* Read x[6] sample */
-          x2 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[3] * y[srcBLen - 4] */
-          acc0 += x3 * c0;
-          /* acc1 +=  x[4] * y[srcBLen - 4] */
-          acc1 += x0 * c0;
-          /* acc2 +=  x[5] * y[srcBLen - 4] */
-          acc2 += x1 * c0;
-          /* acc3 +=  x[6] * y[srcBLen - 4] */
-          acc3 += x2 * c0;
-
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x3 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += x0 * c0;
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += x1 * c0;
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += x2 * c0;
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 += x3 * c0;
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = acc0;
-        *pOut++ = acc1;
-        *pOut++ = acc2;
-        *pOut++ = acc3;
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0.0f;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,    
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0.0f;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += *px++ * *py--;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------    
-     * Initializations of stage3    
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB;                       /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0.0f;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0u; j <= i; j++)
-      {
-        /* Check the array limitations for inputs */
-        if((((i - j) < srcBLen) && (j < srcALen)))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += pIn1[j] * pIn2[i - j];
-        }
-      }
-      /* Store the output in the destination buffer */
-      pDst[i] = sum;
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
deleted file mode 100644
index d0f9ffb4..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
+++ /dev/null
@@ -1,768 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Partial convolution.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]       *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]       *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit    
- *     
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;
-
-  uint32_t tapCnt;                               /* loop count */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-
-    /* Copy smaller length input sequence in reverse order into second scratch buffer */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Assuming scratch1 buffer is aligned by 32-bit */
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-    /* Copy (srcALen) samples in scratch buffer */
-    arm_copy_q15(pIn1, pScr1, srcALen);
-
-    /* Update pointers */
-    pScr1 += srcALen;
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* First part of the processing with loop unrolling process 4 data points at a time.       
-     ** a second loop below process for the remaining 1 to 3 samples. */
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pIn2);
-        y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-        acc2 = __SMLAD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = _SIMD32_OFFSET(pScr1);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x2, y2, acc0);
-
-        acc2 = __SMLAD(x1, y2, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-        acc1 = __SMLADX(x3, y2, acc1);
-
-        x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y2, acc3);
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pIn2)++;
-
-        acc0 = __SMLAD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-       ** Then store the output in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-#else
-
-arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-  q15_t x10, x11, x20, x21;                      /* Temporary variables to hold srcA buffer */
-  q15_t y10, y11;                                /* Temporary variables to hold srcB buffer */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2;
-        y11 = *(pIn2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-        acc2 += (q31_t) x20 *y10;
-        acc2 += (q31_t) x21 *y11;
-
-        /* multiply and accumlate */
-        acc1 += (q31_t) x11 *y10;
-        acc1 += (q31_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x21 *y10;
-        acc3 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pIn2 + 2u);
-        y11 = *(pIn2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x20 *y10;
-        acc0 += (q31_t) x21 *y11;
-        acc2 += (q31_t) x10 *y10;
-        acc2 += (q31_t) x11 *y11;
-        acc1 += (q31_t) x21 *y10;
-        acc1 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x11 *y10;
-        acc3 += (q31_t) x20 *y11;
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = __SSAT((acc0 >> 15), 16);
-      *pOut++ = __SSAT((acc1 >> 15), 16);
-      *pOut++ = __SSAT((acc2 >> 15), 16);
-      *pOut++ = __SSAT((acc3 >> 15), 16);
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2++;
-        y11 = *pIn2++;
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
deleted file mode 100644
index 122c4549..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
+++ /dev/null
@@ -1,1492 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_fast_q15.c   
-*   
-* Description:	Fast Q15 Partial convolution.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup PartialConv   
- * @{   
- */
-
-/**   
- * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *   
- * See arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.   
- */
-
-
-arm_status arm_conv_partial_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >=srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    while((count < 4u) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-
-    /* --------------------   
-     * Stage2 process   
-     * -------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-      py = py - 1u;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-
-        /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-        /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read the last two inputB samples using SIMD:   
-           * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-          acc0 = __SMLADX(x0, c0, acc0);
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-          acc1 = __SMLADX(x1, c0, acc1);
-
-          /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-          /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-          acc2 = __SMLADX(x2, c0, acc2);
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-          acc3 = __SMLADX(x3, c0, acc3);
-
-          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-          acc0 = __SMLADX(x2, c0, acc0);
-
-          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-          acc1 = __SMLADX(x3, c0, acc1);
-
-          /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-          /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-          acc2 = __SMLADX(x0, c0, acc2);
-
-          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-          acc3 = __SMLADX(x1, c0, acc3);
-
-        } while(--k);
-
-        /* For the next MAC operations, SIMD is not used   
-         * So, the 16 bit pointer if inputB, py is updated */
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        if(k == 1u)
-        {
-          /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-          /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLAD(x0, c0, acc0);
-          acc1 = __SMLAD(x1, c0, acc1);
-          acc2 = __SMLADX(x1, c0, acc2);
-          acc3 = __SMLADX(x3, c0, acc3);
-        }
-
-        if(k == 2u)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-          /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x0, c0, acc0);
-          acc1 = __SMLADX(x1, c0, acc1);
-          acc2 = __SMLADX(x3, c0, acc2);
-          acc3 = __SMLADX(x2, c0, acc3);
-        }
-
-        if(k == 3u)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-          /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-          /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x0, c0, acc0);
-          acc1 = __SMLADX(x1, c0, acc1);
-          acc2 = __SMLADX(x3, c0, acc2);
-          acc3 = __SMLADX(x2, c0, acc3);
-
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-          /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x1, c0, acc0);
-          acc1 = __SMLAD(x2, c0, acc1);
-          acc2 = __SMLADX(x2, c0, acc2);
-          acc3 = __SMLADX(x3, c0, acc3);
-        }
-
-        /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *__SIMD32(pOut)++ = __PKHBT(acc0 >> 15, acc1 >> 15, 16);
-        *__SIMD32(pOut)++ = __PKHBT(acc2 >> 15, acc3 >> 15, 16);
-
-#else
-
-        *__SIMD32(pOut)++ = __PKHBT(acc1 >> 15, acc0 >> 15, 16);
-        *__SIMD32(pOut)++ = __PKHBT(acc3 >> 15, acc2 >> 15, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counters                 */
-  arm_status status;                             /* status of Partial convolution */
-  q15_t a, b;
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >=srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = ((int32_t) check - blockSize3) -
-      (blockSize1 + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-  while((count < 4u) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-  while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-      sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-
-    /* --------------------   
-     * Stage2 process   
-     * -------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-     * So, to loop unroll over blockSize2,   
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blockSize2, by 4 */
-      blkCnt = ((uint32_t) blockSize2 >> 2u);
-
-      while(blkCnt > 0u)
-      {
-      py = py - 1u;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-      /* read x[0], x[1] samples */
-	  a = *px++;
-	  b = *px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *px;
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *px;
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x2 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  x2 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-		a = *py;
-		b = *(py+1);
-		py -= 2;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  a = *(px + 2);
-	  b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 4);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px+1);
-		px++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-		a = *py;
-		b = *(py+1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		c0 = __PKHBT(a, b, 16);
-
-#else
-
- 		c0 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-	  x3 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  x3 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	   */
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		a = *(px+2);
-		b = *(px+3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-		x3 = __PKHBT(a, b, 16);
-
-#else
-
- 		x3 = __PKHBT(b, a, 16);;
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-	  *pOut++ = (q15_t)(acc0 >> 15);
-	  *pOut++ = (q15_t)(acc1 >> 15);
-	  *pOut++ = (q15_t)(acc2 >> 15);
-	  *pOut++ = (q15_t)(acc3 >> 15);
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-	py++;
-
-    while(k > 0u)
-    {	
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-        sum += ((q31_t) * px++ * *py--);
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-  while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#endif /*     #ifndef UNALIGNED_SUPPORT_DISABLE      */
-}
-
-/**   
- * @} end of PartialConv group   
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
deleted file mode 100644
index 13f9420a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
+++ /dev/null
@@ -1,765 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_opt_q15.c    
-*    
-* Description:	Partial convolution of Q15 sequences.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q15 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]       *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @param[in]       *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, state buffers should be aligned by 32-bit    
- *    
- * Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.   
- *  
- * 
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-  q31_t y1, y2;                                  /* State variables */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-    /* Copy (srcALen) samples in scratch buffer */
-    arm_copy_q15(pIn1, pScr1, srcALen);
-
-    /* Update pointers */
-    pScr1 += srcALen;
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pIn2);
-        y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-        /* multiply and accumlate */
-        acc0 = __SMLALD(x1, y1, acc0);
-        acc2 = __SMLALD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLALDX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = _SIMD32_OFFSET(pScr1);
-
-        /* multiply and accumlate */
-        acc0 = __SMLALD(x2, y2, acc0);
-        acc2 = __SMLALD(x1, y2, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLALDX(x3, y1, acc3);
-        acc1 = __SMLALDX(x3, y2, acc1);
-
-        x2 = _SIMD32_OFFSET(pScr1 + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLALDX(x3, y2, acc3);
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pIn2)++;
-
-        acc0 = __SMLALD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#else
-
-arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pOut = pDst;                            /* output pointer */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q15_t *pIn1;                                   /* inputA pointer */
-  q15_t *pIn2;                                   /* inputB pointer */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  uint32_t j, k, blkCnt;                         /* loop counter */
-  arm_status status;                             /* Status variable */
-  uint32_t tapCnt;                               /* loop count */
-  q15_t x10, x11, x20, x21;                      /* Temporary variables to hold srcA buffer */
-  q15_t y10, y11;                                /* Temporary variables to hold srcB buffer */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = *pIn1++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2;
-        y11 = *(pIn2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x10 *y10;
-        acc0 += (q63_t) x11 *y11;
-        acc2 += (q63_t) x20 *y10;
-        acc2 += (q63_t) x21 *y11;
-
-        /* multiply and accumlate */
-        acc1 += (q63_t) x11 *y10;
-        acc1 += (q63_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q63_t) x21 *y10;
-        acc3 += (q63_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pIn2 + 2u);
-        y11 = *(pIn2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x20 *y10;
-        acc0 += (q63_t) x21 *y11;
-        acc2 += (q63_t) x10 *y10;
-        acc2 += (q63_t) x11 *y11;
-        acc1 += (q63_t) x21 *y10;
-        acc1 += (q63_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q63_t) x11 *y10;
-        acc3 += (q63_t) x20 *y11;
-
-        /* update scratch pointers */
-        pIn2 += 4u;
-        pScr1 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = __SSAT((acc0 >> 15), 16);
-      *pOut++ = __SSAT((acc1 >> 15), 16);
-      *pOut++ = __SSAT((acc2 >> 15), 16);
-      *pOut++ = __SSAT((acc3 >> 15), 16);
-
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-
-    blkCnt = numPoints & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pIn2++;
-        y11 = *pIn2++;
-
-        /* multiply and accumlate */
-        acc0 += (q63_t) x10 *y10;
-        acc0 += (q63_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
deleted file mode 100644
index 815ac14b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
+++ /dev/null
@@ -1,803 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_opt_q7.c    
-*    
-* Description:	Partial convolution of Q7 sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q7 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @param[in]      *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]      *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).    
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit   
- * 
- *
- * 
- */
-
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  arm_status status;
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t out0, out1, out2, out3;                   /* temporary variables */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2;
-
-    /* points to smaller length sequence */
-    px = pIn2 + srcBLen - 1;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy (srcALen) samples in scratch buffer */
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1u);
-
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = (q7_t *) py;
-
-    pScr2 = py;
-
-    pOut = pDst + firstIndex;
-
-    pScratch1 += firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = *__SIMD32(pScr1)++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pScr2);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-        acc2 = __SMLAD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-
-        /* Read four samples from smaller buffer */
-        y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-        acc0 = __SMLAD(x2, y1, acc0);
-
-        acc2 = __SMLAD(x1, y1, acc2);
-
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-
-        pScr2 += 4u;
-
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2);
-        acc1 += (*pScr1++ * *pScr2);
-        acc2 += (*pScr1++ * *pScr2);
-        acc3 += (*pScr1++ * *pScr2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      out0 = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      out1 = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      out2 = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      out3 = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-      *__SIMD32(pOut)++ = __PACKq7(out0, out1, out2, out3);
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-    blkCnt = (numPoints) & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = *__SIMD32(pScr1)++;
-
-        /* Read two samples from smaller buffer */
-        y1 = *__SIMD32(pScr2)++;
-
-        acc0 = __SMLAD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-
-  }
-
-  return (status);
-
-}
-
-#else
-
-arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-
-  q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-  q15_t x4;                                      /* Temporary input variable */
-  q7_t *pIn1, *pIn2;                             /* inputA and inputB pointer */
-  uint32_t j, k, blkCnt, tapCnt;                 /* loop counter */
-  q7_t *px;                                      /* Temporary input1 pointer */
-  q15_t *py;                                     /* Temporary input2 pointer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-  arm_status status;
-  q7_t *pOut = pDst;                             /* output pointer */
-  q15_t x10, x11, x20, x21;                      /* Temporary input variables */
-  q15_t y10, y11;                                /* Temporary input variables */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2;
-
-    /* points to smaller length sequence */
-    px = pIn2 + srcBLen - 1;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * px--;
-      *pScr2++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1u) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1u);
-
-    /* Copy (srcALen) samples in scratch buffer */
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) * pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = (srcBLen - 1u) >> 2u;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.       
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.       
-     ** No loop unrolling is used. */
-    k = (srcBLen - 1u) % 0x4u;
-
-    while(k > 0u)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr1++ = 0;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = (q7_t *) py;
-
-    pScr2 = py;
-
-    pOut = pDst + firstIndex;
-
-    pScratch1 += firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x10 = *pScr1++;
-      x11 = *pScr1++;
-
-      /* Read next two samples from scratch1 buffer */
-      x20 = *pScr1++;
-      x21 = *pScr1++;
-
-      tapCnt = (srcBLen) >> 2u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read four samples from smaller buffer */
-        y10 = *pScr2;
-        y11 = *(pScr2 + 1u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-        acc2 += (q31_t) x20 *y10;
-        acc2 += (q31_t) x21 *y11;
-
-
-        acc1 += (q31_t) x11 *y10;
-        acc1 += (q31_t) x20 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1;
-        x11 = *(pScr1 + 1u);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x21 *y10;
-        acc3 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch2 buffer */
-        y10 = *(pScr2 + 2u);
-        y11 = *(pScr2 + 3u);
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x20 *y10;
-        acc0 += (q31_t) x21 *y11;
-        acc2 += (q31_t) x10 *y10;
-        acc2 += (q31_t) x11 *y11;
-        acc1 += (q31_t) x21 *y10;
-        acc1 += (q31_t) x10 *y11;
-
-        /* Read next two samples from scratch1 buffer */
-        x20 = *(pScr1 + 2);
-        x21 = *(pScr1 + 3);
-
-        /* multiply and accumlate */
-        acc3 += (q31_t) x11 *y10;
-        acc3 += (q31_t) x20 *y11;
-
-        /* update scratch pointers */
-
-        pScr1 += 4u;
-        pScr2 += 4u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4u;
-
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2);
-        acc1 += (*pScr1++ * *pScr2);
-        acc2 += (*pScr1++ * *pScr2);
-        acc3 += (*pScr1++ * *pScr2++);
-
-        pScr1 -= 3u;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 4u;
-
-    }
-
-    blkCnt = (numPoints) & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while(blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x10 = *pScr1++;
-        x11 = *pScr1++;
-
-        /* Read two samples from smaller buffer */
-        y10 = *pScr2++;
-        y11 = *pScr2++;
-
-        /* multiply and accumlate */
-        acc0 += (q31_t) x10 *y10;
-        acc0 += (q31_t) x11 *y11;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1u;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while(tapCnt > 0u)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2++);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 1u;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  return (status);
-
-}
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c
deleted file mode 100644
index e85ba2b3..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q15.c
+++ /dev/null
@@ -1,786 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_partial_q15.c   
-*   
-* Description:	Partial convolution of Q15 sequences.  
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-* 
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup PartialConv   
- * @{   
- */
-
-/**   
- * @brief Partial convolution of Q15 sequences.   
- * @param[in]       *pSrcA points to the first input sequence.   
- * @param[in]       srcALen length of the first input sequence.   
- * @param[in]       *pSrcB points to the second input sequence.   
- * @param[in]       srcBLen length of the second input sequence.   
- * @param[out]      *pDst points to the location where the output result is written.   
- * @param[in]       firstIndex is the first output sample to start with.   
- * @param[in]       numPoints is the number of output points to be computed.   
- * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].   
- *   
- * Refer to arm_conv_partial_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.  
- * 
- * \par    
- * Refer the function arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
- * 
- */
-
-
-arm_status arm_conv_partial_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-#if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds   
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally   
-     * divided into three stages according to the number of multiplications that has to be   
-     * taken place between inputA samples and inputB samples. In the first stage of the   
-     * algorithm, the multiplications increase by one for every iteration.   
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-     * In the third stage of the algorithm, the multiplications decrease by one   
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex   
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------   
-     * Initializations of stage1   
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]   
-     * sum = x[0] * y[1] + x[1] * y[0]   
-     * ....   
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed.   
-       Since the partial convolution starts from firstIndex   
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------   
-     * Stage1 process   
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    while((count < 4u) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between   
-       * inputA samples and inputB samples */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:   
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1u;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------   
-     * Initializations of stage2   
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-     * ....   
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-
-  /* --------------------   
-   * Stage2 process   
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      py = py - 1u;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px+1);
-	  px+= 2u;
-
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:   
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLALDX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLALDX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px+1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLALDX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLALDX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = *__SIMD32(py)--;
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLALDX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLALDX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px+2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px+3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLALDX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLALDX(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = _SIMD32_OFFSET(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px+1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-
-		c0 = *(py-1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 =  _SIMD32_OFFSET(px+2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-
-      /* Store the results in the accumulators in the destination buffer. */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-      *__SIMD32(pOut)++ =
-        __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-       ** No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4u;
-  	  
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,   
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) ((q31_t) * px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-  
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------   
-     * Initializations of stage3   
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-     * ....   
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-     * sum +=  x[srcALen-1] * y[srcBLen-1]   
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.   
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    pIn2 = pSrc2 - 1u;
-    py = pIn2;
-
-    /* -------------------   
-     * Stage3 process   
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2u;
-
-    while((j > 0u) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied   
-         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied   
-         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(*__SIMD32(px)++, *__SIMD32(py)--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD   
-       * So, py is incremented by 1 */
-      py = py + 1u;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,   
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1u;
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA;                           /* inputA pointer */
-  q15_t *pIn2 = pSrcB;                           /* inputB pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q31_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q15_t) __SSAT((sum >> 15u), 16u);
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /* #if (defined(ARM_MATH_CM4) || defined(ARM_MATH_CM3)) && !defined(UNALIGNED_SUPPORT_DISABLE)  */
-
-}
-
-/**   
- * @} end of PartialConv group   
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c
deleted file mode 100644
index 8b0833f8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_partial_q31.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_partial_q31.c    
-*    
-* Description:	Partial convolution of Q31 sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup PartialConv    
- * @{    
- */
-
-/**    
- * @brief Partial convolution of Q31 sequences.    
- * @param[in]       *pSrcA points to the first input sequence.    
- * @param[in]       srcALen length of the first input sequence.    
- * @param[in]       *pSrcB points to the second input sequence.    
- * @param[in]       srcBLen length of the second input sequence.    
- * @param[out]      *pDst points to the location where the output result is written.    
- * @param[in]       firstIndex is the first output sample to start with.    
- * @param[in]       numPoints is the number of output points to be computed.    
- * @return Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].    
- *    
- * See arm_conv_partial_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-arm_status arm_conv_partial_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers        */
-  q63_t sum, acc0, acc1, acc2;                   /* Accumulator                  */
-  q31_t x0, x1, x2, c0;
-  uint32_t j, k, count, check, blkCnt;
-  int32_t blockSize1, blockSize2, blockSize3;    /* loop counter                 */
-  arm_status status;                             /* status of Partial convolution */
-
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if(srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds    
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = (((int32_t) srcBLen - 1) - (int32_t) firstIndex);
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1u)) ? blockSize1 :
-                                     (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) +
-                                    (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally    
-     * divided into three stages according to the number of multiplications that has to be    
-     * taken place between inputA samples and inputB samples. In the first stage of the    
-     * algorithm, the multiplications increase by one for every iteration.    
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-     * In the third stage of the algorithm, the multiplications decrease by one    
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex    
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------    
-     * Initializations of stage1    
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]    
-     * sum = x[0] * y[1] + x[1] * y[0]    
-     * ....    
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.    
-       The count variable holds the number of MAC operations performed.    
-       Since the partial convolution starts from firstIndex    
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1u + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------    
-     * Stage1 process    
-     * ----------------------*/
-
-    /* The first loop starts here */
-    while(blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[1] * y[srcBLen - 2] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[2] * y[srcBLen - 3] */
-        sum += (q63_t) * px++ * (*py--);
-        /* x[3] * y[srcBLen - 4] */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Decrement the loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------    
-     * Initializations of stage2    
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-     * ....    
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-     */
-
-    /* Working pointer of inputA */
-    if((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      px = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      px = pIn1;
-    }
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0u;
-
-    /* -------------------    
-     * Stage2 process    
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-     * So, to loop unroll over blockSize2,    
-     * srcBLen should be greater than or equal to 4 */
-    if(srcBLen >= 4u)
-    {
-      /* Loop unroll over blkCnt */
-
-      blkCnt = blockSize2 / 3;
-      while(blkCnt > 0u)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-
-        /* read x[0], x[1] samples */
-        x0 = *(px++);
-        x1 = *(px++);
-
-        /* Apply loop unrolling and compute 3 MACs simultaneously. */
-        k = srcBLen / 3;
-
-        /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-         ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py);
-
-          /* Read x[2] sample */
-          x2 = *(px);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += (q63_t) x0 *c0;
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += (q63_t) x1 *c0;
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += (q63_t) x2 *c0;
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py - 1u);
-
-          /* Read x[3] sample */
-          x0 = *(px + 1u);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += (q63_t) x1 *c0;
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += (q63_t) x2 *c0;
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += (q63_t) x0 *c0;
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py - 2u);
-
-          /* Read x[4] sample */
-          x1 = *(px + 2u);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += (q63_t) x2 *c0;
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += (q63_t) x0 *c0;
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += (q63_t) x1 *c0;
-
-
-          px += 3u;
-
-          py -= 3u;
-
-        } while(--k);
-
-        /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-         ** No loop unrolling is used. */
-        k = srcBLen - (3 * (srcBLen / 3));
-
-        while(k > 0u)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *(py--);
-
-          /* Read x[7] sample */
-          x2 = *(px++);
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += (q63_t) x0 *c0;
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += (q63_t) x1 *c0;
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += (q63_t) x2 *c0;
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (acc0 >> 31);
-        *pOut++ = (q31_t) (acc1 >> 31);
-        *pOut++ = (q31_t) (acc2 >> 31);
-
-        /* Increment the pointer pIn1 index, count by 3 */
-        count += 3u;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2u;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4u;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (sum >> 31);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,    
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while(blkCnt > 0u)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while(k > 0u)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) * px++ * (*py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (sum >> 31);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pIn1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------    
-     * Initializations of stage3    
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-     * ....    
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-     * sum +=  x[srcALen-1] * y[srcBLen-1]    
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.    
-       The blockSize3 variable holds the number of MAC operations performed */
-    count = srcBLen - 1u;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1u);
-    py = pSrc2;
-
-    /* -------------------    
-     * Stage3 process    
-     * ------------------*/
-
-    while(blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = count % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* inputA pointer */
-  q31_t *pIn2 = pSrcB;                           /* inputB pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counters */
-  arm_status status;                             /* status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if((firstIndex + numPoints) > ((srcALen + (srcBLen - 1u))))
-  {
-    /* Set status as ARM_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if(((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q31_t) (sum >> 31u);
-    }
-    /* set status as ARM_SUCCESS as there are no argument errors */
-    status = ARM_MATH_SUCCESS;
-  }
-  return (status);
-
-#endif /*    #ifndef ARM_MATH_CM0_FAMILY      */
-
-}
-
-/**    
- * @} end of PartialConv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c
deleted file mode 100644
index ffa972f3..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q31.c
+++ /dev/null
@@ -1,565 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_conv_q31.c    
-*    
-* Description:	Convolution of Q31 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Conv    
- * @{    
- */
-
-/**    
- * @brief Convolution of Q31 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,    
- * as maximum of min(srcALen, srcBLen) number of additions are carried internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_conv_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_conv_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer */
-  q31_t *pIn2;                                   /* inputB pointer */
-  q31_t *pOut = pDst;                            /* output pointer */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-  q63_t sum;                                     /* Accumulator */
-  q63_t acc0, acc1, acc2;                        /* Accumulator */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (q31_t *) pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = (q31_t *) pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally    
-   * divided into three stages according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first stage of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.    
-   * In the third stage of the algorithm, the multiplications decrease by one    
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.    
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]    
-   * sum = x[0] * y[1] + x[1] * y[0]    
-   * ....    
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[1] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[2] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py--);
-      /* x[3] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q31_t) (sum >> 31);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]    
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll by 3 */
-    blkCnt = blockSize2 / 3;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-
-      /* Apply loop unrolling and compute 3 MACs simultaneously. */
-      k = srcBLen / 3;
-
-      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py);
-
-        /* Read x[3] sample */
-        x2 = *(px);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py - 1u);
-
-        /* Read x[4] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 += ((q63_t) x1 * c0);
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 += ((q63_t) x2 * c0);
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 += ((q63_t) x0 * c0);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py - 2u);
-
-        /* Read x[5] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 += ((q63_t) x2 * c0);
-        /* acc1 +=  x[3] * y[srcBLen - 2] */
-        acc1 += ((q63_t) x0 * c0);
-        /* acc2 +=  x[4] * y[srcBLen - 2] */
-        acc2 += ((q63_t) x1 * c0);
-
-        /* update scratch pointers */
-        px += 3u;
-        py -= 3u;
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-       ** No loop unrolling is used. */
-      k = srcBLen - (3 * (srcBLen / 3));
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the results in the accumulators in the destination buffer. */
-      *pOut++ = (q31_t) (acc0 >> 31);
-      *pOut++ = (q31_t) (acc1 >> 31);
-      *pOut++ = (q31_t) (acc2 >> 31);
-
-      /* Increment the pointer pIn1 index, count by 3 */
-      count += 3u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]    
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]    
-   * sum +=  x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py--);
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (q63_t) * px++ * (*py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q31_t) (sum >> 31);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* input pointer */
-  q31_t *pIn2 = pSrcB;                           /* coefficient pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * (pIn2[i - j]));
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q31_t) (sum >> 31u);
-  }
-
-#endif /*     #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of Conv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c
deleted file mode 100644
index 79b08fce..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_conv_q7.c
+++ /dev/null
@@ -1,690 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_conv_q7.c   
-*   
-* Description:	Convolution of Q7 sequences. 
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Conv   
- * @{   
- */
-
-/**   
- * @brief Convolution of Q7 sequences.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.   
- * @return none.   
- *   
- * @details   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * The function is implemented using a 32-bit internal accumulator.   
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.   
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.   
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.   
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.   
- *
- * \par    
- * Refer the function arm_conv_opt_q7() for a faster implementation of this function.
- * 
- */
-
-void arm_conv_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pIn1;                                    /* inputA pointer */
-  q7_t *pIn2;                                    /* inputB pointer */
-  q7_t *pOut = pDst;                             /* output pointer */
-  q7_t *px;                                      /* Intermediate inputA pointer */
-  q7_t *py;                                      /* Intermediate inputB pointer */
-  q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-  q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  q31_t input1, input2;                          /* Temporary input variables */
-  q15_t in1, in2;                                /* Temporary input variables */
-  uint32_t j, k, count, blkCnt, blockSize1, blockSize2, blockSize3;     /* loop counter */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally   
-   * divided into three stages according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first stage of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.   
-   * In the third stage of the algorithm, the multiplications decrease by one   
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.   
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = (srcALen - srcBLen) + 1u;
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]   
-   * sum = x[0] * y[1] + x[1] * y[0]   
-   * ....   
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] , x[1] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* y[srcBLen - 1] , y[srcBLen - 2] */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* x[0] * y[srcBLen - 1] */
-      /* x[1] * y[srcBLen - 2] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[2] , x[3] */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* y[srcBLen - 3] , y[srcBLen - 4] */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* x[2] * y[srcBLen - 3] */
-      /* x[3] * y[srcBLen - 4] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]   
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py--);
-        /* Read y[srcBLen - 2] sample */
-        c1 = *(py--);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* x[0] and x[1] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[1] and x[2] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py--);
-        /* Read y[srcBLen - 4] sample */
-        c1 = *(py--);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[4] and x[5] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* x[5] and x[6] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += ((q15_t) x0 * c0);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += ((q15_t) x1 * c0);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += ((q15_t) x2 * c0);
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 += ((q15_t) x3 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc1 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc2 >> 7u, 8));
-      *pOut++ = (q7_t) (__SSAT(acc3 >> 7u, 8));
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) * px++;
-        in2 = (q15_t) * px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) * py--;
-        in2 = (q15_t) * py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q15_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) * px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]   
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]   
-   * sum +=  x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1u);
-  py = pSrc2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-      in1 = (q15_t) * px++;
-      in2 = (q15_t) * px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-      in1 = (q15_t) * py--;
-      in2 = (q15_t) * py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16u);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += ((q15_t) * px++ * *py--);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(sum >> 7u, 8));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q7_t *pIn1 = pSrcA;                            /* input pointer */
-  q7_t *pIn2 = pSrcB;                            /* coefficient pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint32_t i, j;                                 /* loop counter */
-
-  /* Loop to calculate output of convolution for output length number of times */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if(((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += (q15_t) pIn1[j] * (pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q7_t) __SSAT((sum >> 7u), 8u);
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
-
-}
-
-/**   
- * @} end of Conv group   
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c
deleted file mode 100644
index fec5431f..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_f32.c
+++ /dev/null
@@ -1,739 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_f32.c    
-*    
-* Description:	 Correlation of floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup Corr Correlation    
- *    
- * Correlation is a mathematical operation that is similar to convolution.    
- * As with convolution, correlation uses two signals to produce a third signal.    
- * The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.    
- * Correlation is commonly used to measure the similarity between two signals.    
- * It has applications in pattern recognition, cryptanalysis, and searching.    
- * The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.    
- * Fast versions of the Q15 and Q31 functions are also provided.    
- *    
- * \par Algorithm    
- * Let a[n] and b[n] be sequences of length srcALen and srcBLen samples respectively.    
- * The convolution of the two signals is denoted by    
- * 
    
- *                   c[n] = a[n] * b[n]    
- * 
    
- * In correlation, one of the signals is flipped in time    
- * 
    
- *                   c[n] = a[n] * b[-n]    
- * 
    
- *    
- * \par    
- * and this is mathematically defined as    
- * \image html CorrelateEquation.gif    
- * \par    
- * The pSrcA points to the first input vector of length srcALen and pSrcB points to the second input vector of length srcBLen.    
- * The result c[n] is of length 2 * max(srcALen, srcBLen) - 1 and is defined over the interval n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2).    
- * The output result is written to pDst and the calling function must allocate 2 * max(srcALen, srcBLen) - 1 words for the result.    
- *    
- * Note   
- * \par  
- * The pDst should be initialized to all zeros before being used.  
- *  
- * Fixed-Point Behavior    
- * \par    
- * Correlation requires summing up a large number of intermediate products.    
- * As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.    
- * Refer to the function specific documentation below for further details of the particular algorithm used.    
- *
- *
- * Fast Versions
- *
- * \par 
- * Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
- * the input signals should be scaled down to avoid intermediate overflows.   
- *
- *
- * Opt Versions
- *
- * \par 
- * Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
- * These versions are optimised in cycles and consumes more memory(Scratch memory) compared to Q15 and Q7 versions of correlate 
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-/**    
- * @brief Correlation of floating-point sequences.    
- * @param[in]  *pSrcA points to the first input sequence.    
- * @param[in]  srcALen length of the first input sequence.    
- * @param[in]  *pSrcB points to the second input sequence.    
- * @param[in]  srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- */
-
-void arm_correlate_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t *pIn1;                               /* inputA pointer */
-  float32_t *pIn2;                               /* inputB pointer */
-  float32_t *pOut = pDst;                        /* output pointer */
-  float32_t *px;                                 /* Intermediate inputA pointer */
-  float32_t *py;                                 /* Intermediate inputB pointer */
-  float32_t *pSrc1;                              /* Intermediate pointers */
-  float32_t sum, acc0, acc1, acc2, acc3;         /* Accumulators */
-  float32_t x0, x1, x2, x3, c0;                  /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counters */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,    
-   * we assume zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding has to be done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-    //while(j > 0u)   
-    //{   
-    //  /* Zero is stored in the destination buffer */   
-    //  *pOut++ = 0.0f;   
-
-    //  /* Decrement the loop counter */   
-    //  j--;   
-    //}   
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum += *px++ * *py++;
-      /* x[1] * y[srcBLen - 3] */
-      sum += *px++ * *py++;
-      /* x[2] * y[srcBLen - 2] */
-      sum += *px++ * *py++;
-      /* x[3] * y[srcBLen - 1] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 1] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-      x2 = *(px++);
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py++);
-
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[1] * y[0] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[2] * y[0] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[3] * y[0] */
-        acc3 += x3 * c0;
-
-        /* Read y[1] sample */
-        c0 = *(py++);
-
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 += x1 * c0;
-        /* acc1 +=  x[2] * y[1] */
-        acc1 += x2 * c0;
-        /* acc2 +=  x[3] * y[1] */
-        acc2 += x3 * c0;
-        /* acc3 +=  x[4] * y[1] */
-        acc3 += x0 * c0;
-
-        /* Read y[2] sample */
-        c0 = *(py++);
-
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 += x2 * c0;
-        /* acc1 +=  x[3] * y[2] */
-        acc1 += x3 * c0;
-        /* acc2 +=  x[4] * y[2] */
-        acc2 += x0 * c0;
-        /* acc3 +=  x[5] * y[2] */
-        acc3 += x1 * c0;
-
-        /* Read y[3] sample */
-        c0 = *(py++);
-
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[3] */
-        acc0 += x3 * c0;
-        /* acc1 +=  x[4] * y[3] */
-        acc1 += x0 * c0;
-        /* acc2 +=  x[5] * y[3] */
-        acc2 += x1 * c0;
-        /* acc3 +=  x[6] * y[3] */
-        acc3 += x2 * c0;
-
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[7] * y[4] */
-        acc3 += x3 * c0;
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = acc0;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = acc1;
-      pOut += inc;
-
-      *pOut = acc2;
-      pOut += inc;
-
-      *pOut = acc3;
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += *px++ * *py++;
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += *px++ * *py++;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  float32_t *pIn2 = pSrcB + (srcBLen - 1u);      /* inputB pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two    
-   * inputs of same length. But to improve the performance, we assume zeroes    
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the    
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted   
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0.0f;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += pIn1[j] * pIn2[-((int32_t) i - j)];
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = sum;
-    else
-      *pDst++ = sum;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
deleted file mode 100644
index afeb1907..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
+++ /dev/null
@@ -1,512 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_fast_opt_q15.c    
-*    
-* Description:	Fast Q15 Correlation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.   
- * @return none.    
- *    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch buffers should be aligned by 32-bit    
- *    
- *     
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.    
- *    
- * \par    
- * See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.    
- */
-
-void arm_correlate_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch)
-{
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t x1, x2, x3;                              /* temporary variables for holding input and coefficient values */
-  uint32_t j, blkCnt, outBlockSize;              /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-  uint32_t tapCnt;
-  q31_t y1, y2;
-  q15_t *pScr;                                   /* Intermediate pointers        */
-  q15_t *pOut = pDst;                            /* output pointer               */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  pScr = pScratch;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr += (srcBLen - 1u);
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr, srcALen);
-
-  /* Update pointers */
-  pScr += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = srcALen % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = (srcBLen - 1u) % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pIn2;
-
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read four samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr)++;
-
-    /* Read next four samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x1 = _SIMD32_OFFSET(pScr);
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLAD(x1, y1, acc0);
-
-      acc2 = __SMLAD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-	  a = *pScr;
-	  b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLAD(x2, y2, acc0);
-
-      acc2 = __SMLAD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      acc1 = __SMLADX(x3, y2, acc1);
-
-	  a = *(pScr + 2);
-	  b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-
-      pScr += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2);
-      acc1 += (*pScr++ * *pIn2);
-      acc2 += (*pScr++ * *pIn2);
-      acc3 += (*pScr++ * *pIn2++);
-
-      pScr -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-    *pOut = (__SSAT(acc0 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc1 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc2 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc3 >> 15u, 16));
-    pOut += inc;
-
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr++ * *pIn2++);
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-
-    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 1u;
-
-  }
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c
deleted file mode 100644
index 31a8c7d8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_fast_q15.c
+++ /dev/null
@@ -1,1319 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:		arm_correlate_fast_q15.c   
-*   
-* Description:	Fast Q15 Correlation.   
-*   
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**   
- * @ingroup groupFilters   
- */
-
-/**   
- * @addtogroup Corr   
- * @{   
- */
-
-/**   
- * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.   
- * @param[in] *pSrcA points to the first input sequence.   
- * @param[in] srcALen length of the first input sequence.   
- * @param[in] *pSrcB points to the second input sequence.   
- * @param[in] srcBLen length of the second input sequence.   
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.   
- * @return none.   
- *   
- * Scaling and Overflow Behavior:   
- *   
- * \par   
- * This fast version uses a 32-bit accumulator with 2.30 format.   
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.   
- * There is no saturation on intermediate additions.   
- * Thus, if the accumulator overflows it wraps around and distorts the result.   
- * The input signals should be scaled down to avoid intermediate overflows.   
- * Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a   
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.   
- * The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.   
- *   
- * \par   
- * See arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.   
- */
-
-void arm_correlate_fast_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst)
-{
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum = __SMLAD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *__SIMD32(px);
-      /* read x[1], x[2] samples */
-      x1 = _SIMD32_OFFSET(px + 1);
-	  px += 2u;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:   
-         * y[0] and y[1] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLAD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = *__SIMD32(px);
-
-        /* Read x[3], x[4] */
-        x3 = _SIMD32_OFFSET(px + 1);
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLAD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLAD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-        c0 = *__SIMD32(py)++;
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLAD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLAD(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = _SIMD32_OFFSET(px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = _SIMD32_OFFSET(px + 3);
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLAD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLAD(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-        x3 = *__SIMD32(px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py);
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[4], y[5] */
-        c0 = *__SIMD32(py)++;
-
-        /* Read x[7], x[8] */
-        x3 = *__SIMD32(px);
-
-        /* Read x[9] */
-        x2 = _SIMD32_OFFSET(px + 1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-
-        c0 = (*py);
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-        x3 = _SIMD32_OFFSET(px + 2);
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (acc0 >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (acc1 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc2 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc3 >> 15);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLAD(*__SIMD32(px)++, *__SIMD32(py)++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q15_t *pOut = pDst;                            /* output pointer               */
-  q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators                  */
-  q15_t *px;                                     /* Intermediate inputA pointer  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q15_t *pSrc1;                                  /* Intermediate pointers        */
-  q31_t x0, x1, x2, x3, c0;                      /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-  q15_t a, b;
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,   
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,   
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB   
-     * to make their lengths equal.   
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))   
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally   
-   * divided into three parts according to the number of multiplications that has to be   
-   * taken place between inputA samples and inputB samples. In the first part of the   
-   * algorithm, the multiplications increase by one for every iteration.   
-   * In the second part of the algorithm, srcBLen number of multiplications are done.   
-   * In the third part of the algorithm, the multiplications decrease by one   
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.   
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------   
-   * Initializations of stage1   
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]   
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]   
-   * ....   
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]   
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------   
-   * Stage1 process   
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------   
-   * Initializations of stage2   
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]   
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]   
-   * ....   
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------   
-   * Stage2 process   
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.   
-   * So, to loop unroll over blockSize2,   
-   * srcBLen should be greater than or equal to 4, to loop unroll the srcBLen loop */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-	  a = *px;
-	  b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  x0 = __PKHBT(a, b, 16);
-	  a = *(px + 2);
-	  x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  x0 = __PKHBT(b, a, 16);
-	  a = *(px + 2);
-	  x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-	  px += 2u;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:   
-         * y[0] and y[1] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLAD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(x1, c0, acc1);
-
-        /* Read x[2], x[3], x[4] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x2 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x3 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x2 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x3 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLAD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLAD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-		  a = *(py + 2);
-		  b = *(py + 3);
-
-		  py += 4u;
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLAD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLAD(x3, c0, acc1);
-
-        /* Read x[4], x[5], x[6] */
-	  	a = *(px + 2);
-	  	b = *(px + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x0 = __PKHBT(a, b, 16);
-	  	a = *(px + 4);
-	  	x1 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x0 = __PKHBT(b, a, 16);
-	  	a = *(px + 4);
-	  	x1 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 4u;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLAD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLAD(x1, c0, acc3);
-
-      } while(--k);
-
-      /* For the next MAC operations, SIMD is not used   
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      if(k == 1u)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-
-#else
-
-        c0 = c0 & 0x0000FFFF;
-
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[7] */
-		a = *px;
-		b = *(px + 1);
-
-		px++;;
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		x3 = __PKHBT(a, b, 16);
-	
-#else
-	
-		x3 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if(k == 2u)
-      {
-        /* Read y[4], y[5] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Read x[7], x[8], x[9] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x3 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x3 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 2u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-      }
-
-      if(k == 3u)
-      {
-        /* Read y[4], y[5] */
-		  a = *py;
-		  b = *(py + 1);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		  c0 = __PKHBT(a, b, 16);
-	
-#else
-	
-		  c0 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		py += 2u;
-
-        /* Read x[7], x[8], x[9] */
-	  	a = *px;
-	  	b = *(px + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  	x3 = __PKHBT(a, b, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(b, a, 16);
-
-#else
-
-	  	x3 = __PKHBT(b, a, 16);
-	  	a = *(px + 2);
-	  	x2 = __PKHBT(a, b, 16);
-
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-
-        c0 = (*py);
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-
-        c0 = c0 << 16u;
-#else
-
-        c0 = c0 & 0x0000FFFF;
-#endif /*      #ifdef  ARM_MATH_BIG_ENDIAN     */
-
-        /* Read x[10] */
-		b = *(px + 3);
-	
-#ifndef ARM_MATH_BIG_ENDIAN
-	
-		x3 = __PKHBT(a, b, 16);
-	
-#else
-	
-		x3 = __PKHBT(b, a, 16);
-	
-#endif	/*	#ifndef ARM_MATH_BIG_ENDIAN	*/
-
-		px += 3u;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (acc0 >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (acc1 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc2 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc3 >> 15);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count += 4u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.   
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.   
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,   
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------   
-   * Initializations of stage3   
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]   
-   * ....   
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]   
-   * sum +=  x[srcALen-1] * y[0]   
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.   
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1u);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------   
-   * Stage3 process   
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.   
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.   
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#endif /*   #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-}
-
-/**   
- * @} end of Corr group   
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c
deleted file mode 100644
index e54fa95d..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q15.c
+++ /dev/null
@@ -1,513 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_opt_q15.c    
-*    
-* Description:	Correlation of Q15 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q15 sequences.  
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @return none.    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch buffers should be aligned by 32-bit    
- *     
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both inputs are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * This approach provides 33 guard bits and there is no risk of overflow.    
- * The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.    
- *    
- * \par    
- * Refer to arm_correlate_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.   
- *  
- * 
- */
-
-
-void arm_correlate_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch)
-{
-  q15_t *pIn1;                                   /* inputA pointer               */
-  q15_t *pIn2;                                   /* inputB pointer               */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  q15_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t x1, x2, x3;                              /* temporary variables for holding input1 and input2 values */
-  uint32_t j, blkCnt, outBlockSize;              /* loop counter                 */
-  int32_t inc = 1;                               /* output pointer increment     */
-  uint32_t tapCnt;
-  q31_t y1, y2;
-  q15_t *pScr;                                   /* Intermediate pointers        */
-  q15_t *pOut = pDst;                            /* output pointer               */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-  q15_t a, b;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  pScr = pScratch;
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr += (srcBLen - 1u);
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr, srcALen);
-
-  /* Update pointers */
-  //pIn1 += srcALen;    
-  pScr += srcALen;
-
-#else
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = srcALen % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = *pIn1++;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  j = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  j = (srcBLen - 1u) % 0x4u;
-
-  while(j > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr++ = 0;
-
-    /* Decrement the loop counter */
-    j--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for scratch2 */
-  py = pIn2;
-
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read four samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr)++;
-
-    /* Read next four samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pIn2);
-      y2 = _SIMD32_OFFSET(pIn2 + 2u);
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-      x1 = _SIMD32_OFFSET(pScr);
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-      x2 = _SIMD32_OFFSET(pScr + 2u);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#else	 
-
-      /* Read four samples from smaller buffer */
-	  a = *pIn2;
-	  b = *(pIn2 + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      y1 = __PKHBT(a, b, 16);
-#else
-      y1 = __PKHBT(b, a, 16);
-#endif
-	  
-	  a = *(pIn2 + 2);
-	  b = *(pIn2 + 3);
-#ifndef ARM_MATH_BIG_ENDIAN
-      y2 = __PKHBT(a, b, 16);
-#else
-      y2 = __PKHBT(b, a, 16);
-#endif				
-
-      acc0 = __SMLALD(x1, y1, acc0);
-
-      acc2 = __SMLALD(x2, y1, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-	  a = *pScr;
-	  b = *(pScr + 1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(a, b, 16);
-#else
-      x1 = __PKHBT(b, a, 16);
-#endif
-
-      acc0 = __SMLALD(x2, y2, acc0);
-
-      acc2 = __SMLALD(x1, y2, acc2);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-	  a = *(pScr + 2);
-	  b = *(pScr + 3);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x2 = __PKHBT(a, b, 16);
-#else
-      x2 = __PKHBT(b, a, 16);
-#endif
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      pIn2 += 4u;
-
-      pScr += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2);
-      acc1 += (*pScr++ * *pIn2);
-      acc2 += (*pScr++ * *pIn2);
-      acc3 += (*pScr++ * *pIn2++);
-
-      pScr -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-    *pOut = (__SSAT(acc0 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc1 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc2 >> 15u, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc3 >> 15u, 16));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-
-      acc0 += (*pScr++ * *pIn2++);
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr++ * *pIn2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 1u;
-
-  }
-
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c
deleted file mode 100644
index af5dbb3b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_opt_q7.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_opt_q7.c    
-*    
-* Description:	Correlation of Q7 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q7 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.    
- * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).    
- * @return none.    
- *    
- *    
- * \par Restrictions    
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE    
- *	In this case input, output, scratch1 and scratch2 buffers should be aligned by 32-bit     
- *        
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * This approach provides 17 guard bits and there is no risk of overflow as long as max(srcALen, srcBLen)<131072.    
- * The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.  
- *  
- * 
- */
-
-
-
-void arm_correlate_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2)
-{
-  q7_t *pOut = pDst;                             /* output pointer                */
-  q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
-  q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
-  q7_t *pIn1;                                    /* inputA pointer                */
-  q7_t *pIn2;                                    /* inputB pointer                */
-  q15_t *py;                                     /* Intermediate inputB pointer   */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators                  */
-  uint32_t j, k = 0u, blkCnt;                    /* loop counter                  */
-  int32_t inc = 1;                               /* output pointer increment          */
-  uint32_t outBlockSize;                         /* loop counter                  */
-  q15_t x4;                                      /* Temporary input variable      */
-  uint32_t tapCnt;                               /* loop counter                  */
-  q31_t x1, x2, x3, y1;                          /* Temporary input variables     */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,        
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,        
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB        
-     * to make their lengths equal.        
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))        
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-
-  /* Copy (srcBLen) samples in scratch buffer */
-  k = srcBLen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn2++;
-    *pScr2++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Fill (srcBLen - 1u) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1u);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  k = srcALen >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  /* Fill (srcBLen - 1u) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1u));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1u);
-
-#else
-
-/* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = (srcBLen - 1u) >> 2u;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.       
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.       
-   ** No loop unrolling is used. */
-  k = (srcBLen - 1u) % 0x4u;
-
-  while(k > 0u)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr1++ = 0;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /* Temporary pointer for second sequence */
-  py = pScratch2;
-
-  /* Initialization of pScr2 pointer */
-  pScr2 = pScratch2;
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1u) >> 2;
-
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = *__SIMD32(pScr1)++;
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = *__SIMD32(pScr1)++;
-
-    tapCnt = (srcBLen) >> 2u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = *__SIMD32(pScr1)++;
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Read four samples from smaller buffer */
-      y1 = _SIMD32_OFFSET(pScr2 + 2u);
-
-      acc0 = __SMLAD(x2, y1, acc0);
-
-      acc2 = __SMLAD(x1, y1, acc2);
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x2 = *__SIMD32(pScr1)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      pScr2 += 4u;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4u;
-
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3u;
-
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2);
-      acc1 += (*pScr1++ * *pScr2);
-      acc2 += (*pScr1++ * *pScr2);
-      acc3 += (*pScr1++ * *pScr2++);
-
-      pScr1 -= 3u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(acc0 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc1 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc2 >> 7u, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc3 >> 7u, 8));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 4u;
-
-  }
-
-
-  blkCnt = (srcALen + srcBLen - 1u) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while(blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1u;
-
-    while(tapCnt > 0u)
-    {
-      acc0 += (*pScr1++ * *pScr2++);
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1u;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while(tapCnt > 0u)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(acc0 >> 7u, 8));
-
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 1u;
-
-  }
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c
deleted file mode 100644
index a72c4a67..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_correlate_q31.c
+++ /dev/null
@@ -1,665 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_correlate_q31.c    
-*    
-* Description:	Correlation of Q31 sequences.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup Corr    
- * @{    
- */
-
-/**    
- * @brief Correlation of Q31 sequences.    
- * @param[in] *pSrcA points to the first input sequence.    
- * @param[in] srcALen length of the first input sequence.    
- * @param[in] *pSrcB points to the second input sequence.    
- * @param[in] srcBLen length of the second input sequence.    
- * @param[out] *pDst points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * There is no saturation on intermediate additions.    
- * Thus, if the accumulator overflows it wraps around and distorts the result.    
- * The input signals should be scaled down to avoid intermediate overflows.    
- * Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a    
- * maximum of min(srcALen, srcBLen) number of additions is carried internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_correlate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_correlate_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t *pIn1;                                   /* inputA pointer               */
-  q31_t *pIn2;                                   /* inputB pointer               */
-  q31_t *pOut = pDst;                            /* output pointer               */
-  q31_t *px;                                     /* Intermediate inputA pointer  */
-  q31_t *py;                                     /* Intermediate inputB pointer  */
-  q31_t *pSrc1;                                  /* Intermediate pointers        */
-  q63_t sum, acc0, acc1, acc2;                   /* Accumulators                  */
-  q31_t x0, x1, x2, c0;                          /* temporary variables for holding input and coefficient values */
-  uint32_t j, k = 0u, count, blkCnt, outBlockSize, blockSize1, blockSize2, blockSize3;  /* loop counter                 */
-  int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,    
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,    
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if(srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcA);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcB);
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2u * srcALen) - 1u;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB    
-     * to make their lengths equal.    
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))    
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1u));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = (pSrcB);
-
-    /* Initialization of inputB pointer */
-    pIn2 = (pSrcA);
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2u);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally    
-   * divided into three parts according to the number of multiplications that has to be    
-   * taken place between inputA samples and inputB samples. In the first part of the    
-   * algorithm, the multiplications increase by one for every iteration.    
-   * In the second part of the algorithm, srcBLen number of multiplications are done.    
-   * In the third part of the algorithm, the multiplications decrease by one    
-   * for every iteration.*/
-  /* The algorithm is implemented in three stages.    
-   * The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1u;
-  blockSize2 = srcALen - (srcBLen - 1u);
-  blockSize3 = blockSize1;
-
-  /* --------------------------    
-   * Initializations of stage1    
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]    
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]    
-   * ....    
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]    
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = 1u;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1u);
-  py = pSrc1;
-
-  /* ------------------------    
-   * Stage1 process    
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while(blockSize1 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[1] * y[srcBLen - 3] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[2] * y[srcBLen - 2] */
-      sum += (q63_t) * px++ * (*py++);
-      /* x[3] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q31_t) (sum >> 31);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment the MAC count */
-    count++;
-
-    /* Decrement the loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------    
-   * Initializations of stage2    
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]    
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]    
-   * ....    
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0u;
-
-  /* -------------------    
-   * Stage2 process    
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.    
-   * So, to loop unroll over blockSize2,    
-   * srcBLen should be greater than or equal to 4 */
-  if(srcBLen >= 4u)
-  {
-    /* Loop unroll by 3 */
-    blkCnt = blockSize2 / 3;
-
-    while(blkCnt > 0u)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *(px++);
-      x1 = *(px++);
-
-      /* Apply loop unrolling and compute 3 MACs simultaneously. */
-      k = srcBLen / 3;
-
-      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.        
-       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py);
-
-        /* Read x[2] sample */
-        x2 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[1] * y[0] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[2] * y[0] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Read y[1] sample */
-        c0 = *(py + 1u);
-
-        /* Read x[3] sample */
-        x0 = *(px + 1u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 += ((q63_t) x1 * c0);
-        /* acc1 +=  x[2] * y[1] */
-        acc1 += ((q63_t) x2 * c0);
-        /* acc2 +=  x[3] * y[1] */
-        acc2 += ((q63_t) x0 * c0);
-
-        /* Read y[2] sample */
-        c0 = *(py + 2u);
-
-        /* Read x[4] sample */
-        x1 = *(px + 2u);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 += ((q63_t) x2 * c0);
-        /* acc1 +=  x[3] * y[2] */
-        acc1 += ((q63_t) x0 * c0);
-        /* acc2 +=  x[4] * y[2] */
-        acc2 += ((q63_t) x1 * c0);
-
-        /* update scratch pointers */
-        px += 3u;
-        py += 3u;
-
-      } while(--k);
-
-      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.        
-       ** No loop unrolling is used. */
-      k = srcBLen - (3 * (srcBLen / 3));
-
-      while(k > 0u)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (acc0 >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q31_t) (acc1 >> 31);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc2 >> 31);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 3 */
-      count += 3u;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 3, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2u;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.    
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4u;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (sum >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,    
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while(blkCnt > 0u)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while(k > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) * px++ * (*py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (sum >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------    
-   * Initializations of stage3    
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]    
-   * ....    
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]    
-   * sum +=  x[srcALen-1] * y[0]    
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.    
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1u;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1u));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------    
-   * Stage3 process    
-   * ------------------*/
-
-  while(blockSize3 > 0u)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.    
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += (q63_t) * px++ * (*py++);
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.    
-     ** No loop unrolling is used. */
-    k = count % 0x4u;
-
-    while(k > 0u)
-    {
-      /* Perform the multiply-accumulates */
-      sum += (q63_t) * px++ * (*py++);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q31_t) (sum >> 31);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pIn1 = pSrcA;                           /* inputA pointer               */
-  q31_t *pIn2 = pSrcB + (srcBLen - 1u);          /* inputB pointer               */
-  q63_t sum;                                     /* Accumulators                  */
-  uint32_t i = 0u, j;                            /* loop counters */
-  uint32_t inv = 0u;                             /* Reverse order flag */
-  uint32_t tot = 0u;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two    
-   * inputs of same length. But to improve the performance, we include zeroes    
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the    
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the   
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted   
-   * using correlation but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2u);
-
-  if(srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if(srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1u);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate correlation for output length number of times */
-  for (i = 0u; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to correlation equation */
-    for (j = 0u; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-    /* Store the output in the destination buffer */
-    if(inv == 1)
-      *pDst-- = (q31_t) (sum >> 31u);
-    else
-      *pDst++ = (q31_t) (sum >> 31u);
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of Corr group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c
deleted file mode 100644
index 5fe9fd54..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_f32.c
+++ /dev/null
@@ -1,524 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_f32.c    
-*    
-* Description:	FIR decimation for floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator    
- *    
- * These functions combine an FIR filter together with a decimator.    
- * They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.    
- * Conceptually, the functions are equivalent to the block diagram below:    
- * \image html FIRDecimator.gif "Components included in the FIR Decimator functions"    
- * When decimating by a factor of M, the signal should be prefiltered by a lowpass filter with a normalized    
- * cutoff frequency of 1/M in order to prevent aliasing distortion.    
- * The user of the function is responsible for providing the filter coefficients.    
- *    
- * The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.    
- * Instead of calculating all of the FIR filter outputs and discarding M-1 out of every M, only the    
- * samples output by the decimator are computed.    
- * The functions operate on blocks of input and output data.    
- * pSrc points to an array of blockSize input values and    
- * pDst points to an array of blockSize/M output values.    
- * In order to have an integer number of output samples blockSize    
- * must always be a multiple of the decimation factor M.    
- *    
- * The library provides separate functions for Q15, Q31 and floating-point data types.    
- *    
- * \par Algorithm:    
- * The FIR portion of the algorithm uses the standard form filter:    
- * 
    
- *    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- * where, b[n] are the filter coefficients.    
- * \par   
- * The pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * - Checks to make sure that the size of the input is a multiple of the decimation factor.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};    
- *arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};    
- *arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};    
- * 
    
- * where M is the decimation factor; numTaps is the number of filter coefficients in the filter;    
- * pCoeffs is the address of the coefficient buffer;    
- * pState is the address of the state buffer.    
- * Be sure to set the values in the state buffer to zeros when doing static initialization.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR decimate filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-  /**    
-   * @brief Processing function for the floating-point FIR decimator.    
-   * @param[in] *S        points to an instance of the floating-point FIR decimator structure.    
-   * @param[in] *pSrc     points to the block of input data.    
-   * @param[out] *pDst    points to the block of output data.    
-   * @param[in] blockSize number of input samples to process per call.    
-   * @return none.    
-   */
-
-void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t sum0;                                /* Accumulator */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t blkCntN4;
-  float32_t *px0, *px1, *px2, *px3;
-  float32_t acc0, acc1, acc2, acc3;
-  float32_t x1, x2, x3;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 4;
-  blkCntN4 = outBlockSize - (4 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy 4 * decimation factor number of new input samples into the state buffer */
-    i = 4 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulators to zero */
-    acc0 = 0.0f;
-    acc1 = 0.0f;
-    acc2 = 0.0f;
-    acc3 = 0.0f;
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-    px2 = pState + 2 * S->M;
-    px3 = pState + 3 * S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample for acc0 */
-      x0 = *(px0++);
-      /* Read x[n-numTaps-1] sample for acc1 */
-      x1 = *(px1++);
-      /* Read x[n-numTaps-1] sample for acc2 */
-      x2 = *(px2++);
-      /* Read x[n-numTaps-1] sample for acc3 */
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch  state variables for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + 4 * S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = acc0;
-    *pDst++ = acc1;
-    *pDst++ = acc2;
-    *pDst++ = acc3;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN4 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  i = (numTaps - 1u);
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
deleted file mode 100644
index 3c569781..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
+++ /dev/null
@@ -1,598 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_fast_q15.c    
-*    
-* Description:	Fast Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.    
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * \par Restrictions   
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE   
- *	In this case input, output, state buffers should be aligned by 32-bit   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).    
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.    
- * Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_decimate_init_q15() to initialize the filter structure.    
- */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, x1, c0, c1;                          /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulators */
-  q31_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c1 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c0, sum0);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c1, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c0, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-
-void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-  q31_t sum0;                                    /* Accumulators */
-  q31_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] and sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] and  sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
deleted file mode 100644
index 8eb2435c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_fast_q31.c    
-*    
-* Description:	Fast Q31 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.    
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.    
- * Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_decimate_init_q31() to initialize the filter structure.    
- */
-
-void arm_fir_decimate_fast_q31(
-  arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t *px;                                     /* Temporary pointers for state buffer */
-  q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
-  q31_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-  uint32_t blkCntN2;
-  q31_t x1;
-  q31_t acc0, acc1;
-  q31_t *px0, *px1;
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-
-  blkCnt = outBlockSize / 2;
-  blkCntN2 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-    px1 = pState + S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb);
-
-      /* Read x[n-numTaps-1] for sample 0 sample 1 */
-      x0 = *(px0);
-      x1 = *(px1);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 1u);
-
-      /* Read x[n-numTaps-2]  for sample 0 sample 1  */
-      x0 = *(px0 + 1u);
-      x1 = *(px1 + 1u);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb + 2u);
-
-      /* Read x[n-numTaps-3]  for sample 0 sample 1 */
-      x0 = *(px0 + 2u);
-      x1 = *(px1 + 2u);
-      pb += 4u;
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb - 1u);
-
-      /* Read x[n-numTaps-4] for sample 0 sample 1 */
-      x0 = *(px0 + 3u);
-      x1 = *(px1 + 3u);
-
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* update state pointers */
-      px0 += 4u;
-      px1 += 4u;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px0++);
-      x1 = *(px1++);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-    *pDst++ = (q31_t) (acc1 << 1);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN2 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 = (q31_t) ((((q63_t) sum0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 << 1);
-
-    /* Decrement the loop counter */
-    blkCntN2--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
deleted file mode 100644
index 5ce468aa..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_f32.c    
-*    
-* Description:  Floating-point FIR Decimator initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point FIR decimator.    
- * @param[in,out] *S points to an instance of the floating-point FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_f32().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_f32(
-  arm_fir_decimate_instance_f32 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear state buffer and size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation Factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
deleted file mode 100644
index dc31d778..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
+++ /dev/null
@@ -1,119 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_q15.c    
-*    
-* Description:  Initialization function for the Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q15 FIR decimator.    
- * @param[in,out] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples    
- * to the call arm_fir_decimate_q15().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_q15(
-  arm_fir_decimate_instance_q15 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size of buffer is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
deleted file mode 100644
index 03985f3b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_decimate_init_q31.c    
-*    
-* Description:  Initialization function for Q31 FIR Decimation filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q31 FIR decimator.    
- * @param[in,out] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] numTaps  number of coefficients in the filter.    
- * @param[in] M  decimation factor.    
- * @param[in] *pCoeffs points to the filter coefficients.    
- * @param[in] *pState points to the state buffer.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return    The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * blockSize is not a multiple of M.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 words where blockSize is the number of input samples passed to arm_fir_decimate_q31().    
- * M is the decimation factor.    
- */
-
-arm_status arm_fir_decimate_init_q31(
-  arm_fir_decimate_instance_q31 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if((blockSize % M) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(q31_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c
deleted file mode 100644
index 4a09fe89..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q15.c
+++ /dev/null
@@ -1,696 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_q15.c    
-*    
-* Description:	Q15 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR decimator.    
- * @param[in] *S points to an instance of the Q15 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the location where the output result is written.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, x1, c0, c1;                          /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  q63_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px0)++;
-
-      x1 = *__SIMD32(px1)++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] and b[numTaps-2]  coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c1 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c0, sum0);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = *__SIMD32(px)++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c1, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c0, sum0);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  q63_t acc0, acc1;
-  q15_t *px0, *px1;
-  uint32_t blkCntN3;
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = 2 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    px1 = pState + S->M;
-
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while(blkCntN3 > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] and sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] and  sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3]  coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor       
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#else
-
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer coefficient buffer */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q63_t sum0;                                    /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /*Set sum to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q31_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /*Store filter output , smlad will return the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = numTaps - 1u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-}
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c
deleted file mode 100644
index c05c079d..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_decimate_q31.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_decimate_q31.c    
-*    
-* Description:	Q31 FIR Decimator.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_decimate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR decimator.    
- * @param[in] *S points to an instance of the Q31 FIR decimator structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).    
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.    
- *    
- * \par    
- * Refer to the function arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_fir_decimate_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  q31_t *px;                                     /* Temporary pointers for state buffer */
-  q31_t *pb;                                     /* Temporary pointers for coefficient buffer */
-  q63_t sum0;                                    /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while(tapCnt > 0u)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor    
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 >> 31);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1u) % 0x04u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while(--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += (q63_t) x0 *c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor           
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (sum0 >> 31);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = numTaps - 1u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_decimate group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c
deleted file mode 100644
index 3ecb7b54..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_f32.c
+++ /dev/null
@@ -1,997 +0,0 @@
-/* ----------------------------------------------------------------------  
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.  
-*  
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*  
-* Project: 	    CMSIS DSP Library  
-* Title:	    arm_fir_f32.c  
-*  
-* Description:	Floating-point FIR filter processing function.  
-*  
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**  
-* @ingroup groupFilters  
-*/
-
-/**  
-* @defgroup FIR Finite Impulse Response (FIR) Filters  
-*  
-* This set of functions implements Finite Impulse Response (FIR) filters  
-* for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.  
-* The functions operate on blocks of input and output data and each call to the function processes  
-* blockSize samples through the filter.  pSrc and  
-* pDst points to input and output arrays containing blockSize values.  
-*  
-* \par Algorithm:  
-* The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.  
-* Each filter coefficient b[n] is multiplied by a state variable which equals a previous input sample x[n].  
-* 
  
-*    y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]  
-* 
  
-* \par  
-* \image html FIR.gif "Finite Impulse Response filter"  
-* \par  
-* pCoeffs points to a coefficient array of size numTaps.  
-* Coefficients are stored in time reversed order.  
-* \par  
-* 
  
-*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}  
-* 
  
-* \par  
-* pState points to a state array of size numTaps + blockSize - 1.  
-* Samples in the state buffer are stored in the following order.  
-* \par  
-* 
  
-*    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}  
-* 
  
-* \par  
-* Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1.  
-* The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,  
-* to be avoided and yields a significant speed improvement.  
-* The state variables are updated after each block of data is processed; the coefficients are untouched.  
-* \par Instance Structure  
-* The coefficients and state variables for a filter are stored together in an instance data structure.  
-* A separate instance structure must be defined for each filter.  
-* Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.  
-* There are separate instance structure declarations for each of the 4 supported data types.  
-*  
-* \par Initialization Functions  
-* There is also an associated initialization function for each data type.  
-* The initialization function performs the following operations:  
-* - Sets the values of the internal structure fields.  
-* - Zeros out the values in the state buffer.  
-* To do this manually without calling the init function, assign the follow subfields of the instance structure:
-* numTaps, pCoeffs, pState. Also set all of the values in pState to zero. 
-*  
-* \par  
-* Use of the initialization function is optional.  
-* However, if the initialization function is used, then the instance structure cannot be placed into a const data section.  
-* To place an instance structure into a const data section, the instance structure must be manually initialized.  
-* Set the values in the state buffer to zeros before static initialization.  
-* The code below statically initializes each of the 4 different data type filter instance structures  
-* 
  
-*arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};  
-*arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};  
-*arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};  
-*arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};  
-* 
  
-*  
-* where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;  
-* pCoeffs is the address of the coefficient buffer.  
-*  
-* \par Fixed-Point Behavior  
-* Care must be taken when using the fixed-point versions of the FIR filter functions.  
-* In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.  
-* Refer to the function specific documentation below for usage guidelines.  
-*/
-
-/**  
-* @addtogroup FIR  
-* @{  
-*/
-
-/**  
-*  
-* @param[in]  *S points to an instance of the floating-point FIR filter structure.  
-* @param[in]  *pSrc points to the block of input data.  
-* @param[out] *pDst points to the block of output data.  
-* @param[in]  blockSize number of samples to process per call.  
-* @return     none.  
-*  
-*/
-
-#if defined(ARM_MATH_CM7)
-
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-   float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-   /* Apply loop unrolling and compute 8 output values simultaneously.  
-    * The variables acc0 ... acc7 hold output values that are being computed:  
-    *  
-    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]  
-    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]  
-    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]  
-    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]  
-    */
-   blkCnt = blockSize >> 3;
-
-   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.  
-   ** a second loop below computes the remaining 1 to 7 samples. */
-   while(blkCnt > 0u)
-   {
-      /* Copy four new input samples into the state buffer */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-      acc4 = 0.0f;
-      acc5 = 0.0f;
-      acc6 = 0.0f;
-      acc7 = 0.0f;		
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize coeff pointer */
-      pb = (pCoeffs);		
-   
-      /* This is separated from the others to avoid 
-       * a call to __aeabi_memmove which would be slower
-       */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Read the first seven samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-      x3 = *px++;
-      x4 = *px++;
-      x5 = *px++;
-      x6 = *px++;
-
-      /* Loop unrolling.  Process 8 taps at a time. */
-      tapCnt = numTaps >> 3u;
-      
-      /* Loop over the number of taps.  Unroll by a factor of 8.  
-       ** Repeat until we've computed numTaps-8 coefficients. */
-      while(tapCnt > 0u)
-      {
-         /* Read the b[numTaps-1] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-3] sample */
-         x7 = *(px++);
-
-         /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-         acc0 += x0 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-         acc1 += x1 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-         acc2 += x2 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-         acc3 += x3 * c0;
-
-         /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-         acc4 += x4 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-         acc5 += x5 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-         acc6 += x6 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-         acc7 += x7 * c0;
-         
-         /* Read the b[numTaps-2] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-4] sample */
-         x0 = *(px++);
-
-         /* Perform the multiply-accumulate */
-         acc0 += x1 * c0;
-         acc1 += x2 * c0;   
-         acc2 += x3 * c0;   
-         acc3 += x4 * c0;   
-         acc4 += x5 * c0;   
-         acc5 += x6 * c0;   
-         acc6 += x7 * c0;   
-         acc7 += x0 * c0;   
-         
-         /* Read the b[numTaps-3] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-5] sample */
-         x1 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x2 * c0;
-         acc1 += x3 * c0;   
-         acc2 += x4 * c0;   
-         acc3 += x5 * c0;   
-         acc4 += x6 * c0;   
-         acc5 += x7 * c0;   
-         acc6 += x0 * c0;   
-         acc7 += x1 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x2 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x3 * c0;
-         acc1 += x4 * c0;   
-         acc2 += x5 * c0;   
-         acc3 += x6 * c0;   
-         acc4 += x7 * c0;   
-         acc5 += x0 * c0;   
-         acc6 += x1 * c0;   
-         acc7 += x2 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x3 = *(px++);
-         /* Perform the multiply-accumulates */      
-         acc0 += x4 * c0;
-         acc1 += x5 * c0;   
-         acc2 += x6 * c0;   
-         acc3 += x7 * c0;   
-         acc4 += x0 * c0;   
-         acc5 += x1 * c0;   
-         acc6 += x2 * c0;   
-         acc7 += x3 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x4 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x5 * c0;
-         acc1 += x6 * c0;   
-         acc2 += x7 * c0;   
-         acc3 += x0 * c0;   
-         acc4 += x1 * c0;   
-         acc5 += x2 * c0;   
-         acc6 += x3 * c0;   
-         acc7 += x4 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x5 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x6 * c0;
-         acc1 += x7 * c0;   
-         acc2 += x0 * c0;   
-         acc3 += x1 * c0;   
-         acc4 += x2 * c0;   
-         acc5 += x3 * c0;   
-         acc6 += x4 * c0;   
-         acc7 += x5 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x6 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x7 * c0;
-         acc1 += x0 * c0;   
-         acc2 += x1 * c0;   
-         acc3 += x2 * c0;   
-         acc4 += x3 * c0;   
-         acc5 += x4 * c0;   
-         acc6 += x5 * c0;   
-         acc7 += x6 * c0;   
-
-         tapCnt--;
-      }
-
-      /* If the filter length is not a multiple of 8, compute the remaining filter taps */
-      tapCnt = numTaps % 0x8u;
-
-      while(tapCnt > 0u)
-      {
-         /* Read coefficients */
-         c0 = *(pb++);
-
-         /* Fetch 1 state variable */
-         x7 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         acc0 += x0 * c0;
-         acc1 += x1 * c0;   
-         acc2 += x2 * c0;   
-         acc3 += x3 * c0;   
-         acc4 += x4 * c0;   
-         acc5 += x5 * c0;   
-         acc6 += x6 * c0;   
-         acc7 += x7 * c0;   
-
-         /* Reuse the present sample states for next sample */
-         x0 = x1;
-         x1 = x2;
-         x2 = x3;
-         x3 = x4;
-         x4 = x5;
-         x5 = x6;
-         x6 = x7;
-
-         /* Decrement the loop counter */
-         tapCnt--;
-      }
-
-      /* Advance the state pointer by 8 to process the next group of 8 samples */
-      pState = pState + 8;
-
-      /* The results in the 8 accumulators, store in the destination buffer. */
-      *pDst++ = acc0;
-      *pDst++ = acc1;
-      *pDst++ = acc2;
-      *pDst++ = acc3;
-      *pDst++ = acc4;
-      *pDst++ = acc5;
-      *pDst++ = acc6;
-      *pDst++ = acc7;
-
-      blkCnt--;
-   }
-
-   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.  
-   ** No loop unrolling is used. */
-   blkCnt = blockSize % 0x8u;
-
-   while(blkCnt > 0u)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc0 = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = (pCoeffs);
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         acc0 += *px++ * *pb++;
-         i--;
-
-      } while(i > 0u);
-
-      /* The result is store in the destination buffer. */
-      *pDst++ = acc0;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.  
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.  
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   tapCnt = (numTaps - 1u) >> 2u;
-
-   /* copy data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-   /* Calculate remaining number of copies */
-   tapCnt = (numTaps - 1u) % 0x4u;
-
-   /* Copy the remaining q31_t data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-}
-
-#elif defined(ARM_MATH_CM0_FAMILY)
-
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-   /* Run the below code for Cortex-M0 */
-
-   float32_t acc;
-
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-   /* Initialize blkCnt with blockSize */
-   blkCnt = blockSize;
-
-   while(blkCnt > 0u)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = pCoeffs;
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-         acc += *px++ * *pb++;
-         i--;
-
-      } while(i > 0u);
-
-      /* The result is store in the destination buffer. */
-      *pDst++ = acc;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   /* Copy numTaps number of values */
-   tapCnt = numTaps - 1u;
-
-   /* Copy data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-}
-
-#else
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-   float32_t acc0, acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-   float32_t x0, x1, x2, x3, x4, x5, x6, x7, c0;  /* Temporary variables to hold state and coefficient values */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-   float32_t p0,p1,p2,p3,p4,p5,p6,p7;             /* Temporary product values */
-
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-   /* Apply loop unrolling and compute 8 output values simultaneously.  
-    * The variables acc0 ... acc7 hold output values that are being computed:  
-    *  
-    *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]  
-    *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]  
-    *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]  
-    *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]  
-    */
-   blkCnt = blockSize >> 3;
-
-   /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.  
-   ** a second loop below computes the remaining 1 to 7 samples. */
-   while(blkCnt > 0u)
-   {
-      /* Copy four new input samples into the state buffer */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-      acc4 = 0.0f;
-      acc5 = 0.0f;
-      acc6 = 0.0f;
-      acc7 = 0.0f;		
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize coeff pointer */
-      pb = (pCoeffs);		
-   
-      /* This is separated from the others to avoid 
-       * a call to __aeabi_memmove which would be slower
-       */
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-      *pStateCurnt++ = *pSrc++;
-
-      /* Read the first seven samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-      x3 = *px++;
-      x4 = *px++;
-      x5 = *px++;
-      x6 = *px++;
-
-      /* Loop unrolling.  Process 8 taps at a time. */
-      tapCnt = numTaps >> 3u;
-      
-      /* Loop over the number of taps.  Unroll by a factor of 8.  
-       ** Repeat until we've computed numTaps-8 coefficients. */
-      while(tapCnt > 0u)
-      {
-         /* Read the b[numTaps-1] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-3] sample */
-         x7 = *(px++);
-
-         /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-         p0 = x0 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-         p1 = x1 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-         p2 = x2 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-         p3 = x3 * c0;
-
-         /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-         p4 = x4 * c0;
-
-         /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-         p5 = x5 * c0;
-
-         /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-         p6 = x6 * c0;
-
-         /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-         p7 = x7 * c0;
-         
-         /* Read the b[numTaps-2] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-4] sample */
-         x0 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-
-         /* Perform the multiply-accumulate */
-         p0 = x1 * c0;
-         p1 = x2 * c0;   
-         p2 = x3 * c0;   
-         p3 = x4 * c0;   
-         p4 = x5 * c0;   
-         p5 = x6 * c0;   
-         p6 = x7 * c0;   
-         p7 = x0 * c0;   
-         
-         /* Read the b[numTaps-3] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-5] sample */
-         x1 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x2 * c0;
-         p1 = x3 * c0;   
-         p2 = x4 * c0;   
-         p3 = x5 * c0;   
-         p4 = x6 * c0;   
-         p5 = x7 * c0;   
-         p6 = x0 * c0;   
-         p7 = x1 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x2 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x3 * c0;
-         p1 = x4 * c0;   
-         p2 = x5 * c0;   
-         p3 = x6 * c0;   
-         p4 = x7 * c0;   
-         p5 = x0 * c0;   
-         p6 = x1 * c0;   
-         p7 = x2 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x3 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x4 * c0;
-         p1 = x5 * c0;   
-         p2 = x6 * c0;   
-         p3 = x7 * c0;   
-         p4 = x0 * c0;   
-         p5 = x1 * c0;   
-         p6 = x2 * c0;   
-         p7 = x3 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x4 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x5 * c0;
-         p1 = x6 * c0;   
-         p2 = x7 * c0;   
-         p3 = x0 * c0;   
-         p4 = x1 * c0;   
-         p5 = x2 * c0;   
-         p6 = x3 * c0;   
-         p7 = x4 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x5 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x6 * c0;
-         p1 = x7 * c0;   
-         p2 = x0 * c0;   
-         p3 = x1 * c0;   
-         p4 = x2 * c0;   
-         p5 = x3 * c0;   
-         p6 = x4 * c0;   
-         p7 = x5 * c0;   
-
-         /* Read the b[numTaps-4] coefficient */
-         c0 = *(pb++);
-
-         /* Read x[n-numTaps-6] sample */
-         x6 = *(px++);
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Perform the multiply-accumulates */      
-         p0 = x7 * c0;
-         p1 = x0 * c0;   
-         p2 = x1 * c0;   
-         p3 = x2 * c0;   
-         p4 = x3 * c0;   
-         p5 = x4 * c0;   
-         p6 = x5 * c0;   
-         p7 = x6 * c0;   
-
-         tapCnt--;
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-      }
-
-      /* If the filter length is not a multiple of 8, compute the remaining filter taps */
-      tapCnt = numTaps % 0x8u;
-
-      while(tapCnt > 0u)
-      {
-         /* Read coefficients */
-         c0 = *(pb++);
-
-         /* Fetch 1 state variable */
-         x7 = *(px++);
-
-         /* Perform the multiply-accumulates */      
-         p0 = x0 * c0;
-         p1 = x1 * c0;   
-         p2 = x2 * c0;   
-         p3 = x3 * c0;   
-         p4 = x4 * c0;   
-         p5 = x5 * c0;   
-         p6 = x6 * c0;   
-         p7 = x7 * c0;   
-
-         /* Reuse the present sample states for next sample */
-         x0 = x1;
-         x1 = x2;
-         x2 = x3;
-         x3 = x4;
-         x4 = x5;
-         x5 = x6;
-         x6 = x7;
-         
-         acc0 += p0;
-         acc1 += p1;
-         acc2 += p2;
-         acc3 += p3;
-         acc4 += p4;
-         acc5 += p5;
-         acc6 += p6;
-         acc7 += p7;
-
-         /* Decrement the loop counter */
-         tapCnt--;
-      }
-
-      /* Advance the state pointer by 8 to process the next group of 8 samples */
-      pState = pState + 8;
-
-      /* The results in the 8 accumulators, store in the destination buffer. */
-      *pDst++ = acc0;
-      *pDst++ = acc1;
-      *pDst++ = acc2;
-      *pDst++ = acc3;
-      *pDst++ = acc4;
-      *pDst++ = acc5;
-      *pDst++ = acc6;
-      *pDst++ = acc7;
-
-      blkCnt--;
-   }
-
-   /* If the blockSize is not a multiple of 8, compute any remaining output samples here.  
-   ** No loop unrolling is used. */
-   blkCnt = blockSize % 0x8u;
-
-   while(blkCnt > 0u)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc0 = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = (pCoeffs);
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         acc0 += *px++ * *pb++;
-         i--;
-
-      } while(i > 0u);
-
-      /* The result is store in the destination buffer. */
-      *pDst++ = acc0;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.  
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.  
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   tapCnt = (numTaps - 1u) >> 2u;
-
-   /* copy data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-   /* Calculate remaining number of copies */
-   tapCnt = (numTaps - 1u) % 0x4u;
-
-   /* Copy the remaining q31_t data */
-   while(tapCnt > 0u)
-   {
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-}
-
-#endif 
-
-/**  
-* @} end of FIR group  
-*/
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c
deleted file mode 100644
index 5e2ed77a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q15.c
+++ /dev/null
@@ -1,345 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_fast_q15.c    
-*    
-* Description:  Q15 Fast FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q15 FIR filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * This fast version uses a 32-bit accumulator with 2.30 format.    
- * The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around and distorts the result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- * The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.    
- *    
- * \par    
- * Refer to the function arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_init_q15() to initialize the filter structure.    
- */
-
-void arm_fir_fast_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q15_t *px;                                     /* Temporary q31 pointer for SIMD state buffer accesses */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold SIMD state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.      
-   * The variables acc0 ... acc3 hold output values that are being computed:      
-   *      
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]      
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]      
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]      
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]      
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.      
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.      
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
-    px = pState;
-
-    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = *__SIMD32(px)++;
-
-    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = *__SIMD32(px)++;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.      
-     ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLAD(x2, c0, acc2);
-
-      /* pack  x[n-N-1] and x[n-N-2] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack  x[n-N-3] and x[n-N-4] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLADX(x1, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLAD(x2, c0, acc0);
-
-      /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = _SIMD32_OFFSET(px + 2u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLAD(x0, c0, acc2);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack  x[n-N-5] and x[n-N-6] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLADX(x1, c0, acc3);
-
-      /* Update state pointer for next state reading */
-      px += 4u;
-
-      /* Decrement tap count */
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-
-      /* Read last two coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc2 = __SMLAD(x2, c0, acc2);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read last state variables */
-      x0 = *__SIMD32(px);
-
-      /* Perform the multiply-accumulates */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* Perform the multiply-accumulates */
-      acc3 = __SMLADX(x1, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.      
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Use SIMD to hold states and coefficients */
-    px = pState;
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1u;
-
-    do
-    {
-
-      acc0 += (q31_t) * px++ * *pb++;
-	  acc0 += (q31_t) * px++ * *pb++;
-
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.      
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.      
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.      
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c
deleted file mode 100644
index 5e4c9fc5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_fast_q31.c
+++ /dev/null
@@ -1,305 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_fast_q31.c    
-*    
-* Description:	Processing function for the Q31 Fast FIR filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q31 structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * This function is optimized for speed at the expense of fixed-point precision and overflow protection.    
- * The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.    
- * These intermediate results are added to a 2.30 accumulator.    
- * Finally, the accumulator is saturated and converted to a 1.31 result.    
- * The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- *    
- * \par    
- * Refer to the function arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.  Both the slow and the fast versions use the same instance structure.    
- * Use the function arm_fir_init_q31() to initialize the filter structure.    
- */
-
-IAR_ONLY_LOW_OPTIMIZATION_ENTER
-void arm_fir_fast_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t x0, x1, x2, x3;                          /* Temporary variables to hold state */
-  q31_t c0;                                      /* Temporary variable to hold coefficient value */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first three samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *(px++);
-    x1 = *(px++);
-    x2 = *(px++);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-3] sample */
-      x3 = *px;
-
-      /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      multAcc_32x32_keep32_R(acc0, x0, c0);
-
-      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      multAcc_32x32_keep32_R(acc1, x1, c0);
-
-      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      multAcc_32x32_keep32_R(acc2, x2, c0);
-
-      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      multAcc_32x32_keep32_R(acc3, x3, c0);
-
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb + 1u);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px + 1u);
-
-      /* Perform the multiply-accumulates */      
-      multAcc_32x32_keep32_R(acc0, x1, c0);
-      multAcc_32x32_keep32_R(acc1, x2, c0);
-      multAcc_32x32_keep32_R(acc2, x3, c0);
-      multAcc_32x32_keep32_R(acc3, x0, c0);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 2u);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px + 2u);
-
-      /* Perform the multiply-accumulates */      
-      multAcc_32x32_keep32_R(acc0, x2, c0);
-      multAcc_32x32_keep32_R(acc1, x3, c0);
-      multAcc_32x32_keep32_R(acc2, x0, c0);
-      multAcc_32x32_keep32_R(acc3, x1, c0);
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *(pb + 3u);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px + 3u);
-
-      /* Perform the multiply-accumulates */      
-      multAcc_32x32_keep32_R(acc0, x3, c0);
-      multAcc_32x32_keep32_R(acc1, x0, c0);
-      multAcc_32x32_keep32_R(acc2, x1, c0);
-      multAcc_32x32_keep32_R(acc3, x2, c0);
-
-      /* update coefficient pointer */
-      pb += 4u;
-      px += 4u;
-      
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-
-    i = numTaps - (tapCnt * 4u);
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */      
-      multAcc_32x32_keep32_R(acc0, x0, c0);
-      multAcc_32x32_keep32_R(acc1, x1, c0);
-      multAcc_32x32_keep32_R(acc2, x2, c0);
-      multAcc_32x32_keep32_R(acc3, x3, c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.31    
-     ** Then store the 4 outputs in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-    *pDst++ = (q31_t) (acc1 << 1);
-    *pDst++ = (q31_t) (acc2 << 1);
-    *pDst++ = (q31_t) (acc3 << 1);
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      multAcc_32x32_keep32_R(acc0, (*px++), (*(pb++)));
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.31    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the start of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-
-}
-IAR_ONLY_LOW_OPTIMIZATION_EXIT
-/**    
- * @} end of FIR group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c
deleted file mode 100644
index 92bdc9e7..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_f32.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_f32.c    
-*    
-* Description:  Floating-point FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S points to an instance of the floating-point FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs points to the filter coefficients buffer.    
- * @param[in]     *pState points to the state buffer.    
- * @param[in] 	  blockSize number of samples that are processed per call.    
- * @return 		  none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_f32().    
- */
-
-void arm_fir_init_f32(
-  arm_fir_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and the size of state buffer is (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c
deleted file mode 100644
index d976d733..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q15.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_q15.c    
-*    
-* Description:  Q15 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in,out]  *S points to an instance of the Q15 FIR filter structure.    
- * @param[in] 	   numTaps  Number of filter coefficients in the filter. Must be even and greater than or equal to 4.    
- * @param[in]      *pCoeffs points to the filter coefficients buffer.    
- * @param[in]      *pState points to the state buffer.    
- * @param[in]      blockSize is number of samples processed per call.    
- * @return The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if    
- * numTaps is not greater than or equal to 4 and even.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * Note that numTaps must be even and greater than or equal to 4.    
- * To implement an odd length filter simply increase numTaps by 1 and set the last coefficient to zero.    
- * For example, to implement a filter with numTaps=3 and coefficients    
- * 
    
- *     {0.3, -0.8, 0.3}    
- * 
    
- * set numTaps=4 and use the coefficients:    
- * 
    
- *     {0.3, -0.8, 0.3, 0}.    
- * 
    
- * Similarly, to implement a two point filter    
- * 
    
- *     {0.3, -0.3}    
- * 
    
- * set numTaps=4 and use the coefficients:    
- * 
    
- *     {0.3, -0.3, 0, 0}.    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize, when running on Cortex-M4 and Cortex-M3  and is of length numTaps+blockSize-1, when running on Cortex-M0 where blockSize is the number of input samples processed by each call to arm_fir_q15().    
- */
-
-arm_status arm_fir_init_q15(
-  arm_fir_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* The Number of filter coefficients in the filter must be even and at least 4 */
-  if(numTaps & 0x1u)
-  {
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size is always (blockSize + numTaps ) */
-    memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  status = ARM_MATH_SUCCESS;
-
-  return (status);
-
-#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c
deleted file mode 100644
index 726cdfc2..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q31.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_init_q31.c    
-*    
-* Description:	Q31 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @details    
- *    
- * @param[in,out] *S points to an instance of the Q31 FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in] 	  *pCoeffs points to the filter coefficients buffer.    
- * @param[in] 	  *pState points to the state buffer.    
- * @param[in] 	  blockSize number of samples that are processed per call.    
- * @return        none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q31().    
- */
-
-void arm_fir_init_q31(
-  arm_fir_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and state array size is (blockSize + numTaps - 1) */
-  memset(pState, 0, (blockSize + ((uint32_t) numTaps - 1u)) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c
deleted file mode 100644
index 083d58e7..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_init_q7.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_init_q7.c    
-*    
-* Description:  Q7 FIR filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-/**    
- * @param[in,out] *S points to an instance of the Q7 FIR filter structure.    
- * @param[in] 	  numTaps  Number of filter coefficients in the filter.    
- * @param[in] 	  *pCoeffs points to the filter coefficients buffer.    
- * @param[in]     *pState points to the state buffer.    
- * @param[in]     blockSize number of samples that are processed per call.    
- * @return     	  none    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_fir_q7().    
- */
-
-void arm_fir_init_q7(
-  arm_fir_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  uint32_t blockSize)
-{
-
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear the state buffer.  The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q7_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c
deleted file mode 100644
index 1ff72f8c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_f32.c
+++ /dev/null
@@ -1,581 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_interpolate_f32.c    
-*    
-* Description:	FIR interpolation for floating-point sequences.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator    
- *    
- * These functions combine an upsampler (zero stuffer) and an FIR filter.    
- * They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.    
- * Conceptually, the functions are equivalent to the block diagram below:    
- * \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"    
- * After upsampling by a factor of L, the signal should be filtered by a lowpass filter with a normalized    
- * cutoff frequency of 1/L in order to eliminate high frequency copies of the spectrum.    
- * The user of the function is responsible for providing the filter coefficients.    
- *    
- * The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.    
- * The upsampler inserts L-1 zeros between each sample.    
- * Instead of multiplying by these zero values, the FIR filter is designed to skip them.    
- * This leads to an efficient implementation without any wasted effort.    
- * The functions operate on blocks of input and output data.    
- * pSrc points to an array of blockSize input values and    
- * pDst points to an array of blockSize*L output values.    
- *    
- * The library provides separate functions for Q15, Q31, and floating-point data types.    
- *    
- * \par Algorithm:    
- * The functions use a polyphase filter structure:    
- * 
    
- *    y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]    
- *    y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]    
- *    ...    
- *    y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]    
- * 
    
- * This approach is more efficient than straightforward upsample-then-filter algorithms.    
- * With this method the computation is reduced by a factor of 1/L when compared to using a standard FIR filter.    
- * \par    
- * pCoeffs points to a coefficient array of size numTaps.    
- * numTaps must be a multiple of the interpolation factor L and this is checked by the    
- * initialization functions.    
- * Internally, the function divides the FIR filter's impulse response into shorter filters of length    
- * phaseLength=numTaps/L.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size blockSize + phaseLength - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * The state variables are updated after each block of data is processed, the coefficients are untouched.    
- *    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable array should be allocated separately.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * - Checks to make sure that the length of the filter is a multiple of the interpolation factor.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- * arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};    
- * arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};    
- * arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};    
- * 
    
- * where L is the interpolation factor; phaseLength=numTaps/L is the    
- * length of each of the shorter FIR filters used internally,    
- * pCoeffs is the address of the coefficient buffer;    
- * pState is the address of the state buffer.    
- * Be sure to set the values in the state buffer to zeros when doing static initialization.    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point FIR interpolator.    
- * @param[in] *S        points to an instance of the floating-point FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- */
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
-  float32_t sum0;                                /* Accumulators */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j;                         /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-  float32_t acc0, acc1, acc2, acc3;
-  float32_t x1, x2, x3;
-  uint32_t blkCntN4;
-  float32_t c1, c2, c3;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 4;
-  blkCntN4 = blockSize - (4 * blkCnt);
-
-  /* Samples loop unrolled by 4 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-      x1 = *(ptr1++);
-      x2 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x0 * c0;
-        acc1 += x1 * c0;
-        acc2 += x2 * c0;
-        acc3 += x3 * c0;
-
-        /* Read the coefficient */
-        c1 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x1 * c1;
-        acc1 += x2 * c1;
-        acc2 += x3 * c1;
-        acc3 += x0 * c1;
-
-        /* Read the coefficient */
-        c2 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x2 * c2;
-        acc1 += x3 * c2;
-        acc2 += x0 * c2;
-        acc3 += x1 * c2;
-
-        /* Read the coefficient */
-        c3 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x2 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x3 * c3;
-        acc1 += x0 * c3;
-        acc2 += x1 * c3;
-        acc3 += x2 * c3;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x0 * c0;
-        acc1 += x1 * c0;
-        acc2 += x2 * c0;
-        acc3 += x3 * c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = acc0;
-      *(pDst + S->L) = acc1;
-      *(pDst + 2 * S->L) = acc2;
-      *(pDst + 3 * S->L) = acc3;
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 4;
-
-    pDst += S->L * 3;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-
-  while(blkCntN4 > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += x0 * c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += *(ptr1++) * (*ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum0;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.        
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.        
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  tapCnt = (phaseLen - 1u) % 0x04u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1, *ptr2;                        /* Temporary pointers for state and coefficient buffers */
-
-
-  float32_t sum;                                 /* Accumulator */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      /* Loop over the polyPhase length */
-      tapCnt = phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *ptr1++ * *ptr2;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = phaseLen - 1u;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
deleted file mode 100644
index d8c8bdce..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_f32.c    
-*    
-* Description:  Floating-point FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the floating-point FIR interpolator.    
- * @param[in,out] *S        points to an instance of the floating-point FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_f32().    
- */
-
-arm_status arm_fir_interpolate_init_f32(
-  arm_fir_interpolate_instance_f32 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of state array is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize +
-            ((uint32_t) S->phaseLength - 1u)) * sizeof(float32_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
deleted file mode 100644
index 03c39bd2..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_q15.c    
-*    
-* Description:  Q15 FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief  Initialization function for the Q15 FIR interpolator.    
- * @param[in,out] *S        points to an instance of the Q15 FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q15().    
- */
-
-arm_status arm_fir_interpolate_init_q15(
-  arm_fir_interpolate_instance_q15 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
deleted file mode 100644
index 59f735c1..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_interpolate_init_q31.c    
-*    
-* Description:  Q31 FIR interpolator initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-
-/**    
- * @brief  Initialization function for the Q31 FIR interpolator.    
- * @param[in,out] *S        points to an instance of the Q31 FIR interpolator structure.    
- * @param[in]     L         upsample factor.    
- * @param[in]     numTaps   number of filter coefficients in the filter.    
- * @param[in]     *pCoeffs  points to the filter coefficient buffer.    
- * @param[in]     *pState   points to the state buffer.    
- * @param[in]     blockSize number of input samples to process per call.    
- * @return        The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_LENGTH_ERROR if    
- * the filter length numTaps is not a multiple of the interpolation factor L.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}    
- * 
    
- * The length of the filter numTaps must be a multiple of the interpolation factor L.    
- * \par    
- * pState points to the array of state variables.    
- * pState is of length (numTaps/L)+blockSize-1 words    
- * where blockSize is the number of input samples processed by each call to arm_fir_interpolate_q31().    
- */
-
-arm_status arm_fir_interpolate_init_q31(
-  arm_fir_interpolate_instance_q31 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if((numTaps % L) != 0u)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0,
-           (blockSize + ((uint32_t) S->phaseLength - 1u)) * sizeof(q31_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c
deleted file mode 100644
index 68f2492a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q15.c
+++ /dev/null
@@ -1,508 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fir_interpolate_q15.c    
-*    
-* Description:	Q15 FIR interpolation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 FIR interpolator.    
- * @param[in] *S        points to an instance of the Q15 FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum0;                                    /* Accumulators                                             */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j, tapCnt;                 /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-  uint32_t blkCntN2;
-  q63_t acc0, acc1;
-  q15_t x1;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 2;
-  blkCntN2 = blockSize - (2 * blkCnt);
-
-  /* Samples loop unrolled by 2 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0;
-      acc1 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = (q15_t) (__SSAT((acc0 >> 15), 16));
-      *(pDst + S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 2;
-
-    pDst += S->L;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blkCntN2;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen & 0x3u;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete.    
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = ((uint32_t) phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(i > 0u)
-  {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	*pStateCurnt++ = *pState++;
-	
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-	
-	/* Decrement the loop counter */
-    i--;
-  }
-
-  i = ((uint32_t) phaseLen - 1u) % 0x04u;
-
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer                                            */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer                                      */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state                */
-  q15_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers     */
-  q63_t sum;                                     /* Accumulator */
-  q15_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, tapCnt;                    /* Loop counters                                            */
-  uint16_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1u);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      /* Loop over the polyPhase length */
-      tapCnt = (uint32_t) phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *ptr2;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *ptr1++;
-
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) x0 * c0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Store the result after converting to 1.15 format in the destination buffer */
-      *pDst++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (uint32_t) phaseLen - 1u;
-
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c
deleted file mode 100644
index c4d46033..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_interpolate_q31.c
+++ /dev/null
@@ -1,504 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fir_interpolate_q31.c    
-*    
-* Description:	Q31 FIR interpolation.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Interpolate    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 FIR interpolator.    
- * @param[in] *S        points to an instance of the Q31 FIR interpolator structure.    
- * @param[in] *pSrc     points to the block of input data.    
- * @param[out] *pDst    points to the block of output data.    
- * @param[in] blockSize number of input samples to process per call.    
- * @return none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 1/(numTaps/L).    
- * since numTaps/L additions occur per output sample.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
-  q63_t sum0;                                    /* Accumulators */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j;                         /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-  uint32_t blkCntN2;
-  q63_t acc0, acc1;
-  q31_t x1;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize / 2;
-  blkCntN2 = blockSize - (2 * blkCnt);
-
-  /* Samples loop unrolled by 2 */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0;
-      acc1 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2u;
-
-      x0 = *(ptr1++);
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 *c0;
-        acc1 += (q63_t) x0 *c0;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4u;
-
-      while(tapCnt > 0u)
-      {
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 *c0;
-        acc1 += (q63_t) x1 *c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = (q31_t) (acc0 >> 31);
-      *(pDst + S->L) = (q31_t) (acc1 >> 31);
-
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 2;
-
-    pDst += S->L;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 2, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blkCntN2;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1u;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.        
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2;
-      while(tapCnt > 0u)
-      {
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.        
-         * So instead of multiplying zeros with coefficients,        
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen & 0x3u;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum0 >> 31);
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1        
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.        
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.        
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (phaseLen - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  tapCnt = (phaseLen - 1u) % 0x04u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-
-#else
-
-void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *ptr1, *ptr2;                            /* Temporary pointers for state and coefficient buffers */
-
-  /* Run the below code for Cortex-M0 */
-
-  q63_t sum;                                     /* Accumulator */
-  q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while(blkCnt > 0u)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while(i > 0u)
-    {
-      /* Set accumulator to zero */
-      sum = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1u);
-
-      tapCnt = phaseLen;
-
-      while(tapCnt > 0u)
-      {
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0 = *ptr1++;
-
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) x0 *c0;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum >> 31);
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1           
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = phaseLen - 1u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
- /**    
-  * @} end of FIR_Interpolate group    
-  */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c
deleted file mode 100644
index fb174829..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_f32.c
+++ /dev/null
@@ -1,506 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_f32.c    
-*    
-* Description:	Processing function for the floating-point FIR Lattice filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters    
- *    
- * This set of functions implements Finite Impulse Response (FIR) lattice filters    
- * for Q15, Q31 and floating-point data types.  Lattice filters are used in a     
- * variety of adaptive filter applications.  The filter structure is feedforward and    
- * the net impulse response is finite length.    
- * The functions operate on blocks    
- * of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst point to input and output arrays containing blockSize values.    
- *    
- * \par Algorithm:    
- * \image html FIRLattice.gif "Finite Impulse Response Lattice filter"    
- * The following difference equation is implemented:    
- * 
    
- *    f0[n] = g0[n] = x[n]    
- *    fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M    
- *    gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M    
- *    y[n] = fM[n]    
- * 
    
- * \par    
- * pCoeffs points to tha array of reflection coefficients of size numStages.    
- * Reflection Coefficients are stored in the following order.    
- * \par    
- * 
    
- *    {k1, k2, ..., kM}    
- * 
    
- * where M is number of stages    
- * \par    
- * pState points to a state array of size numStages.    
- * The state variables (g values) hold previous inputs and are stored in the following order.    
- * 
    
- *    {g0[n], g1[n], g2[n] ...gM-1[n]}    
- * 
    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pCoeffs, pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:    
- * 
    
- *arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};    
- *arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};    
- *arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};    
- * 
    
- * \par    
- * where numStages is the number of stages in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer.    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-  /**    
-   * @brief Processing function for the floating-point FIR lattice filter.    
-   * @param[in]  *S        points to an instance of the floating-point FIR lattice structure.    
-   * @param[in]  *pSrc     points to the block of input data.    
-   * @param[out] *pDst     points to the block of output data    
-   * @param[in]  blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_fir_lattice_f32(
-  const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState;                             /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* temporary state pointer */
-  float32_t *pk;                                 /* temporary coefficient pointer */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t fcurr1, fnext1, gcurr1, gnext1;      /* temporary variables for first sample in loop unrolling */
-  float32_t fcurr2, fnext2, gnext2;              /* temporary variables for second sample in loop unrolling */
-  float32_t fcurr3, fnext3, gnext3;              /* temporary variables for third sample in loop unrolling */
-  float32_t fcurr4, fnext4, gnext4;              /* temporary variables for fourth sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  gcurr1 = 0.0f;
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-    fcurr2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Read g0(n-1) from state */
-    gcurr1 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = fcurr1 + ((*pk) * gcurr1);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (fcurr1 * (*pk)) + gcurr1;
-
-    /* Process second sample for first tap */
-    /* for sample 2 processing */
-    fnext2 = fcurr2 + ((*pk) * fcurr1);
-    gnext2 = (fcurr2 * (*pk)) + fcurr1;
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurr3 = *pSrc++;
-    fcurr4 = *pSrc++;
-
-    /* Copy only last input samples into the state buffer    
-       which will be used for next four samples processing */
-    *px++ = fcurr4;
-
-    /* Process third sample for first tap */
-    fnext3 = fcurr3 + ((*pk) * fcurr2);
-    gnext3 = (fcurr3 * (*pk)) + fcurr2;
-
-    /* Process fourth sample for first tap */
-    fnext4 = fcurr4 + ((*pk) * fcurr3);
-    gnext4 = (fcurr4 * (*pk++)) + fcurr3;
-
-    /* Update of f values for next coefficient set processing */
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-    fcurr3 = fnext3;
-    fcurr4 = fnext4;
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1u) >> 2u;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while(stageCnt > 0u)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      /* Process fourth sample for 2nd, 6th .. tap */
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g2(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurr1 = fnext1 + ((*pk) * gcurr1);
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurr2 = fnext2 + ((*pk) * gnext1);
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurr3 = fnext3 + ((*pk) * gnext2);
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurr4 = fnext4 + ((*pk) * gnext3);
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext4 = (fnext4 * (*pk)) + gnext3;
-      gnext3 = (fnext3 * (*pk)) + gnext2;
-      gnext2 = (fnext2 * (*pk)) + gnext1;
-      gnext1 = (fnext1 * (*pk++)) + gcurr1;
-
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g3(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      /* Process third sample for 4th, 8th .. tap */
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr1 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = gnext4;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurr1 = fnext1 + ((*pk) * gcurr1);
-      /* Process second sample for 5th, 9th .. tap */
-      fcurr2 = fnext2 + ((*pk) * gnext1);
-      /* Process third sample for 5th, 9th .. tap */
-      fcurr3 = fnext3 + ((*pk) * gnext2);
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurr4 = fnext4 + ((*pk) * gnext3);
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext4 = (fnext4 * (*pk)) + gnext3;
-      gnext3 = (fnext3 * (*pk)) + gnext2;
-      gnext2 = (fnext2 * (*pk)) + gnext1;
-      gnext1 = (fnext1 * (*pk++)) + gcurr1;
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1u) % 0x4u;
-
-    while(stageCnt > 0u)
-    {
-      gcurr1 = *px;
-
-      /* save g value in state buffer */
-      *px++ = gnext4;
-
-      /* Process four samples for last three taps here */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      fnext2 = fcurr2 + ((*pk) * gnext1);
-      fnext3 = fcurr3 + ((*pk) * gnext2);
-      fnext4 = fcurr4 + ((*pk) * gnext3);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext4 = (fcurr4 * (*pk)) + gnext3;
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* Update of f values for next coefficient set processing */
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-      fcurr3 = fnext3;
-      fcurr4 = fnext4;
-
-      stageCnt--;
-
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-    *pDst++ = fcurr2;
-    *pDst++ = fcurr3;
-    *pDst++ = fcurr4;
-
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g2(n) from state buffer */
-    gcurr1 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = fcurr1 + ((*pk) * gcurr1);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr1;
-
-    /* f1(n) is saved in fcurr1    
-       for next stage processing */
-    fcurr1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = fcurr1 + ((*pk) * gcurr1);
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (fcurr1 * (*pk++)) + gcurr1;
-
-      /* f1(n) is saved in fcurr1    
-         for next stage processing */
-      fcurr1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-
-    blkCnt--;
-
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t fcurr, fnext, gcurr, gnext;          /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurr = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = fcurr + ((*pk) * gcurr);
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = (fcurr * (*pk++)) + gcurr;
-
-    /* save f0(n) in state buffer */
-    *px++ = fcurr;
-
-    /* f1(n) is saved in fcurr            
-       for next stage processing */
-    fcurr = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = fcurr + ((*pk) * gcurr);
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = (fcurr * (*pk++)) + gcurr;
-
-      /* f1(n) is saved in fcurr1            
-         for next stage processing */
-      fcurr = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr;
-
-    blkCnt--;
-
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
deleted file mode 100644
index 99862ca9..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_f32.c    
-*    
-* Description:  Floating-point FIR Lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Initialization function for the floating-point FIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.    
- * @param[in] numStages  number of filter stages.    
- * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.    
- * @param[in] *pState points to the state buffer.  The array is of length numStages.    
- * @return none.    
- */
-
-void arm_fir_lattice_init_f32(
-  arm_fir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
deleted file mode 100644
index b248cea5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_q15.c    
-*    
-* Description:  Q15 FIR Lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q15 FIR lattice filter.    
-   * @param[in] *S points to an instance of the Q15 FIR lattice structure.    
-   * @param[in] numStages  number of filter stages.    
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.     
-   * @param[in] *pState points to the state buffer.  The array is of length numStages.     
-   * @return none.    
-   */
-
-void arm_fir_lattice_init_q15(
-  arm_fir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
deleted file mode 100644
index 89fb0e9e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_lattice_init_q31.c    
-*    
-* Description:  Q31 FIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q31 FIR lattice filter.    
-   * @param[in] *S points to an instance of the Q31 FIR lattice structure.    
-   * @param[in] numStages  number of filter stages.    
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pState points to the state buffer.   The array is of length numStages.    
-   * @return none.    
-   */
-
-void arm_fir_lattice_init_q31(
-  arm_fir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c
deleted file mode 100644
index 1d8d6f12..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q15.c
+++ /dev/null
@@ -1,536 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_q15.c    
-*    
-* Description:	Q15 FIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-/**    
- * @brief Processing function for the Q15 FIR lattice filter.    
- * @param[in]  *S        points to an instance of the Q15 FIR lattice structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- */
-
-void arm_fir_lattice_q15(
-  const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* temporary state pointer */
-  q15_t *pk;                                     /* temporary coefficient pointer */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t fcurnt1, fnext1, gcurnt1 = 0, gnext1;    /* temporary variables for first sample in loop unrolling */
-  q31_t fcurnt2, fnext2, gnext2;                 /* temporary variables for second sample in loop unrolling */
-  q31_t fcurnt3, fnext3, gnext3;                 /* temporary variables for third sample in loop unrolling */
-  q31_t fcurnt4, fnext4, gnext4;                 /* temporary variables for fourth sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurnt1 = *pSrc++;
-    fcurnt2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Read g0(n-1) from state */
-    gcurnt1 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-    fnext1 = __SSAT(fnext1, 16);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + gcurnt1;
-    gnext1 = __SSAT(gnext1, 16);
-
-    /* Process second sample for first tap */
-    /* for sample 2 processing */
-    fnext2 = (q31_t) ((fcurnt1 * (*pk)) >> 15u) + fcurnt2;
-    fnext2 = __SSAT(fnext2, 16);
-
-    gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt1;
-    gnext2 = __SSAT(gnext2, 16);
-
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurnt3 = *pSrc++;
-    fcurnt4 = *pSrc++;
-
-    /* Copy only last input samples into the state buffer    
-       which is used for next four samples processing */
-    *px++ = (q15_t) fcurnt4;
-
-    /* Process third sample for first tap */
-    fnext3 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + fcurnt3;
-    fnext3 = __SSAT(fnext3, 16);
-    gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt2;
-    gnext3 = __SSAT(gnext3, 16);
-
-    /* Process fourth sample for first tap */
-    fnext4 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + fcurnt4;
-    fnext4 = __SSAT(fnext4, 16);
-    gnext4 = (q31_t) ((fcurnt4 * (*pk++)) >> 15u) + fcurnt3;
-    gnext4 = __SSAT(gnext4, 16);
-
-    /* Update of f values for next coefficient set processing */
-    fcurnt1 = fnext1;
-    fcurnt2 = fnext2;
-    fcurnt3 = fnext3;
-    fcurnt4 = fnext4;
-
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1u) >> 2;
-
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.    
-     ** Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while(stageCnt > 0u)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f1(n) = f0(n) +  K1 * g0(n-1) */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-      /* Process fourth sample for 2nd, 6th .. tap */
-      /* fnext4 = fcurnt4 + (*pk) * gnext3; */
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
-      fcurnt1 = __SSAT(fcurnt1, 16);
-
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
-      fcurnt2 = __SSAT(fcurnt2, 16);
-
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
-      fcurnt3 = __SSAT(fcurnt3, 16);
-
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
-      fcurnt4 = __SSAT(fcurnt4, 16);
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-
-      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      /* Process third sample for 4th, 8th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurnt1 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurnt1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fnext1;
-      fcurnt1 = __SSAT(fcurnt1, 16);
-
-      /* Process second sample for 5th, 9th .. tap */
-      fcurnt2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fnext2;
-      fcurnt2 = __SSAT(fcurnt2, 16);
-
-      /* Process third sample for 5th, 9th .. tap */
-      fcurnt3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fnext3;
-      fcurnt3 = __SSAT(fcurnt3, 16);
-
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurnt4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fnext4;
-      fcurnt4 = __SSAT(fcurnt4, 16);
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext4 = (q31_t) ((fnext4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fnext1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1u) % 0x4u;
-
-    while(stageCnt > 0u)
-    {
-      gcurnt1 = *px;
-
-      /* save g value in state buffer */
-      *px++ = (q15_t) gnext4;
-
-      /* Process four samples for last three taps here */
-      fnext1 = (q31_t) ((gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15u) + fcurnt2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15u) + fcurnt3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      fnext4 = (q31_t) ((gnext3 * (*pk)) >> 15u) + fcurnt4;
-      fnext4 = __SSAT(fnext4, 16);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext4 = (q31_t) ((fcurnt4 * (*pk)) >> 15u) + gnext3;
-      gnext4 = __SSAT(gnext4, 16);
-      gnext3 = (q31_t) ((fcurnt3 * (*pk)) >> 15u) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-      gnext2 = (q31_t) ((fcurnt2 * (*pk)) >> 15u) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-      gnext1 = (q31_t) ((fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-      /* Update of f values for next coefficient set processing */
-      fcurnt1 = fnext1;
-      fcurnt2 = fnext2;
-      fcurnt3 = fnext3;
-      fcurnt4 = fnext4;
-
-      stageCnt--;
-
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt1, fcurnt2, 16);
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt3, fcurnt4, 16);
-
-#else
-
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt2, fcurnt1, 16);
-    *__SIMD32(pDst)++ = __PKHBT(fcurnt4, fcurnt3, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurnt1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g2(n) from state buffer */
-    gcurnt1 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-    fnext1 = __SSAT(fnext1, 16);
-
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-    gnext1 = __SSAT(gnext1, 16);
-
-    /* save g1(n) in state buffer */
-    *px++ = (q15_t) fcurnt1;
-
-    /* f1(n) is saved in fcurnt1    
-       for next stage processing */
-    fcurnt1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurnt1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (((q31_t) gcurnt1 * (*pk)) >> 15u) + fcurnt1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (((q31_t) fcurnt1 * (*pk++)) >> 15u) + gcurnt1;
-      gnext1 = __SSAT(gnext1, 16);
-
-
-      /* f1(n) is saved in fcurnt1    
-         for next stage processing */
-      fcurnt1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurnt1, 16);
-
-
-    blkCnt--;
-
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t fcurnt, fnext, gcurnt, gnext;            /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurnt = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurnt = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
-    fnext = __SSAT(fnext, 16);
-
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
-    gnext = __SSAT(gnext, 16);
-
-    /* save f0(n) in state buffer */
-    *px++ = (q15_t) fcurnt;
-
-    /* f1(n) is saved in fcurnt            
-       for next stage processing */
-    fcurnt = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g1(n-1) from state buffer */
-      gcurnt = *px;
-
-      /* save g0(n-1) in state buffer */
-      *px++ = (q15_t) gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = ((gcurnt * (*pk)) >> 15u) + fcurnt;
-      fnext = __SSAT(fnext, 16);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = ((fcurnt * (*pk++)) >> 15u) + gcurnt;
-      gnext = __SSAT(gnext, 16);
-
-
-      /* f1(n) is saved in fcurnt            
-         for next stage processing */
-      fcurnt = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurnt, 16);
-
-
-    blkCnt--;
-
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c
deleted file mode 100644
index cc963f93..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_lattice_q31.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_lattice_q31.c    
-*    
-* Description:	Q31 FIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Lattice    
- * @{    
- */
-
-
-/**    
- * @brief Processing function for the Q31 FIR lattice filter.    
- * @param[in]  *S        points to an instance of the Q31 FIR lattice structure.    
- * @param[in]  *pSrc     points to the block of input data.    
- * @param[out] *pDst     points to the block of output data    
- * @param[in]  blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr1, fnext1, gcurr1 = 0, gnext1;      /* temporary variables for first sample in loop unrolling */
-  q31_t fcurr2, fnext2, gnext2;                  /* temporary variables for second sample in loop unrolling */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-  q31_t k;
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize >> 1u;
-
-  /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.        
-     a second loop below computes the remaining 1 sample. */
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* f0(n) = x(n) */
-    fcurr2 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n - 1) from state buffer */
-    gcurr1 = *px;
-
-    /* Read the reflection coefficient */
-    k = *pk++;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-    fnext1 = fcurr1 + (fnext1 << 1u);
-    gnext1 = gcurr1 + (gnext1 << 1u);
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext2 = (q31_t) (((q63_t) fcurr1 * k) >> 32);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
-    fnext2 = fcurr2 + (fnext2 << 1u);
-    gnext2 = fcurr1 + (gnext2 << 1u);
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr2;
-
-    /* f1(n) is saved in fcurr1        
-       for next stage processing */
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-
-      /* Read the reflection coefficient */
-      k = *pk++;
-
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext2;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-      fnext2 = (q31_t) (((q63_t) gnext1 * k) >> 32);
-
-      fnext1 = fcurr1 + (fnext1 << 1u);
-      fnext2 = fcurr2 + (fnext2 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext2 = (q31_t) (((q63_t) fcurr2 * (k)) >> 32);
-      gnext2 = gnext1 + (gnext2 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-      gnext1 = gcurr1 + (gnext1 << 1u);
-
-      /* f1(n) is saved in fcurr1        
-         for next stage processing */
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-    *pDst++ = fcurr2;
-
-    blkCnt--;
-
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x2u;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr1 = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n - 1) from state buffer */
-    gcurr1 = *px;
-
-    /* Read the reflection coefficient */
-    k = *pk++;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-    fnext1 = fcurr1 + (fnext1 << 1u);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-    gnext1 = gcurr1 + (gnext1 << 1u);
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr1;
-
-    /* f1(n) is saved in fcurr1        
-       for next stage processing */
-    fcurr1 = fnext1;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* Read the reflection coefficient */
-      k = *pk++;
-
-      /* read g2(n) from state buffer */
-      gcurr1 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext1;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext1 = (q31_t) (((q63_t) gcurr1 * k) >> 32);
-      fnext1 = fcurr1 + (fnext1 << 1u);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (k)) >> 32);
-      gnext1 = gcurr1 + (gnext1 << 1u);
-
-      /* f1(n) is saved in fcurr1        
-         for next stage processing */
-      fcurr1 = fnext1;
-
-      stageCnt--;
-
-    }
-
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr1;
-
-    blkCnt--;
-
-  }
-
-
-}
-
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* temporary state pointer */
-  q31_t *pk;                                     /* temporary coefficient pointer */
-  q31_t fcurr, fnext, gcurr, gnext;              /* temporary variables */
-  uint32_t numStages = S->numStages;             /* Length of the filter */
-  uint32_t blkCnt, stageCnt;                     /* temporary variables for counts */
-
-  pState = &S->pState[0];
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* f0(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize coeff pointer */
-    pk = (pCoeffs);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* read g0(n-1) from state buffer */
-    gcurr = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
-    /* save g1(n) in state buffer */
-    *px++ = fcurr;
-
-    /* f1(n) is saved in fcurr1            
-       for next stage processing */
-    fcurr = fnext;
-
-    stageCnt = (numStages - 1u);
-
-    /* stage loop */
-    while(stageCnt > 0u)
-    {
-      /* read g2(n) from state buffer */
-      gcurr = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext = (q31_t) (((q63_t) gcurr * (*pk)) >> 31) + fcurr;
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext = (q31_t) (((q63_t) fcurr * (*pk++)) >> 31) + gcurr;
-
-      /* f1(n) is saved in fcurr1            
-         for next stage processing */
-      fcurr = fnext;
-
-      stageCnt--;
-
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr;
-
-    blkCnt--;
-
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
-/**    
- * @} end of FIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c
deleted file mode 100644
index f3c595fc..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q15.c
+++ /dev/null
@@ -1,691 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_q15.c    
-*    
-* Description:  Q15 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**       
- * @ingroup groupFilters       
- */
-
-/**       
- * @addtogroup FIR       
- * @{       
- */
-
-/**       
- * @brief Processing function for the Q15 FIR filter.       
- * @param[in] *S points to an instance of the Q15 FIR structure.       
- * @param[in] *pSrc points to the block of input data.       
- * @param[out] *pDst points to the block of output data.       
- * @param[in]  blockSize number of samples to process per call.       
- * @return none.       
- *   
- *   
- * \par Restrictions   
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE   
- *	In this case input, output, state buffers should be aligned by 32-bit   
- *   
- * Scaling and Overflow Behavior:       
- * \par       
- * The function is implemented using a 64-bit internal accumulator.       
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.       
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.       
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.       
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.       
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.       
- *       
- * \par       
- * Refer to the function arm_fir_fast_q15() for a faster but less precise implementation of this function.       
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-/* Run the below code for Cortex-M4 and Cortex-M3 */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px1;                                    /* Temporary q15 pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold SIMD state and coefficient values */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.       
-   * The variables acc0 ... acc3 hold output values that are being computed:       
-   *       
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]       
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]       
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]       
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]       
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.       
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.       
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pSrc)++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer of type q15 */
-    px1 = pState;
-
-    /* Initialize coeff pointer of type q31 */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = _SIMD32_OFFSET(px1);
-
-    /* Read the third and forth samples from the state buffer: x[n-N-1], x[n-N-2] */
-    x1 = _SIMD32_OFFSET(px1 + 1u);
-
-    px1 += 2u;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.       
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Read state x[n-N-2], x[n-N-3] */
-      x2 = _SIMD32_OFFSET(px1);
-
-      /* Read state x[n-N-3], x[n-N-4] */
-      x3 = _SIMD32_OFFSET(px1 + 1u);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLALD(x3, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLALD(x2, c0, acc0);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLALD(x3, c0, acc1);
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px1 + 2u);
-
-      /* Read state x[n-N-5], x[n-N-6] */
-      x1 = _SIMD32_OFFSET(px1 + 3u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLALD(x0, c0, acc2);
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLALD(x1, c0, acc3);
-
-      px1 += 4u;
-
-      tapCnt--;
-
-    }
-
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-      /* Read 2 coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Fetch 4 state variables */
-      x2 = _SIMD32_OFFSET(px1);
-
-      x3 = _SIMD32_OFFSET(px1 + 1u);
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      px1 += 2u;
-
-      acc1 = __SMLALD(x1, c0, acc1);
-      acc2 = __SMLALD(x2, c0, acc2);
-      acc3 = __SMLALD(x3, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.       
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer of type q15 */
-    px1 = pState;
-
-    /* Initialize coeff pointer of type q31 */
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1;
-
-    do
-    {
-
-      c0 = *__SIMD32(pb)++;
-      x0 = *__SIMD32(px1)++;
-
-      acc0 = __SMLALD(x0, c0, acc0);
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.       
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Copy state values to start of state buffer */
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else /* UNALIGNED_SUPPORT_DISABLE */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q63_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q15_t *px;                                     /* Temporary q31 pointer for SIMD state buffer accesses */
-  q31_t x0, x1, x2, c0;                          /* Temporary variables to hold SIMD state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.      
-   * The variables acc0 ... acc3 hold output values that are being computed:      
-   *      
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]      
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]      
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]      
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]      
-   */
-
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.      
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer.      
-     ** Use 32-bit SIMD to move the 16-bit data.  Only requires two copies. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
-    px = pState;
-
-    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = *__SIMD32(px)++;
-
-    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = *__SIMD32(px)++;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.      
-     ** Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* pack  x[n-N-1] and x[n-N-2] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = _SIMD32_OFFSET(px);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack  x[n-N-3] and x[n-N-4] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLALDX(x1, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = *__SIMD32(pb)++;
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLALD(x2, c0, acc0);
-
-      /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = _SIMD32_OFFSET(px + 2u);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLALD(x0, c0, acc2);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack  x[n-N-5] and x[n-N-6] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLALDX(x1, c0, acc3);
-
-      /* Update state pointer for next state reading */
-      px += 4u;
-
-      /* Decrement tap count */
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.       
-     ** This is always be 2 taps since the filter length is even. */
-    if((numTaps & 0x3u) != 0u)
-    {
-
-      /* Read last two coefficients */
-      c0 = *__SIMD32(pb)++;
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read last state variables */
-      x0 = *__SIMD32(px);
-
-      /* Perform the multiply-accumulates */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* Perform the multiply-accumulates */
-      acc3 = __SMLALDX(x1, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format.  Convert to 1.15 with saturation.       
-     ** Then store the 4 outputs in the destination buffer. */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16);
-
-#else
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16);
-
-    *__SIMD32(pDst)++ =
-      __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN       */
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.      
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-  while(blkCnt > 0u)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Use SIMD to hold states and coefficients */
-    px = pState;
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1u;
-
-    do
-    {
-      acc0 += (q31_t) * px++ * *pb++;
-	  acc0 += (q31_t) * px++ * *pb++;
-      tapCnt--;
-    }
-    while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.      
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.      
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.      
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy remaining data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-
-#endif /* #ifndef UNALIGNED_SUPPORT_DISABLE */
-
-#else /* ARM_MATH_CM0_FAMILY */
-
-
-/* Run the below code for Cortex-M0 */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-
-
-
-  q15_t *px;                                     /* Temporary pointer for state buffer */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc;                                     /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Number of nTaps in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    tapCnt = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q31_t) * px++ * *pb++;
-      tapCnt--;
-    } while(tapCnt > 0u);
-
-    /* The result is in 2.30 format.  Convert to 1.15         
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) __SSAT((acc >> 15u), 16);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  tapCnt = (numTaps - 1u);
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-
-
-/**       
- * @} end of FIR group       
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c
deleted file mode 100644
index af5707f4..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q31.c
+++ /dev/null
@@ -1,365 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_q31.c    
-*    
-* Description:	Q31 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in] *S points to an instance of the Q31 FIR filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process per call.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.  
- *    
- * \par    
- * Refer to the function arm_fir_fast_q31() for a faster but less precise implementation of this filter for Cortex-M3 and Cortex-M4.    
- */
-
-void arm_fir_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t x0, x1, x2;                              /* Temporary variables to hold state */
-  q31_t c0;                                      /* Temporary variable to hold coefficient value */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc0, acc1, acc2;                        /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt, tapCntN3;          /* Loop counters */
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize / 3;
-  blockSize = blockSize - (3 * blkCnt);
-
-  tapCnt = numTaps / 3;
-  tapCntN3 = numTaps - (3 * tapCnt);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy three new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1] */
-    x0 = *(px++);
-    x1 = *(px++);
-
-    /* Loop unrolling.  Process 3 taps at a time. */
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-2] sample */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x0 * c0);
-      acc1 += ((q63_t) x1 * c0);
-      acc2 += ((q63_t) x2 * c0);
-
-      /* Read the coefficient and state */
-      c0 = *(pb + 1u);
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x1 * c0);
-      acc1 += ((q63_t) x2 * c0);
-      acc2 += ((q63_t) x0 * c0);
-
-      /* Read the coefficient and state */
-      c0 = *(pb + 2u);
-      x1 = *(px++);
-
-      /* update coefficient pointer */
-      pb += 3u;
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x2 * c0);
-      acc1 += ((q63_t) x0 * c0);
-      acc2 += ((q63_t) x1 * c0);
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 3, compute the remaining filter taps */
-
-    i = tapCntN3;
-
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x0 * c0);
-      acc1 += ((q63_t) x1 * c0);
-      acc2 += ((q63_t) x2 * c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 3 to process the next group of 3 samples */
-    pState = pState + 3;
-
-    /* The results in the 3 accumulators are in 2.30 format.  Convert to 1.31    
-     ** Then store the 3 outputs in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31u);
-    *pDst++ = (q31_t) (acc1 >> 31u);
-    *pDst++ = (q31_t) (acc2 >> 31u);
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 3, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-
-  while(blockSize > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += (q63_t) * (px++) * (*(pb++));
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.62 format.  Convert to 1.31    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31u);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blockSize--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  q63_t acc;                                     /* Accumulator */
-  uint32_t numTaps = S->numTaps;                 /* Length of the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q63_t) * px++ * *pb++;
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.62 format.  Convert to 1.31         
-     ** Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy numTaps number of values */
-  tapCnt = numTaps - 1u;
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-
-#endif /*  #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c
deleted file mode 100644
index 54a30e2b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_q7.c
+++ /dev/null
@@ -1,397 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_q7.c    
-*    
-* Description:  Q7 FIR filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR    
- * @{    
- */
-
-/**    
- * @param[in]   *S points to an instance of the Q7 FIR filter structure.    
- * @param[in]   *pSrc points to the block of input data.    
- * @param[out]  *pDst points to the block of output data.    
- * @param[in]   blockSize number of samples to process per call.    
- * @return 	none.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is converted to 18.7 format by discarding the low 7 bits.    
- * Finally, the result is truncated to 1.7 format.    
- */
-
-void arm_fir_q7(
-  const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-  q7_t x0, x1, x2, x3;                           /* Temporary variables to hold state */
-  q7_t c0;                                       /* Temporary variable to hold coefficient value */
-  q7_t *px;                                      /* Temporary pointer for state */
-  q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
-  q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Apply loop unrolling and compute 4 output values simultaneously.    
-   * The variables acc0 ... acc3 hold output values that are being computed:    
-   *    
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]    
-   *    acc1 =  b[numTaps-1] * x[n-numTaps] +   b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]    
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps] +   b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]    
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]    
-   */
-  blkCnt = blockSize >> 2;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Copy four new input samples into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first three samples from the state buffer:    
-     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *(px++);
-    x1 = *(px++);
-    x2 = *(px++);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-    i = tapCnt;
-
-    while(i > 0u)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-3] sample */
-      x3 = *px;
-      
-      /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      acc0 += ((q15_t) x0 * c0);
-
-      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      acc1 += ((q15_t) x1 * c0);
-
-      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      acc2 += ((q15_t) x2 * c0);
-
-      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      acc3 += ((q15_t) x3 * c0);
-
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb + 1u);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px + 1u);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x1 * c0);
-      acc1 += ((q15_t) x2 * c0);
-      acc2 += ((q15_t) x3 * c0);
-      acc3 += ((q15_t) x0 * c0);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 2u);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px + 2u);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x2 * c0);
-      acc1 += ((q15_t) x3 * c0);
-      acc2 += ((q15_t) x0 * c0);
-      acc3 += ((q15_t) x1 * c0);
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *(pb + 3u);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px + 3u);
-      
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x3 * c0);
-      acc1 += ((q15_t) x0 * c0);
-      acc2 += ((q15_t) x1 * c0);
-      acc3 += ((q15_t) x2 * c0);
-
-      /* update coefficient pointer */
-      pb += 4u;
-      px += 4u;
-      
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-
-    i = numTaps - (tapCnt * 4u);
-    while(i > 0u)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x0 * c0);
-      acc1 += ((q15_t) x1 * c0);
-      acc2 += ((q15_t) x2 * c0);
-      acc3 += ((q15_t) x3 * c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4;
-
-    /* The results in the 4 accumulators are in 2.62 format.  Convert to 1.31    
-     ** Then store the 4 outputs in the destination buffer. */
-    acc0 = __SSAT((acc0 >> 7u), 8);
-    *pDst++ = acc0;
-    acc1 = __SSAT((acc1 >> 7u), 8);
-    *pDst++ = acc1;
-    acc2 = __SSAT((acc2 >> 7u), 8);
-    *pDst++ = acc2;
-    acc3 = __SSAT((acc3 >> 7u), 8);
-    *pDst++ = acc3;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = (pCoeffs);
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += (q15_t) * (px++) * (*(pb++));
-      i--;
-    } while(i > 0u);
-
-    /* The result is in 2.14 format.  Convert to 1.7    
-     ** Then store the output in the destination buffer. */
-    *pDst++ = __SSAT((acc0 >> 7u), 8);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the samples loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.    
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.    
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  uint32_t numTaps = S->numTaps;                 /* Number of taps in the filter */
-  uint32_t i, blkCnt;                            /* Loop counters */
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px, *pb;                                 /* Temporary pointers to state and coeff */
-  q31_t acc = 0;                                 /* Accumlator */
-  q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1u);
-
-  /* Initialize blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  /* Perform filtering upto BlockSize - BlockSize%4  */
-  while(blkCnt > 0u)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set accumulator to zero */
-    acc = 0;
-
-    /* Initialize state pointer of type q7 */
-    px = pState;
-
-    /* Initialize coeff pointer of type q7 */
-    pb = pCoeffs;
-
-
-    i = numTaps;
-
-    while(i > 0u)
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc += (q15_t) * px++ * *pb++;
-      i--;
-    }
-
-    /* Store the 1.7 format filter output in destination buffer */
-    *pDst++ = (q7_t) __SSAT((acc >> 7), 8);
-
-    /* Advance the state pointer by 1 to process the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.         
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.       
-   ** This prepares the state buffer for the next function call. */
-
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-
-  /* Copy numTaps number of values */
-  i = (numTaps - 1u);
-
-  /* Copy q7_t data */
-  while(i > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    i--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c
deleted file mode 100644
index a08b9210..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_f32.c
+++ /dev/null
@@ -1,444 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_f32.c    
-*    
-* Description:	Floating-point sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters    
- *    
- * This group of functions implements sparse FIR filters.     
- * Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.   
- * Sparse filters are used for simulating reflections in communications and audio applications.   
- *   
- * There are separate functions for Q7, Q15, Q31, and floating-point data types.    
- * The functions operate on blocks  of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst points to input and output arrays respectively containing blockSize values.    
- *    
- * \par Algorithm:    
- * The sparse filter instant structure contains an array of tap indices pTapDelay which specifies the locations of the non-zero coefficients.   
- * This is in addition to the coefficient array b.   
- * The implementation essentially skips the multiplications by zero and leads to an efficient realization.   
- * 
   
- *     y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]    
- * 
    
- * \par    
- * \image html FIRSparse.gif "Sparse FIR filter.  b[n] represents the filter coefficients"   
- * \par    
- * pCoeffs points to a coefficient array of size numTaps;    
- * pTapDelay points to an array of nonzero indices and is also of size numTaps;   
- * pState points to a state array of size maxDelay + blockSize, where   
- * maxDelay is the largest offset value that is ever used in the pTapDelay array.   
- * Some of the processing functions also require temporary working buffers.   
- *   
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 4 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 4 different data type filter instance structures    
- * 
    
- *arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- *arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};    
- * 
    
- * \par    
- *    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the sparse FIR filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the floating-point sparse FIR filter.   
- * @param[in]  *S          points to an instance of the floating-point sparse FIR structure.   
- * @param[in]  *pSrc       points to the block of input data.   
- * @param[out] *pDst       points to the block of output data   
- * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize   number of input samples to process per call.   
- * @return none.   
- */
-
-void arm_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize)
-{
-
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *px;                                 /* Scratch buffer pointer */
-  float32_t *py = pState;                        /* Temporary pointers for state buffer */
-  float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
-  float32_t *pOut;                               /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
-
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
-                        (int32_t *) pSrc, 1, blockSize);
-
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                       blockSize);
-
-  /* Working pointer for the scratch buffer */
-  px = pb;
-
-  /* Working pointer for destination buffer */
-  pOut = pDst;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 Multiplications at a time. */
-  blkCnt = blockSize >> 2u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer */
-    px = pb;
-
-    /* Working pointer for destination buffer */
-    pOut = pDst;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = ((int32_t) S->stateIndex -
-                 (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer */
-	px = pb;
-
-	/* Working pointer for destination buffer */
-	pOut = pDst;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.    
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-		*pOut++ += *px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,    
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-#else
-
-/* Run the below code for Cortex-M0 */
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer */
-    px = pb;
-
-    /* Working pointer for destination buffer */
-    pOut = pDst;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex =
-      ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer */
-	px = pb;
-
-	/* Working pointer for destination buffer */
-	pOut = pDst;
-
-	blkCnt = blockSize;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pOut++ += *px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY        */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
deleted file mode 100644
index ea1f6095..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_f32.c    
-*    
-* Description:	Floating-point sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the floating-point sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the floating-point sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of samples processed by the arm_fir_sparse_f32() function.    
- */
-
-void arm_fir_sparse_init_f32(
-  arm_fir_sparse_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
deleted file mode 100644
index b9dbc1fe..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q15.c    
-*    
-* Description:	Q15 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q15 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q15 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of words processed by arm_fir_sparse_q15() function.    
- */
-
-void arm_fir_sparse_init_q15(
-  arm_fir_sparse_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
deleted file mode 100644
index 37154e5f..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q31.c    
-*    
-* Description:	Q31 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q31 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q31 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the number of words processed by arm_fir_sparse_q31() function.    
- */
-
-void arm_fir_sparse_init_q31(
-  arm_fir_sparse_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
deleted file mode 100644
index 888de838..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_fir_sparse_init_q7.c    
-*    
-* Description:	Q7 sparse FIR filter initialization function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE. 
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief  Initialization function for the Q7 sparse FIR filter.   
- * @param[in,out] *S         points to an instance of the Q7 sparse FIR structure.   
- * @param[in]     numTaps    number of nonzero coefficients in the filter.   
- * @param[in]     *pCoeffs   points to the array of filter coefficients.   
- * @param[in]     *pState    points to the state buffer.   
- * @param[in]     *pTapDelay points to the array of offset times.   
- * @param[in]     maxDelay   maximum offset time supported.   
- * @param[in]     blockSize  number of samples that will be processed per block.   
- * @return none   
- *    
- * Description:    
- * \par    
- * pCoeffs holds the filter coefficients and has length numTaps.    
- * pState holds the filter's state variables and must be of length    
- * maxDelay + blockSize, where maxDelay    
- * is the maximum number of delay line values.    
- * blockSize is the    
- * number of samples processed by the arm_fir_sparse_q7() function.    
- */
-
-void arm_fir_sparse_init_q7(
-  arm_fir_sparse_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0u;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c
deleted file mode 100644
index 9029ee4e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q15.c
+++ /dev/null
@@ -1,481 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q15.c    
-*    
-* Description:	Q15 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the Q15 sparse FIR filter.   
- * @param[in]  *S           points to an instance of the Q15 sparse FIR structure.   
- * @param[in]  *pSrc        points to the block of input data.   
- * @param[out] *pDst        points to the block of output data   
- * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.   
- * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize    number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 32-bit accumulator.   
- * The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.   
- * Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.   
- * If the accumulator result overflows it will wrap around rather than saturate.   
- * After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.    
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.   
- */
-
-
-void arm_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
-{
-
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pIn = pSrc;                             /* Working pointer for input */
-  q15_t *pOut = pDst;                            /* Working pointer for output */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *px;                                     /* Temporary pointers for scratch buffer */
-  q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q15_t *py = pState;                            /* Temporary pointers for state buffer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for pScratchOut */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2;                                /* Temporary variables */
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                       pb, pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                         pb, pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */		
-
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q15(py, delaySize, &readIndex, 1,
-											 pb, pb, blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.    
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,    
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.    
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in1 = *pScr2++;
-    in2 = *pScr2++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
-              16);
-
-#else
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
-              16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-    in1 = *pScr2++;
-
-    in2 = *pScr2++;
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16),
-              16);
-
-#else
-
-    *__SIMD32(pOut)++ =
-      __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16),
-              16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-
-    blkCnt--;
-
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-     remaining samples are processed in the below loop */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, delaySize, &S->stateIndex, 1, pIn, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                       pb, pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, delaySize, &readIndex, 1,
-                         pb, pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) * px++ * coeff;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q15(py, delaySize, &readIndex, 1,
-											 pb, pb, blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	blkCnt = blockSize;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		*pScratchOut++ += (q31_t) * px++ * coeff;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.       
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c
deleted file mode 100644
index 9141fca3..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q31.c
+++ /dev/null
@@ -1,461 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q31.c    
-*    
-* Description:	Q31 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-/**   
- * @brief Processing function for the Q31 sparse FIR filter.   
- * @param[in]  *S          points to an instance of the Q31 sparse FIR structure.   
- * @param[in]  *pSrc       points to the block of input data.   
- * @param[out] *pDst       points to the block of output data   
- * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize   number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 32-bit accumulator.   
- * The 1.31 x 1.31 multiplications are truncated to 2.30 format.   
- * This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.    
- * If the accumulator result overflows, it wraps around rather than saturate.   
- * In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.   
- */
-
-void arm_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize)
-{
-
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *px;                                     /* Scratch buffer pointer */
-  q31_t *py = pState;                            /* Temporary pointers for state buffer */
-  q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-  q31_t *pOut;                                   /* Destination pointer */
-  q63_t out;                                     /* Temporary output variable */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-  q31_t in;
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
-                        (int32_t *) pSrc, 1, blockSize);
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                       blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pOut = pDst;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 Multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pOut = pDst;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.    
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
-
-	while(blkCnt > 0u)
-	{
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,    
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}	
-
-  /* Working output pointer is updated */
-  pOut = pDst;
-
-  /* Output is converted into 1.31 format. */
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * process 4 output samples at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * process the remaining output samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform Multiplications and store in the destination buffer */
-    *pOut++ = (q31_t) (((q63_t) * px++ * coeff) >> 32);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-                         blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) * px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-											 (int32_t *) pb, (int32_t *) pb, blockSize, 1,
-											 blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pOut = pDst;
-
-	blkCnt = blockSize;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		out = *pOut;
-		out += ((q63_t) * px++ * coeff) >> 32;
-		*pOut++ = (q31_t) (out);
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* Working output pointer is updated */
-  pOut = pDst;
-
-  /* Output is converted into 1.31 format. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c
deleted file mode 100644
index 5d051e46..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_fir_sparse_q7.c
+++ /dev/null
@@ -1,480 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_fir_sparse_q7.c    
-*    
-* Description:	Q7 sparse FIR filter processing function.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ------------------------------------------------------------------- */
-#include "arm_math.h"
-
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup FIR_Sparse    
- * @{    
- */
-
-
-/**   
- * @brief Processing function for the Q7 sparse FIR filter.   
- * @param[in]  *S           points to an instance of the Q7 sparse FIR structure.   
- * @param[in]  *pSrc        points to the block of input data.   
- * @param[out] *pDst        points to the block of output data   
- * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.   
- * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.   
- * @param[in]  blockSize    number of input samples to process per call.   
- * @return none.   
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.    
- * The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * The accumulator is then converted to 18.7 format by discarding the low 7 bits.   
- * Finally, the result is truncated to 1.7 format.   
- */
-
-void arm_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  q7_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize)
-{
-
-  q7_t *pState = S->pState;                      /* State pointer */
-  q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-  q7_t *px;                                      /* Scratch buffer pointer */
-  q7_t *py = pState;                             /* Temporary pointers for state buffer */
-  q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
-  q7_t *pOut = pDst;                             /* Destination pointer */
-  int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-  uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-  uint16_t numTaps = S->numTaps;                 /* Filter order */
-  int32_t readIndex;                             /* Read index of the state buffer */
-  uint32_t tapCnt, blkCnt;                       /* loop counters */
-  q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
-  q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
-  q31_t in;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t in1, in2, in3, in4;
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
-                       blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                      (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize. Unroll by a factor of 4.    
-   * Compute 4 multiplications at a time. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-   * compute the remaining samples */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and    
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                        (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize. Unroll by a factor of 4.    
-     * Compute 4 MACS at a time. */
-    blkCnt = blockSize >> 2;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4,    
-     * compute the remaining samples */
-    blkCnt = blockSize % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and    
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = ((int32_t) S->stateIndex -
-                 (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-											(int32_t) blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	/* Loop over the blockSize. Unroll by a factor of 4.    
-	 * Compute 4 MACS at a time. */
-	blkCnt = blockSize >> 2;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-	/* If the blockSize is not a multiple of 4,    
-	 * compute the remaining samples */
-	blkCnt = blockSize % 0x4u;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.    
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize >> 2;
-
-  while(blkCnt > 0u)
-  {
-    in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    *__SIMD32(pOut)++ = __PACKq7(in1, in2, in3, in4);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4,    
-     remaining samples are processed in the below loop */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1,
-                       blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                      (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-  /* Loop over the blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) * px++ * coeff);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and           
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if(readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2u;
-
-  while(tapCnt > 0u)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-                        (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-    /* Loop over the blockSize */
-    blkCnt = blockSize;
-
-    while(blkCnt > 0u)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and           
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex =
-      ((int32_t) S->stateIndex - (int32_t) blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if(readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement the tap loop counter */
-    tapCnt--;
-  }
-	
-	/* Compute last tap without the final read of pTapDelay */	
-	
-	/* Working pointer for state buffer is updated */
-	py = pState;
-
-	/* blockSize samples are read from the state buffer */
-	arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1, pb, pb,
-											(int32_t) blockSize, 1, blockSize);
-
-	/* Working pointer for the scratch buffer of state values */
-	px = pb;
-
-	/* Working pointer for scratch buffer of output values */
-	pScratchOut = pScr2;
-
-	/* Loop over the blockSize */
-	blkCnt = blockSize;
-
-	while(blkCnt > 0u)
-	{
-		/* Perform Multiply-Accumulate */
-		in = *pScratchOut + ((q31_t) * px++ * coeff);
-		*pScratchOut++ = in;
-
-		/* Decrement the loop counter */
-		blkCnt--;
-	}
-
-  /* All the output values are in pScratchOut buffer.       
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-  /* Loop over the blockSize. */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    /* Decrement the blockSize loop counter */
-    blkCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of FIR_Sparse group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c
deleted file mode 100644
index 1acacc79..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_f32.c
+++ /dev/null
@@ -1,447 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_f32.c    
-*    
-* Description:	Floating-point IIR Lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters    
- *    
- * This set of functions implements lattice filters    
- * for Q15, Q31 and floating-point data types.  Lattice filters are used in a     
- * variety of adaptive filter applications.  The filter structure has feedforward and    
- * feedback components and the net impulse response is infinite length.    
- * The functions operate on blocks    
- * of input and output data and each call to the function processes    
- * blockSize samples through the filter.  pSrc and    
- * pDst point to input and output arrays containing blockSize values.    
-    
- * \par Algorithm:    
- * \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"    
- * 
    
- *    fN(n)   =  x(n)    
- *    fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ...1    
- *    gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ...1    
- *    y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)    
- * 
    
- * \par    
- * pkCoeffs points to array of reflection coefficients of size numStages.     
- * Reflection coefficients are stored in time-reversed order.    
- * \par    
- * 
    
- *    {kN, kN-1, ....k1}    
- * 
    
- * pvCoeffs points to the array of ladder coefficients of size (numStages+1).     
- * Ladder coefficients are stored in time-reversed order.    
- * \par    
- * 
    
- *    {vN, vN-1, ...v0}    
- * 
    
- * pState points to a state array of size numStages + blockSize.    
- * The state variables shown in the figure above (the g values) are stored in the pState array.    
- * The state variables are updated after each block of data is processed; the coefficients are untouched.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter.    
- * Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
-  *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.   
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero. 
- *    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:    
- * 
    
- *arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- *arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- *arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};    
- * 
    
- * \par    
- * where numStages is the number of stages in the filter; pState points to the state buffer array;    
- * pkCoeffs points to array of the reflection coefficients; pvCoeffs points to the array of ladder coefficients.    
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the IIR lattice filter functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point IIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t fnext1, gcurr1, gnext;               /* Temporary variables for lattice stages */
-  float32_t acc;                                 /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
-  float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  float32_t *pState;                             /* State pointer */
-  float32_t *pStateCurnt;                        /* State current pointer */
-  float32_t k1, k2;
-  float32_t v1, v2, v3, v4;
-  float32_t gcurr2;
-  float32_t fnext2;
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  /* initialise state pointer */
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fnext2 = *pSrc++;
-
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-
-    /* Set accumulator to zero */
-    acc = 0.0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages) >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Read gN-1(n-1) from state buffer */
-      gcurr1 = *px1;
-
-      /* read reflection coefficient kN */
-      k1 = *pk;
-
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext1 = fnext2 - (k1 * gcurr1);
-
-      /* read ladder coefficient vN */
-      v1 = *pv;
-
-      /* read next reflection coefficient kN-1 */
-      k2 = *(pk + 1u);
-
-      /* Read gN-2(n-1) from state buffer */
-      gcurr2 = *(px1 + 1u);
-
-      /* read next ladder coefficient vN-1 */
-      v2 = *(pv + 1u);
-
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext2 = fnext1 - (k2 * gcurr2);
-
-      /* gN(n)   = kN * fN-1(n) + gN-1(n-1) */
-      gnext = gcurr1 + (k1 * fnext1);
-
-      /* read reflection coefficient kN-2 */
-      k1 = *(pk + 2u);
-
-      /* write gN(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Read gN-3(n-1) from state buffer */
-      gcurr1 = *(px1 + 2u);
-
-      /* y(n) += gN(n) * vN  */
-      acc += (gnext * v1);
-
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fnext1 = fnext2 - (k1 * gcurr1);
-
-      /* gN-1(n)   = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = gcurr2 + (k2 * fnext2);
-
-      /* Read gN-4(n-1) from state buffer */
-      gcurr2 = *(px1 + 3u);
-
-      /* y(n) += gN-1(n) * vN-1  */
-      acc += (gnext * v2);
-
-      /* read reflection coefficient kN-3 */
-      k2 = *(pk + 3u);
-
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext2 = fnext1 - (k2 * gcurr2);
-
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = gcurr1 + (k1 * fnext1);
-
-      /* read ladder coefficient vN-2 */
-      v3 = *(pv + 2u);
-
-      /* y(n) += gN-2(n) * vN-2  */
-      acc += (gnext * v3);
-
-      /* write gN-2(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* update pointer */
-      pk += 4u;
-
-      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
-      gnext = (fnext2 * k2) + gcurr2;
-
-      /* read next ladder coefficient vN-3 */
-      v4 = *(pv + 3u);
-
-      /* y(n) += gN-4(n) * vN-4  */
-      acc += (gnext * v4);
-
-      /* write gN-3(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* update pointers */
-      px1 += 4u;
-      pv += 4u;
-
-      tapCnt--;
-
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr1 = *px1++;
-      /* Process sample for last taps */
-      fnext1 = fnext2 - ((*pk) * gcurr1);
-      gnext = (fnext1 * (*pk++)) + gcurr1;
-      /* Output samples for last taps */
-      acc += (gnext * (*pv++));
-      *px2++ = gnext;
-      fnext2 = fnext1;
-
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (fnext2 * (*pv));
-
-    *px2++ = fnext2;
-
-    /* write out into pDst */
-    *pDst++ = acc;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer        
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numStages) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-}
-
-#else
-
-void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t fcurr, fnext = 0, gcurr, gnext;      /* Temporary variables for lattice stages */
-  float32_t acc;                                 /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* temporary variables for counts */
-  float32_t *px1, *px2, *pk, *pv;                /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  float32_t *pState;                             /* State pointer */
-  float32_t *pStateCurnt;                        /* State current pointer */
-
-
-  /* Run the below code for Cortex-M0 */
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0.0f;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for numStages */
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = fcurr - ((*pk) * gcurr);
-      gnext = (fnext * (*pk++)) + gcurr;
-
-      /* Output samples for last taps */
-      acc += (gnext * (*pv++));
-      *px2++ = gnext;
-      fcurr = fnext;
-
-      /* Decrementing loop counter */
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (fnext * (*pv));
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = acc;
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages;
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
deleted file mode 100644
index a8a812c8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_f32.c    
-*    
-* Description:  Floating-point IIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Initialization function for the floating-point IIR lattice filter.    
- * @param[in] *S points to an instance of the floating-point IIR lattice structure.    
- * @param[in] numStages number of stages in the filter.    
- * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.    
- * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.    
- * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- */
-
-void arm_iir_lattice_init_f32(
-  arm_iir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pkCoeffs,
-  float32_t * pvCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-  /**    
-   * @} end of IIR_Lattice group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
deleted file mode 100644
index 88b26498..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_q15.c    
-*    
-* Description:  Q15 IIR lattice filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q15 IIR lattice filter.    
-   * @param[in] *S points to an instance of the Q15 IIR lattice structure.    
-   * @param[in] numStages  number of stages in the filter.    
-   * @param[in] *pkCoeffs points to reflection coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pvCoeffs points to ladder coefficient buffer.  The array is of length numStages+1.    
-   * @param[in] *pState points to state buffer.  The array is of length numStages+blockSize.    
-   * @param[in] blockSize number of samples to process per call.    
-   * @return none.    
-   */
-
-void arm_iir_lattice_init_q15(
-  arm_iir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pkCoeffs,
-  q15_t * pvCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
deleted file mode 100644
index be134a44..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_iir_lattice_init_q31.c    
-*    
-* Description:  Initialization function for the Q31 IIR lattice filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for the Q31 IIR lattice filter.    
-   * @param[in] *S points to an instance of the Q31 IIR lattice structure.    
-   * @param[in] numStages number of stages in the filter.    
-   * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.    
-   * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.    
-   * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_iir_lattice_init_q31(
-  arm_iir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pkCoeffs,
-  q31_t * pvCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-
-}
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c
deleted file mode 100644
index a9aeb6df..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q15.c
+++ /dev/null
@@ -1,464 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_q15.c    
-*    
-* Description:	Q15 IIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q15 IIR lattice filter.    
- * @param[in] *S points to an instance of the Q15 IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- */
-
-void arm_iir_lattice_q15(
-  const arm_iir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t fcurr, fnext, gcurr = 0, gnext;          /* Temporary variables for lattice stages */
-  q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
-  uint32_t stgCnt;                               /* Temporary variables for counts */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pStateCurnt;                            /* State current pointer */
-  q15_t out;                                     /* Temporary variable for output */
-  q31_t v;                                       /* Temporary variable for ladder coefficient */
-#ifdef UNALIGNED_SUPPORT_DISABLE
-	q15_t v1, v2;
-#endif
-
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for first tap */
-    gcurr = *px1++;
-    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-    fnext = __SSAT(fnext, 16);
-    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-    gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-    gnext = __SSAT(gnext, 16);
-    /* write gN(n) into state for next sample processing */
-    *px2++ = (q15_t) gnext;
-    /* y(n) += gN(n) * vN  */
-    acc += (q31_t) ((gnext * (*pv++)));
-
-
-    /* Update f values for next coefficient processing */
-    fcurr = fnext;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages - 1u) >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Process sample for 2nd, 6th ...taps */
-      /* Read gN-2(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 2nd, 6th .. taps */
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-1(n) into state */
-      *px2++ = (q15_t) gnext1;
-
-
-      /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 3rd, 7th .. taps */
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
-      fcurr = __SSAT(fcurr, 16);
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
-      gnext2 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-2(n) into state */
-      *px2++ = (q15_t) gnext2;
-
-      /* Read vN-1 and vN-2 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      v = *__SIMD32(pv)++;
-
-#else
-
-	  v1 = *pv++;
-	  v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  v = __PKHBT(v1, v2, 16);
-
-#else
-
-	  v = __PKHBT(v2, v1, 16);
-
-#endif	/* 	#ifndef ARM_MATH_BIG_ENDIAN		*/
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
-      /* Pack gN-1(n) and gN-2(n) */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      gnext = __PKHBT(gnext1, gnext2, 16);
-
-#else
-
-      gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /*   #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* y(n) += gN-1(n) * vN-1  */
-      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
-      /* y(n) += gN-2(n) * vN-2  */
-      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
-      acc = __SMLALD(gnext, v, acc);
-
-
-      /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 4th, 8th .. taps */
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write  gN-3(n) for the next sample process */
-      *px2++ = (q15_t) gnext1;
-
-
-      /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state */
-      gcurr = *px1++;
-      /* Process sample for 5th, 9th .. taps */
-      /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
-      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
-      fcurr = __SSAT(fcurr, 16);
-      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
-      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
-      gnext2 = (q15_t) __SSAT(gnext, 16);
-      /* write      gN-4(n) for the next sample process */
-      *px2++ = (q15_t) gnext2;
-
-      /* Read vN-3 and vN-4 at a time */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      v = *__SIMD32(pv)++;
-
-#else
-
-	  v1 = *pv++;
-	  v2 = *pv++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-	  v = __PKHBT(v1, v2, 16);
-
-#else
-
-	  v = __PKHBT(v2, v1, 16);
-
-#endif	/* #ifndef ARM_MATH_BIG_ENDIAN	 */
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-
-      /* Pack gN-3(n) and gN-4(n) */
-#ifndef  ARM_MATH_BIG_ENDIAN
-
-      gnext = __PKHBT(gnext1, gnext2, 16);
-
-#else
-
-      gnext = __PKHBT(gnext2, gnext1, 16);
-
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* y(n) += gN-4(n) * vN-4  */
-      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
-      /* y(n) += gN-3(n) * vN-3  */
-      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
-      acc = __SMLALD(gnext, v, acc);
-
-      tapCnt--;
-
-    }
-
-    fnext = fcurr;
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages - 1u) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext = __SSAT(gnext, 16);
-      /* Output samples for last taps */
-      acc += (q31_t) (((q31_t) gnext * (*pv++)));
-      *px2++ = (q15_t) gnext;
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q31_t) (((q31_t) fnext * (*pv++)));
-
-    out = (q15_t) __SSAT(acc >> 15, 16);
-    *px2++ = (q15_t) fnext;
-
-    /* write out into pDst */
-    *pDst++ = out;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer    
-     for the preperation of next frame process */
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  stgCnt = (numStages >> 2u);
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-#endif /*	#ifndef UNALIGNED_SUPPORT_DISABLE */
-
-    /* Decrement the loop counter */
-    stgCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  stgCnt = (numStages) % 0x4u;
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    stgCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-  uint32_t stgCnt;                               /* Temporary variables for counts */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q15_t *px1, *px2, *pk, *pv;                    /* temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q15_t *pState;                                 /* State pointer */
-  q15_t *pStateCurnt;                            /* State current pointer */
-  q15_t out;                                     /* Temporary variable for output */
-
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample */
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext = fcurr - ((gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext = ((fnext * (*pk++)) >> 15) + gcurr;
-      gnext = __SSAT(gnext, 16);
-      /* Output samples */
-      /* y(n) += gN(n) * vN */
-      acc += (q31_t) ((gnext * (*pv++)));
-      /* write gN(n) into state for next sample processing */
-      *px2++ = (q15_t) gnext;
-      /* Update f values for next coefficient processing */
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q31_t) ((fnext * (*pv++)));
-
-    out = (q15_t) __SSAT(acc >> 15, 16);
-    *px2++ = (q15_t) fnext;
-
-    /* write out into pDst */
-    *pDst++ = out;
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  stgCnt = numStages;
-
-  /* copy data */
-  while(stgCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    stgCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c
deleted file mode 100644
index 5a16fae8..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_iir_lattice_q31.c
+++ /dev/null
@@ -1,350 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_iir_lattice_q31.c    
-*    
-* Description:	Q31 IIR lattice filter processing function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup IIR_Lattice    
- * @{    
- */
-
-/**    
- * @brief Processing function for the Q31 IIR lattice filter.    
- * @param[in] *S points to an instance of the Q31 IIR lattice structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[out] *pDst points to the block of output data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.    
- * Thus, if the accumulator result overflows it wraps around rather than clip.    
- * In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.    
- * After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.    
- */
-
-void arm_iir_lattice_q31(
-  const arm_iir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-  q63_t acc;                                     /* Accumlator */
-  uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-  q31_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
-  uint32_t numStages = S->numStages;             /* number of stages */
-  q31_t *pState;                                 /* State pointer */
-  q31_t *pStateCurnt;                            /* State current pointer */
-
-  blkCnt = blockSize;
-
-  pState = &S->pState[0];
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-
-    /* Process sample for first tap */
-    gcurr = *px1++;
-    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-    gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-    /* write gN-1(n-1) into state for next sample processing */
-    *px2++ = gnext;
-    /* y(n) += gN(n) * vN  */
-    acc += ((q63_t) gnext * *pv++);
-
-    /* Update f values for next coefficient processing */
-    fcurr = fnext;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = (numStages - 1u) >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Process sample for 2nd, 6th .. taps */
-      /* Read gN-2(n-1) from state buffer */
-      gcurr = *px1++;
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* y(n) += gN-1(n) * vN-1  */
-      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 3rd, 7th .. taps */
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
-      /* y(n) += gN-2(n) * vN-2  */
-      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-2(n) into state for next sample processing */
-      *px2++ = gnext;
-
-
-      /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 4th, 8th .. taps */
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* y(n) += gN-3(n) * vN-3  */
-      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-3(n) into state for next sample processing */
-      *px2++ = gnext;
-
-
-      /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 5th, 9th .. taps */
-      /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
-      /* y(n) += gN-4(n) * vN-4  */
-      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-4(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      tapCnt--;
-
-    }
-
-    fnext = fcurr;
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = (numStages - 1u) % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk)) >> 31));
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* Output samples for last taps */
-      acc += ((q63_t) gnext * *pv++);
-      *px2++ = gnext;
-      fcurr = fnext;
-
-      tapCnt--;
-
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q63_t) fnext *(
-  *pv++);
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer    
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numStages) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  };
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  /* Sample processing */
-  while(blkCnt > 0u)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize state read pointer */
-    px1 = pState;
-    /* Initialize state write pointer */
-    px2 = pState;
-    /* Set accumulator to zero */
-    acc = 0;
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    tapCnt = numStages;
-
-    while(tapCnt > 0u)
-    {
-      gcurr = *px1++;
-      /* Process sample */
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext =
-        clip_q63_to_q31(((q63_t) fcurr -
-                         ((q31_t) (((q63_t) gcurr * (*pk)) >> 31))));
-      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext =
-        clip_q63_to_q31(((q63_t) gcurr +
-                         ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
-      /* Output samples */
-      /* y(n) += gN(n) * vN  */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-1(n-1) into state for next sample processing */
-      *px2++ = gnext;
-      /* Update f values for next coefficient processing */
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q63_t) fnext *(
-  *pv++);
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = (q31_t) (acc >> 31u);
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1u;
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer           
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-
-
-/**    
- * @} end of IIR_Lattice group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c
deleted file mode 100644
index b92af60b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_f32.c
+++ /dev/null
@@ -1,442 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_f32.c    
-*    
-* Description:	Processing function for the floating-point LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup LMS Least Mean Square (LMS) Filters    
- *    
- * LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.    
- * LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.    
- * Adaptive filters are often used in communication systems, equalizers, and noise removal.    
- * The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.    
- * The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.    
- *    
- * An LMS filter consists of two components as shown below.    
- * The first component is a standard transversal or FIR filter.    
- * The second component is a coefficient update mechanism.    
- * The LMS filter has two input signals.    
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.    
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.    
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.    
- * This "error signal" tends towards zero as the filter adapts.    
- * The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.    
- * \image html LMS.gif "Internal structure of the Least Mean Square filter"    
- *    
- * The functions operate on blocks of data and each call to the function processes    
- * blockSize samples through the filter.    
- * pSrc points to input signal, pRef points to reference signal,    
- * pOut points to output signal and pErr points to error signal.    
- * All arrays contain blockSize values.    
- *    
- * The functions operate on a block-by-block basis.    
- * Internally, the filter coefficients b[n] are updated on a sample-by-sample basis.    
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.    
- *    
- * \par Algorithm:    
- * The output signal y[n] is computed by a standard FIR filter:    
- * 
    
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- *    
- * \par    
- * The error signal equals the difference between the reference signal d[n] and the filter output:    
- * 
    
- *     e[n] = d[n] - y[n].    
- * 
    
- *    
- * \par    
- * After each sample of the error signal is computed, the filter coefficients b[k] are updated on a sample-by-sample basis:    
- * 
    
- *     b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1    
- * 
    
- * where mu is the step size and controls the rate of coefficient convergence.    
- *\par    
- * In the APIs, pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * \par    
- * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples.    
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,    
- * to be avoided and yields a significant speed improvement.    
- * The state variables are updated after each block of data is processed.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter and    
- * coefficient and state arrays cannot be shared among instances.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero. 
- *
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Set the values in the state buffer to zeros before static initialization.    
- * The code below statically initializes each of the 3 different data type filter instance structures    
- * 
    
- *    arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};    
- *    arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};    
- *    arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};    
- * 
    
- * where numTaps is the number of filter coefficients in the filter; pState is the address of the state buffer;    
- * pCoeffs is the address of the coefficient buffer; mu is the step size parameter; and postShift is the shift applied to coefficients.    
- *    
- * \par Fixed-Point Behavior:    
- * Care must be taken when using the Q15 and Q31 versions of the LMS filter.    
- * The following issues must be considered:    
- * - Scaling of coefficients    
- * - Overflow and saturation    
- *    
- * \par Scaling of Coefficients:    
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift.    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * This essentially scales the filter coefficients by 2^postShift and    
- * allows the filter coefficients to exceed the range [+1 -1).    
- * The value of postShift is set by the user based on the expected gain through the system being modeled.    
- *    
- * \par Overflow and Saturation:    
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are    
- * described separately as part of the function specific documentation below.    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-/**           
- * @details           
- * This function operates on floating-point data types.       
- *    
- * @brief Processing function for floating-point LMS filter.    
- * @param[in]  *S points to an instance of the floating-point LMS filter structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[in]  *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in]  blockSize number of samples to process.    
- * @return     none.    
- */
-
-void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t mu = S->mu;                          /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
-  float32_t w = 0.0f;                            /* weight factor */
-
-  e = 0.0f;
-  d = 0.0f;
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator, store in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for the updating filter coefficients */
-    w = e * mu;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result is stored in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Weighting factor for the LMS version */
-    w = e * mu;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-   * start of the state buffer. This prepares the state buffer for the        
-   * next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c
deleted file mode 100644
index 1e0c93e5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_f32.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_f32.c    
-*    
-* Description:  Floating-point LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for floating-point LMS filter.    
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to the coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-/**    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples, where blockSize is the number of input samples processed by each call to arm_lms_f32().    
- */
-
-void arm_lms_init_f32(
-  arm_lms_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps */
-  memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c
deleted file mode 100644
index da2ee364..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q15.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_q15.c    
-*    
-* Description:  Q15 LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-/**    
-* @brief Initialization function for the Q15 LMS filter.    
-* @param[in] *S points to an instance of the Q15 LMS filter structure.    
-* @param[in] numTaps  number of filter coefficients.    
-* @param[in] *pCoeffs points to the coefficient buffer.    
-* @param[in] *pState points to the state buffer.    
-* @param[in] mu step size that controls filter coefficient updates.    
-* @param[in] blockSize number of samples to process.    
-* @param[in] postShift bit shift applied to coefficients.    
-* @return    none.    
-*    
-* \par Description:    
-* pCoeffs points to the array of filter coefficients stored in time reversed order:    
-* 
    
-*    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
-* 
    
-* The initial filter coefficients serve as a starting point for the adaptive filter.    
-* pState points to the array of state variables and size of array is    
-* numTaps+blockSize-1 samples, where blockSize is the number of    
-* input samples processed by each call to arm_lms_q15().    
-*/
-
-void arm_lms_init_q15(
-  arm_lms_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint32_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Assign postShift value to be applied */
-  S->postShift = postShift;
-
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c
deleted file mode 100644
index 10cffde4..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_init_q31.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_init_q31.c    
-*    
-* Description:  Q31 LMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q31 LMS filter.    
-   * @param[in] *S points to an instance of the Q31 LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to    
- * arm_lms_q31().    
- */
-
-void arm_lms_init_q31(
-  arm_lms_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint32_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, ((uint32_t) numTaps + (blockSize - 1u)) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Assign postShift value to be applied */
-  S->postShift = postShift;
-
-}
-
-/**    
- * @} end of LMS group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c
deleted file mode 100644
index e0c3f644..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_f32.c
+++ /dev/null
@@ -1,466 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_f32.c    
-*    
-* Description:	Processing function for the floating-point Normalised LMS.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @defgroup LMS_NORM Normalized LMS Filters    
- *    
- * This set of functions implements a commonly used adaptive filter.    
- * It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization    
- * factor which increases the adaptation rate of the filter.    
- * The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.    
- *    
- * A normalized least mean square (NLMS) filter consists of two components as shown below.    
- * The first component is a standard transversal or FIR filter.    
- * The second component is a coefficient update mechanism.    
- * The NLMS filter has two input signals.    
- * The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.    
- * That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.    
- * The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.    
- * This "error signal" tends towards zero as the filter adapts.    
- * The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.    
- * \image html LMS.gif "Internal structure of the NLMS adaptive filter"    
- *    
- * The functions operate on blocks of data and each call to the function processes    
- * blockSize samples through the filter.    
- * pSrc points to input signal, pRef points to reference signal,    
- * pOut points to output signal and pErr points to error signal.    
- * All arrays contain blockSize values.    
- *    
- * The functions operate on a block-by-block basis.    
- * Internally, the filter coefficients b[n] are updated on a sample-by-sample basis.    
- * The convergence of the LMS filter is slower compared to the normalized LMS algorithm.    
- *    
- * \par Algorithm:    
- * The output signal y[n] is computed by a standard FIR filter:    
- * 
    
- *     y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]    
- * 
    
- *    
- * \par    
- * The error signal equals the difference between the reference signal d[n] and the filter output:    
- * 
    
- *     e[n] = d[n] - y[n].    
- * 
    
- *    
- * \par    
- * After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:    
- * 
    
- *    E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.    
- * 
    
- * The filter coefficients b[k] are then updated on a sample-by-sample basis:    
- * 
    
- *     b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1    
- * 
    
- * where mu is the step size and controls the rate of coefficient convergence.    
- *\par    
- * In the APIs, pCoeffs points to a coefficient array of size numTaps.    
- * Coefficients are stored in time reversed order.    
- * \par    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * \par    
- * pState points to a state array of size numTaps + blockSize - 1.    
- * Samples in the state buffer are stored in the order:    
- * \par    
- * 
    
- *    {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}    
- * 
    
- * \par    
- * Note that the length of the state buffer exceeds the length of the coefficient array by blockSize-1 samples.    
- * The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,    
- * to be avoided and yields a significant speed improvement.    
- * The state variables are updated after each block of data is processed.    
- * \par Instance Structure    
- * The coefficients and state variables for a filter are stored together in an instance data structure.    
- * A separate instance structure must be defined for each filter and    
- * coefficient and state arrays cannot be shared among instances.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Zeros out the values in the state buffer.    
- * To do this manually without calling the init function, assign the follow subfields of the instance structure:
- * numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero. 
- * For Q7, Q15, and Q31 the following fields must also be initialized;
- * recipTable, postShift
- *
- * \par    
- * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.    
- * \par Fixed-Point Behavior:    
- * Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.    
- * The following issues must be considered:    
- * - Scaling of coefficients    
- * - Overflow and saturation    
- *    
- * \par Scaling of Coefficients:    
- * Filter coefficients are represented as fractional values and    
- * coefficients are restricted to lie in the range [-1 +1).    
- * The fixed-point functions have an additional scaling parameter postShift.    
- * At the output of the filter's accumulator is a shift register which shifts the result by postShift bits.    
- * This essentially scales the filter coefficients by 2^postShift and    
- * allows the filter coefficients to exceed the range [+1 -1).    
- * The value of postShift is set by the user based on the expected gain through the system being modeled.    
- *    
- * \par Overflow and Saturation:    
- * Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are    
- * described separately as part of the function specific documentation below.    
- */
-
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-
-  /**    
-   * @brief Processing function for floating-point normalized LMS filter.    
-   * @param[in] *S points to an instance of the floating-point normalized LMS filter structure.    
-   * @param[in] *pSrc points to the block of input data.    
-   * @param[in] *pRef points to the block of reference data.    
-   * @param[out] *pOut points to the block of output data.    
-   * @param[out] *pErr points to the block of error data.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   */
-
-void arm_lms_norm_f32(
-  arm_lms_norm_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t mu = S->mu;                          /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  float32_t energy;                              /* Energy of the input */
-  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
-  float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
-
-  /* Initializations of error,  difference, Coefficient update */
-  e = 0.0f;
-  d = 0.0f;
-  w = 0.0f;
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= x0 * x0;
-    energy += in * in;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator, store in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    /* epsilon value 0.000000119209289f */
-    w = (e * mu) / (energy + 0.000000119209289f);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  S->energy = energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u)/4 samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= x0 * x0;
-    energy += in * in;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator is stored in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    /* epsilon value 0.000000119209289f */
-    w = (e * mu) / (energy + 0.000000119209289f);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCcoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  S->energy = energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     satrt of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of LMS_NORM group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c
deleted file mode 100644
index e3793816..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_f32.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_f32.c    
-*    
-* Description:  Floating-point NLMS filter initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for floating-point normalized LMS filter.    
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @return none.    
-   *    
- * \par Description:    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to arm_lms_norm_f32().    
- */
-
-void arm_lms_norm_init_f32(
-  arm_lms_norm_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialise Energy to zero */
-  S->energy = 0.0f;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0.0f;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c
deleted file mode 100644
index 78d7170e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q15.c
+++ /dev/null
@@ -1,112 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_q15.c    
-*    
-* Description:  Q15 NLMS initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q15 normalized LMS filter.    
-   * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to the array of state variables and size of array is    
- * numTaps+blockSize-1 samples, where blockSize is the number of input samples processed    
- * by each call to arm_lms_norm_q15().    
- */
-
-void arm_lms_norm_init_q15(
-  arm_lms_norm_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint8_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q15_t));
-
-  /* Assign post Shift value applied to coefficients */
-  S->postShift = postShift;
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialize reciprocal pointer table */
-  S->recipTable = (q15_t *) armRecipTableQ15;
-
-  /* Initialise Energy to zero */
-  S->energy = 0;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c
deleted file mode 100644
index aea43ce2..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_init_q31.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/*-----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_lms_norm_init_q31.c    
-*    
-* Description:  Q31 NLMS initialization function.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------*/
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-  /**    
-   * @brief Initialization function for Q31 normalized LMS filter.    
-   * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.    
-   * @param[in] numTaps  number of filter coefficients.    
-   * @param[in] *pCoeffs points to coefficient buffer.    
-   * @param[in] *pState points to state buffer.    
-   * @param[in] mu step size that controls filter coefficient updates.    
-   * @param[in] blockSize number of samples to process.    
-   * @param[in] postShift bit shift applied to coefficients.    
-   * @return none.    
- *    
- * Description:    
- * \par    
- * pCoeffs points to the array of filter coefficients stored in time reversed order:    
- * 
    
- *    {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}    
- * 
    
- * The initial filter coefficients serve as a starting point for the adaptive filter.    
- * pState points to an array of length numTaps+blockSize-1 samples,    
- * where blockSize is the number of input samples processed by each call to arm_lms_norm_q31().    
- */
-
-void arm_lms_norm_init_q31(
-  arm_lms_norm_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint8_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1  */
-  memset(pState, 0, (numTaps + (blockSize - 1u)) * sizeof(q31_t));
-
-  /* Assign post Shift value applied to coefficients */
-  S->postShift = postShift;
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialize reciprocal pointer table */
-  S->recipTable = (q31_t *) armRecipTableQ31;
-
-  /* Initialise Energy to zero */
-  S->energy = 0;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0;
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c
deleted file mode 100644
index 007db31e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q15.c
+++ /dev/null
@@ -1,440 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_q15.c    
-*    
-* Description:	Q15 NLMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-/**    
-* @brief Processing function for Q15 normalized LMS filter.    
-* @param[in] *S points to an instance of the Q15 normalized LMS filter structure.    
-* @param[in] *pSrc points to the block of input data.    
-* @param[in] *pRef points to the block of reference data.    
-* @param[out] *pOut points to the block of output data.    
-* @param[out] *pErr points to the block of error data.    
-* @param[in] blockSize number of samples to process.    
-* @return none.    
-*    
-* Scaling and Overflow Behavior:     
-* \par     
-* The function is implemented using a 64-bit internal accumulator.     
-* Both coefficients and state variables are represented in 1.15 format and    
-* multiplications yield a 2.30 result. The 2.30 intermediate results are    
-* accumulated in a 64-bit accumulator in 34.30 format.     
-* There is no risk of internal overflow with this approach and the full    
-* precision of intermediate multiplications is preserved. After all additions    
-* have been performed, the accumulator is truncated to 34.15 format by    
-* discarding low 15 bits. Lastly, the accumulator is saturated to yield a    
-* result in 1.15 format.    
-*    
-* \par   
-* 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
-*    
- */
-
-void arm_lms_norm_q15(
-  arm_lms_norm_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-  q15_t mu = S->mu;                              /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q31_t energy;                                  /* Energy of the input */
-  q63_t acc;                                     /* Accumulator */
-  q15_t e = 0, d = 0;                            /* error, reference data sample */
-  q15_t w = 0, in;                               /* weight factor and state */
-  q15_t x0;                                      /* temporary variable to hold input sample */
-  //uint32_t shift = (uint32_t) S->postShift + 1u; /* Shift to be applied to the output */ 
-  q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-  q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-  q31_t coef;                                    /* Teporary variable for coefficient */
-  q31_t acc_l, acc_h;
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-  int32_t uShift = (32 - lShift);
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= (((q31_t) x0 * (x0)) >> 15);
-    energy += (((q31_t) in * (in)) >> 15);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-
-      /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-      acc += (((q31_t) * px++ * (*pb++)));
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (((q31_t) * px++ * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16u);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q15_t) acc;
-    *pErr++ = e;
-
-    /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
-                              &oneByEnergy, S->recipTable);
-
-    /* Calculation of e * mu value */
-    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
-    /* Calculation of (e * mu) * (1/energy) value */
-    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
-    /* Weighting factor for the normalized version */
-    w = (q15_t) __SSAT((q31_t) acc, 16);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q15_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-
-#else
-
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-#endif
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= (((q31_t) x0 * (x0)) >> 15);
-    energy += (((q31_t) in * (in)) >> 15);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (((q31_t) * px++ * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16u);
-
-    /* Converting the result to 1.15 format */
-    //acc = __SSAT((acc >> (16u - shift)), 16u); 
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q15_t) acc;
-    *pErr++ = e;
-
-    /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15,
-                              &oneByEnergy, S->recipTable);
-
-    /* Calculation of e * mu value */
-    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
-    /* Calculation of (e * mu) * (1/energy) value */
-    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
-    /* Weighting factor for the normalized version */
-    w = (q15_t) __SSAT((q31_t) acc, 16);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q15_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     satrt of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy (numTaps - 1u) data */
-  tapCnt = (numTaps - 1u);
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-
-/**    
-   * @} end of LMS_NORM group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c
deleted file mode 100644
index 20701faa..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_norm_q31.c
+++ /dev/null
@@ -1,431 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_norm_q31.c    
-*    
-* Description:	Processing function for the Q31 NLMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS_NORM    
- * @{    
- */
-
-/**    
-* @brief Processing function for Q31 normalized LMS filter.    
-* @param[in] *S points to an instance of the Q31 normalized LMS filter structure.    
-* @param[in] *pSrc points to the block of input data.    
-* @param[in] *pRef points to the block of reference data.    
-* @param[out] *pOut points to the block of output data.    
-* @param[out] *pErr points to the block of error data.    
-* @param[in] blockSize number of samples to process.    
-* @return none.    
-*    
-* Scaling and Overflow Behavior:     
-* \par     
-* The function is implemented using an internal 64-bit accumulator.     
-* The accumulator has a 2.62 format and maintains full precision of the intermediate   
-* multiplication results but provides only a single guard bit.     
-* Thus, if the accumulator result overflows it wraps around rather than clip.     
-* In order to avoid overflows completely the input signal must be scaled down by    
-* log2(numTaps) bits. The reference signal should not be scaled down.     
-* After all multiply-accumulates are performed, the 2.62 accumulator is shifted    
-* and saturated to 1.31 format to yield the final result.     
-* The output signal and error signal are in 1.31 format.     
-*    
-* \par    
-* 	In this filter, filter coefficients are updated for each sample and the    
-* updation of filter cofficients are saturted.    
-*     
-*/
-
-void arm_lms_norm_q31(
-  arm_lms_norm_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-  q31_t mu = S->mu;                              /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t energy;                                  /* Energy of the input */
-  q63_t acc;                                     /* Accumulator */
-  q31_t e = 0, d = 0;                            /* error, reference data sample */
-  q31_t w = 0, in;                               /* weight factor and state */
-  q31_t x0;                                      /* temporary variable to hold input sample */
-//  uint32_t shift = 32u - ((uint32_t) S->postShift + 1u);        /* Shift to be applied to the output */      
-  q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-  q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-  q31_t coef;                                    /* Temporary variable for coef */
-  q31_t acc_l, acc_h;                            /*  temporary input */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy = (q31_t) ((((q63_t) energy << 32) -
-                       (((q63_t) x0 * x0) << 1)) >> 32);
-    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Calculates the reciprocal of energy */
-    postShift = arm_recip_q31(energy + DELTA_Q31,
-                              &oneByEnergy, &S->recipTable[0]);
-
-    /* Calculation of product of (e * mu) */
-    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Weighting factor for the normalized version */
-    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q31_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy =
-      (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
-    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-
-    //acc = (q31_t) (acc >> shift); 
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Calculates the reciprocal of energy */
-    postShift =
-      arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
-
-    /* Calculation of product of (e * mu) */
-    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Weighting factor for the normalized version */
-    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q31_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the     
-     start of the state buffer. This prepares the state buffer for the        
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of LMS_NORM group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c
deleted file mode 100644
index 2f1b9913..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q15.c
+++ /dev/null
@@ -1,380 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_q15.c    
-*    
-* Description:	Processing function for the Q15 LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
- /**    
- * @brief Processing function for Q15 LMS filter.    
- * @param[in] *S points to an instance of the Q15 LMS filter structure.    
- * @param[in] *pSrc points to the block of input data.    
- * @param[in] *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in] blockSize number of samples to process.    
- * @return none.    
- *    
- * \par Scaling and Overflow Behavior:    
- * The function is implemented using a 64-bit internal accumulator.    
- * Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.    
- * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.    
- * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.    
- * Lastly, the accumulator is saturated to yield a result in 1.15 format.    
- *   
- * \par   
- * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.   
- *    
- */
-
-void arm_lms_q15(
-  const arm_lms_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize)
-{
-  q15_t *pState = S->pState;                     /* State pointer */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q15_t mu = S->mu;                              /* Adaptive factor */
-  q15_t *px;                                     /* Temporary pointer for state */
-  q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t acc;                                     /* Accumulator */
-  q15_t e = 0;                                   /* error of data sample */
-  q15_t alpha;                                   /* Intermediate constant for taps update */
-  q31_t coef;                                    /* Teporary variable for coefficient */
-  q31_t acc_l, acc_h;
-  int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-  int32_t uShift = (32 - lShift);
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initializing blkCnt with blockSize */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2u;
-
-    while(tapCnt > 0u)
-    {
-      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      /* Perform the multiply-accumulate */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-      acc = __SMLALD(*__SIMD32(px)++, (*__SIMD32(pb)++), acc);
-
-#else
-
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q15_t) acc;
-
-    *pErr++ = (q15_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
-    /* Initialize state pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2u;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Calculation of count for copying integer writes */
-  tapCnt = (numTaps - 1u) >> 2;
-
-  while(tapCnt > 0u)
-  {
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-    *__SIMD32(pStateCurnt)++ = *__SIMD32(pState)++;
-#else
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-#endif
-
-    tapCnt--;
-
-  }
-
-  /* Calculation of count for remaining q15_t data */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) ((q31_t) (*px++) * (*pb++));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q15_t) acc;
-
-    *pErr++ = (q15_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) * pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the        
-     start of the state buffer. This prepares the state buffer for the   
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c b/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c
deleted file mode 100644
index 838e912e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/FilteringFunctions/arm_lms_q31.c
+++ /dev/null
@@ -1,369 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_lms_q31.c    
-*    
-* Description:	Processing function for the Q31 LMS filter.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-/**    
- * @ingroup groupFilters    
- */
-
-/**    
- * @addtogroup LMS    
- * @{    
- */
-
- /**    
- * @brief Processing function for Q31 LMS filter.    
- * @param[in]  *S points to an instance of the Q15 LMS filter structure.    
- * @param[in]  *pSrc points to the block of input data.    
- * @param[in]  *pRef points to the block of reference data.    
- * @param[out] *pOut points to the block of output data.    
- * @param[out] *pErr points to the block of error data.    
- * @param[in]  blockSize number of samples to process.    
- * @return     none.    
- *    
- * \par Scaling and Overflow Behavior:     
- * The function is implemented using an internal 64-bit accumulator.     
- * The accumulator has a 2.62 format and maintains full precision of the intermediate    
- * multiplication results but provides only a single guard bit.     
- * Thus, if the accumulator result overflows it wraps around rather than clips.     
- * In order to avoid overflows completely the input signal must be scaled down by    
- * log2(numTaps) bits.     
- * The reference signal should not be scaled down.     
- * After all multiply-accumulates are performed, the 2.62 accumulator is shifted    
- * and saturated to 1.31 format to yield the final result.     
- * The output signal and error signal are in 1.31 format.     
- *    
- * \par    
- * 	In this filter, filter coefficients are updated for each sample and the updation of filter cofficients are saturted.    
- */
-
-void arm_lms_q31(
-  const arm_lms_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize)
-{
-  q31_t *pState = S->pState;                     /* State pointer */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-  q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-  q31_t mu = S->mu;                              /* Adaptive factor */
-  q31_t *px;                                     /* Temporary pointer for state */
-  q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  q63_t acc;                                     /* Accumulator */
-  q31_t e = 0;                                   /* error of data sample */
-  q31_t alpha;                                   /* Intermediate constant for taps update */
-  q31_t coef;                                    /* Temporary variable for coef */
-  q31_t acc_l, acc_h;                            /*  temporary input */
-  uint32_t uShift = ((uint32_t) S->postShift + 1u);
-  uint32_t lShift = 32u - uShift;                /*  Shift to be applied to the output */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1u)]);
-
-  /* Initializing blkCnt with blockSize */
-  blkCnt = blockSize;
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      /* acc +=  b[N] * x[n-N] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-1] * x[n-N-1] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-2] * x[n-N-2] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-3] * x[n-N-3] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-
-    *pErr++ = (q31_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Initialize state pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling.  Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while(tapCnt > 0u)
-    {
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4u;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the    
-     satrt of the state buffer. This prepares the state buffer for the    
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Loop unrolling for (numTaps - 1u) samples copy */
-  tapCnt = (numTaps - 1u) >> 2u;
-
-  /* copy data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1u) % 0x4u;
-
-  /* Copy the remaining q31_t data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  while(blkCnt > 0u)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Store the result from accumulator into the destination buffer. */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-
-    *pErr++ = (q31_t) e;
-
-    /* Weighting factor for the LMS version */
-    alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize pCoeffs pointer */
-    pb = pCoeffs;
-
-    /* Loop over numTaps number of values */
-    tapCnt = numTaps;
-
-    while(tapCnt > 0u)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1u));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the     
-     start of the state buffer. This prepares the state buffer for the   
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /*  Copy (numTaps - 1u) samples  */
-  tapCnt = (numTaps - 1u);
-
-  /* Copy the data */
-  while(tapCnt > 0u)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-#endif /*   #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of LMS group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c
deleted file mode 100644
index e4184925..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_f32.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_add_f32.c    
-*    
-* Description:	Floating-point matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixAdd Matrix Addition        
- *        
- * Adds two matrices.        
- * \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"        
- *        
- * The functions check to make sure that        
- * pSrcA, pSrcB, and pDst have the same        
- * number of rows and columns.        
- */
-
-/**        
- * @addtogroup MatrixAdd        
- * @{        
- */
-
-
-/**        
- * @brief Floating-point matrix addition.        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- */
-
-arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Loop unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* out = sourceA + sourceB */
-      out1 = inA1 + inB1;
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* out = sourceA + sourceB */
-      out2 = inA2 + inB2;
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* out = sourceA + sourceB */
-      out1 = inA1 + inB1;
-
-      /* out = sourceA + sourceB */
-      out2 = inA2 + inB2;
-
-      /* Store result in destination */
-      pOut[2] = out1;
-
-      /* Store result in destination */
-      pOut[3] = out2;
-
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add and then store the results in the destination buffer. */
-      *pOut++ = (*pIn1++) + (*pIn2++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixAdd group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c
deleted file mode 100644
index 45d18372..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q15.c
+++ /dev/null
@@ -1,163 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_add_q15.c    
-*    
-* Description:	Q15 matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixAdd    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix addition.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-arm_status arm_mat_add_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint16_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix addition  */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop unrolling */
-    blkCnt = (uint32_t) numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-      *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = (uint32_t) numSamples % 0x4u;
-
-    /* q15 pointers of input and output are initialized */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = (uint32_t) numSamples;
-
-
-    /* q15 pointers of input and output are initialized */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, Saturate and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixAdd group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c
deleted file mode 100644
index b6ccddbb..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_add_q31.c
+++ /dev/null
@@ -1,207 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_add_q31.c    
-*    
-* Description:	Q31 matrix addition    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**      
- * @ingroup groupMatrix      
- */
-
-/**      
- * @addtogroup MatrixAdd      
- * @{      
- */
-
-/**      
- * @brief Q31 matrix addition.      
- * @param[in]       *pSrcA points to the first input matrix structure      
- * @param[in]       *pSrcB points to the second input matrix structure      
- * @param[out]      *pDst points to output matrix structure      
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.      
- *      
- * Scaling and Overflow Behavior:      
- * \par      
- * The function uses saturating arithmetic.      
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.      
- */
-
-arm_status arm_mat_add_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t inA1, inB1;                              /* temporary variables */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t inA2, inB2;                              /* temporary variables */
-  q31_t out1, out2;                              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, saturate and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* Add and saturate */
-      out1 = __QADD(inA1, inB1);
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* Add and saturate */
-      out2 = __QADD(inA2, inB2);
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* Add and saturate */
-      out1 = __QADD(inA1, inB1);
-      out2 = __QADD(inA2, inB2);
-
-      /* Store result in destination */
-      pOut[2] = out1;
-      pOut[3] = out2;
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.      
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add, saturate and then store the results in the destination buffer. */
-      inA1 = *pIn1++;
-      inB1 = *pIn2++;
-
-      inA1 = __QADD(inA1, inB1);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-
-      *pOut++ = inA1;
-
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**      
- * @} end of MatrixAdd group      
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
deleted file mode 100644
index d9d3388e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
+++ /dev/null
@@ -1,283 +0,0 @@
-/* ----------------------------------------------------------------------      
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved. 
-*      
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*      
-* Project:      CMSIS DSP Library 
-* Title:	    arm_mat_cmplx_mult_f32.c      
-*      
-* Description:  Floating-point matrix multiplication.      
-*      
-* Target Processor:          Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**      
- * @ingroup groupMatrix      
- */
-
-/**      
- * @defgroup CmplxMatrixMult  Complex Matrix Multiplication     
- *     
- * Complex Matrix multiplication is only defined if the number of columns of the      
- * first matrix equals the number of rows of the second matrix.      
- * Multiplying an M x N matrix with an N x P matrix results      
- * in an M x P matrix.      
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of      
- * pSrcA and pSrcB are equal; and (2) that the size of the output      
- * matrix equals the outer dimensions of pSrcA and pSrcB.      
- */
-
-
-/**      
- * @addtogroup CmplxMatrixMult      
- * @{      
- */
-
-/**      
- * @brief Floating-point Complex matrix multiplication.      
- * @param[in]       *pSrcA points to the first input complex matrix structure      
- * @param[in]       *pSrcB points to the second input complex matrix structure      
- * @param[out]      *pDst points to output complex matrix structure      
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.      
- */
-
-arm_status arm_mat_cmplx_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  float32_t sumReal1, sumImag1;                  /* accumulator */
-  float32_t a0, b0, c0, d0;
-  float32_t a1, b1, c1, d1;
-  float32_t sumReal2, sumImag2;                  /* accumulator */
-
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + 2 * i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set      
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal1 = 0.0f;
-        sumImag1 = 0.0f;
-
-        sumReal2 = 0.0f;
-        sumImag2 = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* matrix multiplication        */
-        while(colCnt > 0u)
-        {
-
-          /* Reading real part of complex matrix A */
-          a0 = *pIn1;
-
-          /* Reading real part of complex matrix B */
-          c0 = *pIn2;
-
-          /* Reading imaginary part of complex matrix A */
-          b0 = *(pIn1 + 1u);
-
-          /* Reading imaginary part of complex matrix B */
-          d0 = *(pIn2 + 1u);
-
-          sumReal1 += a0 * c0;
-          sumImag1 += b0 * c0;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b0 * d0;
-          sumImag2 += a0 * d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          a0 = *pIn1;
-          c0 = *pIn2;
-
-          b0 = *(pIn1 + 1u);
-          d0 = *(pIn2 + 1u);
-
-          sumReal1 += a0 * c0;
-          sumImag1 += b0 * c0;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b0 * d0;
-          sumImag2 += a0 * d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.      
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        sumReal1 += sumReal2;
-        sumImag1 += sumImag2;
-
-        /* Store the result in the destination buffer */
-        *px++ = sumReal1;
-        *px++ = sumImag1;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + 2u * j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + 2 * numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**      
- * @} end of MatrixMult group      
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
deleted file mode 100644
index 46122abe..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
+++ /dev/null
@@ -1,424 +0,0 @@
-/* ----------------------------------------------------------------------      
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved. 
-*      
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*      
-* Project:      CMSIS DSP Library 
-* Title:	    arm_cmplx_mat_mult_q15.c      
-*      
-* Description:	 Q15 complex matrix multiplication.      
-*      
-* Target Processor:          Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**      
- * @ingroup groupMatrix      
- */
-
-/**      
- * @addtogroup CmplxMatrixMult      
- * @{      
- */
-
-
-/**      
- * @brief Q15 Complex matrix multiplication      
- * @param[in]       *pSrcA points to the first input complex matrix structure      
- * @param[in]       *pSrcB points to the second input complex matrix structure      
- * @param[out]      *pDst points to output complex matrix structure      
- * @param[in]		*pScratch points to the array for storing intermediate results     
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.         
- *  
- * \par Conditions for optimum performance  
- *  Input, output and state buffers should be aligned by 32-bit  
- *  
- * \par Restrictions  
- *  If the silicon does not support unaligned memory access enable the macro UNALIGNED_SUPPORT_DISABLE  
- *	In this case input, output, scratch buffers should be aligned by 32-bit  
- *  
- * @details      
- * Scaling and Overflow Behavior:      
- *      
- * \par      
- * The function is implemented using a 64-bit internal accumulator. The inputs to the      
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.      
- * The 2.30 intermediate      
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach      
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then      
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to      
- * 1.15 format.      
- *      
- * \par      
- * Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function.      
- *      
- */
-
-
-
-
-arm_status arm_mat_cmplx_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pScratch)
-{
-  /* accumulator */
-  q15_t *pSrcBT = pScratch;                      /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q63_t sumReal, sumImag;
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t a, b, c, d;
-#else
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t prod1, prod2;
-  q31_t pSourceA, pSourceB;
-#endif
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.      
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifdef UNALIGNED_SUPPORT_DISABLE
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.      
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read two elements from the row */
-        in = *pInB++;
-        *px = in;
-        in = *pInB++;
-        px[1] = in;
-#else
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.      
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        *__SIMD32(px) = in;
-#endif
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i = i + 2u;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Reset the variables for the usage in the following multiplication process */
-    row = numRowsA;
-    i = 0u;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set      
-       ** to the starting address of the transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal = 0;
-        sumImag = 0;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 1;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pInA = pSrcA->pData + i * 2;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-          /* read real and imag values from pSrcA buffer */
-          a = *pInA;
-          b = *(pInA + 1u);
-          /* read real and imag values from pSrcB buffer */
-          c = *pInB;
-          d = *(pInB + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
-
-          /* read next real and imag values from pSrcA buffer */
-          a = *(pInA + 2u);
-          b = *(pInA + 3u);
-          /* read next real and imag values from pSrcB buffer */
-          c = *(pInB + 2u);
-          d = *(pInB + 3u);
-
-          /* update pointer */
-          pInA += 4u;
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
-          /* update pointer */
-          pInB += 4u;
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-#endif /*      #ifdef UNALIGNED_SUPPORT_DISABLE */
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* process odd column samples */
-        if((numColsA & 0x1u) > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-#ifdef UNALIGNED_SUPPORT_DISABLE
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          a = *pInA++;
-          b = *pInA++;
-          c = *pInB++;
-          d = *pInB++;
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
-
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = *__SIMD32(pInA)++;
-          pSourceB = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-#endif /*      #ifdef UNALIGNED_SUPPORT_DISABLE */
-
-        }
-
-        /* Saturate and store the result in the destination buffer */
-
-        *px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
-        *px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      i = i + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**      
- * @} end of MatrixMult group      
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
deleted file mode 100644
index 40535544..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
+++ /dev/null
@@ -1,293 +0,0 @@
-/* ----------------------------------------------------------------------      
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved. 
-*      
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*      
-* Project:      CMSIS DSP Library 
-* Title:	    arm_mat_cmplx_mult_q31.c      
-*      
-* Description:  Floating-point matrix multiplication.      
-*      
-* Target Processor:          Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-#include "arm_math.h"
-
-/**     
- * @ingroup groupMatrix     
- */
-
-/**      
- * @addtogroup CmplxMatrixMult      
- * @{      
- */
-
-/**      
- * @brief Q31 Complex matrix multiplication      
- * @param[in]       *pSrcA points to the first input complex matrix structure      
- * @param[in]       *pSrcB points to the second input complex matrix structure      
- * @param[out]      *pDst points to output complex matrix structure      
- * @return     		The function returns either      
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.      
- *      
- * @details      
- * Scaling and Overflow Behavior:      
- *      
- * \par      
- * The function is implemented using an internal 64-bit accumulator.      
- * The accumulator has a 2.62 format and maintains full precision of the intermediate      
- * multiplication results but provides only a single guard bit. There is no saturation      
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and      
- * distorts the result. The input signals should be scaled down to avoid intermediate      
- * overflows. The input is thus scaled down by log2(numColsA) bits      
- * to avoid overflows, as a total of numColsA additions are performed internally.      
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.      
- *      
- *      
- */
-
-arm_status arm_mat_cmplx_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A  */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  q63_t sumReal1, sumImag1;                      /* accumulator */
-  q31_t a0, b0, c0, d0;
-  q31_t a1, b1, c1, d1;
-
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + 2 * i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set     
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal1 = 0.0;
-        sumImag1 = 0.0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* matrix multiplication        */
-        while(colCnt > 0u)
-        {
-
-          /* Reading real part of complex matrix A */
-          a0 = *pIn1;
-
-          /* Reading real part of complex matrix B */
-          c0 = *pIn2;
-
-          /* Reading imaginary part of complex matrix A */
-          b0 = *(pIn1 + 1u);
-
-          /* Reading imaginary part of complex matrix B */
-          d0 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a0 *c0;
-          sumImag1 += (q63_t) b0 *c0;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b0 *d0;
-          sumImag1 += (q63_t) a0 *d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          a1 = *pIn1;
-          c1 = *pIn2;
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
-
-          a0 = *pIn1;
-          c0 = *pIn2;
-
-          b0 = *(pIn1 + 1u);
-          d0 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a0 *c0;
-          sumImag1 += (q63_t) b0 *c0;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b0 *d0;
-          sumImag1 += (q63_t) a0 *d0;
-
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.     
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1u);
-          d1 = *(pIn2 + 1u);
-
-          /* Multiply and Accumlates */
-          sumReal1 += (q63_t) a1 *c1;
-          sumImag1 += (q63_t) b1 *c1;
-
-          /* update pointers */
-          pIn1 += 2u;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal1 -= (q63_t) b1 *d1;
-          sumImag1 += (q63_t) a1 *d1;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = (q31_t) clip_q63_to_q31(sumReal1 >> 31);
-        *px++ = (q31_t) clip_q63_to_q31(sumImag1 >> 31);
-        
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + 2u * j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + 2 * numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**     
- * @} end of MatrixMult group     
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c
deleted file mode 100644
index 2a670b30..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_f32.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_f32.c    
-*    
-* Description:	Floating-point matrix initialization.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInit Matrix Initialization    
- *    
- * Initializes the underlying matrix data structure.    
- * The functions set the numRows,    
- * numCols, and pData fields    
- * of the matrix data structure.    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-/**    
-   * @brief  Floating-point matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_f32(
-  arm_matrix_instance_f32 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  float32_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c
deleted file mode 100644
index 84f4ccbe..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q15.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_q15.c    
-*    
-* Description:	Q15 matrix initialization.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-  /**    
-   * @brief  Q15 matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_q15(
-  arm_matrix_instance_q15 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q15_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c
deleted file mode 100644
index 3fefda4e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_init_q31.c
+++ /dev/null
@@ -1,84 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_init_q31.c    
-*    
-* Description:	Q31 matrix initialization.    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInit Matrix Initialization    
- *    
- */
-
-/**    
- * @addtogroup MatrixInit    
- * @{    
- */
-
-  /**    
-   * @brief  Q31 matrix initialization.    
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.    
-   * @param[in]     nRows          number of rows in the matrix.    
-   * @param[in]     nColumns       number of columns in the matrix.    
-   * @param[in]     *pData	   points to the matrix data array.    
-   * @return        none    
-   */
-
-void arm_mat_init_q31(
-  arm_matrix_instance_q31 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q31_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**    
- * @} end of MatrixInit group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c
deleted file mode 100644
index f6fb9dab..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f32.c
+++ /dev/null
@@ -1,703 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_inverse_f32.c    
-*    
-* Description:	Floating-point matrix inverse.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInv Matrix Inverse    
- *    
- * Computes the inverse of a matrix.    
- *    
- * The inverse is defined only if the input matrix is square and non-singular (the determinant    
- * is non-zero). The function checks that the input and output matrices are square and of the    
- * same size.    
- *    
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix    
- * inversion of floating-point matrices.    
- *    
- * \par Algorithm    
- * The Gauss-Jordan method is used to find the inverse.    
- * The algorithm performs a sequence of elementary row-operations until it    
- * reduces the input matrix to an identity matrix. Applying the same sequence    
- * of elementary row-operations to an identity matrix yields the inverse matrix.    
- * If the input matrix is singular, then the algorithm terminates and returns error status    
- * ARM_MATH_SINGULAR.    
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"    
- */
-
-/**    
- * @addtogroup MatrixInv    
- * @{    
- */
-
-/**    
- * @brief Floating-point matrix inverse.    
- * @param[in]       *pSrc points to input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns    
- * ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size    
- * of the output matrix does not match the size of the input matrix.    
- * If the input matrix is found to be singular (non-invertible), then the function returns    
- * ARM_MATH_SINGULAR.  Otherwise, the function returns ARM_MATH_SUCCESS.    
- */
-
-arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
-  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
-  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
-  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
-  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  float32_t maxC;                                /* maximum value in the column */
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------    
-	 * Matrix Inverse can be solved using elementary row operations.    
-	 *    
-	 *	Gauss-Jordan Method:    
-	 *    
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an    
-	 *        augmented matrix as follows:    
-	 *				        _ 	      	       _         _	       _    
-	 *					   |  a11  a12 | 1   0  |       |  X11 X12  |    
-	 *					   |           |        |   =   |           |    
-	 *					   |_ a21  a22 | 0   1 _|       |_ X21 X21 _|    
-	 *    
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *    
-	 *		3. Begin with the first row. Let i = 1.    
-	 *    
-	 *	    4. Check to see if the pivot for column i is the greatest of the column.    
-	 *		   The pivot is the element of the main diagonal that is on the current row.    
-	 *		   For instance, if working with row i, then the pivot element is aii.    
-	 *		   If the pivot is not the most significant of the columns, exchange that row with a row
-	 *		   below it that does contain the most significant value in column i. If the most
-	 *         significant value of the column is zero, then an inverse to that matrix does not exist.
-	 *		   The most significant value of the column is the absolute maximum.
-	 *    
-	 *	    5. Divide every element of row i by the pivot.    
-	 *    
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and    
-	 *		   a multiple of row i so that each new element in column i below row i is zero.    
-	 *    
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros    
-	 *		   for every element below and above the main diagonal.    
-	 *    
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).    
-	 *		   Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).    
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.    
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.    
-       * If there is no non zero element to replace in the rows below,    
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points    
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points    
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Grab the most significant value from column l */
-      maxC = 0;
-      for (i = l; i < numRows; i++)
-      {
-        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
-        pInT1 += numCols;
-      }
-
-      /* Update the status if the matrix is singular */
-      if(maxC == 0.0f)
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Restore pInT1  */
-      pInT1 = pIn;
-
-      /* Destination pointer modifier */
-      k = 1u;
-      
-      /* Check if the pivot element is the most significant of the column */
-      if( (in > 0.0f ? in : -in) != maxC)
-      {
-        /* Loop over the number rows present below */
-        i = numRows - (l + 1u);
-
-        while(i > 0u)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Look for the most significant element to    
-           * replace in the rows below */
-          if((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
-          {
-            /* Loop over number of columns    
-             * to the right of the pilot element */
-            j = numCols - l;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Loop over number of columns of the destination matrix */
-            j = numCols;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the destination matrix */
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-
-          /* Decrement the loop counter */
-          i--;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *pPivotRowIn;
-
-      /* Loop over number of columns    
-       * to the right of the pilot element */
-      j = (numCols - l);
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the input matrix    
-         * by the pivot element */
-        in1 = *pInT1;
-        *pInT1++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Loop over number of columns of the destination matrix */
-      j = numCols;
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the destination matrix    
-         * by the pivot element */
-        in1 = *pInT2;
-        *pInT2++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i    
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      /* index used to check for pivot element */
-      i = 0u;
-
-      /* Loop over number of rows */
-      /*  to be replaced by the sum of that row and a multiple of row i */
-      k = numRows;
-
-      while(k > 0u)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,    
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,    
-             to replace the elements in the input matrix */
-          j = (numCols - l);
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT1;
-            *pInT1++ = in1 - (in * *pPRT_in++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-          /* Loop over the number of columns to    
-             replace the elements in the destination matrix */
-          j = numCols;
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT2;
-            *pInT2++ = in1 - (in * *pPRT_pDst++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-        }
-
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-
-        /* Decrement the loop counter */
-        k--;
-
-        /* Increment the pivot index */
-        i++;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------       
-	 * Matrix Inverse can be solved using elementary row operations.        
-	 *        
-	 *	Gauss-Jordan Method:       
-	 *	 	       
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an        
-	 *        augmented matrix as follows:        
-	 *				        _  _	      _	    _	   _   _         _	       _       
-	 *					   |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |         
-	 *					   |  |            | | |        |   |   =   |           |        
-	 *					   |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|       
-	 *					          
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *       
-	 *		3. Begin with the first row. Let i = 1.       
-	 *       
-	 *	    4. Check to see if the pivot for row i is zero.       
-	 *		   The pivot is the element of the main diagonal that is on the current row.       
-	 *		   For instance, if working with row i, then the pivot element is aii.       
-	 *		   If the pivot is zero, exchange that row with a row below it that does not        
-	 *		   contain a zero in column i. If this is not possible, then an inverse        
-	 *		   to that matrix does not exist.       
-	 *	       
-	 *	    5. Divide every element of row i by the pivot.       
-	 *	       
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and        
-	 *		   a multiple of row i so that each new element in column i below row i is zero.       
-	 *	       
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros       
-	 *		   for every element below and above the main diagonal.        
-	 *		   		          
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, src).       
-	 *		   Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).         
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.     
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-    //for(loopCnt = 0u; loopCnt < numCols; loopCnt++)   
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.   
-       * If there is no non zero element to replace in the rows below,   
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points     
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points     
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Destination pointer modifier */
-      k = 1u;
-
-      /* Check if the pivot element is zero */
-      if(*pInT1 == 0.0f)
-      {
-        /* Loop over the number rows present below */
-        for (i = (l + 1u); i < numRows; i++)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Check if there is a non zero pivot element to     
-           * replace in the rows below */
-          if(*pInT2 != 0.0f)
-          {
-            /* Loop over number of columns     
-             * to the right of the pilot element */
-            for (j = 0u; j < (numCols - l); j++)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-            }
-
-            for (j = 0u; j < numCols; j++)
-            {
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pOutT1 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
-
-      /* Loop over number of columns     
-       * to the right of the pilot element */
-      for (j = 0u; j < (numCols - l); j++)
-      {
-        /* Divide each element of the row of the input matrix     
-         * by the pivot element */
-        *pInT1 = *pInT1 / in;
-        pInT1++;
-      }
-      for (j = 0u; j < numCols; j++)
-      {
-        /* Divide each element of the row of the destination matrix     
-         * by the pivot element */
-        *pOutT1 = *pOutT1 / in;
-        pOutT1++;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i     
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pOutT1 = pOut;
-
-      for (i = 0u; i < numRows; i++)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,     
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-          pOutT1 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,     
-             to replace the elements in the input matrix */
-          for (j = 0u; j < (numCols - l); j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pInT1 = *pInT1 - (in * *pPRT_in++);
-            pInT1++;
-          }
-          /* Loop over the number of columns to     
-             replace the elements in the destination matrix */
-          for (j = 0u; j < numCols; j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
-            pOutT1++;
-          }
-
-        }
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-      }
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-    if((flag != 1u) && (in == 0.0f))
-    {
-      pIn = pSrc->pData;
-      for (i = 0; i < numRows * numCols; i++)
-      {
-        if (pIn[i] != 0.0f)
-            break;
-      }
-      
-      if (i == numRows * numCols)
-        status = ARM_MATH_SINGULAR;
-    }
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixInv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f64.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f64.c
deleted file mode 100644
index 5fe42d4f..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_inverse_f64.c
+++ /dev/null
@@ -1,703 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_inverse_f64.c    
-*    
-* Description:	Floating-point matrix inverse.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixInv Matrix Inverse    
- *    
- * Computes the inverse of a matrix.    
- *    
- * The inverse is defined only if the input matrix is square and non-singular (the determinant    
- * is non-zero). The function checks that the input and output matrices are square and of the    
- * same size.    
- *    
- * Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix    
- * inversion of floating-point matrices.    
- *    
- * \par Algorithm    
- * The Gauss-Jordan method is used to find the inverse.    
- * The algorithm performs a sequence of elementary row-operations until it    
- * reduces the input matrix to an identity matrix. Applying the same sequence    
- * of elementary row-operations to an identity matrix yields the inverse matrix.    
- * If the input matrix is singular, then the algorithm terminates and returns error status    
- * ARM_MATH_SINGULAR.    
- * \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"    
- */
-
-/**    
- * @addtogroup MatrixInv    
- * @{    
- */
-
-/**    
- * @brief Floating-point matrix inverse.    
- * @param[in]       *pSrc points to input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns    
- * ARM_MATH_SIZE_MISMATCH if the input matrix is not square or if the size    
- * of the output matrix does not match the size of the input matrix.    
- * If the input matrix is found to be singular (non-invertible), then the function returns    
- * ARM_MATH_SINGULAR.  Otherwise, the function returns ARM_MATH_SUCCESS.    
- */
-
-arm_status arm_mat_inverse_f64(
-  const arm_matrix_instance_f64 * pSrc,
-  arm_matrix_instance_f64 * pDst)
-{
-  float64_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float64_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float64_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
-  float64_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
-  float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
-  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
-  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  float64_t maxC;                                /* maximum value in the column */
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float64_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------    
-	 * Matrix Inverse can be solved using elementary row operations.    
-	 *    
-	 *	Gauss-Jordan Method:    
-	 *    
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an    
-	 *        augmented matrix as follows:    
-	 *				        _ 	      	       _         _	       _    
-	 *					   |  a11  a12 | 1   0  |       |  X11 X12  |    
-	 *					   |           |        |   =   |           |    
-	 *					   |_ a21  a22 | 0   1 _|       |_ X21 X21 _|    
-	 *    
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *    
-	 *		3. Begin with the first row. Let i = 1.    
-	 *    
-	 *	    4. Check to see if the pivot for column i is the greatest of the column.    
-	 *		   The pivot is the element of the main diagonal that is on the current row.    
-	 *		   For instance, if working with row i, then the pivot element is aii.    
-	 *		   If the pivot is not the most significant of the columns, exchange that row with a row
-	 *		   below it that does contain the most significant value in column i. If the most
-	 *         significant value of the column is zero, then an inverse to that matrix does not exist.
-	 *		   The most significant value of the column is the absolute maximum.
-	 *    
-	 *	    5. Divide every element of row i by the pivot.    
-	 *    
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and    
-	 *		   a multiple of row i so that each new element in column i below row i is zero.    
-	 *    
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros    
-	 *		   for every element below and above the main diagonal.    
-	 *    
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).    
-	 *		   Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).    
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.    
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.    
-       * If there is no non zero element to replace in the rows below,    
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points    
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points    
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Grab the most significant value from column l */
-      maxC = 0;
-      for (i = l; i < numRows; i++)
-      {
-        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
-        pInT1 += numCols;
-      }
-
-      /* Update the status if the matrix is singular */
-      if(maxC == 0.0f)
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Restore pInT1  */
-      pInT1 = pIn;
-
-      /* Destination pointer modifier */
-      k = 1u;
-      
-      /* Check if the pivot element is the most significant of the column */
-      if( (in > 0.0f ? in : -in) != maxC)
-      {
-        /* Loop over the number rows present below */
-        i = numRows - (l + 1u);
-
-        while(i > 0u)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Look for the most significant element to    
-           * replace in the rows below */
-          if((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
-          {
-            /* Loop over number of columns    
-             * to the right of the pilot element */
-            j = numCols - l;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Loop over number of columns of the destination matrix */
-            j = numCols;
-
-            while(j > 0u)
-            {
-              /* Exchange the row elements of the destination matrix */
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-
-          /* Decrement the loop counter */
-          i--;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *pPivotRowIn;
-
-      /* Loop over number of columns    
-       * to the right of the pilot element */
-      j = (numCols - l);
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the input matrix    
-         * by the pivot element */
-        in1 = *pInT1;
-        *pInT1++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Loop over number of columns of the destination matrix */
-      j = numCols;
-
-      while(j > 0u)
-      {
-        /* Divide each element of the row of the destination matrix    
-         * by the pivot element */
-        in1 = *pInT2;
-        *pInT2++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i    
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      /* index used to check for pivot element */
-      i = 0u;
-
-      /* Loop over number of rows */
-      /*  to be replaced by the sum of that row and a multiple of row i */
-      k = numRows;
-
-      while(k > 0u)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,    
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,    
-             to replace the elements in the input matrix */
-          j = (numCols - l);
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT1;
-            *pInT1++ = in1 - (in * *pPRT_in++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-          /* Loop over the number of columns to    
-             replace the elements in the destination matrix */
-          j = numCols;
-
-          while(j > 0u)
-          {
-            /* Replace the element by the sum of that row    
-               and a multiple of the reference row  */
-            in1 = *pInT2;
-            *pInT2++ = in1 - (in * *pPRT_pDst++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-        }
-
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-
-        /* Decrement the loop counter */
-        k--;
-
-        /* Increment the pivot index */
-        i++;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float64_t Xchg, in = 0.0f;                     /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0u, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------       
-	 * Matrix Inverse can be solved using elementary row operations.        
-	 *        
-	 *	Gauss-Jordan Method:       
-	 *	 	       
-	 *	   1. First combine the identity matrix and the input matrix separated by a bar to form an        
-	 *        augmented matrix as follows:        
-	 *				        _  _	      _	    _	   _   _         _	       _       
-	 *					   |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |         
-	 *					   |  |            | | |        |   |   =   |           |        
-	 *					   |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|       
-	 *					          
-	 *		2. In our implementation, pDst Matrix is used as identity matrix.    
-	 *       
-	 *		3. Begin with the first row. Let i = 1.       
-	 *       
-	 *	    4. Check to see if the pivot for row i is zero.       
-	 *		   The pivot is the element of the main diagonal that is on the current row.       
-	 *		   For instance, if working with row i, then the pivot element is aii.       
-	 *		   If the pivot is zero, exchange that row with a row below it that does not        
-	 *		   contain a zero in column i. If this is not possible, then an inverse        
-	 *		   to that matrix does not exist.       
-	 *	       
-	 *	    5. Divide every element of row i by the pivot.       
-	 *	       
-	 *	    6. For every row below and  row i, replace that row with the sum of that row and        
-	 *		   a multiple of row i so that each new element in column i below row i is zero.       
-	 *	       
-	 *	    7. Move to the next row and column and repeat steps 2 through 5 until you have zeros       
-	 *		   for every element below and above the main diagonal.        
-	 *		   		          
-	 *		8. Now an identical matrix is formed to the left of the bar(input matrix, src).       
-	 *		   Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).         
-	 *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while(rowCnt > 0u)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1u;
-      while(j > 0u)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.     
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0u;
-    //for(loopCnt = 0u; loopCnt < numCols; loopCnt++)   
-    while(loopCnt > 0u)
-    {
-      /* Check if the pivot element is zero..    
-       * If it is zero then interchange the row with non zero row below.   
-       * If there is no non zero element to replace in the rows below,   
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points     
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points     
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Destination pointer modifier */
-      k = 1u;
-
-      /* Check if the pivot element is zero */
-      if(*pInT1 == 0.0f)
-      {
-        /* Loop over the number rows present below */
-        for (i = (l + 1u); i < numRows; i++)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Check if there is a non zero pivot element to     
-           * replace in the rows below */
-          if(*pInT2 != 0.0f)
-          {
-            /* Loop over number of columns     
-             * to the right of the pilot element */
-            for (j = 0u; j < (numCols - l); j++)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-            }
-
-            for (j = 0u; j < numCols; j++)
-            {
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1u;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if((flag != 1u) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pOutT1 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
-
-      /* Loop over number of columns     
-       * to the right of the pilot element */
-      for (j = 0u; j < (numCols - l); j++)
-      {
-        /* Divide each element of the row of the input matrix     
-         * by the pivot element */
-        *pInT1 = *pInT1 / in;
-        pInT1++;
-      }
-      for (j = 0u; j < numCols; j++)
-      {
-        /* Divide each element of the row of the destination matrix     
-         * by the pivot element */
-        *pOutT1 = *pOutT1 / in;
-        pOutT1++;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i     
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pOutT1 = pOut;
-
-      for (i = 0u; i < numRows; i++)
-      {
-        /* Check for the pivot element */
-        if(i == l)
-        {
-          /* If the processing element is the pivot element,     
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-          pOutT1 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,     
-             to replace the elements in the input matrix */
-          for (j = 0u; j < (numCols - l); j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pInT1 = *pInT1 - (in * *pPRT_in++);
-            pInT1++;
-          }
-          /* Loop over the number of columns to     
-             replace the elements in the destination matrix */
-          for (j = 0u; j < numCols; j++)
-          {
-            /* Replace the element by the sum of that row     
-               and a multiple of the reference row  */
-            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
-            pOutT1++;
-          }
-
-        }
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-      }
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-    if((flag != 1u) && (in == 0.0f))
-    {
-      pIn = pSrc->pData;
-      for (i = 0; i < numRows * numCols; i++)
-      {
-        if (pIn[i] != 0.0f)
-            break;
-      }
-      
-      if (i == numRows * numCols)
-        status = ARM_MATH_SINGULAR;
-    }
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixInv group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c
deleted file mode 100644
index 2a63d668..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_f32.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_f32.c    
-*    
-* Description:  Floating-point matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @defgroup MatrixMult Matrix Multiplication    
- *    
- * Multiplies two matrices.    
- *    
- * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"    
-    
- * Matrix multiplication is only defined if the number of columns of the    
- * first matrix equals the number of rows of the second matrix.    
- * Multiplying an M x N matrix with an N x P matrix results    
- * in an M x P matrix.    
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of    
- * pSrcA and pSrcB are equal; and (2) that the size of the output    
- * matrix equals the outer dimensions of pSrcA and pSrcB.    
- */
-
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Floating-point matrix multiplication.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t in1, in2, in3, in4;
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2u;
-
-        /* matrix multiplication        */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          in3 = *pIn2;
-          pIn2 += numColsB;
-          in1 = pIn1[0];
-          in2 = pIn1[1];
-          sum += in1 * in3;
-          in4 = *pIn2;
-          pIn2 += numColsB;
-          sum += in2 * in4;
-
-          in3 = *pIn2;
-          pIn2 += numColsB;
-          in1 = pIn1[2];
-          in2 = pIn1[3];
-          sum += in1 * in3;
-          in4 = *pIn2;
-          pIn2 += numColsB;
-          sum += in2 * in4;
-          pIn1 += 4u;
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pIn1++ * (*pIn2);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = sum;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pInA with each column in pInB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set     
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0.0f;
-
-        /* Initialize the pointer pIn1 to point to the starting address of the row being processed */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pIn1++ * (*pIn2);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = sum;
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
deleted file mode 100644
index b3c7aa07..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
+++ /dev/null
@@ -1,369 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_fast_q15.c    
-*    
-* Description:	 Q15 matrix multiplication (fast variant)    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-
-/**    
- * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @param[in]		*pState points to the array for storing intermediate results    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The difference between the function arm_mat_mult_q15() and this fast variant is that    
- * the fast variant use a 32-bit rather than a 64-bit accumulator.    
- * The result of each 1.15 x 1.15 multiplication is truncated to        
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30        
- * format. Finally, the accumulator is saturated and converted to a 1.15 result.        
- *        
- * \par        
- * The fast version has the same overflow behavior as the standard version but provides        
- * less precision since it discards the low 16 bits of each multiplication result.        
- * In order to avoid overflows completely the input signals must be scaled down.        
- * Scale down one of the input matrices by log2(numColsA) bits to        
- * avoid overflows, as a total of numColsA additions are computed internally for each        
- * output element.        
- *        
- * \par    
- * See arm_mat_mult_q15() for a slower implementation of this function    
- * which uses 64-bit accumulation to provide higher precision.    
- */
-
-arm_status arm_mat_mult_fast_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState)
-{
-  q31_t sum;                                     /* accumulator */
-  q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t inA1, inA2, inB1, inB2;
-
-#else
-
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t inA1, inA2, inB1, inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-#else
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-        
-		/* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pInB++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Reset the variables for the usage in the following multiplication process */
-    row = numRowsA;
-    i = 0u;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set        
-       ** to the starting address of the transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pInA = pSrcA->pData + i;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-          inA1 = *__SIMD32(pInA)++;
-          inB1 = *__SIMD32(pInB)++;
-          inA2 = *__SIMD32(pInA)++;
-          inB2 = *__SIMD32(pInB)++;
-
-          sum = __SMLAD(inA1, inB1, sum);
-          sum = __SMLAD(inA2, inB2, sum);
-
-#else
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          inA2 = *pInA++;
-          sum += inA1 * inB1;
-          inB2 = *pInB++;
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          sum += inA2 * inB2;
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-
-          sum += inA1 * inB1;
-          sum += inA2 * inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* process odd column samples */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += (q31_t) (*pInA++) * (*pInB++);
-
-          colCnt--;
-        }
-
-        /* Saturate and store the result in the destination buffer */
-        *px = (q15_t) (sum >> 15);
-        px++;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      i = i + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixMult group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
deleted file mode 100644
index c11958fe..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
+++ /dev/null
@@ -1,226 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_fast_q31.c    
-*    
-* Description:	 Q31 matrix multiplication (fast variant).    
-*    
-* Target Processor: Cortex-M4/Cortex-M3
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The difference between the function arm_mat_mult_q31() and this fast variant is that    
- * the fast variant use a 32-bit rather than a 64-bit accumulator.    
- * The result of each 1.31 x 1.31 multiplication is truncated to    
- * 2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30    
- * format. Finally, the accumulator is saturated and converted to a 1.31 result.    
- *    
- * \par    
- * The fast version has the same overflow behavior as the standard version but provides    
- * less precision since it discards the low 32 bits of each multiplication result.    
- * In order to avoid overflows completely the input signals must be scaled down.    
- * Scale down one of the input matrices by log2(numColsA) bits to    
- * avoid overflows, as a total of numColsA additions are computed internally for each    
- * output element.    
- *    
- * \par    
- * See arm_mat_mult_q31() for a slower implementation of this function    
- * which uses 64-bit accumulation to provide higher precision.    
- */
-
-arm_status arm_mat_mult_fast_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-//  q31_t *pSrcB = pSrcB->pData;                    /* input data matrix pointer B */    
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q31_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q31_t inA1, inA2, inA3, inA4, inB1, inB2, inB3, inB4;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          inB1 = *pIn2;
-          pIn2 += numColsB;
-
-          inA1 = pIn1[0];
-          inA2 = pIn1[1];
-
-          inB2 = *pIn2;
-          pIn2 += numColsB;
-
-          inB3 = *pIn2;
-          pIn2 += numColsB;
-
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA1 * inB1)) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA2 * inB2)) >> 32);
-
-          inA3 = pIn1[2];
-          inA4 = pIn1[3];
-
-          inB4 = *pIn2;
-          pIn2 += numColsB;
-
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA3 * inB3)) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) + ((q63_t) inA4 * inB4)) >> 32);
-
-          pIn1 += 4u;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * pIn1++ * (*pIn2))) >> 32);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
-        *px++ = sum << 1;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c
deleted file mode 100644
index 702ee83a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q15.c
+++ /dev/null
@@ -1,469 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_q15.c    
-*    
-* Description:	 Q15 matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-
-/**    
- * @brief Q15 matrix multiplication    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @param[in]		*pState points to the array for storing intermediate results (Unused)  
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator. The inputs to the    
- * multiplications are in 1.15 format and multiplications yield a 2.30 result.    
- * The 2.30 intermediate    
- * results are accumulated in a 64-bit accumulator in 34.30 format. This approach    
- * provides 33 guard bits and there is no risk of overflow. The 34.30 result is then    
- * truncated to 34.15 format by discarding the low 15 bits and then saturated to    
- * 1.15 format.    
- *    
- * \par    
- * Refer to arm_mat_mult_fast_q15() for a faster but less precise version of this function for Cortex-M3 and Cortex-M4.    
- *    
- */
-
-arm_status arm_mat_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState CMSIS_UNUSED)
-{
-  q63_t sum;                                     /* accumulator */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q15_t *pSrcBT = pState;                        /* input data matrix pointer for transpose */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsB, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* Temporary variable to hold the input value */
-  q31_t pSourceA1, pSourceB1, pSourceA2, pSourceB2;
-
-#else
-
-  q15_t in;                                      /* Temporary variable to hold the input value */
-  q15_t inA1, inB1, inA2, inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pSrcBT + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.        
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pInB)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) in;
-
-#else
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *px = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-#else
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Read one element from the row */
-        in = *pInB++;
-
-        /* Store one element in the destination */
-        *px = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-       /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.        
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4u;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pInB++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += numRowsB;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* Reset the variables for the usage in the following multiplication process */
-    row = numRowsA;
-    i = 0u;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set        
-       ** to the starting address of the transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pInA = pSrcA->pData + i;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA1 = *__SIMD32(pInA)++;
-          pSourceB1 = *__SIMD32(pInB)++;
-
-          pSourceA2 = *__SIMD32(pInA)++;
-          pSourceB2 = *__SIMD32(pInB)++;
-
-          /* Multiply and Accumlates */
-          sum = __SMLALD(pSourceA1, pSourceB1, sum);
-          sum = __SMLALD(pSourceA2, pSourceB2, sum);
-
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          inA2 = *pInA++;
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-          inB2 = *pInB++;
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          /* Multiply and Accumlates */
-          sum += inA2 * inB2;
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-          sum += inA2 * inB2;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* process remaining column samples */
-        colCnt = numColsA & 3u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          sum += *pInA++ * *pInB++;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Saturate and store the result in the destination buffer */
-        *px = (q15_t) (__SSAT((sum >> 15), 16));
-        px++;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-      i = i + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q15_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q15_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set          
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pSrcA */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q31_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
-        /* Saturate and store the result in the destination buffer */
-        *px++ = (q15_t) __SSAT((sum >> 15), 16);
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-      /* Update the pointer pSrcA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixMult group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c
deleted file mode 100644
index 5d225229..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_mult_q31.c
+++ /dev/null
@@ -1,294 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_mult_q31.c    
-*    
-* Description:	 Q31 matrix multiplication.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixMult    
- * @{    
- */
-
-/**    
- * @brief Q31 matrix multiplication    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using an internal 64-bit accumulator.    
- * The accumulator has a 2.62 format and maintains full precision of the intermediate    
- * multiplication results but provides only a single guard bit. There is no saturation    
- * on intermediate additions. Thus, if the accumulator overflows it wraps around and    
- * distorts the result. The input signals should be scaled down to avoid intermediate    
- * overflows. The input is thus scaled down by log2(numColsA) bits    
- * to avoid overflows, as a total of numColsA additions are performed internally.    
- * The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.    
- *    
- * \par    
- * See arm_mat_mult_fast_q31() for a faster but less precise implementation of this function for Cortex-M3 and Cortex-M4.    
- *    
- */
-
-arm_status arm_mat_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A    */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t col, i = 0u, j, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  q31_t a0, a1, a2, a3, b0, b1, b2, b3;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set    
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0u;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          b0 = *pIn2;
-          pIn2 += numColsB;
-
-          a0 = *pIn1++;
-          a1 = *pIn1++;
-
-          b1 = *pIn2;
-          pIn2 += numColsB;
-          b2 = *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) a0 *b0;
-          sum += (q63_t) a1 *b1;
-
-          a2 = *pIn1++;
-          a3 = *pIn1++;
-
-          b3 = *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) a2 *b2;
-          sum += (q63_t) a3 *b3;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining output samples here.    
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4u;
-
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) (sum >> 31);
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = (pSrcB->pData) + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while(col > 0u);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  uint16_t col, i = 0u, row = numRowsA, colCnt;  /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set          
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate the pointer pIn1 to point to the starting address of pInA */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        /* matrix multiplication */
-        while(colCnt > 0u)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) clip_q63_to_q31(sum >> 31);
-
-        /* Decrement the column loop counter */
-        col--;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while(col > 0u);
-
-#endif
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixMult group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c
deleted file mode 100644
index 37defa35..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_f32.c
+++ /dev/null
@@ -1,181 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:        arm_mat_scale_f32.c    
-*    
-* Description:	Multiplies a floating-point matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixScale Matrix Scale        
- *        
- * Multiplies a matrix by a scalar.  This is accomplished by multiplying each element in the        
- * matrix by the scalar.  For example:        
- * \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"        
- *        
- * The function checks to make sure that the input and output matrices are of the same size.        
- *        
- * In the fixed-point Q15 and Q31 functions, scale is represented by        
- * a fractional multiplication scaleFract and an arithmetic shift shift.        
- * The shift allows the gain of the scaling operation to exceed 1.0.        
- * The overall scale factor applied to the fixed-point data is        
- * 
        
- *     scale = scaleFract * 2^shift.        
- * 
        
- */
-
-/**        
- * @addtogroup MatrixScale        
- * @{        
- */
-
-/**        
- * @brief Floating-point matrix scaling.        
- * @param[in]       *pSrc points to input matrix structure        
- * @param[in]       scale scale factor to be applied         
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either ARM_MATH_SIZE_MISMATCH         
- * or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- */
-
-arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  float32_t scale,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix scaling     */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
-  float32_t out1, out2, out3, out4;              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * scale */
-      /* Scaling and results are stored in the destination buffer. */
-      in1 = pIn[0];
-      in2 = pIn[1];
-      in3 = pIn[2];
-      in4 = pIn[3];
-
-      out1 = in1 * scale;
-      out2 = in2 * scale;
-      out3 = in3 * scale;
-      out4 = in4 * scale;
-
-
-      pOut[0] = out1;
-      pOut[1] = out2;
-      pOut[2] = out3;
-      pOut[3] = out4;
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * scale */
-      /* The results are stored in the destination buffer. */
-      *pOut++ = (*pIn++) * scale;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c
deleted file mode 100644
index 5b1af165..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q15.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_scale_q15.c    
-*    
-* Description:	Multiplies a Q15 matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixScale    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix scaling.    
- * @param[in]       *pSrc points to input matrix    
- * @param[in]       scaleFract fractional portion of the scale factor    
- * @param[in]       shift number of bits to shift the result by    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The input data *pSrc and scaleFract are in 1.15 format.    
- * These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.    
- */
-
-arm_status arm_mat_scale_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  q15_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  int32_t totShift = 15 - shift;                 /* total shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix scaling     */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q15_t in1, in2, in3, in4;
-  q31_t out1, out2, out3, out4;
-  q31_t inA1, inA2;
-
-#endif //     #ifndef ARM_MATH_CM0_FAMILY
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif //    #ifdef ARM_MATH_MATRIX_CHECK
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      /* Reading 2 inputs from memory */
-      inA1 = _SIMD32_OFFSET(pIn);
-      inA2 = _SIMD32_OFFSET(pIn + 2);
-
-      /* C = A * scale */
-      /* Scale the inputs and then store the 2 results in the destination buffer        
-       * in single cycle by packing the outputs */
-      out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
-      out2 = (q31_t) ((q15_t) inA1 * scaleFract);
-      out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
-      out4 = (q31_t) ((q15_t) inA2 * scaleFract);
-
-      out1 = out1 >> totShift;
-      inA1 = _SIMD32_OFFSET(pIn + 4);
-      out2 = out2 >> totShift;
-      inA2 = _SIMD32_OFFSET(pIn + 6);
-      out3 = out3 >> totShift;
-      out4 = out4 >> totShift;
-
-      in1 = (q15_t) (__SSAT(out1, 16));
-      in2 = (q15_t) (__SSAT(out2, 16));
-      in3 = (q15_t) (__SSAT(out3, 16));
-      in4 = (q15_t) (__SSAT(out4, 16));
-
-      _SIMD32_OFFSET(pOut) = __PKHBT(in2, in1, 16);
-      _SIMD32_OFFSET(pOut + 2) = __PKHBT(in4, in3, 16);
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      *pOut++ =
-        (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> totShift, 16));
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c
deleted file mode 100644
index 5c88e414..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_scale_q31.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_scale_q31.c    
-*    
-* Description:	Multiplies a Q31 matrix by a scalar.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  ------------------------------------------------ */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @addtogroup MatrixScale        
- * @{        
- */
-
-/**        
- * @brief Q31 matrix scaling.        
- * @param[in]       *pSrc points to input matrix        
- * @param[in]       scaleFract fractional portion of the scale factor        
- * @param[in]       shift number of bits to shift the result by        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- * \par        
- * The input data *pSrc and scaleFract are in 1.31 format.        
- * These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.        
- */
-
-arm_status arm_mat_scale_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  q31_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  int32_t totShift = shift + 1;                  /* shift to apply after scaling */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix scaling      */
-  q31_t in1, in2, out1;                          /* temporary variabels */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t in3, in4, out2, out3, out4;              /* temporary variables */
-
-#endif //      #ifndef ARM_MAT_CM0
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch  */
-  if((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif //    #ifdef ARM_MATH_MATRIX_CHECK
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Read values from input */
-      in1 = *pIn;
-      in2 = *(pIn + 1);
-      in3 = *(pIn + 2);
-      in4 = *(pIn + 3);
-
-      /* multiply input with scaler value */
-      in1 = ((q63_t) in1 * scaleFract) >> 32;
-      in2 = ((q63_t) in2 * scaleFract) >> 32;
-      in3 = ((q63_t) in3 * scaleFract) >> 32;
-      in4 = ((q63_t) in4 * scaleFract) >> 32;
-
-      /* apply shifting */
-      out1 = in1 << totShift;
-      out2 = in2 << totShift;
-
-      /* saturate the results. */
-      if(in1 != (out1 >> totShift))
-        out1 = 0x7FFFFFFF ^ (in1 >> 31);
-
-      if(in2 != (out2 >> totShift))
-        out2 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      out3 = in3 << totShift;
-      out4 = in4 << totShift;
-
-      *pOut = out1;
-      *(pOut + 1) = out2;
-
-      if(in3 != (out3 >> totShift))
-        out3 = 0x7FFFFFFF ^ (in3 >> 31);
-
-      if(in4 != (out4 >> totShift))
-        out4 = 0x7FFFFFFF ^ (in4 >> 31);
-
-
-      *(pOut + 2) = out3;
-      *(pOut + 3) = out4;
-
-      /* update pointers to process next sampels */
-      pIn += 4u;
-      pOut += 4u;
-
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) * k */
-      /* Scale, saturate and then store the results in the destination buffer. */
-      in1 = *pIn++;
-
-      in2 = ((q63_t) in1 * scaleFract) >> 32;
-
-      out1 = in2 << totShift;
-
-      if(in2 != (out1 >> totShift))
-        out1 = 0x7FFFFFFF ^ (in2 >> 31);
-
-      *pOut++ = out1;
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixScale group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c
deleted file mode 100644
index f07bbe0c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_f32.c
+++ /dev/null
@@ -1,209 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_f32.c    
-*    
-* Description:	Floating-point matrix subtraction.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @defgroup MatrixSub Matrix Subtraction        
- *        
- * Subtract two matrices.        
- * \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"        
- *        
- * The functions check to make sure that        
- * pSrcA, pSrcB, and pDst have the same        
- * number of rows and columns.        
- */
-
-/**        
- * @addtogroup MatrixSub        
- * @{        
- */
-
-/**        
- * @brief Floating-point matrix subtraction        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- */
-
-arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* out = sourceA - sourceB */
-      out1 = inA1 - inB1;
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* out = sourceA - sourceB */
-      out2 = inA2 - inB2;
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* out = sourceA - sourceB */
-      out1 = inA1 - inB1;
-
-
-      /* out = sourceA - sourceB */
-      out2 = inA2 - inB2;
-
-      /* Store result in destination */
-      pOut[2] = out1;
-
-      /* Store result in destination */
-      pOut[3] = out2;
-
-
-      /* update pointers to process next sampels */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (*pIn1++) - (*pIn2++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixSub group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c
deleted file mode 100644
index fd7b29cd..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q15.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_q15.c    
-*    
-* Description:	Q15 Matrix subtraction    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixSub    
- * @{    
- */
-
-/**    
- * @brief Q15 matrix subtraction.    
- * @param[in]       *pSrcA points to the first input matrix structure    
- * @param[in]       *pSrcB points to the second input matrix structure    
- * @param[out]      *pDst points to output matrix structure    
- * @return     		The function returns either    
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.    
- *    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- */
-
-arm_status arm_mat_sub_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters  */
-  arm_status status;                             /* status of matrix subtraction  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Apply loop unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, Saturate and then store the results in the destination buffer. */
-      *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-      *__SIMD32(pOut)++ = __QSUB16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixSub group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c
deleted file mode 100644
index d2f2f984..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_sub_q31.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_sub_q31.c    
-*    
-* Description:	Q31 matrix subtraction    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupMatrix        
- */
-
-/**        
- * @addtogroup MatrixSub        
- * @{        
- */
-
-/**        
- * @brief Q31 matrix subtraction.        
- * @param[in]       *pSrcA points to the first input matrix structure        
- * @param[in]       *pSrcB points to the second input matrix structure        
- * @param[out]      *pDst points to output matrix structure        
- * @return     		The function returns either        
- * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.        
- *        
- * Scaling and Overflow Behavior:        
- * \par        
- * The function uses saturating arithmetic.        
- * Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] will be saturated.        
- */
-
-
-arm_status arm_mat_sub_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t inA1, inB1;                              /* temporary variables */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t inA2, inB2;                              /* temporary variables */
-  q31_t out1, out2;                              /* temporary variables */
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition  */
-  if((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-    /* Loop Unrolling */
-    blkCnt = numSamples >> 2u;
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, saturate and then store the results in the destination buffer. */
-      /* Read values from source A */
-      inA1 = pIn1[0];
-
-      /* Read values from source B */
-      inB1 = pIn2[0];
-
-      /* Read values from source A */
-      inA2 = pIn1[1];
-
-      /* Subtract and saturate */
-      out1 = __QSUB(inA1, inB1);
-
-      /* Read values from source B */
-      inB2 = pIn2[1];
-
-      /* Read values from source A */
-      inA1 = pIn1[2];
-
-      /* Subtract and saturate */
-      out2 = __QSUB(inA2, inB2);
-
-      /* Read values from source B */
-      inB1 = pIn2[2];
-
-      /* Store result in destination */
-      pOut[0] = out1;
-      pOut[1] = out2;
-
-      /* Read values from source A */
-      inA2 = pIn1[3];
-
-      /* Read values from source B */
-      inB2 = pIn2[3];
-
-      /* Subtract and saturate */
-      out1 = __QSUB(inA1, inB1);
-
-      /* Subtract and saturate */
-      out2 = __QSUB(inA2, inB2);
-
-      /* Store result in destination */
-      pOut[2] = out1;
-      pOut[3] = out2;
-
-      /* update pointers to process next samples */
-      pIn1 += 4u;
-      pIn2 += 4u;
-      pOut += 4u;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.        
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4u;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-    while(blkCnt > 0u)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract, saturate and then store the results in the destination buffer. */
-      inA1 = *pIn1++;
-      inB1 = *pIn2++;
-
-      inA1 = __QSUB(inA1, inB1);
-
-      *pOut++ = inA1;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**        
- * @} end of MatrixSub group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c
deleted file mode 100644
index 84c08ecb..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_f32.c
+++ /dev/null
@@ -1,218 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_f32.c    
-*    
-* Description:	Floating-point matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-/**    
- * @defgroup MatrixTrans Matrix Transpose    
- *    
- * Tranposes a matrix.    
- * Transposing an M x N matrix flips it around the center diagonal and results in an N x M matrix.    
- * \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"    
- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/**    
-  * @brief Floating-point matrix transpose.    
-  * @param[in]  *pSrc points to the input matrix    
-  * @param[out] *pDst points to the output matrix    
-  * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
-  * or ARM_MATH_SUCCESS based on the outcome of size checking.    
-  */
-
-
-arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of rows */
-  uint16_t nColumns = pSrc->numCols;             /* number of columns */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
-  arm_status status;                             /* status of matrix transpose  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* Loop Unrolling */
-      blkCnt = nColumns >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(blkCnt > 0u)        /* column loop */
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      blkCnt = nColumns % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  uint16_t col, i = 0u, row = nRows;             /* loop counters */
-  arm_status status;                             /* status of matrix transpose  */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);          /* row loop end  */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c
deleted file mode 100644
index 4e0fb823..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q15.c
+++ /dev/null
@@ -1,284 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_q15.c    
-*    
-* Description:	Q15 matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/*    
- * @brief Q15 matrix transpose.    
- * @param[in]  *pSrc points to the input matrix    
- * @param[out] *pDst points to the output matrix    
- * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
- * or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_trans_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  arm_matrix_instance_q15 * pDst)
-{
-  q15_t *pSrcA = pSrc->pData;                    /* input data matrix pointer */
-  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of nRows */
-  uint16_t nColumns = pSrc->numCols;             /* number of nColumns */
-  uint16_t col, row = nRows, i = 0u;             /* row and column loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-  q31_t in;                                      /* variable to hold temporary output  */
-
-#else
-
-  q15_t in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = nColumns >> 2u;
-
-      /* The pointer pOut is set to starting address of the column being processed */
-      pOut = pDst->pData + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(col > 0u)
-      {
-#ifndef UNALIGNED_SUPPORT_DISABLE
-
-        /* Read two elements from the row */
-        in = *__SIMD32(pSrcA)++;
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) in;
-
-#else
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store the second element in the destination */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *pOut = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read two elements from the row */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        in = *__SIMD32(pSrcA)++;
-
-#else
-
-        in = *__SIMD32(pSrcA)++;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Unpack and store one element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) in;
-
-#else
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store the second element in the destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#else
-
-        *pOut = (q15_t) in;
-
-#endif /*    #ifndef ARM_MATH_BIG_ENDIAN    */
-
-#else	 
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
- 
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Read one element from the row */
-        in = *pSrcA++;
-
-        /* Store one element in the destination */
-        *pOut = in;
-
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      col = nColumns % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer pOut is set to starting address of the column being processed */
-      pOut = pDst->pData + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *pOut = *pSrcA++;
-
-        /* Update the pointer pOut to point to the next row of the transposed matrix */
-        pOut += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    } while(row > 0u);
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c b/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c
deleted file mode 100644
index ec925826..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/MatrixFunctions/arm_mat_trans_q31.c
+++ /dev/null
@@ -1,210 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_mat_trans_q31.c    
-*    
-* Description:	Q31 matrix transpose.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupMatrix    
- */
-
-/**    
- * @addtogroup MatrixTrans    
- * @{    
- */
-
-/*    
-  * @brief Q31 matrix transpose.    
-  * @param[in]  *pSrc points to the input matrix    
-  * @param[out] *pDst points to the output matrix    
-  * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH    
-  * or ARM_MATH_SUCCESS based on the outcome of size checking.    
- */
-
-arm_status arm_mat_trans_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer  */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer  */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of nRows */
-  uint16_t nColumns = pSrc->numCols;             /* number of nColumns  */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  uint16_t blkCnt, i = 0u, row = nRows;          /* loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* Apply loop unrolling and exchange the columns with row elements */
-      blkCnt = nColumns >> 2u;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      blkCnt = nColumns % 0x4u;
-
-      while(blkCnt > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  uint16_t col, i = 0u, row = nRows;             /* loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop     */
-    do
-    {
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* Initialize column loop counter */
-      col = nColumns;
-
-      while(col > 0u)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        col--;
-      }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-      i++;
-
-      /* Decrement the row loop counter */
-      row--;
-
-    }
-    while(row > 0u);            /* row loop end */
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**    
- * @} end of MatrixTrans group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c
deleted file mode 100644
index 23266463..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_f32.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_f32.c    
-*    
-* Description:	Maximum value of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup Max Maximum    
- *    
- * Computes the maximum value of an array of data.     
- * The function returns both the maximum value and its position within the array.     
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t maxVal1, out;                        /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c
deleted file mode 100644
index 20375c2e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q15.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q15.c    
-*    
-* Description:	Maximum value of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q15_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t maxVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c
deleted file mode 100644
index c687e79c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q31.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q31.c    
-*    
-* Description:	Maximum value of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
- * @return none.    
- */
-
-void arm_max_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t maxVal1, maxVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q31_t maxVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c
deleted file mode 100644
index 0e0cc2d5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_max_q7.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_max_q7.c    
-*    
-* Description:	Maximum value of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Max    
- * @{    
- */
-
-
-/**    
- * @brief Maximum value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult maximum value returned here    
- * @param[out]      *pIndex index of maximum value returned here    
-  * @return none.    
- */
-
-void arm_max_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t maxVal1, maxVal2, out;                    /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 1u;
-    }
-
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 2u;
-    }
-
-    maxVal2 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the maximum value */
-    if(out < maxVal2)
-    {
-      /* Update the maximum value and its index */
-      out = maxVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q7_t maxVal1, out;                             /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal1 = *pSrc++;
-
-    /* compare for the maximum value */
-    if(out < maxVal1)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal1;
-      outIndex = blockSize - blkCnt;
-    }
-    /* Decrement the loop counter */
-    blkCnt--;
-
-  }
-
-  /* Store the maximum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-
-}
-
-/**    
- * @} end of Max group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c
deleted file mode 100644
index bc054b2e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_f32.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_f32.c    
-*    
-* Description:	Mean value of a floating-point vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup mean Mean    
- *    
- * Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;    
- * 
    
- *    
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-
-/**    
- * @brief Mean value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- */
-
-
-void arm_mean_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    sum += in1;
-    sum += in2;
-    sum += in3;
-    sum += in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = sum / (float32_t) blockSize;
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c
deleted file mode 100644
index ff5d64b6..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q15.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q15.c    
-*    
-* Description:	Mean value of a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.    
- * The input is represented in 1.15 format and is accumulated in a 32-bit     
- * accumulator in 17.15 format.     
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is saturated and truncated to yield a result of 1.15 format.    
- *    
- */
-
-
-void arm_mean_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q15_t) (sum / (q31_t)blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c
deleted file mode 100644
index afd62b3b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q31.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q31.c    
-*    
-* Description:	Mean value of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *\par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.31 format and is accumulated in a 64-bit    
- * accumulator in 33.31 format.    
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is truncated to yield a result of 1.31 format.    
- *    
- */
-
-
-void arm_mean_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    sum += in1;
-    sum += in2;
-    sum += in3;
-    sum += in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q31_t) (sum / (int32_t) blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c
deleted file mode 100644
index 522e3d47..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_mean_q7.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_mean_q7.c    
-*    
-* Description:	Mean value of a Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup mean    
- * @{    
- */
-
-/**    
- * @brief Mean value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult mean value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.     
- * The input is represented in 1.7 format and is accumulated in a 32-bit    
- * accumulator in 25.7 format.    
- * There is no risk of internal overflow with this approach, and the     
- * full precision of intermediate result is preserved.     
- * Finally, the accumulator is truncated to yield a result of 1.7 format.    
- *    
- */
-
-
-void arm_mean_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = *__SIMD32(pSrc)++;
-
-    sum += ((in << 24) >> 24);
-    sum += ((in << 16) >> 24);
-    sum += ((in << 8) >> 24);
-    sum += (in >> 24);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = (q7_t) (sum / (int32_t) blockSize);
-}
-
-/**    
- * @} end of mean group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c
deleted file mode 100644
index 22f057ac..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_f32.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_f32.c    
-*    
-* Description:	Minimum value of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup Min Minimum    
- *    
- * Computes the minimum value of an array of data.     
- * The function returns both the minimum value and its position within the array.     
- * There are separate functions for floating-point, Q31, Q15, and Q7 data types.    
- */
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
-  * @return none.    
- *    
- */
-
-void arm_min_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t minVal1, minVal2, out;               /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t minVal1, out;                        /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c
deleted file mode 100644
index 05c13dda..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q15.c
+++ /dev/null
@@ -1,177 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q15.c    
-*    
-* Description:	Minimum value of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q15_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t minVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c
deleted file mode 100644
index 97431db6..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q31.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q31.c    
-*    
-* Description:	Minimum value of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t minVal1, minVal2, out;                   /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q31_t minVal1, out;                            /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  blkCnt = (blockSize - 1u);
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c
deleted file mode 100644
index b6d09504..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_min_q7.c
+++ /dev/null
@@ -1,178 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_min_q7.c    
-*    
-* Description:	Minimum value of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup Min    
- * @{    
- */
-
-
-/**    
- * @brief Minimum value of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult minimum value returned here    
- * @param[out]      *pIndex index of minimum value returned here    
- * @return none.    
- *    
- */
-
-void arm_min_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q7_t minVal1, minVal2, out;                    /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  /* Initialise the count value. */
-  count = 0u;
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  /* Loop unrolling */
-  blkCnt = (blockSize - 1u) >> 2u;
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 1u;
-    }
-
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 2u;
-    }
-
-    minVal2 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and its index */
-      out = minVal1;
-      outIndex = count + 3u;
-    }
-
-    /* compare for the minimum value */
-    if(out > minVal2)
-    {
-      /* Update the minimum value and its index */
-      out = minVal2;
-      outIndex = count + 4u;
-    }
-
-    count += 4u;
-
-    blkCnt--;
-  }
-
-  /* if (blockSize - 1u ) is not multiple of 4 */
-  blkCnt = (blockSize - 1u) % 4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q7_t minVal1, out;                             /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex;                     /* loop counter */
-
-  /* Initialise the index value to zero. */
-  outIndex = 0u;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-  blkCnt = (blockSize - 1u);
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-  while(blkCnt > 0)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal1 = *pSrc++;
-
-    /* compare for the minimum value */
-    if(out > minVal1)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal1;
-      outIndex = blockSize - blkCnt;
-    }
-
-    blkCnt--;
-
-  }
-
-  /* Store the minimum value and its index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-
-
-}
-
-/**    
- * @} end of Min group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c
deleted file mode 100644
index 831c5b03..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_f32.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_f32.c    
-*    
-* Description:	Sum of the squares of the elements of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup power Power    
- *    
- * Calculates the sum of the squares of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-
-/**    
- * @brief Sum of the squares of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_power_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* accumulator */
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* compute power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result to the destination */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c
deleted file mode 100644
index 6e7034a9..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q15.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q15.c    
-*    
-* Description:	Sum of the squares of the elements of a Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.     
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 34.30 format.     
- *    
- */
-
-void arm_power_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in32;                                    /* Temporary variable to store input value */
-  q15_t in16;                                    /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in32 = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in32, in32, sum);
-    in32 = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in32, in32, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in16 = *pSrc++;
-    sum = __SMLALD(in16, in16, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Store the results in 34.30 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c
deleted file mode 100644
index 2f7976ac..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q31.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q31.c    
-*    
-* Description:	Sum of the squares of the elements of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.31 format.    
- * Intermediate multiplication yields a 2.62 format, and this    
- * result is truncated to 2.48 format by discarding the lower 14 bits.    
- * The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.    
- * With 15 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 16.48 format.     
- *    
- */
-
-void arm_power_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult)
-{
-  q63_t sum = 0;                                 /* Temporary result storage */
-  q31_t in;
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and then store the result in a temporary variable sum, providing 15 guard bits. */
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the results in 16.48 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c
deleted file mode 100644
index 3e97f911..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_power_q7.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_power_q7.c    
-*    
-* Description:	Sum of the squares of the elements of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup power    
- * @{    
- */
-
-/**    
- * @brief Sum of the squares of the elements of a Q7 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult sum of the squares value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 32-bit internal accumulator.     
- * The input is represented in 1.7 format.   
- * Intermediate multiplication yields a 2.14 format, and this    
- * result is added without saturation to an accumulator in 18.14 format.    
- * With 17 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the return result is in 18.14 format.     
- *    
- */
-
-void arm_power_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q31_t sum = 0;                                 /* Temporary result storage */
-  q7_t in;                                       /* Temporary variable to store input */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t input1;                                  /* Temporary variable to store packed input */
-  q31_t in1, in2;                                /* Temporary variables to store input */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* Reading two inputs of pSrc vector and packing */
-    input1 = *__SIMD32(pSrc)++;
-
-    in1 = __SXTB16(__ROR(input1, 8));
-    in2 = __SXTB16(input1);
-
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* calculate power and accumulate to accumulator */
-    sum = __SMLAD(in1, in1, sum);
-    sum = __SMLAD(in2, in2, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q15_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result in 18.14 format  */
-  *pResult = sum;
-}
-
-/**    
- * @} end of power group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c
deleted file mode 100644
index 466d17b6..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_f32.c
+++ /dev/null
@@ -1,141 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_f32.c    
-*    
-* Description:	Root mean square value of an array of F32 type    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup RMS Root mean square (RMS)    
- *    
- *     
- * Calculates the Root Mean Sqaure of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));    
- * 
    
- *   
- * There are separate functions for floating point, Q31, and Q15 data types.     
- */
-
-/**    
- * @addtogroup RMS    
- * @{    
- */
-
-
-/**    
- * @brief Root Mean Square of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult rms value returned here    
- * @return none.    
- *    
- */
-
-void arm_rms_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Accumulator */
-  float32_t in;                                  /* Tempoprary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the result in a temporary variable, sum  */
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum  */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Rms and store the result in the destination */
-  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
-}
-
-/**    
- * @} end of RMS group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c
deleted file mode 100644
index 74372be9..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q15.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_q15.c    
-*    
-* Description:	Root Mean Square of the elements of a Q15 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @addtogroup RMS    
- * @{    
- */
-
-/**    
- * @brief Root Mean Square of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult rms value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.    
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- *    
- */
-
-void arm_rms_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q63_t sum = 0;                                 /* accumulator */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* temporary variable to store the input value */
-  q15_t in1;                                     /* temporary variable to store the input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in, in, sum);
-    in = *__SIMD32(pSrc)++;
-    sum = __SMLALD(in, in, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in1 = *pSrc++;
-    sum = __SMLALD(in1, in1, sum);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Truncating and saturating the accumulator to 1.15 format */
-  /* Store the result in the destination */
-  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  q15_t in;                                      /* temporary variable to store the input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Truncating and saturating the accumulator to 1.15 format */
-  /* Store the result in the destination */
-  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of RMS group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c
deleted file mode 100644
index 7072e190..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_rms_q31.c
+++ /dev/null
@@ -1,150 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_rms_q31.c    
-*    
-* Description:	Root Mean Square of the elements of a Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @addtogroup RMS        
- * @{        
- */
-
-
-/**        
- * @brief Root Mean Square of the elements of a Q31 vector.        
- * @param[in]       *pSrc points to the input vector        
- * @param[in]       blockSize length of the input vector        
- * @param[out]      *pResult rms value returned here        
- * @return none.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- *        
- *\par        
- * The function is implemented using an internal 64-bit accumulator.        
- * The input is represented in 1.31 format, and intermediate multiplication        
- * yields a 2.62 format.        
- * The accumulator maintains full precision of the intermediate multiplication results,         
- * but provides only a single guard bit.        
- * There is no saturation on intermediate additions.        
- * If the accumulator overflows, it wraps around and distorts the result.         
- * In order to avoid overflows completely, the input signal must be scaled down by         
- * log2(blockSize) bits, as a total of blockSize additions are performed internally.         
- * Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.        
- *        
- */
-
-void arm_rms_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* accumulator */
-  q31_t in;                                      /* Temporary variable to store the input */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in1, in2, in3, in4;                      /* Temporary input variables */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 8 outputs at a time.        
-   ** a second loop below computes the remaining 1 to 7 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the result in a temporary variable, sum */
-    /* read two samples from source buffer */
-    in1 = pSrc[0];
-    in2 = pSrc[1];
-
-    /* calculate power and accumulate to accumulator */
-    sum += (q63_t) in1 *in1;
-    sum += (q63_t) in2 *in2;
-
-    /* read two samples from source buffer */
-    in3 = pSrc[2];
-    in4 = pSrc[3];
-
-    /* calculate power and accumulate to accumulator */
-    sum += (q63_t) in3 *in3;
-    sum += (q63_t) in4 *in4;
-
-
-    /* update source buffer to process next samples */
-    pSrc += 4u;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 8, compute any remaining output samples here.        
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute sum of the squares and then store the results in a temporary variable, sum */
-    in = *pSrc++;
-    sum += (q63_t) in *in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
-  /* Compute Rms and store the result in the destination vector */
-  arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
-}
-
-/**        
- * @} end of RMS group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c
deleted file mode 100644
index 2483ada9..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_f32.c
+++ /dev/null
@@ -1,208 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_f32.c    
-*    
-* Description:	Standard deviation of the elements of a floating-point vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup STD Standard deviation    
- *    
- * Calculates the standard deviation of the elements in the input vector.     
- * The underlying algorithm is used:    
- *   
- * 
    
- * 	Result = sqrt((sumOfSquares - sum2 / blockSize) / (blockSize - 1))   
- *   
- *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
- *   
- *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
- * 
   
- *    
- * There are separate functions for floating point, Q31, and Q15 data types.    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-
-/**    
- * @brief Standard deviation of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_std_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
-  float32_t in;                                  /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t meanOfSquares, mean, squareOfMean;
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
-
-  /* Compute mean of all input values */
-  mean = sum / (float32_t) blockSize;
-
-  /* Compute square of mean */
-  squareOfMean = (mean * mean) * (((float32_t) blockSize) /
-                                  ((float32_t) blockSize - 1.0f));
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  float32_t squareOfSum;                         /* Square of Sum */
-  float32_t var;                                 /* Temporary varaince storage */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += in * in;
-
-    /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
-    /* Compute Sum of the input samples     
-     * and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute the square of sum */
-  squareOfSum = ((sum * sum) / (float32_t) blockSize);
-
-  /* Compute the variance */
-  var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_f32(var, pResult);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c
deleted file mode 100644
index f1130997..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q15.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_q15.c    
-*    
-* Description:	Standard deviation of an array of Q15 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-/**    
- * @brief Standard deviation of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- */
-
-void arm_std_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-  q31_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* input value */
-  q15_t in1;                                     /* input value */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in1 = *pSrc++;
-    sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
-    sum += in1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t) ((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1)));
-
-  /* mean of the squares minus the square of the mean. */
-  /* Compute standard deviation and store the result to the destination */
-  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15, 16u), pResult);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t in;                                      /* input value */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t)(sumOfSquares / (q63_t)(blockSize - 1));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t) ((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1)));
-
-  /* mean of the squares minus the square of the mean. */
-  /* Compute standard deviation and store the result to the destination */
-  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15, 16u), pResult);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c
deleted file mode 100644
index f2518c59..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_std_q31.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_std_q31.c    
-*    
-* Description:	Standard deviation of an array of Q31 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup STD    
- * @{    
- */
-
-
-/**    
- * @brief Standard deviation of the elements of a Q31 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult standard deviation value returned here    
- * @return none.    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- *\par    
- * The function is implemented using an internal 64-bit accumulator.        
- * The input is represented in 1.31 format, which is then downshifted by 8 bits
- * which yields 1.23, and intermediate multiplication yields a 2.46 format.        
- * The accumulator maintains full precision of the intermediate multiplication results,         
- * but provides only a 16 guard bits.        
- * There is no saturation on intermediate additions.        
- * If the accumulator overflows it wraps around and distorts the result.        
- * In order to avoid overflows completely the input signal must be scaled down by         
- * log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.  
- * After division, internal variables should be Q18.46 
- * Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value. 
- *    
- */
-
-
-void arm_std_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* Accumulator */
-  q63_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q31_t in;                                      /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++ >> 8;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Compute square of mean */
-  squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1u));
-
-  /* Compute standard deviation and then store the result to the destination */
-  arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15, pResult);
-
-}
-
-/**    
- * @} end of STD group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c
deleted file mode 100644
index aff478d6..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_f32.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_f32.c    
-*    
-* Description:	Variance of the elements of a floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @defgroup variance  Variance    
- *    
- * Calculates the variance of the elements in the input vector.    
- * The underlying algorithm is used:    
- *    
- * 
    
- * 	Result = (sumOfSquares - sum2 / blockSize) / (blockSize - 1)   
- *   
- *	   where, sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]   
- *   
- *	                   sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]   
- * 
   
- *    
- * There are separate functions for floating point, Q31, and Q15 data types.    
- */
-
-/**    
- * @addtogroup variance    
- * @{    
- */
-
-
-/**    
- * @brief Variance of the elements of a floating-point vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult variance value returned here    
- * @return none.    
- *    
- */
-
-
-void arm_var_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
-  float32_t in;                                  /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-  
-#ifndef ARM_MATH_CM0_FAMILY
-   
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  float32_t meanOfSquares, mean, squareOfMean;   /* Temporary variables */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in;
-    sumOfSquares += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
-
-  /* Compute mean of all input values */
-  mean = sum / (float32_t) blockSize;
-
-  /* Compute square of mean */
-  squareOfMean = (mean * mean) * (((float32_t) blockSize) /
-                                  ((float32_t) blockSize - 1.0f));
-
-  /* Compute variance and then store the result to the destination */
-  *pResult = meanOfSquares - squareOfMean;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  float32_t squareOfSum;                         /* Square of Sum */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += in * in;
-
-    /* C = (A[0] + A[1] + ... + A[blockSize-1]) */
-    /* Compute Sum of the input samples     
-     * and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute the square of sum */
-  squareOfSum = ((sum * sum) / (float32_t) blockSize);
-
-  /* Compute the variance */
-  *pResult = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of variance group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c
deleted file mode 100644
index d304cfbc..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q15.c
+++ /dev/null
@@ -1,195 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_q15.c    
-*    
-* Description:	Variance of an array of Q15 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupStats    
- */
-
-/**    
- * @addtogroup variance    
- * @{    
- */
-
-/**    
- * @brief Variance of the elements of a Q15 vector.    
- * @param[in]       *pSrc points to the input vector    
- * @param[in]       blockSize length of the input vector    
- * @param[out]      *pResult variance value returned here    
- * @return none.    
- *    
- * @details    
- * Scaling and Overflow Behavior:    
- *    
- * \par    
- * The function is implemented using a 64-bit internal accumulator.    
- * The input is represented in 1.15 format.   
- * Intermediate multiplication yields a 2.30 format, and this    
- * result is added without saturation to a 64-bit accumulator in 34.30 format.    
- * With 33 guard bits in the accumulator, there is no risk of overflow, and the    
- * full precision of the intermediate multiplication is preserved.    
- * Finally, the 34.30 result is truncated to 34.15 format by discarding the lower     
- * 15 bits, and then saturated to yield a result in 1.15 format.    
- *    
- */
-
-
-void arm_var_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult)
-{
-
-  q31_t sum = 0;                                 /* Accumulator */
-  q31_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t in;                                      /* input value */
-  q15_t in1;                                     /* input value */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-    in = *__SIMD32(pSrc)++;
-    sum += ((in << 16) >> 16);
-    sum += (in >> 16);
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in1 = *pSrc++;
-    sumOfSquares = __SMLALD(in1, in1, sumOfSquares);
-    sum += in1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1)));
-
-  /* mean of the squares minus the square of the mean. */
-  *pResult = (meanOfSquares - squareOfMean) >> 15;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-  q15_t in;                                      /* input value */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t)((q63_t)sum * sum / (q63_t)(blockSize * (blockSize - 1)));
-
-  /* mean of the squares minus the square of the mean. */
-  *pResult = (meanOfSquares - squareOfMean) >> 15;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of variance group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c b/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c
deleted file mode 100644
index 6bd0de89..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/StatisticsFunctions/arm_var_q31.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_var_q31.c    
-*    
-* Description:	Variance of an array of Q31 type.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**        
- * @ingroup groupStats        
- */
-
-/**        
- * @addtogroup variance        
- * @{        
- */
-
-/**        
- * @brief Variance of the elements of a Q31 vector.        
- * @param[in]       *pSrc points to the input vector        
- * @param[in]       blockSize length of the input vector        
- * @param[out]      *pResult variance value returned here        
- * @return none.        
- *        
- * @details        
- * Scaling and Overflow Behavior:        
- *        
- *\par        
- * The function is implemented using an internal 64-bit accumulator.        
- * The input is represented in 1.31 format, which is then downshifted by 8 bits
- * which yields 1.23, and intermediate multiplication yields a 2.46 format.        
- * The accumulator maintains full precision of the intermediate multiplication results,         
- * but provides only a 16 guard bits.        
- * There is no saturation on intermediate additions.        
- * If the accumulator overflows it wraps around and distorts the result.        
- * In order to avoid overflows completely the input signal must be scaled down by         
- * log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.  
- * After division, internal variables should be Q18.46 
- * Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.        
- *        
- */
-
-
-void arm_var_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult)
-{
-  q63_t sum = 0;                                 /* Accumulator */
-  q63_t meanOfSquares, squareOfMean;             /* square of mean and mean of square */
-  q31_t in;                                      /* input value */
-  uint32_t blkCnt;                               /* loop counter */
-  q63_t sumOfSquares = 0;                        /* Accumulator */
-
-	if(blockSize == 1)
-	{
-		*pResult = 0;
-		return;
-	}
-   
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1])  */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples    
-     * and then store the result in a temporary variable, sum. */
-    in = *pSrc++ >> 8;
-    sum += in;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples    
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1);
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-    /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
-    /* Compute Sum of squares of the input samples     
-     * and then store the result in a temporary variable, sumOfSquares. */
-    in = *pSrc++ >> 8;
-    sumOfSquares += ((q63_t) (in) * (in));
-
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    /* Compute sum of all input values and then store the result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares of the input samples     
-   * and then store the result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / (q63_t)(blockSize - 1);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  /* Compute square of mean */
-  squareOfMean = sum * sum / (q63_t)(blockSize * (blockSize - 1u));
-
-
-  /* Compute standard deviation and then store the result to the destination */
-  *pResult = (meanOfSquares - squareOfMean) >> 15;
-
-}
-
-/**        
- * @} end of variance group        
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c
deleted file mode 100644
index bdbdff55..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_f32.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_f32.c    
-*    
-* Description:	Copies the elements of a floating-point vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup copy Vector Copy    
- *    
- * Copies sample by sample from source vector to destination vector.    
- *    
- * 
    
- * 	pDst[n] = pSrc[n];   0 <= n < blockSize.    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a floating-point vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-
-void arm_copy_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c
deleted file mode 100644
index 2d152c0d..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q15.c
+++ /dev/null
@@ -1,114 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q15.c    
-*    
-* Description:	Copies the elements of a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-/**    
- * @brief Copies the elements of a Q15 vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Read two inputs */
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the value in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c
deleted file mode 100644
index 7dec9288..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q31.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q31.c    
-*    
-* Description:	Copies the elements of a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a Q31 vector.     
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the values in the destination buffer */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the value in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c
deleted file mode 100644
index 69c42cb5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_copy_q7.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_copy_q7.c    
-*    
-* Description:	Copies the elements of a Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup copy    
- * @{    
- */
-
-/**    
- * @brief Copies the elements of a Q7 vector.    
- * @param[in]       *pSrc points to input vector    
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the input vector   
- * @return none.    
- *    
- */
-
-void arm_copy_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    /* 4 samples are copied and stored at a time using SIMD */
-    *__SIMD32(pDst)++ = *__SIMD32(pSrc)++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of BasicCopy group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c
deleted file mode 100644
index a284f883..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_f32.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_f32.c    
-*    
-* Description:	Fills a constant value into a floating-point vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup Fill Vector Fill    
- *    
- * Fills the destination vector with a constant value.    
- *    
- * 
    
- * 	pDst[n] = value;   0 <= n < blockSize.    
- * 
    
- *   
- * There are separate functions for floating point, Q31, Q15, and Q7 data types.     
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a floating-point vector.     
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-
-void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  float32_t in1 = value;
-  float32_t in2 = value;
-  float32_t in3 = value;
-  float32_t in4 = value;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c
deleted file mode 100644
index 817b127f..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q15.c
+++ /dev/null
@@ -1,120 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q15.c    
-*    
-* Description:	Fills a constant value into a Q15 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q15 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q15(
-  q15_t value,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t packedValue;                             /* value packed to 32 bits */
-
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Packing two 16 bit values to 32 bit value in order to use SIMD */
-  packedValue = __PKHBT(value, value, 16u);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *__SIMD32(pDst)++ = packedValue;
-    *__SIMD32(pDst)++ = packedValue;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c
deleted file mode 100644
index 0b773c9b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q31.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q31.c    
-*    
-* Description:	Fills a constant value into a Q31 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q31 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q31(
-  q31_t value,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1 = value;
-  q31_t in2 = value;
-  q31_t in3 = value;
-  q31_t in4 = value;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = in1;
-    *pDst++ = in2;
-    *pDst++ = in3;
-    *pDst++ = in4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c
deleted file mode 100644
index 0dde6062..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_fill_q7.c
+++ /dev/null
@@ -1,118 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_fill_q7.c    
-*    
-* Description:	Fills a constant value into a Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup Fill    
- * @{    
- */
-
-/**    
- * @brief Fills a constant value into a Q7 vector.    
- * @param[in]       value input value to be filled   
- * @param[out]      *pDst points to output vector    
- * @param[in]       blockSize length of the output vector   
- * @return none.    
- *    
- */
-
-void arm_fill_q7(
-  q7_t value,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  q31_t packedValue;                             /* value packed to 32 bits */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* Packing four 8 bit values to 32 bit value in order to use SIMD */
-  packedValue = __PACKq7(value, value, value, value);
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *__SIMD32(pDst)++ = packedValue;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of Fill group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c
deleted file mode 100644
index cdc53a54..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q15.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q15.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q15 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- * \par   
- * The equation used for the conversion process is:    
- * 
    
- * 	pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.    
- * 
    
- * \par Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.    
- * \note   
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- *    
- */
-
-
-void arm_float_to_q15(
-  float32_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c
deleted file mode 100644
index a2bf3f5c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q31.c
+++ /dev/null
@@ -1,211 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q31.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q31 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup float_to_x  Convert 32-bit floating point value    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q31 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- *\par Description:    
- * \par   
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.    
- * 
    
- * Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] will be saturated.    
- *   
- * \note In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- */
-
-
-void arm_float_to_q31(
-  float32_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 32768 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c
deleted file mode 100644
index 0497e2b5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_float_to_q7.c
+++ /dev/null
@@ -1,203 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_float_to_q7.c    
-*    
-* Description:	Converts the elements of the floating-point vector to Q7 vector.   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup float_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the floating-point vector to Q7 vector.    
- * @param[in]       *pSrc points to the floating-point input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- *\par Description:    
- * \par   
- * The equation used for the conversion process is:    
- * 
    
- * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.    
- * 
    
- * \par Scaling and Overflow Behavior:    
- * \par    
- * The function uses saturating arithmetic.    
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.    
- * \note   
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro     
- * defined in the preprocessor section of project options.     
- */
-
-
-void arm_float_to_q7(
-  float32_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifdef ARM_MATH_ROUNDING
-
-  float32_t in;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-  while(blkCnt > 0u)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while(blkCnt > 0u)
-  {
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128.0f);
-    in += in > 0 ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q31_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
- * @} end of float_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c
deleted file mode 100644
index 2e9624ac..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_float.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_float.c    
-*    
-* Description:	Converts the elements of the Q15 vector to floating-point vector.     
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q15_to_x  Convert 16-bit Integer value    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-
-
-
-/**    
- * @brief  Converts the elements of the Q15 vector to floating-point vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q15_to_float(
-  q15_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 32768 */
-    /* convert from q15 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 32768 */
-    /* convert from q15 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c
deleted file mode 100644
index 5a34279e..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q31.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_q31.c    
-*    
-* Description:	Converts the elements of the Q15 vector to Q31 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q15 vector to Q31 vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:   
- *   
- * 
    
- * 	pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q15_to_q31(
-  q15_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2;
-  q31_t out1, out2, out3, out4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t)A << 16 */
-    /* convert from q15 to q31 and then store the results in the destination buffer */
-    in1 = *__SIMD32(pIn)++;
-    in2 = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* extract lower 16 bits to 32 bit result */
-    out1 = in1 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out2 = in1 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out3 = in2 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out4 = in2 & 0xFFFF0000;
-
-#else
-
-    /* extract upper 16 bits to 32 bit result */
-    out1 = in1 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out2 = in1 << 16u;
-    /* extract upper 16 bits to 32 bit result */
-    out3 = in2 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out4 = in2 << 16u;
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    *pDst++ = out1;
-    *pDst++ = out2;
-    *pDst++ = out3;
-    *pDst++ = out4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t)A << 16 */
-    /* convert from q15 to q31 and then store the results in the destination buffer */
-    *pDst++ = (q31_t) * pIn++ << 16;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c
deleted file mode 100644
index 9b029a05..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q15_to_q7.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q15_to_q7.c    
-*    
-* Description:	Converts the elements of the Q15 vector to Q7 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q15_to_x    
- * @{    
- */
-
-
-/**    
- * @brief Converts the elements of the Q15 vector to Q7 vector.     
- * @param[in]       *pSrc points to the Q15 input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.    
- * 
   
- *   
- */
-
-
-void arm_q15_to_q7(
-  q15_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2;
-  q31_t out1, out2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 8 */
-    /* convert from q15 to q7 and then store the results in the destination buffer */
-    in1 = *__SIMD32(pIn)++;
-    in2 = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __PKHTB(in2, in1, 16);
-    out2 = __PKHBT(in2, in1, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in1, in2, 16);
-
-#endif //      #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* rotate packed value by 24 */
-    out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
-
-    /* anding with 0xff00ff00 to get two 8 bit values */
-    out1 = out1 & 0xFF00FF00;
-    /* anding with 0x00ff00ff to get two 8 bit values */
-    out2 = out2 & 0x00FF00FF;
-
-    /* oring two values(contains two 8 bit values) to get four packed 8 bit values */
-    out1 = out1 | out2;
-
-    /* store 4 samples at a time to destiantion buffer */
-    *__SIMD32(pDst)++ = out1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 8 */
-    /* convert from q15 to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) (*pIn++ >> 8);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q15_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c
deleted file mode 100644
index 4ea5c269..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_float.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_float.c    
-*    
-* Description:	Converts the elements of the Q31 vector to floating-point vector.      
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q31_to_x  Convert 32-bit Integer value    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to floating-point vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q31_to_float(
-  q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 2147483648 */
-    /* convert from q31 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 2147483648 */
-    /* convert from q31 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c
deleted file mode 100644
index 053c6bac..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q15.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_q15.c    
-*    
-* Description:	Converts the elements of the Q31 vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to Q15 vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *     
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q31_to_q15(
-  q31_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-  q31_t out1, out2;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A >> 16 */
-    /* convert from q31 to q15 and then store the results in the destination buffer */
-    in1 = *pIn++;
-    in2 = *pIn++;
-    in3 = *pIn++;
-    in4 = *pIn++;
-
-    /* pack two higher 16-bit values from two 32-bit values */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __PKHTB(in2, in1, 16);
-    out2 = __PKHTB(in4, in3, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHTB(in3, in4, 16);
-
-#endif //      #ifdef ARM_MATH_BIG_ENDIAN
-
-    *__SIMD32(pDst)++ = out1;
-    *__SIMD32(pDst)++ = out2;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A >> 16 */
-    /* convert from q31 to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) (*pIn++ >> 16);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c
deleted file mode 100644
index 26bfd321..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q31_to_q7.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q31_to_q7.c    
-*    
-* Description:	Converts the elements of the Q31 vector to Q7 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q31_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q31 vector to Q7 vector.    
- * @param[in]       *pSrc points to the Q31 input vector    
- * @param[out]      *pDst points to the Q7 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.     
- * 
    
- *   
- */
-
-
-void arm_q31_to_q7(
-  q31_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-  q31_t in1, in2, in3, in4;
-  q7_t out1, out2, out3, out4;
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 24 */
-    /* convert from q31 to q7 and then store the results in the destination buffer */
-    in1 = *pIn++;
-    in2 = *pIn++;
-    in3 = *pIn++;
-    in4 = *pIn++;
-
-    out1 = (q7_t) (in1 >> 24);
-    out2 = (q7_t) (in2 >> 24);
-    out3 = (q7_t) (in3 >> 24);
-    out4 = (q7_t) (in4 >> 24);
-
-    *__SIMD32(pDst)++ = __PACKq7(out1, out2, out3, out4);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q7_t) A >> 24 */
-    /* convert from q31 to q7 and then store the results in the destination buffer */
-    *pDst++ = (q7_t) (*pIn++ >> 24);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q31_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c
deleted file mode 100644
index c9dff9c3..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_float.c
+++ /dev/null
@@ -1,131 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_float.c    
-*    
-* Description:	Converts the elements of the Q7 vector to floating-point vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @defgroup q7_to_x  Convert 8-bit Integer value    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q7 vector to floating-point vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the floating-point output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *		     
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q7_to_float(
-  q7_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 128 */
-    /* convert from q7 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (float32_t) A / 128 */
-    /* convert from q7 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c
deleted file mode 100644
index 5b935467..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q15.c
+++ /dev/null
@@ -1,157 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_q15.c    
-*    
-* Description:	Converts the elements of the Q7 vector to Q15 vector.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-
-
-
-/**    
- * @brief Converts the elements of the Q7 vector to Q15 vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the Q15 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.    
- * 
    
- *   
- */
-
-
-void arm_q7_to_q15(
-  q7_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-  q31_t in;
-  q31_t in1, in2;
-  q31_t out1, out2;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A << 8 */
-    /* convert from q7 to q15 and then store the results in the destination buffer */
-    in = *__SIMD32(pIn)++;
-
-    /* rotatate in by 8 and extend two q7_t values to q15_t values */
-    in1 = __SXTB16(__ROR(in, 8));
-
-    /* extend remainig two q7_t values to q15_t values */
-    in2 = __SXTB16(in);
-
-    in1 = in1 << 8u;
-    in2 = in2 << 8u;
-
-    in1 = in1 & 0xFF00FF00;
-    in2 = in2 & 0xFF00FF00;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out2 = __PKHTB(in1, in2, 16);
-    out1 = __PKHBT(in2, in1, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in2, in1, 16);
-
-#endif
-
-    *__SIMD32(pDst)++ = out1;
-    *__SIMD32(pDst)++ = out2;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q15_t) A << 8 */
-    /* convert from q7 to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) * pIn++ << 8;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c b/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c
deleted file mode 100644
index 84e47a30..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/SupportFunctions/arm_q7_to_q31.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/* ----------------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:		arm_q7_to_q31.c    
-*    
-* Description:	Converts the elements of the Q7 vector to Q31 vector.  
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* ---------------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupSupport    
- */
-
-/**    
- * @addtogroup q7_to_x    
- * @{    
- */
-
-/**    
- * @brief Converts the elements of the Q7 vector to Q31 vector.    
- * @param[in]       *pSrc points to the Q7 input vector    
- * @param[out]      *pDst points to the Q31 output vector   
- * @param[in]       blockSize length of the input vector    
- * @return none.    
- *    
- * \par Description:    
- *    
- * The equation used for the conversion process is:    
- *   
- * 
    
- * 	pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.   
- * 
     
- *   
- */
-
-
-void arm_q7_to_q31(
-  q7_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  q31_t in;
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /*loop Unrolling */
-  blkCnt = blockSize >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t) A << 24 */
-    /* convert from q7 to q31 and then store the results in the destination buffer */
-    in = *__SIMD32(pIn)++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
-    *pDst++ = (in & 0xFF000000);
-
-#else
-
-    *pDst++ = (in & 0xFF000000);
-    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
-
-#endif //              #ifndef ARM_MATH_BIG_ENDIAN
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4u;
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-  while(blkCnt > 0u)
-  {
-    /* C = (q31_t) A << 24 */
-    /* convert from q7 to q31 and then store the results in the destination buffer */
-    *pDst++ = (q31_t) * pIn++ << 24;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**    
- * @} end of q7_to_x group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c
deleted file mode 100644
index dc62e632..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_bitreversal.c
+++ /dev/null
@@ -1,242 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_bitreversal.c    
-*    
-* Description:	This file has common tables like Bitreverse, reciprocal etc which are used across different functions    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/*    
-* @brief  In-place bit reversal function.   
-* @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.   
-* @param[in]      fftSize      length of the FFT.   
-* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.   
-* @param[in]      *pBitRevTab  points to the bit reversal table.   
-* @return none.   
-*/
-
-void arm_bitreversal_f32(
-float32_t * pSrc,
-uint16_t fftSize,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab)
-{
-   uint16_t fftLenBy2, fftLenBy2p1;
-   uint16_t i, j;
-   float32_t in;
-
-   /*  Initializations */
-   j = 0u;
-   fftLenBy2 = fftSize >> 1u;
-   fftLenBy2p1 = (fftSize >> 1u) + 1u;
-
-   /* Bit Reversal Implementation */
-   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-   {
-      if(i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         in = pSrc[2u * i];
-         pSrc[2u * i] = pSrc[2u * j];
-         pSrc[2u * j] = in;
-
-         /*  pSrc[i+1u] <-> pSrc[j+1u] */
-         in = pSrc[(2u * i) + 1u];
-         pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
-         pSrc[(2u * j) + 1u] = in;
-
-         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-         in = pSrc[2u * (i + fftLenBy2p1)];
-         pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
-         pSrc[2u * (j + fftLenBy2p1)] = in;
-
-         /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
-         in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
-         pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
-         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
-         pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
-
-      }
-
-      /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[2u * (i + 1u)];
-      pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
-      pSrc[2u * (j + fftLenBy2)] = in;
-
-      /*  pSrc[i+2u] <-> pSrc[j+2u] */
-      in = pSrc[(2u * (i + 1u)) + 1u];
-      pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
-      pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTab;
-
-      /*  Updating the bit reversal index depending on the fft length  */
-      pBitRevTab += bitRevFactor;
-   }
-}
-
-
-
-/*    
-* @brief  In-place bit reversal function.   
-* @param[in, out] *pSrc        points to the in-place buffer of Q31 data type.   
-* @param[in]      fftLen       length of the FFT.   
-* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
-* @param[in]      *pBitRevTab  points to bit reversal table.   
-* @return none.   
-*/
-
-void arm_bitreversal_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTable)
-{
-   uint32_t fftLenBy2, fftLenBy2p1, i, j;
-   q31_t in;
-
-   /*  Initializations      */
-   j = 0u;
-   fftLenBy2 = fftLen / 2u;
-   fftLenBy2p1 = (fftLen / 2u) + 1u;
-
-   /* Bit Reversal Implementation */
-   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-   {
-      if(i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         in = pSrc[2u * i];
-         pSrc[2u * i] = pSrc[2u * j];
-         pSrc[2u * j] = in;
-
-         /*  pSrc[i+1u] <-> pSrc[j+1u] */
-         in = pSrc[(2u * i) + 1u];
-         pSrc[(2u * i) + 1u] = pSrc[(2u * j) + 1u];
-         pSrc[(2u * j) + 1u] = in;
-
-         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-         in = pSrc[2u * (i + fftLenBy2p1)];
-         pSrc[2u * (i + fftLenBy2p1)] = pSrc[2u * (j + fftLenBy2p1)];
-         pSrc[2u * (j + fftLenBy2p1)] = in;
-
-         /*  pSrc[i+fftLenBy2p1+1u] <-> pSrc[j+fftLenBy2p1+1u] */
-         in = pSrc[(2u * (i + fftLenBy2p1)) + 1u];
-         pSrc[(2u * (i + fftLenBy2p1)) + 1u] =
-         pSrc[(2u * (j + fftLenBy2p1)) + 1u];
-         pSrc[(2u * (j + fftLenBy2p1)) + 1u] = in;
-
-      }
-
-      /*  pSrc[i+1u] <-> pSrc[j+1u] */
-      in = pSrc[2u * (i + 1u)];
-      pSrc[2u * (i + 1u)] = pSrc[2u * (j + fftLenBy2)];
-      pSrc[2u * (j + fftLenBy2)] = in;
-
-      /*  pSrc[i+2u] <-> pSrc[j+2u] */
-      in = pSrc[(2u * (i + 1u)) + 1u];
-      pSrc[(2u * (i + 1u)) + 1u] = pSrc[(2u * (j + fftLenBy2)) + 1u];
-      pSrc[(2u * (j + fftLenBy2)) + 1u] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTable;
-
-      /*  Updating the bit reversal index depending on the fft length */
-      pBitRevTable += bitRevFactor;
-   }
-}
-
-
-
-/*    
-   * @brief  In-place bit reversal function.   
-   * @param[in, out] *pSrc        points to the in-place buffer of Q15 data type.   
-   * @param[in]      fftLen       length of the FFT.   
-   * @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table   
-   * @param[in]      *pBitRevTab  points to bit reversal table.   
-   * @return none.   
-*/
-
-void arm_bitreversal_q15(
-q15_t * pSrc16,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab)
-{
-   q31_t *pSrc = (q31_t *) pSrc16;
-   q31_t in;
-   uint32_t fftLenBy2, fftLenBy2p1;
-   uint32_t i, j;
-
-   /*  Initializations */
-   j = 0u;
-   fftLenBy2 = fftLen / 2u;
-   fftLenBy2p1 = (fftLen / 2u) + 1u;
-
-   /* Bit Reversal Implementation */
-   for (i = 0u; i <= (fftLenBy2 - 2u); i += 2u)
-   {
-      if(i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         /*  pSrc[i+1u] <-> pSrc[j+1u] */
-         in = pSrc[i];
-         pSrc[i] = pSrc[j];
-         pSrc[j] = in;
-
-         /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
-         /*  pSrc[i + fftLenBy2p1+1u] <-> pSrc[j + fftLenBy2p1+1u] */
-         in = pSrc[i + fftLenBy2p1];
-         pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
-         pSrc[j + fftLenBy2p1] = in;
-      }
-
-      /*  pSrc[i+1u] <-> pSrc[j+fftLenBy2];         */
-      /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1u]  */
-      in = pSrc[i + 1u];
-      pSrc[i + 1u] = pSrc[j + fftLenBy2];
-      pSrc[j + fftLenBy2] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTab;
-
-      /*  Updating the bit reversal index depending on the fft length  */
-      pBitRevTab += bitRevFactor;
-   }
-}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c
deleted file mode 100644
index c287bb9c..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_f32.c
+++ /dev/null
@@ -1,632 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_f32.c   
-*    
-* Description:	Combined Radix Decimation in Frequency CFFT Floating point processing function
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-extern void arm_radix8_butterfly_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    const float32_t * pCoef,
-    uint16_t twidCoefModifier);
-
-extern void arm_bitreversal_32(
-    uint32_t * pSrc,
-    const uint16_t bitRevLen,
-    const uint16_t * pBitRevTable);
-
-/**   
-* @ingroup groupTransforms   
-*/
-
-/**   
-* @defgroup ComplexFFT Complex FFT Functions   
-*   
-* \par
-* The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
-* Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
-* than the DFT, especially for long lengths.
-* The algorithms described in this section
-* operate on complex data.  A separate set of functions is devoted to handling
-* of real sequences.
-* \par
-* There are separate algorithms for handling floating-point, Q15, and Q31 data
-* types.  The algorithms available for each data type are described next.
-* \par
-* The FFT functions operate in-place.  That is, the array holding the input data
-* will also be used to hold the corresponding result.  The input data is complex
-* and contains 2*fftLen interleaved values as shown below.
-* 
 {real[0], imag[0], real[1], imag[1],..} 

-* The FFT result will be contained in the same array and the frequency domain
-* values will have the same interleaving.
-*
-* \par Floating-point
-* The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
-* stages are performed along with a single radix-2 or radix-4 stage, as needed.
-* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-* a different twiddle factor table.  
-* \par
-* The function uses the standard FFT definition and output values may grow by a
-* factor of fftLen when computing the forward transform.  The
-* inverse transform includes a scale of 1/fftLen as part of the
-* calculation and this matches the textbook definition of the inverse FFT.
-* \par
-* Pre-initialized data structures containing twiddle factors and bit reversal
-* tables are provided and defined in arm_const_structs.h.  Include 
-* this header in your function and then pass one of the constant structures as 
-* an argument to arm_cfft_f32.  For example:
-* \par
-* arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)
-* \par
-* computes a 64-point inverse complex FFT including bit reversal.
-* The data structures are treated as constant data and not modified during the
-* calculation.  The same data structure can be reused for multiple transforms
-* including mixing forward and inverse transforms.
-* \par
-* Earlier releases of the library provided separate radix-2 and radix-4
-* algorithms that operated on floating-point data.  These functions are still
-* provided but are deprecated.  The older functions are slower and less general
-* than the new functions.
-* \par
-* An example of initialization of the constants for the arm_cfft_f32 function follows:
-* \code
-* const static arm_cfft_instance_f32 *S;
-* ...
-*   switch (length) {
-*     case 16:
-*       S = &arm_cfft_sR_f32_len16;
-*       break;
-*     case 32:
-*       S = &arm_cfft_sR_f32_len32;
-*       break;
-*     case 64:
-*       S = &arm_cfft_sR_f32_len64;
-*       break;
-*     case 128:
-*       S = &arm_cfft_sR_f32_len128;
-*       break;
-*     case 256:
-*       S = &arm_cfft_sR_f32_len256;
-*       break;
-*     case 512:
-*       S = &arm_cfft_sR_f32_len512;
-*       break;
-*     case 1024:
-*       S = &arm_cfft_sR_f32_len1024;
-*       break;
-*     case 2048:
-*       S = &arm_cfft_sR_f32_len2048;
-*       break;
-*     case 4096:
-*       S = &arm_cfft_sR_f32_len4096;
-*       break;
-*   }
-* \endcode
-* \par Q15 and Q31
-* The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-4
-* stages are performed along with a single radix-2 stage, as needed.
-* The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-* a different twiddle factor table.  
-* \par
-* The function uses the standard FFT definition and output values may grow by a
-* factor of fftLen when computing the forward transform.  The
-* inverse transform includes a scale of 1/fftLen as part of the
-* calculation and this matches the textbook definition of the inverse FFT.
-* \par
-* Pre-initialized data structures containing twiddle factors and bit reversal
-* tables are provided and defined in arm_const_structs.h.  Include 
-* this header in your function and then pass one of the constant structures as 
-* an argument to arm_cfft_q31.  For example:
-* \par
-* arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)
-* \par
-* computes a 64-point inverse complex FFT including bit reversal.
-* The data structures are treated as constant data and not modified during the
-* calculation.  The same data structure can be reused for multiple transforms
-* including mixing forward and inverse transforms.
-* \par
-* Earlier releases of the library provided separate radix-2 and radix-4
-* algorithms that operated on floating-point data.  These functions are still
-* provided but are deprecated.  The older functions are slower and less general
-* than the new functions.
-* \par
-* An example of initialization of the constants for the arm_cfft_q31 function follows:
-* \code
-* const static arm_cfft_instance_q31 *S;
-* ...
-*   switch (length) {
-*     case 16:
-*       S = &arm_cfft_sR_q31_len16;
-*       break;
-*     case 32:
-*       S = &arm_cfft_sR_q31_len32;
-*       break;
-*     case 64:
-*       S = &arm_cfft_sR_q31_len64;
-*       break;
-*     case 128:
-*       S = &arm_cfft_sR_q31_len128;
-*       break;
-*     case 256:
-*       S = &arm_cfft_sR_q31_len256;
-*       break;
-*     case 512:
-*       S = &arm_cfft_sR_q31_len512;
-*       break;
-*     case 1024:
-*       S = &arm_cfft_sR_q31_len1024;
-*       break;
-*     case 2048:
-*       S = &arm_cfft_sR_q31_len2048;
-*       break;
-*     case 4096:
-*       S = &arm_cfft_sR_q31_len4096;
-*       break;
-*   }
-* \endcode
-* 
-*/
-
-void arm_cfft_radix8by2_f32( arm_cfft_instance_f32 * S, float32_t * p1) 
-{
-    uint32_t    L  = S->fftLen;
-    float32_t * pCol1, * pCol2, * pMid1, * pMid2;
-    float32_t * p2 = p1 + L;
-    const float32_t * tw = (float32_t *) S->pTwiddle;
-    float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
-    float32_t m0, m1, m2, m3;
-    uint32_t l;
-
-    pCol1 = p1;
-    pCol2 = p2;
-
-    //    Define new length
-    L >>= 1;
-    //    Initialize mid pointers
-    pMid1 = p1 + L;
-    pMid2 = p2 + L;
-
-    // do two dot Fourier transform
-    for ( l = L >> 2; l > 0; l-- ) 
-    {
-        t1[0] = p1[0];
-        t1[1] = p1[1];
-        t1[2] = p1[2];
-        t1[3] = p1[3];
-
-        t2[0] = p2[0];
-        t2[1] = p2[1];
-        t2[2] = p2[2];
-        t2[3] = p2[3];
-
-        t3[0] = pMid1[0];
-        t3[1] = pMid1[1];
-        t3[2] = pMid1[2];
-        t3[3] = pMid1[3];
-
-        t4[0] = pMid2[0];
-        t4[1] = pMid2[1];
-        t4[2] = pMid2[2];
-        t4[3] = pMid2[3];
-
-        *p1++ = t1[0] + t2[0];
-        *p1++ = t1[1] + t2[1];
-        *p1++ = t1[2] + t2[2];
-        *p1++ = t1[3] + t2[3];    // col 1
-
-        t2[0] = t1[0] - t2[0];
-        t2[1] = t1[1] - t2[1];
-        t2[2] = t1[2] - t2[2];
-        t2[3] = t1[3] - t2[3];    // for col 2
-
-        *pMid1++ = t3[0] + t4[0];
-        *pMid1++ = t3[1] + t4[1];
-        *pMid1++ = t3[2] + t4[2];
-        *pMid1++ = t3[3] + t4[3]; // col 1
-
-        t4[0] = t4[0] - t3[0];
-        t4[1] = t4[1] - t3[1];
-        t4[2] = t4[2] - t3[2];
-        t4[3] = t4[3] - t3[3];    // for col 2
-
-        twR = *tw++;
-        twI = *tw++;
-
-        // multiply by twiddle factors
-        m0 = t2[0] * twR;
-        m1 = t2[1] * twI;
-        m2 = t2[1] * twR;
-        m3 = t2[0] * twI;
-        
-        // R  =  R  *  Tr - I * Ti
-        *p2++ = m0 + m1;
-        // I  =  I  *  Tr + R * Ti
-        *p2++ = m2 - m3;
-        
-        // use vertical symmetry
-        //  0.9988 - 0.0491i <==> -0.0491 - 0.9988i
-        m0 = t4[0] * twI;
-        m1 = t4[1] * twR;
-        m2 = t4[1] * twI;
-        m3 = t4[0] * twR;
-        
-        *pMid2++ = m0 - m1;
-        *pMid2++ = m2 + m3;
-
-        twR = *tw++;
-        twI = *tw++;
-        
-        m0 = t2[2] * twR;
-        m1 = t2[3] * twI;
-        m2 = t2[3] * twR;
-        m3 = t2[2] * twI;
-        
-        *p2++ = m0 + m1;
-        *p2++ = m2 - m3;
-        
-        m0 = t4[2] * twI;
-        m1 = t4[3] * twR;
-        m2 = t4[3] * twI;
-        m3 = t4[2] * twR;
-        
-        *pMid2++ = m0 - m1;
-        *pMid2++ = m2 + m3;
-    }
-
-    // first col
-    arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 2u);
-    // second col
-    arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 2u);
-}
-
-void arm_cfft_radix8by4_f32( arm_cfft_instance_f32 * S, float32_t * p1) 
-{
-    uint32_t    L  = S->fftLen >> 1;
-    float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;
-    const float32_t *tw2, *tw3, *tw4;
-    float32_t * p2 = p1 + L;
-    float32_t * p3 = p2 + L;
-    float32_t * p4 = p3 + L;
-    float32_t t2[4], t3[4], t4[4], twR, twI;
-    float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1;
-    float32_t m0, m1, m2, m3;
-    uint32_t l, twMod2, twMod3, twMod4;
-
-    pCol1 = p1;         // points to real values by default
-    pCol2 = p2;
-    pCol3 = p3;
-    pCol4 = p4;
-    pEnd1 = p2 - 1;     // points to imaginary values by default
-    pEnd2 = p3 - 1;
-    pEnd3 = p4 - 1;
-    pEnd4 = pEnd3 + L;
-
-    tw2 = tw3 = tw4 = (float32_t *) S->pTwiddle;
-
-    L >>= 1;
-
-    // do four dot Fourier transform
-
-    twMod2 = 2;
-    twMod3 = 4;
-    twMod4 = 6;
-
-    // TOP
-    p1ap3_0 = p1[0] + p3[0];
-    p1sp3_0 = p1[0] - p3[0];
-    p1ap3_1 = p1[1] + p3[1];
-    p1sp3_1 = p1[1] - p3[1];
-
-    // col 2
-    t2[0] = p1sp3_0 + p2[1] - p4[1];
-    t2[1] = p1sp3_1 - p2[0] + p4[0];
-    // col 3
-    t3[0] = p1ap3_0 - p2[0] - p4[0];
-    t3[1] = p1ap3_1 - p2[1] - p4[1];
-    // col 4
-    t4[0] = p1sp3_0 - p2[1] + p4[1];
-    t4[1] = p1sp3_1 + p2[0] - p4[0];
-    // col 1
-    *p1++ = p1ap3_0 + p2[0] + p4[0];
-    *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-    // Twiddle factors are ones
-    *p2++ = t2[0];
-    *p2++ = t2[1];
-    *p3++ = t3[0];
-    *p3++ = t3[1];
-    *p4++ = t4[0];
-    *p4++ = t4[1];
-
-    tw2 += twMod2;
-    tw3 += twMod3;
-    tw4 += twMod4;
-
-    for (l = (L - 2) >> 1; l > 0; l-- ) 
-    {
-        // TOP
-        p1ap3_0 = p1[0] + p3[0];
-        p1sp3_0 = p1[0] - p3[0];
-        p1ap3_1 = p1[1] + p3[1];
-        p1sp3_1 = p1[1] - p3[1];
-        // col 2
-        t2[0] = p1sp3_0 + p2[1] - p4[1];
-        t2[1] = p1sp3_1 - p2[0] + p4[0];
-        // col 3
-        t3[0] = p1ap3_0 - p2[0] - p4[0];
-        t3[1] = p1ap3_1 - p2[1] - p4[1];
-        // col 4
-        t4[0] = p1sp3_0 - p2[1] + p4[1];
-        t4[1] = p1sp3_1 + p2[0] - p4[0];
-        // col 1 - top
-        *p1++ = p1ap3_0 + p2[0] + p4[0];
-        *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-        // BOTTOM
-        p1ap3_1 = pEnd1[-1] + pEnd3[-1];
-        p1sp3_1 = pEnd1[-1] - pEnd3[-1];
-        p1ap3_0 = pEnd1[0] + pEnd3[0];
-        p1sp3_0 = pEnd1[0] - pEnd3[0];
-        // col 2
-        t2[2] = pEnd2[0]  - pEnd4[0] + p1sp3_1;
-        t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
-        // col 3
-        t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
-        t3[3] = p1ap3_0 - pEnd2[0]  - pEnd4[0];
-        // col 4
-        t4[2] = pEnd2[0]  - pEnd4[0]  - p1sp3_1;
-        t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
-        // col 1 - Bottom
-        *pEnd1-- = p1ap3_0 + pEnd2[0] + pEnd4[0];
-        *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
-
-        // COL 2
-        // read twiddle factors
-        twR = *tw2++;
-        twI = *tw2++;
-        // multiply by twiddle factors
-        //  let    Z1 = a + i(b),   Z2 = c + i(d)
-        //   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d)
-        
-        // Top
-        m0 = t2[0] * twR;
-        m1 = t2[1] * twI;
-        m2 = t2[1] * twR;
-        m3 = t2[0] * twI;
-        
-        *p2++ = m0 + m1;
-        *p2++ = m2 - m3;
-        // use vertical symmetry col 2
-        // 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i
-        // Bottom
-        m0 = t2[3] * twI;
-        m1 = t2[2] * twR;
-        m2 = t2[2] * twI;
-        m3 = t2[3] * twR;
-        
-        *pEnd2-- = m0 - m1;
-        *pEnd2-- = m2 + m3;
-
-        // COL 3
-        twR = tw3[0];
-        twI = tw3[1];
-        tw3 += twMod3;
-        // Top
-        m0 = t3[0] * twR;
-        m1 = t3[1] * twI;
-        m2 = t3[1] * twR;
-        m3 = t3[0] * twI;
-        
-        *p3++ = m0 + m1;
-        *p3++ = m2 - m3;
-        // use vertical symmetry col 3
-        // 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i
-        // Bottom
-        m0 = -t3[3] * twR;
-        m1 = t3[2] * twI;
-        m2 = t3[2] * twR;
-        m3 = t3[3] * twI;
-        
-        *pEnd3-- = m0 - m1;
-        *pEnd3-- = m3 - m2;
-        
-        // COL 4
-        twR = tw4[0];
-        twI = tw4[1];
-        tw4 += twMod4;
-        // Top
-        m0 = t4[0] * twR;
-        m1 = t4[1] * twI;
-        m2 = t4[1] * twR;
-        m3 = t4[0] * twI;
-        
-        *p4++ = m0 + m1;
-        *p4++ = m2 - m3;
-        // use vertical symmetry col 4
-        // 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i
-        // Bottom
-        m0 = t4[3] * twI;
-        m1 = t4[2] * twR;
-        m2 = t4[2] * twI;
-        m3 = t4[3] * twR;
-        
-        *pEnd4-- = m0 - m1;
-        *pEnd4-- = m2 + m3;
-    }
-
-    //MIDDLE
-    // Twiddle factors are 
-    //  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i
-    p1ap3_0 = p1[0] + p3[0];
-    p1sp3_0 = p1[0] - p3[0];
-    p1ap3_1 = p1[1] + p3[1];
-    p1sp3_1 = p1[1] - p3[1];
-
-    // col 2
-    t2[0] = p1sp3_0 + p2[1] - p4[1];
-    t2[1] = p1sp3_1 - p2[0] + p4[0];
-    // col 3
-    t3[0] = p1ap3_0 - p2[0] - p4[0];
-    t3[1] = p1ap3_1 - p2[1] - p4[1];
-    // col 4
-    t4[0] = p1sp3_0 - p2[1] + p4[1];
-    t4[1] = p1sp3_1 + p2[0] - p4[0];
-    // col 1 - Top
-    *p1++ = p1ap3_0 + p2[0] + p4[0];
-    *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-    // COL 2
-    twR = tw2[0];
-    twI = tw2[1];
-
-    m0 = t2[0] * twR;
-    m1 = t2[1] * twI;
-    m2 = t2[1] * twR;
-    m3 = t2[0] * twI;
-
-    *p2++ = m0 + m1;
-    *p2++ = m2 - m3;
-    // COL 3
-    twR = tw3[0];
-    twI = tw3[1];
-
-    m0 = t3[0] * twR;
-    m1 = t3[1] * twI;
-    m2 = t3[1] * twR;
-    m3 = t3[0] * twI;
-
-    *p3++ = m0 + m1;
-    *p3++ = m2 - m3;
-    // COL 4
-    twR = tw4[0];
-    twI = tw4[1];
-
-    m0 = t4[0] * twR;
-    m1 = t4[1] * twI;
-    m2 = t4[1] * twR;
-    m3 = t4[0] * twI;
-
-    *p4++ = m0 + m1;
-    *p4++ = m2 - m3;
-
-    // first col
-    arm_radix8_butterfly_f32( pCol1, L, (float32_t *) S->pTwiddle, 4u);
-    // second col
-    arm_radix8_butterfly_f32( pCol2, L, (float32_t *) S->pTwiddle, 4u);
-    // third col
-    arm_radix8_butterfly_f32( pCol3, L, (float32_t *) S->pTwiddle, 4u);
-    // fourth col
-    arm_radix8_butterfly_f32( pCol4, L, (float32_t *) S->pTwiddle, 4u);
-}
-
-/**
-* @addtogroup ComplexFFT   
-* @{   
-*/
-
-/**   
-* @details   
-* @brief       Processing function for the floating-point complex FFT.
-* @param[in]      *S    points to an instance of the floating-point CFFT structure.  
-* @param[in, out] *p1   points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return none.  
-*/
-
-void arm_cfft_f32( 
-    const arm_cfft_instance_f32 * S, 
-    float32_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
-{
-    uint32_t  L = S->fftLen, l;
-    float32_t invL, * pSrc;
-
-    if(ifftFlag == 1u)
-    {
-        /*  Conjugate input data  */
-        pSrc = p1 + 1;
-        for(l=0; lpTwiddle, 1);
-        break;
-    }  
-
-    if( bitReverseFlag )
-        arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);
-
-    if(ifftFlag == 1u)
-    {
-        invL = 1.0f/(float32_t)L;
-        /*  Conjugate and scale output data */
-        pSrc = p1;
-        for(l=0; l2*fftLen. Processing occurs in-place.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return none.  
-*/
-
-void arm_cfft_q15( 
-    const arm_cfft_instance_q15 * S, 
-    q15_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
-{
-    uint32_t L = S->fftLen;
-
-    if(ifftFlag == 1u)
-    {
-        switch (L) 
-        {
-        case 16: 
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_inverse_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
-            break;
-            
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_inverse_q15  ( p1, L, S->pTwiddle );
-            break;
-        }  
-    }
-    else
-    {
-        switch (L) 
-        {
-        case 16: 
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
-            break;
-            
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_q15  ( p1, L, S->pTwiddle );
-            break;
-        }  
-    }
-    
-    if( bitReverseFlag )
-        arm_bitreversal_16((uint16_t*)p1,S->bitRevLength,S->pBitRevTable);    
-}
-
-/**    
-* @} end of ComplexFFT group    
-*/
-
-void arm_cfft_radix4by2_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    const q15_t * pCoef) 
-{    
-    uint32_t i;
-    uint32_t n2;
-    q15_t p0, p1, p2, p3;
-#ifndef ARM_MATH_CM0_FAMILY
-    q31_t T, S, R;
-    q31_t coeff, out1, out2;
-    const q15_t *pC = pCoef;
-    q15_t *pSi = pSrc;
-    q15_t *pSl = pSrc + fftLen;
-#else
-    uint32_t ia, l;
-    q15_t xt, yt, cosVal, sinVal;
-#endif
-    
-    n2 = fftLen >> 1; 
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    for (i = n2; i > 0; i--)
-    {
-        coeff = _SIMD32_OFFSET(pC);
-        pC += 2;
-
-        T = _SIMD32_OFFSET(pSi);
-        T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
-
-        S = _SIMD32_OFFSET(pSl);
-        S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSi) = __SHADD16(T, S);
-        pSi += 2;
-
-    #ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-
-    #else
-
-        out1 = __SMUSDX(R, coeff) >> 16u;
-        out2 = __SMUAD(coeff, R);
-
-    #endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSl) =
-        (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-        pSl += 2;
-    } 
-    
-#else //    #ifndef ARM_MATH_CM0_FAMILY
-    
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[ia * 2];
-        sinVal = pCoef[(ia * 2) + 1];
-        ia++;
-        
-        l = i + n2;        
-        
-        xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-        pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-        
-        yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-        pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                  ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                       ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-    } 
-    
-#endif //    #ifndef ARM_MATH_CM0_FAMILY
-    
-    // first col
-    arm_radix4_butterfly_q15( pSrc, n2, (q15_t*)pCoef, 2u);
-    // second col
-    arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2u);
-			
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        p2 = pSrc[4*i+2];
-        p3 = pSrc[4*i+3];
-        
-        p0 <<= 1;
-        p1 <<= 1;
-        p2 <<= 1;
-        p3 <<= 1;
-        
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = p2;
-        pSrc[4*i+3] = p3;
-    }
-}
-
-void arm_cfft_radix4by2_inverse_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    const q15_t * pCoef) 
-{    
-    uint32_t i;
-    uint32_t n2;
-    q15_t p0, p1, p2, p3;
-#ifndef ARM_MATH_CM0_FAMILY
-    q31_t T, S, R;
-    q31_t coeff, out1, out2;
-    const q15_t *pC = pCoef;
-    q15_t *pSi = pSrc;
-    q15_t *pSl = pSrc + fftLen;
-#else
-    uint32_t ia, l;
-    q15_t xt, yt, cosVal, sinVal;
-#endif
-    
-    n2 = fftLen >> 1; 
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    for (i = n2; i > 0; i--)
-    {
-        coeff = _SIMD32_OFFSET(pC);
-        pC += 2;
-
-        T = _SIMD32_OFFSET(pSi);
-        T = __SHADD16(T, 0); // this is just a SIMD arithmetic shift right by 1
-
-        S = _SIMD32_OFFSET(pSl);
-        S = __SHADD16(S, 0); // this is just a SIMD arithmetic shift right by 1
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSi) = __SHADD16(T, S);
-        pSi += 2;
-
-    #ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-    #else
-
-        out1 = __SMUADX(R, coeff) >> 16u;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-
-    #endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSl) =
-        (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);        
-        pSl += 2;
-    } 
-    
-#else //    #ifndef ARM_MATH_CM0_FAMILY
-
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[ia * 2];
-        sinVal = pCoef[(ia * 2) + 1];
-        ia++;
-        
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-        pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-        
-        yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-        pSrc[2 * i + 1] =
-          ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-        
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-        
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-    } 
-    
-#endif //    #ifndef ARM_MATH_CM0_FAMILY
-
-    // first col
-    arm_radix4_butterfly_inverse_q15( pSrc, n2, (q15_t*)pCoef, 2u);
-    // second col
-    arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2u);
-			
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        p2 = pSrc[4*i+2];
-        p3 = pSrc[4*i+3];
-        
-        p0 <<= 1;
-        p1 <<= 1;
-        p2 <<= 1;
-        p3 <<= 1;
-        
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = p2;
-        pSrc[4*i+3] = p3;
-    }
-}
-
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c
deleted file mode 100644
index 401825b7..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_q31.c
+++ /dev/null
@@ -1,264 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_q31.c   
-*    
-* Description:	Combined Radix Decimation in Frequency CFFT fixed point processing function
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-extern void arm_radix4_butterfly_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pCoef,
-    uint32_t twidCoefModifier);
-
-extern void arm_radix4_butterfly_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pCoef,
-    uint32_t twidCoefModifier);
-
-extern void arm_bitreversal_32(
-    uint32_t * pSrc,
-    const uint16_t bitRevLen,
-    const uint16_t * pBitRevTable);
-    
-void arm_cfft_radix4by2_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef);
-    
-void arm_cfft_radix4by2_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef);
-
-/**   
-* @ingroup groupTransforms   
-*/
-
-/**
-* @addtogroup ComplexFFT   
-* @{   
-*/
-
-/**   
-* @details   
-* @brief       Processing function for the fixed-point complex FFT in Q31 format.
-* @param[in]      *S    points to an instance of the fixed-point CFFT structure.  
-* @param[in, out] *p1   points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return none.  
-*/
-
-void arm_cfft_q31( 
-    const arm_cfft_instance_q31 * S, 
-    q31_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag)
-{
-    uint32_t L = S->fftLen;
-
-    if(ifftFlag == 1u)
-    {
-        switch (L) 
-        {
-        case 16: 
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_inverse_q31  ( p1, L, (q31_t*)S->pTwiddle, 1 );
-            break;
-            
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_inverse_q31  ( p1, L, S->pTwiddle );
-            break;
-        }  
-    }
-    else
-    {
-        switch (L) 
-        {
-        case 16: 
-        case 64:
-        case 256:
-        case 1024:
-        case 4096:
-            arm_radix4_butterfly_q31  ( p1, L, (q31_t*)S->pTwiddle, 1 );
-            break;
-            
-        case 32:
-        case 128:
-        case 512:
-        case 2048:
-            arm_cfft_radix4by2_q31  ( p1, L, S->pTwiddle );
-            break;
-        }  
-    }
-    
-    if( bitReverseFlag )
-        arm_bitreversal_32((uint32_t*)p1,S->bitRevLength,S->pBitRevTable);    
-}
-
-/**    
-* @} end of ComplexFFT group    
-*/
-
-void arm_cfft_radix4by2_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef) 
-{    
-    uint32_t i, l;
-    uint32_t n2, ia;
-    q31_t xt, yt, cosVal, sinVal;
-    q31_t p0, p1;
-    
-    n2 = fftLen >> 1;    
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[2*ia];
-        sinVal = pCoef[2*ia + 1];
-        ia++;
-        
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 2) - (pSrc[2 * l] >> 2);
-        pSrc[2 * i] = (pSrc[2 * i] >> 2) + (pSrc[2 * l] >> 2);
-        
-        yt = (pSrc[2 * i + 1] >> 2) - (pSrc[2 * l + 1] >> 2);
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2) + (pSrc[2 * i + 1] >> 2);
-        
-        mult_32x32_keep32_R(p0, xt, cosVal);
-        mult_32x32_keep32_R(p1, yt, cosVal);
-        multAcc_32x32_keep32_R(p0, yt, sinVal); 
-        multSub_32x32_keep32_R(p1, xt, sinVal);
-        
-        pSrc[2u * l] = p0 << 1;
-        pSrc[2u * l + 1u] = p1 << 1;
-    
-    }
-
-    // first col
-    arm_radix4_butterfly_q31( pSrc, n2, (q31_t*)pCoef, 2u);
-    // second col
-    arm_radix4_butterfly_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2u);
-			
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        xt = pSrc[4*i+2];
-        yt = pSrc[4*i+3];
-        
-        p0 <<= 1;
-        p1 <<= 1;
-        xt <<= 1;
-        yt <<= 1;
-        
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = xt;
-        pSrc[4*i+3] = yt;
-    }
-
-}
-
-void arm_cfft_radix4by2_inverse_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    const q31_t * pCoef) 
-{    
-    uint32_t i, l;
-    uint32_t n2, ia;
-    q31_t xt, yt, cosVal, sinVal;
-    q31_t p0, p1;
-    
-    n2 = fftLen >> 1;    
-    ia = 0;
-    for (i = 0; i < n2; i++)
-    {
-        cosVal = pCoef[2*ia];
-        sinVal = pCoef[2*ia + 1];
-        ia++;
-        
-        l = i + n2;
-        xt = (pSrc[2 * i] >> 2) - (pSrc[2 * l] >> 2);
-        pSrc[2 * i] = (pSrc[2 * i] >> 2) + (pSrc[2 * l] >> 2);
-        
-        yt = (pSrc[2 * i + 1] >> 2) - (pSrc[2 * l + 1] >> 2);
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2) + (pSrc[2 * i + 1] >> 2);
-        
-        mult_32x32_keep32_R(p0, xt, cosVal);
-        mult_32x32_keep32_R(p1, yt, cosVal);
-        multSub_32x32_keep32_R(p0, yt, sinVal); 
-        multAcc_32x32_keep32_R(p1, xt, sinVal);
-        
-        pSrc[2u * l] = p0 << 1;
-        pSrc[2u * l + 1u] = p1 << 1;
-    
-    }
-
-    // first col
-    arm_radix4_butterfly_inverse_q31( pSrc, n2, (q31_t*)pCoef, 2u);
-    // second col
-    arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2u);
-			
-    for (i = 0; i < fftLen >> 1; i++)
-    {
-        p0 = pSrc[4*i+0];
-        p1 = pSrc[4*i+1];
-        xt = pSrc[4*i+2];
-        yt = pSrc[4*i+3];
-        
-        p0 <<= 1;
-        p1 <<= 1;
-        xt <<= 1;
-        yt <<= 1;
-        
-        pSrc[4*i+0] = p0;
-        pSrc[4*i+1] = p1;
-        pSrc[4*i+2] = xt;
-        pSrc[4*i+3] = yt;
-    }
-}
-
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c
deleted file mode 100644
index b0632aca..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_f32.c
+++ /dev/null
@@ -1,485 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_f32.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pCoef,
-  uint16_t twidCoefModifier,
-  float32_t onebyfftLen);
-
-extern void arm_bitreversal_f32(
-    float32_t * pSrc,
-    uint16_t fftSize,
-    uint16_t bitRevFactor,
-    uint16_t * pBitRevTab);
-
-/**   
-* @ingroup groupTransforms   
-*/
-
-/**   
-* @addtogroup ComplexFFT   
-* @{   
-*/
-
-/**   
-* @details
-* @brief Radix-2 CFFT/CIFFT.
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in]      *S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure.  
-* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
-* @return none.
-*/
-
-void arm_cfft_radix2_f32(
-const arm_cfft_radix2_instance_f32 * S,
-float32_t * pSrc)
-{
-
-   if(S->ifftFlag == 1u)
-   {
-      /*  Complex IFFT radix-2  */
-      arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier, S->onebyfftLen);
-   }
-   else
-   {
-      /*  Complex FFT radix-2  */
-      arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier);
-   }
-
-   if(S->bitReverseFlag == 1u)
-   {
-      /*  Bit Reversal */
-      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-   }
-
-}
-
-
-/**    
-* @} end of ComplexFFT group    
-*/
-
-
-
-/* ----------------------------------------------------------------------    
-** Internal helper function used by the FFTs    
-** ------------------------------------------------------------------- */
-
-/*    
-* @brief  Core function for the floating-point CFFT butterfly process.   
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
-* @param[in]      fftLen           length of the FFT.   
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.   
-*/
-
-void arm_radix2_butterfly_f32(
-float32_t * pSrc,
-uint32_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier)
-{
-
-   uint32_t i, j, k, l;
-   uint32_t n1, n2, ia;
-   float32_t xt, yt, cosVal, sinVal;
-   float32_t p0, p1, p2, p3;
-   float32_t a0, a1;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-   /*  Initializations for the first stage */
-   n2 = fftLen >> 1;
-   ia = 0;
-   i = 0;
-
-   // loop for groups 
-   for (k = n2; k > 0; k--)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-
-      /*  Twiddle coefficients index modifier */
-      ia += twidCoefModifier;
-
-      /*  index calculation for the input as, */
-      /*  pSrc[i + 0], pSrc[i + fftLen/1] */
-      l = i + n2;
-
-      /*  Butterfly implementation */
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-      
-      p0 = xt * cosVal;
-      p1 = yt * sinVal;
-      p2 = yt * cosVal;
-      p3 = xt * sinVal;  
-      
-      pSrc[2 * i]     = a0;   
-      pSrc[2 * i + 1] = a1;       
-      
-      pSrc[2 * l]     = p0 + p1;
-      pSrc[2 * l + 1] = p2 - p3;
-      
-      i++;
-   }                             // groups loop end 
-
-   twidCoefModifier <<= 1u;
-
-   // loop for stage 
-   for (k = n2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-            
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;  
-            
-            pSrc[2 * i] = a0;   
-            pSrc[2 * i + 1] = a1;       
-            
-            pSrc[2 * l]     = p0 + p1;
-            pSrc[2 * l + 1] = p2 - p3;
-            
-            i += n1;
-         } while( i < fftLen );                        // butterfly loop end 
-         j++;
-      } while( j < n2);                          // groups loop end 
-      twidCoefModifier <<= 1u;
-   }                             // stages loop end 
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += 2)
-   {
-      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
-      xt = pSrc[2 * i] - pSrc[2 * i + 2];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
-      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
-      
-      pSrc[2 * i] = a0;   
-      pSrc[2 * i + 1] = a1;
-      pSrc[2 * i + 2] = xt;
-      pSrc[2 * i + 3] = yt;
-   }                             // groups loop end 
-
-#else
- 
-   n2 = fftLen;
-
-   // loop for stage 
-   for (k = fftLen; k > 1; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-            
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;  
-            
-            pSrc[2 * i] = a0;   
-            pSrc[2 * i + 1] = a1;       
-            
-            pSrc[2 * l]     = p0 + p1;
-            pSrc[2 * l + 1] = p2 - p3;
-            
-            i += n1;
-         } while(i < fftLen);
-         j++;
-      } while(j < n2);
-      twidCoefModifier <<= 1u;
-   }
-
-#endif //    #ifndef ARM_MATH_CM0_FAMILY
-
-}
-
-
-void arm_radix2_butterfly_inverse_f32(
-float32_t * pSrc,
-uint32_t fftLen,
-float32_t * pCoef,
-uint16_t twidCoefModifier,
-float32_t onebyfftLen)
-{
-
-   uint32_t i, j, k, l;
-   uint32_t n1, n2, ia;
-   float32_t xt, yt, cosVal, sinVal;
-   float32_t p0, p1, p2, p3;
-   float32_t a0, a1;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-   n2 = fftLen >> 1;
-   ia = 0;
-
-   // loop for groups 
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia += twidCoefModifier;
-
-      l = i + n2;
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-      
-      p0 = xt * cosVal;
-      p1 = yt * sinVal;
-      p2 = yt * cosVal;
-      p3 = xt * sinVal;  
-      
-      pSrc[2 * i] = a0;   
-      pSrc[2 * i + 1] = a1;       
-      
-      pSrc[2 * l]     = p0 - p1;
-      pSrc[2 * l + 1] = p2 + p3;  
-   }                             // groups loop end 
-
-   twidCoefModifier <<= 1u;
-
-   // loop for stage 
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-            
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;  
-            
-            pSrc[2 * i] = a0;   
-            pSrc[2 * i + 1] = a1;       
-            
-            pSrc[2 * l]     = p0 - p1;
-            pSrc[2 * l + 1] = p2 + p3; 
-
-            i += n1;
-         } while( i < fftLen );                 // butterfly loop end 
-         j++;
-      } while(j < n2);                      // groups loop end 
-
-      twidCoefModifier <<= 1u;
-   }                             // stages loop end 
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += 2)
-   {   
-      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
-      xt = pSrc[2 * i] - pSrc[2 * i + 2];
-      
-      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
-      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
-      
-      p0 = a0 * onebyfftLen;
-      p2 = xt * onebyfftLen;
-      p1 = a1 * onebyfftLen;
-      p3 = yt * onebyfftLen; 
-      
-      pSrc[2 * i] = p0;
-      pSrc[2 * i + 1] = p1;  
-      pSrc[2 * i + 2] = p2;       
-      pSrc[2 * i + 3] = p3;
-   }                             // butterfly loop end 
-
-#else
-
-   n2 = fftLen;
-
-   // loop for stage 
-   for (k = fftLen; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-            
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;  
-            
-            pSrc[2 * i] = a0;   
-            pSrc[2 * i + 1] = a1;       
-            
-            pSrc[2 * l]     = p0 - p1;
-            pSrc[2 * l + 1] = p2 + p3;  
-            
-            i += n1;
-         } while( i < fftLen );                    // butterfly loop end 
-         j++;
-      } while( j < n2 );                      // groups loop end 
-
-      twidCoefModifier = twidCoefModifier << 1u;
-   }                             // stages loop end 
-
-   n1 = n2;
-   n2 = n2 >> 1;
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-      
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      
-      p0 = a0 * onebyfftLen;
-      p2 = xt * onebyfftLen;
-      p1 = a1 * onebyfftLen;
-      p3 = yt * onebyfftLen; 
-      
-      pSrc[2 * i] = p0;
-      pSrc[2u * l] = p2;
-     
-      pSrc[2 * i + 1] = p1;    
-      pSrc[2u * l + 1u] = p3;
-   }                             // butterfly loop end 
-
-#endif //      #ifndef ARM_MATH_CM0_FAMILY
-
-}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
deleted file mode 100644
index 64fd9560..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix4_init_f32.c   
-*   
-* Description:	Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup ComplexFFT   
- * @{   
- */
-
-/**   
-* @brief  Initialization function for the floating-point CFFT/CIFFT.  
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.  
-* @param[in]     fftLen         length of the FFT.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-arm_status arm_cfft_radix2_init_f32(
-  arm_cfft_radix2_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (float32_t *) twiddleCoef;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.000244140625;
-    break;
-
-  case 2048u:
-    /*  Initializations of structure parameters for 2048 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.00048828125;
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.0009765625f;
-    break;
-
-  case 512u:
-    /*  Initializations of structure parameters for 512 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 8u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 8u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.001953125;
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    S->onebyfftLen = 0.00390625f;
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-    S->onebyfftLen = 0.0078125;
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    S->onebyfftLen = 0.015625f;
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-    S->onebyfftLen = 0.03125;
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    S->onebyfftLen = 0.0625f;
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**   
- * @} end of ComplexFFT group   
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
deleted file mode 100644
index 1577c5e3..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5   
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix2_init_q15.c    
-*    
-* Description:	Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-/**   
-* @brief Initialization function for the Q15 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
-* @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-
-arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-
-    break;
-
-  case 2048u:
-    /*  Initializations of structure parameters for 2048 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-    S->twidCoefModifier = 4u;
-    S->bitRevFactor = 4u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-
-    break;
-
-  case 512u:
-    /*  Initializations of structure parameters for 512 point FFT */
-    S->twidCoefModifier = 8u;
-    S->bitRevFactor = 8u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 32 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
deleted file mode 100644
index 61ebaad5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_init_q31.c   
-*   
-* Description:	Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup ComplexFFT   
- * @{   
- */
-
-
-/**    
-*    
-* @brief  Initialization function for the Q31 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.  
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.  
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.   
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated  
-* \par   
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.   
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par   
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-
-arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of Instance structure depending on the FFT length */
-  switch (S->fftLen)
-  {
-    /*  Initializations of structure parameters for 4096 point FFT */
-  case 4096u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    break;
-
-    /*  Initializations of structure parameters for 2048 point FFT */
-  case 2048u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-    break;
-
-    /*  Initializations of structure parameters for 1024 point FFT */
-  case 1024u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    break;
-
-    /*  Initializations of structure parameters for 512 point FFT */
-  case 512u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 8u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 8u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    break;
-
-  case 128u:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32u;
-    S->bitRevFactor = 32u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    break;
-
-  case 32u:
-    /*  Initializations of structure parameters for 32 point FFT */
-    S->twidCoefModifier = 128u;
-    S->bitRevFactor = 128u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**   
- * @} end of ComplexFFT group   
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c
deleted file mode 100644
index ad05e1ec..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q15.c
+++ /dev/null
@@ -1,742 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_q15.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier);
-	
-void arm_bitreversal_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup ComplexFFT   
- * @{   
- */
-
-/**   
- * @details   
- * @brief Processing function for the fixed-point CFFT/CIFFT.  
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
- * @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.  
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
- * @return none.  
- */
-
-void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc)
-{
-
-  if(S->ifftFlag == 1u)
-  {
-    arm_radix2_butterfly_inverse_q15(pSrc, S->fftLen,
-                                     S->pTwiddle, S->twidCoefModifier);
-  }
-  else
-  {
-    arm_radix2_butterfly_q15(pSrc, S->fftLen,
-                             S->pTwiddle, S->twidCoefModifier);
-  }
-
-  arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**   
- * @} end of ComplexFFT group   
- */
-
-void arm_radix2_butterfly_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t in;
-  q31_t T, S, R;
-  q31_t coeff, out1, out2;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUAD(coeff, R) >> 16;
-    out2 = __SMUSDX(coeff, R);
-
-#else
-
-    out1 = __SMUSDX(R, coeff) >> 16u;
-    out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    i++;
-    l++;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUAD(coeff, R) >> 16;
-    out2 = __SMUSDX(coeff, R);
-
-#else
-
-    out1 = __SMUSDX(R, coeff) >> 16u;
-    out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-
-#else
-
-        out1 = __SMUSDX(R, coeff) >> 16u;
-        out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        i += n1;
-
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-
-#else
-
-        out1 = __SMUSDX(R, coeff) >> 16u;
-        out2 = __SMUAD(coeff, R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-    i += n1;
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-  }                             // groups loop end 
-
-
-#else
-
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t xt, yt, cosVal, sinVal;
-
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-
-      yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-      pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                      ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-      pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                             ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-#endif //             #ifndef ARM_MATH_CM0_FAMILY
-
-}
-
-
-void arm_radix2_butterfly_inverse_q15(
-  q15_t * pSrc,
-  uint32_t fftLen,
-  q15_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-#ifndef ARM_MATH_CM0_FAMILY
-
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t in;
-  q31_t T, S, R;
-  q31_t coeff, out1, out2;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (i = 0; i < n2; i++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUSD(coeff, R) >> 16;
-    out2 = __SMUADX(coeff, R);
-#else
-
-    out1 = __SMUADX(R, coeff) >> 16u;
-    out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    i++;
-    l++;
-
-    T = _SIMD32_OFFSET(pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = _SIMD32_OFFSET(pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __SMUSD(coeff, R) >> 16;
-    out2 = __SMUADX(coeff, R);
-#else
-
-    out1 = __SMUADX(R, coeff) >> 16u;
-    out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-    _SIMD32_OFFSET(pSrc + (2u * l)) =
-      (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-
-#else
-
-        out1 = __SMUADX(R, coeff) >> 16u;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-        i += n1;
-
-        l = i + n2;
-
-        T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-        S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        _SIMD32_OFFSET(pSrc + (2 * i)) = __SHADD16(T, S);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-#else
-
-        out1 = __SMUADX(R, coeff) >> 16u;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-
-#endif //     #ifndef ARM_MATH_BIG_ENDIAN
-
-        _SIMD32_OFFSET(pSrc + (2u * l)) =
-          (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF);
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    coeff = _SIMD32_OFFSET(pCoef + (ia * 2u));
-
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-
-      T = _SIMD32_OFFSET(pSrc + (2 * i));
-
-      S = _SIMD32_OFFSET(pSrc + (2 * l));
-
-      R = __QSUB16(T, S);
-
-      _SIMD32_OFFSET(pSrc + (2 * i)) = __QADD16(T, S);
-
-      _SIMD32_OFFSET(pSrc + (2u * l)) = R;
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-#else
-
-
-  unsigned i, j, k, l;
-  unsigned n1, n2, ia;
-  q15_t xt, yt, cosVal, sinVal;
-
-  //N = fftLen; 
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups 
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    // loop for butterfly 
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-
-      yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-      pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                      ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-      pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-    }                           // butterfly loop end 
-
-  }                             // groups loop end 
-
-  twidCoefModifier = twidCoefModifier << 1u;
-
-  // loop for stage 
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    // loop for groups 
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      // loop for butterfly 
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-        pSrc[2u * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2u * l + 1u] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                             ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-      }                         // butterfly loop end 
-
-    }                           // groups loop end 
-
-    twidCoefModifier = twidCoefModifier << 1u;
-  }                             // stages loop end 
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[ia * 2];
-  sinVal = pCoef[(ia * 2) + 1];
-
-  ia = ia + twidCoefModifier;
-
-  // loop for butterfly 
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2u * l] = xt;
-
-    pSrc[2u * l + 1u] = yt;
-
-  }                             // groups loop end 
-
-
-#endif //             #ifndef ARM_MATH_CM0_FAMILY
-
-}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c
deleted file mode 100644
index e72408f2..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix2_q31.c
+++ /dev/null
@@ -1,351 +0,0 @@
-/* ----------------------------------------------------------------------   
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.   
-*   
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*   
-* Project: 	    CMSIS DSP Library   
-* Title:	    arm_cfft_radix2_q31.c   
-*   
-* Description:	Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function   
-*   
-*   
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint16_t twidCoefModifier);
-
-void arm_bitreversal_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  uint16_t bitRevFactor,
-  uint16_t * pBitRevTab);
-
-/**   
-* @ingroup groupTransforms   
-*/
-
-/**   
-* @addtogroup ComplexFFT   
-* @{   
-*/
-
-/**   
-* @details   
-* @brief Processing function for the fixed-point CFFT/CIFFT.  
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in]      *S    points to an instance of the fixed-point CFFT/CIFFT structure.  
-* @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.  
-* @return none.  
-*/
-
-void arm_cfft_radix2_q31(
-const arm_cfft_radix2_instance_q31 * S,
-q31_t * pSrc)
-{
-
-   if(S->ifftFlag == 1u)
-   {
-      arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen,
-      S->pTwiddle, S->twidCoefModifier);
-   }
-   else
-   {
-      arm_radix2_butterfly_q31(pSrc, S->fftLen,
-      S->pTwiddle, S->twidCoefModifier);
-   }
-
-   arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**   
-* @} end of ComplexFFT group   
-*/
-
-void arm_radix2_butterfly_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint16_t twidCoefModifier)
-{
-
-   unsigned i, j, k, l, m;
-   unsigned n1, n2, ia;
-   q31_t xt, yt, cosVal, sinVal;
-   q31_t p0, p1;
-
-   //N = fftLen; 
-   n2 = fftLen;
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   // loop for groups 
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-      
-      yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-      mult_32x32_keep32_R(p0, xt, cosVal);
-      mult_32x32_keep32_R(p1, yt, cosVal);
-      multAcc_32x32_keep32_R(p0, yt, sinVal); 
-      multSub_32x32_keep32_R(p1, xt, sinVal);
-      
-      pSrc[2u * l] = p0;
-      pSrc[2u * l + 1u] = p1;
-
-   }                             // groups loop end 
-
-   twidCoefModifier <<= 1u;
-
-   // loop for stage 
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      for (j = 0; j < n2; j++)
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly 
-         i = j;
-         m = fftLen / n1;
-         do
-         {
-            l = i + n2;
-            xt = pSrc[2 * i] - pSrc[2 * l];
-            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-            
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-            mult_32x32_keep32_R(p0, xt, cosVal);
-            mult_32x32_keep32_R(p1, yt, cosVal);
-            multAcc_32x32_keep32_R(p0, yt, sinVal);
-            multSub_32x32_keep32_R(p1, xt, sinVal);
-            
-            pSrc[2u * l] = p0;
-            pSrc[2u * l + 1u] = p1;
-            i += n1;
-            m--;
-         } while( m > 0);                   // butterfly loop end 
-
-      }                           // groups loop end 
-
-      twidCoefModifier <<= 1u;
-   }                             // stages loop end 
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   cosVal = pCoef[ia * 2];
-   sinVal = pCoef[(ia * 2) + 1];
-   ia = ia + twidCoefModifier;
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-      i += n1;
-      l = i + n2;
-
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-   }                             // butterfly loop end 
-
-}
-
-
-void arm_radix2_butterfly_inverse_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint16_t twidCoefModifier)
-{
-
-   unsigned i, j, k, l;
-   unsigned n1, n2, ia;
-   q31_t xt, yt, cosVal, sinVal;
-   q31_t p0, p1;
-
-   //N = fftLen; 
-   n2 = fftLen;
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   // loop for groups 
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1u) - (pSrc[2 * l] >> 1u);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1u) + (pSrc[2 * l] >> 1u)) >> 1u;
-      
-      yt = (pSrc[2 * i + 1] >> 1u) - (pSrc[2 * l + 1] >> 1u);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1u) + (pSrc[2 * i + 1] >> 1u)) >> 1u;
-
-      mult_32x32_keep32_R(p0, xt, cosVal);
-      mult_32x32_keep32_R(p1, yt, cosVal);
-      multSub_32x32_keep32_R(p0, yt, sinVal);
-      multAcc_32x32_keep32_R(p1, xt, sinVal);
-      
-      pSrc[2u * l] = p0;
-      pSrc[2u * l + 1u] = p1;
-   }                             // groups loop end 
-
-   twidCoefModifier = twidCoefModifier << 1u;
-
-   // loop for stage 
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups 
-      for (j = 0; j < n2; j++)
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly 
-         for (i = j; i < fftLen; i += n1)
-         {
-            l = i + n2;
-            xt = pSrc[2 * i] - pSrc[2 * l];
-            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1u;
-      
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1u;
-
-            mult_32x32_keep32_R(p0, xt, cosVal);
-            mult_32x32_keep32_R(p1, yt, cosVal);
-            multSub_32x32_keep32_R(p0, yt, sinVal);
-            multAcc_32x32_keep32_R(p1, xt, sinVal);
-            
-            pSrc[2u * l] = p0;
-            pSrc[2u * l + 1u] = p1;
-         }                         // butterfly loop end 
-
-      }                           // groups loop end 
-
-      twidCoefModifier = twidCoefModifier << 1u;
-   }                             // stages loop end 
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   cosVal = pCoef[ia * 2];
-   sinVal = pCoef[(ia * 2) + 1];
-   ia = ia + twidCoefModifier;
-
-   // loop for butterfly 
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-      i += n1;
-      l = i + n2;
-
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2u * l] = xt;
-
-      pSrc[2u * l + 1u] = yt;
-
-   }                             // butterfly loop end 
-
-}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
deleted file mode 100644
index 815c3d26..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
+++ /dev/null
@@ -1,165 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_f32.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-/**    
-* @brief  Initialization function for the floating-point CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superceded by \ref arm_cfft_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_f32(
-  arm_cfft_radix4_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (float32_t *) twiddleCoef;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.000244140625;
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.0009765625f;
-    break;
-
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    S->onebyfftLen = 0.00390625f;
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    S->onebyfftLen = 0.015625f;
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    S->onebyfftLen = 0.0625f;
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
deleted file mode 100644
index 791480ea..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
+++ /dev/null
@@ -1,152 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_q15.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-
-/**    
-* @brief Initialization function for the Q15 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed
-* @param[in,out] *S             points to an instance of the Q15 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-  case 4096u:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-
-    break;
-
-  case 1024u:
-    /*  Initializations of structure parameters for 1024 point FFT */
-    S->twidCoefModifier = 4u;
-    S->bitRevFactor = 4u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
deleted file mode 100644
index 9674f6ee..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5   
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_init_q31.c    
-*    
-* Description:	Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-/**    
-*    
-* @brief  Initialization function for the Q31 CFFT/CIFFT.   
-* @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
-* @param[in,out] *S             points to an instance of the Q31 CFFT/CIFFT structure.   
-* @param[in]     fftLen         length of the FFT.   
-* @param[in]     ifftFlag       flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.   
-*    
-* \par Description:   
-* \par    
-* The parameter ifftFlag controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated   
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.    
-* \par    
-* The parameter fftLen	Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.    
-* \par    
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.    
-*/
-
-arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of Instance structure depending on the FFT length */
-  switch (S->fftLen)
-  {
-    /*  Initializations of structure parameters for 4096 point FFT */
-  case 4096u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    break;
-
-    /*  Initializations of structure parameters for 1024 point FFT */
-  case 1024u:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4u;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4u;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    break;
-
-  case 256u:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16u;
-    S->bitRevFactor = 16u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    break;
-
-  case 64u:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64u;
-    S->bitRevFactor = 64u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    break;
-
-  case 16u:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256u;
-    S->bitRevFactor = 256u;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c
deleted file mode 100644
index 5c1b0ae9..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix4_q31.c
+++ /dev/null
@@ -1,1404 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix4_q31.c    
-*    
-* Description:	This file has function definition of Radix-4 FFT & IFFT function and    
-*				In-place bit reversal using bit reversal table    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void arm_radix4_butterfly_inverse_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint32_t twidCoefModifier);
-
-void arm_radix4_butterfly_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-q31_t * pCoef,
-uint32_t twidCoefModifier);
-
-void arm_bitreversal_q31(
-q31_t * pSrc,
-uint32_t fftLen,
-uint16_t bitRevFactor,
-uint16_t * pBitRevTab);
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup ComplexFFT    
- * @{    
- */
-
-/**    
- * @details    
- * @brief Processing function for the Q31 CFFT/CIFFT.    
- * @deprecated Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed
- * @param[in]      *S    points to an instance of the Q31 CFFT/CIFFT structure.   
- * @param[in, out] *pSrc points to the complex data buffer of size 2*fftLen. Processing occurs in-place.   
- * @return none.    
- *     
- * \par Input and output formats:    
- * \par    
- * Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
- * Hence the output format is different for different FFT sizes.    
- * The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:   
- * \par   
- * \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"    
- * \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"    
- *    
- */
-
-void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc)
-{
-  if(S->ifftFlag == 1u)
-  {
-    /* Complex IFFT radix-4 */
-    arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle,
-                                     S->twidCoefModifier);
-  }
-  else
-  {
-    /* Complex FFT radix-4 */
-    arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle,
-                             S->twidCoefModifier);
-  }
-
-
-  if(S->bitReverseFlag == 1u)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-/**    
- * @} end of ComplexFFT group    
- */
-
-/*    
-* Radix-4 FFT algorithm used is :    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 FFT:    
-* Wn = co1 + j * (- si1)    
-* W2n = co2 + j * (- si2)    
-* W3n = co3 + j * (- si3)    
-*    
-*  Butterfly implementation:    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
-* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
-*    
-*/
-
-/**    
- * @brief  Core function for the Q31 CFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-void arm_radix4_butterfly_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier)
-{
-#if defined(ARM_MATH_CM7)
-  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q63_t xaya, xbyb, xcyc, xdyd;
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-
-  /* start of first stage process */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
-
-  j = n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSrc[(2u * i0)] >> 4u) + (pSrc[(2u * i2)] >> 4u);
-    /* xa - xc */
-    r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
-    /* ya - yc */
-    s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2u * i0] = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
-
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
-    /* xb - xd */
-    t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) + (yb - yd) */
-    r1 = r2 + t1;
-    /* (xa - xc) - (yb - yd) */
-    r2 = r2 - t1;
-
-    /* (ya - yc) - (xb - xd) */
-    s1 = s2 - t2;
-    /* (ya - yc) + (xb - xd) */
-    s2 = s2 + t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  /* end of first stage process */
-
-  /* data is in 5.27(q27) format */
-
-
-  /* start of Middle stages process */
-
-
-  /* each stage in middle stages provides two down scaling of the input */
-
-  twidCoefModifier <<= 2u;
-
-
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSrc[2u * i0] + pSrc[2u * i2];
-        /* xa - xc */
-        r2 = pSrc[2u * i0] - pSrc[2u * i2];
-
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1u;
-
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
-
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-#else
-  uint32_t n1, n2, ia1, ia2, ia3, i0, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q31_t *pSi0;
-  q31_t *pSi1;
-  q31_t *pSi2;
-  q31_t *pSi3;
-  q63_t xaya, xbyb, xcyc, xdyd;
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-
-  /* start of first stage process */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  ia1 = 0u;
-
-  j = n2;
-  
-  pSi0 = pSrc;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSi0[0] >> 4u) + (pSi2[0] >> 4u);
-    /* xa - xc */
-    r2 = (pSi0[0] >> 4u) - (pSi2[0] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSi1[0] >> 4u) + (pSi3[0] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSi0[1] >> 4u) + (pSi2[1] >> 4u);
-    /* ya - yc */
-    s2 = (pSi0[1] >> 4u) - (pSi2[1] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    *pSi0++ = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSi1[1] >> 4u) + (pSi3[1] >> 4u);
-
-    /* ya' = ya + yb + yc + yd */
-    *pSi0++ = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSi1[1] >> 4u) - (pSi3[1] >> 4u);
-    /* xb - xd */
-    t2 = (pSi1[0] >> 4u) - (pSi3[0] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) + (yb - yd) */
-    r1 = r2 + t1;
-    /* (xa - xc) - (yb - yd) */
-    r2 = r2 - t1;
-
-    /* (ya - yc) - (xb - xd) */
-    s1 = s2 - t2;
-    /* (ya - yc) + (xb - xd) */
-    s2 = s2 + t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-  } while(--j);
-
-  /* end of first stage process */
-
-  /* data is in 5.27(q27) format */
-
-
-  /* start of Middle stages process */
-
-
-  /* each stage in middle stages provides two down scaling of the input */
-
-  twidCoefModifier <<= 2u;
-
-
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    /*  Calculation of first stage */
-    for (j = 0u; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-      
-      pSi0 = pSrc + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSi0[0] + pSi2[0];
-
-        /* xa - xc */
-        r2 = pSi0[0] - pSi2[0];
-
-
-        /* ya + yc */
-        s1 = pSi0[1] + pSi2[1];
-
-        /* ya - yc */
-        s2 = pSi0[1] - pSi2[1];
-
-
-        /* xb + xd */
-        t1 = pSi1[0] + pSi3[0];
-
-
-        /* xa' = xa + xb + xc + xd */
-        pSi0[0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSi1[1] + pSi3[1];
-
-        /* ya' = ya + yb + yc + yd */
-        pSi0[1] = (s1 + t2) >> 2u;
-        pSi0 += 2 * n1;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSi1[1] - pSi3[1];
-
-        /* (xb - xd) */
-        t2 = pSi1[0] - pSi3[0];
-
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSi1[0] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSi1[1] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1u;
-        pSi1 += 2 * n1;
-
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
-
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSi2[0] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSi2[1] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-        pSi2 += 2 * n1;
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSi3[0] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSi3[1] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-        pSi3 += 2 * n1;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-#endif
-
-  /* End of Middle stages process */
-
-  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
-  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
-  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
-  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
-
-
-  /* start of Last stage process */
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    xa = (q31_t) xaya;
-    ya = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    xb = (q31_t) xbyb;
-    yb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    xc = (q31_t) xcyc;
-    yc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    xd = (q31_t) xdyd;
-    yd = (q31_t) (xdyd >> 32);
-
-#else
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    ya = (q31_t) xaya;
-    xa = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    yb = (q31_t) xbyb;
-    xb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    yc = (q31_t) xcyc;
-    xc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    yd = (q31_t) xdyd;
-    xd = (q31_t) (xdyd >> 32);
-
-
-#endif
-
-    /* xa' = xa + xb + xc + xd */
-    xa_out = xa + xb + xc + xd;
-
-    /* ya' = ya + yb + yc + yd */
-    ya_out = ya + yb + yc + yd;
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-    /* writing xa' and ya' */
-    *ptr1++ = xa_out;
-    *ptr1++ = ya_out;
-
-    xc_out = (xa - xb + xc - xd);
-    yc_out = (ya - yb + yc - yd);
-
-    /* writing xc' and yc' */
-    *ptr1++ = xc_out;
-    *ptr1++ = yc_out;
-
-    xb_out = (xa + yb - xc - yd);
-    yb_out = (ya - xb - yc + xd);
-
-    /* writing xb' and yb' */
-    *ptr1++ = xb_out;
-    *ptr1++ = yb_out;
-
-    xd_out = (xa - yb - xc + yd);
-    yd_out = (ya + xb - yc - xd);
-
-    /* writing xd' and yd' */
-    *ptr1++ = xd_out;
-    *ptr1++ = yd_out;
-
-
-  } while(--j);
-
-  /* output is in 11.21(q21) format for the 1024 point */
-  /* output is in 9.23(q23) format for the 256 point */
-  /* output is in 7.25(q25) format for the 64 point */
-  /* output is in 5.27(q27) format for the 16 point */
-
-  /* End of last stage process */
-
-}
-
-
-/**    
- * @brief  Core function for the Q31 CIFFT butterfly process.   
- * @param[in, out] *pSrc            points to the in-place buffer of Q31 data type.   
- * @param[in]      fftLen           length of the FFT.   
- * @param[in]      *pCoef           points to twiddle coefficient buffer.   
- * @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.   
- */
-
-
-/*    
-* Radix-4 IFFT algorithm used is :    
-*    
-* CIFFT uses same twiddle coefficients as CFFT Function    
-*  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]    
-*    
-*    
-* IFFT is implemented with following changes in equations from FFT    
-*    
-* Input real and imaginary data:    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-*    
-*    
-* Output real and imaginary data:    
-* x(4r) = xa'+ j * ya'    
-* x(4r+1) = xb'+ j * yb'    
-* x(4r+2) = xc'+ j * yc'    
-* x(4r+3) = xd'+ j * yd'    
-*    
-*    
-* Twiddle factors for radix-4 IFFT:    
-* Wn = co1 + j * (si1)    
-* W2n = co2 + j * (si2)    
-* W3n = co3 + j * (si3)    
-    
-* The real and imaginary output values for the radix-4 butterfly are    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)    
-* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)    
-* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)    
-* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)    
-* xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)    
-* yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)    
-*    
-*/
-
-void arm_radix4_butterfly_inverse_q31(
-  q31_t * pSrc,
-  uint32_t fftLen,
-  q31_t * pCoef,
-  uint32_t twidCoefModifier)
-{
-#if defined(ARM_MATH_CM7)
-  uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q63_t xaya, xbyb, xcyc, xdyd;
-
-  /* input is be 1.31(q31) format for all FFT sizes */
-  /* Total process is divided into three stages */
-  /* process first stage, middle stages, & last stage */
-
-  /* Start of first stage process */
-
-  /* Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-  i0 = 0u;
-  ia1 = 0u;
-
-  j = n2;
-
-  do
-  {
-
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSrc[2u * i0] >> 4u) + (pSrc[2u * i2] >> 4u);
-    /* xa - xc */
-    r2 = (pSrc[2u * i0] >> 4u) - (pSrc[2u * i2] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSrc[2u * i1] >> 4u) + (pSrc[2u * i3] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSrc[(2u * i0) + 1u] >> 4u) + (pSrc[(2u * i2) + 1u] >> 4u);
-    /* ya - yc */
-    s2 = (pSrc[(2u * i0) + 1u] >> 4u) - (pSrc[(2u * i2) + 1u] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2u * i0] = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSrc[(2u * i1) + 1u] >> 4u) + (pSrc[(2u * i3) + 1u] >> 4u);
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2u * i0) + 1u] = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSrc[(2u * i1) + 1u] >> 4u) - (pSrc[(2u * i3) + 1u] >> 4u);
-    /* xb - xd */
-    t2 = (pSrc[2u * i1] >> 4u) - (pSrc[2u * i3] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    pSrc[2u * i1 + 1u] = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
-                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) - (yb - yd) */
-    r1 = r2 - t1;
-    /* (xa - xc) + (yb - yd) */
-    r2 = r2 + t1;
-
-    /* (ya - yc) + (xb - xd) */
-    s1 = s2 + t2;
-    /* (ya - yc) - (xb - xd) */
-    s2 = s2 - t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    pSrc[2u * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1u;
-
-  } while(--j);
-
-  /* data is in 5.27(q27) format */
-  /* each stage provides two down scaling of the input */
-
-
-  /* Start of Middle stages process */
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    for (j = 0; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2u], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSrc[2u * i0] + pSrc[2u * i2];
-        /* xa - xc */
-        r2 = pSrc[2u * i0] - pSrc[2u * i2];
-
-        /* ya + yc */
-        s1 = pSrc[(2u * i0) + 1u] + pSrc[(2u * i2) + 1u];
-        /* ya - yc */
-        s2 = pSrc[(2u * i0) + 1u] - pSrc[(2u * i2) + 1u];
-
-        /* xb + xd */
-        t1 = pSrc[2u * i1] + pSrc[2u * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2u * i0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-        /* yb + yd */
-        t2 = pSrc[(2u * i1) + 1u] + pSrc[(2u * i3) + 1u];
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2u * i0) + 1u] = (s1 + t2) >> 2u;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2u * i1) + 1u] - pSrc[(2u * i3) + 1u];
-        /* (xb - xd) */
-        t2 = pSrc[2u * i1] - pSrc[2u * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSrc[2u * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32u)) -
-                         ((int32_t) (((q63_t) s1 * si2) >> 32u))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2u * i1) + 1u] =
-          (((int32_t) (((q63_t) s1 * co2) >> 32u)) +
-           ((int32_t) (((q63_t) r1 * si2) >> 32u))) >> 1u;
-
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
-
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSrc[2u * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSrc[(2u * i2) + 1u] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSrc[(2u * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSrc[(2u * i3) + 1u] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-#else
-  uint32_t n1, n2, ia1, ia2, ia3, i0, j, k;
-  q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-  q31_t xa, xb, xc, xd;
-  q31_t ya, yb, yc, yd;
-  q31_t xa_out, xb_out, xc_out, xd_out;
-  q31_t ya_out, yb_out, yc_out, yd_out;
-
-  q31_t *ptr1;
-  q31_t *pSi0;
-  q31_t *pSi1;
-  q31_t *pSi2;
-  q31_t *pSi3;
-  q63_t xaya, xbyb, xcyc, xdyd;
-
-  /* input is be 1.31(q31) format for all FFT sizes */
-  /* Total process is divided into three stages */
-  /* process first stage, middle stages, & last stage */
-
-  /* Start of first stage process */
-
-  /* Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2u;
-
-  ia1 = 0u;
-
-  j = n2;
-  
-  pSi0 = pSrc;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  do
-  {
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSi0[0] >> 4u) + (pSi2[0] >> 4u);
-    /* xa - xc */
-    r2 = (pSi0[0] >> 4u) - (pSi2[0] >> 4u);
-
-    /* xb + xd */
-    t1 = (pSi1[0] >> 4u) + (pSi3[0] >> 4u);
-
-    /* ya + yc */
-    s1 = (pSi0[1] >> 4u) + (pSi2[1] >> 4u);
-    /* ya - yc */
-    s2 = (pSi0[1] >> 4u) - (pSi2[1] >> 4u);
-
-    /* xa' = xa + xb + xc + xd */
-    *pSi0++ = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSi1[1] >> 4u) + (pSi3[1] >> 4u);
-    /* ya' = ya + yb + yc + yd */
-    *pSi0++ = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSi1[1] >> 4u) - (pSi3[1] >> 4u);
-    /* xb - xd */
-    t2 = (pSi1[0] >> 4u) - (pSi3[0] >> 4u);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2u * ia1;
-    co2 = pCoef[ia2 * 2u];
-    si2 = pCoef[(ia2 * 2u) + 1u];
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1u;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    *pSi1++ = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
-                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1u;
-
-    /* (xa - xc) - (yb - yd) */
-    r1 = r2 - t1;
-    /* (xa - xc) + (yb - yd) */
-    r2 = r2 + t1;
-
-    /* (ya - yc) + (xb - xd) */
-    s1 = s2 + t2;
-    /* (ya - yc) - (xb - xd) */
-    s2 = s2 - t2;
-
-    co1 = pCoef[ia1 * 2u];
-    si1 = pCoef[(ia1 * 2u) + 1u];
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1u;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    *pSi2++ = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1u;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3u * ia1;
-    co3 = pCoef[ia3 * 2u];
-    si3 = pCoef[(ia3 * 2u) + 1u];
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1u;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    *pSi3++ = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1u;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-  } while(--j);
-
-  /* data is in 5.27(q27) format */
-  /* each stage provides two down scaling of the input */
-
-
-  /* Start of Middle stages process */
-
-  twidCoefModifier <<= 2u;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4u; k > 4u; k >>= 2u)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2u;
-    ia1 = 0u;
-
-    for (j = 0; j <= (n2 - 1u); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[ia1 * 2u];
-      si1 = pCoef[(ia1 * 2u) + 1u];
-      co2 = pCoef[ia2 * 2u];
-      si2 = pCoef[(ia2 * 2u) + 1u];
-      co3 = pCoef[ia3 * 2u];
-      si3 = pCoef[(ia3 * 2u) + 1u];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-      
-      pSi0 = pSrc + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSi0[0] + pSi2[0];
-
-        /* xa - xc */
-        r2 = pSi0[0] - pSi2[0];
-
-
-        /* ya + yc */
-        s1 = pSi0[1] + pSi2[1];
-
-        /* ya - yc */
-        s2 = pSi0[1] - pSi2[1];
-
-
-        /* xb + xd */
-        t1 = pSi1[0] + pSi3[0];
-
-
-        /* xa' = xa + xb + xc + xd */
-        pSi0[0] = (r1 + t1) >> 2u;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-        /* yb + yd */
-        t2 = pSi1[1] + pSi3[1];
-
-        /* ya' = ya + yb + yc + yd */
-        pSi0[1] = (s1 + t2) >> 2u;
-        pSi0 += 2 * n1;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSi1[1] - pSi3[1];
-
-        /* (xb - xd) */
-        t2 = pSi1[0] - pSi3[0];
-
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSi1[0] = (((int32_t) (((q63_t) r1 * co2) >> 32u)) -
-                         ((int32_t) (((q63_t) s1 * si2) >> 32u))) >> 1u;
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSi1[1] =
-
-          (((int32_t) (((q63_t) s1 * co2) >> 32u)) +
-           ((int32_t) (((q63_t) r1 * si2) >> 32u))) >> 1u;
-        pSi1 += 2 * n1;
-
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
-
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSi2[0] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1u;
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSi2[1] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1u;
-        pSi2 += 2 * n1;
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSi3[0] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1u;
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSi3[1] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1u;
-        pSi3 += 2 * n1;
-      }
-    }
-    twidCoefModifier <<= 2u;
-  }
-#endif
-
-  /* End of Middle stages process */
-
-  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
-  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
-  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
-  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
-
-
-  /* Start of last stage process */
-
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    xa = (q31_t) xaya;
-    ya = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    xb = (q31_t) xbyb;
-    yb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    xc = (q31_t) xcyc;
-    yc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    xd = (q31_t) xdyd;
-    yd = (q31_t) (xdyd >> 32);
-
-#else
-
-    /* Read xa (real), ya(imag) input */
-    xaya = *__SIMD64(ptr1)++;
-    ya = (q31_t) xaya;
-    xa = (q31_t) (xaya >> 32);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = *__SIMD64(ptr1)++;
-    yb = (q31_t) xbyb;
-    xb = (q31_t) (xbyb >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = *__SIMD64(ptr1)++;
-    yc = (q31_t) xcyc;
-    xc = (q31_t) (xcyc >> 32);
-
-    /* Read xc (real), yc(imag) input */
-    xdyd = *__SIMD64(ptr1)++;
-    yd = (q31_t) xdyd;
-    xd = (q31_t) (xdyd >> 32);
-
-
-#endif
-
-    /* xa' = xa + xb + xc + xd */
-    xa_out = xa + xb + xc + xd;
-
-    /* ya' = ya + yb + yc + yd */
-    ya_out = ya + yb + yc + yd;
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8u;
-
-    /* writing xa' and ya' */
-    *ptr1++ = xa_out;
-    *ptr1++ = ya_out;
-
-    xc_out = (xa - xb + xc - xd);
-    yc_out = (ya - yb + yc - yd);
-
-    /* writing xc' and yc' */
-    *ptr1++ = xc_out;
-    *ptr1++ = yc_out;
-
-    xb_out = (xa - yb - xc + yd);
-    yb_out = (ya + xb - yc - xd);
-
-    /* writing xb' and yb' */
-    *ptr1++ = xb_out;
-    *ptr1++ = yb_out;
-
-    xd_out = (xa + yb - xc - yd);
-    yd_out = (ya - xb - yc + xd);
-
-    /* writing xd' and yd' */
-    *ptr1++ = xd_out;
-    *ptr1++ = yd_out;
-
-  } while(--j);
-
-  /* output is in 11.21(q21) format for the 1024 point */
-  /* output is in 9.23(q23) format for the 256 point */
-  /* output is in 7.25(q25) format for the 64 point */
-  /* output is in 5.27(q27) format for the 16 point */
-
-  /* End of last stage process */
-}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c
deleted file mode 100644
index d811b92b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_cfft_radix8_f32.c
+++ /dev/null
@@ -1,384 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_radix8_f32.c    
-*    
-* Description:	Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function        
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.      
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
-* @ingroup groupTransforms    
-*/
-
-/**    
-* @defgroup Radix8_CFFT_CIFFT Radix-8 Complex FFT Functions    
-*    
-* \par    
-* Complex Fast Fourier Transform(CFFT) and Complex Inverse Fast Fourier Transform(CIFFT) is an efficient algorithm to compute Discrete Fourier Transform(DFT) and Inverse Discrete Fourier Transform(IDFT).    
-* Computational complexity of CFFT reduces drastically when compared to DFT.    
-* \par    
-* This set of functions implements CFFT/CIFFT    
-* for floating-point data types.  The functions operates on in-place buffer which uses same buffer for input and output.    
-* Complex input is stored in input buffer in an interleaved fashion.    
-*    
-* \par    
-* The functions operate on blocks of input and output data and each call to the function processes    
-* 2*fftLen samples through the transform.  pSrc  points to In-place arrays containing 2*fftLen values.    
-* \par   
-* The pSrc points to the array of in-place buffer of size 2*fftLen and inputs and outputs are stored in an interleaved fashion as shown below.    
-* 
 {real[0], imag[0], real[1], imag[1],..} 
    
-*    
-* \par Lengths supported by the transform:   
-* \par    
-* Internally, the function utilize a Radix-8 decimation in frequency(DIF) algorithm    
-* and the size of the FFT supported are of the lengths [ 64, 512, 4096].   
-*     
-*    
-* \par Algorithm:    
-*    
-* Complex Fast Fourier Transform:    
-* \par     
-* Input real and imaginary data:    
-* 
    
-* x(n) = xa + j * ya    
-* x(n+N/4 ) = xb + j * yb    
-* x(n+N/2 ) = xc + j * yc    
-* x(n+3N 4) = xd + j * yd    
-* 
    
-* where N is length of FFT    
-* \par    
-* Output real and imaginary data:    
-* 
    
-* X(4r) = xa'+ j * ya'    
-* X(4r+1) = xb'+ j * yb'    
-* X(4r+2) = xc'+ j * yc'    
-* X(4r+3) = xd'+ j * yd'    
-* 
    
-* \par    
-* Twiddle factors for Radix-8 FFT:    
-* 
    
-* Wn = co1 + j * (- si1)    
-* W2n = co2 + j * (- si2)    
-* W3n = co3 + j * (- si3)    
-* 
    
-*    
-* \par    
-* \image html CFFT.gif "Radix-8 Decimation-in Frequency Complex Fast Fourier Transform"    
-*    
-* \par    
-* Output from Radix-8 CFFT Results in Digit reversal order. Interchange middle two branches of every butterfly results in Bit reversed output.    
-* \par    
-*  Butterfly CFFT equations:    
-* 
    
-* xa' = xa + xb + xc + xd    
-* ya' = ya + yb + yc + yd    
-* xc' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)    
-* yc' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)    
-* xb' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)    
-* yb' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)    
-* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)    
-* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)    
-* 
    
-*    
-* \par    
-* where fftLen length of CFFT/CIFFT; ifftFlag Flag for selection of CFFT or CIFFT(Set ifftFlag to calculate CIFFT otherwise calculates CFFT);    
-* bitReverseFlag Flag for selection of output order(Set bitReverseFlag to output in normal order otherwise output in bit reversed order);     
-* pTwiddlepoints to array of twiddle coefficients; pBitRevTable points to the array of bit reversal table.    
-* twidCoefModifier modifier for twiddle factor table which supports all FFT lengths with same table;     
-* pBitRevTable modifier for bit reversal table which supports all FFT lengths with same table.    
-* onebyfftLen value of 1/fftLen to calculate CIFFT;    
-*   
-* \par Fixed-Point Behavior    
-* Care must be taken when using the fixed-point versions of the CFFT/CIFFT function.    
-* Refer to the function specific documentation below for usage guidelines.    
-*/
-
-
-/*    
-* @brief  Core function for the floating-point CFFT butterfly process.   
-* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.   
-* @param[in]      fftLen           length of the FFT.   
-* @param[in]      *pCoef           points to the twiddle coefficient buffer.   
-* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.   
-*/
-
-void arm_radix8_butterfly_f32(
-float32_t * pSrc,
-uint16_t fftLen,
-const float32_t * pCoef,
-uint16_t twidCoefModifier)
-{
-   uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
-   uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
-   uint32_t id;
-   uint32_t n1, n2, j;
-   
-   float32_t r1, r2, r3, r4, r5, r6, r7, r8;
-   float32_t t1, t2;
-   float32_t s1, s2, s3, s4, s5, s6, s7, s8;
-   float32_t p1, p2, p3, p4;
-   float32_t co2, co3, co4, co5, co6, co7, co8;
-   float32_t si2, si3, si4, si5, si6, si7, si8;
-   const float32_t C81 = 0.70710678118f;
-
-   n2 = fftLen;
-   
-   do 
-   {
-      n1 = n2;
-      n2 = n2 >> 3;
-      i1 = 0;
-      
-      do
-      {
-         i2 = i1 + n2;
-         i3 = i2 + n2;
-         i4 = i3 + n2;
-         i5 = i4 + n2;
-         i6 = i5 + n2;
-         i7 = i6 + n2;
-         i8 = i7 + n2;
-         r1 = pSrc[2 * i1] + pSrc[2 * i5];
-         r5 = pSrc[2 * i1] - pSrc[2 * i5];
-         r2 = pSrc[2 * i2] + pSrc[2 * i6];
-         r6 = pSrc[2 * i2] - pSrc[2 * i6];
-         r3 = pSrc[2 * i3] + pSrc[2 * i7];
-         r7 = pSrc[2 * i3] - pSrc[2 * i7];
-         r4 = pSrc[2 * i4] + pSrc[2 * i8];
-         r8 = pSrc[2 * i4] - pSrc[2 * i8];
-         t1 = r1 - r3;
-         r1 = r1 + r3;
-         r3 = r2 - r4;
-         r2 = r2 + r4;
-         pSrc[2 * i1] = r1 + r2;   
-         pSrc[2 * i5] = r1 - r2;
-         r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
-         s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
-         r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
-         s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
-         s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
-         s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
-         r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
-         s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
-         t2 = r1 - s3;
-         r1 = r1 + s3;
-         s3 = r2 - r4;
-         r2 = r2 + r4;
-         pSrc[2 * i1 + 1] = r1 + r2;
-         pSrc[2 * i5 + 1] = r1 - r2;
-         pSrc[2 * i3]     = t1 + s3;
-         pSrc[2 * i7]     = t1 - s3;
-         pSrc[2 * i3 + 1] = t2 - r3;
-         pSrc[2 * i7 + 1] = t2 + r3;
-         r1 = (r6 - r8) * C81;
-         r6 = (r6 + r8) * C81;
-         r2 = (s6 - s8) * C81;
-         s6 = (s6 + s8) * C81;
-         t1 = r5 - r1;
-         r5 = r5 + r1;
-         r8 = r7 - r6;
-         r7 = r7 + r6;
-         t2 = s5 - r2;
-         s5 = s5 + r2;
-         s8 = s7 - s6;
-         s7 = s7 + s6;
-         pSrc[2 * i2]     = r5 + s7;
-         pSrc[2 * i8]     = r5 - s7;
-         pSrc[2 * i6]     = t1 + s8;
-         pSrc[2 * i4]     = t1 - s8;
-         pSrc[2 * i2 + 1] = s5 - r7;
-         pSrc[2 * i8 + 1] = s5 + r7;
-         pSrc[2 * i6 + 1] = t2 - r8;
-         pSrc[2 * i4 + 1] = t2 + r8;
-         
-         i1 += n1;
-      } while(i1 < fftLen);
-      
-      if(n2 < 8)
-         break;
-      
-      ia1 = 0;
-      j = 1;
-      
-      do
-      {      
-         /*  index calculation for the coefficients */
-         id  = ia1 + twidCoefModifier;
-         ia1 = id;
-         ia2 = ia1 + id;
-         ia3 = ia2 + id;
-         ia4 = ia3 + id;
-         ia5 = ia4 + id;
-         ia6 = ia5 + id;
-         ia7 = ia6 + id;
-                  
-         co2 = pCoef[2 * ia1];
-         co3 = pCoef[2 * ia2];
-         co4 = pCoef[2 * ia3];
-         co5 = pCoef[2 * ia4];
-         co6 = pCoef[2 * ia5];
-         co7 = pCoef[2 * ia6];
-         co8 = pCoef[2 * ia7];
-         si2 = pCoef[2 * ia1 + 1];
-         si3 = pCoef[2 * ia2 + 1];
-         si4 = pCoef[2 * ia3 + 1];
-         si5 = pCoef[2 * ia4 + 1];
-         si6 = pCoef[2 * ia5 + 1];
-         si7 = pCoef[2 * ia6 + 1];
-         si8 = pCoef[2 * ia7 + 1];         
-         
-         i1 = j;
-         
-         do
-         {
-            /*  index calculation for the input */
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-            i4 = i3 + n2;
-            i5 = i4 + n2;
-            i6 = i5 + n2;
-            i7 = i6 + n2;
-            i8 = i7 + n2;
-            r1 = pSrc[2 * i1] + pSrc[2 * i5];
-            r5 = pSrc[2 * i1] - pSrc[2 * i5];
-            r2 = pSrc[2 * i2] + pSrc[2 * i6];
-            r6 = pSrc[2 * i2] - pSrc[2 * i6];
-            r3 = pSrc[2 * i3] + pSrc[2 * i7];
-            r7 = pSrc[2 * i3] - pSrc[2 * i7];
-            r4 = pSrc[2 * i4] + pSrc[2 * i8];
-            r8 = pSrc[2 * i4] - pSrc[2 * i8];
-            t1 = r1 - r3;
-            r1 = r1 + r3;
-            r3 = r2 - r4;
-            r2 = r2 + r4;
-            pSrc[2 * i1] = r1 + r2;
-            r2 = r1 - r2;
-            s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
-            s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
-            s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
-            s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
-            s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
-            s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
-            s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
-            s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
-            t2 = s1 - s3;
-            s1 = s1 + s3;
-            s3 = s2 - s4;
-            s2 = s2 + s4;
-            r1 = t1 + s3;
-            t1 = t1 - s3;
-            pSrc[2 * i1 + 1] = s1 + s2;
-            s2 = s1 - s2;
-            s1 = t2 - r3;
-            t2 = t2 + r3;
-            p1 = co5 * r2;
-            p2 = si5 * s2;
-            p3 = co5 * s2;
-            p4 = si5 * r2;
-            pSrc[2 * i5]     = p1 + p2;
-            pSrc[2 * i5 + 1] = p3 - p4;
-            p1 = co3 * r1;
-            p2 = si3 * s1;
-            p3 = co3 * s1;
-            p4 = si3 * r1;
-            pSrc[2 * i3]     = p1 + p2;
-            pSrc[2 * i3 + 1] = p3 - p4;
-            p1 = co7 * t1;
-            p2 = si7 * t2;
-            p3 = co7 * t2;
-            p4 = si7 * t1;
-            pSrc[2 * i7]     = p1 + p2;
-            pSrc[2 * i7 + 1] = p3 - p4;
-            r1 = (r6 - r8) * C81;
-            r6 = (r6 + r8) * C81;
-            s1 = (s6 - s8) * C81;
-            s6 = (s6 + s8) * C81;
-            t1 = r5 - r1;
-            r5 = r5 + r1;
-            r8 = r7 - r6;
-            r7 = r7 + r6;
-            t2 = s5 - s1;
-            s5 = s5 + s1;
-            s8 = s7 - s6;
-            s7 = s7 + s6;
-            r1 = r5 + s7;
-            r5 = r5 - s7;
-            r6 = t1 + s8;
-            t1 = t1 - s8;
-            s1 = s5 - r7;
-            s5 = s5 + r7;
-            s6 = t2 - r8;
-            t2 = t2 + r8;
-            p1 = co2 * r1;
-            p2 = si2 * s1;
-            p3 = co2 * s1;
-            p4 = si2 * r1;
-            pSrc[2 * i2]     = p1 + p2;
-            pSrc[2 * i2 + 1] = p3 - p4;
-            p1 = co8 * r5;
-            p2 = si8 * s5;
-            p3 = co8 * s5;
-            p4 = si8 * r5;
-            pSrc[2 * i8]     = p1 + p2;
-            pSrc[2 * i8 + 1] = p3 - p4;
-            p1 = co6 * r6;
-            p2 = si6 * s6;
-            p3 = co6 * s6;
-            p4 = si6 * r6;
-            pSrc[2 * i6]     = p1 + p2;
-            pSrc[2 * i6 + 1] = p3 - p4;
-            p1 = co4 * t1;
-            p2 = si4 * t2;
-            p3 = co4 * t2;
-            p4 = si4 * t1;
-            pSrc[2 * i4]     = p1 + p2;
-            pSrc[2 * i4 + 1] = p3 - p4;
-            
-            i1 += n1;
-         } while(i1 < fftLen);
-         
-         j++;
-      } while(j < n2);
-      
-      twidCoefModifier <<= 3;
-   } while(n2 > 7);   
-}
-
-/**    
-* @} end of Radix8_CFFT_CIFFT group    
-*/
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c
deleted file mode 100644
index 91149cc3..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_f32.c
+++ /dev/null
@@ -1,461 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_f32.c    
-*    
-* Description:	Processing function of DCT4 & IDCT4 F32.    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.      
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @defgroup DCT4_IDCT4 DCT Type IV Functions    
- * Representation of signals by minimum number of values is important for storage and transmission.    
- * The possibility of large discontinuity between the beginning and end of a period of a signal    
- * in DFT can be avoided by extending the signal so that it is even-symmetric.    
- * Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the    
- * spectrum and is very widely used in signal and image coding applications.    
- * The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.    
- * DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.    
- *    
- * DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.    
- * Reordering of the input data makes the computation of DCT just a problem of    
- * computing the DFT of a real signal with a few additional operations.    
- * This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.    
- *     
- * DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.    
- * DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.    
- * DCT2 implementation can be described in the following steps:    
- * - Re-ordering input    
- * - Calculating Real FFT    
- * - Multiplication of weights and Real FFT output and getting real part from the product.    
- *    
- * This process is explained by the block diagram below:    
- * \image html DCT4.gif "Discrete Cosine Transform - type-IV"    
- *    
- * \par Algorithm:    
- * The N-point type-IV DCT is defined as a real, linear transformation by the formula:    
- * \image html DCT4Equation.gif    
- * where k = 0,1,2,.....N-1    
- *\par    
- * Its inverse is defined as follows:    
- * \image html IDCT4Equation.gif    
- * where n = 0,1,2,.....N-1    
- *\par    
- * The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).    
- * The symmetry of the transform matrix indicates that the fast algorithms for the forward    
- * and inverse transform computation are identical.    
- * Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.    
- *    
- * \par Lengths supported by the transform:    
- *  As DCT4 internally uses Real FFT, it supports all the lengths supported by arm_rfft_f32().    
- * The library provides separate functions for Q15, Q31, and floating-point data types.    
- * \par Instance Structure    
- * The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.    
- * A separate instance structure must be defined for each transform.    
- * There are separate instance structure declarations for each of the 3 supported data types.    
- *    
- * \par Initialization Functions    
- * There is also an associated initialization function for each data type.    
- * The initialization function performs the following operations:    
- * - Sets the values of the internal structure fields.    
- * - Initializes Real FFT as its process function is used internally in DCT4, by calling arm_rfft_init_f32().    
- * \par    
- * Use of the initialization function is optional.    
- * However, if the initialization function is used, then the instance structure cannot be placed into a const data section.    
- * To place an instance structure into a const data section, the instance structure must be manually initialized.    
- * Manually initialize the instance structure as follows:    
- * 
    
- *arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};    
- *arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
- *arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};   
- * 
   
- * where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;   
- * \c normalize is normalizing factor used and is equal to sqrt(2/N);    
- * \c pTwiddle points to the twiddle factor table;   
- * \c pCosFactor points to the cosFactor table;   
- * \c pRfft points to the real FFT instance;   
- * \c pCfft points to the complex FFT instance;   
- * The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()   
- * and arm_rfft_f32() respectively for details regarding static initialization.   
- *   
- * \par Fixed-Point Behavior    
- * Care must be taken when using the fixed-point versions of the DCT4 transform functions.    
- * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.    
- * Refer to the function specific documentation below for usage guidelines.    
- */
-
- /**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point DCT4/IDCT4.   
- * @param[in]       *S             points to an instance of the floating-point DCT4/IDCT4 structure.   
- * @param[in]       *pState        points to state buffer.   
- * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.   
- * @return none.   
- */
-
-void arm_dct4_f32(
-  const arm_dct4_instance_f32 * S,
-  float32_t * pState,
-  float32_t * pInlineBuffer)
-{
-  uint32_t i;                                    /* Loop counter */
-  float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
-  float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
-  float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
-  float32_t in;                                  /* Temporary variable */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)    
-   * along with some pre-processing and post-processing.    
-   * Computational procedure is explained as follows:    
-   * (a) Pre-processing involves multiplying input with cos factor,    
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))    
-   *              where,    
-   *                 r(n) -- output of preprocessing    
-   *                 u(n) -- input to preprocessing(actual Source buffer)    
-   * (b) Calculation of DCT2 using FFT is divided into three steps:    
-   *                  Step1: Re-ordering of even and odd elements of input.    
-   *                  Step2: Calculating FFT of the re-ordered input.    
-   *                  Step3: Taking the real part of the product of FFT output and weights.    
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:    
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *                        where,    
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output    
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).    
-   */
-
-        /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
-  arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------    
-   * Step1: Re-ordering of even and odd elements as,    
-   *             pState[i] =  pInlineBuffer[2*i] and    
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2    
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Run the below code for Cortex-M4 and Cortex-M3 */
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = (uint32_t) S->Nby2 >> 2u;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.    
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
-
-        /*----------------------------------------------------------------------    
-	 *  Step3: Multiply the FFT output with the weights.    
-	 *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = ((uint32_t) S->N - 1u) >> 2u;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ * (float32_t) 0.5;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.    
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.    
-   ** No loop unrolling is used. */
-  i = ((uint32_t) S->N - 1u) % 0x4u;
-
-  while(i > 0u)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = (uint32_t) S->N >> 2u;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-#else
-
-  /* Run the below code for Cortex-M0 */
-
-  /* Initializing the loop counter to N/2 */
-  i = (uint32_t) S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-  /* ---------------------------------------------------------    
-   *     Step2: Calculate RFFT for N-point input    
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32(S->pRfft, pInlineBuffer, pState);
-
-        /*----------------------------------------------------------------------    
-	 *  Step3: Multiply the FFT output with the weights.    
-	 *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32(pState, weights, pState, S->N);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,    
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)    
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ * (float32_t) 0.5;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* Initializing the loop counter */
-  i = ((uint32_t) S->N - 1u);
-
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-
-        /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter */
-  i = (uint32_t) S->N;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    /* Decrement the loop counter */
-    i--;
-  } while(i > 0u);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c
deleted file mode 100644
index 8422a30a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_f32.c
+++ /dev/null
@@ -1,16519 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_f32.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 F32    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*    weights[2*i]= cos(i*c);    
-*    weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* Where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const float32_t Weights_128[256] = {
-  1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,
-  -0.012271538285719925f,
-  0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f,
-  -0.036807222941358832f,
-  0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f,
-  -0.061320736302208578f,
-  0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f,
-  -0.085797312344439894f,
-  0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f,
-  -0.110222207293883060f,
-  0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f,
-  -0.134580708507126170f,
-  0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f,
-  -0.158858143333861450f,
-  0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f,
-  -0.183039887955140950f,
-  0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f,
-  -0.207111376192218560f,
-  0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f,
-  -0.231058108280671110f,
-  0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f,
-  -0.254865659604514570f,
-  0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f,
-  -0.278519689385053060f,
-  0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f,
-  -0.302005949319228080f,
-  0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f,
-  -0.325310292162262930f,
-  0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f,
-  -0.348418680249434560f,
-  0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f,
-  -0.371317193951837540f,
-  0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f,
-  -0.393992040061048100f,
-  0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f,
-  -0.416429560097637150f,
-  0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f,
-  -0.438616238538527660f,
-  0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f,
-  -0.460538710958240010f,
-  0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f,
-  -0.482183772079122720f,
-  0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f,
-  -0.503538383725717580f,
-  0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f,
-  -0.524589682678468950f,
-  0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f,
-  -0.545324988422046460f,
-  0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f,
-  -0.565731810783613120f,
-  0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f,
-  -0.585797857456438860f,
-  0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f,
-  -0.605511041404325550f,
-  0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f,
-  -0.624859488142386340f,
-  0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f,
-  -0.643831542889791390f,
-  0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f,
-  -0.662415777590171780f,
-  0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f,
-  -0.680600997795453020f,
-  0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f,
-  -0.698376249408972920f,
-  0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f,
-  -0.715730825283818590f,
-  0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f,
-  -0.732654271672412820f,
-  0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f,
-  -0.749136394523459260f,
-  0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f,
-  -0.765167265622458960f,
-  0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f,
-  -0.780737228572094380f,
-  0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f,
-  -0.795836904608883460f,
-  0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f,
-  -0.810457198252594770f,
-  0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f,
-  -0.824589302785025290f,
-  0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f,
-  -0.838224705554837970f,
-  0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f,
-  -0.851355193105265200f,
-  0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f,
-  -0.863972856121586700f,
-  0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f,
-  -0.876070094195406600f,
-  0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f,
-  -0.887639620402853930f,
-  0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f,
-  -0.898674465693953820f,
-  0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f,
-  -0.909167983090522270f,
-  0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f,
-  -0.919113851690057770f,
-  0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f,
-  -0.928506080473215480f,
-  0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f,
-  -0.937339011912574960f,
-  0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f,
-  -0.945607325380521280f,
-  0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f,
-  -0.953306040354193750f,
-  0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f,
-  -0.960430519415565790f,
-  0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f,
-  -0.966976471044852070f,
-  0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f,
-  -0.972939952205560070f,
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-
-static const float32_t Weights_512[1024] = {
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-    -0.999999099205167830,
-  0.001150485337113809, -0.999999338191525530, 0.000958737845553352,
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-    -0.999999981616429330,
-
-};
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    
-* \par    
-* C command to generate the table    
-* \par    
-* 
 for(i = 0; i< N; i++)    
-* {    
-*    cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-*/
-static const float32_t cos_factors_128[128] = {
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-  0.999077727752645360f,
-  0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f,
-  0.995767414467659820f,
-  0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f,
-  0.990058210262297120f,
-  0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f,
-  0.981963869109555240f,
-  0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f,
-  0.971503890986251780f,
-  0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f,
-  0.958703474895871600f,
-  0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f,
-  0.943593458161960390f,
-  0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f,
-  0.926210242138311380f,
-  0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f,
-  0.906595704514915330f,
-  0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f,
-  0.884797098430937790f,
-  0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f,
-  0.860866938637767310f,
-  0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f,
-  0.834862874986380010f,
-  0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,
-  0.806847553543799330f,
-  0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f,
-  0.776888465673232440f,
-  0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f,
-  0.745057785441466060f,
-  0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,
-  0.711432195745216430f,
-  0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f,
-  0.676092703575316030f,
-  0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f,
-  0.639124444863775730f,
-  0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,
-  0.600616479383868970f,
-  0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f,
-  0.560661576197336030f,
-  0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f,
-  0.519355990165589530f,
-  0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,
-  0.476799230063322250f,
-  0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f,
-  0.433093818853152010f,
-  0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f,
-  0.388345046698826300f,
-  0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,
-  0.342660717311994380f,
-  0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f,
-  0.296150888243623960f,
-  0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f,
-  0.248927605745720260f,
-  0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,
-  0.201104634842091960f,
-  0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f,
-  0.152797185258443410f,
-  0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f,
-  0.104121633872054730f,
-  0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,
-  0.055195244349690031f,
-  0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f,
-  0.006135884649154515f
-};
-
-static const float32_t cos_factors_512[512] = {
-  0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f,
-  0.999942349676023910f,
-  0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f,
-  0.999735288260561680f,
-  0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f,
-  0.999377670388002850f,
-  0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,
-  0.998869549914283560f,
-  0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f,
-  0.998211003360478190f,
-  0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f,
-  0.997402129901275300f,
-  0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,
-  0.996443051350042630f,
-  0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f,
-  0.995333912140482280f,
-  0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f,
-  0.994074879304879370f,
-  0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,
-  0.992666142448948020f,
-  0.992290591348257370f, 0.991905700430609330f, 0.991511473318743900f,
-  0.991107913723276890f,
-  0.990695025442664630f, 0.990272812363169110f, 0.989841278458820530f,
-  0.989400427791380380f,
-  0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,
-  0.987543941794359230f,
-  0.987056571305750970f, 0.986559910264775410f, 0.986053963346195440f,
-  0.985538735312176060f,
-  0.985014231012239840f, 0.984480455383220930f, 0.983937413449218920f,
-  0.983385110321551180f,
-  0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,
-  0.981083391150486710f,
-  0.980484861773469380f, 0.979877103699517640f, 0.979260122649082020f,
-  0.978633924429423210f,
-  0.977998514934557140f, 0.977353900145199960f, 0.976700086128711840f,
-  0.976037079039039020f,
-  0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,
-  0.973293246054698250f,
-  0.972584368934732210f, 0.971866337480279400f, 0.971139158449725090f,
-  0.970402838687555500f,
-  0.969657385124292450f, 0.968902804776428870f, 0.968139104746362440f,
-  0.967366292222328510f,
-  0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,
-  0.964184063951745830f,
-  0.963365799780954050f, 0.962538468044359160f, 0.961702076529122540f,
-  0.960856633107679660f,
-  0.960002145737665960f, 0.959138622461841890f, 0.958266071408017670f,
-  0.957384500788975860f,
-  0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,
-  0.953768189885990330f,
-  0.952841647601198720f, 0.951906136807932350f, 0.950961666311575080f,
-  0.950008245001843000f,
-  0.949045881852700560f, 0.948074585922276230f, 0.947094366352777220f,
-  0.946105232370403450f,
-  0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,
-  0.942059739771017310f,
-  0.941026175050889260f, 0.939983753034014050f, 0.938932483532064600f,
-  0.937872376439989890f,
-  0.936803441735921560f, 0.935725689481080370f, 0.934639129819680780f,
-  0.933543772978836170f,
-  0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,
-  0.929074581259315860f,
-  0.927935394822617890f, 0.926787474304581750f, 0.925630830509872720f,
-  0.924465474325262600f,
-  0.923291416719527640f, 0.922108668743345180f, 0.920917241529189520f,
-  0.919717146291227360f,
-  0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,
-  0.914830312237946200f,
-  0.913587047945250810f, 0.912335184623322750f, 0.911074734055176360f,
-  0.909805708104652220f,
-  0.908528118716306120f, 0.907241977915295820f, 0.905947297807268460f,
-  0.904644090578246240f,
-  0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,
-  0.899346236979341570f,
-  0.898000579740739880f, 0.896646470178680150f, 0.895283921038557580f,
-  0.893912945145203250f,
-  0.892533555402764580f, 0.891145764794583180f, 0.889749586383072780f,
-  0.888345033309596350f,
-  0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,
-  0.882643339979562790f,
-  0.881197113471222090f, 0.879742592800047410f, 0.878279791656541580f,
-  0.876808723809145650f,
-  0.875329403104110890f, 0.873841843465366860f, 0.872346058894391540f,
-  0.870842063470078980f,
-  0.869329871348606840f, 0.867809496763303320f, 0.866280954024512990f,
-  0.864744257519462380f,
-  0.863199421712124160f, 0.861646461143081300f, 0.860085390429390140f,
-  0.858516224264442740f,
-  0.856938977417828760f, 0.855353664735196030f, 0.853760301138111410f,
-  0.852158901623919830f,
-  0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,
-  0.845673246987299070f,
-  0.844031895490066410f, 0.842382599643185850f, 0.840725374970458070f,
-  0.839060237070312740f,
-  0.837387201615661940f, 0.835706284353752600f, 0.834017501106018130f,
-  0.832320867767929680f,
-  0.830616400308846310f, 0.828904114771864870f, 0.827184027273669130f,
-  0.825456154004377550f,
-  0.823720511227391430f, 0.821977115279241550f, 0.820225982569434690f,
-  0.818467129580298660f,
-  0.816700572866827850f, 0.814926329056526620f, 0.813144414849253590f,
-  0.811354847017063730f,
-  0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,
-  0.804120377398265810f,
-  0.802292795538115720f, 0.800457662192622820f, 0.798614994634760820f,
-  0.796764810208418830f,
-  0.794907126328237010f, 0.793041960479443640f, 0.791169330217690200f,
-  0.789289253168885650f,
-  0.787401747029031430f, 0.785506829564053930f, 0.783604518609638200f,
-  0.781694832071059390f,
-  0.779777787923014550f, 0.777853404209453150f, 0.775921699043407690f,
-  0.773982690606822900f,
-  0.772036397150384520f, 0.770082836993347900f, 0.768122028523365420f,
-  0.766153990196312920f,
-  0.764178740536116670f, 0.762196298134578900f, 0.760206681651202420f,
-  0.758209909813015280f,
-  0.756206001414394540f, 0.754194975316889170f, 0.752176850449042810f,
-  0.750151645806215070f,
-  0.748119380450403600f, 0.746080073510063780f, 0.744033744179929290f,
-  0.741980411720831070f,
-  0.739920095459516200f, 0.737852814788465980f, 0.735778589165713590f,
-  0.733697438114660370f,
-  0.731609381223892630f, 0.729514438146997010f, 0.727412628602375770f,
-  0.725303972373060770f,
-  0.723188489306527460f, 0.721066199314508110f, 0.718937122372804490f,
-  0.716801278521099540f,
-  0.714658687862769090f, 0.712509370564692320f, 0.710353346857062420f,
-  0.708190637033195400f,
-  0.706021261449339740f, 0.703845240524484940f, 0.701662594740168570f,
-  0.699473344640283770f,
-  0.697277510830886630f, 0.695075113980000880f, 0.692866174817424740f,
-  0.690650714134534720f,
-  0.688428752784090550f, 0.686200311680038700f, 0.683965411797315510f,
-  0.681724074171649820f,
-  0.679476319899365080f, 0.677222170137180450f, 0.674961646102012040f,
-  0.672694769070772970f,
-  0.670421560380173090f, 0.668142041426518560f, 0.665856233665509720f,
-  0.663564158612039880f,
-  0.661265837839992270f, 0.658961292982037320f, 0.656650545729429050f,
-  0.654333617831800550f,
-  0.652010531096959500f, 0.649681307390683190f, 0.647345968636512060f,
-  0.645004536815544040f,
-  0.642657033966226860f, 0.640303482184151670f, 0.637943903621844170f,
-  0.635578320488556230f,
-  0.633206755050057190f, 0.630829229628424470f, 0.628445766601832710f,
-  0.626056388404343520f,
-  0.623661117525694640f, 0.621259976511087660f, 0.618852987960976320f,
-  0.616440174530853650f,
-  0.614021558931038490f, 0.611597163926462020f, 0.609167012336453210f,
-  0.606731127034524480f,
-  0.604289530948156070f, 0.601842247058580030f, 0.599389298400564540f,
-  0.596930708062196500f,
-  0.594466499184664540f, 0.591996694962040990f, 0.589521318641063940f,
-  0.587040393520918080f,
-  0.584553942953015330f, 0.582061990340775550f, 0.579564559139405740f,
-  0.577061672855679550f,
-  0.574553355047715760f, 0.572039629324757050f, 0.569520519346947250f,
-  0.566996048825108680f,
-  0.564466241520519500f, 0.561931121244689470f, 0.559390711859136140f,
-  0.556845037275160100f,
-  0.554294121453620110f, 0.551737988404707450f, 0.549176662187719770f,
-  0.546610166910834860f,
-  0.544038526730883930f, 0.541461765853123560f, 0.538879908531008420f,
-  0.536292979065963180f,
-  0.533701001807152960f, 0.531104001151255000f, 0.528502001542228480f,
-  0.525895027471084740f,
-  0.523283103475656430f, 0.520666254140367270f, 0.518044504095999340f,
-  0.515417878019463150f,
-  0.512786400633563070f, 0.510150096706766700f, 0.507508991052970870f,
-  0.504863108531267480f,
-  0.502212474045710900f, 0.499557112545081890f, 0.496897049022654640f,
-  0.494232308515959730f,
-  0.491562916106550060f, 0.488888896919763230f, 0.486210276124486530f,
-  0.483527078932918740f,
-  0.480839330600333900f, 0.478147056424843120f, 0.475450281747155870f,
-  0.472749031950342900f,
-  0.470043332459595620f, 0.467333208741988530f, 0.464618686306237820f,
-  0.461899790702462840f,
-  0.459176547521944150f, 0.456448982396883860f, 0.453717121000163930f,
-  0.450980989045103810f,
-  0.448240612285220000f, 0.445496016513981740f, 0.442747227564570130f,
-  0.439994271309633260f,
-  0.437237173661044200f, 0.434475960569655710f, 0.431710658025057370f,
-  0.428941292055329550f,
-  0.426167888726799620f, 0.423390474143796100f, 0.420609074448402510f,
-  0.417823715820212380f,
-  0.415034424476081630f, 0.412241226669883000f, 0.409444148692257590f,
-  0.406643216870369140f,
-  0.403838457567654130f, 0.401029897183575790f, 0.398217562153373620f,
-  0.395401478947816300f,
-  0.392581674072951530f, 0.389758174069856410f, 0.386931005514388690f,
-  0.384100195016935040f,
-  0.381265769222162490f, 0.378427754808765620f, 0.375586178489217330f,
-  0.372741067009515810f,
-  0.369892447148934270f, 0.367040345719767240f, 0.364184789567079840f,
-  0.361325805568454340f,
-  0.358463420633736540f, 0.355597661704783960f, 0.352728555755210730f,
-  0.349856129790135030f,
-  0.346980410845923680f, 0.344101425989938980f, 0.341219202320282410f,
-  0.338333766965541290f,
-  0.335445147084531660f, 0.332553369866044220f, 0.329658462528587550f,
-  0.326760452320131790f,
-  0.323859366517852960f, 0.320955232427875210f, 0.318048077385015060f,
-  0.315137928752522440f,
-  0.312224813921825050f, 0.309308760312268780f, 0.306389795370861080f,
-  0.303467946572011370f,
-  0.300543241417273400f, 0.297615707435086310f, 0.294685372180514330f,
-  0.291752263234989370f,
-  0.288816408206049480f, 0.285877834727080730f, 0.282936570457055390f,
-  0.279992643080273380f,
-  0.277046080306099950f, 0.274096909868706330f, 0.271145159526808070f,
-  0.268190857063403180f,
-  0.265234030285511900f, 0.262274707023913590f, 0.259312915132886350f,
-  0.256348682489942910f,
-  0.253382036995570270f, 0.250413006572965280f, 0.247441619167773440f,
-  0.244467902747824210f,
-  0.241491885302869300f, 0.238513594844318500f, 0.235533059404975460f,
-  0.232550307038775330f,
-  0.229565365820518870f, 0.226578263845610110f, 0.223589029229790020f,
-  0.220597690108873650f,
-  0.217604274638483670f, 0.214608810993786920f, 0.211611327369227610f,
-  0.208611851978263460f,
-  0.205610413053099320f, 0.202607038844421110f, 0.199601757621131050f,
-  0.196594597670080220f,
-  0.193585587295803750f, 0.190574754820252800f, 0.187562128582529740f,
-  0.184547736938619640f,
-  0.181531608261125130f, 0.178513770938997590f, 0.175494253377271400f,
-  0.172473083996796030f,
-  0.169450291233967930f, 0.166425903540464220f, 0.163399949382973230f,
-  0.160372457242928400f,
-  0.157343455616238280f, 0.154312973013020240f, 0.151281037957330250f,
-  0.148247678986896200f,
-  0.145212924652847520f, 0.142176803519448000f, 0.139139344163826280f,
-  0.136100575175706200f,
-  0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,
-  0.123932975118512200f,
-  0.120888087235777220f, 0.117842061508325020f, 0.114794926606510250f,
-  0.111746711211126660f,
-  0.108697444013138670f, 0.105647153713410700f, 0.102595869022436280f,
-  0.099543618660069444f,
-  0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,
-  0.087325535206192226f,
-  0.084268887593324127f, 0.081211446809592386f, 0.078153241632794315f,
-  0.075094300847921291f,
-  0.072034653246889416f, 0.068974327628266732f, 0.065913352797003930f,
-  0.062851757564161420f,
-  0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,
-  0.050599749036899337f,
-  0.047535484156959261f, 0.044470771854938744f, 0.041405640977076712f,
-  0.038340120373552791f,
-  0.035274238898213947f, 0.032208025408304704f, 0.029141508764193740f,
-  0.026074717829104040f,
-  0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,
-  0.013805388528060349f,
-  0.010737659167264572f, 0.007669828739531077f, 0.004601926120448672f,
-  0.001533980186284766f
-};
-
-static const float32_t cos_factors_2048[2048] = {
-  0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,
-  0.999996396822294350f,
-  0.999994043728985820f, 0.999991102364945590f, 0.999987572731904080f,
-  0.999983454831937730f,
-  0.999978748667468830f, 0.999973454241265940f, 0.999967571556443780f,
-  0.999961100616462820f,
-  0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,
-  0.999929334386276070f,
-  0.999919922234522750f, 0.999909921855641540f, 0.999899333255515390f,
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-  0.064765325740339871f,
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-  0.058641104054683348f,
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-  0.055578150871004817f,
-  0.054812329710889909f, 0.054046476306093640f, 0.053280591107148056f,
-  0.052514674564603257f,
-  0.051748727129028414f, 0.050982749251010900f, 0.050216741381155325f,
-  0.049450703970084824f,
-  0.048684637468439020f, 0.047918542326875327f, 0.047152418996068000f,
-  0.046386267926707213f,
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-  0.043321395278109784f,
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-  0.040256114872041358f,
-  0.039489734439384118f, 0.038723330775933762f, 0.037956904332545366f,
-  0.037190455560088091f,
-  0.036423984909444228f, 0.035657492831508264f, 0.034890979777187955f,
-  0.034124446197403423f,
-  0.033357892543086159f, 0.032591319265180385f, 0.031824726814640963f,
-  0.031058115642434700f,
-  0.030291486199539423f, 0.029524838936943035f, 0.028758174305644590f,
-  0.027991492756653365f,
-  0.027224794740987910f, 0.026458080709677145f, 0.025691351113759395f,
-  0.024924606404281485f,
-  0.024157847032300020f, 0.023391073448879338f, 0.022624286105092803f,
-  0.021857485452021874f,
-  0.021090671940755180f, 0.020323846022389572f, 0.019557008148029204f,
-  0.018790158768784596f,
-  0.018023298335773701f, 0.017256427300120978f, 0.016489546112956454f,
-  0.015722655225417017f,
-  0.014955755088644378f, 0.014188846153786343f, 0.013421928871995907f,
-  0.012655003694430301f,
-  0.011888071072252072f, 0.011121131456628141f, 0.010354185298728884f,
-  0.009587233049729183f,
-  0.008820275160807512f, 0.008053312083144991f, 0.007286344267926684f,
-  0.006519372166339549f,
-  0.005752396229573737f, 0.004985416908821652f, 0.004218434655277024f,
-  0.003451449920135975f,
-  0.002684463154596083f, 0.001917474809855460f, 0.001150485337113809f,
-  0.000383495187571497f
-};
-
-static const float32_t cos_factors_8192[8192] = {
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-  1.999999255465430200, 1.999998887794072000, 1.999998446588471700,
-    1.999997931848645600,
-  1.999997343574612800, 1.999996681766395000, 1.999995946424016200,
-    1.999995137547503600,
-  1.999994255136887000, 1.999993299192198700, 1.999992269713474200,
-    1.999991166700750800,
-  1.999989990154069600, 1.999988740073473500, 1.999987416459008600,
-    1.999986019310723500,
-  1.999984548628669600, 1.999983004412901000, 1.999981386663474400,
-    1.999979695380449400,
-  1.999977930563888100, 1.999976092213855400, 1.999974180330418700,
-    1.999972194913648900,
-  1.999970135963618400, 1.999968003480403000, 1.999965797464081200,
-    1.999963517914734100,
-  1.999961164832445800, 1.999958738217302300, 1.999956238069392900,
-    1.999953664388809800,
-  1.999951017175647600, 1.999948296430003500, 1.999945502151977600,
-    1.999942634341672600,
-  1.999939692999193900, 1.999936678124649700, 1.999933589718150700,
-    1.999930427779810900,
-  1.999927192309745900, 1.999923883308075200, 1.999920500774920300,
-    1.999917044710405500,
-  1.999913515114657900, 1.999909911987807200, 1.999906235329986100,
-    1.999902485141329400,
-  1.999898661421975400, 1.999894764172064600, 1.999890793391740000,
-    1.999886749081147800,
-  1.999882631240436700, 1.999878439869758200, 1.999874174969266300,
-    1.999869836539117700,
-  1.999865424579472000, 1.999860939090491600, 1.999856380072341000,
-    1.999851747525188200,
-  1.999847041449203300, 1.999842261844559700, 1.999837408711432600,
-    1.999832482050000900,
-  1.999827481860445300, 1.999822408142949900, 1.999817260897701400,
-    1.999812040124888700,
-  1.999806745824704000, 1.999801377997341800, 1.999795936642999600,
-    1.999790421761877400,
-  1.999784833354177900, 1.999779171420106700, 1.999773435959872000,
-    1.999767626973684400,
-  1.999761744461757700, 1.999755788424308200, 1.999749758861554900,
-    1.999743655773719400,
-  1.999737479161026100, 1.999731229023702200, 1.999724905361977200,
-    1.999718508176084000,
-  1.999712037466257600, 1.999705493232735800, 1.999698875475759600,
-    1.999692184195571900,
-  1.999685419392419000, 1.999678581066549400, 1.999671669218214600,
-    1.999664683847668800,
-  1.999657624955168700, 1.999650492540973900, 1.999643286605346800,
-    1.999636007148552400,
-  1.999628654170857900, 1.999621227672533800, 1.999613727653853500,
-    1.999606154115092500,
-  1.999598507056529000, 1.999590786478444600, 1.999582992381123000,
-    1.999575124764850800,
-  1.999567183629917100, 1.999559168976613900, 1.999551080805236100,
-    1.999542919116081000,
-  1.999534683909448600, 1.999526375185641800, 1.999517992944965800,
-    1.999509537187729200,
-  1.999501007914242600, 1.999492405124819700, 1.999483728819776900,
-    1.999474978999432800,
-  1.999466155664109600, 1.999457258814131500, 1.999448288449825500,
-    1.999439244571521700,
-  1.999430127179552500, 1.999420936274252800, 1.999411671855960900,
-    1.999402333925017300,
-  1.999392922481765500, 1.999383437526551300, 1.999373879059723500,
-    1.999364247081633500,
-  1.999354541592635500, 1.999344762593086500, 1.999334910083345700,
-    1.999324984063775700,
-  1.999314984534741100, 1.999304911496609700, 1.999294764949752100,
-    1.999284544894541100,
-  1.999274251331352400, 1.999263884260564600, 1.999253443682558900,
-    1.999242929597719200,
-  1.999232342006432000, 1.999221680909086400, 1.999210946306074500,
-    1.999200138197791100,
-  1.999189256584633600, 1.999178301467001900, 1.999167272845298900,
-    1.999156170719930100,
-  1.999144995091303600, 1.999133745959830600, 1.999122423325924200,
-    1.999111027190001000,
-  1.999099557552479900, 1.999088014413782800, 1.999076397774334000,
-    1.999064707634560700,
-  1.999052943994892300, 1.999041106855761900, 1.999029196217604100,
-    1.999017212080857400,
-  1.999005154445962200, 1.998993023313361700, 1.998980818683502100,
-    1.998968540556831800,
-  1.998956188933802800, 1.998943763814868800, 1.998931265200486900,
-    1.998918693091116200,
-  1.998906047487219600, 1.998893328389261400, 1.998880535797709700,
-    1.998867669713034500,
-  1.998854730135709400, 1.998841717066209400, 1.998828630505013400,
-    1.998815470452602400,
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-    1.998762095340527400,
-  1.998748567839354000, 1.998734966849909000, 1.998721292372693100,
-    1.998707544408208700,
-  1.998693722956961500, 1.998679828019459300, 1.998665859596213500,
-    1.998651817687737300,
-  1.998637702294547000, 1.998623513417161700, 1.998609251056103100,
-    1.998594915211895600,
-  1.998580505885066100, 1.998566023076144600, 1.998551466785663400,
-    1.998536837014157900,
-  1.998522133762165900, 1.998507357030227900, 1.998492506818887200,
-    1.998477583128690100,
-  1.998462585960185000, 1.998447515313923400, 1.998432371190459500,
-    1.998417153590349900,
-  1.998401862514154200, 1.998386497962434800, 1.998371059935756300,
-    1.998355548434686400,
-  1.998339963459795400, 1.998324305011656600, 1.998308573090845200,
-    1.998292767697940100,
-  1.998276888833522300, 1.998260936498175400, 1.998244910692486000,
-    1.998228811417043700,
-  1.998212638672439900, 1.998196392459269400, 1.998180072778129600,
-    1.998163679629620500,
-  1.998147213014344900, 1.998130672932908000, 1.998114059385918400,
-    1.998097372373986300,
-  1.998080611897725700, 1.998063777957752600, 1.998046870554686100,
-    1.998029889689147700,
-  1.998012835361761900, 1.997995707573155600, 1.997978506323958600,
-    1.997961231614803200,
-  1.997943883446324800, 1.997926461819161000, 1.997908966733952500,
-    1.997891398191342400,
-  1.997873756191977000, 1.997856040736504500, 1.997838251825576400,
-    1.997820389459846700,
-  1.997802453639972300, 1.997784444366612600, 1.997766361640429800,
-    1.997748205462088500,
-  1.997729975832256600, 1.997711672751604200, 1.997693296220804000,
-    1.997674846240532000,
-  1.997656322811466500, 1.997637725934288300, 1.997619055609681600,
-    1.997600311838332500,
-  1.997581494620930300, 1.997562603958166600, 1.997543639850736200,
-    1.997524602299336500,
-  1.997505491304667000, 1.997486306867430900, 1.997467048988333000,
-    1.997447717668082000,
-  1.997428312907388200, 1.997408834706965000, 1.997389283067528800,
-    1.997369657989798400,
-  1.997349959474495200, 1.997330187522343700, 1.997310342134070800,
-    1.997290423310406100,
-  1.997270431052081900, 1.997250365359833200, 1.997230226234397900,
-    1.997210013676516700,
-  1.997189727686932400, 1.997169368266390900, 1.997148935415640600,
-    1.997128429135433400,
-  1.997107849426522600, 1.997087196289665000, 1.997066469725620200,
-    1.997045669735150000,
-  1.997024796319019300, 1.997003849477995600, 1.996982829212848900,
-    1.996961735524351900,
-  1.996940568413280600, 1.996919327880412900, 1.996898013926530000,
-    1.996876626552415400,
-  1.996855165758855600, 1.996833631546639300, 1.996812023916558800,
-    1.996790342869408000,
-  1.996768588405984300, 1.996746760527087700, 1.996724859233520500,
-    1.996702884526087900,
-  1.996680836405598100, 1.996658714872861800, 1.996636519928692000,
-    1.996614251573904900,
-  1.996591909809319400, 1.996569494635756600, 1.996547006054041100,
-    1.996524444064999400,
-  1.996501808669461000, 1.996479099868258400, 1.996456317662226300,
-    1.996433462052202600,
-  1.996410533039027400, 1.996387530623543900, 1.996364454806597500,
-    1.996341305589037100,
-  1.996318082971713500, 1.996294786955480800, 1.996271417541195300,
-    1.996247974729716200,
-  1.996224458521905600, 1.996200868918628100, 1.996177205920750800,
-    1.996153469529144100,
-  1.996129659744680300, 1.996105776568235100, 1.996081820000686500,
-    1.996057790042915500,
-  1.996033686695805300, 1.996009509960242400, 1.995985259837115500,
-    1.995960936327316300,
-  1.995936539431739000, 1.995912069151280800, 1.995887525486841300,
-    1.995862908439323100,
-  1.995838218009630800, 1.995813454198672700, 1.995788617007359100,
-    1.995763706436603200,
-  1.995738722487320600, 1.995713665160430600, 1.995688534456853800,
-    1.995663330377514400,
-  1.995638052923339300, 1.995612702095257400, 1.995587277894201400,
-    1.995561780321105600,
-  1.995536209376907600, 1.995510565062547800, 1.995484847378968600,
-    1.995459056327116000,
-  1.995433191907938000, 1.995407254122385700, 1.995381242971412600,
-    1.995355158455975200,
-  1.995329000577032800, 1.995302769335546500, 1.995276464732481200,
-    1.995250086768804100,
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-  0.062691193994662109, 0.062307886094775049, 0.061924575904005130,
-    0.061541263436445129,
-  0.061157948706189229, 0.060774631727329942, 0.060391312513961619,
-    0.060007991080177375,
-  0.059624667440070382, 0.059241341607735261, 0.058858013597264912,
-    0.058474683422754095,
-  0.058091351098295878, 0.057708016637985186, 0.057324680055915692,
-    0.056941341366181127,
-  0.056558000582876661, 0.056174657720095743, 0.055791312791933681,
-    0.055407965812484541,
-  0.055024616795842439, 0.054641265756102911, 0.054257912707359794,
-    0.053874557663708772,
-  0.053491200639244271, 0.053107841648060788, 0.052724480704254229,
-    0.052341117821918783,
-  0.051957753015150501, 0.051574386298044173, 0.051191017684694640,
-    0.050807647189198162,
-  0.050424274825649297, 0.050040900608144430, 0.049657524550778251,
-    0.049274146667647289,
-  0.048890766972846805, 0.048507385480472134, 0.048124002204620014,
-    0.047740617159385448,
-  0.047357230358865306, 0.046973841817155179, 0.046590451548350717,
-    0.046207059566548990,
-  0.045823665885845313, 0.045440270520336883, 0.045056873484119603,
-    0.044673474791289434,
-  0.044290074455943754, 0.043906672492178188, 0.043523268914090238,
-    0.043139863735776100,
-  0.042756456971332048, 0.042373048634855741, 0.041989638740443119,
-    0.041606227302191955,
-  0.041222814334198304, 0.040839399850560058, 0.040455983865373815,
-    0.040072566392736257,
-  0.039689147446745419, 0.039305727041497644, 0.038922305191091085,
-    0.038538881909622631,
-  0.038155457211189216, 0.037772031109889144, 0.037388603619819022,
-    0.037005174755077273,
-  0.036621744529761024, 0.036238312957967478, 0.035854880053795196,
-    0.035471445831341021,
-  0.035088010304703626, 0.034704573487980395, 0.034321135395268765,
-    0.033937696040667535,
-  0.033554255438273790, 0.033170813602186440, 0.032787370546502645,
-    0.032403926285321405,
-  0.032020480832740429, 0.031637034202857461, 0.031253586409771626,
-    0.030870137467580314,
-  0.030486687390382738, 0.030103236192276818, 0.029719783887360508,
-    0.029336330489733147,
-  0.028952876013492331, 0.028569420472737472, 0.028185963881566689,
-    0.027802506254078142,
-  0.027419047604371360, 0.027035587946544135, 0.026652127294696067,
-    0.026268665662925468,
-  0.025885203065330677, 0.025501739516011413, 0.025118275029065638,
-    0.024734809618593138,
-  0.024351343298691951, 0.023967876083461924, 0.023584407987001611,
-    0.023200939023409587,
-  0.022817469206785804, 0.022433998551228459, 0.022050527070837558,
-    0.021667054779711814,
-  0.021283581691949955, 0.020900107821652084, 0.020516633182916549,
-    0.020133157789843505,
-  0.019749681656531803, 0.019366204797080316, 0.018982727225589285,
-    0.018599248956157190,
-  0.018215770002884327, 0.017832290379869671, 0.017448810101212228,
-    0.017065329181012358,
-  0.016681847633368677, 0.016298365472381587, 0.015914882712149747,
-    0.015531399366773606,
-  0.015147915450352307, 0.014764430976985016, 0.014380945960772247,
-    0.013997460415812761,
-  0.013613974356207112, 0.013230487796054543, 0.012847000749454314,
-    0.012463513230507034,
-  0.012080025253311559, 0.011696536831968529, 0.011313047980577277,
-    0.010929558713237145,
-  0.010546069044048827, 0.010162578987111254, 0.009779088556525145,
-    0.009395597766389905,
-  0.009012106630804949, 0.008628615163871038, 0.008245123379687167,
-    0.007861631292354124,
-  0.007478138915970929, 0.007094646264638386, 0.006711153352455981,
-    0.006327660193523208,
-  0.005944166801940901, 0.005560673191808128, 0.005177179377225743,
-    0.004793685372293270,
-  0.004410191191110246, 0.004026696847777542, 0.003643202356394263,
-    0.003259707731061291,
-  0.002876212985878184, 0.002492718134944503, 0.002109223192361147,
-    0.001725728172227238,
-  0.001342233088643682, 0.000958737955710053, 0.000575242787525925,
-    0.000191747598192208,
-
-};
-
-/**    
- * @brief  Initialization function for the floating-point DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of floating-point DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of floating-point RFFT/RIFFT structure.   
- * @param[in]     *S_CFFT    points to an instance of floating-point CFFT/CIFFT structure.   
- * @param[in]     N			 length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return        arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Floating-point normalizing factors are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingF32Table.gif    
- */
-
-arm_status arm_dct4_init_f32(
-  arm_dct4_instance_f32 * S,
-  arm_rfft_instance_f32 * S_RFFT,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  float32_t normalize)
-{
-  /*  Initialize the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  float32_t *twiddlePtr[4] =
-    { (float32_t *) Weights_128, (float32_t *) Weights_512,
-    (float32_t *) Weights_2048, (float32_t *) Weights_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  float32_t *pCosFactor[4] =
-    { (float32_t *) cos_factors_128, (float32_t *) cos_factors_512,
-    (float32_t *) cos_factors_2048, (float32_t *) cos_factors_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT */
-  arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0u, 1u);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c
deleted file mode 100644
index 2d558bb5..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q15.c
+++ /dev/null
@@ -1,4284 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_q15.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 Q15    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   weights[2*i]= cos(i*c);    
-*   weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* Converted the output to q15 format by multiplying with 2^31 and saturated if required.    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const q15_t ALIGN4 WeightsQ15_128[256] = {
-  0x7fff, 0x0, 0x7ffd, 0xfe6e, 0x7ff6, 0xfcdc, 0x7fe9, 0xfb4a,
-  0x7fd8, 0xf9b9, 0x7fc2, 0xf827, 0x7fa7, 0xf696, 0x7f87, 0xf505,
-  0x7f62, 0xf375, 0x7f38, 0xf1e5, 0x7f09, 0xf055, 0x7ed5, 0xeec7,
-  0x7e9d, 0xed38, 0x7e5f, 0xebab, 0x7e1d, 0xea1e, 0x7dd6, 0xe893,
-  0x7d8a, 0xe708, 0x7d39, 0xe57e, 0x7ce3, 0xe3f5, 0x7c89, 0xe26d,
-  0x7c29, 0xe0e7, 0x7bc5, 0xdf61, 0x7b5d, 0xdddd, 0x7aef, 0xdc5a,
-  0x7a7d, 0xdad8, 0x7a05, 0xd958, 0x798a, 0xd7da, 0x7909, 0xd65d,
-  0x7884, 0xd4e1, 0x77fa, 0xd368, 0x776c, 0xd1ef, 0x76d9, 0xd079,
-  0x7641, 0xcf05, 0x75a5, 0xcd92, 0x7504, 0xcc22, 0x745f, 0xcab3,
-  0x73b5, 0xc946, 0x7307, 0xc7dc, 0x7255, 0xc674, 0x719e, 0xc50e,
-  0x70e2, 0xc3aa, 0x7023, 0xc248, 0x6f5f, 0xc0e9, 0x6e96, 0xbf8d,
-  0x6dca, 0xbe32, 0x6cf9, 0xbcdb, 0x6c24, 0xbb86, 0x6b4a, 0xba33,
-  0x6a6d, 0xb8e4, 0x698c, 0xb797, 0x68a6, 0xb64c, 0x67bd, 0xb505,
-  0x66cf, 0xb3c1, 0x65dd, 0xb27f, 0x64e8, 0xb141, 0x63ef, 0xb005,
-  0x62f2, 0xaecd, 0x61f1, 0xad97, 0x60ec, 0xac65, 0x5fe3, 0xab36,
-  0x5ed7, 0xaa0b, 0x5dc7, 0xa8e3, 0x5cb4, 0xa7be, 0x5b9d, 0xa69c,
-  0x5a82, 0xa57e, 0x5964, 0xa463, 0x5842, 0xa34c, 0x571d, 0xa239,
-  0x55f5, 0xa129, 0x54ca, 0xa01d, 0x539b, 0x9f14, 0x5269, 0x9e0f,
-  0x5133, 0x9d0e, 0x4ffb, 0x9c11, 0x4ebf, 0x9b18, 0x4d81, 0x9a23,
-  0x4c3f, 0x9931, 0x4afb, 0x9843, 0x49b4, 0x975a, 0x4869, 0x9674,
-  0x471c, 0x9593, 0x45cd, 0x94b6, 0x447a, 0x93dc, 0x4325, 0x9307,
-  0x41ce, 0x9236, 0x4073, 0x916a, 0x3f17, 0x90a1, 0x3db8, 0x8fdd,
-  0x3c56, 0x8f1e, 0x3af2, 0x8e62, 0x398c, 0x8dab, 0x3824, 0x8cf9,
-  0x36ba, 0x8c4b, 0x354d, 0x8ba1, 0x33de, 0x8afc, 0x326e, 0x8a5b,
-  0x30fb, 0x89bf, 0x2f87, 0x8927, 0x2e11, 0x8894, 0x2c98, 0x8806,
-  0x2b1f, 0x877c, 0x29a3, 0x86f7, 0x2826, 0x8676, 0x26a8, 0x85fb,
-  0x2528, 0x8583, 0x23a6, 0x8511, 0x2223, 0x84a3, 0x209f, 0x843b,
-  0x1f19, 0x83d7, 0x1d93, 0x8377, 0x1c0b, 0x831d, 0x1a82, 0x82c7,
-  0x18f8, 0x8276, 0x176d, 0x822a, 0x15e2, 0x81e3, 0x1455, 0x81a1,
-  0x12c8, 0x8163, 0x1139, 0x812b, 0xfab, 0x80f7, 0xe1b, 0x80c8,
-  0xc8b, 0x809e, 0xafb, 0x8079, 0x96a, 0x8059, 0x7d9, 0x803e,
-  0x647, 0x8028, 0x4b6, 0x8017, 0x324, 0x800a, 0x192, 0x8003,
-};
-
-static const q15_t ALIGN4 WeightsQ15_512[1024] = {
-  0x7fff, 0x0, 0x7fff, 0xff9c, 0x7fff, 0xff37, 0x7ffe, 0xfed3,
-  0x7ffd, 0xfe6e, 0x7ffc, 0xfe0a, 0x7ffa, 0xfda5, 0x7ff8, 0xfd41,
-  0x7ff6, 0xfcdc, 0x7ff3, 0xfc78, 0x7ff0, 0xfc13, 0x7fed, 0xfbaf,
-  0x7fe9, 0xfb4a, 0x7fe5, 0xfae6, 0x7fe1, 0xfa81, 0x7fdd, 0xfa1d,
-  0x7fd8, 0xf9b9, 0x7fd3, 0xf954, 0x7fce, 0xf8f0, 0x7fc8, 0xf88b,
-  0x7fc2, 0xf827, 0x7fbc, 0xf7c3, 0x7fb5, 0xf75e, 0x7fae, 0xf6fa,
-  0x7fa7, 0xf696, 0x7f9f, 0xf632, 0x7f97, 0xf5cd, 0x7f8f, 0xf569,
-  0x7f87, 0xf505, 0x7f7e, 0xf4a1, 0x7f75, 0xf43d, 0x7f6b, 0xf3d9,
-  0x7f62, 0xf375, 0x7f58, 0xf311, 0x7f4d, 0xf2ad, 0x7f43, 0xf249,
-  0x7f38, 0xf1e5, 0x7f2d, 0xf181, 0x7f21, 0xf11d, 0x7f15, 0xf0b9,
-  0x7f09, 0xf055, 0x7efd, 0xeff2, 0x7ef0, 0xef8e, 0x7ee3, 0xef2a,
-  0x7ed5, 0xeec7, 0x7ec8, 0xee63, 0x7eba, 0xedff, 0x7eab, 0xed9c,
-  0x7e9d, 0xed38, 0x7e8e, 0xecd5, 0x7e7f, 0xec72, 0x7e6f, 0xec0e,
-  0x7e5f, 0xebab, 0x7e4f, 0xeb48, 0x7e3f, 0xeae5, 0x7e2e, 0xea81,
-  0x7e1d, 0xea1e, 0x7e0c, 0xe9bb, 0x7dfa, 0xe958, 0x7de8, 0xe8f6,
-  0x7dd6, 0xe893, 0x7dc3, 0xe830, 0x7db0, 0xe7cd, 0x7d9d, 0xe76a,
-  0x7d8a, 0xe708, 0x7d76, 0xe6a5, 0x7d62, 0xe643, 0x7d4e, 0xe5e0,
-  0x7d39, 0xe57e, 0x7d24, 0xe51c, 0x7d0f, 0xe4b9, 0x7cf9, 0xe457,
-  0x7ce3, 0xe3f5, 0x7ccd, 0xe393, 0x7cb7, 0xe331, 0x7ca0, 0xe2cf,
-  0x7c89, 0xe26d, 0x7c71, 0xe20b, 0x7c5a, 0xe1aa, 0x7c42, 0xe148,
-  0x7c29, 0xe0e7, 0x7c11, 0xe085, 0x7bf8, 0xe024, 0x7bdf, 0xdfc2,
-  0x7bc5, 0xdf61, 0x7bac, 0xdf00, 0x7b92, 0xde9f, 0x7b77, 0xde3e,
-  0x7b5d, 0xdddd, 0x7b42, 0xdd7c, 0x7b26, 0xdd1b, 0x7b0b, 0xdcbb,
-  0x7aef, 0xdc5a, 0x7ad3, 0xdbf9, 0x7ab6, 0xdb99, 0x7a9a, 0xdb39,
-  0x7a7d, 0xdad8, 0x7a5f, 0xda78, 0x7a42, 0xda18, 0x7a24, 0xd9b8,
-  0x7a05, 0xd958, 0x79e7, 0xd8f9, 0x79c8, 0xd899, 0x79a9, 0xd839,
-  0x798a, 0xd7da, 0x796a, 0xd77a, 0x794a, 0xd71b, 0x792a, 0xd6bc,
-  0x7909, 0xd65d, 0x78e8, 0xd5fe, 0x78c7, 0xd59f, 0x78a6, 0xd540,
-  0x7884, 0xd4e1, 0x7862, 0xd483, 0x7840, 0xd424, 0x781d, 0xd3c6,
-  0x77fa, 0xd368, 0x77d7, 0xd309, 0x77b4, 0xd2ab, 0x7790, 0xd24d,
-  0x776c, 0xd1ef, 0x7747, 0xd192, 0x7723, 0xd134, 0x76fe, 0xd0d7,
-  0x76d9, 0xd079, 0x76b3, 0xd01c, 0x768e, 0xcfbf, 0x7668, 0xcf62,
-  0x7641, 0xcf05, 0x761b, 0xcea8, 0x75f4, 0xce4b, 0x75cc, 0xcdef,
-  0x75a5, 0xcd92, 0x757d, 0xcd36, 0x7555, 0xccda, 0x752d, 0xcc7e,
-  0x7504, 0xcc22, 0x74db, 0xcbc6, 0x74b2, 0xcb6a, 0x7489, 0xcb0e,
-  0x745f, 0xcab3, 0x7435, 0xca58, 0x740b, 0xc9fc, 0x73e0, 0xc9a1,
-  0x73b5, 0xc946, 0x738a, 0xc8ec, 0x735f, 0xc891, 0x7333, 0xc836,
-  0x7307, 0xc7dc, 0x72db, 0xc782, 0x72af, 0xc728, 0x7282, 0xc6ce,
-  0x7255, 0xc674, 0x7227, 0xc61a, 0x71fa, 0xc5c0, 0x71cc, 0xc567,
-  0x719e, 0xc50e, 0x716f, 0xc4b4, 0x7141, 0xc45b, 0x7112, 0xc403,
-  0x70e2, 0xc3aa, 0x70b3, 0xc351, 0x7083, 0xc2f9, 0x7053, 0xc2a0,
-  0x7023, 0xc248, 0x6ff2, 0xc1f0, 0x6fc1, 0xc198, 0x6f90, 0xc141,
-  0x6f5f, 0xc0e9, 0x6f2d, 0xc092, 0x6efb, 0xc03b, 0x6ec9, 0xbfe3,
-  0x6e96, 0xbf8d, 0x6e63, 0xbf36, 0x6e30, 0xbedf, 0x6dfd, 0xbe89,
-  0x6dca, 0xbe32, 0x6d96, 0xbddc, 0x6d62, 0xbd86, 0x6d2d, 0xbd30,
-  0x6cf9, 0xbcdb, 0x6cc4, 0xbc85, 0x6c8f, 0xbc30, 0x6c59, 0xbbdb,
-  0x6c24, 0xbb86, 0x6bee, 0xbb31, 0x6bb8, 0xbadc, 0x6b81, 0xba88,
-  0x6b4a, 0xba33, 0x6b13, 0xb9df, 0x6adc, 0xb98b, 0x6aa5, 0xb937,
-  0x6a6d, 0xb8e4, 0x6a35, 0xb890, 0x69fd, 0xb83d, 0x69c4, 0xb7ea,
-  0x698c, 0xb797, 0x6953, 0xb744, 0x6919, 0xb6f1, 0x68e0, 0xb69f,
-  0x68a6, 0xb64c, 0x686c, 0xb5fa, 0x6832, 0xb5a8, 0x67f7, 0xb557,
-  0x67bd, 0xb505, 0x6782, 0xb4b4, 0x6746, 0xb462, 0x670b, 0xb411,
-  0x66cf, 0xb3c1, 0x6693, 0xb370, 0x6657, 0xb31f, 0x661a, 0xb2cf,
-  0x65dd, 0xb27f, 0x65a0, 0xb22f, 0x6563, 0xb1df, 0x6526, 0xb190,
-  0x64e8, 0xb141, 0x64aa, 0xb0f1, 0x646c, 0xb0a2, 0x642d, 0xb054,
-  0x63ef, 0xb005, 0x63b0, 0xafb7, 0x6371, 0xaf69, 0x6331, 0xaf1b,
-  0x62f2, 0xaecd, 0x62b2, 0xae7f, 0x6271, 0xae32, 0x6231, 0xade4,
-  0x61f1, 0xad97, 0x61b0, 0xad4b, 0x616f, 0xacfe, 0x612d, 0xacb2,
-  0x60ec, 0xac65, 0x60aa, 0xac19, 0x6068, 0xabcd, 0x6026, 0xab82,
-  0x5fe3, 0xab36, 0x5fa0, 0xaaeb, 0x5f5e, 0xaaa0, 0x5f1a, 0xaa55,
-  0x5ed7, 0xaa0b, 0x5e93, 0xa9c0, 0x5e50, 0xa976, 0x5e0b, 0xa92c,
-  0x5dc7, 0xa8e3, 0x5d83, 0xa899, 0x5d3e, 0xa850, 0x5cf9, 0xa807,
-  0x5cb4, 0xa7be, 0x5c6e, 0xa775, 0x5c29, 0xa72c, 0x5be3, 0xa6e4,
-  0x5b9d, 0xa69c, 0x5b56, 0xa654, 0x5b10, 0xa60d, 0x5ac9, 0xa5c5,
-  0x5a82, 0xa57e, 0x5a3b, 0xa537, 0x59f3, 0xa4f0, 0x59ac, 0xa4aa,
-  0x5964, 0xa463, 0x591c, 0xa41d, 0x58d4, 0xa3d7, 0x588b, 0xa392,
-  0x5842, 0xa34c, 0x57f9, 0xa307, 0x57b0, 0xa2c2, 0x5767, 0xa27d,
-  0x571d, 0xa239, 0x56d4, 0xa1f5, 0x568a, 0xa1b0, 0x5640, 0xa16d,
-  0x55f5, 0xa129, 0x55ab, 0xa0e6, 0x5560, 0xa0a2, 0x5515, 0xa060,
-  0x54ca, 0xa01d, 0x547e, 0x9fda, 0x5433, 0x9f98, 0x53e7, 0x9f56,
-  0x539b, 0x9f14, 0x534e, 0x9ed3, 0x5302, 0x9e91, 0x52b5, 0x9e50,
-  0x5269, 0x9e0f, 0x521c, 0x9dcf, 0x51ce, 0x9d8f, 0x5181, 0x9d4e,
-  0x5133, 0x9d0e, 0x50e5, 0x9ccf, 0x5097, 0x9c8f, 0x5049, 0x9c50,
-  0x4ffb, 0x9c11, 0x4fac, 0x9bd3, 0x4f5e, 0x9b94, 0x4f0f, 0x9b56,
-  0x4ebf, 0x9b18, 0x4e70, 0x9ada, 0x4e21, 0x9a9d, 0x4dd1, 0x9a60,
-  0x4d81, 0x9a23, 0x4d31, 0x99e6, 0x4ce1, 0x99a9, 0x4c90, 0x996d,
-  0x4c3f, 0x9931, 0x4bef, 0x98f5, 0x4b9e, 0x98ba, 0x4b4c, 0x987e,
-  0x4afb, 0x9843, 0x4aa9, 0x9809, 0x4a58, 0x97ce, 0x4a06, 0x9794,
-  0x49b4, 0x975a, 0x4961, 0x9720, 0x490f, 0x96e7, 0x48bc, 0x96ad,
-  0x4869, 0x9674, 0x4816, 0x963c, 0x47c3, 0x9603, 0x4770, 0x95cb,
-  0x471c, 0x9593, 0x46c9, 0x955b, 0x4675, 0x9524, 0x4621, 0x94ed,
-  0x45cd, 0x94b6, 0x4578, 0x947f, 0x4524, 0x9448, 0x44cf, 0x9412,
-  0x447a, 0x93dc, 0x4425, 0x93a7, 0x43d0, 0x9371, 0x437b, 0x933c,
-  0x4325, 0x9307, 0x42d0, 0x92d3, 0x427a, 0x929e, 0x4224, 0x926a,
-  0x41ce, 0x9236, 0x4177, 0x9203, 0x4121, 0x91d0, 0x40ca, 0x919d,
-  0x4073, 0x916a, 0x401d, 0x9137, 0x3fc5, 0x9105, 0x3f6e, 0x90d3,
-  0x3f17, 0x90a1, 0x3ebf, 0x9070, 0x3e68, 0x903f, 0x3e10, 0x900e,
-  0x3db8, 0x8fdd, 0x3d60, 0x8fad, 0x3d07, 0x8f7d, 0x3caf, 0x8f4d,
-  0x3c56, 0x8f1e, 0x3bfd, 0x8eee, 0x3ba5, 0x8ebf, 0x3b4c, 0x8e91,
-  0x3af2, 0x8e62, 0x3a99, 0x8e34, 0x3a40, 0x8e06, 0x39e6, 0x8dd9,
-  0x398c, 0x8dab, 0x3932, 0x8d7e, 0x38d8, 0x8d51, 0x387e, 0x8d25,
-  0x3824, 0x8cf9, 0x37ca, 0x8ccd, 0x376f, 0x8ca1, 0x3714, 0x8c76,
-  0x36ba, 0x8c4b, 0x365f, 0x8c20, 0x3604, 0x8bf5, 0x35a8, 0x8bcb,
-  0x354d, 0x8ba1, 0x34f2, 0x8b77, 0x3496, 0x8b4e, 0x343a, 0x8b25,
-  0x33de, 0x8afc, 0x3382, 0x8ad3, 0x3326, 0x8aab, 0x32ca, 0x8a83,
-  0x326e, 0x8a5b, 0x3211, 0x8a34, 0x31b5, 0x8a0c, 0x3158, 0x89e5,
-  0x30fb, 0x89bf, 0x309e, 0x8998, 0x3041, 0x8972, 0x2fe4, 0x894d,
-  0x2f87, 0x8927, 0x2f29, 0x8902, 0x2ecc, 0x88dd, 0x2e6e, 0x88b9,
-  0x2e11, 0x8894, 0x2db3, 0x8870, 0x2d55, 0x884c, 0x2cf7, 0x8829,
-  0x2c98, 0x8806, 0x2c3a, 0x87e3, 0x2bdc, 0x87c0, 0x2b7d, 0x879e,
-  0x2b1f, 0x877c, 0x2ac0, 0x875a, 0x2a61, 0x8739, 0x2a02, 0x8718,
-  0x29a3, 0x86f7, 0x2944, 0x86d6, 0x28e5, 0x86b6, 0x2886, 0x8696,
-  0x2826, 0x8676, 0x27c7, 0x8657, 0x2767, 0x8638, 0x2707, 0x8619,
-  0x26a8, 0x85fb, 0x2648, 0x85dc, 0x25e8, 0x85be, 0x2588, 0x85a1,
-  0x2528, 0x8583, 0x24c7, 0x8566, 0x2467, 0x854a, 0x2407, 0x852d,
-  0x23a6, 0x8511, 0x2345, 0x84f5, 0x22e5, 0x84da, 0x2284, 0x84be,
-  0x2223, 0x84a3, 0x21c2, 0x8489, 0x2161, 0x846e, 0x2100, 0x8454,
-  0x209f, 0x843b, 0x203e, 0x8421, 0x1fdc, 0x8408, 0x1f7b, 0x83ef,
-  0x1f19, 0x83d7, 0x1eb8, 0x83be, 0x1e56, 0x83a6, 0x1df5, 0x838f,
-  0x1d93, 0x8377, 0x1d31, 0x8360, 0x1ccf, 0x8349, 0x1c6d, 0x8333,
-  0x1c0b, 0x831d, 0x1ba9, 0x8307, 0x1b47, 0x82f1, 0x1ae4, 0x82dc,
-  0x1a82, 0x82c7, 0x1a20, 0x82b2, 0x19bd, 0x829e, 0x195b, 0x828a,
-  0x18f8, 0x8276, 0x1896, 0x8263, 0x1833, 0x8250, 0x17d0, 0x823d,
-  0x176d, 0x822a, 0x170a, 0x8218, 0x16a8, 0x8206, 0x1645, 0x81f4,
-  0x15e2, 0x81e3, 0x157f, 0x81d2, 0x151b, 0x81c1, 0x14b8, 0x81b1,
-  0x1455, 0x81a1, 0x13f2, 0x8191, 0x138e, 0x8181, 0x132b, 0x8172,
-  0x12c8, 0x8163, 0x1264, 0x8155, 0x1201, 0x8146, 0x119d, 0x8138,
-  0x1139, 0x812b, 0x10d6, 0x811d, 0x1072, 0x8110, 0x100e, 0x8103,
-  0xfab, 0x80f7, 0xf47, 0x80eb, 0xee3, 0x80df, 0xe7f, 0x80d3,
-  0xe1b, 0x80c8, 0xdb7, 0x80bd, 0xd53, 0x80b3, 0xcef, 0x80a8,
-  0xc8b, 0x809e, 0xc27, 0x8095, 0xbc3, 0x808b, 0xb5f, 0x8082,
-  0xafb, 0x8079, 0xa97, 0x8071, 0xa33, 0x8069, 0x9ce, 0x8061,
-  0x96a, 0x8059, 0x906, 0x8052, 0x8a2, 0x804b, 0x83d, 0x8044,
-  0x7d9, 0x803e, 0x775, 0x8038, 0x710, 0x8032, 0x6ac, 0x802d,
-  0x647, 0x8028, 0x5e3, 0x8023, 0x57f, 0x801f, 0x51a, 0x801b,
-  0x4b6, 0x8017, 0x451, 0x8013, 0x3ed, 0x8010, 0x388, 0x800d,
-  0x324, 0x800a, 0x2bf, 0x8008, 0x25b, 0x8006, 0x1f6, 0x8004,
-  0x192, 0x8003, 0x12d, 0x8002, 0xc9, 0x8001, 0x64, 0x8001,
-};
-
-static const q15_t ALIGN4 WeightsQ15_2048[4096] = {
-  0x7fff, 0x0, 0x7fff, 0xffe7, 0x7fff, 0xffce, 0x7fff, 0xffb5,
-  0x7fff, 0xff9c, 0x7fff, 0xff83, 0x7fff, 0xff6a, 0x7fff, 0xff51,
-  0x7fff, 0xff37, 0x7fff, 0xff1e, 0x7fff, 0xff05, 0x7ffe, 0xfeec,
-  0x7ffe, 0xfed3, 0x7ffe, 0xfeba, 0x7ffe, 0xfea1, 0x7ffd, 0xfe88,
-  0x7ffd, 0xfe6e, 0x7ffd, 0xfe55, 0x7ffc, 0xfe3c, 0x7ffc, 0xfe23,
-  0x7ffc, 0xfe0a, 0x7ffb, 0xfdf1, 0x7ffb, 0xfdd8, 0x7ffa, 0xfdbe,
-  0x7ffa, 0xfda5, 0x7ff9, 0xfd8c, 0x7ff9, 0xfd73, 0x7ff8, 0xfd5a,
-  0x7ff8, 0xfd41, 0x7ff7, 0xfd28, 0x7ff7, 0xfd0f, 0x7ff6, 0xfcf5,
-  0x7ff6, 0xfcdc, 0x7ff5, 0xfcc3, 0x7ff4, 0xfcaa, 0x7ff4, 0xfc91,
-  0x7ff3, 0xfc78, 0x7ff2, 0xfc5f, 0x7ff2, 0xfc46, 0x7ff1, 0xfc2c,
-  0x7ff0, 0xfc13, 0x7fef, 0xfbfa, 0x7fee, 0xfbe1, 0x7fee, 0xfbc8,
-  0x7fed, 0xfbaf, 0x7fec, 0xfb96, 0x7feb, 0xfb7d, 0x7fea, 0xfb64,
-  0x7fe9, 0xfb4a, 0x7fe8, 0xfb31, 0x7fe7, 0xfb18, 0x7fe6, 0xfaff,
-  0x7fe5, 0xfae6, 0x7fe4, 0xfacd, 0x7fe3, 0xfab4, 0x7fe2, 0xfa9b,
-  0x7fe1, 0xfa81, 0x7fe0, 0xfa68, 0x7fdf, 0xfa4f, 0x7fde, 0xfa36,
-  0x7fdd, 0xfa1d, 0x7fdc, 0xfa04, 0x7fda, 0xf9eb, 0x7fd9, 0xf9d2,
-  0x7fd8, 0xf9b9, 0x7fd7, 0xf9a0, 0x7fd6, 0xf986, 0x7fd4, 0xf96d,
-  0x7fd3, 0xf954, 0x7fd2, 0xf93b, 0x7fd0, 0xf922, 0x7fcf, 0xf909,
-  0x7fce, 0xf8f0, 0x7fcc, 0xf8d7, 0x7fcb, 0xf8be, 0x7fc9, 0xf8a5,
-  0x7fc8, 0xf88b, 0x7fc6, 0xf872, 0x7fc5, 0xf859, 0x7fc3, 0xf840,
-  0x7fc2, 0xf827, 0x7fc0, 0xf80e, 0x7fbf, 0xf7f5, 0x7fbd, 0xf7dc,
-  0x7fbc, 0xf7c3, 0x7fba, 0xf7aa, 0x7fb8, 0xf791, 0x7fb7, 0xf778,
-  0x7fb5, 0xf75e, 0x7fb3, 0xf745, 0x7fb1, 0xf72c, 0x7fb0, 0xf713,
-  0x7fae, 0xf6fa, 0x7fac, 0xf6e1, 0x7faa, 0xf6c8, 0x7fa9, 0xf6af,
-  0x7fa7, 0xf696, 0x7fa5, 0xf67d, 0x7fa3, 0xf664, 0x7fa1, 0xf64b,
-  0x7f9f, 0xf632, 0x7f9d, 0xf619, 0x7f9b, 0xf600, 0x7f99, 0xf5e7,
-  0x7f97, 0xf5cd, 0x7f95, 0xf5b4, 0x7f93, 0xf59b, 0x7f91, 0xf582,
-  0x7f8f, 0xf569, 0x7f8d, 0xf550, 0x7f8b, 0xf537, 0x7f89, 0xf51e,
-  0x7f87, 0xf505, 0x7f85, 0xf4ec, 0x7f82, 0xf4d3, 0x7f80, 0xf4ba,
-  0x7f7e, 0xf4a1, 0x7f7c, 0xf488, 0x7f79, 0xf46f, 0x7f77, 0xf456,
-  0x7f75, 0xf43d, 0x7f72, 0xf424, 0x7f70, 0xf40b, 0x7f6e, 0xf3f2,
-  0x7f6b, 0xf3d9, 0x7f69, 0xf3c0, 0x7f67, 0xf3a7, 0x7f64, 0xf38e,
-  0x7f62, 0xf375, 0x7f5f, 0xf35c, 0x7f5d, 0xf343, 0x7f5a, 0xf32a,
-  0x7f58, 0xf311, 0x7f55, 0xf2f8, 0x7f53, 0xf2df, 0x7f50, 0xf2c6,
-  0x7f4d, 0xf2ad, 0x7f4b, 0xf294, 0x7f48, 0xf27b, 0x7f45, 0xf262,
-  0x7f43, 0xf249, 0x7f40, 0xf230, 0x7f3d, 0xf217, 0x7f3b, 0xf1fe,
-  0x7f38, 0xf1e5, 0x7f35, 0xf1cc, 0x7f32, 0xf1b3, 0x7f2f, 0xf19a,
-  0x7f2d, 0xf181, 0x7f2a, 0xf168, 0x7f27, 0xf14f, 0x7f24, 0xf136,
-  0x7f21, 0xf11d, 0x7f1e, 0xf104, 0x7f1b, 0xf0eb, 0x7f18, 0xf0d2,
-  0x7f15, 0xf0b9, 0x7f12, 0xf0a0, 0x7f0f, 0xf087, 0x7f0c, 0xf06e,
-  0x7f09, 0xf055, 0x7f06, 0xf03c, 0x7f03, 0xf023, 0x7f00, 0xf00b,
-  0x7efd, 0xeff2, 0x7ef9, 0xefd9, 0x7ef6, 0xefc0, 0x7ef3, 0xefa7,
-  0x7ef0, 0xef8e, 0x7eed, 0xef75, 0x7ee9, 0xef5c, 0x7ee6, 0xef43,
-  0x7ee3, 0xef2a, 0x7edf, 0xef11, 0x7edc, 0xeef8, 0x7ed9, 0xeedf,
-  0x7ed5, 0xeec7, 0x7ed2, 0xeeae, 0x7ecf, 0xee95, 0x7ecb, 0xee7c,
-  0x7ec8, 0xee63, 0x7ec4, 0xee4a, 0x7ec1, 0xee31, 0x7ebd, 0xee18,
-  0x7eba, 0xedff, 0x7eb6, 0xede7, 0x7eb3, 0xedce, 0x7eaf, 0xedb5,
-  0x7eab, 0xed9c, 0x7ea8, 0xed83, 0x7ea4, 0xed6a, 0x7ea1, 0xed51,
-  0x7e9d, 0xed38, 0x7e99, 0xed20, 0x7e95, 0xed07, 0x7e92, 0xecee,
-  0x7e8e, 0xecd5, 0x7e8a, 0xecbc, 0x7e86, 0xeca3, 0x7e83, 0xec8a,
-  0x7e7f, 0xec72, 0x7e7b, 0xec59, 0x7e77, 0xec40, 0x7e73, 0xec27,
-  0x7e6f, 0xec0e, 0x7e6b, 0xebf5, 0x7e67, 0xebdd, 0x7e63, 0xebc4,
-  0x7e5f, 0xebab, 0x7e5b, 0xeb92, 0x7e57, 0xeb79, 0x7e53, 0xeb61,
-  0x7e4f, 0xeb48, 0x7e4b, 0xeb2f, 0x7e47, 0xeb16, 0x7e43, 0xeafd,
-  0x7e3f, 0xeae5, 0x7e3b, 0xeacc, 0x7e37, 0xeab3, 0x7e32, 0xea9a,
-  0x7e2e, 0xea81, 0x7e2a, 0xea69, 0x7e26, 0xea50, 0x7e21, 0xea37,
-  0x7e1d, 0xea1e, 0x7e19, 0xea06, 0x7e14, 0xe9ed, 0x7e10, 0xe9d4,
-  0x7e0c, 0xe9bb, 0x7e07, 0xe9a3, 0x7e03, 0xe98a, 0x7dff, 0xe971,
-  0x7dfa, 0xe958, 0x7df6, 0xe940, 0x7df1, 0xe927, 0x7ded, 0xe90e,
-  0x7de8, 0xe8f6, 0x7de4, 0xe8dd, 0x7ddf, 0xe8c4, 0x7dda, 0xe8ab,
-  0x7dd6, 0xe893, 0x7dd1, 0xe87a, 0x7dcd, 0xe861, 0x7dc8, 0xe849,
-  0x7dc3, 0xe830, 0x7dbf, 0xe817, 0x7dba, 0xe7fe, 0x7db5, 0xe7e6,
-  0x7db0, 0xe7cd, 0x7dac, 0xe7b4, 0x7da7, 0xe79c, 0x7da2, 0xe783,
-  0x7d9d, 0xe76a, 0x7d98, 0xe752, 0x7d94, 0xe739, 0x7d8f, 0xe720,
-  0x7d8a, 0xe708, 0x7d85, 0xe6ef, 0x7d80, 0xe6d6, 0x7d7b, 0xe6be,
-  0x7d76, 0xe6a5, 0x7d71, 0xe68d, 0x7d6c, 0xe674, 0x7d67, 0xe65b,
-  0x7d62, 0xe643, 0x7d5d, 0xe62a, 0x7d58, 0xe611, 0x7d53, 0xe5f9,
-  0x7d4e, 0xe5e0, 0x7d49, 0xe5c8, 0x7d43, 0xe5af, 0x7d3e, 0xe596,
-  0x7d39, 0xe57e, 0x7d34, 0xe565, 0x7d2f, 0xe54d, 0x7d29, 0xe534,
-  0x7d24, 0xe51c, 0x7d1f, 0xe503, 0x7d19, 0xe4ea, 0x7d14, 0xe4d2,
-  0x7d0f, 0xe4b9, 0x7d09, 0xe4a1, 0x7d04, 0xe488, 0x7cff, 0xe470,
-  0x7cf9, 0xe457, 0x7cf4, 0xe43f, 0x7cee, 0xe426, 0x7ce9, 0xe40e,
-  0x7ce3, 0xe3f5, 0x7cde, 0xe3dc, 0x7cd8, 0xe3c4, 0x7cd3, 0xe3ab,
-  0x7ccd, 0xe393, 0x7cc8, 0xe37a, 0x7cc2, 0xe362, 0x7cbc, 0xe349,
-  0x7cb7, 0xe331, 0x7cb1, 0xe318, 0x7cab, 0xe300, 0x7ca6, 0xe2e8,
-  0x7ca0, 0xe2cf, 0x7c9a, 0xe2b7, 0x7c94, 0xe29e, 0x7c8f, 0xe286,
-  0x7c89, 0xe26d, 0x7c83, 0xe255, 0x7c7d, 0xe23c, 0x7c77, 0xe224,
-  0x7c71, 0xe20b, 0x7c6c, 0xe1f3, 0x7c66, 0xe1db, 0x7c60, 0xe1c2,
-  0x7c5a, 0xe1aa, 0x7c54, 0xe191, 0x7c4e, 0xe179, 0x7c48, 0xe160,
-  0x7c42, 0xe148, 0x7c3c, 0xe130, 0x7c36, 0xe117, 0x7c30, 0xe0ff,
-  0x7c29, 0xe0e7, 0x7c23, 0xe0ce, 0x7c1d, 0xe0b6, 0x7c17, 0xe09d,
-  0x7c11, 0xe085, 0x7c0b, 0xe06d, 0x7c05, 0xe054, 0x7bfe, 0xe03c,
-  0x7bf8, 0xe024, 0x7bf2, 0xe00b, 0x7beb, 0xdff3, 0x7be5, 0xdfdb,
-  0x7bdf, 0xdfc2, 0x7bd9, 0xdfaa, 0x7bd2, 0xdf92, 0x7bcc, 0xdf79,
-  0x7bc5, 0xdf61, 0x7bbf, 0xdf49, 0x7bb9, 0xdf30, 0x7bb2, 0xdf18,
-  0x7bac, 0xdf00, 0x7ba5, 0xdee8, 0x7b9f, 0xdecf, 0x7b98, 0xdeb7,
-  0x7b92, 0xde9f, 0x7b8b, 0xde87, 0x7b84, 0xde6e, 0x7b7e, 0xde56,
-  0x7b77, 0xde3e, 0x7b71, 0xde26, 0x7b6a, 0xde0d, 0x7b63, 0xddf5,
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-  0x5e93, 0xa9c0, 0x5e82, 0xa9ae, 0x5e71, 0xa99b, 0x5e60, 0xa989,
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-  0x21c2, 0x8489, 0x21aa, 0x8482, 0x2192, 0x847c, 0x2179, 0x8475,
-  0x2161, 0x846e, 0x2149, 0x8468, 0x2131, 0x8461, 0x2118, 0x845b,
-  0x2100, 0x8454, 0x20e8, 0x844e, 0x20d0, 0x8447, 0x20b7, 0x8441,
-  0x209f, 0x843b, 0x2087, 0x8434, 0x206e, 0x842e, 0x2056, 0x8427,
-  0x203e, 0x8421, 0x2025, 0x841b, 0x200d, 0x8415, 0x1ff5, 0x840e,
-  0x1fdc, 0x8408, 0x1fc4, 0x8402, 0x1fac, 0x83fb, 0x1f93, 0x83f5,
-  0x1f7b, 0x83ef, 0x1f63, 0x83e9, 0x1f4a, 0x83e3, 0x1f32, 0x83dd,
-  0x1f19, 0x83d7, 0x1f01, 0x83d0, 0x1ee9, 0x83ca, 0x1ed0, 0x83c4,
-  0x1eb8, 0x83be, 0x1ea0, 0x83b8, 0x1e87, 0x83b2, 0x1e6f, 0x83ac,
-  0x1e56, 0x83a6, 0x1e3e, 0x83a0, 0x1e25, 0x839a, 0x1e0d, 0x8394,
-  0x1df5, 0x838f, 0x1ddc, 0x8389, 0x1dc4, 0x8383, 0x1dab, 0x837d,
-  0x1d93, 0x8377, 0x1d7a, 0x8371, 0x1d62, 0x836c, 0x1d49, 0x8366,
-  0x1d31, 0x8360, 0x1d18, 0x835a, 0x1d00, 0x8355, 0x1ce8, 0x834f,
-  0x1ccf, 0x8349, 0x1cb7, 0x8344, 0x1c9e, 0x833e, 0x1c86, 0x8338,
-  0x1c6d, 0x8333, 0x1c55, 0x832d, 0x1c3c, 0x8328, 0x1c24, 0x8322,
-  0x1c0b, 0x831d, 0x1bf2, 0x8317, 0x1bda, 0x8312, 0x1bc1, 0x830c,
-  0x1ba9, 0x8307, 0x1b90, 0x8301, 0x1b78, 0x82fc, 0x1b5f, 0x82f7,
-  0x1b47, 0x82f1, 0x1b2e, 0x82ec, 0x1b16, 0x82e7, 0x1afd, 0x82e1,
-  0x1ae4, 0x82dc, 0x1acc, 0x82d7, 0x1ab3, 0x82d1, 0x1a9b, 0x82cc,
-  0x1a82, 0x82c7, 0x1a6a, 0x82c2, 0x1a51, 0x82bd, 0x1a38, 0x82b7,
-  0x1a20, 0x82b2, 0x1a07, 0x82ad, 0x19ef, 0x82a8, 0x19d6, 0x82a3,
-  0x19bd, 0x829e, 0x19a5, 0x8299, 0x198c, 0x8294, 0x1973, 0x828f,
-  0x195b, 0x828a, 0x1942, 0x8285, 0x192a, 0x8280, 0x1911, 0x827b,
-  0x18f8, 0x8276, 0x18e0, 0x8271, 0x18c7, 0x826c, 0x18ae, 0x8268,
-  0x1896, 0x8263, 0x187d, 0x825e, 0x1864, 0x8259, 0x184c, 0x8254,
-  0x1833, 0x8250, 0x181a, 0x824b, 0x1802, 0x8246, 0x17e9, 0x8241,
-  0x17d0, 0x823d, 0x17b7, 0x8238, 0x179f, 0x8233, 0x1786, 0x822f,
-  0x176d, 0x822a, 0x1755, 0x8226, 0x173c, 0x8221, 0x1723, 0x821c,
-  0x170a, 0x8218, 0x16f2, 0x8213, 0x16d9, 0x820f, 0x16c0, 0x820a,
-  0x16a8, 0x8206, 0x168f, 0x8201, 0x1676, 0x81fd, 0x165d, 0x81f9,
-  0x1645, 0x81f4, 0x162c, 0x81f0, 0x1613, 0x81ec, 0x15fa, 0x81e7,
-  0x15e2, 0x81e3, 0x15c9, 0x81df, 0x15b0, 0x81da, 0x1597, 0x81d6,
-  0x157f, 0x81d2, 0x1566, 0x81ce, 0x154d, 0x81c9, 0x1534, 0x81c5,
-  0x151b, 0x81c1, 0x1503, 0x81bd, 0x14ea, 0x81b9, 0x14d1, 0x81b5,
-  0x14b8, 0x81b1, 0x149f, 0x81ad, 0x1487, 0x81a9, 0x146e, 0x81a5,
-  0x1455, 0x81a1, 0x143c, 0x819d, 0x1423, 0x8199, 0x140b, 0x8195,
-  0x13f2, 0x8191, 0x13d9, 0x818d, 0x13c0, 0x8189, 0x13a7, 0x8185,
-  0x138e, 0x8181, 0x1376, 0x817d, 0x135d, 0x817a, 0x1344, 0x8176,
-  0x132b, 0x8172, 0x1312, 0x816e, 0x12f9, 0x816b, 0x12e0, 0x8167,
-  0x12c8, 0x8163, 0x12af, 0x815f, 0x1296, 0x815c, 0x127d, 0x8158,
-  0x1264, 0x8155, 0x124b, 0x8151, 0x1232, 0x814d, 0x1219, 0x814a,
-  0x1201, 0x8146, 0x11e8, 0x8143, 0x11cf, 0x813f, 0x11b6, 0x813c,
-  0x119d, 0x8138, 0x1184, 0x8135, 0x116b, 0x8131, 0x1152, 0x812e,
-  0x1139, 0x812b, 0x1121, 0x8127, 0x1108, 0x8124, 0x10ef, 0x8121,
-  0x10d6, 0x811d, 0x10bd, 0x811a, 0x10a4, 0x8117, 0x108b, 0x8113,
-  0x1072, 0x8110, 0x1059, 0x810d, 0x1040, 0x810a, 0x1027, 0x8107,
-  0x100e, 0x8103, 0xff5, 0x8100, 0xfdd, 0x80fd, 0xfc4, 0x80fa,
-  0xfab, 0x80f7, 0xf92, 0x80f4, 0xf79, 0x80f1, 0xf60, 0x80ee,
-  0xf47, 0x80eb, 0xf2e, 0x80e8, 0xf15, 0x80e5, 0xefc, 0x80e2,
-  0xee3, 0x80df, 0xeca, 0x80dc, 0xeb1, 0x80d9, 0xe98, 0x80d6,
-  0xe7f, 0x80d3, 0xe66, 0x80d1, 0xe4d, 0x80ce, 0xe34, 0x80cb,
-  0xe1b, 0x80c8, 0xe02, 0x80c5, 0xde9, 0x80c3, 0xdd0, 0x80c0,
-  0xdb7, 0x80bd, 0xd9e, 0x80bb, 0xd85, 0x80b8, 0xd6c, 0x80b5,
-  0xd53, 0x80b3, 0xd3a, 0x80b0, 0xd21, 0x80ad, 0xd08, 0x80ab,
-  0xcef, 0x80a8, 0xcd6, 0x80a6, 0xcbd, 0x80a3, 0xca4, 0x80a1,
-  0xc8b, 0x809e, 0xc72, 0x809c, 0xc59, 0x8099, 0xc40, 0x8097,
-  0xc27, 0x8095, 0xc0e, 0x8092, 0xbf5, 0x8090, 0xbdc, 0x808e,
-  0xbc3, 0x808b, 0xbaa, 0x8089, 0xb91, 0x8087, 0xb78, 0x8084,
-  0xb5f, 0x8082, 0xb46, 0x8080, 0xb2d, 0x807e, 0xb14, 0x807b,
-  0xafb, 0x8079, 0xae2, 0x8077, 0xac9, 0x8075, 0xab0, 0x8073,
-  0xa97, 0x8071, 0xa7e, 0x806f, 0xa65, 0x806d, 0xa4c, 0x806b,
-  0xa33, 0x8069, 0xa19, 0x8067, 0xa00, 0x8065, 0x9e7, 0x8063,
-  0x9ce, 0x8061, 0x9b5, 0x805f, 0x99c, 0x805d, 0x983, 0x805b,
-  0x96a, 0x8059, 0x951, 0x8057, 0x938, 0x8056, 0x91f, 0x8054,
-  0x906, 0x8052, 0x8ed, 0x8050, 0x8d4, 0x804f, 0x8bb, 0x804d,
-  0x8a2, 0x804b, 0x888, 0x8049, 0x86f, 0x8048, 0x856, 0x8046,
-  0x83d, 0x8044, 0x824, 0x8043, 0x80b, 0x8041, 0x7f2, 0x8040,
-  0x7d9, 0x803e, 0x7c0, 0x803d, 0x7a7, 0x803b, 0x78e, 0x803a,
-  0x775, 0x8038, 0x75b, 0x8037, 0x742, 0x8035, 0x729, 0x8034,
-  0x710, 0x8032, 0x6f7, 0x8031, 0x6de, 0x8030, 0x6c5, 0x802e,
-  0x6ac, 0x802d, 0x693, 0x802c, 0x67a, 0x802a, 0x660, 0x8029,
-  0x647, 0x8028, 0x62e, 0x8027, 0x615, 0x8026, 0x5fc, 0x8024,
-  0x5e3, 0x8023, 0x5ca, 0x8022, 0x5b1, 0x8021, 0x598, 0x8020,
-  0x57f, 0x801f, 0x565, 0x801e, 0x54c, 0x801d, 0x533, 0x801c,
-  0x51a, 0x801b, 0x501, 0x801a, 0x4e8, 0x8019, 0x4cf, 0x8018,
-  0x4b6, 0x8017, 0x49c, 0x8016, 0x483, 0x8015, 0x46a, 0x8014,
-  0x451, 0x8013, 0x438, 0x8012, 0x41f, 0x8012, 0x406, 0x8011,
-  0x3ed, 0x8010, 0x3d4, 0x800f, 0x3ba, 0x800e, 0x3a1, 0x800e,
-  0x388, 0x800d, 0x36f, 0x800c, 0x356, 0x800c, 0x33d, 0x800b,
-  0x324, 0x800a, 0x30b, 0x800a, 0x2f1, 0x8009, 0x2d8, 0x8009,
-  0x2bf, 0x8008, 0x2a6, 0x8008, 0x28d, 0x8007, 0x274, 0x8007,
-  0x25b, 0x8006, 0x242, 0x8006, 0x228, 0x8005, 0x20f, 0x8005,
-  0x1f6, 0x8004, 0x1dd, 0x8004, 0x1c4, 0x8004, 0x1ab, 0x8003,
-  0x192, 0x8003, 0x178, 0x8003, 0x15f, 0x8002, 0x146, 0x8002,
-  0x12d, 0x8002, 0x114, 0x8002, 0xfb, 0x8001, 0xe2, 0x8001,
-  0xc9, 0x8001, 0xaf, 0x8001, 0x96, 0x8001, 0x7d, 0x8001,
-  0x64, 0x8001, 0x4b, 0x8001, 0x32, 0x8001, 0x19, 0x8001,
-};
-
-static const q15_t ALIGN4 WeightsQ15_8192[16384] = {
-  0x7fff, 0x0, 0x7fff, 0xfffa, 0x7fff, 0xfff4, 0x7fff, 0xffee,
-  0x7fff, 0xffe7, 0x7fff, 0xffe1, 0x7fff, 0xffdb, 0x7fff, 0xffd5,
-  0x7fff, 0xffce, 0x7fff, 0xffc8, 0x7fff, 0xffc2, 0x7fff, 0xffbb,
-  0x7fff, 0xffb5, 0x7fff, 0xffaf, 0x7fff, 0xffa9, 0x7fff, 0xffa2,
-  0x7fff, 0xff9c, 0x7fff, 0xff96, 0x7fff, 0xff8f, 0x7fff, 0xff89,
-  0x7fff, 0xff83, 0x7fff, 0xff7d, 0x7fff, 0xff76, 0x7fff, 0xff70,
-  0x7fff, 0xff6a, 0x7fff, 0xff63, 0x7fff, 0xff5d, 0x7fff, 0xff57,
-  0x7fff, 0xff51, 0x7fff, 0xff4a, 0x7fff, 0xff44, 0x7fff, 0xff3e,
-  0x7fff, 0xff37, 0x7fff, 0xff31, 0x7fff, 0xff2b, 0x7fff, 0xff25,
-  0x7fff, 0xff1e, 0x7fff, 0xff18, 0x7fff, 0xff12, 0x7fff, 0xff0b,
-  0x7fff, 0xff05, 0x7ffe, 0xfeff, 0x7ffe, 0xfef9, 0x7ffe, 0xfef2,
-  0x7ffe, 0xfeec, 0x7ffe, 0xfee6, 0x7ffe, 0xfedf, 0x7ffe, 0xfed9,
-  0x7ffe, 0xfed3, 0x7ffe, 0xfecd, 0x7ffe, 0xfec6, 0x7ffe, 0xfec0,
-  0x7ffe, 0xfeba, 0x7ffe, 0xfeb3, 0x7ffe, 0xfead, 0x7ffe, 0xfea7,
-  0x7ffe, 0xfea1, 0x7ffe, 0xfe9a, 0x7ffd, 0xfe94, 0x7ffd, 0xfe8e,
-  0x7ffd, 0xfe88, 0x7ffd, 0xfe81, 0x7ffd, 0xfe7b, 0x7ffd, 0xfe75,
-  0x7ffd, 0xfe6e, 0x7ffd, 0xfe68, 0x7ffd, 0xfe62, 0x7ffd, 0xfe5c,
-  0x7ffd, 0xfe55, 0x7ffd, 0xfe4f, 0x7ffd, 0xfe49, 0x7ffc, 0xfe42,
-  0x7ffc, 0xfe3c, 0x7ffc, 0xfe36, 0x7ffc, 0xfe30, 0x7ffc, 0xfe29,
-  0x7ffc, 0xfe23, 0x7ffc, 0xfe1d, 0x7ffc, 0xfe16, 0x7ffc, 0xfe10,
-  0x7ffc, 0xfe0a, 0x7ffc, 0xfe04, 0x7ffb, 0xfdfd, 0x7ffb, 0xfdf7,
-  0x7ffb, 0xfdf1, 0x7ffb, 0xfdea, 0x7ffb, 0xfde4, 0x7ffb, 0xfdde,
-  0x7ffb, 0xfdd8, 0x7ffb, 0xfdd1, 0x7ffb, 0xfdcb, 0x7ffb, 0xfdc5,
-  0x7ffa, 0xfdbe, 0x7ffa, 0xfdb8, 0x7ffa, 0xfdb2, 0x7ffa, 0xfdac,
-  0x7ffa, 0xfda5, 0x7ffa, 0xfd9f, 0x7ffa, 0xfd99, 0x7ffa, 0xfd93,
-  0x7ff9, 0xfd8c, 0x7ff9, 0xfd86, 0x7ff9, 0xfd80, 0x7ff9, 0xfd79,
-  0x7ff9, 0xfd73, 0x7ff9, 0xfd6d, 0x7ff9, 0xfd67, 0x7ff9, 0xfd60,
-  0x7ff8, 0xfd5a, 0x7ff8, 0xfd54, 0x7ff8, 0xfd4d, 0x7ff8, 0xfd47,
-  0x7ff8, 0xfd41, 0x7ff8, 0xfd3b, 0x7ff8, 0xfd34, 0x7ff8, 0xfd2e,
-  0x7ff7, 0xfd28, 0x7ff7, 0xfd21, 0x7ff7, 0xfd1b, 0x7ff7, 0xfd15,
-  0x7ff7, 0xfd0f, 0x7ff7, 0xfd08, 0x7ff7, 0xfd02, 0x7ff6, 0xfcfc,
-  0x7ff6, 0xfcf5, 0x7ff6, 0xfcef, 0x7ff6, 0xfce9, 0x7ff6, 0xfce3,
-  0x7ff6, 0xfcdc, 0x7ff5, 0xfcd6, 0x7ff5, 0xfcd0, 0x7ff5, 0xfcc9,
-  0x7ff5, 0xfcc3, 0x7ff5, 0xfcbd, 0x7ff5, 0xfcb7, 0x7ff5, 0xfcb0,
-  0x7ff4, 0xfcaa, 0x7ff4, 0xfca4, 0x7ff4, 0xfc9e, 0x7ff4, 0xfc97,
-  0x7ff4, 0xfc91, 0x7ff4, 0xfc8b, 0x7ff3, 0xfc84, 0x7ff3, 0xfc7e,
-  0x7ff3, 0xfc78, 0x7ff3, 0xfc72, 0x7ff3, 0xfc6b, 0x7ff2, 0xfc65,
-  0x7ff2, 0xfc5f, 0x7ff2, 0xfc58, 0x7ff2, 0xfc52, 0x7ff2, 0xfc4c,
-  0x7ff2, 0xfc46, 0x7ff1, 0xfc3f, 0x7ff1, 0xfc39, 0x7ff1, 0xfc33,
-  0x7ff1, 0xfc2c, 0x7ff1, 0xfc26, 0x7ff0, 0xfc20, 0x7ff0, 0xfc1a,
-  0x7ff0, 0xfc13, 0x7ff0, 0xfc0d, 0x7ff0, 0xfc07, 0x7fef, 0xfc01,
-  0x7fef, 0xfbfa, 0x7fef, 0xfbf4, 0x7fef, 0xfbee, 0x7fef, 0xfbe7,
-  0x7fee, 0xfbe1, 0x7fee, 0xfbdb, 0x7fee, 0xfbd5, 0x7fee, 0xfbce,
-  0x7fee, 0xfbc8, 0x7fed, 0xfbc2, 0x7fed, 0xfbbb, 0x7fed, 0xfbb5,
-  0x7fed, 0xfbaf, 0x7fed, 0xfba9, 0x7fec, 0xfba2, 0x7fec, 0xfb9c,
-  0x7fec, 0xfb96, 0x7fec, 0xfb8f, 0x7fec, 0xfb89, 0x7feb, 0xfb83,
-  0x7feb, 0xfb7d, 0x7feb, 0xfb76, 0x7feb, 0xfb70, 0x7fea, 0xfb6a,
-  0x7fea, 0xfb64, 0x7fea, 0xfb5d, 0x7fea, 0xfb57, 0x7fea, 0xfb51,
-  0x7fe9, 0xfb4a, 0x7fe9, 0xfb44, 0x7fe9, 0xfb3e, 0x7fe9, 0xfb38,
-  0x7fe8, 0xfb31, 0x7fe8, 0xfb2b, 0x7fe8, 0xfb25, 0x7fe8, 0xfb1e,
-  0x7fe7, 0xfb18, 0x7fe7, 0xfb12, 0x7fe7, 0xfb0c, 0x7fe7, 0xfb05,
-  0x7fe6, 0xfaff, 0x7fe6, 0xfaf9, 0x7fe6, 0xfaf3, 0x7fe6, 0xfaec,
-  0x7fe5, 0xfae6, 0x7fe5, 0xfae0, 0x7fe5, 0xfad9, 0x7fe5, 0xfad3,
-  0x7fe4, 0xfacd, 0x7fe4, 0xfac7, 0x7fe4, 0xfac0, 0x7fe4, 0xfaba,
-  0x7fe3, 0xfab4, 0x7fe3, 0xfaad, 0x7fe3, 0xfaa7, 0x7fe3, 0xfaa1,
-  0x7fe2, 0xfa9b, 0x7fe2, 0xfa94, 0x7fe2, 0xfa8e, 0x7fe2, 0xfa88,
-  0x7fe1, 0xfa81, 0x7fe1, 0xfa7b, 0x7fe1, 0xfa75, 0x7fe0, 0xfa6f,
-  0x7fe0, 0xfa68, 0x7fe0, 0xfa62, 0x7fe0, 0xfa5c, 0x7fdf, 0xfa56,
-  0x7fdf, 0xfa4f, 0x7fdf, 0xfa49, 0x7fdf, 0xfa43, 0x7fde, 0xfa3c,
-  0x7fde, 0xfa36, 0x7fde, 0xfa30, 0x7fdd, 0xfa2a, 0x7fdd, 0xfa23,
-  0x7fdd, 0xfa1d, 0x7fdd, 0xfa17, 0x7fdc, 0xfa11, 0x7fdc, 0xfa0a,
-  0x7fdc, 0xfa04, 0x7fdb, 0xf9fe, 0x7fdb, 0xf9f7, 0x7fdb, 0xf9f1,
-  0x7fda, 0xf9eb, 0x7fda, 0xf9e5, 0x7fda, 0xf9de, 0x7fda, 0xf9d8,
-  0x7fd9, 0xf9d2, 0x7fd9, 0xf9cb, 0x7fd9, 0xf9c5, 0x7fd8, 0xf9bf,
-  0x7fd8, 0xf9b9, 0x7fd8, 0xf9b2, 0x7fd7, 0xf9ac, 0x7fd7, 0xf9a6,
-  0x7fd7, 0xf9a0, 0x7fd6, 0xf999, 0x7fd6, 0xf993, 0x7fd6, 0xf98d,
-  0x7fd6, 0xf986, 0x7fd5, 0xf980, 0x7fd5, 0xf97a, 0x7fd5, 0xf974,
-  0x7fd4, 0xf96d, 0x7fd4, 0xf967, 0x7fd4, 0xf961, 0x7fd3, 0xf95b,
-  0x7fd3, 0xf954, 0x7fd3, 0xf94e, 0x7fd2, 0xf948, 0x7fd2, 0xf941,
-  0x7fd2, 0xf93b, 0x7fd1, 0xf935, 0x7fd1, 0xf92f, 0x7fd1, 0xf928,
-  0x7fd0, 0xf922, 0x7fd0, 0xf91c, 0x7fd0, 0xf916, 0x7fcf, 0xf90f,
-  0x7fcf, 0xf909, 0x7fcf, 0xf903, 0x7fce, 0xf8fc, 0x7fce, 0xf8f6,
-  0x7fce, 0xf8f0, 0x7fcd, 0xf8ea, 0x7fcd, 0xf8e3, 0x7fcd, 0xf8dd,
-  0x7fcc, 0xf8d7, 0x7fcc, 0xf8d0, 0x7fcb, 0xf8ca, 0x7fcb, 0xf8c4,
-  0x7fcb, 0xf8be, 0x7fca, 0xf8b7, 0x7fca, 0xf8b1, 0x7fca, 0xf8ab,
-  0x7fc9, 0xf8a5, 0x7fc9, 0xf89e, 0x7fc9, 0xf898, 0x7fc8, 0xf892,
-  0x7fc8, 0xf88b, 0x7fc7, 0xf885, 0x7fc7, 0xf87f, 0x7fc7, 0xf879,
-  0x7fc6, 0xf872, 0x7fc6, 0xf86c, 0x7fc6, 0xf866, 0x7fc5, 0xf860,
-  0x7fc5, 0xf859, 0x7fc5, 0xf853, 0x7fc4, 0xf84d, 0x7fc4, 0xf846,
-  0x7fc3, 0xf840, 0x7fc3, 0xf83a, 0x7fc3, 0xf834, 0x7fc2, 0xf82d,
-  0x7fc2, 0xf827, 0x7fc1, 0xf821, 0x7fc1, 0xf81b, 0x7fc1, 0xf814,
-  0x7fc0, 0xf80e, 0x7fc0, 0xf808, 0x7fc0, 0xf802, 0x7fbf, 0xf7fb,
-  0x7fbf, 0xf7f5, 0x7fbe, 0xf7ef, 0x7fbe, 0xf7e8, 0x7fbe, 0xf7e2,
-  0x7fbd, 0xf7dc, 0x7fbd, 0xf7d6, 0x7fbc, 0xf7cf, 0x7fbc, 0xf7c9,
-  0x7fbc, 0xf7c3, 0x7fbb, 0xf7bd, 0x7fbb, 0xf7b6, 0x7fba, 0xf7b0,
-  0x7fba, 0xf7aa, 0x7fb9, 0xf7a3, 0x7fb9, 0xf79d, 0x7fb9, 0xf797,
-  0x7fb8, 0xf791, 0x7fb8, 0xf78a, 0x7fb7, 0xf784, 0x7fb7, 0xf77e,
-  0x7fb7, 0xf778, 0x7fb6, 0xf771, 0x7fb6, 0xf76b, 0x7fb5, 0xf765,
-  0x7fb5, 0xf75e, 0x7fb4, 0xf758, 0x7fb4, 0xf752, 0x7fb4, 0xf74c,
-  0x7fb3, 0xf745, 0x7fb3, 0xf73f, 0x7fb2, 0xf739, 0x7fb2, 0xf733,
-  0x7fb1, 0xf72c, 0x7fb1, 0xf726, 0x7fb1, 0xf720, 0x7fb0, 0xf71a,
-  0x7fb0, 0xf713, 0x7faf, 0xf70d, 0x7faf, 0xf707, 0x7fae, 0xf700,
-  0x7fae, 0xf6fa, 0x7fae, 0xf6f4, 0x7fad, 0xf6ee, 0x7fad, 0xf6e7,
-  0x7fac, 0xf6e1, 0x7fac, 0xf6db, 0x7fab, 0xf6d5, 0x7fab, 0xf6ce,
-  0x7faa, 0xf6c8, 0x7faa, 0xf6c2, 0x7fa9, 0xf6bc, 0x7fa9, 0xf6b5,
-  0x7fa9, 0xf6af, 0x7fa8, 0xf6a9, 0x7fa8, 0xf6a2, 0x7fa7, 0xf69c,
-  0x7fa7, 0xf696, 0x7fa6, 0xf690, 0x7fa6, 0xf689, 0x7fa5, 0xf683,
-  0x7fa5, 0xf67d, 0x7fa4, 0xf677, 0x7fa4, 0xf670, 0x7fa3, 0xf66a,
-  0x7fa3, 0xf664, 0x7fa3, 0xf65e, 0x7fa2, 0xf657, 0x7fa2, 0xf651,
-  0x7fa1, 0xf64b, 0x7fa1, 0xf644, 0x7fa0, 0xf63e, 0x7fa0, 0xf638,
-  0x7f9f, 0xf632, 0x7f9f, 0xf62b, 0x7f9e, 0xf625, 0x7f9e, 0xf61f,
-  0x7f9d, 0xf619, 0x7f9d, 0xf612, 0x7f9c, 0xf60c, 0x7f9c, 0xf606,
-  0x7f9b, 0xf600, 0x7f9b, 0xf5f9, 0x7f9a, 0xf5f3, 0x7f9a, 0xf5ed,
-  0x7f99, 0xf5e7, 0x7f99, 0xf5e0, 0x7f98, 0xf5da, 0x7f98, 0xf5d4,
-  0x7f97, 0xf5cd, 0x7f97, 0xf5c7, 0x7f96, 0xf5c1, 0x7f96, 0xf5bb,
-  0x7f95, 0xf5b4, 0x7f95, 0xf5ae, 0x7f94, 0xf5a8, 0x7f94, 0xf5a2,
-  0x7f93, 0xf59b, 0x7f93, 0xf595, 0x7f92, 0xf58f, 0x7f92, 0xf589,
-  0x7f91, 0xf582, 0x7f91, 0xf57c, 0x7f90, 0xf576, 0x7f90, 0xf570,
-  0x7f8f, 0xf569, 0x7f8f, 0xf563, 0x7f8e, 0xf55d, 0x7f8e, 0xf556,
-  0x7f8d, 0xf550, 0x7f8d, 0xf54a, 0x7f8c, 0xf544, 0x7f8b, 0xf53d,
-  0x7f8b, 0xf537, 0x7f8a, 0xf531, 0x7f8a, 0xf52b, 0x7f89, 0xf524,
-  0x7f89, 0xf51e, 0x7f88, 0xf518, 0x7f88, 0xf512, 0x7f87, 0xf50b,
-  0x7f87, 0xf505, 0x7f86, 0xf4ff, 0x7f86, 0xf4f9, 0x7f85, 0xf4f2,
-  0x7f85, 0xf4ec, 0x7f84, 0xf4e6, 0x7f83, 0xf4e0, 0x7f83, 0xf4d9,
-  0x7f82, 0xf4d3, 0x7f82, 0xf4cd, 0x7f81, 0xf4c6, 0x7f81, 0xf4c0,
-  0x7f80, 0xf4ba, 0x7f80, 0xf4b4, 0x7f7f, 0xf4ad, 0x7f7e, 0xf4a7,
-  0x7f7e, 0xf4a1, 0x7f7d, 0xf49b, 0x7f7d, 0xf494, 0x7f7c, 0xf48e,
-  0x7f7c, 0xf488, 0x7f7b, 0xf482, 0x7f7b, 0xf47b, 0x7f7a, 0xf475,
-  0x7f79, 0xf46f, 0x7f79, 0xf469, 0x7f78, 0xf462, 0x7f78, 0xf45c,
-  0x7f77, 0xf456, 0x7f77, 0xf450, 0x7f76, 0xf449, 0x7f75, 0xf443,
-  0x7f75, 0xf43d, 0x7f74, 0xf437, 0x7f74, 0xf430, 0x7f73, 0xf42a,
-  0x7f72, 0xf424, 0x7f72, 0xf41e, 0x7f71, 0xf417, 0x7f71, 0xf411,
-  0x7f70, 0xf40b, 0x7f70, 0xf405, 0x7f6f, 0xf3fe, 0x7f6e, 0xf3f8,
-  0x7f6e, 0xf3f2, 0x7f6d, 0xf3ec, 0x7f6d, 0xf3e5, 0x7f6c, 0xf3df,
-  0x7f6b, 0xf3d9, 0x7f6b, 0xf3d2, 0x7f6a, 0xf3cc, 0x7f6a, 0xf3c6,
-  0x7f69, 0xf3c0, 0x7f68, 0xf3b9, 0x7f68, 0xf3b3, 0x7f67, 0xf3ad,
-  0x7f67, 0xf3a7, 0x7f66, 0xf3a0, 0x7f65, 0xf39a, 0x7f65, 0xf394,
-  0x7f64, 0xf38e, 0x7f64, 0xf387, 0x7f63, 0xf381, 0x7f62, 0xf37b,
-  0x7f62, 0xf375, 0x7f61, 0xf36e, 0x7f60, 0xf368, 0x7f60, 0xf362,
-  0x7f5f, 0xf35c, 0x7f5f, 0xf355, 0x7f5e, 0xf34f, 0x7f5d, 0xf349,
-  0x7f5d, 0xf343, 0x7f5c, 0xf33c, 0x7f5b, 0xf336, 0x7f5b, 0xf330,
-  0x7f5a, 0xf32a, 0x7f5a, 0xf323, 0x7f59, 0xf31d, 0x7f58, 0xf317,
-  0x7f58, 0xf311, 0x7f57, 0xf30a, 0x7f56, 0xf304, 0x7f56, 0xf2fe,
-  0x7f55, 0xf2f8, 0x7f55, 0xf2f1, 0x7f54, 0xf2eb, 0x7f53, 0xf2e5,
-  0x7f53, 0xf2df, 0x7f52, 0xf2d8, 0x7f51, 0xf2d2, 0x7f51, 0xf2cc,
-  0x7f50, 0xf2c6, 0x7f4f, 0xf2bf, 0x7f4f, 0xf2b9, 0x7f4e, 0xf2b3,
-  0x7f4d, 0xf2ad, 0x7f4d, 0xf2a6, 0x7f4c, 0xf2a0, 0x7f4b, 0xf29a,
-  0x7f4b, 0xf294, 0x7f4a, 0xf28d, 0x7f49, 0xf287, 0x7f49, 0xf281,
-  0x7f48, 0xf27b, 0x7f47, 0xf274, 0x7f47, 0xf26e, 0x7f46, 0xf268,
-  0x7f45, 0xf262, 0x7f45, 0xf25b, 0x7f44, 0xf255, 0x7f43, 0xf24f,
-  0x7f43, 0xf249, 0x7f42, 0xf242, 0x7f41, 0xf23c, 0x7f41, 0xf236,
-  0x7f40, 0xf230, 0x7f3f, 0xf229, 0x7f3f, 0xf223, 0x7f3e, 0xf21d,
-  0x7f3d, 0xf217, 0x7f3d, 0xf210, 0x7f3c, 0xf20a, 0x7f3b, 0xf204,
-  0x7f3b, 0xf1fe, 0x7f3a, 0xf1f7, 0x7f39, 0xf1f1, 0x7f39, 0xf1eb,
-  0x7f38, 0xf1e5, 0x7f37, 0xf1de, 0x7f36, 0xf1d8, 0x7f36, 0xf1d2,
-  0x7f35, 0xf1cc, 0x7f34, 0xf1c6, 0x7f34, 0xf1bf, 0x7f33, 0xf1b9,
-  0x7f32, 0xf1b3, 0x7f32, 0xf1ad, 0x7f31, 0xf1a6, 0x7f30, 0xf1a0,
-  0x7f2f, 0xf19a, 0x7f2f, 0xf194, 0x7f2e, 0xf18d, 0x7f2d, 0xf187,
-  0x7f2d, 0xf181, 0x7f2c, 0xf17b, 0x7f2b, 0xf174, 0x7f2a, 0xf16e,
-  0x7f2a, 0xf168, 0x7f29, 0xf162, 0x7f28, 0xf15b, 0x7f28, 0xf155,
-  0x7f27, 0xf14f, 0x7f26, 0xf149, 0x7f25, 0xf142, 0x7f25, 0xf13c,
-  0x7f24, 0xf136, 0x7f23, 0xf130, 0x7f23, 0xf129, 0x7f22, 0xf123,
-  0x7f21, 0xf11d, 0x7f20, 0xf117, 0x7f20, 0xf110, 0x7f1f, 0xf10a,
-  0x7f1e, 0xf104, 0x7f1d, 0xf0fe, 0x7f1d, 0xf0f8, 0x7f1c, 0xf0f1,
-  0x7f1b, 0xf0eb, 0x7f1a, 0xf0e5, 0x7f1a, 0xf0df, 0x7f19, 0xf0d8,
-  0x7f18, 0xf0d2, 0x7f17, 0xf0cc, 0x7f17, 0xf0c6, 0x7f16, 0xf0bf,
-  0x7f15, 0xf0b9, 0x7f14, 0xf0b3, 0x7f14, 0xf0ad, 0x7f13, 0xf0a6,
-  0x7f12, 0xf0a0, 0x7f11, 0xf09a, 0x7f11, 0xf094, 0x7f10, 0xf08d,
-  0x7f0f, 0xf087, 0x7f0e, 0xf081, 0x7f0e, 0xf07b, 0x7f0d, 0xf075,
-  0x7f0c, 0xf06e, 0x7f0b, 0xf068, 0x7f0b, 0xf062, 0x7f0a, 0xf05c,
-  0x7f09, 0xf055, 0x7f08, 0xf04f, 0x7f08, 0xf049, 0x7f07, 0xf043,
-  0x7f06, 0xf03c, 0x7f05, 0xf036, 0x7f04, 0xf030, 0x7f04, 0xf02a,
-  0x7f03, 0xf023, 0x7f02, 0xf01d, 0x7f01, 0xf017, 0x7f01, 0xf011,
-  0x7f00, 0xf00b, 0x7eff, 0xf004, 0x7efe, 0xeffe, 0x7efd, 0xeff8,
-  0x7efd, 0xeff2, 0x7efc, 0xefeb, 0x7efb, 0xefe5, 0x7efa, 0xefdf,
-  0x7ef9, 0xefd9, 0x7ef9, 0xefd2, 0x7ef8, 0xefcc, 0x7ef7, 0xefc6,
-  0x7ef6, 0xefc0, 0x7ef5, 0xefb9, 0x7ef5, 0xefb3, 0x7ef4, 0xefad,
-  0x7ef3, 0xefa7, 0x7ef2, 0xefa1, 0x7ef1, 0xef9a, 0x7ef1, 0xef94,
-  0x7ef0, 0xef8e, 0x7eef, 0xef88, 0x7eee, 0xef81, 0x7eed, 0xef7b,
-  0x7eed, 0xef75, 0x7eec, 0xef6f, 0x7eeb, 0xef68, 0x7eea, 0xef62,
-  0x7ee9, 0xef5c, 0x7ee9, 0xef56, 0x7ee8, 0xef50, 0x7ee7, 0xef49,
-  0x7ee6, 0xef43, 0x7ee5, 0xef3d, 0x7ee4, 0xef37, 0x7ee4, 0xef30,
-  0x7ee3, 0xef2a, 0x7ee2, 0xef24, 0x7ee1, 0xef1e, 0x7ee0, 0xef18,
-  0x7edf, 0xef11, 0x7edf, 0xef0b, 0x7ede, 0xef05, 0x7edd, 0xeeff,
-  0x7edc, 0xeef8, 0x7edb, 0xeef2, 0x7eda, 0xeeec, 0x7eda, 0xeee6,
-  0x7ed9, 0xeedf, 0x7ed8, 0xeed9, 0x7ed7, 0xeed3, 0x7ed6, 0xeecd,
-  0x7ed5, 0xeec7, 0x7ed5, 0xeec0, 0x7ed4, 0xeeba, 0x7ed3, 0xeeb4,
-  0x7ed2, 0xeeae, 0x7ed1, 0xeea7, 0x7ed0, 0xeea1, 0x7ecf, 0xee9b,
-  0x7ecf, 0xee95, 0x7ece, 0xee8f, 0x7ecd, 0xee88, 0x7ecc, 0xee82,
-  0x7ecb, 0xee7c, 0x7eca, 0xee76, 0x7ec9, 0xee6f, 0x7ec9, 0xee69,
-  0x7ec8, 0xee63, 0x7ec7, 0xee5d, 0x7ec6, 0xee57, 0x7ec5, 0xee50,
-  0x7ec4, 0xee4a, 0x7ec3, 0xee44, 0x7ec3, 0xee3e, 0x7ec2, 0xee37,
-  0x7ec1, 0xee31, 0x7ec0, 0xee2b, 0x7ebf, 0xee25, 0x7ebe, 0xee1f,
-  0x7ebd, 0xee18, 0x7ebc, 0xee12, 0x7ebb, 0xee0c, 0x7ebb, 0xee06,
-  0x7eba, 0xedff, 0x7eb9, 0xedf9, 0x7eb8, 0xedf3, 0x7eb7, 0xeded,
-  0x7eb6, 0xede7, 0x7eb5, 0xede0, 0x7eb4, 0xedda, 0x7eb4, 0xedd4,
-  0x7eb3, 0xedce, 0x7eb2, 0xedc7, 0x7eb1, 0xedc1, 0x7eb0, 0xedbb,
-  0x7eaf, 0xedb5, 0x7eae, 0xedaf, 0x7ead, 0xeda8, 0x7eac, 0xeda2,
-  0x7eab, 0xed9c, 0x7eab, 0xed96, 0x7eaa, 0xed8f, 0x7ea9, 0xed89,
-  0x7ea8, 0xed83, 0x7ea7, 0xed7d, 0x7ea6, 0xed77, 0x7ea5, 0xed70,
-  0x7ea4, 0xed6a, 0x7ea3, 0xed64, 0x7ea2, 0xed5e, 0x7ea1, 0xed58,
-  0x7ea1, 0xed51, 0x7ea0, 0xed4b, 0x7e9f, 0xed45, 0x7e9e, 0xed3f,
-  0x7e9d, 0xed38, 0x7e9c, 0xed32, 0x7e9b, 0xed2c, 0x7e9a, 0xed26,
-  0x7e99, 0xed20, 0x7e98, 0xed19, 0x7e97, 0xed13, 0x7e96, 0xed0d,
-  0x7e95, 0xed07, 0x7e94, 0xed01, 0x7e94, 0xecfa, 0x7e93, 0xecf4,
-  0x7e92, 0xecee, 0x7e91, 0xece8, 0x7e90, 0xece1, 0x7e8f, 0xecdb,
-  0x7e8e, 0xecd5, 0x7e8d, 0xeccf, 0x7e8c, 0xecc9, 0x7e8b, 0xecc2,
-  0x7e8a, 0xecbc, 0x7e89, 0xecb6, 0x7e88, 0xecb0, 0x7e87, 0xecaa,
-  0x7e86, 0xeca3, 0x7e85, 0xec9d, 0x7e84, 0xec97, 0x7e84, 0xec91,
-  0x7e83, 0xec8a, 0x7e82, 0xec84, 0x7e81, 0xec7e, 0x7e80, 0xec78,
-  0x7e7f, 0xec72, 0x7e7e, 0xec6b, 0x7e7d, 0xec65, 0x7e7c, 0xec5f,
-  0x7e7b, 0xec59, 0x7e7a, 0xec53, 0x7e79, 0xec4c, 0x7e78, 0xec46,
-  0x7e77, 0xec40, 0x7e76, 0xec3a, 0x7e75, 0xec34, 0x7e74, 0xec2d,
-  0x7e73, 0xec27, 0x7e72, 0xec21, 0x7e71, 0xec1b, 0x7e70, 0xec15,
-  0x7e6f, 0xec0e, 0x7e6e, 0xec08, 0x7e6d, 0xec02, 0x7e6c, 0xebfc,
-  0x7e6b, 0xebf5, 0x7e6a, 0xebef, 0x7e69, 0xebe9, 0x7e68, 0xebe3,
-  0x7e67, 0xebdd, 0x7e66, 0xebd6, 0x7e65, 0xebd0, 0x7e64, 0xebca,
-  0x7e63, 0xebc4, 0x7e62, 0xebbe, 0x7e61, 0xebb7, 0x7e60, 0xebb1,
-  0x7e5f, 0xebab, 0x7e5e, 0xeba5, 0x7e5d, 0xeb9f, 0x7e5c, 0xeb98,
-  0x7e5b, 0xeb92, 0x7e5a, 0xeb8c, 0x7e59, 0xeb86, 0x7e58, 0xeb80,
-  0x7e57, 0xeb79, 0x7e56, 0xeb73, 0x7e55, 0xeb6d, 0x7e54, 0xeb67,
-  0x7e53, 0xeb61, 0x7e52, 0xeb5a, 0x7e51, 0xeb54, 0x7e50, 0xeb4e,
-  0x7e4f, 0xeb48, 0x7e4e, 0xeb42, 0x7e4d, 0xeb3b, 0x7e4c, 0xeb35,
-  0x7e4b, 0xeb2f, 0x7e4a, 0xeb29, 0x7e49, 0xeb23, 0x7e48, 0xeb1c,
-  0x7e47, 0xeb16, 0x7e46, 0xeb10, 0x7e45, 0xeb0a, 0x7e44, 0xeb04,
-  0x7e43, 0xeafd, 0x7e42, 0xeaf7, 0x7e41, 0xeaf1, 0x7e40, 0xeaeb,
-  0x7e3f, 0xeae5, 0x7e3e, 0xeade, 0x7e3d, 0xead8, 0x7e3c, 0xead2,
-  0x7e3b, 0xeacc, 0x7e3a, 0xeac6, 0x7e39, 0xeabf, 0x7e38, 0xeab9,
-  0x7e37, 0xeab3, 0x7e35, 0xeaad, 0x7e34, 0xeaa7, 0x7e33, 0xeaa0,
-  0x7e32, 0xea9a, 0x7e31, 0xea94, 0x7e30, 0xea8e, 0x7e2f, 0xea88,
-  0x7e2e, 0xea81, 0x7e2d, 0xea7b, 0x7e2c, 0xea75, 0x7e2b, 0xea6f,
-  0x7e2a, 0xea69, 0x7e29, 0xea63, 0x7e28, 0xea5c, 0x7e27, 0xea56,
-  0x7e26, 0xea50, 0x7e25, 0xea4a, 0x7e24, 0xea44, 0x7e22, 0xea3d,
-  0x7e21, 0xea37, 0x7e20, 0xea31, 0x7e1f, 0xea2b, 0x7e1e, 0xea25,
-  0x7e1d, 0xea1e, 0x7e1c, 0xea18, 0x7e1b, 0xea12, 0x7e1a, 0xea0c,
-  0x7e19, 0xea06, 0x7e18, 0xe9ff, 0x7e17, 0xe9f9, 0x7e16, 0xe9f3,
-  0x7e14, 0xe9ed, 0x7e13, 0xe9e7, 0x7e12, 0xe9e1, 0x7e11, 0xe9da,
-  0x7e10, 0xe9d4, 0x7e0f, 0xe9ce, 0x7e0e, 0xe9c8, 0x7e0d, 0xe9c2,
-  0x7e0c, 0xe9bb, 0x7e0b, 0xe9b5, 0x7e0a, 0xe9af, 0x7e08, 0xe9a9,
-  0x7e07, 0xe9a3, 0x7e06, 0xe99c, 0x7e05, 0xe996, 0x7e04, 0xe990,
-  0x7e03, 0xe98a, 0x7e02, 0xe984, 0x7e01, 0xe97e, 0x7e00, 0xe977,
-  0x7dff, 0xe971, 0x7dfd, 0xe96b, 0x7dfc, 0xe965, 0x7dfb, 0xe95f,
-  0x7dfa, 0xe958, 0x7df9, 0xe952, 0x7df8, 0xe94c, 0x7df7, 0xe946,
-  0x7df6, 0xe940, 0x7df5, 0xe93a, 0x7df3, 0xe933, 0x7df2, 0xe92d,
-  0x7df1, 0xe927, 0x7df0, 0xe921, 0x7def, 0xe91b, 0x7dee, 0xe914,
-  0x7ded, 0xe90e, 0x7dec, 0xe908, 0x7dea, 0xe902, 0x7de9, 0xe8fc,
-  0x7de8, 0xe8f6, 0x7de7, 0xe8ef, 0x7de6, 0xe8e9, 0x7de5, 0xe8e3,
-  0x7de4, 0xe8dd, 0x7de2, 0xe8d7, 0x7de1, 0xe8d0, 0x7de0, 0xe8ca,
-  0x7ddf, 0xe8c4, 0x7dde, 0xe8be, 0x7ddd, 0xe8b8, 0x7ddc, 0xe8b2,
-  0x7dda, 0xe8ab, 0x7dd9, 0xe8a5, 0x7dd8, 0xe89f, 0x7dd7, 0xe899,
-  0x7dd6, 0xe893, 0x7dd5, 0xe88c, 0x7dd4, 0xe886, 0x7dd2, 0xe880,
-  0x7dd1, 0xe87a, 0x7dd0, 0xe874, 0x7dcf, 0xe86e, 0x7dce, 0xe867,
-  0x7dcd, 0xe861, 0x7dcc, 0xe85b, 0x7dca, 0xe855, 0x7dc9, 0xe84f,
-  0x7dc8, 0xe849, 0x7dc7, 0xe842, 0x7dc6, 0xe83c, 0x7dc5, 0xe836,
-  0x7dc3, 0xe830, 0x7dc2, 0xe82a, 0x7dc1, 0xe823, 0x7dc0, 0xe81d,
-  0x7dbf, 0xe817, 0x7dbd, 0xe811, 0x7dbc, 0xe80b, 0x7dbb, 0xe805,
-  0x7dba, 0xe7fe, 0x7db9, 0xe7f8, 0x7db8, 0xe7f2, 0x7db6, 0xe7ec,
-  0x7db5, 0xe7e6, 0x7db4, 0xe7e0, 0x7db3, 0xe7d9, 0x7db2, 0xe7d3,
-  0x7db0, 0xe7cd, 0x7daf, 0xe7c7, 0x7dae, 0xe7c1, 0x7dad, 0xe7bb,
-  0x7dac, 0xe7b4, 0x7dab, 0xe7ae, 0x7da9, 0xe7a8, 0x7da8, 0xe7a2,
-  0x7da7, 0xe79c, 0x7da6, 0xe796, 0x7da5, 0xe78f, 0x7da3, 0xe789,
-  0x7da2, 0xe783, 0x7da1, 0xe77d, 0x7da0, 0xe777, 0x7d9f, 0xe771,
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-  0x7d19, 0xe4ea, 0x7d18, 0xe4e4, 0x7d17, 0xe4de, 0x7d15, 0xe4d8,
-  0x7d14, 0xe4d2, 0x7d13, 0xe4cc, 0x7d11, 0xe4c6, 0x7d10, 0xe4bf,
-  0x7d0f, 0xe4b9, 0x7d0d, 0xe4b3, 0x7d0c, 0xe4ad, 0x7d0b, 0xe4a7,
-  0x7d09, 0xe4a1, 0x7d08, 0xe49b, 0x7d07, 0xe494, 0x7d05, 0xe48e,
-  0x7d04, 0xe488, 0x7d03, 0xe482, 0x7d01, 0xe47c, 0x7d00, 0xe476,
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-  0x7cf9, 0xe457, 0x7cf8, 0xe451, 0x7cf6, 0xe44b, 0x7cf5, 0xe445,
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-  0x7cee, 0xe426, 0x7ced, 0xe420, 0x7cec, 0xe41a, 0x7cea, 0xe414,
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-  0x7ce3, 0xe3f5, 0x7ce2, 0xe3ef, 0x7ce1, 0xe3e9, 0x7cdf, 0xe3e3,
-  0x7cde, 0xe3dc, 0x7cdc, 0xe3d6, 0x7cdb, 0xe3d0, 0x7cda, 0xe3ca,
-  0x7cd8, 0xe3c4, 0x7cd7, 0xe3be, 0x7cd5, 0xe3b8, 0x7cd4, 0xe3b2,
-  0x7cd3, 0xe3ab, 0x7cd1, 0xe3a5, 0x7cd0, 0xe39f, 0x7ccf, 0xe399,
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-  0x7cc8, 0xe37a, 0x7cc6, 0xe374, 0x7cc5, 0xe36e, 0x7cc3, 0xe368,
-  0x7cc2, 0xe362, 0x7cc1, 0xe35c, 0x7cbf, 0xe356, 0x7cbe, 0xe350,
-  0x7cbc, 0xe349, 0x7cbb, 0xe343, 0x7cb9, 0xe33d, 0x7cb8, 0xe337,
-  0x7cb7, 0xe331, 0x7cb5, 0xe32b, 0x7cb4, 0xe325, 0x7cb2, 0xe31f,
-  0x7cb1, 0xe318, 0x7cb0, 0xe312, 0x7cae, 0xe30c, 0x7cad, 0xe306,
-  0x7cab, 0xe300, 0x7caa, 0xe2fa, 0x7ca8, 0xe2f4, 0x7ca7, 0xe2ee,
-  0x7ca6, 0xe2e8, 0x7ca4, 0xe2e1, 0x7ca3, 0xe2db, 0x7ca1, 0xe2d5,
-  0x7ca0, 0xe2cf, 0x7c9e, 0xe2c9, 0x7c9d, 0xe2c3, 0x7c9c, 0xe2bd,
-  0x7c9a, 0xe2b7, 0x7c99, 0xe2b0, 0x7c97, 0xe2aa, 0x7c96, 0xe2a4,
-  0x7c94, 0xe29e, 0x7c93, 0xe298, 0x7c91, 0xe292, 0x7c90, 0xe28c,
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-  0x7c66, 0xe1db, 0x7c64, 0xe1d4, 0x7c63, 0xe1ce, 0x7c61, 0xe1c8,
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-  0x7a8b, 0xdb09, 0x7a89, 0xdb03, 0x7a87, 0xdafd, 0x7a86, 0xdaf7,
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-  0x7a33, 0xd9e8, 0x7a31, 0xd9e2, 0x7a2f, 0xd9dc, 0x7a2d, 0xd9d6,
-  0x7a2b, 0xd9d0, 0x7a29, 0xd9ca, 0x7a27, 0xd9c4, 0x7a26, 0xd9be,
-  0x7a24, 0xd9b8, 0x7a22, 0xd9b2, 0x7a20, 0xd9ac, 0x7a1e, 0xd9a6,
-  0x7a1c, 0xd9a0, 0x7a1a, 0xd99a, 0x7a18, 0xd994, 0x7a16, 0xd98e,
-  0x7a15, 0xd988, 0x7a13, 0xd982, 0x7a11, 0xd97c, 0x7a0f, 0xd976,
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-  0x79ef, 0xd911, 0x79ed, 0xd90b, 0x79eb, 0xd905, 0x79e9, 0xd8ff,
-  0x79e7, 0xd8f9, 0x79e5, 0xd8f3, 0x79e3, 0xd8ed, 0x79e1, 0xd8e7,
-  0x79df, 0xd8e1, 0x79dd, 0xd8db, 0x79db, 0xd8d5, 0x79d9, 0xd8cf,
-  0x79d8, 0xd8c9, 0x79d6, 0xd8c3, 0x79d4, 0xd8bd, 0x79d2, 0xd8b7,
-  0x79d0, 0xd8b1, 0x79ce, 0xd8ab, 0x79cc, 0xd8a5, 0x79ca, 0xd89f,
-  0x79c8, 0xd899, 0x79c6, 0xd893, 0x79c4, 0xd88d, 0x79c2, 0xd887,
-  0x79c0, 0xd881, 0x79be, 0xd87b, 0x79bc, 0xd875, 0x79bb, 0xd86f,
-  0x79b9, 0xd869, 0x79b7, 0xd863, 0x79b5, 0xd85d, 0x79b3, 0xd857,
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-  0x79a9, 0xd839, 0x79a7, 0xd833, 0x79a5, 0xd82d, 0x79a3, 0xd827,
-  0x79a1, 0xd821, 0x799f, 0xd81b, 0x799d, 0xd815, 0x799b, 0xd80f,
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-  0x5ff4, 0xab49, 0x5ff0, 0xab45, 0x5fec, 0xab40, 0x5fe7, 0xab3b,
-  0x5fe3, 0xab36, 0x5fdf, 0xab32, 0x5fdb, 0xab2d, 0x5fd7, 0xab28,
-  0x5fd3, 0xab24, 0x5fce, 0xab1f, 0x5fca, 0xab1a, 0x5fc6, 0xab16,
-  0x5fc2, 0xab11, 0x5fbe, 0xab0c, 0x5fba, 0xab07, 0x5fb5, 0xab03,
-  0x5fb1, 0xaafe, 0x5fad, 0xaaf9, 0x5fa9, 0xaaf5, 0x5fa5, 0xaaf0,
-  0x5fa0, 0xaaeb, 0x5f9c, 0xaae7, 0x5f98, 0xaae2, 0x5f94, 0xaadd,
-  0x5f90, 0xaad8, 0x5f8c, 0xaad4, 0x5f87, 0xaacf, 0x5f83, 0xaaca,
-  0x5f7f, 0xaac6, 0x5f7b, 0xaac1, 0x5f77, 0xaabc, 0x5f72, 0xaab8,
-  0x5f6e, 0xaab3, 0x5f6a, 0xaaae, 0x5f66, 0xaaaa, 0x5f62, 0xaaa5,
-  0x5f5e, 0xaaa0, 0x5f59, 0xaa9c, 0x5f55, 0xaa97, 0x5f51, 0xaa92,
-  0x5f4d, 0xaa8e, 0x5f49, 0xaa89, 0x5f44, 0xaa84, 0x5f40, 0xaa7f,
-  0x5f3c, 0xaa7b, 0x5f38, 0xaa76, 0x5f34, 0xaa71, 0x5f2f, 0xaa6d,
-  0x5f2b, 0xaa68, 0x5f27, 0xaa63, 0x5f23, 0xaa5f, 0x5f1f, 0xaa5a,
-  0x5f1a, 0xaa55, 0x5f16, 0xaa51, 0x5f12, 0xaa4c, 0x5f0e, 0xaa47,
-  0x5f0a, 0xaa43, 0x5f05, 0xaa3e, 0x5f01, 0xaa39, 0x5efd, 0xaa35,
-  0x5ef9, 0xaa30, 0x5ef5, 0xaa2b, 0x5ef0, 0xaa27, 0x5eec, 0xaa22,
-  0x5ee8, 0xaa1d, 0x5ee4, 0xaa19, 0x5edf, 0xaa14, 0x5edb, 0xaa10,
-  0x5ed7, 0xaa0b, 0x5ed3, 0xaa06, 0x5ecf, 0xaa02, 0x5eca, 0xa9fd,
-  0x5ec6, 0xa9f8, 0x5ec2, 0xa9f4, 0x5ebe, 0xa9ef, 0x5eb9, 0xa9ea,
-  0x5eb5, 0xa9e6, 0x5eb1, 0xa9e1, 0x5ead, 0xa9dc, 0x5ea9, 0xa9d8,
-  0x5ea4, 0xa9d3, 0x5ea0, 0xa9ce, 0x5e9c, 0xa9ca, 0x5e98, 0xa9c5,
-  0x5e93, 0xa9c0, 0x5e8f, 0xa9bc, 0x5e8b, 0xa9b7, 0x5e87, 0xa9b3,
-  0x5e82, 0xa9ae, 0x5e7e, 0xa9a9, 0x5e7a, 0xa9a5, 0x5e76, 0xa9a0,
-  0x5e71, 0xa99b, 0x5e6d, 0xa997, 0x5e69, 0xa992, 0x5e65, 0xa98d,
-  0x5e60, 0xa989, 0x5e5c, 0xa984, 0x5e58, 0xa980, 0x5e54, 0xa97b,
-  0x5e50, 0xa976, 0x5e4b, 0xa972, 0x5e47, 0xa96d, 0x5e43, 0xa968,
-  0x5e3f, 0xa964, 0x5e3a, 0xa95f, 0x5e36, 0xa95b, 0x5e32, 0xa956,
-  0x5e2d, 0xa951, 0x5e29, 0xa94d, 0x5e25, 0xa948, 0x5e21, 0xa943,
-  0x5e1c, 0xa93f, 0x5e18, 0xa93a, 0x5e14, 0xa936, 0x5e10, 0xa931,
-  0x5e0b, 0xa92c, 0x5e07, 0xa928, 0x5e03, 0xa923, 0x5dff, 0xa91e,
-  0x5dfa, 0xa91a, 0x5df6, 0xa915, 0x5df2, 0xa911, 0x5dee, 0xa90c,
-  0x5de9, 0xa907, 0x5de5, 0xa903, 0x5de1, 0xa8fe, 0x5ddc, 0xa8fa,
-  0x5dd8, 0xa8f5, 0x5dd4, 0xa8f0, 0x5dd0, 0xa8ec, 0x5dcb, 0xa8e7,
-  0x5dc7, 0xa8e3, 0x5dc3, 0xa8de, 0x5dbf, 0xa8d9, 0x5dba, 0xa8d5,
-  0x5db6, 0xa8d0, 0x5db2, 0xa8cc, 0x5dad, 0xa8c7, 0x5da9, 0xa8c2,
-  0x5da5, 0xa8be, 0x5da1, 0xa8b9, 0x5d9c, 0xa8b5, 0x5d98, 0xa8b0,
-  0x5d94, 0xa8ab, 0x5d8f, 0xa8a7, 0x5d8b, 0xa8a2, 0x5d87, 0xa89e,
-  0x5d83, 0xa899, 0x5d7e, 0xa894, 0x5d7a, 0xa890, 0x5d76, 0xa88b,
-  0x5d71, 0xa887, 0x5d6d, 0xa882, 0x5d69, 0xa87d, 0x5d65, 0xa879,
-  0x5d60, 0xa874, 0x5d5c, 0xa870, 0x5d58, 0xa86b, 0x5d53, 0xa867,
-  0x5d4f, 0xa862, 0x5d4b, 0xa85d, 0x5d46, 0xa859, 0x5d42, 0xa854,
-  0x5d3e, 0xa850, 0x5d3a, 0xa84b, 0x5d35, 0xa847, 0x5d31, 0xa842,
-  0x5d2d, 0xa83d, 0x5d28, 0xa839, 0x5d24, 0xa834, 0x5d20, 0xa830,
-  0x5d1b, 0xa82b, 0x5d17, 0xa827, 0x5d13, 0xa822, 0x5d0e, 0xa81d,
-  0x5d0a, 0xa819, 0x5d06, 0xa814, 0x5d01, 0xa810, 0x5cfd, 0xa80b,
-  0x5cf9, 0xa807, 0x5cf5, 0xa802, 0x5cf0, 0xa7fd, 0x5cec, 0xa7f9,
-  0x5ce8, 0xa7f4, 0x5ce3, 0xa7f0, 0x5cdf, 0xa7eb, 0x5cdb, 0xa7e7,
-  0x5cd6, 0xa7e2, 0x5cd2, 0xa7de, 0x5cce, 0xa7d9, 0x5cc9, 0xa7d4,
-  0x5cc5, 0xa7d0, 0x5cc1, 0xa7cb, 0x5cbc, 0xa7c7, 0x5cb8, 0xa7c2,
-  0x5cb4, 0xa7be, 0x5caf, 0xa7b9, 0x5cab, 0xa7b5, 0x5ca7, 0xa7b0,
-  0x5ca2, 0xa7ab, 0x5c9e, 0xa7a7, 0x5c9a, 0xa7a2, 0x5c95, 0xa79e,
-  0x5c91, 0xa799, 0x5c8d, 0xa795, 0x5c88, 0xa790, 0x5c84, 0xa78c,
-  0x5c80, 0xa787, 0x5c7b, 0xa783, 0x5c77, 0xa77e, 0x5c73, 0xa779,
-  0x5c6e, 0xa775, 0x5c6a, 0xa770, 0x5c66, 0xa76c, 0x5c61, 0xa767,
-  0x5c5d, 0xa763, 0x5c58, 0xa75e, 0x5c54, 0xa75a, 0x5c50, 0xa755,
-  0x5c4b, 0xa751, 0x5c47, 0xa74c, 0x5c43, 0xa748, 0x5c3e, 0xa743,
-  0x5c3a, 0xa73f, 0x5c36, 0xa73a, 0x5c31, 0xa735, 0x5c2d, 0xa731,
-  0x5c29, 0xa72c, 0x5c24, 0xa728, 0x5c20, 0xa723, 0x5c1b, 0xa71f,
-  0x5c17, 0xa71a, 0x5c13, 0xa716, 0x5c0e, 0xa711, 0x5c0a, 0xa70d,
-  0x5c06, 0xa708, 0x5c01, 0xa704, 0x5bfd, 0xa6ff, 0x5bf9, 0xa6fb,
-  0x5bf4, 0xa6f6, 0x5bf0, 0xa6f2, 0x5beb, 0xa6ed, 0x5be7, 0xa6e9,
-  0x5be3, 0xa6e4, 0x5bde, 0xa6e0, 0x5bda, 0xa6db, 0x5bd6, 0xa6d7,
-  0x5bd1, 0xa6d2, 0x5bcd, 0xa6ce, 0x5bc8, 0xa6c9, 0x5bc4, 0xa6c5,
-  0x5bc0, 0xa6c0, 0x5bbb, 0xa6bc, 0x5bb7, 0xa6b7, 0x5bb2, 0xa6b3,
-  0x5bae, 0xa6ae, 0x5baa, 0xa6aa, 0x5ba5, 0xa6a5, 0x5ba1, 0xa6a1,
-  0x5b9d, 0xa69c, 0x5b98, 0xa698, 0x5b94, 0xa693, 0x5b8f, 0xa68f,
-  0x5b8b, 0xa68a, 0x5b87, 0xa686, 0x5b82, 0xa681, 0x5b7e, 0xa67d,
-  0x5b79, 0xa678, 0x5b75, 0xa674, 0x5b71, 0xa66f, 0x5b6c, 0xa66b,
-  0x5b68, 0xa666, 0x5b63, 0xa662, 0x5b5f, 0xa65d, 0x5b5b, 0xa659,
-  0x5b56, 0xa654, 0x5b52, 0xa650, 0x5b4d, 0xa64b, 0x5b49, 0xa647,
-  0x5b45, 0xa642, 0x5b40, 0xa63e, 0x5b3c, 0xa639, 0x5b37, 0xa635,
-  0x5b33, 0xa630, 0x5b2f, 0xa62c, 0x5b2a, 0xa627, 0x5b26, 0xa623,
-  0x5b21, 0xa61f, 0x5b1d, 0xa61a, 0x5b19, 0xa616, 0x5b14, 0xa611,
-  0x5b10, 0xa60d, 0x5b0b, 0xa608, 0x5b07, 0xa604, 0x5b02, 0xa5ff,
-  0x5afe, 0xa5fb, 0x5afa, 0xa5f6, 0x5af5, 0xa5f2, 0x5af1, 0xa5ed,
-  0x5aec, 0xa5e9, 0x5ae8, 0xa5e4, 0x5ae4, 0xa5e0, 0x5adf, 0xa5dc,
-  0x5adb, 0xa5d7, 0x5ad6, 0xa5d3, 0x5ad2, 0xa5ce, 0x5acd, 0xa5ca,
-  0x5ac9, 0xa5c5, 0x5ac5, 0xa5c1, 0x5ac0, 0xa5bc, 0x5abc, 0xa5b8,
-  0x5ab7, 0xa5b3, 0x5ab3, 0xa5af, 0x5aae, 0xa5aa, 0x5aaa, 0xa5a6,
-  0x5aa5, 0xa5a2, 0x5aa1, 0xa59d, 0x5a9d, 0xa599, 0x5a98, 0xa594,
-  0x5a94, 0xa590, 0x5a8f, 0xa58b, 0x5a8b, 0xa587, 0x5a86, 0xa582,
-  0x5a82, 0xa57e, 0x5a7e, 0xa57a, 0x5a79, 0xa575, 0x5a75, 0xa571,
-  0x5a70, 0xa56c, 0x5a6c, 0xa568, 0x5a67, 0xa563, 0x5a63, 0xa55f,
-  0x5a5e, 0xa55b, 0x5a5a, 0xa556, 0x5a56, 0xa552, 0x5a51, 0xa54d,
-  0x5a4d, 0xa549, 0x5a48, 0xa544, 0x5a44, 0xa540, 0x5a3f, 0xa53b,
-  0x5a3b, 0xa537, 0x5a36, 0xa533, 0x5a32, 0xa52e, 0x5a2d, 0xa52a,
-  0x5a29, 0xa525, 0x5a24, 0xa521, 0x5a20, 0xa51c, 0x5a1c, 0xa518,
-  0x5a17, 0xa514, 0x5a13, 0xa50f, 0x5a0e, 0xa50b, 0x5a0a, 0xa506,
-  0x5a05, 0xa502, 0x5a01, 0xa4fe, 0x59fc, 0xa4f9, 0x59f8, 0xa4f5,
-  0x59f3, 0xa4f0, 0x59ef, 0xa4ec, 0x59ea, 0xa4e7, 0x59e6, 0xa4e3,
-  0x59e1, 0xa4df, 0x59dd, 0xa4da, 0x59d9, 0xa4d6, 0x59d4, 0xa4d1,
-  0x59d0, 0xa4cd, 0x59cb, 0xa4c9, 0x59c7, 0xa4c4, 0x59c2, 0xa4c0,
-  0x59be, 0xa4bb, 0x59b9, 0xa4b7, 0x59b5, 0xa4b3, 0x59b0, 0xa4ae,
-  0x59ac, 0xa4aa, 0x59a7, 0xa4a5, 0x59a3, 0xa4a1, 0x599e, 0xa49d,
-  0x599a, 0xa498, 0x5995, 0xa494, 0x5991, 0xa48f, 0x598c, 0xa48b,
-  0x5988, 0xa487, 0x5983, 0xa482, 0x597f, 0xa47e, 0x597a, 0xa479,
-  0x5976, 0xa475, 0x5971, 0xa471, 0x596d, 0xa46c, 0x5968, 0xa468,
-  0x5964, 0xa463, 0x595f, 0xa45f, 0x595b, 0xa45b, 0x5956, 0xa456,
-  0x5952, 0xa452, 0x594d, 0xa44e, 0x5949, 0xa449, 0x5944, 0xa445,
-  0x5940, 0xa440, 0x593b, 0xa43c, 0x5937, 0xa438, 0x5932, 0xa433,
-  0x592e, 0xa42f, 0x5929, 0xa42a, 0x5925, 0xa426, 0x5920, 0xa422,
-  0x591c, 0xa41d, 0x5917, 0xa419, 0x5913, 0xa415, 0x590e, 0xa410,
-  0x590a, 0xa40c, 0x5905, 0xa407, 0x5901, 0xa403, 0x58fc, 0xa3ff,
-  0x58f8, 0xa3fa, 0x58f3, 0xa3f6, 0x58ef, 0xa3f2, 0x58ea, 0xa3ed,
-  0x58e6, 0xa3e9, 0x58e1, 0xa3e5, 0x58dd, 0xa3e0, 0x58d8, 0xa3dc,
-  0x58d4, 0xa3d7, 0x58cf, 0xa3d3, 0x58cb, 0xa3cf, 0x58c6, 0xa3ca,
-  0x58c1, 0xa3c6, 0x58bd, 0xa3c2, 0x58b8, 0xa3bd, 0x58b4, 0xa3b9,
-  0x58af, 0xa3b5, 0x58ab, 0xa3b0, 0x58a6, 0xa3ac, 0x58a2, 0xa3a8,
-  0x589d, 0xa3a3, 0x5899, 0xa39f, 0x5894, 0xa39a, 0x5890, 0xa396,
-  0x588b, 0xa392, 0x5887, 0xa38d, 0x5882, 0xa389, 0x587d, 0xa385,
-  0x5879, 0xa380, 0x5874, 0xa37c, 0x5870, 0xa378, 0x586b, 0xa373,
-  0x5867, 0xa36f, 0x5862, 0xa36b, 0x585e, 0xa366, 0x5859, 0xa362,
-  0x5855, 0xa35e, 0x5850, 0xa359, 0x584b, 0xa355, 0x5847, 0xa351,
-  0x5842, 0xa34c, 0x583e, 0xa348, 0x5839, 0xa344, 0x5835, 0xa33f,
-  0x5830, 0xa33b, 0x582c, 0xa337, 0x5827, 0xa332, 0x5822, 0xa32e,
-  0x581e, 0xa32a, 0x5819, 0xa325, 0x5815, 0xa321, 0x5810, 0xa31d,
-  0x580c, 0xa318, 0x5807, 0xa314, 0x5803, 0xa310, 0x57fe, 0xa30b,
-  0x57f9, 0xa307, 0x57f5, 0xa303, 0x57f0, 0xa2ff, 0x57ec, 0xa2fa,
-  0x57e7, 0xa2f6, 0x57e3, 0xa2f2, 0x57de, 0xa2ed, 0x57d9, 0xa2e9,
-  0x57d5, 0xa2e5, 0x57d0, 0xa2e0, 0x57cc, 0xa2dc, 0x57c7, 0xa2d8,
-  0x57c3, 0xa2d3, 0x57be, 0xa2cf, 0x57b9, 0xa2cb, 0x57b5, 0xa2c6,
-  0x57b0, 0xa2c2, 0x57ac, 0xa2be, 0x57a7, 0xa2ba, 0x57a3, 0xa2b5,
-  0x579e, 0xa2b1, 0x5799, 0xa2ad, 0x5795, 0xa2a8, 0x5790, 0xa2a4,
-  0x578c, 0xa2a0, 0x5787, 0xa29b, 0x5783, 0xa297, 0x577e, 0xa293,
-  0x5779, 0xa28f, 0x5775, 0xa28a, 0x5770, 0xa286, 0x576c, 0xa282,
-  0x5767, 0xa27d, 0x5762, 0xa279, 0x575e, 0xa275, 0x5759, 0xa271,
-  0x5755, 0xa26c, 0x5750, 0xa268, 0x574b, 0xa264, 0x5747, 0xa25f,
-  0x5742, 0xa25b, 0x573e, 0xa257, 0x5739, 0xa253, 0x5734, 0xa24e,
-  0x5730, 0xa24a, 0x572b, 0xa246, 0x5727, 0xa241, 0x5722, 0xa23d,
-  0x571d, 0xa239, 0x5719, 0xa235, 0x5714, 0xa230, 0x5710, 0xa22c,
-  0x570b, 0xa228, 0x5706, 0xa224, 0x5702, 0xa21f, 0x56fd, 0xa21b,
-  0x56f9, 0xa217, 0x56f4, 0xa212, 0x56ef, 0xa20e, 0x56eb, 0xa20a,
-  0x56e6, 0xa206, 0x56e2, 0xa201, 0x56dd, 0xa1fd, 0x56d8, 0xa1f9,
-  0x56d4, 0xa1f5, 0x56cf, 0xa1f0, 0x56ca, 0xa1ec, 0x56c6, 0xa1e8,
-  0x56c1, 0xa1e4, 0x56bd, 0xa1df, 0x56b8, 0xa1db, 0x56b3, 0xa1d7,
-  0x56af, 0xa1d3, 0x56aa, 0xa1ce, 0x56a5, 0xa1ca, 0x56a1, 0xa1c6,
-  0x569c, 0xa1c1, 0x5698, 0xa1bd, 0x5693, 0xa1b9, 0x568e, 0xa1b5,
-  0x568a, 0xa1b0, 0x5685, 0xa1ac, 0x5680, 0xa1a8, 0x567c, 0xa1a4,
-  0x5677, 0xa1a0, 0x5673, 0xa19b, 0x566e, 0xa197, 0x5669, 0xa193,
-  0x5665, 0xa18f, 0x5660, 0xa18a, 0x565b, 0xa186, 0x5657, 0xa182,
-  0x5652, 0xa17e, 0x564d, 0xa179, 0x5649, 0xa175, 0x5644, 0xa171,
-  0x5640, 0xa16d, 0x563b, 0xa168, 0x5636, 0xa164, 0x5632, 0xa160,
-  0x562d, 0xa15c, 0x5628, 0xa157, 0x5624, 0xa153, 0x561f, 0xa14f,
-  0x561a, 0xa14b, 0x5616, 0xa147, 0x5611, 0xa142, 0x560c, 0xa13e,
-  0x5608, 0xa13a, 0x5603, 0xa136, 0x55fe, 0xa131, 0x55fa, 0xa12d,
-  0x55f5, 0xa129, 0x55f0, 0xa125, 0x55ec, 0xa121, 0x55e7, 0xa11c,
-  0x55e3, 0xa118, 0x55de, 0xa114, 0x55d9, 0xa110, 0x55d5, 0xa10b,
-  0x55d0, 0xa107, 0x55cb, 0xa103, 0x55c7, 0xa0ff, 0x55c2, 0xa0fb,
-  0x55bd, 0xa0f6, 0x55b9, 0xa0f2, 0x55b4, 0xa0ee, 0x55af, 0xa0ea,
-  0x55ab, 0xa0e6, 0x55a6, 0xa0e1, 0x55a1, 0xa0dd, 0x559d, 0xa0d9,
-  0x5598, 0xa0d5, 0x5593, 0xa0d1, 0x558f, 0xa0cc, 0x558a, 0xa0c8,
-  0x5585, 0xa0c4, 0x5581, 0xa0c0, 0x557c, 0xa0bc, 0x5577, 0xa0b7,
-  0x5572, 0xa0b3, 0x556e, 0xa0af, 0x5569, 0xa0ab, 0x5564, 0xa0a7,
-  0x5560, 0xa0a2, 0x555b, 0xa09e, 0x5556, 0xa09a, 0x5552, 0xa096,
-  0x554d, 0xa092, 0x5548, 0xa08e, 0x5544, 0xa089, 0x553f, 0xa085,
-  0x553a, 0xa081, 0x5536, 0xa07d, 0x5531, 0xa079, 0x552c, 0xa074,
-  0x5528, 0xa070, 0x5523, 0xa06c, 0x551e, 0xa068, 0x5519, 0xa064,
-  0x5515, 0xa060, 0x5510, 0xa05b, 0x550b, 0xa057, 0x5507, 0xa053,
-  0x5502, 0xa04f, 0x54fd, 0xa04b, 0x54f9, 0xa046, 0x54f4, 0xa042,
-  0x54ef, 0xa03e, 0x54ea, 0xa03a, 0x54e6, 0xa036, 0x54e1, 0xa032,
-  0x54dc, 0xa02d, 0x54d8, 0xa029, 0x54d3, 0xa025, 0x54ce, 0xa021,
-  0x54ca, 0xa01d, 0x54c5, 0xa019, 0x54c0, 0xa014, 0x54bb, 0xa010,
-  0x54b7, 0xa00c, 0x54b2, 0xa008, 0x54ad, 0xa004, 0x54a9, 0xa000,
-  0x54a4, 0x9ffc, 0x549f, 0x9ff7, 0x549a, 0x9ff3, 0x5496, 0x9fef,
-  0x5491, 0x9feb, 0x548c, 0x9fe7, 0x5488, 0x9fe3, 0x5483, 0x9fde,
-  0x547e, 0x9fda, 0x5479, 0x9fd6, 0x5475, 0x9fd2, 0x5470, 0x9fce,
-  0x546b, 0x9fca, 0x5467, 0x9fc6, 0x5462, 0x9fc1, 0x545d, 0x9fbd,
-  0x5458, 0x9fb9, 0x5454, 0x9fb5, 0x544f, 0x9fb1, 0x544a, 0x9fad,
-  0x5445, 0x9fa9, 0x5441, 0x9fa4, 0x543c, 0x9fa0, 0x5437, 0x9f9c,
-  0x5433, 0x9f98, 0x542e, 0x9f94, 0x5429, 0x9f90, 0x5424, 0x9f8c,
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-  0x99c, 0x805d, 0x996, 0x805d, 0x990, 0x805c, 0x989, 0x805c,
-  0x983, 0x805b, 0x97d, 0x805b, 0x977, 0x805a, 0x970, 0x805a,
-  0x96a, 0x8059, 0x964, 0x8059, 0x95e, 0x8058, 0x957, 0x8058,
-  0x951, 0x8057, 0x94b, 0x8057, 0x944, 0x8057, 0x93e, 0x8056,
-  0x938, 0x8056, 0x932, 0x8055, 0x92b, 0x8055, 0x925, 0x8054,
-  0x91f, 0x8054, 0x919, 0x8053, 0x912, 0x8053, 0x90c, 0x8052,
-  0x906, 0x8052, 0x900, 0x8052, 0x8f9, 0x8051, 0x8f3, 0x8051,
-  0x8ed, 0x8050, 0x8e6, 0x8050, 0x8e0, 0x804f, 0x8da, 0x804f,
-  0x8d4, 0x804f, 0x8cd, 0x804e, 0x8c7, 0x804e, 0x8c1, 0x804d,
-  0x8bb, 0x804d, 0x8b4, 0x804c, 0x8ae, 0x804c, 0x8a8, 0x804c,
-  0x8a2, 0x804b, 0x89b, 0x804b, 0x895, 0x804a, 0x88f, 0x804a,
-  0x888, 0x8049, 0x882, 0x8049, 0x87c, 0x8049, 0x876, 0x8048,
-  0x86f, 0x8048, 0x869, 0x8047, 0x863, 0x8047, 0x85d, 0x8047,
-  0x856, 0x8046, 0x850, 0x8046, 0x84a, 0x8045, 0x843, 0x8045,
-  0x83d, 0x8044, 0x837, 0x8044, 0x831, 0x8044, 0x82a, 0x8043,
-  0x824, 0x8043, 0x81e, 0x8042, 0x818, 0x8042, 0x811, 0x8042,
-  0x80b, 0x8041, 0x805, 0x8041, 0x7fe, 0x8040, 0x7f8, 0x8040,
-  0x7f2, 0x8040, 0x7ec, 0x803f, 0x7e5, 0x803f, 0x7df, 0x803f,
-  0x7d9, 0x803e, 0x7d3, 0x803e, 0x7cc, 0x803d, 0x7c6, 0x803d,
-  0x7c0, 0x803d, 0x7ba, 0x803c, 0x7b3, 0x803c, 0x7ad, 0x803b,
-  0x7a7, 0x803b, 0x7a0, 0x803b, 0x79a, 0x803a, 0x794, 0x803a,
-  0x78e, 0x803a, 0x787, 0x8039, 0x781, 0x8039, 0x77b, 0x8039,
-  0x775, 0x8038, 0x76e, 0x8038, 0x768, 0x8037, 0x762, 0x8037,
-  0x75b, 0x8037, 0x755, 0x8036, 0x74f, 0x8036, 0x749, 0x8036,
-  0x742, 0x8035, 0x73c, 0x8035, 0x736, 0x8035, 0x730, 0x8034,
-  0x729, 0x8034, 0x723, 0x8033, 0x71d, 0x8033, 0x716, 0x8033,
-  0x710, 0x8032, 0x70a, 0x8032, 0x704, 0x8032, 0x6fd, 0x8031,
-  0x6f7, 0x8031, 0x6f1, 0x8031, 0x6ea, 0x8030, 0x6e4, 0x8030,
-  0x6de, 0x8030, 0x6d8, 0x802f, 0x6d1, 0x802f, 0x6cb, 0x802f,
-  0x6c5, 0x802e, 0x6bf, 0x802e, 0x6b8, 0x802e, 0x6b2, 0x802d,
-  0x6ac, 0x802d, 0x6a5, 0x802d, 0x69f, 0x802c, 0x699, 0x802c,
-  0x693, 0x802c, 0x68c, 0x802b, 0x686, 0x802b, 0x680, 0x802b,
-  0x67a, 0x802a, 0x673, 0x802a, 0x66d, 0x802a, 0x667, 0x802a,
-  0x660, 0x8029, 0x65a, 0x8029, 0x654, 0x8029, 0x64e, 0x8028,
-  0x647, 0x8028, 0x641, 0x8028, 0x63b, 0x8027, 0x635, 0x8027,
-  0x62e, 0x8027, 0x628, 0x8026, 0x622, 0x8026, 0x61b, 0x8026,
-  0x615, 0x8026, 0x60f, 0x8025, 0x609, 0x8025, 0x602, 0x8025,
-  0x5fc, 0x8024, 0x5f6, 0x8024, 0x5ef, 0x8024, 0x5e9, 0x8023,
-  0x5e3, 0x8023, 0x5dd, 0x8023, 0x5d6, 0x8023, 0x5d0, 0x8022,
-  0x5ca, 0x8022, 0x5c4, 0x8022, 0x5bd, 0x8021, 0x5b7, 0x8021,
-  0x5b1, 0x8021, 0x5aa, 0x8021, 0x5a4, 0x8020, 0x59e, 0x8020,
-  0x598, 0x8020, 0x591, 0x8020, 0x58b, 0x801f, 0x585, 0x801f,
-  0x57f, 0x801f, 0x578, 0x801e, 0x572, 0x801e, 0x56c, 0x801e,
-  0x565, 0x801e, 0x55f, 0x801d, 0x559, 0x801d, 0x553, 0x801d,
-  0x54c, 0x801d, 0x546, 0x801c, 0x540, 0x801c, 0x539, 0x801c,
-  0x533, 0x801c, 0x52d, 0x801b, 0x527, 0x801b, 0x520, 0x801b,
-  0x51a, 0x801b, 0x514, 0x801a, 0x50d, 0x801a, 0x507, 0x801a,
-  0x501, 0x801a, 0x4fb, 0x8019, 0x4f4, 0x8019, 0x4ee, 0x8019,
-  0x4e8, 0x8019, 0x4e2, 0x8018, 0x4db, 0x8018, 0x4d5, 0x8018,
-  0x4cf, 0x8018, 0x4c8, 0x8017, 0x4c2, 0x8017, 0x4bc, 0x8017,
-  0x4b6, 0x8017, 0x4af, 0x8016, 0x4a9, 0x8016, 0x4a3, 0x8016,
-  0x49c, 0x8016, 0x496, 0x8016, 0x490, 0x8015, 0x48a, 0x8015,
-  0x483, 0x8015, 0x47d, 0x8015, 0x477, 0x8014, 0x471, 0x8014,
-  0x46a, 0x8014, 0x464, 0x8014, 0x45e, 0x8014, 0x457, 0x8013,
-  0x451, 0x8013, 0x44b, 0x8013, 0x445, 0x8013, 0x43e, 0x8013,
-  0x438, 0x8012, 0x432, 0x8012, 0x42b, 0x8012, 0x425, 0x8012,
-  0x41f, 0x8012, 0x419, 0x8011, 0x412, 0x8011, 0x40c, 0x8011,
-  0x406, 0x8011, 0x3ff, 0x8011, 0x3f9, 0x8010, 0x3f3, 0x8010,
-  0x3ed, 0x8010, 0x3e6, 0x8010, 0x3e0, 0x8010, 0x3da, 0x800f,
-  0x3d4, 0x800f, 0x3cd, 0x800f, 0x3c7, 0x800f, 0x3c1, 0x800f,
-  0x3ba, 0x800e, 0x3b4, 0x800e, 0x3ae, 0x800e, 0x3a8, 0x800e,
-  0x3a1, 0x800e, 0x39b, 0x800e, 0x395, 0x800d, 0x38e, 0x800d,
-  0x388, 0x800d, 0x382, 0x800d, 0x37c, 0x800d, 0x375, 0x800c,
-  0x36f, 0x800c, 0x369, 0x800c, 0x362, 0x800c, 0x35c, 0x800c,
-  0x356, 0x800c, 0x350, 0x800b, 0x349, 0x800b, 0x343, 0x800b,
-  0x33d, 0x800b, 0x337, 0x800b, 0x330, 0x800b, 0x32a, 0x800b,
-  0x324, 0x800a, 0x31d, 0x800a, 0x317, 0x800a, 0x311, 0x800a,
-  0x30b, 0x800a, 0x304, 0x800a, 0x2fe, 0x8009, 0x2f8, 0x8009,
-  0x2f1, 0x8009, 0x2eb, 0x8009, 0x2e5, 0x8009, 0x2df, 0x8009,
-  0x2d8, 0x8009, 0x2d2, 0x8008, 0x2cc, 0x8008, 0x2c5, 0x8008,
-  0x2bf, 0x8008, 0x2b9, 0x8008, 0x2b3, 0x8008, 0x2ac, 0x8008,
-  0x2a6, 0x8008, 0x2a0, 0x8007, 0x299, 0x8007, 0x293, 0x8007,
-  0x28d, 0x8007, 0x287, 0x8007, 0x280, 0x8007, 0x27a, 0x8007,
-  0x274, 0x8007, 0x26d, 0x8006, 0x267, 0x8006, 0x261, 0x8006,
-  0x25b, 0x8006, 0x254, 0x8006, 0x24e, 0x8006, 0x248, 0x8006,
-  0x242, 0x8006, 0x23b, 0x8005, 0x235, 0x8005, 0x22f, 0x8005,
-  0x228, 0x8005, 0x222, 0x8005, 0x21c, 0x8005, 0x216, 0x8005,
-  0x20f, 0x8005, 0x209, 0x8005, 0x203, 0x8005, 0x1fc, 0x8004,
-  0x1f6, 0x8004, 0x1f0, 0x8004, 0x1ea, 0x8004, 0x1e3, 0x8004,
-  0x1dd, 0x8004, 0x1d7, 0x8004, 0x1d0, 0x8004, 0x1ca, 0x8004,
-  0x1c4, 0x8004, 0x1be, 0x8004, 0x1b7, 0x8003, 0x1b1, 0x8003,
-  0x1ab, 0x8003, 0x1a4, 0x8003, 0x19e, 0x8003, 0x198, 0x8003,
-  0x192, 0x8003, 0x18b, 0x8003, 0x185, 0x8003, 0x17f, 0x8003,
-  0x178, 0x8003, 0x172, 0x8003, 0x16c, 0x8003, 0x166, 0x8002,
-  0x15f, 0x8002, 0x159, 0x8002, 0x153, 0x8002, 0x14d, 0x8002,
-  0x146, 0x8002, 0x140, 0x8002, 0x13a, 0x8002, 0x133, 0x8002,
-  0x12d, 0x8002, 0x127, 0x8002, 0x121, 0x8002, 0x11a, 0x8002,
-  0x114, 0x8002, 0x10e, 0x8002, 0x107, 0x8002, 0x101, 0x8002,
-  0xfb, 0x8001, 0xf5, 0x8001, 0xee, 0x8001, 0xe8, 0x8001,
-  0xe2, 0x8001, 0xdb, 0x8001, 0xd5, 0x8001, 0xcf, 0x8001,
-  0xc9, 0x8001, 0xc2, 0x8001, 0xbc, 0x8001, 0xb6, 0x8001,
-  0xaf, 0x8001, 0xa9, 0x8001, 0xa3, 0x8001, 0x9d, 0x8001,
-  0x96, 0x8001, 0x90, 0x8001, 0x8a, 0x8001, 0x83, 0x8001,
-  0x7d, 0x8001, 0x77, 0x8001, 0x71, 0x8001, 0x6a, 0x8001,
-  0x64, 0x8001, 0x5e, 0x8001, 0x57, 0x8001, 0x51, 0x8001,
-  0x4b, 0x8001, 0x45, 0x8001, 0x3e, 0x8001, 0x38, 0x8001,
-  0x32, 0x8001, 0x2b, 0x8001, 0x25, 0x8001, 0x1f, 0x8001,
-  0x19, 0x8001, 0x12, 0x8001, 0xc, 0x8001, 0x6, 0x8001,
-};
-
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
 cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) 
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-* \par    
-* Then converted to q15 format by multiplying with 2^31 and saturated if required.    
-    
-*/
-
-static const q15_t ALIGN4 cos_factorsQ15_128[128] = {
-  0x7fff, 0x7ffa, 0x7ff0, 0x7fe1, 0x7fce, 0x7fb5, 0x7f97, 0x7f75,
-  0x7f4d, 0x7f21, 0x7ef0, 0x7eba, 0x7e7f, 0x7e3f, 0x7dfa, 0x7db0,
-  0x7d62, 0x7d0f, 0x7cb7, 0x7c5a, 0x7bf8, 0x7b92, 0x7b26, 0x7ab6,
-  0x7a42, 0x79c8, 0x794a, 0x78c7, 0x7840, 0x77b4, 0x7723, 0x768e,
-  0x75f4, 0x7555, 0x74b2, 0x740b, 0x735f, 0x72af, 0x71fa, 0x7141,
-  0x7083, 0x6fc1, 0x6efb, 0x6e30, 0x6d62, 0x6c8f, 0x6bb8, 0x6adc,
-  0x69fd, 0x6919, 0x6832, 0x6746, 0x6657, 0x6563, 0x646c, 0x6371,
-  0x6271, 0x616f, 0x6068, 0x5f5e, 0x5e50, 0x5d3e, 0x5c29, 0x5b10,
-  0x59f3, 0x58d4, 0x57b0, 0x568a, 0x5560, 0x5433, 0x5302, 0x51ce,
-  0x5097, 0x4f5e, 0x4e21, 0x4ce1, 0x4b9e, 0x4a58, 0x490f, 0x47c3,
-  0x4675, 0x4524, 0x43d0, 0x427a, 0x4121, 0x3fc5, 0x3e68, 0x3d07,
-  0x3ba5, 0x3a40, 0x38d8, 0x376f, 0x3604, 0x3496, 0x3326, 0x31b5,
-  0x3041, 0x2ecc, 0x2d55, 0x2bdc, 0x2a61, 0x28e5, 0x2767, 0x25e8,
-  0x2467, 0x22e5, 0x2161, 0x1fdc, 0x1e56, 0x1ccf, 0x1b47, 0x19bd,
-  0x1833, 0x16a8, 0x151b, 0x138e, 0x1201, 0x1072, 0xee3, 0xd53,
-  0xbc3, 0xa33, 0x8a2, 0x710, 0x57f, 0x3ed, 0x25b, 0xc9
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_512[512] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7ffe, 0x7ffc, 0x7ffb, 0x7ff9, 0x7ff7,
-  0x7ff4, 0x7ff2, 0x7fee, 0x7feb, 0x7fe7, 0x7fe3, 0x7fdf, 0x7fda,
-  0x7fd6, 0x7fd0, 0x7fcb, 0x7fc5, 0x7fbf, 0x7fb8, 0x7fb1, 0x7faa,
-  0x7fa3, 0x7f9b, 0x7f93, 0x7f8b, 0x7f82, 0x7f79, 0x7f70, 0x7f67,
-  0x7f5d, 0x7f53, 0x7f48, 0x7f3d, 0x7f32, 0x7f27, 0x7f1b, 0x7f0f,
-  0x7f03, 0x7ef6, 0x7ee9, 0x7edc, 0x7ecf, 0x7ec1, 0x7eb3, 0x7ea4,
-  0x7e95, 0x7e86, 0x7e77, 0x7e67, 0x7e57, 0x7e47, 0x7e37, 0x7e26,
-  0x7e14, 0x7e03, 0x7df1, 0x7ddf, 0x7dcd, 0x7dba, 0x7da7, 0x7d94,
-  0x7d80, 0x7d6c, 0x7d58, 0x7d43, 0x7d2f, 0x7d19, 0x7d04, 0x7cee,
-  0x7cd8, 0x7cc2, 0x7cab, 0x7c94, 0x7c7d, 0x7c66, 0x7c4e, 0x7c36,
-  0x7c1d, 0x7c05, 0x7beb, 0x7bd2, 0x7bb9, 0x7b9f, 0x7b84, 0x7b6a,
-  0x7b4f, 0x7b34, 0x7b19, 0x7afd, 0x7ae1, 0x7ac5, 0x7aa8, 0x7a8b,
-  0x7a6e, 0x7a50, 0x7a33, 0x7a15, 0x79f6, 0x79d8, 0x79b9, 0x7999,
-  0x797a, 0x795a, 0x793a, 0x7919, 0x78f9, 0x78d8, 0x78b6, 0x7895,
-  0x7873, 0x7851, 0x782e, 0x780c, 0x77e9, 0x77c5, 0x77a2, 0x777e,
-  0x775a, 0x7735, 0x7710, 0x76eb, 0x76c6, 0x76a0, 0x767b, 0x7654,
-  0x762e, 0x7607, 0x75e0, 0x75b9, 0x7591, 0x7569, 0x7541, 0x7519,
-  0x74f0, 0x74c7, 0x749e, 0x7474, 0x744a, 0x7420, 0x73f6, 0x73cb,
-  0x73a0, 0x7375, 0x7349, 0x731d, 0x72f1, 0x72c5, 0x7298, 0x726b,
-  0x723e, 0x7211, 0x71e3, 0x71b5, 0x7186, 0x7158, 0x7129, 0x70fa,
-  0x70cb, 0x709b, 0x706b, 0x703b, 0x700a, 0x6fda, 0x6fa9, 0x6f77,
-  0x6f46, 0x6f14, 0x6ee2, 0x6eaf, 0x6e7d, 0x6e4a, 0x6e17, 0x6de3,
-  0x6db0, 0x6d7c, 0x6d48, 0x6d13, 0x6cde, 0x6ca9, 0x6c74, 0x6c3f,
-  0x6c09, 0x6bd3, 0x6b9c, 0x6b66, 0x6b2f, 0x6af8, 0x6ac1, 0x6a89,
-  0x6a51, 0x6a19, 0x69e1, 0x69a8, 0x696f, 0x6936, 0x68fd, 0x68c3,
-  0x6889, 0x684f, 0x6815, 0x67da, 0x679f, 0x6764, 0x6729, 0x66ed,
-  0x66b1, 0x6675, 0x6639, 0x65fc, 0x65bf, 0x6582, 0x6545, 0x6507,
-  0x64c9, 0x648b, 0x644d, 0x640e, 0x63cf, 0x6390, 0x6351, 0x6311,
-  0x62d2, 0x6292, 0x6251, 0x6211, 0x61d0, 0x618f, 0x614e, 0x610d,
-  0x60cb, 0x6089, 0x6047, 0x6004, 0x5fc2, 0x5f7f, 0x5f3c, 0x5ef9,
-  0x5eb5, 0x5e71, 0x5e2d, 0x5de9, 0x5da5, 0x5d60, 0x5d1b, 0x5cd6,
-  0x5c91, 0x5c4b, 0x5c06, 0x5bc0, 0x5b79, 0x5b33, 0x5aec, 0x5aa5,
-  0x5a5e, 0x5a17, 0x59d0, 0x5988, 0x5940, 0x58f8, 0x58af, 0x5867,
-  0x581e, 0x57d5, 0x578c, 0x5742, 0x56f9, 0x56af, 0x5665, 0x561a,
-  0x55d0, 0x5585, 0x553a, 0x54ef, 0x54a4, 0x5458, 0x540d, 0x53c1,
-  0x5375, 0x5328, 0x52dc, 0x528f, 0x5242, 0x51f5, 0x51a8, 0x515a,
-  0x510c, 0x50bf, 0x5070, 0x5022, 0x4fd4, 0x4f85, 0x4f36, 0x4ee7,
-  0x4e98, 0x4e48, 0x4df9, 0x4da9, 0x4d59, 0x4d09, 0x4cb8, 0x4c68,
-  0x4c17, 0x4bc6, 0x4b75, 0x4b24, 0x4ad2, 0x4a81, 0x4a2f, 0x49dd,
-  0x498a, 0x4938, 0x48e6, 0x4893, 0x4840, 0x47ed, 0x479a, 0x4746,
-  0x46f3, 0x469f, 0x464b, 0x45f7, 0x45a3, 0x454e, 0x44fa, 0x44a5,
-  0x4450, 0x43fb, 0x43a5, 0x4350, 0x42fa, 0x42a5, 0x424f, 0x41f9,
-  0x41a2, 0x414c, 0x40f6, 0x409f, 0x4048, 0x3ff1, 0x3f9a, 0x3f43,
-  0x3eeb, 0x3e93, 0x3e3c, 0x3de4, 0x3d8c, 0x3d33, 0x3cdb, 0x3c83,
-  0x3c2a, 0x3bd1, 0x3b78, 0x3b1f, 0x3ac6, 0x3a6c, 0x3a13, 0x39b9,
-  0x395f, 0x3906, 0x38ab, 0x3851, 0x37f7, 0x379c, 0x3742, 0x36e7,
-  0x368c, 0x3631, 0x35d6, 0x357b, 0x351f, 0x34c4, 0x3468, 0x340c,
-  0x33b0, 0x3354, 0x32f8, 0x329c, 0x3240, 0x31e3, 0x3186, 0x312a,
-  0x30cd, 0x3070, 0x3013, 0x2fb5, 0x2f58, 0x2efb, 0x2e9d, 0x2e3f,
-  0x2de2, 0x2d84, 0x2d26, 0x2cc8, 0x2c69, 0x2c0b, 0x2bad, 0x2b4e,
-  0x2aef, 0x2a91, 0x2a32, 0x29d3, 0x2974, 0x2915, 0x28b5, 0x2856,
-  0x27f6, 0x2797, 0x2737, 0x26d8, 0x2678, 0x2618, 0x25b8, 0x2558,
-  0x24f7, 0x2497, 0x2437, 0x23d6, 0x2376, 0x2315, 0x22b4, 0x2254,
-  0x21f3, 0x2192, 0x2131, 0x20d0, 0x206e, 0x200d, 0x1fac, 0x1f4a,
-  0x1ee9, 0x1e87, 0x1e25, 0x1dc4, 0x1d62, 0x1d00, 0x1c9e, 0x1c3c,
-  0x1bda, 0x1b78, 0x1b16, 0x1ab3, 0x1a51, 0x19ef, 0x198c, 0x192a,
-  0x18c7, 0x1864, 0x1802, 0x179f, 0x173c, 0x16d9, 0x1676, 0x1613,
-  0x15b0, 0x154d, 0x14ea, 0x1487, 0x1423, 0x13c0, 0x135d, 0x12f9,
-  0x1296, 0x1232, 0x11cf, 0x116b, 0x1108, 0x10a4, 0x1040, 0xfdd,
-  0xf79, 0xf15, 0xeb1, 0xe4d, 0xde9, 0xd85, 0xd21, 0xcbd,
-  0xc59, 0xbf5, 0xb91, 0xb2d, 0xac9, 0xa65, 0xa00, 0x99c,
-  0x938, 0x8d4, 0x86f, 0x80b, 0x7a7, 0x742, 0x6de, 0x67a,
-  0x615, 0x5b1, 0x54c, 0x4e8, 0x483, 0x41f, 0x3ba, 0x356,
-  0x2f1, 0x28d, 0x228, 0x1c4, 0x15f, 0xfb, 0x96, 0x32,
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_2048[2048] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd,
-  0x7ffd, 0x7ffd, 0x7ffc, 0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa,
-  0x7ffa, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff6,
-  0x7ff5, 0x7ff5, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff1, 0x7ff0,
-  0x7ff0, 0x7fef, 0x7fee, 0x7fed, 0x7fec, 0x7fec, 0x7feb, 0x7fea,
-  0x7fe9, 0x7fe8, 0x7fe7, 0x7fe6, 0x7fe5, 0x7fe4, 0x7fe3, 0x7fe2,
-  0x7fe1, 0x7fe0, 0x7fdf, 0x7fdd, 0x7fdc, 0x7fdb, 0x7fda, 0x7fd9,
-  0x7fd7, 0x7fd6, 0x7fd5, 0x7fd4, 0x7fd2, 0x7fd1, 0x7fd0, 0x7fce,
-  0x7fcd, 0x7fcb, 0x7fca, 0x7fc9, 0x7fc7, 0x7fc6, 0x7fc4, 0x7fc3,
-  0x7fc1, 0x7fc0, 0x7fbe, 0x7fbc, 0x7fbb, 0x7fb9, 0x7fb7, 0x7fb6,
-  0x7fb4, 0x7fb2, 0x7fb1, 0x7faf, 0x7fad, 0x7fab, 0x7fa9, 0x7fa8,
-  0x7fa6, 0x7fa4, 0x7fa2, 0x7fa0, 0x7f9e, 0x7f9c, 0x7f9a, 0x7f98,
-  0x7f96, 0x7f94, 0x7f92, 0x7f90, 0x7f8e, 0x7f8c, 0x7f8a, 0x7f88,
-  0x7f86, 0x7f83, 0x7f81, 0x7f7f, 0x7f7d, 0x7f7b, 0x7f78, 0x7f76,
-  0x7f74, 0x7f71, 0x7f6f, 0x7f6d, 0x7f6a, 0x7f68, 0x7f65, 0x7f63,
-  0x7f60, 0x7f5e, 0x7f5b, 0x7f59, 0x7f56, 0x7f54, 0x7f51, 0x7f4f,
-  0x7f4c, 0x7f49, 0x7f47, 0x7f44, 0x7f41, 0x7f3f, 0x7f3c, 0x7f39,
-  0x7f36, 0x7f34, 0x7f31, 0x7f2e, 0x7f2b, 0x7f28, 0x7f25, 0x7f23,
-  0x7f20, 0x7f1d, 0x7f1a, 0x7f17, 0x7f14, 0x7f11, 0x7f0e, 0x7f0b,
-  0x7f08, 0x7f04, 0x7f01, 0x7efe, 0x7efb, 0x7ef8, 0x7ef5, 0x7ef1,
-  0x7eee, 0x7eeb, 0x7ee8, 0x7ee4, 0x7ee1, 0x7ede, 0x7eda, 0x7ed7,
-  0x7ed4, 0x7ed0, 0x7ecd, 0x7ec9, 0x7ec6, 0x7ec3, 0x7ebf, 0x7ebb,
-  0x7eb8, 0x7eb4, 0x7eb1, 0x7ead, 0x7eaa, 0x7ea6, 0x7ea2, 0x7e9f,
-  0x7e9b, 0x7e97, 0x7e94, 0x7e90, 0x7e8c, 0x7e88, 0x7e84, 0x7e81,
-  0x7e7d, 0x7e79, 0x7e75, 0x7e71, 0x7e6d, 0x7e69, 0x7e65, 0x7e61,
-  0x7e5d, 0x7e59, 0x7e55, 0x7e51, 0x7e4d, 0x7e49, 0x7e45, 0x7e41,
-  0x7e3d, 0x7e39, 0x7e34, 0x7e30, 0x7e2c, 0x7e28, 0x7e24, 0x7e1f,
-  0x7e1b, 0x7e17, 0x7e12, 0x7e0e, 0x7e0a, 0x7e05, 0x7e01, 0x7dfc,
-  0x7df8, 0x7df3, 0x7def, 0x7dea, 0x7de6, 0x7de1, 0x7ddd, 0x7dd8,
-  0x7dd4, 0x7dcf, 0x7dca, 0x7dc6, 0x7dc1, 0x7dbc, 0x7db8, 0x7db3,
-  0x7dae, 0x7da9, 0x7da5, 0x7da0, 0x7d9b, 0x7d96, 0x7d91, 0x7d8c,
-  0x7d87, 0x7d82, 0x7d7e, 0x7d79, 0x7d74, 0x7d6f, 0x7d6a, 0x7d65,
-  0x7d60, 0x7d5a, 0x7d55, 0x7d50, 0x7d4b, 0x7d46, 0x7d41, 0x7d3c,
-  0x7d36, 0x7d31, 0x7d2c, 0x7d27, 0x7d21, 0x7d1c, 0x7d17, 0x7d11,
-  0x7d0c, 0x7d07, 0x7d01, 0x7cfc, 0x7cf6, 0x7cf1, 0x7cec, 0x7ce6,
-  0x7ce1, 0x7cdb, 0x7cd5, 0x7cd0, 0x7cca, 0x7cc5, 0x7cbf, 0x7cb9,
-  0x7cb4, 0x7cae, 0x7ca8, 0x7ca3, 0x7c9d, 0x7c97, 0x7c91, 0x7c8c,
-  0x7c86, 0x7c80, 0x7c7a, 0x7c74, 0x7c6e, 0x7c69, 0x7c63, 0x7c5d,
-  0x7c57, 0x7c51, 0x7c4b, 0x7c45, 0x7c3f, 0x7c39, 0x7c33, 0x7c2d,
-  0x7c26, 0x7c20, 0x7c1a, 0x7c14, 0x7c0e, 0x7c08, 0x7c01, 0x7bfb,
-  0x7bf5, 0x7bef, 0x7be8, 0x7be2, 0x7bdc, 0x7bd5, 0x7bcf, 0x7bc9,
-  0x7bc2, 0x7bbc, 0x7bb5, 0x7baf, 0x7ba8, 0x7ba2, 0x7b9b, 0x7b95,
-  0x7b8e, 0x7b88, 0x7b81, 0x7b7a, 0x7b74, 0x7b6d, 0x7b67, 0x7b60,
-  0x7b59, 0x7b52, 0x7b4c, 0x7b45, 0x7b3e, 0x7b37, 0x7b31, 0x7b2a,
-  0x7b23, 0x7b1c, 0x7b15, 0x7b0e, 0x7b07, 0x7b00, 0x7af9, 0x7af2,
-  0x7aeb, 0x7ae4, 0x7add, 0x7ad6, 0x7acf, 0x7ac8, 0x7ac1, 0x7aba,
-  0x7ab3, 0x7aac, 0x7aa4, 0x7a9d, 0x7a96, 0x7a8f, 0x7a87, 0x7a80,
-  0x7a79, 0x7a72, 0x7a6a, 0x7a63, 0x7a5c, 0x7a54, 0x7a4d, 0x7a45,
-  0x7a3e, 0x7a36, 0x7a2f, 0x7a27, 0x7a20, 0x7a18, 0x7a11, 0x7a09,
-  0x7a02, 0x79fa, 0x79f2, 0x79eb, 0x79e3, 0x79db, 0x79d4, 0x79cc,
-  0x79c4, 0x79bc, 0x79b5, 0x79ad, 0x79a5, 0x799d, 0x7995, 0x798e,
-  0x7986, 0x797e, 0x7976, 0x796e, 0x7966, 0x795e, 0x7956, 0x794e,
-  0x7946, 0x793e, 0x7936, 0x792e, 0x7926, 0x791e, 0x7915, 0x790d,
-  0x7905, 0x78fd, 0x78f5, 0x78ec, 0x78e4, 0x78dc, 0x78d4, 0x78cb,
-  0x78c3, 0x78bb, 0x78b2, 0x78aa, 0x78a2, 0x7899, 0x7891, 0x7888,
-  0x7880, 0x7877, 0x786f, 0x7866, 0x785e, 0x7855, 0x784d, 0x7844,
-  0x783b, 0x7833, 0x782a, 0x7821, 0x7819, 0x7810, 0x7807, 0x77ff,
-  0x77f6, 0x77ed, 0x77e4, 0x77db, 0x77d3, 0x77ca, 0x77c1, 0x77b8,
-  0x77af, 0x77a6, 0x779d, 0x7794, 0x778b, 0x7782, 0x7779, 0x7770,
-  0x7767, 0x775e, 0x7755, 0x774c, 0x7743, 0x773a, 0x7731, 0x7727,
-  0x771e, 0x7715, 0x770c, 0x7703, 0x76f9, 0x76f0, 0x76e7, 0x76dd,
-  0x76d4, 0x76cb, 0x76c1, 0x76b8, 0x76af, 0x76a5, 0x769c, 0x7692,
-  0x7689, 0x767f, 0x7676, 0x766c, 0x7663, 0x7659, 0x7650, 0x7646,
-  0x763c, 0x7633, 0x7629, 0x761f, 0x7616, 0x760c, 0x7602, 0x75f9,
-  0x75ef, 0x75e5, 0x75db, 0x75d1, 0x75c8, 0x75be, 0x75b4, 0x75aa,
-  0x75a0, 0x7596, 0x758c, 0x7582, 0x7578, 0x756e, 0x7564, 0x755a,
-  0x7550, 0x7546, 0x753c, 0x7532, 0x7528, 0x751e, 0x7514, 0x7509,
-  0x74ff, 0x74f5, 0x74eb, 0x74e1, 0x74d6, 0x74cc, 0x74c2, 0x74b7,
-  0x74ad, 0x74a3, 0x7498, 0x748e, 0x7484, 0x7479, 0x746f, 0x7464,
-  0x745a, 0x744f, 0x7445, 0x743a, 0x7430, 0x7425, 0x741b, 0x7410,
-  0x7406, 0x73fb, 0x73f0, 0x73e6, 0x73db, 0x73d0, 0x73c6, 0x73bb,
-  0x73b0, 0x73a5, 0x739b, 0x7390, 0x7385, 0x737a, 0x736f, 0x7364,
-  0x7359, 0x734f, 0x7344, 0x7339, 0x732e, 0x7323, 0x7318, 0x730d,
-  0x7302, 0x72f7, 0x72ec, 0x72e1, 0x72d5, 0x72ca, 0x72bf, 0x72b4,
-  0x72a9, 0x729e, 0x7293, 0x7287, 0x727c, 0x7271, 0x7266, 0x725a,
-  0x724f, 0x7244, 0x7238, 0x722d, 0x7222, 0x7216, 0x720b, 0x71ff,
-  0x71f4, 0x71e9, 0x71dd, 0x71d2, 0x71c6, 0x71bb, 0x71af, 0x71a3,
-  0x7198, 0x718c, 0x7181, 0x7175, 0x7169, 0x715e, 0x7152, 0x7146,
-  0x713b, 0x712f, 0x7123, 0x7117, 0x710c, 0x7100, 0x70f4, 0x70e8,
-  0x70dc, 0x70d1, 0x70c5, 0x70b9, 0x70ad, 0x70a1, 0x7095, 0x7089,
-  0x707d, 0x7071, 0x7065, 0x7059, 0x704d, 0x7041, 0x7035, 0x7029,
-  0x701d, 0x7010, 0x7004, 0x6ff8, 0x6fec, 0x6fe0, 0x6fd3, 0x6fc7,
-  0x6fbb, 0x6faf, 0x6fa2, 0x6f96, 0x6f8a, 0x6f7d, 0x6f71, 0x6f65,
-  0x6f58, 0x6f4c, 0x6f3f, 0x6f33, 0x6f27, 0x6f1a, 0x6f0e, 0x6f01,
-  0x6ef5, 0x6ee8, 0x6edc, 0x6ecf, 0x6ec2, 0x6eb6, 0x6ea9, 0x6e9c,
-  0x6e90, 0x6e83, 0x6e76, 0x6e6a, 0x6e5d, 0x6e50, 0x6e44, 0x6e37,
-  0x6e2a, 0x6e1d, 0x6e10, 0x6e04, 0x6df7, 0x6dea, 0x6ddd, 0x6dd0,
-  0x6dc3, 0x6db6, 0x6da9, 0x6d9c, 0x6d8f, 0x6d82, 0x6d75, 0x6d68,
-  0x6d5b, 0x6d4e, 0x6d41, 0x6d34, 0x6d27, 0x6d1a, 0x6d0c, 0x6cff,
-  0x6cf2, 0x6ce5, 0x6cd8, 0x6cca, 0x6cbd, 0x6cb0, 0x6ca3, 0x6c95,
-  0x6c88, 0x6c7b, 0x6c6d, 0x6c60, 0x6c53, 0x6c45, 0x6c38, 0x6c2a,
-  0x6c1d, 0x6c0f, 0x6c02, 0x6bf5, 0x6be7, 0x6bd9, 0x6bcc, 0x6bbe,
-  0x6bb1, 0x6ba3, 0x6b96, 0x6b88, 0x6b7a, 0x6b6d, 0x6b5f, 0x6b51,
-  0x6b44, 0x6b36, 0x6b28, 0x6b1a, 0x6b0d, 0x6aff, 0x6af1, 0x6ae3,
-  0x6ad5, 0x6ac8, 0x6aba, 0x6aac, 0x6a9e, 0x6a90, 0x6a82, 0x6a74,
-  0x6a66, 0x6a58, 0x6a4a, 0x6a3c, 0x6a2e, 0x6a20, 0x6a12, 0x6a04,
-  0x69f6, 0x69e8, 0x69da, 0x69cb, 0x69bd, 0x69af, 0x69a1, 0x6993,
-  0x6985, 0x6976, 0x6968, 0x695a, 0x694b, 0x693d, 0x692f, 0x6921,
-  0x6912, 0x6904, 0x68f5, 0x68e7, 0x68d9, 0x68ca, 0x68bc, 0x68ad,
-  0x689f, 0x6890, 0x6882, 0x6873, 0x6865, 0x6856, 0x6848, 0x6839,
-  0x682b, 0x681c, 0x680d, 0x67ff, 0x67f0, 0x67e1, 0x67d3, 0x67c4,
-  0x67b5, 0x67a6, 0x6798, 0x6789, 0x677a, 0x676b, 0x675d, 0x674e,
-  0x673f, 0x6730, 0x6721, 0x6712, 0x6703, 0x66f4, 0x66e5, 0x66d6,
-  0x66c8, 0x66b9, 0x66aa, 0x669b, 0x668b, 0x667c, 0x666d, 0x665e,
-  0x664f, 0x6640, 0x6631, 0x6622, 0x6613, 0x6603, 0x65f4, 0x65e5,
-  0x65d6, 0x65c7, 0x65b7, 0x65a8, 0x6599, 0x658a, 0x657a, 0x656b,
-  0x655c, 0x654c, 0x653d, 0x652d, 0x651e, 0x650f, 0x64ff, 0x64f0,
-  0x64e0, 0x64d1, 0x64c1, 0x64b2, 0x64a2, 0x6493, 0x6483, 0x6474,
-  0x6464, 0x6454, 0x6445, 0x6435, 0x6426, 0x6416, 0x6406, 0x63f7,
-  0x63e7, 0x63d7, 0x63c7, 0x63b8, 0x63a8, 0x6398, 0x6388, 0x6378,
-  0x6369, 0x6359, 0x6349, 0x6339, 0x6329, 0x6319, 0x6309, 0x62f9,
-  0x62ea, 0x62da, 0x62ca, 0x62ba, 0x62aa, 0x629a, 0x628a, 0x627a,
-  0x6269, 0x6259, 0x6249, 0x6239, 0x6229, 0x6219, 0x6209, 0x61f9,
-  0x61e8, 0x61d8, 0x61c8, 0x61b8, 0x61a8, 0x6197, 0x6187, 0x6177,
-  0x6166, 0x6156, 0x6146, 0x6135, 0x6125, 0x6115, 0x6104, 0x60f4,
-  0x60e4, 0x60d3, 0x60c3, 0x60b2, 0x60a2, 0x6091, 0x6081, 0x6070,
-  0x6060, 0x604f, 0x603f, 0x602e, 0x601d, 0x600d, 0x5ffc, 0x5fec,
-  0x5fdb, 0x5fca, 0x5fba, 0x5fa9, 0x5f98, 0x5f87, 0x5f77, 0x5f66,
-  0x5f55, 0x5f44, 0x5f34, 0x5f23, 0x5f12, 0x5f01, 0x5ef0, 0x5edf,
-  0x5ecf, 0x5ebe, 0x5ead, 0x5e9c, 0x5e8b, 0x5e7a, 0x5e69, 0x5e58,
-  0x5e47, 0x5e36, 0x5e25, 0x5e14, 0x5e03, 0x5df2, 0x5de1, 0x5dd0,
-  0x5dbf, 0x5dad, 0x5d9c, 0x5d8b, 0x5d7a, 0x5d69, 0x5d58, 0x5d46,
-  0x5d35, 0x5d24, 0x5d13, 0x5d01, 0x5cf0, 0x5cdf, 0x5cce, 0x5cbc,
-  0x5cab, 0x5c9a, 0x5c88, 0x5c77, 0x5c66, 0x5c54, 0x5c43, 0x5c31,
-  0x5c20, 0x5c0e, 0x5bfd, 0x5beb, 0x5bda, 0x5bc8, 0x5bb7, 0x5ba5,
-  0x5b94, 0x5b82, 0x5b71, 0x5b5f, 0x5b4d, 0x5b3c, 0x5b2a, 0x5b19,
-  0x5b07, 0x5af5, 0x5ae4, 0x5ad2, 0x5ac0, 0x5aae, 0x5a9d, 0x5a8b,
-  0x5a79, 0x5a67, 0x5a56, 0x5a44, 0x5a32, 0x5a20, 0x5a0e, 0x59fc,
-  0x59ea, 0x59d9, 0x59c7, 0x59b5, 0x59a3, 0x5991, 0x597f, 0x596d,
-  0x595b, 0x5949, 0x5937, 0x5925, 0x5913, 0x5901, 0x58ef, 0x58dd,
-  0x58cb, 0x58b8, 0x58a6, 0x5894, 0x5882, 0x5870, 0x585e, 0x584b,
-  0x5839, 0x5827, 0x5815, 0x5803, 0x57f0, 0x57de, 0x57cc, 0x57b9,
-  0x57a7, 0x5795, 0x5783, 0x5770, 0x575e, 0x574b, 0x5739, 0x5727,
-  0x5714, 0x5702, 0x56ef, 0x56dd, 0x56ca, 0x56b8, 0x56a5, 0x5693,
-  0x5680, 0x566e, 0x565b, 0x5649, 0x5636, 0x5624, 0x5611, 0x55fe,
-  0x55ec, 0x55d9, 0x55c7, 0x55b4, 0x55a1, 0x558f, 0x557c, 0x5569,
-  0x5556, 0x5544, 0x5531, 0x551e, 0x550b, 0x54f9, 0x54e6, 0x54d3,
-  0x54c0, 0x54ad, 0x549a, 0x5488, 0x5475, 0x5462, 0x544f, 0x543c,
-  0x5429, 0x5416, 0x5403, 0x53f0, 0x53dd, 0x53ca, 0x53b7, 0x53a4,
-  0x5391, 0x537e, 0x536b, 0x5358, 0x5345, 0x5332, 0x531f, 0x530c,
-  0x52f8, 0x52e5, 0x52d2, 0x52bf, 0x52ac, 0x5299, 0x5285, 0x5272,
-  0x525f, 0x524c, 0x5238, 0x5225, 0x5212, 0x51ff, 0x51eb, 0x51d8,
-  0x51c5, 0x51b1, 0x519e, 0x518b, 0x5177, 0x5164, 0x5150, 0x513d,
-  0x512a, 0x5116, 0x5103, 0x50ef, 0x50dc, 0x50c8, 0x50b5, 0x50a1,
-  0x508e, 0x507a, 0x5067, 0x5053, 0x503f, 0x502c, 0x5018, 0x5005,
-  0x4ff1, 0x4fdd, 0x4fca, 0x4fb6, 0x4fa2, 0x4f8f, 0x4f7b, 0x4f67,
-  0x4f54, 0x4f40, 0x4f2c, 0x4f18, 0x4f05, 0x4ef1, 0x4edd, 0x4ec9,
-  0x4eb6, 0x4ea2, 0x4e8e, 0x4e7a, 0x4e66, 0x4e52, 0x4e3e, 0x4e2a,
-  0x4e17, 0x4e03, 0x4def, 0x4ddb, 0x4dc7, 0x4db3, 0x4d9f, 0x4d8b,
-  0x4d77, 0x4d63, 0x4d4f, 0x4d3b, 0x4d27, 0x4d13, 0x4cff, 0x4ceb,
-  0x4cd6, 0x4cc2, 0x4cae, 0x4c9a, 0x4c86, 0x4c72, 0x4c5e, 0x4c49,
-  0x4c35, 0x4c21, 0x4c0d, 0x4bf9, 0x4be4, 0x4bd0, 0x4bbc, 0x4ba8,
-  0x4b93, 0x4b7f, 0x4b6b, 0x4b56, 0x4b42, 0x4b2e, 0x4b19, 0x4b05,
-  0x4af1, 0x4adc, 0x4ac8, 0x4ab4, 0x4a9f, 0x4a8b, 0x4a76, 0x4a62,
-  0x4a4d, 0x4a39, 0x4a24, 0x4a10, 0x49fb, 0x49e7, 0x49d2, 0x49be,
-  0x49a9, 0x4995, 0x4980, 0x496c, 0x4957, 0x4942, 0x492e, 0x4919,
-  0x4905, 0x48f0, 0x48db, 0x48c7, 0x48b2, 0x489d, 0x4888, 0x4874,
-  0x485f, 0x484a, 0x4836, 0x4821, 0x480c, 0x47f7, 0x47e2, 0x47ce,
-  0x47b9, 0x47a4, 0x478f, 0x477a, 0x4765, 0x4751, 0x473c, 0x4727,
-  0x4712, 0x46fd, 0x46e8, 0x46d3, 0x46be, 0x46a9, 0x4694, 0x467f,
-  0x466a, 0x4655, 0x4640, 0x462b, 0x4616, 0x4601, 0x45ec, 0x45d7,
-  0x45c2, 0x45ad, 0x4598, 0x4583, 0x456e, 0x4559, 0x4544, 0x452e,
-  0x4519, 0x4504, 0x44ef, 0x44da, 0x44c5, 0x44af, 0x449a, 0x4485,
-  0x4470, 0x445a, 0x4445, 0x4430, 0x441b, 0x4405, 0x43f0, 0x43db,
-  0x43c5, 0x43b0, 0x439b, 0x4385, 0x4370, 0x435b, 0x4345, 0x4330,
-  0x431b, 0x4305, 0x42f0, 0x42da, 0x42c5, 0x42af, 0x429a, 0x4284,
-  0x426f, 0x425a, 0x4244, 0x422f, 0x4219, 0x4203, 0x41ee, 0x41d8,
-  0x41c3, 0x41ad, 0x4198, 0x4182, 0x416d, 0x4157, 0x4141, 0x412c,
-  0x4116, 0x4100, 0x40eb, 0x40d5, 0x40bf, 0x40aa, 0x4094, 0x407e,
-  0x4069, 0x4053, 0x403d, 0x4027, 0x4012, 0x3ffc, 0x3fe6, 0x3fd0,
-  0x3fbb, 0x3fa5, 0x3f8f, 0x3f79, 0x3f63, 0x3f4d, 0x3f38, 0x3f22,
-  0x3f0c, 0x3ef6, 0x3ee0, 0x3eca, 0x3eb4, 0x3e9e, 0x3e88, 0x3e73,
-  0x3e5d, 0x3e47, 0x3e31, 0x3e1b, 0x3e05, 0x3def, 0x3dd9, 0x3dc3,
-  0x3dad, 0x3d97, 0x3d81, 0x3d6b, 0x3d55, 0x3d3e, 0x3d28, 0x3d12,
-  0x3cfc, 0x3ce6, 0x3cd0, 0x3cba, 0x3ca4, 0x3c8e, 0x3c77, 0x3c61,
-  0x3c4b, 0x3c35, 0x3c1f, 0x3c09, 0x3bf2, 0x3bdc, 0x3bc6, 0x3bb0,
-  0x3b99, 0x3b83, 0x3b6d, 0x3b57, 0x3b40, 0x3b2a, 0x3b14, 0x3afe,
-  0x3ae7, 0x3ad1, 0x3abb, 0x3aa4, 0x3a8e, 0x3a78, 0x3a61, 0x3a4b,
-  0x3a34, 0x3a1e, 0x3a08, 0x39f1, 0x39db, 0x39c4, 0x39ae, 0x3998,
-  0x3981, 0x396b, 0x3954, 0x393e, 0x3927, 0x3911, 0x38fa, 0x38e4,
-  0x38cd, 0x38b7, 0x38a0, 0x388a, 0x3873, 0x385d, 0x3846, 0x382f,
-  0x3819, 0x3802, 0x37ec, 0x37d5, 0x37be, 0x37a8, 0x3791, 0x377a,
-  0x3764, 0x374d, 0x3736, 0x3720, 0x3709, 0x36f2, 0x36dc, 0x36c5,
-  0x36ae, 0x3698, 0x3681, 0x366a, 0x3653, 0x363d, 0x3626, 0x360f,
-  0x35f8, 0x35e1, 0x35cb, 0x35b4, 0x359d, 0x3586, 0x356f, 0x3558,
-  0x3542, 0x352b, 0x3514, 0x34fd, 0x34e6, 0x34cf, 0x34b8, 0x34a1,
-  0x348b, 0x3474, 0x345d, 0x3446, 0x342f, 0x3418, 0x3401, 0x33ea,
-  0x33d3, 0x33bc, 0x33a5, 0x338e, 0x3377, 0x3360, 0x3349, 0x3332,
-  0x331b, 0x3304, 0x32ed, 0x32d6, 0x32bf, 0x32a8, 0x3290, 0x3279,
-  0x3262, 0x324b, 0x3234, 0x321d, 0x3206, 0x31ef, 0x31d8, 0x31c0,
-  0x31a9, 0x3192, 0x317b, 0x3164, 0x314c, 0x3135, 0x311e, 0x3107,
-  0x30f0, 0x30d8, 0x30c1, 0x30aa, 0x3093, 0x307b, 0x3064, 0x304d,
-  0x3036, 0x301e, 0x3007, 0x2ff0, 0x2fd8, 0x2fc1, 0x2faa, 0x2f92,
-  0x2f7b, 0x2f64, 0x2f4c, 0x2f35, 0x2f1e, 0x2f06, 0x2eef, 0x2ed8,
-  0x2ec0, 0x2ea9, 0x2e91, 0x2e7a, 0x2e63, 0x2e4b, 0x2e34, 0x2e1c,
-  0x2e05, 0x2ded, 0x2dd6, 0x2dbe, 0x2da7, 0x2d8f, 0x2d78, 0x2d60,
-  0x2d49, 0x2d31, 0x2d1a, 0x2d02, 0x2ceb, 0x2cd3, 0x2cbc, 0x2ca4,
-  0x2c8d, 0x2c75, 0x2c5e, 0x2c46, 0x2c2e, 0x2c17, 0x2bff, 0x2be8,
-  0x2bd0, 0x2bb8, 0x2ba1, 0x2b89, 0x2b71, 0x2b5a, 0x2b42, 0x2b2b,
-  0x2b13, 0x2afb, 0x2ae4, 0x2acc, 0x2ab4, 0x2a9c, 0x2a85, 0x2a6d,
-  0x2a55, 0x2a3e, 0x2a26, 0x2a0e, 0x29f6, 0x29df, 0x29c7, 0x29af,
-  0x2997, 0x2980, 0x2968, 0x2950, 0x2938, 0x2920, 0x2909, 0x28f1,
-  0x28d9, 0x28c1, 0x28a9, 0x2892, 0x287a, 0x2862, 0x284a, 0x2832,
-  0x281a, 0x2802, 0x27eb, 0x27d3, 0x27bb, 0x27a3, 0x278b, 0x2773,
-  0x275b, 0x2743, 0x272b, 0x2713, 0x26fb, 0x26e4, 0x26cc, 0x26b4,
-  0x269c, 0x2684, 0x266c, 0x2654, 0x263c, 0x2624, 0x260c, 0x25f4,
-  0x25dc, 0x25c4, 0x25ac, 0x2594, 0x257c, 0x2564, 0x254c, 0x2534,
-  0x251c, 0x2503, 0x24eb, 0x24d3, 0x24bb, 0x24a3, 0x248b, 0x2473,
-  0x245b, 0x2443, 0x242b, 0x2413, 0x23fa, 0x23e2, 0x23ca, 0x23b2,
-  0x239a, 0x2382, 0x236a, 0x2352, 0x2339, 0x2321, 0x2309, 0x22f1,
-  0x22d9, 0x22c0, 0x22a8, 0x2290, 0x2278, 0x2260, 0x2247, 0x222f,
-  0x2217, 0x21ff, 0x21e7, 0x21ce, 0x21b6, 0x219e, 0x2186, 0x216d,
-  0x2155, 0x213d, 0x2125, 0x210c, 0x20f4, 0x20dc, 0x20c3, 0x20ab,
-  0x2093, 0x207a, 0x2062, 0x204a, 0x2032, 0x2019, 0x2001, 0x1fe9,
-  0x1fd0, 0x1fb8, 0x1f9f, 0x1f87, 0x1f6f, 0x1f56, 0x1f3e, 0x1f26,
-  0x1f0d, 0x1ef5, 0x1edd, 0x1ec4, 0x1eac, 0x1e93, 0x1e7b, 0x1e62,
-  0x1e4a, 0x1e32, 0x1e19, 0x1e01, 0x1de8, 0x1dd0, 0x1db7, 0x1d9f,
-  0x1d87, 0x1d6e, 0x1d56, 0x1d3d, 0x1d25, 0x1d0c, 0x1cf4, 0x1cdb,
-  0x1cc3, 0x1caa, 0x1c92, 0x1c79, 0x1c61, 0x1c48, 0x1c30, 0x1c17,
-  0x1bff, 0x1be6, 0x1bce, 0x1bb5, 0x1b9d, 0x1b84, 0x1b6c, 0x1b53,
-  0x1b3a, 0x1b22, 0x1b09, 0x1af1, 0x1ad8, 0x1ac0, 0x1aa7, 0x1a8e,
-  0x1a76, 0x1a5d, 0x1a45, 0x1a2c, 0x1a13, 0x19fb, 0x19e2, 0x19ca,
-  0x19b1, 0x1998, 0x1980, 0x1967, 0x194e, 0x1936, 0x191d, 0x1905,
-  0x18ec, 0x18d3, 0x18bb, 0x18a2, 0x1889, 0x1871, 0x1858, 0x183f,
-  0x1827, 0x180e, 0x17f5, 0x17dd, 0x17c4, 0x17ab, 0x1792, 0x177a,
-  0x1761, 0x1748, 0x1730, 0x1717, 0x16fe, 0x16e5, 0x16cd, 0x16b4,
-  0x169b, 0x1682, 0x166a, 0x1651, 0x1638, 0x161f, 0x1607, 0x15ee,
-  0x15d5, 0x15bc, 0x15a4, 0x158b, 0x1572, 0x1559, 0x1541, 0x1528,
-  0x150f, 0x14f6, 0x14dd, 0x14c5, 0x14ac, 0x1493, 0x147a, 0x1461,
-  0x1449, 0x1430, 0x1417, 0x13fe, 0x13e5, 0x13cc, 0x13b4, 0x139b,
-  0x1382, 0x1369, 0x1350, 0x1337, 0x131f, 0x1306, 0x12ed, 0x12d4,
-  0x12bb, 0x12a2, 0x1289, 0x1271, 0x1258, 0x123f, 0x1226, 0x120d,
-  0x11f4, 0x11db, 0x11c2, 0x11a9, 0x1191, 0x1178, 0x115f, 0x1146,
-  0x112d, 0x1114, 0x10fb, 0x10e2, 0x10c9, 0x10b0, 0x1098, 0x107f,
-  0x1066, 0x104d, 0x1034, 0x101b, 0x1002, 0xfe9, 0xfd0, 0xfb7,
-  0xf9e, 0xf85, 0xf6c, 0xf53, 0xf3a, 0xf21, 0xf08, 0xef0,
-  0xed7, 0xebe, 0xea5, 0xe8c, 0xe73, 0xe5a, 0xe41, 0xe28,
-  0xe0f, 0xdf6, 0xddd, 0xdc4, 0xdab, 0xd92, 0xd79, 0xd60,
-  0xd47, 0xd2e, 0xd15, 0xcfc, 0xce3, 0xcca, 0xcb1, 0xc98,
-  0xc7f, 0xc66, 0xc4d, 0xc34, 0xc1b, 0xc02, 0xbe9, 0xbd0,
-  0xbb7, 0xb9e, 0xb85, 0xb6c, 0xb53, 0xb3a, 0xb20, 0xb07,
-  0xaee, 0xad5, 0xabc, 0xaa3, 0xa8a, 0xa71, 0xa58, 0xa3f,
-  0xa26, 0xa0d, 0x9f4, 0x9db, 0x9c2, 0x9a9, 0x990, 0x977,
-  0x95e, 0x944, 0x92b, 0x912, 0x8f9, 0x8e0, 0x8c7, 0x8ae,
-  0x895, 0x87c, 0x863, 0x84a, 0x831, 0x818, 0x7fe, 0x7e5,
-  0x7cc, 0x7b3, 0x79a, 0x781, 0x768, 0x74f, 0x736, 0x71d,
-  0x704, 0x6ea, 0x6d1, 0x6b8, 0x69f, 0x686, 0x66d, 0x654,
-  0x63b, 0x622, 0x609, 0x5ef, 0x5d6, 0x5bd, 0x5a4, 0x58b,
-  0x572, 0x559, 0x540, 0x527, 0x50d, 0x4f4, 0x4db, 0x4c2,
-  0x4a9, 0x490, 0x477, 0x45e, 0x445, 0x42b, 0x412, 0x3f9,
-  0x3e0, 0x3c7, 0x3ae, 0x395, 0x37c, 0x362, 0x349, 0x330,
-  0x317, 0x2fe, 0x2e5, 0x2cc, 0x2b3, 0x299, 0x280, 0x267,
-  0x24e, 0x235, 0x21c, 0x203, 0x1ea, 0x1d0, 0x1b7, 0x19e,
-  0x185, 0x16c, 0x153, 0x13a, 0x121, 0x107, 0xee, 0xd5,
-  0xbc, 0xa3, 0x8a, 0x71, 0x57, 0x3e, 0x25, 0xc,
-
-};
-
-static const q15_t ALIGN4 cos_factorsQ15_8192[8192] = {
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff, 0x7fff,
-  0x7fff, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe,
-  0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe, 0x7ffe,
-  0x7ffe, 0x7ffe, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd,
-  0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffd, 0x7ffc,
-  0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc, 0x7ffc,
-  0x7ffc, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb, 0x7ffb,
-  0x7ffb, 0x7ffb, 0x7ffb, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa,
-  0x7ffa, 0x7ffa, 0x7ffa, 0x7ffa, 0x7ff9, 0x7ff9, 0x7ff9, 0x7ff9,
-  0x7ff9, 0x7ff9, 0x7ff9, 0x7ff9, 0x7ff8, 0x7ff8, 0x7ff8, 0x7ff8,
-  0x7ff8, 0x7ff8, 0x7ff8, 0x7ff7, 0x7ff7, 0x7ff7, 0x7ff7, 0x7ff7,
-  0x7ff7, 0x7ff7, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6, 0x7ff6,
-  0x7ff6, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff5, 0x7ff4,
-  0x7ff4, 0x7ff4, 0x7ff4, 0x7ff4, 0x7ff4, 0x7ff3, 0x7ff3, 0x7ff3,
-  0x7ff3, 0x7ff3, 0x7ff3, 0x7ff2, 0x7ff2, 0x7ff2, 0x7ff2, 0x7ff2,
-  0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff1, 0x7ff0, 0x7ff0,
-  0x7ff0, 0x7ff0, 0x7ff0, 0x7fef, 0x7fef, 0x7fef, 0x7fef, 0x7fef,
-  0x7fee, 0x7fee, 0x7fee, 0x7fee, 0x7fee, 0x7fed, 0x7fed, 0x7fed,
-  0x7fed, 0x7fed, 0x7fec, 0x7fec, 0x7fec, 0x7fec, 0x7feb, 0x7feb,
-  0x7feb, 0x7feb, 0x7feb, 0x7fea, 0x7fea, 0x7fea, 0x7fea, 0x7fe9,
-  0x7fe9, 0x7fe9, 0x7fe9, 0x7fe8, 0x7fe8, 0x7fe8, 0x7fe8, 0x7fe8,
-  0x7fe7, 0x7fe7, 0x7fe7, 0x7fe7, 0x7fe6, 0x7fe6, 0x7fe6, 0x7fe6,
-  0x7fe5, 0x7fe5, 0x7fe5, 0x7fe5, 0x7fe4, 0x7fe4, 0x7fe4, 0x7fe4,
-  0x7fe3, 0x7fe3, 0x7fe3, 0x7fe2, 0x7fe2, 0x7fe2, 0x7fe2, 0x7fe1,
-  0x7fe1, 0x7fe1, 0x7fe1, 0x7fe0, 0x7fe0, 0x7fe0, 0x7fdf, 0x7fdf,
-  0x7fdf, 0x7fdf, 0x7fde, 0x7fde, 0x7fde, 0x7fde, 0x7fdd, 0x7fdd,
-  0x7fdd, 0x7fdc, 0x7fdc, 0x7fdc, 0x7fdb, 0x7fdb, 0x7fdb, 0x7fdb,
-  0x7fda, 0x7fda, 0x7fda, 0x7fd9, 0x7fd9, 0x7fd9, 0x7fd8, 0x7fd8,
-  0x7fd8, 0x7fd8, 0x7fd7, 0x7fd7, 0x7fd7, 0x7fd6, 0x7fd6, 0x7fd6,
-  0x7fd5, 0x7fd5, 0x7fd5, 0x7fd4, 0x7fd4, 0x7fd4, 0x7fd3, 0x7fd3,
-  0x7fd3, 0x7fd2, 0x7fd2, 0x7fd2, 0x7fd1, 0x7fd1, 0x7fd1, 0x7fd0,
-  0x7fd0, 0x7fd0, 0x7fcf, 0x7fcf, 0x7fcf, 0x7fce, 0x7fce, 0x7fce,
-  0x7fcd, 0x7fcd, 0x7fcd, 0x7fcc, 0x7fcc, 0x7fcc, 0x7fcb, 0x7fcb,
-  0x7fcb, 0x7fca, 0x7fca, 0x7fc9, 0x7fc9, 0x7fc9, 0x7fc8, 0x7fc8,
-  0x7fc8, 0x7fc7, 0x7fc7, 0x7fc7, 0x7fc6, 0x7fc6, 0x7fc5, 0x7fc5,
-  0x7fc5, 0x7fc4, 0x7fc4, 0x7fc4, 0x7fc3, 0x7fc3, 0x7fc2, 0x7fc2,
-  0x7fc2, 0x7fc1, 0x7fc1, 0x7fc0, 0x7fc0, 0x7fc0, 0x7fbf, 0x7fbf,
-  0x7fbf, 0x7fbe, 0x7fbe, 0x7fbd, 0x7fbd, 0x7fbd, 0x7fbc, 0x7fbc,
-  0x7fbb, 0x7fbb, 0x7fbb, 0x7fba, 0x7fba, 0x7fb9, 0x7fb9, 0x7fb8,
-  0x7fb8, 0x7fb8, 0x7fb7, 0x7fb7, 0x7fb6, 0x7fb6, 0x7fb6, 0x7fb5,
-  0x7fb5, 0x7fb4, 0x7fb4, 0x7fb3, 0x7fb3, 0x7fb3, 0x7fb2, 0x7fb2,
-  0x7fb1, 0x7fb1, 0x7fb0, 0x7fb0, 0x7faf, 0x7faf, 0x7faf, 0x7fae,
-  0x7fae, 0x7fad, 0x7fad, 0x7fac, 0x7fac, 0x7fac, 0x7fab, 0x7fab,
-  0x7faa, 0x7faa, 0x7fa9, 0x7fa9, 0x7fa8, 0x7fa8, 0x7fa7, 0x7fa7,
-  0x7fa6, 0x7fa6, 0x7fa6, 0x7fa5, 0x7fa5, 0x7fa4, 0x7fa4, 0x7fa3,
-  0x7fa3, 0x7fa2, 0x7fa2, 0x7fa1, 0x7fa1, 0x7fa0, 0x7fa0, 0x7f9f,
-  0x7f9f, 0x7f9e, 0x7f9e, 0x7f9d, 0x7f9d, 0x7f9c, 0x7f9c, 0x7f9c,
-  0x7f9b, 0x7f9b, 0x7f9a, 0x7f9a, 0x7f99, 0x7f99, 0x7f98, 0x7f98,
-  0x7f97, 0x7f97, 0x7f96, 0x7f96, 0x7f95, 0x7f95, 0x7f94, 0x7f94,
-  0x7f93, 0x7f92, 0x7f92, 0x7f91, 0x7f91, 0x7f90, 0x7f90, 0x7f8f,
-  0x7f8f, 0x7f8e, 0x7f8e, 0x7f8d, 0x7f8d, 0x7f8c, 0x7f8c, 0x7f8b,
-  0x7f8b, 0x7f8a, 0x7f8a, 0x7f89, 0x7f89, 0x7f88, 0x7f87, 0x7f87,
-  0x7f86, 0x7f86, 0x7f85, 0x7f85, 0x7f84, 0x7f84, 0x7f83, 0x7f83,
-  0x7f82, 0x7f81, 0x7f81, 0x7f80, 0x7f80, 0x7f7f, 0x7f7f, 0x7f7e,
-  0x7f7e, 0x7f7d, 0x7f7c, 0x7f7c, 0x7f7b, 0x7f7b, 0x7f7a, 0x7f7a,
-  0x7f79, 0x7f79, 0x7f78, 0x7f77, 0x7f77, 0x7f76, 0x7f76, 0x7f75,
-  0x7f75, 0x7f74, 0x7f73, 0x7f73, 0x7f72, 0x7f72, 0x7f71, 0x7f70,
-  0x7f70, 0x7f6f, 0x7f6f, 0x7f6e, 0x7f6d, 0x7f6d, 0x7f6c, 0x7f6c,
-  0x7f6b, 0x7f6b, 0x7f6a, 0x7f69, 0x7f69, 0x7f68, 0x7f68, 0x7f67,
-  0x7f66, 0x7f66, 0x7f65, 0x7f64, 0x7f64, 0x7f63, 0x7f63, 0x7f62,
-  0x7f61, 0x7f61, 0x7f60, 0x7f60, 0x7f5f, 0x7f5e, 0x7f5e, 0x7f5d,
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-  0x1c6a, 0x1c64, 0x1c5e, 0x1c58, 0x1c51, 0x1c4b, 0x1c45, 0x1c3f,
-  0x1c39, 0x1c33, 0x1c2d, 0x1c27, 0x1c20, 0x1c1a, 0x1c14, 0x1c0e,
-  0x1c08, 0x1c02, 0x1bfc, 0x1bf6, 0x1bef, 0x1be9, 0x1be3, 0x1bdd,
-  0x1bd7, 0x1bd1, 0x1bcb, 0x1bc4, 0x1bbe, 0x1bb8, 0x1bb2, 0x1bac,
-  0x1ba6, 0x1ba0, 0x1b9a, 0x1b93, 0x1b8d, 0x1b87, 0x1b81, 0x1b7b,
-  0x1b75, 0x1b6f, 0x1b68, 0x1b62, 0x1b5c, 0x1b56, 0x1b50, 0x1b4a,
-  0x1b44, 0x1b3d, 0x1b37, 0x1b31, 0x1b2b, 0x1b25, 0x1b1f, 0x1b19,
-  0x1b13, 0x1b0c, 0x1b06, 0x1b00, 0x1afa, 0x1af4, 0x1aee, 0x1ae8,
-  0x1ae1, 0x1adb, 0x1ad5, 0x1acf, 0x1ac9, 0x1ac3, 0x1abd, 0x1ab6,
-  0x1ab0, 0x1aaa, 0x1aa4, 0x1a9e, 0x1a98, 0x1a91, 0x1a8b, 0x1a85,
-  0x1a7f, 0x1a79, 0x1a73, 0x1a6d, 0x1a66, 0x1a60, 0x1a5a, 0x1a54,
-  0x1a4e, 0x1a48, 0x1a42, 0x1a3b, 0x1a35, 0x1a2f, 0x1a29, 0x1a23,
-  0x1a1d, 0x1a17, 0x1a10, 0x1a0a, 0x1a04, 0x19fe, 0x19f8, 0x19f2,
-  0x19eb, 0x19e5, 0x19df, 0x19d9, 0x19d3, 0x19cd, 0x19c7, 0x19c0,
-  0x19ba, 0x19b4, 0x19ae, 0x19a8, 0x19a2, 0x199b, 0x1995, 0x198f,
-  0x1989, 0x1983, 0x197d, 0x1977, 0x1970, 0x196a, 0x1964, 0x195e,
-  0x1958, 0x1952, 0x194b, 0x1945, 0x193f, 0x1939, 0x1933, 0x192d,
-  0x1926, 0x1920, 0x191a, 0x1914, 0x190e, 0x1908, 0x1901, 0x18fb,
-  0x18f5, 0x18ef, 0x18e9, 0x18e3, 0x18dc, 0x18d6, 0x18d0, 0x18ca,
-  0x18c4, 0x18be, 0x18b8, 0x18b1, 0x18ab, 0x18a5, 0x189f, 0x1899,
-  0x1893, 0x188c, 0x1886, 0x1880, 0x187a, 0x1874, 0x186e, 0x1867,
-  0x1861, 0x185b, 0x1855, 0x184f, 0x1848, 0x1842, 0x183c, 0x1836,
-  0x1830, 0x182a, 0x1823, 0x181d, 0x1817, 0x1811, 0x180b, 0x1805,
-  0x17fe, 0x17f8, 0x17f2, 0x17ec, 0x17e6, 0x17e0, 0x17d9, 0x17d3,
-  0x17cd, 0x17c7, 0x17c1, 0x17bb, 0x17b4, 0x17ae, 0x17a8, 0x17a2,
-  0x179c, 0x1795, 0x178f, 0x1789, 0x1783, 0x177d, 0x1777, 0x1770,
-  0x176a, 0x1764, 0x175e, 0x1758, 0x1752, 0x174b, 0x1745, 0x173f,
-  0x1739, 0x1733, 0x172c, 0x1726, 0x1720, 0x171a, 0x1714, 0x170e,
-  0x1707, 0x1701, 0x16fb, 0x16f5, 0x16ef, 0x16e8, 0x16e2, 0x16dc,
-  0x16d6, 0x16d0, 0x16ca, 0x16c3, 0x16bd, 0x16b7, 0x16b1, 0x16ab,
-  0x16a4, 0x169e, 0x1698, 0x1692, 0x168c, 0x1686, 0x167f, 0x1679,
-  0x1673, 0x166d, 0x1667, 0x1660, 0x165a, 0x1654, 0x164e, 0x1648,
-  0x1642, 0x163b, 0x1635, 0x162f, 0x1629, 0x1623, 0x161c, 0x1616,
-  0x1610, 0x160a, 0x1604, 0x15fd, 0x15f7, 0x15f1, 0x15eb, 0x15e5,
-  0x15de, 0x15d8, 0x15d2, 0x15cc, 0x15c6, 0x15c0, 0x15b9, 0x15b3,
-  0x15ad, 0x15a7, 0x15a1, 0x159a, 0x1594, 0x158e, 0x1588, 0x1582,
-  0x157b, 0x1575, 0x156f, 0x1569, 0x1563, 0x155c, 0x1556, 0x1550,
-  0x154a, 0x1544, 0x153d, 0x1537, 0x1531, 0x152b, 0x1525, 0x151e,
-  0x1518, 0x1512, 0x150c, 0x1506, 0x14ff, 0x14f9, 0x14f3, 0x14ed,
-  0x14e7, 0x14e0, 0x14da, 0x14d4, 0x14ce, 0x14c8, 0x14c1, 0x14bb,
-  0x14b5, 0x14af, 0x14a9, 0x14a2, 0x149c, 0x1496, 0x1490, 0x148a,
-  0x1483, 0x147d, 0x1477, 0x1471, 0x146b, 0x1464, 0x145e, 0x1458,
-  0x1452, 0x144c, 0x1445, 0x143f, 0x1439, 0x1433, 0x142d, 0x1426,
-  0x1420, 0x141a, 0x1414, 0x140e, 0x1407, 0x1401, 0x13fb, 0x13f5,
-  0x13ef, 0x13e8, 0x13e2, 0x13dc, 0x13d6, 0x13d0, 0x13c9, 0x13c3,
-  0x13bd, 0x13b7, 0x13b1, 0x13aa, 0x13a4, 0x139e, 0x1398, 0x1391,
-  0x138b, 0x1385, 0x137f, 0x1379, 0x1372, 0x136c, 0x1366, 0x1360,
-  0x135a, 0x1353, 0x134d, 0x1347, 0x1341, 0x133b, 0x1334, 0x132e,
-  0x1328, 0x1322, 0x131b, 0x1315, 0x130f, 0x1309, 0x1303, 0x12fc,
-  0x12f6, 0x12f0, 0x12ea, 0x12e4, 0x12dd, 0x12d7, 0x12d1, 0x12cb,
-  0x12c4, 0x12be, 0x12b8, 0x12b2, 0x12ac, 0x12a5, 0x129f, 0x1299,
-  0x1293, 0x128d, 0x1286, 0x1280, 0x127a, 0x1274, 0x126d, 0x1267,
-  0x1261, 0x125b, 0x1255, 0x124e, 0x1248, 0x1242, 0x123c, 0x1235,
-  0x122f, 0x1229, 0x1223, 0x121d, 0x1216, 0x1210, 0x120a, 0x1204,
-  0x11fd, 0x11f7, 0x11f1, 0x11eb, 0x11e5, 0x11de, 0x11d8, 0x11d2,
-  0x11cc, 0x11c5, 0x11bf, 0x11b9, 0x11b3, 0x11ad, 0x11a6, 0x11a0,
-  0x119a, 0x1194, 0x118d, 0x1187, 0x1181, 0x117b, 0x1175, 0x116e,
-  0x1168, 0x1162, 0x115c, 0x1155, 0x114f, 0x1149, 0x1143, 0x113d,
-  0x1136, 0x1130, 0x112a, 0x1124, 0x111d, 0x1117, 0x1111, 0x110b,
-  0x1105, 0x10fe, 0x10f8, 0x10f2, 0x10ec, 0x10e5, 0x10df, 0x10d9,
-  0x10d3, 0x10cc, 0x10c6, 0x10c0, 0x10ba, 0x10b4, 0x10ad, 0x10a7,
-  0x10a1, 0x109b, 0x1094, 0x108e, 0x1088, 0x1082, 0x107b, 0x1075,
-  0x106f, 0x1069, 0x1063, 0x105c, 0x1056, 0x1050, 0x104a, 0x1043,
-  0x103d, 0x1037, 0x1031, 0x102a, 0x1024, 0x101e, 0x1018, 0x1012,
-  0x100b, 0x1005, 0xfff, 0xff9, 0xff2, 0xfec, 0xfe6, 0xfe0,
-  0xfd9, 0xfd3, 0xfcd, 0xfc7, 0xfc0, 0xfba, 0xfb4, 0xfae,
-  0xfa8, 0xfa1, 0xf9b, 0xf95, 0xf8f, 0xf88, 0xf82, 0xf7c,
-  0xf76, 0xf6f, 0xf69, 0xf63, 0xf5d, 0xf56, 0xf50, 0xf4a,
-  0xf44, 0xf3e, 0xf37, 0xf31, 0xf2b, 0xf25, 0xf1e, 0xf18,
-  0xf12, 0xf0c, 0xf05, 0xeff, 0xef9, 0xef3, 0xeec, 0xee6,
-  0xee0, 0xeda, 0xed3, 0xecd, 0xec7, 0xec1, 0xeba, 0xeb4,
-  0xeae, 0xea8, 0xea1, 0xe9b, 0xe95, 0xe8f, 0xe89, 0xe82,
-  0xe7c, 0xe76, 0xe70, 0xe69, 0xe63, 0xe5d, 0xe57, 0xe50,
-  0xe4a, 0xe44, 0xe3e, 0xe37, 0xe31, 0xe2b, 0xe25, 0xe1e,
-  0xe18, 0xe12, 0xe0c, 0xe05, 0xdff, 0xdf9, 0xdf3, 0xdec,
-  0xde6, 0xde0, 0xdda, 0xdd3, 0xdcd, 0xdc7, 0xdc1, 0xdba,
-  0xdb4, 0xdae, 0xda8, 0xda1, 0xd9b, 0xd95, 0xd8f, 0xd88,
-  0xd82, 0xd7c, 0xd76, 0xd6f, 0xd69, 0xd63, 0xd5d, 0xd56,
-  0xd50, 0xd4a, 0xd44, 0xd3d, 0xd37, 0xd31, 0xd2b, 0xd24,
-  0xd1e, 0xd18, 0xd12, 0xd0b, 0xd05, 0xcff, 0xcf9, 0xcf2,
-  0xcec, 0xce6, 0xce0, 0xcd9, 0xcd3, 0xccd, 0xcc7, 0xcc0,
-  0xcba, 0xcb4, 0xcae, 0xca7, 0xca1, 0xc9b, 0xc95, 0xc8e,
-  0xc88, 0xc82, 0xc7c, 0xc75, 0xc6f, 0xc69, 0xc63, 0xc5c,
-  0xc56, 0xc50, 0xc4a, 0xc43, 0xc3d, 0xc37, 0xc31, 0xc2a,
-  0xc24, 0xc1e, 0xc18, 0xc11, 0xc0b, 0xc05, 0xbff, 0xbf8,
-  0xbf2, 0xbec, 0xbe6, 0xbdf, 0xbd9, 0xbd3, 0xbcd, 0xbc6,
-  0xbc0, 0xbba, 0xbb4, 0xbad, 0xba7, 0xba1, 0xb9b, 0xb94,
-  0xb8e, 0xb88, 0xb81, 0xb7b, 0xb75, 0xb6f, 0xb68, 0xb62,
-  0xb5c, 0xb56, 0xb4f, 0xb49, 0xb43, 0xb3d, 0xb36, 0xb30,
-  0xb2a, 0xb24, 0xb1d, 0xb17, 0xb11, 0xb0b, 0xb04, 0xafe,
-  0xaf8, 0xaf2, 0xaeb, 0xae5, 0xadf, 0xad8, 0xad2, 0xacc,
-  0xac6, 0xabf, 0xab9, 0xab3, 0xaad, 0xaa6, 0xaa0, 0xa9a,
-  0xa94, 0xa8d, 0xa87, 0xa81, 0xa7b, 0xa74, 0xa6e, 0xa68,
-  0xa62, 0xa5b, 0xa55, 0xa4f, 0xa48, 0xa42, 0xa3c, 0xa36,
-  0xa2f, 0xa29, 0xa23, 0xa1d, 0xa16, 0xa10, 0xa0a, 0xa04,
-  0x9fd, 0x9f7, 0x9f1, 0x9eb, 0x9e4, 0x9de, 0x9d8, 0x9d1,
-  0x9cb, 0x9c5, 0x9bf, 0x9b8, 0x9b2, 0x9ac, 0x9a6, 0x99f,
-  0x999, 0x993, 0x98d, 0x986, 0x980, 0x97a, 0x973, 0x96d,
-  0x967, 0x961, 0x95a, 0x954, 0x94e, 0x948, 0x941, 0x93b,
-  0x935, 0x92f, 0x928, 0x922, 0x91c, 0x915, 0x90f, 0x909,
-  0x903, 0x8fc, 0x8f6, 0x8f0, 0x8ea, 0x8e3, 0x8dd, 0x8d7,
-  0x8d1, 0x8ca, 0x8c4, 0x8be, 0x8b7, 0x8b1, 0x8ab, 0x8a5,
-  0x89e, 0x898, 0x892, 0x88c, 0x885, 0x87f, 0x879, 0x872,
-  0x86c, 0x866, 0x860, 0x859, 0x853, 0x84d, 0x847, 0x840,
-  0x83a, 0x834, 0x82e, 0x827, 0x821, 0x81b, 0x814, 0x80e,
-  0x808, 0x802, 0x7fb, 0x7f5, 0x7ef, 0x7e9, 0x7e2, 0x7dc,
-  0x7d6, 0x7cf, 0x7c9, 0x7c3, 0x7bd, 0x7b6, 0x7b0, 0x7aa,
-  0x7a4, 0x79d, 0x797, 0x791, 0x78a, 0x784, 0x77e, 0x778,
-  0x771, 0x76b, 0x765, 0x75f, 0x758, 0x752, 0x74c, 0x745,
-  0x73f, 0x739, 0x733, 0x72c, 0x726, 0x720, 0x71a, 0x713,
-  0x70d, 0x707, 0x700, 0x6fa, 0x6f4, 0x6ee, 0x6e7, 0x6e1,
-  0x6db, 0x6d5, 0x6ce, 0x6c8, 0x6c2, 0x6bb, 0x6b5, 0x6af,
-  0x6a9, 0x6a2, 0x69c, 0x696, 0x690, 0x689, 0x683, 0x67d,
-  0x676, 0x670, 0x66a, 0x664, 0x65d, 0x657, 0x651, 0x64a,
-  0x644, 0x63e, 0x638, 0x631, 0x62b, 0x625, 0x61f, 0x618,
-  0x612, 0x60c, 0x605, 0x5ff, 0x5f9, 0x5f3, 0x5ec, 0x5e6,
-  0x5e0, 0x5da, 0x5d3, 0x5cd, 0x5c7, 0x5c0, 0x5ba, 0x5b4,
-  0x5ae, 0x5a7, 0x5a1, 0x59b, 0x594, 0x58e, 0x588, 0x582,
-  0x57b, 0x575, 0x56f, 0x569, 0x562, 0x55c, 0x556, 0x54f,
-  0x549, 0x543, 0x53d, 0x536, 0x530, 0x52a, 0x523, 0x51d,
-  0x517, 0x511, 0x50a, 0x504, 0x4fe, 0x4f8, 0x4f1, 0x4eb,
-  0x4e5, 0x4de, 0x4d8, 0x4d2, 0x4cc, 0x4c5, 0x4bf, 0x4b9,
-  0x4b2, 0x4ac, 0x4a6, 0x4a0, 0x499, 0x493, 0x48d, 0x487,
-  0x480, 0x47a, 0x474, 0x46d, 0x467, 0x461, 0x45b, 0x454,
-  0x44e, 0x448, 0x441, 0x43b, 0x435, 0x42f, 0x428, 0x422,
-  0x41c, 0x415, 0x40f, 0x409, 0x403, 0x3fc, 0x3f6, 0x3f0,
-  0x3ea, 0x3e3, 0x3dd, 0x3d7, 0x3d0, 0x3ca, 0x3c4, 0x3be,
-  0x3b7, 0x3b1, 0x3ab, 0x3a4, 0x39e, 0x398, 0x392, 0x38b,
-  0x385, 0x37f, 0x378, 0x372, 0x36c, 0x366, 0x35f, 0x359,
-  0x353, 0x34c, 0x346, 0x340, 0x33a, 0x333, 0x32d, 0x327,
-  0x321, 0x31a, 0x314, 0x30e, 0x307, 0x301, 0x2fb, 0x2f5,
-  0x2ee, 0x2e8, 0x2e2, 0x2db, 0x2d5, 0x2cf, 0x2c9, 0x2c2,
-  0x2bc, 0x2b6, 0x2af, 0x2a9, 0x2a3, 0x29d, 0x296, 0x290,
-  0x28a, 0x283, 0x27d, 0x277, 0x271, 0x26a, 0x264, 0x25e,
-  0x258, 0x251, 0x24b, 0x245, 0x23e, 0x238, 0x232, 0x22c,
-  0x225, 0x21f, 0x219, 0x212, 0x20c, 0x206, 0x200, 0x1f9,
-  0x1f3, 0x1ed, 0x1e6, 0x1e0, 0x1da, 0x1d4, 0x1cd, 0x1c7,
-  0x1c1, 0x1ba, 0x1b4, 0x1ae, 0x1a8, 0x1a1, 0x19b, 0x195,
-  0x18e, 0x188, 0x182, 0x17c, 0x175, 0x16f, 0x169, 0x162,
-  0x15c, 0x156, 0x150, 0x149, 0x143, 0x13d, 0x137, 0x130,
-  0x12a, 0x124, 0x11d, 0x117, 0x111, 0x10b, 0x104, 0xfe,
-  0xf8, 0xf1, 0xeb, 0xe5, 0xdf, 0xd8, 0xd2, 0xcc,
-  0xc5, 0xbf, 0xb9, 0xb3, 0xac, 0xa6, 0xa0, 0x99,
-  0x93, 0x8d, 0x87, 0x80, 0x7a, 0x74, 0x6d, 0x67,
-  0x61, 0x5b, 0x54, 0x4e, 0x48, 0x41, 0x3b, 0x35,
-  0x2f, 0x28, 0x22, 0x1c, 0x15, 0xf, 0x9, 0x3,
-};
-
-/**    
- * @brief  Initialization function for the Q15 DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of Q15 DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of Q15 RFFT/RIFFT structure.   
- * @param[in]     *S_CFFT    points to an instance of Q15 CFFT/CIFFT structure.   
- * @param[in]     N          length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return  	  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingQ15Table.gif    
- */
-
-arm_status arm_dct4_init_q15(
-  arm_dct4_instance_q15 * S,
-  arm_rfft_instance_q15 * S_RFFT,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q15_t normalize)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  q15_t *twiddlePtr[4] = { (q15_t *) WeightsQ15_128, (q15_t *) WeightsQ15_512,
-    (q15_t *) WeightsQ15_2048, (q15_t *) WeightsQ15_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  q15_t *pCosFactor[4] =
-    { (q15_t *) cos_factorsQ15_128, (q15_t *) cos_factorsQ15_512,
-    (q15_t *) cos_factorsQ15_2048, (q15_t *) cos_factorsQ15_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT */
-  arm_rfft_init_q15(S->pRfft, S->N, 0u, 1u);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c
deleted file mode 100644
index 075c537a..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_dct4_init_q31.c
+++ /dev/null
@@ -1,8364 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_dct4_init_q31.c    
-*    
-* Description:	Initialization function of DCT-4 & IDCT4 Q31    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup DCT4_IDCT4    
- * @{    
- */
-
-/*    
-* @brief  Weights Table    
-*/
-
-/**    
-* \par    
-* Weights tables are generated using the formula : 
weights[n] = e^(-j*n*pi/(2*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   weights[2*i]= cos(i*c);    
-*   weights[(2*i)+1]= -sin(i * c);    
-* } 
    
-* \par    
-* where N is the Number of weights to be calculated and c is pi/(2*N)    
-* \par    
-* Convert the output to q31 format by multiplying with 2^31 and saturated if required.    
-* \par    
-* In the tables below the real and imaginary values are placed alternatively, hence the    
-* array length is 2*N.    
-*/
-
-static const q31_t WeightsQ31_128[256] = {
-  0x7fffffff, 0x0, 0x7ffd885a, 0xfe6de2e0, 0x7ff62182, 0xfcdbd541, 0x7fe9cbc0,
-  0xfb49e6a3,
-  0x7fd8878e, 0xf9b82684, 0x7fc25596, 0xf826a462, 0x7fa736b4, 0xf6956fb7,
-  0x7f872bf3, 0xf50497fb,
-  0x7f62368f, 0xf3742ca2, 0x7f3857f6, 0xf1e43d1c, 0x7f0991c4, 0xf054d8d5,
-  0x7ed5e5c6, 0xeec60f31,
-  0x7e9d55fc, 0xed37ef91, 0x7e5fe493, 0xebaa894f, 0x7e1d93ea, 0xea1debbb,
-  0x7dd6668f, 0xe8922622,
-  0x7d8a5f40, 0xe70747c4, 0x7d3980ec, 0xe57d5fda, 0x7ce3ceb2, 0xe3f47d96,
-  0x7c894bde, 0xe26cb01b,
-  0x7c29fbee, 0xe0e60685, 0x7bc5e290, 0xdf608fe4, 0x7b5d039e, 0xdddc5b3b,
-  0x7aef6323, 0xdc597781,
-  0x7a7d055b, 0xdad7f3a2, 0x7a05eead, 0xd957de7a, 0x798a23b1, 0xd7d946d8,
-  0x7909a92d, 0xd65c3b7b,
-  0x78848414, 0xd4e0cb15, 0x77fab989, 0xd3670446, 0x776c4edb, 0xd1eef59e,
-  0x76d94989, 0xd078ad9e,
-  0x7641af3d, 0xcf043ab3, 0x75a585cf, 0xcd91ab39, 0x7504d345, 0xcc210d79,
-  0x745f9dd1, 0xcab26fa9,
-  0x73b5ebd1, 0xc945dfec, 0x7307c3d0, 0xc7db6c50, 0x72552c85, 0xc67322ce,
-  0x719e2cd2, 0xc50d1149,
-  0x70e2cbc6, 0xc3a94590, 0x7023109a, 0xc247cd5a, 0x6f5f02b2, 0xc0e8b648,
-  0x6e96a99d, 0xbf8c0de3,
-  0x6dca0d14, 0xbe31e19b, 0x6cf934fc, 0xbcda3ecb, 0x6c242960, 0xbb8532b0,
-  0x6b4af279, 0xba32ca71,
-  0x6a6d98a4, 0xb8e31319, 0x698c246c, 0xb796199b, 0x68a69e81, 0xb64beacd,
-  0x67bd0fbd, 0xb5049368,
-  0x66cf8120, 0xb3c0200c, 0x65ddfbd3, 0xb27e9d3c, 0x64e88926, 0xb140175b,
-  0x63ef3290, 0xb0049ab3,
-  0x62f201ac, 0xaecc336c, 0x61f1003f, 0xad96ed92, 0x60ec3830, 0xac64d510,
-  0x5fe3b38d, 0xab35f5b5,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5dc79d7c, 0xa8e21106, 0x5cb420e0, 0xa7bd22ac,
-  0x5b9d1154, 0xa69b9b68,
-  0x5a82799a, 0xa57d8666, 0x59646498, 0xa462eeac, 0x5842dd54, 0xa34bdf20,
-  0x571deefa, 0xa2386284,
-  0x55f5a4d2, 0xa1288376, 0x54ca0a4b, 0xa01c4c73, 0x539b2af0, 0x9f13c7d0,
-  0x5269126e, 0x9e0effc1,
-  0x5133cc94, 0x9d0dfe54, 0x4ffb654d, 0x9c10cd70, 0x4ebfe8a5, 0x9b1776da,
-  0x4d8162c4, 0x9a22042d,
-  0x4c3fdff4, 0x99307ee0, 0x4afb6c98, 0x9842f043, 0x49b41533, 0x9759617f,
-  0x4869e665, 0x9673db94,
-  0x471cece7, 0x9592675c, 0x45cd358f, 0x94b50d87, 0x447acd50, 0x93dbd6a0,
-  0x4325c135, 0x9306cb04,
-  0x41ce1e65, 0x9235f2ec, 0x4073f21d, 0x91695663, 0x3f1749b8, 0x90a0fd4e,
-  0x3db832a6, 0x8fdcef66,
-  0x3c56ba70, 0x8f1d343a, 0x3af2eeb7, 0x8e61d32e, 0x398cdd32, 0x8daad37b,
-  0x382493b0, 0x8cf83c30,
-  0x36ba2014, 0x8c4a142f, 0x354d9057, 0x8ba0622f, 0x33def287, 0x8afb2cbb,
-  0x326e54c7, 0x8a5a7a31,
-  0x30fbc54d, 0x89be50c3, 0x2f875262, 0x8926b677, 0x2e110a62, 0x8893b125,
-  0x2c98fbba, 0x88054677,
-  0x2b1f34eb, 0x877b7bec, 0x29a3c485, 0x86f656d3, 0x2826b928, 0x8675dc4f,
-  0x26a82186, 0x85fa1153,
-  0x25280c5e, 0x8582faa5, 0x23a6887f, 0x85109cdd, 0x2223a4c5, 0x84a2fc62,
-  0x209f701c, 0x843a1d70,
-  0x1f19f97b, 0x83d60412, 0x1d934fe5, 0x8376b422, 0x1c0b826a, 0x831c314e,
-  0x1a82a026, 0x82c67f14,
-  0x18f8b83c, 0x8275a0c0, 0x176dd9de, 0x82299971, 0x15e21445, 0x81e26c16,
-  0x145576b1, 0x81a01b6d,
-  0x12c8106f, 0x8162aa04, 0x1139f0cf, 0x812a1a3a, 0xfab272b, 0x80f66e3c,
-  0xe1bc2e4, 0x80c7a80a,
-  0xc8bd35e, 0x809dc971, 0xafb6805, 0x8078d40d, 0x96a9049, 0x8058c94c,
-  0x7d95b9e, 0x803daa6a,
-  0x647d97c, 0x80277872, 0x4b6195d, 0x80163440, 0x3242abf, 0x8009de7e,
-  0x1921d20, 0x800277a6,
-};
-
-static const q31_t WeightsQ31_512[1024] = {
-  0x7fffffff, 0x0, 0x7fffd886, 0xff9b781d, 0x7fff6216, 0xff36f078, 0x7ffe9cb2,
-  0xfed2694f,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffc250f, 0xfe095d69, 0x7ffa72d1, 0xfda4d929,
-  0x7ff871a2, 0xfd40565c,
-  0x7ff62182, 0xfcdbd541, 0x7ff38274, 0xfc775616, 0x7ff09478, 0xfc12d91a,
-  0x7fed5791, 0xfbae5e89,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe5f108, 0xfae571a4, 0x7fe1c76b, 0xfa80ffcb,
-  0x7fdd4eec, 0xfa1c9157,
-  0x7fd8878e, 0xf9b82684, 0x7fd37153, 0xf953bf91, 0x7fce0c3e, 0xf8ef5cbb,
-  0x7fc85854, 0xf88afe42,
-  0x7fc25596, 0xf826a462, 0x7fbc040a, 0xf7c24f59, 0x7fb563b3, 0xf75dff66,
-  0x7fae7495, 0xf6f9b4c6,
-  0x7fa736b4, 0xf6956fb7, 0x7f9faa15, 0xf6313077, 0x7f97cebd, 0xf5ccf743,
-  0x7f8fa4b0, 0xf568c45b,
-  0x7f872bf3, 0xf50497fb, 0x7f7e648c, 0xf4a07261, 0x7f754e80, 0xf43c53cb,
-  0x7f6be9d4, 0xf3d83c77,
-  0x7f62368f, 0xf3742ca2, 0x7f5834b7, 0xf310248a, 0x7f4de451, 0xf2ac246e,
-  0x7f434563, 0xf2482c8a,
-  0x7f3857f6, 0xf1e43d1c, 0x7f2d1c0e, 0xf1805662, 0x7f2191b4, 0xf11c789a,
-  0x7f15b8ee, 0xf0b8a401,
-  0x7f0991c4, 0xf054d8d5, 0x7efd1c3c, 0xeff11753, 0x7ef05860, 0xef8d5fb8,
-  0x7ee34636, 0xef29b243,
-  0x7ed5e5c6, 0xeec60f31, 0x7ec8371a, 0xee6276bf, 0x7eba3a39, 0xedfee92b,
-  0x7eabef2c, 0xed9b66b2,
-  0x7e9d55fc, 0xed37ef91, 0x7e8e6eb2, 0xecd48407, 0x7e7f3957, 0xec71244f,
-  0x7e6fb5f4, 0xec0dd0a8,
-  0x7e5fe493, 0xebaa894f, 0x7e4fc53e, 0xeb474e81, 0x7e3f57ff, 0xeae4207a,
-  0x7e2e9cdf, 0xea80ff7a,
-  0x7e1d93ea, 0xea1debbb, 0x7e0c3d29, 0xe9bae57d, 0x7dfa98a8, 0xe957ecfb,
-  0x7de8a670, 0xe8f50273,
-  0x7dd6668f, 0xe8922622, 0x7dc3d90d, 0xe82f5844, 0x7db0fdf8, 0xe7cc9917,
-  0x7d9dd55a, 0xe769e8d8,
-  0x7d8a5f40, 0xe70747c4, 0x7d769bb5, 0xe6a4b616, 0x7d628ac6, 0xe642340d,
-  0x7d4e2c7f, 0xe5dfc1e5,
-  0x7d3980ec, 0xe57d5fda, 0x7d24881b, 0xe51b0e2a, 0x7d0f4218, 0xe4b8cd11,
-  0x7cf9aef0, 0xe4569ccb,
-  0x7ce3ceb2, 0xe3f47d96, 0x7ccda169, 0xe3926fad, 0x7cb72724, 0xe330734d,
-  0x7ca05ff1, 0xe2ce88b3,
-  0x7c894bde, 0xe26cb01b, 0x7c71eaf9, 0xe20ae9c1, 0x7c5a3d50, 0xe1a935e2,
-  0x7c4242f2, 0xe14794ba,
-  0x7c29fbee, 0xe0e60685, 0x7c116853, 0xe0848b7f, 0x7bf88830, 0xe02323e5,
-  0x7bdf5b94, 0xdfc1cff3,
-  0x7bc5e290, 0xdf608fe4, 0x7bac1d31, 0xdeff63f4, 0x7b920b89, 0xde9e4c60,
-  0x7b77ada8, 0xde3d4964,
-  0x7b5d039e, 0xdddc5b3b, 0x7b420d7a, 0xdd7b8220, 0x7b26cb4f, 0xdd1abe51,
-  0x7b0b3d2c, 0xdcba1008,
-  0x7aef6323, 0xdc597781, 0x7ad33d45, 0xdbf8f4f8, 0x7ab6cba4, 0xdb9888a8,
-  0x7a9a0e50, 0xdb3832cd,
-  0x7a7d055b, 0xdad7f3a2, 0x7a5fb0d8, 0xda77cb63, 0x7a4210d8, 0xda17ba4a,
-  0x7a24256f, 0xd9b7c094,
-  0x7a05eead, 0xd957de7a, 0x79e76ca7, 0xd8f81439, 0x79c89f6e, 0xd898620c,
-  0x79a98715, 0xd838c82d,
-  0x798a23b1, 0xd7d946d8, 0x796a7554, 0xd779de47, 0x794a7c12, 0xd71a8eb5,
-  0x792a37fe, 0xd6bb585e,
-  0x7909a92d, 0xd65c3b7b, 0x78e8cfb2, 0xd5fd3848, 0x78c7aba2, 0xd59e4eff,
-  0x78a63d11, 0xd53f7fda,
-  0x78848414, 0xd4e0cb15, 0x786280bf, 0xd48230e9, 0x78403329, 0xd423b191,
-  0x781d9b65, 0xd3c54d47,
-  0x77fab989, 0xd3670446, 0x77d78daa, 0xd308d6c7, 0x77b417df, 0xd2aac504,
-  0x7790583e, 0xd24ccf39,
-  0x776c4edb, 0xd1eef59e, 0x7747fbce, 0xd191386e, 0x77235f2d, 0xd13397e2,
-  0x76fe790e, 0xd0d61434,
-  0x76d94989, 0xd078ad9e, 0x76b3d0b4, 0xd01b6459, 0x768e0ea6, 0xcfbe389f,
-  0x76680376, 0xcf612aaa,
-  0x7641af3d, 0xcf043ab3, 0x761b1211, 0xcea768f2, 0x75f42c0b, 0xce4ab5a2,
-  0x75ccfd42, 0xcdee20fc,
-  0x75a585cf, 0xcd91ab39, 0x757dc5ca, 0xcd355491, 0x7555bd4c, 0xccd91d3d,
-  0x752d6c6c, 0xcc7d0578,
-  0x7504d345, 0xcc210d79, 0x74dbf1ef, 0xcbc53579, 0x74b2c884, 0xcb697db0,
-  0x7489571c, 0xcb0de658,
-  0x745f9dd1, 0xcab26fa9, 0x74359cbd, 0xca5719db, 0x740b53fb, 0xc9fbe527,
-  0x73e0c3a3, 0xc9a0d1c5,
-  0x73b5ebd1, 0xc945dfec, 0x738acc9e, 0xc8eb0fd6, 0x735f6626, 0xc89061ba,
-  0x7333b883, 0xc835d5d0,
-  0x7307c3d0, 0xc7db6c50, 0x72db8828, 0xc7812572, 0x72af05a7, 0xc727016d,
-  0x72823c67, 0xc6cd0079,
-  0x72552c85, 0xc67322ce, 0x7227d61c, 0xc61968a2, 0x71fa3949, 0xc5bfd22e,
-  0x71cc5626, 0xc5665fa9,
-  0x719e2cd2, 0xc50d1149, 0x716fbd68, 0xc4b3e746, 0x71410805, 0xc45ae1d7,
-  0x71120cc5, 0xc4020133,
-  0x70e2cbc6, 0xc3a94590, 0x70b34525, 0xc350af26, 0x708378ff, 0xc2f83e2a,
-  0x70536771, 0xc29ff2d4,
-  0x7023109a, 0xc247cd5a, 0x6ff27497, 0xc1efcdf3, 0x6fc19385, 0xc197f4d4,
-  0x6f906d84, 0xc1404233,
-  0x6f5f02b2, 0xc0e8b648, 0x6f2d532c, 0xc0915148, 0x6efb5f12, 0xc03a1368,
-  0x6ec92683, 0xbfe2fcdf,
-  0x6e96a99d, 0xbf8c0de3, 0x6e63e87f, 0xbf3546a8, 0x6e30e34a, 0xbedea765,
-  0x6dfd9a1c, 0xbe88304f,
-  0x6dca0d14, 0xbe31e19b, 0x6d963c54, 0xbddbbb7f, 0x6d6227fa, 0xbd85be30,
-  0x6d2dd027, 0xbd2fe9e2,
-  0x6cf934fc, 0xbcda3ecb, 0x6cc45698, 0xbc84bd1f, 0x6c8f351c, 0xbc2f6513,
-  0x6c59d0a9, 0xbbda36dd,
-  0x6c242960, 0xbb8532b0, 0x6bee3f62, 0xbb3058c0, 0x6bb812d1, 0xbadba943,
-  0x6b81a3cd, 0xba87246d,
-  0x6b4af279, 0xba32ca71, 0x6b13fef5, 0xb9de9b83, 0x6adcc964, 0xb98a97d8,
-  0x6aa551e9, 0xb936bfa4,
-  0x6a6d98a4, 0xb8e31319, 0x6a359db9, 0xb88f926d, 0x69fd614a, 0xb83c3dd1,
-  0x69c4e37a, 0xb7e9157a,
-  0x698c246c, 0xb796199b, 0x69532442, 0xb7434a67, 0x6919e320, 0xb6f0a812,
-  0x68e06129, 0xb69e32cd,
-  0x68a69e81, 0xb64beacd, 0x686c9b4b, 0xb5f9d043, 0x683257ab, 0xb5a7e362,
-  0x67f7d3c5, 0xb556245e,
-  0x67bd0fbd, 0xb5049368, 0x67820bb7, 0xb4b330b3, 0x6746c7d8, 0xb461fc70,
-  0x670b4444, 0xb410f6d3,
-  0x66cf8120, 0xb3c0200c, 0x66937e91, 0xb36f784f, 0x66573cbb, 0xb31effcc,
-  0x661abbc5, 0xb2ceb6b5,
-  0x65ddfbd3, 0xb27e9d3c, 0x65a0fd0b, 0xb22eb392, 0x6563bf92, 0xb1def9e9,
-  0x6526438f, 0xb18f7071,
-  0x64e88926, 0xb140175b, 0x64aa907f, 0xb0f0eeda, 0x646c59bf, 0xb0a1f71d,
-  0x642de50d, 0xb0533055,
-  0x63ef3290, 0xb0049ab3, 0x63b0426d, 0xafb63667, 0x637114cc, 0xaf6803a2,
-  0x6331a9d4, 0xaf1a0293,
-  0x62f201ac, 0xaecc336c, 0x62b21c7b, 0xae7e965b, 0x6271fa69, 0xae312b92,
-  0x62319b9d, 0xade3f33e,
-  0x61f1003f, 0xad96ed92, 0x61b02876, 0xad4a1aba, 0x616f146c, 0xacfd7ae8,
-  0x612dc447, 0xacb10e4b,
-  0x60ec3830, 0xac64d510, 0x60aa7050, 0xac18cf69, 0x60686ccf, 0xabccfd83,
-  0x60262dd6, 0xab815f8d,
-  0x5fe3b38d, 0xab35f5b5, 0x5fa0fe1f, 0xaaeac02c, 0x5f5e0db3, 0xaa9fbf1e,
-  0x5f1ae274, 0xaa54f2ba,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5e93dc1f, 0xa9bff8a8, 0x5e50015d, 0xa975cb57,
-  0x5e0bec6e, 0xa92bd367,
-  0x5dc79d7c, 0xa8e21106, 0x5d8314b1, 0xa8988463, 0x5d3e5237, 0xa84f2daa,
-  0x5cf95638, 0xa8060d08,
-  0x5cb420e0, 0xa7bd22ac, 0x5c6eb258, 0xa7746ec0, 0x5c290acc, 0xa72bf174,
-  0x5be32a67, 0xa6e3aaf2,
-  0x5b9d1154, 0xa69b9b68, 0x5b56bfbd, 0xa653c303, 0x5b1035cf, 0xa60c21ee,
-  0x5ac973b5, 0xa5c4b855,
-  0x5a82799a, 0xa57d8666, 0x5a3b47ab, 0xa5368c4b, 0x59f3de12, 0xa4efca31,
-  0x59ac3cfd, 0xa4a94043,
-  0x59646498, 0xa462eeac, 0x591c550e, 0xa41cd599, 0x58d40e8c, 0xa3d6f534,
-  0x588b9140, 0xa3914da8,
-  0x5842dd54, 0xa34bdf20, 0x57f9f2f8, 0xa306a9c8, 0x57b0d256, 0xa2c1adc9,
-  0x57677b9d, 0xa27ceb4f,
-  0x571deefa, 0xa2386284, 0x56d42c99, 0xa1f41392, 0x568a34a9, 0xa1affea3,
-  0x56400758, 0xa16c23e1,
-  0x55f5a4d2, 0xa1288376, 0x55ab0d46, 0xa0e51d8c, 0x556040e2, 0xa0a1f24d,
-  0x55153fd4, 0xa05f01e1,
-  0x54ca0a4b, 0xa01c4c73, 0x547ea073, 0x9fd9d22a, 0x5433027d, 0x9f979331,
-  0x53e73097, 0x9f558fb0,
-  0x539b2af0, 0x9f13c7d0, 0x534ef1b5, 0x9ed23bb9, 0x53028518, 0x9e90eb94,
-  0x52b5e546, 0x9e4fd78a,
-  0x5269126e, 0x9e0effc1, 0x521c0cc2, 0x9dce6463, 0x51ced46e, 0x9d8e0597,
-  0x518169a5, 0x9d4de385,
-  0x5133cc94, 0x9d0dfe54, 0x50e5fd6d, 0x9cce562c, 0x5097fc5e, 0x9c8eeb34,
-  0x5049c999, 0x9c4fbd93,
-  0x4ffb654d, 0x9c10cd70, 0x4faccfab, 0x9bd21af3, 0x4f5e08e3, 0x9b93a641,
-  0x4f0f1126, 0x9b556f81,
-  0x4ebfe8a5, 0x9b1776da, 0x4e708f8f, 0x9ad9bc71, 0x4e210617, 0x9a9c406e,
-  0x4dd14c6e, 0x9a5f02f5,
-  0x4d8162c4, 0x9a22042d, 0x4d31494b, 0x99e5443b, 0x4ce10034, 0x99a8c345,
-  0x4c9087b1, 0x996c816f,
-  0x4c3fdff4, 0x99307ee0, 0x4bef092d, 0x98f4bbbc, 0x4b9e0390, 0x98b93828,
-  0x4b4ccf4d, 0x987df449,
-  0x4afb6c98, 0x9842f043, 0x4aa9dba2, 0x98082c3b, 0x4a581c9e, 0x97cda855,
-  0x4a062fbd, 0x979364b5,
-  0x49b41533, 0x9759617f, 0x4961cd33, 0x971f9ed7, 0x490f57ee, 0x96e61ce0,
-  0x48bcb599, 0x96acdbbe,
-  0x4869e665, 0x9673db94, 0x4816ea86, 0x963b1c86, 0x47c3c22f, 0x96029eb6,
-  0x47706d93, 0x95ca6247,
-  0x471cece7, 0x9592675c, 0x46c9405c, 0x955aae17, 0x46756828, 0x9523369c,
-  0x4621647d, 0x94ec010b,
-  0x45cd358f, 0x94b50d87, 0x4578db93, 0x947e5c33, 0x452456bd, 0x9447ed2f,
-  0x44cfa740, 0x9411c09e,
-  0x447acd50, 0x93dbd6a0, 0x4425c923, 0x93a62f57, 0x43d09aed, 0x9370cae4,
-  0x437b42e1, 0x933ba968,
-  0x4325c135, 0x9306cb04, 0x42d0161e, 0x92d22fd9, 0x427a41d0, 0x929dd806,
-  0x42244481, 0x9269c3ac,
-  0x41ce1e65, 0x9235f2ec, 0x4177cfb1, 0x920265e4, 0x4121589b, 0x91cf1cb6,
-  0x40cab958, 0x919c1781,
-  0x4073f21d, 0x91695663, 0x401d0321, 0x9136d97d, 0x3fc5ec98, 0x9104a0ee,
-  0x3f6eaeb8, 0x90d2acd4,
-  0x3f1749b8, 0x90a0fd4e, 0x3ebfbdcd, 0x906f927c, 0x3e680b2c, 0x903e6c7b,
-  0x3e10320d, 0x900d8b69,
-  0x3db832a6, 0x8fdcef66, 0x3d600d2c, 0x8fac988f, 0x3d07c1d6, 0x8f7c8701,
-  0x3caf50da, 0x8f4cbadb,
-  0x3c56ba70, 0x8f1d343a, 0x3bfdfecd, 0x8eedf33b, 0x3ba51e29, 0x8ebef7fb,
-  0x3b4c18ba, 0x8e904298,
-  0x3af2eeb7, 0x8e61d32e, 0x3a99a057, 0x8e33a9da, 0x3a402dd2, 0x8e05c6b7,
-  0x39e6975e, 0x8dd829e4,
-  0x398cdd32, 0x8daad37b, 0x3932ff87, 0x8d7dc399, 0x38d8fe93, 0x8d50fa59,
-  0x387eda8e, 0x8d2477d8,
-  0x382493b0, 0x8cf83c30, 0x37ca2a30, 0x8ccc477d, 0x376f9e46, 0x8ca099da,
-  0x3714f02a, 0x8c753362,
-  0x36ba2014, 0x8c4a142f, 0x365f2e3b, 0x8c1f3c5d, 0x36041ad9, 0x8bf4ac05,
-  0x35a8e625, 0x8bca6343,
-  0x354d9057, 0x8ba0622f, 0x34f219a8, 0x8b76a8e4, 0x34968250, 0x8b4d377c,
-  0x343aca87, 0x8b240e11,
-  0x33def287, 0x8afb2cbb, 0x3382fa88, 0x8ad29394, 0x3326e2c3, 0x8aaa42b4,
-  0x32caab6f, 0x8a823a36,
-  0x326e54c7, 0x8a5a7a31, 0x3211df04, 0x8a3302be, 0x31b54a5e, 0x8a0bd3f5,
-  0x3158970e, 0x89e4edef,
-  0x30fbc54d, 0x89be50c3, 0x309ed556, 0x8997fc8a, 0x3041c761, 0x8971f15a,
-  0x2fe49ba7, 0x894c2f4c,
-  0x2f875262, 0x8926b677, 0x2f29ebcc, 0x890186f2, 0x2ecc681e, 0x88dca0d3,
-  0x2e6ec792, 0x88b80432,
-  0x2e110a62, 0x8893b125, 0x2db330c7, 0x886fa7c2, 0x2d553afc, 0x884be821,
-  0x2cf72939, 0x88287256,
-  0x2c98fbba, 0x88054677, 0x2c3ab2b9, 0x87e2649b, 0x2bdc4e6f, 0x87bfccd7,
-  0x2b7dcf17, 0x879d7f41,
-  0x2b1f34eb, 0x877b7bec, 0x2ac08026, 0x8759c2ef, 0x2a61b101, 0x8738545e,
-  0x2a02c7b8, 0x8717304e,
-  0x29a3c485, 0x86f656d3, 0x2944a7a2, 0x86d5c802, 0x28e5714b, 0x86b583ee,
-  0x288621b9, 0x86958aac,
-  0x2826b928, 0x8675dc4f, 0x27c737d3, 0x865678eb, 0x27679df4, 0x86376092,
-  0x2707ebc7, 0x86189359,
-  0x26a82186, 0x85fa1153, 0x26483f6c, 0x85dbda91, 0x25e845b6, 0x85bdef28,
-  0x2588349d, 0x85a04f28,
-  0x25280c5e, 0x8582faa5, 0x24c7cd33, 0x8565f1b0, 0x24677758, 0x8549345c,
-  0x24070b08, 0x852cc2bb,
-  0x23a6887f, 0x85109cdd, 0x2345eff8, 0x84f4c2d4, 0x22e541af, 0x84d934b1,
-  0x22847de0, 0x84bdf286,
-  0x2223a4c5, 0x84a2fc62, 0x21c2b69c, 0x84885258, 0x2161b3a0, 0x846df477,
-  0x21009c0c, 0x8453e2cf,
-  0x209f701c, 0x843a1d70, 0x203e300d, 0x8420a46c, 0x1fdcdc1b, 0x840777d0,
-  0x1f7b7481, 0x83ee97ad,
-  0x1f19f97b, 0x83d60412, 0x1eb86b46, 0x83bdbd0e, 0x1e56ca1e, 0x83a5c2b0,
-  0x1df5163f, 0x838e1507,
-  0x1d934fe5, 0x8376b422, 0x1d31774d, 0x835fa00f, 0x1ccf8cb3, 0x8348d8dc,
-  0x1c6d9053, 0x83325e97,
-  0x1c0b826a, 0x831c314e, 0x1ba96335, 0x83065110, 0x1b4732ef, 0x82f0bde8,
-  0x1ae4f1d6, 0x82db77e5,
-  0x1a82a026, 0x82c67f14, 0x1a203e1b, 0x82b1d381, 0x19bdcbf3, 0x829d753a,
-  0x195b49ea, 0x8289644b,
-  0x18f8b83c, 0x8275a0c0, 0x18961728, 0x82622aa6, 0x183366e9, 0x824f0208,
-  0x17d0a7bc, 0x823c26f3,
-  0x176dd9de, 0x82299971, 0x170afd8d, 0x82175990, 0x16a81305, 0x82056758,
-  0x16451a83, 0x81f3c2d7,
-  0x15e21445, 0x81e26c16, 0x157f0086, 0x81d16321, 0x151bdf86, 0x81c0a801,
-  0x14b8b17f, 0x81b03ac2,
-  0x145576b1, 0x81a01b6d, 0x13f22f58, 0x81904a0c, 0x138edbb1, 0x8180c6a9,
-  0x132b7bf9, 0x8171914e,
-  0x12c8106f, 0x8162aa04, 0x1264994e, 0x815410d4, 0x120116d5, 0x8145c5c7,
-  0x119d8941, 0x8137c8e6,
-  0x1139f0cf, 0x812a1a3a, 0x10d64dbd, 0x811cb9ca, 0x1072a048, 0x810fa7a0,
-  0x100ee8ad, 0x8102e3c4,
-  0xfab272b, 0x80f66e3c, 0xf475bff, 0x80ea4712, 0xee38766, 0x80de6e4c,
-  0xe7fa99e, 0x80d2e3f2,
-  0xe1bc2e4, 0x80c7a80a, 0xdb7d376, 0x80bcba9d, 0xd53db92, 0x80b21baf,
-  0xcefdb76, 0x80a7cb49,
-  0xc8bd35e, 0x809dc971, 0xc27c389, 0x8094162c, 0xbc3ac35, 0x808ab180,
-  0xb5f8d9f, 0x80819b74,
-  0xafb6805, 0x8078d40d, 0xa973ba5, 0x80705b50, 0xa3308bd, 0x80683143,
-  0x9cecf89, 0x806055eb,
-  0x96a9049, 0x8058c94c, 0x9064b3a, 0x80518b6b, 0x8a2009a, 0x804a9c4d,
-  0x83db0a7, 0x8043fbf6,
-  0x7d95b9e, 0x803daa6a, 0x77501be, 0x8037a7ac, 0x710a345, 0x8031f3c2,
-  0x6ac406f, 0x802c8ead,
-  0x647d97c, 0x80277872, 0x5e36ea9, 0x8022b114, 0x57f0035, 0x801e3895,
-  0x51a8e5c, 0x801a0ef8,
-  0x4b6195d, 0x80163440, 0x451a177, 0x8012a86f, 0x3ed26e6, 0x800f6b88,
-  0x388a9ea, 0x800c7d8c,
-  0x3242abf, 0x8009de7e, 0x2bfa9a4, 0x80078e5e, 0x25b26d7, 0x80058d2f,
-  0x1f6a297, 0x8003daf1,
-  0x1921d20, 0x800277a6, 0x12d96b1, 0x8001634e, 0xc90f88, 0x80009dea,
-  0x6487e3, 0x8000277a,
-};
-
-static const q31_t WeightsQ31_2048[4096] = {
-  0x7fffffff, 0x0, 0x7ffffd88, 0xffe6de05, 0x7ffff621, 0xffcdbc0b, 0x7fffe9cb,
-  0xffb49a12,
-  0x7fffd886, 0xff9b781d, 0x7fffc251, 0xff82562c, 0x7fffa72c, 0xff69343f,
-  0x7fff8719, 0xff501258,
-  0x7fff6216, 0xff36f078, 0x7fff3824, 0xff1dcea0, 0x7fff0943, 0xff04acd0,
-  0x7ffed572, 0xfeeb8b0a,
-  0x7ffe9cb2, 0xfed2694f, 0x7ffe5f03, 0xfeb947a0, 0x7ffe1c65, 0xfea025fd,
-  0x7ffdd4d7, 0xfe870467,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffd36ee, 0xfe54c169, 0x7ffce093, 0xfe3ba002,
-  0x7ffc8549, 0xfe227eac,
-  0x7ffc250f, 0xfe095d69, 0x7ffbbfe6, 0xfdf03c3a, 0x7ffb55ce, 0xfdd71b1e,
-  0x7ffae6c7, 0xfdbdfa18,
-  0x7ffa72d1, 0xfda4d929, 0x7ff9f9ec, 0xfd8bb850, 0x7ff97c18, 0xfd729790,
-  0x7ff8f954, 0xfd5976e9,
-  0x7ff871a2, 0xfd40565c, 0x7ff7e500, 0xfd2735ea, 0x7ff75370, 0xfd0e1594,
-  0x7ff6bcf0, 0xfcf4f55c,
-  0x7ff62182, 0xfcdbd541, 0x7ff58125, 0xfcc2b545, 0x7ff4dbd9, 0xfca9956a,
-  0x7ff4319d, 0xfc9075af,
-  0x7ff38274, 0xfc775616, 0x7ff2ce5b, 0xfc5e36a0, 0x7ff21553, 0xfc45174e,
-  0x7ff1575d, 0xfc2bf821,
-  0x7ff09478, 0xfc12d91a, 0x7fefcca4, 0xfbf9ba39, 0x7feeffe1, 0xfbe09b80,
-  0x7fee2e30, 0xfbc77cf0,
-  0x7fed5791, 0xfbae5e89, 0x7fec7c02, 0xfb95404d, 0x7feb9b85, 0xfb7c223d,
-  0x7feab61a, 0xfb630459,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe8dc78, 0xfb30c91b, 0x7fe7e841, 0xfb17abc2,
-  0x7fe6ef1c, 0xfafe8e9b,
-  0x7fe5f108, 0xfae571a4, 0x7fe4ee06, 0xfacc54e0, 0x7fe3e616, 0xfab3384f,
-  0x7fe2d938, 0xfa9a1bf3,
-  0x7fe1c76b, 0xfa80ffcb, 0x7fe0b0b1, 0xfa67e3da, 0x7fdf9508, 0xfa4ec821,
-  0x7fde7471, 0xfa35ac9f,
-  0x7fdd4eec, 0xfa1c9157, 0x7fdc247a, 0xfa037648, 0x7fdaf519, 0xf9ea5b75,
-  0x7fd9c0ca, 0xf9d140de,
-  0x7fd8878e, 0xf9b82684, 0x7fd74964, 0xf99f0c68, 0x7fd6064c, 0xf985f28a,
-  0x7fd4be46, 0xf96cd8ed,
-  0x7fd37153, 0xf953bf91, 0x7fd21f72, 0xf93aa676, 0x7fd0c8a3, 0xf9218d9e,
-  0x7fcf6ce8, 0xf908750a,
-  0x7fce0c3e, 0xf8ef5cbb, 0x7fcca6a7, 0xf8d644b2, 0x7fcb3c23, 0xf8bd2cef,
-  0x7fc9ccb2, 0xf8a41574,
-  0x7fc85854, 0xf88afe42, 0x7fc6df08, 0xf871e759, 0x7fc560cf, 0xf858d0bb,
-  0x7fc3dda9, 0xf83fba68,
-  0x7fc25596, 0xf826a462, 0x7fc0c896, 0xf80d8ea9, 0x7fbf36aa, 0xf7f4793e,
-  0x7fbd9fd0, 0xf7db6423,
-  0x7fbc040a, 0xf7c24f59, 0x7fba6357, 0xf7a93ae0, 0x7fb8bdb8, 0xf79026b9,
-  0x7fb7132b, 0xf77712e5,
-  0x7fb563b3, 0xf75dff66, 0x7fb3af4e, 0xf744ec3b, 0x7fb1f5fc, 0xf72bd967,
-  0x7fb037bf, 0xf712c6ea,
-  0x7fae7495, 0xf6f9b4c6, 0x7facac7f, 0xf6e0a2fa, 0x7faadf7c, 0xf6c79188,
-  0x7fa90d8e, 0xf6ae8071,
-  0x7fa736b4, 0xf6956fb7, 0x7fa55aee, 0xf67c5f59, 0x7fa37a3c, 0xf6634f59,
-  0x7fa1949e, 0xf64a3fb8,
-  0x7f9faa15, 0xf6313077, 0x7f9dbaa0, 0xf6182196, 0x7f9bc640, 0xf5ff1318,
-  0x7f99ccf4, 0xf5e604fc,
-  0x7f97cebd, 0xf5ccf743, 0x7f95cb9a, 0xf5b3e9f0, 0x7f93c38c, 0xf59add02,
-  0x7f91b694, 0xf581d07b,
-  0x7f8fa4b0, 0xf568c45b, 0x7f8d8de1, 0xf54fb8a4, 0x7f8b7227, 0xf536ad56,
-  0x7f895182, 0xf51da273,
-  0x7f872bf3, 0xf50497fb, 0x7f850179, 0xf4eb8def, 0x7f82d214, 0xf4d28451,
-  0x7f809dc5, 0xf4b97b21,
-  0x7f7e648c, 0xf4a07261, 0x7f7c2668, 0xf4876a10, 0x7f79e35a, 0xf46e6231,
-  0x7f779b62, 0xf4555ac5,
-  0x7f754e80, 0xf43c53cb, 0x7f72fcb4, 0xf4234d45, 0x7f70a5fe, 0xf40a4735,
-  0x7f6e4a5e, 0xf3f1419a,
-  0x7f6be9d4, 0xf3d83c77, 0x7f698461, 0xf3bf37cb, 0x7f671a05, 0xf3a63398,
-  0x7f64aabf, 0xf38d2fe0,
-  0x7f62368f, 0xf3742ca2, 0x7f5fbd77, 0xf35b29e0, 0x7f5d3f75, 0xf342279b,
-  0x7f5abc8a, 0xf32925d3,
-  0x7f5834b7, 0xf310248a, 0x7f55a7fa, 0xf2f723c1, 0x7f531655, 0xf2de2379,
-  0x7f507fc7, 0xf2c523b2,
-  0x7f4de451, 0xf2ac246e, 0x7f4b43f2, 0xf29325ad, 0x7f489eaa, 0xf27a2771,
-  0x7f45f47b, 0xf26129ba,
-  0x7f434563, 0xf2482c8a, 0x7f409164, 0xf22f2fe1, 0x7f3dd87c, 0xf21633c0,
-  0x7f3b1aad, 0xf1fd3829,
-  0x7f3857f6, 0xf1e43d1c, 0x7f359057, 0xf1cb429a, 0x7f32c3d1, 0xf1b248a5,
-  0x7f2ff263, 0xf1994f3d,
-  0x7f2d1c0e, 0xf1805662, 0x7f2a40d2, 0xf1675e17, 0x7f2760af, 0xf14e665c,
-  0x7f247ba5, 0xf1356f32,
-  0x7f2191b4, 0xf11c789a, 0x7f1ea2dc, 0xf1038295, 0x7f1baf1e, 0xf0ea8d24,
-  0x7f18b679, 0xf0d19848,
-  0x7f15b8ee, 0xf0b8a401, 0x7f12b67c, 0xf09fb051, 0x7f0faf25, 0xf086bd39,
-  0x7f0ca2e7, 0xf06dcaba,
-  0x7f0991c4, 0xf054d8d5, 0x7f067bba, 0xf03be78a, 0x7f0360cb, 0xf022f6da,
-  0x7f0040f6, 0xf00a06c8,
-  0x7efd1c3c, 0xeff11753, 0x7ef9f29d, 0xefd8287c, 0x7ef6c418, 0xefbf3a45,
-  0x7ef390ae, 0xefa64cae,
-  0x7ef05860, 0xef8d5fb8, 0x7eed1b2c, 0xef747365, 0x7ee9d914, 0xef5b87b5,
-  0x7ee69217, 0xef429caa,
-  0x7ee34636, 0xef29b243, 0x7edff570, 0xef10c883, 0x7edc9fc6, 0xeef7df6a,
-  0x7ed94538, 0xeedef6f9,
-  0x7ed5e5c6, 0xeec60f31, 0x7ed28171, 0xeead2813, 0x7ecf1837, 0xee9441a0,
-  0x7ecbaa1a, 0xee7b5bd9,
-  0x7ec8371a, 0xee6276bf, 0x7ec4bf36, 0xee499253, 0x7ec14270, 0xee30ae96,
-  0x7ebdc0c6, 0xee17cb88,
-  0x7eba3a39, 0xedfee92b, 0x7eb6aeca, 0xede60780, 0x7eb31e78, 0xedcd2687,
-  0x7eaf8943, 0xedb44642,
-  0x7eabef2c, 0xed9b66b2, 0x7ea85033, 0xed8287d7, 0x7ea4ac58, 0xed69a9b3,
-  0x7ea1039b, 0xed50cc46,
-  0x7e9d55fc, 0xed37ef91, 0x7e99a37c, 0xed1f1396, 0x7e95ec1a, 0xed063856,
-  0x7e922fd6, 0xeced5dd0,
-  0x7e8e6eb2, 0xecd48407, 0x7e8aa8ac, 0xecbbaafb, 0x7e86ddc6, 0xeca2d2ad,
-  0x7e830dff, 0xec89fb1e,
-  0x7e7f3957, 0xec71244f, 0x7e7b5fce, 0xec584e41, 0x7e778166, 0xec3f78f6,
-  0x7e739e1d, 0xec26a46d,
-  0x7e6fb5f4, 0xec0dd0a8, 0x7e6bc8eb, 0xebf4fda8, 0x7e67d703, 0xebdc2b6e,
-  0x7e63e03b, 0xebc359fb,
-  0x7e5fe493, 0xebaa894f, 0x7e5be40c, 0xeb91b96c, 0x7e57dea7, 0xeb78ea52,
-  0x7e53d462, 0xeb601c04,
-  0x7e4fc53e, 0xeb474e81, 0x7e4bb13c, 0xeb2e81ca, 0x7e47985b, 0xeb15b5e1,
-  0x7e437a9c, 0xeafceac6,
-  0x7e3f57ff, 0xeae4207a, 0x7e3b3083, 0xeacb56ff, 0x7e37042a, 0xeab28e56,
-  0x7e32d2f4, 0xea99c67e,
-  0x7e2e9cdf, 0xea80ff7a, 0x7e2a61ed, 0xea683949, 0x7e26221f, 0xea4f73ee,
-  0x7e21dd73, 0xea36af69,
-  0x7e1d93ea, 0xea1debbb, 0x7e194584, 0xea0528e5, 0x7e14f242, 0xe9ec66e8,
-  0x7e109a24, 0xe9d3a5c5,
-  0x7e0c3d29, 0xe9bae57d, 0x7e07db52, 0xe9a22610, 0x7e0374a0, 0xe9896781,
-  0x7dff0911, 0xe970a9ce,
-  0x7dfa98a8, 0xe957ecfb, 0x7df62362, 0xe93f3107, 0x7df1a942, 0xe92675f4,
-  0x7ded2a47, 0xe90dbbc2,
-  0x7de8a670, 0xe8f50273, 0x7de41dc0, 0xe8dc4a07, 0x7ddf9034, 0xe8c39280,
-  0x7ddafdce, 0xe8aadbde,
-  0x7dd6668f, 0xe8922622, 0x7dd1ca75, 0xe879714d, 0x7dcd2981, 0xe860bd61,
-  0x7dc883b4, 0xe8480a5d,
-  0x7dc3d90d, 0xe82f5844, 0x7dbf298d, 0xe816a716, 0x7dba7534, 0xe7fdf6d4,
-  0x7db5bc02, 0xe7e5477f,
-  0x7db0fdf8, 0xe7cc9917, 0x7dac3b15, 0xe7b3eb9f, 0x7da77359, 0xe79b3f16,
-  0x7da2a6c6, 0xe782937e,
-  0x7d9dd55a, 0xe769e8d8, 0x7d98ff17, 0xe7513f25, 0x7d9423fc, 0xe7389665,
-  0x7d8f4409, 0xe71fee99,
-  0x7d8a5f40, 0xe70747c4, 0x7d85759f, 0xe6eea1e4, 0x7d808728, 0xe6d5fcfc,
-  0x7d7b93da, 0xe6bd590d,
-  0x7d769bb5, 0xe6a4b616, 0x7d719eba, 0xe68c141a, 0x7d6c9ce9, 0xe6737319,
-  0x7d679642, 0xe65ad315,
-  0x7d628ac6, 0xe642340d, 0x7d5d7a74, 0xe6299604, 0x7d58654d, 0xe610f8f9,
-  0x7d534b50, 0xe5f85cef,
-  0x7d4e2c7f, 0xe5dfc1e5, 0x7d4908d9, 0xe5c727dd, 0x7d43e05e, 0xe5ae8ed8,
-  0x7d3eb30f, 0xe595f6d7,
-  0x7d3980ec, 0xe57d5fda, 0x7d3449f5, 0xe564c9e3, 0x7d2f0e2b, 0xe54c34f3,
-  0x7d29cd8c, 0xe533a10a,
-  0x7d24881b, 0xe51b0e2a, 0x7d1f3dd6, 0xe5027c53, 0x7d19eebf, 0xe4e9eb87,
-  0x7d149ad5, 0xe4d15bc6,
-  0x7d0f4218, 0xe4b8cd11, 0x7d09e489, 0xe4a03f69, 0x7d048228, 0xe487b2d0,
-  0x7cff1af5, 0xe46f2745,
-  0x7cf9aef0, 0xe4569ccb, 0x7cf43e1a, 0xe43e1362, 0x7ceec873, 0xe4258b0a,
-  0x7ce94dfb, 0xe40d03c6,
-  0x7ce3ceb2, 0xe3f47d96, 0x7cde4a98, 0xe3dbf87a, 0x7cd8c1ae, 0xe3c37474,
-  0x7cd333f3, 0xe3aaf184,
-  0x7ccda169, 0xe3926fad, 0x7cc80a0f, 0xe379eeed, 0x7cc26de5, 0xe3616f48,
-  0x7cbcccec, 0xe348f0bd,
-  0x7cb72724, 0xe330734d, 0x7cb17c8d, 0xe317f6fa, 0x7cabcd28, 0xe2ff7bc3,
-  0x7ca618f3, 0xe2e701ac,
-  0x7ca05ff1, 0xe2ce88b3, 0x7c9aa221, 0xe2b610da, 0x7c94df83, 0xe29d9a23,
-  0x7c8f1817, 0xe285248d,
-  0x7c894bde, 0xe26cb01b, 0x7c837ad8, 0xe2543ccc, 0x7c7da505, 0xe23bcaa2,
-  0x7c77ca65, 0xe223599e,
-  0x7c71eaf9, 0xe20ae9c1, 0x7c6c06c0, 0xe1f27b0b, 0x7c661dbc, 0xe1da0d7e,
-  0x7c602fec, 0xe1c1a11b,
-  0x7c5a3d50, 0xe1a935e2, 0x7c5445e9, 0xe190cbd4, 0x7c4e49b7, 0xe17862f3,
-  0x7c4848ba, 0xe15ffb3f,
-  0x7c4242f2, 0xe14794ba, 0x7c3c3860, 0xe12f2f63, 0x7c362904, 0xe116cb3d,
-  0x7c3014de, 0xe0fe6848,
-  0x7c29fbee, 0xe0e60685, 0x7c23de35, 0xe0cda5f5, 0x7c1dbbb3, 0xe0b54698,
-  0x7c179467, 0xe09ce871,
-  0x7c116853, 0xe0848b7f, 0x7c0b3777, 0xe06c2fc4, 0x7c0501d2, 0xe053d541,
-  0x7bfec765, 0xe03b7bf6,
-  0x7bf88830, 0xe02323e5, 0x7bf24434, 0xe00acd0e, 0x7bebfb70, 0xdff27773,
-  0x7be5ade6, 0xdfda2314,
-  0x7bdf5b94, 0xdfc1cff3, 0x7bd9047c, 0xdfa97e0f, 0x7bd2a89e, 0xdf912d6b,
-  0x7bcc47fa, 0xdf78de07,
-  0x7bc5e290, 0xdf608fe4, 0x7bbf7860, 0xdf484302, 0x7bb9096b, 0xdf2ff764,
-  0x7bb295b0, 0xdf17ad0a,
-  0x7bac1d31, 0xdeff63f4, 0x7ba59fee, 0xdee71c24, 0x7b9f1de6, 0xdeced59b,
-  0x7b989719, 0xdeb69059,
-  0x7b920b89, 0xde9e4c60, 0x7b8b7b36, 0xde8609b1, 0x7b84e61f, 0xde6dc84b,
-  0x7b7e4c45, 0xde558831,
-  0x7b77ada8, 0xde3d4964, 0x7b710a49, 0xde250be3, 0x7b6a6227, 0xde0ccfb1,
-  0x7b63b543, 0xddf494ce,
-  0x7b5d039e, 0xdddc5b3b, 0x7b564d36, 0xddc422f8, 0x7b4f920e, 0xddabec08,
-  0x7b48d225, 0xdd93b66a,
-  0x7b420d7a, 0xdd7b8220, 0x7b3b4410, 0xdd634f2b, 0x7b3475e5, 0xdd4b1d8c,
-  0x7b2da2fa, 0xdd32ed43,
-  0x7b26cb4f, 0xdd1abe51, 0x7b1feee5, 0xdd0290b8, 0x7b190dbc, 0xdcea6478,
-  0x7b1227d3, 0xdcd23993,
-  0x7b0b3d2c, 0xdcba1008, 0x7b044dc7, 0xdca1e7da, 0x7afd59a4, 0xdc89c109,
-  0x7af660c2, 0xdc719b96,
-  0x7aef6323, 0xdc597781, 0x7ae860c7, 0xdc4154cd, 0x7ae159ae, 0xdc293379,
-  0x7ada4dd8, 0xdc111388,
-  0x7ad33d45, 0xdbf8f4f8, 0x7acc27f7, 0xdbe0d7cd, 0x7ac50dec, 0xdbc8bc06,
-  0x7abdef25, 0xdbb0a1a4,
-  0x7ab6cba4, 0xdb9888a8, 0x7aafa367, 0xdb807114, 0x7aa8766f, 0xdb685ae9,
-  0x7aa144bc, 0xdb504626,
-  0x7a9a0e50, 0xdb3832cd, 0x7a92d329, 0xdb2020e0, 0x7a8b9348, 0xdb08105e,
-  0x7a844eae, 0xdaf00149,
-  0x7a7d055b, 0xdad7f3a2, 0x7a75b74f, 0xdabfe76a, 0x7a6e648a, 0xdaa7dca1,
-  0x7a670d0d, 0xda8fd349,
-  0x7a5fb0d8, 0xda77cb63, 0x7a584feb, 0xda5fc4ef, 0x7a50ea47, 0xda47bfee,
-  0x7a497feb, 0xda2fbc61,
-  0x7a4210d8, 0xda17ba4a, 0x7a3a9d0f, 0xd9ffb9a9, 0x7a332490, 0xd9e7ba7f,
-  0x7a2ba75a, 0xd9cfbccd,
-  0x7a24256f, 0xd9b7c094, 0x7a1c9ece, 0xd99fc5d4, 0x7a151378, 0xd987cc90,
-  0x7a0d836d, 0xd96fd4c7,
-  0x7a05eead, 0xd957de7a, 0x79fe5539, 0xd93fe9ab, 0x79f6b711, 0xd927f65b,
-  0x79ef1436, 0xd910048a,
-  0x79e76ca7, 0xd8f81439, 0x79dfc064, 0xd8e0256a, 0x79d80f6f, 0xd8c8381d,
-  0x79d059c8, 0xd8b04c52,
-  0x79c89f6e, 0xd898620c, 0x79c0e062, 0xd880794b, 0x79b91ca4, 0xd868920f,
-  0x79b15435, 0xd850ac5a,
-  0x79a98715, 0xd838c82d, 0x79a1b545, 0xd820e589, 0x7999dec4, 0xd809046e,
-  0x79920392, 0xd7f124dd,
-  0x798a23b1, 0xd7d946d8, 0x79823f20, 0xd7c16a5f, 0x797a55e0, 0xd7a98f73,
-  0x797267f2, 0xd791b616,
-  0x796a7554, 0xd779de47, 0x79627e08, 0xd7620808, 0x795a820e, 0xd74a335b,
-  0x79528167, 0xd732603f,
-  0x794a7c12, 0xd71a8eb5, 0x79427210, 0xd702bec0, 0x793a6361, 0xd6eaf05f,
-  0x79325006, 0xd6d32393,
-  0x792a37fe, 0xd6bb585e, 0x79221b4b, 0xd6a38ec0, 0x7919f9ec, 0xd68bc6ba,
-  0x7911d3e2, 0xd674004e,
-  0x7909a92d, 0xd65c3b7b, 0x790179cd, 0xd6447844, 0x78f945c3, 0xd62cb6a8,
-  0x78f10d0f, 0xd614f6a9,
-  0x78e8cfb2, 0xd5fd3848, 0x78e08dab, 0xd5e57b85, 0x78d846fb, 0xd5cdc062,
-  0x78cffba3, 0xd5b606e0,
-  0x78c7aba2, 0xd59e4eff, 0x78bf56f9, 0xd58698c0, 0x78b6fda8, 0xd56ee424,
-  0x78ae9fb0, 0xd557312d,
-  0x78a63d11, 0xd53f7fda, 0x789dd5cb, 0xd527d02e, 0x789569df, 0xd5102228,
-  0x788cf94c, 0xd4f875ca,
-  0x78848414, 0xd4e0cb15, 0x787c0a36, 0xd4c92209, 0x78738bb3, 0xd4b17aa8,
-  0x786b088c, 0xd499d4f2,
-  0x786280bf, 0xd48230e9, 0x7859f44f, 0xd46a8e8d, 0x7851633b, 0xd452eddf,
-  0x7848cd83, 0xd43b4ee0,
-  0x78403329, 0xd423b191, 0x7837942b, 0xd40c15f3, 0x782ef08b, 0xd3f47c06,
-  0x78264849, 0xd3dce3cd,
-  0x781d9b65, 0xd3c54d47, 0x7814e9df, 0xd3adb876, 0x780c33b8, 0xd396255a,
-  0x780378f1, 0xd37e93f4,
-  0x77fab989, 0xd3670446, 0x77f1f581, 0xd34f764f, 0x77e92cd9, 0xd337ea12,
-  0x77e05f91, 0xd3205f8f,
-  0x77d78daa, 0xd308d6c7, 0x77ceb725, 0xd2f14fba, 0x77c5dc01, 0xd2d9ca6a,
-  0x77bcfc3f, 0xd2c246d8,
-  0x77b417df, 0xd2aac504, 0x77ab2ee2, 0xd29344f0, 0x77a24148, 0xd27bc69c,
-  0x77994f11, 0xd2644a0a,
-  0x7790583e, 0xd24ccf39, 0x77875cce, 0xd235562b, 0x777e5cc3, 0xd21ddee2,
-  0x7775581d, 0xd206695d,
-  0x776c4edb, 0xd1eef59e, 0x776340ff, 0xd1d783a6, 0x775a2e89, 0xd1c01375,
-  0x77511778, 0xd1a8a50d,
-  0x7747fbce, 0xd191386e, 0x773edb8b, 0xd179cd99, 0x7735b6af, 0xd1626490,
-  0x772c8d3a, 0xd14afd52,
-  0x77235f2d, 0xd13397e2, 0x771a2c88, 0xd11c343f, 0x7710f54c, 0xd104d26b,
-  0x7707b979, 0xd0ed7267,
-  0x76fe790e, 0xd0d61434, 0x76f5340e, 0xd0beb7d2, 0x76ebea77, 0xd0a75d42,
-  0x76e29c4b, 0xd0900486,
-  0x76d94989, 0xd078ad9e, 0x76cff232, 0xd061588b, 0x76c69647, 0xd04a054e,
-  0x76bd35c7, 0xd032b3e7,
-  0x76b3d0b4, 0xd01b6459, 0x76aa670d, 0xd00416a3, 0x76a0f8d2, 0xcfeccac7,
-  0x76978605, 0xcfd580c6,
-  0x768e0ea6, 0xcfbe389f, 0x768492b4, 0xcfa6f255, 0x767b1231, 0xcf8fade9,
-  0x76718d1c, 0xcf786b5a,
-  0x76680376, 0xcf612aaa, 0x765e7540, 0xcf49ebda, 0x7654e279, 0xcf32aeeb,
-  0x764b4b23, 0xcf1b73de,
-  0x7641af3d, 0xcf043ab3, 0x76380ec8, 0xceed036b, 0x762e69c4, 0xced5ce08,
-  0x7624c031, 0xcebe9a8a,
-  0x761b1211, 0xcea768f2, 0x76115f63, 0xce903942, 0x7607a828, 0xce790b79,
-  0x75fdec60, 0xce61df99,
-  0x75f42c0b, 0xce4ab5a2, 0x75ea672a, 0xce338d97, 0x75e09dbd, 0xce1c6777,
-  0x75d6cfc5, 0xce054343,
-  0x75ccfd42, 0xcdee20fc, 0x75c32634, 0xcdd700a4, 0x75b94a9c, 0xcdbfe23a,
-  0x75af6a7b, 0xcda8c5c1,
-  0x75a585cf, 0xcd91ab39, 0x759b9c9b, 0xcd7a92a2, 0x7591aedd, 0xcd637bfe,
-  0x7587bc98, 0xcd4c674d,
-  0x757dc5ca, 0xcd355491, 0x7573ca75, 0xcd1e43ca, 0x7569ca99, 0xcd0734f9,
-  0x755fc635, 0xccf0281f,
-  0x7555bd4c, 0xccd91d3d, 0x754bafdc, 0xccc21455, 0x75419de7, 0xccab0d65,
-  0x7537876c, 0xcc940871,
-  0x752d6c6c, 0xcc7d0578, 0x75234ce8, 0xcc66047b, 0x751928e0, 0xcc4f057c,
-  0x750f0054, 0xcc38087b,
-  0x7504d345, 0xcc210d79, 0x74faa1b3, 0xcc0a1477, 0x74f06b9e, 0xcbf31d75,
-  0x74e63108, 0xcbdc2876,
-  0x74dbf1ef, 0xcbc53579, 0x74d1ae55, 0xcbae447f, 0x74c7663a, 0xcb97558a,
-  0x74bd199f, 0xcb80689a,
-  0x74b2c884, 0xcb697db0, 0x74a872e8, 0xcb5294ce, 0x749e18cd, 0xcb3badf3,
-  0x7493ba34, 0xcb24c921,
-  0x7489571c, 0xcb0de658, 0x747eef85, 0xcaf7059a, 0x74748371, 0xcae026e8,
-  0x746a12df, 0xcac94a42,
-  0x745f9dd1, 0xcab26fa9, 0x74552446, 0xca9b971e, 0x744aa63f, 0xca84c0a3,
-  0x744023bc, 0xca6dec37,
-  0x74359cbd, 0xca5719db, 0x742b1144, 0xca404992, 0x74208150, 0xca297b5a,
-  0x7415ece2, 0xca12af37,
-  0x740b53fb, 0xc9fbe527, 0x7400b69a, 0xc9e51d2d, 0x73f614c0, 0xc9ce5748,
-  0x73eb6e6e, 0xc9b7937a,
-  0x73e0c3a3, 0xc9a0d1c5, 0x73d61461, 0xc98a1227, 0x73cb60a8, 0xc97354a4,
-  0x73c0a878, 0xc95c993a,
-  0x73b5ebd1, 0xc945dfec, 0x73ab2ab4, 0xc92f28ba, 0x73a06522, 0xc91873a5,
-  0x73959b1b, 0xc901c0ae,
-  0x738acc9e, 0xc8eb0fd6, 0x737ff9ae, 0xc8d4611d, 0x73752249, 0xc8bdb485,
-  0x736a4671, 0xc8a70a0e,
-  0x735f6626, 0xc89061ba, 0x73548168, 0xc879bb89, 0x73499838, 0xc863177b,
-  0x733eaa96, 0xc84c7593,
-  0x7333b883, 0xc835d5d0, 0x7328c1ff, 0xc81f3834, 0x731dc70a, 0xc8089cbf,
-  0x7312c7a5, 0xc7f20373,
-  0x7307c3d0, 0xc7db6c50, 0x72fcbb8c, 0xc7c4d757, 0x72f1aed9, 0xc7ae4489,
-  0x72e69db7, 0xc797b3e7,
-  0x72db8828, 0xc7812572, 0x72d06e2b, 0xc76a992a, 0x72c54fc1, 0xc7540f11,
-  0x72ba2cea, 0xc73d8727,
-  0x72af05a7, 0xc727016d, 0x72a3d9f7, 0xc7107de4, 0x7298a9dd, 0xc6f9fc8d,
-  0x728d7557, 0xc6e37d69,
-  0x72823c67, 0xc6cd0079, 0x7276ff0d, 0xc6b685bd, 0x726bbd48, 0xc6a00d37,
-  0x7260771b, 0xc68996e7,
-  0x72552c85, 0xc67322ce, 0x7249dd86, 0xc65cb0ed, 0x723e8a20, 0xc6464144,
-  0x72333251, 0xc62fd3d6,
-  0x7227d61c, 0xc61968a2, 0x721c7580, 0xc602ffaa, 0x7211107e, 0xc5ec98ee,
-  0x7205a716, 0xc5d6346f,
-  0x71fa3949, 0xc5bfd22e, 0x71eec716, 0xc5a9722c, 0x71e35080, 0xc593146a,
-  0x71d7d585, 0xc57cb8e9,
-  0x71cc5626, 0xc5665fa9, 0x71c0d265, 0xc55008ab, 0x71b54a41, 0xc539b3f1,
-  0x71a9bdba, 0xc523617a,
-  0x719e2cd2, 0xc50d1149, 0x71929789, 0xc4f6c35d, 0x7186fdde, 0xc4e077b8,
-  0x717b5fd3, 0xc4ca2e5b,
-  0x716fbd68, 0xc4b3e746, 0x7164169d, 0xc49da27a, 0x71586b74, 0xc4875ff9,
-  0x714cbbeb, 0xc4711fc2,
-  0x71410805, 0xc45ae1d7, 0x71354fc0, 0xc444a639, 0x7129931f, 0xc42e6ce8,
-  0x711dd220, 0xc41835e6,
-  0x71120cc5, 0xc4020133, 0x7106430e, 0xc3ebced0, 0x70fa74fc, 0xc3d59ebe,
-  0x70eea28e, 0xc3bf70fd,
-  0x70e2cbc6, 0xc3a94590, 0x70d6f0a4, 0xc3931c76, 0x70cb1128, 0xc37cf5b0,
-  0x70bf2d53, 0xc366d140,
-  0x70b34525, 0xc350af26, 0x70a7589f, 0xc33a8f62, 0x709b67c0, 0xc32471f7,
-  0x708f728b, 0xc30e56e4,
-  0x708378ff, 0xc2f83e2a, 0x70777b1c, 0xc2e227cb, 0x706b78e3, 0xc2cc13c7,
-  0x705f7255, 0xc2b6021f,
-  0x70536771, 0xc29ff2d4, 0x70475839, 0xc289e5e7, 0x703b44ad, 0xc273db58,
-  0x702f2ccd, 0xc25dd329,
-  0x7023109a, 0xc247cd5a, 0x7016f014, 0xc231c9ec, 0x700acb3c, 0xc21bc8e1,
-  0x6ffea212, 0xc205ca38,
-  0x6ff27497, 0xc1efcdf3, 0x6fe642ca, 0xc1d9d412, 0x6fda0cae, 0xc1c3dc97,
-  0x6fcdd241, 0xc1ade781,
-  0x6fc19385, 0xc197f4d4, 0x6fb5507a, 0xc182048d, 0x6fa90921, 0xc16c16b0,
-  0x6f9cbd79, 0xc1562b3d,
-  0x6f906d84, 0xc1404233, 0x6f841942, 0xc12a5b95, 0x6f77c0b3, 0xc1147764,
-  0x6f6b63d8, 0xc0fe959f,
-  0x6f5f02b2, 0xc0e8b648, 0x6f529d40, 0xc0d2d960, 0x6f463383, 0xc0bcfee7,
-  0x6f39c57d, 0xc0a726df,
-  0x6f2d532c, 0xc0915148, 0x6f20dc92, 0xc07b7e23, 0x6f1461b0, 0xc065ad70,
-  0x6f07e285, 0xc04fdf32,
-  0x6efb5f12, 0xc03a1368, 0x6eeed758, 0xc0244a14, 0x6ee24b57, 0xc00e8336,
-  0x6ed5bb10, 0xbff8bece,
-  0x6ec92683, 0xbfe2fcdf, 0x6ebc8db0, 0xbfcd3d69, 0x6eaff099, 0xbfb7806c,
-  0x6ea34f3d, 0xbfa1c5ea,
-  0x6e96a99d, 0xbf8c0de3, 0x6e89ffb9, 0xbf765858, 0x6e7d5193, 0xbf60a54a,
-  0x6e709f2a, 0xbf4af4ba,
-  0x6e63e87f, 0xbf3546a8, 0x6e572d93, 0xbf1f9b16, 0x6e4a6e66, 0xbf09f205,
-  0x6e3daaf8, 0xbef44b74,
-  0x6e30e34a, 0xbedea765, 0x6e24175c, 0xbec905d9, 0x6e174730, 0xbeb366d1,
-  0x6e0a72c5, 0xbe9dca4e,
-  0x6dfd9a1c, 0xbe88304f, 0x6df0bd35, 0xbe7298d7, 0x6de3dc11, 0xbe5d03e6,
-  0x6dd6f6b1, 0xbe47717c,
-  0x6dca0d14, 0xbe31e19b, 0x6dbd1f3c, 0xbe1c5444, 0x6db02d29, 0xbe06c977,
-  0x6da336dc, 0xbdf14135,
-  0x6d963c54, 0xbddbbb7f, 0x6d893d93, 0xbdc63856, 0x6d7c3a98, 0xbdb0b7bb,
-  0x6d6f3365, 0xbd9b39ad,
-  0x6d6227fa, 0xbd85be30, 0x6d551858, 0xbd704542, 0x6d48047e, 0xbd5acee5,
-  0x6d3aec6e, 0xbd455b1a,
-  0x6d2dd027, 0xbd2fe9e2, 0x6d20afac, 0xbd1a7b3d, 0x6d138afb, 0xbd050f2c,
-  0x6d066215, 0xbcefa5b0,
-  0x6cf934fc, 0xbcda3ecb, 0x6cec03af, 0xbcc4da7b, 0x6cdece2f, 0xbcaf78c4,
-  0x6cd1947c, 0xbc9a19a5,
-  0x6cc45698, 0xbc84bd1f, 0x6cb71482, 0xbc6f6333, 0x6ca9ce3b, 0xbc5a0be2,
-  0x6c9c83c3, 0xbc44b72c,
-  0x6c8f351c, 0xbc2f6513, 0x6c81e245, 0xbc1a1598, 0x6c748b3f, 0xbc04c8ba,
-  0x6c67300b, 0xbbef7e7c,
-  0x6c59d0a9, 0xbbda36dd, 0x6c4c6d1a, 0xbbc4f1df, 0x6c3f055d, 0xbbafaf82,
-  0x6c319975, 0xbb9a6fc7,
-  0x6c242960, 0xbb8532b0, 0x6c16b521, 0xbb6ff83c, 0x6c093cb6, 0xbb5ac06d,
-  0x6bfbc021, 0xbb458b43,
-  0x6bee3f62, 0xbb3058c0, 0x6be0ba7b, 0xbb1b28e4, 0x6bd3316a, 0xbb05fbb0,
-  0x6bc5a431, 0xbaf0d125,
-  0x6bb812d1, 0xbadba943, 0x6baa7d49, 0xbac6840c, 0x6b9ce39b, 0xbab16180,
-  0x6b8f45c7, 0xba9c41a0,
-  0x6b81a3cd, 0xba87246d, 0x6b73fdae, 0xba7209e7, 0x6b66536b, 0xba5cf210,
-  0x6b58a503, 0xba47dce8,
-  0x6b4af279, 0xba32ca71, 0x6b3d3bcb, 0xba1dbaaa, 0x6b2f80fb, 0xba08ad95,
-  0x6b21c208, 0xb9f3a332,
-  0x6b13fef5, 0xb9de9b83, 0x6b0637c1, 0xb9c99688, 0x6af86c6c, 0xb9b49442,
-  0x6aea9cf8, 0xb99f94b2,
-  0x6adcc964, 0xb98a97d8, 0x6acef1b2, 0xb9759db6, 0x6ac115e2, 0xb960a64c,
-  0x6ab335f4, 0xb94bb19b,
-  0x6aa551e9, 0xb936bfa4, 0x6a9769c1, 0xb921d067, 0x6a897d7d, 0xb90ce3e6,
-  0x6a7b8d1e, 0xb8f7fa21,
-  0x6a6d98a4, 0xb8e31319, 0x6a5fa010, 0xb8ce2ecf, 0x6a51a361, 0xb8b94d44,
-  0x6a43a29a, 0xb8a46e78,
-  0x6a359db9, 0xb88f926d, 0x6a2794c1, 0xb87ab922, 0x6a1987b0, 0xb865e299,
-  0x6a0b7689, 0xb8510ed4,
-  0x69fd614a, 0xb83c3dd1, 0x69ef47f6, 0xb8276f93, 0x69e12a8c, 0xb812a41a,
-  0x69d3090e, 0xb7fddb67,
-  0x69c4e37a, 0xb7e9157a, 0x69b6b9d3, 0xb7d45255, 0x69a88c19, 0xb7bf91f8,
-  0x699a5a4c, 0xb7aad465,
-  0x698c246c, 0xb796199b, 0x697dea7b, 0xb781619c, 0x696fac78, 0xb76cac69,
-  0x69616a65, 0xb757fa01,
-  0x69532442, 0xb7434a67, 0x6944da10, 0xb72e9d9b, 0x69368bce, 0xb719f39e,
-  0x6928397e, 0xb7054c6f,
-  0x6919e320, 0xb6f0a812, 0x690b88b5, 0xb6dc0685, 0x68fd2a3d, 0xb6c767ca,
-  0x68eec7b9, 0xb6b2cbe2,
-  0x68e06129, 0xb69e32cd, 0x68d1f68f, 0xb6899c8d, 0x68c387e9, 0xb6750921,
-  0x68b5153a, 0xb660788c,
-  0x68a69e81, 0xb64beacd, 0x689823bf, 0xb6375fe5, 0x6889a4f6, 0xb622d7d6,
-  0x687b2224, 0xb60e529f,
-  0x686c9b4b, 0xb5f9d043, 0x685e106c, 0xb5e550c1, 0x684f8186, 0xb5d0d41a,
-  0x6840ee9b, 0xb5bc5a50,
-  0x683257ab, 0xb5a7e362, 0x6823bcb7, 0xb5936f53, 0x68151dbe, 0xb57efe22,
-  0x68067ac3, 0xb56a8fd0,
-  0x67f7d3c5, 0xb556245e, 0x67e928c5, 0xb541bbcd, 0x67da79c3, 0xb52d561e,
-  0x67cbc6c0, 0xb518f351,
-  0x67bd0fbd, 0xb5049368, 0x67ae54ba, 0xb4f03663, 0x679f95b7, 0xb4dbdc42,
-  0x6790d2b6, 0xb4c78507,
-  0x67820bb7, 0xb4b330b3, 0x677340ba, 0xb49edf45, 0x676471c0, 0xb48a90c0,
-  0x67559eca, 0xb4764523,
-  0x6746c7d8, 0xb461fc70, 0x6737ecea, 0xb44db6a8, 0x67290e02, 0xb43973ca,
-  0x671a2b20, 0xb42533d8,
-  0x670b4444, 0xb410f6d3, 0x66fc596f, 0xb3fcbcbb, 0x66ed6aa1, 0xb3e88592,
-  0x66de77dc, 0xb3d45157,
-  0x66cf8120, 0xb3c0200c, 0x66c0866d, 0xb3abf1b2, 0x66b187c3, 0xb397c649,
-  0x66a28524, 0xb3839dd3,
-  0x66937e91, 0xb36f784f, 0x66847408, 0xb35b55bf, 0x6675658c, 0xb3473623,
-  0x6666531d, 0xb333197c,
-  0x66573cbb, 0xb31effcc, 0x66482267, 0xb30ae912, 0x66390422, 0xb2f6d550,
-  0x6629e1ec, 0xb2e2c486,
-  0x661abbc5, 0xb2ceb6b5, 0x660b91af, 0xb2baabde, 0x65fc63a9, 0xb2a6a402,
-  0x65ed31b5, 0xb2929f21,
-  0x65ddfbd3, 0xb27e9d3c, 0x65cec204, 0xb26a9e54, 0x65bf8447, 0xb256a26a,
-  0x65b0429f, 0xb242a97e,
-  0x65a0fd0b, 0xb22eb392, 0x6591b38c, 0xb21ac0a6, 0x65826622, 0xb206d0ba,
-  0x657314cf, 0xb1f2e3d0,
-  0x6563bf92, 0xb1def9e9, 0x6554666d, 0xb1cb1304, 0x6545095f, 0xb1b72f23,
-  0x6535a86b, 0xb1a34e47,
-  0x6526438f, 0xb18f7071, 0x6516dacd, 0xb17b95a0, 0x65076e25, 0xb167bdd7,
-  0x64f7fd98, 0xb153e915,
-  0x64e88926, 0xb140175b, 0x64d910d1, 0xb12c48ab, 0x64c99498, 0xb1187d05,
-  0x64ba147d, 0xb104b46a,
-  0x64aa907f, 0xb0f0eeda, 0x649b08a0, 0xb0dd2c56, 0x648b7ce0, 0xb0c96ce0,
-  0x647bed3f, 0xb0b5b077,
-  0x646c59bf, 0xb0a1f71d, 0x645cc260, 0xb08e40d2, 0x644d2722, 0xb07a8d97,
-  0x643d8806, 0xb066dd6d,
-  0x642de50d, 0xb0533055, 0x641e3e38, 0xb03f864f, 0x640e9386, 0xb02bdf5c,
-  0x63fee4f8, 0xb0183b7d,
-  0x63ef3290, 0xb0049ab3, 0x63df7c4d, 0xaff0fcfe, 0x63cfc231, 0xafdd625f,
-  0x63c0043b, 0xafc9cad7,
-  0x63b0426d, 0xafb63667, 0x63a07cc7, 0xafa2a50f, 0x6390b34a, 0xaf8f16d1,
-  0x6380e5f6, 0xaf7b8bac,
-  0x637114cc, 0xaf6803a2, 0x63613fcd, 0xaf547eb3, 0x635166f9, 0xaf40fce1,
-  0x63418a50, 0xaf2d7e2b,
-  0x6331a9d4, 0xaf1a0293, 0x6321c585, 0xaf068a1a, 0x6311dd64, 0xaef314c0,
-  0x6301f171, 0xaedfa285,
-  0x62f201ac, 0xaecc336c, 0x62e20e17, 0xaeb8c774, 0x62d216b3, 0xaea55e9e,
-  0x62c21b7e, 0xae91f8eb,
-  0x62b21c7b, 0xae7e965b, 0x62a219aa, 0xae6b36f0, 0x6292130c, 0xae57daab,
-  0x628208a1, 0xae44818b,
-  0x6271fa69, 0xae312b92, 0x6261e866, 0xae1dd8c0, 0x6251d298, 0xae0a8916,
-  0x6241b8ff, 0xadf73c96,
-  0x62319b9d, 0xade3f33e, 0x62217a72, 0xadd0ad12, 0x6211557e, 0xadbd6a10,
-  0x62012cc2, 0xadaa2a3b,
-  0x61f1003f, 0xad96ed92, 0x61e0cff5, 0xad83b416, 0x61d09be5, 0xad707dc8,
-  0x61c06410, 0xad5d4aaa,
-  0x61b02876, 0xad4a1aba, 0x619fe918, 0xad36edfc, 0x618fa5f7, 0xad23c46e,
-  0x617f5f12, 0xad109e12,
-  0x616f146c, 0xacfd7ae8, 0x615ec603, 0xacea5af2, 0x614e73da, 0xacd73e30,
-  0x613e1df0, 0xacc424a3,
-  0x612dc447, 0xacb10e4b, 0x611d66de, 0xac9dfb29, 0x610d05b7, 0xac8aeb3e,
-  0x60fca0d2, 0xac77de8b,
-  0x60ec3830, 0xac64d510, 0x60dbcbd1, 0xac51cecf, 0x60cb5bb7, 0xac3ecbc7,
-  0x60bae7e1, 0xac2bcbfa,
-  0x60aa7050, 0xac18cf69, 0x6099f505, 0xac05d613, 0x60897601, 0xabf2dffb,
-  0x6078f344, 0xabdfed1f,
-  0x60686ccf, 0xabccfd83, 0x6057e2a2, 0xabba1125, 0x604754bf, 0xaba72807,
-  0x6036c325, 0xab944229,
-  0x60262dd6, 0xab815f8d, 0x601594d1, 0xab6e8032, 0x6004f819, 0xab5ba41a,
-  0x5ff457ad, 0xab48cb46,
-  0x5fe3b38d, 0xab35f5b5, 0x5fd30bbc, 0xab23236a, 0x5fc26038, 0xab105464,
-  0x5fb1b104, 0xaafd88a4,
-  0x5fa0fe1f, 0xaaeac02c, 0x5f90478a, 0xaad7fafb, 0x5f7f8d46, 0xaac53912,
-  0x5f6ecf53, 0xaab27a73,
-  0x5f5e0db3, 0xaa9fbf1e, 0x5f4d4865, 0xaa8d0713, 0x5f3c7f6b, 0xaa7a5253,
-  0x5f2bb2c5, 0xaa67a0e0,
-  0x5f1ae274, 0xaa54f2ba, 0x5f0a0e77, 0xaa4247e1, 0x5ef936d1, 0xaa2fa056,
-  0x5ee85b82, 0xaa1cfc1a,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5ec699e9, 0xa9f7bd92, 0x5eb5b3a2, 0xa9e52347,
-  0x5ea4c9b3, 0xa9d28c4e,
-  0x5e93dc1f, 0xa9bff8a8, 0x5e82eae5, 0xa9ad6855, 0x5e71f606, 0xa99adb56,
-  0x5e60fd84, 0xa98851ac,
-  0x5e50015d, 0xa975cb57, 0x5e3f0194, 0xa9634858, 0x5e2dfe29, 0xa950c8b0,
-  0x5e1cf71c, 0xa93e4c5f,
-  0x5e0bec6e, 0xa92bd367, 0x5dfade20, 0xa9195dc7, 0x5de9cc33, 0xa906eb82,
-  0x5dd8b6a7, 0xa8f47c97,
-  0x5dc79d7c, 0xa8e21106, 0x5db680b4, 0xa8cfa8d2, 0x5da5604f, 0xa8bd43fa,
-  0x5d943c4e, 0xa8aae280,
-  0x5d8314b1, 0xa8988463, 0x5d71e979, 0xa88629a5, 0x5d60baa7, 0xa873d246,
-  0x5d4f883b, 0xa8617e48,
-  0x5d3e5237, 0xa84f2daa, 0x5d2d189a, 0xa83ce06e, 0x5d1bdb65, 0xa82a9693,
-  0x5d0a9a9a, 0xa818501c,
-  0x5cf95638, 0xa8060d08, 0x5ce80e41, 0xa7f3cd59, 0x5cd6c2b5, 0xa7e1910f,
-  0x5cc57394, 0xa7cf582a,
-  0x5cb420e0, 0xa7bd22ac, 0x5ca2ca99, 0xa7aaf094, 0x5c9170bf, 0xa798c1e5,
-  0x5c801354, 0xa786969e,
-  0x5c6eb258, 0xa7746ec0, 0x5c5d4dcc, 0xa7624a4d, 0x5c4be5b0, 0xa7502943,
-  0x5c3a7a05, 0xa73e0ba5,
-  0x5c290acc, 0xa72bf174, 0x5c179806, 0xa719daae, 0x5c0621b2, 0xa707c757,
-  0x5bf4a7d2, 0xa6f5b76d,
-  0x5be32a67, 0xa6e3aaf2, 0x5bd1a971, 0xa6d1a1e7, 0x5bc024f0, 0xa6bf9c4b,
-  0x5bae9ce7, 0xa6ad9a21,
-  0x5b9d1154, 0xa69b9b68, 0x5b8b8239, 0xa689a022, 0x5b79ef96, 0xa677a84e,
-  0x5b68596d, 0xa665b3ee,
-  0x5b56bfbd, 0xa653c303, 0x5b452288, 0xa641d58c, 0x5b3381ce, 0xa62feb8b,
-  0x5b21dd90, 0xa61e0501,
-  0x5b1035cf, 0xa60c21ee, 0x5afe8a8b, 0xa5fa4252, 0x5aecdbc5, 0xa5e8662f,
-  0x5adb297d, 0xa5d68d85,
-  0x5ac973b5, 0xa5c4b855, 0x5ab7ba6c, 0xa5b2e6a0, 0x5aa5fda5, 0xa5a11866,
-  0x5a943d5e, 0xa58f4da8,
-  0x5a82799a, 0xa57d8666, 0x5a70b258, 0xa56bc2a2, 0x5a5ee79a, 0xa55a025b,
-  0x5a4d1960, 0xa5484594,
-  0x5a3b47ab, 0xa5368c4b, 0x5a29727b, 0xa524d683, 0x5a1799d1, 0xa513243b,
-  0x5a05bdae, 0xa5017575,
-  0x59f3de12, 0xa4efca31, 0x59e1faff, 0xa4de2270, 0x59d01475, 0xa4cc7e32,
-  0x59be2a74, 0xa4badd78,
-  0x59ac3cfd, 0xa4a94043, 0x599a4c12, 0xa497a693, 0x598857b2, 0xa486106a,
-  0x59765fde, 0xa4747dc7,
-  0x59646498, 0xa462eeac, 0x595265df, 0xa4516319, 0x594063b5, 0xa43fdb10,
-  0x592e5e19, 0xa42e568f,
-  0x591c550e, 0xa41cd599, 0x590a4893, 0xa40b582e, 0x58f838a9, 0xa3f9de4e,
-  0x58e62552, 0xa3e867fa,
-  0x58d40e8c, 0xa3d6f534, 0x58c1f45b, 0xa3c585fb, 0x58afd6bd, 0xa3b41a50,
-  0x589db5b3, 0xa3a2b234,
-  0x588b9140, 0xa3914da8, 0x58796962, 0xa37fecac, 0x58673e1b, 0xa36e8f41,
-  0x58550f6c, 0xa35d3567,
-  0x5842dd54, 0xa34bdf20, 0x5830a7d6, 0xa33a8c6c, 0x581e6ef1, 0xa3293d4b,
-  0x580c32a7, 0xa317f1bf,
-  0x57f9f2f8, 0xa306a9c8, 0x57e7afe4, 0xa2f56566, 0x57d5696d, 0xa2e4249b,
-  0x57c31f92, 0xa2d2e766,
-  0x57b0d256, 0xa2c1adc9, 0x579e81b8, 0xa2b077c5, 0x578c2dba, 0xa29f4559,
-  0x5779d65b, 0xa28e1687,
-  0x57677b9d, 0xa27ceb4f, 0x57551d80, 0xa26bc3b2, 0x5742bc06, 0xa25a9fb1,
-  0x5730572e, 0xa2497f4c,
-  0x571deefa, 0xa2386284, 0x570b8369, 0xa2274959, 0x56f9147e, 0xa21633cd,
-  0x56e6a239, 0xa20521e0,
-  0x56d42c99, 0xa1f41392, 0x56c1b3a1, 0xa1e308e4, 0x56af3750, 0xa1d201d7,
-  0x569cb7a8, 0xa1c0fe6c,
-  0x568a34a9, 0xa1affea3, 0x5677ae54, 0xa19f027c, 0x566524aa, 0xa18e09fa,
-  0x565297ab, 0xa17d151b,
-  0x56400758, 0xa16c23e1, 0x562d73b2, 0xa15b364d, 0x561adcb9, 0xa14a4c5e,
-  0x5608426e, 0xa1396617,
-  0x55f5a4d2, 0xa1288376, 0x55e303e6, 0xa117a47e, 0x55d05faa, 0xa106c92f,
-  0x55bdb81f, 0xa0f5f189,
-  0x55ab0d46, 0xa0e51d8c, 0x55985f20, 0xa0d44d3b, 0x5585adad, 0xa0c38095,
-  0x5572f8ed, 0xa0b2b79b,
-  0x556040e2, 0xa0a1f24d, 0x554d858d, 0xa09130ad, 0x553ac6ee, 0xa08072ba,
-  0x55280505, 0xa06fb876,
-  0x55153fd4, 0xa05f01e1, 0x5502775c, 0xa04e4efc, 0x54efab9c, 0xa03d9fc8,
-  0x54dcdc96, 0xa02cf444,
-  0x54ca0a4b, 0xa01c4c73, 0x54b734ba, 0xa00ba853, 0x54a45be6, 0x9ffb07e7,
-  0x54917fce, 0x9fea6b2f,
-  0x547ea073, 0x9fd9d22a, 0x546bbdd7, 0x9fc93cdb, 0x5458d7f9, 0x9fb8ab41,
-  0x5445eedb, 0x9fa81d5e,
-  0x5433027d, 0x9f979331, 0x542012e1, 0x9f870cbc, 0x540d2005, 0x9f7689ff,
-  0x53fa29ed, 0x9f660afb,
-  0x53e73097, 0x9f558fb0, 0x53d43406, 0x9f45181f, 0x53c13439, 0x9f34a449,
-  0x53ae3131, 0x9f24342f,
-  0x539b2af0, 0x9f13c7d0, 0x53882175, 0x9f035f2e, 0x537514c2, 0x9ef2fa49,
-  0x536204d7, 0x9ee29922,
-  0x534ef1b5, 0x9ed23bb9, 0x533bdb5d, 0x9ec1e210, 0x5328c1d0, 0x9eb18c26,
-  0x5315a50e, 0x9ea139fd,
-  0x53028518, 0x9e90eb94, 0x52ef61ee, 0x9e80a0ee, 0x52dc3b92, 0x9e705a09,
-  0x52c91204, 0x9e6016e8,
-  0x52b5e546, 0x9e4fd78a, 0x52a2b556, 0x9e3f9bf0, 0x528f8238, 0x9e2f641b,
-  0x527c4bea, 0x9e1f300b,
-  0x5269126e, 0x9e0effc1, 0x5255d5c5, 0x9dfed33e, 0x524295f0, 0x9deeaa82,
-  0x522f52ee, 0x9dde858e,
-  0x521c0cc2, 0x9dce6463, 0x5208c36a, 0x9dbe4701, 0x51f576ea, 0x9dae2d68,
-  0x51e22740, 0x9d9e179a,
-  0x51ced46e, 0x9d8e0597, 0x51bb7e75, 0x9d7df75f, 0x51a82555, 0x9d6decf4,
-  0x5194c910, 0x9d5de656,
-  0x518169a5, 0x9d4de385, 0x516e0715, 0x9d3de482, 0x515aa162, 0x9d2de94d,
-  0x5147388c, 0x9d1df1e9,
-  0x5133cc94, 0x9d0dfe54, 0x51205d7b, 0x9cfe0e8f, 0x510ceb40, 0x9cee229c,
-  0x50f975e6, 0x9cde3a7b,
-  0x50e5fd6d, 0x9cce562c, 0x50d281d5, 0x9cbe75b0, 0x50bf031f, 0x9cae9907,
-  0x50ab814d, 0x9c9ec033,
-  0x5097fc5e, 0x9c8eeb34, 0x50847454, 0x9c7f1a0a, 0x5070e92f, 0x9c6f4cb6,
-  0x505d5af1, 0x9c5f8339,
-  0x5049c999, 0x9c4fbd93, 0x50363529, 0x9c3ffbc5, 0x50229da1, 0x9c303dcf,
-  0x500f0302, 0x9c2083b3,
-  0x4ffb654d, 0x9c10cd70, 0x4fe7c483, 0x9c011b08, 0x4fd420a4, 0x9bf16c7a,
-  0x4fc079b1, 0x9be1c1c8,
-  0x4faccfab, 0x9bd21af3, 0x4f992293, 0x9bc277fa, 0x4f857269, 0x9bb2d8de,
-  0x4f71bf2e, 0x9ba33da0,
-  0x4f5e08e3, 0x9b93a641, 0x4f4a4f89, 0x9b8412c1, 0x4f369320, 0x9b748320,
-  0x4f22d3aa, 0x9b64f760,
-  0x4f0f1126, 0x9b556f81, 0x4efb4b96, 0x9b45eb83, 0x4ee782fb, 0x9b366b68,
-  0x4ed3b755, 0x9b26ef2f,
-  0x4ebfe8a5, 0x9b1776da, 0x4eac16eb, 0x9b080268, 0x4e984229, 0x9af891db,
-  0x4e846a60, 0x9ae92533,
-  0x4e708f8f, 0x9ad9bc71, 0x4e5cb1b9, 0x9aca5795, 0x4e48d0dd, 0x9abaf6a1,
-  0x4e34ecfc, 0x9aab9993,
-  0x4e210617, 0x9a9c406e, 0x4e0d1c30, 0x9a8ceb31, 0x4df92f46, 0x9a7d99de,
-  0x4de53f5a, 0x9a6e4c74,
-  0x4dd14c6e, 0x9a5f02f5, 0x4dbd5682, 0x9a4fbd61, 0x4da95d96, 0x9a407bb9,
-  0x4d9561ac, 0x9a313dfc,
-  0x4d8162c4, 0x9a22042d, 0x4d6d60df, 0x9a12ce4b, 0x4d595bfe, 0x9a039c57,
-  0x4d455422, 0x99f46e51,
-  0x4d31494b, 0x99e5443b, 0x4d1d3b7a, 0x99d61e14, 0x4d092ab0, 0x99c6fbde,
-  0x4cf516ee, 0x99b7dd99,
-  0x4ce10034, 0x99a8c345, 0x4ccce684, 0x9999ace3, 0x4cb8c9dd, 0x998a9a74,
-  0x4ca4aa41, 0x997b8bf8,
-  0x4c9087b1, 0x996c816f, 0x4c7c622d, 0x995d7adc, 0x4c6839b7, 0x994e783d,
-  0x4c540e4e, 0x993f7993,
-  0x4c3fdff4, 0x99307ee0, 0x4c2baea9, 0x99218824, 0x4c177a6e, 0x9912955f,
-  0x4c034345, 0x9903a691,
-  0x4bef092d, 0x98f4bbbc, 0x4bdacc28, 0x98e5d4e0, 0x4bc68c36, 0x98d6f1fe,
-  0x4bb24958, 0x98c81316,
-  0x4b9e0390, 0x98b93828, 0x4b89badd, 0x98aa6136, 0x4b756f40, 0x989b8e40,
-  0x4b6120bb, 0x988cbf46,
-  0x4b4ccf4d, 0x987df449, 0x4b387af9, 0x986f2d4a, 0x4b2423be, 0x98606a49,
-  0x4b0fc99d, 0x9851ab46,
-  0x4afb6c98, 0x9842f043, 0x4ae70caf, 0x98343940, 0x4ad2a9e2, 0x9825863d,
-  0x4abe4433, 0x9816d73b,
-  0x4aa9dba2, 0x98082c3b, 0x4a957030, 0x97f9853d, 0x4a8101de, 0x97eae242,
-  0x4a6c90ad, 0x97dc4349,
-  0x4a581c9e, 0x97cda855, 0x4a43a5b0, 0x97bf1165, 0x4a2f2be6, 0x97b07e7a,
-  0x4a1aaf3f, 0x97a1ef94,
-  0x4a062fbd, 0x979364b5, 0x49f1ad61, 0x9784dddc, 0x49dd282a, 0x97765b0a,
-  0x49c8a01b, 0x9767dc41,
-  0x49b41533, 0x9759617f, 0x499f8774, 0x974aeac6, 0x498af6df, 0x973c7817,
-  0x49766373, 0x972e0971,
-  0x4961cd33, 0x971f9ed7, 0x494d341e, 0x97113847, 0x49389836, 0x9702d5c3,
-  0x4923f97b, 0x96f4774b,
-  0x490f57ee, 0x96e61ce0, 0x48fab391, 0x96d7c682, 0x48e60c62, 0x96c97432,
-  0x48d16265, 0x96bb25f0,
-  0x48bcb599, 0x96acdbbe, 0x48a805ff, 0x969e959b, 0x48935397, 0x96905388,
-  0x487e9e64, 0x96821585,
-  0x4869e665, 0x9673db94, 0x48552b9b, 0x9665a5b4, 0x48406e08, 0x965773e7,
-  0x482badab, 0x9649462d,
-  0x4816ea86, 0x963b1c86, 0x48022499, 0x962cf6f2, 0x47ed5be6, 0x961ed574,
-  0x47d8906d, 0x9610b80a,
-  0x47c3c22f, 0x96029eb6, 0x47aef12c, 0x95f48977, 0x479a1d67, 0x95e67850,
-  0x478546de, 0x95d86b3f,
-  0x47706d93, 0x95ca6247, 0x475b9188, 0x95bc5d66, 0x4746b2bc, 0x95ae5c9f,
-  0x4731d131, 0x95a05ff0,
-  0x471cece7, 0x9592675c, 0x470805df, 0x958472e2, 0x46f31c1a, 0x95768283,
-  0x46de2f99, 0x9568963f,
-  0x46c9405c, 0x955aae17, 0x46b44e65, 0x954cca0c, 0x469f59b4, 0x953eea1e,
-  0x468a624a, 0x95310e4e,
-  0x46756828, 0x9523369c, 0x46606b4e, 0x95156308, 0x464b6bbe, 0x95079394,
-  0x46366978, 0x94f9c83f,
-  0x4621647d, 0x94ec010b, 0x460c5cce, 0x94de3df8, 0x45f7526b, 0x94d07f05,
-  0x45e24556, 0x94c2c435,
-  0x45cd358f, 0x94b50d87, 0x45b82318, 0x94a75afd, 0x45a30df0, 0x9499ac95,
-  0x458df619, 0x948c0252,
-  0x4578db93, 0x947e5c33, 0x4563be60, 0x9470ba39, 0x454e9e80, 0x94631c65,
-  0x45397bf4, 0x945582b7,
-  0x452456bd, 0x9447ed2f, 0x450f2edb, 0x943a5bcf, 0x44fa0450, 0x942cce96,
-  0x44e4d71c, 0x941f4585,
-  0x44cfa740, 0x9411c09e, 0x44ba74bd, 0x94043fdf, 0x44a53f93, 0x93f6c34a,
-  0x449007c4, 0x93e94adf,
-  0x447acd50, 0x93dbd6a0, 0x44659039, 0x93ce668b, 0x4450507e, 0x93c0faa3,
-  0x443b0e21, 0x93b392e6,
-  0x4425c923, 0x93a62f57, 0x44108184, 0x9398cff5, 0x43fb3746, 0x938b74c1,
-  0x43e5ea68, 0x937e1dbb,
-  0x43d09aed, 0x9370cae4, 0x43bb48d4, 0x93637c3d, 0x43a5f41e, 0x935631c5,
-  0x43909ccd, 0x9348eb7e,
-  0x437b42e1, 0x933ba968, 0x4365e65b, 0x932e6b84, 0x4350873c, 0x932131d1,
-  0x433b2585, 0x9313fc51,
-  0x4325c135, 0x9306cb04, 0x43105a50, 0x92f99deb, 0x42faf0d4, 0x92ec7505,
-  0x42e584c3, 0x92df5054,
-  0x42d0161e, 0x92d22fd9, 0x42baa4e6, 0x92c51392, 0x42a5311b, 0x92b7fb82,
-  0x428fbabe, 0x92aae7a8,
-  0x427a41d0, 0x929dd806, 0x4264c653, 0x9290cc9b, 0x424f4845, 0x9283c568,
-  0x4239c7aa, 0x9276c26d,
-  0x42244481, 0x9269c3ac, 0x420ebecb, 0x925cc924, 0x41f93689, 0x924fd2d7,
-  0x41e3abbc, 0x9242e0c4,
-  0x41ce1e65, 0x9235f2ec, 0x41b88e84, 0x9229094f, 0x41a2fc1a, 0x921c23ef,
-  0x418d6729, 0x920f42cb,
-  0x4177cfb1, 0x920265e4, 0x416235b2, 0x91f58d3b, 0x414c992f, 0x91e8b8d0,
-  0x4136fa27, 0x91dbe8a4,
-  0x4121589b, 0x91cf1cb6, 0x410bb48c, 0x91c25508, 0x40f60dfb, 0x91b5919a,
-  0x40e064ea, 0x91a8d26d,
-  0x40cab958, 0x919c1781, 0x40b50b46, 0x918f60d6, 0x409f5ab6, 0x9182ae6d,
-  0x4089a7a8, 0x91760047,
-  0x4073f21d, 0x91695663, 0x405e3a16, 0x915cb0c3, 0x40487f94, 0x91500f67,
-  0x4032c297, 0x91437250,
-  0x401d0321, 0x9136d97d, 0x40074132, 0x912a44f0, 0x3ff17cca, 0x911db4a9,
-  0x3fdbb5ec, 0x911128a8,
-  0x3fc5ec98, 0x9104a0ee, 0x3fb020ce, 0x90f81d7b, 0x3f9a5290, 0x90eb9e50,
-  0x3f8481dd, 0x90df236e,
-  0x3f6eaeb8, 0x90d2acd4, 0x3f58d921, 0x90c63a83, 0x3f430119, 0x90b9cc7d,
-  0x3f2d26a0, 0x90ad62c0,
-  0x3f1749b8, 0x90a0fd4e, 0x3f016a61, 0x90949c28, 0x3eeb889c, 0x90883f4d,
-  0x3ed5a46b, 0x907be6be,
-  0x3ebfbdcd, 0x906f927c, 0x3ea9d4c3, 0x90634287, 0x3e93e950, 0x9056f6df,
-  0x3e7dfb73, 0x904aaf86,
-  0x3e680b2c, 0x903e6c7b, 0x3e52187f, 0x90322dbf, 0x3e3c2369, 0x9025f352,
-  0x3e262bee, 0x9019bd36,
-  0x3e10320d, 0x900d8b69, 0x3dfa35c8, 0x90015dee, 0x3de4371f, 0x8ff534c4,
-  0x3dce3614, 0x8fe90fec,
-  0x3db832a6, 0x8fdcef66, 0x3da22cd7, 0x8fd0d333, 0x3d8c24a8, 0x8fc4bb53,
-  0x3d761a19, 0x8fb8a7c7,
-  0x3d600d2c, 0x8fac988f, 0x3d49fde1, 0x8fa08dab, 0x3d33ec39, 0x8f94871d,
-  0x3d1dd835, 0x8f8884e4,
-  0x3d07c1d6, 0x8f7c8701, 0x3cf1a91c, 0x8f708d75, 0x3cdb8e09, 0x8f649840,
-  0x3cc5709e, 0x8f58a761,
-  0x3caf50da, 0x8f4cbadb, 0x3c992ec0, 0x8f40d2ad, 0x3c830a50, 0x8f34eed8,
-  0x3c6ce38a, 0x8f290f5c,
-  0x3c56ba70, 0x8f1d343a, 0x3c408f03, 0x8f115d72, 0x3c2a6142, 0x8f058b04,
-  0x3c143130, 0x8ef9bcf2,
-  0x3bfdfecd, 0x8eedf33b, 0x3be7ca1a, 0x8ee22de0, 0x3bd19318, 0x8ed66ce1,
-  0x3bbb59c7, 0x8ecab040,
-  0x3ba51e29, 0x8ebef7fb, 0x3b8ee03e, 0x8eb34415, 0x3b78a007, 0x8ea7948c,
-  0x3b625d86, 0x8e9be963,
-  0x3b4c18ba, 0x8e904298, 0x3b35d1a5, 0x8e84a02d, 0x3b1f8848, 0x8e790222,
-  0x3b093ca3, 0x8e6d6877,
-  0x3af2eeb7, 0x8e61d32e, 0x3adc9e86, 0x8e564246, 0x3ac64c0f, 0x8e4ab5bf,
-  0x3aaff755, 0x8e3f2d9b,
-  0x3a99a057, 0x8e33a9da, 0x3a834717, 0x8e282a7b, 0x3a6ceb96, 0x8e1caf80,
-  0x3a568dd4, 0x8e1138ea,
-  0x3a402dd2, 0x8e05c6b7, 0x3a29cb91, 0x8dfa58ea, 0x3a136712, 0x8deeef82,
-  0x39fd0056, 0x8de38a80,
-  0x39e6975e, 0x8dd829e4, 0x39d02c2a, 0x8dcccdaf, 0x39b9bebc, 0x8dc175e0,
-  0x39a34f13, 0x8db6227a,
-  0x398cdd32, 0x8daad37b, 0x39766919, 0x8d9f88e5, 0x395ff2c9, 0x8d9442b8,
-  0x39497a43, 0x8d8900f3,
-  0x3932ff87, 0x8d7dc399, 0x391c8297, 0x8d728aa9, 0x39060373, 0x8d675623,
-  0x38ef821c, 0x8d5c2609,
-  0x38d8fe93, 0x8d50fa59, 0x38c278d9, 0x8d45d316, 0x38abf0ef, 0x8d3ab03f,
-  0x389566d6, 0x8d2f91d5,
-  0x387eda8e, 0x8d2477d8, 0x38684c19, 0x8d196249, 0x3851bb77, 0x8d0e5127,
-  0x383b28a9, 0x8d034474,
-  0x382493b0, 0x8cf83c30, 0x380dfc8d, 0x8ced385b, 0x37f76341, 0x8ce238f6,
-  0x37e0c7cc, 0x8cd73e01,
-  0x37ca2a30, 0x8ccc477d, 0x37b38a6d, 0x8cc1556a, 0x379ce885, 0x8cb667c8,
-  0x37864477, 0x8cab7e98,
-  0x376f9e46, 0x8ca099da, 0x3758f5f2, 0x8c95b98f, 0x37424b7b, 0x8c8addb7,
-  0x372b9ee3, 0x8c800652,
-  0x3714f02a, 0x8c753362, 0x36fe3f52, 0x8c6a64e5, 0x36e78c5b, 0x8c5f9ade,
-  0x36d0d746, 0x8c54d54c,
-  0x36ba2014, 0x8c4a142f, 0x36a366c6, 0x8c3f5788, 0x368cab5c, 0x8c349f58,
-  0x3675edd9, 0x8c29eb9f,
-  0x365f2e3b, 0x8c1f3c5d, 0x36486c86, 0x8c149192, 0x3631a8b8, 0x8c09eb40,
-  0x361ae2d3, 0x8bff4966,
-  0x36041ad9, 0x8bf4ac05, 0x35ed50c9, 0x8bea131e, 0x35d684a6, 0x8bdf7eb0,
-  0x35bfb66e, 0x8bd4eebc,
-  0x35a8e625, 0x8bca6343, 0x359213c9, 0x8bbfdc44, 0x357b3f5d, 0x8bb559c1,
-  0x356468e2, 0x8baadbba,
-  0x354d9057, 0x8ba0622f, 0x3536b5be, 0x8b95ed21, 0x351fd918, 0x8b8b7c8f,
-  0x3508fa66, 0x8b81107b,
-  0x34f219a8, 0x8b76a8e4, 0x34db36df, 0x8b6c45cc, 0x34c4520d, 0x8b61e733,
-  0x34ad6b32, 0x8b578d18,
-  0x34968250, 0x8b4d377c, 0x347f9766, 0x8b42e661, 0x3468aa76, 0x8b3899c6,
-  0x3451bb81, 0x8b2e51ab,
-  0x343aca87, 0x8b240e11, 0x3423d78a, 0x8b19cef8, 0x340ce28b, 0x8b0f9462,
-  0x33f5eb89, 0x8b055e4d,
-  0x33def287, 0x8afb2cbb, 0x33c7f785, 0x8af0ffac, 0x33b0fa84, 0x8ae6d720,
-  0x3399fb85, 0x8adcb318,
-  0x3382fa88, 0x8ad29394, 0x336bf78f, 0x8ac87894, 0x3354f29b, 0x8abe6219,
-  0x333debab, 0x8ab45024,
-  0x3326e2c3, 0x8aaa42b4, 0x330fd7e1, 0x8aa039cb, 0x32f8cb07, 0x8a963567,
-  0x32e1bc36, 0x8a8c358b,
-  0x32caab6f, 0x8a823a36, 0x32b398b3, 0x8a784368, 0x329c8402, 0x8a6e5123,
-  0x32856d5e, 0x8a646365,
-  0x326e54c7, 0x8a5a7a31, 0x32573a3f, 0x8a509585, 0x32401dc6, 0x8a46b564,
-  0x3228ff5c, 0x8a3cd9cc,
-  0x3211df04, 0x8a3302be, 0x31fabcbd, 0x8a29303b, 0x31e39889, 0x8a1f6243,
-  0x31cc7269, 0x8a1598d6,
-  0x31b54a5e, 0x8a0bd3f5, 0x319e2067, 0x8a0213a0, 0x3186f487, 0x89f857d8,
-  0x316fc6be, 0x89eea09d,
-  0x3158970e, 0x89e4edef, 0x31416576, 0x89db3fcf, 0x312a31f8, 0x89d1963c,
-  0x3112fc95, 0x89c7f138,
-  0x30fbc54d, 0x89be50c3, 0x30e48c22, 0x89b4b4dd, 0x30cd5115, 0x89ab1d87,
-  0x30b61426, 0x89a18ac0,
-  0x309ed556, 0x8997fc8a, 0x308794a6, 0x898e72e4, 0x30705217, 0x8984edcf,
-  0x30590dab, 0x897b6d4c,
-  0x3041c761, 0x8971f15a, 0x302a7f3a, 0x896879fb, 0x30133539, 0x895f072e,
-  0x2ffbe95d, 0x895598f3,
-  0x2fe49ba7, 0x894c2f4c, 0x2fcd4c19, 0x8942ca39, 0x2fb5fab2, 0x893969b9,
-  0x2f9ea775, 0x89300dce,
-  0x2f875262, 0x8926b677, 0x2f6ffb7a, 0x891d63b5, 0x2f58a2be, 0x89141589,
-  0x2f41482e, 0x890acbf2,
-  0x2f29ebcc, 0x890186f2, 0x2f128d99, 0x88f84687, 0x2efb2d95, 0x88ef0ab4,
-  0x2ee3cbc1, 0x88e5d378,
-  0x2ecc681e, 0x88dca0d3, 0x2eb502ae, 0x88d372c6, 0x2e9d9b70, 0x88ca4951,
-  0x2e863267, 0x88c12475,
-  0x2e6ec792, 0x88b80432, 0x2e575af3, 0x88aee888, 0x2e3fec8b, 0x88a5d177,
-  0x2e287c5a, 0x889cbf01,
-  0x2e110a62, 0x8893b125, 0x2df996a3, 0x888aa7e3, 0x2de2211e, 0x8881a33d,
-  0x2dcaa9d5, 0x8878a332,
-  0x2db330c7, 0x886fa7c2, 0x2d9bb5f6, 0x8866b0ef, 0x2d843964, 0x885dbeb8,
-  0x2d6cbb10, 0x8854d11e,
-  0x2d553afc, 0x884be821, 0x2d3db928, 0x884303c1, 0x2d263596, 0x883a23ff,
-  0x2d0eb046, 0x883148db,
-  0x2cf72939, 0x88287256, 0x2cdfa071, 0x881fa06f, 0x2cc815ee, 0x8816d327,
-  0x2cb089b1, 0x880e0a7f,
-  0x2c98fbba, 0x88054677, 0x2c816c0c, 0x87fc870f, 0x2c69daa6, 0x87f3cc48,
-  0x2c52478a, 0x87eb1621,
-  0x2c3ab2b9, 0x87e2649b, 0x2c231c33, 0x87d9b7b7, 0x2c0b83fa, 0x87d10f75,
-  0x2bf3ea0d, 0x87c86bd5,
-  0x2bdc4e6f, 0x87bfccd7, 0x2bc4b120, 0x87b7327d, 0x2bad1221, 0x87ae9cc5,
-  0x2b957173, 0x87a60bb1,
-  0x2b7dcf17, 0x879d7f41, 0x2b662b0e, 0x8794f774, 0x2b4e8558, 0x878c744d,
-  0x2b36ddf7, 0x8783f5ca,
-  0x2b1f34eb, 0x877b7bec, 0x2b078a36, 0x877306b4, 0x2aefddd8, 0x876a9621,
-  0x2ad82fd2, 0x87622a35,
-  0x2ac08026, 0x8759c2ef, 0x2aa8ced3, 0x87516050, 0x2a911bdc, 0x87490258,
-  0x2a796740, 0x8740a907,
-  0x2a61b101, 0x8738545e, 0x2a49f920, 0x8730045d, 0x2a323f9e, 0x8727b905,
-  0x2a1a847b, 0x871f7255,
-  0x2a02c7b8, 0x8717304e, 0x29eb0957, 0x870ef2f1, 0x29d34958, 0x8706ba3d,
-  0x29bb87bc, 0x86fe8633,
-  0x29a3c485, 0x86f656d3, 0x298bffb2, 0x86ee2c1e, 0x29743946, 0x86e60614,
-  0x295c7140, 0x86dde4b5,
-  0x2944a7a2, 0x86d5c802, 0x292cdc6d, 0x86cdaffa, 0x29150fa1, 0x86c59c9f,
-  0x28fd4140, 0x86bd8df0,
-  0x28e5714b, 0x86b583ee, 0x28cd9fc1, 0x86ad7e99, 0x28b5cca5, 0x86a57df2,
-  0x289df7f8, 0x869d81f8,
-  0x288621b9, 0x86958aac, 0x286e49ea, 0x868d980e, 0x2856708d, 0x8685aa20,
-  0x283e95a1, 0x867dc0e0,
-  0x2826b928, 0x8675dc4f, 0x280edb23, 0x866dfc6e, 0x27f6fb92, 0x8666213c,
-  0x27df1a77, 0x865e4abb,
-  0x27c737d3, 0x865678eb, 0x27af53a6, 0x864eabcb, 0x27976df1, 0x8646e35c,
-  0x277f86b5, 0x863f1f9e,
-  0x27679df4, 0x86376092, 0x274fb3ae, 0x862fa638, 0x2737c7e3, 0x8627f091,
-  0x271fda96, 0x86203f9c,
-  0x2707ebc7, 0x86189359, 0x26effb76, 0x8610ebca, 0x26d809a5, 0x860948ef,
-  0x26c01655, 0x8601aac7,
-  0x26a82186, 0x85fa1153, 0x26902b39, 0x85f27c93, 0x26783370, 0x85eaec88,
-  0x26603a2c, 0x85e36132,
-  0x26483f6c, 0x85dbda91, 0x26304333, 0x85d458a6, 0x26184581, 0x85ccdb70,
-  0x26004657, 0x85c562f1,
-  0x25e845b6, 0x85bdef28, 0x25d0439f, 0x85b68015, 0x25b84012, 0x85af15b9,
-  0x25a03b11, 0x85a7b015,
-  0x2588349d, 0x85a04f28, 0x25702cb7, 0x8598f2f3, 0x2558235f, 0x85919b76,
-  0x25401896, 0x858a48b1,
-  0x25280c5e, 0x8582faa5, 0x250ffeb7, 0x857bb152, 0x24f7efa2, 0x85746cb8,
-  0x24dfdf20, 0x856d2cd7,
-  0x24c7cd33, 0x8565f1b0, 0x24afb9da, 0x855ebb44, 0x2497a517, 0x85578991,
-  0x247f8eec, 0x85505c99,
-  0x24677758, 0x8549345c, 0x244f5e5c, 0x854210db, 0x243743fa, 0x853af214,
-  0x241f2833, 0x8533d809,
-  0x24070b08, 0x852cc2bb, 0x23eeec78, 0x8525b228, 0x23d6cc87, 0x851ea652,
-  0x23beab33, 0x85179f39,
-  0x23a6887f, 0x85109cdd, 0x238e646a, 0x85099f3e, 0x23763ef7, 0x8502a65c,
-  0x235e1826, 0x84fbb239,
-  0x2345eff8, 0x84f4c2d4, 0x232dc66d, 0x84edd82d, 0x23159b88, 0x84e6f244,
-  0x22fd6f48, 0x84e0111b,
-  0x22e541af, 0x84d934b1, 0x22cd12bd, 0x84d25d06, 0x22b4e274, 0x84cb8a1b,
-  0x229cb0d5, 0x84c4bbf0,
-  0x22847de0, 0x84bdf286, 0x226c4996, 0x84b72ddb, 0x225413f8, 0x84b06df2,
-  0x223bdd08, 0x84a9b2ca,
-  0x2223a4c5, 0x84a2fc62, 0x220b6b32, 0x849c4abd, 0x21f3304f, 0x84959dd9,
-  0x21daf41d, 0x848ef5b7,
-  0x21c2b69c, 0x84885258, 0x21aa77cf, 0x8481b3bb, 0x219237b5, 0x847b19e1,
-  0x2179f64f, 0x847484ca,
-  0x2161b3a0, 0x846df477, 0x21496fa7, 0x846768e7, 0x21312a65, 0x8460e21a,
-  0x2118e3dc, 0x845a6012,
-  0x21009c0c, 0x8453e2cf, 0x20e852f6, 0x844d6a50, 0x20d0089c, 0x8446f695,
-  0x20b7bcfe, 0x844087a0,
-  0x209f701c, 0x843a1d70, 0x208721f9, 0x8433b806, 0x206ed295, 0x842d5762,
-  0x205681f1, 0x8426fb84,
-  0x203e300d, 0x8420a46c, 0x2025dcec, 0x841a521a, 0x200d888d, 0x84140490,
-  0x1ff532f2, 0x840dbbcc,
-  0x1fdcdc1b, 0x840777d0, 0x1fc4840a, 0x8401389b, 0x1fac2abf, 0x83fafe2e,
-  0x1f93d03c, 0x83f4c889,
-  0x1f7b7481, 0x83ee97ad, 0x1f63178f, 0x83e86b99, 0x1f4ab968, 0x83e2444d,
-  0x1f325a0b, 0x83dc21cb,
-  0x1f19f97b, 0x83d60412, 0x1f0197b8, 0x83cfeb22, 0x1ee934c3, 0x83c9d6fc,
-  0x1ed0d09d, 0x83c3c7a0,
-  0x1eb86b46, 0x83bdbd0e, 0x1ea004c1, 0x83b7b746, 0x1e879d0d, 0x83b1b649,
-  0x1e6f342c, 0x83abba17,
-  0x1e56ca1e, 0x83a5c2b0, 0x1e3e5ee5, 0x839fd014, 0x1e25f282, 0x8399e244,
-  0x1e0d84f5, 0x8393f940,
-  0x1df5163f, 0x838e1507, 0x1ddca662, 0x8388359b, 0x1dc4355e, 0x83825afb,
-  0x1dabc334, 0x837c8528,
-  0x1d934fe5, 0x8376b422, 0x1d7adb73, 0x8370e7e9, 0x1d6265dd, 0x836b207d,
-  0x1d49ef26, 0x83655ddf,
-  0x1d31774d, 0x835fa00f, 0x1d18fe54, 0x8359e70d, 0x1d00843d, 0x835432d8,
-  0x1ce80906, 0x834e8373,
-  0x1ccf8cb3, 0x8348d8dc, 0x1cb70f43, 0x83433314, 0x1c9e90b8, 0x833d921b,
-  0x1c861113, 0x8337f5f1,
-  0x1c6d9053, 0x83325e97, 0x1c550e7c, 0x832ccc0d, 0x1c3c8b8c, 0x83273e52,
-  0x1c240786, 0x8321b568,
-  0x1c0b826a, 0x831c314e, 0x1bf2fc3a, 0x8316b205, 0x1bda74f6, 0x8311378d,
-  0x1bc1ec9e, 0x830bc1e6,
-  0x1ba96335, 0x83065110, 0x1b90d8bb, 0x8300e50b, 0x1b784d30, 0x82fb7dd8,
-  0x1b5fc097, 0x82f61b77,
-  0x1b4732ef, 0x82f0bde8, 0x1b2ea43a, 0x82eb652b, 0x1b161479, 0x82e61141,
-  0x1afd83ad, 0x82e0c22a,
-  0x1ae4f1d6, 0x82db77e5, 0x1acc5ef6, 0x82d63274, 0x1ab3cb0d, 0x82d0f1d5,
-  0x1a9b361d, 0x82cbb60b,
-  0x1a82a026, 0x82c67f14, 0x1a6a0929, 0x82c14cf1, 0x1a517128, 0x82bc1fa2,
-  0x1a38d823, 0x82b6f727,
-  0x1a203e1b, 0x82b1d381, 0x1a07a311, 0x82acb4b0, 0x19ef0707, 0x82a79ab3,
-  0x19d669fc, 0x82a2858c,
-  0x19bdcbf3, 0x829d753a, 0x19a52ceb, 0x829869be, 0x198c8ce7, 0x82936317,
-  0x1973ebe6, 0x828e6146,
-  0x195b49ea, 0x8289644b, 0x1942a6f3, 0x82846c26, 0x192a0304, 0x827f78d8,
-  0x19115e1c, 0x827a8a61,
-  0x18f8b83c, 0x8275a0c0, 0x18e01167, 0x8270bbf7, 0x18c7699b, 0x826bdc04,
-  0x18aec0db, 0x826700e9,
-  0x18961728, 0x82622aa6, 0x187d6c82, 0x825d593a, 0x1864c0ea, 0x82588ca7,
-  0x184c1461, 0x8253c4eb,
-  0x183366e9, 0x824f0208, 0x181ab881, 0x824a43fe, 0x1802092c, 0x82458acc,
-  0x17e958ea, 0x8240d673,
-  0x17d0a7bc, 0x823c26f3, 0x17b7f5a3, 0x82377c4c, 0x179f429f, 0x8232d67f,
-  0x17868eb3, 0x822e358b,
-  0x176dd9de, 0x82299971, 0x17552422, 0x82250232, 0x173c6d80, 0x82206fcc,
-  0x1723b5f9, 0x821be240,
-  0x170afd8d, 0x82175990, 0x16f2443e, 0x8212d5b9, 0x16d98a0c, 0x820e56be,
-  0x16c0cef9, 0x8209dc9e,
-  0x16a81305, 0x82056758, 0x168f5632, 0x8200f6ef, 0x1676987f, 0x81fc8b60,
-  0x165dd9f0, 0x81f824ae,
-  0x16451a83, 0x81f3c2d7, 0x162c5a3b, 0x81ef65dc, 0x16139918, 0x81eb0dbe,
-  0x15fad71b, 0x81e6ba7c,
-  0x15e21445, 0x81e26c16, 0x15c95097, 0x81de228d, 0x15b08c12, 0x81d9dde1,
-  0x1597c6b7, 0x81d59e13,
-  0x157f0086, 0x81d16321, 0x15663982, 0x81cd2d0c, 0x154d71aa, 0x81c8fbd6,
-  0x1534a901, 0x81c4cf7d,
-  0x151bdf86, 0x81c0a801, 0x1503153a, 0x81bc8564, 0x14ea4a1f, 0x81b867a5,
-  0x14d17e36, 0x81b44ec4,
-  0x14b8b17f, 0x81b03ac2, 0x149fe3fc, 0x81ac2b9e, 0x148715ae, 0x81a82159,
-  0x146e4694, 0x81a41bf4,
-  0x145576b1, 0x81a01b6d, 0x143ca605, 0x819c1fc5, 0x1423d492, 0x819828fd,
-  0x140b0258, 0x81943715,
-  0x13f22f58, 0x81904a0c, 0x13d95b93, 0x818c61e3, 0x13c0870a, 0x81887e9a,
-  0x13a7b1bf, 0x8184a032,
-  0x138edbb1, 0x8180c6a9, 0x137604e2, 0x817cf201, 0x135d2d53, 0x8179223a,
-  0x13445505, 0x81755754,
-  0x132b7bf9, 0x8171914e, 0x1312a230, 0x816dd02a, 0x12f9c7aa, 0x816a13e6,
-  0x12e0ec6a, 0x81665c84,
-  0x12c8106f, 0x8162aa04, 0x12af33ba, 0x815efc65, 0x1296564d, 0x815b53a8,
-  0x127d7829, 0x8157afcd,
-  0x1264994e, 0x815410d4, 0x124bb9be, 0x815076bd, 0x1232d979, 0x814ce188,
-  0x1219f880, 0x81495136,
-  0x120116d5, 0x8145c5c7, 0x11e83478, 0x81423f3a, 0x11cf516a, 0x813ebd90,
-  0x11b66dad, 0x813b40ca,
-  0x119d8941, 0x8137c8e6, 0x1184a427, 0x813455e6, 0x116bbe60, 0x8130e7c9,
-  0x1152d7ed, 0x812d7e8f,
-  0x1139f0cf, 0x812a1a3a, 0x11210907, 0x8126bac8, 0x11082096, 0x8123603a,
-  0x10ef377d, 0x81200a90,
-  0x10d64dbd, 0x811cb9ca, 0x10bd6356, 0x81196de9, 0x10a4784b, 0x811626ec,
-  0x108b8c9b, 0x8112e4d4,
-  0x1072a048, 0x810fa7a0, 0x1059b352, 0x810c6f52, 0x1040c5bb, 0x81093be8,
-  0x1027d784, 0x81060d63,
-  0x100ee8ad, 0x8102e3c4, 0xff5f938, 0x80ffbf0a, 0xfdd0926, 0x80fc9f35,
-  0xfc41876, 0x80f98446,
-  0xfab272b, 0x80f66e3c, 0xf923546, 0x80f35d19, 0xf7942c7, 0x80f050db,
-  0xf604faf, 0x80ed4984,
-  0xf475bff, 0x80ea4712, 0xf2e67b8, 0x80e74987, 0xf1572dc, 0x80e450e2,
-  0xefc7d6b, 0x80e15d24,
-  0xee38766, 0x80de6e4c, 0xeca90ce, 0x80db845b, 0xeb199a4, 0x80d89f51,
-  0xe98a1e9, 0x80d5bf2e,
-  0xe7fa99e, 0x80d2e3f2, 0xe66b0c3, 0x80d00d9d, 0xe4db75b, 0x80cd3c2f,
-  0xe34bd66, 0x80ca6fa9,
-  0xe1bc2e4, 0x80c7a80a, 0xe02c7d7, 0x80c4e553, 0xde9cc40, 0x80c22784,
-  0xdd0d01f, 0x80bf6e9c,
-  0xdb7d376, 0x80bcba9d, 0xd9ed646, 0x80ba0b85, 0xd85d88f, 0x80b76156,
-  0xd6cda53, 0x80b4bc0e,
-  0xd53db92, 0x80b21baf, 0xd3adc4e, 0x80af8039, 0xd21dc87, 0x80ace9ab,
-  0xd08dc3f, 0x80aa5806,
-  0xcefdb76, 0x80a7cb49, 0xcd6da2d, 0x80a54376, 0xcbdd865, 0x80a2c08b,
-  0xca4d620, 0x80a04289,
-  0xc8bd35e, 0x809dc971, 0xc72d020, 0x809b5541, 0xc59cc68, 0x8098e5fb,
-  0xc40c835, 0x80967b9f,
-  0xc27c389, 0x8094162c, 0xc0ebe66, 0x8091b5a2, 0xbf5b8cb, 0x808f5a02,
-  0xbdcb2bb, 0x808d034c,
-  0xbc3ac35, 0x808ab180, 0xbaaa53b, 0x8088649e, 0xb919dcf, 0x80861ca6,
-  0xb7895f0, 0x8083d998,
-  0xb5f8d9f, 0x80819b74, 0xb4684df, 0x807f623b, 0xb2d7baf, 0x807d2dec,
-  0xb147211, 0x807afe87,
-  0xafb6805, 0x8078d40d, 0xae25d8d, 0x8076ae7e, 0xac952aa, 0x80748dd9,
-  0xab0475c, 0x8072721f,
-  0xa973ba5, 0x80705b50, 0xa7e2f85, 0x806e496c, 0xa6522fe, 0x806c3c74,
-  0xa4c1610, 0x806a3466,
-  0xa3308bd, 0x80683143, 0xa19fb04, 0x8066330c, 0xa00ece8, 0x806439c0,
-  0x9e7de6a, 0x80624560,
-  0x9cecf89, 0x806055eb, 0x9b5c048, 0x805e6b62, 0x99cb0a7, 0x805c85c4,
-  0x983a0a7, 0x805aa512,
-  0x96a9049, 0x8058c94c, 0x9517f8f, 0x8056f272, 0x9386e78, 0x80552084,
-  0x91f5d06, 0x80535381,
-  0x9064b3a, 0x80518b6b, 0x8ed3916, 0x804fc841, 0x8d42699, 0x804e0a04,
-  0x8bb13c5, 0x804c50b2,
-  0x8a2009a, 0x804a9c4d, 0x888ed1b, 0x8048ecd5, 0x86fd947, 0x80474248,
-  0x856c520, 0x80459ca9,
-  0x83db0a7, 0x8043fbf6, 0x8249bdd, 0x80426030, 0x80b86c2, 0x8040c956,
-  0x7f27157, 0x803f376a,
-  0x7d95b9e, 0x803daa6a, 0x7c04598, 0x803c2257, 0x7a72f45, 0x803a9f31,
-  0x78e18a7, 0x803920f8,
-  0x77501be, 0x8037a7ac, 0x75bea8c, 0x8036334e, 0x742d311, 0x8034c3dd,
-  0x729bb4e, 0x80335959,
-  0x710a345, 0x8031f3c2, 0x6f78af6, 0x80309318, 0x6de7262, 0x802f375d,
-  0x6c5598a, 0x802de08e,
-  0x6ac406f, 0x802c8ead, 0x6932713, 0x802b41ba, 0x67a0d76, 0x8029f9b4,
-  0x660f398, 0x8028b69c,
-  0x647d97c, 0x80277872, 0x62ebf22, 0x80263f36, 0x615a48b, 0x80250ae7,
-  0x5fc89b8, 0x8023db86,
-  0x5e36ea9, 0x8022b114, 0x5ca5361, 0x80218b8f, 0x5b137df, 0x80206af8,
-  0x5981c26, 0x801f4f4f,
-  0x57f0035, 0x801e3895, 0x565e40d, 0x801d26c8, 0x54cc7b1, 0x801c19ea,
-  0x533ab20, 0x801b11fa,
-  0x51a8e5c, 0x801a0ef8, 0x5017165, 0x801910e4, 0x4e8543e, 0x801817bf,
-  0x4cf36e5, 0x80172388,
-  0x4b6195d, 0x80163440, 0x49cfba7, 0x801549e6, 0x483ddc3, 0x8014647b,
-  0x46abfb3, 0x801383fe,
-  0x451a177, 0x8012a86f, 0x4388310, 0x8011d1d0, 0x41f6480, 0x8011001f,
-  0x40645c7, 0x8010335c,
-  0x3ed26e6, 0x800f6b88, 0x3d407df, 0x800ea8a3, 0x3bae8b2, 0x800deaad,
-  0x3a1c960, 0x800d31a5,
-  0x388a9ea, 0x800c7d8c, 0x36f8a51, 0x800bce63, 0x3566a96, 0x800b2427,
-  0x33d4abb, 0x800a7edb,
-  0x3242abf, 0x8009de7e, 0x30b0aa4, 0x80094310, 0x2f1ea6c, 0x8008ac90,
-  0x2d8ca16, 0x80081b00,
-  0x2bfa9a4, 0x80078e5e, 0x2a68917, 0x800706ac, 0x28d6870, 0x800683e8,
-  0x27447b0, 0x80060614,
-  0x25b26d7, 0x80058d2f, 0x24205e8, 0x80051939, 0x228e4e2, 0x8004aa32,
-  0x20fc3c6, 0x8004401a,
-  0x1f6a297, 0x8003daf1, 0x1dd8154, 0x80037ab7, 0x1c45ffe, 0x80031f6d,
-  0x1ab3e97, 0x8002c912,
-  0x1921d20, 0x800277a6, 0x178fb99, 0x80022b29, 0x15fda03, 0x8001e39b,
-  0x146b860, 0x8001a0fd,
-  0x12d96b1, 0x8001634e, 0x11474f6, 0x80012a8e, 0xfb5330, 0x8000f6bd,
-  0xe23160, 0x8000c7dc,
-  0xc90f88, 0x80009dea, 0xafeda8, 0x800078e7, 0x96cbc1, 0x800058d4, 0x7da9d4,
-  0x80003daf,
-  0x6487e3, 0x8000277a, 0x4b65ee, 0x80001635, 0x3243f5, 0x800009df, 0x1921fb,
-  0x80000278,
-};
-
-static const q31_t WeightsQ31_8192[16384] = {
-  0x7fffffff, 0x0, 0x7fffffd9, 0xfff9b781, 0x7fffff62, 0xfff36f02, 0x7ffffe9d,
-    0xffed2684,
-  0x7ffffd88, 0xffe6de05, 0x7ffffc25, 0xffe09586, 0x7ffffa73, 0xffda4d08,
-    0x7ffff872, 0xffd40489,
-  0x7ffff621, 0xffcdbc0b, 0x7ffff382, 0xffc7738c, 0x7ffff094, 0xffc12b0e,
-    0x7fffed57, 0xffbae290,
-  0x7fffe9cb, 0xffb49a12, 0x7fffe5f0, 0xffae5195, 0x7fffe1c6, 0xffa80917,
-    0x7fffdd4d, 0xffa1c09a,
-  0x7fffd886, 0xff9b781d, 0x7fffd36f, 0xff952fa0, 0x7fffce09, 0xff8ee724,
-    0x7fffc854, 0xff889ea7,
-  0x7fffc251, 0xff82562c, 0x7fffbbfe, 0xff7c0db0, 0x7fffb55c, 0xff75c535,
-    0x7fffae6c, 0xff6f7cba,
-  0x7fffa72c, 0xff69343f, 0x7fff9f9e, 0xff62ebc5, 0x7fff97c1, 0xff5ca34b,
-    0x7fff8f94, 0xff565ad1,
-  0x7fff8719, 0xff501258, 0x7fff7e4f, 0xff49c9df, 0x7fff7536, 0xff438167,
-    0x7fff6bcd, 0xff3d38ef,
-  0x7fff6216, 0xff36f078, 0x7fff5810, 0xff30a801, 0x7fff4dbb, 0xff2a5f8b,
-    0x7fff4317, 0xff241715,
-  0x7fff3824, 0xff1dcea0, 0x7fff2ce2, 0xff17862b, 0x7fff2151, 0xff113db7,
-    0x7fff1572, 0xff0af543,
-  0x7fff0943, 0xff04acd0, 0x7ffefcc5, 0xfefe645e, 0x7ffeeff8, 0xfef81bec,
-    0x7ffee2dd, 0xfef1d37b,
-  0x7ffed572, 0xfeeb8b0a, 0x7ffec7b9, 0xfee5429a, 0x7ffeb9b0, 0xfedefa2b,
-    0x7ffeab59, 0xfed8b1bd,
-  0x7ffe9cb2, 0xfed2694f, 0x7ffe8dbd, 0xfecc20e2, 0x7ffe7e79, 0xfec5d876,
-    0x7ffe6ee5, 0xfebf900a,
-  0x7ffe5f03, 0xfeb947a0, 0x7ffe4ed2, 0xfeb2ff36, 0x7ffe3e52, 0xfeacb6cc,
-    0x7ffe2d83, 0xfea66e64,
-  0x7ffe1c65, 0xfea025fd, 0x7ffe0af8, 0xfe99dd96, 0x7ffdf93c, 0xfe939530,
-    0x7ffde731, 0xfe8d4ccb,
-  0x7ffdd4d7, 0xfe870467, 0x7ffdc22e, 0xfe80bc04, 0x7ffdaf37, 0xfe7a73a2,
-    0x7ffd9bf0, 0xfe742b41,
-  0x7ffd885a, 0xfe6de2e0, 0x7ffd7476, 0xfe679a81, 0x7ffd6042, 0xfe615223,
-    0x7ffd4bc0, 0xfe5b09c5,
-  0x7ffd36ee, 0xfe54c169, 0x7ffd21ce, 0xfe4e790d, 0x7ffd0c5f, 0xfe4830b3,
-    0x7ffcf6a0, 0xfe41e85a,
-  0x7ffce093, 0xfe3ba002, 0x7ffcca37, 0xfe3557ab, 0x7ffcb38c, 0xfe2f0f55,
-    0x7ffc9c92, 0xfe28c700,
-  0x7ffc8549, 0xfe227eac, 0x7ffc6db1, 0xfe1c365a, 0x7ffc55ca, 0xfe15ee09,
-    0x7ffc3d94, 0xfe0fa5b8,
-  0x7ffc250f, 0xfe095d69, 0x7ffc0c3b, 0xfe03151c, 0x7ffbf319, 0xfdfccccf,
-    0x7ffbd9a7, 0xfdf68484,
-  0x7ffbbfe6, 0xfdf03c3a, 0x7ffba5d7, 0xfde9f3f1, 0x7ffb8b78, 0xfde3aba9,
-    0x7ffb70cb, 0xfddd6363,
-  0x7ffb55ce, 0xfdd71b1e, 0x7ffb3a83, 0xfdd0d2db, 0x7ffb1ee9, 0xfdca8a99,
-    0x7ffb0300, 0xfdc44258,
-  0x7ffae6c7, 0xfdbdfa18, 0x7ffaca40, 0xfdb7b1da, 0x7ffaad6a, 0xfdb1699e,
-    0x7ffa9045, 0xfdab2162,
-  0x7ffa72d1, 0xfda4d929, 0x7ffa550e, 0xfd9e90f0, 0x7ffa36fc, 0xfd9848b9,
-    0x7ffa189c, 0xfd920084,
-  0x7ff9f9ec, 0xfd8bb850, 0x7ff9daed, 0xfd85701e, 0x7ff9bba0, 0xfd7f27ed,
-    0x7ff99c03, 0xfd78dfbd,
-  0x7ff97c18, 0xfd729790, 0x7ff95bdd, 0xfd6c4f64, 0x7ff93b54, 0xfd660739,
-    0x7ff91a7b, 0xfd5fbf10,
-  0x7ff8f954, 0xfd5976e9, 0x7ff8d7de, 0xfd532ec3, 0x7ff8b619, 0xfd4ce69f,
-    0x7ff89405, 0xfd469e7c,
-  0x7ff871a2, 0xfd40565c, 0x7ff84ef0, 0xfd3a0e3d, 0x7ff82bef, 0xfd33c61f,
-    0x7ff8089f, 0xfd2d7e04,
-  0x7ff7e500, 0xfd2735ea, 0x7ff7c113, 0xfd20edd2, 0x7ff79cd6, 0xfd1aa5bc,
-    0x7ff7784a, 0xfd145da7,
-  0x7ff75370, 0xfd0e1594, 0x7ff72e46, 0xfd07cd83, 0x7ff708ce, 0xfd018574,
-    0x7ff6e307, 0xfcfb3d67,
-  0x7ff6bcf0, 0xfcf4f55c, 0x7ff6968b, 0xfceead52, 0x7ff66fd7, 0xfce8654b,
-    0x7ff648d4, 0xfce21d45,
-  0x7ff62182, 0xfcdbd541, 0x7ff5f9e1, 0xfcd58d3f, 0x7ff5d1f1, 0xfccf453f,
-    0x7ff5a9b2, 0xfcc8fd41,
-  0x7ff58125, 0xfcc2b545, 0x7ff55848, 0xfcbc6d4c, 0x7ff52f1d, 0xfcb62554,
-    0x7ff505a2, 0xfcafdd5e,
-  0x7ff4dbd9, 0xfca9956a, 0x7ff4b1c0, 0xfca34d78, 0x7ff48759, 0xfc9d0588,
-    0x7ff45ca3, 0xfc96bd9b,
-  0x7ff4319d, 0xfc9075af, 0x7ff40649, 0xfc8a2dc6, 0x7ff3daa6, 0xfc83e5de,
-    0x7ff3aeb4, 0xfc7d9df9,
-  0x7ff38274, 0xfc775616, 0x7ff355e4, 0xfc710e36, 0x7ff32905, 0xfc6ac657,
-    0x7ff2fbd7, 0xfc647e7b,
-  0x7ff2ce5b, 0xfc5e36a0, 0x7ff2a08f, 0xfc57eec9, 0x7ff27275, 0xfc51a6f3,
-    0x7ff2440b, 0xfc4b5f20,
-  0x7ff21553, 0xfc45174e, 0x7ff1e64c, 0xfc3ecf80, 0x7ff1b6f6, 0xfc3887b3,
-    0x7ff18751, 0xfc323fe9,
-  0x7ff1575d, 0xfc2bf821, 0x7ff1271a, 0xfc25b05c, 0x7ff0f688, 0xfc1f6899,
-    0x7ff0c5a7, 0xfc1920d8,
-  0x7ff09478, 0xfc12d91a, 0x7ff062f9, 0xfc0c915e, 0x7ff0312c, 0xfc0649a5,
-    0x7fefff0f, 0xfc0001ee,
-  0x7fefcca4, 0xfbf9ba39, 0x7fef99ea, 0xfbf37287, 0x7fef66e1, 0xfbed2ad8,
-    0x7fef3388, 0xfbe6e32b,
-  0x7feeffe1, 0xfbe09b80, 0x7feecbec, 0xfbda53d8, 0x7fee97a7, 0xfbd40c33,
-    0x7fee6313, 0xfbcdc490,
-  0x7fee2e30, 0xfbc77cf0, 0x7fedf8ff, 0xfbc13552, 0x7fedc37e, 0xfbbaedb7,
-    0x7fed8daf, 0xfbb4a61f,
-  0x7fed5791, 0xfbae5e89, 0x7fed2123, 0xfba816f6, 0x7fecea67, 0xfba1cf66,
-    0x7fecb35c, 0xfb9b87d8,
-  0x7fec7c02, 0xfb95404d, 0x7fec4459, 0xfb8ef8c5, 0x7fec0c62, 0xfb88b13f,
-    0x7febd41b, 0xfb8269bd,
-  0x7feb9b85, 0xfb7c223d, 0x7feb62a1, 0xfb75dac0, 0x7feb296d, 0xfb6f9345,
-    0x7feaefeb, 0xfb694bce,
-  0x7feab61a, 0xfb630459, 0x7fea7bfa, 0xfb5cbce7, 0x7fea418b, 0xfb567578,
-    0x7fea06cd, 0xfb502e0c,
-  0x7fe9cbc0, 0xfb49e6a3, 0x7fe99064, 0xfb439f3c, 0x7fe954ba, 0xfb3d57d9,
-    0x7fe918c0, 0xfb371078,
-  0x7fe8dc78, 0xfb30c91b, 0x7fe89fe0, 0xfb2a81c0, 0x7fe862fa, 0xfb243a69,
-    0x7fe825c5, 0xfb1df314,
-  0x7fe7e841, 0xfb17abc2, 0x7fe7aa6e, 0xfb116474, 0x7fe76c4c, 0xfb0b1d28,
-    0x7fe72ddb, 0xfb04d5e0,
-  0x7fe6ef1c, 0xfafe8e9b, 0x7fe6b00d, 0xfaf84758, 0x7fe670b0, 0xfaf20019,
-    0x7fe63103, 0xfaebb8dd,
-  0x7fe5f108, 0xfae571a4, 0x7fe5b0be, 0xfadf2a6e, 0x7fe57025, 0xfad8e33c,
-    0x7fe52f3d, 0xfad29c0c,
-  0x7fe4ee06, 0xfacc54e0, 0x7fe4ac81, 0xfac60db7, 0x7fe46aac, 0xfabfc691,
-    0x7fe42889, 0xfab97f6e,
-  0x7fe3e616, 0xfab3384f, 0x7fe3a355, 0xfaacf133, 0x7fe36045, 0xfaa6aa1a,
-    0x7fe31ce6, 0xfaa06305,
-  0x7fe2d938, 0xfa9a1bf3, 0x7fe2953b, 0xfa93d4e4, 0x7fe250ef, 0xfa8d8dd8,
-    0x7fe20c55, 0xfa8746d0,
-  0x7fe1c76b, 0xfa80ffcb, 0x7fe18233, 0xfa7ab8ca, 0x7fe13cac, 0xfa7471cc,
-    0x7fe0f6d6, 0xfa6e2ad1,
-  0x7fe0b0b1, 0xfa67e3da, 0x7fe06a3d, 0xfa619ce7, 0x7fe0237a, 0xfa5b55f7,
-    0x7fdfdc69, 0xfa550f0a,
-  0x7fdf9508, 0xfa4ec821, 0x7fdf4d59, 0xfa48813b, 0x7fdf055a, 0xfa423a59,
-    0x7fdebd0d, 0xfa3bf37a,
-  0x7fde7471, 0xfa35ac9f, 0x7fde2b86, 0xfa2f65c8, 0x7fdde24d, 0xfa291ef4,
-    0x7fdd98c4, 0xfa22d823,
-  0x7fdd4eec, 0xfa1c9157, 0x7fdd04c6, 0xfa164a8e, 0x7fdcba51, 0xfa1003c8,
-    0x7fdc6f8d, 0xfa09bd06,
-  0x7fdc247a, 0xfa037648, 0x7fdbd918, 0xf9fd2f8e, 0x7fdb8d67, 0xf9f6e8d7,
-    0x7fdb4167, 0xf9f0a224,
-  0x7fdaf519, 0xf9ea5b75, 0x7fdaa87c, 0xf9e414ca, 0x7fda5b8f, 0xf9ddce22,
-    0x7fda0e54, 0xf9d7877e,
-  0x7fd9c0ca, 0xf9d140de, 0x7fd972f2, 0xf9cafa42, 0x7fd924ca, 0xf9c4b3a9,
-    0x7fd8d653, 0xf9be6d15,
-  0x7fd8878e, 0xf9b82684, 0x7fd8387a, 0xf9b1dff7, 0x7fd7e917, 0xf9ab996e,
-    0x7fd79965, 0xf9a552e9,
-  0x7fd74964, 0xf99f0c68, 0x7fd6f914, 0xf998c5ea, 0x7fd6a875, 0xf9927f71,
-    0x7fd65788, 0xf98c38fc,
-  0x7fd6064c, 0xf985f28a, 0x7fd5b4c1, 0xf97fac1d, 0x7fd562e7, 0xf97965b4,
-    0x7fd510be, 0xf9731f4e,
-  0x7fd4be46, 0xf96cd8ed, 0x7fd46b80, 0xf9669290, 0x7fd4186a, 0xf9604c37,
-    0x7fd3c506, 0xf95a05e2,
-  0x7fd37153, 0xf953bf91, 0x7fd31d51, 0xf94d7944, 0x7fd2c900, 0xf94732fb,
-    0x7fd27460, 0xf940ecb7,
-  0x7fd21f72, 0xf93aa676, 0x7fd1ca35, 0xf934603a, 0x7fd174a8, 0xf92e1a02,
-    0x7fd11ecd, 0xf927d3ce,
-  0x7fd0c8a3, 0xf9218d9e, 0x7fd0722b, 0xf91b4773, 0x7fd01b63, 0xf915014c,
-    0x7fcfc44d, 0xf90ebb29,
-  0x7fcf6ce8, 0xf908750a, 0x7fcf1533, 0xf9022ef0, 0x7fcebd31, 0xf8fbe8da,
-    0x7fce64df, 0xf8f5a2c9,
-  0x7fce0c3e, 0xf8ef5cbb, 0x7fcdb34f, 0xf8e916b2, 0x7fcd5a11, 0xf8e2d0ae,
-    0x7fcd0083, 0xf8dc8aae,
-  0x7fcca6a7, 0xf8d644b2, 0x7fcc4c7d, 0xf8cffebb, 0x7fcbf203, 0xf8c9b8c8,
-    0x7fcb973b, 0xf8c372d9,
-  0x7fcb3c23, 0xf8bd2cef, 0x7fcae0bd, 0xf8b6e70a, 0x7fca8508, 0xf8b0a129,
-    0x7fca2905, 0xf8aa5b4c,
-  0x7fc9ccb2, 0xf8a41574, 0x7fc97011, 0xf89dcfa1, 0x7fc91320, 0xf89789d2,
-    0x7fc8b5e1, 0xf8914407,
-  0x7fc85854, 0xf88afe42, 0x7fc7fa77, 0xf884b880, 0x7fc79c4b, 0xf87e72c4,
-    0x7fc73dd1, 0xf8782d0c,
-  0x7fc6df08, 0xf871e759, 0x7fc67ff0, 0xf86ba1aa, 0x7fc62089, 0xf8655c00,
-    0x7fc5c0d3, 0xf85f165b,
-  0x7fc560cf, 0xf858d0bb, 0x7fc5007c, 0xf8528b1f, 0x7fc49fda, 0xf84c4588,
-    0x7fc43ee9, 0xf845fff5,
-  0x7fc3dda9, 0xf83fba68, 0x7fc37c1b, 0xf83974df, 0x7fc31a3d, 0xf8332f5b,
-    0x7fc2b811, 0xf82ce9dc,
-  0x7fc25596, 0xf826a462, 0x7fc1f2cc, 0xf8205eec, 0x7fc18fb4, 0xf81a197b,
-    0x7fc12c4d, 0xf813d410,
-  0x7fc0c896, 0xf80d8ea9, 0x7fc06491, 0xf8074947, 0x7fc0003e, 0xf80103ea,
-    0x7fbf9b9b, 0xf7fabe92,
-  0x7fbf36aa, 0xf7f4793e, 0x7fbed16a, 0xf7ee33f0, 0x7fbe6bdb, 0xf7e7eea7,
-    0x7fbe05fd, 0xf7e1a963,
-  0x7fbd9fd0, 0xf7db6423, 0x7fbd3955, 0xf7d51ee9, 0x7fbcd28b, 0xf7ced9b4,
-    0x7fbc6b72, 0xf7c89484,
-  0x7fbc040a, 0xf7c24f59, 0x7fbb9c53, 0xf7bc0a33, 0x7fbb344e, 0xf7b5c512,
-    0x7fbacbfa, 0xf7af7ff6,
-  0x7fba6357, 0xf7a93ae0, 0x7fb9fa65, 0xf7a2f5ce, 0x7fb99125, 0xf79cb0c2,
-    0x7fb92796, 0xf7966bbb,
-  0x7fb8bdb8, 0xf79026b9, 0x7fb8538b, 0xf789e1bc, 0x7fb7e90f, 0xf7839cc4,
-    0x7fb77e45, 0xf77d57d2,
-  0x7fb7132b, 0xf77712e5, 0x7fb6a7c3, 0xf770cdfd, 0x7fb63c0d, 0xf76a891b,
-    0x7fb5d007, 0xf764443d,
-  0x7fb563b3, 0xf75dff66, 0x7fb4f710, 0xf757ba93, 0x7fb48a1e, 0xf75175c6,
-    0x7fb41cdd, 0xf74b30fe,
-  0x7fb3af4e, 0xf744ec3b, 0x7fb34170, 0xf73ea77e, 0x7fb2d343, 0xf73862c6,
-    0x7fb264c7, 0xf7321e14,
-  0x7fb1f5fc, 0xf72bd967, 0x7fb186e3, 0xf72594c0, 0x7fb1177b, 0xf71f501e,
-    0x7fb0a7c4, 0xf7190b81,
-  0x7fb037bf, 0xf712c6ea, 0x7fafc76a, 0xf70c8259, 0x7faf56c7, 0xf7063dcd,
-    0x7faee5d5, 0xf6fff946,
-  0x7fae7495, 0xf6f9b4c6, 0x7fae0305, 0xf6f3704a, 0x7fad9127, 0xf6ed2bd4,
-    0x7fad1efa, 0xf6e6e764,
-  0x7facac7f, 0xf6e0a2fa, 0x7fac39b4, 0xf6da5e95, 0x7fabc69b, 0xf6d41a36,
-    0x7fab5333, 0xf6cdd5dc,
-  0x7faadf7c, 0xf6c79188, 0x7faa6b77, 0xf6c14d3a, 0x7fa9f723, 0xf6bb08f1,
-    0x7fa98280, 0xf6b4c4ae,
-  0x7fa90d8e, 0xf6ae8071, 0x7fa8984e, 0xf6a83c3a, 0x7fa822bf, 0xf6a1f808,
-    0x7fa7ace1, 0xf69bb3dd,
-  0x7fa736b4, 0xf6956fb7, 0x7fa6c039, 0xf68f2b96, 0x7fa6496e, 0xf688e77c,
-    0x7fa5d256, 0xf682a367,
-  0x7fa55aee, 0xf67c5f59, 0x7fa4e338, 0xf6761b50, 0x7fa46b32, 0xf66fd74d,
-    0x7fa3f2df, 0xf6699350,
-  0x7fa37a3c, 0xf6634f59, 0x7fa3014b, 0xf65d0b68, 0x7fa2880b, 0xf656c77c,
-    0x7fa20e7c, 0xf6508397,
-  0x7fa1949e, 0xf64a3fb8, 0x7fa11a72, 0xf643fbdf, 0x7fa09ff7, 0xf63db80b,
-    0x7fa0252e, 0xf637743e,
-  0x7f9faa15, 0xf6313077, 0x7f9f2eae, 0xf62aecb5, 0x7f9eb2f8, 0xf624a8fa,
-    0x7f9e36f4, 0xf61e6545,
-  0x7f9dbaa0, 0xf6182196, 0x7f9d3dfe, 0xf611dded, 0x7f9cc10d, 0xf60b9a4b,
-    0x7f9c43ce, 0xf60556ae,
-  0x7f9bc640, 0xf5ff1318, 0x7f9b4863, 0xf5f8cf87, 0x7f9aca37, 0xf5f28bfd,
-    0x7f9a4bbd, 0xf5ec4879,
-  0x7f99ccf4, 0xf5e604fc, 0x7f994ddc, 0xf5dfc184, 0x7f98ce76, 0xf5d97e13,
-    0x7f984ec1, 0xf5d33aa8,
-  0x7f97cebd, 0xf5ccf743, 0x7f974e6a, 0xf5c6b3e5, 0x7f96cdc9, 0xf5c0708d,
-    0x7f964cd9, 0xf5ba2d3b,
-  0x7f95cb9a, 0xf5b3e9f0, 0x7f954a0d, 0xf5ada6ab, 0x7f94c831, 0xf5a7636c,
-    0x7f944606, 0xf5a12034,
-  0x7f93c38c, 0xf59add02, 0x7f9340c4, 0xf59499d6, 0x7f92bdad, 0xf58e56b1,
-    0x7f923a48, 0xf5881393,
-  0x7f91b694, 0xf581d07b, 0x7f913291, 0xf57b8d69, 0x7f90ae3f, 0xf5754a5e,
-    0x7f90299f, 0xf56f0759,
-  0x7f8fa4b0, 0xf568c45b, 0x7f8f1f72, 0xf5628163, 0x7f8e99e6, 0xf55c3e72,
-    0x7f8e140a, 0xf555fb88,
-  0x7f8d8de1, 0xf54fb8a4, 0x7f8d0768, 0xf54975c6, 0x7f8c80a1, 0xf54332ef,
-    0x7f8bf98b, 0xf53cf01f,
-  0x7f8b7227, 0xf536ad56, 0x7f8aea74, 0xf5306a93, 0x7f8a6272, 0xf52a27d7,
-    0x7f89da21, 0xf523e521,
-  0x7f895182, 0xf51da273, 0x7f88c894, 0xf5175fca, 0x7f883f58, 0xf5111d29,
-    0x7f87b5cd, 0xf50ada8f,
-  0x7f872bf3, 0xf50497fb, 0x7f86a1ca, 0xf4fe556e, 0x7f861753, 0xf4f812e7,
-    0x7f858c8d, 0xf4f1d068,
-  0x7f850179, 0xf4eb8def, 0x7f847616, 0xf4e54b7d, 0x7f83ea64, 0xf4df0912,
-    0x7f835e64, 0xf4d8c6ae,
-  0x7f82d214, 0xf4d28451, 0x7f824577, 0xf4cc41fb, 0x7f81b88a, 0xf4c5ffab,
-    0x7f812b4f, 0xf4bfbd63,
-  0x7f809dc5, 0xf4b97b21, 0x7f800fed, 0xf4b338e7, 0x7f7f81c6, 0xf4acf6b3,
-    0x7f7ef350, 0xf4a6b486,
-  0x7f7e648c, 0xf4a07261, 0x7f7dd579, 0xf49a3042, 0x7f7d4617, 0xf493ee2b,
-    0x7f7cb667, 0xf48dac1a,
-  0x7f7c2668, 0xf4876a10, 0x7f7b961b, 0xf481280e, 0x7f7b057e, 0xf47ae613,
-    0x7f7a7494, 0xf474a41f,
-  0x7f79e35a, 0xf46e6231, 0x7f7951d2, 0xf468204b, 0x7f78bffb, 0xf461de6d,
-    0x7f782dd6, 0xf45b9c95,
-  0x7f779b62, 0xf4555ac5, 0x7f77089f, 0xf44f18fb, 0x7f76758e, 0xf448d739,
-    0x7f75e22e, 0xf442957e,
-  0x7f754e80, 0xf43c53cb, 0x7f74ba83, 0xf436121e, 0x7f742637, 0xf42fd079,
-    0x7f73919d, 0xf4298edc,
-  0x7f72fcb4, 0xf4234d45, 0x7f72677c, 0xf41d0bb6, 0x7f71d1f6, 0xf416ca2e,
-    0x7f713c21, 0xf41088ae,
-  0x7f70a5fe, 0xf40a4735, 0x7f700f8c, 0xf40405c3, 0x7f6f78cb, 0xf3fdc459,
-    0x7f6ee1bc, 0xf3f782f6,
-  0x7f6e4a5e, 0xf3f1419a, 0x7f6db2b1, 0xf3eb0046, 0x7f6d1ab6, 0xf3e4bef9,
-    0x7f6c826d, 0xf3de7db4,
-  0x7f6be9d4, 0xf3d83c77, 0x7f6b50ed, 0xf3d1fb40, 0x7f6ab7b8, 0xf3cbba12,
-    0x7f6a1e34, 0xf3c578eb,
-  0x7f698461, 0xf3bf37cb, 0x7f68ea40, 0xf3b8f6b3, 0x7f684fd0, 0xf3b2b5a3,
-    0x7f67b512, 0xf3ac749a,
-  0x7f671a05, 0xf3a63398, 0x7f667ea9, 0xf39ff29f, 0x7f65e2ff, 0xf399b1ad,
-    0x7f654706, 0xf39370c2,
-  0x7f64aabf, 0xf38d2fe0, 0x7f640e29, 0xf386ef05, 0x7f637144, 0xf380ae31,
-    0x7f62d411, 0xf37a6d66,
-  0x7f62368f, 0xf3742ca2, 0x7f6198bf, 0xf36debe6, 0x7f60faa0, 0xf367ab31,
-    0x7f605c33, 0xf3616a85,
-  0x7f5fbd77, 0xf35b29e0, 0x7f5f1e6c, 0xf354e943, 0x7f5e7f13, 0xf34ea8ae,
-    0x7f5ddf6b, 0xf3486820,
-  0x7f5d3f75, 0xf342279b, 0x7f5c9f30, 0xf33be71d, 0x7f5bfe9d, 0xf335a6a7,
-    0x7f5b5dbb, 0xf32f6639,
-  0x7f5abc8a, 0xf32925d3, 0x7f5a1b0b, 0xf322e575, 0x7f59793e, 0xf31ca51f,
-    0x7f58d721, 0xf31664d1,
-  0x7f5834b7, 0xf310248a, 0x7f5791fd, 0xf309e44c, 0x7f56eef5, 0xf303a416,
-    0x7f564b9f, 0xf2fd63e8,
-  0x7f55a7fa, 0xf2f723c1, 0x7f550407, 0xf2f0e3a3, 0x7f545fc5, 0xf2eaa38d,
-    0x7f53bb34, 0xf2e4637f,
-  0x7f531655, 0xf2de2379, 0x7f527127, 0xf2d7e37b, 0x7f51cbab, 0xf2d1a385,
-    0x7f5125e0, 0xf2cb6398,
-  0x7f507fc7, 0xf2c523b2, 0x7f4fd95f, 0xf2bee3d5, 0x7f4f32a9, 0xf2b8a400,
-    0x7f4e8ba4, 0xf2b26433,
-  0x7f4de451, 0xf2ac246e, 0x7f4d3caf, 0xf2a5e4b1, 0x7f4c94be, 0xf29fa4fd,
-    0x7f4bec7f, 0xf2996551,
-  0x7f4b43f2, 0xf29325ad, 0x7f4a9b16, 0xf28ce612, 0x7f49f1eb, 0xf286a67e,
-    0x7f494872, 0xf28066f4,
-  0x7f489eaa, 0xf27a2771, 0x7f47f494, 0xf273e7f7, 0x7f474a30, 0xf26da885,
-    0x7f469f7d, 0xf267691b,
-  0x7f45f47b, 0xf26129ba, 0x7f45492b, 0xf25aea61, 0x7f449d8c, 0xf254ab11,
-    0x7f43f19f, 0xf24e6bc9,
-  0x7f434563, 0xf2482c8a, 0x7f4298d9, 0xf241ed53, 0x7f41ec01, 0xf23bae24,
-    0x7f413ed9, 0xf2356efe,
-  0x7f409164, 0xf22f2fe1, 0x7f3fe3a0, 0xf228f0cc, 0x7f3f358d, 0xf222b1c0,
-    0x7f3e872c, 0xf21c72bc,
-  0x7f3dd87c, 0xf21633c0, 0x7f3d297e, 0xf20ff4ce, 0x7f3c7a31, 0xf209b5e4,
-    0x7f3bca96, 0xf2037702,
-  0x7f3b1aad, 0xf1fd3829, 0x7f3a6a75, 0xf1f6f959, 0x7f39b9ee, 0xf1f0ba91,
-    0x7f390919, 0xf1ea7bd2,
-  0x7f3857f6, 0xf1e43d1c, 0x7f37a684, 0xf1ddfe6f, 0x7f36f4c3, 0xf1d7bfca,
-    0x7f3642b4, 0xf1d1812e,
-  0x7f359057, 0xf1cb429a, 0x7f34ddab, 0xf1c50410, 0x7f342ab1, 0xf1bec58e,
-    0x7f337768, 0xf1b88715,
-  0x7f32c3d1, 0xf1b248a5, 0x7f320feb, 0xf1ac0a3e, 0x7f315bb7, 0xf1a5cbdf,
-    0x7f30a734, 0xf19f8d89,
-  0x7f2ff263, 0xf1994f3d, 0x7f2f3d44, 0xf19310f9, 0x7f2e87d6, 0xf18cd2be,
-    0x7f2dd219, 0xf186948c,
-  0x7f2d1c0e, 0xf1805662, 0x7f2c65b5, 0xf17a1842, 0x7f2baf0d, 0xf173da2b,
-    0x7f2af817, 0xf16d9c1d,
-  0x7f2a40d2, 0xf1675e17, 0x7f29893f, 0xf161201b, 0x7f28d15d, 0xf15ae228,
-    0x7f28192d, 0xf154a43d,
-  0x7f2760af, 0xf14e665c, 0x7f26a7e2, 0xf1482884, 0x7f25eec7, 0xf141eab5,
-    0x7f25355d, 0xf13bacef,
-  0x7f247ba5, 0xf1356f32, 0x7f23c19e, 0xf12f317e, 0x7f230749, 0xf128f3d4,
-    0x7f224ca6, 0xf122b632,
-  0x7f2191b4, 0xf11c789a, 0x7f20d674, 0xf1163b0b, 0x7f201ae5, 0xf10ffd85,
-    0x7f1f5f08, 0xf109c009,
-  0x7f1ea2dc, 0xf1038295, 0x7f1de662, 0xf0fd452b, 0x7f1d299a, 0xf0f707ca,
-    0x7f1c6c83, 0xf0f0ca72,
-  0x7f1baf1e, 0xf0ea8d24, 0x7f1af16a, 0xf0e44fdf, 0x7f1a3368, 0xf0de12a3,
-    0x7f197518, 0xf0d7d571,
-  0x7f18b679, 0xf0d19848, 0x7f17f78c, 0xf0cb5b28, 0x7f173850, 0xf0c51e12,
-    0x7f1678c6, 0xf0bee105,
-  0x7f15b8ee, 0xf0b8a401, 0x7f14f8c7, 0xf0b26707, 0x7f143852, 0xf0ac2a16,
-    0x7f13778e, 0xf0a5ed2f,
-  0x7f12b67c, 0xf09fb051, 0x7f11f51c, 0xf099737d, 0x7f11336d, 0xf09336b2,
-    0x7f107170, 0xf08cf9f1,
-  0x7f0faf25, 0xf086bd39, 0x7f0eec8b, 0xf080808b, 0x7f0e29a3, 0xf07a43e7,
-    0x7f0d666c, 0xf074074c,
-  0x7f0ca2e7, 0xf06dcaba, 0x7f0bdf14, 0xf0678e32, 0x7f0b1af2, 0xf06151b4,
-    0x7f0a5682, 0xf05b1540,
-  0x7f0991c4, 0xf054d8d5, 0x7f08ccb7, 0xf04e9c73, 0x7f08075c, 0xf048601c,
-    0x7f0741b2, 0xf04223ce,
-  0x7f067bba, 0xf03be78a, 0x7f05b574, 0xf035ab4f, 0x7f04eedf, 0xf02f6f1f,
-    0x7f0427fc, 0xf02932f8,
-  0x7f0360cb, 0xf022f6da, 0x7f02994b, 0xf01cbac7, 0x7f01d17d, 0xf0167ebd,
-    0x7f010961, 0xf01042be,
-  0x7f0040f6, 0xf00a06c8, 0x7eff783d, 0xf003cadc, 0x7efeaf36, 0xeffd8ef9,
-    0x7efde5e0, 0xeff75321,
-  0x7efd1c3c, 0xeff11753, 0x7efc524a, 0xefeadb8e, 0x7efb8809, 0xefe49fd3,
-    0x7efabd7a, 0xefde6423,
-  0x7ef9f29d, 0xefd8287c, 0x7ef92771, 0xefd1ecdf, 0x7ef85bf7, 0xefcbb14c,
-    0x7ef7902f, 0xefc575c3,
-  0x7ef6c418, 0xefbf3a45, 0x7ef5f7b3, 0xefb8fed0, 0x7ef52b00, 0xefb2c365,
-    0x7ef45dfe, 0xefac8804,
-  0x7ef390ae, 0xefa64cae, 0x7ef2c310, 0xefa01161, 0x7ef1f524, 0xef99d61f,
-    0x7ef126e9, 0xef939ae6,
-  0x7ef05860, 0xef8d5fb8, 0x7eef8988, 0xef872494, 0x7eeeba62, 0xef80e97a,
-    0x7eedeaee, 0xef7aae6b,
-  0x7eed1b2c, 0xef747365, 0x7eec4b1b, 0xef6e386a, 0x7eeb7abc, 0xef67fd79,
-    0x7eeaaa0f, 0xef61c292,
-  0x7ee9d914, 0xef5b87b5, 0x7ee907ca, 0xef554ce3, 0x7ee83632, 0xef4f121b,
-    0x7ee7644c, 0xef48d75d,
-  0x7ee69217, 0xef429caa, 0x7ee5bf94, 0xef3c6201, 0x7ee4ecc3, 0xef362762,
-    0x7ee419a3, 0xef2feccd,
-  0x7ee34636, 0xef29b243, 0x7ee2727a, 0xef2377c4, 0x7ee19e6f, 0xef1d3d4e,
-    0x7ee0ca17, 0xef1702e4,
-  0x7edff570, 0xef10c883, 0x7edf207b, 0xef0a8e2d, 0x7ede4b38, 0xef0453e2,
-    0x7edd75a6, 0xeefe19a1,
-  0x7edc9fc6, 0xeef7df6a, 0x7edbc998, 0xeef1a53e, 0x7edaf31c, 0xeeeb6b1c,
-    0x7eda1c51, 0xeee53105,
-  0x7ed94538, 0xeedef6f9, 0x7ed86dd1, 0xeed8bcf7, 0x7ed7961c, 0xeed28300,
-    0x7ed6be18, 0xeecc4913,
-  0x7ed5e5c6, 0xeec60f31, 0x7ed50d26, 0xeebfd55a, 0x7ed43438, 0xeeb99b8d,
-    0x7ed35afb, 0xeeb361cb,
-  0x7ed28171, 0xeead2813, 0x7ed1a798, 0xeea6ee66, 0x7ed0cd70, 0xeea0b4c4,
-    0x7ecff2fb, 0xee9a7b2d,
-  0x7ecf1837, 0xee9441a0, 0x7ece3d25, 0xee8e081e, 0x7ecd61c5, 0xee87cea7,
-    0x7ecc8617, 0xee81953b,
-  0x7ecbaa1a, 0xee7b5bd9, 0x7ecacdd0, 0xee752283, 0x7ec9f137, 0xee6ee937,
-    0x7ec9144f, 0xee68aff6,
-  0x7ec8371a, 0xee6276bf, 0x7ec75996, 0xee5c3d94, 0x7ec67bc5, 0xee560473,
-    0x7ec59da5, 0xee4fcb5e,
-  0x7ec4bf36, 0xee499253, 0x7ec3e07a, 0xee435953, 0x7ec3016f, 0xee3d205e,
-    0x7ec22217, 0xee36e775,
-  0x7ec14270, 0xee30ae96, 0x7ec0627a, 0xee2a75c2, 0x7ebf8237, 0xee243cf9,
-    0x7ebea1a6, 0xee1e043b,
-  0x7ebdc0c6, 0xee17cb88, 0x7ebcdf98, 0xee1192e0, 0x7ebbfe1c, 0xee0b5a43,
-    0x7ebb1c52, 0xee0521b2,
-  0x7eba3a39, 0xedfee92b, 0x7eb957d2, 0xedf8b0b0, 0x7eb8751e, 0xedf2783f,
-    0x7eb7921b, 0xedec3fda,
-  0x7eb6aeca, 0xede60780, 0x7eb5cb2a, 0xeddfcf31, 0x7eb4e73d, 0xedd996ed,
-    0x7eb40301, 0xedd35eb5,
-  0x7eb31e78, 0xedcd2687, 0x7eb239a0, 0xedc6ee65, 0x7eb1547a, 0xedc0b64e,
-    0x7eb06f05, 0xedba7e43,
-  0x7eaf8943, 0xedb44642, 0x7eaea333, 0xedae0e4d, 0x7eadbcd4, 0xeda7d664,
-    0x7eacd627, 0xeda19e85,
-  0x7eabef2c, 0xed9b66b2, 0x7eab07e3, 0xed952eea, 0x7eaa204c, 0xed8ef72e,
-    0x7ea93867, 0xed88bf7d,
-  0x7ea85033, 0xed8287d7, 0x7ea767b2, 0xed7c503d, 0x7ea67ee2, 0xed7618ae,
-    0x7ea595c4, 0xed6fe12b,
-  0x7ea4ac58, 0xed69a9b3, 0x7ea3c29e, 0xed637246, 0x7ea2d896, 0xed5d3ae5,
-    0x7ea1ee3f, 0xed570390,
-  0x7ea1039b, 0xed50cc46, 0x7ea018a8, 0xed4a9507, 0x7e9f2d68, 0xed445dd5,
-    0x7e9e41d9, 0xed3e26ad,
-  0x7e9d55fc, 0xed37ef91, 0x7e9c69d1, 0xed31b881, 0x7e9b7d58, 0xed2b817d,
-    0x7e9a9091, 0xed254a84,
-  0x7e99a37c, 0xed1f1396, 0x7e98b618, 0xed18dcb5, 0x7e97c867, 0xed12a5df,
-    0x7e96da67, 0xed0c6f14,
-  0x7e95ec1a, 0xed063856, 0x7e94fd7e, 0xed0001a3, 0x7e940e94, 0xecf9cafb,
-    0x7e931f5c, 0xecf39460,
-  0x7e922fd6, 0xeced5dd0, 0x7e914002, 0xece7274c, 0x7e904fe0, 0xece0f0d4,
-    0x7e8f5f70, 0xecdaba67,
-  0x7e8e6eb2, 0xecd48407, 0x7e8d7da6, 0xecce4db2, 0x7e8c8c4b, 0xecc81769,
-    0x7e8b9aa3, 0xecc1e12c,
-  0x7e8aa8ac, 0xecbbaafb, 0x7e89b668, 0xecb574d5, 0x7e88c3d5, 0xecaf3ebc,
-    0x7e87d0f5, 0xeca908ae,
-  0x7e86ddc6, 0xeca2d2ad, 0x7e85ea49, 0xec9c9cb7, 0x7e84f67e, 0xec9666cd,
-    0x7e840265, 0xec9030f0,
-  0x7e830dff, 0xec89fb1e, 0x7e82194a, 0xec83c558, 0x7e812447, 0xec7d8f9e,
-    0x7e802ef6, 0xec7759f1,
-  0x7e7f3957, 0xec71244f, 0x7e7e436a, 0xec6aeeba, 0x7e7d4d2f, 0xec64b930,
-    0x7e7c56a5, 0xec5e83b3,
-  0x7e7b5fce, 0xec584e41, 0x7e7a68a9, 0xec5218dc, 0x7e797136, 0xec4be383,
-    0x7e787975, 0xec45ae36,
-  0x7e778166, 0xec3f78f6, 0x7e768908, 0xec3943c1, 0x7e75905d, 0xec330e99,
-    0x7e749764, 0xec2cd97d,
-  0x7e739e1d, 0xec26a46d, 0x7e72a488, 0xec206f69, 0x7e71aaa4, 0xec1a3a72,
-    0x7e70b073, 0xec140587,
-  0x7e6fb5f4, 0xec0dd0a8, 0x7e6ebb27, 0xec079bd6, 0x7e6dc00c, 0xec01670f,
-    0x7e6cc4a2, 0xebfb3256,
-  0x7e6bc8eb, 0xebf4fda8, 0x7e6acce6, 0xebeec907, 0x7e69d093, 0xebe89472,
-    0x7e68d3f2, 0xebe25fea,
-  0x7e67d703, 0xebdc2b6e, 0x7e66d9c6, 0xebd5f6fe, 0x7e65dc3b, 0xebcfc29b,
-    0x7e64de62, 0xebc98e45,
-  0x7e63e03b, 0xebc359fb, 0x7e62e1c6, 0xebbd25bd, 0x7e61e303, 0xebb6f18c,
-    0x7e60e3f2, 0xebb0bd67,
-  0x7e5fe493, 0xebaa894f, 0x7e5ee4e6, 0xeba45543, 0x7e5de4ec, 0xeb9e2144,
-    0x7e5ce4a3, 0xeb97ed52,
-  0x7e5be40c, 0xeb91b96c, 0x7e5ae328, 0xeb8b8593, 0x7e59e1f5, 0xeb8551c6,
-    0x7e58e075, 0xeb7f1e06,
-  0x7e57dea7, 0xeb78ea52, 0x7e56dc8a, 0xeb72b6ac, 0x7e55da20, 0xeb6c8312,
-    0x7e54d768, 0xeb664f84,
-  0x7e53d462, 0xeb601c04, 0x7e52d10e, 0xeb59e890, 0x7e51cd6c, 0xeb53b529,
-    0x7e50c97c, 0xeb4d81ce,
-  0x7e4fc53e, 0xeb474e81, 0x7e4ec0b2, 0xeb411b40, 0x7e4dbbd9, 0xeb3ae80c,
-    0x7e4cb6b1, 0xeb34b4e4,
-  0x7e4bb13c, 0xeb2e81ca, 0x7e4aab78, 0xeb284ebc, 0x7e49a567, 0xeb221bbb,
-    0x7e489f08, 0xeb1be8c8,
-  0x7e47985b, 0xeb15b5e1, 0x7e469160, 0xeb0f8307, 0x7e458a17, 0xeb095039,
-    0x7e448281, 0xeb031d79,
-  0x7e437a9c, 0xeafceac6, 0x7e427269, 0xeaf6b81f, 0x7e4169e9, 0xeaf08586,
-    0x7e40611b, 0xeaea52fa,
-  0x7e3f57ff, 0xeae4207a, 0x7e3e4e95, 0xeaddee08, 0x7e3d44dd, 0xead7bba3,
-    0x7e3c3ad7, 0xead1894b,
-  0x7e3b3083, 0xeacb56ff, 0x7e3a25e2, 0xeac524c1, 0x7e391af3, 0xeabef290,
-    0x7e380fb5, 0xeab8c06c,
-  0x7e37042a, 0xeab28e56, 0x7e35f851, 0xeaac5c4c, 0x7e34ec2b, 0xeaa62a4f,
-    0x7e33dfb6, 0xea9ff860,
-  0x7e32d2f4, 0xea99c67e, 0x7e31c5e3, 0xea9394a9, 0x7e30b885, 0xea8d62e1,
-    0x7e2faad9, 0xea873127,
-  0x7e2e9cdf, 0xea80ff7a, 0x7e2d8e97, 0xea7acdda, 0x7e2c8002, 0xea749c47,
-    0x7e2b711f, 0xea6e6ac2,
-  0x7e2a61ed, 0xea683949, 0x7e29526e, 0xea6207df, 0x7e2842a2, 0xea5bd681,
-    0x7e273287, 0xea55a531,
-  0x7e26221f, 0xea4f73ee, 0x7e251168, 0xea4942b9, 0x7e240064, 0xea431191,
-    0x7e22ef12, 0xea3ce077,
-  0x7e21dd73, 0xea36af69, 0x7e20cb85, 0xea307e6a, 0x7e1fb94a, 0xea2a4d78,
-    0x7e1ea6c1, 0xea241c93,
-  0x7e1d93ea, 0xea1debbb, 0x7e1c80c5, 0xea17baf2, 0x7e1b6d53, 0xea118a35,
-    0x7e1a5992, 0xea0b5987,
-  0x7e194584, 0xea0528e5, 0x7e183128, 0xe9fef852, 0x7e171c7f, 0xe9f8c7cc,
-    0x7e160787, 0xe9f29753,
-  0x7e14f242, 0xe9ec66e8, 0x7e13dcaf, 0xe9e6368b, 0x7e12c6ce, 0xe9e0063c,
-    0x7e11b0a0, 0xe9d9d5fa,
-  0x7e109a24, 0xe9d3a5c5, 0x7e0f835a, 0xe9cd759f, 0x7e0e6c42, 0xe9c74586,
-    0x7e0d54dc, 0xe9c1157a,
-  0x7e0c3d29, 0xe9bae57d, 0x7e0b2528, 0xe9b4b58d, 0x7e0a0cd9, 0xe9ae85ab,
-    0x7e08f43d, 0xe9a855d7,
-  0x7e07db52, 0xe9a22610, 0x7e06c21a, 0xe99bf658, 0x7e05a894, 0xe995c6ad,
-    0x7e048ec1, 0xe98f9710,
-  0x7e0374a0, 0xe9896781, 0x7e025a31, 0xe98337ff, 0x7e013f74, 0xe97d088c,
-    0x7e00246a, 0xe976d926,
-  0x7dff0911, 0xe970a9ce, 0x7dfded6c, 0xe96a7a85, 0x7dfcd178, 0xe9644b49,
-    0x7dfbb537, 0xe95e1c1b,
-  0x7dfa98a8, 0xe957ecfb, 0x7df97bcb, 0xe951bde9, 0x7df85ea0, 0xe94b8ee5,
-    0x7df74128, 0xe9455fef,
-  0x7df62362, 0xe93f3107, 0x7df5054f, 0xe939022d, 0x7df3e6ee, 0xe932d361,
-    0x7df2c83f, 0xe92ca4a4,
-  0x7df1a942, 0xe92675f4, 0x7df089f8, 0xe9204752, 0x7def6a60, 0xe91a18bf,
-    0x7dee4a7a, 0xe913ea39,
-  0x7ded2a47, 0xe90dbbc2, 0x7dec09c6, 0xe9078d59, 0x7deae8f7, 0xe9015efe,
-    0x7de9c7da, 0xe8fb30b1,
-  0x7de8a670, 0xe8f50273, 0x7de784b9, 0xe8eed443, 0x7de662b3, 0xe8e8a621,
-    0x7de54060, 0xe8e2780d,
-  0x7de41dc0, 0xe8dc4a07, 0x7de2fad1, 0xe8d61c10, 0x7de1d795, 0xe8cfee27,
-    0x7de0b40b, 0xe8c9c04c,
-  0x7ddf9034, 0xe8c39280, 0x7dde6c0f, 0xe8bd64c2, 0x7ddd479d, 0xe8b73712,
-    0x7ddc22dc, 0xe8b10971,
-  0x7ddafdce, 0xe8aadbde, 0x7dd9d873, 0xe8a4ae59, 0x7dd8b2ca, 0xe89e80e3,
-    0x7dd78cd3, 0xe898537b,
-  0x7dd6668f, 0xe8922622, 0x7dd53ffc, 0xe88bf8d7, 0x7dd4191d, 0xe885cb9a,
-    0x7dd2f1f0, 0xe87f9e6c,
-  0x7dd1ca75, 0xe879714d, 0x7dd0a2ac, 0xe873443c, 0x7dcf7a96, 0xe86d173a,
-    0x7dce5232, 0xe866ea46,
-  0x7dcd2981, 0xe860bd61, 0x7dcc0082, 0xe85a908a, 0x7dcad736, 0xe85463c2,
-    0x7dc9ad9c, 0xe84e3708,
-  0x7dc883b4, 0xe8480a5d, 0x7dc7597f, 0xe841ddc1, 0x7dc62efc, 0xe83bb133,
-    0x7dc5042b, 0xe83584b4,
-  0x7dc3d90d, 0xe82f5844, 0x7dc2ada2, 0xe8292be3, 0x7dc181e8, 0xe822ff90,
-    0x7dc055e2, 0xe81cd34b,
-  0x7dbf298d, 0xe816a716, 0x7dbdfceb, 0xe8107aef, 0x7dbccffc, 0xe80a4ed7,
-    0x7dbba2bf, 0xe80422ce,
-  0x7dba7534, 0xe7fdf6d4, 0x7db9475c, 0xe7f7cae8, 0x7db81936, 0xe7f19f0c,
-    0x7db6eac3, 0xe7eb733e,
-  0x7db5bc02, 0xe7e5477f, 0x7db48cf4, 0xe7df1bcf, 0x7db35d98, 0xe7d8f02d,
-    0x7db22def, 0xe7d2c49b,
-  0x7db0fdf8, 0xe7cc9917, 0x7dafcdb3, 0xe7c66da3, 0x7dae9d21, 0xe7c0423d,
-    0x7dad6c42, 0xe7ba16e7,
-  0x7dac3b15, 0xe7b3eb9f, 0x7dab099a, 0xe7adc066, 0x7da9d7d2, 0xe7a7953d,
-    0x7da8a5bc, 0xe7a16a22,
-  0x7da77359, 0xe79b3f16, 0x7da640a9, 0xe795141a, 0x7da50dab, 0xe78ee92c,
-    0x7da3da5f, 0xe788be4e,
-  0x7da2a6c6, 0xe782937e, 0x7da172df, 0xe77c68be, 0x7da03eab, 0xe7763e0d,
-    0x7d9f0a29, 0xe770136b,
-  0x7d9dd55a, 0xe769e8d8, 0x7d9ca03e, 0xe763be55, 0x7d9b6ad3, 0xe75d93e0,
-    0x7d9a351c, 0xe757697b,
-  0x7d98ff17, 0xe7513f25, 0x7d97c8c4, 0xe74b14de, 0x7d969224, 0xe744eaa6,
-    0x7d955b37, 0xe73ec07e,
-  0x7d9423fc, 0xe7389665, 0x7d92ec73, 0xe7326c5b, 0x7d91b49e, 0xe72c4260,
-    0x7d907c7a, 0xe7261875,
-  0x7d8f4409, 0xe71fee99, 0x7d8e0b4b, 0xe719c4cd, 0x7d8cd240, 0xe7139b10,
-    0x7d8b98e6, 0xe70d7162,
-  0x7d8a5f40, 0xe70747c4, 0x7d89254c, 0xe7011e35, 0x7d87eb0a, 0xe6faf4b5,
-    0x7d86b07c, 0xe6f4cb45,
-  0x7d85759f, 0xe6eea1e4, 0x7d843a76, 0xe6e87893, 0x7d82fefe, 0xe6e24f51,
-    0x7d81c33a, 0xe6dc261f,
-  0x7d808728, 0xe6d5fcfc, 0x7d7f4ac8, 0xe6cfd3e9, 0x7d7e0e1c, 0xe6c9aae5,
-    0x7d7cd121, 0xe6c381f1,
-  0x7d7b93da, 0xe6bd590d, 0x7d7a5645, 0xe6b73038, 0x7d791862, 0xe6b10772,
-    0x7d77da32, 0xe6aadebc,
-  0x7d769bb5, 0xe6a4b616, 0x7d755cea, 0xe69e8d80, 0x7d741dd2, 0xe69864f9,
-    0x7d72de6d, 0xe6923c82,
-  0x7d719eba, 0xe68c141a, 0x7d705eba, 0xe685ebc2, 0x7d6f1e6c, 0xe67fc37a,
-    0x7d6dddd2, 0xe6799b42,
-  0x7d6c9ce9, 0xe6737319, 0x7d6b5bb4, 0xe66d4b01, 0x7d6a1a31, 0xe66722f7,
-    0x7d68d860, 0xe660fafe,
-  0x7d679642, 0xe65ad315, 0x7d6653d7, 0xe654ab3b, 0x7d65111f, 0xe64e8371,
-    0x7d63ce19, 0xe6485bb7,
-  0x7d628ac6, 0xe642340d, 0x7d614725, 0xe63c0c73, 0x7d600338, 0xe635e4e9,
-    0x7d5ebefc, 0xe62fbd6e,
-  0x7d5d7a74, 0xe6299604, 0x7d5c359e, 0xe6236ea9, 0x7d5af07b, 0xe61d475e,
-    0x7d59ab0a, 0xe6172024,
-  0x7d58654d, 0xe610f8f9, 0x7d571f41, 0xe60ad1de, 0x7d55d8e9, 0xe604aad4,
-    0x7d549243, 0xe5fe83d9,
-  0x7d534b50, 0xe5f85cef, 0x7d520410, 0xe5f23614, 0x7d50bc82, 0xe5ec0f4a,
-    0x7d4f74a7, 0xe5e5e88f,
-  0x7d4e2c7f, 0xe5dfc1e5, 0x7d4ce409, 0xe5d99b4b, 0x7d4b9b46, 0xe5d374c1,
-    0x7d4a5236, 0xe5cd4e47,
-  0x7d4908d9, 0xe5c727dd, 0x7d47bf2e, 0xe5c10184, 0x7d467536, 0xe5badb3a,
-    0x7d452af1, 0xe5b4b501,
-  0x7d43e05e, 0xe5ae8ed8, 0x7d42957e, 0xe5a868bf, 0x7d414a51, 0xe5a242b7,
-    0x7d3ffed7, 0xe59c1cbf,
-  0x7d3eb30f, 0xe595f6d7, 0x7d3d66fa, 0xe58fd0ff, 0x7d3c1a98, 0xe589ab38,
-    0x7d3acde9, 0xe5838581,
-  0x7d3980ec, 0xe57d5fda, 0x7d3833a2, 0xe5773a44, 0x7d36e60b, 0xe57114be,
-    0x7d359827, 0xe56aef49,
-  0x7d3449f5, 0xe564c9e3, 0x7d32fb76, 0xe55ea48f, 0x7d31acaa, 0xe5587f4a,
-    0x7d305d91, 0xe5525a17,
-  0x7d2f0e2b, 0xe54c34f3, 0x7d2dbe77, 0xe5460fe0, 0x7d2c6e76, 0xe53feade,
-    0x7d2b1e28, 0xe539c5ec,
-  0x7d29cd8c, 0xe533a10a, 0x7d287ca4, 0xe52d7c39, 0x7d272b6e, 0xe5275779,
-    0x7d25d9eb, 0xe52132c9,
-  0x7d24881b, 0xe51b0e2a, 0x7d2335fe, 0xe514e99b, 0x7d21e393, 0xe50ec51d,
-    0x7d2090db, 0xe508a0b0,
-  0x7d1f3dd6, 0xe5027c53, 0x7d1dea84, 0xe4fc5807, 0x7d1c96e5, 0xe4f633cc,
-    0x7d1b42f9, 0xe4f00fa1,
-  0x7d19eebf, 0xe4e9eb87, 0x7d189a38, 0xe4e3c77d, 0x7d174564, 0xe4dda385,
-    0x7d15f043, 0xe4d77f9d,
-  0x7d149ad5, 0xe4d15bc6, 0x7d134519, 0xe4cb37ff, 0x7d11ef11, 0xe4c5144a,
-    0x7d1098bb, 0xe4bef0a5,
-  0x7d0f4218, 0xe4b8cd11, 0x7d0deb28, 0xe4b2a98e, 0x7d0c93eb, 0xe4ac861b,
-    0x7d0b3c60, 0xe4a662ba,
-  0x7d09e489, 0xe4a03f69, 0x7d088c64, 0xe49a1c29, 0x7d0733f3, 0xe493f8fb,
-    0x7d05db34, 0xe48dd5dd,
-  0x7d048228, 0xe487b2d0, 0x7d0328cf, 0xe4818fd4, 0x7d01cf29, 0xe47b6ce9,
-    0x7d007535, 0xe4754a0e,
-  0x7cff1af5, 0xe46f2745, 0x7cfdc068, 0xe469048d, 0x7cfc658d, 0xe462e1e6,
-    0x7cfb0a65, 0xe45cbf50,
-  0x7cf9aef0, 0xe4569ccb, 0x7cf8532f, 0xe4507a57, 0x7cf6f720, 0xe44a57f4,
-    0x7cf59ac4, 0xe44435a2,
-  0x7cf43e1a, 0xe43e1362, 0x7cf2e124, 0xe437f132, 0x7cf183e1, 0xe431cf14,
-    0x7cf02651, 0xe42bad07,
-  0x7ceec873, 0xe4258b0a, 0x7ced6a49, 0xe41f6920, 0x7cec0bd1, 0xe4194746,
-    0x7ceaad0c, 0xe413257d,
-  0x7ce94dfb, 0xe40d03c6, 0x7ce7ee9c, 0xe406e220, 0x7ce68ef0, 0xe400c08b,
-    0x7ce52ef7, 0xe3fa9f08,
-  0x7ce3ceb2, 0xe3f47d96, 0x7ce26e1f, 0xe3ee5c35, 0x7ce10d3f, 0xe3e83ae5,
-    0x7cdfac12, 0xe3e219a7,
-  0x7cde4a98, 0xe3dbf87a, 0x7cdce8d1, 0xe3d5d75e, 0x7cdb86bd, 0xe3cfb654,
-    0x7cda245c, 0xe3c9955b,
-  0x7cd8c1ae, 0xe3c37474, 0x7cd75eb3, 0xe3bd539e, 0x7cd5fb6a, 0xe3b732d9,
-    0x7cd497d5, 0xe3b11226,
-  0x7cd333f3, 0xe3aaf184, 0x7cd1cfc4, 0xe3a4d0f4, 0x7cd06b48, 0xe39eb075,
-    0x7ccf067f, 0xe3989008,
-  0x7ccda169, 0xe3926fad, 0x7ccc3c06, 0xe38c4f63, 0x7ccad656, 0xe3862f2a,
-    0x7cc97059, 0xe3800f03,
-  0x7cc80a0f, 0xe379eeed, 0x7cc6a378, 0xe373ceea, 0x7cc53c94, 0xe36daef7,
-    0x7cc3d563, 0xe3678f17,
-  0x7cc26de5, 0xe3616f48, 0x7cc1061a, 0xe35b4f8b, 0x7cbf9e03, 0xe3552fdf,
-    0x7cbe359e, 0xe34f1045,
-  0x7cbcccec, 0xe348f0bd, 0x7cbb63ee, 0xe342d146, 0x7cb9faa2, 0xe33cb1e1,
-    0x7cb8910a, 0xe336928e,
-  0x7cb72724, 0xe330734d, 0x7cb5bcf2, 0xe32a541d, 0x7cb45272, 0xe3243500,
-    0x7cb2e7a6, 0xe31e15f4,
-  0x7cb17c8d, 0xe317f6fa, 0x7cb01127, 0xe311d811, 0x7caea574, 0xe30bb93b,
-    0x7cad3974, 0xe3059a76,
-  0x7cabcd28, 0xe2ff7bc3, 0x7caa608e, 0xe2f95d23, 0x7ca8f3a7, 0xe2f33e94,
-    0x7ca78674, 0xe2ed2017,
-  0x7ca618f3, 0xe2e701ac, 0x7ca4ab26, 0xe2e0e352, 0x7ca33d0c, 0xe2dac50b,
-    0x7ca1cea5, 0xe2d4a6d6,
-  0x7ca05ff1, 0xe2ce88b3, 0x7c9ef0f0, 0xe2c86aa2, 0x7c9d81a3, 0xe2c24ca2,
-    0x7c9c1208, 0xe2bc2eb5,
-  0x7c9aa221, 0xe2b610da, 0x7c9931ec, 0xe2aff311, 0x7c97c16b, 0xe2a9d55a,
-    0x7c96509d, 0xe2a3b7b5,
-  0x7c94df83, 0xe29d9a23, 0x7c936e1b, 0xe2977ca2, 0x7c91fc66, 0xe2915f34,
-    0x7c908a65, 0xe28b41d7,
-  0x7c8f1817, 0xe285248d, 0x7c8da57c, 0xe27f0755, 0x7c8c3294, 0xe278ea30,
-    0x7c8abf5f, 0xe272cd1c,
-  0x7c894bde, 0xe26cb01b, 0x7c87d810, 0xe266932c, 0x7c8663f4, 0xe260764f,
-    0x7c84ef8c, 0xe25a5984,
-  0x7c837ad8, 0xe2543ccc, 0x7c8205d6, 0xe24e2026, 0x7c809088, 0xe2480393,
-    0x7c7f1aed, 0xe241e711,
-  0x7c7da505, 0xe23bcaa2, 0x7c7c2ed0, 0xe235ae46, 0x7c7ab84e, 0xe22f91fc,
-    0x7c794180, 0xe22975c4,
-  0x7c77ca65, 0xe223599e, 0x7c7652fd, 0xe21d3d8b, 0x7c74db48, 0xe217218b,
-    0x7c736347, 0xe211059d,
-  0x7c71eaf9, 0xe20ae9c1, 0x7c70725e, 0xe204cdf8, 0x7c6ef976, 0xe1feb241,
-    0x7c6d8041, 0xe1f8969d,
-  0x7c6c06c0, 0xe1f27b0b, 0x7c6a8cf2, 0xe1ec5f8c, 0x7c6912d7, 0xe1e64420,
-    0x7c679870, 0xe1e028c6,
-  0x7c661dbc, 0xe1da0d7e, 0x7c64a2bb, 0xe1d3f24a, 0x7c63276d, 0xe1cdd727,
-    0x7c61abd3, 0xe1c7bc18,
-  0x7c602fec, 0xe1c1a11b, 0x7c5eb3b8, 0xe1bb8631, 0x7c5d3737, 0xe1b56b59,
-    0x7c5bba6a, 0xe1af5094,
-  0x7c5a3d50, 0xe1a935e2, 0x7c58bfe9, 0xe1a31b42, 0x7c574236, 0xe19d00b6,
-    0x7c55c436, 0xe196e63c,
-  0x7c5445e9, 0xe190cbd4, 0x7c52c74f, 0xe18ab180, 0x7c514869, 0xe184973e,
-    0x7c4fc936, 0xe17e7d0f,
-  0x7c4e49b7, 0xe17862f3, 0x7c4cc9ea, 0xe17248ea, 0x7c4b49d2, 0xe16c2ef4,
-    0x7c49c96c, 0xe1661510,
-  0x7c4848ba, 0xe15ffb3f, 0x7c46c7bb, 0xe159e182, 0x7c45466f, 0xe153c7d7,
-    0x7c43c4d7, 0xe14dae3f,
-  0x7c4242f2, 0xe14794ba, 0x7c40c0c1, 0xe1417b48, 0x7c3f3e42, 0xe13b61e9,
-    0x7c3dbb78, 0xe135489d,
-  0x7c3c3860, 0xe12f2f63, 0x7c3ab4fc, 0xe129163d, 0x7c39314b, 0xe122fd2a,
-    0x7c37ad4e, 0xe11ce42a,
-  0x7c362904, 0xe116cb3d, 0x7c34a46d, 0xe110b263, 0x7c331f8a, 0xe10a999c,
-    0x7c319a5a, 0xe10480e9,
-  0x7c3014de, 0xe0fe6848, 0x7c2e8f15, 0xe0f84fbb, 0x7c2d08ff, 0xe0f23740,
-    0x7c2b829d, 0xe0ec1ed9,
-  0x7c29fbee, 0xe0e60685, 0x7c2874f3, 0xe0dfee44, 0x7c26edab, 0xe0d9d616,
-    0x7c256616, 0xe0d3bdfc,
-  0x7c23de35, 0xe0cda5f5, 0x7c225607, 0xe0c78e01, 0x7c20cd8d, 0xe0c17620,
-    0x7c1f44c6, 0xe0bb5e53,
-  0x7c1dbbb3, 0xe0b54698, 0x7c1c3253, 0xe0af2ef2, 0x7c1aa8a6, 0xe0a9175e,
-    0x7c191ead, 0xe0a2ffde,
-  0x7c179467, 0xe09ce871, 0x7c1609d5, 0xe096d117, 0x7c147ef6, 0xe090b9d1,
-    0x7c12f3cb, 0xe08aa29f,
-  0x7c116853, 0xe0848b7f, 0x7c0fdc8f, 0xe07e7473, 0x7c0e507e, 0xe0785d7b,
-    0x7c0cc421, 0xe0724696,
-  0x7c0b3777, 0xe06c2fc4, 0x7c09aa80, 0xe0661906, 0x7c081d3d, 0xe060025c,
-    0x7c068fae, 0xe059ebc5,
-  0x7c0501d2, 0xe053d541, 0x7c0373a9, 0xe04dbed1, 0x7c01e534, 0xe047a875,
-    0x7c005673, 0xe041922c,
-  0x7bfec765, 0xe03b7bf6, 0x7bfd380a, 0xe03565d5, 0x7bfba863, 0xe02f4fc6,
-    0x7bfa1870, 0xe02939cc,
-  0x7bf88830, 0xe02323e5, 0x7bf6f7a4, 0xe01d0e12, 0x7bf566cb, 0xe016f852,
-    0x7bf3d5a6, 0xe010e2a7,
-  0x7bf24434, 0xe00acd0e, 0x7bf0b276, 0xe004b78a, 0x7bef206b, 0xdffea219,
-    0x7bed8e14, 0xdff88cbc,
-  0x7bebfb70, 0xdff27773, 0x7bea6880, 0xdfec623e, 0x7be8d544, 0xdfe64d1c,
-    0x7be741bb, 0xdfe0380e,
-  0x7be5ade6, 0xdfda2314, 0x7be419c4, 0xdfd40e2e, 0x7be28556, 0xdfcdf95c,
-    0x7be0f09b, 0xdfc7e49d,
-  0x7bdf5b94, 0xdfc1cff3, 0x7bddc641, 0xdfbbbb5c, 0x7bdc30a1, 0xdfb5a6d9,
-    0x7bda9ab5, 0xdfaf926a,
-  0x7bd9047c, 0xdfa97e0f, 0x7bd76df7, 0xdfa369c8, 0x7bd5d726, 0xdf9d5595,
-    0x7bd44008, 0xdf974176,
-  0x7bd2a89e, 0xdf912d6b, 0x7bd110e8, 0xdf8b1974, 0x7bcf78e5, 0xdf850591,
-    0x7bcde095, 0xdf7ef1c2,
-  0x7bcc47fa, 0xdf78de07, 0x7bcaaf12, 0xdf72ca60, 0x7bc915dd, 0xdf6cb6cd,
-    0x7bc77c5d, 0xdf66a34e,
-  0x7bc5e290, 0xdf608fe4, 0x7bc44876, 0xdf5a7c8d, 0x7bc2ae10, 0xdf54694b,
-    0x7bc1135e, 0xdf4e561c,
-  0x7bbf7860, 0xdf484302, 0x7bbddd15, 0xdf422ffd, 0x7bbc417e, 0xdf3c1d0b,
-    0x7bbaa59a, 0xdf360a2d,
-  0x7bb9096b, 0xdf2ff764, 0x7bb76cef, 0xdf29e4af, 0x7bb5d026, 0xdf23d20e,
-    0x7bb43311, 0xdf1dbf82,
-  0x7bb295b0, 0xdf17ad0a, 0x7bb0f803, 0xdf119aa6, 0x7baf5a09, 0xdf0b8856,
-    0x7badbbc3, 0xdf05761b,
-  0x7bac1d31, 0xdeff63f4, 0x7baa7e53, 0xdef951e2, 0x7ba8df28, 0xdef33fe3,
-    0x7ba73fb1, 0xdeed2dfa,
-  0x7ba59fee, 0xdee71c24, 0x7ba3ffde, 0xdee10a63, 0x7ba25f82, 0xdedaf8b7,
-    0x7ba0beda, 0xded4e71f,
-  0x7b9f1de6, 0xdeced59b, 0x7b9d7ca5, 0xdec8c42c, 0x7b9bdb18, 0xdec2b2d1,
-    0x7b9a393f, 0xdebca18b,
-  0x7b989719, 0xdeb69059, 0x7b96f4a8, 0xdeb07f3c, 0x7b9551ea, 0xdeaa6e34,
-    0x7b93aee0, 0xdea45d40,
-  0x7b920b89, 0xde9e4c60, 0x7b9067e7, 0xde983b95, 0x7b8ec3f8, 0xde922adf,
-    0x7b8d1fbd, 0xde8c1a3e,
-  0x7b8b7b36, 0xde8609b1, 0x7b89d662, 0xde7ff938, 0x7b883143, 0xde79e8d5,
-    0x7b868bd7, 0xde73d886,
-  0x7b84e61f, 0xde6dc84b, 0x7b83401b, 0xde67b826, 0x7b8199ca, 0xde61a815,
-    0x7b7ff32e, 0xde5b9819,
-  0x7b7e4c45, 0xde558831, 0x7b7ca510, 0xde4f785f, 0x7b7afd8f, 0xde4968a1,
-    0x7b7955c2, 0xde4358f8,
-  0x7b77ada8, 0xde3d4964, 0x7b760542, 0xde3739e4, 0x7b745c91, 0xde312a7a,
-    0x7b72b393, 0xde2b1b24,
-  0x7b710a49, 0xde250be3, 0x7b6f60b2, 0xde1efcb7, 0x7b6db6d0, 0xde18eda0,
-    0x7b6c0ca2, 0xde12de9e,
-  0x7b6a6227, 0xde0ccfb1, 0x7b68b760, 0xde06c0d9, 0x7b670c4d, 0xde00b216,
-    0x7b6560ee, 0xddfaa367,
-  0x7b63b543, 0xddf494ce, 0x7b62094c, 0xddee8649, 0x7b605d09, 0xdde877da,
-    0x7b5eb079, 0xdde26980,
-  0x7b5d039e, 0xdddc5b3b, 0x7b5b5676, 0xddd64d0a, 0x7b59a902, 0xddd03eef,
-    0x7b57fb42, 0xddca30e9,
-  0x7b564d36, 0xddc422f8, 0x7b549ede, 0xddbe151d, 0x7b52f03a, 0xddb80756,
-    0x7b51414a, 0xddb1f9a4,
-  0x7b4f920e, 0xddabec08, 0x7b4de286, 0xdda5de81, 0x7b4c32b1, 0xdd9fd10f,
-    0x7b4a8291, 0xdd99c3b2,
-  0x7b48d225, 0xdd93b66a, 0x7b47216c, 0xdd8da938, 0x7b457068, 0xdd879c1b,
-    0x7b43bf17, 0xdd818f13,
-  0x7b420d7a, 0xdd7b8220, 0x7b405b92, 0xdd757543, 0x7b3ea95d, 0xdd6f687b,
-    0x7b3cf6dc, 0xdd695bc9,
-  0x7b3b4410, 0xdd634f2b, 0x7b3990f7, 0xdd5d42a3, 0x7b37dd92, 0xdd573631,
-    0x7b3629e1, 0xdd5129d4,
-  0x7b3475e5, 0xdd4b1d8c, 0x7b32c19c, 0xdd451159, 0x7b310d07, 0xdd3f053c,
-    0x7b2f5826, 0xdd38f935,
-  0x7b2da2fa, 0xdd32ed43, 0x7b2bed81, 0xdd2ce166, 0x7b2a37bc, 0xdd26d59f,
-    0x7b2881ac, 0xdd20c9ed,
-  0x7b26cb4f, 0xdd1abe51, 0x7b2514a6, 0xdd14b2ca, 0x7b235db2, 0xdd0ea759,
-    0x7b21a671, 0xdd089bfe,
-  0x7b1feee5, 0xdd0290b8, 0x7b1e370d, 0xdcfc8588, 0x7b1c7ee8, 0xdcf67a6d,
-    0x7b1ac678, 0xdcf06f68,
-  0x7b190dbc, 0xdcea6478, 0x7b1754b3, 0xdce4599e, 0x7b159b5f, 0xdcde4eda,
-    0x7b13e1bf, 0xdcd8442b,
-  0x7b1227d3, 0xdcd23993, 0x7b106d9b, 0xdccc2f0f, 0x7b0eb318, 0xdcc624a2,
-    0x7b0cf848, 0xdcc01a4a,
-  0x7b0b3d2c, 0xdcba1008, 0x7b0981c5, 0xdcb405dc, 0x7b07c612, 0xdcadfbc5,
-    0x7b060a12, 0xdca7f1c5,
-  0x7b044dc7, 0xdca1e7da, 0x7b029130, 0xdc9bde05, 0x7b00d44d, 0xdc95d446,
-    0x7aff171e, 0xdc8fca9c,
-  0x7afd59a4, 0xdc89c109, 0x7afb9bdd, 0xdc83b78b, 0x7af9ddcb, 0xdc7dae23,
-    0x7af81f6c, 0xdc77a4d2,
-  0x7af660c2, 0xdc719b96, 0x7af4a1cc, 0xdc6b9270, 0x7af2e28b, 0xdc658960,
-    0x7af122fd, 0xdc5f8066,
-  0x7aef6323, 0xdc597781, 0x7aeda2fe, 0xdc536eb3, 0x7aebe28d, 0xdc4d65fb,
-    0x7aea21d0, 0xdc475d59,
-  0x7ae860c7, 0xdc4154cd, 0x7ae69f73, 0xdc3b4c57, 0x7ae4ddd2, 0xdc3543f7,
-    0x7ae31be6, 0xdc2f3bad,
-  0x7ae159ae, 0xdc293379, 0x7adf972a, 0xdc232b5c, 0x7addd45b, 0xdc1d2354,
-    0x7adc113f, 0xdc171b63,
-  0x7ada4dd8, 0xdc111388, 0x7ad88a25, 0xdc0b0bc2, 0x7ad6c626, 0xdc050414,
-    0x7ad501dc, 0xdbfefc7b,
-  0x7ad33d45, 0xdbf8f4f8, 0x7ad17863, 0xdbf2ed8c, 0x7acfb336, 0xdbece636,
-    0x7acdedbc, 0xdbe6def6,
-  0x7acc27f7, 0xdbe0d7cd, 0x7aca61e6, 0xdbdad0b9, 0x7ac89b89, 0xdbd4c9bc,
-    0x7ac6d4e0, 0xdbcec2d6,
-  0x7ac50dec, 0xdbc8bc06, 0x7ac346ac, 0xdbc2b54c, 0x7ac17f20, 0xdbbcaea8,
-    0x7abfb749, 0xdbb6a81b,
-  0x7abdef25, 0xdbb0a1a4, 0x7abc26b7, 0xdbaa9b43, 0x7aba5dfc, 0xdba494f9,
-    0x7ab894f6, 0xdb9e8ec6,
-  0x7ab6cba4, 0xdb9888a8, 0x7ab50206, 0xdb9282a2, 0x7ab3381d, 0xdb8c7cb1,
-    0x7ab16de7, 0xdb8676d8,
-  0x7aafa367, 0xdb807114, 0x7aadd89a, 0xdb7a6b68, 0x7aac0d82, 0xdb7465d1,
-    0x7aaa421e, 0xdb6e6052,
-  0x7aa8766f, 0xdb685ae9, 0x7aa6aa74, 0xdb625596, 0x7aa4de2d, 0xdb5c505a,
-    0x7aa3119a, 0xdb564b35,
-  0x7aa144bc, 0xdb504626, 0x7a9f7793, 0xdb4a412e, 0x7a9daa1d, 0xdb443c4c,
-    0x7a9bdc5c, 0xdb3e3781,
-  0x7a9a0e50, 0xdb3832cd, 0x7a983ff7, 0xdb322e30, 0x7a967153, 0xdb2c29a9,
-    0x7a94a264, 0xdb262539,
-  0x7a92d329, 0xdb2020e0, 0x7a9103a2, 0xdb1a1c9d, 0x7a8f33d0, 0xdb141871,
-    0x7a8d63b2, 0xdb0e145c,
-  0x7a8b9348, 0xdb08105e, 0x7a89c293, 0xdb020c77, 0x7a87f192, 0xdafc08a6,
-    0x7a862046, 0xdaf604ec,
-  0x7a844eae, 0xdaf00149, 0x7a827ccb, 0xdae9fdbd, 0x7a80aa9c, 0xdae3fa48,
-    0x7a7ed821, 0xdaddf6ea,
-  0x7a7d055b, 0xdad7f3a2, 0x7a7b3249, 0xdad1f072, 0x7a795eec, 0xdacbed58,
-    0x7a778b43, 0xdac5ea56,
-  0x7a75b74f, 0xdabfe76a, 0x7a73e30f, 0xdab9e495, 0x7a720e84, 0xdab3e1d8,
-    0x7a7039ad, 0xdaaddf31,
-  0x7a6e648a, 0xdaa7dca1, 0x7a6c8f1c, 0xdaa1da29, 0x7a6ab963, 0xda9bd7c7,
-    0x7a68e35e, 0xda95d57d,
-  0x7a670d0d, 0xda8fd349, 0x7a653671, 0xda89d12d, 0x7a635f8a, 0xda83cf28,
-    0x7a618857, 0xda7dcd3a,
-  0x7a5fb0d8, 0xda77cb63, 0x7a5dd90e, 0xda71c9a3, 0x7a5c00f9, 0xda6bc7fa,
-    0x7a5a2898, 0xda65c669,
-  0x7a584feb, 0xda5fc4ef, 0x7a5676f3, 0xda59c38c, 0x7a549db0, 0xda53c240,
-    0x7a52c421, 0xda4dc10b,
-  0x7a50ea47, 0xda47bfee, 0x7a4f1021, 0xda41bee8, 0x7a4d35b0, 0xda3bbdf9,
-    0x7a4b5af3, 0xda35bd22,
-  0x7a497feb, 0xda2fbc61, 0x7a47a498, 0xda29bbb9, 0x7a45c8f9, 0xda23bb27,
-    0x7a43ed0e, 0xda1dbaad,
-  0x7a4210d8, 0xda17ba4a, 0x7a403457, 0xda11b9ff, 0x7a3e578b, 0xda0bb9cb,
-    0x7a3c7a73, 0xda05b9ae,
-  0x7a3a9d0f, 0xd9ffb9a9, 0x7a38bf60, 0xd9f9b9bb, 0x7a36e166, 0xd9f3b9e5,
-    0x7a350321, 0xd9edba26,
-  0x7a332490, 0xd9e7ba7f, 0x7a3145b3, 0xd9e1baef, 0x7a2f668c, 0xd9dbbb77,
-    0x7a2d8719, 0xd9d5bc16,
-  0x7a2ba75a, 0xd9cfbccd, 0x7a29c750, 0xd9c9bd9b, 0x7a27e6fb, 0xd9c3be81,
-    0x7a26065b, 0xd9bdbf7e,
-  0x7a24256f, 0xd9b7c094, 0x7a224437, 0xd9b1c1c0, 0x7a2062b5, 0xd9abc305,
-    0x7a1e80e7, 0xd9a5c461,
-  0x7a1c9ece, 0xd99fc5d4, 0x7a1abc69, 0xd999c75f, 0x7a18d9b9, 0xd993c902,
-    0x7a16f6be, 0xd98dcabd,
-  0x7a151378, 0xd987cc90, 0x7a132fe6, 0xd981ce7a, 0x7a114c09, 0xd97bd07c,
-    0x7a0f67e0, 0xd975d295,
-  0x7a0d836d, 0xd96fd4c7, 0x7a0b9eae, 0xd969d710, 0x7a09b9a4, 0xd963d971,
-    0x7a07d44e, 0xd95ddbea,
-  0x7a05eead, 0xd957de7a, 0x7a0408c1, 0xd951e123, 0x7a02228a, 0xd94be3e3,
-    0x7a003c07, 0xd945e6bb,
-  0x79fe5539, 0xd93fe9ab, 0x79fc6e20, 0xd939ecb3, 0x79fa86bc, 0xd933efd3,
-    0x79f89f0c, 0xd92df30b,
-  0x79f6b711, 0xd927f65b, 0x79f4cecb, 0xd921f9c3, 0x79f2e63a, 0xd91bfd43,
-    0x79f0fd5d, 0xd91600da,
-  0x79ef1436, 0xd910048a, 0x79ed2ac3, 0xd90a0852, 0x79eb4105, 0xd9040c32,
-    0x79e956fb, 0xd8fe1029,
-  0x79e76ca7, 0xd8f81439, 0x79e58207, 0xd8f21861, 0x79e3971c, 0xd8ec1ca1,
-    0x79e1abe6, 0xd8e620fa,
-  0x79dfc064, 0xd8e0256a, 0x79ddd498, 0xd8da29f2, 0x79dbe880, 0xd8d42e93,
-    0x79d9fc1d, 0xd8ce334c,
-  0x79d80f6f, 0xd8c8381d, 0x79d62276, 0xd8c23d06, 0x79d43532, 0xd8bc4207,
-    0x79d247a2, 0xd8b64720,
-  0x79d059c8, 0xd8b04c52, 0x79ce6ba2, 0xd8aa519c, 0x79cc7d31, 0xd8a456ff,
-    0x79ca8e75, 0xd89e5c79,
-  0x79c89f6e, 0xd898620c, 0x79c6b01b, 0xd89267b7, 0x79c4c07e, 0xd88c6d7b,
-    0x79c2d095, 0xd8867356,
-  0x79c0e062, 0xd880794b, 0x79beefe3, 0xd87a7f57, 0x79bcff19, 0xd874857c,
-    0x79bb0e04, 0xd86e8bb9,
-  0x79b91ca4, 0xd868920f, 0x79b72af9, 0xd862987d, 0x79b53903, 0xd85c9f04,
-    0x79b346c2, 0xd856a5a3,
-  0x79b15435, 0xd850ac5a, 0x79af615e, 0xd84ab32a, 0x79ad6e3c, 0xd844ba13,
-    0x79ab7ace, 0xd83ec114,
-  0x79a98715, 0xd838c82d, 0x79a79312, 0xd832cf5f, 0x79a59ec3, 0xd82cd6aa,
-    0x79a3aa29, 0xd826de0d,
-  0x79a1b545, 0xd820e589, 0x799fc015, 0xd81aed1d, 0x799dca9a, 0xd814f4ca,
-    0x799bd4d4, 0xd80efc8f,
-  0x7999dec4, 0xd809046e, 0x7997e868, 0xd8030c64, 0x7995f1c1, 0xd7fd1474,
-    0x7993facf, 0xd7f71c9c,
-  0x79920392, 0xd7f124dd, 0x79900c0a, 0xd7eb2d37, 0x798e1438, 0xd7e535a9,
-    0x798c1c1a, 0xd7df3e34,
-  0x798a23b1, 0xd7d946d8, 0x79882afd, 0xd7d34f94, 0x798631ff, 0xd7cd586a,
-    0x798438b5, 0xd7c76158,
-  0x79823f20, 0xd7c16a5f, 0x79804541, 0xd7bb737f, 0x797e4b16, 0xd7b57cb7,
-    0x797c50a1, 0xd7af8609,
-  0x797a55e0, 0xd7a98f73, 0x79785ad5, 0xd7a398f6, 0x79765f7f, 0xd79da293,
-    0x797463de, 0xd797ac48,
-  0x797267f2, 0xd791b616, 0x79706bbb, 0xd78bbffc, 0x796e6f39, 0xd785c9fc,
-    0x796c726c, 0xd77fd415,
-  0x796a7554, 0xd779de47, 0x796877f1, 0xd773e892, 0x79667a44, 0xd76df2f6,
-    0x79647c4c, 0xd767fd72,
-  0x79627e08, 0xd7620808, 0x79607f7a, 0xd75c12b7, 0x795e80a1, 0xd7561d7f,
-    0x795c817d, 0xd7502860,
-  0x795a820e, 0xd74a335b, 0x79588255, 0xd7443e6e, 0x79568250, 0xd73e499a,
-    0x79548201, 0xd73854e0,
-  0x79528167, 0xd732603f, 0x79508082, 0xd72c6bb6, 0x794e7f52, 0xd7267748,
-    0x794c7dd7, 0xd72082f2,
-  0x794a7c12, 0xd71a8eb5, 0x79487a01, 0xd7149a92, 0x794677a6, 0xd70ea688,
-    0x79447500, 0xd708b297,
-  0x79427210, 0xd702bec0, 0x79406ed4, 0xd6fccb01, 0x793e6b4e, 0xd6f6d75d,
-    0x793c677d, 0xd6f0e3d1,
-  0x793a6361, 0xd6eaf05f, 0x79385efa, 0xd6e4fd06, 0x79365a49, 0xd6df09c6,
-    0x7934554d, 0xd6d916a0,
-  0x79325006, 0xd6d32393, 0x79304a74, 0xd6cd30a0, 0x792e4497, 0xd6c73dc6,
-    0x792c3e70, 0xd6c14b05,
-  0x792a37fe, 0xd6bb585e, 0x79283141, 0xd6b565d0, 0x79262a3a, 0xd6af735c,
-    0x792422e8, 0xd6a98101,
-  0x79221b4b, 0xd6a38ec0, 0x79201363, 0xd69d9c98, 0x791e0b31, 0xd697aa8a,
-    0x791c02b4, 0xd691b895,
-  0x7919f9ec, 0xd68bc6ba, 0x7917f0d9, 0xd685d4f9, 0x7915e77c, 0xd67fe351,
-    0x7913ddd4, 0xd679f1c2,
-  0x7911d3e2, 0xd674004e, 0x790fc9a4, 0xd66e0ef2, 0x790dbf1d, 0xd6681db1,
-    0x790bb44a, 0xd6622c89,
-  0x7909a92d, 0xd65c3b7b, 0x79079dc5, 0xd6564a87, 0x79059212, 0xd65059ac,
-    0x79038615, 0xd64a68eb,
-  0x790179cd, 0xd6447844, 0x78ff6d3b, 0xd63e87b6, 0x78fd605d, 0xd6389742,
-    0x78fb5336, 0xd632a6e8,
-  0x78f945c3, 0xd62cb6a8, 0x78f73806, 0xd626c681, 0x78f529fe, 0xd620d675,
-    0x78f31bac, 0xd61ae682,
-  0x78f10d0f, 0xd614f6a9, 0x78eefe28, 0xd60f06ea, 0x78eceef6, 0xd6091745,
-    0x78eadf79, 0xd60327b9,
-  0x78e8cfb2, 0xd5fd3848, 0x78e6bfa0, 0xd5f748f0, 0x78e4af44, 0xd5f159b3,
-    0x78e29e9d, 0xd5eb6a8f,
-  0x78e08dab, 0xd5e57b85, 0x78de7c6f, 0xd5df8c96, 0x78dc6ae8, 0xd5d99dc0,
-    0x78da5917, 0xd5d3af04,
-  0x78d846fb, 0xd5cdc062, 0x78d63495, 0xd5c7d1db, 0x78d421e4, 0xd5c1e36d,
-    0x78d20ee9, 0xd5bbf519,
-  0x78cffba3, 0xd5b606e0, 0x78cde812, 0xd5b018c0, 0x78cbd437, 0xd5aa2abb,
-    0x78c9c012, 0xd5a43cd0,
-  0x78c7aba2, 0xd59e4eff, 0x78c596e7, 0xd5986148, 0x78c381e2, 0xd59273ab,
-    0x78c16c93, 0xd58c8628,
-  0x78bf56f9, 0xd58698c0, 0x78bd4114, 0xd580ab72, 0x78bb2ae5, 0xd57abe3d,
-    0x78b9146c, 0xd574d124,
-  0x78b6fda8, 0xd56ee424, 0x78b4e69a, 0xd568f73f, 0x78b2cf41, 0xd5630a74,
-    0x78b0b79e, 0xd55d1dc3,
-  0x78ae9fb0, 0xd557312d, 0x78ac8778, 0xd55144b0, 0x78aa6ef5, 0xd54b584f,
-    0x78a85628, 0xd5456c07,
-  0x78a63d11, 0xd53f7fda, 0x78a423af, 0xd53993c7, 0x78a20a03, 0xd533a7cf,
-    0x789ff00c, 0xd52dbbf1,
-  0x789dd5cb, 0xd527d02e, 0x789bbb3f, 0xd521e484, 0x7899a06a, 0xd51bf8f6,
-    0x78978549, 0xd5160d82,
-  0x789569df, 0xd5102228, 0x78934e2a, 0xd50a36e9, 0x7891322a, 0xd5044bc4,
-    0x788f15e0, 0xd4fe60ba,
-  0x788cf94c, 0xd4f875ca, 0x788adc6e, 0xd4f28af5, 0x7888bf45, 0xd4eca03a,
-    0x7886a1d1, 0xd4e6b59a,
-  0x78848414, 0xd4e0cb15, 0x7882660c, 0xd4dae0aa, 0x788047ba, 0xd4d4f65a,
-    0x787e291d, 0xd4cf0c24,
-  0x787c0a36, 0xd4c92209, 0x7879eb05, 0xd4c33809, 0x7877cb89, 0xd4bd4e23,
-    0x7875abc3, 0xd4b76458,
-  0x78738bb3, 0xd4b17aa8, 0x78716b59, 0xd4ab9112, 0x786f4ab4, 0xd4a5a798,
-    0x786d29c5, 0xd49fbe37,
-  0x786b088c, 0xd499d4f2, 0x7868e708, 0xd493ebc8, 0x7866c53a, 0xd48e02b8,
-    0x7864a322, 0xd48819c3,
-  0x786280bf, 0xd48230e9, 0x78605e13, 0xd47c4829, 0x785e3b1c, 0xd4765f85,
-    0x785c17db, 0xd47076fb,
-  0x7859f44f, 0xd46a8e8d, 0x7857d079, 0xd464a639, 0x7855ac5a, 0xd45ebe00,
-    0x785387ef, 0xd458d5e2,
-  0x7851633b, 0xd452eddf, 0x784f3e3c, 0xd44d05f6, 0x784d18f4, 0xd4471e29,
-    0x784af361, 0xd4413677,
-  0x7848cd83, 0xd43b4ee0, 0x7846a75c, 0xd4356763, 0x784480ea, 0xd42f8002,
-    0x78425a2f, 0xd42998bc,
-  0x78403329, 0xd423b191, 0x783e0bd9, 0xd41dca81, 0x783be43e, 0xd417e38c,
-    0x7839bc5a, 0xd411fcb2,
-  0x7837942b, 0xd40c15f3, 0x78356bb2, 0xd4062f4f, 0x783342ef, 0xd40048c6,
-    0x783119e2, 0xd3fa6259,
-  0x782ef08b, 0xd3f47c06, 0x782cc6ea, 0xd3ee95cf, 0x782a9cfe, 0xd3e8afb3,
-    0x782872c8, 0xd3e2c9b2,
-  0x78264849, 0xd3dce3cd, 0x78241d7f, 0xd3d6fe03, 0x7821f26b, 0xd3d11853,
-    0x781fc70d, 0xd3cb32c0,
-  0x781d9b65, 0xd3c54d47, 0x781b6f72, 0xd3bf67ea, 0x78194336, 0xd3b982a8,
-    0x781716b0, 0xd3b39d81,
-  0x7814e9df, 0xd3adb876, 0x7812bcc4, 0xd3a7d385, 0x78108f60, 0xd3a1eeb1,
-    0x780e61b1, 0xd39c09f7,
-  0x780c33b8, 0xd396255a, 0x780a0575, 0xd39040d7, 0x7807d6e9, 0xd38a5c70,
-    0x7805a812, 0xd3847824,
-  0x780378f1, 0xd37e93f4, 0x78014986, 0xd378afdf, 0x77ff19d1, 0xd372cbe6,
-    0x77fce9d2, 0xd36ce808,
-  0x77fab989, 0xd3670446, 0x77f888f6, 0xd361209f, 0x77f65819, 0xd35b3d13,
-    0x77f426f2, 0xd35559a4,
-  0x77f1f581, 0xd34f764f, 0x77efc3c5, 0xd3499317, 0x77ed91c0, 0xd343affa,
-    0x77eb5f71, 0xd33dccf8,
-  0x77e92cd9, 0xd337ea12, 0x77e6f9f6, 0xd3320748, 0x77e4c6c9, 0xd32c2499,
-    0x77e29352, 0xd3264206,
-  0x77e05f91, 0xd3205f8f, 0x77de2b86, 0xd31a7d33, 0x77dbf732, 0xd3149af3,
-    0x77d9c293, 0xd30eb8cf,
-  0x77d78daa, 0xd308d6c7, 0x77d55878, 0xd302f4da, 0x77d322fc, 0xd2fd1309,
-    0x77d0ed35, 0xd2f73154,
-  0x77ceb725, 0xd2f14fba, 0x77cc80cb, 0xd2eb6e3c, 0x77ca4a27, 0xd2e58cdb,
-    0x77c81339, 0xd2dfab95,
-  0x77c5dc01, 0xd2d9ca6a, 0x77c3a47f, 0xd2d3e95c, 0x77c16cb4, 0xd2ce0869,
-    0x77bf349f, 0xd2c82793,
-  0x77bcfc3f, 0xd2c246d8, 0x77bac396, 0xd2bc6639, 0x77b88aa3, 0xd2b685b6,
-    0x77b65166, 0xd2b0a54f,
-  0x77b417df, 0xd2aac504, 0x77b1de0f, 0xd2a4e4d5, 0x77afa3f5, 0xd29f04c2,
-    0x77ad6990, 0xd29924cb,
-  0x77ab2ee2, 0xd29344f0, 0x77a8f3ea, 0xd28d6531, 0x77a6b8a9, 0xd287858e,
-    0x77a47d1d, 0xd281a607,
-  0x77a24148, 0xd27bc69c, 0x77a00529, 0xd275e74d, 0x779dc8c0, 0xd270081b,
-    0x779b8c0e, 0xd26a2904,
-  0x77994f11, 0xd2644a0a, 0x779711cb, 0xd25e6b2b, 0x7794d43b, 0xd2588c69,
-    0x77929661, 0xd252adc3,
-  0x7790583e, 0xd24ccf39, 0x778e19d0, 0xd246f0cb, 0x778bdb19, 0xd241127a,
-    0x77899c19, 0xd23b3444,
-  0x77875cce, 0xd235562b, 0x77851d3a, 0xd22f782f, 0x7782dd5c, 0xd2299a4e,
-    0x77809d35, 0xd223bc8a,
-  0x777e5cc3, 0xd21ddee2, 0x777c1c08, 0xd2180156, 0x7779db03, 0xd21223e7,
-    0x777799b5, 0xd20c4694,
-  0x7775581d, 0xd206695d, 0x7773163b, 0xd2008c43, 0x7770d40f, 0xd1faaf45,
-    0x776e919a, 0xd1f4d263,
-  0x776c4edb, 0xd1eef59e, 0x776a0bd3, 0xd1e918f5, 0x7767c880, 0xd1e33c69,
-    0x776584e5, 0xd1dd5ff9,
-  0x776340ff, 0xd1d783a6, 0x7760fcd0, 0xd1d1a76f, 0x775eb857, 0xd1cbcb54,
-    0x775c7395, 0xd1c5ef56,
-  0x775a2e89, 0xd1c01375, 0x7757e933, 0xd1ba37b0, 0x7755a394, 0xd1b45c08,
-    0x77535dab, 0xd1ae807c,
-  0x77511778, 0xd1a8a50d, 0x774ed0fc, 0xd1a2c9ba, 0x774c8a36, 0xd19cee84,
-    0x774a4327, 0xd197136b,
-  0x7747fbce, 0xd191386e, 0x7745b42c, 0xd18b5d8e, 0x77436c40, 0xd18582ca,
-    0x7741240a, 0xd17fa823,
-  0x773edb8b, 0xd179cd99, 0x773c92c2, 0xd173f32c, 0x773a49b0, 0xd16e18db,
-    0x77380054, 0xd1683ea7,
-  0x7735b6af, 0xd1626490, 0x77336cc0, 0xd15c8a95, 0x77312287, 0xd156b0b7,
-    0x772ed805, 0xd150d6f6,
-  0x772c8d3a, 0xd14afd52, 0x772a4225, 0xd14523cb, 0x7727f6c6, 0xd13f4a60,
-    0x7725ab1f, 0xd1397113,
-  0x77235f2d, 0xd13397e2, 0x772112f2, 0xd12dbece, 0x771ec66e, 0xd127e5d7,
-    0x771c79a0, 0xd1220cfc,
-  0x771a2c88, 0xd11c343f, 0x7717df27, 0xd1165b9f, 0x7715917d, 0xd110831b,
-    0x77134389, 0xd10aaab5,
-  0x7710f54c, 0xd104d26b, 0x770ea6c5, 0xd0fefa3f, 0x770c57f5, 0xd0f9222f,
-    0x770a08dc, 0xd0f34a3d,
-  0x7707b979, 0xd0ed7267, 0x770569cc, 0xd0e79aaf, 0x770319d6, 0xd0e1c313,
-    0x7700c997, 0xd0dbeb95,
-  0x76fe790e, 0xd0d61434, 0x76fc283c, 0xd0d03cf0, 0x76f9d721, 0xd0ca65c9,
-    0x76f785bc, 0xd0c48ebf,
-  0x76f5340e, 0xd0beb7d2, 0x76f2e216, 0xd0b8e102, 0x76f08fd5, 0xd0b30a50,
-    0x76ee3d4b, 0xd0ad33ba,
-  0x76ebea77, 0xd0a75d42, 0x76e9975a, 0xd0a186e7, 0x76e743f4, 0xd09bb0aa,
-    0x76e4f044, 0xd095da89,
-  0x76e29c4b, 0xd0900486, 0x76e04808, 0xd08a2ea0, 0x76ddf37c, 0xd08458d7,
-    0x76db9ea7, 0xd07e832c,
-  0x76d94989, 0xd078ad9e, 0x76d6f421, 0xd072d82d, 0x76d49e70, 0xd06d02da,
-    0x76d24876, 0xd0672da3,
-  0x76cff232, 0xd061588b, 0x76cd9ba5, 0xd05b838f, 0x76cb44cf, 0xd055aeb1,
-    0x76c8edb0, 0xd04fd9f1,
-  0x76c69647, 0xd04a054e, 0x76c43e95, 0xd04430c8, 0x76c1e699, 0xd03e5c60,
-    0x76bf8e55, 0xd0388815,
-  0x76bd35c7, 0xd032b3e7, 0x76badcf0, 0xd02cdfd8, 0x76b883d0, 0xd0270be5,
-    0x76b62a66, 0xd0213810,
-  0x76b3d0b4, 0xd01b6459, 0x76b176b8, 0xd01590bf, 0x76af1c72, 0xd00fbd43,
-    0x76acc1e4, 0xd009e9e4,
-  0x76aa670d, 0xd00416a3, 0x76a80bec, 0xcffe4380, 0x76a5b082, 0xcff8707a,
-    0x76a354cf, 0xcff29d92,
-  0x76a0f8d2, 0xcfeccac7, 0x769e9c8d, 0xcfe6f81a, 0x769c3ffe, 0xcfe1258b,
-    0x7699e326, 0xcfdb531a,
-  0x76978605, 0xcfd580c6, 0x7695289b, 0xcfcfae8f, 0x7692cae8, 0xcfc9dc77,
-    0x76906ceb, 0xcfc40a7c,
-  0x768e0ea6, 0xcfbe389f, 0x768bb017, 0xcfb866e0, 0x7689513f, 0xcfb2953f,
-    0x7686f21e, 0xcfacc3bb,
-  0x768492b4, 0xcfa6f255, 0x76823301, 0xcfa1210d, 0x767fd304, 0xcf9b4fe3,
-    0x767d72bf, 0xcf957ed7,
-  0x767b1231, 0xcf8fade9, 0x7678b159, 0xcf89dd18, 0x76765038, 0xcf840c65,
-    0x7673eecf, 0xcf7e3bd1,
-  0x76718d1c, 0xcf786b5a, 0x766f2b20, 0xcf729b01, 0x766cc8db, 0xcf6ccac6,
-    0x766a664d, 0xcf66faa9,
-  0x76680376, 0xcf612aaa, 0x7665a056, 0xcf5b5ac9, 0x76633ced, 0xcf558b06,
-    0x7660d93b, 0xcf4fbb61,
-  0x765e7540, 0xcf49ebda, 0x765c10fc, 0xcf441c71, 0x7659ac6f, 0xcf3e4d26,
-    0x76574798, 0xcf387dfa,
-  0x7654e279, 0xcf32aeeb, 0x76527d11, 0xcf2cdffa, 0x76501760, 0xcf271128,
-    0x764db166, 0xcf214274,
-  0x764b4b23, 0xcf1b73de, 0x7648e497, 0xcf15a566, 0x76467dc2, 0xcf0fd70c,
-    0x764416a4, 0xcf0a08d0,
-  0x7641af3d, 0xcf043ab3, 0x763f478d, 0xcefe6cb3, 0x763cdf94, 0xcef89ed2,
-    0x763a7752, 0xcef2d110,
-  0x76380ec8, 0xceed036b, 0x7635a5f4, 0xcee735e5, 0x76333cd8, 0xcee1687d,
-    0x7630d372, 0xcedb9b33,
-  0x762e69c4, 0xced5ce08, 0x762bffcd, 0xced000fb, 0x7629958c, 0xceca340c,
-    0x76272b03, 0xcec4673c,
-  0x7624c031, 0xcebe9a8a, 0x76225517, 0xceb8cdf7, 0x761fe9b3, 0xceb30181,
-    0x761d7e06, 0xcead352b,
-  0x761b1211, 0xcea768f2, 0x7618a5d3, 0xcea19cd8, 0x7616394c, 0xce9bd0dd,
-    0x7613cc7c, 0xce960500,
-  0x76115f63, 0xce903942, 0x760ef201, 0xce8a6da2, 0x760c8457, 0xce84a220,
-    0x760a1664, 0xce7ed6bd,
-  0x7607a828, 0xce790b79, 0x760539a3, 0xce734053, 0x7602cad5, 0xce6d754c,
-    0x76005bbf, 0xce67aa63,
-  0x75fdec60, 0xce61df99, 0x75fb7cb8, 0xce5c14ed, 0x75f90cc7, 0xce564a60,
-    0x75f69c8d, 0xce507ff2,
-  0x75f42c0b, 0xce4ab5a2, 0x75f1bb40, 0xce44eb71, 0x75ef4a2c, 0xce3f215f,
-    0x75ecd8cf, 0xce39576c,
-  0x75ea672a, 0xce338d97, 0x75e7f53c, 0xce2dc3e1, 0x75e58305, 0xce27fa49,
-    0x75e31086, 0xce2230d0,
-  0x75e09dbd, 0xce1c6777, 0x75de2aac, 0xce169e3b, 0x75dbb753, 0xce10d51f,
-    0x75d943b0, 0xce0b0c21,
-  0x75d6cfc5, 0xce054343, 0x75d45b92, 0xcdff7a83, 0x75d1e715, 0xcdf9b1e2,
-    0x75cf7250, 0xcdf3e95f,
-  0x75ccfd42, 0xcdee20fc, 0x75ca87ec, 0xcde858b8, 0x75c8124d, 0xcde29092,
-    0x75c59c65, 0xcddcc88b,
-  0x75c32634, 0xcdd700a4, 0x75c0afbb, 0xcdd138db, 0x75be38fa, 0xcdcb7131,
-    0x75bbc1ef, 0xcdc5a9a6,
-  0x75b94a9c, 0xcdbfe23a, 0x75b6d301, 0xcdba1aee, 0x75b45b1d, 0xcdb453c0,
-    0x75b1e2f0, 0xcdae8cb1,
-  0x75af6a7b, 0xcda8c5c1, 0x75acf1bd, 0xcda2fef0, 0x75aa78b6, 0xcd9d383f,
-    0x75a7ff67, 0xcd9771ac,
-  0x75a585cf, 0xcd91ab39, 0x75a30bef, 0xcd8be4e4, 0x75a091c6, 0xcd861eaf,
-    0x759e1755, 0xcd805899,
-  0x759b9c9b, 0xcd7a92a2, 0x75992198, 0xcd74ccca, 0x7596a64d, 0xcd6f0711,
-    0x75942ab9, 0xcd694178,
-  0x7591aedd, 0xcd637bfe, 0x758f32b9, 0xcd5db6a3, 0x758cb64c, 0xcd57f167,
-    0x758a3996, 0xcd522c4a,
-  0x7587bc98, 0xcd4c674d, 0x75853f51, 0xcd46a26f, 0x7582c1c2, 0xcd40ddb0,
-    0x758043ea, 0xcd3b1911,
-  0x757dc5ca, 0xcd355491, 0x757b4762, 0xcd2f9030, 0x7578c8b0, 0xcd29cbee,
-    0x757649b7, 0xcd2407cc,
-  0x7573ca75, 0xcd1e43ca, 0x75714aea, 0xcd187fe6, 0x756ecb18, 0xcd12bc22,
-    0x756c4afc, 0xcd0cf87e,
-  0x7569ca99, 0xcd0734f9, 0x756749ec, 0xcd017193, 0x7564c8f8, 0xccfbae4d,
-    0x756247bb, 0xccf5eb26,
-  0x755fc635, 0xccf0281f, 0x755d4467, 0xccea6538, 0x755ac251, 0xcce4a26f,
-    0x75583ff3, 0xccdedfc7,
-  0x7555bd4c, 0xccd91d3d, 0x75533a5c, 0xccd35ad4, 0x7550b725, 0xcccd988a,
-    0x754e33a4, 0xccc7d65f,
-  0x754bafdc, 0xccc21455, 0x75492bcb, 0xccbc5269, 0x7546a772, 0xccb6909e,
-    0x754422d0, 0xccb0cef2,
-  0x75419de7, 0xccab0d65, 0x753f18b4, 0xcca54bf9, 0x753c933a, 0xcc9f8aac,
-    0x753a0d77, 0xcc99c97e,
-  0x7537876c, 0xcc940871, 0x75350118, 0xcc8e4783, 0x75327a7d, 0xcc8886b5,
-    0x752ff399, 0xcc82c607,
-  0x752d6c6c, 0xcc7d0578, 0x752ae4f8, 0xcc774509, 0x75285d3b, 0xcc7184ba,
-    0x7525d536, 0xcc6bc48b,
-  0x75234ce8, 0xcc66047b, 0x7520c453, 0xcc60448c, 0x751e3b75, 0xcc5a84bc,
-    0x751bb24f, 0xcc54c50c,
-  0x751928e0, 0xcc4f057c, 0x75169f2a, 0xcc49460c, 0x7514152b, 0xcc4386bc,
-    0x75118ae4, 0xcc3dc78b,
-  0x750f0054, 0xcc38087b, 0x750c757d, 0xcc32498a, 0x7509ea5d, 0xcc2c8aba,
-    0x75075ef5, 0xcc26cc09,
-  0x7504d345, 0xcc210d79, 0x7502474d, 0xcc1b4f08, 0x74ffbb0d, 0xcc1590b8,
-    0x74fd2e84, 0xcc0fd287,
-  0x74faa1b3, 0xcc0a1477, 0x74f8149a, 0xcc045686, 0x74f58739, 0xcbfe98b6,
-    0x74f2f990, 0xcbf8db05,
-  0x74f06b9e, 0xcbf31d75, 0x74eddd65, 0xcbed6005, 0x74eb4ee3, 0xcbe7a2b5,
-    0x74e8c01a, 0xcbe1e585,
-  0x74e63108, 0xcbdc2876, 0x74e3a1ae, 0xcbd66b86, 0x74e1120c, 0xcbd0aeb7,
-    0x74de8221, 0xcbcaf208,
-  0x74dbf1ef, 0xcbc53579, 0x74d96175, 0xcbbf790a, 0x74d6d0b2, 0xcbb9bcbb,
-    0x74d43fa8, 0xcbb4008d,
-  0x74d1ae55, 0xcbae447f, 0x74cf1cbb, 0xcba88891, 0x74cc8ad8, 0xcba2ccc4,
-    0x74c9f8ad, 0xcb9d1117,
-  0x74c7663a, 0xcb97558a, 0x74c4d380, 0xcb919a1d, 0x74c2407d, 0xcb8bded1,
-    0x74bfad32, 0xcb8623a5,
-  0x74bd199f, 0xcb80689a, 0x74ba85c4, 0xcb7aadaf, 0x74b7f1a1, 0xcb74f2e4,
-    0x74b55d36, 0xcb6f383a,
-  0x74b2c884, 0xcb697db0, 0x74b03389, 0xcb63c347, 0x74ad9e46, 0xcb5e08fe,
-    0x74ab08bb, 0xcb584ed6,
-  0x74a872e8, 0xcb5294ce, 0x74a5dccd, 0xcb4cdae6, 0x74a3466b, 0xcb47211f,
-    0x74a0afc0, 0xcb416779,
-  0x749e18cd, 0xcb3badf3, 0x749b8193, 0xcb35f48d, 0x7498ea11, 0xcb303b49,
-    0x74965246, 0xcb2a8224,
-  0x7493ba34, 0xcb24c921, 0x749121da, 0xcb1f103e, 0x748e8938, 0xcb19577b,
-    0x748bf04d, 0xcb139ed9,
-  0x7489571c, 0xcb0de658, 0x7486bda2, 0xcb082df8, 0x748423e0, 0xcb0275b8,
-    0x748189d7, 0xcafcbd99,
-  0x747eef85, 0xcaf7059a, 0x747c54ec, 0xcaf14dbd, 0x7479ba0b, 0xcaeb9600,
-    0x74771ee2, 0xcae5de64,
-  0x74748371, 0xcae026e8, 0x7471e7b8, 0xcada6f8d, 0x746f4bb8, 0xcad4b853,
-    0x746caf70, 0xcacf013a,
-  0x746a12df, 0xcac94a42, 0x74677608, 0xcac3936b, 0x7464d8e8, 0xcabddcb4,
-    0x74623b80, 0xcab8261e,
-  0x745f9dd1, 0xcab26fa9, 0x745cffda, 0xcaacb955, 0x745a619b, 0xcaa70322,
-    0x7457c314, 0xcaa14d10,
-  0x74552446, 0xca9b971e, 0x74528530, 0xca95e14e, 0x744fe5d2, 0xca902b9f,
-    0x744d462c, 0xca8a7610,
-  0x744aa63f, 0xca84c0a3, 0x7448060a, 0xca7f0b56, 0x7445658d, 0xca79562b,
-    0x7442c4c8, 0xca73a120,
-  0x744023bc, 0xca6dec37, 0x743d8268, 0xca68376e, 0x743ae0cc, 0xca6282c7,
-    0x74383ee9, 0xca5cce40,
-  0x74359cbd, 0xca5719db, 0x7432fa4b, 0xca516597, 0x74305790, 0xca4bb174,
-    0x742db48e, 0xca45fd72,
-  0x742b1144, 0xca404992, 0x74286db3, 0xca3a95d2, 0x7425c9da, 0xca34e234,
-    0x742325b9, 0xca2f2eb6,
-  0x74208150, 0xca297b5a, 0x741ddca0, 0xca23c820, 0x741b37a9, 0xca1e1506,
-    0x74189269, 0xca18620e,
-  0x7415ece2, 0xca12af37, 0x74134714, 0xca0cfc81, 0x7410a0fe, 0xca0749ec,
-    0x740dfaa0, 0xca019779,
-  0x740b53fb, 0xc9fbe527, 0x7408ad0e, 0xc9f632f6, 0x740605d9, 0xc9f080e7,
-    0x74035e5d, 0xc9eacef9,
-  0x7400b69a, 0xc9e51d2d, 0x73fe0e8f, 0xc9df6b81, 0x73fb663c, 0xc9d9b9f7,
-    0x73f8bda2, 0xc9d4088f,
-  0x73f614c0, 0xc9ce5748, 0x73f36b97, 0xc9c8a622, 0x73f0c226, 0xc9c2f51e,
-    0x73ee186e, 0xc9bd443c,
-  0x73eb6e6e, 0xc9b7937a, 0x73e8c426, 0xc9b1e2db, 0x73e61997, 0xc9ac325d,
-    0x73e36ec1, 0xc9a68200,
-  0x73e0c3a3, 0xc9a0d1c5, 0x73de183e, 0xc99b21ab, 0x73db6c91, 0xc99571b3,
-    0x73d8c09d, 0xc98fc1dc,
-  0x73d61461, 0xc98a1227, 0x73d367de, 0xc9846294, 0x73d0bb13, 0xc97eb322,
-    0x73ce0e01, 0xc97903d2,
-  0x73cb60a8, 0xc97354a4, 0x73c8b307, 0xc96da597, 0x73c6051f, 0xc967f6ac,
-    0x73c356ef, 0xc96247e2,
-  0x73c0a878, 0xc95c993a, 0x73bdf9b9, 0xc956eab4, 0x73bb4ab3, 0xc9513c50,
-    0x73b89b66, 0xc94b8e0d,
-  0x73b5ebd1, 0xc945dfec, 0x73b33bf5, 0xc94031ed, 0x73b08bd1, 0xc93a8410,
-    0x73addb67, 0xc934d654,
-  0x73ab2ab4, 0xc92f28ba, 0x73a879bb, 0xc9297b42, 0x73a5c87a, 0xc923cdec,
-    0x73a316f2, 0xc91e20b8,
-  0x73a06522, 0xc91873a5, 0x739db30b, 0xc912c6b5, 0x739b00ad, 0xc90d19e6,
-    0x73984e07, 0xc9076d39,
-  0x73959b1b, 0xc901c0ae, 0x7392e7e6, 0xc8fc1445, 0x7390346b, 0xc8f667fe,
-    0x738d80a8, 0xc8f0bbd9,
-  0x738acc9e, 0xc8eb0fd6, 0x7388184d, 0xc8e563f5, 0x738563b5, 0xc8dfb836,
-    0x7382aed5, 0xc8da0c99,
-  0x737ff9ae, 0xc8d4611d, 0x737d4440, 0xc8ceb5c4, 0x737a8e8a, 0xc8c90a8d,
-    0x7377d88d, 0xc8c35f78,
-  0x73752249, 0xc8bdb485, 0x73726bbe, 0xc8b809b4, 0x736fb4ec, 0xc8b25f06,
-    0x736cfdd2, 0xc8acb479,
-  0x736a4671, 0xc8a70a0e, 0x73678ec9, 0xc8a15fc6, 0x7364d6da, 0xc89bb5a0,
-    0x73621ea4, 0xc8960b9c,
-  0x735f6626, 0xc89061ba, 0x735cad61, 0xc88ab7fa, 0x7359f456, 0xc8850e5d,
-    0x73573b03, 0xc87f64e2,
-  0x73548168, 0xc879bb89, 0x7351c787, 0xc8741252, 0x734f0d5f, 0xc86e693d,
-    0x734c52ef, 0xc868c04b,
-  0x73499838, 0xc863177b, 0x7346dd3a, 0xc85d6ece, 0x734421f6, 0xc857c642,
-    0x7341666a, 0xc8521dd9,
-  0x733eaa96, 0xc84c7593, 0x733bee7c, 0xc846cd6e, 0x7339321b, 0xc841256d,
-    0x73367572, 0xc83b7d8d,
-  0x7333b883, 0xc835d5d0, 0x7330fb4d, 0xc8302e35, 0x732e3dcf, 0xc82a86bd,
-    0x732b800a, 0xc824df67,
-  0x7328c1ff, 0xc81f3834, 0x732603ac, 0xc8199123, 0x73234512, 0xc813ea35,
-    0x73208632, 0xc80e4369,
-  0x731dc70a, 0xc8089cbf, 0x731b079b, 0xc802f638, 0x731847e5, 0xc7fd4fd4,
-    0x731587e8, 0xc7f7a992,
-  0x7312c7a5, 0xc7f20373, 0x7310071a, 0xc7ec5d76, 0x730d4648, 0xc7e6b79c,
-    0x730a8530, 0xc7e111e5,
-  0x7307c3d0, 0xc7db6c50, 0x73050229, 0xc7d5c6de, 0x7302403c, 0xc7d0218e,
-    0x72ff7e07, 0xc7ca7c61,
-  0x72fcbb8c, 0xc7c4d757, 0x72f9f8c9, 0xc7bf3270, 0x72f735c0, 0xc7b98dab,
-    0x72f47270, 0xc7b3e909,
-  0x72f1aed9, 0xc7ae4489, 0x72eeeafb, 0xc7a8a02c, 0x72ec26d6, 0xc7a2fbf3,
-    0x72e9626a, 0xc79d57db,
-  0x72e69db7, 0xc797b3e7, 0x72e3d8be, 0xc7921015, 0x72e1137d, 0xc78c6c67,
-    0x72de4df6, 0xc786c8db,
-  0x72db8828, 0xc7812572, 0x72d8c213, 0xc77b822b, 0x72d5fbb7, 0xc775df08,
-    0x72d33514, 0xc7703c08,
-  0x72d06e2b, 0xc76a992a, 0x72cda6fb, 0xc764f66f, 0x72cadf83, 0xc75f53d7,
-    0x72c817c6, 0xc759b163,
-  0x72c54fc1, 0xc7540f11, 0x72c28775, 0xc74e6ce2, 0x72bfbee3, 0xc748cad6,
-    0x72bcf60a, 0xc74328ed,
-  0x72ba2cea, 0xc73d8727, 0x72b76383, 0xc737e584, 0x72b499d6, 0xc7324404,
-    0x72b1cfe1, 0xc72ca2a7,
-  0x72af05a7, 0xc727016d, 0x72ac3b25, 0xc7216056, 0x72a9705c, 0xc71bbf62,
-    0x72a6a54d, 0xc7161e92,
-  0x72a3d9f7, 0xc7107de4, 0x72a10e5b, 0xc70add5a, 0x729e4277, 0xc7053cf2,
-    0x729b764d, 0xc6ff9cae,
-  0x7298a9dd, 0xc6f9fc8d, 0x7295dd25, 0xc6f45c8f, 0x72931027, 0xc6eebcb5,
-    0x729042e3, 0xc6e91cfd,
-  0x728d7557, 0xc6e37d69, 0x728aa785, 0xc6ddddf8, 0x7287d96c, 0xc6d83eab,
-    0x72850b0d, 0xc6d29f80,
-  0x72823c67, 0xc6cd0079, 0x727f6d7a, 0xc6c76195, 0x727c9e47, 0xc6c1c2d4,
-    0x7279cecd, 0xc6bc2437,
-  0x7276ff0d, 0xc6b685bd, 0x72742f05, 0xc6b0e767, 0x72715eb8, 0xc6ab4933,
-    0x726e8e23, 0xc6a5ab23,
-  0x726bbd48, 0xc6a00d37, 0x7268ec27, 0xc69a6f6e, 0x72661abf, 0xc694d1c8,
-    0x72634910, 0xc68f3446,
-  0x7260771b, 0xc68996e7, 0x725da4df, 0xc683f9ab, 0x725ad25d, 0xc67e5c93,
-    0x7257ff94, 0xc678bf9f,
-  0x72552c85, 0xc67322ce, 0x7252592f, 0xc66d8620, 0x724f8593, 0xc667e996,
-    0x724cb1b0, 0xc6624d30,
-  0x7249dd86, 0xc65cb0ed, 0x72470916, 0xc65714cd, 0x72443460, 0xc65178d1,
-    0x72415f63, 0xc64bdcf9,
-  0x723e8a20, 0xc6464144, 0x723bb496, 0xc640a5b3, 0x7238dec5, 0xc63b0a46,
-    0x723608af, 0xc6356efc,
-  0x72333251, 0xc62fd3d6, 0x72305bae, 0xc62a38d4, 0x722d84c4, 0xc6249df5,
-    0x722aad93, 0xc61f033a,
-  0x7227d61c, 0xc61968a2, 0x7224fe5f, 0xc613ce2f, 0x7222265b, 0xc60e33df,
-    0x721f4e11, 0xc60899b2,
-  0x721c7580, 0xc602ffaa, 0x72199ca9, 0xc5fd65c5, 0x7216c38c, 0xc5f7cc04,
-    0x7213ea28, 0xc5f23267,
-  0x7211107e, 0xc5ec98ee, 0x720e368d, 0xc5e6ff98, 0x720b5c57, 0xc5e16667,
-    0x720881d9, 0xc5dbcd59,
-  0x7205a716, 0xc5d6346f, 0x7202cc0c, 0xc5d09ba9, 0x71fff0bc, 0xc5cb0307,
-    0x71fd1525, 0xc5c56a89,
-  0x71fa3949, 0xc5bfd22e, 0x71f75d25, 0xc5ba39f8, 0x71f480bc, 0xc5b4a1e5,
-    0x71f1a40c, 0xc5af09f7,
-  0x71eec716, 0xc5a9722c, 0x71ebe9da, 0xc5a3da86, 0x71e90c57, 0xc59e4303,
-    0x71e62e8f, 0xc598aba5,
-  0x71e35080, 0xc593146a, 0x71e0722a, 0xc58d7d54, 0x71dd938f, 0xc587e661,
-    0x71dab4ad, 0xc5824f93,
-  0x71d7d585, 0xc57cb8e9, 0x71d4f617, 0xc5772263, 0x71d21662, 0xc5718c00,
-    0x71cf3667, 0xc56bf5c2,
-  0x71cc5626, 0xc5665fa9, 0x71c9759f, 0xc560c9b3, 0x71c694d2, 0xc55b33e2,
-    0x71c3b3bf, 0xc5559e34,
-  0x71c0d265, 0xc55008ab, 0x71bdf0c5, 0xc54a7346, 0x71bb0edf, 0xc544de05,
-    0x71b82cb3, 0xc53f48e9,
-  0x71b54a41, 0xc539b3f1, 0x71b26788, 0xc5341f1d, 0x71af848a, 0xc52e8a6d,
-    0x71aca145, 0xc528f5e1,
-  0x71a9bdba, 0xc523617a, 0x71a6d9e9, 0xc51dcd37, 0x71a3f5d2, 0xc5183919,
-    0x71a11175, 0xc512a51f,
-  0x719e2cd2, 0xc50d1149, 0x719b47e9, 0xc5077d97, 0x719862b9, 0xc501ea0a,
-    0x71957d44, 0xc4fc56a2,
-  0x71929789, 0xc4f6c35d, 0x718fb187, 0xc4f1303d, 0x718ccb3f, 0xc4eb9d42,
-    0x7189e4b2, 0xc4e60a6b,
-  0x7186fdde, 0xc4e077b8, 0x718416c4, 0xc4dae52a, 0x71812f65, 0xc4d552c1,
-    0x717e47bf, 0xc4cfc07c,
-  0x717b5fd3, 0xc4ca2e5b, 0x717877a1, 0xc4c49c5f, 0x71758f29, 0xc4bf0a87,
-    0x7172a66c, 0xc4b978d4,
-  0x716fbd68, 0xc4b3e746, 0x716cd41e, 0xc4ae55dc, 0x7169ea8f, 0xc4a8c497,
-    0x716700b9, 0xc4a33376,
-  0x7164169d, 0xc49da27a, 0x71612c3c, 0xc49811a3, 0x715e4194, 0xc49280f0,
-    0x715b56a7, 0xc48cf062,
-  0x71586b74, 0xc4875ff9, 0x71557ffa, 0xc481cfb4, 0x7152943b, 0xc47c3f94,
-    0x714fa836, 0xc476af98,
-  0x714cbbeb, 0xc4711fc2, 0x7149cf5a, 0xc46b9010, 0x7146e284, 0xc4660083,
-    0x7143f567, 0xc460711b,
-  0x71410805, 0xc45ae1d7, 0x713e1a5c, 0xc45552b8, 0x713b2c6e, 0xc44fc3be,
-    0x71383e3a, 0xc44a34e9,
-  0x71354fc0, 0xc444a639, 0x71326101, 0xc43f17ad, 0x712f71fb, 0xc4398947,
-    0x712c82b0, 0xc433fb05,
-  0x7129931f, 0xc42e6ce8, 0x7126a348, 0xc428def0, 0x7123b32b, 0xc423511d,
-    0x7120c2c8, 0xc41dc36f,
-  0x711dd220, 0xc41835e6, 0x711ae132, 0xc412a882, 0x7117effe, 0xc40d1b42,
-    0x7114fe84, 0xc4078e28,
-  0x71120cc5, 0xc4020133, 0x710f1ac0, 0xc3fc7462, 0x710c2875, 0xc3f6e7b7,
-    0x710935e4, 0xc3f15b31,
-  0x7106430e, 0xc3ebced0, 0x71034ff2, 0xc3e64294, 0x71005c90, 0xc3e0b67d,
-    0x70fd68e9, 0xc3db2a8b,
-  0x70fa74fc, 0xc3d59ebe, 0x70f780c9, 0xc3d01316, 0x70f48c50, 0xc3ca8793,
-    0x70f19792, 0xc3c4fc36,
-  0x70eea28e, 0xc3bf70fd, 0x70ebad45, 0xc3b9e5ea, 0x70e8b7b5, 0xc3b45afc,
-    0x70e5c1e1, 0xc3aed034,
-  0x70e2cbc6, 0xc3a94590, 0x70dfd566, 0xc3a3bb12, 0x70dcdec0, 0xc39e30b8,
-    0x70d9e7d5, 0xc398a685,
-  0x70d6f0a4, 0xc3931c76, 0x70d3f92d, 0xc38d928d, 0x70d10171, 0xc38808c9,
-    0x70ce096f, 0xc3827f2a,
-  0x70cb1128, 0xc37cf5b0, 0x70c8189b, 0xc3776c5c, 0x70c51fc8, 0xc371e32d,
-    0x70c226b0, 0xc36c5a24,
-  0x70bf2d53, 0xc366d140, 0x70bc33b0, 0xc3614881, 0x70b939c7, 0xc35bbfe8,
-    0x70b63f99, 0xc3563774,
-  0x70b34525, 0xc350af26, 0x70b04a6b, 0xc34b26fc, 0x70ad4f6d, 0xc3459ef9,
-    0x70aa5428, 0xc340171b,
-  0x70a7589f, 0xc33a8f62, 0x70a45ccf, 0xc33507cf, 0x70a160ba, 0xc32f8061,
-    0x709e6460, 0xc329f919,
-  0x709b67c0, 0xc32471f7, 0x70986adb, 0xc31eeaf9, 0x70956db1, 0xc3196422,
-    0x70927041, 0xc313dd70,
-  0x708f728b, 0xc30e56e4, 0x708c7490, 0xc308d07d, 0x70897650, 0xc3034a3c,
-    0x708677ca, 0xc2fdc420,
-  0x708378ff, 0xc2f83e2a, 0x708079ee, 0xc2f2b85a, 0x707d7a98, 0xc2ed32af,
-    0x707a7afd, 0xc2e7ad2a,
-  0x70777b1c, 0xc2e227cb, 0x70747af6, 0xc2dca291, 0x70717a8a, 0xc2d71d7e,
-    0x706e79d9, 0xc2d1988f,
-  0x706b78e3, 0xc2cc13c7, 0x706877a7, 0xc2c68f24, 0x70657626, 0xc2c10aa7,
-    0x70627460, 0xc2bb8650,
-  0x705f7255, 0xc2b6021f, 0x705c7004, 0xc2b07e14, 0x70596d6d, 0xc2aafa2e,
-    0x70566a92, 0xc2a5766e,
-  0x70536771, 0xc29ff2d4, 0x7050640b, 0xc29a6f60, 0x704d6060, 0xc294ec12,
-    0x704a5c6f, 0xc28f68e9,
-  0x70475839, 0xc289e5e7, 0x704453be, 0xc284630a, 0x70414efd, 0xc27ee054,
-    0x703e49f8, 0xc2795dc3,
-  0x703b44ad, 0xc273db58, 0x70383f1d, 0xc26e5913, 0x70353947, 0xc268d6f5,
-    0x7032332d, 0xc26354fc,
-  0x702f2ccd, 0xc25dd329, 0x702c2628, 0xc258517c, 0x70291f3e, 0xc252cff5,
-    0x7026180e, 0xc24d4e95,
-  0x7023109a, 0xc247cd5a, 0x702008e0, 0xc2424c46, 0x701d00e1, 0xc23ccb57,
-    0x7019f89d, 0xc2374a8f,
-  0x7016f014, 0xc231c9ec, 0x7013e746, 0xc22c4970, 0x7010de32, 0xc226c91a,
-    0x700dd4da, 0xc22148ea,
-  0x700acb3c, 0xc21bc8e1, 0x7007c159, 0xc21648fd, 0x7004b731, 0xc210c940,
-    0x7001acc4, 0xc20b49a9,
-  0x6ffea212, 0xc205ca38, 0x6ffb971b, 0xc2004aed, 0x6ff88bde, 0xc1facbc9,
-    0x6ff5805d, 0xc1f54cca,
-  0x6ff27497, 0xc1efcdf3, 0x6fef688b, 0xc1ea4f41, 0x6fec5c3b, 0xc1e4d0b6,
-    0x6fe94fa5, 0xc1df5251,
-  0x6fe642ca, 0xc1d9d412, 0x6fe335ab, 0xc1d455f9, 0x6fe02846, 0xc1ced807,
-    0x6fdd1a9c, 0xc1c95a3c,
-  0x6fda0cae, 0xc1c3dc97, 0x6fd6fe7a, 0xc1be5f18, 0x6fd3f001, 0xc1b8e1bf,
-    0x6fd0e144, 0xc1b3648d,
-  0x6fcdd241, 0xc1ade781, 0x6fcac2fa, 0xc1a86a9c, 0x6fc7b36d, 0xc1a2edde,
-    0x6fc4a39c, 0xc19d7145,
-  0x6fc19385, 0xc197f4d4, 0x6fbe832a, 0xc1927888, 0x6fbb728a, 0xc18cfc63,
-    0x6fb861a4, 0xc1878065,
-  0x6fb5507a, 0xc182048d, 0x6fb23f0b, 0xc17c88dc, 0x6faf2d57, 0xc1770d52,
-    0x6fac1b5f, 0xc17191ee,
-  0x6fa90921, 0xc16c16b0, 0x6fa5f69e, 0xc1669b99, 0x6fa2e3d7, 0xc16120a9,
-    0x6f9fd0cb, 0xc15ba5df,
-  0x6f9cbd79, 0xc1562b3d, 0x6f99a9e3, 0xc150b0c0, 0x6f969608, 0xc14b366b,
-    0x6f9381e9, 0xc145bc3c,
-  0x6f906d84, 0xc1404233, 0x6f8d58db, 0xc13ac852, 0x6f8a43ed, 0xc1354e97,
-    0x6f872eba, 0xc12fd503,
-  0x6f841942, 0xc12a5b95, 0x6f810386, 0xc124e24f, 0x6f7ded84, 0xc11f692f,
-    0x6f7ad73e, 0xc119f036,
-  0x6f77c0b3, 0xc1147764, 0x6f74a9e4, 0xc10efeb8, 0x6f7192cf, 0xc1098634,
-    0x6f6e7b76, 0xc1040dd6,
-  0x6f6b63d8, 0xc0fe959f, 0x6f684bf6, 0xc0f91d8f, 0x6f6533ce, 0xc0f3a5a6,
-    0x6f621b62, 0xc0ee2de3,
-  0x6f5f02b2, 0xc0e8b648, 0x6f5be9bc, 0xc0e33ed4, 0x6f58d082, 0xc0ddc786,
-    0x6f55b703, 0xc0d8505f,
-  0x6f529d40, 0xc0d2d960, 0x6f4f8338, 0xc0cd6287, 0x6f4c68eb, 0xc0c7ebd6,
-    0x6f494e5a, 0xc0c2754b,
-  0x6f463383, 0xc0bcfee7, 0x6f431869, 0xc0b788ab, 0x6f3ffd09, 0xc0b21295,
-    0x6f3ce165, 0xc0ac9ca6,
-  0x6f39c57d, 0xc0a726df, 0x6f36a94f, 0xc0a1b13e, 0x6f338cde, 0xc09c3bc5,
-    0x6f307027, 0xc096c673,
-  0x6f2d532c, 0xc0915148, 0x6f2a35ed, 0xc08bdc44, 0x6f271868, 0xc0866767,
-    0x6f23faa0, 0xc080f2b1,
-  0x6f20dc92, 0xc07b7e23, 0x6f1dbe41, 0xc07609bb, 0x6f1a9faa, 0xc070957b,
-    0x6f1780cf, 0xc06b2162,
-  0x6f1461b0, 0xc065ad70, 0x6f11424c, 0xc06039a6, 0x6f0e22a3, 0xc05ac603,
-    0x6f0b02b6, 0xc0555287,
-  0x6f07e285, 0xc04fdf32, 0x6f04c20f, 0xc04a6c05, 0x6f01a155, 0xc044f8fe,
-    0x6efe8056, 0xc03f8620,
-  0x6efb5f12, 0xc03a1368, 0x6ef83d8a, 0xc034a0d8, 0x6ef51bbe, 0xc02f2e6f,
-    0x6ef1f9ad, 0xc029bc2e,
-  0x6eeed758, 0xc0244a14, 0x6eebb4bf, 0xc01ed821, 0x6ee891e1, 0xc0196656,
-    0x6ee56ebe, 0xc013f4b2,
-  0x6ee24b57, 0xc00e8336, 0x6edf27ac, 0xc00911e1, 0x6edc03bc, 0xc003a0b3,
-    0x6ed8df88, 0xbffe2fad,
-  0x6ed5bb10, 0xbff8bece, 0x6ed29653, 0xbff34e17, 0x6ecf7152, 0xbfeddd88,
-    0x6ecc4c0d, 0xbfe86d20,
-  0x6ec92683, 0xbfe2fcdf, 0x6ec600b5, 0xbfdd8cc6, 0x6ec2daa2, 0xbfd81cd5,
-    0x6ebfb44b, 0xbfd2ad0b,
-  0x6ebc8db0, 0xbfcd3d69, 0x6eb966d1, 0xbfc7cdee, 0x6eb63fad, 0xbfc25e9b,
-    0x6eb31845, 0xbfbcef70,
-  0x6eaff099, 0xbfb7806c, 0x6eacc8a8, 0xbfb21190, 0x6ea9a073, 0xbfaca2dc,
-    0x6ea677fa, 0xbfa7344f,
-  0x6ea34f3d, 0xbfa1c5ea, 0x6ea0263b, 0xbf9c57ac, 0x6e9cfcf5, 0xbf96e997,
-    0x6e99d36b, 0xbf917ba9,
-  0x6e96a99d, 0xbf8c0de3, 0x6e937f8a, 0xbf86a044, 0x6e905534, 0xbf8132ce,
-    0x6e8d2a99, 0xbf7bc57f,
-  0x6e89ffb9, 0xbf765858, 0x6e86d496, 0xbf70eb59, 0x6e83a92f, 0xbf6b7e81,
-    0x6e807d83, 0xbf6611d2,
-  0x6e7d5193, 0xbf60a54a, 0x6e7a255f, 0xbf5b38ea, 0x6e76f8e7, 0xbf55ccb2,
-    0x6e73cc2b, 0xbf5060a2,
-  0x6e709f2a, 0xbf4af4ba, 0x6e6d71e6, 0xbf4588fa, 0x6e6a445d, 0xbf401d61,
-    0x6e671690, 0xbf3ab1f1,
-  0x6e63e87f, 0xbf3546a8, 0x6e60ba2a, 0xbf2fdb88, 0x6e5d8b91, 0xbf2a708f,
-    0x6e5a5cb4, 0xbf2505bf,
-  0x6e572d93, 0xbf1f9b16, 0x6e53fe2e, 0xbf1a3096, 0x6e50ce84, 0xbf14c63d,
-    0x6e4d9e97, 0xbf0f5c0d,
-  0x6e4a6e66, 0xbf09f205, 0x6e473df0, 0xbf048824, 0x6e440d37, 0xbeff1e6c,
-    0x6e40dc39, 0xbef9b4dc,
-  0x6e3daaf8, 0xbef44b74, 0x6e3a7972, 0xbeeee234, 0x6e3747a9, 0xbee9791c,
-    0x6e34159b, 0xbee4102d,
-  0x6e30e34a, 0xbedea765, 0x6e2db0b4, 0xbed93ec6, 0x6e2a7ddb, 0xbed3d64f,
-    0x6e274abe, 0xbece6e00,
-  0x6e24175c, 0xbec905d9, 0x6e20e3b7, 0xbec39ddb, 0x6e1dafce, 0xbebe3605,
-    0x6e1a7ba1, 0xbeb8ce57,
-  0x6e174730, 0xbeb366d1, 0x6e14127b, 0xbeadff74, 0x6e10dd82, 0xbea8983f,
-    0x6e0da845, 0xbea33132,
-  0x6e0a72c5, 0xbe9dca4e, 0x6e073d00, 0xbe986391, 0x6e0406f8, 0xbe92fcfe,
-    0x6e00d0ac, 0xbe8d9692,
-  0x6dfd9a1c, 0xbe88304f, 0x6dfa6348, 0xbe82ca35, 0x6df72c30, 0xbe7d6442,
-    0x6df3f4d4, 0xbe77fe78,
-  0x6df0bd35, 0xbe7298d7, 0x6ded8552, 0xbe6d335e, 0x6dea4d2b, 0xbe67ce0d,
-    0x6de714c0, 0xbe6268e5,
-  0x6de3dc11, 0xbe5d03e6, 0x6de0a31f, 0xbe579f0f, 0x6ddd69e9, 0xbe523a60,
-    0x6dda306f, 0xbe4cd5da,
-  0x6dd6f6b1, 0xbe47717c, 0x6dd3bcaf, 0xbe420d47, 0x6dd0826a, 0xbe3ca93b,
-    0x6dcd47e1, 0xbe374557,
-  0x6dca0d14, 0xbe31e19b, 0x6dc6d204, 0xbe2c7e09, 0x6dc396b0, 0xbe271a9f,
-    0x6dc05b18, 0xbe21b75d,
-  0x6dbd1f3c, 0xbe1c5444, 0x6db9e31d, 0xbe16f154, 0x6db6a6ba, 0xbe118e8c,
-    0x6db36a14, 0xbe0c2bed,
-  0x6db02d29, 0xbe06c977, 0x6daceffb, 0xbe01672a, 0x6da9b28a, 0xbdfc0505,
-    0x6da674d5, 0xbdf6a309,
-  0x6da336dc, 0xbdf14135, 0x6d9ff89f, 0xbdebdf8b, 0x6d9cba1f, 0xbde67e09,
-    0x6d997b5b, 0xbde11cb0,
-  0x6d963c54, 0xbddbbb7f, 0x6d92fd09, 0xbdd65a78, 0x6d8fbd7a, 0xbdd0f999,
-    0x6d8c7da8, 0xbdcb98e3,
-  0x6d893d93, 0xbdc63856, 0x6d85fd39, 0xbdc0d7f2, 0x6d82bc9d, 0xbdbb77b7,
-    0x6d7f7bbc, 0xbdb617a4,
-  0x6d7c3a98, 0xbdb0b7bb, 0x6d78f931, 0xbdab57fa, 0x6d75b786, 0xbda5f862,
-    0x6d727597, 0xbda098f3,
-  0x6d6f3365, 0xbd9b39ad, 0x6d6bf0f0, 0xbd95da91, 0x6d68ae37, 0xbd907b9d,
-    0x6d656b3a, 0xbd8b1cd2,
-  0x6d6227fa, 0xbd85be30, 0x6d5ee477, 0xbd805fb7, 0x6d5ba0b0, 0xbd7b0167,
-    0x6d585ca6, 0xbd75a340,
-  0x6d551858, 0xbd704542, 0x6d51d3c6, 0xbd6ae76d, 0x6d4e8ef2, 0xbd6589c1,
-    0x6d4b49da, 0xbd602c3f,
-  0x6d48047e, 0xbd5acee5, 0x6d44bedf, 0xbd5571b5, 0x6d4178fd, 0xbd5014ad,
-    0x6d3e32d7, 0xbd4ab7cf,
-  0x6d3aec6e, 0xbd455b1a, 0x6d37a5c1, 0xbd3ffe8e, 0x6d345ed1, 0xbd3aa22c,
-    0x6d31179e, 0xbd3545f2,
-  0x6d2dd027, 0xbd2fe9e2, 0x6d2a886e, 0xbd2a8dfb, 0x6d274070, 0xbd25323d,
-    0x6d23f830, 0xbd1fd6a8,
-  0x6d20afac, 0xbd1a7b3d, 0x6d1d66e4, 0xbd151ffb, 0x6d1a1dda, 0xbd0fc4e2,
-    0x6d16d48c, 0xbd0a69f2,
-  0x6d138afb, 0xbd050f2c, 0x6d104126, 0xbcffb48f, 0x6d0cf70f, 0xbcfa5a1b,
-    0x6d09acb4, 0xbcf4ffd1,
-  0x6d066215, 0xbcefa5b0, 0x6d031734, 0xbcea4bb9, 0x6cffcc0f, 0xbce4f1eb,
-    0x6cfc80a7, 0xbcdf9846,
-  0x6cf934fc, 0xbcda3ecb, 0x6cf5e90d, 0xbcd4e579, 0x6cf29cdc, 0xbccf8c50,
-    0x6cef5067, 0xbcca3351,
-  0x6cec03af, 0xbcc4da7b, 0x6ce8b6b4, 0xbcbf81cf, 0x6ce56975, 0xbcba294d,
-    0x6ce21bf4, 0xbcb4d0f4,
-  0x6cdece2f, 0xbcaf78c4, 0x6cdb8027, 0xbcaa20be, 0x6cd831dc, 0xbca4c8e1,
-    0x6cd4e34e, 0xbc9f712e,
-  0x6cd1947c, 0xbc9a19a5, 0x6cce4568, 0xbc94c245, 0x6ccaf610, 0xbc8f6b0f,
-    0x6cc7a676, 0xbc8a1402,
-  0x6cc45698, 0xbc84bd1f, 0x6cc10677, 0xbc7f6665, 0x6cbdb613, 0xbc7a0fd6,
-    0x6cba656c, 0xbc74b96f,
-  0x6cb71482, 0xbc6f6333, 0x6cb3c355, 0xbc6a0d20, 0x6cb071e4, 0xbc64b737,
-    0x6cad2031, 0xbc5f6177,
-  0x6ca9ce3b, 0xbc5a0be2, 0x6ca67c01, 0xbc54b676, 0x6ca32985, 0xbc4f6134,
-    0x6c9fd6c6, 0xbc4a0c1b,
-  0x6c9c83c3, 0xbc44b72c, 0x6c99307e, 0xbc3f6267, 0x6c95dcf6, 0xbc3a0dcc,
-    0x6c92892a, 0xbc34b95b,
-  0x6c8f351c, 0xbc2f6513, 0x6c8be0cb, 0xbc2a10f6, 0x6c888c36, 0xbc24bd02,
-    0x6c85375f, 0xbc1f6938,
-  0x6c81e245, 0xbc1a1598, 0x6c7e8ce8, 0xbc14c221, 0x6c7b3748, 0xbc0f6ed5,
-    0x6c77e165, 0xbc0a1bb3,
-  0x6c748b3f, 0xbc04c8ba, 0x6c7134d7, 0xbbff75ec, 0x6c6dde2b, 0xbbfa2347,
-    0x6c6a873d, 0xbbf4d0cc,
-  0x6c67300b, 0xbbef7e7c, 0x6c63d897, 0xbbea2c55, 0x6c6080e0, 0xbbe4da58,
-    0x6c5d28e6, 0xbbdf8885,
-  0x6c59d0a9, 0xbbda36dd, 0x6c56782a, 0xbbd4e55e, 0x6c531f67, 0xbbcf940a,
-    0x6c4fc662, 0xbbca42df,
-  0x6c4c6d1a, 0xbbc4f1df, 0x6c49138f, 0xbbbfa108, 0x6c45b9c1, 0xbbba505c,
-    0x6c425fb1, 0xbbb4ffda,
-  0x6c3f055d, 0xbbafaf82, 0x6c3baac7, 0xbbaa5f54, 0x6c384fef, 0xbba50f50,
-    0x6c34f4d3, 0xbb9fbf77,
-  0x6c319975, 0xbb9a6fc7, 0x6c2e3dd4, 0xbb952042, 0x6c2ae1f0, 0xbb8fd0e7,
-    0x6c2785ca, 0xbb8a81b6,
-  0x6c242960, 0xbb8532b0, 0x6c20ccb4, 0xbb7fe3d3, 0x6c1d6fc6, 0xbb7a9521,
-    0x6c1a1295, 0xbb754699,
-  0x6c16b521, 0xbb6ff83c, 0x6c13576a, 0xbb6aaa09, 0x6c0ff971, 0xbb655c00,
-    0x6c0c9b35, 0xbb600e21,
-  0x6c093cb6, 0xbb5ac06d, 0x6c05ddf5, 0xbb5572e3, 0x6c027ef1, 0xbb502583,
-    0x6bff1faa, 0xbb4ad84e,
-  0x6bfbc021, 0xbb458b43, 0x6bf86055, 0xbb403e63, 0x6bf50047, 0xbb3af1ad,
-    0x6bf19ff6, 0xbb35a521,
-  0x6bee3f62, 0xbb3058c0, 0x6beade8c, 0xbb2b0c8a, 0x6be77d74, 0xbb25c07d,
-    0x6be41c18, 0xbb20749c,
-  0x6be0ba7b, 0xbb1b28e4, 0x6bdd589a, 0xbb15dd57, 0x6bd9f677, 0xbb1091f5,
-    0x6bd69412, 0xbb0b46bd,
-  0x6bd3316a, 0xbb05fbb0, 0x6bcfce80, 0xbb00b0ce, 0x6bcc6b53, 0xbafb6615,
-    0x6bc907e3, 0xbaf61b88,
-  0x6bc5a431, 0xbaf0d125, 0x6bc2403d, 0xbaeb86ed, 0x6bbedc06, 0xbae63cdf,
-    0x6bbb778d, 0xbae0f2fc,
-  0x6bb812d1, 0xbadba943, 0x6bb4add3, 0xbad65fb5, 0x6bb14892, 0xbad11652,
-    0x6bade30f, 0xbacbcd1a,
-  0x6baa7d49, 0xbac6840c, 0x6ba71741, 0xbac13b29, 0x6ba3b0f7, 0xbabbf270,
-    0x6ba04a6a, 0xbab6a9e3,
-  0x6b9ce39b, 0xbab16180, 0x6b997c8a, 0xbaac1948, 0x6b961536, 0xbaa6d13a,
-    0x6b92ada0, 0xbaa18958,
-  0x6b8f45c7, 0xba9c41a0, 0x6b8bddac, 0xba96fa13, 0x6b88754f, 0xba91b2b1,
-    0x6b850caf, 0xba8c6b79,
-  0x6b81a3cd, 0xba87246d, 0x6b7e3aa9, 0xba81dd8b, 0x6b7ad142, 0xba7c96d4,
-    0x6b776799, 0xba775048,
-  0x6b73fdae, 0xba7209e7, 0x6b709381, 0xba6cc3b1, 0x6b6d2911, 0xba677da6,
-    0x6b69be5f, 0xba6237c5,
-  0x6b66536b, 0xba5cf210, 0x6b62e834, 0xba57ac86, 0x6b5f7cbc, 0xba526726,
-    0x6b5c1101, 0xba4d21f2,
-  0x6b58a503, 0xba47dce8, 0x6b5538c4, 0xba42980a, 0x6b51cc42, 0xba3d5356,
-    0x6b4e5f7f, 0xba380ece,
-  0x6b4af279, 0xba32ca71, 0x6b478530, 0xba2d863e, 0x6b4417a6, 0xba284237,
-    0x6b40a9d9, 0xba22fe5b,
-  0x6b3d3bcb, 0xba1dbaaa, 0x6b39cd7a, 0xba187724, 0x6b365ee7, 0xba1333c9,
-    0x6b32f012, 0xba0df099,
-  0x6b2f80fb, 0xba08ad95, 0x6b2c11a1, 0xba036abb, 0x6b28a206, 0xb9fe280d,
-    0x6b253228, 0xb9f8e58a,
-  0x6b21c208, 0xb9f3a332, 0x6b1e51a7, 0xb9ee6106, 0x6b1ae103, 0xb9e91f04,
-    0x6b17701d, 0xb9e3dd2e,
-  0x6b13fef5, 0xb9de9b83, 0x6b108d8b, 0xb9d95a03, 0x6b0d1bdf, 0xb9d418af,
-    0x6b09a9f1, 0xb9ced786,
-  0x6b0637c1, 0xb9c99688, 0x6b02c54f, 0xb9c455b6, 0x6aff529a, 0xb9bf150e,
-    0x6afbdfa4, 0xb9b9d493,
-  0x6af86c6c, 0xb9b49442, 0x6af4f8f2, 0xb9af541d, 0x6af18536, 0xb9aa1423,
-    0x6aee1138, 0xb9a4d455,
-  0x6aea9cf8, 0xb99f94b2, 0x6ae72876, 0xb99a553a, 0x6ae3b3b2, 0xb99515ee,
-    0x6ae03eac, 0xb98fd6cd,
-  0x6adcc964, 0xb98a97d8, 0x6ad953db, 0xb985590e, 0x6ad5de0f, 0xb9801a70,
-    0x6ad26802, 0xb97adbfd,
-  0x6acef1b2, 0xb9759db6, 0x6acb7b21, 0xb9705f9a, 0x6ac8044e, 0xb96b21aa,
-    0x6ac48d39, 0xb965e3e5,
-  0x6ac115e2, 0xb960a64c, 0x6abd9e49, 0xb95b68de, 0x6aba266e, 0xb9562b9c,
-    0x6ab6ae52, 0xb950ee86,
-  0x6ab335f4, 0xb94bb19b, 0x6aafbd54, 0xb94674dc, 0x6aac4472, 0xb9413848,
-    0x6aa8cb4e, 0xb93bfbe0,
-  0x6aa551e9, 0xb936bfa4, 0x6aa1d841, 0xb9318393, 0x6a9e5e58, 0xb92c47ae,
-    0x6a9ae42e, 0xb9270bf5,
-  0x6a9769c1, 0xb921d067, 0x6a93ef13, 0xb91c9505, 0x6a907423, 0xb91759cf,
-    0x6a8cf8f1, 0xb9121ec5,
-  0x6a897d7d, 0xb90ce3e6, 0x6a8601c8, 0xb907a933, 0x6a8285d1, 0xb9026eac,
-    0x6a7f0999, 0xb8fd3451,
-  0x6a7b8d1e, 0xb8f7fa21, 0x6a781062, 0xb8f2c01d, 0x6a749365, 0xb8ed8646,
-    0x6a711625, 0xb8e84c99,
-  0x6a6d98a4, 0xb8e31319, 0x6a6a1ae2, 0xb8ddd9c5, 0x6a669cdd, 0xb8d8a09d,
-    0x6a631e97, 0xb8d367a0,
-  0x6a5fa010, 0xb8ce2ecf, 0x6a5c2147, 0xb8c8f62b, 0x6a58a23c, 0xb8c3bdb2,
-    0x6a5522ef, 0xb8be8565,
-  0x6a51a361, 0xb8b94d44, 0x6a4e2392, 0xb8b4154f, 0x6a4aa381, 0xb8aedd86,
-    0x6a47232e, 0xb8a9a5e9,
-  0x6a43a29a, 0xb8a46e78, 0x6a4021c4, 0xb89f3733, 0x6a3ca0ad, 0xb89a001a,
-    0x6a391f54, 0xb894c92d,
-  0x6a359db9, 0xb88f926d, 0x6a321bdd, 0xb88a5bd8, 0x6a2e99c0, 0xb885256f,
-    0x6a2b1761, 0xb87fef33,
-  0x6a2794c1, 0xb87ab922, 0x6a2411df, 0xb875833e, 0x6a208ebb, 0xb8704d85,
-    0x6a1d0b57, 0xb86b17f9,
-  0x6a1987b0, 0xb865e299, 0x6a1603c8, 0xb860ad66, 0x6a127f9f, 0xb85b785e,
-    0x6a0efb35, 0xb8564383,
-  0x6a0b7689, 0xb8510ed4, 0x6a07f19b, 0xb84bda51, 0x6a046c6c, 0xb846a5fa,
-    0x6a00e6fc, 0xb84171cf,
-  0x69fd614a, 0xb83c3dd1, 0x69f9db57, 0xb83709ff, 0x69f65523, 0xb831d659,
-    0x69f2cead, 0xb82ca2e0,
-  0x69ef47f6, 0xb8276f93, 0x69ebc0fe, 0xb8223c72, 0x69e839c4, 0xb81d097e,
-    0x69e4b249, 0xb817d6b6,
-  0x69e12a8c, 0xb812a41a, 0x69dda28f, 0xb80d71aa, 0x69da1a50, 0xb8083f67,
-    0x69d691cf, 0xb8030d51,
-  0x69d3090e, 0xb7fddb67, 0x69cf800b, 0xb7f8a9a9, 0x69cbf6c7, 0xb7f37818,
-    0x69c86d41, 0xb7ee46b3,
-  0x69c4e37a, 0xb7e9157a, 0x69c15973, 0xb7e3e46e, 0x69bdcf29, 0xb7deb38f,
-    0x69ba449f, 0xb7d982dc,
-  0x69b6b9d3, 0xb7d45255, 0x69b32ec7, 0xb7cf21fb, 0x69afa378, 0xb7c9f1ce,
-    0x69ac17e9, 0xb7c4c1cd,
-  0x69a88c19, 0xb7bf91f8, 0x69a50007, 0xb7ba6251, 0x69a173b5, 0xb7b532d6,
-    0x699de721, 0xb7b00387,
-  0x699a5a4c, 0xb7aad465, 0x6996cd35, 0xb7a5a570, 0x69933fde, 0xb7a076a7,
-    0x698fb246, 0xb79b480b,
-  0x698c246c, 0xb796199b, 0x69889651, 0xb790eb58, 0x698507f6, 0xb78bbd42,
-    0x69817959, 0xb7868f59,
-  0x697dea7b, 0xb781619c, 0x697a5b5c, 0xb77c340c, 0x6976cbfc, 0xb77706a9,
-    0x69733c5b, 0xb771d972,
-  0x696fac78, 0xb76cac69, 0x696c1c55, 0xb7677f8c, 0x69688bf1, 0xb76252db,
-    0x6964fb4c, 0xb75d2658,
-  0x69616a65, 0xb757fa01, 0x695dd93e, 0xb752cdd8, 0x695a47d6, 0xb74da1db,
-    0x6956b62d, 0xb748760b,
-  0x69532442, 0xb7434a67, 0x694f9217, 0xb73e1ef1, 0x694bffab, 0xb738f3a7,
-    0x69486cfe, 0xb733c88b,
-  0x6944da10, 0xb72e9d9b, 0x694146e1, 0xb72972d8, 0x693db371, 0xb7244842,
-    0x693a1fc0, 0xb71f1dd9,
-  0x69368bce, 0xb719f39e, 0x6932f79b, 0xb714c98e, 0x692f6328, 0xb70f9fac,
-    0x692bce73, 0xb70a75f7,
-  0x6928397e, 0xb7054c6f, 0x6924a448, 0xb7002314, 0x69210ed1, 0xb6faf9e6,
-    0x691d7919, 0xb6f5d0e5,
-  0x6919e320, 0xb6f0a812, 0x69164ce7, 0xb6eb7f6b, 0x6912b66c, 0xb6e656f1,
-    0x690f1fb1, 0xb6e12ea4,
-  0x690b88b5, 0xb6dc0685, 0x6907f178, 0xb6d6de92, 0x690459fb, 0xb6d1b6cd,
-    0x6900c23c, 0xb6cc8f35,
-  0x68fd2a3d, 0xb6c767ca, 0x68f991fd, 0xb6c2408c, 0x68f5f97d, 0xb6bd197c,
-    0x68f260bb, 0xb6b7f298,
-  0x68eec7b9, 0xb6b2cbe2, 0x68eb2e76, 0xb6ada559, 0x68e794f3, 0xb6a87efd,
-    0x68e3fb2e, 0xb6a358ce,
-  0x68e06129, 0xb69e32cd, 0x68dcc6e4, 0xb6990cf9, 0x68d92c5d, 0xb693e752,
-    0x68d59196, 0xb68ec1d9,
-  0x68d1f68f, 0xb6899c8d, 0x68ce5b46, 0xb684776e, 0x68cabfbd, 0xb67f527c,
-    0x68c723f3, 0xb67a2db8,
-  0x68c387e9, 0xb6750921, 0x68bfeb9e, 0xb66fe4b8, 0x68bc4f13, 0xb66ac07c,
-    0x68b8b247, 0xb6659c6d,
-  0x68b5153a, 0xb660788c, 0x68b177ed, 0xb65b54d8, 0x68adda5f, 0xb6563151,
-    0x68aa3c90, 0xb6510df8,
-  0x68a69e81, 0xb64beacd, 0x68a30031, 0xb646c7ce, 0x689f61a1, 0xb641a4fe,
-    0x689bc2d1, 0xb63c825b,
-  0x689823bf, 0xb6375fe5, 0x6894846e, 0xb6323d9d, 0x6890e4dc, 0xb62d1b82,
-    0x688d4509, 0xb627f995,
-  0x6889a4f6, 0xb622d7d6, 0x688604a2, 0xb61db644, 0x6882640e, 0xb61894df,
-    0x687ec339, 0xb61373a9,
-  0x687b2224, 0xb60e529f, 0x687780ce, 0xb60931c4, 0x6873df38, 0xb6041116,
-    0x68703d62, 0xb5fef095,
-  0x686c9b4b, 0xb5f9d043, 0x6868f8f4, 0xb5f4b01e, 0x6865565c, 0xb5ef9026,
-    0x6861b384, 0xb5ea705d,
-  0x685e106c, 0xb5e550c1, 0x685a6d13, 0xb5e03153, 0x6856c979, 0xb5db1212,
-    0x685325a0, 0xb5d5f2ff,
-  0x684f8186, 0xb5d0d41a, 0x684bdd2c, 0xb5cbb563, 0x68483891, 0xb5c696da,
-    0x684493b6, 0xb5c1787e,
-  0x6840ee9b, 0xb5bc5a50, 0x683d493f, 0xb5b73c50, 0x6839a3a4, 0xb5b21e7e,
-    0x6835fdc7, 0xb5ad00d9,
-  0x683257ab, 0xb5a7e362, 0x682eb14e, 0xb5a2c61a, 0x682b0ab1, 0xb59da8ff,
-    0x682763d4, 0xb5988c12,
-  0x6823bcb7, 0xb5936f53, 0x68201559, 0xb58e52c2, 0x681c6dbb, 0xb589365e,
-    0x6818c5dd, 0xb5841a29,
-  0x68151dbe, 0xb57efe22, 0x68117560, 0xb579e248, 0x680dccc1, 0xb574c69d,
-    0x680a23e2, 0xb56fab1f,
-  0x68067ac3, 0xb56a8fd0, 0x6802d164, 0xb56574ae, 0x67ff27c4, 0xb56059bb,
-    0x67fb7de5, 0xb55b3ef5,
-  0x67f7d3c5, 0xb556245e, 0x67f42965, 0xb55109f5, 0x67f07ec5, 0xb54befba,
-    0x67ecd3e5, 0xb546d5ac,
-  0x67e928c5, 0xb541bbcd, 0x67e57d64, 0xb53ca21c, 0x67e1d1c4, 0xb5378899,
-    0x67de25e3, 0xb5326f45,
-  0x67da79c3, 0xb52d561e, 0x67d6cd62, 0xb5283d26, 0x67d320c1, 0xb523245b,
-    0x67cf73e1, 0xb51e0bbf,
-  0x67cbc6c0, 0xb518f351, 0x67c8195f, 0xb513db12, 0x67c46bbe, 0xb50ec300,
-    0x67c0bddd, 0xb509ab1d,
-  0x67bd0fbd, 0xb5049368, 0x67b9615c, 0xb4ff7be1, 0x67b5b2bb, 0xb4fa6489,
-    0x67b203da, 0xb4f54d5f,
-  0x67ae54ba, 0xb4f03663, 0x67aaa559, 0xb4eb1f95, 0x67a6f5b8, 0xb4e608f6,
-    0x67a345d8, 0xb4e0f285,
-  0x679f95b7, 0xb4dbdc42, 0x679be557, 0xb4d6c62e, 0x679834b6, 0xb4d1b048,
-    0x679483d6, 0xb4cc9a90,
-  0x6790d2b6, 0xb4c78507, 0x678d2156, 0xb4c26fad, 0x67896fb6, 0xb4bd5a80,
-    0x6785bdd6, 0xb4b84582,
-  0x67820bb7, 0xb4b330b3, 0x677e5957, 0xb4ae1c12, 0x677aa6b8, 0xb4a9079f,
-    0x6776f3d9, 0xb4a3f35b,
-  0x677340ba, 0xb49edf45, 0x676f8d5b, 0xb499cb5e, 0x676bd9bd, 0xb494b7a6,
-    0x676825de, 0xb48fa41c,
-  0x676471c0, 0xb48a90c0, 0x6760bd62, 0xb4857d93, 0x675d08c4, 0xb4806a95,
-    0x675953e7, 0xb47b57c5,
-  0x67559eca, 0xb4764523, 0x6751e96d, 0xb47132b1, 0x674e33d0, 0xb46c206d,
-    0x674a7df4, 0xb4670e57,
-  0x6746c7d8, 0xb461fc70, 0x6743117c, 0xb45ceab8, 0x673f5ae0, 0xb457d92f,
-    0x673ba405, 0xb452c7d4,
-  0x6737ecea, 0xb44db6a8, 0x67343590, 0xb448a5aa, 0x67307df5, 0xb44394db,
-    0x672cc61c, 0xb43e843b,
-  0x67290e02, 0xb43973ca, 0x672555a9, 0xb4346387, 0x67219d10, 0xb42f5373,
-    0x671de438, 0xb42a438e,
-  0x671a2b20, 0xb42533d8, 0x671671c8, 0xb4202451, 0x6712b831, 0xb41b14f8,
-    0x670efe5a, 0xb41605ce,
-  0x670b4444, 0xb410f6d3, 0x670789ee, 0xb40be807, 0x6703cf58, 0xb406d969,
-    0x67001483, 0xb401cafb,
-  0x66fc596f, 0xb3fcbcbb, 0x66f89e1b, 0xb3f7aeaa, 0x66f4e287, 0xb3f2a0c9,
-    0x66f126b4, 0xb3ed9316,
-  0x66ed6aa1, 0xb3e88592, 0x66e9ae4f, 0xb3e3783d, 0x66e5f1be, 0xb3de6b17,
-    0x66e234ed, 0xb3d95e1f,
-  0x66de77dc, 0xb3d45157, 0x66daba8c, 0xb3cf44be, 0x66d6fcfd, 0xb3ca3854,
-    0x66d33f2e, 0xb3c52c19,
-  0x66cf8120, 0xb3c0200c, 0x66cbc2d2, 0xb3bb142f, 0x66c80445, 0xb3b60881,
-    0x66c44579, 0xb3b0fd02,
-  0x66c0866d, 0xb3abf1b2, 0x66bcc721, 0xb3a6e691, 0x66b90797, 0xb3a1dba0,
-    0x66b547cd, 0xb39cd0dd,
-  0x66b187c3, 0xb397c649, 0x66adc77b, 0xb392bbe5, 0x66aa06f3, 0xb38db1b0,
-    0x66a6462b, 0xb388a7aa,
-  0x66a28524, 0xb3839dd3, 0x669ec3de, 0xb37e942b, 0x669b0259, 0xb3798ab2,
-    0x66974095, 0xb3748169,
-  0x66937e91, 0xb36f784f, 0x668fbc4e, 0xb36a6f64, 0x668bf9cb, 0xb36566a8,
-    0x66883709, 0xb3605e1c,
-  0x66847408, 0xb35b55bf, 0x6680b0c8, 0xb3564d91, 0x667ced49, 0xb3514592,
-    0x6679298a, 0xb34c3dc3,
-  0x6675658c, 0xb3473623, 0x6671a14f, 0xb3422eb2, 0x666ddcd3, 0xb33d2771,
-    0x666a1818, 0xb338205f,
-  0x6666531d, 0xb333197c, 0x66628de4, 0xb32e12c9, 0x665ec86b, 0xb3290c45,
-    0x665b02b3, 0xb32405f1,
-  0x66573cbb, 0xb31effcc, 0x66537685, 0xb319f9d6, 0x664fb010, 0xb314f410,
-    0x664be95b, 0xb30fee79,
-  0x66482267, 0xb30ae912, 0x66445b35, 0xb305e3da, 0x664093c3, 0xb300ded2,
-    0x663ccc12, 0xb2fbd9f9,
-  0x66390422, 0xb2f6d550, 0x66353bf3, 0xb2f1d0d6, 0x66317385, 0xb2eccc8c,
-    0x662daad8, 0xb2e7c871,
-  0x6629e1ec, 0xb2e2c486, 0x662618c1, 0xb2ddc0ca, 0x66224f56, 0xb2d8bd3e,
-    0x661e85ad, 0xb2d3b9e2,
-  0x661abbc5, 0xb2ceb6b5, 0x6616f19e, 0xb2c9b3b8, 0x66132738, 0xb2c4b0ea,
-    0x660f5c93, 0xb2bfae4c,
-  0x660b91af, 0xb2baabde, 0x6607c68c, 0xb2b5a99f, 0x6603fb2a, 0xb2b0a790,
-    0x66002f89, 0xb2aba5b1,
-  0x65fc63a9, 0xb2a6a402, 0x65f8978b, 0xb2a1a282, 0x65f4cb2d, 0xb29ca132,
-    0x65f0fe91, 0xb297a011,
-  0x65ed31b5, 0xb2929f21, 0x65e9649b, 0xb28d9e60, 0x65e59742, 0xb2889dcf,
-    0x65e1c9aa, 0xb2839d6d,
-  0x65ddfbd3, 0xb27e9d3c, 0x65da2dbd, 0xb2799d3a, 0x65d65f69, 0xb2749d68,
-    0x65d290d6, 0xb26f9dc6,
-  0x65cec204, 0xb26a9e54, 0x65caf2f3, 0xb2659f12, 0x65c723a3, 0xb2609fff,
-    0x65c35415, 0xb25ba11d,
-  0x65bf8447, 0xb256a26a, 0x65bbb43b, 0xb251a3e7, 0x65b7e3f1, 0xb24ca594,
-    0x65b41367, 0xb247a771,
-  0x65b0429f, 0xb242a97e, 0x65ac7198, 0xb23dabbb, 0x65a8a052, 0xb238ae28,
-    0x65a4cece, 0xb233b0c5,
-  0x65a0fd0b, 0xb22eb392, 0x659d2b09, 0xb229b68f, 0x659958c9, 0xb224b9bc,
-    0x6595864a, 0xb21fbd19,
-  0x6591b38c, 0xb21ac0a6, 0x658de08f, 0xb215c463, 0x658a0d54, 0xb210c850,
-    0x658639db, 0xb20bcc6d,
-  0x65826622, 0xb206d0ba, 0x657e922b, 0xb201d537, 0x657abdf6, 0xb1fcd9e5,
-    0x6576e982, 0xb1f7dec2,
-  0x657314cf, 0xb1f2e3d0, 0x656f3fde, 0xb1ede90e, 0x656b6aae, 0xb1e8ee7c,
-    0x6567953f, 0xb1e3f41a,
-  0x6563bf92, 0xb1def9e9, 0x655fe9a7, 0xb1d9ffe7, 0x655c137d, 0xb1d50616,
-    0x65583d14, 0xb1d00c75,
-  0x6554666d, 0xb1cb1304, 0x65508f87, 0xb1c619c3, 0x654cb863, 0xb1c120b3,
-    0x6548e101, 0xb1bc27d3,
-  0x6545095f, 0xb1b72f23, 0x65413180, 0xb1b236a4, 0x653d5962, 0xb1ad3e55,
-    0x65398105, 0xb1a84636,
-  0x6535a86b, 0xb1a34e47, 0x6531cf91, 0xb19e5689, 0x652df679, 0xb1995efb,
-    0x652a1d23, 0xb194679e,
-  0x6526438f, 0xb18f7071, 0x652269bc, 0xb18a7974, 0x651e8faa, 0xb18582a8,
-    0x651ab55b, 0xb1808c0c,
-  0x6516dacd, 0xb17b95a0, 0x65130000, 0xb1769f65, 0x650f24f5, 0xb171a95b,
-    0x650b49ac, 0xb16cb380,
-  0x65076e25, 0xb167bdd7, 0x6503925f, 0xb162c85d, 0x64ffb65b, 0xb15dd315,
-    0x64fbda18, 0xb158ddfd,
-  0x64f7fd98, 0xb153e915, 0x64f420d9, 0xb14ef45e, 0x64f043dc, 0xb149ffd7,
-    0x64ec66a0, 0xb1450b81,
-  0x64e88926, 0xb140175b, 0x64e4ab6e, 0xb13b2367, 0x64e0cd78, 0xb1362fa2,
-    0x64dcef44, 0xb1313c0e,
-  0x64d910d1, 0xb12c48ab, 0x64d53220, 0xb1275579, 0x64d15331, 0xb1226277,
-    0x64cd7404, 0xb11d6fa6,
-  0x64c99498, 0xb1187d05, 0x64c5b4ef, 0xb1138a95, 0x64c1d507, 0xb10e9856,
-    0x64bdf4e1, 0xb109a648,
-  0x64ba147d, 0xb104b46a, 0x64b633da, 0xb0ffc2bd, 0x64b252fa, 0xb0fad140,
-    0x64ae71dc, 0xb0f5dff5,
-  0x64aa907f, 0xb0f0eeda, 0x64a6aee4, 0xb0ebfdf0, 0x64a2cd0c, 0xb0e70d37,
-    0x649eeaf5, 0xb0e21cae,
-  0x649b08a0, 0xb0dd2c56, 0x6497260d, 0xb0d83c2f, 0x6493433c, 0xb0d34c39,
-    0x648f602d, 0xb0ce5c74,
-  0x648b7ce0, 0xb0c96ce0, 0x64879955, 0xb0c47d7c, 0x6483b58c, 0xb0bf8e4a,
-    0x647fd185, 0xb0ba9f48,
-  0x647bed3f, 0xb0b5b077, 0x647808bc, 0xb0b0c1d7, 0x647423fb, 0xb0abd368,
-    0x64703efc, 0xb0a6e52a,
-  0x646c59bf, 0xb0a1f71d, 0x64687444, 0xb09d0941, 0x64648e8c, 0xb0981b96,
-    0x6460a895, 0xb0932e1b,
-  0x645cc260, 0xb08e40d2, 0x6458dbed, 0xb08953ba, 0x6454f53d, 0xb08466d3,
-    0x64510e4e, 0xb07f7a1c,
-  0x644d2722, 0xb07a8d97, 0x64493fb8, 0xb075a143, 0x64455810, 0xb070b520,
-    0x6441702a, 0xb06bc92e,
-  0x643d8806, 0xb066dd6d, 0x64399fa5, 0xb061f1de, 0x6435b706, 0xb05d067f,
-    0x6431ce28, 0xb0581b51,
-  0x642de50d, 0xb0533055, 0x6429fbb5, 0xb04e458a, 0x6426121e, 0xb0495af0,
-    0x6422284a, 0xb0447087,
-  0x641e3e38, 0xb03f864f, 0x641a53e8, 0xb03a9c49, 0x6416695a, 0xb035b273,
-    0x64127e8f, 0xb030c8cf,
-  0x640e9386, 0xb02bdf5c, 0x640aa83f, 0xb026f61b, 0x6406bcba, 0xb0220d0a,
-    0x6402d0f8, 0xb01d242b,
-  0x63fee4f8, 0xb0183b7d, 0x63faf8bb, 0xb0135301, 0x63f70c3f, 0xb00e6ab5,
-    0x63f31f86, 0xb009829c,
-  0x63ef3290, 0xb0049ab3, 0x63eb455c, 0xafffb2fc, 0x63e757ea, 0xaffacb76,
-    0x63e36a3a, 0xaff5e421,
-  0x63df7c4d, 0xaff0fcfe, 0x63db8e22, 0xafec160c, 0x63d79fba, 0xafe72f4c,
-    0x63d3b114, 0xafe248bd,
-  0x63cfc231, 0xafdd625f, 0x63cbd310, 0xafd87c33, 0x63c7e3b1, 0xafd39638,
-    0x63c3f415, 0xafceb06f,
-  0x63c0043b, 0xafc9cad7, 0x63bc1424, 0xafc4e571, 0x63b823cf, 0xafc0003c,
-    0x63b4333d, 0xafbb1b39,
-  0x63b0426d, 0xafb63667, 0x63ac5160, 0xafb151c7, 0x63a86015, 0xafac6d58,
-    0x63a46e8d, 0xafa7891b,
-  0x63a07cc7, 0xafa2a50f, 0x639c8ac4, 0xaf9dc135, 0x63989884, 0xaf98dd8d,
-    0x6394a606, 0xaf93fa16,
-  0x6390b34a, 0xaf8f16d1, 0x638cc051, 0xaf8a33bd, 0x6388cd1b, 0xaf8550db,
-    0x6384d9a7, 0xaf806e2b,
-  0x6380e5f6, 0xaf7b8bac, 0x637cf208, 0xaf76a95f, 0x6378fddc, 0xaf71c743,
-    0x63750973, 0xaf6ce55a,
-  0x637114cc, 0xaf6803a2, 0x636d1fe9, 0xaf63221c, 0x63692ac7, 0xaf5e40c7,
-    0x63653569, 0xaf595fa4,
-  0x63613fcd, 0xaf547eb3, 0x635d49f4, 0xaf4f9df4, 0x635953dd, 0xaf4abd66,
-    0x63555d8a, 0xaf45dd0b,
-  0x635166f9, 0xaf40fce1, 0x634d702b, 0xaf3c1ce9, 0x6349791f, 0xaf373d22,
-    0x634581d6, 0xaf325d8e,
-  0x63418a50, 0xaf2d7e2b, 0x633d928d, 0xaf289efa, 0x63399a8d, 0xaf23bffb,
-    0x6335a24f, 0xaf1ee12e,
-  0x6331a9d4, 0xaf1a0293, 0x632db11c, 0xaf15242a, 0x6329b827, 0xaf1045f3,
-    0x6325bef5, 0xaf0b67ed,
-  0x6321c585, 0xaf068a1a, 0x631dcbd9, 0xaf01ac78, 0x6319d1ef, 0xaefccf09,
-    0x6315d7c8, 0xaef7f1cb,
-  0x6311dd64, 0xaef314c0, 0x630de2c3, 0xaeee37e6, 0x6309e7e4, 0xaee95b3f,
-    0x6305ecc9, 0xaee47ec9,
-  0x6301f171, 0xaedfa285, 0x62fdf5db, 0xaedac674, 0x62f9fa09, 0xaed5ea95,
-    0x62f5fdf9, 0xaed10ee7,
-  0x62f201ac, 0xaecc336c, 0x62ee0523, 0xaec75823, 0x62ea085c, 0xaec27d0c,
-    0x62e60b58, 0xaebda227,
-  0x62e20e17, 0xaeb8c774, 0x62de109a, 0xaeb3ecf3, 0x62da12df, 0xaeaf12a4,
-    0x62d614e7, 0xaeaa3888,
-  0x62d216b3, 0xaea55e9e, 0x62ce1841, 0xaea084e6, 0x62ca1992, 0xae9bab60,
-    0x62c61aa7, 0xae96d20c,
-  0x62c21b7e, 0xae91f8eb, 0x62be1c19, 0xae8d1ffb, 0x62ba1c77, 0xae88473e,
-    0x62b61c98, 0xae836eb4,
-  0x62b21c7b, 0xae7e965b, 0x62ae1c23, 0xae79be35, 0x62aa1b8d, 0xae74e641,
-    0x62a61aba, 0xae700e80,
-  0x62a219aa, 0xae6b36f0, 0x629e185e, 0xae665f93, 0x629a16d5, 0xae618869,
-    0x6296150f, 0xae5cb171,
-  0x6292130c, 0xae57daab, 0x628e10cc, 0xae530417, 0x628a0e50, 0xae4e2db6,
-    0x62860b97, 0xae495787,
-  0x628208a1, 0xae44818b, 0x627e056e, 0xae3fabc1, 0x627a01fe, 0xae3ad629,
-    0x6275fe52, 0xae3600c4,
-  0x6271fa69, 0xae312b92, 0x626df643, 0xae2c5691, 0x6269f1e1, 0xae2781c4,
-    0x6265ed42, 0xae22ad29,
-  0x6261e866, 0xae1dd8c0, 0x625de34e, 0xae19048a, 0x6259ddf8, 0xae143086,
-    0x6255d866, 0xae0f5cb5,
-  0x6251d298, 0xae0a8916, 0x624dcc8d, 0xae05b5aa, 0x6249c645, 0xae00e271,
-    0x6245bfc0, 0xadfc0f6a,
-  0x6241b8ff, 0xadf73c96, 0x623db202, 0xadf269f4, 0x6239aac7, 0xaded9785,
-    0x6235a351, 0xade8c548,
-  0x62319b9d, 0xade3f33e, 0x622d93ad, 0xaddf2167, 0x62298b81, 0xadda4fc3,
-    0x62258317, 0xadd57e51,
-  0x62217a72, 0xadd0ad12, 0x621d7190, 0xadcbdc05, 0x62196871, 0xadc70b2c,
-    0x62155f16, 0xadc23a85,
-  0x6211557e, 0xadbd6a10, 0x620d4baa, 0xadb899cf, 0x62094199, 0xadb3c9c0,
-    0x6205374c, 0xadaef9e4,
-  0x62012cc2, 0xadaa2a3b, 0x61fd21fc, 0xada55ac4, 0x61f916f9, 0xada08b80,
-    0x61f50bba, 0xad9bbc70,
-  0x61f1003f, 0xad96ed92, 0x61ecf487, 0xad921ee6, 0x61e8e893, 0xad8d506e,
-    0x61e4dc62, 0xad888229,
-  0x61e0cff5, 0xad83b416, 0x61dcc34c, 0xad7ee636, 0x61d8b666, 0xad7a1889,
-    0x61d4a944, 0xad754b0f,
-  0x61d09be5, 0xad707dc8, 0x61cc8e4b, 0xad6bb0b4, 0x61c88074, 0xad66e3d3,
-    0x61c47260, 0xad621725,
-  0x61c06410, 0xad5d4aaa, 0x61bc5584, 0xad587e61, 0x61b846bc, 0xad53b24c,
-    0x61b437b7, 0xad4ee66a,
-  0x61b02876, 0xad4a1aba, 0x61ac18f9, 0xad454f3e, 0x61a80940, 0xad4083f5,
-    0x61a3f94a, 0xad3bb8df,
-  0x619fe918, 0xad36edfc, 0x619bd8aa, 0xad32234b, 0x6197c800, 0xad2d58ce,
-    0x6193b719, 0xad288e85,
-  0x618fa5f7, 0xad23c46e, 0x618b9498, 0xad1efa8a, 0x618782fd, 0xad1a30d9,
-    0x61837126, 0xad15675c,
-  0x617f5f12, 0xad109e12, 0x617b4cc3, 0xad0bd4fb, 0x61773a37, 0xad070c17,
-    0x61732770, 0xad024366,
-  0x616f146c, 0xacfd7ae8, 0x616b012c, 0xacf8b29e, 0x6166edb0, 0xacf3ea87,
-    0x6162d9f8, 0xacef22a3,
-  0x615ec603, 0xacea5af2, 0x615ab1d3, 0xace59375, 0x61569d67, 0xace0cc2b,
-    0x615288be, 0xacdc0514,
-  0x614e73da, 0xacd73e30, 0x614a5eba, 0xacd27780, 0x6146495d, 0xaccdb103,
-    0x614233c5, 0xacc8eab9,
-  0x613e1df0, 0xacc424a3, 0x613a07e0, 0xacbf5ec0, 0x6135f193, 0xacba9910,
-    0x6131db0b, 0xacb5d394,
-  0x612dc447, 0xacb10e4b, 0x6129ad46, 0xacac4935, 0x6125960a, 0xaca78453,
-    0x61217e92, 0xaca2bfa4,
-  0x611d66de, 0xac9dfb29, 0x61194eee, 0xac9936e1, 0x611536c2, 0xac9472cd,
-    0x61111e5b, 0xac8faeec,
-  0x610d05b7, 0xac8aeb3e, 0x6108ecd8, 0xac8627c4, 0x6104d3bc, 0xac81647e,
-    0x6100ba65, 0xac7ca16b,
-  0x60fca0d2, 0xac77de8b, 0x60f88703, 0xac731bdf, 0x60f46cf9, 0xac6e5967,
-    0x60f052b2, 0xac699722,
-  0x60ec3830, 0xac64d510, 0x60e81d72, 0xac601333, 0x60e40278, 0xac5b5189,
-    0x60dfe743, 0xac569012,
-  0x60dbcbd1, 0xac51cecf, 0x60d7b024, 0xac4d0dc0, 0x60d3943b, 0xac484ce4,
-    0x60cf7817, 0xac438c3c,
-  0x60cb5bb7, 0xac3ecbc7, 0x60c73f1b, 0xac3a0b87, 0x60c32243, 0xac354b7a,
-    0x60bf0530, 0xac308ba0,
-  0x60bae7e1, 0xac2bcbfa, 0x60b6ca56, 0xac270c88, 0x60b2ac8f, 0xac224d4a,
-    0x60ae8e8d, 0xac1d8e40,
-  0x60aa7050, 0xac18cf69, 0x60a651d7, 0xac1410c6, 0x60a23322, 0xac0f5256,
-    0x609e1431, 0xac0a941b,
-  0x6099f505, 0xac05d613, 0x6095d59d, 0xac01183f, 0x6091b5fa, 0xabfc5a9f,
-    0x608d961b, 0xabf79d33,
-  0x60897601, 0xabf2dffb, 0x608555ab, 0xabee22f6, 0x60813519, 0xabe96625,
-    0x607d144c, 0xabe4a988,
-  0x6078f344, 0xabdfed1f, 0x6074d200, 0xabdb30ea, 0x6070b080, 0xabd674e9,
-    0x606c8ec5, 0xabd1b91c,
-  0x60686ccf, 0xabccfd83, 0x60644a9d, 0xabc8421d, 0x6060282f, 0xabc386ec,
-    0x605c0587, 0xabbecbee,
-  0x6057e2a2, 0xabba1125, 0x6053bf82, 0xabb5568f, 0x604f9c27, 0xabb09c2e,
-    0x604b7891, 0xababe200,
-  0x604754bf, 0xaba72807, 0x604330b1, 0xaba26e41, 0x603f0c69, 0xab9db4b0,
-    0x603ae7e5, 0xab98fb52,
-  0x6036c325, 0xab944229, 0x60329e2a, 0xab8f8934, 0x602e78f4, 0xab8ad073,
-    0x602a5383, 0xab8617e6,
-  0x60262dd6, 0xab815f8d, 0x602207ee, 0xab7ca768, 0x601de1ca, 0xab77ef77,
-    0x6019bb6b, 0xab7337bb,
-  0x601594d1, 0xab6e8032, 0x60116dfc, 0xab69c8de, 0x600d46ec, 0xab6511be,
-    0x60091fa0, 0xab605ad2,
-  0x6004f819, 0xab5ba41a, 0x6000d057, 0xab56ed97, 0x5ffca859, 0xab523748,
-    0x5ff88021, 0xab4d812d,
-  0x5ff457ad, 0xab48cb46, 0x5ff02efe, 0xab441593, 0x5fec0613, 0xab3f6015,
-    0x5fe7dcee, 0xab3aaacb,
-  0x5fe3b38d, 0xab35f5b5, 0x5fdf89f2, 0xab3140d4, 0x5fdb601b, 0xab2c8c27,
-    0x5fd73609, 0xab27d7ae,
-  0x5fd30bbc, 0xab23236a, 0x5fcee133, 0xab1e6f5a, 0x5fcab670, 0xab19bb7e,
-    0x5fc68b72, 0xab1507d7,
-  0x5fc26038, 0xab105464, 0x5fbe34c4, 0xab0ba125, 0x5fba0914, 0xab06ee1b,
-    0x5fb5dd29, 0xab023b46,
-  0x5fb1b104, 0xaafd88a4, 0x5fad84a3, 0xaaf8d637, 0x5fa95807, 0xaaf423ff,
-    0x5fa52b31, 0xaaef71fb,
-  0x5fa0fe1f, 0xaaeac02c, 0x5f9cd0d2, 0xaae60e91, 0x5f98a34a, 0xaae15d2a,
-    0x5f947588, 0xaadcabf8,
-  0x5f90478a, 0xaad7fafb, 0x5f8c1951, 0xaad34a32, 0x5f87eade, 0xaace999d,
-    0x5f83bc2f, 0xaac9e93e,
-  0x5f7f8d46, 0xaac53912, 0x5f7b5e22, 0xaac0891c, 0x5f772ec2, 0xaabbd959,
-    0x5f72ff28, 0xaab729cc,
-  0x5f6ecf53, 0xaab27a73, 0x5f6a9f44, 0xaaadcb4f, 0x5f666ef9, 0xaaa91c5f,
-    0x5f623e73, 0xaaa46da4,
-  0x5f5e0db3, 0xaa9fbf1e, 0x5f59dcb8, 0xaa9b10cc, 0x5f55ab82, 0xaa9662af,
-    0x5f517a11, 0xaa91b4c7,
-  0x5f4d4865, 0xaa8d0713, 0x5f49167f, 0xaa885994, 0x5f44e45e, 0xaa83ac4a,
-    0x5f40b202, 0xaa7eff34,
-  0x5f3c7f6b, 0xaa7a5253, 0x5f384c9a, 0xaa75a5a8, 0x5f34198e, 0xaa70f930,
-    0x5f2fe647, 0xaa6c4cee,
-  0x5f2bb2c5, 0xaa67a0e0, 0x5f277f09, 0xaa62f507, 0x5f234b12, 0xaa5e4963,
-    0x5f1f16e0, 0xaa599df4,
-  0x5f1ae274, 0xaa54f2ba, 0x5f16adcc, 0xaa5047b4, 0x5f1278eb, 0xaa4b9ce3,
-    0x5f0e43ce, 0xaa46f248,
-  0x5f0a0e77, 0xaa4247e1, 0x5f05d8e6, 0xaa3d9daf, 0x5f01a31a, 0xaa38f3b1,
-    0x5efd6d13, 0xaa3449e9,
-  0x5ef936d1, 0xaa2fa056, 0x5ef50055, 0xaa2af6f7, 0x5ef0c99f, 0xaa264dce,
-    0x5eec92ae, 0xaa21a4d9,
-  0x5ee85b82, 0xaa1cfc1a, 0x5ee4241c, 0xaa18538f, 0x5edfec7b, 0xaa13ab3a,
-    0x5edbb49f, 0xaa0f0319,
-  0x5ed77c8a, 0xaa0a5b2e, 0x5ed34439, 0xaa05b377, 0x5ecf0baf, 0xaa010bf6,
-    0x5ecad2e9, 0xa9fc64a9,
-  0x5ec699e9, 0xa9f7bd92, 0x5ec260af, 0xa9f316b0, 0x5ebe273b, 0xa9ee7002,
-    0x5eb9ed8b, 0xa9e9c98a,
-  0x5eb5b3a2, 0xa9e52347, 0x5eb1797e, 0xa9e07d39, 0x5ead3f1f, 0xa9dbd761,
-    0x5ea90487, 0xa9d731bd,
-  0x5ea4c9b3, 0xa9d28c4e, 0x5ea08ea6, 0xa9cde715, 0x5e9c535e, 0xa9c94211,
-    0x5e9817dc, 0xa9c49d42,
-  0x5e93dc1f, 0xa9bff8a8, 0x5e8fa028, 0xa9bb5444, 0x5e8b63f7, 0xa9b6b014,
-    0x5e87278b, 0xa9b20c1a,
-  0x5e82eae5, 0xa9ad6855, 0x5e7eae05, 0xa9a8c4c5, 0x5e7a70ea, 0xa9a4216b,
-    0x5e763395, 0xa99f7e46,
-  0x5e71f606, 0xa99adb56, 0x5e6db83d, 0xa996389b, 0x5e697a39, 0xa9919616,
-    0x5e653bfc, 0xa98cf3c6,
-  0x5e60fd84, 0xa98851ac, 0x5e5cbed1, 0xa983afc6, 0x5e587fe5, 0xa97f0e16,
-    0x5e5440be, 0xa97a6c9c,
-  0x5e50015d, 0xa975cb57, 0x5e4bc1c2, 0xa9712a47, 0x5e4781ed, 0xa96c896c,
-    0x5e4341de, 0xa967e8c7,
-  0x5e3f0194, 0xa9634858, 0x5e3ac110, 0xa95ea81d, 0x5e368053, 0xa95a0819,
-    0x5e323f5b, 0xa9556849,
-  0x5e2dfe29, 0xa950c8b0, 0x5e29bcbd, 0xa94c294b, 0x5e257b17, 0xa9478a1c,
-    0x5e213936, 0xa942eb23,
-  0x5e1cf71c, 0xa93e4c5f, 0x5e18b4c8, 0xa939add1, 0x5e147239, 0xa9350f78,
-    0x5e102f71, 0xa9307155,
-  0x5e0bec6e, 0xa92bd367, 0x5e07a932, 0xa92735af, 0x5e0365bb, 0xa922982c,
-    0x5dff220b, 0xa91dfadf,
-  0x5dfade20, 0xa9195dc7, 0x5df699fc, 0xa914c0e6, 0x5df2559e, 0xa9102439,
-    0x5dee1105, 0xa90b87c3,
-  0x5de9cc33, 0xa906eb82, 0x5de58727, 0xa9024f76, 0x5de141e1, 0xa8fdb3a1,
-    0x5ddcfc61, 0xa8f91801,
-  0x5dd8b6a7, 0xa8f47c97, 0x5dd470b3, 0xa8efe162, 0x5dd02a85, 0xa8eb4663,
-    0x5dcbe41d, 0xa8e6ab9a,
-  0x5dc79d7c, 0xa8e21106, 0x5dc356a1, 0xa8dd76a9, 0x5dbf0f8c, 0xa8d8dc81,
-    0x5dbac83d, 0xa8d4428f,
-  0x5db680b4, 0xa8cfa8d2, 0x5db238f1, 0xa8cb0f4b, 0x5dadf0f5, 0xa8c675fb,
-    0x5da9a8bf, 0xa8c1dce0,
-  0x5da5604f, 0xa8bd43fa, 0x5da117a5, 0xa8b8ab4b, 0x5d9ccec2, 0xa8b412d1,
-    0x5d9885a5, 0xa8af7a8e,
-  0x5d943c4e, 0xa8aae280, 0x5d8ff2bd, 0xa8a64aa8, 0x5d8ba8f3, 0xa8a1b306,
-    0x5d875eef, 0xa89d1b99,
-  0x5d8314b1, 0xa8988463, 0x5d7eca39, 0xa893ed63, 0x5d7a7f88, 0xa88f5698,
-    0x5d76349d, 0xa88ac004,
-  0x5d71e979, 0xa88629a5, 0x5d6d9e1b, 0xa881937c, 0x5d695283, 0xa87cfd8a,
-    0x5d6506b2, 0xa87867cd,
-  0x5d60baa7, 0xa873d246, 0x5d5c6e62, 0xa86f3cf6, 0x5d5821e4, 0xa86aa7db,
-    0x5d53d52d, 0xa86612f6,
-  0x5d4f883b, 0xa8617e48, 0x5d4b3b10, 0xa85ce9cf, 0x5d46edac, 0xa858558d,
-    0x5d42a00e, 0xa853c180,
-  0x5d3e5237, 0xa84f2daa, 0x5d3a0426, 0xa84a9a0a, 0x5d35b5db, 0xa84606a0,
-    0x5d316757, 0xa841736c,
-  0x5d2d189a, 0xa83ce06e, 0x5d28c9a3, 0xa8384da6, 0x5d247a72, 0xa833bb14,
-    0x5d202b09, 0xa82f28b9,
-  0x5d1bdb65, 0xa82a9693, 0x5d178b89, 0xa82604a4, 0x5d133b72, 0xa82172eb,
-    0x5d0eeb23, 0xa81ce169,
-  0x5d0a9a9a, 0xa818501c, 0x5d0649d7, 0xa813bf06, 0x5d01f8dc, 0xa80f2e26,
-    0x5cfda7a7, 0xa80a9d7c,
-  0x5cf95638, 0xa8060d08, 0x5cf50490, 0xa8017ccb, 0x5cf0b2af, 0xa7fcecc4,
-    0x5cec6095, 0xa7f85cf3,
-  0x5ce80e41, 0xa7f3cd59, 0x5ce3bbb4, 0xa7ef3df5, 0x5cdf68ed, 0xa7eaaec7,
-    0x5cdb15ed, 0xa7e61fd0,
-  0x5cd6c2b5, 0xa7e1910f, 0x5cd26f42, 0xa7dd0284, 0x5cce1b97, 0xa7d8742f,
-    0x5cc9c7b2, 0xa7d3e611,
-  0x5cc57394, 0xa7cf582a, 0x5cc11f3d, 0xa7caca79, 0x5cbccaac, 0xa7c63cfe,
-    0x5cb875e3, 0xa7c1afb9,
-  0x5cb420e0, 0xa7bd22ac, 0x5cafcba4, 0xa7b895d4, 0x5cab762f, 0xa7b40933,
-    0x5ca72080, 0xa7af7cc8,
-  0x5ca2ca99, 0xa7aaf094, 0x5c9e7478, 0xa7a66497, 0x5c9a1e1e, 0xa7a1d8d0,
-    0x5c95c78b, 0xa79d4d3f,
-  0x5c9170bf, 0xa798c1e5, 0x5c8d19ba, 0xa79436c1, 0x5c88c27c, 0xa78fabd4,
-    0x5c846b05, 0xa78b211e,
-  0x5c801354, 0xa786969e, 0x5c7bbb6b, 0xa7820c55, 0x5c776348, 0xa77d8242,
-    0x5c730aed, 0xa778f866,
-  0x5c6eb258, 0xa7746ec0, 0x5c6a598b, 0xa76fe551, 0x5c660084, 0xa76b5c19,
-    0x5c61a745, 0xa766d317,
-  0x5c5d4dcc, 0xa7624a4d, 0x5c58f41a, 0xa75dc1b8, 0x5c549a30, 0xa759395b,
-    0x5c50400d, 0xa754b134,
-  0x5c4be5b0, 0xa7502943, 0x5c478b1b, 0xa74ba18a, 0x5c43304d, 0xa7471a07,
-    0x5c3ed545, 0xa74292bb,
-  0x5c3a7a05, 0xa73e0ba5, 0x5c361e8c, 0xa73984c7, 0x5c31c2db, 0xa734fe1f,
-    0x5c2d66f0, 0xa73077ae,
-  0x5c290acc, 0xa72bf174, 0x5c24ae70, 0xa7276b70, 0x5c2051db, 0xa722e5a3,
-    0x5c1bf50d, 0xa71e600d,
-  0x5c179806, 0xa719daae, 0x5c133ac6, 0xa7155586, 0x5c0edd4e, 0xa710d095,
-    0x5c0a7f9c, 0xa70c4bda,
-  0x5c0621b2, 0xa707c757, 0x5c01c38f, 0xa703430a, 0x5bfd6534, 0xa6febef4,
-    0x5bf906a0, 0xa6fa3b15,
-  0x5bf4a7d2, 0xa6f5b76d, 0x5bf048cd, 0xa6f133fc, 0x5bebe98e, 0xa6ecb0c2,
-    0x5be78a17, 0xa6e82dbe,
-  0x5be32a67, 0xa6e3aaf2, 0x5bdeca7f, 0xa6df285d, 0x5bda6a5d, 0xa6daa5fe,
-    0x5bd60a03, 0xa6d623d7,
-  0x5bd1a971, 0xa6d1a1e7, 0x5bcd48a6, 0xa6cd202d, 0x5bc8e7a2, 0xa6c89eab,
-    0x5bc48666, 0xa6c41d60,
-  0x5bc024f0, 0xa6bf9c4b, 0x5bbbc343, 0xa6bb1b6e, 0x5bb7615d, 0xa6b69ac8,
-    0x5bb2ff3e, 0xa6b21a59,
-  0x5bae9ce7, 0xa6ad9a21, 0x5baa3a57, 0xa6a91a20, 0x5ba5d78e, 0xa6a49a56,
-    0x5ba1748d, 0xa6a01ac4,
-  0x5b9d1154, 0xa69b9b68, 0x5b98ade2, 0xa6971c44, 0x5b944a37, 0xa6929d57,
-    0x5b8fe654, 0xa68e1ea1,
-  0x5b8b8239, 0xa689a022, 0x5b871de5, 0xa68521da, 0x5b82b958, 0xa680a3ca,
-    0x5b7e5493, 0xa67c25f0,
-  0x5b79ef96, 0xa677a84e, 0x5b758a60, 0xa6732ae3, 0x5b7124f2, 0xa66eadb0,
-    0x5b6cbf4c, 0xa66a30b3,
-  0x5b68596d, 0xa665b3ee, 0x5b63f355, 0xa6613760, 0x5b5f8d06, 0xa65cbb0a,
-    0x5b5b267e, 0xa6583eeb,
-  0x5b56bfbd, 0xa653c303, 0x5b5258c4, 0xa64f4752, 0x5b4df193, 0xa64acbd9,
-    0x5b498a2a, 0xa6465097,
-  0x5b452288, 0xa641d58c, 0x5b40baae, 0xa63d5ab9, 0x5b3c529c, 0xa638e01d,
-    0x5b37ea51, 0xa63465b9,
-  0x5b3381ce, 0xa62feb8b, 0x5b2f1913, 0xa62b7196, 0x5b2ab020, 0xa626f7d7,
-    0x5b2646f4, 0xa6227e50,
-  0x5b21dd90, 0xa61e0501, 0x5b1d73f4, 0xa6198be9, 0x5b190a20, 0xa6151308,
-    0x5b14a014, 0xa6109a5f,
-  0x5b1035cf, 0xa60c21ee, 0x5b0bcb52, 0xa607a9b4, 0x5b07609d, 0xa60331b1,
-    0x5b02f5b0, 0xa5feb9e6,
-  0x5afe8a8b, 0xa5fa4252, 0x5afa1f2e, 0xa5f5caf6, 0x5af5b398, 0xa5f153d2,
-    0x5af147ca, 0xa5ecdce5,
-  0x5aecdbc5, 0xa5e8662f, 0x5ae86f87, 0xa5e3efb1, 0x5ae40311, 0xa5df796b,
-    0x5adf9663, 0xa5db035c,
-  0x5adb297d, 0xa5d68d85, 0x5ad6bc5f, 0xa5d217e6, 0x5ad24f09, 0xa5cda27e,
-    0x5acde17b, 0xa5c92d4e,
-  0x5ac973b5, 0xa5c4b855, 0x5ac505b7, 0xa5c04395, 0x5ac09781, 0xa5bbcf0b,
-    0x5abc2912, 0xa5b75aba,
-  0x5ab7ba6c, 0xa5b2e6a0, 0x5ab34b8e, 0xa5ae72be, 0x5aaedc78, 0xa5a9ff14,
-    0x5aaa6d2b, 0xa5a58ba1,
-  0x5aa5fda5, 0xa5a11866, 0x5aa18de7, 0xa59ca563, 0x5a9d1df1, 0xa5983297,
-    0x5a98adc4, 0xa593c004,
-  0x5a943d5e, 0xa58f4da8, 0x5a8fccc1, 0xa58adb84, 0x5a8b5bec, 0xa5866997,
-    0x5a86eadf, 0xa581f7e3,
-  0x5a82799a, 0xa57d8666, 0x5a7e081d, 0xa5791521, 0x5a799669, 0xa574a414,
-    0x5a75247c, 0xa570333f,
-  0x5a70b258, 0xa56bc2a2, 0x5a6c3ffc, 0xa567523c, 0x5a67cd69, 0xa562e20f,
-    0x5a635a9d, 0xa55e7219,
-  0x5a5ee79a, 0xa55a025b, 0x5a5a745f, 0xa55592d5, 0x5a5600ec, 0xa5512388,
-    0x5a518d42, 0xa54cb472,
-  0x5a4d1960, 0xa5484594, 0x5a48a546, 0xa543d6ee, 0x5a4430f5, 0xa53f687f,
-    0x5a3fbc6b, 0xa53afa49,
-  0x5a3b47ab, 0xa5368c4b, 0x5a36d2b2, 0xa5321e85, 0x5a325d82, 0xa52db0f7,
-    0x5a2de81a, 0xa52943a1,
-  0x5a29727b, 0xa524d683, 0x5a24fca4, 0xa520699d, 0x5a208695, 0xa51bfcef,
-    0x5a1c104f, 0xa5179079,
-  0x5a1799d1, 0xa513243b, 0x5a13231b, 0xa50eb836, 0x5a0eac2e, 0xa50a4c68,
-    0x5a0a350a, 0xa505e0d2,
-  0x5a05bdae, 0xa5017575, 0x5a01461a, 0xa4fd0a50, 0x59fcce4f, 0xa4f89f63,
-    0x59f8564c, 0xa4f434ae,
-  0x59f3de12, 0xa4efca31, 0x59ef65a1, 0xa4eb5fec, 0x59eaecf8, 0xa4e6f5e0,
-    0x59e67417, 0xa4e28c0c,
-  0x59e1faff, 0xa4de2270, 0x59dd81b0, 0xa4d9b90c, 0x59d90829, 0xa4d54fe0,
-    0x59d48e6a, 0xa4d0e6ed,
-  0x59d01475, 0xa4cc7e32, 0x59cb9a47, 0xa4c815af, 0x59c71fe3, 0xa4c3ad64,
-    0x59c2a547, 0xa4bf4552,
-  0x59be2a74, 0xa4badd78, 0x59b9af69, 0xa4b675d6, 0x59b53427, 0xa4b20e6d,
-    0x59b0b8ae, 0xa4ada73c,
-  0x59ac3cfd, 0xa4a94043, 0x59a7c115, 0xa4a4d982, 0x59a344f6, 0xa4a072fa,
-    0x599ec8a0, 0xa49c0cab,
-  0x599a4c12, 0xa497a693, 0x5995cf4d, 0xa49340b4, 0x59915250, 0xa48edb0e,
-    0x598cd51d, 0xa48a75a0,
-  0x598857b2, 0xa486106a, 0x5983da10, 0xa481ab6d, 0x597f5c36, 0xa47d46a8,
-    0x597ade26, 0xa478e21b,
-  0x59765fde, 0xa4747dc7, 0x5971e15f, 0xa47019ac, 0x596d62a9, 0xa46bb5c9,
-    0x5968e3bc, 0xa467521e,
-  0x59646498, 0xa462eeac, 0x595fe53c, 0xa45e8b73, 0x595b65aa, 0xa45a2872,
-    0x5956e5e0, 0xa455c5a9,
-  0x595265df, 0xa4516319, 0x594de5a7, 0xa44d00c2, 0x59496538, 0xa4489ea3,
-    0x5944e492, 0xa4443cbd,
-  0x594063b5, 0xa43fdb10, 0x593be2a0, 0xa43b799a, 0x59376155, 0xa437185e,
-    0x5932dfd3, 0xa432b75a,
-  0x592e5e19, 0xa42e568f, 0x5929dc29, 0xa429f5fd, 0x59255a02, 0xa42595a3,
-    0x5920d7a3, 0xa4213581,
-  0x591c550e, 0xa41cd599, 0x5917d242, 0xa41875e9, 0x59134f3e, 0xa4141672,
-    0x590ecc04, 0xa40fb733,
-  0x590a4893, 0xa40b582e, 0x5905c4eb, 0xa406f960, 0x5901410c, 0xa4029acc,
-    0x58fcbcf6, 0xa3fe3c71,
-  0x58f838a9, 0xa3f9de4e, 0x58f3b426, 0xa3f58064, 0x58ef2f6b, 0xa3f122b2,
-    0x58eaaa7a, 0xa3ecc53a,
-  0x58e62552, 0xa3e867fa, 0x58e19ff3, 0xa3e40af3, 0x58dd1a5d, 0xa3dfae25,
-    0x58d89490, 0xa3db5190,
-  0x58d40e8c, 0xa3d6f534, 0x58cf8852, 0xa3d29910, 0x58cb01e1, 0xa3ce3d25,
-    0x58c67b39, 0xa3c9e174,
-  0x58c1f45b, 0xa3c585fb, 0x58bd6d45, 0xa3c12abb, 0x58b8e5f9, 0xa3bccfb3,
-    0x58b45e76, 0xa3b874e5,
-  0x58afd6bd, 0xa3b41a50, 0x58ab4ecc, 0xa3afbff3, 0x58a6c6a5, 0xa3ab65d0,
-    0x58a23e48, 0xa3a70be6,
-  0x589db5b3, 0xa3a2b234, 0x58992ce9, 0xa39e58bb, 0x5894a3e7, 0xa399ff7c,
-    0x58901aaf, 0xa395a675,
-  0x588b9140, 0xa3914da8, 0x5887079a, 0xa38cf513, 0x58827dbe, 0xa3889cb8,
-    0x587df3ab, 0xa3844495,
-  0x58796962, 0xa37fecac, 0x5874dee2, 0xa37b94fb, 0x5870542c, 0xa3773d84,
-    0x586bc93f, 0xa372e646,
-  0x58673e1b, 0xa36e8f41, 0x5862b2c1, 0xa36a3875, 0x585e2730, 0xa365e1e2,
-    0x58599b69, 0xa3618b88,
-  0x58550f6c, 0xa35d3567, 0x58508338, 0xa358df80, 0x584bf6cd, 0xa35489d1,
-    0x58476a2c, 0xa350345c,
-  0x5842dd54, 0xa34bdf20, 0x583e5047, 0xa3478a1d, 0x5839c302, 0xa3433554,
-    0x58353587, 0xa33ee0c3,
-  0x5830a7d6, 0xa33a8c6c, 0x582c19ef, 0xa336384e, 0x58278bd1, 0xa331e469,
-    0x5822fd7c, 0xa32d90be,
-  0x581e6ef1, 0xa3293d4b, 0x5819e030, 0xa324ea13, 0x58155139, 0xa3209713,
-    0x5810c20b, 0xa31c444c,
-  0x580c32a7, 0xa317f1bf, 0x5807a30d, 0xa3139f6b, 0x5803133c, 0xa30f4d51,
-    0x57fe8335, 0xa30afb70,
-  0x57f9f2f8, 0xa306a9c8, 0x57f56284, 0xa3025859, 0x57f0d1da, 0xa2fe0724,
-    0x57ec40fa, 0xa2f9b629,
-  0x57e7afe4, 0xa2f56566, 0x57e31e97, 0xa2f114dd, 0x57de8d15, 0xa2ecc48e,
-    0x57d9fb5c, 0xa2e87477,
-  0x57d5696d, 0xa2e4249b, 0x57d0d747, 0xa2dfd4f7, 0x57cc44ec, 0xa2db858e,
-    0x57c7b25a, 0xa2d7365d,
-  0x57c31f92, 0xa2d2e766, 0x57be8c94, 0xa2ce98a9, 0x57b9f960, 0xa2ca4a25,
-    0x57b565f6, 0xa2c5fbda,
-  0x57b0d256, 0xa2c1adc9, 0x57ac3e80, 0xa2bd5ff2, 0x57a7aa73, 0xa2b91254,
-    0x57a31631, 0xa2b4c4f0,
-  0x579e81b8, 0xa2b077c5, 0x5799ed0a, 0xa2ac2ad3, 0x57955825, 0xa2a7de1c,
-    0x5790c30a, 0xa2a3919e,
-  0x578c2dba, 0xa29f4559, 0x57879833, 0xa29af94e, 0x57830276, 0xa296ad7d,
-    0x577e6c84, 0xa29261e5,
-  0x5779d65b, 0xa28e1687, 0x57753ffc, 0xa289cb63, 0x5770a968, 0xa2858078,
-    0x576c129d, 0xa28135c7,
-  0x57677b9d, 0xa27ceb4f, 0x5762e467, 0xa278a111, 0x575e4cfa, 0xa274570d,
-    0x5759b558, 0xa2700d43,
-  0x57551d80, 0xa26bc3b2, 0x57508572, 0xa2677a5b, 0x574bed2f, 0xa263313e,
-    0x574754b5, 0xa25ee85b,
-  0x5742bc06, 0xa25a9fb1, 0x573e2320, 0xa2565741, 0x57398a05, 0xa2520f0b,
-    0x5734f0b5, 0xa24dc70f,
-  0x5730572e, 0xa2497f4c, 0x572bbd71, 0xa24537c3, 0x5727237f, 0xa240f074,
-    0x57228957, 0xa23ca95f,
-  0x571deefa, 0xa2386284, 0x57195466, 0xa2341be3, 0x5714b99d, 0xa22fd57b,
-    0x57101e9e, 0xa22b8f4d,
-  0x570b8369, 0xa2274959, 0x5706e7ff, 0xa223039f, 0x57024c5f, 0xa21ebe1f,
-    0x56fdb08a, 0xa21a78d9,
-  0x56f9147e, 0xa21633cd, 0x56f4783d, 0xa211eefb, 0x56efdbc7, 0xa20daa62,
-    0x56eb3f1a, 0xa2096604,
-  0x56e6a239, 0xa20521e0, 0x56e20521, 0xa200ddf5, 0x56dd67d4, 0xa1fc9a45,
-    0x56d8ca51, 0xa1f856ce,
-  0x56d42c99, 0xa1f41392, 0x56cf8eab, 0xa1efd08f, 0x56caf088, 0xa1eb8dc7,
-    0x56c6522f, 0xa1e74b38,
-  0x56c1b3a1, 0xa1e308e4, 0x56bd14dd, 0xa1dec6ca, 0x56b875e4, 0xa1da84e9,
-    0x56b3d6b5, 0xa1d64343,
-  0x56af3750, 0xa1d201d7, 0x56aa97b7, 0xa1cdc0a5, 0x56a5f7e7, 0xa1c97fad,
-    0x56a157e3, 0xa1c53ef0,
-  0x569cb7a8, 0xa1c0fe6c, 0x56981739, 0xa1bcbe22, 0x56937694, 0xa1b87e13,
-    0x568ed5b9, 0xa1b43e3e,
-  0x568a34a9, 0xa1affea3, 0x56859364, 0xa1abbf42, 0x5680f1ea, 0xa1a7801b,
-    0x567c503a, 0xa1a3412f,
-  0x5677ae54, 0xa19f027c, 0x56730c3a, 0xa19ac404, 0x566e69ea, 0xa19685c7,
-    0x5669c765, 0xa19247c3,
-  0x566524aa, 0xa18e09fa, 0x566081ba, 0xa189cc6b, 0x565bde95, 0xa1858f16,
-    0x56573b3b, 0xa18151fb,
-  0x565297ab, 0xa17d151b, 0x564df3e6, 0xa178d875, 0x56494fec, 0xa1749c09,
-    0x5644abbc, 0xa1705fd8,
-  0x56400758, 0xa16c23e1, 0x563b62be, 0xa167e824, 0x5636bdef, 0xa163aca2,
-    0x563218eb, 0xa15f715a,
-  0x562d73b2, 0xa15b364d, 0x5628ce43, 0xa156fb79, 0x5624289f, 0xa152c0e1,
-    0x561f82c7, 0xa14e8682,
-  0x561adcb9, 0xa14a4c5e, 0x56163676, 0xa1461275, 0x56118ffe, 0xa141d8c5,
-    0x560ce950, 0xa13d9f51,
-  0x5608426e, 0xa1396617, 0x56039b57, 0xa1352d17, 0x55fef40a, 0xa130f451,
-    0x55fa4c89, 0xa12cbbc7,
-  0x55f5a4d2, 0xa1288376, 0x55f0fce7, 0xa1244b61, 0x55ec54c6, 0xa1201385,
-    0x55e7ac71, 0xa11bdbe4,
-  0x55e303e6, 0xa117a47e, 0x55de5b27, 0xa1136d52, 0x55d9b232, 0xa10f3661,
-    0x55d50909, 0xa10affab,
-  0x55d05faa, 0xa106c92f, 0x55cbb617, 0xa10292ed, 0x55c70c4f, 0xa0fe5ce6,
-    0x55c26251, 0xa0fa271a,
-  0x55bdb81f, 0xa0f5f189, 0x55b90db8, 0xa0f1bc32, 0x55b4631d, 0xa0ed8715,
-    0x55afb84c, 0xa0e95234,
-  0x55ab0d46, 0xa0e51d8c, 0x55a6620c, 0xa0e0e920, 0x55a1b69d, 0xa0dcb4ee,
-    0x559d0af9, 0xa0d880f7,
-  0x55985f20, 0xa0d44d3b, 0x5593b312, 0xa0d019b9, 0x558f06d0, 0xa0cbe672,
-    0x558a5a58, 0xa0c7b366,
-  0x5585adad, 0xa0c38095, 0x558100cc, 0xa0bf4dfe, 0x557c53b6, 0xa0bb1ba2,
-    0x5577a66c, 0xa0b6e981,
-  0x5572f8ed, 0xa0b2b79b, 0x556e4b39, 0xa0ae85ef, 0x55699d51, 0xa0aa547e,
-    0x5564ef34, 0xa0a62348,
-  0x556040e2, 0xa0a1f24d, 0x555b925c, 0xa09dc18d, 0x5556e3a1, 0xa0999107,
-    0x555234b1, 0xa09560bc,
-  0x554d858d, 0xa09130ad, 0x5548d634, 0xa08d00d8, 0x554426a7, 0xa088d13e,
-    0x553f76e4, 0xa084a1de,
-  0x553ac6ee, 0xa08072ba, 0x553616c2, 0xa07c43d1, 0x55316663, 0xa0781522,
-    0x552cb5ce, 0xa073e6af,
-  0x55280505, 0xa06fb876, 0x55235408, 0xa06b8a78, 0x551ea2d6, 0xa0675cb6,
-    0x5519f16f, 0xa0632f2e,
-  0x55153fd4, 0xa05f01e1, 0x55108e05, 0xa05ad4cf, 0x550bdc01, 0xa056a7f9,
-    0x550729c9, 0xa0527b5d,
-  0x5502775c, 0xa04e4efc, 0x54fdc4ba, 0xa04a22d7, 0x54f911e5, 0xa045f6ec,
-    0x54f45edb, 0xa041cb3c,
-  0x54efab9c, 0xa03d9fc8, 0x54eaf829, 0xa039748e, 0x54e64482, 0xa0354990,
-    0x54e190a6, 0xa0311ecd,
-  0x54dcdc96, 0xa02cf444, 0x54d82852, 0xa028c9f7, 0x54d373d9, 0xa0249fe5,
-    0x54cebf2c, 0xa020760e,
-  0x54ca0a4b, 0xa01c4c73, 0x54c55535, 0xa0182312, 0x54c09feb, 0xa013f9ed,
-    0x54bbea6d, 0xa00fd102,
-  0x54b734ba, 0xa00ba853, 0x54b27ed3, 0xa0077fdf, 0x54adc8b8, 0xa00357a7,
-    0x54a91269, 0x9fff2fa9,
-  0x54a45be6, 0x9ffb07e7, 0x549fa52e, 0x9ff6e060, 0x549aee42, 0x9ff2b914,
-    0x54963722, 0x9fee9204,
-  0x54917fce, 0x9fea6b2f, 0x548cc845, 0x9fe64495, 0x54881089, 0x9fe21e36,
-    0x54835898, 0x9fddf812,
-  0x547ea073, 0x9fd9d22a, 0x5479e81a, 0x9fd5ac7d, 0x54752f8d, 0x9fd1870c,
-    0x547076cc, 0x9fcd61d6,
-  0x546bbdd7, 0x9fc93cdb, 0x546704ae, 0x9fc5181b, 0x54624b50, 0x9fc0f397,
-    0x545d91bf, 0x9fbccf4f,
-  0x5458d7f9, 0x9fb8ab41, 0x54541e00, 0x9fb4876f, 0x544f63d2, 0x9fb063d9,
-    0x544aa971, 0x9fac407e,
-  0x5445eedb, 0x9fa81d5e, 0x54413412, 0x9fa3fa79, 0x543c7914, 0x9f9fd7d1,
-    0x5437bde3, 0x9f9bb563,
-  0x5433027d, 0x9f979331, 0x542e46e4, 0x9f93713b, 0x54298b17, 0x9f8f4f80,
-    0x5424cf16, 0x9f8b2e00,
-  0x542012e1, 0x9f870cbc, 0x541b5678, 0x9f82ebb4, 0x541699db, 0x9f7ecae7,
-    0x5411dd0a, 0x9f7aaa55,
-  0x540d2005, 0x9f7689ff, 0x540862cd, 0x9f7269e5, 0x5403a561, 0x9f6e4a06,
-    0x53fee7c1, 0x9f6a2a63,
-  0x53fa29ed, 0x9f660afb, 0x53f56be5, 0x9f61ebcf, 0x53f0adaa, 0x9f5dccde,
-    0x53ebef3a, 0x9f59ae29,
-  0x53e73097, 0x9f558fb0, 0x53e271c0, 0x9f517173, 0x53ddb2b6, 0x9f4d5371,
-    0x53d8f378, 0x9f4935aa,
-  0x53d43406, 0x9f45181f, 0x53cf7460, 0x9f40fad0, 0x53cab486, 0x9f3cddbd,
-    0x53c5f479, 0x9f38c0e5,
-  0x53c13439, 0x9f34a449, 0x53bc73c4, 0x9f3087e9, 0x53b7b31c, 0x9f2c6bc5,
-    0x53b2f240, 0x9f284fdc,
-  0x53ae3131, 0x9f24342f, 0x53a96fee, 0x9f2018bd, 0x53a4ae77, 0x9f1bfd88,
-    0x539feccd, 0x9f17e28e,
-  0x539b2af0, 0x9f13c7d0, 0x539668de, 0x9f0fad4e, 0x5391a699, 0x9f0b9307,
-    0x538ce421, 0x9f0778fd,
-  0x53882175, 0x9f035f2e, 0x53835e95, 0x9eff459b, 0x537e9b82, 0x9efb2c44,
-    0x5379d83c, 0x9ef71328,
-  0x537514c2, 0x9ef2fa49, 0x53705114, 0x9eeee1a5, 0x536b8d33, 0x9eeac93e,
-    0x5366c91f, 0x9ee6b112,
-  0x536204d7, 0x9ee29922, 0x535d405c, 0x9ede816e, 0x53587bad, 0x9eda69f6,
-    0x5353b6cb, 0x9ed652ba,
-  0x534ef1b5, 0x9ed23bb9, 0x534a2c6c, 0x9ece24f5, 0x534566f0, 0x9eca0e6d,
-    0x5340a140, 0x9ec5f820,
-  0x533bdb5d, 0x9ec1e210, 0x53371547, 0x9ebdcc3b, 0x53324efd, 0x9eb9b6a3,
-    0x532d8880, 0x9eb5a146,
-  0x5328c1d0, 0x9eb18c26, 0x5323faec, 0x9ead7742, 0x531f33d5, 0x9ea96299,
-    0x531a6c8b, 0x9ea54e2d,
-  0x5315a50e, 0x9ea139fd, 0x5310dd5d, 0x9e9d2608, 0x530c1579, 0x9e991250,
-    0x53074d62, 0x9e94fed4,
-  0x53028518, 0x9e90eb94, 0x52fdbc9a, 0x9e8cd890, 0x52f8f3e9, 0x9e88c5c9,
-    0x52f42b05, 0x9e84b33d,
-  0x52ef61ee, 0x9e80a0ee, 0x52ea98a4, 0x9e7c8eda, 0x52e5cf27, 0x9e787d03,
-    0x52e10576, 0x9e746b68,
-  0x52dc3b92, 0x9e705a09, 0x52d7717b, 0x9e6c48e7, 0x52d2a732, 0x9e683800,
-    0x52cddcb5, 0x9e642756,
-  0x52c91204, 0x9e6016e8, 0x52c44721, 0x9e5c06b6, 0x52bf7c0b, 0x9e57f6c0,
-    0x52bab0c2, 0x9e53e707,
-  0x52b5e546, 0x9e4fd78a, 0x52b11996, 0x9e4bc849, 0x52ac4db4, 0x9e47b944,
-    0x52a7819f, 0x9e43aa7c,
-  0x52a2b556, 0x9e3f9bf0, 0x529de8db, 0x9e3b8da0, 0x52991c2d, 0x9e377f8c,
-    0x52944f4c, 0x9e3371b5,
-  0x528f8238, 0x9e2f641b, 0x528ab4f1, 0x9e2b56bc, 0x5285e777, 0x9e27499a,
-    0x528119ca, 0x9e233cb4,
-  0x527c4bea, 0x9e1f300b, 0x52777dd7, 0x9e1b239e, 0x5272af92, 0x9e17176d,
-    0x526de11a, 0x9e130b79,
-  0x5269126e, 0x9e0effc1, 0x52644390, 0x9e0af446, 0x525f7480, 0x9e06e907,
-    0x525aa53c, 0x9e02de04,
-  0x5255d5c5, 0x9dfed33e, 0x5251061c, 0x9dfac8b4, 0x524c3640, 0x9df6be67,
-    0x52476631, 0x9df2b456,
-  0x524295f0, 0x9deeaa82, 0x523dc57b, 0x9deaa0ea, 0x5238f4d4, 0x9de6978f,
-    0x523423fb, 0x9de28e70,
-  0x522f52ee, 0x9dde858e, 0x522a81af, 0x9dda7ce9, 0x5225b03d, 0x9dd6747f,
-    0x5220de99, 0x9dd26c53,
-  0x521c0cc2, 0x9dce6463, 0x52173ab8, 0x9dca5caf, 0x5212687b, 0x9dc65539,
-    0x520d960c, 0x9dc24dfe,
-  0x5208c36a, 0x9dbe4701, 0x5203f096, 0x9dba4040, 0x51ff1d8f, 0x9db639bb,
-    0x51fa4a56, 0x9db23373,
-  0x51f576ea, 0x9dae2d68, 0x51f0a34b, 0x9daa279a, 0x51ebcf7a, 0x9da62208,
-    0x51e6fb76, 0x9da21cb2,
-  0x51e22740, 0x9d9e179a, 0x51dd52d7, 0x9d9a12be, 0x51d87e3c, 0x9d960e1f,
-    0x51d3a96f, 0x9d9209bd,
-  0x51ced46e, 0x9d8e0597, 0x51c9ff3c, 0x9d8a01ae, 0x51c529d7, 0x9d85fe02,
-    0x51c0543f, 0x9d81fa92,
-  0x51bb7e75, 0x9d7df75f, 0x51b6a879, 0x9d79f469, 0x51b1d24a, 0x9d75f1b0,
-    0x51acfbe9, 0x9d71ef34,
-  0x51a82555, 0x9d6decf4, 0x51a34e8f, 0x9d69eaf1, 0x519e7797, 0x9d65e92b,
-    0x5199a06d, 0x9d61e7a2,
-  0x5194c910, 0x9d5de656, 0x518ff180, 0x9d59e546, 0x518b19bf, 0x9d55e473,
-    0x518641cb, 0x9d51e3dd,
-  0x518169a5, 0x9d4de385, 0x517c914c, 0x9d49e368, 0x5177b8c2, 0x9d45e389,
-    0x5172e005, 0x9d41e3e7,
-  0x516e0715, 0x9d3de482, 0x51692df4, 0x9d39e559, 0x516454a0, 0x9d35e66e,
-    0x515f7b1a, 0x9d31e7bf,
-  0x515aa162, 0x9d2de94d, 0x5155c778, 0x9d29eb19, 0x5150ed5c, 0x9d25ed21,
-    0x514c130d, 0x9d21ef66,
-  0x5147388c, 0x9d1df1e9, 0x51425dd9, 0x9d19f4a8, 0x513d82f4, 0x9d15f7a4,
-    0x5138a7dd, 0x9d11fadd,
-  0x5133cc94, 0x9d0dfe54, 0x512ef119, 0x9d0a0207, 0x512a156b, 0x9d0605f7,
-    0x5125398c, 0x9d020a25,
-  0x51205d7b, 0x9cfe0e8f, 0x511b8137, 0x9cfa1337, 0x5116a4c1, 0x9cf6181c,
-    0x5111c81a, 0x9cf21d3d,
-  0x510ceb40, 0x9cee229c, 0x51080e35, 0x9cea2838, 0x510330f7, 0x9ce62e11,
-    0x50fe5388, 0x9ce23427,
-  0x50f975e6, 0x9cde3a7b, 0x50f49813, 0x9cda410b, 0x50efba0d, 0x9cd647d9,
-    0x50eadbd6, 0x9cd24ee4,
-  0x50e5fd6d, 0x9cce562c, 0x50e11ed2, 0x9cca5db1, 0x50dc4005, 0x9cc66573,
-    0x50d76106, 0x9cc26d73,
-  0x50d281d5, 0x9cbe75b0, 0x50cda272, 0x9cba7e2a, 0x50c8c2de, 0x9cb686e1,
-    0x50c3e317, 0x9cb28fd5,
-  0x50bf031f, 0x9cae9907, 0x50ba22f5, 0x9caaa276, 0x50b5429a, 0x9ca6ac23,
-    0x50b0620c, 0x9ca2b60c,
-  0x50ab814d, 0x9c9ec033, 0x50a6a05c, 0x9c9aca97, 0x50a1bf39, 0x9c96d539,
-    0x509cdde4, 0x9c92e017,
-  0x5097fc5e, 0x9c8eeb34, 0x50931aa6, 0x9c8af68d, 0x508e38bd, 0x9c870224,
-    0x508956a1, 0x9c830df8,
-  0x50847454, 0x9c7f1a0a, 0x507f91d5, 0x9c7b2659, 0x507aaf25, 0x9c7732e5,
-    0x5075cc43, 0x9c733faf,
-  0x5070e92f, 0x9c6f4cb6, 0x506c05ea, 0x9c6b59fa, 0x50672273, 0x9c67677c,
-    0x50623ecb, 0x9c63753c,
-  0x505d5af1, 0x9c5f8339, 0x505876e5, 0x9c5b9173, 0x505392a8, 0x9c579feb,
-    0x504eae39, 0x9c53aea0,
-  0x5049c999, 0x9c4fbd93, 0x5044e4c7, 0x9c4bccc3, 0x503fffc4, 0x9c47dc31,
-    0x503b1a8f, 0x9c43ebdc,
-  0x50363529, 0x9c3ffbc5, 0x50314f91, 0x9c3c0beb, 0x502c69c8, 0x9c381c4f,
-    0x502783cd, 0x9c342cf0,
-  0x50229da1, 0x9c303dcf, 0x501db743, 0x9c2c4eec, 0x5018d0b4, 0x9c286046,
-    0x5013e9f4, 0x9c2471de,
-  0x500f0302, 0x9c2083b3, 0x500a1bdf, 0x9c1c95c6, 0x5005348a, 0x9c18a816,
-    0x50004d04, 0x9c14baa4,
-  0x4ffb654d, 0x9c10cd70, 0x4ff67d64, 0x9c0ce07a, 0x4ff1954b, 0x9c08f3c1,
-    0x4fecacff, 0x9c050745,
-  0x4fe7c483, 0x9c011b08, 0x4fe2dbd5, 0x9bfd2f08, 0x4fddf2f6, 0x9bf94346,
-    0x4fd909e5, 0x9bf557c1,
-  0x4fd420a4, 0x9bf16c7a, 0x4fcf3731, 0x9bed8171, 0x4fca4d8d, 0x9be996a6,
-    0x4fc563b7, 0x9be5ac18,
-  0x4fc079b1, 0x9be1c1c8, 0x4fbb8f79, 0x9bddd7b6, 0x4fb6a510, 0x9bd9ede2,
-    0x4fb1ba76, 0x9bd6044b,
-  0x4faccfab, 0x9bd21af3, 0x4fa7e4af, 0x9bce31d8, 0x4fa2f981, 0x9bca48fa,
-    0x4f9e0e22, 0x9bc6605b,
-  0x4f992293, 0x9bc277fa, 0x4f9436d2, 0x9bbe8fd6, 0x4f8f4ae0, 0x9bbaa7f0,
-    0x4f8a5ebd, 0x9bb6c048,
-  0x4f857269, 0x9bb2d8de, 0x4f8085e4, 0x9baef1b2, 0x4f7b992d, 0x9bab0ac3,
-    0x4f76ac46, 0x9ba72413,
-  0x4f71bf2e, 0x9ba33da0, 0x4f6cd1e5, 0x9b9f576b, 0x4f67e46a, 0x9b9b7174,
-    0x4f62f6bf, 0x9b978bbc,
-  0x4f5e08e3, 0x9b93a641, 0x4f591ad6, 0x9b8fc104, 0x4f542c98, 0x9b8bdc05,
-    0x4f4f3e29, 0x9b87f744,
-  0x4f4a4f89, 0x9b8412c1, 0x4f4560b8, 0x9b802e7b, 0x4f4071b6, 0x9b7c4a74,
-    0x4f3b8284, 0x9b7866ab,
-  0x4f369320, 0x9b748320, 0x4f31a38c, 0x9b709fd3, 0x4f2cb3c7, 0x9b6cbcc4,
-    0x4f27c3d1, 0x9b68d9f3,
-  0x4f22d3aa, 0x9b64f760, 0x4f1de352, 0x9b61150b, 0x4f18f2c9, 0x9b5d32f4,
-    0x4f140210, 0x9b59511c,
-  0x4f0f1126, 0x9b556f81, 0x4f0a200b, 0x9b518e24, 0x4f052ec0, 0x9b4dad06,
-    0x4f003d43, 0x9b49cc26,
-  0x4efb4b96, 0x9b45eb83, 0x4ef659b8, 0x9b420b1f, 0x4ef167aa, 0x9b3e2af9,
-    0x4eec756b, 0x9b3a4b11,
-  0x4ee782fb, 0x9b366b68, 0x4ee2905a, 0x9b328bfc, 0x4edd9d89, 0x9b2eaccf,
-    0x4ed8aa87, 0x9b2acde0,
-  0x4ed3b755, 0x9b26ef2f, 0x4ecec3f2, 0x9b2310bc, 0x4ec9d05e, 0x9b1f3288,
-    0x4ec4dc99, 0x9b1b5492,
-  0x4ebfe8a5, 0x9b1776da, 0x4ebaf47f, 0x9b139960, 0x4eb60029, 0x9b0fbc24,
-    0x4eb10ba2, 0x9b0bdf27,
-  0x4eac16eb, 0x9b080268, 0x4ea72203, 0x9b0425e8, 0x4ea22ceb, 0x9b0049a5,
-    0x4e9d37a3, 0x9afc6da1,
-  0x4e984229, 0x9af891db, 0x4e934c80, 0x9af4b654, 0x4e8e56a5, 0x9af0db0b,
-    0x4e89609b, 0x9aed0000,
-  0x4e846a60, 0x9ae92533, 0x4e7f73f4, 0x9ae54aa5, 0x4e7a7d58, 0x9ae17056,
-    0x4e75868c, 0x9add9644,
-  0x4e708f8f, 0x9ad9bc71, 0x4e6b9862, 0x9ad5e2dd, 0x4e66a105, 0x9ad20987,
-    0x4e61a977, 0x9ace306f,
-  0x4e5cb1b9, 0x9aca5795, 0x4e57b9ca, 0x9ac67efb, 0x4e52c1ab, 0x9ac2a69e,
-    0x4e4dc95c, 0x9abece80,
-  0x4e48d0dd, 0x9abaf6a1, 0x4e43d82d, 0x9ab71eff, 0x4e3edf4d, 0x9ab3479d,
-    0x4e39e63d, 0x9aaf7079,
-  0x4e34ecfc, 0x9aab9993, 0x4e2ff38b, 0x9aa7c2ec, 0x4e2af9ea, 0x9aa3ec83,
-    0x4e260019, 0x9aa01659,
-  0x4e210617, 0x9a9c406e, 0x4e1c0be6, 0x9a986ac1, 0x4e171184, 0x9a949552,
-    0x4e1216f2, 0x9a90c022,
-  0x4e0d1c30, 0x9a8ceb31, 0x4e08213e, 0x9a89167e, 0x4e03261b, 0x9a85420a,
-    0x4dfe2ac9, 0x9a816dd5,
-  0x4df92f46, 0x9a7d99de, 0x4df43393, 0x9a79c625, 0x4def37b0, 0x9a75f2ac,
-    0x4dea3b9d, 0x9a721f71,
-  0x4de53f5a, 0x9a6e4c74, 0x4de042e7, 0x9a6a79b6, 0x4ddb4644, 0x9a66a737,
-    0x4dd64971, 0x9a62d4f7,
-  0x4dd14c6e, 0x9a5f02f5, 0x4dcc4f3b, 0x9a5b3132, 0x4dc751d8, 0x9a575fae,
-    0x4dc25445, 0x9a538e68,
-  0x4dbd5682, 0x9a4fbd61, 0x4db8588f, 0x9a4bec99, 0x4db35a6c, 0x9a481c0f,
-    0x4dae5c19, 0x9a444bc5,
-  0x4da95d96, 0x9a407bb9, 0x4da45ee3, 0x9a3cabeb, 0x4d9f6001, 0x9a38dc5d,
-    0x4d9a60ee, 0x9a350d0d,
-  0x4d9561ac, 0x9a313dfc, 0x4d90623a, 0x9a2d6f2a, 0x4d8b6298, 0x9a29a097,
-    0x4d8662c6, 0x9a25d243,
-  0x4d8162c4, 0x9a22042d, 0x4d7c6293, 0x9a1e3656, 0x4d776231, 0x9a1a68be,
-    0x4d7261a0, 0x9a169b65,
-  0x4d6d60df, 0x9a12ce4b, 0x4d685fef, 0x9a0f016f, 0x4d635ece, 0x9a0b34d3,
-    0x4d5e5d7e, 0x9a076875,
-  0x4d595bfe, 0x9a039c57, 0x4d545a4f, 0x99ffd077, 0x4d4f5870, 0x99fc04d6,
-    0x4d4a5661, 0x99f83974,
-  0x4d455422, 0x99f46e51, 0x4d4051b4, 0x99f0a36d, 0x4d3b4f16, 0x99ecd8c8,
-    0x4d364c48, 0x99e90e62,
-  0x4d31494b, 0x99e5443b, 0x4d2c461e, 0x99e17a53, 0x4d2742c2, 0x99ddb0aa,
-    0x4d223f36, 0x99d9e73f,
-  0x4d1d3b7a, 0x99d61e14, 0x4d18378f, 0x99d25528, 0x4d133374, 0x99ce8c7b,
-    0x4d0e2f2a, 0x99cac40d,
-  0x4d092ab0, 0x99c6fbde, 0x4d042607, 0x99c333ee, 0x4cff212e, 0x99bf6c3d,
-    0x4cfa1c26, 0x99bba4cb,
-  0x4cf516ee, 0x99b7dd99, 0x4cf01187, 0x99b416a5, 0x4ceb0bf0, 0x99b04ff0,
-    0x4ce6062a, 0x99ac897b,
-  0x4ce10034, 0x99a8c345, 0x4cdbfa0f, 0x99a4fd4d, 0x4cd6f3bb, 0x99a13795,
-    0x4cd1ed37, 0x999d721c,
-  0x4ccce684, 0x9999ace3, 0x4cc7dfa1, 0x9995e7e8, 0x4cc2d88f, 0x9992232d,
-    0x4cbdd14e, 0x998e5eb1,
-  0x4cb8c9dd, 0x998a9a74, 0x4cb3c23d, 0x9986d676, 0x4caeba6e, 0x998312b7,
-    0x4ca9b26f, 0x997f4f38,
-  0x4ca4aa41, 0x997b8bf8, 0x4c9fa1e4, 0x9977c8f7, 0x4c9a9958, 0x99740635,
-    0x4c95909c, 0x997043b2,
-  0x4c9087b1, 0x996c816f, 0x4c8b7e97, 0x9968bf6b, 0x4c86754e, 0x9964fda7,
-    0x4c816bd5, 0x99613c22,
-  0x4c7c622d, 0x995d7adc, 0x4c775856, 0x9959b9d5, 0x4c724e50, 0x9955f90d,
-    0x4c6d441b, 0x99523885,
-  0x4c6839b7, 0x994e783d, 0x4c632f23, 0x994ab833, 0x4c5e2460, 0x9946f869,
-    0x4c59196f, 0x994338df,
-  0x4c540e4e, 0x993f7993, 0x4c4f02fe, 0x993bba87, 0x4c49f77f, 0x9937fbbb,
-    0x4c44ebd1, 0x99343d2e,
-  0x4c3fdff4, 0x99307ee0, 0x4c3ad3e7, 0x992cc0d2, 0x4c35c7ac, 0x99290303,
-    0x4c30bb42, 0x99254574,
-  0x4c2baea9, 0x99218824, 0x4c26a1e1, 0x991dcb13, 0x4c2194e9, 0x991a0e42,
-    0x4c1c87c3, 0x991651b1,
-  0x4c177a6e, 0x9912955f, 0x4c126cea, 0x990ed94c, 0x4c0d5f37, 0x990b1d79,
-    0x4c085156, 0x990761e5,
-  0x4c034345, 0x9903a691, 0x4bfe3505, 0x98ffeb7d, 0x4bf92697, 0x98fc30a8,
-    0x4bf417f9, 0x98f87612,
-  0x4bef092d, 0x98f4bbbc, 0x4be9fa32, 0x98f101a6, 0x4be4eb08, 0x98ed47cf,
-    0x4bdfdbaf, 0x98e98e38,
-  0x4bdacc28, 0x98e5d4e0, 0x4bd5bc72, 0x98e21bc8, 0x4bd0ac8d, 0x98de62f0,
-    0x4bcb9c79, 0x98daaa57,
-  0x4bc68c36, 0x98d6f1fe, 0x4bc17bc5, 0x98d339e4, 0x4bbc6b25, 0x98cf820b,
-    0x4bb75a56, 0x98cbca70,
-  0x4bb24958, 0x98c81316, 0x4bad382c, 0x98c45bfb, 0x4ba826d1, 0x98c0a520,
-    0x4ba31548, 0x98bcee84,
-  0x4b9e0390, 0x98b93828, 0x4b98f1a9, 0x98b5820c, 0x4b93df93, 0x98b1cc30,
-    0x4b8ecd4f, 0x98ae1693,
-  0x4b89badd, 0x98aa6136, 0x4b84a83b, 0x98a6ac19, 0x4b7f956b, 0x98a2f73c,
-    0x4b7a826d, 0x989f429e,
-  0x4b756f40, 0x989b8e40, 0x4b705be4, 0x9897da22, 0x4b6b485a, 0x98942643,
-    0x4b6634a2, 0x989072a5,
-  0x4b6120bb, 0x988cbf46, 0x4b5c0ca5, 0x98890c27, 0x4b56f861, 0x98855948,
-    0x4b51e3ee, 0x9881a6a9,
-  0x4b4ccf4d, 0x987df449, 0x4b47ba7e, 0x987a422a, 0x4b42a580, 0x9876904a,
-    0x4b3d9053, 0x9872deaa,
-  0x4b387af9, 0x986f2d4a, 0x4b336570, 0x986b7c2a, 0x4b2e4fb8, 0x9867cb4a,
-    0x4b2939d2, 0x98641aa9,
-  0x4b2423be, 0x98606a49, 0x4b1f0d7b, 0x985cba28, 0x4b19f70a, 0x98590a48,
-    0x4b14e06b, 0x98555aa7,
-  0x4b0fc99d, 0x9851ab46, 0x4b0ab2a1, 0x984dfc26, 0x4b059b77, 0x984a4d45,
-    0x4b00841f, 0x98469ea4,
-  0x4afb6c98, 0x9842f043, 0x4af654e3, 0x983f4223, 0x4af13d00, 0x983b9442,
-    0x4aec24ee, 0x9837e6a1,
-  0x4ae70caf, 0x98343940, 0x4ae1f441, 0x98308c1f, 0x4adcdba5, 0x982cdf3f,
-    0x4ad7c2da, 0x9829329e,
-  0x4ad2a9e2, 0x9825863d, 0x4acd90bb, 0x9821da1d, 0x4ac87767, 0x981e2e3c,
-    0x4ac35de4, 0x981a829c,
-  0x4abe4433, 0x9816d73b, 0x4ab92a54, 0x98132c1b, 0x4ab41046, 0x980f813b,
-    0x4aaef60b, 0x980bd69b,
-  0x4aa9dba2, 0x98082c3b, 0x4aa4c10b, 0x9804821b, 0x4a9fa645, 0x9800d83c,
-    0x4a9a8b52, 0x97fd2e9c,
-  0x4a957030, 0x97f9853d, 0x4a9054e1, 0x97f5dc1e, 0x4a8b3963, 0x97f2333f,
-    0x4a861db8, 0x97ee8aa0,
-  0x4a8101de, 0x97eae242, 0x4a7be5d7, 0x97e73a23, 0x4a76c9a2, 0x97e39245,
-    0x4a71ad3e, 0x97dfeaa7,
-  0x4a6c90ad, 0x97dc4349, 0x4a6773ee, 0x97d89c2c, 0x4a625701, 0x97d4f54f,
-    0x4a5d39e6, 0x97d14eb2,
-  0x4a581c9e, 0x97cda855, 0x4a52ff27, 0x97ca0239, 0x4a4de182, 0x97c65c5c,
-    0x4a48c3b0, 0x97c2b6c1,
-  0x4a43a5b0, 0x97bf1165, 0x4a3e8782, 0x97bb6c4a, 0x4a396926, 0x97b7c76f,
-    0x4a344a9d, 0x97b422d4,
-  0x4a2f2be6, 0x97b07e7a, 0x4a2a0d01, 0x97acda60, 0x4a24edee, 0x97a93687,
-    0x4a1fcead, 0x97a592ed,
-  0x4a1aaf3f, 0x97a1ef94, 0x4a158fa3, 0x979e4c7c, 0x4a106fda, 0x979aa9a4,
-    0x4a0b4fe2, 0x9797070c,
-  0x4a062fbd, 0x979364b5, 0x4a010f6b, 0x978fc29e, 0x49fbeeea, 0x978c20c8,
-    0x49f6ce3c, 0x97887f32,
-  0x49f1ad61, 0x9784dddc, 0x49ec8c57, 0x97813cc7, 0x49e76b21, 0x977d9bf2,
-    0x49e249bc, 0x9779fb5e,
-  0x49dd282a, 0x97765b0a, 0x49d8066b, 0x9772baf7, 0x49d2e47e, 0x976f1b24,
-    0x49cdc263, 0x976b7b92,
-  0x49c8a01b, 0x9767dc41, 0x49c37da5, 0x97643d2f, 0x49be5b02, 0x97609e5f,
-    0x49b93832, 0x975cffcf,
-  0x49b41533, 0x9759617f, 0x49aef208, 0x9755c370, 0x49a9ceaf, 0x975225a1,
-    0x49a4ab28, 0x974e8813,
-  0x499f8774, 0x974aeac6, 0x499a6393, 0x97474db9, 0x49953f84, 0x9743b0ed,
-    0x49901b48, 0x97401462,
-  0x498af6df, 0x973c7817, 0x4985d248, 0x9738dc0d, 0x4980ad84, 0x97354043,
-    0x497b8892, 0x9731a4ba,
-  0x49766373, 0x972e0971, 0x49713e27, 0x972a6e6a, 0x496c18ae, 0x9726d3a3,
-    0x4966f307, 0x9723391c,
-  0x4961cd33, 0x971f9ed7, 0x495ca732, 0x971c04d2, 0x49578103, 0x97186b0d,
-    0x49525aa7, 0x9714d18a,
-  0x494d341e, 0x97113847, 0x49480d68, 0x970d9f45, 0x4942e684, 0x970a0683,
-    0x493dbf74, 0x97066e03,
-  0x49389836, 0x9702d5c3, 0x493370cb, 0x96ff3dc4, 0x492e4933, 0x96fba605,
-    0x4929216e, 0x96f80e88,
-  0x4923f97b, 0x96f4774b, 0x491ed15c, 0x96f0e04f, 0x4919a90f, 0x96ed4994,
-    0x49148095, 0x96e9b319,
-  0x490f57ee, 0x96e61ce0, 0x490a2f1b, 0x96e286e7, 0x4905061a, 0x96def12f,
-    0x48ffdcec, 0x96db5bb8,
-  0x48fab391, 0x96d7c682, 0x48f58a09, 0x96d4318d, 0x48f06054, 0x96d09cd8,
-    0x48eb3672, 0x96cd0865,
-  0x48e60c62, 0x96c97432, 0x48e0e227, 0x96c5e040, 0x48dbb7be, 0x96c24c8f,
-    0x48d68d28, 0x96beb91f,
-  0x48d16265, 0x96bb25f0, 0x48cc3775, 0x96b79302, 0x48c70c59, 0x96b40055,
-    0x48c1e10f, 0x96b06de9,
-  0x48bcb599, 0x96acdbbe, 0x48b789f5, 0x96a949d3, 0x48b25e25, 0x96a5b82a,
-    0x48ad3228, 0x96a226c2,
-  0x48a805ff, 0x969e959b, 0x48a2d9a8, 0x969b04b4, 0x489dad25, 0x9697740f,
-    0x48988074, 0x9693e3ab,
-  0x48935397, 0x96905388, 0x488e268e, 0x968cc3a5, 0x4888f957, 0x96893404,
-    0x4883cbf4, 0x9685a4a4,
-  0x487e9e64, 0x96821585, 0x487970a7, 0x967e86a7, 0x487442be, 0x967af80a,
-    0x486f14a8, 0x967769af,
-  0x4869e665, 0x9673db94, 0x4864b7f5, 0x96704dba, 0x485f8959, 0x966cc022,
-    0x485a5a90, 0x966932cb,
-  0x48552b9b, 0x9665a5b4, 0x484ffc79, 0x966218df, 0x484acd2a, 0x965e8c4b,
-    0x48459daf, 0x965afff9,
-  0x48406e08, 0x965773e7, 0x483b3e33, 0x9653e817, 0x48360e32, 0x96505c88,
-    0x4830de05, 0x964cd139,
-  0x482badab, 0x9649462d, 0x48267d24, 0x9645bb61, 0x48214c71, 0x964230d7,
-    0x481c1b92, 0x963ea68d,
-  0x4816ea86, 0x963b1c86, 0x4811b94d, 0x963792bf, 0x480c87e8, 0x96340939,
-    0x48075657, 0x96307ff5,
-  0x48022499, 0x962cf6f2, 0x47fcf2af, 0x96296e31, 0x47f7c099, 0x9625e5b0,
-    0x47f28e56, 0x96225d71,
-  0x47ed5be6, 0x961ed574, 0x47e8294a, 0x961b4db7, 0x47e2f682, 0x9617c63c,
-    0x47ddc38e, 0x96143f02,
-  0x47d8906d, 0x9610b80a, 0x47d35d20, 0x960d3153, 0x47ce29a7, 0x9609aadd,
-    0x47c8f601, 0x960624a9,
-  0x47c3c22f, 0x96029eb6, 0x47be8e31, 0x95ff1904, 0x47b95a06, 0x95fb9394,
-    0x47b425af, 0x95f80e65,
-  0x47aef12c, 0x95f48977, 0x47a9bc7d, 0x95f104cb, 0x47a487a2, 0x95ed8061,
-    0x479f529a, 0x95e9fc38,
-  0x479a1d67, 0x95e67850, 0x4794e807, 0x95e2f4a9, 0x478fb27b, 0x95df7145,
-    0x478a7cc2, 0x95dbee21,
-  0x478546de, 0x95d86b3f, 0x478010cd, 0x95d4e89f, 0x477ada91, 0x95d16640,
-    0x4775a428, 0x95cde423,
-  0x47706d93, 0x95ca6247, 0x476b36d3, 0x95c6e0ac, 0x4765ffe6, 0x95c35f53,
-    0x4760c8cd, 0x95bfde3c,
-  0x475b9188, 0x95bc5d66, 0x47565a17, 0x95b8dcd2, 0x4751227a, 0x95b55c7f,
-    0x474beab1, 0x95b1dc6e,
-  0x4746b2bc, 0x95ae5c9f, 0x47417a9b, 0x95aadd11, 0x473c424e, 0x95a75dc4,
-    0x473709d5, 0x95a3deb9,
-  0x4731d131, 0x95a05ff0, 0x472c9860, 0x959ce169, 0x47275f63, 0x95996323,
-    0x4722263b, 0x9595e51e,
-  0x471cece7, 0x9592675c, 0x4717b367, 0x958ee9db, 0x471279ba, 0x958b6c9b,
-    0x470d3fe3, 0x9587ef9e,
-  0x470805df, 0x958472e2, 0x4702cbaf, 0x9580f667, 0x46fd9154, 0x957d7a2f,
-    0x46f856cd, 0x9579fe38,
-  0x46f31c1a, 0x95768283, 0x46ede13b, 0x9573070f, 0x46e8a631, 0x956f8bdd,
-    0x46e36afb, 0x956c10ed,
-  0x46de2f99, 0x9568963f, 0x46d8f40b, 0x95651bd2, 0x46d3b852, 0x9561a1a8,
-    0x46ce7c6d, 0x955e27bf,
-  0x46c9405c, 0x955aae17, 0x46c40420, 0x955734b2, 0x46bec7b8, 0x9553bb8e,
-    0x46b98b24, 0x955042ac,
-  0x46b44e65, 0x954cca0c, 0x46af117a, 0x954951ae, 0x46a9d464, 0x9545d992,
-    0x46a49722, 0x954261b7,
-  0x469f59b4, 0x953eea1e, 0x469a1c1b, 0x953b72c7, 0x4694de56, 0x9537fbb2,
-    0x468fa066, 0x953484df,
-  0x468a624a, 0x95310e4e, 0x46852403, 0x952d97fe, 0x467fe590, 0x952a21f1,
-    0x467aa6f2, 0x9526ac25,
-  0x46756828, 0x9523369c, 0x46702933, 0x951fc154, 0x466aea12, 0x951c4c4e,
-    0x4665aac6, 0x9518d78a,
-  0x46606b4e, 0x95156308, 0x465b2bab, 0x9511eec8, 0x4655ebdd, 0x950e7aca,
-    0x4650abe3, 0x950b070e,
-  0x464b6bbe, 0x95079394, 0x46462b6d, 0x9504205c, 0x4640eaf2, 0x9500ad66,
-    0x463baa4a, 0x94fd3ab1,
-  0x46366978, 0x94f9c83f, 0x4631287a, 0x94f6560f, 0x462be751, 0x94f2e421,
-    0x4626a5fd, 0x94ef7275,
-  0x4621647d, 0x94ec010b, 0x461c22d2, 0x94e88fe3, 0x4616e0fc, 0x94e51efd,
-    0x46119efa, 0x94e1ae59,
-  0x460c5cce, 0x94de3df8, 0x46071a76, 0x94dacdd8, 0x4601d7f3, 0x94d75dfa,
-    0x45fc9545, 0x94d3ee5f,
-  0x45f7526b, 0x94d07f05, 0x45f20f67, 0x94cd0fee, 0x45eccc37, 0x94c9a119,
-    0x45e788dc, 0x94c63286,
-  0x45e24556, 0x94c2c435, 0x45dd01a5, 0x94bf5627, 0x45d7bdc9, 0x94bbe85a,
-    0x45d279c2, 0x94b87ad0,
-  0x45cd358f, 0x94b50d87, 0x45c7f132, 0x94b1a081, 0x45c2acaa, 0x94ae33be,
-    0x45bd67f6, 0x94aac73c,
-  0x45b82318, 0x94a75afd, 0x45b2de0e, 0x94a3eeff, 0x45ad98da, 0x94a08344,
-    0x45a8537a, 0x949d17cc,
-  0x45a30df0, 0x9499ac95, 0x459dc83b, 0x949641a1, 0x4598825a, 0x9492d6ef,
-    0x45933c4f, 0x948f6c7f,
-  0x458df619, 0x948c0252, 0x4588afb8, 0x94889867, 0x4583692c, 0x94852ebe,
-    0x457e2275, 0x9481c557,
-  0x4578db93, 0x947e5c33, 0x45739487, 0x947af351, 0x456e4d4f, 0x94778ab1,
-    0x456905ed, 0x94742254,
-  0x4563be60, 0x9470ba39, 0x455e76a8, 0x946d5260, 0x45592ec6, 0x9469eaca,
-    0x4553e6b8, 0x94668376,
-  0x454e9e80, 0x94631c65, 0x4549561d, 0x945fb596, 0x45440d90, 0x945c4f09,
-    0x453ec4d7, 0x9458e8bf,
-  0x45397bf4, 0x945582b7, 0x453432e6, 0x94521cf1, 0x452ee9ae, 0x944eb76e,
-    0x4529a04b, 0x944b522d,
-  0x452456bd, 0x9447ed2f, 0x451f0d04, 0x94448873, 0x4519c321, 0x944123fa,
-    0x45147913, 0x943dbfc3,
-  0x450f2edb, 0x943a5bcf, 0x4509e478, 0x9436f81d, 0x450499eb, 0x943394ad,
-    0x44ff4f32, 0x94303180,
-  0x44fa0450, 0x942cce96, 0x44f4b943, 0x94296bee, 0x44ef6e0b, 0x94260989,
-    0x44ea22a9, 0x9422a766,
-  0x44e4d71c, 0x941f4585, 0x44df8b64, 0x941be3e8, 0x44da3f83, 0x9418828c,
-    0x44d4f376, 0x94152174,
-  0x44cfa740, 0x9411c09e, 0x44ca5adf, 0x940e600a, 0x44c50e53, 0x940affb9,
-    0x44bfc19d, 0x94079fab,
-  0x44ba74bd, 0x94043fdf, 0x44b527b2, 0x9400e056, 0x44afda7d, 0x93fd810f,
-    0x44aa8d1d, 0x93fa220b,
-  0x44a53f93, 0x93f6c34a, 0x449ff1df, 0x93f364cb, 0x449aa400, 0x93f0068f,
-    0x449555f7, 0x93eca896,
-  0x449007c4, 0x93e94adf, 0x448ab967, 0x93e5ed6b, 0x44856adf, 0x93e2903a,
-    0x44801c2d, 0x93df334c,
-  0x447acd50, 0x93dbd6a0, 0x44757e4a, 0x93d87a36, 0x44702f19, 0x93d51e10,
-    0x446adfbe, 0x93d1c22c,
-  0x44659039, 0x93ce668b, 0x44604089, 0x93cb0b2d, 0x445af0b0, 0x93c7b011,
-    0x4455a0ac, 0x93c45539,
-  0x4450507e, 0x93c0faa3, 0x444b0026, 0x93bda04f, 0x4445afa4, 0x93ba463f,
-    0x44405ef8, 0x93b6ec71,
-  0x443b0e21, 0x93b392e6, 0x4435bd21, 0x93b0399e, 0x44306bf6, 0x93ace099,
-    0x442b1aa2, 0x93a987d6,
-  0x4425c923, 0x93a62f57, 0x4420777b, 0x93a2d71a, 0x441b25a8, 0x939f7f20,
-    0x4415d3ab, 0x939c2769,
-  0x44108184, 0x9398cff5, 0x440b2f34, 0x939578c3, 0x4405dcb9, 0x939221d5,
-    0x44008a14, 0x938ecb29,
-  0x43fb3746, 0x938b74c1, 0x43f5e44d, 0x93881e9b, 0x43f0912b, 0x9384c8b8,
-    0x43eb3ddf, 0x93817318,
-  0x43e5ea68, 0x937e1dbb, 0x43e096c8, 0x937ac8a1, 0x43db42fe, 0x937773ca,
-    0x43d5ef0a, 0x93741f35,
-  0x43d09aed, 0x9370cae4, 0x43cb46a5, 0x936d76d6, 0x43c5f234, 0x936a230a,
-    0x43c09d99, 0x9366cf82,
-  0x43bb48d4, 0x93637c3d, 0x43b5f3e5, 0x9360293a, 0x43b09ecc, 0x935cd67b,
-    0x43ab498a, 0x935983ff,
-  0x43a5f41e, 0x935631c5, 0x43a09e89, 0x9352dfcf, 0x439b48c9, 0x934f8e1c,
-    0x4395f2e0, 0x934c3cab,
-  0x43909ccd, 0x9348eb7e, 0x438b4691, 0x93459a94, 0x4385f02a, 0x934249ed,
-    0x4380999b, 0x933ef989,
-  0x437b42e1, 0x933ba968, 0x4375ebfe, 0x9338598a, 0x437094f1, 0x933509f0,
-    0x436b3dbb, 0x9331ba98,
-  0x4365e65b, 0x932e6b84, 0x43608ed2, 0x932b1cb2, 0x435b371f, 0x9327ce24,
-    0x4355df42, 0x93247fd9,
-  0x4350873c, 0x932131d1, 0x434b2f0c, 0x931de40c, 0x4345d6b3, 0x931a968b,
-    0x43407e31, 0x9317494c,
-  0x433b2585, 0x9313fc51, 0x4335ccaf, 0x9310af99, 0x433073b0, 0x930d6324,
-    0x432b1a87, 0x930a16f3,
-  0x4325c135, 0x9306cb04, 0x432067ba, 0x93037f59, 0x431b0e15, 0x930033f1,
-    0x4315b447, 0x92fce8cc,
-  0x43105a50, 0x92f99deb, 0x430b002f, 0x92f6534c, 0x4305a5e5, 0x92f308f1,
-    0x43004b71, 0x92efbeda,
-  0x42faf0d4, 0x92ec7505, 0x42f5960e, 0x92e92b74, 0x42f03b1e, 0x92e5e226,
-    0x42eae005, 0x92e2991c,
-  0x42e584c3, 0x92df5054, 0x42e02958, 0x92dc07d0, 0x42dacdc3, 0x92d8bf90,
-    0x42d57205, 0x92d57792,
-  0x42d0161e, 0x92d22fd9, 0x42caba0e, 0x92cee862, 0x42c55dd4, 0x92cba12f,
-    0x42c00172, 0x92c85a3f,
-  0x42baa4e6, 0x92c51392, 0x42b54831, 0x92c1cd29, 0x42afeb53, 0x92be8703,
-    0x42aa8e4b, 0x92bb4121,
-  0x42a5311b, 0x92b7fb82, 0x429fd3c1, 0x92b4b626, 0x429a763f, 0x92b1710e,
-    0x42951893, 0x92ae2c3a,
-  0x428fbabe, 0x92aae7a8, 0x428a5cc0, 0x92a7a35a, 0x4284fe99, 0x92a45f50,
-    0x427fa049, 0x92a11b89,
-  0x427a41d0, 0x929dd806, 0x4274e32e, 0x929a94c6, 0x426f8463, 0x929751c9,
-    0x426a256f, 0x92940f10,
-  0x4264c653, 0x9290cc9b, 0x425f670d, 0x928d8a69, 0x425a079e, 0x928a487a,
-    0x4254a806, 0x928706cf,
-  0x424f4845, 0x9283c568, 0x4249e85c, 0x92808444, 0x42448849, 0x927d4363,
-    0x423f280e, 0x927a02c7,
-  0x4239c7aa, 0x9276c26d, 0x4234671d, 0x92738258, 0x422f0667, 0x92704286,
-    0x4229a588, 0x926d02f7,
-  0x42244481, 0x9269c3ac, 0x421ee350, 0x926684a5, 0x421981f7, 0x926345e1,
-    0x42142075, 0x92600761,
-  0x420ebecb, 0x925cc924, 0x42095cf7, 0x92598b2b, 0x4203fafb, 0x92564d76,
-    0x41fe98d6, 0x92531005,
-  0x41f93689, 0x924fd2d7, 0x41f3d413, 0x924c95ec, 0x41ee7174, 0x92495946,
-    0x41e90eac, 0x92461ce3,
-  0x41e3abbc, 0x9242e0c4, 0x41de48a3, 0x923fa4e8, 0x41d8e561, 0x923c6950,
-    0x41d381f7, 0x92392dfc,
-  0x41ce1e65, 0x9235f2ec, 0x41c8baa9, 0x9232b81f, 0x41c356c5, 0x922f7d96,
-    0x41bdf2b9, 0x922c4351,
-  0x41b88e84, 0x9229094f, 0x41b32a26, 0x9225cf91, 0x41adc5a0, 0x92229617,
-    0x41a860f1, 0x921f5ce1,
-  0x41a2fc1a, 0x921c23ef, 0x419d971b, 0x9218eb40, 0x419831f3, 0x9215b2d5,
-    0x4192cca2, 0x92127aae,
-  0x418d6729, 0x920f42cb, 0x41880188, 0x920c0b2c, 0x41829bbe, 0x9208d3d0,
-    0x417d35cb, 0x92059cb8,
-  0x4177cfb1, 0x920265e4, 0x4172696e, 0x91ff2f54, 0x416d0302, 0x91fbf908,
-    0x41679c6f, 0x91f8c300,
-  0x416235b2, 0x91f58d3b, 0x415ccece, 0x91f257bb, 0x415767c1, 0x91ef227e,
-    0x4152008c, 0x91ebed85,
-  0x414c992f, 0x91e8b8d0, 0x414731a9, 0x91e5845f, 0x4141c9fb, 0x91e25032,
-    0x413c6225, 0x91df1c49,
-  0x4136fa27, 0x91dbe8a4, 0x41319200, 0x91d8b542, 0x412c29b1, 0x91d58225,
-    0x4126c13a, 0x91d24f4c,
-  0x4121589b, 0x91cf1cb6, 0x411befd3, 0x91cbea65, 0x411686e4, 0x91c8b857,
-    0x41111dcc, 0x91c5868e,
-  0x410bb48c, 0x91c25508, 0x41064b24, 0x91bf23c7, 0x4100e194, 0x91bbf2c9,
-    0x40fb77dc, 0x91b8c210,
-  0x40f60dfb, 0x91b5919a, 0x40f0a3f3, 0x91b26169, 0x40eb39c3, 0x91af317c,
-    0x40e5cf6a, 0x91ac01d2,
-  0x40e064ea, 0x91a8d26d, 0x40dafa41, 0x91a5a34c, 0x40d58f71, 0x91a2746f,
-    0x40d02478, 0x919f45d6,
-  0x40cab958, 0x919c1781, 0x40c54e0f, 0x9198e970, 0x40bfe29f, 0x9195bba3,
-    0x40ba7706, 0x91928e1a,
-  0x40b50b46, 0x918f60d6, 0x40af9f5e, 0x918c33d5, 0x40aa334e, 0x91890719,
-    0x40a4c716, 0x9185daa1,
-  0x409f5ab6, 0x9182ae6d, 0x4099ee2e, 0x917f827d, 0x4094817f, 0x917c56d1,
-    0x408f14a7, 0x91792b6a,
-  0x4089a7a8, 0x91760047, 0x40843a81, 0x9172d567, 0x407ecd32, 0x916faacc,
-    0x40795fbc, 0x916c8076,
-  0x4073f21d, 0x91695663, 0x406e8457, 0x91662c95, 0x40691669, 0x9163030b,
-    0x4063a854, 0x915fd9c5,
-  0x405e3a16, 0x915cb0c3, 0x4058cbb1, 0x91598806, 0x40535d24, 0x91565f8d,
-    0x404dee70, 0x91533758,
-  0x40487f94, 0x91500f67, 0x40431090, 0x914ce7bb, 0x403da165, 0x9149c053,
-    0x40383212, 0x9146992f,
-  0x4032c297, 0x91437250, 0x402d52f5, 0x91404bb5, 0x4027e32b, 0x913d255e,
-    0x4022733a, 0x9139ff4b,
-  0x401d0321, 0x9136d97d, 0x401792e0, 0x9133b3f3, 0x40122278, 0x91308eae,
-    0x400cb1e9, 0x912d69ad,
-  0x40074132, 0x912a44f0, 0x4001d053, 0x91272078, 0x3ffc5f4d, 0x9123fc44,
-    0x3ff6ee1f, 0x9120d854,
-  0x3ff17cca, 0x911db4a9, 0x3fec0b4e, 0x911a9142, 0x3fe699aa, 0x91176e1f,
-    0x3fe127df, 0x91144b41,
-  0x3fdbb5ec, 0x911128a8, 0x3fd643d2, 0x910e0653, 0x3fd0d191, 0x910ae442,
-    0x3fcb5f28, 0x9107c276,
-  0x3fc5ec98, 0x9104a0ee, 0x3fc079e0, 0x91017faa, 0x3fbb0702, 0x90fe5eab,
-    0x3fb593fb, 0x90fb3df1,
-  0x3fb020ce, 0x90f81d7b, 0x3faaad79, 0x90f4fd4a, 0x3fa539fd, 0x90f1dd5d,
-    0x3f9fc65a, 0x90eebdb4,
-  0x3f9a5290, 0x90eb9e50, 0x3f94de9e, 0x90e87f31, 0x3f8f6a85, 0x90e56056,
-    0x3f89f645, 0x90e241bf,
-  0x3f8481dd, 0x90df236e, 0x3f7f0d4f, 0x90dc0560, 0x3f799899, 0x90d8e798,
-    0x3f7423bc, 0x90d5ca13,
-  0x3f6eaeb8, 0x90d2acd4, 0x3f69398d, 0x90cf8fd9, 0x3f63c43b, 0x90cc7322,
-    0x3f5e4ec2, 0x90c956b1,
-  0x3f58d921, 0x90c63a83, 0x3f53635a, 0x90c31e9b, 0x3f4ded6b, 0x90c002f7,
-    0x3f487755, 0x90bce797,
-  0x3f430119, 0x90b9cc7d, 0x3f3d8ab5, 0x90b6b1a6, 0x3f38142a, 0x90b39715,
-    0x3f329d79, 0x90b07cc8,
-  0x3f2d26a0, 0x90ad62c0, 0x3f27afa1, 0x90aa48fd, 0x3f22387a, 0x90a72f7e,
-    0x3f1cc12c, 0x90a41644,
-  0x3f1749b8, 0x90a0fd4e, 0x3f11d21d, 0x909de49e, 0x3f0c5a5a, 0x909acc32,
-    0x3f06e271, 0x9097b40a,
-  0x3f016a61, 0x90949c28, 0x3efbf22a, 0x9091848a, 0x3ef679cc, 0x908e6d31,
-    0x3ef10148, 0x908b561c,
-  0x3eeb889c, 0x90883f4d, 0x3ee60fca, 0x908528c2, 0x3ee096d1, 0x9082127c,
-    0x3edb1db1, 0x907efc7a,
-  0x3ed5a46b, 0x907be6be, 0x3ed02afd, 0x9078d146, 0x3ecab169, 0x9075bc13,
-    0x3ec537ae, 0x9072a725,
-  0x3ebfbdcd, 0x906f927c, 0x3eba43c4, 0x906c7e17, 0x3eb4c995, 0x906969f8,
-    0x3eaf4f40, 0x9066561d,
-  0x3ea9d4c3, 0x90634287, 0x3ea45a21, 0x90602f35, 0x3e9edf57, 0x905d1c29,
-    0x3e996467, 0x905a0962,
-  0x3e93e950, 0x9056f6df, 0x3e8e6e12, 0x9053e4a1, 0x3e88f2ae, 0x9050d2a9,
-    0x3e837724, 0x904dc0f5,
-  0x3e7dfb73, 0x904aaf86, 0x3e787f9b, 0x90479e5c, 0x3e73039d, 0x90448d76,
-    0x3e6d8778, 0x90417cd6,
-  0x3e680b2c, 0x903e6c7b, 0x3e628ebb, 0x903b5c64, 0x3e5d1222, 0x90384c93,
-    0x3e579564, 0x90353d06,
-  0x3e52187f, 0x90322dbf, 0x3e4c9b73, 0x902f1ebc, 0x3e471e41, 0x902c0fff,
-    0x3e41a0e8, 0x90290186,
-  0x3e3c2369, 0x9025f352, 0x3e36a5c4, 0x9022e564, 0x3e3127f9, 0x901fd7ba,
-    0x3e2baa07, 0x901cca55,
-  0x3e262bee, 0x9019bd36, 0x3e20adaf, 0x9016b05b, 0x3e1b2f4a, 0x9013a3c5,
-    0x3e15b0bf, 0x90109775,
-  0x3e10320d, 0x900d8b69, 0x3e0ab336, 0x900a7fa3, 0x3e053437, 0x90077422,
-    0x3dffb513, 0x900468e5,
-  0x3dfa35c8, 0x90015dee, 0x3df4b657, 0x8ffe533c, 0x3def36c0, 0x8ffb48cf,
-    0x3de9b703, 0x8ff83ea7,
-  0x3de4371f, 0x8ff534c4, 0x3ddeb716, 0x8ff22b26, 0x3dd936e6, 0x8fef21ce,
-    0x3dd3b690, 0x8fec18ba,
-  0x3dce3614, 0x8fe90fec, 0x3dc8b571, 0x8fe60763, 0x3dc334a9, 0x8fe2ff1f,
-    0x3dbdb3ba, 0x8fdff720,
-  0x3db832a6, 0x8fdcef66, 0x3db2b16b, 0x8fd9e7f2, 0x3dad300b, 0x8fd6e0c2,
-    0x3da7ae84, 0x8fd3d9d8,
-  0x3da22cd7, 0x8fd0d333, 0x3d9cab04, 0x8fcdccd3, 0x3d97290b, 0x8fcac6b9,
-    0x3d91a6ed, 0x8fc7c0e3,
-  0x3d8c24a8, 0x8fc4bb53, 0x3d86a23d, 0x8fc1b608, 0x3d811fac, 0x8fbeb103,
-    0x3d7b9cf6, 0x8fbbac42,
-  0x3d761a19, 0x8fb8a7c7, 0x3d709717, 0x8fb5a391, 0x3d6b13ee, 0x8fb29fa0,
-    0x3d6590a0, 0x8faf9bf5,
-  0x3d600d2c, 0x8fac988f, 0x3d5a8992, 0x8fa9956e, 0x3d5505d2, 0x8fa69293,
-    0x3d4f81ec, 0x8fa38ffc,
-  0x3d49fde1, 0x8fa08dab, 0x3d4479b0, 0x8f9d8ba0, 0x3d3ef559, 0x8f9a89da,
-    0x3d3970dc, 0x8f978859,
-  0x3d33ec39, 0x8f94871d, 0x3d2e6771, 0x8f918627, 0x3d28e282, 0x8f8e8576,
-    0x3d235d6f, 0x8f8b850a,
-  0x3d1dd835, 0x8f8884e4, 0x3d1852d6, 0x8f858503, 0x3d12cd51, 0x8f828568,
-    0x3d0d47a6, 0x8f7f8612,
-  0x3d07c1d6, 0x8f7c8701, 0x3d023be0, 0x8f798836, 0x3cfcb5c4, 0x8f7689b0,
-    0x3cf72f83, 0x8f738b70,
-  0x3cf1a91c, 0x8f708d75, 0x3cec2290, 0x8f6d8fbf, 0x3ce69bde, 0x8f6a924f,
-    0x3ce11507, 0x8f679525,
-  0x3cdb8e09, 0x8f649840, 0x3cd606e7, 0x8f619ba0, 0x3cd07f9f, 0x8f5e9f46,
-    0x3ccaf831, 0x8f5ba331,
-  0x3cc5709e, 0x8f58a761, 0x3cbfe8e5, 0x8f55abd8, 0x3cba6107, 0x8f52b093,
-    0x3cb4d904, 0x8f4fb595,
-  0x3caf50da, 0x8f4cbadb, 0x3ca9c88c, 0x8f49c067, 0x3ca44018, 0x8f46c639,
-    0x3c9eb77f, 0x8f43cc50,
-  0x3c992ec0, 0x8f40d2ad, 0x3c93a5dc, 0x8f3dd950, 0x3c8e1cd3, 0x8f3ae038,
-    0x3c8893a4, 0x8f37e765,
-  0x3c830a50, 0x8f34eed8, 0x3c7d80d6, 0x8f31f691, 0x3c77f737, 0x8f2efe8f,
-    0x3c726d73, 0x8f2c06d3,
-  0x3c6ce38a, 0x8f290f5c, 0x3c67597b, 0x8f26182b, 0x3c61cf48, 0x8f232140,
-    0x3c5c44ee, 0x8f202a9a,
-  0x3c56ba70, 0x8f1d343a, 0x3c512fcc, 0x8f1a3e1f, 0x3c4ba504, 0x8f17484b,
-    0x3c461a16, 0x8f1452bb,
-  0x3c408f03, 0x8f115d72, 0x3c3b03ca, 0x8f0e686e, 0x3c35786d, 0x8f0b73b0,
-    0x3c2fecea, 0x8f087f37,
-  0x3c2a6142, 0x8f058b04, 0x3c24d575, 0x8f029717, 0x3c1f4983, 0x8effa370,
-    0x3c19bd6c, 0x8efcb00e,
-  0x3c143130, 0x8ef9bcf2, 0x3c0ea4cf, 0x8ef6ca1c, 0x3c091849, 0x8ef3d78b,
-    0x3c038b9e, 0x8ef0e540,
-  0x3bfdfecd, 0x8eedf33b, 0x3bf871d8, 0x8eeb017c, 0x3bf2e4be, 0x8ee81002,
-    0x3bed577e, 0x8ee51ece,
-  0x3be7ca1a, 0x8ee22de0, 0x3be23c91, 0x8edf3d38, 0x3bdcaee3, 0x8edc4cd5,
-    0x3bd72110, 0x8ed95cb8,
-  0x3bd19318, 0x8ed66ce1, 0x3bcc04fb, 0x8ed37d50, 0x3bc676b9, 0x8ed08e05,
-    0x3bc0e853, 0x8ecd9eff,
-  0x3bbb59c7, 0x8ecab040, 0x3bb5cb17, 0x8ec7c1c6, 0x3bb03c42, 0x8ec4d392,
-    0x3baaad48, 0x8ec1e5a4,
-  0x3ba51e29, 0x8ebef7fb, 0x3b9f8ee5, 0x8ebc0a99, 0x3b99ff7d, 0x8eb91d7c,
-    0x3b946ff0, 0x8eb630a6,
-  0x3b8ee03e, 0x8eb34415, 0x3b895068, 0x8eb057ca, 0x3b83c06c, 0x8ead6bc5,
-    0x3b7e304c, 0x8eaa8006,
-  0x3b78a007, 0x8ea7948c, 0x3b730f9e, 0x8ea4a959, 0x3b6d7f10, 0x8ea1be6c,
-    0x3b67ee5d, 0x8e9ed3c4,
-  0x3b625d86, 0x8e9be963, 0x3b5ccc8a, 0x8e98ff47, 0x3b573b69, 0x8e961571,
-    0x3b51aa24, 0x8e932be2,
-  0x3b4c18ba, 0x8e904298, 0x3b46872c, 0x8e8d5994, 0x3b40f579, 0x8e8a70d7,
-    0x3b3b63a1, 0x8e87885f,
-  0x3b35d1a5, 0x8e84a02d, 0x3b303f84, 0x8e81b841, 0x3b2aad3f, 0x8e7ed09b,
-    0x3b251ad6, 0x8e7be93c,
-  0x3b1f8848, 0x8e790222, 0x3b19f595, 0x8e761b4e, 0x3b1462be, 0x8e7334c1,
-    0x3b0ecfc3, 0x8e704e79,
-  0x3b093ca3, 0x8e6d6877, 0x3b03a95e, 0x8e6a82bc, 0x3afe15f6, 0x8e679d47,
-    0x3af88269, 0x8e64b817,
-  0x3af2eeb7, 0x8e61d32e, 0x3aed5ae1, 0x8e5eee8b, 0x3ae7c6e7, 0x8e5c0a2e,
-    0x3ae232c9, 0x8e592617,
-  0x3adc9e86, 0x8e564246, 0x3ad70a1f, 0x8e535ebb, 0x3ad17593, 0x8e507b76,
-    0x3acbe0e3, 0x8e4d9878,
-  0x3ac64c0f, 0x8e4ab5bf, 0x3ac0b717, 0x8e47d34d, 0x3abb21fb, 0x8e44f121,
-    0x3ab58cba, 0x8e420f3b,
-  0x3aaff755, 0x8e3f2d9b, 0x3aaa61cc, 0x8e3c4c41, 0x3aa4cc1e, 0x8e396b2e,
-    0x3a9f364d, 0x8e368a61,
-  0x3a99a057, 0x8e33a9da, 0x3a940a3e, 0x8e30c999, 0x3a8e7400, 0x8e2de99e,
-    0x3a88dd9d, 0x8e2b09e9,
-  0x3a834717, 0x8e282a7b, 0x3a7db06d, 0x8e254b53, 0x3a78199f, 0x8e226c71,
-    0x3a7282ac, 0x8e1f8dd6,
-  0x3a6ceb96, 0x8e1caf80, 0x3a67545b, 0x8e19d171, 0x3a61bcfd, 0x8e16f3a9,
-    0x3a5c257a, 0x8e141626,
-  0x3a568dd4, 0x8e1138ea, 0x3a50f609, 0x8e0e5bf4, 0x3a4b5e1b, 0x8e0b7f44,
-    0x3a45c608, 0x8e08a2db,
-  0x3a402dd2, 0x8e05c6b7, 0x3a3a9577, 0x8e02eadb, 0x3a34fcf9, 0x8e000f44,
-    0x3a2f6457, 0x8dfd33f4,
-  0x3a29cb91, 0x8dfa58ea, 0x3a2432a7, 0x8df77e27, 0x3a1e9999, 0x8df4a3a9,
-    0x3a190068, 0x8df1c973,
-  0x3a136712, 0x8deeef82, 0x3a0dcd99, 0x8dec15d8, 0x3a0833fc, 0x8de93c74,
-    0x3a029a3b, 0x8de66357,
-  0x39fd0056, 0x8de38a80, 0x39f7664e, 0x8de0b1ef, 0x39f1cc21, 0x8dddd9a5,
-    0x39ec31d1, 0x8ddb01a1,
-  0x39e6975e, 0x8dd829e4, 0x39e0fcc6, 0x8dd5526d, 0x39db620b, 0x8dd27b3c,
-    0x39d5c72c, 0x8dcfa452,
-  0x39d02c2a, 0x8dcccdaf, 0x39ca9104, 0x8dc9f751, 0x39c4f5ba, 0x8dc7213b,
-    0x39bf5a4d, 0x8dc44b6a,
-  0x39b9bebc, 0x8dc175e0, 0x39b42307, 0x8dbea09d, 0x39ae872f, 0x8dbbcba0,
-    0x39a8eb33, 0x8db8f6ea,
-  0x39a34f13, 0x8db6227a, 0x399db2d0, 0x8db34e50, 0x3998166a, 0x8db07a6d,
-    0x399279e0, 0x8dada6d1,
-  0x398cdd32, 0x8daad37b, 0x39874061, 0x8da8006c, 0x3981a36d, 0x8da52da3,
-    0x397c0655, 0x8da25b21,
-  0x39766919, 0x8d9f88e5, 0x3970cbba, 0x8d9cb6f0, 0x396b2e38, 0x8d99e541,
-    0x39659092, 0x8d9713d9,
-  0x395ff2c9, 0x8d9442b8, 0x395a54dd, 0x8d9171dd, 0x3954b6cd, 0x8d8ea148,
-    0x394f1899, 0x8d8bd0fb,
-  0x39497a43, 0x8d8900f3, 0x3943dbc9, 0x8d863133, 0x393e3d2c, 0x8d8361b9,
-    0x39389e6b, 0x8d809286,
-  0x3932ff87, 0x8d7dc399, 0x392d6080, 0x8d7af4f3, 0x3927c155, 0x8d782694,
-    0x39222208, 0x8d75587b,
-  0x391c8297, 0x8d728aa9, 0x3916e303, 0x8d6fbd1d, 0x3911434b, 0x8d6cefd9,
-    0x390ba371, 0x8d6a22db,
-  0x39060373, 0x8d675623, 0x39006352, 0x8d6489b3, 0x38fac30e, 0x8d61bd89,
-    0x38f522a6, 0x8d5ef1a5,
-  0x38ef821c, 0x8d5c2609, 0x38e9e16e, 0x8d595ab3, 0x38e4409e, 0x8d568fa4,
-    0x38de9faa, 0x8d53c4db,
-  0x38d8fe93, 0x8d50fa59, 0x38d35d59, 0x8d4e301f, 0x38cdbbfc, 0x8d4b662a,
-    0x38c81a7c, 0x8d489c7d,
-  0x38c278d9, 0x8d45d316, 0x38bcd713, 0x8d4309f6, 0x38b7352a, 0x8d40411d,
-    0x38b1931e, 0x8d3d788b,
-  0x38abf0ef, 0x8d3ab03f, 0x38a64e9d, 0x8d37e83a, 0x38a0ac29, 0x8d35207d,
-    0x389b0991, 0x8d325905,
-  0x389566d6, 0x8d2f91d5, 0x388fc3f8, 0x8d2ccaec, 0x388a20f8, 0x8d2a0449,
-    0x38847dd5, 0x8d273ded,
-  0x387eda8e, 0x8d2477d8, 0x38793725, 0x8d21b20a, 0x38739399, 0x8d1eec83,
-    0x386defeb, 0x8d1c2742,
-  0x38684c19, 0x8d196249, 0x3862a825, 0x8d169d96, 0x385d040d, 0x8d13d92a,
-    0x38575fd4, 0x8d111505,
-  0x3851bb77, 0x8d0e5127, 0x384c16f7, 0x8d0b8d90, 0x38467255, 0x8d08ca40,
-    0x3840cd90, 0x8d060737,
-  0x383b28a9, 0x8d034474, 0x3835839f, 0x8d0081f9, 0x382fde72, 0x8cfdbfc4,
-    0x382a3922, 0x8cfafdd7,
-  0x382493b0, 0x8cf83c30, 0x381eee1b, 0x8cf57ad0, 0x38194864, 0x8cf2b9b8,
-    0x3813a28a, 0x8ceff8e6,
-  0x380dfc8d, 0x8ced385b, 0x3808566e, 0x8cea7818, 0x3802b02c, 0x8ce7b81b,
-    0x37fd09c8, 0x8ce4f865,
-  0x37f76341, 0x8ce238f6, 0x37f1bc97, 0x8cdf79ce, 0x37ec15cb, 0x8cdcbaee,
-    0x37e66edd, 0x8cd9fc54,
-  0x37e0c7cc, 0x8cd73e01, 0x37db2099, 0x8cd47ff6, 0x37d57943, 0x8cd1c231,
-    0x37cfd1cb, 0x8ccf04b3,
-  0x37ca2a30, 0x8ccc477d, 0x37c48273, 0x8cc98a8e, 0x37beda93, 0x8cc6cde5,
-    0x37b93292, 0x8cc41184,
-  0x37b38a6d, 0x8cc1556a, 0x37ade227, 0x8cbe9996, 0x37a839be, 0x8cbbde0a,
-    0x37a29132, 0x8cb922c6,
-  0x379ce885, 0x8cb667c8, 0x37973fb5, 0x8cb3ad11, 0x379196c3, 0x8cb0f2a1,
-    0x378bedae, 0x8cae3879,
-  0x37864477, 0x8cab7e98, 0x37809b1e, 0x8ca8c4fd, 0x377af1a3, 0x8ca60baa,
-    0x37754806, 0x8ca3529f,
-  0x376f9e46, 0x8ca099da, 0x3769f464, 0x8c9de15c, 0x37644a60, 0x8c9b2926,
-    0x375ea03a, 0x8c987137,
-  0x3758f5f2, 0x8c95b98f, 0x37534b87, 0x8c93022e, 0x374da0fa, 0x8c904b14,
-    0x3747f64c, 0x8c8d9442,
-  0x37424b7b, 0x8c8addb7, 0x373ca088, 0x8c882773, 0x3736f573, 0x8c857176,
-    0x37314a3c, 0x8c82bbc0,
-  0x372b9ee3, 0x8c800652, 0x3725f367, 0x8c7d512b, 0x372047ca, 0x8c7a9c4b,
-    0x371a9c0b, 0x8c77e7b3,
-  0x3714f02a, 0x8c753362, 0x370f4427, 0x8c727f58, 0x37099802, 0x8c6fcb95,
-    0x3703ebbb, 0x8c6d181a,
-  0x36fe3f52, 0x8c6a64e5, 0x36f892c7, 0x8c67b1f9, 0x36f2e61a, 0x8c64ff53,
-    0x36ed394b, 0x8c624cf5,
-  0x36e78c5b, 0x8c5f9ade, 0x36e1df48, 0x8c5ce90e, 0x36dc3214, 0x8c5a3786,
-    0x36d684be, 0x8c578645,
-  0x36d0d746, 0x8c54d54c, 0x36cb29ac, 0x8c522499, 0x36c57bf0, 0x8c4f742f,
-    0x36bfce13, 0x8c4cc40b,
-  0x36ba2014, 0x8c4a142f, 0x36b471f3, 0x8c47649a, 0x36aec3b0, 0x8c44b54d,
-    0x36a9154c, 0x8c420647,
-  0x36a366c6, 0x8c3f5788, 0x369db81e, 0x8c3ca911, 0x36980954, 0x8c39fae1,
-    0x36925a69, 0x8c374cf9,
-  0x368cab5c, 0x8c349f58, 0x3686fc2e, 0x8c31f1ff, 0x36814cde, 0x8c2f44ed,
-    0x367b9d6c, 0x8c2c9822,
-  0x3675edd9, 0x8c29eb9f, 0x36703e24, 0x8c273f63, 0x366a8e4d, 0x8c24936f,
-    0x3664de55, 0x8c21e7c2,
-  0x365f2e3b, 0x8c1f3c5d, 0x36597e00, 0x8c1c913f, 0x3653cda3, 0x8c19e669,
-    0x364e1d25, 0x8c173bda,
-  0x36486c86, 0x8c149192, 0x3642bbc4, 0x8c11e792, 0x363d0ae2, 0x8c0f3dda,
-    0x363759de, 0x8c0c9469,
-  0x3631a8b8, 0x8c09eb40, 0x362bf771, 0x8c07425e, 0x36264609, 0x8c0499c4,
-    0x3620947f, 0x8c01f171,
-  0x361ae2d3, 0x8bff4966, 0x36153107, 0x8bfca1a3, 0x360f7f19, 0x8bf9fa27,
-    0x3609cd0a, 0x8bf752f2,
-  0x36041ad9, 0x8bf4ac05, 0x35fe6887, 0x8bf20560, 0x35f8b614, 0x8bef5f02,
-    0x35f3037f, 0x8becb8ec,
-  0x35ed50c9, 0x8bea131e, 0x35e79df2, 0x8be76d97, 0x35e1eafa, 0x8be4c857,
-    0x35dc37e0, 0x8be22360,
-  0x35d684a6, 0x8bdf7eb0, 0x35d0d14a, 0x8bdcda47, 0x35cb1dcc, 0x8bda3626,
-    0x35c56a2e, 0x8bd7924d,
-  0x35bfb66e, 0x8bd4eebc, 0x35ba028e, 0x8bd24b72, 0x35b44e8c, 0x8bcfa870,
-    0x35ae9a69, 0x8bcd05b5,
-  0x35a8e625, 0x8bca6343, 0x35a331c0, 0x8bc7c117, 0x359d7d39, 0x8bc51f34,
-    0x3597c892, 0x8bc27d98,
-  0x359213c9, 0x8bbfdc44, 0x358c5ee0, 0x8bbd3b38, 0x3586a9d5, 0x8bba9a73,
-    0x3580f4aa, 0x8bb7f9f6,
-  0x357b3f5d, 0x8bb559c1, 0x357589f0, 0x8bb2b9d4, 0x356fd461, 0x8bb01a2e,
-    0x356a1eb2, 0x8bad7ad0,
-  0x356468e2, 0x8baadbba, 0x355eb2f0, 0x8ba83cec, 0x3558fcde, 0x8ba59e65,
-    0x355346ab, 0x8ba30026,
-  0x354d9057, 0x8ba0622f, 0x3547d9e2, 0x8b9dc480, 0x3542234c, 0x8b9b2718,
-    0x353c6c95, 0x8b9889f8,
-  0x3536b5be, 0x8b95ed21, 0x3530fec6, 0x8b935090, 0x352b47ad, 0x8b90b448,
-    0x35259073, 0x8b8e1848,
-  0x351fd918, 0x8b8b7c8f, 0x351a219c, 0x8b88e11e, 0x35146a00, 0x8b8645f5,
-    0x350eb243, 0x8b83ab14,
-  0x3508fa66, 0x8b81107b, 0x35034267, 0x8b7e7629, 0x34fd8a48, 0x8b7bdc20,
-    0x34f7d208, 0x8b79425e,
-  0x34f219a8, 0x8b76a8e4, 0x34ec6127, 0x8b740fb3, 0x34e6a885, 0x8b7176c8,
-    0x34e0efc2, 0x8b6ede26,
-  0x34db36df, 0x8b6c45cc, 0x34d57ddc, 0x8b69adba, 0x34cfc4b7, 0x8b6715ef,
-    0x34ca0b73, 0x8b647e6d,
-  0x34c4520d, 0x8b61e733, 0x34be9887, 0x8b5f5040, 0x34b8dee1, 0x8b5cb995,
-    0x34b3251a, 0x8b5a2333,
-  0x34ad6b32, 0x8b578d18, 0x34a7b12a, 0x8b54f745, 0x34a1f702, 0x8b5261ba,
-    0x349c3cb9, 0x8b4fcc77,
-  0x34968250, 0x8b4d377c, 0x3490c7c6, 0x8b4aa2ca, 0x348b0d1c, 0x8b480e5f,
-    0x34855251, 0x8b457a3c,
-  0x347f9766, 0x8b42e661, 0x3479dc5b, 0x8b4052ce, 0x3474212f, 0x8b3dbf83,
-    0x346e65e3, 0x8b3b2c80,
-  0x3468aa76, 0x8b3899c6, 0x3462eee9, 0x8b360753, 0x345d333c, 0x8b337528,
-    0x3457776f, 0x8b30e345,
-  0x3451bb81, 0x8b2e51ab, 0x344bff73, 0x8b2bc058, 0x34464345, 0x8b292f4e,
-    0x344086f6, 0x8b269e8b,
-  0x343aca87, 0x8b240e11, 0x34350df8, 0x8b217ddf, 0x342f5149, 0x8b1eedf4,
-    0x3429947a, 0x8b1c5e52,
-  0x3423d78a, 0x8b19cef8, 0x341e1a7b, 0x8b173fe6, 0x34185d4b, 0x8b14b11d,
-    0x34129ffb, 0x8b12229b,
-  0x340ce28b, 0x8b0f9462, 0x340724fb, 0x8b0d0670, 0x3401674a, 0x8b0a78c7,
-    0x33fba97a, 0x8b07eb66,
-  0x33f5eb89, 0x8b055e4d, 0x33f02d79, 0x8b02d17c, 0x33ea6f48, 0x8b0044f3,
-    0x33e4b0f8, 0x8afdb8b3,
-  0x33def287, 0x8afb2cbb, 0x33d933f7, 0x8af8a10b, 0x33d37546, 0x8af615a3,
-    0x33cdb676, 0x8af38a83,
-  0x33c7f785, 0x8af0ffac, 0x33c23875, 0x8aee751c, 0x33bc7944, 0x8aebead5,
-    0x33b6b9f4, 0x8ae960d6,
-  0x33b0fa84, 0x8ae6d720, 0x33ab3af4, 0x8ae44db1, 0x33a57b44, 0x8ae1c48b,
-    0x339fbb74, 0x8adf3bad,
-  0x3399fb85, 0x8adcb318, 0x33943b75, 0x8ada2aca, 0x338e7b46, 0x8ad7a2c5,
-    0x3388baf7, 0x8ad51b08,
-  0x3382fa88, 0x8ad29394, 0x337d39f9, 0x8ad00c67, 0x3377794b, 0x8acd8583,
-    0x3371b87d, 0x8acafee8,
-  0x336bf78f, 0x8ac87894, 0x33663682, 0x8ac5f289, 0x33607554, 0x8ac36cc6,
-    0x335ab407, 0x8ac0e74c,
-  0x3354f29b, 0x8abe6219, 0x334f310e, 0x8abbdd30, 0x33496f62, 0x8ab9588e,
-    0x3343ad97, 0x8ab6d435,
-  0x333debab, 0x8ab45024, 0x333829a1, 0x8ab1cc5c, 0x33326776, 0x8aaf48db,
-    0x332ca52c, 0x8aacc5a4,
-  0x3326e2c3, 0x8aaa42b4, 0x33212039, 0x8aa7c00d, 0x331b5d91, 0x8aa53daf,
-    0x33159ac8, 0x8aa2bb99,
-  0x330fd7e1, 0x8aa039cb, 0x330a14da, 0x8a9db845, 0x330451b3, 0x8a9b3708,
-    0x32fe8e6d, 0x8a98b614,
-  0x32f8cb07, 0x8a963567, 0x32f30782, 0x8a93b504, 0x32ed43de, 0x8a9134e8,
-    0x32e7801a, 0x8a8eb516,
-  0x32e1bc36, 0x8a8c358b, 0x32dbf834, 0x8a89b649, 0x32d63412, 0x8a873750,
-    0x32d06fd0, 0x8a84b89e,
-  0x32caab6f, 0x8a823a36, 0x32c4e6ef, 0x8a7fbc16, 0x32bf2250, 0x8a7d3e3e,
-    0x32b95d91, 0x8a7ac0af,
-  0x32b398b3, 0x8a784368, 0x32add3b6, 0x8a75c66a, 0x32a80e99, 0x8a7349b4,
-    0x32a2495d, 0x8a70cd47,
-  0x329c8402, 0x8a6e5123, 0x3296be88, 0x8a6bd547, 0x3290f8ef, 0x8a6959b3,
-    0x328b3336, 0x8a66de68,
-  0x32856d5e, 0x8a646365, 0x327fa767, 0x8a61e8ab, 0x3279e151, 0x8a5f6e3a,
-    0x32741b1c, 0x8a5cf411,
-  0x326e54c7, 0x8a5a7a31, 0x32688e54, 0x8a580099, 0x3262c7c1, 0x8a55874a,
-    0x325d0110, 0x8a530e43,
-  0x32573a3f, 0x8a509585, 0x3251734f, 0x8a4e1d10, 0x324bac40, 0x8a4ba4e3,
-    0x3245e512, 0x8a492cff,
-  0x32401dc6, 0x8a46b564, 0x323a565a, 0x8a443e11, 0x32348ecf, 0x8a41c706,
-    0x322ec725, 0x8a3f5045,
-  0x3228ff5c, 0x8a3cd9cc, 0x32233775, 0x8a3a639b, 0x321d6f6e, 0x8a37edb3,
-    0x3217a748, 0x8a357814,
-  0x3211df04, 0x8a3302be, 0x320c16a1, 0x8a308db0, 0x32064e1e, 0x8a2e18eb,
-    0x3200857d, 0x8a2ba46e,
-  0x31fabcbd, 0x8a29303b, 0x31f4f3df, 0x8a26bc50, 0x31ef2ae1, 0x8a2448ad,
-    0x31e961c5, 0x8a21d554,
-  0x31e39889, 0x8a1f6243, 0x31ddcf30, 0x8a1cef7a, 0x31d805b7, 0x8a1a7cfb,
-    0x31d23c1f, 0x8a180ac4,
-  0x31cc7269, 0x8a1598d6, 0x31c6a894, 0x8a132731, 0x31c0dea1, 0x8a10b5d4,
-    0x31bb148f, 0x8a0e44c0,
-  0x31b54a5e, 0x8a0bd3f5, 0x31af800e, 0x8a096373, 0x31a9b5a0, 0x8a06f339,
-    0x31a3eb13, 0x8a048348,
-  0x319e2067, 0x8a0213a0, 0x3198559d, 0x89ffa441, 0x31928ab4, 0x89fd352b,
-    0x318cbfad, 0x89fac65d,
-  0x3186f487, 0x89f857d8, 0x31812943, 0x89f5e99c, 0x317b5de0, 0x89f37ba9,
-    0x3175925e, 0x89f10dff,
-  0x316fc6be, 0x89eea09d, 0x3169fb00, 0x89ec3384, 0x31642f23, 0x89e9c6b4,
-    0x315e6328, 0x89e75a2d,
-  0x3158970e, 0x89e4edef, 0x3152cad5, 0x89e281fa, 0x314cfe7f, 0x89e0164d,
-    0x31473209, 0x89ddaae9,
-  0x31416576, 0x89db3fcf, 0x313b98c4, 0x89d8d4fd, 0x3135cbf4, 0x89d66a74,
-    0x312fff05, 0x89d40033,
-  0x312a31f8, 0x89d1963c, 0x312464cd, 0x89cf2c8e, 0x311e9783, 0x89ccc328,
-    0x3118ca1b, 0x89ca5a0c,
-  0x3112fc95, 0x89c7f138, 0x310d2ef0, 0x89c588ae, 0x3107612e, 0x89c3206c,
-    0x3101934d, 0x89c0b873,
-  0x30fbc54d, 0x89be50c3, 0x30f5f730, 0x89bbe95c, 0x30f028f4, 0x89b9823e,
-    0x30ea5a9a, 0x89b71b69,
-  0x30e48c22, 0x89b4b4dd, 0x30debd8c, 0x89b24e9a, 0x30d8eed8, 0x89afe8a0,
-    0x30d32006, 0x89ad82ef,
-  0x30cd5115, 0x89ab1d87, 0x30c78206, 0x89a8b868, 0x30c1b2da, 0x89a65391,
-    0x30bbe38f, 0x89a3ef04,
-  0x30b61426, 0x89a18ac0, 0x30b0449f, 0x899f26c5, 0x30aa74fa, 0x899cc313,
-    0x30a4a537, 0x899a5faa,
-  0x309ed556, 0x8997fc8a, 0x30990557, 0x899599b3, 0x3093353a, 0x89933725,
-    0x308d64ff, 0x8990d4e0,
-  0x308794a6, 0x898e72e4, 0x3081c42f, 0x898c1131, 0x307bf39b, 0x8989afc8,
-    0x307622e8, 0x89874ea7,
-  0x30705217, 0x8984edcf, 0x306a8129, 0x89828d41, 0x3064b01d, 0x89802cfc,
-    0x305edef3, 0x897dccff,
-  0x30590dab, 0x897b6d4c, 0x30533c45, 0x89790de2, 0x304d6ac1, 0x8976aec1,
-    0x30479920, 0x89744fe9,
-  0x3041c761, 0x8971f15a, 0x303bf584, 0x896f9315, 0x30362389, 0x896d3518,
-    0x30305171, 0x896ad765,
-  0x302a7f3a, 0x896879fb, 0x3024ace6, 0x89661cda, 0x301eda75, 0x8963c002,
-    0x301907e6, 0x89616373,
-  0x30133539, 0x895f072e, 0x300d626e, 0x895cab31, 0x30078f86, 0x895a4f7e,
-    0x3001bc80, 0x8957f414,
-  0x2ffbe95d, 0x895598f3, 0x2ff6161c, 0x89533e1c, 0x2ff042bd, 0x8950e38e,
-    0x2fea6f41, 0x894e8948,
-  0x2fe49ba7, 0x894c2f4c, 0x2fdec7f0, 0x8949d59a, 0x2fd8f41b, 0x89477c30,
-    0x2fd32028, 0x89452310,
-  0x2fcd4c19, 0x8942ca39, 0x2fc777eb, 0x894071ab, 0x2fc1a3a0, 0x893e1967,
-    0x2fbbcf38, 0x893bc16b,
-  0x2fb5fab2, 0x893969b9, 0x2fb0260f, 0x89371250, 0x2faa514f, 0x8934bb31,
-    0x2fa47c71, 0x8932645b,
-  0x2f9ea775, 0x89300dce, 0x2f98d25d, 0x892db78a, 0x2f92fd26, 0x892b6190,
-    0x2f8d27d3, 0x89290bdf,
-  0x2f875262, 0x8926b677, 0x2f817cd4, 0x89246159, 0x2f7ba729, 0x89220c84,
-    0x2f75d160, 0x891fb7f8,
-  0x2f6ffb7a, 0x891d63b5, 0x2f6a2577, 0x891b0fbc, 0x2f644f56, 0x8918bc0c,
-    0x2f5e7919, 0x891668a6,
-  0x2f58a2be, 0x89141589, 0x2f52cc46, 0x8911c2b5, 0x2f4cf5b0, 0x890f702b,
-    0x2f471efe, 0x890d1dea,
-  0x2f41482e, 0x890acbf2, 0x2f3b7141, 0x89087a44, 0x2f359a37, 0x890628df,
-    0x2f2fc310, 0x8903d7c4,
-  0x2f29ebcc, 0x890186f2, 0x2f24146b, 0x88ff3669, 0x2f1e3ced, 0x88fce62a,
-    0x2f186551, 0x88fa9634,
-  0x2f128d99, 0x88f84687, 0x2f0cb5c3, 0x88f5f724, 0x2f06ddd1, 0x88f3a80b,
-    0x2f0105c1, 0x88f1593b,
-  0x2efb2d95, 0x88ef0ab4, 0x2ef5554b, 0x88ecbc77, 0x2eef7ce5, 0x88ea6e83,
-    0x2ee9a461, 0x88e820d9,
-  0x2ee3cbc1, 0x88e5d378, 0x2eddf304, 0x88e38660, 0x2ed81a29, 0x88e13992,
-    0x2ed24132, 0x88deed0e,
-  0x2ecc681e, 0x88dca0d3, 0x2ec68eed, 0x88da54e1, 0x2ec0b5a0, 0x88d8093a,
-    0x2ebadc35, 0x88d5bddb,
-  0x2eb502ae, 0x88d372c6, 0x2eaf290a, 0x88d127fb, 0x2ea94f49, 0x88cedd79,
-    0x2ea3756b, 0x88cc9340,
-  0x2e9d9b70, 0x88ca4951, 0x2e97c159, 0x88c7ffac, 0x2e91e725, 0x88c5b650,
-    0x2e8c0cd4, 0x88c36d3e,
-  0x2e863267, 0x88c12475, 0x2e8057dd, 0x88bedbf6, 0x2e7a7d36, 0x88bc93c0,
-    0x2e74a272, 0x88ba4bd4,
-  0x2e6ec792, 0x88b80432, 0x2e68ec95, 0x88b5bcd9, 0x2e63117c, 0x88b375ca,
-    0x2e5d3646, 0x88b12f04,
-  0x2e575af3, 0x88aee888, 0x2e517f84, 0x88aca255, 0x2e4ba3f8, 0x88aa5c6c,
-    0x2e45c850, 0x88a816cd,
-  0x2e3fec8b, 0x88a5d177, 0x2e3a10aa, 0x88a38c6b, 0x2e3434ac, 0x88a147a9,
-    0x2e2e5891, 0x889f0330,
-  0x2e287c5a, 0x889cbf01, 0x2e22a007, 0x889a7b1b, 0x2e1cc397, 0x88983780,
-    0x2e16e70b, 0x8895f42d,
-  0x2e110a62, 0x8893b125, 0x2e0b2d9d, 0x88916e66, 0x2e0550bb, 0x888f2bf1,
-    0x2dff73bd, 0x888ce9c5,
-  0x2df996a3, 0x888aa7e3, 0x2df3b96c, 0x8888664b, 0x2deddc19, 0x888624fd,
-    0x2de7feaa, 0x8883e3f8,
-  0x2de2211e, 0x8881a33d, 0x2ddc4376, 0x887f62cb, 0x2dd665b2, 0x887d22a4,
-    0x2dd087d1, 0x887ae2c6,
-  0x2dcaa9d5, 0x8878a332, 0x2dc4cbbc, 0x887663e7, 0x2dbeed86, 0x887424e7,
-    0x2db90f35, 0x8871e630,
-  0x2db330c7, 0x886fa7c2, 0x2dad523d, 0x886d699f, 0x2da77397, 0x886b2bc5,
-    0x2da194d5, 0x8868ee35,
-  0x2d9bb5f6, 0x8866b0ef, 0x2d95d6fc, 0x886473f2, 0x2d8ff7e5, 0x88623740,
-    0x2d8a18b3, 0x885ffad7,
-  0x2d843964, 0x885dbeb8, 0x2d7e59f9, 0x885b82e3, 0x2d787a72, 0x88594757,
-    0x2d729acf, 0x88570c16,
-  0x2d6cbb10, 0x8854d11e, 0x2d66db35, 0x88529670, 0x2d60fb3e, 0x88505c0b,
-    0x2d5b1b2b, 0x884e21f1,
-  0x2d553afc, 0x884be821, 0x2d4f5ab1, 0x8849ae9a, 0x2d497a4a, 0x8847755d,
-    0x2d4399c7, 0x88453c6a,
-  0x2d3db928, 0x884303c1, 0x2d37d86d, 0x8840cb61, 0x2d31f797, 0x883e934c,
-    0x2d2c16a4, 0x883c5b81,
-  0x2d263596, 0x883a23ff, 0x2d20546b, 0x8837ecc7, 0x2d1a7325, 0x8835b5d9,
-    0x2d1491c4, 0x88337f35,
-  0x2d0eb046, 0x883148db, 0x2d08ceac, 0x882f12cb, 0x2d02ecf7, 0x882cdd04,
-    0x2cfd0b26, 0x882aa788,
-  0x2cf72939, 0x88287256, 0x2cf14731, 0x88263d6d, 0x2ceb650d, 0x882408ce,
-    0x2ce582cd, 0x8821d47a,
-  0x2cdfa071, 0x881fa06f, 0x2cd9bdfa, 0x881d6cae, 0x2cd3db67, 0x881b3937,
-    0x2ccdf8b8, 0x8819060a,
-  0x2cc815ee, 0x8816d327, 0x2cc23308, 0x8814a08f, 0x2cbc5006, 0x88126e40,
-    0x2cb66ce9, 0x88103c3b,
-  0x2cb089b1, 0x880e0a7f, 0x2caaa65c, 0x880bd90e, 0x2ca4c2ed, 0x8809a7e7,
-    0x2c9edf61, 0x8807770a,
-  0x2c98fbba, 0x88054677, 0x2c9317f8, 0x8803162e, 0x2c8d341a, 0x8800e62f,
-    0x2c875021, 0x87feb67a,
-  0x2c816c0c, 0x87fc870f, 0x2c7b87dc, 0x87fa57ee, 0x2c75a390, 0x87f82917,
-    0x2c6fbf29, 0x87f5fa8b,
-  0x2c69daa6, 0x87f3cc48, 0x2c63f609, 0x87f19e4f, 0x2c5e114f, 0x87ef70a0,
-    0x2c582c7b, 0x87ed433c,
-  0x2c52478a, 0x87eb1621, 0x2c4c627f, 0x87e8e950, 0x2c467d58, 0x87e6bcca,
-    0x2c409816, 0x87e4908e,
-  0x2c3ab2b9, 0x87e2649b, 0x2c34cd40, 0x87e038f3, 0x2c2ee7ad, 0x87de0d95,
-    0x2c2901fd, 0x87dbe281,
-  0x2c231c33, 0x87d9b7b7, 0x2c1d364e, 0x87d78d38, 0x2c17504d, 0x87d56302,
-    0x2c116a31, 0x87d33916,
-  0x2c0b83fa, 0x87d10f75, 0x2c059da7, 0x87cee61e, 0x2bffb73a, 0x87ccbd11,
-    0x2bf9d0b1, 0x87ca944e,
-  0x2bf3ea0d, 0x87c86bd5, 0x2bee034e, 0x87c643a6, 0x2be81c74, 0x87c41bc2,
-    0x2be2357f, 0x87c1f427,
-  0x2bdc4e6f, 0x87bfccd7, 0x2bd66744, 0x87bda5d1, 0x2bd07ffe, 0x87bb7f16,
-    0x2bca989d, 0x87b958a4,
-  0x2bc4b120, 0x87b7327d, 0x2bbec989, 0x87b50c9f, 0x2bb8e1d7, 0x87b2e70c,
-    0x2bb2fa0a, 0x87b0c1c4,
-  0x2bad1221, 0x87ae9cc5, 0x2ba72a1e, 0x87ac7811, 0x2ba14200, 0x87aa53a6,
-    0x2b9b59c7, 0x87a82f87,
-  0x2b957173, 0x87a60bb1, 0x2b8f8905, 0x87a3e825, 0x2b89a07b, 0x87a1c4e4,
-    0x2b83b7d7, 0x879fa1ed,
-  0x2b7dcf17, 0x879d7f41, 0x2b77e63d, 0x879b5cde, 0x2b71fd48, 0x87993ac6,
-    0x2b6c1438, 0x879718f8,
-  0x2b662b0e, 0x8794f774, 0x2b6041c9, 0x8792d63b, 0x2b5a5868, 0x8790b54c,
-    0x2b546eee, 0x878e94a7,
-  0x2b4e8558, 0x878c744d, 0x2b489ba8, 0x878a543d, 0x2b42b1dd, 0x87883477,
-    0x2b3cc7f7, 0x878614fb,
-  0x2b36ddf7, 0x8783f5ca, 0x2b30f3dc, 0x8781d6e3, 0x2b2b09a6, 0x877fb846,
-    0x2b251f56, 0x877d99f4,
-  0x2b1f34eb, 0x877b7bec, 0x2b194a66, 0x87795e2f, 0x2b135fc6, 0x877740bb,
-    0x2b0d750b, 0x87752392,
-  0x2b078a36, 0x877306b4, 0x2b019f46, 0x8770ea20, 0x2afbb43c, 0x876ecdd6,
-    0x2af5c917, 0x876cb1d6,
-  0x2aefddd8, 0x876a9621, 0x2ae9f27e, 0x87687ab7, 0x2ae4070a, 0x87665f96,
-    0x2ade1b7c, 0x876444c1,
-  0x2ad82fd2, 0x87622a35, 0x2ad2440f, 0x87600ff4, 0x2acc5831, 0x875df5fd,
-    0x2ac66c39, 0x875bdc51,
-  0x2ac08026, 0x8759c2ef, 0x2aba93f9, 0x8757a9d8, 0x2ab4a7b1, 0x8755910b,
-    0x2aaebb50, 0x87537888,
-  0x2aa8ced3, 0x87516050, 0x2aa2e23d, 0x874f4862, 0x2a9cf58c, 0x874d30bf,
-    0x2a9708c1, 0x874b1966,
-  0x2a911bdc, 0x87490258, 0x2a8b2edc, 0x8746eb94, 0x2a8541c3, 0x8744d51b,
-    0x2a7f548e, 0x8742beec,
-  0x2a796740, 0x8740a907, 0x2a7379d8, 0x873e936d, 0x2a6d8c55, 0x873c7e1e,
-    0x2a679eb8, 0x873a6919,
-  0x2a61b101, 0x8738545e, 0x2a5bc330, 0x87363fee, 0x2a55d545, 0x87342bc9,
-    0x2a4fe740, 0x873217ee,
-  0x2a49f920, 0x8730045d, 0x2a440ae7, 0x872df117, 0x2a3e1c93, 0x872bde1c,
-    0x2a382e25, 0x8729cb6b,
-  0x2a323f9e, 0x8727b905, 0x2a2c50fc, 0x8725a6e9, 0x2a266240, 0x87239518,
-    0x2a20736a, 0x87218391,
-  0x2a1a847b, 0x871f7255, 0x2a149571, 0x871d6163, 0x2a0ea64d, 0x871b50bc,
-    0x2a08b710, 0x87194060,
-  0x2a02c7b8, 0x8717304e, 0x29fcd847, 0x87152087, 0x29f6e8bb, 0x8713110a,
-    0x29f0f916, 0x871101d8,
-  0x29eb0957, 0x870ef2f1, 0x29e5197e, 0x870ce454, 0x29df298b, 0x870ad602,
-    0x29d9397f, 0x8708c7fa,
-  0x29d34958, 0x8706ba3d, 0x29cd5918, 0x8704acca, 0x29c768be, 0x87029fa3,
-    0x29c1784a, 0x870092c5,
-  0x29bb87bc, 0x86fe8633, 0x29b59715, 0x86fc79eb, 0x29afa654, 0x86fa6dee,
-    0x29a9b579, 0x86f8623b,
-  0x29a3c485, 0x86f656d3, 0x299dd377, 0x86f44bb6, 0x2997e24f, 0x86f240e3,
-    0x2991f10e, 0x86f0365c,
-  0x298bffb2, 0x86ee2c1e, 0x29860e3e, 0x86ec222c, 0x29801caf, 0x86ea1884,
-    0x297a2b07, 0x86e80f27,
-  0x29743946, 0x86e60614, 0x296e476b, 0x86e3fd4c, 0x29685576, 0x86e1f4cf,
-    0x29626368, 0x86dfec9d,
-  0x295c7140, 0x86dde4b5, 0x29567eff, 0x86dbdd18, 0x29508ca4, 0x86d9d5c6,
-    0x294a9a30, 0x86d7cebf,
-  0x2944a7a2, 0x86d5c802, 0x293eb4fb, 0x86d3c190, 0x2938c23a, 0x86d1bb69,
-    0x2932cf60, 0x86cfb58c,
-  0x292cdc6d, 0x86cdaffa, 0x2926e960, 0x86cbaab3, 0x2920f63a, 0x86c9a5b7,
-    0x291b02fa, 0x86c7a106,
-  0x29150fa1, 0x86c59c9f, 0x290f1c2f, 0x86c39883, 0x290928a3, 0x86c194b2,
-    0x290334ff, 0x86bf912c,
-  0x28fd4140, 0x86bd8df0, 0x28f74d69, 0x86bb8b00, 0x28f15978, 0x86b9885a,
-    0x28eb656e, 0x86b785ff,
-  0x28e5714b, 0x86b583ee, 0x28df7d0e, 0x86b38229, 0x28d988b8, 0x86b180ae,
-    0x28d3944a, 0x86af7f7e,
-  0x28cd9fc1, 0x86ad7e99, 0x28c7ab20, 0x86ab7dff, 0x28c1b666, 0x86a97db0,
-    0x28bbc192, 0x86a77dab,
-  0x28b5cca5, 0x86a57df2, 0x28afd7a0, 0x86a37e83, 0x28a9e281, 0x86a17f5f,
-    0x28a3ed49, 0x869f8086,
-  0x289df7f8, 0x869d81f8, 0x2898028e, 0x869b83b4, 0x28920d0a, 0x869985bc,
-    0x288c176e, 0x8697880f,
-  0x288621b9, 0x86958aac, 0x28802beb, 0x86938d94, 0x287a3604, 0x869190c7,
-    0x28744004, 0x868f9445,
-  0x286e49ea, 0x868d980e, 0x286853b8, 0x868b9c22, 0x28625d6d, 0x8689a081,
-    0x285c670a, 0x8687a52b,
-  0x2856708d, 0x8685aa20, 0x285079f7, 0x8683af5f, 0x284a8349, 0x8681b4ea,
-    0x28448c81, 0x867fbabf,
-  0x283e95a1, 0x867dc0e0, 0x28389ea8, 0x867bc74b, 0x2832a796, 0x8679ce01,
-    0x282cb06c, 0x8677d503,
-  0x2826b928, 0x8675dc4f, 0x2820c1cc, 0x8673e3e6, 0x281aca57, 0x8671ebc8,
-    0x2814d2c9, 0x866ff3f6,
-  0x280edb23, 0x866dfc6e, 0x2808e364, 0x866c0531, 0x2802eb8c, 0x866a0e3f,
-    0x27fcf39c, 0x86681798,
-  0x27f6fb92, 0x8666213c, 0x27f10371, 0x86642b2c, 0x27eb0b36, 0x86623566,
-    0x27e512e3, 0x86603feb,
-  0x27df1a77, 0x865e4abb, 0x27d921f3, 0x865c55d7, 0x27d32956, 0x865a613d,
-    0x27cd30a1, 0x86586cee,
-  0x27c737d3, 0x865678eb, 0x27c13eec, 0x86548532, 0x27bb45ed, 0x865291c4,
-    0x27b54cd6, 0x86509ea2,
-  0x27af53a6, 0x864eabcb, 0x27a95a5d, 0x864cb93e, 0x27a360fc, 0x864ac6fd,
-    0x279d6783, 0x8648d507,
-  0x27976df1, 0x8646e35c, 0x27917447, 0x8644f1fc, 0x278b7a84, 0x864300e7,
-    0x278580a9, 0x8641101d,
-  0x277f86b5, 0x863f1f9e, 0x27798caa, 0x863d2f6b, 0x27739285, 0x863b3f82,
-    0x276d9849, 0x86394fe5,
-  0x27679df4, 0x86376092, 0x2761a387, 0x8635718b, 0x275ba901, 0x863382cf,
-    0x2755ae64, 0x8631945e,
-  0x274fb3ae, 0x862fa638, 0x2749b8e0, 0x862db85e, 0x2743bdf9, 0x862bcace,
-    0x273dc2fa, 0x8629dd8a,
-  0x2737c7e3, 0x8627f091, 0x2731ccb4, 0x862603e3, 0x272bd16d, 0x86241780,
-    0x2725d60e, 0x86222b68,
-  0x271fda96, 0x86203f9c, 0x2719df06, 0x861e541a, 0x2713e35f, 0x861c68e4,
-    0x270de79f, 0x861a7df9,
-  0x2707ebc7, 0x86189359, 0x2701efd7, 0x8616a905, 0x26fbf3ce, 0x8614befb,
-    0x26f5f7ae, 0x8612d53d,
-  0x26effb76, 0x8610ebca, 0x26e9ff26, 0x860f02a3, 0x26e402bd, 0x860d19c6,
-    0x26de063d, 0x860b3135,
-  0x26d809a5, 0x860948ef, 0x26d20cf5, 0x860760f4, 0x26cc102d, 0x86057944,
-    0x26c6134d, 0x860391e0,
-  0x26c01655, 0x8601aac7, 0x26ba1945, 0x85ffc3f9, 0x26b41c1d, 0x85fddd76,
-    0x26ae1edd, 0x85fbf73f,
-  0x26a82186, 0x85fa1153, 0x26a22416, 0x85f82bb2, 0x269c268f, 0x85f6465c,
-    0x269628f0, 0x85f46152,
-  0x26902b39, 0x85f27c93, 0x268a2d6b, 0x85f09820, 0x26842f84, 0x85eeb3f7,
-    0x267e3186, 0x85ecd01a,
-  0x26783370, 0x85eaec88, 0x26723543, 0x85e90942, 0x266c36fe, 0x85e72647,
-    0x266638a1, 0x85e54397,
-  0x26603a2c, 0x85e36132, 0x265a3b9f, 0x85e17f19, 0x26543cfb, 0x85df9d4b,
-    0x264e3e40, 0x85ddbbc9,
-  0x26483f6c, 0x85dbda91, 0x26424082, 0x85d9f9a5, 0x263c417f, 0x85d81905,
-    0x26364265, 0x85d638b0,
-  0x26304333, 0x85d458a6, 0x262a43ea, 0x85d278e7, 0x26244489, 0x85d09974,
-    0x261e4511, 0x85ceba4d,
-  0x26184581, 0x85ccdb70, 0x261245da, 0x85cafcdf, 0x260c461b, 0x85c91e9a,
-    0x26064645, 0x85c740a0,
-  0x26004657, 0x85c562f1, 0x25fa4652, 0x85c3858d, 0x25f44635, 0x85c1a875,
-    0x25ee4601, 0x85bfcba9,
-  0x25e845b6, 0x85bdef28, 0x25e24553, 0x85bc12f2, 0x25dc44d9, 0x85ba3707,
-    0x25d64447, 0x85b85b68,
-  0x25d0439f, 0x85b68015, 0x25ca42de, 0x85b4a50d, 0x25c44207, 0x85b2ca50,
-    0x25be4118, 0x85b0efdf,
-  0x25b84012, 0x85af15b9, 0x25b23ef5, 0x85ad3bdf, 0x25ac3dc0, 0x85ab6250,
-    0x25a63c74, 0x85a9890d,
-  0x25a03b11, 0x85a7b015, 0x259a3997, 0x85a5d768, 0x25943806, 0x85a3ff07,
-    0x258e365d, 0x85a226f2,
-  0x2588349d, 0x85a04f28, 0x258232c6, 0x859e77a9, 0x257c30d8, 0x859ca076,
-    0x25762ed3, 0x859ac98f,
-  0x25702cb7, 0x8598f2f3, 0x256a2a83, 0x85971ca2, 0x25642839, 0x8595469d,
-    0x255e25d7, 0x859370e4,
-  0x2558235f, 0x85919b76, 0x255220cf, 0x858fc653, 0x254c1e28, 0x858df17c,
-    0x25461b6b, 0x858c1cf1,
-  0x25401896, 0x858a48b1, 0x253a15aa, 0x858874bd, 0x253412a8, 0x8586a114,
-    0x252e0f8e, 0x8584cdb7,
-  0x25280c5e, 0x8582faa5, 0x25220916, 0x858127df, 0x251c05b8, 0x857f5564,
-    0x25160243, 0x857d8335,
-  0x250ffeb7, 0x857bb152, 0x2509fb14, 0x8579dfba, 0x2503f75a, 0x85780e6e,
-    0x24fdf389, 0x85763d6d,
-  0x24f7efa2, 0x85746cb8, 0x24f1eba4, 0x85729c4e, 0x24ebe78f, 0x8570cc30,
-    0x24e5e363, 0x856efc5e,
-  0x24dfdf20, 0x856d2cd7, 0x24d9dac7, 0x856b5d9c, 0x24d3d657, 0x85698ead,
-    0x24cdd1d0, 0x8567c009,
-  0x24c7cd33, 0x8565f1b0, 0x24c1c87f, 0x856423a4, 0x24bbc3b4, 0x856255e3,
-    0x24b5bed2, 0x8560886d,
-  0x24afb9da, 0x855ebb44, 0x24a9b4cb, 0x855cee66, 0x24a3afa6, 0x855b21d3,
-    0x249daa6a, 0x8559558c,
-  0x2497a517, 0x85578991, 0x24919fae, 0x8555bde2, 0x248b9a2f, 0x8553f27e,
-    0x24859498, 0x85522766,
-  0x247f8eec, 0x85505c99, 0x24798928, 0x854e9219, 0x2473834f, 0x854cc7e3,
-    0x246d7d5e, 0x854afdfa,
-  0x24677758, 0x8549345c, 0x2461713a, 0x85476b0a, 0x245b6b07, 0x8545a204,
-    0x245564bd, 0x8543d949,
-  0x244f5e5c, 0x854210db, 0x244957e5, 0x854048b7, 0x24435158, 0x853e80e0,
-    0x243d4ab4, 0x853cb954,
-  0x243743fa, 0x853af214, 0x24313d2a, 0x85392b20, 0x242b3644, 0x85376477,
-    0x24252f47, 0x85359e1a,
-  0x241f2833, 0x8533d809, 0x2419210a, 0x85321244, 0x241319ca, 0x85304cca,
-    0x240d1274, 0x852e879d,
-  0x24070b08, 0x852cc2bb, 0x24010385, 0x852afe24, 0x23fafbec, 0x852939da,
-    0x23f4f43e, 0x852775db,
-  0x23eeec78, 0x8525b228, 0x23e8e49d, 0x8523eec1, 0x23e2dcac, 0x85222ba5,
-    0x23dcd4a4, 0x852068d6,
-  0x23d6cc87, 0x851ea652, 0x23d0c453, 0x851ce41a, 0x23cabc09, 0x851b222e,
-    0x23c4b3a9, 0x8519608d,
-  0x23beab33, 0x85179f39, 0x23b8a2a7, 0x8515de30, 0x23b29a05, 0x85141d73,
-    0x23ac914d, 0x85125d02,
-  0x23a6887f, 0x85109cdd, 0x23a07f9a, 0x850edd03, 0x239a76a0, 0x850d1d75,
-    0x23946d90, 0x850b5e34,
-  0x238e646a, 0x85099f3e, 0x23885b2e, 0x8507e094, 0x238251dd, 0x85062235,
-    0x237c4875, 0x85046423,
-  0x23763ef7, 0x8502a65c, 0x23703564, 0x8500e8e2, 0x236a2bba, 0x84ff2bb3,
-    0x236421fb, 0x84fd6ed0,
-  0x235e1826, 0x84fbb239, 0x23580e3b, 0x84f9f5ee, 0x2352043b, 0x84f839ee,
-    0x234bfa24, 0x84f67e3b,
-  0x2345eff8, 0x84f4c2d4, 0x233fe5b6, 0x84f307b8, 0x2339db5e, 0x84f14ce8,
-    0x2333d0f1, 0x84ef9265,
-  0x232dc66d, 0x84edd82d, 0x2327bbd5, 0x84ec1e41, 0x2321b126, 0x84ea64a1,
-    0x231ba662, 0x84e8ab4d,
-  0x23159b88, 0x84e6f244, 0x230f9098, 0x84e53988, 0x23098593, 0x84e38118,
-    0x23037a78, 0x84e1c8f3,
-  0x22fd6f48, 0x84e0111b, 0x22f76402, 0x84de598f, 0x22f158a7, 0x84dca24e,
-    0x22eb4d36, 0x84daeb5a,
-  0x22e541af, 0x84d934b1, 0x22df3613, 0x84d77e54, 0x22d92a61, 0x84d5c844,
-    0x22d31e9a, 0x84d4127f,
-  0x22cd12bd, 0x84d25d06, 0x22c706cb, 0x84d0a7da, 0x22c0fac4, 0x84cef2f9,
-    0x22baeea7, 0x84cd3e64,
-  0x22b4e274, 0x84cb8a1b, 0x22aed62c, 0x84c9d61f, 0x22a8c9cf, 0x84c8226e,
-    0x22a2bd5d, 0x84c66f09,
-  0x229cb0d5, 0x84c4bbf0, 0x2296a437, 0x84c30924, 0x22909785, 0x84c156a3,
-    0x228a8abd, 0x84bfa46e,
-  0x22847de0, 0x84bdf286, 0x227e70ed, 0x84bc40e9, 0x227863e5, 0x84ba8f98,
-    0x227256c8, 0x84b8de94,
-  0x226c4996, 0x84b72ddb, 0x22663c4e, 0x84b57d6f, 0x22602ef1, 0x84b3cd4f,
-    0x225a217f, 0x84b21d7a,
-  0x225413f8, 0x84b06df2, 0x224e065c, 0x84aebeb6, 0x2247f8aa, 0x84ad0fc6,
-    0x2241eae3, 0x84ab6122,
-  0x223bdd08, 0x84a9b2ca, 0x2235cf17, 0x84a804be, 0x222fc111, 0x84a656fe,
-    0x2229b2f6, 0x84a4a98a,
-  0x2223a4c5, 0x84a2fc62, 0x221d9680, 0x84a14f87, 0x22178826, 0x849fa2f7,
-    0x221179b7, 0x849df6b4,
-  0x220b6b32, 0x849c4abd, 0x22055c99, 0x849a9f12, 0x21ff4dea, 0x8498f3b3,
-    0x21f93f27, 0x849748a0,
-  0x21f3304f, 0x84959dd9, 0x21ed2162, 0x8493f35e, 0x21e71260, 0x84924930,
-    0x21e10349, 0x84909f4e,
-  0x21daf41d, 0x848ef5b7, 0x21d4e4dc, 0x848d4c6d, 0x21ced586, 0x848ba36f,
-    0x21c8c61c, 0x8489fabe,
-  0x21c2b69c, 0x84885258, 0x21bca708, 0x8486aa3e, 0x21b6975f, 0x84850271,
-    0x21b087a1, 0x84835af0,
-  0x21aa77cf, 0x8481b3bb, 0x21a467e7, 0x84800cd2, 0x219e57eb, 0x847e6636,
-    0x219847da, 0x847cbfe5,
-  0x219237b5, 0x847b19e1, 0x218c277a, 0x84797429, 0x2186172b, 0x8477cebd,
-    0x218006c8, 0x8476299e,
-  0x2179f64f, 0x847484ca, 0x2173e5c2, 0x8472e043, 0x216dd521, 0x84713c08,
-    0x2167c46b, 0x846f9819,
-  0x2161b3a0, 0x846df477, 0x215ba2c0, 0x846c5120, 0x215591cc, 0x846aae16,
-    0x214f80c4, 0x84690b58,
-  0x21496fa7, 0x846768e7, 0x21435e75, 0x8465c6c1, 0x213d4d2f, 0x846424e8,
-    0x21373bd4, 0x8462835b,
-  0x21312a65, 0x8460e21a, 0x212b18e1, 0x845f4126, 0x21250749, 0x845da07e,
-    0x211ef59d, 0x845c0022,
-  0x2118e3dc, 0x845a6012, 0x2112d206, 0x8458c04f, 0x210cc01d, 0x845720d8,
-    0x2106ae1e, 0x845581ad,
-  0x21009c0c, 0x8453e2cf, 0x20fa89e5, 0x8452443d, 0x20f477aa, 0x8450a5f7,
-    0x20ee655a, 0x844f07fd,
-  0x20e852f6, 0x844d6a50, 0x20e2407e, 0x844bccef, 0x20dc2df2, 0x844a2fda,
-    0x20d61b51, 0x84489311,
-  0x20d0089c, 0x8446f695, 0x20c9f5d3, 0x84455a66, 0x20c3e2f5, 0x8443be82,
-    0x20bdd003, 0x844222eb,
-  0x20b7bcfe, 0x844087a0, 0x20b1a9e4, 0x843eeca2, 0x20ab96b5, 0x843d51f0,
-    0x20a58373, 0x843bb78a,
-  0x209f701c, 0x843a1d70, 0x20995cb2, 0x843883a3, 0x20934933, 0x8436ea23,
-    0x208d35a0, 0x843550ee,
-  0x208721f9, 0x8433b806, 0x20810e3e, 0x84321f6b, 0x207afa6f, 0x8430871b,
-    0x2074e68c, 0x842eef18,
-  0x206ed295, 0x842d5762, 0x2068be8a, 0x842bbff8, 0x2062aa6b, 0x842a28da,
-    0x205c9638, 0x84289209,
-  0x205681f1, 0x8426fb84, 0x20506d96, 0x8425654b, 0x204a5927, 0x8423cf5f,
-    0x204444a4, 0x842239bf,
-  0x203e300d, 0x8420a46c, 0x20381b63, 0x841f0f65, 0x203206a4, 0x841d7aaa,
-    0x202bf1d2, 0x841be63c,
-  0x2025dcec, 0x841a521a, 0x201fc7f2, 0x8418be45, 0x2019b2e4, 0x84172abc,
-    0x20139dc2, 0x84159780,
-  0x200d888d, 0x84140490, 0x20077344, 0x841271ec, 0x20015de7, 0x8410df95,
-    0x1ffb4876, 0x840f4d8a,
-  0x1ff532f2, 0x840dbbcc, 0x1fef1d59, 0x840c2a5a, 0x1fe907ae, 0x840a9935,
-    0x1fe2f1ee, 0x8409085c,
-  0x1fdcdc1b, 0x840777d0, 0x1fd6c634, 0x8405e790, 0x1fd0b03a, 0x8404579d,
-    0x1fca9a2b, 0x8402c7f6,
-  0x1fc4840a, 0x8401389b, 0x1fbe6dd4, 0x83ffa98d, 0x1fb8578b, 0x83fe1acc,
-    0x1fb2412f, 0x83fc8c57,
-  0x1fac2abf, 0x83fafe2e, 0x1fa6143b, 0x83f97052, 0x1f9ffda4, 0x83f7e2c3,
-    0x1f99e6fa, 0x83f65580,
-  0x1f93d03c, 0x83f4c889, 0x1f8db96a, 0x83f33bdf, 0x1f87a285, 0x83f1af82,
-    0x1f818b8d, 0x83f02371,
-  0x1f7b7481, 0x83ee97ad, 0x1f755d61, 0x83ed0c35, 0x1f6f462f, 0x83eb810a,
-    0x1f692ee9, 0x83e9f62b,
-  0x1f63178f, 0x83e86b99, 0x1f5d0022, 0x83e6e153, 0x1f56e8a2, 0x83e5575a,
-    0x1f50d10e, 0x83e3cdad,
-  0x1f4ab968, 0x83e2444d, 0x1f44a1ad, 0x83e0bb3a, 0x1f3e89e0, 0x83df3273,
-    0x1f3871ff, 0x83dda9f9,
-  0x1f325a0b, 0x83dc21cb, 0x1f2c4204, 0x83da99ea, 0x1f2629ea, 0x83d91255,
-    0x1f2011bc, 0x83d78b0d,
-  0x1f19f97b, 0x83d60412, 0x1f13e127, 0x83d47d63, 0x1f0dc8c0, 0x83d2f701,
-    0x1f07b045, 0x83d170eb,
-  0x1f0197b8, 0x83cfeb22, 0x1efb7f17, 0x83ce65a6, 0x1ef56664, 0x83cce076,
-    0x1eef4d9d, 0x83cb5b93,
-  0x1ee934c3, 0x83c9d6fc, 0x1ee31bd6, 0x83c852b2, 0x1edd02d6, 0x83c6ceb5,
-    0x1ed6e9c3, 0x83c54b04,
-  0x1ed0d09d, 0x83c3c7a0, 0x1ecab763, 0x83c24488, 0x1ec49e17, 0x83c0c1be,
-    0x1ebe84b8, 0x83bf3f3f,
-  0x1eb86b46, 0x83bdbd0e, 0x1eb251c1, 0x83bc3b29, 0x1eac3829, 0x83bab991,
-    0x1ea61e7e, 0x83b93845,
-  0x1ea004c1, 0x83b7b746, 0x1e99eaf0, 0x83b63694, 0x1e93d10c, 0x83b4b62e,
-    0x1e8db716, 0x83b33616,
-  0x1e879d0d, 0x83b1b649, 0x1e8182f1, 0x83b036ca, 0x1e7b68c2, 0x83aeb797,
-    0x1e754e80, 0x83ad38b1,
-  0x1e6f342c, 0x83abba17, 0x1e6919c4, 0x83aa3bca, 0x1e62ff4a, 0x83a8bdca,
-    0x1e5ce4be, 0x83a74017,
-  0x1e56ca1e, 0x83a5c2b0, 0x1e50af6c, 0x83a44596, 0x1e4a94a7, 0x83a2c8c9,
-    0x1e4479cf, 0x83a14c48,
-  0x1e3e5ee5, 0x839fd014, 0x1e3843e8, 0x839e542d, 0x1e3228d9, 0x839cd893,
-    0x1e2c0db6, 0x839b5d45,
-  0x1e25f282, 0x8399e244, 0x1e1fd73a, 0x83986790, 0x1e19bbe0, 0x8396ed29,
-    0x1e13a074, 0x8395730e,
-  0x1e0d84f5, 0x8393f940, 0x1e076963, 0x83927fbf, 0x1e014dbf, 0x8391068a,
-    0x1dfb3208, 0x838f8da2,
-  0x1df5163f, 0x838e1507, 0x1deefa63, 0x838c9cb9, 0x1de8de75, 0x838b24b8,
-    0x1de2c275, 0x8389ad03,
-  0x1ddca662, 0x8388359b, 0x1dd68a3c, 0x8386be80, 0x1dd06e04, 0x838547b2,
-    0x1dca51ba, 0x8383d130,
-  0x1dc4355e, 0x83825afb, 0x1dbe18ef, 0x8380e513, 0x1db7fc6d, 0x837f6f78,
-    0x1db1dfda, 0x837dfa2a,
-  0x1dabc334, 0x837c8528, 0x1da5a67c, 0x837b1074, 0x1d9f89b1, 0x83799c0c,
-    0x1d996cd4, 0x837827f0,
-  0x1d934fe5, 0x8376b422, 0x1d8d32e4, 0x837540a1, 0x1d8715d0, 0x8373cd6c,
-    0x1d80f8ab, 0x83725a84,
-  0x1d7adb73, 0x8370e7e9, 0x1d74be29, 0x836f759b, 0x1d6ea0cc, 0x836e039a,
-    0x1d68835e, 0x836c91e5,
-  0x1d6265dd, 0x836b207d, 0x1d5c484b, 0x8369af63, 0x1d562aa6, 0x83683e95,
-    0x1d500cef, 0x8366ce14,
-  0x1d49ef26, 0x83655ddf, 0x1d43d14b, 0x8363edf8, 0x1d3db35e, 0x83627e5d,
-    0x1d37955e, 0x83610f10,
-  0x1d31774d, 0x835fa00f, 0x1d2b592a, 0x835e315b, 0x1d253af5, 0x835cc2f4,
-    0x1d1f1cae, 0x835b54da,
-  0x1d18fe54, 0x8359e70d, 0x1d12dfe9, 0x8358798c, 0x1d0cc16c, 0x83570c59,
-    0x1d06a2dd, 0x83559f72,
-  0x1d00843d, 0x835432d8, 0x1cfa658a, 0x8352c68c, 0x1cf446c5, 0x83515a8c,
-    0x1cee27ef, 0x834feed9,
-  0x1ce80906, 0x834e8373, 0x1ce1ea0c, 0x834d185a, 0x1cdbcb00, 0x834bad8e,
-    0x1cd5abe3, 0x834a430e,
-  0x1ccf8cb3, 0x8348d8dc, 0x1cc96d72, 0x83476ef6, 0x1cc34e1f, 0x8346055e,
-    0x1cbd2eba, 0x83449c12,
-  0x1cb70f43, 0x83433314, 0x1cb0efbb, 0x8341ca62, 0x1caad021, 0x834061fd,
-    0x1ca4b075, 0x833ef9e6,
-  0x1c9e90b8, 0x833d921b, 0x1c9870e9, 0x833c2a9d, 0x1c925109, 0x833ac36c,
-    0x1c8c3116, 0x83395c88,
-  0x1c861113, 0x8337f5f1, 0x1c7ff0fd, 0x83368fa7, 0x1c79d0d6, 0x833529aa,
-    0x1c73b09d, 0x8333c3fa,
-  0x1c6d9053, 0x83325e97, 0x1c676ff8, 0x8330f981, 0x1c614f8b, 0x832f94b8,
-    0x1c5b2f0c, 0x832e303c,
-  0x1c550e7c, 0x832ccc0d, 0x1c4eedda, 0x832b682b, 0x1c48cd27, 0x832a0496,
-    0x1c42ac62, 0x8328a14d,
-  0x1c3c8b8c, 0x83273e52, 0x1c366aa5, 0x8325dba4, 0x1c3049ac, 0x83247943,
-    0x1c2a28a2, 0x8323172f,
-  0x1c240786, 0x8321b568, 0x1c1de659, 0x832053ee, 0x1c17c51b, 0x831ef2c1,
-    0x1c11a3cb, 0x831d91e1,
-  0x1c0b826a, 0x831c314e, 0x1c0560f8, 0x831ad109, 0x1bff3f75, 0x83197110,
-    0x1bf91de0, 0x83181164,
-  0x1bf2fc3a, 0x8316b205, 0x1becda83, 0x831552f4, 0x1be6b8ba, 0x8313f42f,
-    0x1be096e0, 0x831295b7,
-  0x1bda74f6, 0x8311378d, 0x1bd452f9, 0x830fd9af, 0x1bce30ec, 0x830e7c1f,
-    0x1bc80ece, 0x830d1edc,
-  0x1bc1ec9e, 0x830bc1e6, 0x1bbbca5e, 0x830a653c, 0x1bb5a80c, 0x830908e0,
-    0x1baf85a9, 0x8307acd1,
-  0x1ba96335, 0x83065110, 0x1ba340b0, 0x8304f59b, 0x1b9d1e1a, 0x83039a73,
-    0x1b96fb73, 0x83023f98,
-  0x1b90d8bb, 0x8300e50b, 0x1b8ab5f2, 0x82ff8acb, 0x1b849317, 0x82fe30d7,
-    0x1b7e702c, 0x82fcd731,
-  0x1b784d30, 0x82fb7dd8, 0x1b722a23, 0x82fa24cc, 0x1b6c0705, 0x82f8cc0d,
-    0x1b65e3d7, 0x82f7739c,
-  0x1b5fc097, 0x82f61b77, 0x1b599d46, 0x82f4c3a0, 0x1b5379e5, 0x82f36c15,
-    0x1b4d5672, 0x82f214d8,
-  0x1b4732ef, 0x82f0bde8, 0x1b410f5b, 0x82ef6745, 0x1b3aebb6, 0x82ee10ef,
-    0x1b34c801, 0x82ecbae7,
-  0x1b2ea43a, 0x82eb652b, 0x1b288063, 0x82ea0fbd, 0x1b225c7b, 0x82e8ba9c,
-    0x1b1c3883, 0x82e765c8,
-  0x1b161479, 0x82e61141, 0x1b0ff05f, 0x82e4bd07, 0x1b09cc34, 0x82e3691b,
-    0x1b03a7f9, 0x82e2157c,
-  0x1afd83ad, 0x82e0c22a, 0x1af75f50, 0x82df6f25, 0x1af13ae3, 0x82de1c6d,
-    0x1aeb1665, 0x82dcca02,
-  0x1ae4f1d6, 0x82db77e5, 0x1adecd37, 0x82da2615, 0x1ad8a887, 0x82d8d492,
-    0x1ad283c7, 0x82d7835c,
-  0x1acc5ef6, 0x82d63274, 0x1ac63a14, 0x82d4e1d8, 0x1ac01522, 0x82d3918a,
-    0x1ab9f020, 0x82d24189,
-  0x1ab3cb0d, 0x82d0f1d5, 0x1aada5e9, 0x82cfa26f, 0x1aa780b6, 0x82ce5356,
-    0x1aa15b71, 0x82cd048a,
-  0x1a9b361d, 0x82cbb60b, 0x1a9510b7, 0x82ca67d9, 0x1a8eeb42, 0x82c919f5,
-    0x1a88c5bc, 0x82c7cc5e,
-  0x1a82a026, 0x82c67f14, 0x1a7c7a7f, 0x82c53217, 0x1a7654c8, 0x82c3e568,
-    0x1a702f01, 0x82c29906,
-  0x1a6a0929, 0x82c14cf1, 0x1a63e341, 0x82c00129, 0x1a5dbd49, 0x82beb5af,
-    0x1a579741, 0x82bd6a82,
-  0x1a517128, 0x82bc1fa2, 0x1a4b4aff, 0x82bad50f, 0x1a4524c6, 0x82b98aca,
-    0x1a3efe7c, 0x82b840d2,
-  0x1a38d823, 0x82b6f727, 0x1a32b1b9, 0x82b5adca, 0x1a2c8b3f, 0x82b464ba,
-    0x1a2664b5, 0x82b31bf7,
-  0x1a203e1b, 0x82b1d381, 0x1a1a1771, 0x82b08b59, 0x1a13f0b6, 0x82af437e,
-    0x1a0dc9ec, 0x82adfbf0,
-  0x1a07a311, 0x82acb4b0, 0x1a017c27, 0x82ab6dbd, 0x19fb552c, 0x82aa2717,
-    0x19f52e22, 0x82a8e0bf,
-  0x19ef0707, 0x82a79ab3, 0x19e8dfdc, 0x82a654f6, 0x19e2b8a2, 0x82a50f85,
-    0x19dc9157, 0x82a3ca62,
-  0x19d669fc, 0x82a2858c, 0x19d04292, 0x82a14104, 0x19ca1b17, 0x829ffcc8,
-    0x19c3f38d, 0x829eb8db,
-  0x19bdcbf3, 0x829d753a, 0x19b7a449, 0x829c31e7, 0x19b17c8f, 0x829aeee1,
-    0x19ab54c5, 0x8299ac29,
-  0x19a52ceb, 0x829869be, 0x199f0502, 0x829727a0, 0x1998dd09, 0x8295e5cf,
-    0x1992b4ff, 0x8294a44c,
-  0x198c8ce7, 0x82936317, 0x198664be, 0x8292222e, 0x19803c86, 0x8290e194,
-    0x197a143e, 0x828fa146,
-  0x1973ebe6, 0x828e6146, 0x196dc37e, 0x828d2193, 0x19679b07, 0x828be22e,
-    0x19617280, 0x828aa316,
-  0x195b49ea, 0x8289644b, 0x19552144, 0x828825ce, 0x194ef88e, 0x8286e79e,
-    0x1948cfc8, 0x8285a9bb,
-  0x1942a6f3, 0x82846c26, 0x193c7e0f, 0x82832edf, 0x1936551b, 0x8281f1e4,
-    0x19302c17, 0x8280b538,
-  0x192a0304, 0x827f78d8, 0x1923d9e1, 0x827e3cc6, 0x191db0af, 0x827d0102,
-    0x1917876d, 0x827bc58a,
-  0x19115e1c, 0x827a8a61, 0x190b34bb, 0x82794f84, 0x19050b4b, 0x827814f6,
-    0x18fee1cb, 0x8276dab4,
-  0x18f8b83c, 0x8275a0c0, 0x18f28e9e, 0x8274671a, 0x18ec64f0, 0x82732dc0,
-    0x18e63b33, 0x8271f4b5,
-  0x18e01167, 0x8270bbf7, 0x18d9e78b, 0x826f8386, 0x18d3bda0, 0x826e4b62,
-    0x18cd93a5, 0x826d138d,
-  0x18c7699b, 0x826bdc04, 0x18c13f82, 0x826aa4c9, 0x18bb155a, 0x82696ddc,
-    0x18b4eb22, 0x8268373c,
-  0x18aec0db, 0x826700e9, 0x18a89685, 0x8265cae4, 0x18a26c20, 0x8264952d,
-    0x189c41ab, 0x82635fc2,
-  0x18961728, 0x82622aa6, 0x188fec95, 0x8260f5d7, 0x1889c1f3, 0x825fc155,
-    0x18839742, 0x825e8d21,
-  0x187d6c82, 0x825d593a, 0x187741b2, 0x825c25a1, 0x187116d4, 0x825af255,
-    0x186aebe6, 0x8259bf57,
-  0x1864c0ea, 0x82588ca7, 0x185e95de, 0x82575a44, 0x18586ac3, 0x8256282e,
-    0x18523f9a, 0x8254f666,
-  0x184c1461, 0x8253c4eb, 0x1845e919, 0x825293be, 0x183fbdc3, 0x825162df,
-    0x1839925d, 0x8250324d,
-  0x183366e9, 0x824f0208, 0x182d3b65, 0x824dd211, 0x18270fd3, 0x824ca268,
-    0x1820e431, 0x824b730c,
-  0x181ab881, 0x824a43fe, 0x18148cc2, 0x8249153d, 0x180e60f4, 0x8247e6ca,
-    0x18083518, 0x8246b8a4,
-  0x1802092c, 0x82458acc, 0x17fbdd32, 0x82445d41, 0x17f5b129, 0x82433004,
-    0x17ef8511, 0x82420315,
-  0x17e958ea, 0x8240d673, 0x17e32cb5, 0x823faa1e, 0x17dd0070, 0x823e7e18,
-    0x17d6d41d, 0x823d525e,
-  0x17d0a7bc, 0x823c26f3, 0x17ca7b4c, 0x823afbd5, 0x17c44ecd, 0x8239d104,
-    0x17be223f, 0x8238a681,
-  0x17b7f5a3, 0x82377c4c, 0x17b1c8f8, 0x82365264, 0x17ab9c3e, 0x823528ca,
-    0x17a56f76, 0x8233ff7e,
-  0x179f429f, 0x8232d67f, 0x179915ba, 0x8231adce, 0x1792e8c6, 0x8230856a,
-    0x178cbbc4, 0x822f5d54,
-  0x17868eb3, 0x822e358b, 0x17806194, 0x822d0e10, 0x177a3466, 0x822be6e3,
-    0x17740729, 0x822ac004,
-  0x176dd9de, 0x82299971, 0x1767ac85, 0x8228732d, 0x17617f1d, 0x82274d36,
-    0x175b51a7, 0x8226278d,
-  0x17552422, 0x82250232, 0x174ef68f, 0x8223dd24, 0x1748c8ee, 0x8222b863,
-    0x17429b3e, 0x822193f1,
-  0x173c6d80, 0x82206fcc, 0x17363fb4, 0x821f4bf5, 0x173011d9, 0x821e286b,
-    0x1729e3f0, 0x821d052f,
-  0x1723b5f9, 0x821be240, 0x171d87f3, 0x821abfa0, 0x171759df, 0x82199d4d,
-    0x17112bbd, 0x82187b47,
-  0x170afd8d, 0x82175990, 0x1704cf4f, 0x82163826, 0x16fea102, 0x82151709,
-    0x16f872a7, 0x8213f63a,
-  0x16f2443e, 0x8212d5b9, 0x16ec15c7, 0x8211b586, 0x16e5e741, 0x821095a0,
-    0x16dfb8ae, 0x820f7608,
-  0x16d98a0c, 0x820e56be, 0x16d35b5c, 0x820d37c1, 0x16cd2c9f, 0x820c1912,
-    0x16c6fdd3, 0x820afab1,
-  0x16c0cef9, 0x8209dc9e, 0x16baa011, 0x8208bed8, 0x16b4711b, 0x8207a160,
-    0x16ae4217, 0x82068435,
-  0x16a81305, 0x82056758, 0x16a1e3e5, 0x82044ac9, 0x169bb4b7, 0x82032e88,
-    0x1695857b, 0x82021294,
-  0x168f5632, 0x8200f6ef, 0x168926da, 0x81ffdb96, 0x1682f774, 0x81fec08c,
-    0x167cc801, 0x81fda5cf,
-  0x1676987f, 0x81fc8b60, 0x167068f0, 0x81fb713f, 0x166a3953, 0x81fa576c,
-    0x166409a8, 0x81f93de6,
-  0x165dd9f0, 0x81f824ae, 0x1657aa29, 0x81f70bc3, 0x16517a55, 0x81f5f327,
-    0x164b4a73, 0x81f4dad8,
-  0x16451a83, 0x81f3c2d7, 0x163eea86, 0x81f2ab24, 0x1638ba7a, 0x81f193be,
-    0x16328a61, 0x81f07ca6,
-  0x162c5a3b, 0x81ef65dc, 0x16262a06, 0x81ee4f60, 0x161ff9c4, 0x81ed3932,
-    0x1619c975, 0x81ec2351,
-  0x16139918, 0x81eb0dbe, 0x160d68ad, 0x81e9f879, 0x16073834, 0x81e8e381,
-    0x160107ae, 0x81e7ced8,
-  0x15fad71b, 0x81e6ba7c, 0x15f4a679, 0x81e5a66e, 0x15ee75cb, 0x81e492ad,
-    0x15e8450e, 0x81e37f3b,
-  0x15e21445, 0x81e26c16, 0x15dbe36d, 0x81e1593f, 0x15d5b288, 0x81e046b6,
-    0x15cf8196, 0x81df347b,
-  0x15c95097, 0x81de228d, 0x15c31f89, 0x81dd10ee, 0x15bcee6f, 0x81dbff9c,
-    0x15b6bd47, 0x81daee98,
-  0x15b08c12, 0x81d9dde1, 0x15aa5acf, 0x81d8cd79, 0x15a4297f, 0x81d7bd5e,
-    0x159df821, 0x81d6ad92,
-  0x1597c6b7, 0x81d59e13, 0x1591953e, 0x81d48ee1, 0x158b63b9, 0x81d37ffe,
-    0x15853226, 0x81d27169,
-  0x157f0086, 0x81d16321, 0x1578ced9, 0x81d05527, 0x15729d1f, 0x81cf477b,
-    0x156c6b57, 0x81ce3a1d,
-  0x15663982, 0x81cd2d0c, 0x156007a0, 0x81cc204a, 0x1559d5b1, 0x81cb13d5,
-    0x1553a3b4, 0x81ca07af,
-  0x154d71aa, 0x81c8fbd6, 0x15473f94, 0x81c7f04b, 0x15410d70, 0x81c6e50d,
-    0x153adb3f, 0x81c5da1e,
-  0x1534a901, 0x81c4cf7d, 0x152e76b5, 0x81c3c529, 0x1528445d, 0x81c2bb23,
-    0x152211f8, 0x81c1b16b,
-  0x151bdf86, 0x81c0a801, 0x1515ad06, 0x81bf9ee5, 0x150f7a7a, 0x81be9617,
-    0x150947e1, 0x81bd8d97,
-  0x1503153a, 0x81bc8564, 0x14fce287, 0x81bb7d7f, 0x14f6afc7, 0x81ba75e9,
-    0x14f07cf9, 0x81b96ea0,
-  0x14ea4a1f, 0x81b867a5, 0x14e41738, 0x81b760f8, 0x14dde445, 0x81b65a99,
-    0x14d7b144, 0x81b55488,
-  0x14d17e36, 0x81b44ec4, 0x14cb4b1c, 0x81b3494f, 0x14c517f4, 0x81b24427,
-    0x14bee4c0, 0x81b13f4e,
-  0x14b8b17f, 0x81b03ac2, 0x14b27e32, 0x81af3684, 0x14ac4ad7, 0x81ae3294,
-    0x14a61770, 0x81ad2ef2,
-  0x149fe3fc, 0x81ac2b9e, 0x1499b07c, 0x81ab2898, 0x14937cee, 0x81aa25e0,
-    0x148d4954, 0x81a92376,
-  0x148715ae, 0x81a82159, 0x1480e1fa, 0x81a71f8b, 0x147aae3a, 0x81a61e0b,
-    0x14747a6d, 0x81a51cd8,
-  0x146e4694, 0x81a41bf4, 0x146812ae, 0x81a31b5d, 0x1461debc, 0x81a21b14,
-    0x145baabd, 0x81a11b1a,
-  0x145576b1, 0x81a01b6d, 0x144f4299, 0x819f1c0e, 0x14490e74, 0x819e1cfd,
-    0x1442da43, 0x819d1e3a,
-  0x143ca605, 0x819c1fc5, 0x143671bb, 0x819b219e, 0x14303d65, 0x819a23c5,
-    0x142a0902, 0x8199263a,
-  0x1423d492, 0x819828fd, 0x141da016, 0x81972c0e, 0x14176b8e, 0x81962f6d,
-    0x141136f9, 0x8195331a,
-  0x140b0258, 0x81943715, 0x1404cdaa, 0x81933b5e, 0x13fe98f1, 0x81923ff4,
-    0x13f8642a, 0x819144d9,
-  0x13f22f58, 0x81904a0c, 0x13ebfa79, 0x818f4f8d, 0x13e5c58e, 0x818e555c,
-    0x13df9097, 0x818d5b78,
-  0x13d95b93, 0x818c61e3, 0x13d32683, 0x818b689c, 0x13ccf167, 0x818a6fa3,
-    0x13c6bc3f, 0x818976f8,
-  0x13c0870a, 0x81887e9a, 0x13ba51ca, 0x8187868b, 0x13b41c7d, 0x81868eca,
-    0x13ade724, 0x81859757,
-  0x13a7b1bf, 0x8184a032, 0x13a17c4d, 0x8183a95b, 0x139b46d0, 0x8182b2d1,
-    0x13951146, 0x8181bc96,
-  0x138edbb1, 0x8180c6a9, 0x1388a60f, 0x817fd10a, 0x13827062, 0x817edbb9,
-    0x137c3aa8, 0x817de6b6,
-  0x137604e2, 0x817cf201, 0x136fcf10, 0x817bfd9b, 0x13699933, 0x817b0982,
-    0x13636349, 0x817a15b7,
-  0x135d2d53, 0x8179223a, 0x1356f752, 0x81782f0b, 0x1350c144, 0x81773c2b,
-    0x134a8b2b, 0x81764998,
-  0x13445505, 0x81755754, 0x133e1ed4, 0x8174655d, 0x1337e897, 0x817373b5,
-    0x1331b24e, 0x8172825a,
-  0x132b7bf9, 0x8171914e, 0x13254599, 0x8170a090, 0x131f0f2c, 0x816fb020,
-    0x1318d8b4, 0x816ebffe,
-  0x1312a230, 0x816dd02a, 0x130c6ba0, 0x816ce0a4, 0x13063505, 0x816bf16c,
-    0x12fffe5d, 0x816b0282,
-  0x12f9c7aa, 0x816a13e6, 0x12f390ec, 0x81692599, 0x12ed5a21, 0x81683799,
-    0x12e7234b, 0x816749e8,
-  0x12e0ec6a, 0x81665c84, 0x12dab57c, 0x81656f6f, 0x12d47e83, 0x816482a8,
-    0x12ce477f, 0x8163962f,
-  0x12c8106f, 0x8162aa04, 0x12c1d953, 0x8161be27, 0x12bba22b, 0x8160d298,
-    0x12b56af9, 0x815fe758,
-  0x12af33ba, 0x815efc65, 0x12a8fc70, 0x815e11c1, 0x12a2c51b, 0x815d276a,
-    0x129c8dba, 0x815c3d62,
-  0x1296564d, 0x815b53a8, 0x12901ed5, 0x815a6a3c, 0x1289e752, 0x8159811e,
-    0x1283afc3, 0x8158984e,
-  0x127d7829, 0x8157afcd, 0x12774083, 0x8156c799, 0x127108d2, 0x8155dfb4,
-    0x126ad116, 0x8154f81d,
-  0x1264994e, 0x815410d4, 0x125e617b, 0x815329d9, 0x1258299c, 0x8152432c,
-    0x1251f1b3, 0x81515ccd,
-  0x124bb9be, 0x815076bd, 0x124581bd, 0x814f90fb, 0x123f49b2, 0x814eab86,
-    0x1239119b, 0x814dc660,
-  0x1232d979, 0x814ce188, 0x122ca14b, 0x814bfcff, 0x12266913, 0x814b18c3,
-    0x122030cf, 0x814a34d6,
-  0x1219f880, 0x81495136, 0x1213c026, 0x81486de5, 0x120d87c1, 0x81478ae2,
-    0x12074f50, 0x8146a82e,
-  0x120116d5, 0x8145c5c7, 0x11fade4e, 0x8144e3ae, 0x11f4a5bd, 0x814401e4,
-    0x11ee6d20, 0x81432068,
-  0x11e83478, 0x81423f3a, 0x11e1fbc5, 0x81415e5a, 0x11dbc307, 0x81407dc9,
-    0x11d58a3e, 0x813f9d86,
-  0x11cf516a, 0x813ebd90, 0x11c9188b, 0x813ddde9, 0x11c2dfa2, 0x813cfe91,
-    0x11bca6ad, 0x813c1f86,
-  0x11b66dad, 0x813b40ca, 0x11b034a2, 0x813a625b, 0x11a9fb8d, 0x8139843b,
-    0x11a3c26c, 0x8138a66a,
-  0x119d8941, 0x8137c8e6, 0x1197500a, 0x8136ebb1, 0x119116c9, 0x81360ec9,
-    0x118add7d, 0x81353230,
-  0x1184a427, 0x813455e6, 0x117e6ac5, 0x813379e9, 0x11783159, 0x81329e3b,
-    0x1171f7e2, 0x8131c2db,
-  0x116bbe60, 0x8130e7c9, 0x116584d3, 0x81300d05, 0x115f4b3c, 0x812f3290,
-    0x1159119a, 0x812e5868,
-  0x1152d7ed, 0x812d7e8f, 0x114c9e35, 0x812ca505, 0x11466473, 0x812bcbc8,
-    0x11402aa6, 0x812af2da,
-  0x1139f0cf, 0x812a1a3a, 0x1133b6ed, 0x812941e8, 0x112d7d00, 0x812869e4,
-    0x11274309, 0x8127922f,
-  0x11210907, 0x8126bac8, 0x111acefb, 0x8125e3af, 0x111494e4, 0x81250ce4,
-    0x110e5ac2, 0x81243668,
-  0x11082096, 0x8123603a, 0x1101e65f, 0x81228a5a, 0x10fbac1e, 0x8121b4c8,
-    0x10f571d3, 0x8120df85,
-  0x10ef377d, 0x81200a90, 0x10e8fd1c, 0x811f35e9, 0x10e2c2b2, 0x811e6191,
-    0x10dc883c, 0x811d8d86,
-  0x10d64dbd, 0x811cb9ca, 0x10d01333, 0x811be65d, 0x10c9d89e, 0x811b133d,
-    0x10c39dff, 0x811a406c,
-  0x10bd6356, 0x81196de9, 0x10b728a3, 0x81189bb4, 0x10b0ede5, 0x8117c9ce,
-    0x10aab31d, 0x8116f836,
-  0x10a4784b, 0x811626ec, 0x109e3d6e, 0x811555f1, 0x10980287, 0x81148544,
-    0x1091c796, 0x8113b4e5,
-  0x108b8c9b, 0x8112e4d4, 0x10855195, 0x81121512, 0x107f1686, 0x8111459e,
-    0x1078db6c, 0x81107678,
-  0x1072a048, 0x810fa7a0, 0x106c651a, 0x810ed917, 0x106629e1, 0x810e0adc,
-    0x105fee9f, 0x810d3cf0,
-  0x1059b352, 0x810c6f52, 0x105377fc, 0x810ba202, 0x104d3c9b, 0x810ad500,
-    0x10470130, 0x810a084d,
-  0x1040c5bb, 0x81093be8, 0x103a8a3d, 0x81086fd1, 0x10344eb4, 0x8107a409,
-    0x102e1321, 0x8106d88f,
-  0x1027d784, 0x81060d63, 0x10219bdd, 0x81054286, 0x101b602d, 0x810477f7,
-    0x10152472, 0x8103adb6,
-  0x100ee8ad, 0x8102e3c4, 0x1008acdf, 0x81021a20, 0x10027107, 0x810150ca,
-    0xffc3524, 0x810087c3,
-  0xff5f938, 0x80ffbf0a, 0xfefbd42, 0x80fef69f, 0xfe98143, 0x80fe2e83,
-    0xfe34539, 0x80fd66b5,
-  0xfdd0926, 0x80fc9f35, 0xfd6cd08, 0x80fbd804, 0xfd090e1, 0x80fb1121,
-    0xfca54b1, 0x80fa4a8c,
-  0xfc41876, 0x80f98446, 0xfbddc32, 0x80f8be4e, 0xfb79fe4, 0x80f7f8a4,
-    0xfb1638d, 0x80f73349,
-  0xfab272b, 0x80f66e3c, 0xfa4eac0, 0x80f5a97e, 0xf9eae4c, 0x80f4e50e,
-    0xf9871ce, 0x80f420ec,
-  0xf923546, 0x80f35d19, 0xf8bf8b4, 0x80f29994, 0xf85bc19, 0x80f1d65d,
-    0xf7f7f75, 0x80f11375,
-  0xf7942c7, 0x80f050db, 0xf73060f, 0x80ef8e90, 0xf6cc94e, 0x80eecc93,
-    0xf668c83, 0x80ee0ae4,
-  0xf604faf, 0x80ed4984, 0xf5a12d1, 0x80ec8872, 0xf53d5ea, 0x80ebc7ae,
-    0xf4d98f9, 0x80eb0739,
-  0xf475bff, 0x80ea4712, 0xf411efb, 0x80e9873a, 0xf3ae1ee, 0x80e8c7b0,
-    0xf34a4d8, 0x80e80874,
-  0xf2e67b8, 0x80e74987, 0xf282a8f, 0x80e68ae8, 0xf21ed5d, 0x80e5cc98,
-    0xf1bb021, 0x80e50e96,
-  0xf1572dc, 0x80e450e2, 0xf0f358e, 0x80e3937d, 0xf08f836, 0x80e2d666,
-    0xf02bad5, 0x80e2199e,
-  0xefc7d6b, 0x80e15d24, 0xef63ff7, 0x80e0a0f8, 0xef0027b, 0x80dfe51b,
-    0xee9c4f5, 0x80df298c,
-  0xee38766, 0x80de6e4c, 0xedd49ce, 0x80ddb35a, 0xed70c2c, 0x80dcf8b7,
-    0xed0ce82, 0x80dc3e62,
-  0xeca90ce, 0x80db845b, 0xec45311, 0x80dacaa3, 0xebe154b, 0x80da1139,
-    0xeb7d77c, 0x80d9581e,
-  0xeb199a4, 0x80d89f51, 0xeab5bc3, 0x80d7e6d3, 0xea51dd8, 0x80d72ea3,
-    0xe9edfe5, 0x80d676c1,
-  0xe98a1e9, 0x80d5bf2e, 0xe9263e3, 0x80d507e9, 0xe8c25d5, 0x80d450f3,
-    0xe85e7be, 0x80d39a4b,
-  0xe7fa99e, 0x80d2e3f2, 0xe796b74, 0x80d22de7, 0xe732d42, 0x80d1782a,
-    0xe6cef07, 0x80d0c2bc,
-  0xe66b0c3, 0x80d00d9d, 0xe607277, 0x80cf58cc, 0xe5a3421, 0x80cea449,
-    0xe53f5c2, 0x80cdf015,
-  0xe4db75b, 0x80cd3c2f, 0xe4778eb, 0x80cc8898, 0xe413a72, 0x80cbd54f,
-    0xe3afbf0, 0x80cb2255,
-  0xe34bd66, 0x80ca6fa9, 0xe2e7ed2, 0x80c9bd4c, 0xe284036, 0x80c90b3d,
-    0xe220191, 0x80c8597c,
-  0xe1bc2e4, 0x80c7a80a, 0xe15842e, 0x80c6f6e7, 0xe0f456f, 0x80c64612,
-    0xe0906a7, 0x80c5958b,
-  0xe02c7d7, 0x80c4e553, 0xdfc88fe, 0x80c4356a, 0xdf64a1c, 0x80c385cf,
-    0xdf00b32, 0x80c2d682,
-  0xde9cc40, 0x80c22784, 0xde38d44, 0x80c178d4, 0xddd4e40, 0x80c0ca73,
-    0xdd70f34, 0x80c01c60,
-  0xdd0d01f, 0x80bf6e9c, 0xdca9102, 0x80bec127, 0xdc451dc, 0x80be13ff,
-    0xdbe12ad, 0x80bd6727,
-  0xdb7d376, 0x80bcba9d, 0xdb19437, 0x80bc0e61, 0xdab54ef, 0x80bb6274,
-    0xda5159f, 0x80bab6d5,
-  0xd9ed646, 0x80ba0b85, 0xd9896e5, 0x80b96083, 0xd92577b, 0x80b8b5d0,
-    0xd8c1809, 0x80b80b6c,
-  0xd85d88f, 0x80b76156, 0xd7f990c, 0x80b6b78e, 0xd795982, 0x80b60e15,
-    0xd7319ee, 0x80b564ea,
-  0xd6cda53, 0x80b4bc0e, 0xd669aaf, 0x80b41381, 0xd605b03, 0x80b36b42,
-    0xd5a1b4f, 0x80b2c351,
-  0xd53db92, 0x80b21baf, 0xd4d9bcd, 0x80b1745c, 0xd475c00, 0x80b0cd57,
-    0xd411c2b, 0x80b026a1,
-  0xd3adc4e, 0x80af8039, 0xd349c68, 0x80aeda20, 0xd2e5c7b, 0x80ae3455,
-    0xd281c85, 0x80ad8ed9,
-  0xd21dc87, 0x80ace9ab, 0xd1b9c81, 0x80ac44cc, 0xd155c73, 0x80aba03b,
-    0xd0f1c5d, 0x80aafbf9,
-  0xd08dc3f, 0x80aa5806, 0xd029c18, 0x80a9b461, 0xcfc5bea, 0x80a9110b,
-    0xcf61bb4, 0x80a86e03,
-  0xcefdb76, 0x80a7cb49, 0xce99b2f, 0x80a728df, 0xce35ae1, 0x80a686c2,
-    0xcdd1a8b, 0x80a5e4f5,
-  0xcd6da2d, 0x80a54376, 0xcd099c7, 0x80a4a245, 0xcca5959, 0x80a40163,
-    0xcc418e3, 0x80a360d0,
-  0xcbdd865, 0x80a2c08b, 0xcb797e0, 0x80a22095, 0xcb15752, 0x80a180ed,
-    0xcab16bd, 0x80a0e194,
-  0xca4d620, 0x80a04289, 0xc9e957b, 0x809fa3cd, 0xc9854cf, 0x809f0560,
-    0xc92141a, 0x809e6741,
-  0xc8bd35e, 0x809dc971, 0xc85929a, 0x809d2bef, 0xc7f51cf, 0x809c8ebc,
-    0xc7910fb, 0x809bf1d7,
-  0xc72d020, 0x809b5541, 0xc6c8f3e, 0x809ab8fa, 0xc664e53, 0x809a1d01,
-    0xc600d61, 0x80998157,
-  0xc59cc68, 0x8098e5fb, 0xc538b66, 0x80984aee, 0xc4d4a5d, 0x8097b030,
-    0xc47094d, 0x809715c0,
-  0xc40c835, 0x80967b9f, 0xc3a8715, 0x8095e1cc, 0xc3445ee, 0x80954848,
-    0xc2e04c0, 0x8094af13,
-  0xc27c389, 0x8094162c, 0xc21824c, 0x80937d93, 0xc1b4107, 0x8092e54a,
-    0xc14ffba, 0x80924d4f,
-  0xc0ebe66, 0x8091b5a2, 0xc087d0a, 0x80911e44, 0xc023ba7, 0x80908735,
-    0xbfbfa3d, 0x808ff074,
-  0xbf5b8cb, 0x808f5a02, 0xbef7752, 0x808ec3df, 0xbe935d2, 0x808e2e0a,
-    0xbe2f44a, 0x808d9884,
-  0xbdcb2bb, 0x808d034c, 0xbd67124, 0x808c6e63, 0xbd02f87, 0x808bd9c9,
-    0xbc9ede2, 0x808b457d,
-  0xbc3ac35, 0x808ab180, 0xbbd6a82, 0x808a1dd2, 0xbb728c7, 0x80898a72,
-    0xbb0e705, 0x8088f761,
-  0xbaaa53b, 0x8088649e, 0xba4636b, 0x8087d22a, 0xb9e2193, 0x80874005,
-    0xb97dfb5, 0x8086ae2e,
-  0xb919dcf, 0x80861ca6, 0xb8b5be1, 0x80858b6c, 0xb8519ed, 0x8084fa82,
-    0xb7ed7f2, 0x808469e5,
-  0xb7895f0, 0x8083d998, 0xb7253e6, 0x80834999, 0xb6c11d5, 0x8082b9e9,
-    0xb65cfbe, 0x80822a87,
-  0xb5f8d9f, 0x80819b74, 0xb594b7a, 0x80810cb0, 0xb53094d, 0x80807e3a,
-    0xb4cc719, 0x807ff013,
-  0xb4684df, 0x807f623b, 0xb40429d, 0x807ed4b1, 0xb3a0055, 0x807e4776,
-    0xb33be05, 0x807dba89,
-  0xb2d7baf, 0x807d2dec, 0xb273952, 0x807ca19c, 0xb20f6ee, 0x807c159c,
-    0xb1ab483, 0x807b89ea,
-  0xb147211, 0x807afe87, 0xb0e2f98, 0x807a7373, 0xb07ed19, 0x8079e8ad,
-    0xb01aa92, 0x80795e36,
-  0xafb6805, 0x8078d40d, 0xaf52571, 0x80784a33, 0xaeee2d7, 0x8077c0a8,
-    0xae8a036, 0x8077376c,
-  0xae25d8d, 0x8076ae7e, 0xadc1adf, 0x807625df, 0xad5d829, 0x80759d8e,
-    0xacf956d, 0x8075158c,
-  0xac952aa, 0x80748dd9, 0xac30fe1, 0x80740675, 0xabccd11, 0x80737f5f,
-    0xab68a3a, 0x8072f898,
-  0xab0475c, 0x8072721f, 0xaaa0478, 0x8071ebf6, 0xaa3c18e, 0x8071661a,
-    0xa9d7e9d, 0x8070e08e,
-  0xa973ba5, 0x80705b50, 0xa90f8a7, 0x806fd661, 0xa8ab5a2, 0x806f51c1,
-    0xa847297, 0x806ecd6f,
-  0xa7e2f85, 0x806e496c, 0xa77ec6d, 0x806dc5b8, 0xa71a94f, 0x806d4253,
-    0xa6b662a, 0x806cbf3c,
-  0xa6522fe, 0x806c3c74, 0xa5edfcc, 0x806bb9fa, 0xa589c94, 0x806b37cf,
-    0xa525955, 0x806ab5f3,
-  0xa4c1610, 0x806a3466, 0xa45d2c5, 0x8069b327, 0xa3f8f73, 0x80693237,
-    0xa394c1b, 0x8068b196,
-  0xa3308bd, 0x80683143, 0xa2cc558, 0x8067b13f, 0xa2681ed, 0x8067318a,
-    0xa203e7c, 0x8066b224,
-  0xa19fb04, 0x8066330c, 0xa13b787, 0x8065b443, 0xa0d7403, 0x806535c9,
-    0xa073079, 0x8064b79d,
-  0xa00ece8, 0x806439c0, 0x9faa952, 0x8063bc32, 0x9f465b5, 0x80633ef3,
-    0x9ee2213, 0x8062c202,
-  0x9e7de6a, 0x80624560, 0x9e19abb, 0x8061c90c, 0x9db5706, 0x80614d08,
-    0x9d5134b, 0x8060d152,
-  0x9cecf89, 0x806055eb, 0x9c88bc2, 0x805fdad2, 0x9c247f5, 0x805f6009,
-    0x9bc0421, 0x805ee58e,
-  0x9b5c048, 0x805e6b62, 0x9af7c69, 0x805df184, 0x9a93884, 0x805d77f5,
-    0x9a2f498, 0x805cfeb5,
-  0x99cb0a7, 0x805c85c4, 0x9966cb0, 0x805c0d21, 0x99028b3, 0x805b94ce,
-    0x989e4b0, 0x805b1cc8,
-  0x983a0a7, 0x805aa512, 0x97d5c99, 0x805a2daa, 0x9771884, 0x8059b692,
-    0x970d46a, 0x80593fc7,
-  0x96a9049, 0x8058c94c, 0x9644c23, 0x8058531f, 0x95e07f8, 0x8057dd41,
-    0x957c3c6, 0x805767b2,
-  0x9517f8f, 0x8056f272, 0x94b3b52, 0x80567d80, 0x944f70f, 0x805608dd,
-    0x93eb2c6, 0x80559489,
-  0x9386e78, 0x80552084, 0x9322a24, 0x8054accd, 0x92be5ca, 0x80543965,
-    0x925a16b, 0x8053c64c,
-  0x91f5d06, 0x80535381, 0x919189c, 0x8052e106, 0x912d42c, 0x80526ed9,
-    0x90c8fb6, 0x8051fcfb,
-  0x9064b3a, 0x80518b6b, 0x90006ba, 0x80511a2b, 0x8f9c233, 0x8050a939,
-    0x8f37da7, 0x80503896,
-  0x8ed3916, 0x804fc841, 0x8e6f47f, 0x804f583c, 0x8e0afe2, 0x804ee885,
-    0x8da6b40, 0x804e791d,
-  0x8d42699, 0x804e0a04, 0x8cde1ec, 0x804d9b39, 0x8c79d3a, 0x804d2cbd,
-    0x8c15882, 0x804cbe90,
-  0x8bb13c5, 0x804c50b2, 0x8b4cf02, 0x804be323, 0x8ae8a3a, 0x804b75e2,
-    0x8a8456d, 0x804b08f0,
-  0x8a2009a, 0x804a9c4d, 0x89bbbc3, 0x804a2ff9, 0x89576e5, 0x8049c3f3,
-    0x88f3203, 0x8049583d,
-  0x888ed1b, 0x8048ecd5, 0x882a82e, 0x804881bb, 0x87c633c, 0x804816f1,
-    0x8761e44, 0x8047ac75,
-  0x86fd947, 0x80474248, 0x8699445, 0x8046d86a, 0x8634f3e, 0x80466edb,
-    0x85d0a32, 0x8046059b,
-  0x856c520, 0x80459ca9, 0x850800a, 0x80453406, 0x84a3aee, 0x8044cbb2,
-    0x843f5cd, 0x804463ad,
-  0x83db0a7, 0x8043fbf6, 0x8376b7c, 0x8043948e, 0x831264c, 0x80432d75,
-    0x82ae117, 0x8042c6ab,
-  0x8249bdd, 0x80426030, 0x81e569d, 0x8041fa03, 0x8181159, 0x80419425,
-    0x811cc10, 0x80412e96,
-  0x80b86c2, 0x8040c956, 0x805416e, 0x80406465, 0x7fefc16, 0x803fffc2,
-    0x7f8b6b9, 0x803f9b6f,
-  0x7f27157, 0x803f376a, 0x7ec2bf0, 0x803ed3b3, 0x7e5e685, 0x803e704c,
-    0x7dfa114, 0x803e0d34,
-  0x7d95b9e, 0x803daa6a, 0x7d31624, 0x803d47ef, 0x7ccd0a5, 0x803ce5c3,
-    0x7c68b21, 0x803c83e5,
-  0x7c04598, 0x803c2257, 0x7ba000b, 0x803bc117, 0x7b3ba78, 0x803b6026,
-    0x7ad74e1, 0x803aff84,
-  0x7a72f45, 0x803a9f31, 0x7a0e9a5, 0x803a3f2d, 0x79aa400, 0x8039df77,
-    0x7945e56, 0x80398010,
-  0x78e18a7, 0x803920f8, 0x787d2f4, 0x8038c22f, 0x7818d3c, 0x803863b5,
-    0x77b4780, 0x80380589,
-  0x77501be, 0x8037a7ac, 0x76ebbf9, 0x80374a1f, 0x768762e, 0x8036ece0,
-    0x762305f, 0x80368fef,
-  0x75bea8c, 0x8036334e, 0x755a4b4, 0x8035d6fb, 0x74f5ed7, 0x80357af8,
-    0x74918f6, 0x80351f43,
-  0x742d311, 0x8034c3dd, 0x73c8d27, 0x803468c5, 0x7364738, 0x80340dfd,
-    0x7300145, 0x8033b383,
-  0x729bb4e, 0x80335959, 0x7237552, 0x8032ff7d, 0x71d2f52, 0x8032a5ef,
-    0x716e94e, 0x80324cb1,
-  0x710a345, 0x8031f3c2, 0x70a5d37, 0x80319b21, 0x7041726, 0x803142cf,
-    0x6fdd110, 0x8030eacd,
-  0x6f78af6, 0x80309318, 0x6f144d7, 0x80303bb3, 0x6eafeb4, 0x802fe49d,
-    0x6e4b88d, 0x802f8dd5,
-  0x6de7262, 0x802f375d, 0x6d82c32, 0x802ee133, 0x6d1e5fe, 0x802e8b58,
-    0x6cb9fc6, 0x802e35cb,
-  0x6c5598a, 0x802de08e, 0x6bf1349, 0x802d8ba0, 0x6b8cd05, 0x802d3700,
-    0x6b286bc, 0x802ce2af,
-  0x6ac406f, 0x802c8ead, 0x6a5fa1e, 0x802c3afa, 0x69fb3c9, 0x802be796,
-    0x6996d70, 0x802b9480,
-  0x6932713, 0x802b41ba, 0x68ce0b2, 0x802aef42, 0x6869a4c, 0x802a9d19,
-    0x68053e3, 0x802a4b3f,
-  0x67a0d76, 0x8029f9b4, 0x673c704, 0x8029a878, 0x66d808f, 0x8029578b,
-    0x6673a16, 0x802906ec,
-  0x660f398, 0x8028b69c, 0x65aad17, 0x8028669b, 0x6546692, 0x802816e9,
-    0x64e2009, 0x8027c786,
-  0x647d97c, 0x80277872, 0x64192eb, 0x802729ad, 0x63b4c57, 0x8026db36,
-    0x63505be, 0x80268d0e,
-  0x62ebf22, 0x80263f36, 0x6287882, 0x8025f1ac, 0x62231de, 0x8025a471,
-    0x61beb36, 0x80255784,
-  0x615a48b, 0x80250ae7, 0x60f5ddc, 0x8024be99, 0x6091729, 0x80247299,
-    0x602d072, 0x802426e8,
-  0x5fc89b8, 0x8023db86, 0x5f642fa, 0x80239073, 0x5effc38, 0x802345af,
-    0x5e9b572, 0x8022fb3a,
-  0x5e36ea9, 0x8022b114, 0x5dd27dd, 0x8022673c, 0x5d6e10c, 0x80221db3,
-    0x5d09a38, 0x8021d47a,
-  0x5ca5361, 0x80218b8f, 0x5c40c86, 0x802142f3, 0x5bdc5a7, 0x8020faa6,
-    0x5b77ec5, 0x8020b2a7,
-  0x5b137df, 0x80206af8, 0x5aaf0f6, 0x80202397, 0x5a4aa09, 0x801fdc86,
-    0x59e6319, 0x801f95c3,
-  0x5981c26, 0x801f4f4f, 0x591d52f, 0x801f092a, 0x58b8e34, 0x801ec354,
-    0x5854736, 0x801e7dcd,
-  0x57f0035, 0x801e3895, 0x578b930, 0x801df3ab, 0x5727228, 0x801daf11,
-    0x56c2b1c, 0x801d6ac5,
-  0x565e40d, 0x801d26c8, 0x55f9cfb, 0x801ce31a, 0x55955e6, 0x801c9fbb,
-    0x5530ecd, 0x801c5cab,
-  0x54cc7b1, 0x801c19ea, 0x5468092, 0x801bd777, 0x540396f, 0x801b9554,
-    0x539f249, 0x801b537f,
-  0x533ab20, 0x801b11fa, 0x52d63f4, 0x801ad0c3, 0x5271cc4, 0x801a8fdb,
-    0x520d592, 0x801a4f42,
-  0x51a8e5c, 0x801a0ef8, 0x5144723, 0x8019cefd, 0x50dffe7, 0x80198f50,
-    0x507b8a8, 0x80194ff3,
-  0x5017165, 0x801910e4, 0x4fb2a20, 0x8018d225, 0x4f4e2d8, 0x801893b4,
-    0x4ee9b8c, 0x80185592,
-  0x4e8543e, 0x801817bf, 0x4e20cec, 0x8017da3b, 0x4dbc597, 0x80179d06,
-    0x4d57e40, 0x80176020,
-  0x4cf36e5, 0x80172388, 0x4c8ef88, 0x8016e740, 0x4c2a827, 0x8016ab46,
-    0x4bc60c4, 0x80166f9c,
-  0x4b6195d, 0x80163440, 0x4afd1f4, 0x8015f933, 0x4a98a88, 0x8015be75,
-    0x4a34319, 0x80158406,
-  0x49cfba7, 0x801549e6, 0x496b432, 0x80151015, 0x4906cbb, 0x8014d693,
-    0x48a2540, 0x80149d5f,
-  0x483ddc3, 0x8014647b, 0x47d9643, 0x80142be5, 0x4774ec1, 0x8013f39e,
-    0x471073b, 0x8013bba7,
-  0x46abfb3, 0x801383fe, 0x4647828, 0x80134ca4, 0x45e309a, 0x80131599,
-    0x457e90a, 0x8012dedd,
-  0x451a177, 0x8012a86f, 0x44b59e1, 0x80127251, 0x4451249, 0x80123c82,
-    0x43ecaae, 0x80120701,
-  0x4388310, 0x8011d1d0, 0x4323b70, 0x80119ced, 0x42bf3cd, 0x80116859,
-    0x425ac28, 0x80113414,
-  0x41f6480, 0x8011001f, 0x4191cd5, 0x8010cc78, 0x412d528, 0x8010991f,
-    0x40c8d79, 0x80106616,
-  0x40645c7, 0x8010335c, 0x3fffe12, 0x801000f1, 0x3f9b65b, 0x800fced4,
-    0x3f36ea2, 0x800f9d07,
-  0x3ed26e6, 0x800f6b88, 0x3e6df28, 0x800f3a59, 0x3e09767, 0x800f0978,
-    0x3da4fa4, 0x800ed8e6,
-  0x3d407df, 0x800ea8a3, 0x3cdc017, 0x800e78af, 0x3c7784d, 0x800e490a,
-    0x3c13080, 0x800e19b4,
-  0x3bae8b2, 0x800deaad, 0x3b4a0e0, 0x800dbbf5, 0x3ae590d, 0x800d8d8b,
-    0x3a81137, 0x800d5f71,
-  0x3a1c960, 0x800d31a5, 0x39b8185, 0x800d0429, 0x39539a9, 0x800cd6fb,
-    0x38ef1ca, 0x800caa1c,
-  0x388a9ea, 0x800c7d8c, 0x3826207, 0x800c514c, 0x37c1a22, 0x800c255a,
-    0x375d23a, 0x800bf9b7,
-  0x36f8a51, 0x800bce63, 0x3694265, 0x800ba35d, 0x362fa78, 0x800b78a7,
-    0x35cb288, 0x800b4e40,
-  0x3566a96, 0x800b2427, 0x35022a2, 0x800afa5e, 0x349daac, 0x800ad0e3,
-    0x34392b4, 0x800aa7b8,
-  0x33d4abb, 0x800a7edb, 0x33702bf, 0x800a564e, 0x330bac1, 0x800a2e0f,
-    0x32a72c1, 0x800a061f,
-  0x3242abf, 0x8009de7e, 0x31de2bb, 0x8009b72c, 0x3179ab5, 0x80099029,
-    0x31152ae, 0x80096975,
-  0x30b0aa4, 0x80094310, 0x304c299, 0x80091cf9, 0x2fe7a8c, 0x8008f732,
-    0x2f8327d, 0x8008d1ba,
-  0x2f1ea6c, 0x8008ac90, 0x2eba259, 0x800887b6, 0x2e55a44, 0x8008632a,
-    0x2df122e, 0x80083eed,
-  0x2d8ca16, 0x80081b00, 0x2d281fc, 0x8007f761, 0x2cc39e1, 0x8007d411,
-    0x2c5f1c3, 0x8007b110,
-  0x2bfa9a4, 0x80078e5e, 0x2b96184, 0x80076bfb, 0x2b31961, 0x800749e7,
-    0x2acd13d, 0x80072822,
-  0x2a68917, 0x800706ac, 0x2a040f0, 0x8006e585, 0x299f8c7, 0x8006c4ac,
-    0x293b09c, 0x8006a423,
-  0x28d6870, 0x800683e8, 0x2872043, 0x800663fd, 0x280d813, 0x80064460,
-    0x27a8fe2, 0x80062513,
-  0x27447b0, 0x80060614, 0x26dff7c, 0x8005e764, 0x267b747, 0x8005c904,
-    0x2616f10, 0x8005aaf2,
-  0x25b26d7, 0x80058d2f, 0x254de9e, 0x80056fbb, 0x24e9662, 0x80055296,
-    0x2484e26, 0x800535c0,
-  0x24205e8, 0x80051939, 0x23bbda8, 0x8004fd00, 0x2357567, 0x8004e117,
-    0x22f2d25, 0x8004c57d,
-  0x228e4e2, 0x8004aa32, 0x2229c9d, 0x80048f35, 0x21c5457, 0x80047488,
-    0x2160c0f, 0x80045a29,
-  0x20fc3c6, 0x8004401a, 0x2097b7c, 0x80042659, 0x2033331, 0x80040ce7,
-    0x1fceae4, 0x8003f3c5,
-  0x1f6a297, 0x8003daf1, 0x1f05a48, 0x8003c26c, 0x1ea11f7, 0x8003aa36,
-    0x1e3c9a6, 0x8003924f,
-  0x1dd8154, 0x80037ab7, 0x1d73900, 0x8003636e, 0x1d0f0ab, 0x80034c74,
-    0x1caa855, 0x800335c9,
-  0x1c45ffe, 0x80031f6d, 0x1be17a6, 0x80030960, 0x1b7cf4d, 0x8002f3a1,
-    0x1b186f3, 0x8002de32,
-  0x1ab3e97, 0x8002c912, 0x1a4f63b, 0x8002b440, 0x19eaddd, 0x80029fbe,
-    0x198657f, 0x80028b8a,
-  0x1921d20, 0x800277a6, 0x18bd4bf, 0x80026410, 0x1858c5e, 0x800250c9,
-    0x17f43fc, 0x80023dd2,
-  0x178fb99, 0x80022b29, 0x172b335, 0x800218cf, 0x16c6ad0, 0x800206c4,
-    0x166226a, 0x8001f508,
-  0x15fda03, 0x8001e39b, 0x159919c, 0x8001d27d, 0x1534934, 0x8001c1ae,
-    0x14d00ca, 0x8001b12e,
-  0x146b860, 0x8001a0fd, 0x1406ff6, 0x8001911b, 0x13a278a, 0x80018187,
-    0x133df1e, 0x80017243,
-  0x12d96b1, 0x8001634e, 0x1274e43, 0x800154a7, 0x12105d5, 0x80014650,
-    0x11abd66, 0x80013847,
-  0x11474f6, 0x80012a8e, 0x10e2c85, 0x80011d23, 0x107e414, 0x80011008,
-    0x1019ba2, 0x8001033b,
-  0xfb5330, 0x8000f6bd, 0xf50abd, 0x8000ea8e, 0xeec249, 0x8000deaf, 0xe879d5,
-    0x8000d31e,
-  0xe23160, 0x8000c7dc, 0xdbe8eb, 0x8000bce9, 0xd5a075, 0x8000b245, 0xcf57ff,
-    0x8000a7f0,
-  0xc90f88, 0x80009dea, 0xc2c711, 0x80009433, 0xbc7e99, 0x80008aca, 0xb63621,
-    0x800081b1,
-  0xafeda8, 0x800078e7, 0xa9a52f, 0x8000706c, 0xa35cb5, 0x8000683f, 0x9d143b,
-    0x80006062,
-  0x96cbc1, 0x800058d4, 0x908346, 0x80005194, 0x8a3acb, 0x80004aa4, 0x83f250,
-    0x80004402,
-  0x7da9d4, 0x80003daf, 0x776159, 0x800037ac, 0x7118dc, 0x800031f7, 0x6ad060,
-    0x80002c91,
-  0x6487e3, 0x8000277a, 0x5e3f66, 0x800022b3, 0x57f6e9, 0x80001e3a, 0x51ae6b,
-    0x80001a10,
-  0x4b65ee, 0x80001635, 0x451d70, 0x800012a9, 0x3ed4f2, 0x80000f6c, 0x388c74,
-    0x80000c7e,
-  0x3243f5, 0x800009df, 0x2bfb77, 0x8000078e, 0x25b2f8, 0x8000058d, 0x1f6a7a,
-    0x800003db,
-  0x1921fb, 0x80000278, 0x12d97c, 0x80000163, 0xc90fe, 0x8000009e, 0x6487f,
-    0x80000027,
-
-};
-
-/**    
-* \par    
-* cosFactor tables are generated using the formula : 
cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))
    
-* \par    
-* C command to generate the table    
-* 
    
-* for(i = 0; i< N; i++)    
-* {    
-*   cos_factors[i]= 2 * cos((2*i+1)*c/2);    
-* } 
    
-* \par    
-* where N is the number of factors to generate and c is pi/(2*N)    
-* \par    
-* Then converted to q31 format by multiplying with 2^31 and saturated if required.    
-*/
-
-
-static const q31_t cos_factorsQ31_128[128] = {
-  0x7fff6216, 0x7ffa72d1, 0x7ff09478, 0x7fe1c76b, 0x7fce0c3e, 0x7fb563b3,
-  0x7f97cebd, 0x7f754e80,
-  0x7f4de451, 0x7f2191b4, 0x7ef05860, 0x7eba3a39, 0x7e7f3957, 0x7e3f57ff,
-  0x7dfa98a8, 0x7db0fdf8,
-  0x7d628ac6, 0x7d0f4218, 0x7cb72724, 0x7c5a3d50, 0x7bf88830, 0x7b920b89,
-  0x7b26cb4f, 0x7ab6cba4,
-  0x7a4210d8, 0x79c89f6e, 0x794a7c12, 0x78c7aba2, 0x78403329, 0x77b417df,
-  0x77235f2d, 0x768e0ea6,
-  0x75f42c0b, 0x7555bd4c, 0x74b2c884, 0x740b53fb, 0x735f6626, 0x72af05a7,
-  0x71fa3949, 0x71410805,
-  0x708378ff, 0x6fc19385, 0x6efb5f12, 0x6e30e34a, 0x6d6227fa, 0x6c8f351c,
-  0x6bb812d1, 0x6adcc964,
-  0x69fd614a, 0x6919e320, 0x683257ab, 0x6746c7d8, 0x66573cbb, 0x6563bf92,
-  0x646c59bf, 0x637114cc,
-  0x6271fa69, 0x616f146c, 0x60686ccf, 0x5f5e0db3, 0x5e50015d, 0x5d3e5237,
-  0x5c290acc, 0x5b1035cf,
-  0x59f3de12, 0x58d40e8c, 0x57b0d256, 0x568a34a9, 0x556040e2, 0x5433027d,
-  0x53028518, 0x51ced46e,
-  0x5097fc5e, 0x4f5e08e3, 0x4e210617, 0x4ce10034, 0x4b9e0390, 0x4a581c9e,
-  0x490f57ee, 0x47c3c22f,
-  0x46756828, 0x452456bd, 0x43d09aed, 0x427a41d0, 0x4121589b, 0x3fc5ec98,
-  0x3e680b2c, 0x3d07c1d6,
-  0x3ba51e29, 0x3a402dd2, 0x38d8fe93, 0x376f9e46, 0x36041ad9, 0x34968250,
-  0x3326e2c3, 0x31b54a5e,
-  0x3041c761, 0x2ecc681e, 0x2d553afc, 0x2bdc4e6f, 0x2a61b101, 0x28e5714b,
-  0x27679df4, 0x25e845b6,
-  0x24677758, 0x22e541af, 0x2161b3a0, 0x1fdcdc1b, 0x1e56ca1e, 0x1ccf8cb3,
-  0x1b4732ef, 0x19bdcbf3,
-  0x183366e9, 0x16a81305, 0x151bdf86, 0x138edbb1, 0x120116d5, 0x1072a048,
-  0xee38766, 0xd53db92,
-  0xbc3ac35, 0xa3308bd, 0x8a2009a, 0x710a345, 0x57f0035, 0x3ed26e6, 0x25b26d7,
-  0xc90f88,
-};
-
-static const q31_t cos_factorsQ31_512[512] = {
-  0x7ffff621, 0x7fffa72c, 0x7fff0943, 0x7ffe1c65, 0x7ffce093, 0x7ffb55ce,
-  0x7ff97c18, 0x7ff75370,
-  0x7ff4dbd9, 0x7ff21553, 0x7feeffe1, 0x7feb9b85, 0x7fe7e841, 0x7fe3e616,
-  0x7fdf9508, 0x7fdaf519,
-  0x7fd6064c, 0x7fd0c8a3, 0x7fcb3c23, 0x7fc560cf, 0x7fbf36aa, 0x7fb8bdb8,
-  0x7fb1f5fc, 0x7faadf7c,
-  0x7fa37a3c, 0x7f9bc640, 0x7f93c38c, 0x7f8b7227, 0x7f82d214, 0x7f79e35a,
-  0x7f70a5fe, 0x7f671a05,
-  0x7f5d3f75, 0x7f531655, 0x7f489eaa, 0x7f3dd87c, 0x7f32c3d1, 0x7f2760af,
-  0x7f1baf1e, 0x7f0faf25,
-  0x7f0360cb, 0x7ef6c418, 0x7ee9d914, 0x7edc9fc6, 0x7ecf1837, 0x7ec14270,
-  0x7eb31e78, 0x7ea4ac58,
-  0x7e95ec1a, 0x7e86ddc6, 0x7e778166, 0x7e67d703, 0x7e57dea7, 0x7e47985b,
-  0x7e37042a, 0x7e26221f,
-  0x7e14f242, 0x7e0374a0, 0x7df1a942, 0x7ddf9034, 0x7dcd2981, 0x7dba7534,
-  0x7da77359, 0x7d9423fc,
-  0x7d808728, 0x7d6c9ce9, 0x7d58654d, 0x7d43e05e, 0x7d2f0e2b, 0x7d19eebf,
-  0x7d048228, 0x7ceec873,
-  0x7cd8c1ae, 0x7cc26de5, 0x7cabcd28, 0x7c94df83, 0x7c7da505, 0x7c661dbc,
-  0x7c4e49b7, 0x7c362904,
-  0x7c1dbbb3, 0x7c0501d2, 0x7bebfb70, 0x7bd2a89e, 0x7bb9096b, 0x7b9f1de6,
-  0x7b84e61f, 0x7b6a6227,
-  0x7b4f920e, 0x7b3475e5, 0x7b190dbc, 0x7afd59a4, 0x7ae159ae, 0x7ac50dec,
-  0x7aa8766f, 0x7a8b9348,
-  0x7a6e648a, 0x7a50ea47, 0x7a332490, 0x7a151378, 0x79f6b711, 0x79d80f6f,
-  0x79b91ca4, 0x7999dec4,
-  0x797a55e0, 0x795a820e, 0x793a6361, 0x7919f9ec, 0x78f945c3, 0x78d846fb,
-  0x78b6fda8, 0x789569df,
-  0x78738bb3, 0x7851633b, 0x782ef08b, 0x780c33b8, 0x77e92cd9, 0x77c5dc01,
-  0x77a24148, 0x777e5cc3,
-  0x775a2e89, 0x7735b6af, 0x7710f54c, 0x76ebea77, 0x76c69647, 0x76a0f8d2,
-  0x767b1231, 0x7654e279,
-  0x762e69c4, 0x7607a828, 0x75e09dbd, 0x75b94a9c, 0x7591aedd, 0x7569ca99,
-  0x75419de7, 0x751928e0,
-  0x74f06b9e, 0x74c7663a, 0x749e18cd, 0x74748371, 0x744aa63f, 0x74208150,
-  0x73f614c0, 0x73cb60a8,
-  0x73a06522, 0x73752249, 0x73499838, 0x731dc70a, 0x72f1aed9, 0x72c54fc1,
-  0x7298a9dd, 0x726bbd48,
-  0x723e8a20, 0x7211107e, 0x71e35080, 0x71b54a41, 0x7186fdde, 0x71586b74,
-  0x7129931f, 0x70fa74fc,
-  0x70cb1128, 0x709b67c0, 0x706b78e3, 0x703b44ad, 0x700acb3c, 0x6fda0cae,
-  0x6fa90921, 0x6f77c0b3,
-  0x6f463383, 0x6f1461b0, 0x6ee24b57, 0x6eaff099, 0x6e7d5193, 0x6e4a6e66,
-  0x6e174730, 0x6de3dc11,
-  0x6db02d29, 0x6d7c3a98, 0x6d48047e, 0x6d138afb, 0x6cdece2f, 0x6ca9ce3b,
-  0x6c748b3f, 0x6c3f055d,
-  0x6c093cb6, 0x6bd3316a, 0x6b9ce39b, 0x6b66536b, 0x6b2f80fb, 0x6af86c6c,
-  0x6ac115e2, 0x6a897d7d,
-  0x6a51a361, 0x6a1987b0, 0x69e12a8c, 0x69a88c19, 0x696fac78, 0x69368bce,
-  0x68fd2a3d, 0x68c387e9,
-  0x6889a4f6, 0x684f8186, 0x68151dbe, 0x67da79c3, 0x679f95b7, 0x676471c0,
-  0x67290e02, 0x66ed6aa1,
-  0x66b187c3, 0x6675658c, 0x66390422, 0x65fc63a9, 0x65bf8447, 0x65826622,
-  0x6545095f, 0x65076e25,
-  0x64c99498, 0x648b7ce0, 0x644d2722, 0x640e9386, 0x63cfc231, 0x6390b34a,
-  0x635166f9, 0x6311dd64,
-  0x62d216b3, 0x6292130c, 0x6251d298, 0x6211557e, 0x61d09be5, 0x618fa5f7,
-  0x614e73da, 0x610d05b7,
-  0x60cb5bb7, 0x60897601, 0x604754bf, 0x6004f819, 0x5fc26038, 0x5f7f8d46,
-  0x5f3c7f6b, 0x5ef936d1,
-  0x5eb5b3a2, 0x5e71f606, 0x5e2dfe29, 0x5de9cc33, 0x5da5604f, 0x5d60baa7,
-  0x5d1bdb65, 0x5cd6c2b5,
-  0x5c9170bf, 0x5c4be5b0, 0x5c0621b2, 0x5bc024f0, 0x5b79ef96, 0x5b3381ce,
-  0x5aecdbc5, 0x5aa5fda5,
-  0x5a5ee79a, 0x5a1799d1, 0x59d01475, 0x598857b2, 0x594063b5, 0x58f838a9,
-  0x58afd6bd, 0x58673e1b,
-  0x581e6ef1, 0x57d5696d, 0x578c2dba, 0x5742bc06, 0x56f9147e, 0x56af3750,
-  0x566524aa, 0x561adcb9,
-  0x55d05faa, 0x5585adad, 0x553ac6ee, 0x54efab9c, 0x54a45be6, 0x5458d7f9,
-  0x540d2005, 0x53c13439,
-  0x537514c2, 0x5328c1d0, 0x52dc3b92, 0x528f8238, 0x524295f0, 0x51f576ea,
-  0x51a82555, 0x515aa162,
-  0x510ceb40, 0x50bf031f, 0x5070e92f, 0x50229da1, 0x4fd420a4, 0x4f857269,
-  0x4f369320, 0x4ee782fb,
-  0x4e984229, 0x4e48d0dd, 0x4df92f46, 0x4da95d96, 0x4d595bfe, 0x4d092ab0,
-  0x4cb8c9dd, 0x4c6839b7,
-  0x4c177a6e, 0x4bc68c36, 0x4b756f40, 0x4b2423be, 0x4ad2a9e2, 0x4a8101de,
-  0x4a2f2be6, 0x49dd282a,
-  0x498af6df, 0x49389836, 0x48e60c62, 0x48935397, 0x48406e08, 0x47ed5be6,
-  0x479a1d67, 0x4746b2bc,
-  0x46f31c1a, 0x469f59b4, 0x464b6bbe, 0x45f7526b, 0x45a30df0, 0x454e9e80,
-  0x44fa0450, 0x44a53f93,
-  0x4450507e, 0x43fb3746, 0x43a5f41e, 0x4350873c, 0x42faf0d4, 0x42a5311b,
-  0x424f4845, 0x41f93689,
-  0x41a2fc1a, 0x414c992f, 0x40f60dfb, 0x409f5ab6, 0x40487f94, 0x3ff17cca,
-  0x3f9a5290, 0x3f430119,
-  0x3eeb889c, 0x3e93e950, 0x3e3c2369, 0x3de4371f, 0x3d8c24a8, 0x3d33ec39,
-  0x3cdb8e09, 0x3c830a50,
-  0x3c2a6142, 0x3bd19318, 0x3b78a007, 0x3b1f8848, 0x3ac64c0f, 0x3a6ceb96,
-  0x3a136712, 0x39b9bebc,
-  0x395ff2c9, 0x39060373, 0x38abf0ef, 0x3851bb77, 0x37f76341, 0x379ce885,
-  0x37424b7b, 0x36e78c5b,
-  0x368cab5c, 0x3631a8b8, 0x35d684a6, 0x357b3f5d, 0x351fd918, 0x34c4520d,
-  0x3468aa76, 0x340ce28b,
-  0x33b0fa84, 0x3354f29b, 0x32f8cb07, 0x329c8402, 0x32401dc6, 0x31e39889,
-  0x3186f487, 0x312a31f8,
-  0x30cd5115, 0x30705217, 0x30133539, 0x2fb5fab2, 0x2f58a2be, 0x2efb2d95,
-  0x2e9d9b70, 0x2e3fec8b,
-  0x2de2211e, 0x2d843964, 0x2d263596, 0x2cc815ee, 0x2c69daa6, 0x2c0b83fa,
-  0x2bad1221, 0x2b4e8558,
-  0x2aefddd8, 0x2a911bdc, 0x2a323f9e, 0x29d34958, 0x29743946, 0x29150fa1,
-  0x28b5cca5, 0x2856708d,
-  0x27f6fb92, 0x27976df1, 0x2737c7e3, 0x26d809a5, 0x26783370, 0x26184581,
-  0x25b84012, 0x2558235f,
-  0x24f7efa2, 0x2497a517, 0x243743fa, 0x23d6cc87, 0x23763ef7, 0x23159b88,
-  0x22b4e274, 0x225413f8,
-  0x21f3304f, 0x219237b5, 0x21312a65, 0x20d0089c, 0x206ed295, 0x200d888d,
-  0x1fac2abf, 0x1f4ab968,
-  0x1ee934c3, 0x1e879d0d, 0x1e25f282, 0x1dc4355e, 0x1d6265dd, 0x1d00843d,
-  0x1c9e90b8, 0x1c3c8b8c,
-  0x1bda74f6, 0x1b784d30, 0x1b161479, 0x1ab3cb0d, 0x1a517128, 0x19ef0707,
-  0x198c8ce7, 0x192a0304,
-  0x18c7699b, 0x1864c0ea, 0x1802092c, 0x179f429f, 0x173c6d80, 0x16d98a0c,
-  0x1676987f, 0x16139918,
-  0x15b08c12, 0x154d71aa, 0x14ea4a1f, 0x148715ae, 0x1423d492, 0x13c0870a,
-  0x135d2d53, 0x12f9c7aa,
-  0x1296564d, 0x1232d979, 0x11cf516a, 0x116bbe60, 0x11082096, 0x10a4784b,
-  0x1040c5bb, 0xfdd0926,
-  0xf7942c7, 0xf1572dc, 0xeb199a4, 0xe4db75b, 0xde9cc40, 0xd85d88f, 0xd21dc87,
-  0xcbdd865,
-  0xc59cc68, 0xbf5b8cb, 0xb919dcf, 0xb2d7baf, 0xac952aa, 0xa6522fe, 0xa00ece8,
-  0x99cb0a7,
-  0x9386e78, 0x8d42699, 0x86fd947, 0x80b86c2, 0x7a72f45, 0x742d311, 0x6de7262,
-  0x67a0d76,
-  0x615a48b, 0x5b137df, 0x54cc7b1, 0x4e8543e, 0x483ddc3, 0x41f6480, 0x3bae8b2,
-  0x3566a96,
-  0x2f1ea6c, 0x28d6870, 0x228e4e2, 0x1c45ffe, 0x15fda03, 0xfb5330, 0x96cbc1,
-  0x3243f5,
-};
-
-static const q31_t cos_factorsQ31_2048[2048] = {
-  0x7fffff62, 0x7ffffa73, 0x7ffff094, 0x7fffe1c6, 0x7fffce09, 0x7fffb55c,
-  0x7fff97c1, 0x7fff7536,
-  0x7fff4dbb, 0x7fff2151, 0x7ffeeff8, 0x7ffeb9b0, 0x7ffe7e79, 0x7ffe3e52,
-  0x7ffdf93c, 0x7ffdaf37,
-  0x7ffd6042, 0x7ffd0c5f, 0x7ffcb38c, 0x7ffc55ca, 0x7ffbf319, 0x7ffb8b78,
-  0x7ffb1ee9, 0x7ffaad6a,
-  0x7ffa36fc, 0x7ff9bba0, 0x7ff93b54, 0x7ff8b619, 0x7ff82bef, 0x7ff79cd6,
-  0x7ff708ce, 0x7ff66fd7,
-  0x7ff5d1f1, 0x7ff52f1d, 0x7ff48759, 0x7ff3daa6, 0x7ff32905, 0x7ff27275,
-  0x7ff1b6f6, 0x7ff0f688,
-  0x7ff0312c, 0x7fef66e1, 0x7fee97a7, 0x7fedc37e, 0x7fecea67, 0x7fec0c62,
-  0x7feb296d, 0x7fea418b,
-  0x7fe954ba, 0x7fe862fa, 0x7fe76c4c, 0x7fe670b0, 0x7fe57025, 0x7fe46aac,
-  0x7fe36045, 0x7fe250ef,
-  0x7fe13cac, 0x7fe0237a, 0x7fdf055a, 0x7fdde24d, 0x7fdcba51, 0x7fdb8d67,
-  0x7fda5b8f, 0x7fd924ca,
-  0x7fd7e917, 0x7fd6a875, 0x7fd562e7, 0x7fd4186a, 0x7fd2c900, 0x7fd174a8,
-  0x7fd01b63, 0x7fcebd31,
-  0x7fcd5a11, 0x7fcbf203, 0x7fca8508, 0x7fc91320, 0x7fc79c4b, 0x7fc62089,
-  0x7fc49fda, 0x7fc31a3d,
-  0x7fc18fb4, 0x7fc0003e, 0x7fbe6bdb, 0x7fbcd28b, 0x7fbb344e, 0x7fb99125,
-  0x7fb7e90f, 0x7fb63c0d,
-  0x7fb48a1e, 0x7fb2d343, 0x7fb1177b, 0x7faf56c7, 0x7fad9127, 0x7fabc69b,
-  0x7fa9f723, 0x7fa822bf,
-  0x7fa6496e, 0x7fa46b32, 0x7fa2880b, 0x7fa09ff7, 0x7f9eb2f8, 0x7f9cc10d,
-  0x7f9aca37, 0x7f98ce76,
-  0x7f96cdc9, 0x7f94c831, 0x7f92bdad, 0x7f90ae3f, 0x7f8e99e6, 0x7f8c80a1,
-  0x7f8a6272, 0x7f883f58,
-  0x7f861753, 0x7f83ea64, 0x7f81b88a, 0x7f7f81c6, 0x7f7d4617, 0x7f7b057e,
-  0x7f78bffb, 0x7f76758e,
-  0x7f742637, 0x7f71d1f6, 0x7f6f78cb, 0x7f6d1ab6, 0x7f6ab7b8, 0x7f684fd0,
-  0x7f65e2ff, 0x7f637144,
-  0x7f60faa0, 0x7f5e7f13, 0x7f5bfe9d, 0x7f59793e, 0x7f56eef5, 0x7f545fc5,
-  0x7f51cbab, 0x7f4f32a9,
-  0x7f4c94be, 0x7f49f1eb, 0x7f474a30, 0x7f449d8c, 0x7f41ec01, 0x7f3f358d,
-  0x7f3c7a31, 0x7f39b9ee,
-  0x7f36f4c3, 0x7f342ab1, 0x7f315bb7, 0x7f2e87d6, 0x7f2baf0d, 0x7f28d15d,
-  0x7f25eec7, 0x7f230749,
-  0x7f201ae5, 0x7f1d299a, 0x7f1a3368, 0x7f173850, 0x7f143852, 0x7f11336d,
-  0x7f0e29a3, 0x7f0b1af2,
-  0x7f08075c, 0x7f04eedf, 0x7f01d17d, 0x7efeaf36, 0x7efb8809, 0x7ef85bf7,
-  0x7ef52b00, 0x7ef1f524,
-  0x7eeeba62, 0x7eeb7abc, 0x7ee83632, 0x7ee4ecc3, 0x7ee19e6f, 0x7ede4b38,
-  0x7edaf31c, 0x7ed7961c,
-  0x7ed43438, 0x7ed0cd70, 0x7ecd61c5, 0x7ec9f137, 0x7ec67bc5, 0x7ec3016f,
-  0x7ebf8237, 0x7ebbfe1c,
-  0x7eb8751e, 0x7eb4e73d, 0x7eb1547a, 0x7eadbcd4, 0x7eaa204c, 0x7ea67ee2,
-  0x7ea2d896, 0x7e9f2d68,
-  0x7e9b7d58, 0x7e97c867, 0x7e940e94, 0x7e904fe0, 0x7e8c8c4b, 0x7e88c3d5,
-  0x7e84f67e, 0x7e812447,
-  0x7e7d4d2f, 0x7e797136, 0x7e75905d, 0x7e71aaa4, 0x7e6dc00c, 0x7e69d093,
-  0x7e65dc3b, 0x7e61e303,
-  0x7e5de4ec, 0x7e59e1f5, 0x7e55da20, 0x7e51cd6c, 0x7e4dbbd9, 0x7e49a567,
-  0x7e458a17, 0x7e4169e9,
-  0x7e3d44dd, 0x7e391af3, 0x7e34ec2b, 0x7e30b885, 0x7e2c8002, 0x7e2842a2,
-  0x7e240064, 0x7e1fb94a,
-  0x7e1b6d53, 0x7e171c7f, 0x7e12c6ce, 0x7e0e6c42, 0x7e0a0cd9, 0x7e05a894,
-  0x7e013f74, 0x7dfcd178,
-  0x7df85ea0, 0x7df3e6ee, 0x7def6a60, 0x7deae8f7, 0x7de662b3, 0x7de1d795,
-  0x7ddd479d, 0x7dd8b2ca,
-  0x7dd4191d, 0x7dcf7a96, 0x7dcad736, 0x7dc62efc, 0x7dc181e8, 0x7dbccffc,
-  0x7db81936, 0x7db35d98,
-  0x7dae9d21, 0x7da9d7d2, 0x7da50dab, 0x7da03eab, 0x7d9b6ad3, 0x7d969224,
-  0x7d91b49e, 0x7d8cd240,
-  0x7d87eb0a, 0x7d82fefe, 0x7d7e0e1c, 0x7d791862, 0x7d741dd2, 0x7d6f1e6c,
-  0x7d6a1a31, 0x7d65111f,
-  0x7d600338, 0x7d5af07b, 0x7d55d8e9, 0x7d50bc82, 0x7d4b9b46, 0x7d467536,
-  0x7d414a51, 0x7d3c1a98,
-  0x7d36e60b, 0x7d31acaa, 0x7d2c6e76, 0x7d272b6e, 0x7d21e393, 0x7d1c96e5,
-  0x7d174564, 0x7d11ef11,
-  0x7d0c93eb, 0x7d0733f3, 0x7d01cf29, 0x7cfc658d, 0x7cf6f720, 0x7cf183e1,
-  0x7cec0bd1, 0x7ce68ef0,
-  0x7ce10d3f, 0x7cdb86bd, 0x7cd5fb6a, 0x7cd06b48, 0x7ccad656, 0x7cc53c94,
-  0x7cbf9e03, 0x7cb9faa2,
-  0x7cb45272, 0x7caea574, 0x7ca8f3a7, 0x7ca33d0c, 0x7c9d81a3, 0x7c97c16b,
-  0x7c91fc66, 0x7c8c3294,
-  0x7c8663f4, 0x7c809088, 0x7c7ab84e, 0x7c74db48, 0x7c6ef976, 0x7c6912d7,
-  0x7c63276d, 0x7c5d3737,
-  0x7c574236, 0x7c514869, 0x7c4b49d2, 0x7c45466f, 0x7c3f3e42, 0x7c39314b,
-  0x7c331f8a, 0x7c2d08ff,
-  0x7c26edab, 0x7c20cd8d, 0x7c1aa8a6, 0x7c147ef6, 0x7c0e507e, 0x7c081d3d,
-  0x7c01e534, 0x7bfba863,
-  0x7bf566cb, 0x7bef206b, 0x7be8d544, 0x7be28556, 0x7bdc30a1, 0x7bd5d726,
-  0x7bcf78e5, 0x7bc915dd,
-  0x7bc2ae10, 0x7bbc417e, 0x7bb5d026, 0x7baf5a09, 0x7ba8df28, 0x7ba25f82,
-  0x7b9bdb18, 0x7b9551ea,
-  0x7b8ec3f8, 0x7b883143, 0x7b8199ca, 0x7b7afd8f, 0x7b745c91, 0x7b6db6d0,
-  0x7b670c4d, 0x7b605d09,
-  0x7b59a902, 0x7b52f03a, 0x7b4c32b1, 0x7b457068, 0x7b3ea95d, 0x7b37dd92,
-  0x7b310d07, 0x7b2a37bc,
-  0x7b235db2, 0x7b1c7ee8, 0x7b159b5f, 0x7b0eb318, 0x7b07c612, 0x7b00d44d,
-  0x7af9ddcb, 0x7af2e28b,
-  0x7aebe28d, 0x7ae4ddd2, 0x7addd45b, 0x7ad6c626, 0x7acfb336, 0x7ac89b89,
-  0x7ac17f20, 0x7aba5dfc,
-  0x7ab3381d, 0x7aac0d82, 0x7aa4de2d, 0x7a9daa1d, 0x7a967153, 0x7a8f33d0,
-  0x7a87f192, 0x7a80aa9c,
-  0x7a795eec, 0x7a720e84, 0x7a6ab963, 0x7a635f8a, 0x7a5c00f9, 0x7a549db0,
-  0x7a4d35b0, 0x7a45c8f9,
-  0x7a3e578b, 0x7a36e166, 0x7a2f668c, 0x7a27e6fb, 0x7a2062b5, 0x7a18d9b9,
-  0x7a114c09, 0x7a09b9a4,
-  0x7a02228a, 0x79fa86bc, 0x79f2e63a, 0x79eb4105, 0x79e3971c, 0x79dbe880,
-  0x79d43532, 0x79cc7d31,
-  0x79c4c07e, 0x79bcff19, 0x79b53903, 0x79ad6e3c, 0x79a59ec3, 0x799dca9a,
-  0x7995f1c1, 0x798e1438,
-  0x798631ff, 0x797e4b16, 0x79765f7f, 0x796e6f39, 0x79667a44, 0x795e80a1,
-  0x79568250, 0x794e7f52,
-  0x794677a6, 0x793e6b4e, 0x79365a49, 0x792e4497, 0x79262a3a, 0x791e0b31,
-  0x7915e77c, 0x790dbf1d,
-  0x79059212, 0x78fd605d, 0x78f529fe, 0x78eceef6, 0x78e4af44, 0x78dc6ae8,
-  0x78d421e4, 0x78cbd437,
-  0x78c381e2, 0x78bb2ae5, 0x78b2cf41, 0x78aa6ef5, 0x78a20a03, 0x7899a06a,
-  0x7891322a, 0x7888bf45,
-  0x788047ba, 0x7877cb89, 0x786f4ab4, 0x7866c53a, 0x785e3b1c, 0x7855ac5a,
-  0x784d18f4, 0x784480ea,
-  0x783be43e, 0x783342ef, 0x782a9cfe, 0x7821f26b, 0x78194336, 0x78108f60,
-  0x7807d6e9, 0x77ff19d1,
-  0x77f65819, 0x77ed91c0, 0x77e4c6c9, 0x77dbf732, 0x77d322fc, 0x77ca4a27,
-  0x77c16cb4, 0x77b88aa3,
-  0x77afa3f5, 0x77a6b8a9, 0x779dc8c0, 0x7794d43b, 0x778bdb19, 0x7782dd5c,
-  0x7779db03, 0x7770d40f,
-  0x7767c880, 0x775eb857, 0x7755a394, 0x774c8a36, 0x77436c40, 0x773a49b0,
-  0x77312287, 0x7727f6c6,
-  0x771ec66e, 0x7715917d, 0x770c57f5, 0x770319d6, 0x76f9d721, 0x76f08fd5,
-  0x76e743f4, 0x76ddf37c,
-  0x76d49e70, 0x76cb44cf, 0x76c1e699, 0x76b883d0, 0x76af1c72, 0x76a5b082,
-  0x769c3ffe, 0x7692cae8,
-  0x7689513f, 0x767fd304, 0x76765038, 0x766cc8db, 0x76633ced, 0x7659ac6f,
-  0x76501760, 0x76467dc2,
-  0x763cdf94, 0x76333cd8, 0x7629958c, 0x761fe9b3, 0x7616394c, 0x760c8457,
-  0x7602cad5, 0x75f90cc7,
-  0x75ef4a2c, 0x75e58305, 0x75dbb753, 0x75d1e715, 0x75c8124d, 0x75be38fa,
-  0x75b45b1d, 0x75aa78b6,
-  0x75a091c6, 0x7596a64d, 0x758cb64c, 0x7582c1c2, 0x7578c8b0, 0x756ecb18,
-  0x7564c8f8, 0x755ac251,
-  0x7550b725, 0x7546a772, 0x753c933a, 0x75327a7d, 0x75285d3b, 0x751e3b75,
-  0x7514152b, 0x7509ea5d,
-  0x74ffbb0d, 0x74f58739, 0x74eb4ee3, 0x74e1120c, 0x74d6d0b2, 0x74cc8ad8,
-  0x74c2407d, 0x74b7f1a1,
-  0x74ad9e46, 0x74a3466b, 0x7498ea11, 0x748e8938, 0x748423e0, 0x7479ba0b,
-  0x746f4bb8, 0x7464d8e8,
-  0x745a619b, 0x744fe5d2, 0x7445658d, 0x743ae0cc, 0x74305790, 0x7425c9da,
-  0x741b37a9, 0x7410a0fe,
-  0x740605d9, 0x73fb663c, 0x73f0c226, 0x73e61997, 0x73db6c91, 0x73d0bb13,
-  0x73c6051f, 0x73bb4ab3,
-  0x73b08bd1, 0x73a5c87a, 0x739b00ad, 0x7390346b, 0x738563b5, 0x737a8e8a,
-  0x736fb4ec, 0x7364d6da,
-  0x7359f456, 0x734f0d5f, 0x734421f6, 0x7339321b, 0x732e3dcf, 0x73234512,
-  0x731847e5, 0x730d4648,
-  0x7302403c, 0x72f735c0, 0x72ec26d6, 0x72e1137d, 0x72d5fbb7, 0x72cadf83,
-  0x72bfbee3, 0x72b499d6,
-  0x72a9705c, 0x729e4277, 0x72931027, 0x7287d96c, 0x727c9e47, 0x72715eb8,
-  0x72661abf, 0x725ad25d,
-  0x724f8593, 0x72443460, 0x7238dec5, 0x722d84c4, 0x7222265b, 0x7216c38c,
-  0x720b5c57, 0x71fff0bc,
-  0x71f480bc, 0x71e90c57, 0x71dd938f, 0x71d21662, 0x71c694d2, 0x71bb0edf,
-  0x71af848a, 0x71a3f5d2,
-  0x719862b9, 0x718ccb3f, 0x71812f65, 0x71758f29, 0x7169ea8f, 0x715e4194,
-  0x7152943b, 0x7146e284,
-  0x713b2c6e, 0x712f71fb, 0x7123b32b, 0x7117effe, 0x710c2875, 0x71005c90,
-  0x70f48c50, 0x70e8b7b5,
-  0x70dcdec0, 0x70d10171, 0x70c51fc8, 0x70b939c7, 0x70ad4f6d, 0x70a160ba,
-  0x70956db1, 0x70897650,
-  0x707d7a98, 0x70717a8a, 0x70657626, 0x70596d6d, 0x704d6060, 0x70414efd,
-  0x70353947, 0x70291f3e,
-  0x701d00e1, 0x7010de32, 0x7004b731, 0x6ff88bde, 0x6fec5c3b, 0x6fe02846,
-  0x6fd3f001, 0x6fc7b36d,
-  0x6fbb728a, 0x6faf2d57, 0x6fa2e3d7, 0x6f969608, 0x6f8a43ed, 0x6f7ded84,
-  0x6f7192cf, 0x6f6533ce,
-  0x6f58d082, 0x6f4c68eb, 0x6f3ffd09, 0x6f338cde, 0x6f271868, 0x6f1a9faa,
-  0x6f0e22a3, 0x6f01a155,
-  0x6ef51bbe, 0x6ee891e1, 0x6edc03bc, 0x6ecf7152, 0x6ec2daa2, 0x6eb63fad,
-  0x6ea9a073, 0x6e9cfcf5,
-  0x6e905534, 0x6e83a92f, 0x6e76f8e7, 0x6e6a445d, 0x6e5d8b91, 0x6e50ce84,
-  0x6e440d37, 0x6e3747a9,
-  0x6e2a7ddb, 0x6e1dafce, 0x6e10dd82, 0x6e0406f8, 0x6df72c30, 0x6dea4d2b,
-  0x6ddd69e9, 0x6dd0826a,
-  0x6dc396b0, 0x6db6a6ba, 0x6da9b28a, 0x6d9cba1f, 0x6d8fbd7a, 0x6d82bc9d,
-  0x6d75b786, 0x6d68ae37,
-  0x6d5ba0b0, 0x6d4e8ef2, 0x6d4178fd, 0x6d345ed1, 0x6d274070, 0x6d1a1dda,
-  0x6d0cf70f, 0x6cffcc0f,
-  0x6cf29cdc, 0x6ce56975, 0x6cd831dc, 0x6ccaf610, 0x6cbdb613, 0x6cb071e4,
-  0x6ca32985, 0x6c95dcf6,
-  0x6c888c36, 0x6c7b3748, 0x6c6dde2b, 0x6c6080e0, 0x6c531f67, 0x6c45b9c1,
-  0x6c384fef, 0x6c2ae1f0,
-  0x6c1d6fc6, 0x6c0ff971, 0x6c027ef1, 0x6bf50047, 0x6be77d74, 0x6bd9f677,
-  0x6bcc6b53, 0x6bbedc06,
-  0x6bb14892, 0x6ba3b0f7, 0x6b961536, 0x6b88754f, 0x6b7ad142, 0x6b6d2911,
-  0x6b5f7cbc, 0x6b51cc42,
-  0x6b4417a6, 0x6b365ee7, 0x6b28a206, 0x6b1ae103, 0x6b0d1bdf, 0x6aff529a,
-  0x6af18536, 0x6ae3b3b2,
-  0x6ad5de0f, 0x6ac8044e, 0x6aba266e, 0x6aac4472, 0x6a9e5e58, 0x6a907423,
-  0x6a8285d1, 0x6a749365,
-  0x6a669cdd, 0x6a58a23c, 0x6a4aa381, 0x6a3ca0ad, 0x6a2e99c0, 0x6a208ebb,
-  0x6a127f9f, 0x6a046c6c,
-  0x69f65523, 0x69e839c4, 0x69da1a50, 0x69cbf6c7, 0x69bdcf29, 0x69afa378,
-  0x69a173b5, 0x69933fde,
-  0x698507f6, 0x6976cbfc, 0x69688bf1, 0x695a47d6, 0x694bffab, 0x693db371,
-  0x692f6328, 0x69210ed1,
-  0x6912b66c, 0x690459fb, 0x68f5f97d, 0x68e794f3, 0x68d92c5d, 0x68cabfbd,
-  0x68bc4f13, 0x68adda5f,
-  0x689f61a1, 0x6890e4dc, 0x6882640e, 0x6873df38, 0x6865565c, 0x6856c979,
-  0x68483891, 0x6839a3a4,
-  0x682b0ab1, 0x681c6dbb, 0x680dccc1, 0x67ff27c4, 0x67f07ec5, 0x67e1d1c4,
-  0x67d320c1, 0x67c46bbe,
-  0x67b5b2bb, 0x67a6f5b8, 0x679834b6, 0x67896fb6, 0x677aa6b8, 0x676bd9bd,
-  0x675d08c4, 0x674e33d0,
-  0x673f5ae0, 0x67307df5, 0x67219d10, 0x6712b831, 0x6703cf58, 0x66f4e287,
-  0x66e5f1be, 0x66d6fcfd,
-  0x66c80445, 0x66b90797, 0x66aa06f3, 0x669b0259, 0x668bf9cb, 0x667ced49,
-  0x666ddcd3, 0x665ec86b,
-  0x664fb010, 0x664093c3, 0x66317385, 0x66224f56, 0x66132738, 0x6603fb2a,
-  0x65f4cb2d, 0x65e59742,
-  0x65d65f69, 0x65c723a3, 0x65b7e3f1, 0x65a8a052, 0x659958c9, 0x658a0d54,
-  0x657abdf6, 0x656b6aae,
-  0x655c137d, 0x654cb863, 0x653d5962, 0x652df679, 0x651e8faa, 0x650f24f5,
-  0x64ffb65b, 0x64f043dc,
-  0x64e0cd78, 0x64d15331, 0x64c1d507, 0x64b252fa, 0x64a2cd0c, 0x6493433c,
-  0x6483b58c, 0x647423fb,
-  0x64648e8c, 0x6454f53d, 0x64455810, 0x6435b706, 0x6426121e, 0x6416695a,
-  0x6406bcba, 0x63f70c3f,
-  0x63e757ea, 0x63d79fba, 0x63c7e3b1, 0x63b823cf, 0x63a86015, 0x63989884,
-  0x6388cd1b, 0x6378fddc,
-  0x63692ac7, 0x635953dd, 0x6349791f, 0x63399a8d, 0x6329b827, 0x6319d1ef,
-  0x6309e7e4, 0x62f9fa09,
-  0x62ea085c, 0x62da12df, 0x62ca1992, 0x62ba1c77, 0x62aa1b8d, 0x629a16d5,
-  0x628a0e50, 0x627a01fe,
-  0x6269f1e1, 0x6259ddf8, 0x6249c645, 0x6239aac7, 0x62298b81, 0x62196871,
-  0x62094199, 0x61f916f9,
-  0x61e8e893, 0x61d8b666, 0x61c88074, 0x61b846bc, 0x61a80940, 0x6197c800,
-  0x618782fd, 0x61773a37,
-  0x6166edb0, 0x61569d67, 0x6146495d, 0x6135f193, 0x6125960a, 0x611536c2,
-  0x6104d3bc, 0x60f46cf9,
-  0x60e40278, 0x60d3943b, 0x60c32243, 0x60b2ac8f, 0x60a23322, 0x6091b5fa,
-  0x60813519, 0x6070b080,
-  0x6060282f, 0x604f9c27, 0x603f0c69, 0x602e78f4, 0x601de1ca, 0x600d46ec,
-  0x5ffca859, 0x5fec0613,
-  0x5fdb601b, 0x5fcab670, 0x5fba0914, 0x5fa95807, 0x5f98a34a, 0x5f87eade,
-  0x5f772ec2, 0x5f666ef9,
-  0x5f55ab82, 0x5f44e45e, 0x5f34198e, 0x5f234b12, 0x5f1278eb, 0x5f01a31a,
-  0x5ef0c99f, 0x5edfec7b,
-  0x5ecf0baf, 0x5ebe273b, 0x5ead3f1f, 0x5e9c535e, 0x5e8b63f7, 0x5e7a70ea,
-  0x5e697a39, 0x5e587fe5,
-  0x5e4781ed, 0x5e368053, 0x5e257b17, 0x5e147239, 0x5e0365bb, 0x5df2559e,
-  0x5de141e1, 0x5dd02a85,
-  0x5dbf0f8c, 0x5dadf0f5, 0x5d9ccec2, 0x5d8ba8f3, 0x5d7a7f88, 0x5d695283,
-  0x5d5821e4, 0x5d46edac,
-  0x5d35b5db, 0x5d247a72, 0x5d133b72, 0x5d01f8dc, 0x5cf0b2af, 0x5cdf68ed,
-  0x5cce1b97, 0x5cbccaac,
-  0x5cab762f, 0x5c9a1e1e, 0x5c88c27c, 0x5c776348, 0x5c660084, 0x5c549a30,
-  0x5c43304d, 0x5c31c2db,
-  0x5c2051db, 0x5c0edd4e, 0x5bfd6534, 0x5bebe98e, 0x5bda6a5d, 0x5bc8e7a2,
-  0x5bb7615d, 0x5ba5d78e,
-  0x5b944a37, 0x5b82b958, 0x5b7124f2, 0x5b5f8d06, 0x5b4df193, 0x5b3c529c,
-  0x5b2ab020, 0x5b190a20,
-  0x5b07609d, 0x5af5b398, 0x5ae40311, 0x5ad24f09, 0x5ac09781, 0x5aaedc78,
-  0x5a9d1df1, 0x5a8b5bec,
-  0x5a799669, 0x5a67cd69, 0x5a5600ec, 0x5a4430f5, 0x5a325d82, 0x5a208695,
-  0x5a0eac2e, 0x59fcce4f,
-  0x59eaecf8, 0x59d90829, 0x59c71fe3, 0x59b53427, 0x59a344f6, 0x59915250,
-  0x597f5c36, 0x596d62a9,
-  0x595b65aa, 0x59496538, 0x59376155, 0x59255a02, 0x59134f3e, 0x5901410c,
-  0x58ef2f6b, 0x58dd1a5d,
-  0x58cb01e1, 0x58b8e5f9, 0x58a6c6a5, 0x5894a3e7, 0x58827dbe, 0x5870542c,
-  0x585e2730, 0x584bf6cd,
-  0x5839c302, 0x58278bd1, 0x58155139, 0x5803133c, 0x57f0d1da, 0x57de8d15,
-  0x57cc44ec, 0x57b9f960,
-  0x57a7aa73, 0x57955825, 0x57830276, 0x5770a968, 0x575e4cfa, 0x574bed2f,
-  0x57398a05, 0x5727237f,
-  0x5714b99d, 0x57024c5f, 0x56efdbc7, 0x56dd67d4, 0x56caf088, 0x56b875e4,
-  0x56a5f7e7, 0x56937694,
-  0x5680f1ea, 0x566e69ea, 0x565bde95, 0x56494fec, 0x5636bdef, 0x5624289f,
-  0x56118ffe, 0x55fef40a,
-  0x55ec54c6, 0x55d9b232, 0x55c70c4f, 0x55b4631d, 0x55a1b69d, 0x558f06d0,
-  0x557c53b6, 0x55699d51,
-  0x5556e3a1, 0x554426a7, 0x55316663, 0x551ea2d6, 0x550bdc01, 0x54f911e5,
-  0x54e64482, 0x54d373d9,
-  0x54c09feb, 0x54adc8b8, 0x549aee42, 0x54881089, 0x54752f8d, 0x54624b50,
-  0x544f63d2, 0x543c7914,
-  0x54298b17, 0x541699db, 0x5403a561, 0x53f0adaa, 0x53ddb2b6, 0x53cab486,
-  0x53b7b31c, 0x53a4ae77,
-  0x5391a699, 0x537e9b82, 0x536b8d33, 0x53587bad, 0x534566f0, 0x53324efd,
-  0x531f33d5, 0x530c1579,
-  0x52f8f3e9, 0x52e5cf27, 0x52d2a732, 0x52bf7c0b, 0x52ac4db4, 0x52991c2d,
-  0x5285e777, 0x5272af92,
-  0x525f7480, 0x524c3640, 0x5238f4d4, 0x5225b03d, 0x5212687b, 0x51ff1d8f,
-  0x51ebcf7a, 0x51d87e3c,
-  0x51c529d7, 0x51b1d24a, 0x519e7797, 0x518b19bf, 0x5177b8c2, 0x516454a0,
-  0x5150ed5c, 0x513d82f4,
-  0x512a156b, 0x5116a4c1, 0x510330f7, 0x50efba0d, 0x50dc4005, 0x50c8c2de,
-  0x50b5429a, 0x50a1bf39,
-  0x508e38bd, 0x507aaf25, 0x50672273, 0x505392a8, 0x503fffc4, 0x502c69c8,
-  0x5018d0b4, 0x5005348a,
-  0x4ff1954b, 0x4fddf2f6, 0x4fca4d8d, 0x4fb6a510, 0x4fa2f981, 0x4f8f4ae0,
-  0x4f7b992d, 0x4f67e46a,
-  0x4f542c98, 0x4f4071b6, 0x4f2cb3c7, 0x4f18f2c9, 0x4f052ec0, 0x4ef167aa,
-  0x4edd9d89, 0x4ec9d05e,
-  0x4eb60029, 0x4ea22ceb, 0x4e8e56a5, 0x4e7a7d58, 0x4e66a105, 0x4e52c1ab,
-  0x4e3edf4d, 0x4e2af9ea,
-  0x4e171184, 0x4e03261b, 0x4def37b0, 0x4ddb4644, 0x4dc751d8, 0x4db35a6c,
-  0x4d9f6001, 0x4d8b6298,
-  0x4d776231, 0x4d635ece, 0x4d4f5870, 0x4d3b4f16, 0x4d2742c2, 0x4d133374,
-  0x4cff212e, 0x4ceb0bf0,
-  0x4cd6f3bb, 0x4cc2d88f, 0x4caeba6e, 0x4c9a9958, 0x4c86754e, 0x4c724e50,
-  0x4c5e2460, 0x4c49f77f,
-  0x4c35c7ac, 0x4c2194e9, 0x4c0d5f37, 0x4bf92697, 0x4be4eb08, 0x4bd0ac8d,
-  0x4bbc6b25, 0x4ba826d1,
-  0x4b93df93, 0x4b7f956b, 0x4b6b485a, 0x4b56f861, 0x4b42a580, 0x4b2e4fb8,
-  0x4b19f70a, 0x4b059b77,
-  0x4af13d00, 0x4adcdba5, 0x4ac87767, 0x4ab41046, 0x4a9fa645, 0x4a8b3963,
-  0x4a76c9a2, 0x4a625701,
-  0x4a4de182, 0x4a396926, 0x4a24edee, 0x4a106fda, 0x49fbeeea, 0x49e76b21,
-  0x49d2e47e, 0x49be5b02,
-  0x49a9ceaf, 0x49953f84, 0x4980ad84, 0x496c18ae, 0x49578103, 0x4942e684,
-  0x492e4933, 0x4919a90f,
-  0x4905061a, 0x48f06054, 0x48dbb7be, 0x48c70c59, 0x48b25e25, 0x489dad25,
-  0x4888f957, 0x487442be,
-  0x485f8959, 0x484acd2a, 0x48360e32, 0x48214c71, 0x480c87e8, 0x47f7c099,
-  0x47e2f682, 0x47ce29a7,
-  0x47b95a06, 0x47a487a2, 0x478fb27b, 0x477ada91, 0x4765ffe6, 0x4751227a,
-  0x473c424e, 0x47275f63,
-  0x471279ba, 0x46fd9154, 0x46e8a631, 0x46d3b852, 0x46bec7b8, 0x46a9d464,
-  0x4694de56, 0x467fe590,
-  0x466aea12, 0x4655ebdd, 0x4640eaf2, 0x462be751, 0x4616e0fc, 0x4601d7f3,
-  0x45eccc37, 0x45d7bdc9,
-  0x45c2acaa, 0x45ad98da, 0x4598825a, 0x4583692c, 0x456e4d4f, 0x45592ec6,
-  0x45440d90, 0x452ee9ae,
-  0x4519c321, 0x450499eb, 0x44ef6e0b, 0x44da3f83, 0x44c50e53, 0x44afda7d,
-  0x449aa400, 0x44856adf,
-  0x44702f19, 0x445af0b0, 0x4445afa4, 0x44306bf6, 0x441b25a8, 0x4405dcb9,
-  0x43f0912b, 0x43db42fe,
-  0x43c5f234, 0x43b09ecc, 0x439b48c9, 0x4385f02a, 0x437094f1, 0x435b371f,
-  0x4345d6b3, 0x433073b0,
-  0x431b0e15, 0x4305a5e5, 0x42f03b1e, 0x42dacdc3, 0x42c55dd4, 0x42afeb53,
-  0x429a763f, 0x4284fe99,
-  0x426f8463, 0x425a079e, 0x42448849, 0x422f0667, 0x421981f7, 0x4203fafb,
-  0x41ee7174, 0x41d8e561,
-  0x41c356c5, 0x41adc5a0, 0x419831f3, 0x41829bbe, 0x416d0302, 0x415767c1,
-  0x4141c9fb, 0x412c29b1,
-  0x411686e4, 0x4100e194, 0x40eb39c3, 0x40d58f71, 0x40bfe29f, 0x40aa334e,
-  0x4094817f, 0x407ecd32,
-  0x40691669, 0x40535d24, 0x403da165, 0x4027e32b, 0x40122278, 0x3ffc5f4d,
-  0x3fe699aa, 0x3fd0d191,
-  0x3fbb0702, 0x3fa539fd, 0x3f8f6a85, 0x3f799899, 0x3f63c43b, 0x3f4ded6b,
-  0x3f38142a, 0x3f22387a,
-  0x3f0c5a5a, 0x3ef679cc, 0x3ee096d1, 0x3ecab169, 0x3eb4c995, 0x3e9edf57,
-  0x3e88f2ae, 0x3e73039d,
-  0x3e5d1222, 0x3e471e41, 0x3e3127f9, 0x3e1b2f4a, 0x3e053437, 0x3def36c0,
-  0x3dd936e6, 0x3dc334a9,
-  0x3dad300b, 0x3d97290b, 0x3d811fac, 0x3d6b13ee, 0x3d5505d2, 0x3d3ef559,
-  0x3d28e282, 0x3d12cd51,
-  0x3cfcb5c4, 0x3ce69bde, 0x3cd07f9f, 0x3cba6107, 0x3ca44018, 0x3c8e1cd3,
-  0x3c77f737, 0x3c61cf48,
-  0x3c4ba504, 0x3c35786d, 0x3c1f4983, 0x3c091849, 0x3bf2e4be, 0x3bdcaee3,
-  0x3bc676b9, 0x3bb03c42,
-  0x3b99ff7d, 0x3b83c06c, 0x3b6d7f10, 0x3b573b69, 0x3b40f579, 0x3b2aad3f,
-  0x3b1462be, 0x3afe15f6,
-  0x3ae7c6e7, 0x3ad17593, 0x3abb21fb, 0x3aa4cc1e, 0x3a8e7400, 0x3a78199f,
-  0x3a61bcfd, 0x3a4b5e1b,
-  0x3a34fcf9, 0x3a1e9999, 0x3a0833fc, 0x39f1cc21, 0x39db620b, 0x39c4f5ba,
-  0x39ae872f, 0x3998166a,
-  0x3981a36d, 0x396b2e38, 0x3954b6cd, 0x393e3d2c, 0x3927c155, 0x3911434b,
-  0x38fac30e, 0x38e4409e,
-  0x38cdbbfc, 0x38b7352a, 0x38a0ac29, 0x388a20f8, 0x38739399, 0x385d040d,
-  0x38467255, 0x382fde72,
-  0x38194864, 0x3802b02c, 0x37ec15cb, 0x37d57943, 0x37beda93, 0x37a839be,
-  0x379196c3, 0x377af1a3,
-  0x37644a60, 0x374da0fa, 0x3736f573, 0x372047ca, 0x37099802, 0x36f2e61a,
-  0x36dc3214, 0x36c57bf0,
-  0x36aec3b0, 0x36980954, 0x36814cde, 0x366a8e4d, 0x3653cda3, 0x363d0ae2,
-  0x36264609, 0x360f7f19,
-  0x35f8b614, 0x35e1eafa, 0x35cb1dcc, 0x35b44e8c, 0x359d7d39, 0x3586a9d5,
-  0x356fd461, 0x3558fcde,
-  0x3542234c, 0x352b47ad, 0x35146a00, 0x34fd8a48, 0x34e6a885, 0x34cfc4b7,
-  0x34b8dee1, 0x34a1f702,
-  0x348b0d1c, 0x3474212f, 0x345d333c, 0x34464345, 0x342f5149, 0x34185d4b,
-  0x3401674a, 0x33ea6f48,
-  0x33d37546, 0x33bc7944, 0x33a57b44, 0x338e7b46, 0x3377794b, 0x33607554,
-  0x33496f62, 0x33326776,
-  0x331b5d91, 0x330451b3, 0x32ed43de, 0x32d63412, 0x32bf2250, 0x32a80e99,
-  0x3290f8ef, 0x3279e151,
-  0x3262c7c1, 0x324bac40, 0x32348ecf, 0x321d6f6e, 0x32064e1e, 0x31ef2ae1,
-  0x31d805b7, 0x31c0dea1,
-  0x31a9b5a0, 0x31928ab4, 0x317b5de0, 0x31642f23, 0x314cfe7f, 0x3135cbf4,
-  0x311e9783, 0x3107612e,
-  0x30f028f4, 0x30d8eed8, 0x30c1b2da, 0x30aa74fa, 0x3093353a, 0x307bf39b,
-  0x3064b01d, 0x304d6ac1,
-  0x30362389, 0x301eda75, 0x30078f86, 0x2ff042bd, 0x2fd8f41b, 0x2fc1a3a0,
-  0x2faa514f, 0x2f92fd26,
-  0x2f7ba729, 0x2f644f56, 0x2f4cf5b0, 0x2f359a37, 0x2f1e3ced, 0x2f06ddd1,
-  0x2eef7ce5, 0x2ed81a29,
-  0x2ec0b5a0, 0x2ea94f49, 0x2e91e725, 0x2e7a7d36, 0x2e63117c, 0x2e4ba3f8,
-  0x2e3434ac, 0x2e1cc397,
-  0x2e0550bb, 0x2deddc19, 0x2dd665b2, 0x2dbeed86, 0x2da77397, 0x2d8ff7e5,
-  0x2d787a72, 0x2d60fb3e,
-  0x2d497a4a, 0x2d31f797, 0x2d1a7325, 0x2d02ecf7, 0x2ceb650d, 0x2cd3db67,
-  0x2cbc5006, 0x2ca4c2ed,
-  0x2c8d341a, 0x2c75a390, 0x2c5e114f, 0x2c467d58, 0x2c2ee7ad, 0x2c17504d,
-  0x2bffb73a, 0x2be81c74,
-  0x2bd07ffe, 0x2bb8e1d7, 0x2ba14200, 0x2b89a07b, 0x2b71fd48, 0x2b5a5868,
-  0x2b42b1dd, 0x2b2b09a6,
-  0x2b135fc6, 0x2afbb43c, 0x2ae4070a, 0x2acc5831, 0x2ab4a7b1, 0x2a9cf58c,
-  0x2a8541c3, 0x2a6d8c55,
-  0x2a55d545, 0x2a3e1c93, 0x2a266240, 0x2a0ea64d, 0x29f6e8bb, 0x29df298b,
-  0x29c768be, 0x29afa654,
-  0x2997e24f, 0x29801caf, 0x29685576, 0x29508ca4, 0x2938c23a, 0x2920f63a,
-  0x290928a3, 0x28f15978,
-  0x28d988b8, 0x28c1b666, 0x28a9e281, 0x28920d0a, 0x287a3604, 0x28625d6d,
-  0x284a8349, 0x2832a796,
-  0x281aca57, 0x2802eb8c, 0x27eb0b36, 0x27d32956, 0x27bb45ed, 0x27a360fc,
-  0x278b7a84, 0x27739285,
-  0x275ba901, 0x2743bdf9, 0x272bd16d, 0x2713e35f, 0x26fbf3ce, 0x26e402bd,
-  0x26cc102d, 0x26b41c1d,
-  0x269c268f, 0x26842f84, 0x266c36fe, 0x26543cfb, 0x263c417f, 0x26244489,
-  0x260c461b, 0x25f44635,
-  0x25dc44d9, 0x25c44207, 0x25ac3dc0, 0x25943806, 0x257c30d8, 0x25642839,
-  0x254c1e28, 0x253412a8,
-  0x251c05b8, 0x2503f75a, 0x24ebe78f, 0x24d3d657, 0x24bbc3b4, 0x24a3afa6,
-  0x248b9a2f, 0x2473834f,
-  0x245b6b07, 0x24435158, 0x242b3644, 0x241319ca, 0x23fafbec, 0x23e2dcac,
-  0x23cabc09, 0x23b29a05,
-  0x239a76a0, 0x238251dd, 0x236a2bba, 0x2352043b, 0x2339db5e, 0x2321b126,
-  0x23098593, 0x22f158a7,
-  0x22d92a61, 0x22c0fac4, 0x22a8c9cf, 0x22909785, 0x227863e5, 0x22602ef1,
-  0x2247f8aa, 0x222fc111,
-  0x22178826, 0x21ff4dea, 0x21e71260, 0x21ced586, 0x21b6975f, 0x219e57eb,
-  0x2186172b, 0x216dd521,
-  0x215591cc, 0x213d4d2f, 0x21250749, 0x210cc01d, 0x20f477aa, 0x20dc2df2,
-  0x20c3e2f5, 0x20ab96b5,
-  0x20934933, 0x207afa6f, 0x2062aa6b, 0x204a5927, 0x203206a4, 0x2019b2e4,
-  0x20015de7, 0x1fe907ae,
-  0x1fd0b03a, 0x1fb8578b, 0x1f9ffda4, 0x1f87a285, 0x1f6f462f, 0x1f56e8a2,
-  0x1f3e89e0, 0x1f2629ea,
-  0x1f0dc8c0, 0x1ef56664, 0x1edd02d6, 0x1ec49e17, 0x1eac3829, 0x1e93d10c,
-  0x1e7b68c2, 0x1e62ff4a,
-  0x1e4a94a7, 0x1e3228d9, 0x1e19bbe0, 0x1e014dbf, 0x1de8de75, 0x1dd06e04,
-  0x1db7fc6d, 0x1d9f89b1,
-  0x1d8715d0, 0x1d6ea0cc, 0x1d562aa6, 0x1d3db35e, 0x1d253af5, 0x1d0cc16c,
-  0x1cf446c5, 0x1cdbcb00,
-  0x1cc34e1f, 0x1caad021, 0x1c925109, 0x1c79d0d6, 0x1c614f8b, 0x1c48cd27,
-  0x1c3049ac, 0x1c17c51b,
-  0x1bff3f75, 0x1be6b8ba, 0x1bce30ec, 0x1bb5a80c, 0x1b9d1e1a, 0x1b849317,
-  0x1b6c0705, 0x1b5379e5,
-  0x1b3aebb6, 0x1b225c7b, 0x1b09cc34, 0x1af13ae3, 0x1ad8a887, 0x1ac01522,
-  0x1aa780b6, 0x1a8eeb42,
-  0x1a7654c8, 0x1a5dbd49, 0x1a4524c6, 0x1a2c8b3f, 0x1a13f0b6, 0x19fb552c,
-  0x19e2b8a2, 0x19ca1b17,
-  0x19b17c8f, 0x1998dd09, 0x19803c86, 0x19679b07, 0x194ef88e, 0x1936551b,
-  0x191db0af, 0x19050b4b,
-  0x18ec64f0, 0x18d3bda0, 0x18bb155a, 0x18a26c20, 0x1889c1f3, 0x187116d4,
-  0x18586ac3, 0x183fbdc3,
-  0x18270fd3, 0x180e60f4, 0x17f5b129, 0x17dd0070, 0x17c44ecd, 0x17ab9c3e,
-  0x1792e8c6, 0x177a3466,
-  0x17617f1d, 0x1748c8ee, 0x173011d9, 0x171759df, 0x16fea102, 0x16e5e741,
-  0x16cd2c9f, 0x16b4711b,
-  0x169bb4b7, 0x1682f774, 0x166a3953, 0x16517a55, 0x1638ba7a, 0x161ff9c4,
-  0x16073834, 0x15ee75cb,
-  0x15d5b288, 0x15bcee6f, 0x15a4297f, 0x158b63b9, 0x15729d1f, 0x1559d5b1,
-  0x15410d70, 0x1528445d,
-  0x150f7a7a, 0x14f6afc7, 0x14dde445, 0x14c517f4, 0x14ac4ad7, 0x14937cee,
-  0x147aae3a, 0x1461debc,
-  0x14490e74, 0x14303d65, 0x14176b8e, 0x13fe98f1, 0x13e5c58e, 0x13ccf167,
-  0x13b41c7d, 0x139b46d0,
-  0x13827062, 0x13699933, 0x1350c144, 0x1337e897, 0x131f0f2c, 0x13063505,
-  0x12ed5a21, 0x12d47e83,
-  0x12bba22b, 0x12a2c51b, 0x1289e752, 0x127108d2, 0x1258299c, 0x123f49b2,
-  0x12266913, 0x120d87c1,
-  0x11f4a5bd, 0x11dbc307, 0x11c2dfa2, 0x11a9fb8d, 0x119116c9, 0x11783159,
-  0x115f4b3c, 0x11466473,
-  0x112d7d00, 0x111494e4, 0x10fbac1e, 0x10e2c2b2, 0x10c9d89e, 0x10b0ede5,
-  0x10980287, 0x107f1686,
-  0x106629e1, 0x104d3c9b, 0x10344eb4, 0x101b602d, 0x10027107, 0xfe98143,
-  0xfd090e1, 0xfb79fe4,
-  0xf9eae4c, 0xf85bc19, 0xf6cc94e, 0xf53d5ea, 0xf3ae1ee, 0xf21ed5d, 0xf08f836,
-  0xef0027b,
-  0xed70c2c, 0xebe154b, 0xea51dd8, 0xe8c25d5, 0xe732d42, 0xe5a3421, 0xe413a72,
-  0xe284036,
-  0xe0f456f, 0xdf64a1c, 0xddd4e40, 0xdc451dc, 0xdab54ef, 0xd92577b, 0xd795982,
-  0xd605b03,
-  0xd475c00, 0xd2e5c7b, 0xd155c73, 0xcfc5bea, 0xce35ae1, 0xcca5959, 0xcb15752,
-  0xc9854cf,
-  0xc7f51cf, 0xc664e53, 0xc4d4a5d, 0xc3445ee, 0xc1b4107, 0xc023ba7, 0xbe935d2,
-  0xbd02f87,
-  0xbb728c7, 0xb9e2193, 0xb8519ed, 0xb6c11d5, 0xb53094d, 0xb3a0055, 0xb20f6ee,
-  0xb07ed19,
-  0xaeee2d7, 0xad5d829, 0xabccd11, 0xaa3c18e, 0xa8ab5a2, 0xa71a94f, 0xa589c94,
-  0xa3f8f73,
-  0xa2681ed, 0xa0d7403, 0x9f465b5, 0x9db5706, 0x9c247f5, 0x9a93884, 0x99028b3,
-  0x9771884,
-  0x95e07f8, 0x944f70f, 0x92be5ca, 0x912d42c, 0x8f9c233, 0x8e0afe2, 0x8c79d3a,
-  0x8ae8a3a,
-  0x89576e5, 0x87c633c, 0x8634f3e, 0x84a3aee, 0x831264c, 0x8181159, 0x7fefc16,
-  0x7e5e685,
-  0x7ccd0a5, 0x7b3ba78, 0x79aa400, 0x7818d3c, 0x768762e, 0x74f5ed7, 0x7364738,
-  0x71d2f52,
-  0x7041726, 0x6eafeb4, 0x6d1e5fe, 0x6b8cd05, 0x69fb3c9, 0x6869a4c, 0x66d808f,
-  0x6546692,
-  0x63b4c57, 0x62231de, 0x6091729, 0x5effc38, 0x5d6e10c, 0x5bdc5a7, 0x5a4aa09,
-  0x58b8e34,
-  0x5727228, 0x55955e6, 0x540396f, 0x5271cc4, 0x50dffe7, 0x4f4e2d8, 0x4dbc597,
-  0x4c2a827,
-  0x4a98a88, 0x4906cbb, 0x4774ec1, 0x45e309a, 0x4451249, 0x42bf3cd, 0x412d528,
-  0x3f9b65b,
-  0x3e09767, 0x3c7784d, 0x3ae590d, 0x39539a9, 0x37c1a22, 0x362fa78, 0x349daac,
-  0x330bac1,
-  0x3179ab5, 0x2fe7a8c, 0x2e55a44, 0x2cc39e1, 0x2b31961, 0x299f8c7, 0x280d813,
-  0x267b747,
-  0x24e9662, 0x2357567, 0x21c5457, 0x2033331, 0x1ea11f7, 0x1d0f0ab, 0x1b7cf4d,
-  0x19eaddd,
-  0x1858c5e, 0x16c6ad0, 0x1534934, 0x13a278a, 0x12105d5, 0x107e414, 0xeec249,
-  0xd5a075,
-  0xbc7e99, 0xa35cb5, 0x8a3acb, 0x7118dc, 0x57f6e9, 0x3ed4f2, 0x25b2f8,
-  0xc90fe,
-
-};
-
-static const q31_t cos_factorsQ31_8192[8192] = {
-  0x7ffffff6, 0x7fffffa7, 0x7fffff09, 0x7ffffe1c, 0x7ffffce1, 0x7ffffb56,
-    0x7ffff97c, 0x7ffff753,
-  0x7ffff4dc, 0x7ffff215, 0x7fffef00, 0x7fffeb9b, 0x7fffe7e8, 0x7fffe3e5,
-    0x7fffdf94, 0x7fffdaf3,
-  0x7fffd604, 0x7fffd0c6, 0x7fffcb39, 0x7fffc55c, 0x7fffbf31, 0x7fffb8b7,
-    0x7fffb1ee, 0x7fffaad6,
-  0x7fffa36f, 0x7fff9bb9, 0x7fff93b4, 0x7fff8b61, 0x7fff82be, 0x7fff79cc,
-    0x7fff708b, 0x7fff66fc,
-  0x7fff5d1d, 0x7fff52ef, 0x7fff4873, 0x7fff3da8, 0x7fff328d, 0x7fff2724,
-    0x7fff1b6b, 0x7fff0f64,
-  0x7fff030e, 0x7ffef669, 0x7ffee975, 0x7ffedc31, 0x7ffece9f, 0x7ffec0be,
-    0x7ffeb28e, 0x7ffea40f,
-  0x7ffe9542, 0x7ffe8625, 0x7ffe76b9, 0x7ffe66fe, 0x7ffe56f5, 0x7ffe469c,
-    0x7ffe35f4, 0x7ffe24fe,
-  0x7ffe13b8, 0x7ffe0224, 0x7ffdf040, 0x7ffdde0e, 0x7ffdcb8d, 0x7ffdb8bc,
-    0x7ffda59d, 0x7ffd922f,
-  0x7ffd7e72, 0x7ffd6a66, 0x7ffd560b, 0x7ffd4161, 0x7ffd2c68, 0x7ffd1720,
-    0x7ffd0189, 0x7ffceba4,
-  0x7ffcd56f, 0x7ffcbeeb, 0x7ffca819, 0x7ffc90f7, 0x7ffc7987, 0x7ffc61c7,
-    0x7ffc49b9, 0x7ffc315b,
-  0x7ffc18af, 0x7ffbffb4, 0x7ffbe66a, 0x7ffbccd0, 0x7ffbb2e8, 0x7ffb98b1,
-    0x7ffb7e2b, 0x7ffb6356,
-  0x7ffb4833, 0x7ffb2cc0, 0x7ffb10fe, 0x7ffaf4ed, 0x7ffad88e, 0x7ffabbdf,
-    0x7ffa9ee2, 0x7ffa8195,
-  0x7ffa63fa, 0x7ffa460f, 0x7ffa27d6, 0x7ffa094e, 0x7ff9ea76, 0x7ff9cb50,
-    0x7ff9abdb, 0x7ff98c17,
-  0x7ff96c04, 0x7ff94ba2, 0x7ff92af1, 0x7ff909f2, 0x7ff8e8a3, 0x7ff8c705,
-    0x7ff8a519, 0x7ff882dd,
-  0x7ff86053, 0x7ff83d79, 0x7ff81a51, 0x7ff7f6da, 0x7ff7d313, 0x7ff7aefe,
-    0x7ff78a9a, 0x7ff765e7,
-  0x7ff740e5, 0x7ff71b94, 0x7ff6f5f4, 0x7ff6d005, 0x7ff6a9c8, 0x7ff6833b,
-    0x7ff65c5f, 0x7ff63535,
-  0x7ff60dbb, 0x7ff5e5f3, 0x7ff5bddc, 0x7ff59576, 0x7ff56cc0, 0x7ff543bc,
-    0x7ff51a69, 0x7ff4f0c7,
-  0x7ff4c6d6, 0x7ff49c96, 0x7ff47208, 0x7ff4472a, 0x7ff41bfd, 0x7ff3f082,
-    0x7ff3c4b7, 0x7ff3989e,
-  0x7ff36c36, 0x7ff33f7e, 0x7ff31278, 0x7ff2e523, 0x7ff2b77f, 0x7ff2898c,
-    0x7ff25b4a, 0x7ff22cb9,
-  0x7ff1fdd9, 0x7ff1ceab, 0x7ff19f2d, 0x7ff16f61, 0x7ff13f45, 0x7ff10edb,
-    0x7ff0de22, 0x7ff0ad19,
-  0x7ff07bc2, 0x7ff04a1c, 0x7ff01827, 0x7fefe5e4, 0x7fefb351, 0x7fef806f,
-    0x7fef4d3e, 0x7fef19bf,
-  0x7feee5f0, 0x7feeb1d3, 0x7fee7d67, 0x7fee48ac, 0x7fee13a1, 0x7fedde48,
-    0x7feda8a0, 0x7fed72aa,
-  0x7fed3c64, 0x7fed05cf, 0x7fecceec, 0x7fec97b9, 0x7fec6038, 0x7fec2867,
-    0x7febf048, 0x7febb7da,
-  0x7feb7f1d, 0x7feb4611, 0x7feb0cb6, 0x7fead30c, 0x7fea9914, 0x7fea5ecc,
-    0x7fea2436, 0x7fe9e950,
-  0x7fe9ae1c, 0x7fe97299, 0x7fe936c7, 0x7fe8faa6, 0x7fe8be36, 0x7fe88177,
-    0x7fe84469, 0x7fe8070d,
-  0x7fe7c961, 0x7fe78b67, 0x7fe74d1e, 0x7fe70e85, 0x7fe6cf9e, 0x7fe69068,
-    0x7fe650e3, 0x7fe61110,
-  0x7fe5d0ed, 0x7fe5907b, 0x7fe54fbb, 0x7fe50eac, 0x7fe4cd4d, 0x7fe48ba0,
-    0x7fe449a4, 0x7fe40759,
-  0x7fe3c4bf, 0x7fe381d7, 0x7fe33e9f, 0x7fe2fb19, 0x7fe2b743, 0x7fe2731f,
-    0x7fe22eac, 0x7fe1e9ea,
-  0x7fe1a4d9, 0x7fe15f79, 0x7fe119cb, 0x7fe0d3cd, 0x7fe08d81, 0x7fe046e5,
-    0x7fdffffb, 0x7fdfb8c2,
-  0x7fdf713a, 0x7fdf2963, 0x7fdee13e, 0x7fde98c9, 0x7fde5006, 0x7fde06f3,
-    0x7fddbd92, 0x7fdd73e2,
-  0x7fdd29e3, 0x7fdcdf95, 0x7fdc94f9, 0x7fdc4a0d, 0x7fdbfed3, 0x7fdbb349,
-    0x7fdb6771, 0x7fdb1b4a,
-  0x7fdaced4, 0x7fda820f, 0x7fda34fc, 0x7fd9e799, 0x7fd999e8, 0x7fd94be8,
-    0x7fd8fd98, 0x7fd8aefa,
-  0x7fd8600e, 0x7fd810d2, 0x7fd7c147, 0x7fd7716e, 0x7fd72146, 0x7fd6d0cf,
-    0x7fd68009, 0x7fd62ef4,
-  0x7fd5dd90, 0x7fd58bdd, 0x7fd539dc, 0x7fd4e78c, 0x7fd494ed, 0x7fd441ff,
-    0x7fd3eec2, 0x7fd39b36,
-  0x7fd3475c, 0x7fd2f332, 0x7fd29eba, 0x7fd249f3, 0x7fd1f4dd, 0x7fd19f78,
-    0x7fd149c5, 0x7fd0f3c2,
-  0x7fd09d71, 0x7fd046d1, 0x7fcfefe2, 0x7fcf98a4, 0x7fcf4117, 0x7fcee93c,
-    0x7fce9112, 0x7fce3898,
-  0x7fcddfd0, 0x7fcd86b9, 0x7fcd2d54, 0x7fccd39f, 0x7fcc799c, 0x7fcc1f4a,
-    0x7fcbc4a9, 0x7fcb69b9,
-  0x7fcb0e7a, 0x7fcab2ed, 0x7fca5710, 0x7fc9fae5, 0x7fc99e6b, 0x7fc941a2,
-    0x7fc8e48b, 0x7fc88724,
-  0x7fc8296f, 0x7fc7cb6b, 0x7fc76d18, 0x7fc70e76, 0x7fc6af86, 0x7fc65046,
-    0x7fc5f0b8, 0x7fc590db,
-  0x7fc530af, 0x7fc4d035, 0x7fc46f6b, 0x7fc40e53, 0x7fc3acec, 0x7fc34b36,
-    0x7fc2e931, 0x7fc286de,
-  0x7fc2243b, 0x7fc1c14a, 0x7fc15e0a, 0x7fc0fa7b, 0x7fc0969e, 0x7fc03271,
-    0x7fbfcdf6, 0x7fbf692c,
-  0x7fbf0414, 0x7fbe9eac, 0x7fbe38f6, 0x7fbdd2f0, 0x7fbd6c9c, 0x7fbd05fa,
-    0x7fbc9f08, 0x7fbc37c8,
-  0x7fbbd039, 0x7fbb685b, 0x7fbb002e, 0x7fba97b2, 0x7fba2ee8, 0x7fb9c5cf,
-    0x7fb95c67, 0x7fb8f2b0,
-  0x7fb888ab, 0x7fb81e57, 0x7fb7b3b4, 0x7fb748c2, 0x7fb6dd81, 0x7fb671f2,
-    0x7fb60614, 0x7fb599e7,
-  0x7fb52d6b, 0x7fb4c0a1, 0x7fb45387, 0x7fb3e61f, 0x7fb37869, 0x7fb30a63,
-    0x7fb29c0f, 0x7fb22d6c,
-  0x7fb1be7a, 0x7fb14f39, 0x7fb0dfaa, 0x7fb06fcb, 0x7fafff9e, 0x7faf8f23,
-    0x7faf1e58, 0x7faead3f,
-  0x7fae3bd7, 0x7fadca20, 0x7fad581b, 0x7face5c6, 0x7fac7323, 0x7fac0031,
-    0x7fab8cf1, 0x7fab1962,
-  0x7faaa584, 0x7faa3157, 0x7fa9bcdb, 0x7fa94811, 0x7fa8d2f8, 0x7fa85d90,
-    0x7fa7e7d9, 0x7fa771d4,
-  0x7fa6fb80, 0x7fa684dd, 0x7fa60dec, 0x7fa596ac, 0x7fa51f1d, 0x7fa4a73f,
-    0x7fa42f12, 0x7fa3b697,
-  0x7fa33dcd, 0x7fa2c4b5, 0x7fa24b4d, 0x7fa1d197, 0x7fa15792, 0x7fa0dd3f,
-    0x7fa0629c, 0x7f9fe7ab,
-  0x7f9f6c6b, 0x7f9ef0dd, 0x7f9e7500, 0x7f9df8d4, 0x7f9d7c59, 0x7f9cff90,
-    0x7f9c8278, 0x7f9c0511,
-  0x7f9b875b, 0x7f9b0957, 0x7f9a8b04, 0x7f9a0c62, 0x7f998d72, 0x7f990e33,
-    0x7f988ea5, 0x7f980ec8,
-  0x7f978e9d, 0x7f970e23, 0x7f968d5b, 0x7f960c43, 0x7f958add, 0x7f950929,
-    0x7f948725, 0x7f9404d3,
-  0x7f938232, 0x7f92ff43, 0x7f927c04, 0x7f91f878, 0x7f91749c, 0x7f90f072,
-    0x7f906bf9, 0x7f8fe731,
-  0x7f8f621b, 0x7f8edcb6, 0x7f8e5702, 0x7f8dd0ff, 0x7f8d4aae, 0x7f8cc40f,
-    0x7f8c3d20, 0x7f8bb5e3,
-  0x7f8b2e57, 0x7f8aa67d, 0x7f8a1e54, 0x7f8995dc, 0x7f890d15, 0x7f888400,
-    0x7f87fa9c, 0x7f8770ea,
-  0x7f86e6e9, 0x7f865c99, 0x7f85d1fa, 0x7f85470d, 0x7f84bbd1, 0x7f843047,
-    0x7f83a46e, 0x7f831846,
-  0x7f828bcf, 0x7f81ff0a, 0x7f8171f6, 0x7f80e494, 0x7f8056e3, 0x7f7fc8e3,
-    0x7f7f3a95, 0x7f7eabf8,
-  0x7f7e1d0c, 0x7f7d8dd2, 0x7f7cfe49, 0x7f7c6e71, 0x7f7bde4b, 0x7f7b4dd6,
-    0x7f7abd13, 0x7f7a2c01,
-  0x7f799aa0, 0x7f7908f0, 0x7f7876f2, 0x7f77e4a6, 0x7f77520a, 0x7f76bf21,
-    0x7f762be8, 0x7f759861,
-  0x7f75048b, 0x7f747067, 0x7f73dbf4, 0x7f734732, 0x7f72b222, 0x7f721cc3,
-    0x7f718715, 0x7f70f119,
-  0x7f705ace, 0x7f6fc435, 0x7f6f2d4d, 0x7f6e9617, 0x7f6dfe91, 0x7f6d66be,
-    0x7f6cce9b, 0x7f6c362a,
-  0x7f6b9d6b, 0x7f6b045d, 0x7f6a6b00, 0x7f69d154, 0x7f69375a, 0x7f689d12,
-    0x7f68027b, 0x7f676795,
-  0x7f66cc61, 0x7f6630de, 0x7f65950c, 0x7f64f8ec, 0x7f645c7d, 0x7f63bfc0,
-    0x7f6322b4, 0x7f62855a,
-  0x7f61e7b1, 0x7f6149b9, 0x7f60ab73, 0x7f600cdf, 0x7f5f6dfb, 0x7f5ecec9,
-    0x7f5e2f49, 0x7f5d8f7a,
-  0x7f5cef5c, 0x7f5c4ef0, 0x7f5bae36, 0x7f5b0d2c, 0x7f5a6bd5, 0x7f59ca2e,
-    0x7f592839, 0x7f5885f6,
-  0x7f57e364, 0x7f574083, 0x7f569d54, 0x7f55f9d6, 0x7f55560a, 0x7f54b1ef,
-    0x7f540d86, 0x7f5368ce,
-  0x7f52c3c8, 0x7f521e73, 0x7f5178cf, 0x7f50d2dd, 0x7f502c9d, 0x7f4f860e,
-    0x7f4edf30, 0x7f4e3804,
-  0x7f4d9089, 0x7f4ce8c0, 0x7f4c40a8, 0x7f4b9842, 0x7f4aef8d, 0x7f4a468a,
-    0x7f499d38, 0x7f48f398,
-  0x7f4849a9, 0x7f479f6c, 0x7f46f4e0, 0x7f464a06, 0x7f459edd, 0x7f44f365,
-    0x7f44479f, 0x7f439b8b,
-  0x7f42ef28, 0x7f424277, 0x7f419577, 0x7f40e828, 0x7f403a8b, 0x7f3f8ca0,
-    0x7f3ede66, 0x7f3e2fde,
-  0x7f3d8107, 0x7f3cd1e2, 0x7f3c226e, 0x7f3b72ab, 0x7f3ac29b, 0x7f3a123b,
-    0x7f39618e, 0x7f38b091,
-  0x7f37ff47, 0x7f374dad, 0x7f369bc6, 0x7f35e990, 0x7f35370b, 0x7f348438,
-    0x7f33d116, 0x7f331da6,
-  0x7f3269e8, 0x7f31b5db, 0x7f31017f, 0x7f304cd6, 0x7f2f97dd, 0x7f2ee296,
-    0x7f2e2d01, 0x7f2d771e,
-  0x7f2cc0eb, 0x7f2c0a6b, 0x7f2b539c, 0x7f2a9c7e, 0x7f29e512, 0x7f292d58,
-    0x7f28754f, 0x7f27bcf8,
-  0x7f270452, 0x7f264b5e, 0x7f25921c, 0x7f24d88b, 0x7f241eab, 0x7f23647e,
-    0x7f22aa01, 0x7f21ef37,
-  0x7f21341e, 0x7f2078b6, 0x7f1fbd00, 0x7f1f00fc, 0x7f1e44a9, 0x7f1d8808,
-    0x7f1ccb18, 0x7f1c0dda,
-  0x7f1b504e, 0x7f1a9273, 0x7f19d44a, 0x7f1915d2, 0x7f18570c, 0x7f1797f8,
-    0x7f16d895, 0x7f1618e4,
-  0x7f1558e4, 0x7f149896, 0x7f13d7fa, 0x7f13170f, 0x7f1255d6, 0x7f11944f,
-    0x7f10d279, 0x7f101054,
-  0x7f0f4de2, 0x7f0e8b21, 0x7f0dc811, 0x7f0d04b3, 0x7f0c4107, 0x7f0b7d0d,
-    0x7f0ab8c4, 0x7f09f42d,
-  0x7f092f47, 0x7f086a13, 0x7f07a491, 0x7f06dec0, 0x7f0618a1, 0x7f055233,
-    0x7f048b78, 0x7f03c46d,
-  0x7f02fd15, 0x7f02356e, 0x7f016d79, 0x7f00a535, 0x7effdca4, 0x7eff13c3,
-    0x7efe4a95, 0x7efd8118,
-  0x7efcb74d, 0x7efbed33, 0x7efb22cb, 0x7efa5815, 0x7ef98d11, 0x7ef8c1be,
-    0x7ef7f61d, 0x7ef72a2d,
-  0x7ef65def, 0x7ef59163, 0x7ef4c489, 0x7ef3f760, 0x7ef329e9, 0x7ef25c24,
-    0x7ef18e10, 0x7ef0bfae,
-  0x7eeff0fe, 0x7eef21ff, 0x7eee52b2, 0x7eed8317, 0x7eecb32d, 0x7eebe2f6,
-    0x7eeb1270, 0x7eea419b,
-  0x7ee97079, 0x7ee89f08, 0x7ee7cd49, 0x7ee6fb3b, 0x7ee628df, 0x7ee55635,
-    0x7ee4833d, 0x7ee3aff6,
-  0x7ee2dc61, 0x7ee2087e, 0x7ee1344d, 0x7ee05fcd, 0x7edf8aff, 0x7edeb5e3,
-    0x7edde079, 0x7edd0ac0,
-  0x7edc34b9, 0x7edb5e64, 0x7eda87c0, 0x7ed9b0ce, 0x7ed8d98e, 0x7ed80200,
-    0x7ed72a24, 0x7ed651f9,
-  0x7ed57980, 0x7ed4a0b9, 0x7ed3c7a3, 0x7ed2ee40, 0x7ed2148e, 0x7ed13a8e,
-    0x7ed0603f, 0x7ecf85a3,
-  0x7eceaab8, 0x7ecdcf7f, 0x7eccf3f8, 0x7ecc1822, 0x7ecb3bff, 0x7eca5f8d,
-    0x7ec982cd, 0x7ec8a5bf,
-  0x7ec7c862, 0x7ec6eab7, 0x7ec60cbe, 0x7ec52e77, 0x7ec44fe2, 0x7ec370fe,
-    0x7ec291cd, 0x7ec1b24d,
-  0x7ec0d27f, 0x7ebff263, 0x7ebf11f8, 0x7ebe313f, 0x7ebd5039, 0x7ebc6ee4,
-    0x7ebb8d40, 0x7ebaab4f,
-  0x7eb9c910, 0x7eb8e682, 0x7eb803a6, 0x7eb7207c, 0x7eb63d04, 0x7eb5593d,
-    0x7eb47529, 0x7eb390c6,
-  0x7eb2ac15, 0x7eb1c716, 0x7eb0e1c9, 0x7eaffc2e, 0x7eaf1645, 0x7eae300d,
-    0x7ead4987, 0x7eac62b3,
-  0x7eab7b91, 0x7eaa9421, 0x7ea9ac63, 0x7ea8c457, 0x7ea7dbfc, 0x7ea6f353,
-    0x7ea60a5d, 0x7ea52118,
-  0x7ea43785, 0x7ea34da4, 0x7ea26374, 0x7ea178f7, 0x7ea08e2b, 0x7e9fa312,
-    0x7e9eb7aa, 0x7e9dcbf4,
-  0x7e9cdff0, 0x7e9bf39e, 0x7e9b06fe, 0x7e9a1a10, 0x7e992cd4, 0x7e983f49,
-    0x7e975171, 0x7e96634a,
-  0x7e9574d6, 0x7e948613, 0x7e939702, 0x7e92a7a3, 0x7e91b7f6, 0x7e90c7fb,
-    0x7e8fd7b2, 0x7e8ee71b,
-  0x7e8df636, 0x7e8d0502, 0x7e8c1381, 0x7e8b21b1, 0x7e8a2f94, 0x7e893d28,
-    0x7e884a6f, 0x7e875767,
-  0x7e866411, 0x7e85706d, 0x7e847c7c, 0x7e83883c, 0x7e8293ae, 0x7e819ed2,
-    0x7e80a9a8, 0x7e7fb430,
-  0x7e7ebe6a, 0x7e7dc856, 0x7e7cd1f4, 0x7e7bdb44, 0x7e7ae446, 0x7e79ecf9,
-    0x7e78f55f, 0x7e77fd77,
-  0x7e770541, 0x7e760cbd, 0x7e7513ea, 0x7e741aca, 0x7e73215c, 0x7e7227a0,
-    0x7e712d96, 0x7e70333d,
-  0x7e6f3897, 0x7e6e3da3, 0x7e6d4261, 0x7e6c46d1, 0x7e6b4af2, 0x7e6a4ec6,
-    0x7e69524c, 0x7e685584,
-  0x7e67586e, 0x7e665b0a, 0x7e655d58, 0x7e645f58, 0x7e63610a, 0x7e62626e,
-    0x7e616384, 0x7e60644c,
-  0x7e5f64c7, 0x7e5e64f3, 0x7e5d64d1, 0x7e5c6461, 0x7e5b63a4, 0x7e5a6298,
-    0x7e59613f, 0x7e585f97,
-  0x7e575da2, 0x7e565b5f, 0x7e5558ce, 0x7e5455ef, 0x7e5352c1, 0x7e524f46,
-    0x7e514b7e, 0x7e504767,
-  0x7e4f4302, 0x7e4e3e4f, 0x7e4d394f, 0x7e4c3400, 0x7e4b2e64, 0x7e4a287a,
-    0x7e492241, 0x7e481bbb,
-  0x7e4714e7, 0x7e460dc5, 0x7e450656, 0x7e43fe98, 0x7e42f68c, 0x7e41ee33,
-    0x7e40e58c, 0x7e3fdc97,
-  0x7e3ed353, 0x7e3dc9c3, 0x7e3cbfe4, 0x7e3bb5b7, 0x7e3aab3c, 0x7e39a074,
-    0x7e38955e, 0x7e3789fa,
-  0x7e367e48, 0x7e357248, 0x7e3465fa, 0x7e33595e, 0x7e324c75, 0x7e313f3e,
-    0x7e3031b9, 0x7e2f23e6,
-  0x7e2e15c5, 0x7e2d0756, 0x7e2bf89a, 0x7e2ae990, 0x7e29da38, 0x7e28ca92,
-    0x7e27ba9e, 0x7e26aa5d,
-  0x7e2599cd, 0x7e2488f0, 0x7e2377c5, 0x7e22664c, 0x7e215486, 0x7e204271,
-    0x7e1f300f, 0x7e1e1d5f,
-  0x7e1d0a61, 0x7e1bf716, 0x7e1ae37c, 0x7e19cf95, 0x7e18bb60, 0x7e17a6dd,
-    0x7e16920d, 0x7e157cee,
-  0x7e146782, 0x7e1351c9, 0x7e123bc1, 0x7e11256c, 0x7e100ec8, 0x7e0ef7d7,
-    0x7e0de099, 0x7e0cc90c,
-  0x7e0bb132, 0x7e0a990a, 0x7e098095, 0x7e0867d1, 0x7e074ec0, 0x7e063561,
-    0x7e051bb4, 0x7e0401ba,
-  0x7e02e772, 0x7e01ccdc, 0x7e00b1f9, 0x7dff96c7, 0x7dfe7b48, 0x7dfd5f7b,
-    0x7dfc4361, 0x7dfb26f9,
-  0x7dfa0a43, 0x7df8ed3f, 0x7df7cfee, 0x7df6b24f, 0x7df59462, 0x7df47628,
-    0x7df357a0, 0x7df238ca,
-  0x7df119a7, 0x7deffa35, 0x7deeda77, 0x7dedba6a, 0x7dec9a10, 0x7deb7968,
-    0x7dea5872, 0x7de9372f,
-  0x7de8159e, 0x7de6f3c0, 0x7de5d193, 0x7de4af1a, 0x7de38c52, 0x7de2693d,
-    0x7de145da, 0x7de02229,
-  0x7ddefe2b, 0x7dddd9e0, 0x7ddcb546, 0x7ddb905f, 0x7dda6b2a, 0x7dd945a8,
-    0x7dd81fd8, 0x7dd6f9ba,
-  0x7dd5d34f, 0x7dd4ac96, 0x7dd38590, 0x7dd25e3c, 0x7dd1369a, 0x7dd00eab,
-    0x7dcee66e, 0x7dcdbde3,
-  0x7dcc950b, 0x7dcb6be6, 0x7dca4272, 0x7dc918b1, 0x7dc7eea3, 0x7dc6c447,
-    0x7dc5999d, 0x7dc46ea6,
-  0x7dc34361, 0x7dc217cf, 0x7dc0ebef, 0x7dbfbfc1, 0x7dbe9346, 0x7dbd667d,
-    0x7dbc3967, 0x7dbb0c03,
-  0x7db9de52, 0x7db8b053, 0x7db78207, 0x7db6536d, 0x7db52485, 0x7db3f550,
-    0x7db2c5cd, 0x7db195fd,
-  0x7db065df, 0x7daf3574, 0x7dae04bb, 0x7dacd3b5, 0x7daba261, 0x7daa70c0,
-    0x7da93ed1, 0x7da80c95,
-  0x7da6da0b, 0x7da5a733, 0x7da4740e, 0x7da3409c, 0x7da20cdc, 0x7da0d8cf,
-    0x7d9fa474, 0x7d9e6fcb,
-  0x7d9d3ad6, 0x7d9c0592, 0x7d9ad001, 0x7d999a23, 0x7d9863f7, 0x7d972d7e,
-    0x7d95f6b7, 0x7d94bfa3,
-  0x7d938841, 0x7d925092, 0x7d911896, 0x7d8fe04c, 0x7d8ea7b4, 0x7d8d6ecf,
-    0x7d8c359d, 0x7d8afc1d,
-  0x7d89c250, 0x7d888835, 0x7d874dcd, 0x7d861317, 0x7d84d814, 0x7d839cc4,
-    0x7d826126, 0x7d81253a,
-  0x7d7fe902, 0x7d7eac7c, 0x7d7d6fa8, 0x7d7c3287, 0x7d7af519, 0x7d79b75d,
-    0x7d787954, 0x7d773afd,
-  0x7d75fc59, 0x7d74bd68, 0x7d737e29, 0x7d723e9d, 0x7d70fec4, 0x7d6fbe9d,
-    0x7d6e7e29, 0x7d6d3d67,
-  0x7d6bfc58, 0x7d6abafc, 0x7d697952, 0x7d68375b, 0x7d66f517, 0x7d65b285,
-    0x7d646fa6, 0x7d632c79,
-  0x7d61e8ff, 0x7d60a538, 0x7d5f6124, 0x7d5e1cc2, 0x7d5cd813, 0x7d5b9316,
-    0x7d5a4dcc, 0x7d590835,
-  0x7d57c251, 0x7d567c1f, 0x7d5535a0, 0x7d53eed3, 0x7d52a7ba, 0x7d516053,
-    0x7d50189e, 0x7d4ed09d,
-  0x7d4d884e, 0x7d4c3fb1, 0x7d4af6c8, 0x7d49ad91, 0x7d48640d, 0x7d471a3c,
-    0x7d45d01d, 0x7d4485b1,
-  0x7d433af8, 0x7d41eff1, 0x7d40a49e, 0x7d3f58fd, 0x7d3e0d0e, 0x7d3cc0d3,
-    0x7d3b744a, 0x7d3a2774,
-  0x7d38da51, 0x7d378ce0, 0x7d363f23, 0x7d34f118, 0x7d33a2bf, 0x7d32541a,
-    0x7d310527, 0x7d2fb5e7,
-  0x7d2e665a, 0x7d2d1680, 0x7d2bc659, 0x7d2a75e4, 0x7d292522, 0x7d27d413,
-    0x7d2682b6, 0x7d25310d,
-  0x7d23df16, 0x7d228cd2, 0x7d213a41, 0x7d1fe762, 0x7d1e9437, 0x7d1d40be,
-    0x7d1becf8, 0x7d1a98e5,
-  0x7d194485, 0x7d17efd8, 0x7d169add, 0x7d154595, 0x7d13f001, 0x7d129a1f,
-    0x7d1143ef, 0x7d0fed73,
-  0x7d0e96aa, 0x7d0d3f93, 0x7d0be82f, 0x7d0a907e, 0x7d093880, 0x7d07e035,
-    0x7d06879d, 0x7d052eb8,
-  0x7d03d585, 0x7d027c05, 0x7d012239, 0x7cffc81f, 0x7cfe6db8, 0x7cfd1304,
-    0x7cfbb803, 0x7cfa5cb4,
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-    0x7c2c45d8, 0x7c2abf4f,
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-  0x7c043ac7, 0x7c02ac78, 0x7c011ddd, 0x7bff8ef5, 0x7bfdffc1, 0x7bfc7041,
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-    0x7bee5749, 0x7becc4cc,
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-  0x7bde90f4, 0x7bdcfb7b, 0x7bdb65b5, 0x7bd9cfa2, 0x7bd83944, 0x7bd6a298,
-    0x7bd50ba1, 0x7bd3745d,
-  0x7bd1dccc, 0x7bd044f0, 0x7bceacc7, 0x7bcd1451, 0x7bcb7b8f, 0x7bc9e281,
-    0x7bc84927, 0x7bc6af80,
-  0x7bc5158c, 0x7bc37b4d, 0x7bc1e0c1, 0x7bc045e9, 0x7bbeaac4, 0x7bbd0f53,
-    0x7bbb7396, 0x7bb9d78c,
-  0x7bb83b36, 0x7bb69e94, 0x7bb501a5, 0x7bb3646a, 0x7bb1c6e3, 0x7bb02910,
-    0x7bae8af0, 0x7bacec84,
-  0x7bab4dcc, 0x7ba9aec7, 0x7ba80f76, 0x7ba66fd9, 0x7ba4cfef, 0x7ba32fba,
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-  0x7b9e4d4f, 0x7b9cabe8, 0x7b9b0a35, 0x7b996836, 0x7b97c5ea, 0x7b962352,
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-  0x7b9139c2, 0x7b8f95f9, 0x7b8df1e4, 0x7b8c4d83, 0x7b8aa8d6, 0x7b8903dc,
-    0x7b875e96, 0x7b85b904,
-  0x7b841326, 0x7b826cfc, 0x7b80c686, 0x7b7f1fc3, 0x7b7d78b4, 0x7b7bd159,
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-  0x7b76d97f, 0x7b7530f3, 0x7b73881b, 0x7b71def7, 0x7b703587, 0x7b6e8bcb,
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-  0x7b698ccd, 0x7b67e1e0, 0x7b6636a7, 0x7b648b22, 0x7b62df51, 0x7b613334,
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-  0x7b5c2d13, 0x7b5a7fc6, 0x7b58d22c, 0x7b572446, 0x7b557614, 0x7b53c796,
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-  0x7b4eba53, 0x7b4d0aa5, 0x7b4b5aab, 0x7b49aa64, 0x7b47f9d2, 0x7b4648f3,
-    0x7b4497c9, 0x7b42e652,
-  0x7b413490, 0x7b3f8281, 0x7b3dd026, 0x7b3c1d80, 0x7b3a6a8d, 0x7b38b74e,
-    0x7b3703c3, 0x7b354fed,
-  0x7b339bca, 0x7b31e75b, 0x7b3032a0, 0x7b2e7d9a, 0x7b2cc847, 0x7b2b12a8,
-    0x7b295cbe, 0x7b27a687,
-  0x7b25f004, 0x7b243936, 0x7b22821b, 0x7b20cab5, 0x7b1f1302, 0x7b1d5b04,
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-  0x7b183141, 0x7b167813, 0x7b14be99, 0x7b1304d3, 0x7b114ac1, 0x7b0f9063,
-    0x7b0dd5b9, 0x7b0c1ac4,
-  0x7b0a5f82, 0x7b08a3f5, 0x7b06e81b, 0x7b052bf6, 0x7b036f85, 0x7b01b2c8,
-    0x7afff5bf, 0x7afe386a,
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-    0x7af202cd, 0x7af0431a,
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-    0x7ae3fce6, 0x7ae23ad4,
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-  0x7ad25ade, 0x7ad095d6, 0x7aced082, 0x7acd0ae3, 0x7acb44f8, 0x7ac97ec1,
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-  0x7ac42a55, 0x7ac262ef, 0x7ac09b3e, 0x7abed341, 0x7abd0af7, 0x7abb4263,
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-  0x7a99272d, 0x7a9758af, 0x7a9589e5, 0x7a93bad0, 0x7a91eb6f, 0x7a901bc2,
-    0x7a8e4bca, 0x7a8c7b87,
-  0x7a8aaaf7, 0x7a88da1c, 0x7a8708f6, 0x7a853784, 0x7a8365c6, 0x7a8193bd,
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-  0x7a7c1bdc, 0x7a7a48a4, 0x7a787521, 0x7a76a153, 0x7a74cd38, 0x7a72f8d3,
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-  0x7a6d79dd, 0x7a6ba449, 0x7a69ce6a, 0x7a67f83f, 0x7a6621c9, 0x7a644b07,
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-  0x7a5ec4fc, 0x7a5ced0d, 0x7a5b14d1, 0x7a593c4b, 0x7a576379, 0x7a558a5b,
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-  0x7a4ffd3d, 0x7a4e22f2, 0x7a4c485b, 0x7a4a6d78, 0x7a48924b, 0x7a46b6d1,
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-  0x796976ac, 0x79677924, 0x79657b51, 0x79637d33, 0x79617eca, 0x795f8017,
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-  0x7959823b, 0x7957825c, 0x79558232, 0x795381bd, 0x795180fe, 0x794f7ff3,
-    0x794d7e9e, 0x794b7cfe,
-  0x79497b13, 0x794778dd, 0x7945765d, 0x79437391, 0x7941707b, 0x793f6d1a,
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-  0x79396137, 0x79375cab, 0x793557d4, 0x793352b2, 0x79314d46, 0x792f478f,
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-  0x792934a9, 0x79272dc7, 0x7925269a, 0x79231f22, 0x79211760, 0x791f0f53,
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-  0x7918f56c, 0x7916ec34, 0x7914e2b2, 0x7912d8e4, 0x7910cecc, 0x790ec46a,
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-  0x78945c0d, 0x78924033, 0x7890240e, 0x788e07a0, 0x788beae6, 0x7889cde2,
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-    0x7876bbb0, 0x78749bc5,
-  0x78727b8f, 0x78705b10, 0x786e3a46, 0x786c1932, 0x7869f7d3, 0x7867d62a,
-    0x7865b437, 0x786391fa,
-  0x78616f72, 0x785f4ca1, 0x785d2984, 0x785b061e, 0x7858e26e, 0x7856be73,
-    0x78549a2e, 0x7852759e,
-  0x785050c5, 0x784e2ba1, 0x784c0633, 0x7849e07b, 0x7847ba79, 0x7845942c,
-    0x78436d96, 0x784146b5,
-  0x783f1f8a, 0x783cf815, 0x783ad055, 0x7838a84c, 0x78367ff8, 0x7834575a,
-    0x78322e72, 0x78300540,
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-    0x7820dcc5, 0x781eb142,
-  0x781c8575, 0x781a595d, 0x78182cfc, 0x78160051, 0x7813d35b, 0x7811a61b,
-    0x780f7892, 0x780d4abe,
-  0x780b1ca0, 0x7808ee38, 0x7806bf86, 0x7804908a, 0x78026145, 0x780031b5,
-    0x77fe01db, 0x77fbd1b6,
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-    0x77ec78a2, 0x77ea462e,
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-    0x77dadcec, 0x77d8a828,
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-    0x77c92eb9, 0x77c6f7a6,
-  0x77c4c04a, 0x77c288a3, 0x77c050b2, 0x77be1878, 0x77bbdff4, 0x77b9a726,
-    0x77b76e0e, 0x77b534ac,
-  0x77b2fb00, 0x77b0c10b, 0x77ae86cc, 0x77ac4c43, 0x77aa1170, 0x77a7d653,
-    0x77a59aec, 0x77a35f3c,
-  0x77a12342, 0x779ee6fe, 0x779caa70, 0x779a6d99, 0x77983077, 0x7795f30c,
-    0x7793b557, 0x77917759,
-  0x778f3910, 0x778cfa7e, 0x778abba2, 0x77887c7d, 0x77863d0d, 0x7783fd54,
-    0x7781bd52, 0x777f7d05,
-  0x777d3c6f, 0x777afb8f, 0x7778ba65, 0x777678f2, 0x77743735, 0x7771f52e,
-    0x776fb2de, 0x776d7044,
-  0x776b2d60, 0x7768ea33, 0x7766a6bc, 0x776462fb, 0x77621ef1, 0x775fda9d,
-    0x775d95ff, 0x775b5118,
-  0x77590be7, 0x7756c66c, 0x775480a8, 0x77523a9b, 0x774ff443, 0x774dada2,
-    0x774b66b8, 0x77491f84,
-  0x7746d806, 0x7744903f, 0x7742482e, 0x773fffd4, 0x773db730, 0x773b6e42,
-    0x7739250b, 0x7736db8b,
-  0x773491c0, 0x773247ad, 0x772ffd50, 0x772db2a9, 0x772b67b9, 0x77291c7f,
-    0x7726d0fc, 0x7724852f,
-  0x77223919, 0x771fecb9, 0x771da010, 0x771b531d, 0x771905e1, 0x7716b85b,
-    0x77146a8c, 0x77121c74,
-  0x770fce12, 0x770d7f66, 0x770b3072, 0x7708e133, 0x770691ab, 0x770441da,
-    0x7701f1c0, 0x76ffa15c,
-  0x76fd50ae, 0x76faffb8, 0x76f8ae78, 0x76f65cee, 0x76f40b1b, 0x76f1b8ff,
-    0x76ef6699, 0x76ed13ea,
-  0x76eac0f2, 0x76e86db0, 0x76e61a25, 0x76e3c650, 0x76e17233, 0x76df1dcb,
-    0x76dcc91b, 0x76da7421,
-  0x76d81ede, 0x76d5c952, 0x76d3737c, 0x76d11d5d, 0x76cec6f5, 0x76cc7043,
-    0x76ca1948, 0x76c7c204,
-  0x76c56a77, 0x76c312a0, 0x76c0ba80, 0x76be6217, 0x76bc0965, 0x76b9b069,
-    0x76b75724, 0x76b4fd96,
-  0x76b2a3bf, 0x76b0499e, 0x76adef34, 0x76ab9481, 0x76a93985, 0x76a6de40,
-    0x76a482b1, 0x76a226da,
-  0x769fcab9, 0x769d6e4f, 0x769b119b, 0x7698b49f, 0x76965759, 0x7693f9ca,
-    0x76919bf3, 0x768f3dd2,
-  0x768cdf67, 0x768a80b4, 0x768821b8, 0x7685c272, 0x768362e4, 0x7681030c,
-    0x767ea2eb, 0x767c4281,
-  0x7679e1ce, 0x767780d2, 0x76751f8d, 0x7672bdfe, 0x76705c27, 0x766dfa07,
-    0x766b979d, 0x766934eb,
-  0x7666d1ef, 0x76646eab, 0x76620b1d, 0x765fa747, 0x765d4327, 0x765adebe,
-    0x76587a0d, 0x76561512,
-  0x7653afce, 0x76514a42, 0x764ee46c, 0x764c7e4d, 0x764a17e6, 0x7647b135,
-    0x76454a3c, 0x7642e2f9,
-  0x76407b6e, 0x763e139a, 0x763bab7c, 0x76394316, 0x7636da67, 0x7634716f,
-    0x7632082e, 0x762f9ea4,
-  0x762d34d1, 0x762acab6, 0x76286051, 0x7625f5a3, 0x76238aad, 0x76211f6e,
-    0x761eb3e6, 0x761c4815,
-  0x7619dbfb, 0x76176f98, 0x761502ed, 0x761295f9, 0x761028bb, 0x760dbb35,
-    0x760b4d67, 0x7608df4f,
-  0x760670ee, 0x76040245, 0x76019353, 0x75ff2418, 0x75fcb495, 0x75fa44c8,
-    0x75f7d4b3, 0x75f56455,
-  0x75f2f3ae, 0x75f082bf, 0x75ee1187, 0x75eba006, 0x75e92e3c, 0x75e6bc2a,
-    0x75e449ce, 0x75e1d72b,
-  0x75df643e, 0x75dcf109, 0x75da7d8b, 0x75d809c4, 0x75d595b4, 0x75d3215c,
-    0x75d0acbc, 0x75ce37d2,
-  0x75cbc2a0, 0x75c94d25, 0x75c6d762, 0x75c46156, 0x75c1eb01, 0x75bf7464,
-    0x75bcfd7e, 0x75ba864f,
-  0x75b80ed8, 0x75b59718, 0x75b31f0f, 0x75b0a6be, 0x75ae2e25, 0x75abb542,
-    0x75a93c18, 0x75a6c2a4,
-  0x75a448e8, 0x75a1cee4, 0x759f5496, 0x759cda01, 0x759a5f22, 0x7597e3fc,
-    0x7595688c, 0x7592ecd4,
-  0x759070d4, 0x758df48b, 0x758b77fa, 0x7588fb20, 0x75867dfd, 0x75840093,
-    0x758182df, 0x757f04e3,
-  0x757c869f, 0x757a0812, 0x7577893d, 0x75750a1f, 0x75728ab9, 0x75700b0a,
-    0x756d8b13, 0x756b0ad3,
-  0x75688a4b, 0x7566097b, 0x75638862, 0x75610701, 0x755e8557, 0x755c0365,
-    0x7559812b, 0x7556fea8,
-  0x75547bdd, 0x7551f8c9, 0x754f756e, 0x754cf1c9, 0x754a6ddd, 0x7547e9a8,
-    0x7545652a, 0x7542e065,
-  0x75405b57, 0x753dd600, 0x753b5061, 0x7538ca7b, 0x7536444b, 0x7533bdd4,
-    0x75313714, 0x752eb00c,
-  0x752c28bb, 0x7529a122, 0x75271941, 0x75249118, 0x752208a7, 0x751f7fed,
-    0x751cf6eb, 0x751a6da0,
-  0x7517e40e, 0x75155a33, 0x7512d010, 0x751045a5, 0x750dbaf2, 0x750b2ff6,
-    0x7508a4b2, 0x75061926,
-  0x75038d52, 0x75010136, 0x74fe74d1, 0x74fbe825, 0x74f95b30, 0x74f6cdf3,
-    0x74f4406d, 0x74f1b2a0,
-  0x74ef248b, 0x74ec962d, 0x74ea0787, 0x74e7789a, 0x74e4e964, 0x74e259e6,
-    0x74dfca20, 0x74dd3a11,
-  0x74daa9bb, 0x74d8191d, 0x74d58836, 0x74d2f708, 0x74d06591, 0x74cdd3d2,
-    0x74cb41cc, 0x74c8af7d,
-  0x74c61ce6, 0x74c38a07, 0x74c0f6e0, 0x74be6372, 0x74bbcfbb, 0x74b93bbc,
-    0x74b6a775, 0x74b412e6,
-  0x74b17e0f, 0x74aee8f0, 0x74ac5389, 0x74a9bddb, 0x74a727e4, 0x74a491a5,
-    0x74a1fb1e, 0x749f6450,
-  0x749ccd39, 0x749a35db, 0x74979e34, 0x74950646, 0x74926e10, 0x748fd592,
-    0x748d3ccb, 0x748aa3be,
-  0x74880a68, 0x748570ca, 0x7482d6e4, 0x74803cb7, 0x747da242, 0x747b0784,
-    0x74786c7f, 0x7475d132,
-  0x7473359e, 0x747099c1, 0x746dfd9d, 0x746b6131, 0x7468c47c, 0x74662781,
-    0x74638a3d, 0x7460ecb2,
-  0x745e4ede, 0x745bb0c3, 0x74591261, 0x745673b6, 0x7453d4c4, 0x7451358a,
-    0x744e9608, 0x744bf63e,
-  0x7449562d, 0x7446b5d4, 0x74441533, 0x7441744b, 0x743ed31b, 0x743c31a3,
-    0x74398fe3, 0x7436eddc,
-  0x74344b8d, 0x7431a8f6, 0x742f0618, 0x742c62f2, 0x7429bf84, 0x74271bcf,
-    0x742477d2, 0x7421d38e,
-  0x741f2f01, 0x741c8a2d, 0x7419e512, 0x74173faf, 0x74149a04, 0x7411f412,
-    0x740f4dd8, 0x740ca756,
-  0x740a008d, 0x7407597d, 0x7404b224, 0x74020a85, 0x73ff629d, 0x73fcba6e,
-    0x73fa11f8, 0x73f7693a,
-  0x73f4c034, 0x73f216e7, 0x73ef6d53, 0x73ecc377, 0x73ea1953, 0x73e76ee8,
-    0x73e4c435, 0x73e2193b,
-  0x73df6df9, 0x73dcc270, 0x73da16a0, 0x73d76a88, 0x73d4be28, 0x73d21182,
-    0x73cf6493, 0x73ccb75d,
-  0x73ca09e0, 0x73c75c1c, 0x73c4ae10, 0x73c1ffbc, 0x73bf5121, 0x73bca23f,
-    0x73b9f315, 0x73b743a4,
-  0x73b493ec, 0x73b1e3ec, 0x73af33a5, 0x73ac8316, 0x73a9d240, 0x73a72123,
-    0x73a46fbf, 0x73a1be13,
-  0x739f0c20, 0x739c59e5, 0x7399a763, 0x7396f49a, 0x73944189, 0x73918e32,
-    0x738eda93, 0x738c26ac,
-  0x7389727f, 0x7386be0a, 0x7384094e, 0x7381544a, 0x737e9f00, 0x737be96e,
-    0x73793395, 0x73767d74,
-  0x7373c70d, 0x7371105e, 0x736e5968, 0x736ba22b, 0x7368eaa6, 0x736632db,
-    0x73637ac8, 0x7360c26e,
-  0x735e09cd, 0x735b50e4, 0x735897b5, 0x7355de3e, 0x73532481, 0x73506a7c,
-    0x734db030, 0x734af59d,
-  0x73483ac2, 0x73457fa1, 0x7342c438, 0x73400889, 0x733d4c92, 0x733a9054,
-    0x7337d3d0, 0x73351704,
-  0x733259f1, 0x732f9c97, 0x732cdef6, 0x732a210d, 0x732762de, 0x7324a468,
-    0x7321e5ab, 0x731f26a7,
-  0x731c675b, 0x7319a7c9, 0x7316e7f0, 0x731427cf, 0x73116768, 0x730ea6ba,
-    0x730be5c5, 0x73092489,
-  0x73066306, 0x7303a13b, 0x7300df2a, 0x72fe1cd2, 0x72fb5a34, 0x72f8974e,
-    0x72f5d421, 0x72f310ad,
-  0x72f04cf3, 0x72ed88f1, 0x72eac4a9, 0x72e8001a, 0x72e53b44, 0x72e27627,
-    0x72dfb0c3, 0x72dceb18,
-  0x72da2526, 0x72d75eee, 0x72d4986f, 0x72d1d1a9, 0x72cf0a9c, 0x72cc4348,
-    0x72c97bad, 0x72c6b3cc,
-  0x72c3eba4, 0x72c12335, 0x72be5a7f, 0x72bb9183, 0x72b8c83f, 0x72b5feb5,
-    0x72b334e4, 0x72b06acd,
-  0x72ada06f, 0x72aad5c9, 0x72a80ade, 0x72a53fab, 0x72a27432, 0x729fa872,
-    0x729cdc6b, 0x729a101e,
-  0x7297438a, 0x729476af, 0x7291a98e, 0x728edc26, 0x728c0e77, 0x72894082,
-    0x72867245, 0x7283a3c3,
-  0x7280d4f9, 0x727e05e9, 0x727b3693, 0x727866f6, 0x72759712, 0x7272c6e7,
-    0x726ff676, 0x726d25bf,
-  0x726a54c1, 0x7267837c, 0x7264b1f0, 0x7261e01e, 0x725f0e06, 0x725c3ba7,
-    0x72596901, 0x72569615,
-  0x7253c2e3, 0x7250ef6a, 0x724e1baa, 0x724b47a4, 0x72487357, 0x72459ec4,
-    0x7242c9ea, 0x723ff4ca,
-  0x723d1f63, 0x723a49b6, 0x723773c3, 0x72349d89, 0x7231c708, 0x722ef041,
-    0x722c1934, 0x722941e0,
-  0x72266a46, 0x72239266, 0x7220ba3f, 0x721de1d1, 0x721b091d, 0x72183023,
-    0x721556e3, 0x72127d5c,
-  0x720fa38e, 0x720cc97b, 0x7209ef21, 0x72071480, 0x7204399a, 0x72015e6d,
-    0x71fe82f9, 0x71fba740,
-  0x71f8cb40, 0x71f5eefa, 0x71f3126d, 0x71f0359a, 0x71ed5881, 0x71ea7b22,
-    0x71e79d7c, 0x71e4bf90,
-  0x71e1e15e, 0x71df02e5, 0x71dc2427, 0x71d94522, 0x71d665d6, 0x71d38645,
-    0x71d0a66d, 0x71cdc650,
-  0x71cae5ec, 0x71c80542, 0x71c52451, 0x71c2431b, 0x71bf619e, 0x71bc7fdb,
-    0x71b99dd2, 0x71b6bb83,
-  0x71b3d8ed, 0x71b0f612, 0x71ae12f0, 0x71ab2f89, 0x71a84bdb, 0x71a567e7,
-    0x71a283ad, 0x719f9f2c,
-  0x719cba66, 0x7199d55a, 0x7196f008, 0x71940a6f, 0x71912490, 0x718e3e6c,
-    0x718b5801, 0x71887151,
-  0x71858a5a, 0x7182a31d, 0x717fbb9a, 0x717cd3d2, 0x7179ebc3, 0x7177036e,
-    0x71741ad3, 0x717131f3,
-  0x716e48cc, 0x716b5f5f, 0x716875ad, 0x71658bb4, 0x7162a175, 0x715fb6f1,
-    0x715ccc26, 0x7159e116,
-  0x7156f5c0, 0x71540a24, 0x71511e42, 0x714e321a, 0x714b45ac, 0x714858f8,
-    0x71456bfe, 0x71427ebf,
-  0x713f9139, 0x713ca36e, 0x7139b55d, 0x7136c706, 0x7133d869, 0x7130e987,
-    0x712dfa5e, 0x712b0af0,
-  0x71281b3c, 0x71252b42, 0x71223b02, 0x711f4a7d, 0x711c59b2, 0x711968a1,
-    0x7116774a, 0x711385ad,
-  0x711093cb, 0x710da1a3, 0x710aaf35, 0x7107bc82, 0x7104c989, 0x7101d64a,
-    0x70fee2c5, 0x70fbeefb,
-  0x70f8faeb, 0x70f60695, 0x70f311fa, 0x70f01d19, 0x70ed27f2, 0x70ea3286,
-    0x70e73cd4, 0x70e446dc,
-  0x70e1509f, 0x70de5a1c, 0x70db6353, 0x70d86c45, 0x70d574f1, 0x70d27d58,
-    0x70cf8579, 0x70cc8d54,
-  0x70c994ea, 0x70c69c3a, 0x70c3a345, 0x70c0aa0a, 0x70bdb08a, 0x70bab6c4,
-    0x70b7bcb8, 0x70b4c267,
-  0x70b1c7d1, 0x70aeccf5, 0x70abd1d3, 0x70a8d66c, 0x70a5dac0, 0x70a2dece,
-    0x709fe296, 0x709ce619,
-  0x7099e957, 0x7096ec4f, 0x7093ef01, 0x7090f16e, 0x708df396, 0x708af579,
-    0x7087f715, 0x7084f86d,
-  0x7081f97f, 0x707efa4c, 0x707bfad3, 0x7078fb15, 0x7075fb11, 0x7072fac9,
-    0x706ffa3a, 0x706cf967,
-  0x7069f84e, 0x7066f6f0, 0x7063f54c, 0x7060f363, 0x705df135, 0x705aeec1,
-    0x7057ec08, 0x7054e90a,
-  0x7051e5c7, 0x704ee23e, 0x704bde70, 0x7048da5d, 0x7045d604, 0x7042d166,
-    0x703fcc83, 0x703cc75b,
-  0x7039c1ed, 0x7036bc3b, 0x7033b643, 0x7030b005, 0x702da983, 0x702aa2bb,
-    0x70279baf, 0x7024945d,
-  0x70218cc6, 0x701e84e9, 0x701b7cc8, 0x70187461, 0x70156bb5, 0x701262c4,
-    0x700f598e, 0x700c5013,
-  0x70094653, 0x70063c4e, 0x70033203, 0x70002774, 0x6ffd1c9f, 0x6ffa1185,
-    0x6ff70626, 0x6ff3fa82,
-  0x6ff0ee99, 0x6fede26b, 0x6fead5f8, 0x6fe7c940, 0x6fe4bc43, 0x6fe1af01,
-    0x6fdea17a, 0x6fdb93ae,
-  0x6fd8859d, 0x6fd57746, 0x6fd268ab, 0x6fcf59cb, 0x6fcc4aa6, 0x6fc93b3c,
-    0x6fc62b8d, 0x6fc31b99,
-  0x6fc00b60, 0x6fbcfae2, 0x6fb9ea20, 0x6fb6d918, 0x6fb3c7cb, 0x6fb0b63a,
-    0x6fada464, 0x6faa9248,
-  0x6fa77fe8, 0x6fa46d43, 0x6fa15a59, 0x6f9e472b, 0x6f9b33b7, 0x6f981fff,
-    0x6f950c01, 0x6f91f7bf,
-  0x6f8ee338, 0x6f8bce6c, 0x6f88b95c, 0x6f85a407, 0x6f828e6c, 0x6f7f788d,
-    0x6f7c626a, 0x6f794c01,
-  0x6f763554, 0x6f731e62, 0x6f70072b, 0x6f6cefb0, 0x6f69d7f0, 0x6f66bfeb,
-    0x6f63a7a1, 0x6f608f13,
-  0x6f5d7640, 0x6f5a5d28, 0x6f5743cb, 0x6f542a2a, 0x6f511044, 0x6f4df61a,
-    0x6f4adbab, 0x6f47c0f7,
-  0x6f44a5ff, 0x6f418ac2, 0x6f3e6f40, 0x6f3b537a, 0x6f38376f, 0x6f351b1f,
-    0x6f31fe8b, 0x6f2ee1b2,
-  0x6f2bc495, 0x6f28a733, 0x6f25898d, 0x6f226ba2, 0x6f1f4d72, 0x6f1c2efe,
-    0x6f191045, 0x6f15f148,
-  0x6f12d206, 0x6f0fb280, 0x6f0c92b6, 0x6f0972a6, 0x6f065253, 0x6f0331ba,
-    0x6f0010de, 0x6efcefbd,
-  0x6ef9ce57, 0x6ef6acad, 0x6ef38abe, 0x6ef0688b, 0x6eed4614, 0x6eea2358,
-    0x6ee70058, 0x6ee3dd13,
-  0x6ee0b98a, 0x6edd95bd, 0x6eda71ab, 0x6ed74d55, 0x6ed428ba, 0x6ed103db,
-    0x6ecddeb8, 0x6ecab950,
-  0x6ec793a4, 0x6ec46db4, 0x6ec1477f, 0x6ebe2106, 0x6ebafa49, 0x6eb7d347,
-    0x6eb4ac02, 0x6eb18477,
-  0x6eae5ca9, 0x6eab3496, 0x6ea80c3f, 0x6ea4e3a4, 0x6ea1bac4, 0x6e9e91a1,
-    0x6e9b6839, 0x6e983e8d,
-  0x6e95149c, 0x6e91ea67, 0x6e8ebfef, 0x6e8b9532, 0x6e886a30, 0x6e853eeb,
-    0x6e821361, 0x6e7ee794,
-  0x6e7bbb82, 0x6e788f2c, 0x6e756291, 0x6e7235b3, 0x6e6f0890, 0x6e6bdb2a,
-    0x6e68ad7f, 0x6e657f90,
-  0x6e62515d, 0x6e5f22e6, 0x6e5bf42b, 0x6e58c52c, 0x6e5595e9, 0x6e526662,
-    0x6e4f3696, 0x6e4c0687,
-  0x6e48d633, 0x6e45a59c, 0x6e4274c1, 0x6e3f43a1, 0x6e3c123e, 0x6e38e096,
-    0x6e35aeab, 0x6e327c7b,
-  0x6e2f4a08, 0x6e2c1750, 0x6e28e455, 0x6e25b115, 0x6e227d92, 0x6e1f49cb,
-    0x6e1c15c0, 0x6e18e171,
-  0x6e15acde, 0x6e127807, 0x6e0f42ec, 0x6e0c0d8e, 0x6e08d7eb, 0x6e05a205,
-    0x6e026bda, 0x6dff356c,
-  0x6dfbfeba, 0x6df8c7c4, 0x6df5908b, 0x6df2590d, 0x6def214c, 0x6debe947,
-    0x6de8b0fe, 0x6de57871,
-  0x6de23fa0, 0x6ddf068c, 0x6ddbcd34, 0x6dd89398, 0x6dd559b9, 0x6dd21f95,
-    0x6dcee52e, 0x6dcbaa83,
-  0x6dc86f95, 0x6dc53462, 0x6dc1f8ec, 0x6dbebd33, 0x6dbb8135, 0x6db844f4,
-    0x6db5086f, 0x6db1cba7,
-  0x6dae8e9b, 0x6dab514b, 0x6da813b8, 0x6da4d5e1, 0x6da197c6, 0x6d9e5968,
-    0x6d9b1ac6, 0x6d97dbe0,
-  0x6d949cb7, 0x6d915d4a, 0x6d8e1d9a, 0x6d8adda6, 0x6d879d6e, 0x6d845cf3,
-    0x6d811c35, 0x6d7ddb33,
-  0x6d7a99ed, 0x6d775864, 0x6d741697, 0x6d70d487, 0x6d6d9233, 0x6d6a4f9c,
-    0x6d670cc1, 0x6d63c9a3,
-  0x6d608641, 0x6d5d429c, 0x6d59feb3, 0x6d56ba87, 0x6d537617, 0x6d503164,
-    0x6d4cec6e, 0x6d49a734,
-  0x6d4661b7, 0x6d431bf6, 0x6d3fd5f2, 0x6d3c8fab, 0x6d394920, 0x6d360252,
-    0x6d32bb40, 0x6d2f73eb,
-  0x6d2c2c53, 0x6d28e477, 0x6d259c58, 0x6d2253f6, 0x6d1f0b50, 0x6d1bc267,
-    0x6d18793b, 0x6d152fcc,
-  0x6d11e619, 0x6d0e9c23, 0x6d0b51e9, 0x6d08076d, 0x6d04bcad, 0x6d0171aa,
-    0x6cfe2663, 0x6cfadada,
-  0x6cf78f0d, 0x6cf442fd, 0x6cf0f6aa, 0x6cedaa13, 0x6cea5d3a, 0x6ce7101d,
-    0x6ce3c2bd, 0x6ce0751a,
-  0x6cdd2733, 0x6cd9d90a, 0x6cd68a9d, 0x6cd33bed, 0x6ccfecfa, 0x6ccc9dc4,
-    0x6cc94e4b, 0x6cc5fe8f,
-  0x6cc2ae90, 0x6cbf5e4d, 0x6cbc0dc8, 0x6cb8bcff, 0x6cb56bf4, 0x6cb21aa5,
-    0x6caec913, 0x6cab773e,
-  0x6ca82527, 0x6ca4d2cc, 0x6ca1802e, 0x6c9e2d4d, 0x6c9ada29, 0x6c9786c2,
-    0x6c943318, 0x6c90df2c,
-  0x6c8d8afc, 0x6c8a3689, 0x6c86e1d3, 0x6c838cdb, 0x6c80379f, 0x6c7ce220,
-    0x6c798c5f, 0x6c76365b,
-  0x6c72e013, 0x6c6f8989, 0x6c6c32bc, 0x6c68dbac, 0x6c658459, 0x6c622cc4,
-    0x6c5ed4eb, 0x6c5b7cd0,
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-    0x5ebc0a6a, 0x5eb7d09e,
-  0x5eb39697, 0x5eaf5c56, 0x5eab21da, 0x5ea6e724, 0x5ea2ac34, 0x5e9e7109,
-    0x5e9a35a4, 0x5e95fa05,
-  0x5e91be2b, 0x5e8d8217, 0x5e8945c8, 0x5e85093f, 0x5e80cc7c, 0x5e7c8f7f,
-    0x5e785247, 0x5e7414d5,
-  0x5e6fd729, 0x5e6b9943, 0x5e675b22, 0x5e631cc7, 0x5e5ede32, 0x5e5a9f62,
-    0x5e566059, 0x5e522115,
-  0x5e4de197, 0x5e49a1df, 0x5e4561ed, 0x5e4121c0, 0x5e3ce15a, 0x5e38a0b9,
-    0x5e345fde, 0x5e301ec9,
-  0x5e2bdd7a, 0x5e279bf1, 0x5e235a2e, 0x5e1f1830, 0x5e1ad5f9, 0x5e169388,
-    0x5e1250dc, 0x5e0e0df7,
-  0x5e09cad7, 0x5e05877e, 0x5e0143ea, 0x5dfd001d, 0x5df8bc15, 0x5df477d4,
-    0x5df03359, 0x5debeea3,
-  0x5de7a9b4, 0x5de3648b, 0x5ddf1f28, 0x5ddad98b, 0x5dd693b4, 0x5dd24da3,
-    0x5dce0759, 0x5dc9c0d4,
-  0x5dc57a16, 0x5dc1331d, 0x5dbcebeb, 0x5db8a480, 0x5db45cda, 0x5db014fa,
-    0x5dabcce1, 0x5da7848e,
-  0x5da33c01, 0x5d9ef33b, 0x5d9aaa3a, 0x5d966100, 0x5d92178d, 0x5d8dcddf,
-    0x5d8983f8, 0x5d8539d7,
-  0x5d80ef7c, 0x5d7ca4e8, 0x5d785a1a, 0x5d740f12, 0x5d6fc3d1, 0x5d6b7856,
-    0x5d672ca2, 0x5d62e0b4,
-  0x5d5e948c, 0x5d5a482a, 0x5d55fb90, 0x5d51aebb, 0x5d4d61ad, 0x5d491465,
-    0x5d44c6e4, 0x5d40792a,
-  0x5d3c2b35, 0x5d37dd08, 0x5d338ea0, 0x5d2f4000, 0x5d2af125, 0x5d26a212,
-    0x5d2252c5, 0x5d1e033e,
-  0x5d19b37e, 0x5d156385, 0x5d111352, 0x5d0cc2e5, 0x5d087240, 0x5d042161,
-    0x5cffd048, 0x5cfb7ef7,
-  0x5cf72d6b, 0x5cf2dba7, 0x5cee89a9, 0x5cea3772, 0x5ce5e501, 0x5ce19258,
-    0x5cdd3f75, 0x5cd8ec58,
-  0x5cd49903, 0x5cd04574, 0x5ccbf1ab, 0x5cc79daa, 0x5cc3496f, 0x5cbef4fc,
-    0x5cbaa04f, 0x5cb64b68,
-  0x5cb1f649, 0x5cada0f0, 0x5ca94b5e, 0x5ca4f594, 0x5ca09f8f, 0x5c9c4952,
-    0x5c97f2dc, 0x5c939c2c,
-  0x5c8f4544, 0x5c8aee22, 0x5c8696c7, 0x5c823f34, 0x5c7de767, 0x5c798f61,
-    0x5c753722, 0x5c70deaa,
-  0x5c6c85f9, 0x5c682d0f, 0x5c63d3eb, 0x5c5f7a8f, 0x5c5b20fa, 0x5c56c72c,
-    0x5c526d25, 0x5c4e12e5,
-  0x5c49b86d, 0x5c455dbb, 0x5c4102d0, 0x5c3ca7ad, 0x5c384c50, 0x5c33f0bb,
-    0x5c2f94ec, 0x5c2b38e5,
-  0x5c26dca5, 0x5c22802c, 0x5c1e237b, 0x5c19c690, 0x5c15696d, 0x5c110c11,
-    0x5c0cae7c, 0x5c0850ae,
-  0x5c03f2a8, 0x5bff9469, 0x5bfb35f1, 0x5bf6d740, 0x5bf27857, 0x5bee1935,
-    0x5be9b9da, 0x5be55a46,
-  0x5be0fa7a, 0x5bdc9a75, 0x5bd83a37, 0x5bd3d9c1, 0x5bcf7912, 0x5bcb182b,
-    0x5bc6b70b, 0x5bc255b2,
-  0x5bbdf421, 0x5bb99257, 0x5bb53054, 0x5bb0ce19, 0x5bac6ba6, 0x5ba808f9,
-    0x5ba3a615, 0x5b9f42f7,
-  0x5b9adfa2, 0x5b967c13, 0x5b92184d, 0x5b8db44d, 0x5b895016, 0x5b84eba6,
-    0x5b8086fd, 0x5b7c221c,
-  0x5b77bd02, 0x5b7357b0, 0x5b6ef226, 0x5b6a8c63, 0x5b662668, 0x5b61c035,
-    0x5b5d59c9, 0x5b58f324,
-  0x5b548c48, 0x5b502533, 0x5b4bbde6, 0x5b475660, 0x5b42eea2, 0x5b3e86ac,
-    0x5b3a1e7e, 0x5b35b617,
-  0x5b314d78, 0x5b2ce4a1, 0x5b287b91, 0x5b241249, 0x5b1fa8c9, 0x5b1b3f11,
-    0x5b16d521, 0x5b126af8,
-  0x5b0e0098, 0x5b0995ff, 0x5b052b2e, 0x5b00c025, 0x5afc54e3, 0x5af7e96a,
-    0x5af37db8, 0x5aef11cf,
-  0x5aeaa5ad, 0x5ae63953, 0x5ae1ccc1, 0x5add5ff7, 0x5ad8f2f5, 0x5ad485bb,
-    0x5ad01849, 0x5acbaa9f,
-  0x5ac73cbd, 0x5ac2cea3, 0x5abe6050, 0x5ab9f1c6, 0x5ab58304, 0x5ab1140a,
-    0x5aaca4d8, 0x5aa8356f,
-  0x5aa3c5cd, 0x5a9f55f3, 0x5a9ae5e2, 0x5a967598, 0x5a920517, 0x5a8d945d,
-    0x5a89236c, 0x5a84b243,
-  0x5a8040e3, 0x5a7bcf4a, 0x5a775d7a, 0x5a72eb71, 0x5a6e7931, 0x5a6a06ba,
-    0x5a65940a, 0x5a612123,
-  0x5a5cae04, 0x5a583aad, 0x5a53c71e, 0x5a4f5358, 0x5a4adf5a, 0x5a466b24,
-    0x5a41f6b7, 0x5a3d8212,
-  0x5a390d35, 0x5a349821, 0x5a3022d5, 0x5a2bad51, 0x5a273796, 0x5a22c1a3,
-    0x5a1e4b79, 0x5a19d517,
-  0x5a155e7d, 0x5a10e7ac, 0x5a0c70a3, 0x5a07f963, 0x5a0381eb, 0x59ff0a3c,
-    0x59fa9255, 0x59f61a36,
-  0x59f1a1e0, 0x59ed2953, 0x59e8b08e, 0x59e43792, 0x59dfbe5e, 0x59db44f3,
-    0x59d6cb50, 0x59d25176,
-  0x59cdd765, 0x59c95d1c, 0x59c4e29c, 0x59c067e4, 0x59bbecf5, 0x59b771cf,
-    0x59b2f671, 0x59ae7add,
-  0x59a9ff10, 0x59a5830d, 0x59a106d2, 0x599c8a60, 0x59980db6, 0x599390d5,
-    0x598f13bd, 0x598a966e,
-  0x598618e8, 0x59819b2a, 0x597d1d35, 0x59789f09, 0x597420a6, 0x596fa20b,
-    0x596b233a, 0x5966a431,
-  0x596224f1, 0x595da57a, 0x595925cc, 0x5954a5e6, 0x595025ca, 0x594ba576,
-    0x594724ec, 0x5942a42a,
-  0x593e2331, 0x5939a202, 0x5935209b, 0x59309efd, 0x592c1d28, 0x59279b1c,
-    0x592318d9, 0x591e9660,
-  0x591a13af, 0x591590c7, 0x59110da8, 0x590c8a53, 0x590806c6, 0x59038302,
-    0x58feff08, 0x58fa7ad7,
-  0x58f5f66e, 0x58f171cf, 0x58ececf9, 0x58e867ed, 0x58e3e2a9, 0x58df5d2e,
-    0x58dad77d, 0x58d65195,
-  0x58d1cb76, 0x58cd4520, 0x58c8be94, 0x58c437d1, 0x58bfb0d7, 0x58bb29a6,
-    0x58b6a23e, 0x58b21aa0,
-  0x58ad92cb, 0x58a90ac0, 0x58a4827d, 0x589ffa04, 0x589b7155, 0x5896e86f,
-    0x58925f52, 0x588dd5fe,
-  0x58894c74, 0x5884c2b3, 0x588038bb, 0x587bae8d, 0x58772429, 0x5872998e,
-    0x586e0ebc, 0x586983b4,
-  0x5864f875, 0x58606d00, 0x585be154, 0x58575571, 0x5852c958, 0x584e3d09,
-    0x5849b083, 0x584523c7,
-  0x584096d4, 0x583c09ab, 0x58377c4c, 0x5832eeb6, 0x582e60e9, 0x5829d2e6,
-    0x582544ad, 0x5820b63e,
-  0x581c2798, 0x581798bb, 0x581309a9, 0x580e7a60, 0x5809eae1, 0x58055b2b,
-    0x5800cb3f, 0x57fc3b1d,
-  0x57f7aac5, 0x57f31a36, 0x57ee8971, 0x57e9f876, 0x57e56744, 0x57e0d5dd,
-    0x57dc443f, 0x57d7b26b,
-  0x57d32061, 0x57ce8e20, 0x57c9fbaa, 0x57c568fd, 0x57c0d61a, 0x57bc4301,
-    0x57b7afb2, 0x57b31c2d,
-  0x57ae8872, 0x57a9f480, 0x57a56059, 0x57a0cbfb, 0x579c3768, 0x5797a29e,
-    0x57930d9e, 0x578e7869,
-  0x5789e2fd, 0x57854d5b, 0x5780b784, 0x577c2176, 0x57778b32, 0x5772f4b9,
-    0x576e5e09, 0x5769c724,
-  0x57653009, 0x576098b7, 0x575c0130, 0x57576973, 0x5752d180, 0x574e3957,
-    0x5749a0f9, 0x57450864,
-  0x57406f9a, 0x573bd69a, 0x57373d64, 0x5732a3f8, 0x572e0a56, 0x5729707f,
-    0x5724d672, 0x57203c2f,
-  0x571ba1b7, 0x57170708, 0x57126c24, 0x570dd10a, 0x570935bb, 0x57049a36,
-    0x56fffe7b, 0x56fb628b,
-  0x56f6c664, 0x56f22a09, 0x56ed8d77, 0x56e8f0b0, 0x56e453b4, 0x56dfb681,
-    0x56db1919, 0x56d67b7c,
-  0x56d1dda9, 0x56cd3fa1, 0x56c8a162, 0x56c402ef, 0x56bf6446, 0x56bac567,
-    0x56b62653, 0x56b18709,
-  0x56ace78a, 0x56a847d6, 0x56a3a7ec, 0x569f07cc, 0x569a6777, 0x5695c6ed,
-    0x5691262d, 0x568c8538,
-  0x5687e40e, 0x568342ae, 0x567ea118, 0x5679ff4e, 0x56755d4e, 0x5670bb19,
-    0x566c18ae, 0x5667760e,
-  0x5662d339, 0x565e302e, 0x56598cee, 0x5654e979, 0x565045cf, 0x564ba1f0,
-    0x5646fddb, 0x56425991,
-  0x563db512, 0x5639105d, 0x56346b74, 0x562fc655, 0x562b2101, 0x56267b78,
-    0x5621d5ba, 0x561d2fc6,
-  0x5618899e, 0x5613e340, 0x560f3cae, 0x560a95e6, 0x5605eee9, 0x560147b7,
-    0x55fca050, 0x55f7f8b4,
-  0x55f350e3, 0x55eea8dd, 0x55ea00a2, 0x55e55832, 0x55e0af8d, 0x55dc06b3,
-    0x55d75da4, 0x55d2b460,
-  0x55ce0ae7, 0x55c96139, 0x55c4b757, 0x55c00d3f, 0x55bb62f3, 0x55b6b871,
-    0x55b20dbb, 0x55ad62d0,
-  0x55a8b7b0, 0x55a40c5b, 0x559f60d1, 0x559ab513, 0x55960920, 0x55915cf8,
-    0x558cb09b, 0x55880409,
-  0x55835743, 0x557eaa48, 0x5579fd18, 0x55754fb3, 0x5570a21a, 0x556bf44c,
-    0x55674649, 0x55629812,
-  0x555de9a6, 0x55593b05, 0x55548c30, 0x554fdd26, 0x554b2de7, 0x55467e74,
-    0x5541cecc, 0x553d1ef0,
-  0x55386edf, 0x5533be99, 0x552f0e1f, 0x552a5d70, 0x5525ac8d, 0x5520fb75,
-    0x551c4a29, 0x551798a8,
-  0x5512e6f3, 0x550e3509, 0x550982eb, 0x5504d099, 0x55001e12, 0x54fb6b56,
-    0x54f6b866, 0x54f20542,
-  0x54ed51e9, 0x54e89e5c, 0x54e3ea9a, 0x54df36a5, 0x54da827a, 0x54d5ce1c,
-    0x54d11989, 0x54cc64c2,
-  0x54c7afc6, 0x54c2fa96, 0x54be4532, 0x54b98f9a, 0x54b4d9cd, 0x54b023cc,
-    0x54ab6d97, 0x54a6b72e,
-  0x54a20090, 0x549d49bf, 0x549892b9, 0x5493db7f, 0x548f2410, 0x548a6c6e,
-    0x5485b497, 0x5480fc8c,
-  0x547c444d, 0x54778bda, 0x5472d333, 0x546e1a58, 0x54696149, 0x5464a805,
-    0x545fee8e, 0x545b34e3,
-  0x54567b03, 0x5451c0f0, 0x544d06a8, 0x54484c2d, 0x5443917d, 0x543ed699,
-    0x543a1b82, 0x54356037,
-  0x5430a4b7, 0x542be904, 0x54272d1d, 0x54227102, 0x541db4b3, 0x5418f830,
-    0x54143b79, 0x540f7e8e,
-  0x540ac170, 0x5406041d, 0x54014697, 0x53fc88dd, 0x53f7caef, 0x53f30cce,
-    0x53ee4e78, 0x53e98fef,
-  0x53e4d132, 0x53e01242, 0x53db531d, 0x53d693c5, 0x53d1d439, 0x53cd147a,
-    0x53c85486, 0x53c3945f,
-  0x53bed405, 0x53ba1377, 0x53b552b5, 0x53b091bf, 0x53abd096, 0x53a70f39,
-    0x53a24da9, 0x539d8be5,
-  0x5398c9ed, 0x539407c2, 0x538f4564, 0x538a82d1, 0x5385c00c, 0x5380fd12,
-    0x537c39e6, 0x53777685,
-  0x5372b2f2, 0x536def2a, 0x53692b30, 0x53646701, 0x535fa2a0, 0x535ade0b,
-    0x53561942, 0x53515447,
-  0x534c8f17, 0x5347c9b5, 0x5343041f, 0x533e3e55, 0x53397859, 0x5334b229,
-    0x532febc5, 0x532b252f,
-  0x53265e65, 0x53219767, 0x531cd037, 0x531808d3, 0x5313413c, 0x530e7972,
-    0x5309b174, 0x5304e943,
-  0x530020df, 0x52fb5848, 0x52f68f7e, 0x52f1c680, 0x52ecfd4f, 0x52e833ec,
-    0x52e36a55, 0x52dea08a,
-  0x52d9d68d, 0x52d50c5d, 0x52d041f9, 0x52cb7763, 0x52c6ac99, 0x52c1e19d,
-    0x52bd166d, 0x52b84b0a,
-  0x52b37f74, 0x52aeb3ac, 0x52a9e7b0, 0x52a51b81, 0x52a04f1f, 0x529b828a,
-    0x5296b5c3, 0x5291e8c8,
-  0x528d1b9b, 0x52884e3a, 0x528380a7, 0x527eb2e0, 0x5279e4e7, 0x527516bb,
-    0x5270485c, 0x526b79ca,
-  0x5266ab06, 0x5261dc0e, 0x525d0ce4, 0x52583d87, 0x52536df7, 0x524e9e34,
-    0x5249ce3f, 0x5244fe17,
-  0x52402dbc, 0x523b5d2e, 0x52368c6e, 0x5231bb7b, 0x522cea55, 0x522818fc,
-    0x52234771, 0x521e75b3,
-  0x5219a3c3, 0x5214d1a0, 0x520fff4a, 0x520b2cc2, 0x52065a07, 0x52018719,
-    0x51fcb3f9, 0x51f7e0a6,
-  0x51f30d21, 0x51ee3969, 0x51e9657e, 0x51e49162, 0x51dfbd12, 0x51dae890,
-    0x51d613dc, 0x51d13ef5,
-  0x51cc69db, 0x51c79490, 0x51c2bf11, 0x51bde960, 0x51b9137d, 0x51b43d68,
-    0x51af6720, 0x51aa90a5,
-  0x51a5b9f9, 0x51a0e31a, 0x519c0c08, 0x519734c4, 0x51925d4e, 0x518d85a6,
-    0x5188adcb, 0x5183d5be,
-  0x517efd7f, 0x517a250d, 0x51754c69, 0x51707393, 0x516b9a8b, 0x5166c150,
-    0x5161e7e4, 0x515d0e45,
-  0x51583473, 0x51535a70, 0x514e803b, 0x5149a5d3, 0x5144cb39, 0x513ff06d,
-    0x513b156f, 0x51363a3f,
-  0x51315edd, 0x512c8348, 0x5127a782, 0x5122cb8a, 0x511def5f, 0x51191302,
-    0x51143674, 0x510f59b3,
-  0x510a7cc1, 0x51059f9c, 0x5100c246, 0x50fbe4bd, 0x50f70703, 0x50f22916,
-    0x50ed4af8, 0x50e86ca8,
-  0x50e38e25, 0x50deaf71, 0x50d9d08b, 0x50d4f173, 0x50d0122a, 0x50cb32ae,
-    0x50c65301, 0x50c17322,
-  0x50bc9311, 0x50b7b2ce, 0x50b2d259, 0x50adf1b3, 0x50a910db, 0x50a42fd1,
-    0x509f4e95, 0x509a6d28,
-  0x50958b88, 0x5090a9b8, 0x508bc7b5, 0x5086e581, 0x5082031b, 0x507d2083,
-    0x50783dba, 0x50735abf,
-  0x506e7793, 0x50699435, 0x5064b0a5, 0x505fcce4, 0x505ae8f1, 0x505604cd,
-    0x50512077, 0x504c3bef,
-  0x50475736, 0x5042724c, 0x503d8d30, 0x5038a7e2, 0x5033c263, 0x502edcb2,
-    0x5029f6d1, 0x502510bd,
-  0x50202a78, 0x501b4402, 0x50165d5a, 0x50117681, 0x500c8f77, 0x5007a83b,
-    0x5002c0cd, 0x4ffdd92f,
-  0x4ff8f15f, 0x4ff4095e, 0x4fef212b, 0x4fea38c7, 0x4fe55032, 0x4fe0676c,
-    0x4fdb7e74, 0x4fd6954b,
-  0x4fd1abf0, 0x4fccc265, 0x4fc7d8a8, 0x4fc2eeba, 0x4fbe049b, 0x4fb91a4b,
-    0x4fb42fc9, 0x4faf4517,
-  0x4faa5a33, 0x4fa56f1e, 0x4fa083d8, 0x4f9b9861, 0x4f96acb8, 0x4f91c0df,
-    0x4f8cd4d4, 0x4f87e899,
-  0x4f82fc2c, 0x4f7e0f8f, 0x4f7922c0, 0x4f7435c0, 0x4f6f488f, 0x4f6a5b2e,
-    0x4f656d9b, 0x4f607fd7,
-  0x4f5b91e3, 0x4f56a3bd, 0x4f51b566, 0x4f4cc6df, 0x4f47d827, 0x4f42e93d,
-    0x4f3dfa23, 0x4f390ad8,
-  0x4f341b5c, 0x4f2f2baf, 0x4f2a3bd2, 0x4f254bc3, 0x4f205b84, 0x4f1b6b14,
-    0x4f167a73, 0x4f1189a1,
-  0x4f0c989f, 0x4f07a76b, 0x4f02b608, 0x4efdc473, 0x4ef8d2ad, 0x4ef3e0b7,
-    0x4eeeee90, 0x4ee9fc39,
-  0x4ee509b1, 0x4ee016f8, 0x4edb240e, 0x4ed630f4, 0x4ed13da9, 0x4ecc4a2e,
-    0x4ec75682, 0x4ec262a5,
-  0x4ebd6e98, 0x4eb87a5a, 0x4eb385ec, 0x4eae914d, 0x4ea99c7d, 0x4ea4a77d,
-    0x4e9fb24d, 0x4e9abcec,
-  0x4e95c75b, 0x4e90d199, 0x4e8bdba6, 0x4e86e583, 0x4e81ef30, 0x4e7cf8ac,
-    0x4e7801f8, 0x4e730b14,
-  0x4e6e13ff, 0x4e691cba, 0x4e642544, 0x4e5f2d9e, 0x4e5a35c7, 0x4e553dc1,
-    0x4e50458a, 0x4e4b4d22,
-  0x4e46548b, 0x4e415bc3, 0x4e3c62cb, 0x4e3769a2, 0x4e32704a, 0x4e2d76c1,
-    0x4e287d08, 0x4e23831e,
-  0x4e1e8905, 0x4e198ebb, 0x4e149441, 0x4e0f9997, 0x4e0a9ebd, 0x4e05a3b2,
-    0x4e00a878, 0x4dfbad0d,
-  0x4df6b173, 0x4df1b5a8, 0x4decb9ad, 0x4de7bd82, 0x4de2c127, 0x4dddc49c,
-    0x4dd8c7e1, 0x4dd3caf6,
-  0x4dcecdda, 0x4dc9d08f, 0x4dc4d314, 0x4dbfd569, 0x4dbad78e, 0x4db5d983,
-    0x4db0db48, 0x4dabdcdd,
-  0x4da6de43, 0x4da1df78, 0x4d9ce07d, 0x4d97e153, 0x4d92e1f9, 0x4d8de26f,
-    0x4d88e2b5, 0x4d83e2cb,
-  0x4d7ee2b1, 0x4d79e268, 0x4d74e1ef, 0x4d6fe146, 0x4d6ae06d, 0x4d65df64,
-    0x4d60de2c, 0x4d5bdcc4,
-  0x4d56db2d, 0x4d51d965, 0x4d4cd76e, 0x4d47d547, 0x4d42d2f1, 0x4d3dd06b,
-    0x4d38cdb5, 0x4d33cad0,
-  0x4d2ec7bb, 0x4d29c476, 0x4d24c102, 0x4d1fbd5e, 0x4d1ab98b, 0x4d15b588,
-    0x4d10b155, 0x4d0bacf3,
-  0x4d06a862, 0x4d01a3a0, 0x4cfc9eb0, 0x4cf79990, 0x4cf29440, 0x4ced8ec1,
-    0x4ce88913, 0x4ce38335,
-  0x4cde7d28, 0x4cd976eb, 0x4cd4707f, 0x4ccf69e3, 0x4cca6318, 0x4cc55c1e,
-    0x4cc054f4, 0x4cbb4d9b,
-  0x4cb64613, 0x4cb13e5b, 0x4cac3674, 0x4ca72e5e, 0x4ca22619, 0x4c9d1da4,
-    0x4c981500, 0x4c930c2d,
-  0x4c8e032a, 0x4c88f9f8, 0x4c83f097, 0x4c7ee707, 0x4c79dd48, 0x4c74d359,
-    0x4c6fc93b, 0x4c6abeef,
-  0x4c65b473, 0x4c60a9c8, 0x4c5b9eed, 0x4c5693e4, 0x4c5188ac, 0x4c4c7d44,
-    0x4c4771ae, 0x4c4265e8,
-  0x4c3d59f3, 0x4c384dd0, 0x4c33417d, 0x4c2e34fb, 0x4c29284b, 0x4c241b6b,
-    0x4c1f0e5c, 0x4c1a011f,
-  0x4c14f3b2, 0x4c0fe617, 0x4c0ad84c, 0x4c05ca53, 0x4c00bc2b, 0x4bfbadd4,
-    0x4bf69f4e, 0x4bf19099,
-  0x4bec81b5, 0x4be772a3, 0x4be26362, 0x4bdd53f2, 0x4bd84453, 0x4bd33485,
-    0x4bce2488, 0x4bc9145d,
-  0x4bc40403, 0x4bbef37b, 0x4bb9e2c3, 0x4bb4d1dd, 0x4bafc0c8, 0x4baaaf85,
-    0x4ba59e12, 0x4ba08c72,
-  0x4b9b7aa2, 0x4b9668a4, 0x4b915677, 0x4b8c441c, 0x4b873192, 0x4b821ed9,
-    0x4b7d0bf2, 0x4b77f8dc,
-  0x4b72e598, 0x4b6dd225, 0x4b68be84, 0x4b63aab4, 0x4b5e96b6, 0x4b598289,
-    0x4b546e2d, 0x4b4f59a4,
-  0x4b4a44eb, 0x4b453005, 0x4b401aef, 0x4b3b05ac, 0x4b35f03a, 0x4b30da9a,
-    0x4b2bc4cb, 0x4b26aece,
-  0x4b2198a2, 0x4b1c8248, 0x4b176bc0, 0x4b12550a, 0x4b0d3e25, 0x4b082712,
-    0x4b030fd1, 0x4afdf861,
-  0x4af8e0c3, 0x4af3c8f7, 0x4aeeb0fd, 0x4ae998d4, 0x4ae4807d, 0x4adf67f8,
-    0x4ada4f45, 0x4ad53664,
-  0x4ad01d54, 0x4acb0417, 0x4ac5eaab, 0x4ac0d111, 0x4abbb749, 0x4ab69d53,
-    0x4ab1832f, 0x4aac68dc,
-  0x4aa74e5c, 0x4aa233ae, 0x4a9d18d1, 0x4a97fdc7, 0x4a92e28e, 0x4a8dc728,
-    0x4a88ab93, 0x4a838fd1,
-  0x4a7e73e0, 0x4a7957c2, 0x4a743b76, 0x4a6f1efc, 0x4a6a0253, 0x4a64e57d,
-    0x4a5fc879, 0x4a5aab48,
-  0x4a558de8, 0x4a50705a, 0x4a4b529f, 0x4a4634b6, 0x4a41169f, 0x4a3bf85a,
-    0x4a36d9e7, 0x4a31bb47,
-  0x4a2c9c79, 0x4a277d7d, 0x4a225e53, 0x4a1d3efc, 0x4a181f77, 0x4a12ffc4,
-    0x4a0ddfe4, 0x4a08bfd5,
-  0x4a039f9a, 0x49fe7f30, 0x49f95e99, 0x49f43dd4, 0x49ef1ce2, 0x49e9fbc2,
-    0x49e4da74, 0x49dfb8f9,
-  0x49da9750, 0x49d5757a, 0x49d05376, 0x49cb3145, 0x49c60ee6, 0x49c0ec59,
-    0x49bbc9a0, 0x49b6a6b8,
-  0x49b183a3, 0x49ac6061, 0x49a73cf1, 0x49a21954, 0x499cf589, 0x4997d191,
-    0x4992ad6c, 0x498d8919,
-  0x49886499, 0x49833fec, 0x497e1b11, 0x4978f609, 0x4973d0d3, 0x496eab70,
-    0x496985e0, 0x49646023,
-  0x495f3a38, 0x495a1420, 0x4954eddb, 0x494fc768, 0x494aa0c9, 0x494579fc,
-    0x49405302, 0x493b2bdb,
-  0x49360486, 0x4930dd05, 0x492bb556, 0x49268d7a, 0x49216571, 0x491c3d3b,
-    0x491714d8, 0x4911ec47,
-  0x490cc38a, 0x49079aa0, 0x49027188, 0x48fd4844, 0x48f81ed2, 0x48f2f534,
-    0x48edcb68, 0x48e8a170,
-  0x48e3774a, 0x48de4cf8, 0x48d92278, 0x48d3f7cc, 0x48ceccf3, 0x48c9a1ed,
-    0x48c476b9, 0x48bf4b59,
-  0x48ba1fcd, 0x48b4f413, 0x48afc82c, 0x48aa9c19, 0x48a56fd9, 0x48a0436c,
-    0x489b16d2, 0x4895ea0b,
-  0x4890bd18, 0x488b8ff8, 0x488662ab, 0x48813531, 0x487c078b, 0x4876d9b8,
-    0x4871abb8, 0x486c7d8c,
-  0x48674f33, 0x486220ad, 0x485cf1fa, 0x4857c31b, 0x48529410, 0x484d64d7,
-    0x48483572, 0x484305e1,
-  0x483dd623, 0x4838a638, 0x48337621, 0x482e45dd, 0x4829156d, 0x4823e4d0,
-    0x481eb407, 0x48198311,
-  0x481451ef, 0x480f20a0, 0x4809ef25, 0x4804bd7e, 0x47ff8baa, 0x47fa59a9,
-    0x47f5277d, 0x47eff523,
-  0x47eac29e, 0x47e58fec, 0x47e05d0e, 0x47db2a03, 0x47d5f6cc, 0x47d0c369,
-    0x47cb8fd9, 0x47c65c1d,
-  0x47c12835, 0x47bbf421, 0x47b6bfe0, 0x47b18b74, 0x47ac56da, 0x47a72215,
-    0x47a1ed24, 0x479cb806,
-  0x479782bc, 0x47924d46, 0x478d17a4, 0x4787e1d6, 0x4782abdb, 0x477d75b5,
-    0x47783f62, 0x477308e3,
-  0x476dd239, 0x47689b62, 0x4763645f, 0x475e2d30, 0x4758f5d5, 0x4753be4e,
-    0x474e869b, 0x47494ebc,
-  0x474416b1, 0x473ede7a, 0x4739a617, 0x47346d89, 0x472f34ce, 0x4729fbe7,
-    0x4724c2d5, 0x471f8996,
-  0x471a502c, 0x47151696, 0x470fdcd4, 0x470aa2e6, 0x470568cd, 0x47002e87,
-    0x46faf416, 0x46f5b979,
-  0x46f07eb0, 0x46eb43bc, 0x46e6089b, 0x46e0cd4f, 0x46db91d8, 0x46d65634,
-    0x46d11a65, 0x46cbde6a,
-  0x46c6a244, 0x46c165f1, 0x46bc2974, 0x46b6ecca, 0x46b1aff5, 0x46ac72f4,
-    0x46a735c8, 0x46a1f870,
-  0x469cbaed, 0x46977d3e, 0x46923f63, 0x468d015d, 0x4687c32c, 0x468284cf,
-    0x467d4646, 0x46780792,
-  0x4672c8b3, 0x466d89a8, 0x46684a71, 0x46630b0f, 0x465dcb82, 0x46588bc9,
-    0x46534be5, 0x464e0bd6,
-  0x4648cb9b, 0x46438b35, 0x463e4aa3, 0x463909e7, 0x4633c8fe, 0x462e87eb,
-    0x462946ac, 0x46240542,
-  0x461ec3ad, 0x461981ec, 0x46144001, 0x460efde9, 0x4609bba7, 0x4604793a,
-    0x45ff36a1, 0x45f9f3dd,
-  0x45f4b0ee, 0x45ef6dd4, 0x45ea2a8f, 0x45e4e71f, 0x45dfa383, 0x45da5fbc,
-    0x45d51bcb, 0x45cfd7ae,
-  0x45ca9366, 0x45c54ef3, 0x45c00a55, 0x45bac58c, 0x45b58098, 0x45b03b79,
-    0x45aaf630, 0x45a5b0bb,
-  0x45a06b1b, 0x459b2550, 0x4595df5a, 0x45909939, 0x458b52ee, 0x45860c77,
-    0x4580c5d6, 0x457b7f0a,
-  0x45763813, 0x4570f0f1, 0x456ba9a4, 0x4566622c, 0x45611a8a, 0x455bd2bc,
-    0x45568ac4, 0x455142a2,
-  0x454bfa54, 0x4546b1dc, 0x45416939, 0x453c206b, 0x4536d773, 0x45318e4f,
-    0x452c4502, 0x4526fb89,
-  0x4521b1e6, 0x451c6818, 0x45171e20, 0x4511d3fd, 0x450c89af, 0x45073f37,
-    0x4501f494, 0x44fca9c6,
-  0x44f75ecf, 0x44f213ac, 0x44ecc85f, 0x44e77ce7, 0x44e23145, 0x44dce579,
-    0x44d79982, 0x44d24d60,
-  0x44cd0114, 0x44c7b49e, 0x44c267fd, 0x44bd1b32, 0x44b7ce3c, 0x44b2811c,
-    0x44ad33d2, 0x44a7e65d,
-  0x44a298be, 0x449d4af5, 0x4497fd01, 0x4492aee3, 0x448d609b, 0x44881228,
-    0x4482c38b, 0x447d74c4,
-  0x447825d2, 0x4472d6b7, 0x446d8771, 0x44683801, 0x4462e866, 0x445d98a2,
-    0x445848b3, 0x4452f89b,
-  0x444da858, 0x444857ea, 0x44430753, 0x443db692, 0x443865a7, 0x44331491,
-    0x442dc351, 0x442871e8,
-  0x44232054, 0x441dce96, 0x44187caf, 0x44132a9d, 0x440dd861, 0x440885fc,
-    0x4403336c, 0x43fde0b2,
-  0x43f88dcf, 0x43f33ac1, 0x43ede78a, 0x43e89429, 0x43e3409d, 0x43ddece8,
-    0x43d8990a, 0x43d34501,
-  0x43cdf0ce, 0x43c89c72, 0x43c347eb, 0x43bdf33b, 0x43b89e62, 0x43b3495e,
-    0x43adf431, 0x43a89ed9,
-  0x43a34959, 0x439df3ae, 0x43989dda, 0x439347dc, 0x438df1b4, 0x43889b63,
-    0x438344e8, 0x437dee43,
-  0x43789775, 0x4373407d, 0x436de95b, 0x43689210, 0x43633a9c, 0x435de2fd,
-    0x43588b36, 0x43533344,
-  0x434ddb29, 0x434882e5, 0x43432a77, 0x433dd1e0, 0x4338791f, 0x43332035,
-    0x432dc721, 0x43286de4,
-  0x4323147d, 0x431dbaed, 0x43186133, 0x43130751, 0x430dad44, 0x4308530f,
-    0x4302f8b0, 0x42fd9e28,
-  0x42f84376, 0x42f2e89b, 0x42ed8d97, 0x42e83269, 0x42e2d713, 0x42dd7b93,
-    0x42d81fe9, 0x42d2c417,
-  0x42cd681b, 0x42c80bf6, 0x42c2afa8, 0x42bd5331, 0x42b7f690, 0x42b299c7,
-    0x42ad3cd4, 0x42a7dfb8,
-  0x42a28273, 0x429d2505, 0x4297c76e, 0x429269ae, 0x428d0bc4, 0x4287adb2,
-    0x42824f76, 0x427cf112,
-  0x42779285, 0x427233ce, 0x426cd4ef, 0x426775e6, 0x426216b5, 0x425cb75a,
-    0x425757d7, 0x4251f82b,
-  0x424c9856, 0x42473858, 0x4241d831, 0x423c77e1, 0x42371769, 0x4231b6c7,
-    0x422c55fd, 0x4226f50a,
-  0x422193ee, 0x421c32a9, 0x4216d13c, 0x42116fa5, 0x420c0de6, 0x4206abfe,
-    0x420149ee, 0x41fbe7b5,
-  0x41f68553, 0x41f122c8, 0x41ebc015, 0x41e65d39, 0x41e0fa35, 0x41db9707,
-    0x41d633b1, 0x41d0d033,
-  0x41cb6c8c, 0x41c608bc, 0x41c0a4c4, 0x41bb40a3, 0x41b5dc5a, 0x41b077e8,
-    0x41ab134e, 0x41a5ae8b,
-  0x41a049a0, 0x419ae48c, 0x41957f4f, 0x419019eb, 0x418ab45d, 0x41854ea8,
-    0x417fe8ca, 0x417a82c3,
-  0x41751c94, 0x416fb63d, 0x416a4fbd, 0x4164e916, 0x415f8245, 0x415a1b4d,
-    0x4154b42c, 0x414f4ce2,
-  0x4149e571, 0x41447dd7, 0x413f1615, 0x4139ae2b, 0x41344618, 0x412edddd,
-    0x4129757b, 0x41240cef,
-  0x411ea43c, 0x41193b61, 0x4113d25d, 0x410e6931, 0x4108ffdd, 0x41039661,
-    0x40fe2cbd, 0x40f8c2f1,
-  0x40f358fc, 0x40edeee0, 0x40e8849b, 0x40e31a2f, 0x40ddaf9b, 0x40d844de,
-    0x40d2d9f9, 0x40cd6eed,
-  0x40c803b8, 0x40c2985c, 0x40bd2cd8, 0x40b7c12b, 0x40b25557, 0x40ace95b,
-    0x40a77d37, 0x40a210eb,
-  0x409ca477, 0x409737dc, 0x4091cb18, 0x408c5e2d, 0x4086f11a, 0x408183df,
-    0x407c167c, 0x4076a8f1,
-  0x40713b3f, 0x406bcd65, 0x40665f63, 0x4060f13a, 0x405b82e9, 0x40561470,
-    0x4050a5cf, 0x404b3707,
-  0x4045c817, 0x404058ff, 0x403ae9c0, 0x40357a59, 0x40300acb, 0x402a9b15,
-    0x40252b37, 0x401fbb32,
-  0x401a4b05, 0x4014dab1, 0x400f6a35, 0x4009f992, 0x400488c7, 0x3fff17d5,
-    0x3ff9a6bb, 0x3ff4357a,
-  0x3feec411, 0x3fe95281, 0x3fe3e0c9, 0x3fde6eeb, 0x3fd8fce4, 0x3fd38ab6,
-    0x3fce1861, 0x3fc8a5e5,
-  0x3fc33341, 0x3fbdc076, 0x3fb84d83, 0x3fb2da6a, 0x3fad6729, 0x3fa7f3c0,
-    0x3fa28031, 0x3f9d0c7a,
-  0x3f97989c, 0x3f922496, 0x3f8cb06a, 0x3f873c16, 0x3f81c79b, 0x3f7c52f9,
-    0x3f76de30, 0x3f71693f,
-  0x3f6bf428, 0x3f667ee9, 0x3f610983, 0x3f5b93f6, 0x3f561e42, 0x3f50a867,
-    0x3f4b3265, 0x3f45bc3c,
-  0x3f4045ec, 0x3f3acf75, 0x3f3558d7, 0x3f2fe211, 0x3f2a6b25, 0x3f24f412,
-    0x3f1f7cd8, 0x3f1a0577,
-  0x3f148def, 0x3f0f1640, 0x3f099e6b, 0x3f04266e, 0x3efeae4a, 0x3ef93600,
-    0x3ef3bd8f, 0x3eee44f7,
-  0x3ee8cc38, 0x3ee35352, 0x3eddda46, 0x3ed86113, 0x3ed2e7b9, 0x3ecd6e38,
-    0x3ec7f491, 0x3ec27ac2,
-  0x3ebd00cd, 0x3eb786b2, 0x3eb20c6f, 0x3eac9206, 0x3ea71777, 0x3ea19cc1,
-    0x3e9c21e4, 0x3e96a6e0,
-  0x3e912bb6, 0x3e8bb065, 0x3e8634ee, 0x3e80b950, 0x3e7b3d8c, 0x3e75c1a1,
-    0x3e70458f, 0x3e6ac957,
-  0x3e654cf8, 0x3e5fd073, 0x3e5a53c8, 0x3e54d6f6, 0x3e4f59fe, 0x3e49dcdf,
-    0x3e445f99, 0x3e3ee22e,
-  0x3e39649c, 0x3e33e6e3, 0x3e2e6904, 0x3e28eaff, 0x3e236cd4, 0x3e1dee82,
-    0x3e18700a, 0x3e12f16b,
-  0x3e0d72a6, 0x3e07f3bb, 0x3e0274aa, 0x3dfcf572, 0x3df77615, 0x3df1f691,
-    0x3dec76e6, 0x3de6f716,
-  0x3de1771f, 0x3ddbf703, 0x3dd676c0, 0x3dd0f656, 0x3dcb75c7, 0x3dc5f512,
-    0x3dc07436, 0x3dbaf335,
-  0x3db5720d, 0x3daff0c0, 0x3daa6f4c, 0x3da4edb2, 0x3d9f6bf2, 0x3d99ea0d,
-    0x3d946801, 0x3d8ee5cf,
-  0x3d896377, 0x3d83e0f9, 0x3d7e5e56, 0x3d78db8c, 0x3d73589d, 0x3d6dd587,
-    0x3d68524c, 0x3d62ceeb,
-  0x3d5d4b64, 0x3d57c7b7, 0x3d5243e4, 0x3d4cbfeb, 0x3d473bcd, 0x3d41b789,
-    0x3d3c331f, 0x3d36ae8f,
-  0x3d3129da, 0x3d2ba4fe, 0x3d261ffd, 0x3d209ad7, 0x3d1b158a, 0x3d159018,
-    0x3d100a80, 0x3d0a84c3,
-  0x3d04fee0, 0x3cff78d7, 0x3cf9f2a9, 0x3cf46c55, 0x3ceee5db, 0x3ce95f3c,
-    0x3ce3d877, 0x3cde518d,
-  0x3cd8ca7d, 0x3cd34347, 0x3ccdbbed, 0x3cc8346c, 0x3cc2acc6, 0x3cbd24fb,
-    0x3cb79d0a, 0x3cb214f4,
-  0x3cac8cb8, 0x3ca70457, 0x3ca17bd0, 0x3c9bf324, 0x3c966a53, 0x3c90e15c,
-    0x3c8b5840, 0x3c85cefe,
-  0x3c804598, 0x3c7abc0c, 0x3c75325a, 0x3c6fa883, 0x3c6a1e87, 0x3c649466,
-    0x3c5f0a20, 0x3c597fb4,
-  0x3c53f523, 0x3c4e6a6d, 0x3c48df91, 0x3c435491, 0x3c3dc96b, 0x3c383e20,
-    0x3c32b2b0, 0x3c2d271b,
-  0x3c279b61, 0x3c220f81, 0x3c1c837d, 0x3c16f753, 0x3c116b04, 0x3c0bde91,
-    0x3c0651f8, 0x3c00c53a,
-  0x3bfb3857, 0x3bf5ab50, 0x3bf01e23, 0x3bea90d1, 0x3be5035a, 0x3bdf75bf,
-    0x3bd9e7fe, 0x3bd45a19,
-  0x3bcecc0e, 0x3bc93ddf, 0x3bc3af8b, 0x3bbe2112, 0x3bb89274, 0x3bb303b1,
-    0x3bad74c9, 0x3ba7e5bd,
-  0x3ba2568c, 0x3b9cc736, 0x3b9737bb, 0x3b91a81c, 0x3b8c1857, 0x3b86886e,
-    0x3b80f861, 0x3b7b682e,
-  0x3b75d7d7, 0x3b70475c, 0x3b6ab6bb, 0x3b6525f6, 0x3b5f950c, 0x3b5a03fe,
-    0x3b5472cb, 0x3b4ee173,
-  0x3b494ff7, 0x3b43be57, 0x3b3e2c91, 0x3b389aa8, 0x3b330899, 0x3b2d7666,
-    0x3b27e40f, 0x3b225193,
-  0x3b1cbef3, 0x3b172c2e, 0x3b119945, 0x3b0c0637, 0x3b067305, 0x3b00dfaf,
-    0x3afb4c34, 0x3af5b894,
-  0x3af024d1, 0x3aea90e9, 0x3ae4fcdc, 0x3adf68ac, 0x3ad9d457, 0x3ad43fdd,
-    0x3aceab40, 0x3ac9167e,
-  0x3ac38198, 0x3abdec8d, 0x3ab8575f, 0x3ab2c20c, 0x3aad2c95, 0x3aa796fa,
-    0x3aa2013a, 0x3a9c6b57,
-  0x3a96d54f, 0x3a913f23, 0x3a8ba8d3, 0x3a86125f, 0x3a807bc7, 0x3a7ae50a,
-    0x3a754e2a, 0x3a6fb726,
-  0x3a6a1ffd, 0x3a6488b1, 0x3a5ef140, 0x3a5959ab, 0x3a53c1f3, 0x3a4e2a16,
-    0x3a489216, 0x3a42f9f2,
-  0x3a3d61a9, 0x3a37c93d, 0x3a3230ad, 0x3a2c97f9, 0x3a26ff21, 0x3a216625,
-    0x3a1bcd05, 0x3a1633c1,
-  0x3a109a5a, 0x3a0b00cf, 0x3a056720, 0x39ffcd4d, 0x39fa3356, 0x39f4993c,
-    0x39eefefe, 0x39e9649c,
-  0x39e3ca17, 0x39de2f6d, 0x39d894a0, 0x39d2f9b0, 0x39cd5e9b, 0x39c7c363,
-    0x39c22808, 0x39bc8c89,
-  0x39b6f0e6, 0x39b1551f, 0x39abb935, 0x39a61d28, 0x39a080f6, 0x399ae4a2,
-    0x39954829, 0x398fab8e,
-  0x398a0ece, 0x398471ec, 0x397ed4e5, 0x397937bc, 0x39739a6e, 0x396dfcfe,
-    0x39685f6a, 0x3962c1b2,
-  0x395d23d7, 0x395785d9, 0x3951e7b8, 0x394c4973, 0x3946ab0a, 0x39410c7f,
-    0x393b6dd0, 0x3935cefd,
-  0x39303008, 0x392a90ef, 0x3924f1b3, 0x391f5254, 0x3919b2d1, 0x3914132b,
-    0x390e7362, 0x3908d376,
-  0x39033367, 0x38fd9334, 0x38f7f2de, 0x38f25266, 0x38ecb1ca, 0x38e7110a,
-    0x38e17028, 0x38dbcf23,
-  0x38d62dfb, 0x38d08caf, 0x38caeb41, 0x38c549af, 0x38bfa7fb, 0x38ba0623,
-    0x38b46429, 0x38aec20b,
-  0x38a91fcb, 0x38a37d67, 0x389ddae1, 0x38983838, 0x3892956c, 0x388cf27d,
-    0x38874f6b, 0x3881ac36,
-  0x387c08de, 0x38766564, 0x3870c1c6, 0x386b1e06, 0x38657a23, 0x385fd61d,
-    0x385a31f5, 0x38548daa,
-  0x384ee93b, 0x384944ab, 0x38439ff7, 0x383dfb21, 0x38385628, 0x3832b10d,
-    0x382d0bce, 0x3827666d,
-  0x3821c0ea, 0x381c1b44, 0x3816757b, 0x3810cf90, 0x380b2982, 0x38058351,
-    0x37ffdcfe, 0x37fa3688,
-  0x37f48ff0, 0x37eee936, 0x37e94259, 0x37e39b59, 0x37ddf437, 0x37d84cf2,
-    0x37d2a58b, 0x37ccfe02,
-  0x37c75656, 0x37c1ae87, 0x37bc0697, 0x37b65e84, 0x37b0b64e, 0x37ab0df6,
-    0x37a5657c, 0x379fbce0,
-  0x379a1421, 0x37946b40, 0x378ec23d, 0x37891917, 0x37836fcf, 0x377dc665,
-    0x37781cd9, 0x3772732a,
-  0x376cc959, 0x37671f66, 0x37617551, 0x375bcb1a, 0x375620c1, 0x37507645,
-    0x374acba7, 0x374520e7,
-  0x373f7606, 0x3739cb02, 0x37341fdc, 0x372e7493, 0x3728c929, 0x37231d9d,
-    0x371d71ef, 0x3717c61f,
-  0x37121a2d, 0x370c6e19, 0x3706c1e2, 0x3701158a, 0x36fb6910, 0x36f5bc75,
-    0x36f00fb7, 0x36ea62d7,
-  0x36e4b5d6, 0x36df08b2, 0x36d95b6d, 0x36d3ae06, 0x36ce007d, 0x36c852d2,
-    0x36c2a506, 0x36bcf718,
-  0x36b74908, 0x36b19ad6, 0x36abec82, 0x36a63e0d, 0x36a08f76, 0x369ae0bd,
-    0x369531e3, 0x368f82e7,
-  0x3689d3c9, 0x3684248a, 0x367e7529, 0x3678c5a7, 0x36731602, 0x366d663d,
-    0x3667b655, 0x3662064c,
-  0x365c5622, 0x3656a5d6, 0x3650f569, 0x364b44da, 0x36459429, 0x363fe357,
-    0x363a3264, 0x3634814f,
-  0x362ed019, 0x36291ec1, 0x36236d48, 0x361dbbad, 0x361809f1, 0x36125814,
-    0x360ca615, 0x3606f3f5,
-  0x360141b4, 0x35fb8f52, 0x35f5dcce, 0x35f02a28, 0x35ea7762, 0x35e4c47a,
-    0x35df1171, 0x35d95e47,
-  0x35d3aafc, 0x35cdf78f, 0x35c84401, 0x35c29052, 0x35bcdc82, 0x35b72891,
-    0x35b1747e, 0x35abc04b,
-  0x35a60bf6, 0x35a05781, 0x359aa2ea, 0x3594ee32, 0x358f3959, 0x3589845f,
-    0x3583cf44, 0x357e1a08,
-  0x357864ab, 0x3572af2d, 0x356cf98e, 0x356743ce, 0x35618ded, 0x355bd7eb,
-    0x355621c9, 0x35506b85,
-  0x354ab520, 0x3544fe9b, 0x353f47f5, 0x3539912e, 0x3533da46, 0x352e233d,
-    0x35286c14, 0x3522b4c9,
-  0x351cfd5e, 0x351745d2, 0x35118e26, 0x350bd658, 0x35061e6a, 0x3500665c,
-    0x34faae2c, 0x34f4f5dc,
-  0x34ef3d6b, 0x34e984da, 0x34e3cc28, 0x34de1355, 0x34d85a62, 0x34d2a14e,
-    0x34cce819, 0x34c72ec4,
-  0x34c1754e, 0x34bbbbb8, 0x34b60202, 0x34b0482a, 0x34aa8e33, 0x34a4d41a,
-    0x349f19e2, 0x34995f88,
-  0x3493a50f, 0x348dea75, 0x34882fba, 0x348274e0, 0x347cb9e4, 0x3476fec9,
-    0x3471438d, 0x346b8830,
-  0x3465ccb4, 0x34601117, 0x345a5559, 0x3454997c, 0x344edd7e, 0x34492160,
-    0x34436521, 0x343da8c3,
-  0x3437ec44, 0x34322fa5, 0x342c72e6, 0x3426b606, 0x3420f907, 0x341b3be7,
-    0x34157ea7, 0x340fc147,
-  0x340a03c7, 0x34044626, 0x33fe8866, 0x33f8ca86, 0x33f30c85, 0x33ed4e65,
-    0x33e79024, 0x33e1d1c4,
-  0x33dc1343, 0x33d654a2, 0x33d095e2, 0x33cad701, 0x33c51801, 0x33bf58e1,
-    0x33b999a0, 0x33b3da40,
-  0x33ae1ac0, 0x33a85b20, 0x33a29b60, 0x339cdb81, 0x33971b81, 0x33915b62,
-    0x338b9b22, 0x3385dac4,
-  0x33801a45, 0x337a59a6, 0x337498e8, 0x336ed80a, 0x3369170c, 0x336355ef,
-    0x335d94b2, 0x3357d355,
-  0x335211d8, 0x334c503c, 0x33468e80, 0x3340cca5, 0x333b0aaa, 0x3335488f,
-    0x332f8655, 0x3329c3fb,
-  0x33240182, 0x331e3ee9, 0x33187c31, 0x3312b959, 0x330cf661, 0x3307334a,
-    0x33017014, 0x32fbacbe,
-  0x32f5e948, 0x32f025b4, 0x32ea61ff, 0x32e49e2c, 0x32deda39, 0x32d91626,
-    0x32d351f5, 0x32cd8da4,
-  0x32c7c933, 0x32c204a3, 0x32bc3ff4, 0x32b67b26, 0x32b0b638, 0x32aaf12b,
-    0x32a52bff, 0x329f66b4,
-  0x3299a149, 0x3293dbbf, 0x328e1616, 0x3288504e, 0x32828a67, 0x327cc460,
-    0x3276fe3a, 0x327137f6,
-  0x326b7192, 0x3265ab0f, 0x325fe46c, 0x325a1dab, 0x325456cb, 0x324e8fcc,
-    0x3248c8ad, 0x32430170,
-  0x323d3a14, 0x32377298, 0x3231aafe, 0x322be345, 0x32261b6c, 0x32205375,
-    0x321a8b5f, 0x3214c32a,
-  0x320efad6, 0x32093263, 0x320369d2, 0x31fda121, 0x31f7d852, 0x31f20f64,
-    0x31ec4657, 0x31e67d2b,
-  0x31e0b3e0, 0x31daea77, 0x31d520ef, 0x31cf5748, 0x31c98d83, 0x31c3c39e,
-    0x31bdf99b, 0x31b82f7a,
-  0x31b2653a, 0x31ac9adb, 0x31a6d05d, 0x31a105c1, 0x319b3b06, 0x3195702d,
-    0x318fa535, 0x3189da1e,
-  0x31840ee9, 0x317e4395, 0x31787823, 0x3172ac92, 0x316ce0e3, 0x31671515,
-    0x31614929, 0x315b7d1e,
-  0x3155b0f5, 0x314fe4ae, 0x314a1848, 0x31444bc3, 0x313e7f21, 0x3138b260,
-    0x3132e580, 0x312d1882,
-  0x31274b66, 0x31217e2c, 0x311bb0d3, 0x3115e35c, 0x311015c6, 0x310a4813,
-    0x31047a41, 0x30feac51,
-  0x30f8de42, 0x30f31016, 0x30ed41cb, 0x30e77362, 0x30e1a4db, 0x30dbd636,
-    0x30d60772, 0x30d03891,
-  0x30ca6991, 0x30c49a74, 0x30becb38, 0x30b8fbde, 0x30b32c66, 0x30ad5cd0,
-    0x30a78d1c, 0x30a1bd4a,
-  0x309bed5a, 0x30961d4c, 0x30904d20, 0x308a7cd6, 0x3084ac6e, 0x307edbe9,
-    0x30790b45, 0x30733a83,
-  0x306d69a4, 0x306798a7, 0x3061c78b, 0x305bf652, 0x305624fb, 0x30505387,
-    0x304a81f4, 0x3044b044,
-  0x303ede76, 0x30390c8a, 0x30333a80, 0x302d6859, 0x30279614, 0x3021c3b1,
-    0x301bf131, 0x30161e93,
-  0x30104bd7, 0x300a78fe, 0x3004a607, 0x2ffed2f2, 0x2ff8ffc0, 0x2ff32c70,
-    0x2fed5902, 0x2fe78577,
-  0x2fe1b1cf, 0x2fdbde09, 0x2fd60a25, 0x2fd03624, 0x2fca6206, 0x2fc48dc9,
-    0x2fbeb970, 0x2fb8e4f9,
-  0x2fb31064, 0x2fad3bb3, 0x2fa766e3, 0x2fa191f7, 0x2f9bbced, 0x2f95e7c5,
-    0x2f901280, 0x2f8a3d1e,
-  0x2f84679f, 0x2f7e9202, 0x2f78bc48, 0x2f72e671, 0x2f6d107c, 0x2f673a6a,
-    0x2f61643b, 0x2f5b8def,
-  0x2f55b785, 0x2f4fe0ff, 0x2f4a0a5b, 0x2f44339a, 0x2f3e5cbb, 0x2f3885c0,
-    0x2f32aea8, 0x2f2cd772,
-  0x2f27001f, 0x2f2128af, 0x2f1b5122, 0x2f157979, 0x2f0fa1b2, 0x2f09c9ce,
-    0x2f03f1cd, 0x2efe19ae,
-  0x2ef84173, 0x2ef2691b, 0x2eec90a7, 0x2ee6b815, 0x2ee0df66, 0x2edb069a,
-    0x2ed52db1, 0x2ecf54ac,
-  0x2ec97b89, 0x2ec3a24a, 0x2ebdc8ee, 0x2eb7ef75, 0x2eb215df, 0x2eac3c2d,
-    0x2ea6625d, 0x2ea08871,
-  0x2e9aae68, 0x2e94d443, 0x2e8efa00, 0x2e891fa1, 0x2e834525, 0x2e7d6a8d,
-    0x2e778fd8, 0x2e71b506,
-  0x2e6bda17, 0x2e65ff0c, 0x2e6023e5, 0x2e5a48a0, 0x2e546d3f, 0x2e4e91c2,
-    0x2e48b628, 0x2e42da71,
-  0x2e3cfe9e, 0x2e3722ae, 0x2e3146a2, 0x2e2b6a79, 0x2e258e34, 0x2e1fb1d3,
-    0x2e19d554, 0x2e13f8ba,
-  0x2e0e1c03, 0x2e083f30, 0x2e026240, 0x2dfc8534, 0x2df6a80b, 0x2df0cac6,
-    0x2deaed65, 0x2de50fe8,
-  0x2ddf324e, 0x2dd95498, 0x2dd376c5, 0x2dcd98d7, 0x2dc7bacc, 0x2dc1dca4,
-    0x2dbbfe61, 0x2db62001,
-  0x2db04186, 0x2daa62ee, 0x2da4843a, 0x2d9ea569, 0x2d98c67d, 0x2d92e774,
-    0x2d8d084f, 0x2d87290f,
-  0x2d8149b2, 0x2d7b6a39, 0x2d758aa4, 0x2d6faaf3, 0x2d69cb26, 0x2d63eb3d,
-    0x2d5e0b38, 0x2d582b17,
-  0x2d524ada, 0x2d4c6a81, 0x2d468a0c, 0x2d40a97b, 0x2d3ac8ce, 0x2d34e805,
-    0x2d2f0721, 0x2d292620,
-  0x2d234504, 0x2d1d63cc, 0x2d178278, 0x2d11a108, 0x2d0bbf7d, 0x2d05ddd5,
-    0x2cfffc12, 0x2cfa1a33,
-  0x2cf43839, 0x2cee5622, 0x2ce873f0, 0x2ce291a2, 0x2cdcaf39, 0x2cd6ccb4,
-    0x2cd0ea13, 0x2ccb0756,
-  0x2cc5247e, 0x2cbf418b, 0x2cb95e7b, 0x2cb37b51, 0x2cad980a, 0x2ca7b4a8,
-    0x2ca1d12a, 0x2c9bed91,
-  0x2c9609dd, 0x2c90260d, 0x2c8a4221, 0x2c845e1a, 0x2c7e79f7, 0x2c7895b9,
-    0x2c72b160, 0x2c6ccceb,
-  0x2c66e85b, 0x2c6103af, 0x2c5b1ee8, 0x2c553a06, 0x2c4f5508, 0x2c496fef,
-    0x2c438abb, 0x2c3da56b,
-  0x2c37c000, 0x2c31da7a, 0x2c2bf4d8, 0x2c260f1c, 0x2c202944, 0x2c1a4351,
-    0x2c145d42, 0x2c0e7719,
-  0x2c0890d4, 0x2c02aa74, 0x2bfcc3f9, 0x2bf6dd63, 0x2bf0f6b1, 0x2beb0fe5,
-    0x2be528fd, 0x2bdf41fb,
-  0x2bd95add, 0x2bd373a4, 0x2bcd8c51, 0x2bc7a4e2, 0x2bc1bd58, 0x2bbbd5b3,
-    0x2bb5edf4, 0x2bb00619,
-  0x2baa1e23, 0x2ba43613, 0x2b9e4de7, 0x2b9865a1, 0x2b927d3f, 0x2b8c94c3,
-    0x2b86ac2c, 0x2b80c37a,
-  0x2b7adaae, 0x2b74f1c6, 0x2b6f08c4, 0x2b691fa6, 0x2b63366f, 0x2b5d4d1c,
-    0x2b5763ae, 0x2b517a26,
-  0x2b4b9083, 0x2b45a6c6, 0x2b3fbced, 0x2b39d2fa, 0x2b33e8ed, 0x2b2dfec5,
-    0x2b281482, 0x2b222a24,
-  0x2b1c3fac, 0x2b165519, 0x2b106a6c, 0x2b0a7fa4, 0x2b0494c2, 0x2afea9c5,
-    0x2af8bead, 0x2af2d37b,
-  0x2aece82f, 0x2ae6fcc8, 0x2ae11146, 0x2adb25aa, 0x2ad539f4, 0x2acf4e23,
-    0x2ac96238, 0x2ac37633,
-  0x2abd8a13, 0x2ab79dd8, 0x2ab1b184, 0x2aabc515, 0x2aa5d88b, 0x2a9febe8,
-    0x2a99ff2a, 0x2a941252,
-  0x2a8e255f, 0x2a883853, 0x2a824b2c, 0x2a7c5deb, 0x2a76708f, 0x2a70831a,
-    0x2a6a958a, 0x2a64a7e0,
-  0x2a5eba1c, 0x2a58cc3e, 0x2a52de46, 0x2a4cf033, 0x2a470207, 0x2a4113c0,
-    0x2a3b2560, 0x2a3536e5,
-  0x2a2f4850, 0x2a2959a1, 0x2a236ad9, 0x2a1d7bf6, 0x2a178cf9, 0x2a119de2,
-    0x2a0baeb2, 0x2a05bf67,
-  0x29ffd003, 0x29f9e084, 0x29f3f0ec, 0x29ee013a, 0x29e8116e, 0x29e22188,
-    0x29dc3188, 0x29d6416f,
-  0x29d0513b, 0x29ca60ee, 0x29c47087, 0x29be8007, 0x29b88f6c, 0x29b29eb8,
-    0x29acadea, 0x29a6bd02,
-  0x29a0cc01, 0x299adae6, 0x2994e9b1, 0x298ef863, 0x298906fb, 0x2983157a,
-    0x297d23df, 0x2977322a,
-  0x2971405b, 0x296b4e74, 0x29655c72, 0x295f6a57, 0x29597823, 0x295385d5,
-    0x294d936d, 0x2947a0ec,
-  0x2941ae52, 0x293bbb9e, 0x2935c8d1, 0x292fd5ea, 0x2929e2ea, 0x2923efd0,
-    0x291dfc9d, 0x29180951,
-  0x291215eb, 0x290c226c, 0x29062ed4, 0x29003b23, 0x28fa4758, 0x28f45374,
-    0x28ee5f76, 0x28e86b5f,
-  0x28e27730, 0x28dc82e6, 0x28d68e84, 0x28d09a09, 0x28caa574, 0x28c4b0c6,
-    0x28bebbff, 0x28b8c71f,
-  0x28b2d226, 0x28acdd13, 0x28a6e7e8, 0x28a0f2a3, 0x289afd46, 0x289507cf,
-    0x288f123f, 0x28891c97,
-  0x288326d5, 0x287d30fa, 0x28773b07, 0x287144fa, 0x286b4ed5, 0x28655896,
-    0x285f623f, 0x28596bce,
-  0x28537545, 0x284d7ea3, 0x284787e8, 0x28419114, 0x283b9a28, 0x2835a322,
-    0x282fac04, 0x2829b4cd,
-  0x2823bd7d, 0x281dc615, 0x2817ce93, 0x2811d6f9, 0x280bdf46, 0x2805e77b,
-    0x27ffef97, 0x27f9f79a,
-  0x27f3ff85, 0x27ee0756, 0x27e80f10, 0x27e216b0, 0x27dc1e38, 0x27d625a8,
-    0x27d02cff, 0x27ca343d,
-  0x27c43b63, 0x27be4270, 0x27b84965, 0x27b25041, 0x27ac5705, 0x27a65db0,
-    0x27a06443, 0x279a6abd,
-  0x2794711f, 0x278e7768, 0x27887d99, 0x278283b2, 0x277c89b3, 0x27768f9b,
-    0x2770956a, 0x276a9b21,
-  0x2764a0c0, 0x275ea647, 0x2758abb6, 0x2752b10c, 0x274cb64a, 0x2746bb6f,
-    0x2740c07d, 0x273ac572,
-  0x2734ca4f, 0x272ecf14, 0x2728d3c0, 0x2722d855, 0x271cdcd1, 0x2716e136,
-    0x2710e582, 0x270ae9b6,
-  0x2704edd2, 0x26fef1d5, 0x26f8f5c1, 0x26f2f995, 0x26ecfd51, 0x26e700f5,
-    0x26e10480, 0x26db07f4,
-  0x26d50b50, 0x26cf0e94, 0x26c911c0, 0x26c314d4, 0x26bd17d0, 0x26b71ab4,
-    0x26b11d80, 0x26ab2034,
-  0x26a522d1, 0x269f2556, 0x269927c3, 0x26932a18, 0x268d2c55, 0x26872e7b,
-    0x26813088, 0x267b327e,
-  0x2675345d, 0x266f3623, 0x266937d2, 0x26633969, 0x265d3ae9, 0x26573c50,
-    0x26513da1, 0x264b3ed9,
-  0x26453ffa, 0x263f4103, 0x263941f5, 0x263342cf, 0x262d4392, 0x2627443d,
-    0x262144d0, 0x261b454c,
-  0x261545b0, 0x260f45fd, 0x26094633, 0x26034651, 0x25fd4657, 0x25f74646,
-    0x25f1461e, 0x25eb45de,
-  0x25e54587, 0x25df4519, 0x25d94493, 0x25d343f6, 0x25cd4341, 0x25c74276,
-    0x25c14192, 0x25bb4098,
-  0x25b53f86, 0x25af3e5d, 0x25a93d1d, 0x25a33bc6, 0x259d3a57, 0x259738d1,
-    0x25913734, 0x258b3580,
-  0x258533b5, 0x257f31d2, 0x25792fd8, 0x25732dc8, 0x256d2ba0, 0x25672961,
-    0x2561270b, 0x255b249e,
-  0x2555221a, 0x254f1f7e, 0x25491ccc, 0x25431a03, 0x253d1723, 0x2537142c,
-    0x2531111e, 0x252b0df9,
-  0x25250abd, 0x251f076a, 0x25190400, 0x25130080, 0x250cfce8, 0x2506f93a,
-    0x2500f574, 0x24faf198,
-  0x24f4eda6, 0x24eee99c, 0x24e8e57c, 0x24e2e144, 0x24dcdcf6, 0x24d6d892,
-    0x24d0d416, 0x24cacf84,
-  0x24c4cadb, 0x24bec61c, 0x24b8c146, 0x24b2bc59, 0x24acb756, 0x24a6b23b,
-    0x24a0ad0b, 0x249aa7c4,
-  0x2494a266, 0x248e9cf1, 0x24889766, 0x248291c5, 0x247c8c0d, 0x2476863e,
-    0x24708059, 0x246a7a5e,
-  0x2464744c, 0x245e6e23, 0x245867e4, 0x2452618f, 0x244c5b24, 0x244654a1,
-    0x24404e09, 0x243a475a,
-  0x24344095, 0x242e39ba, 0x242832c8, 0x24222bc0, 0x241c24a1, 0x24161d6d,
-    0x24101622, 0x240a0ec1,
-  0x24040749, 0x23fdffbc, 0x23f7f818, 0x23f1f05e, 0x23ebe88e, 0x23e5e0a7,
-    0x23dfd8ab, 0x23d9d098,
-  0x23d3c86f, 0x23cdc031, 0x23c7b7dc, 0x23c1af71, 0x23bba6f0, 0x23b59e59,
-    0x23af95ac, 0x23a98ce8,
-  0x23a3840f, 0x239d7b20, 0x2397721b, 0x23916900, 0x238b5fcf, 0x23855688,
-    0x237f4d2b, 0x237943b9,
-  0x23733a30, 0x236d3092, 0x236726dd, 0x23611d13, 0x235b1333, 0x2355093e,
-    0x234eff32, 0x2348f511,
-  0x2342eada, 0x233ce08d, 0x2336d62a, 0x2330cbb2, 0x232ac124, 0x2324b680,
-    0x231eabc7, 0x2318a0f8,
-  0x23129613, 0x230c8b19, 0x23068009, 0x230074e3, 0x22fa69a8, 0x22f45e57,
-    0x22ee52f1, 0x22e84775,
-  0x22e23be4, 0x22dc303d, 0x22d62480, 0x22d018ae, 0x22ca0cc7, 0x22c400ca,
-    0x22bdf4b8, 0x22b7e890,
-  0x22b1dc53, 0x22abd001, 0x22a5c399, 0x229fb71b, 0x2299aa89, 0x22939de1,
-    0x228d9123, 0x22878451,
-  0x22817769, 0x227b6a6c, 0x22755d59, 0x226f5032, 0x226942f5, 0x226335a2,
-    0x225d283b, 0x22571abe,
-  0x22510d2d, 0x224aff86, 0x2244f1c9, 0x223ee3f8, 0x2238d612, 0x2232c816,
-    0x222cba06, 0x2226abe0,
-  0x22209da5, 0x221a8f56, 0x221480f1, 0x220e7277, 0x220863e8, 0x22025544,
-    0x21fc468b, 0x21f637be,
-  0x21f028db, 0x21ea19e3, 0x21e40ad7, 0x21ddfbb5, 0x21d7ec7f, 0x21d1dd34,
-    0x21cbcdd3, 0x21c5be5e,
-  0x21bfaed5, 0x21b99f36, 0x21b38f83, 0x21ad7fba, 0x21a76fdd, 0x21a15fec,
-    0x219b4fe5, 0x21953fca,
-  0x218f2f9a, 0x21891f55, 0x21830efc, 0x217cfe8e, 0x2176ee0b, 0x2170dd74,
-    0x216accc8, 0x2164bc08,
-  0x215eab33, 0x21589a49, 0x2152894b, 0x214c7838, 0x21466710, 0x214055d4,
-    0x213a4484, 0x2134331f,
-  0x212e21a6, 0x21281018, 0x2121fe76, 0x211becbf, 0x2115daf4, 0x210fc914,
-    0x2109b720, 0x2103a518,
-  0x20fd92fb, 0x20f780ca, 0x20f16e84, 0x20eb5c2b, 0x20e549bd, 0x20df373a,
-    0x20d924a4, 0x20d311f9,
-  0x20ccff3a, 0x20c6ec66, 0x20c0d97f, 0x20bac683, 0x20b4b373, 0x20aea04f,
-    0x20a88d17, 0x20a279ca,
-  0x209c666a, 0x209652f5, 0x20903f6c, 0x208a2bcf, 0x2084181e, 0x207e0459,
-    0x2077f080, 0x2071dc93,
-  0x206bc892, 0x2065b47d, 0x205fa054, 0x20598c17, 0x205377c6, 0x204d6361,
-    0x20474ee8, 0x20413a5b,
-  0x203b25bb, 0x20351106, 0x202efc3e, 0x2028e761, 0x2022d271, 0x201cbd6d,
-    0x2016a856, 0x2010932a,
-  0x200a7deb, 0x20046898, 0x1ffe5331, 0x1ff83db6, 0x1ff22828, 0x1fec1286,
-    0x1fe5fcd0, 0x1fdfe707,
-  0x1fd9d12a, 0x1fd3bb39, 0x1fcda535, 0x1fc78f1d, 0x1fc178f1, 0x1fbb62b2,
-    0x1fb54c60, 0x1faf35f9,
-  0x1fa91f80, 0x1fa308f2, 0x1f9cf252, 0x1f96db9d, 0x1f90c4d5, 0x1f8aadfa,
-    0x1f84970b, 0x1f7e8009,
-  0x1f7868f4, 0x1f7251ca, 0x1f6c3a8e, 0x1f66233e, 0x1f600bdb, 0x1f59f465,
-    0x1f53dcdb, 0x1f4dc53d,
-  0x1f47ad8d, 0x1f4195c9, 0x1f3b7df2, 0x1f356608, 0x1f2f4e0a, 0x1f2935f9,
-    0x1f231dd5, 0x1f1d059e,
-  0x1f16ed54, 0x1f10d4f6, 0x1f0abc85, 0x1f04a401, 0x1efe8b6a, 0x1ef872c0,
-    0x1ef25a03, 0x1eec4132,
-  0x1ee6284f, 0x1ee00f58, 0x1ed9f64f, 0x1ed3dd32, 0x1ecdc402, 0x1ec7aac0,
-    0x1ec1916a, 0x1ebb7802,
-  0x1eb55e86, 0x1eaf44f8, 0x1ea92b56, 0x1ea311a2, 0x1e9cf7db, 0x1e96de01,
-    0x1e90c414, 0x1e8aaa14,
-  0x1e849001, 0x1e7e75dc, 0x1e785ba3, 0x1e724158, 0x1e6c26fa, 0x1e660c8a,
-    0x1e5ff206, 0x1e59d770,
-  0x1e53bcc7, 0x1e4da20c, 0x1e47873d, 0x1e416c5d, 0x1e3b5169, 0x1e353663,
-    0x1e2f1b4a, 0x1e29001e,
-  0x1e22e4e0, 0x1e1cc990, 0x1e16ae2c, 0x1e1092b6, 0x1e0a772e, 0x1e045b93,
-    0x1dfe3fe6, 0x1df82426,
-  0x1df20853, 0x1debec6f, 0x1de5d077, 0x1ddfb46e, 0x1dd99851, 0x1dd37c23,
-    0x1dcd5fe2, 0x1dc7438e,
-  0x1dc12729, 0x1dbb0ab0, 0x1db4ee26, 0x1daed189, 0x1da8b4da, 0x1da29819,
-    0x1d9c7b45, 0x1d965e5f,
-  0x1d904167, 0x1d8a245c, 0x1d840740, 0x1d7dea11, 0x1d77ccd0, 0x1d71af7d,
-    0x1d6b9217, 0x1d6574a0,
-  0x1d5f5716, 0x1d59397a, 0x1d531bcc, 0x1d4cfe0d, 0x1d46e03a, 0x1d40c256,
-    0x1d3aa460, 0x1d348658,
-  0x1d2e683e, 0x1d284a12, 0x1d222bd3, 0x1d1c0d83, 0x1d15ef21, 0x1d0fd0ad,
-    0x1d09b227, 0x1d03938f,
-  0x1cfd74e5, 0x1cf7562a, 0x1cf1375c, 0x1ceb187d, 0x1ce4f98c, 0x1cdeda89,
-    0x1cd8bb74, 0x1cd29c4d,
-  0x1ccc7d15, 0x1cc65dca, 0x1cc03e6e, 0x1cba1f01, 0x1cb3ff81, 0x1caddff0,
-    0x1ca7c04d, 0x1ca1a099,
-  0x1c9b80d3, 0x1c9560fb, 0x1c8f4112, 0x1c892117, 0x1c83010a, 0x1c7ce0ec,
-    0x1c76c0bc, 0x1c70a07b,
-  0x1c6a8028, 0x1c645fc3, 0x1c5e3f4d, 0x1c581ec6, 0x1c51fe2d, 0x1c4bdd83,
-    0x1c45bcc7, 0x1c3f9bf9,
-  0x1c397b1b, 0x1c335a2b, 0x1c2d3929, 0x1c271816, 0x1c20f6f2, 0x1c1ad5bc,
-    0x1c14b475, 0x1c0e931d,
-  0x1c0871b4, 0x1c025039, 0x1bfc2ead, 0x1bf60d0f, 0x1befeb60, 0x1be9c9a1,
-    0x1be3a7cf, 0x1bdd85ed,
-  0x1bd763fa, 0x1bd141f5, 0x1bcb1fdf, 0x1bc4fdb8, 0x1bbedb80, 0x1bb8b937,
-    0x1bb296dc, 0x1bac7471,
-  0x1ba651f5, 0x1ba02f67, 0x1b9a0cc8, 0x1b93ea19, 0x1b8dc758, 0x1b87a487,
-    0x1b8181a4, 0x1b7b5eb0,
-  0x1b753bac, 0x1b6f1897, 0x1b68f570, 0x1b62d239, 0x1b5caef1, 0x1b568b98,
-    0x1b50682e, 0x1b4a44b3,
-  0x1b442127, 0x1b3dfd8b, 0x1b37d9de, 0x1b31b620, 0x1b2b9251, 0x1b256e71,
-    0x1b1f4a81, 0x1b192680,
-  0x1b13026e, 0x1b0cde4c, 0x1b06ba19, 0x1b0095d5, 0x1afa7180, 0x1af44d1b,
-    0x1aee28a6, 0x1ae8041f,
-  0x1ae1df88, 0x1adbbae1, 0x1ad59629, 0x1acf7160, 0x1ac94c87, 0x1ac3279d,
-    0x1abd02a3, 0x1ab6dd98,
-  0x1ab0b87d, 0x1aaa9352, 0x1aa46e16, 0x1a9e48c9, 0x1a98236c, 0x1a91fdff,
-    0x1a8bd881, 0x1a85b2f3,
-  0x1a7f8d54, 0x1a7967a6, 0x1a7341e6, 0x1a6d1c17, 0x1a66f637, 0x1a60d047,
-    0x1a5aaa47, 0x1a548436,
-  0x1a4e5e15, 0x1a4837e4, 0x1a4211a3, 0x1a3beb52, 0x1a35c4f0, 0x1a2f9e7e,
-    0x1a2977fc, 0x1a23516a,
-  0x1a1d2ac8, 0x1a170416, 0x1a10dd53, 0x1a0ab681, 0x1a048f9e, 0x19fe68ac,
-    0x19f841a9, 0x19f21a96,
-  0x19ebf374, 0x19e5cc41, 0x19dfa4fe, 0x19d97dac, 0x19d35649, 0x19cd2ed7,
-    0x19c70754, 0x19c0dfc2,
-  0x19bab820, 0x19b4906e, 0x19ae68ac, 0x19a840da, 0x19a218f9, 0x199bf107,
-    0x1995c906, 0x198fa0f5,
-  0x198978d4, 0x198350a4, 0x197d2864, 0x19770014, 0x1970d7b4, 0x196aaf45,
-    0x196486c6, 0x195e5e37,
-  0x19583599, 0x19520ceb, 0x194be42d, 0x1945bb60, 0x193f9283, 0x19396997,
-    0x1933409b, 0x192d178f,
-  0x1926ee74, 0x1920c54a, 0x191a9c10, 0x191472c6, 0x190e496d, 0x19082005,
-    0x1901f68d, 0x18fbcd06,
-  0x18f5a36f, 0x18ef79c9, 0x18e95014, 0x18e3264f, 0x18dcfc7b, 0x18d6d297,
-    0x18d0a8a4, 0x18ca7ea2,
-  0x18c45491, 0x18be2a70, 0x18b80040, 0x18b1d601, 0x18ababb2, 0x18a58154,
-    0x189f56e8, 0x18992c6b,
-  0x189301e0, 0x188cd746, 0x1886ac9c, 0x188081e4, 0x187a571c, 0x18742c45,
-    0x186e015f, 0x1867d66a,
-  0x1861ab66, 0x185b8053, 0x18555530, 0x184f29ff, 0x1848febf, 0x1842d370,
-    0x183ca812, 0x18367ca5,
-  0x18305129, 0x182a259e, 0x1823fa04, 0x181dce5b, 0x1817a2a4, 0x181176dd,
-    0x180b4b08, 0x18051f24,
-  0x17fef331, 0x17f8c72f, 0x17f29b1e, 0x17ec6eff, 0x17e642d1, 0x17e01694,
-    0x17d9ea49, 0x17d3bdee,
-  0x17cd9186, 0x17c7650e, 0x17c13888, 0x17bb0bf3, 0x17b4df4f, 0x17aeb29d,
-    0x17a885dc, 0x17a2590d,
-  0x179c2c2f, 0x1795ff42, 0x178fd247, 0x1789a53d, 0x17837825, 0x177d4afe,
-    0x17771dc9, 0x1770f086,
-  0x176ac333, 0x176495d3, 0x175e6864, 0x17583ae7, 0x17520d5b, 0x174bdfc1,
-    0x1745b218, 0x173f8461,
-  0x1739569c, 0x173328c8, 0x172cfae6, 0x1726ccf6, 0x17209ef8, 0x171a70eb,
-    0x171442d0, 0x170e14a7,
-  0x1707e670, 0x1701b82a, 0x16fb89d6, 0x16f55b74, 0x16ef2d04, 0x16e8fe86,
-    0x16e2cff9, 0x16dca15f,
-  0x16d672b6, 0x16d043ff, 0x16ca153a, 0x16c3e667, 0x16bdb787, 0x16b78898,
-    0x16b1599b, 0x16ab2a90,
-  0x16a4fb77, 0x169ecc50, 0x16989d1b, 0x16926dd8, 0x168c3e87, 0x16860f29,
-    0x167fdfbc, 0x1679b042,
-  0x167380ba, 0x166d5123, 0x1667217f, 0x1660f1ce, 0x165ac20e, 0x16549241,
-    0x164e6266, 0x1648327d,
-  0x16420286, 0x163bd282, 0x1635a270, 0x162f7250, 0x16294222, 0x162311e7,
-    0x161ce19e, 0x1616b148,
-  0x161080e4, 0x160a5072, 0x16041ff3, 0x15fdef66, 0x15f7becc, 0x15f18e24,
-    0x15eb5d6e, 0x15e52cab,
-  0x15defbdb, 0x15d8cafd, 0x15d29a11, 0x15cc6918, 0x15c63812, 0x15c006fe,
-    0x15b9d5dd, 0x15b3a4ae,
-  0x15ad7372, 0x15a74228, 0x15a110d2, 0x159adf6e, 0x1594adfc, 0x158e7c7d,
-    0x15884af1, 0x15821958,
-  0x157be7b1, 0x1575b5fe, 0x156f843c, 0x1569526e, 0x15632093, 0x155ceeaa,
-    0x1556bcb4, 0x15508ab1,
-  0x154a58a1, 0x15442683, 0x153df459, 0x1537c221, 0x15318fdd, 0x152b5d8b,
-    0x15252b2c, 0x151ef8c0,
-  0x1518c648, 0x151293c2, 0x150c612f, 0x15062e8f, 0x14fffbe2, 0x14f9c928,
-    0x14f39662, 0x14ed638e,
-  0x14e730ae, 0x14e0fdc0, 0x14dacac6, 0x14d497bf, 0x14ce64ab, 0x14c8318a,
-    0x14c1fe5c, 0x14bbcb22,
-  0x14b597da, 0x14af6486, 0x14a93125, 0x14a2fdb8, 0x149cca3e, 0x149696b7,
-    0x14906323, 0x148a2f82,
-  0x1483fbd5, 0x147dc81c, 0x14779455, 0x14716082, 0x146b2ca3, 0x1464f8b7,
-    0x145ec4be, 0x145890b9,
-  0x14525ca7, 0x144c2888, 0x1445f45d, 0x143fc026, 0x14398be2, 0x14335792,
-    0x142d2335, 0x1426eecb,
-  0x1420ba56, 0x141a85d3, 0x14145145, 0x140e1caa, 0x1407e803, 0x1401b34f,
-    0x13fb7e8f, 0x13f549c3,
-  0x13ef14ea, 0x13e8e005, 0x13e2ab14, 0x13dc7616, 0x13d6410d, 0x13d00bf7,
-    0x13c9d6d4, 0x13c3a1a6,
-  0x13bd6c6b, 0x13b73725, 0x13b101d2, 0x13aacc73, 0x13a49707, 0x139e6190,
-    0x13982c0d, 0x1391f67d,
-  0x138bc0e1, 0x13858b3a, 0x137f5586, 0x13791fc6, 0x1372e9fb, 0x136cb423,
-    0x13667e3f, 0x13604850,
-  0x135a1254, 0x1353dc4c, 0x134da639, 0x1347701a, 0x134139ee, 0x133b03b7,
-    0x1334cd74, 0x132e9725,
-  0x132860ca, 0x13222a64, 0x131bf3f2, 0x1315bd73, 0x130f86ea, 0x13095054,
-    0x130319b3, 0x12fce305,
-  0x12f6ac4d, 0x12f07588, 0x12ea3eb8, 0x12e407dc, 0x12ddd0f4, 0x12d79a01,
-    0x12d16303, 0x12cb2bf8,
-  0x12c4f4e2, 0x12bebdc1, 0x12b88693, 0x12b24f5b, 0x12ac1817, 0x12a5e0c7,
-    0x129fa96c, 0x12997205,
-  0x12933a93, 0x128d0315, 0x1286cb8c, 0x128093f7, 0x127a5c57, 0x127424ac,
-    0x126decf5, 0x1267b533,
-  0x12617d66, 0x125b458d, 0x12550da9, 0x124ed5ba, 0x12489dbf, 0x124265b9,
-    0x123c2da8, 0x1235f58b,
-  0x122fbd63, 0x12298530, 0x12234cf2, 0x121d14a9, 0x1216dc54, 0x1210a3f5,
-    0x120a6b8a, 0x12043314,
-  0x11fdfa93, 0x11f7c207, 0x11f18970, 0x11eb50cd, 0x11e51820, 0x11dedf68,
-    0x11d8a6a4, 0x11d26dd6,
-  0x11cc34fc, 0x11c5fc18, 0x11bfc329, 0x11b98a2e, 0x11b35129, 0x11ad1819,
-    0x11a6defe, 0x11a0a5d8,
-  0x119a6ca7, 0x1194336b, 0x118dfa25, 0x1187c0d3, 0x11818777, 0x117b4e10,
-    0x1175149e, 0x116edb22,
-  0x1168a19b, 0x11626809, 0x115c2e6c, 0x1155f4c4, 0x114fbb12, 0x11498156,
-    0x1143478e, 0x113d0dbc,
-  0x1136d3df, 0x113099f8, 0x112a6006, 0x11242609, 0x111dec02, 0x1117b1f0,
-    0x111177d4, 0x110b3dad,
-  0x1105037c, 0x10fec940, 0x10f88efa, 0x10f254a9, 0x10ec1a4e, 0x10e5dfe8,
-    0x10dfa578, 0x10d96afe,
-  0x10d33079, 0x10ccf5ea, 0x10c6bb50, 0x10c080ac, 0x10ba45fe, 0x10b40b45,
-    0x10add082, 0x10a795b5,
-  0x10a15ade, 0x109b1ffc, 0x1094e510, 0x108eaa1a, 0x10886f19, 0x1082340f,
-    0x107bf8fa, 0x1075bddb,
-  0x106f82b2, 0x1069477f, 0x10630c41, 0x105cd0fa, 0x105695a8, 0x10505a4d,
-    0x104a1ee7, 0x1043e377,
-  0x103da7fd, 0x10376c79, 0x103130ec, 0x102af554, 0x1024b9b2, 0x101e7e06,
-    0x10184251, 0x10120691,
-  0x100bcac7, 0x10058ef4, 0xfff5317, 0xff91730, 0xff2db3e, 0xfec9f44,
-    0xfe6633f, 0xfe02730,
-  0xfd9eb18, 0xfd3aef6, 0xfcd72ca, 0xfc73695, 0xfc0fa55, 0xfbabe0c, 0xfb481ba,
-    0xfae455d,
-  0xfa808f7, 0xfa1cc87, 0xf9b900e, 0xf95538b, 0xf8f16fe, 0xf88da68, 0xf829dc8,
-    0xf7c611f,
-  0xf76246c, 0xf6fe7af, 0xf69aae9, 0xf636e1a, 0xf5d3141, 0xf56f45e, 0xf50b773,
-    0xf4a7a7d,
-  0xf443d7e, 0xf3e0076, 0xf37c365, 0xf318649, 0xf2b4925, 0xf250bf7, 0xf1ecec0,
-    0xf189180,
-  0xf125436, 0xf0c16e3, 0xf05d987, 0xeff9c21, 0xef95eb2, 0xef3213a, 0xeece3b9,
-    0xee6a62f,
-  0xee0689b, 0xeda2afe, 0xed3ed58, 0xecdafa9, 0xec771f1, 0xec1342f, 0xebaf665,
-    0xeb4b891,
-  0xeae7ab4, 0xea83ccf, 0xea1fee0, 0xe9bc0e8, 0xe9582e7, 0xe8f44dd, 0xe8906cb,
-    0xe82c8af,
-  0xe7c8a8a, 0xe764c5c, 0xe700e26, 0xe69cfe6, 0xe63919e, 0xe5d534d, 0xe5714f3,
-    0xe50d690,
-  0xe4a9824, 0xe4459af, 0xe3e1b32, 0xe37dcac, 0xe319e1d, 0xe2b5f85, 0xe2520e5,
-    0xe1ee23c,
-  0xe18a38a, 0xe1264cf, 0xe0c260c, 0xe05e740, 0xdffa86b, 0xdf9698e, 0xdf32aa8,
-    0xdecebba,
-  0xde6acc3, 0xde06dc3, 0xdda2ebb, 0xdd3efab, 0xdcdb091, 0xdc77170, 0xdc13245,
-    0xdbaf313,
-  0xdb4b3d7, 0xdae7494, 0xda83548, 0xda1f5f3, 0xd9bb696, 0xd957731, 0xd8f37c3,
-    0xd88f84d,
-  0xd82b8cf, 0xd7c7948, 0xd7639b9, 0xd6ffa22, 0xd69ba82, 0xd637ada, 0xd5d3b2a,
-    0xd56fb71,
-  0xd50bbb1, 0xd4a7be8, 0xd443c17, 0xd3dfc3e, 0xd37bc5c, 0xd317c73, 0xd2b3c81,
-    0xd24fc87,
-  0xd1ebc85, 0xd187c7b, 0xd123c69, 0xd0bfc4f, 0xd05bc2d, 0xcff7c02, 0xcf93bd0,
-    0xcf2fb96,
-  0xcecbb53, 0xce67b09, 0xce03ab7, 0xcd9fa5d, 0xcd3b9fb, 0xccd7991, 0xcc7391f,
-    0xcc0f8a5,
-  0xcbab824, 0xcb4779a, 0xcae3709, 0xca7f670, 0xca1b5cf, 0xc9b7526, 0xc953475,
-    0xc8ef3bd,
-  0xc88b2fd, 0xc827235, 0xc7c3166, 0xc75f08f, 0xc6fafb0, 0xc696ec9, 0xc632ddb,
-    0xc5cece5,
-  0xc56abe8, 0xc506ae3, 0xc4a29d6, 0xc43e8c2, 0xc3da7a6, 0xc376683, 0xc312558,
-    0xc2ae425,
-  0xc24a2eb, 0xc1e61aa, 0xc182061, 0xc11df11, 0xc0b9db9, 0xc055c5a, 0xbff1af3,
-    0xbf8d985,
-  0xbf29810, 0xbec5693, 0xbe6150f, 0xbdfd383, 0xbd991f0, 0xbd35056, 0xbcd0eb5,
-    0xbc6cd0c,
-  0xbc08b5c, 0xbba49a5, 0xbb407e7, 0xbadc621, 0xba78454, 0xba14280, 0xb9b00a5,
-    0xb94bec2,
-  0xb8e7cd9, 0xb883ae8, 0xb81f8f0, 0xb7bb6f2, 0xb7574ec, 0xb6f32df, 0xb68f0cb,
-    0xb62aeaf,
-  0xb5c6c8d, 0xb562a64, 0xb4fe834, 0xb49a5fd, 0xb4363bf, 0xb3d217a, 0xb36df2e,
-    0xb309cdb,
-  0xb2a5a81, 0xb241820, 0xb1dd5b9, 0xb17934b, 0xb1150d5, 0xb0b0e59, 0xb04cbd6,
-    0xafe894d,
-  0xaf846bc, 0xaf20425, 0xaebc187, 0xae57ee2, 0xadf3c37, 0xad8f985, 0xad2b6cc,
-    0xacc740c,
-  0xac63146, 0xabfee79, 0xab9aba6, 0xab368cc, 0xaad25eb, 0xaa6e304, 0xaa0a016,
-    0xa9a5d22,
-  0xa941a27, 0xa8dd725, 0xa87941d, 0xa81510f, 0xa7b0dfa, 0xa74cadf, 0xa6e87bd,
-    0xa684495,
-  0xa620166, 0xa5bbe31, 0xa557af5, 0xa4f37b3, 0xa48f46b, 0xa42b11d, 0xa3c6dc8,
-    0xa362a6d,
-  0xa2fe70b, 0xa29a3a3, 0xa236035, 0xa1d1cc1, 0xa16d946, 0xa1095c6, 0xa0a523f,
-    0xa040eb1,
-  0x9fdcb1e, 0x9f78784, 0x9f143e5, 0x9eb003f, 0x9e4bc93, 0x9de78e1, 0x9d83529,
-    0x9d1f16b,
-  0x9cbada7, 0x9c569dc, 0x9bf260c, 0x9b8e236, 0x9b29e59, 0x9ac5a77, 0x9a6168f,
-    0x99fd2a0,
-  0x9998eac, 0x9934ab2, 0x98d06b2, 0x986c2ac, 0x9807ea1, 0x97a3a8f, 0x973f678,
-    0x96db25a,
-  0x9676e37, 0x9612a0e, 0x95ae5e0, 0x954a1ab, 0x94e5d71, 0x9481931, 0x941d4eb,
-    0x93b90a0,
-  0x9354c4f, 0x92f07f8, 0x928c39b, 0x9227f39, 0x91c3ad2, 0x915f664, 0x90fb1f1,
-    0x9096d79,
-  0x90328fb, 0x8fce477, 0x8f69fee, 0x8f05b5f, 0x8ea16cb, 0x8e3d231, 0x8dd8d92,
-    0x8d748ed,
-  0x8d10443, 0x8cabf93, 0x8c47ade, 0x8be3624, 0x8b7f164, 0x8b1ac9f, 0x8ab67d4,
-    0x8a52304,
-  0x89ede2f, 0x8989955, 0x8925475, 0x88c0f90, 0x885caa5, 0x87f85b5, 0x87940c1,
-    0x872fbc6,
-  0x86cb6c7, 0x86671c2, 0x8602cb9, 0x859e7aa, 0x853a296, 0x84d5d7d, 0x847185e,
-    0x840d33b,
-  0x83a8e12, 0x83448e5, 0x82e03b2, 0x827be7a, 0x821793e, 0x81b33fc, 0x814eeb5,
-    0x80ea969,
-  0x8086419, 0x8021ec3, 0x7fbd968, 0x7f59409, 0x7ef4ea4, 0x7e9093b, 0x7e2c3cd,
-    0x7dc7e5a,
-  0x7d638e2, 0x7cff365, 0x7c9ade4, 0x7c3685d, 0x7bd22d2, 0x7b6dd42, 0x7b097ad,
-    0x7aa5214,
-  0x7a40c76, 0x79dc6d3, 0x797812b, 0x7913b7f, 0x78af5ce, 0x784b019, 0x77e6a5e,
-    0x77824a0,
-  0x771dedc, 0x76b9914, 0x7655347, 0x75f0d76, 0x758c7a1, 0x75281c6, 0x74c3be7,
-    0x745f604,
-  0x73fb01c, 0x7396a30, 0x733243f, 0x72cde4a, 0x7269851, 0x7205253, 0x71a0c50,
-    0x713c64a,
-  0x70d803f, 0x7073a2f, 0x700f41b, 0x6faae03, 0x6f467e7, 0x6ee21c6, 0x6e7dba1,
-    0x6e19578,
-  0x6db4f4a, 0x6d50919, 0x6cec2e3, 0x6c87ca9, 0x6c2366a, 0x6bbf028, 0x6b5a9e1,
-    0x6af6396,
-  0x6a91d47, 0x6a2d6f4, 0x69c909d, 0x6964a42, 0x69003e3, 0x689bd80, 0x6837718,
-    0x67d30ad,
-  0x676ea3d, 0x670a3ca, 0x66a5d53, 0x66416d8, 0x65dd058, 0x65789d5, 0x651434e,
-    0x64afcc3,
-  0x644b634, 0x63e6fa2, 0x638290b, 0x631e271, 0x62b9bd3, 0x6255531, 0x61f0e8b,
-    0x618c7e1,
-  0x6128134, 0x60c3a83, 0x605f3ce, 0x5ffad15, 0x5f96659, 0x5f31f99, 0x5ecd8d6,
-    0x5e6920e,
-  0x5e04b43, 0x5da0475, 0x5d3bda3, 0x5cd76cd, 0x5c72ff4, 0x5c0e917, 0x5baa237,
-    0x5b45b53,
-  0x5ae146b, 0x5a7cd80, 0x5a18692, 0x59b3fa0, 0x594f8aa, 0x58eb1b2, 0x5886ab5,
-    0x58223b6,
-  0x57bdcb3, 0x57595ac, 0x56f4ea2, 0x5690795, 0x562c085, 0x55c7971, 0x556325a,
-    0x54feb3f,
-  0x549a422, 0x5435d01, 0x53d15dd, 0x536ceb5, 0x530878a, 0x52a405d, 0x523f92c,
-    0x51db1f7,
-  0x5176ac0, 0x5112385, 0x50adc48, 0x5049507, 0x4fe4dc3, 0x4f8067c, 0x4f1bf32,
-    0x4eb77e5,
-  0x4e53095, 0x4dee942, 0x4d8a1ec, 0x4d25a93, 0x4cc1337, 0x4c5cbd8, 0x4bf8476,
-    0x4b93d11,
-  0x4b2f5a9, 0x4acae3e, 0x4a666d1, 0x4a01f60, 0x499d7ed, 0x4939077, 0x48d48fe,
-    0x4870182,
-  0x480ba04, 0x47a7282, 0x4742afe, 0x46de377, 0x4679bee, 0x4615461, 0x45b0cd2,
-    0x454c541,
-  0x44e7dac, 0x4483615, 0x441ee7c, 0x43ba6df, 0x4355f40, 0x42f179f, 0x428cffb,
-    0x4228854,
-  0x41c40ab, 0x415f8ff, 0x40fb151, 0x40969a0, 0x40321ed, 0x3fcda37, 0x3f6927f,
-    0x3f04ac4,
-  0x3ea0307, 0x3e3bb48, 0x3dd7386, 0x3d72bc2, 0x3d0e3fb, 0x3ca9c32, 0x3c45467,
-    0x3be0c99,
-  0x3b7c4c9, 0x3b17cf7, 0x3ab3523, 0x3a4ed4c, 0x39ea573, 0x3985d97, 0x39215ba,
-    0x38bcdda,
-  0x38585f8, 0x37f3e14, 0x378f62e, 0x372ae46, 0x36c665b, 0x3661e6f, 0x35fd680,
-    0x3598e8f,
-  0x353469c, 0x34cfea8, 0x346b6b1, 0x3406eb8, 0x33a26bd, 0x333dec0, 0x32d96c1,
-    0x3274ec0,
-  0x32106bd, 0x31abeb9, 0x31476b2, 0x30e2ea9, 0x307e69f, 0x3019e93, 0x2fb5684,
-    0x2f50e74,
-  0x2eec663, 0x2e87e4f, 0x2e2363a, 0x2dbee22, 0x2d5a609, 0x2cf5def, 0x2c915d2,
-    0x2c2cdb4,
-  0x2bc8594, 0x2b63d73, 0x2aff54f, 0x2a9ad2a, 0x2a36504, 0x29d1cdc, 0x296d4b2,
-    0x2908c87,
-  0x28a445a, 0x283fc2b, 0x27db3fb, 0x2776bc9, 0x2712396, 0x26adb62, 0x264932b,
-    0x25e4af4,
-  0x25802bb, 0x251ba80, 0x24b7244, 0x2452a07, 0x23ee1c8, 0x2389988, 0x2325147,
-    0x22c0904,
-  0x225c0bf, 0x21f787a, 0x2193033, 0x212e7eb, 0x20c9fa1, 0x2065757, 0x2000f0b,
-    0x1f9c6be,
-  0x1f37e6f, 0x1ed3620, 0x1e6edcf, 0x1e0a57d, 0x1da5d2a, 0x1d414d6, 0x1cdcc80,
-    0x1c7842a,
-  0x1c13bd2, 0x1baf37a, 0x1b4ab20, 0x1ae62c5, 0x1a81a69, 0x1a1d20c, 0x19b89ae,
-    0x1954150,
-  0x18ef8f0, 0x188b08f, 0x182682d, 0x17c1fcb, 0x175d767, 0x16f8f03, 0x169469d,
-    0x162fe37,
-  0x15cb5d0, 0x1566d68, 0x15024ff, 0x149dc96, 0x143942b, 0x13d4bc0, 0x1370354,
-    0x130bae7,
-  0x12a727a, 0x1242a0c, 0x11de19d, 0x117992e, 0x11150be, 0x10b084d, 0x104bfdb,
-    0xfe7769,
-  0xf82ef6, 0xf1e683, 0xeb9e0f, 0xe5559b, 0xdf0d26, 0xd8c4b0, 0xd27c3a,
-    0xcc33c3,
-  0xc5eb4c, 0xbfa2d5, 0xb95a5d, 0xb311e4, 0xacc96b, 0xa680f2, 0xa03878,
-    0x99effe,
-  0x93a784, 0x8d5f09, 0x87168e, 0x80ce12, 0x7a8597, 0x743d1a, 0x6df49e,
-    0x67ac21,
-  0x6163a5, 0x5b1b27, 0x54d2aa, 0x4e8a2c, 0x4841af, 0x41f931, 0x3bb0b3,
-    0x356835,
-  0x2f1fb6, 0x28d738, 0x228eb9, 0x1c463b, 0x15fdbc, 0xfb53d, 0x96cbe, 0x3243f,
-
-};
-
-/**    
- * @brief  Initialization function for the Q31 DCT4/IDCT4.   
- * @param[in,out] *S         points to an instance of Q31 DCT4/IDCT4 structure.   
- * @param[in]     *S_RFFT    points to an instance of Q31 RFFT/RIFFT structure   
- * @param[in]     *S_CFFT    points to an instance of Q31 CFFT/CIFFT structure   
- * @param[in]     N          length of the DCT4.   
- * @param[in]     Nby2       half of the length of the DCT4.   
- * @param[in]     normalize  normalizing factor.   
- * @return		  arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.   
- * \par Normalizing factor:    
- * The normalizing factor is sqrt(2/N), which depends on the size of transform N.    
- * Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:    
- * \image html dct4NormalizingQ31Table.gif    
- */
-
-arm_status arm_dct4_init_q31(
-  arm_dct4_instance_q31 * S,
-  arm_rfft_instance_q31 * S_RFFT,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q31_t normalize)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initializing the pointer array with the weight table base addresses of different lengths */
-  q31_t *twiddlePtr[4] = { (q31_t *) WeightsQ31_128, (q31_t *) WeightsQ31_512,
-    (q31_t *) WeightsQ31_2048, (q31_t *) WeightsQ31_8192
-  };
-
-  /* Initializing the pointer array with the cos factor table base addresses of different lengths */
-  q31_t *pCosFactor[4] =
-    { (q31_t *) cos_factorsQ31_128, (q31_t *) cos_factorsQ31_512,
-    (q31_t *) cos_factorsQ31_2048, (q31_t *) cos_factorsQ31_8192
-  };
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-    /* Initialize the table modifier values */
-  case 8192u:
-    S->pTwiddle = twiddlePtr[3];
-    S->pCosFactor = pCosFactor[3];
-    break;
-  case 2048u:
-    S->pTwiddle = twiddlePtr[2];
-    S->pCosFactor = pCosFactor[2];
-    break;
-  case 512u:
-    S->pTwiddle = twiddlePtr[1];
-    S->pCosFactor = pCosFactor[1];
-    break;
-  case 128u:
-    S->pTwiddle = twiddlePtr[0];
-    S->pCosFactor = pCosFactor[0];
-    break;
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT Function */
-  arm_rfft_init_q31(S->pRfft,  S->N, 0, 1);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**    
-   * @} end of DCT4_IDCT4 group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c
deleted file mode 100644
index f7db9fae..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_f32.c
+++ /dev/null
@@ -1,329 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_f32.c    
-*    
-* Description:	RFFT & RIFFT Floating point process function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-extern void arm_radix4_butterfly_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    float32_t * pCoef,
-    uint16_t twidCoefModifier);
-
-extern void arm_radix4_butterfly_inverse_f32(
-    float32_t * pSrc,
-    uint16_t fftLen,
-    float32_t * pCoef,
-    uint16_t twidCoefModifier,
-    float32_t onebyfftLen);
-
-extern void arm_bitreversal_f32(
-    float32_t * pSrc,
-    uint16_t fftSize,
-    uint16_t bitRevFactor,
-    uint16_t * pBitRevTab);
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/*--------------------------------------------------------------------    
- *		Internal functions prototypes    
- *--------------------------------------------------------------------*/
-
-void arm_split_rfft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier);
-void arm_split_rifft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier);
-
-/**    
- * @addtogroup RealFFT    
- * @{    
- */
-
-/**    
- * @brief Processing function for the floating-point RFFT/RIFFT.   
- * @deprecated Do not use this function.  It has been superceded by \ref arm_rfft_fast_f32 and will be removed
- * in the future.
- * @param[in]  *S    points to an instance of the floating-point RFFT/RIFFT structure.   
- * @param[in]  *pSrc points to the input buffer.   
- * @param[out] *pDst points to the output buffer.   
- * @return none.   
- */
-
-void arm_rfft_f32(
-  const arm_rfft_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst)
-{
-  const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
-
-
-  /* Calculation of Real IFFT of input */
-  if(S->ifftFlagR == 1u)
-  {
-    /*  Real IFFT core process */
-    arm_split_rifft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                        S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-
-
-    /* Complex radix-4 IFFT process */
-    arm_radix4_butterfly_inverse_f32(pDst, S_CFFT->fftLen,
-                                     S_CFFT->pTwiddle,
-                                     S_CFFT->twidCoefModifier,
-                                     S_CFFT->onebyfftLen);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_f32(pDst, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-  }
-  else
-  {
-
-    /* Calculation of RFFT of input */
-
-    /* Complex radix-4 FFT process */
-    arm_radix4_butterfly_f32(pSrc, S_CFFT->fftLen,
-                             S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
-
-    /* Bit reversal process */
-    if(S->bitReverseFlagR == 1u)
-    {
-      arm_bitreversal_f32(pSrc, S_CFFT->fftLen,
-                          S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-
-
-    /*  Real FFT core process */
-    arm_split_rfft_f32(pSrc, S->fftLenBy2, S->pTwiddleAReal,
-                       S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-  }
-
-}
-
-/**    
-   * @} end of RealFFT group    
-   */
-
-/**    
- * @brief  Core Real FFT process    
- * @param[in]   *pSrc 				points to the input buffer.    
- * @param[in]   fftLen  			length of FFT.    
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.    
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
- * @param[out]  *pDst 				points to the output buffer.    
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
- * @return none.    
- */
-
-void arm_split_rfft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier)
-{
-  uint32_t i;                                    /* Loop Counter */
-  float32_t outR, outI;                          /* Temporary variables for output */
-  float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-  float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-  float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4u * fftLen) - 1u];      /* temp pointers for output buffer */
-  float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2u * fftLen) - 1u];      /* temp pointers for input buffer */
-
-  /* Init coefficient pointers */
-  pCoefA = &pATable[modifier * 2u];
-  pCoefB = &pBTable[modifier * 2u];
-
-  i = fftLen - 1u;
-
-  while(i > 0u)
-  {
-    /*    
-       outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-       + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-       pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-     */
-
-    /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-    /* read pATable[2 * i] */
-    CoefA1 = *pCoefA++;
-    /* pATable[2 * i + 1] */
-    CoefA2 = *pCoefA;
-
-    /* pSrc[2 * i] * pATable[2 * i] */
-    outR = *pSrc1 * CoefA1;
-    /* pSrc[2 * i] * CoefA2 */
-    outI = *pSrc1++ * CoefA2;
-
-    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-    outR -= (*pSrc1 + *pSrc2) * CoefA2;
-    /* pSrc[2 * i + 1] * CoefA1 */
-    outI += *pSrc1++ * CoefA1;
-
-    CoefB1 = *pCoefB;
-
-    /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-    outI -= *pSrc2-- * CoefB1;
-    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-    outI -= *pSrc2 * CoefA2;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-    outR += *pSrc2-- * CoefB1;
-
-    /* write output */
-    *pDst1++ = outR;
-    *pDst1++ = outI;
-
-    /* write complex conjugate output */
-    *pDst2-- = -outI;
-    *pDst2-- = outR;
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2u);
-    pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-    i--;
-
-  }
-
-  pDst[2u * fftLen] = pSrc[0] - pSrc[1];
-  pDst[(2u * fftLen) + 1u] = 0.0f;
-
-  pDst[0] = pSrc[0] + pSrc[1];
-  pDst[1] = 0.0f;
-
-}
-
-
-/**    
- * @brief  Core Real IFFT process    
- * @param[in]   *pSrc 				points to the input buffer.    
- * @param[in]   fftLen  			length of FFT.   
- * @param[in]   *pATable 			points to the twiddle Coef A buffer.   
- * @param[in]   *pBTable 			points to the twiddle Coef B buffer.   
- * @param[out]  *pDst 				points to the output buffer.   
- * @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.    
- * @return none.    
- */
-
-void arm_split_rifft_f32(
-  float32_t * pSrc,
-  uint32_t fftLen,
-  float32_t * pATable,
-  float32_t * pBTable,
-  float32_t * pDst,
-  uint32_t modifier)
-{
-  float32_t outR, outI;                          /* Temporary variables for output */
-  float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-  float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-  float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2u * fftLen) + 1u];
-
-  pCoefA = &pATable[0];
-  pCoefB = &pBTable[0];
-
-  while(fftLen > 0u)
-  {
-    /*    
-       outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-       pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-       outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-       pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-       pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);    
-
-     */
-
-    CoefA1 = *pCoefA++;
-    CoefA2 = *pCoefA;
-
-    /* outR = (pSrc[2 * i] * CoefA1 */
-    outR = *pSrc1 * CoefA1;
-
-    /* - pSrc[2 * i] * CoefA2 */
-    outI = -(*pSrc1++) * CoefA2;
-
-    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-    outR += (*pSrc1 + *pSrc2) * CoefA2;
-
-    /* pSrc[2 * i + 1] * CoefA1 */
-    outI += (*pSrc1++) * CoefA1;
-
-    CoefB1 = *pCoefB;
-
-    /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-    outI -= *pSrc2-- * CoefB1;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-    outR += *pSrc2 * CoefB1;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-    outI += *pSrc2-- * CoefA2;
-
-    /* write output */
-    *pDst++ = outR;
-    *pDst++ = outI;
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2u);
-    pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-    /* Decrement loop count */
-    fftLen--;
-  }
-
-}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c
deleted file mode 100644
index e9cea121..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_f32.c
+++ /dev/null
@@ -1,353 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_rfft_f32.c
-*
-* Description:	RFFT & RIFFT Floating point process function
-*
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-void stage_rfft_f32(
-  arm_rfft_fast_instance_f32 * S,
-  float32_t * p, float32_t * pOut)
-{
-   uint32_t  k;								   /* Loop Counter                     */
-   float32_t twR, twI;						   /* RFFT Twiddle coefficients        */
-   float32_t * pCoeff = S->pTwiddleRFFT;  /* Points to RFFT Twiddle factors   */
-   float32_t *pA = p;						   /* increasing pointer               */
-   float32_t *pB = p;						   /* decreasing pointer               */
-   float32_t xAR, xAI, xBR, xBI;				/* temporary variables              */
-   float32_t t1a, t1b;				         /* temporary variables              */
-   float32_t p0, p1, p2, p3;				   /* temporary variables              */
-
-
-   k = (S->Sint).fftLen - 1;					
-
-   /* Pack first and last sample of the frequency domain together */
-
-   xBR = pB[0];
-   xBI = pB[1];
-   xAR = pA[0];
-   xAI = pA[1];
-
-   twR = *pCoeff++ ;
-   twI = *pCoeff++ ;
-   
-   // U1 = XA(1) + XB(1); % It is real
-   t1a = xBR + xAR  ;
-   
-   // U2 = XB(1) - XA(1); % It is imaginary
-   t1b = xBI + xAI  ;
-
-   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
-   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
-   *pOut++ = 0.5f * ( t1a + t1b );
-   *pOut++ = 0.5f * ( t1a - t1b );
-
-   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
-   pB  = p + 2*k;
-   pA += 2;
-
-   do
-   {
-      /*
-         function X = my_split_rfft(X, ifftFlag)
-         % X is a series of real numbers
-         L  = length(X);
-         XC = X(1:2:end) +i*X(2:2:end);
-         XA = fft(XC);
-         XB = conj(XA([1 end:-1:2]));
-         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
-         for l = 2:L/2
-            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
-         end
-         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
-         X = XA;
-      */
-
-      xBI = pB[1];
-      xBR = pB[0];
-      xAR = pA[0];
-      xAI = pA[1];
-
-      twR = *pCoeff++;
-      twI = *pCoeff++;
-
-      t1a = xBR - xAR ;
-      t1b = xBI + xAI ;
-
-      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
-      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
-      p0 = twR * t1a;
-      p1 = twI * t1a;
-      p2 = twR * t1b;
-      p3 = twI * t1b;
-
-      *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR
-      *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI
-
-      pA += 2;
-      pB -= 2;
-      k--;
-   } while(k > 0u);
-}
-
-/* Prepares data for inverse cfft */
-void merge_rfft_f32(
-arm_rfft_fast_instance_f32 * S,
-float32_t * p, float32_t * pOut)
-{
-   uint32_t  k;								/* Loop Counter                     */
-   float32_t twR, twI;						/* RFFT Twiddle coefficients        */
-   float32_t *pCoeff = S->pTwiddleRFFT;		/* Points to RFFT Twiddle factors   */
-   float32_t *pA = p;						/* increasing pointer               */
-   float32_t *pB = p;						/* decreasing pointer               */
-   float32_t xAR, xAI, xBR, xBI;			/* temporary variables              */
-   float32_t t1a, t1b, r, s, t, u;			/* temporary variables              */
-
-   k = (S->Sint).fftLen - 1;					
-
-   xAR = pA[0];
-   xAI = pA[1];
-
-   pCoeff += 2 ;
-
-   *pOut++ = 0.5f * ( xAR + xAI );
-   *pOut++ = 0.5f * ( xAR - xAI );
-
-   pB  =  p + 2*k ;
-   pA +=  2	   ;
-
-   while(k > 0u)
-   {
-      /* G is half of the frequency complex spectrum */
-      //for k = 2:N
-      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
-      xBI =   pB[1]    ;
-      xBR =   pB[0]    ;
-      xAR =  pA[0];
-      xAI =  pA[1];
-
-      twR = *pCoeff++;
-      twI = *pCoeff++;
-
-      t1a = xAR - xBR ;
-      t1b = xAI + xBI ;
-
-      r = twR * t1a;
-      s = twI * t1b;
-      t = twI * t1a;
-      u = twR * t1b;
-
-      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
-      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
-      *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR
-      *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI
-
-      pA += 2;
-      pB -= 2;
-      k--;
-   }
-
-}
-
-/**
-* @ingroup groupTransforms
-*/
-
-/**
- * @defgroup Fast Real FFT Functions
- *
- * \par
- * The CMSIS DSP library includes specialized algorithms for computing the
- * FFT of real data sequences.  The FFT is defined over complex data but
- * in many applications the input is real.  Real FFT algorithms take advantage
- * of the symmetry properties of the FFT and have a speed advantage over complex
- * algorithms of the same length.
- * \par
- * The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
- * \par
- * The real length N forward FFT of a sequence is computed using the steps shown below.
- * \par
- * \image html RFFT.gif "Real Fast Fourier Transform"
- * \par
- * The real sequence is initially treated as if it were complex to perform a CFFT.
- * Later, a processing stage reshapes the data to obtain half of the frequency spectrum
- * in complex format. Except the first complex number that contains the two real numbers
- * X[0] and X[N/2] all the data is complex. In other words, the first complex sample
- * contains two real values packed.
- * \par
- * The input for the inverse RFFT should keep the same format as the output of the 
- * forward RFFT. A first processing stage pre-process the data to later perform an
- * inverse CFFT.
- * \par    
- * \image html RIFFT.gif "Real Inverse Fast Fourier Transform"    
- * \par    
- * The algorithms for floating-point, Q15, and Q31 data are slightly different
- * and we describe each algorithm in turn.
- * \par Floating-point
- * The main functions are arm_rfft_fast_f32()
- * and arm_rfft_fast_init_f32().  The older functions
- * arm_rfft_f32() and arm_rfft_init_f32() have been
- * deprecated but are still documented.
- * \par
- * The FFT of a real N-point sequence has even symmetry in the frequency
- * domain.  The second half of the data equals the conjugate of the first half
- * flipped in frequency:
- * 
- *X[0] - real data
- *X[1] - complex data
- *X[2] - complex data
- *... 
- *X[fftLen/2-1] - complex data
- *X[fftLen/2] - real data
- *X[fftLen/2+1] - conjugate of X[fftLen/2-1]
- *X[fftLen/2+2] - conjugate of X[fftLen/2-2]
- *... 
- *X[fftLen-1] - conjugate of X[1]
- * 

- * Looking at the data, we see that we can uniquely represent the FFT using only
- * 
- *N/2+1 samples:
- *X[0] - real data
- *X[1] - complex data
- *X[2] - complex data
- *... 
- *X[fftLen/2-1] - complex data
- *X[fftLen/2] - real data
- * 

- * Looking more closely we see that the first and last samples are real valued.
- * They can be packed together and we can thus represent the FFT of an N-point
- * real sequence by N/2 complex values:
- * 
- *X[0],X[N/2] - packed real data: X[0] + jX[N/2]
- *X[1] - complex data
- *X[2] - complex data
- *... 
- *X[fftLen/2-1] - complex data
- * 

- * The real FFT functions pack the frequency domain data in this fashion.  The
- * forward transform outputs the data in this form and the inverse transform
- * expects input data in this form.  The function always performs the needed
- * bitreversal so that the input and output data is always in normal order.  The 
- * functions support lengths of [32, 64, 128, ..., 4096] samples.
- * \par
- * The forward and inverse real FFT functions apply the standard FFT scaling; no
- * scaling on the forward transform and 1/fftLen scaling on the inverse
- * transform.
- * \par Q15 and Q31
- * The real algorithms are defined in a similar manner and utilize N/2 complex
- * transforms behind the scenes.  
- * \par
- * The complex transforms used internally include scaling to prevent fixed-point
- * overflows.  The overall scaling equals 1/(fftLen/2).
- * \par
- * A separate instance structure must be defined for each transform used but 
- * twiddle factor and bit reversal tables can be reused.
- * \par
- * There is also an associated initialization function for each data type. 
- * The initialization function performs the following operations:
- * - Sets the values of the internal structure fields.   
- * - Initializes twiddle factor table and bit reversal table pointers.
- * - Initializes the internal complex FFT data structure.
- * \par   
- * Use of the initialization function is optional.   
- * However, if the initialization function is used, then the instance structure 
- * cannot be placed into a const data section. To place an instance structure 
- * into a const data section, the instance structure should be manually 
- * initialized as follows:
- * 
- *arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- *arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};    
- * 

- * where fftLenReal is the length of the real transform;
- * fftLenBy2 length of  the internal complex transform.
- * ifftFlagR Selects forward (=0) or inverse (=1) transform.
- * bitReverseFlagR Selects bit reversed output (=0) or normal order
- * output (=1).
- * twidCoefRModifier stride modifier for the twiddle factor table.
- * The value is based on the FFT length;
- * pTwiddleARealpoints to the A array of twiddle coefficients; 
- * pTwiddleBRealpoints to the B array of twiddle coefficients;    
- * pCfft points to the CFFT Instance structure. The CFFT structure
- * must also be initialized.  Refer to arm_cfft_radix4_f32() for details regarding    
- * static initialization of the complex FFT instance structure.    
- */
-
-/**
-* @addtogroup RealFFT
-* @{
-*/
-
-/**
-* @brief Processing function for the floating-point real FFT.
-* @param[in]  *S              points to an arm_rfft_fast_instance_f32 structure.
-* @param[in]  *p              points to the input buffer.
-* @param[in]  *pOut           points to the output buffer.
-* @param[in]  ifftFlag        RFFT if flag is 0, RIFFT if flag is 1
-* @return none.
-*/
-
-void arm_rfft_fast_f32(
-arm_rfft_fast_instance_f32 * S,
-float32_t * p, float32_t * pOut,
-uint8_t ifftFlag)
-{
-   arm_cfft_instance_f32 * Sint = &(S->Sint);
-   Sint->fftLen = S->fftLenRFFT / 2;
-
-   /* Calculation of Real FFT */
-   if(ifftFlag)
-   {
-      /*  Real FFT compression */
-      merge_rfft_f32(S, p, pOut);
-
-      /* Complex radix-4 IFFT process */
-      arm_cfft_f32( Sint, pOut, ifftFlag, 1);
-   }
-   else
-   {
-      /* Calculation of RFFT of input */
-      arm_cfft_f32( Sint, p, ifftFlag, 1);
-   
-      /*  Real FFT extraction */
-      stage_rfft_f32(S, p, pOut);
-   }
-}
-
-/**    
-* @} end of RealFFT group    
-*/
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c
deleted file mode 100644
index c9fa0c12..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_fast_init_f32.c
+++ /dev/null
@@ -1,143 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_cfft_init_f32.c   
-*    
-* Description:	Split Radix Decimation in Frequency CFFT Floating point processing function   
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.   
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**   
- * @ingroup groupTransforms   
- */
-
-/**   
- * @addtogroup RealFFT   
- * @{   
- */
-
-/**   
-* @brief  Initialization function for the floating-point real FFT.  
-* @param[in,out] *S             points to an arm_rfft_fast_instance_f32 structure.
-* @param[in]     fftLen         length of the Real Sequence.  
-* @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLen is not a supported value.  
-*   
-* \par Description:  
-* \par   
-* The parameter fftLen	Specifies length of RFFT/CIFFT process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.   
-* \par   
-* This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.   
-*/
-arm_status arm_rfft_fast_init_f32(
-  arm_rfft_fast_instance_f32 * S,
-  uint16_t fftLen)
-{
-  arm_cfft_instance_f32 * Sint;
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  Sint = &(S->Sint);
-  Sint->fftLen = fftLen/2;
-  S->fftLenRFFT = fftLen;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (Sint->fftLen)
-  {
-  case 2048u:
-    /*  Initializations of structure parameters for 2048 point FFT */
-    /*  Initialise the bit reversal table length */
-    Sint->bitRevLength = ARMBITREVINDEXTABLE2048_TABLE_LENGTH;
-    /*  Initialise the bit reversal table pointer */
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;
-    /*  Initialise the Twiddle coefficient pointers */
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_2048;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_4096;
-    break;
-  case 1024u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE1024_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_1024;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_2048;
-    break;
-  case 512u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_512;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_1024;
-    break;
-  case 256u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_256;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_512;
-    break;
-  case 128u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_128;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_256;
-    break;
-  case 64u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE__64_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_64;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_128;
-    break;
-  case 32u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE__32_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_32;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_64;
-    break;
-  case 16u:
-    Sint->bitRevLength = ARMBITREVINDEXTABLE__16_TABLE_LENGTH;
-    Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;
-		Sint->pTwiddle     = (float32_t *) twiddleCoef_16;
-		S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_32;
-    break;
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**   
- * @} end of RealFFT group   
- */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c
deleted file mode 100644
index fccefafe..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_f32.c
+++ /dev/null
@@ -1,8376 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_f32.c    
-*    
-* Description:	RFFT & RIFFT Floating point initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-
-/**    
- * @ingroup groupTransforms    
- */
-
-/**    
- * @addtogroup RealFFT    
- * @{    
- */
-
-/**    
-* \par    
-* Generation of realCoefA array:    
-* \par    
-* 	n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-*/
-
-
-
-static const float32_t realCoefA[8192] = {
-  0.500000000000000f, -0.500000000000000f, 0.499616503715515f,
-    -0.499999850988388f,
-  0.499233007431030f, -0.499999403953552f, 0.498849511146545f,
-    -0.499998688697815f,
-  0.498466014862061f, -0.499997645616531f, 0.498082518577576f,
-    -0.499996334314346f,
-  0.497699022293091f, -0.499994695186615f, 0.497315555810928f,
-    -0.499992787837982f,
-  0.496932059526443f, -0.499990582466125f, 0.496548563241959f,
-    -0.499988079071045f,
-  0.496165096759796f, -0.499985307455063f, 0.495781600475311f,
-    -0.499982208013535f,
-  0.495398133993149f, -0.499978810548782f, 0.495014637708664f,
-    -0.499975144863129f,
-  0.494631171226501f, -0.499971181154251f, 0.494247704744339f,
-    -0.499966919422150f,
-  0.493864238262177f, -0.499962359666824f, 0.493480771780014f,
-    -0.499957501888275f,
-  0.493097305297852f, -0.499952346086502f, 0.492713838815689f,
-    -0.499946922063828f,
-  0.492330402135849f, -0.499941170215607f, 0.491946935653687f,
-    -0.499935150146484f,
-  0.491563498973846f, -0.499928832054138f, 0.491180062294006f,
-    -0.499922215938568f,
-  0.490796625614166f, -0.499915301799774f, 0.490413218736649f,
-    -0.499908089637756f,
-  0.490029782056808f, -0.499900579452515f, 0.489646375179291f,
-    -0.499892801046371f,
-  0.489262968301773f, -0.499884694814682f, 0.488879561424255f,
-    -0.499876320362091f,
-  0.488496154546738f, -0.499867647886276f, 0.488112777471542f,
-    -0.499858677387238f,
-  0.487729400396347f, -0.499849408864975f, 0.487346023321152f,
-    -0.499839842319489f,
-  0.486962646245956f, -0.499830007553101f, 0.486579269170761f,
-    -0.499819844961166f,
-  0.486195921897888f, -0.499809414148331f, 0.485812574625015f,
-    -0.499798685312271f,
-  0.485429257154465f, -0.499787658452988f, 0.485045909881592f,
-    -0.499776333570480f,
-  0.484662592411041f, -0.499764710664749f, 0.484279274940491f,
-    -0.499752789735794f,
-  0.483895987272263f, -0.499740600585938f, 0.483512699604034f,
-    -0.499728083610535f,
-  0.483129411935806f, -0.499715298414230f, 0.482746154069901f,
-    -0.499702215194702f,
-  0.482362866401672f, -0.499688833951950f, 0.481979638338089f,
-    -0.499675154685974f,
-  0.481596380472183f, -0.499661177396774f, 0.481213152408600f,
-    -0.499646931886673f,
-  0.480829954147339f, -0.499632388353348f, 0.480446726083755f,
-    -0.499617516994476f,
-  0.480063527822495f, -0.499602377414703f, 0.479680359363556f,
-    -0.499586939811707f,
-  0.479297190904617f, -0.499571204185486f, 0.478914022445679f,
-    -0.499555170536041f,
-  0.478530883789063f, -0.499538868665695f, 0.478147745132446f,
-    -0.499522238969803f,
-  0.477764606475830f, -0.499505341053009f, 0.477381497621536f,
-    -0.499488145112991f,
-  0.476998418569565f, -0.499470651149750f, 0.476615339517593f,
-    -0.499452859163284f,
-  0.476232260465622f, -0.499434769153595f, 0.475849211215973f,
-    -0.499416410923004f,
-  0.475466161966324f, -0.499397724866867f, 0.475083142518997f,
-    -0.499378770589828f,
-  0.474700123071671f, -0.499359518289566f, 0.474317133426666f,
-    -0.499339967966080f,
-  0.473934143781662f, -0.499320119619370f, 0.473551183938980f,
-    -0.499299973249435f,
-  0.473168224096298f, -0.499279528856277f, 0.472785294055939f,
-    -0.499258816242218f,
-  0.472402364015579f, -0.499237775802612f, 0.472019463777542f,
-    -0.499216467142105f,
-  0.471636593341827f, -0.499194860458374f, 0.471253722906113f,
-    -0.499172955751419f,
-  0.470870882272720f, -0.499150782823563f, 0.470488041639328f,
-    -0.499128282070160f,
-  0.470105201005936f, -0.499105513095856f, 0.469722419977188f,
-    -0.499082416296005f,
-  0.469339638948441f, -0.499059051275253f, 0.468956857919693f,
-    -0.499035388231277f,
-  0.468574106693268f, -0.499011427164078f, 0.468191385269165f,
-    -0.498987197875977f,
-  0.467808693647385f, -0.498962640762329f, 0.467426002025604f,
-    -0.498937815427780f,
-  0.467043310403824f, -0.498912662267685f, 0.466660678386688f,
-    -0.498887240886688f,
-  0.466278046369553f, -0.498861521482468f, 0.465895414352417f,
-    -0.498835533857346f,
-  0.465512841939926f, -0.498809218406677f, 0.465130269527435f,
-    -0.498782604932785f,
-  0.464747726917267f, -0.498755723237991f, 0.464365184307098f,
-    -0.498728543519974f,
-  0.463982671499252f, -0.498701065778732f, 0.463600188493729f,
-    -0.498673290014267f,
-  0.463217705488205f, -0.498645216226578f, 0.462835282087326f,
-    -0.498616874217987f,
-  0.462452858686447f, -0.498588204383850f, 0.462070435285568f,
-    -0.498559266328812f,
-  0.461688071489334f, -0.498530030250549f, 0.461305707693100f,
-    -0.498500496149063f,
-  0.460923373699188f, -0.498470664024353f, 0.460541069507599f,
-    -0.498440563678741f,
-  0.460158795118332f, -0.498410135507584f, 0.459776520729065f,
-    -0.498379439115524f,
-  0.459394276142120f, -0.498348444700241f, 0.459012061357498f,
-    -0.498317152261734f,
-  0.458629876375198f, -0.498285561800003f, 0.458247691392899f,
-    -0.498253703117371f,
-  0.457865566015244f, -0.498221516609192f, 0.457483440637589f,
-    -0.498189061880112f,
-  0.457101345062256f, -0.498156309127808f, 0.456719279289246f,
-    -0.498123258352280f,
-  0.456337243318558f, -0.498089909553528f, 0.455955207347870f,
-    -0.498056292533875f,
-  0.455573230981827f, -0.498022347688675f, 0.455191254615784f,
-    -0.497988134622574f,
-  0.454809308052063f, -0.497953623533249f, 0.454427421092987f,
-    -0.497918814420700f,
-  0.454045534133911f, -0.497883707284927f, 0.453663676977158f,
-    -0.497848302125931f,
-  0.453281819820404f, -0.497812628746033f, 0.452900022268295f,
-    -0.497776657342911f,
-  0.452518254518509f, -0.497740387916565f, 0.452136516571045f,
-    -0.497703820466995f,
-  0.451754778623581f, -0.497666954994202f, 0.451373100280762f,
-    -0.497629791498184f,
-  0.450991421937943f, -0.497592359781265f, 0.450609803199768f,
-    -0.497554630041122f,
-  0.450228184461594f, -0.497516602277756f, 0.449846625328064f,
-    -0.497478276491165f,
-  0.449465066194534f, -0.497439652681351f, 0.449083566665649f,
-    -0.497400760650635f,
-  0.448702067136765f, -0.497361570596695f, 0.448320597410202f,
-    -0.497322082519531f,
-  0.447939187288284f, -0.497282296419144f, 0.447557777166367f,
-    -0.497242212295532f,
-  0.447176426649094f, -0.497201830148697f, 0.446795076131821f,
-    -0.497161179780960f,
-  0.446413785219193f, -0.497120231389999f, 0.446032524108887f,
-    -0.497078984975815f,
-  0.445651292800903f, -0.497037440538406f, 0.445270061492920f,
-    -0.496995598077774f,
-  0.444888889789581f, -0.496953487396240f, 0.444507747888565f,
-    -0.496911078691483f,
-  0.444126635789871f, -0.496868371963501f, 0.443745553493500f,
-    -0.496825367212296f,
-  0.443364530801773f, -0.496782064437866f, 0.442983508110046f,
-    -0.496738493442535f,
-  0.442602545022964f, -0.496694594621658f, 0.442221581935883f,
-    -0.496650427579880f,
-  0.441840678453445f, -0.496605962514877f, 0.441459804773331f,
-    -0.496561229228973f,
-  0.441078960895538f, -0.496516168117523f, 0.440698176622391f,
-    -0.496470838785172f,
-  0.440317392349243f, -0.496425211429596f, 0.439936667680740f,
-    -0.496379286050797f,
-  0.439555943012238f, -0.496333062648773f, 0.439175277948380f,
-    -0.496286571025848f,
-  0.438794672489166f, -0.496239781379700f, 0.438414067029953f,
-    -0.496192663908005f,
-  0.438033521175385f, -0.496145308017731f, 0.437653005123138f,
-    -0.496097624301910f,
-  0.437272518873215f, -0.496049642562866f, 0.436892062425613f,
-    -0.496001392602921f,
-  0.436511665582657f, -0.495952844619751f, 0.436131268739700f,
-    -0.495903998613358f,
-  0.435750931501389f, -0.495854884386063f, 0.435370653867722f,
-    -0.495805442333221f,
-  0.434990376234055f, -0.495755732059479f, 0.434610158205032f,
-    -0.495705723762512f,
-  0.434229999780655f, -0.495655417442322f, 0.433849841356277f,
-    -0.495604842901230f,
-  0.433469742536545f, -0.495553970336914f, 0.433089673519135f,
-    -0.495502769947052f,
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-  0.483895987272263f, 0.499740600585938f, 0.484279274940491f,
-    0.499752789735794f,
-  0.484662592411041f, 0.499764710664749f, 0.485045909881592f,
-    0.499776333570480f,
-  0.485429257154465f, 0.499787658452988f, 0.485812574625015f,
-    0.499798685312271f,
-  0.486195921897888f, 0.499809414148331f, 0.486579269170761f,
-    0.499819844961166f,
-  0.486962646245956f, 0.499830007553101f, 0.487346023321152f,
-    0.499839842319489f,
-  0.487729400396347f, 0.499849408864975f, 0.488112777471542f,
-    0.499858677387238f,
-  0.488496154546738f, 0.499867647886276f, 0.488879561424255f,
-    0.499876320362091f,
-  0.489262968301773f, 0.499884694814682f, 0.489646375179291f,
-    0.499892801046371f,
-  0.490029782056808f, 0.499900579452515f, 0.490413218736649f,
-    0.499908089637756f,
-  0.490796625614166f, 0.499915301799774f, 0.491180062294006f,
-    0.499922215938568f,
-  0.491563498973846f, 0.499928832054138f, 0.491946935653687f,
-    0.499935150146484f,
-  0.492330402135849f, 0.499941170215607f, 0.492713838815689f,
-    0.499946922063828f,
-  0.493097305297852f, 0.499952346086502f, 0.493480771780014f,
-    0.499957501888275f,
-  0.493864238262177f, 0.499962359666824f, 0.494247704744339f,
-    0.499966919422150f,
-  0.494631171226501f, 0.499971181154251f, 0.495014637708664f,
-    0.499975144863129f,
-  0.495398133993149f, 0.499978810548782f, 0.495781600475311f,
-    0.499982208013535f,
-  0.496165096759796f, 0.499985307455063f, 0.496548563241959f,
-    0.499988079071045f,
-  0.496932059526443f, 0.499990582466125f, 0.497315555810928f,
-    0.499992787837982f,
-  0.497699022293091f, 0.499994695186615f, 0.498082518577576f,
-    0.499996334314346f,
-  0.498466014862061f, 0.499997645616531f, 0.498849511146545f,
-    0.499998688697815f,
-  0.499233007431030f, 0.499999403953552f, 0.499616503715515f,
-    0.499999850988388f,
-};
-
-
-/**    
-* \par   
-* Generation of realCoefB array:    
-* \par   
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-*    
-*/
-static const float32_t realCoefB[8192] = {
-  0.500000000000000f, 0.500000000000000f, 0.500383496284485f,
-    0.499999850988388f,
-  0.500766992568970f, 0.499999403953552f, 0.501150488853455f,
-    0.499998688697815f,
-  0.501533985137939f, 0.499997645616531f, 0.501917481422424f,
-    0.499996334314346f,
-  0.502300977706909f, 0.499994695186615f, 0.502684473991394f,
-    0.499992787837982f,
-  0.503067970275879f, 0.499990582466125f, 0.503451406955719f,
-    0.499988079071045f,
-  0.503834903240204f, 0.499985307455063f, 0.504218399524689f,
-    0.499982208013535f,
-  0.504601895809174f, 0.499978810548782f, 0.504985332489014f,
-    0.499975144863129f,
-  0.505368828773499f, 0.499971181154251f, 0.505752325057983f,
-    0.499966919422150f,
-  0.506135761737823f, 0.499962359666824f, 0.506519258022308f,
-    0.499957501888275f,
-  0.506902694702148f, 0.499952346086502f, 0.507286131381989f,
-    0.499946922063828f,
-  0.507669627666473f, 0.499941170215607f, 0.508053064346313f,
-    0.499935150146484f,
-  0.508436501026154f, 0.499928832054138f, 0.508819937705994f,
-    0.499922215938568f,
-  0.509203374385834f, 0.499915301799774f, 0.509586811065674f,
-    0.499908089637756f,
-  0.509970188140869f, 0.499900579452515f, 0.510353624820709f,
-    0.499892801046371f,
-  0.510737061500549f, 0.499884694814682f, 0.511120438575745f,
-    0.499876320362091f,
-  0.511503815650940f, 0.499867647886276f, 0.511887252330780f,
-    0.499858677387238f,
-  0.512270629405975f, 0.499849408864975f, 0.512654006481171f,
-    0.499839842319489f,
-  0.513037383556366f, 0.499830007553101f, 0.513420701026917f,
-    0.499819844961166f,
-  0.513804078102112f, 0.499809414148331f, 0.514187395572662f,
-    0.499798685312271f,
-  0.514570772647858f, 0.499787658452988f, 0.514954090118408f,
-    0.499776333570480f,
-  0.515337407588959f, 0.499764710664749f, 0.515720725059509f,
-    0.499752789735794f,
-  0.516103982925415f, 0.499740600585938f, 0.516487300395966f,
-    0.499728083610535f,
-  0.516870558261871f, 0.499715298414230f, 0.517253875732422f,
-    0.499702215194702f,
-  0.517637133598328f, 0.499688833951950f, 0.518020391464233f,
-    0.499675154685974f,
-  0.518403589725494f, 0.499661177396774f, 0.518786847591400f,
-    0.499646931886673f,
-  0.519170045852661f, 0.499632388353348f, 0.519553244113922f,
-    0.499617516994476f,
-  0.519936442375183f, 0.499602377414703f, 0.520319640636444f,
-    0.499586939811707f,
-  0.520702838897705f, 0.499571204185486f, 0.521085977554321f,
-    0.499555170536041f,
-  0.521469116210938f, 0.499538868665695f, 0.521852254867554f,
-    0.499522238969803f,
-  0.522235393524170f, 0.499505341053009f, 0.522618472576141f,
-    0.499488145112991f,
-  0.523001611232758f, 0.499470651149750f, 0.523384690284729f,
-    0.499452859163284f,
-  0.523767769336700f, 0.499434769153595f, 0.524150788784027f,
-    0.499416410923004f,
-  0.524533808231354f, 0.499397724866867f, 0.524916887283325f,
-    0.499378770589828f,
-  0.525299847126007f, 0.499359518289566f, 0.525682866573334f,
-    0.499339967966080f,
-  0.526065826416016f, 0.499320119619370f, 0.526448845863342f,
-    0.499299973249435f,
-  0.526831746101379f, 0.499279528856277f, 0.527214705944061f,
-    0.499258816242218f,
-  0.527597606182098f, 0.499237775802612f, 0.527980506420136f,
-    0.499216467142105f,
-  0.528363406658173f, 0.499194860458374f, 0.528746306896210f,
-    0.499172955751419f,
-  0.529129147529602f, 0.499150782823563f, 0.529511988162994f,
-    0.499128282070160f,
-  0.529894769191742f, 0.499105513095856f, 0.530277609825134f,
-    0.499082416296005f,
-  0.530660390853882f, 0.499059051275253f, 0.531043112277985f,
-    0.499035388231277f,
-  0.531425893306732f, 0.499011427164078f, 0.531808614730835f,
-    0.498987197875977f,
-  0.532191336154938f, 0.498962640762329f, 0.532573997974396f,
-    0.498937815427780f,
-  0.532956659793854f, 0.498912662267685f, 0.533339321613312f,
-    0.498887240886688f,
-  0.533721983432770f, 0.498861521482468f, 0.534104585647583f,
-    0.498835533857346f,
-  0.534487187862396f, 0.498809218406677f, 0.534869730472565f,
-    0.498782604932785f,
-  0.535252273082733f, 0.498755723237991f, 0.535634815692902f,
-    0.498728543519974f,
-  0.536017298698425f, 0.498701065778732f, 0.536399841308594f,
-    0.498673290014267f,
-  0.536782264709473f, 0.498645216226578f, 0.537164747714996f,
-    0.498616874217987f,
-  0.537547171115875f, 0.498588204383850f, 0.537929534912109f,
-    0.498559266328812f,
-  0.538311958312988f, 0.498530030250549f, 0.538694262504578f,
-    0.498500496149063f,
-  0.539076626300812f, 0.498470664024353f, 0.539458930492401f,
-    0.498440563678741f,
-  0.539841234683990f, 0.498410135507584f, 0.540223479270935f,
-    0.498379439115524f,
-  0.540605723857880f, 0.498348444700241f, 0.540987968444824f,
-    0.498317152261734f,
-  0.541370153427124f, 0.498285561800003f, 0.541752278804779f,
-    0.498253703117371f,
-  0.542134463787079f, 0.498221516609192f, 0.542516589164734f,
-    0.498189061880112f,
-  0.542898654937744f, 0.498156309127808f, 0.543280720710754f,
-    0.498123258352280f,
-  0.543662786483765f, 0.498089909553528f, 0.544044792652130f,
-    0.498056292533875f,
-  0.544426798820496f, 0.498022347688675f, 0.544808745384216f,
-    0.497988134622574f,
-  0.545190691947937f, 0.497953623533249f, 0.545572578907013f,
-    0.497918814420700f,
-  0.545954465866089f, 0.497883707284927f, 0.546336352825165f,
-    0.497848302125931f,
-  0.546718180179596f, 0.497812628746033f, 0.547099947929382f,
-    0.497776657342911f,
-  0.547481775283813f, 0.497740387916565f, 0.547863483428955f,
-    0.497703820466995f,
-  0.548245191574097f, 0.497666954994202f, 0.548626899719238f,
-    0.497629791498184f,
-  0.549008548259735f, 0.497592359781265f, 0.549390196800232f,
-    0.497554630041122f,
-  0.549771785736084f, 0.497516602277756f, 0.550153374671936f,
-    0.497478276491165f,
-  0.550534904003143f, 0.497439652681351f, 0.550916433334351f,
-    0.497400760650635f,
-  0.551297962665558f, 0.497361570596695f, 0.551679372787476f,
-    0.497322082519531f,
-  0.552060842514038f, 0.497282296419144f, 0.552442193031311f,
-    0.497242212295532f,
-  0.552823603153229f, 0.497201830148697f, 0.553204894065857f,
-    0.497161179780960f,
-  0.553586184978485f, 0.497120231389999f, 0.553967475891113f,
-    0.497078984975815f,
-  0.554348707199097f, 0.497037440538406f, 0.554729938507080f,
-    0.496995598077774f,
-  0.555111110210419f, 0.496953487396240f, 0.555492222309113f,
-    0.496911078691483f,
-  0.555873334407806f, 0.496868371963501f, 0.556254446506500f,
-    0.496825367212296f,
-  0.556635499000549f, 0.496782064437866f, 0.557016491889954f,
-    0.496738493442535f,
-  0.557397484779358f, 0.496694594621658f, 0.557778418064117f,
-    0.496650427579880f,
-  0.558159291744232f, 0.496605962514877f, 0.558540165424347f,
-    0.496561229228973f,
-  0.558921039104462f, 0.496516168117523f, 0.559301853179932f,
-    0.496470838785172f,
-  0.559682607650757f, 0.496425211429596f, 0.560063362121582f,
-    0.496379286050797f,
-  0.560444056987762f, 0.496333062648773f, 0.560824692249298f,
-    0.496286571025848f,
-  0.561205327510834f, 0.496239781379700f, 0.561585903167725f,
-    0.496192663908005f,
-  0.561966478824615f, 0.496145308017731f, 0.562346994876862f,
-    0.496097624301910f,
-  0.562727510929108f, 0.496049642562866f, 0.563107967376709f,
-    0.496001392602921f,
-  0.563488364219666f, 0.495952844619751f, 0.563868701457977f,
-    0.495903998613358f,
-  0.564249038696289f, 0.495854884386063f, 0.564629375934601f,
-    0.495805442333221f,
-  0.565009593963623f, 0.495755732059479f, 0.565389811992645f,
-    0.495705723762512f,
-  0.565770030021667f, 0.495655417442322f, 0.566150128841400f,
-    0.495604842901230f,
-  0.566530287265778f, 0.495553970336914f, 0.566910326480865f,
-    0.495502769947052f,
-  0.567290365695953f, 0.495451331138611f, 0.567670345306396f,
-    0.495399564504623f,
-  0.568050265312195f, 0.495347499847412f, 0.568430185317993f,
-    0.495295166969299f,
-  0.568810045719147f, 0.495242536067963f, 0.569189906120300f,
-    0.495189607143402f,
-  0.569569647312164f, 0.495136409997940f, 0.569949388504028f,
-    0.495082914829254f,
-  0.570329129695892f, 0.495029091835022f, 0.570708811283112f,
-    0.494975030422211f,
-  0.571088373661041f, 0.494920641183853f, 0.571467995643616f,
-    0.494865983724594f,
-  0.571847498416901f, 0.494810998439789f, 0.572227001190186f,
-    0.494755744934082f,
-  0.572606444358826f, 0.494700223207474f, 0.572985887527466f,
-    0.494644373655319f,
-  0.573365211486816f, 0.494588255882263f, 0.573744535446167f,
-    0.494531840085983f,
-  0.574123859405518f, 0.494475126266479f, 0.574503064155579f,
-    0.494418144226074f,
-  0.574882268905640f, 0.494360834360123f, 0.575261414051056f,
-    0.494303256273270f,
-  0.575640499591827f, 0.494245409965515f, 0.576019585132599f,
-    0.494187235832214f,
-  0.576398611068726f, 0.494128793478012f, 0.576777577400208f,
-    0.494070053100586f,
-  0.577156484127045f, 0.494011014699936f, 0.577535390853882f,
-    0.493951678276062f,
-  0.577914178371429f, 0.493892073631287f, 0.578292965888977f,
-    0.493832170963287f,
-  0.578671753406525f, 0.493771970272064f, 0.579050421714783f,
-    0.493711471557617f,
-  0.579429090023041f, 0.493650704622269f, 0.579807698726654f,
-    0.493589639663696f,
-  0.580186247825623f, 0.493528276681900f, 0.580564737319946f,
-    0.493466645479202f,
-  0.580943167209625f, 0.493404686450958f, 0.581321597099304f,
-    0.493342459201813f,
-  0.581699967384338f, 0.493279963731766f, 0.582078278064728f,
-    0.493217140436172f,
-  0.582456588745117f, 0.493154048919678f, 0.582834780216217f,
-    0.493090659379959f,
-  0.583212971687317f, 0.493026971817017f, 0.583591103553772f,
-    0.492963016033173f,
-  0.583969175815582f, 0.492898762226105f, 0.584347188472748f,
-    0.492834210395813f,
-  0.584725141525269f, 0.492769360542297f, 0.585103094577789f,
-    0.492704242467880f,
-  0.585480928421021f, 0.492638826370239f, 0.585858762264252f,
-    0.492573112249374f,
-  0.586236536502838f, 0.492507129907608f, 0.586614251136780f,
-    0.492440819740295f,
-  0.586991965770721f, 0.492374241352081f, 0.587369561195374f,
-    0.492307394742966f,
-  0.587747097015381f, 0.492240220308304f, 0.588124632835388f,
-    0.492172777652740f,
-  0.588502109050751f, 0.492105036973953f, 0.588879525661469f,
-    0.492037028074265f,
-  0.589256882667542f, 0.491968721151352f, 0.589634180068970f,
-    0.491900116205215f,
-  0.590011477470398f, 0.491831213235855f, 0.590388655662537f,
-    0.491762012243271f,
-  0.590765833854675f, 0.491692543029785f, 0.591142892837524f,
-    0.491622805595398f,
-  0.591519951820374f, 0.491552740335464f, 0.591896951198578f,
-    0.491482406854630f,
-  0.592273890972137f, 0.491411775350571f, 0.592650771141052f,
-    0.491340845823288f,
-  0.593027591705322f, 0.491269648075104f, 0.593404352664948f,
-    0.491198152303696f,
-  0.593781054019928f, 0.491126358509064f, 0.594157755374908f,
-    0.491054296493530f,
-  0.594534337520599f, 0.490981936454773f, 0.594910860061646f,
-    0.490909278392792f,
-  0.595287382602692f, 0.490836352109909f, 0.595663845539093f,
-    0.490763127803802f,
-  0.596040189266205f, 0.490689605474472f, 0.596416532993317f,
-    0.490615785121918f,
-  0.596792817115784f, 0.490541696548462f, 0.597168982028961f,
-    0.490467309951782f,
-  0.597545146942139f, 0.490392625331879f, 0.597921252250671f,
-    0.490317672491074f,
-  0.598297297954559f, 0.490242421627045f, 0.598673284053802f,
-    0.490166902542114f,
-  0.599049210548401f, 0.490091055631638f, 0.599425077438354f,
-    0.490014940500259f,
-  0.599800884723663f, 0.489938557147980f, 0.600176632404327f,
-    0.489861875772476f,
-  0.600552320480347f, 0.489784896373749f, 0.600927948951721f,
-    0.489707618951797f,
-  0.601303517818451f, 0.489630073308945f, 0.601679027080536f,
-    0.489552229642868f,
-  0.602054476737976f, 0.489474087953568f, 0.602429866790771f,
-    0.489395678043365f,
-  0.602805197238922f, 0.489316970109940f, 0.603180468082428f,
-    0.489237964153290f,
-  0.603555679321289f, 0.489158689975739f, 0.603930830955505f,
-    0.489079117774963f,
-  0.604305922985077f, 0.488999247550964f, 0.604680955410004f,
-    0.488919109106064f,
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-
-
-
-/**    
-* @brief  Initialization function for the floating-point RFFT/RIFFT.   
-* @deprecated Do not use this function.  It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed
-* in the future.
-* @param[in,out] *S             points to an instance of the floating-point RFFT/RIFFT structure.   
-* @param[in,out] *S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure.   
-* @param[in]     fftLenReal     length of the FFT.   
-* @param[in]     ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]     bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 128, 512, 2048.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    
-* This function also initializes Twiddle factor table.     
-*/
-
-arm_status arm_rfft_init_f32(
-  arm_rfft_instance_f32 * S,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag)
-{
-
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialize the Real FFT length */
-  S->fftLenReal = (uint16_t) fftLenReal;
-
-  /*  Initialize the Complex FFT length */
-  S->fftLenBy2 = (uint16_t) fftLenReal / 2u;
-
-  /*  Initialize the Twiddle coefficientA pointer */
-  S->pTwiddleAReal = (float32_t *) realCoefA;
-
-  /*  Initialize the Twiddle coefficientB pointer */
-  S->pTwiddleBReal = (float32_t *) realCoefB;
-
-  /*  Initialize the Flag for selection of RFFT or RIFFT */
-  S->ifftFlagR = (uint8_t) ifftFlagR;
-
-  /*  Initialize the Flag for calculation Bit reversal or not */
-  S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLenReal)
-  {
-    /* Init table modifier value */
-  case 8192u:
-    S->twidCoefRModifier = 1u;
-    break;
-  case 2048u:
-    S->twidCoefRModifier = 4u;
-    break;
-  case 512u:
-    S->twidCoefRModifier = 16u;
-    break;
-  case 128u:
-    S->twidCoefRModifier = 64u;
-    break;
-  default:
-    /*  Reporting argument error if rfftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  /* Init Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  if(S->ifftFlagR)
-  {
-    /* Initializes the CIFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1u, 0u);
-  }
-  else
-  {
-    /* Initializes the CFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0u, 0u);
-  }
-
-  /* return the status of RFFT Init function */
-  return (status);
-
-}
-
-  /**    
-   * @} end of RealFFT group    
-   */
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c
deleted file mode 100644
index 79f5002b..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q15.c
+++ /dev/null
@@ -1,2235 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_q15.c    
-*    
-* Description:	RFFT & RIFFT Q15 initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include "arm_const_structs.h"
-
-/**    
-* @ingroup groupTransforms    
-*/
-
-/**    
-* @addtogroup RealFFT    
-* @{    
-*/
-
-
-
-/**    
-* \par    
-* Generation fixed-point realCoefAQ15 array in Q15 format:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
    
-* \par    
-* Convert to fixed point Q15 format    
-*       round(pATable[i] * pow(2, 15))    
-*/
-static const q15_t ALIGN4 realCoefAQ15[8192] = {
-    0x4000, 0xc000, 0x3ff3, 0xc000, 0x3fe7, 0xc000, 0x3fda, 0xc000,
-    0x3fce, 0xc000, 0x3fc1, 0xc000, 0x3fb5, 0xc000, 0x3fa8, 0xc000,
-    0x3f9b, 0xc000, 0x3f8f, 0xc000, 0x3f82, 0xc000, 0x3f76, 0xc001,
-    0x3f69, 0xc001, 0x3f5d, 0xc001, 0x3f50, 0xc001, 0x3f44, 0xc001,
-    0x3f37, 0xc001, 0x3f2a, 0xc001, 0x3f1e, 0xc002, 0x3f11, 0xc002,
-    0x3f05, 0xc002, 0x3ef8, 0xc002, 0x3eec, 0xc002, 0x3edf, 0xc003,
-    0x3ed2, 0xc003, 0x3ec6, 0xc003, 0x3eb9, 0xc003, 0x3ead, 0xc004,
-    0x3ea0, 0xc004, 0x3e94, 0xc004, 0x3e87, 0xc004, 0x3e7a, 0xc005,
-    0x3e6e, 0xc005, 0x3e61, 0xc005, 0x3e55, 0xc006, 0x3e48, 0xc006,
-    0x3e3c, 0xc006, 0x3e2f, 0xc007, 0x3e23, 0xc007, 0x3e16, 0xc007,
-    0x3e09, 0xc008, 0x3dfd, 0xc008, 0x3df0, 0xc009, 0x3de4, 0xc009,
-    0x3dd7, 0xc009, 0x3dcb, 0xc00a, 0x3dbe, 0xc00a, 0x3db2, 0xc00b,
-    0x3da5, 0xc00b, 0x3d98, 0xc00c, 0x3d8c, 0xc00c, 0x3d7f, 0xc00d,
-    0x3d73, 0xc00d, 0x3d66, 0xc00e, 0x3d5a, 0xc00e, 0x3d4d, 0xc00f,
-    0x3d40, 0xc00f, 0x3d34, 0xc010, 0x3d27, 0xc010, 0x3d1b, 0xc011,
-    0x3d0e, 0xc011, 0x3d02, 0xc012, 0x3cf5, 0xc013, 0x3ce9, 0xc013,
-    0x3cdc, 0xc014, 0x3cd0, 0xc014, 0x3cc3, 0xc015, 0x3cb6, 0xc016,
-    0x3caa, 0xc016, 0x3c9d, 0xc017, 0x3c91, 0xc018, 0x3c84, 0xc018,
-    0x3c78, 0xc019, 0x3c6b, 0xc01a, 0x3c5f, 0xc01a, 0x3c52, 0xc01b,
-    0x3c45, 0xc01c, 0x3c39, 0xc01d, 0x3c2c, 0xc01d, 0x3c20, 0xc01e,
-    0x3c13, 0xc01f, 0x3c07, 0xc020, 0x3bfa, 0xc020, 0x3bee, 0xc021,
-    0x3be1, 0xc022, 0x3bd5, 0xc023, 0x3bc8, 0xc024, 0x3bbc, 0xc024,
-    0x3baf, 0xc025, 0x3ba2, 0xc026, 0x3b96, 0xc027, 0x3b89, 0xc028,
-    0x3b7d, 0xc029, 0x3b70, 0xc02a, 0x3b64, 0xc02b, 0x3b57, 0xc02b,
-    0x3b4b, 0xc02c, 0x3b3e, 0xc02d, 0x3b32, 0xc02e, 0x3b25, 0xc02f,
-    0x3b19, 0xc030, 0x3b0c, 0xc031, 0x3b00, 0xc032, 0x3af3, 0xc033,
-    0x3ae6, 0xc034, 0x3ada, 0xc035, 0x3acd, 0xc036, 0x3ac1, 0xc037,
-    0x3ab4, 0xc038, 0x3aa8, 0xc039, 0x3a9b, 0xc03a, 0x3a8f, 0xc03b,
-    0x3a82, 0xc03c, 0x3a76, 0xc03d, 0x3a69, 0xc03f, 0x3a5d, 0xc040,
-    0x3a50, 0xc041, 0x3a44, 0xc042, 0x3a37, 0xc043, 0x3a2b, 0xc044,
-    0x3a1e, 0xc045, 0x3a12, 0xc047, 0x3a05, 0xc048, 0x39f9, 0xc049,
-    0x39ec, 0xc04a, 0x39e0, 0xc04b, 0x39d3, 0xc04c, 0x39c7, 0xc04e,
-    0x39ba, 0xc04f, 0x39ae, 0xc050, 0x39a1, 0xc051, 0x3995, 0xc053,
-    0x3988, 0xc054, 0x397c, 0xc055, 0x396f, 0xc056, 0x3963, 0xc058,
-    0x3956, 0xc059, 0x394a, 0xc05a, 0x393d, 0xc05c, 0x3931, 0xc05d,
-    0x3924, 0xc05e, 0x3918, 0xc060, 0x390b, 0xc061, 0x38ff, 0xc062,
-    0x38f2, 0xc064, 0x38e6, 0xc065, 0x38d9, 0xc067, 0x38cd, 0xc068,
-    0x38c0, 0xc069, 0x38b4, 0xc06b, 0x38a7, 0xc06c, 0x389b, 0xc06e,
-    0x388e, 0xc06f, 0x3882, 0xc071, 0x3875, 0xc072, 0x3869, 0xc074,
-    0x385c, 0xc075, 0x3850, 0xc077, 0x3843, 0xc078, 0x3837, 0xc07a,
-    0x382a, 0xc07b, 0x381e, 0xc07d, 0x3811, 0xc07e, 0x3805, 0xc080,
-    0x37f9, 0xc081, 0x37ec, 0xc083, 0x37e0, 0xc085, 0x37d3, 0xc086,
-    0x37c7, 0xc088, 0x37ba, 0xc089, 0x37ae, 0xc08b, 0x37a1, 0xc08d,
-    0x3795, 0xc08e, 0x3788, 0xc090, 0x377c, 0xc092, 0x376f, 0xc093,
-    0x3763, 0xc095, 0x3757, 0xc097, 0x374a, 0xc098, 0x373e, 0xc09a,
-    0x3731, 0xc09c, 0x3725, 0xc09e, 0x3718, 0xc09f, 0x370c, 0xc0a1,
-    0x36ff, 0xc0a3, 0x36f3, 0xc0a5, 0x36e7, 0xc0a6, 0x36da, 0xc0a8,
-    0x36ce, 0xc0aa, 0x36c1, 0xc0ac, 0x36b5, 0xc0ae, 0x36a8, 0xc0af,
-    0x369c, 0xc0b1, 0x3690, 0xc0b3, 0x3683, 0xc0b5, 0x3677, 0xc0b7,
-    0x366a, 0xc0b9, 0x365e, 0xc0bb, 0x3651, 0xc0bd, 0x3645, 0xc0be,
-    0x3639, 0xc0c0, 0x362c, 0xc0c2, 0x3620, 0xc0c4, 0x3613, 0xc0c6,
-    0x3607, 0xc0c8, 0x35fa, 0xc0ca, 0x35ee, 0xc0cc, 0x35e2, 0xc0ce,
-    0x35d5, 0xc0d0, 0x35c9, 0xc0d2, 0x35bc, 0xc0d4, 0x35b0, 0xc0d6,
-    0x35a4, 0xc0d8, 0x3597, 0xc0da, 0x358b, 0xc0dc, 0x357e, 0xc0de,
-    0x3572, 0xc0e0, 0x3566, 0xc0e2, 0x3559, 0xc0e4, 0x354d, 0xc0e7,
-    0x3540, 0xc0e9, 0x3534, 0xc0eb, 0x3528, 0xc0ed, 0x351b, 0xc0ef,
-    0x350f, 0xc0f1, 0x3503, 0xc0f3, 0x34f6, 0xc0f6, 0x34ea, 0xc0f8,
-    0x34dd, 0xc0fa, 0x34d1, 0xc0fc, 0x34c5, 0xc0fe, 0x34b8, 0xc100,
-    0x34ac, 0xc103, 0x34a0, 0xc105, 0x3493, 0xc107, 0x3487, 0xc109,
-    0x347b, 0xc10c, 0x346e, 0xc10e, 0x3462, 0xc110, 0x3455, 0xc113,
-    0x3449, 0xc115, 0x343d, 0xc117, 0x3430, 0xc119, 0x3424, 0xc11c,
-    0x3418, 0xc11e, 0x340b, 0xc120, 0x33ff, 0xc123, 0x33f3, 0xc125,
-    0x33e6, 0xc128, 0x33da, 0xc12a, 0x33ce, 0xc12c, 0x33c1, 0xc12f,
-    0x33b5, 0xc131, 0x33a9, 0xc134, 0x339c, 0xc136, 0x3390, 0xc138,
-    0x3384, 0xc13b, 0x3377, 0xc13d, 0x336b, 0xc140, 0x335f, 0xc142,
-    0x3352, 0xc145, 0x3346, 0xc147, 0x333a, 0xc14a, 0x332d, 0xc14c,
-    0x3321, 0xc14f, 0x3315, 0xc151, 0x3308, 0xc154, 0x32fc, 0xc156,
-    0x32f0, 0xc159, 0x32e4, 0xc15b, 0x32d7, 0xc15e, 0x32cb, 0xc161,
-    0x32bf, 0xc163, 0x32b2, 0xc166, 0x32a6, 0xc168, 0x329a, 0xc16b,
-    0x328e, 0xc16e, 0x3281, 0xc170, 0x3275, 0xc173, 0x3269, 0xc176,
-    0x325c, 0xc178, 0x3250, 0xc17b, 0x3244, 0xc17e, 0x3238, 0xc180,
-    0x322b, 0xc183, 0x321f, 0xc186, 0x3213, 0xc189, 0x3207, 0xc18b,
-    0x31fa, 0xc18e, 0x31ee, 0xc191, 0x31e2, 0xc194, 0x31d5, 0xc196,
-    0x31c9, 0xc199, 0x31bd, 0xc19c, 0x31b1, 0xc19f, 0x31a4, 0xc1a2,
-    0x3198, 0xc1a4, 0x318c, 0xc1a7, 0x3180, 0xc1aa, 0x3174, 0xc1ad,
-    0x3167, 0xc1b0, 0x315b, 0xc1b3, 0x314f, 0xc1b6, 0x3143, 0xc1b8,
-    0x3136, 0xc1bb, 0x312a, 0xc1be, 0x311e, 0xc1c1, 0x3112, 0xc1c4,
-    0x3105, 0xc1c7, 0x30f9, 0xc1ca, 0x30ed, 0xc1cd, 0x30e1, 0xc1d0,
-    0x30d5, 0xc1d3, 0x30c8, 0xc1d6, 0x30bc, 0xc1d9, 0x30b0, 0xc1dc,
-    0x30a4, 0xc1df, 0x3098, 0xc1e2, 0x308b, 0xc1e5, 0x307f, 0xc1e8,
-    0x3073, 0xc1eb, 0x3067, 0xc1ee, 0x305b, 0xc1f1, 0x304e, 0xc1f4,
-    0x3042, 0xc1f7, 0x3036, 0xc1fa, 0x302a, 0xc1fd, 0x301e, 0xc201,
-    0x3012, 0xc204, 0x3005, 0xc207, 0x2ff9, 0xc20a, 0x2fed, 0xc20d,
-    0x2fe1, 0xc210, 0x2fd5, 0xc213, 0x2fc9, 0xc217, 0x2fbc, 0xc21a,
-    0x2fb0, 0xc21d, 0x2fa4, 0xc220, 0x2f98, 0xc223, 0x2f8c, 0xc227,
-    0x2f80, 0xc22a, 0x2f74, 0xc22d, 0x2f67, 0xc230, 0x2f5b, 0xc234,
-    0x2f4f, 0xc237, 0x2f43, 0xc23a, 0x2f37, 0xc23e, 0x2f2b, 0xc241,
-    0x2f1f, 0xc244, 0x2f13, 0xc247, 0x2f06, 0xc24b, 0x2efa, 0xc24e,
-    0x2eee, 0xc251, 0x2ee2, 0xc255, 0x2ed6, 0xc258, 0x2eca, 0xc25c,
-    0x2ebe, 0xc25f, 0x2eb2, 0xc262, 0x2ea6, 0xc266, 0x2e99, 0xc269,
-    0x2e8d, 0xc26d, 0x2e81, 0xc270, 0x2e75, 0xc273, 0x2e69, 0xc277,
-    0x2e5d, 0xc27a, 0x2e51, 0xc27e, 0x2e45, 0xc281, 0x2e39, 0xc285,
-    0x2e2d, 0xc288, 0x2e21, 0xc28c, 0x2e15, 0xc28f, 0x2e09, 0xc293,
-    0x2dfc, 0xc296, 0x2df0, 0xc29a, 0x2de4, 0xc29d, 0x2dd8, 0xc2a1,
-    0x2dcc, 0xc2a5, 0x2dc0, 0xc2a8, 0x2db4, 0xc2ac, 0x2da8, 0xc2af,
-    0x2d9c, 0xc2b3, 0x2d90, 0xc2b7, 0x2d84, 0xc2ba, 0x2d78, 0xc2be,
-    0x2d6c, 0xc2c1, 0x2d60, 0xc2c5, 0x2d54, 0xc2c9, 0x2d48, 0xc2cc,
-    0x2d3c, 0xc2d0, 0x2d30, 0xc2d4, 0x2d24, 0xc2d8, 0x2d18, 0xc2db,
-    0x2d0c, 0xc2df, 0x2d00, 0xc2e3, 0x2cf4, 0xc2e6, 0x2ce8, 0xc2ea,
-    0x2cdc, 0xc2ee, 0x2cd0, 0xc2f2, 0x2cc4, 0xc2f5, 0x2cb8, 0xc2f9,
-    0x2cac, 0xc2fd, 0x2ca0, 0xc301, 0x2c94, 0xc305, 0x2c88, 0xc308,
-    0x2c7c, 0xc30c, 0x2c70, 0xc310, 0x2c64, 0xc314, 0x2c58, 0xc318,
-    0x2c4c, 0xc31c, 0x2c40, 0xc320, 0x2c34, 0xc323, 0x2c28, 0xc327,
-    0x2c1c, 0xc32b, 0x2c10, 0xc32f, 0x2c05, 0xc333, 0x2bf9, 0xc337,
-    0x2bed, 0xc33b, 0x2be1, 0xc33f, 0x2bd5, 0xc343, 0x2bc9, 0xc347,
-    0x2bbd, 0xc34b, 0x2bb1, 0xc34f, 0x2ba5, 0xc353, 0x2b99, 0xc357,
-    0x2b8d, 0xc35b, 0x2b81, 0xc35f, 0x2b75, 0xc363, 0x2b6a, 0xc367,
-    0x2b5e, 0xc36b, 0x2b52, 0xc36f, 0x2b46, 0xc373, 0x2b3a, 0xc377,
-    0x2b2e, 0xc37b, 0x2b22, 0xc37f, 0x2b16, 0xc383, 0x2b0a, 0xc387,
-    0x2aff, 0xc38c, 0x2af3, 0xc390, 0x2ae7, 0xc394, 0x2adb, 0xc398,
-    0x2acf, 0xc39c, 0x2ac3, 0xc3a0, 0x2ab7, 0xc3a5, 0x2aac, 0xc3a9,
-    0x2aa0, 0xc3ad, 0x2a94, 0xc3b1, 0x2a88, 0xc3b5, 0x2a7c, 0xc3ba,
-    0x2a70, 0xc3be, 0x2a65, 0xc3c2, 0x2a59, 0xc3c6, 0x2a4d, 0xc3ca,
-    0x2a41, 0xc3cf, 0x2a35, 0xc3d3, 0x2a29, 0xc3d7, 0x2a1e, 0xc3dc,
-    0x2a12, 0xc3e0, 0x2a06, 0xc3e4, 0x29fa, 0xc3e9, 0x29ee, 0xc3ed,
-    0x29e3, 0xc3f1, 0x29d7, 0xc3f6, 0x29cb, 0xc3fa, 0x29bf, 0xc3fe,
-    0x29b4, 0xc403, 0x29a8, 0xc407, 0x299c, 0xc40b, 0x2990, 0xc410,
-    0x2984, 0xc414, 0x2979, 0xc419, 0x296d, 0xc41d, 0x2961, 0xc422,
-    0x2955, 0xc426, 0x294a, 0xc42a, 0x293e, 0xc42f, 0x2932, 0xc433,
-    0x2926, 0xc438, 0x291b, 0xc43c, 0x290f, 0xc441, 0x2903, 0xc445,
-    0x28f7, 0xc44a, 0x28ec, 0xc44e, 0x28e0, 0xc453, 0x28d4, 0xc457,
-    0x28c9, 0xc45c, 0x28bd, 0xc461, 0x28b1, 0xc465, 0x28a5, 0xc46a,
-    0x289a, 0xc46e, 0x288e, 0xc473, 0x2882, 0xc478, 0x2877, 0xc47c,
-    0x286b, 0xc481, 0x285f, 0xc485, 0x2854, 0xc48a, 0x2848, 0xc48f,
-    0x283c, 0xc493, 0x2831, 0xc498, 0x2825, 0xc49d, 0x2819, 0xc4a1,
-    0x280e, 0xc4a6, 0x2802, 0xc4ab, 0x27f6, 0xc4b0, 0x27eb, 0xc4b4,
-    0x27df, 0xc4b9, 0x27d3, 0xc4be, 0x27c8, 0xc4c2, 0x27bc, 0xc4c7,
-    0x27b1, 0xc4cc, 0x27a5, 0xc4d1, 0x2799, 0xc4d6, 0x278e, 0xc4da,
-    0x2782, 0xc4df, 0x2777, 0xc4e4, 0x276b, 0xc4e9, 0x275f, 0xc4ee,
-    0x2754, 0xc4f2, 0x2748, 0xc4f7, 0x273d, 0xc4fc, 0x2731, 0xc501,
-    0x2725, 0xc506, 0x271a, 0xc50b, 0x270e, 0xc510, 0x2703, 0xc515,
-    0x26f7, 0xc51a, 0x26ec, 0xc51e, 0x26e0, 0xc523, 0x26d4, 0xc528,
-    0x26c9, 0xc52d, 0x26bd, 0xc532, 0x26b2, 0xc537, 0x26a6, 0xc53c,
-    0x269b, 0xc541, 0x268f, 0xc546, 0x2684, 0xc54b, 0x2678, 0xc550,
-    0x266d, 0xc555, 0x2661, 0xc55a, 0x2656, 0xc55f, 0x264a, 0xc564,
-    0x263f, 0xc569, 0x2633, 0xc56e, 0x2628, 0xc573, 0x261c, 0xc578,
-    0x2611, 0xc57e, 0x2605, 0xc583, 0x25fa, 0xc588, 0x25ee, 0xc58d,
-    0x25e3, 0xc592, 0x25d7, 0xc597, 0x25cc, 0xc59c, 0x25c0, 0xc5a1,
-    0x25b5, 0xc5a7, 0x25a9, 0xc5ac, 0x259e, 0xc5b1, 0x2592, 0xc5b6,
-    0x2587, 0xc5bb, 0x257c, 0xc5c1, 0x2570, 0xc5c6, 0x2565, 0xc5cb,
-    0x2559, 0xc5d0, 0x254e, 0xc5d5, 0x2542, 0xc5db, 0x2537, 0xc5e0,
-    0x252c, 0xc5e5, 0x2520, 0xc5ea, 0x2515, 0xc5f0, 0x2509, 0xc5f5,
-    0x24fe, 0xc5fa, 0x24f3, 0xc600, 0x24e7, 0xc605, 0x24dc, 0xc60a,
-    0x24d0, 0xc610, 0x24c5, 0xc615, 0x24ba, 0xc61a, 0x24ae, 0xc620,
-    0x24a3, 0xc625, 0x2498, 0xc62a, 0x248c, 0xc630, 0x2481, 0xc635,
-    0x2476, 0xc63b, 0x246a, 0xc640, 0x245f, 0xc645, 0x2454, 0xc64b,
-    0x2448, 0xc650, 0x243d, 0xc656, 0x2432, 0xc65b, 0x2426, 0xc661,
-    0x241b, 0xc666, 0x2410, 0xc66c, 0x2404, 0xc671, 0x23f9, 0xc677,
-    0x23ee, 0xc67c, 0x23e2, 0xc682, 0x23d7, 0xc687, 0x23cc, 0xc68d,
-    0x23c1, 0xc692, 0x23b5, 0xc698, 0x23aa, 0xc69d, 0x239f, 0xc6a3,
-    0x2394, 0xc6a8, 0x2388, 0xc6ae, 0x237d, 0xc6b4, 0x2372, 0xc6b9,
-    0x2367, 0xc6bf, 0x235b, 0xc6c5, 0x2350, 0xc6ca, 0x2345, 0xc6d0,
-    0x233a, 0xc6d5, 0x232e, 0xc6db, 0x2323, 0xc6e1, 0x2318, 0xc6e6,
-    0x230d, 0xc6ec, 0x2301, 0xc6f2, 0x22f6, 0xc6f7, 0x22eb, 0xc6fd,
-    0x22e0, 0xc703, 0x22d5, 0xc709, 0x22ca, 0xc70e, 0x22be, 0xc714,
-    0x22b3, 0xc71a, 0x22a8, 0xc720, 0x229d, 0xc725, 0x2292, 0xc72b,
-    0x2287, 0xc731, 0x227b, 0xc737, 0x2270, 0xc73d, 0x2265, 0xc742,
-    0x225a, 0xc748, 0x224f, 0xc74e, 0x2244, 0xc754, 0x2239, 0xc75a,
-    0x222d, 0xc75f, 0x2222, 0xc765, 0x2217, 0xc76b, 0x220c, 0xc771,
-    0x2201, 0xc777, 0x21f6, 0xc77d, 0x21eb, 0xc783, 0x21e0, 0xc789,
-    0x21d5, 0xc78f, 0x21ca, 0xc795, 0x21be, 0xc79a, 0x21b3, 0xc7a0,
-    0x21a8, 0xc7a6, 0x219d, 0xc7ac, 0x2192, 0xc7b2, 0x2187, 0xc7b8,
-    0x217c, 0xc7be, 0x2171, 0xc7c4, 0x2166, 0xc7ca, 0x215b, 0xc7d0,
-    0x2150, 0xc7d6, 0x2145, 0xc7dc, 0x213a, 0xc7e2, 0x212f, 0xc7e8,
-    0x2124, 0xc7ee, 0x2119, 0xc7f5, 0x210e, 0xc7fb, 0x2103, 0xc801,
-    0x20f8, 0xc807, 0x20ed, 0xc80d, 0x20e2, 0xc813, 0x20d7, 0xc819,
-    0x20cc, 0xc81f, 0x20c1, 0xc825, 0x20b6, 0xc82b, 0x20ab, 0xc832,
-    0x20a0, 0xc838, 0x2095, 0xc83e, 0x208a, 0xc844, 0x207f, 0xc84a,
-    0x2074, 0xc850, 0x2069, 0xc857, 0x205e, 0xc85d, 0x2054, 0xc863,
-    0x2049, 0xc869, 0x203e, 0xc870, 0x2033, 0xc876, 0x2028, 0xc87c,
-    0x201d, 0xc882, 0x2012, 0xc889, 0x2007, 0xc88f, 0x1ffc, 0xc895,
-    0x1ff1, 0xc89b, 0x1fe7, 0xc8a2, 0x1fdc, 0xc8a8, 0x1fd1, 0xc8ae,
-    0x1fc6, 0xc8b5, 0x1fbb, 0xc8bb, 0x1fb0, 0xc8c1, 0x1fa5, 0xc8c8,
-    0x1f9b, 0xc8ce, 0x1f90, 0xc8d4, 0x1f85, 0xc8db, 0x1f7a, 0xc8e1,
-    0x1f6f, 0xc8e8, 0x1f65, 0xc8ee, 0x1f5a, 0xc8f4, 0x1f4f, 0xc8fb,
-    0x1f44, 0xc901, 0x1f39, 0xc908, 0x1f2f, 0xc90e, 0x1f24, 0xc915,
-    0x1f19, 0xc91b, 0x1f0e, 0xc921, 0x1f03, 0xc928, 0x1ef9, 0xc92e,
-    0x1eee, 0xc935, 0x1ee3, 0xc93b, 0x1ed8, 0xc942, 0x1ece, 0xc948,
-    0x1ec3, 0xc94f, 0x1eb8, 0xc955, 0x1ead, 0xc95c, 0x1ea3, 0xc963,
-    0x1e98, 0xc969, 0x1e8d, 0xc970, 0x1e83, 0xc976, 0x1e78, 0xc97d,
-    0x1e6d, 0xc983, 0x1e62, 0xc98a, 0x1e58, 0xc991, 0x1e4d, 0xc997,
-    0x1e42, 0xc99e, 0x1e38, 0xc9a4, 0x1e2d, 0xc9ab, 0x1e22, 0xc9b2,
-    0x1e18, 0xc9b8, 0x1e0d, 0xc9bf, 0x1e02, 0xc9c6, 0x1df8, 0xc9cc,
-    0x1ded, 0xc9d3, 0x1de2, 0xc9da, 0x1dd8, 0xc9e0, 0x1dcd, 0xc9e7,
-    0x1dc3, 0xc9ee, 0x1db8, 0xc9f5, 0x1dad, 0xc9fb, 0x1da3, 0xca02,
-    0x1d98, 0xca09, 0x1d8e, 0xca10, 0x1d83, 0xca16, 0x1d78, 0xca1d,
-    0x1d6e, 0xca24, 0x1d63, 0xca2b, 0x1d59, 0xca32, 0x1d4e, 0xca38,
-    0x1d44, 0xca3f, 0x1d39, 0xca46, 0x1d2e, 0xca4d, 0x1d24, 0xca54,
-    0x1d19, 0xca5b, 0x1d0f, 0xca61, 0x1d04, 0xca68, 0x1cfa, 0xca6f,
-    0x1cef, 0xca76, 0x1ce5, 0xca7d, 0x1cda, 0xca84, 0x1cd0, 0xca8b,
-    0x1cc5, 0xca92, 0x1cbb, 0xca99, 0x1cb0, 0xca9f, 0x1ca6, 0xcaa6,
-    0x1c9b, 0xcaad, 0x1c91, 0xcab4, 0x1c86, 0xcabb, 0x1c7c, 0xcac2,
-    0x1c72, 0xcac9, 0x1c67, 0xcad0, 0x1c5d, 0xcad7, 0x1c52, 0xcade,
-    0x1c48, 0xcae5, 0x1c3d, 0xcaec, 0x1c33, 0xcaf3, 0x1c29, 0xcafa,
-    0x1c1e, 0xcb01, 0x1c14, 0xcb08, 0x1c09, 0xcb0f, 0x1bff, 0xcb16,
-    0x1bf5, 0xcb1e, 0x1bea, 0xcb25, 0x1be0, 0xcb2c, 0x1bd5, 0xcb33,
-    0x1bcb, 0xcb3a, 0x1bc1, 0xcb41, 0x1bb6, 0xcb48, 0x1bac, 0xcb4f,
-    0x1ba2, 0xcb56, 0x1b97, 0xcb5e, 0x1b8d, 0xcb65, 0x1b83, 0xcb6c,
-    0x1b78, 0xcb73, 0x1b6e, 0xcb7a, 0x1b64, 0xcb81, 0x1b59, 0xcb89,
-    0x1b4f, 0xcb90, 0x1b45, 0xcb97, 0x1b3b, 0xcb9e, 0x1b30, 0xcba5,
-    0x1b26, 0xcbad, 0x1b1c, 0xcbb4, 0x1b11, 0xcbbb, 0x1b07, 0xcbc2,
-    0x1afd, 0xcbca, 0x1af3, 0xcbd1, 0x1ae8, 0xcbd8, 0x1ade, 0xcbe0,
-    0x1ad4, 0xcbe7, 0x1aca, 0xcbee, 0x1abf, 0xcbf5, 0x1ab5, 0xcbfd,
-    0x1aab, 0xcc04, 0x1aa1, 0xcc0b, 0x1a97, 0xcc13, 0x1a8c, 0xcc1a,
-    0x1a82, 0xcc21, 0x1a78, 0xcc29, 0x1a6e, 0xcc30, 0x1a64, 0xcc38,
-    0x1a5a, 0xcc3f, 0x1a4f, 0xcc46, 0x1a45, 0xcc4e, 0x1a3b, 0xcc55,
-    0x1a31, 0xcc5d, 0x1a27, 0xcc64, 0x1a1d, 0xcc6b, 0x1a13, 0xcc73,
-    0x1a08, 0xcc7a, 0x19fe, 0xcc82, 0x19f4, 0xcc89, 0x19ea, 0xcc91,
-    0x19e0, 0xcc98, 0x19d6, 0xcca0, 0x19cc, 0xcca7, 0x19c2, 0xccaf,
-    0x19b8, 0xccb6, 0x19ae, 0xccbe, 0x19a4, 0xccc5, 0x199a, 0xcccd,
-    0x198f, 0xccd4, 0x1985, 0xccdc, 0x197b, 0xcce3, 0x1971, 0xcceb,
-    0x1967, 0xccf3, 0x195d, 0xccfa, 0x1953, 0xcd02, 0x1949, 0xcd09,
-    0x193f, 0xcd11, 0x1935, 0xcd19, 0x192b, 0xcd20, 0x1921, 0xcd28,
-    0x1917, 0xcd30, 0x190d, 0xcd37, 0x1903, 0xcd3f, 0x18f9, 0xcd46,
-    0x18ef, 0xcd4e, 0x18e6, 0xcd56, 0x18dc, 0xcd5d, 0x18d2, 0xcd65,
-    0x18c8, 0xcd6d, 0x18be, 0xcd75, 0x18b4, 0xcd7c, 0x18aa, 0xcd84,
-    0x18a0, 0xcd8c, 0x1896, 0xcd93, 0x188c, 0xcd9b, 0x1882, 0xcda3,
-    0x1878, 0xcdab, 0x186f, 0xcdb2, 0x1865, 0xcdba, 0x185b, 0xcdc2,
-    0x1851, 0xcdca, 0x1847, 0xcdd2, 0x183d, 0xcdd9, 0x1833, 0xcde1,
-    0x182a, 0xcde9, 0x1820, 0xcdf1, 0x1816, 0xcdf9, 0x180c, 0xce01,
-    0x1802, 0xce08, 0x17f8, 0xce10, 0x17ef, 0xce18, 0x17e5, 0xce20,
-    0x17db, 0xce28, 0x17d1, 0xce30, 0x17c8, 0xce38, 0x17be, 0xce40,
-    0x17b4, 0xce47, 0x17aa, 0xce4f, 0x17a0, 0xce57, 0x1797, 0xce5f,
-    0x178d, 0xce67, 0x1783, 0xce6f, 0x177a, 0xce77, 0x1770, 0xce7f,
-    0x1766, 0xce87, 0x175c, 0xce8f, 0x1753, 0xce97, 0x1749, 0xce9f,
-    0x173f, 0xcea7, 0x1736, 0xceaf, 0x172c, 0xceb7, 0x1722, 0xcebf,
-    0x1719, 0xcec7, 0x170f, 0xcecf, 0x1705, 0xced7, 0x16fc, 0xcedf,
-    0x16f2, 0xcee7, 0x16e8, 0xceef, 0x16df, 0xcef7, 0x16d5, 0xceff,
-    0x16cb, 0xcf07, 0x16c2, 0xcf10, 0x16b8, 0xcf18, 0x16af, 0xcf20,
-    0x16a5, 0xcf28, 0x169b, 0xcf30, 0x1692, 0xcf38, 0x1688, 0xcf40,
-    0x167f, 0xcf48, 0x1675, 0xcf51, 0x166c, 0xcf59, 0x1662, 0xcf61,
-    0x1659, 0xcf69, 0x164f, 0xcf71, 0x1645, 0xcf79, 0x163c, 0xcf82,
-    0x1632, 0xcf8a, 0x1629, 0xcf92, 0x161f, 0xcf9a, 0x1616, 0xcfa3,
-    0x160c, 0xcfab, 0x1603, 0xcfb3, 0x15f9, 0xcfbb, 0x15f0, 0xcfc4,
-    0x15e6, 0xcfcc, 0x15dd, 0xcfd4, 0x15d4, 0xcfdc, 0x15ca, 0xcfe5,
-    0x15c1, 0xcfed, 0x15b7, 0xcff5, 0x15ae, 0xcffe, 0x15a4, 0xd006,
-    0x159b, 0xd00e, 0x1592, 0xd016, 0x1588, 0xd01f, 0x157f, 0xd027,
-    0x1575, 0xd030, 0x156c, 0xd038, 0x1563, 0xd040, 0x1559, 0xd049,
-    0x1550, 0xd051, 0x1547, 0xd059, 0x153d, 0xd062, 0x1534, 0xd06a,
-    0x152a, 0xd073, 0x1521, 0xd07b, 0x1518, 0xd083, 0x150e, 0xd08c,
-    0x1505, 0xd094, 0x14fc, 0xd09d, 0x14f3, 0xd0a5, 0x14e9, 0xd0ae,
-    0x14e0, 0xd0b6, 0x14d7, 0xd0bf, 0x14cd, 0xd0c7, 0x14c4, 0xd0d0,
-    0x14bb, 0xd0d8, 0x14b2, 0xd0e0, 0x14a8, 0xd0e9, 0x149f, 0xd0f2,
-    0x1496, 0xd0fa, 0x148d, 0xd103, 0x1483, 0xd10b, 0x147a, 0xd114,
-    0x1471, 0xd11c, 0x1468, 0xd125, 0x145f, 0xd12d, 0x1455, 0xd136,
-    0x144c, 0xd13e, 0x1443, 0xd147, 0x143a, 0xd150, 0x1431, 0xd158,
-    0x1428, 0xd161, 0x141e, 0xd169, 0x1415, 0xd172, 0x140c, 0xd17b,
-    0x1403, 0xd183, 0x13fa, 0xd18c, 0x13f1, 0xd195, 0x13e8, 0xd19d,
-    0x13df, 0xd1a6, 0x13d5, 0xd1af, 0x13cc, 0xd1b7, 0x13c3, 0xd1c0,
-    0x13ba, 0xd1c9, 0x13b1, 0xd1d1, 0x13a8, 0xd1da, 0x139f, 0xd1e3,
-    0x1396, 0xd1eb, 0x138d, 0xd1f4, 0x1384, 0xd1fd, 0x137b, 0xd206,
-    0x1372, 0xd20e, 0x1369, 0xd217, 0x1360, 0xd220, 0x1357, 0xd229,
-    0x134e, 0xd231, 0x1345, 0xd23a, 0x133c, 0xd243, 0x1333, 0xd24c,
-    0x132a, 0xd255, 0x1321, 0xd25d, 0x1318, 0xd266, 0x130f, 0xd26f,
-    0x1306, 0xd278, 0x12fd, 0xd281, 0x12f4, 0xd28a, 0x12eb, 0xd292,
-    0x12e2, 0xd29b, 0x12d9, 0xd2a4, 0x12d1, 0xd2ad, 0x12c8, 0xd2b6,
-    0x12bf, 0xd2bf, 0x12b6, 0xd2c8, 0x12ad, 0xd2d1, 0x12a4, 0xd2d9,
-    0x129b, 0xd2e2, 0x1292, 0xd2eb, 0x128a, 0xd2f4, 0x1281, 0xd2fd,
-    0x1278, 0xd306, 0x126f, 0xd30f, 0x1266, 0xd318, 0x125d, 0xd321,
-    0x1255, 0xd32a, 0x124c, 0xd333, 0x1243, 0xd33c, 0x123a, 0xd345,
-    0x1231, 0xd34e, 0x1229, 0xd357, 0x1220, 0xd360, 0x1217, 0xd369,
-    0x120e, 0xd372, 0x1206, 0xd37b, 0x11fd, 0xd384, 0x11f4, 0xd38d,
-    0x11eb, 0xd396, 0x11e3, 0xd39f, 0x11da, 0xd3a8, 0x11d1, 0xd3b1,
-    0x11c9, 0xd3ba, 0x11c0, 0xd3c3, 0x11b7, 0xd3cc, 0x11af, 0xd3d5,
-    0x11a6, 0xd3df, 0x119d, 0xd3e8, 0x1195, 0xd3f1, 0x118c, 0xd3fa,
-    0x1183, 0xd403, 0x117b, 0xd40c, 0x1172, 0xd415, 0x1169, 0xd41e,
-    0x1161, 0xd428, 0x1158, 0xd431, 0x1150, 0xd43a, 0x1147, 0xd443,
-    0x113e, 0xd44c, 0x1136, 0xd455, 0x112d, 0xd45f, 0x1125, 0xd468,
-    0x111c, 0xd471, 0x1114, 0xd47a, 0x110b, 0xd483, 0x1103, 0xd48d,
-    0x10fa, 0xd496, 0x10f2, 0xd49f, 0x10e9, 0xd4a8, 0x10e0, 0xd4b2,
-    0x10d8, 0xd4bb, 0x10d0, 0xd4c4, 0x10c7, 0xd4cd, 0x10bf, 0xd4d7,
-    0x10b6, 0xd4e0, 0x10ae, 0xd4e9, 0x10a5, 0xd4f3, 0x109d, 0xd4fc,
-    0x1094, 0xd505, 0x108c, 0xd50e, 0x1083, 0xd518, 0x107b, 0xd521,
-    0x1073, 0xd52a, 0x106a, 0xd534, 0x1062, 0xd53d, 0x1059, 0xd547,
-    0x1051, 0xd550, 0x1049, 0xd559, 0x1040, 0xd563, 0x1038, 0xd56c,
-    0x1030, 0xd575, 0x1027, 0xd57f, 0x101f, 0xd588, 0x1016, 0xd592,
-    0x100e, 0xd59b, 0x1006, 0xd5a4, 0xffe, 0xd5ae, 0xff5, 0xd5b7,
-    0xfed, 0xd5c1, 0xfe5, 0xd5ca, 0xfdc, 0xd5d4, 0xfd4, 0xd5dd,
-    0xfcc, 0xd5e6, 0xfc4, 0xd5f0, 0xfbb, 0xd5f9, 0xfb3, 0xd603,
-    0xfab, 0xd60c, 0xfa3, 0xd616, 0xf9a, 0xd61f, 0xf92, 0xd629,
-    0xf8a, 0xd632, 0xf82, 0xd63c, 0xf79, 0xd645, 0xf71, 0xd64f,
-    0xf69, 0xd659, 0xf61, 0xd662, 0xf59, 0xd66c, 0xf51, 0xd675,
-    0xf48, 0xd67f, 0xf40, 0xd688, 0xf38, 0xd692, 0xf30, 0xd69b,
-    0xf28, 0xd6a5, 0xf20, 0xd6af, 0xf18, 0xd6b8, 0xf10, 0xd6c2,
-    0xf07, 0xd6cb, 0xeff, 0xd6d5, 0xef7, 0xd6df, 0xeef, 0xd6e8,
-    0xee7, 0xd6f2, 0xedf, 0xd6fc, 0xed7, 0xd705, 0xecf, 0xd70f,
-    0xec7, 0xd719, 0xebf, 0xd722, 0xeb7, 0xd72c, 0xeaf, 0xd736,
-    0xea7, 0xd73f, 0xe9f, 0xd749, 0xe97, 0xd753, 0xe8f, 0xd75c,
-    0xe87, 0xd766, 0xe7f, 0xd770, 0xe77, 0xd77a, 0xe6f, 0xd783,
-    0xe67, 0xd78d, 0xe5f, 0xd797, 0xe57, 0xd7a0, 0xe4f, 0xd7aa,
-    0xe47, 0xd7b4, 0xe40, 0xd7be, 0xe38, 0xd7c8, 0xe30, 0xd7d1,
-    0xe28, 0xd7db, 0xe20, 0xd7e5, 0xe18, 0xd7ef, 0xe10, 0xd7f8,
-    0xe08, 0xd802, 0xe01, 0xd80c, 0xdf9, 0xd816, 0xdf1, 0xd820,
-    0xde9, 0xd82a, 0xde1, 0xd833, 0xdd9, 0xd83d, 0xdd2, 0xd847,
-    0xdca, 0xd851, 0xdc2, 0xd85b, 0xdba, 0xd865, 0xdb2, 0xd86f,
-    0xdab, 0xd878, 0xda3, 0xd882, 0xd9b, 0xd88c, 0xd93, 0xd896,
-    0xd8c, 0xd8a0, 0xd84, 0xd8aa, 0xd7c, 0xd8b4, 0xd75, 0xd8be,
-    0xd6d, 0xd8c8, 0xd65, 0xd8d2, 0xd5d, 0xd8dc, 0xd56, 0xd8e6,
-    0xd4e, 0xd8ef, 0xd46, 0xd8f9, 0xd3f, 0xd903, 0xd37, 0xd90d,
-    0xd30, 0xd917, 0xd28, 0xd921, 0xd20, 0xd92b, 0xd19, 0xd935,
-    0xd11, 0xd93f, 0xd09, 0xd949, 0xd02, 0xd953, 0xcfa, 0xd95d,
-    0xcf3, 0xd967, 0xceb, 0xd971, 0xce3, 0xd97b, 0xcdc, 0xd985,
-    0xcd4, 0xd98f, 0xccd, 0xd99a, 0xcc5, 0xd9a4, 0xcbe, 0xd9ae,
-    0xcb6, 0xd9b8, 0xcaf, 0xd9c2, 0xca7, 0xd9cc, 0xca0, 0xd9d6,
-    0xc98, 0xd9e0, 0xc91, 0xd9ea, 0xc89, 0xd9f4, 0xc82, 0xd9fe,
-    0xc7a, 0xda08, 0xc73, 0xda13, 0xc6b, 0xda1d, 0xc64, 0xda27,
-    0xc5d, 0xda31, 0xc55, 0xda3b, 0xc4e, 0xda45, 0xc46, 0xda4f,
-    0xc3f, 0xda5a, 0xc38, 0xda64, 0xc30, 0xda6e, 0xc29, 0xda78,
-    0xc21, 0xda82, 0xc1a, 0xda8c, 0xc13, 0xda97, 0xc0b, 0xdaa1,
-    0xc04, 0xdaab, 0xbfd, 0xdab5, 0xbf5, 0xdabf, 0xbee, 0xdaca,
-    0xbe7, 0xdad4, 0xbe0, 0xdade, 0xbd8, 0xdae8, 0xbd1, 0xdaf3,
-    0xbca, 0xdafd, 0xbc2, 0xdb07, 0xbbb, 0xdb11, 0xbb4, 0xdb1c,
-    0xbad, 0xdb26, 0xba5, 0xdb30, 0xb9e, 0xdb3b, 0xb97, 0xdb45,
-    0xb90, 0xdb4f, 0xb89, 0xdb59, 0xb81, 0xdb64, 0xb7a, 0xdb6e,
-    0xb73, 0xdb78, 0xb6c, 0xdb83, 0xb65, 0xdb8d, 0xb5e, 0xdb97,
-    0xb56, 0xdba2, 0xb4f, 0xdbac, 0xb48, 0xdbb6, 0xb41, 0xdbc1,
-    0xb3a, 0xdbcb, 0xb33, 0xdbd5, 0xb2c, 0xdbe0, 0xb25, 0xdbea,
-    0xb1e, 0xdbf5, 0xb16, 0xdbff, 0xb0f, 0xdc09, 0xb08, 0xdc14,
-    0xb01, 0xdc1e, 0xafa, 0xdc29, 0xaf3, 0xdc33, 0xaec, 0xdc3d,
-    0xae5, 0xdc48, 0xade, 0xdc52, 0xad7, 0xdc5d, 0xad0, 0xdc67,
-    0xac9, 0xdc72, 0xac2, 0xdc7c, 0xabb, 0xdc86, 0xab4, 0xdc91,
-    0xaad, 0xdc9b, 0xaa6, 0xdca6, 0xa9f, 0xdcb0, 0xa99, 0xdcbb,
-    0xa92, 0xdcc5, 0xa8b, 0xdcd0, 0xa84, 0xdcda, 0xa7d, 0xdce5,
-    0xa76, 0xdcef, 0xa6f, 0xdcfa, 0xa68, 0xdd04, 0xa61, 0xdd0f,
-    0xa5b, 0xdd19, 0xa54, 0xdd24, 0xa4d, 0xdd2e, 0xa46, 0xdd39,
-    0xa3f, 0xdd44, 0xa38, 0xdd4e, 0xa32, 0xdd59, 0xa2b, 0xdd63,
-    0xa24, 0xdd6e, 0xa1d, 0xdd78, 0xa16, 0xdd83, 0xa10, 0xdd8e,
-    0xa09, 0xdd98, 0xa02, 0xdda3, 0x9fb, 0xddad, 0x9f5, 0xddb8,
-    0x9ee, 0xddc3, 0x9e7, 0xddcd, 0x9e0, 0xddd8, 0x9da, 0xdde2,
-    0x9d3, 0xdded, 0x9cc, 0xddf8, 0x9c6, 0xde02, 0x9bf, 0xde0d,
-    0x9b8, 0xde18, 0x9b2, 0xde22, 0x9ab, 0xde2d, 0x9a4, 0xde38,
-    0x99e, 0xde42, 0x997, 0xde4d, 0x991, 0xde58, 0x98a, 0xde62,
-    0x983, 0xde6d, 0x97d, 0xde78, 0x976, 0xde83, 0x970, 0xde8d,
-    0x969, 0xde98, 0x963, 0xdea3, 0x95c, 0xdead, 0x955, 0xdeb8,
-    0x94f, 0xdec3, 0x948, 0xdece, 0x942, 0xded8, 0x93b, 0xdee3,
-    0x935, 0xdeee, 0x92e, 0xdef9, 0x928, 0xdf03, 0x921, 0xdf0e,
-    0x91b, 0xdf19, 0x915, 0xdf24, 0x90e, 0xdf2f, 0x908, 0xdf39,
-    0x901, 0xdf44, 0x8fb, 0xdf4f, 0x8f4, 0xdf5a, 0x8ee, 0xdf65,
-    0x8e8, 0xdf6f, 0x8e1, 0xdf7a, 0x8db, 0xdf85, 0x8d4, 0xdf90,
-    0x8ce, 0xdf9b, 0x8c8, 0xdfa5, 0x8c1, 0xdfb0, 0x8bb, 0xdfbb,
-    0x8b5, 0xdfc6, 0x8ae, 0xdfd1, 0x8a8, 0xdfdc, 0x8a2, 0xdfe7,
-    0x89b, 0xdff1, 0x895, 0xdffc, 0x88f, 0xe007, 0x889, 0xe012,
-    0x882, 0xe01d, 0x87c, 0xe028, 0x876, 0xe033, 0x870, 0xe03e,
-    0x869, 0xe049, 0x863, 0xe054, 0x85d, 0xe05e, 0x857, 0xe069,
-    0x850, 0xe074, 0x84a, 0xe07f, 0x844, 0xe08a, 0x83e, 0xe095,
-    0x838, 0xe0a0, 0x832, 0xe0ab, 0x82b, 0xe0b6, 0x825, 0xe0c1,
-    0x81f, 0xe0cc, 0x819, 0xe0d7, 0x813, 0xe0e2, 0x80d, 0xe0ed,
-    0x807, 0xe0f8, 0x801, 0xe103, 0x7fb, 0xe10e, 0x7f5, 0xe119,
-    0x7ee, 0xe124, 0x7e8, 0xe12f, 0x7e2, 0xe13a, 0x7dc, 0xe145,
-    0x7d6, 0xe150, 0x7d0, 0xe15b, 0x7ca, 0xe166, 0x7c4, 0xe171,
-    0x7be, 0xe17c, 0x7b8, 0xe187, 0x7b2, 0xe192, 0x7ac, 0xe19d,
-    0x7a6, 0xe1a8, 0x7a0, 0xe1b3, 0x79a, 0xe1be, 0x795, 0xe1ca,
-    0x78f, 0xe1d5, 0x789, 0xe1e0, 0x783, 0xe1eb, 0x77d, 0xe1f6,
-    0x777, 0xe201, 0x771, 0xe20c, 0x76b, 0xe217, 0x765, 0xe222,
-    0x75f, 0xe22d, 0x75a, 0xe239, 0x754, 0xe244, 0x74e, 0xe24f,
-    0x748, 0xe25a, 0x742, 0xe265, 0x73d, 0xe270, 0x737, 0xe27b,
-    0x731, 0xe287, 0x72b, 0xe292, 0x725, 0xe29d, 0x720, 0xe2a8,
-    0x71a, 0xe2b3, 0x714, 0xe2be, 0x70e, 0xe2ca, 0x709, 0xe2d5,
-    0x703, 0xe2e0, 0x6fd, 0xe2eb, 0x6f7, 0xe2f6, 0x6f2, 0xe301,
-    0x6ec, 0xe30d, 0x6e6, 0xe318, 0x6e1, 0xe323, 0x6db, 0xe32e,
-    0x6d5, 0xe33a, 0x6d0, 0xe345, 0x6ca, 0xe350, 0x6c5, 0xe35b,
-    0x6bf, 0xe367, 0x6b9, 0xe372, 0x6b4, 0xe37d, 0x6ae, 0xe388,
-    0x6a8, 0xe394, 0x6a3, 0xe39f, 0x69d, 0xe3aa, 0x698, 0xe3b5,
-    0x692, 0xe3c1, 0x68d, 0xe3cc, 0x687, 0xe3d7, 0x682, 0xe3e2,
-    0x67c, 0xe3ee, 0x677, 0xe3f9, 0x671, 0xe404, 0x66c, 0xe410,
-    0x666, 0xe41b, 0x661, 0xe426, 0x65b, 0xe432, 0x656, 0xe43d,
-    0x650, 0xe448, 0x64b, 0xe454, 0x645, 0xe45f, 0x640, 0xe46a,
-    0x63b, 0xe476, 0x635, 0xe481, 0x630, 0xe48c, 0x62a, 0xe498,
-    0x625, 0xe4a3, 0x620, 0xe4ae, 0x61a, 0xe4ba, 0x615, 0xe4c5,
-    0x610, 0xe4d0, 0x60a, 0xe4dc, 0x605, 0xe4e7, 0x600, 0xe4f3,
-    0x5fa, 0xe4fe, 0x5f5, 0xe509, 0x5f0, 0xe515, 0x5ea, 0xe520,
-    0x5e5, 0xe52c, 0x5e0, 0xe537, 0x5db, 0xe542, 0x5d5, 0xe54e,
-    0x5d0, 0xe559, 0x5cb, 0xe565, 0x5c6, 0xe570, 0x5c1, 0xe57c,
-    0x5bb, 0xe587, 0x5b6, 0xe592, 0x5b1, 0xe59e, 0x5ac, 0xe5a9,
-    0x5a7, 0xe5b5, 0x5a1, 0xe5c0, 0x59c, 0xe5cc, 0x597, 0xe5d7,
-    0x592, 0xe5e3, 0x58d, 0xe5ee, 0x588, 0xe5fa, 0x583, 0xe605,
-    0x57e, 0xe611, 0x578, 0xe61c, 0x573, 0xe628, 0x56e, 0xe633,
-    0x569, 0xe63f, 0x564, 0xe64a, 0x55f, 0xe656, 0x55a, 0xe661,
-    0x555, 0xe66d, 0x550, 0xe678, 0x54b, 0xe684, 0x546, 0xe68f,
-    0x541, 0xe69b, 0x53c, 0xe6a6, 0x537, 0xe6b2, 0x532, 0xe6bd,
-    0x52d, 0xe6c9, 0x528, 0xe6d4, 0x523, 0xe6e0, 0x51e, 0xe6ec,
-    0x51a, 0xe6f7, 0x515, 0xe703, 0x510, 0xe70e, 0x50b, 0xe71a,
-    0x506, 0xe725, 0x501, 0xe731, 0x4fc, 0xe73d, 0x4f7, 0xe748,
-    0x4f2, 0xe754, 0x4ee, 0xe75f, 0x4e9, 0xe76b, 0x4e4, 0xe777,
-    0x4df, 0xe782, 0x4da, 0xe78e, 0x4d6, 0xe799, 0x4d1, 0xe7a5,
-    0x4cc, 0xe7b1, 0x4c7, 0xe7bc, 0x4c2, 0xe7c8, 0x4be, 0xe7d3,
-    0x4b9, 0xe7df, 0x4b4, 0xe7eb, 0x4b0, 0xe7f6, 0x4ab, 0xe802,
-    0x4a6, 0xe80e, 0x4a1, 0xe819, 0x49d, 0xe825, 0x498, 0xe831,
-    0x493, 0xe83c, 0x48f, 0xe848, 0x48a, 0xe854, 0x485, 0xe85f,
-    0x481, 0xe86b, 0x47c, 0xe877, 0x478, 0xe882, 0x473, 0xe88e,
-    0x46e, 0xe89a, 0x46a, 0xe8a5, 0x465, 0xe8b1, 0x461, 0xe8bd,
-    0x45c, 0xe8c9, 0x457, 0xe8d4, 0x453, 0xe8e0, 0x44e, 0xe8ec,
-    0x44a, 0xe8f7, 0x445, 0xe903, 0x441, 0xe90f, 0x43c, 0xe91b,
-    0x438, 0xe926, 0x433, 0xe932, 0x42f, 0xe93e, 0x42a, 0xe94a,
-    0x426, 0xe955, 0x422, 0xe961, 0x41d, 0xe96d, 0x419, 0xe979,
-    0x414, 0xe984, 0x410, 0xe990, 0x40b, 0xe99c, 0x407, 0xe9a8,
-    0x403, 0xe9b4, 0x3fe, 0xe9bf, 0x3fa, 0xe9cb, 0x3f6, 0xe9d7,
-    0x3f1, 0xe9e3, 0x3ed, 0xe9ee, 0x3e9, 0xe9fa, 0x3e4, 0xea06,
-    0x3e0, 0xea12, 0x3dc, 0xea1e, 0x3d7, 0xea29, 0x3d3, 0xea35,
-    0x3cf, 0xea41, 0x3ca, 0xea4d, 0x3c6, 0xea59, 0x3c2, 0xea65,
-    0x3be, 0xea70, 0x3ba, 0xea7c, 0x3b5, 0xea88, 0x3b1, 0xea94,
-    0x3ad, 0xeaa0, 0x3a9, 0xeaac, 0x3a5, 0xeab7, 0x3a0, 0xeac3,
-    0x39c, 0xeacf, 0x398, 0xeadb, 0x394, 0xeae7, 0x390, 0xeaf3,
-    0x38c, 0xeaff, 0x387, 0xeb0a, 0x383, 0xeb16, 0x37f, 0xeb22,
-    0x37b, 0xeb2e, 0x377, 0xeb3a, 0x373, 0xeb46, 0x36f, 0xeb52,
-    0x36b, 0xeb5e, 0x367, 0xeb6a, 0x363, 0xeb75, 0x35f, 0xeb81,
-    0x35b, 0xeb8d, 0x357, 0xeb99, 0x353, 0xeba5, 0x34f, 0xebb1,
-    0x34b, 0xebbd, 0x347, 0xebc9, 0x343, 0xebd5, 0x33f, 0xebe1,
-    0x33b, 0xebed, 0x337, 0xebf9, 0x333, 0xec05, 0x32f, 0xec10,
-    0x32b, 0xec1c, 0x327, 0xec28, 0x323, 0xec34, 0x320, 0xec40,
-    0x31c, 0xec4c, 0x318, 0xec58, 0x314, 0xec64, 0x310, 0xec70,
-    0x30c, 0xec7c, 0x308, 0xec88, 0x305, 0xec94, 0x301, 0xeca0,
-    0x2fd, 0xecac, 0x2f9, 0xecb8, 0x2f5, 0xecc4, 0x2f2, 0xecd0,
-    0x2ee, 0xecdc, 0x2ea, 0xece8, 0x2e6, 0xecf4, 0x2e3, 0xed00,
-    0x2df, 0xed0c, 0x2db, 0xed18, 0x2d8, 0xed24, 0x2d4, 0xed30,
-    0x2d0, 0xed3c, 0x2cc, 0xed48, 0x2c9, 0xed54, 0x2c5, 0xed60,
-    0x2c1, 0xed6c, 0x2be, 0xed78, 0x2ba, 0xed84, 0x2b7, 0xed90,
-    0x2b3, 0xed9c, 0x2af, 0xeda8, 0x2ac, 0xedb4, 0x2a8, 0xedc0,
-    0x2a5, 0xedcc, 0x2a1, 0xedd8, 0x29d, 0xede4, 0x29a, 0xedf0,
-    0x296, 0xedfc, 0x293, 0xee09, 0x28f, 0xee15, 0x28c, 0xee21,
-    0x288, 0xee2d, 0x285, 0xee39, 0x281, 0xee45, 0x27e, 0xee51,
-    0x27a, 0xee5d, 0x277, 0xee69, 0x273, 0xee75, 0x270, 0xee81,
-    0x26d, 0xee8d, 0x269, 0xee99, 0x266, 0xeea6, 0x262, 0xeeb2,
-    0x25f, 0xeebe, 0x25c, 0xeeca, 0x258, 0xeed6, 0x255, 0xeee2,
-    0x251, 0xeeee, 0x24e, 0xeefa, 0x24b, 0xef06, 0x247, 0xef13,
-    0x244, 0xef1f, 0x241, 0xef2b, 0x23e, 0xef37, 0x23a, 0xef43,
-    0x237, 0xef4f, 0x234, 0xef5b, 0x230, 0xef67, 0x22d, 0xef74,
-    0x22a, 0xef80, 0x227, 0xef8c, 0x223, 0xef98, 0x220, 0xefa4,
-    0x21d, 0xefb0, 0x21a, 0xefbc, 0x217, 0xefc9, 0x213, 0xefd5,
-    0x210, 0xefe1, 0x20d, 0xefed, 0x20a, 0xeff9, 0x207, 0xf005,
-    0x204, 0xf012, 0x201, 0xf01e, 0x1fd, 0xf02a, 0x1fa, 0xf036,
-    0x1f7, 0xf042, 0x1f4, 0xf04e, 0x1f1, 0xf05b, 0x1ee, 0xf067,
-    0x1eb, 0xf073, 0x1e8, 0xf07f, 0x1e5, 0xf08b, 0x1e2, 0xf098,
-    0x1df, 0xf0a4, 0x1dc, 0xf0b0, 0x1d9, 0xf0bc, 0x1d6, 0xf0c8,
-    0x1d3, 0xf0d5, 0x1d0, 0xf0e1, 0x1cd, 0xf0ed, 0x1ca, 0xf0f9,
-    0x1c7, 0xf105, 0x1c4, 0xf112, 0x1c1, 0xf11e, 0x1be, 0xf12a,
-    0x1bb, 0xf136, 0x1b8, 0xf143, 0x1b6, 0xf14f, 0x1b3, 0xf15b,
-    0x1b0, 0xf167, 0x1ad, 0xf174, 0x1aa, 0xf180, 0x1a7, 0xf18c,
-    0x1a4, 0xf198, 0x1a2, 0xf1a4, 0x19f, 0xf1b1, 0x19c, 0xf1bd,
-    0x199, 0xf1c9, 0x196, 0xf1d5, 0x194, 0xf1e2, 0x191, 0xf1ee,
-    0x18e, 0xf1fa, 0x18b, 0xf207, 0x189, 0xf213, 0x186, 0xf21f,
-    0x183, 0xf22b, 0x180, 0xf238, 0x17e, 0xf244, 0x17b, 0xf250,
-    0x178, 0xf25c, 0x176, 0xf269, 0x173, 0xf275, 0x170, 0xf281,
-    0x16e, 0xf28e, 0x16b, 0xf29a, 0x168, 0xf2a6, 0x166, 0xf2b2,
-    0x163, 0xf2bf, 0x161, 0xf2cb, 0x15e, 0xf2d7, 0x15b, 0xf2e4,
-    0x159, 0xf2f0, 0x156, 0xf2fc, 0x154, 0xf308, 0x151, 0xf315,
-    0x14f, 0xf321, 0x14c, 0xf32d, 0x14a, 0xf33a, 0x147, 0xf346,
-    0x145, 0xf352, 0x142, 0xf35f, 0x140, 0xf36b, 0x13d, 0xf377,
-    0x13b, 0xf384, 0x138, 0xf390, 0x136, 0xf39c, 0x134, 0xf3a9,
-    0x131, 0xf3b5, 0x12f, 0xf3c1, 0x12c, 0xf3ce, 0x12a, 0xf3da,
-    0x128, 0xf3e6, 0x125, 0xf3f3, 0x123, 0xf3ff, 0x120, 0xf40b,
-    0x11e, 0xf418, 0x11c, 0xf424, 0x119, 0xf430, 0x117, 0xf43d,
-    0x115, 0xf449, 0x113, 0xf455, 0x110, 0xf462, 0x10e, 0xf46e,
-    0x10c, 0xf47b, 0x109, 0xf487, 0x107, 0xf493, 0x105, 0xf4a0,
-    0x103, 0xf4ac, 0x100, 0xf4b8, 0xfe, 0xf4c5, 0xfc, 0xf4d1,
-    0xfa, 0xf4dd, 0xf8, 0xf4ea, 0xf6, 0xf4f6, 0xf3, 0xf503,
-    0xf1, 0xf50f, 0xef, 0xf51b, 0xed, 0xf528, 0xeb, 0xf534,
-    0xe9, 0xf540, 0xe7, 0xf54d, 0xe4, 0xf559, 0xe2, 0xf566,
-    0xe0, 0xf572, 0xde, 0xf57e, 0xdc, 0xf58b, 0xda, 0xf597,
-    0xd8, 0xf5a4, 0xd6, 0xf5b0, 0xd4, 0xf5bc, 0xd2, 0xf5c9,
-    0xd0, 0xf5d5, 0xce, 0xf5e2, 0xcc, 0xf5ee, 0xca, 0xf5fa,
-    0xc8, 0xf607, 0xc6, 0xf613, 0xc4, 0xf620, 0xc2, 0xf62c,
-    0xc0, 0xf639, 0xbe, 0xf645, 0xbd, 0xf651, 0xbb, 0xf65e,
-    0xb9, 0xf66a, 0xb7, 0xf677, 0xb5, 0xf683, 0xb3, 0xf690,
-    0xb1, 0xf69c, 0xaf, 0xf6a8, 0xae, 0xf6b5, 0xac, 0xf6c1,
-    0xaa, 0xf6ce, 0xa8, 0xf6da, 0xa6, 0xf6e7, 0xa5, 0xf6f3,
-    0xa3, 0xf6ff, 0xa1, 0xf70c, 0x9f, 0xf718, 0x9e, 0xf725,
-    0x9c, 0xf731, 0x9a, 0xf73e, 0x98, 0xf74a, 0x97, 0xf757,
-    0x95, 0xf763, 0x93, 0xf76f, 0x92, 0xf77c, 0x90, 0xf788,
-    0x8e, 0xf795, 0x8d, 0xf7a1, 0x8b, 0xf7ae, 0x89, 0xf7ba,
-    0x88, 0xf7c7, 0x86, 0xf7d3, 0x85, 0xf7e0, 0x83, 0xf7ec,
-    0x81, 0xf7f9, 0x80, 0xf805, 0x7e, 0xf811, 0x7d, 0xf81e,
-    0x7b, 0xf82a, 0x7a, 0xf837, 0x78, 0xf843, 0x77, 0xf850,
-    0x75, 0xf85c, 0x74, 0xf869, 0x72, 0xf875, 0x71, 0xf882,
-    0x6f, 0xf88e, 0x6e, 0xf89b, 0x6c, 0xf8a7, 0x6b, 0xf8b4,
-    0x69, 0xf8c0, 0x68, 0xf8cd, 0x67, 0xf8d9, 0x65, 0xf8e6,
-    0x64, 0xf8f2, 0x62, 0xf8ff, 0x61, 0xf90b, 0x60, 0xf918,
-    0x5e, 0xf924, 0x5d, 0xf931, 0x5c, 0xf93d, 0x5a, 0xf94a,
-    0x59, 0xf956, 0x58, 0xf963, 0x56, 0xf96f, 0x55, 0xf97c,
-    0x54, 0xf988, 0x53, 0xf995, 0x51, 0xf9a1, 0x50, 0xf9ae,
-    0x4f, 0xf9ba, 0x4e, 0xf9c7, 0x4c, 0xf9d3, 0x4b, 0xf9e0,
-    0x4a, 0xf9ec, 0x49, 0xf9f9, 0x48, 0xfa05, 0x47, 0xfa12,
-    0x45, 0xfa1e, 0x44, 0xfa2b, 0x43, 0xfa37, 0x42, 0xfa44,
-    0x41, 0xfa50, 0x40, 0xfa5d, 0x3f, 0xfa69, 0x3d, 0xfa76,
-    0x3c, 0xfa82, 0x3b, 0xfa8f, 0x3a, 0xfa9b, 0x39, 0xfaa8,
-    0x38, 0xfab4, 0x37, 0xfac1, 0x36, 0xfacd, 0x35, 0xfada,
-    0x34, 0xfae6, 0x33, 0xfaf3, 0x32, 0xfb00, 0x31, 0xfb0c,
-    0x30, 0xfb19, 0x2f, 0xfb25, 0x2e, 0xfb32, 0x2d, 0xfb3e,
-    0x2c, 0xfb4b, 0x2b, 0xfb57, 0x2b, 0xfb64, 0x2a, 0xfb70,
-    0x29, 0xfb7d, 0x28, 0xfb89, 0x27, 0xfb96, 0x26, 0xfba2,
-    0x25, 0xfbaf, 0x24, 0xfbbc, 0x24, 0xfbc8, 0x23, 0xfbd5,
-    0x22, 0xfbe1, 0x21, 0xfbee, 0x20, 0xfbfa, 0x20, 0xfc07,
-    0x1f, 0xfc13, 0x1e, 0xfc20, 0x1d, 0xfc2c, 0x1d, 0xfc39,
-    0x1c, 0xfc45, 0x1b, 0xfc52, 0x1a, 0xfc5f, 0x1a, 0xfc6b,
-    0x19, 0xfc78, 0x18, 0xfc84, 0x18, 0xfc91, 0x17, 0xfc9d,
-    0x16, 0xfcaa, 0x16, 0xfcb6, 0x15, 0xfcc3, 0x14, 0xfcd0,
-    0x14, 0xfcdc, 0x13, 0xfce9, 0x13, 0xfcf5, 0x12, 0xfd02,
-    0x11, 0xfd0e, 0x11, 0xfd1b, 0x10, 0xfd27, 0x10, 0xfd34,
-    0xf, 0xfd40, 0xf, 0xfd4d, 0xe, 0xfd5a, 0xe, 0xfd66,
-    0xd, 0xfd73, 0xd, 0xfd7f, 0xc, 0xfd8c, 0xc, 0xfd98,
-    0xb, 0xfda5, 0xb, 0xfdb2, 0xa, 0xfdbe, 0xa, 0xfdcb,
-    0x9, 0xfdd7, 0x9, 0xfde4, 0x9, 0xfdf0, 0x8, 0xfdfd,
-    0x8, 0xfe09, 0x7, 0xfe16, 0x7, 0xfe23, 0x7, 0xfe2f,
-    0x6, 0xfe3c, 0x6, 0xfe48, 0x6, 0xfe55, 0x5, 0xfe61,
-    0x5, 0xfe6e, 0x5, 0xfe7a, 0x4, 0xfe87, 0x4, 0xfe94,
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-    0x222d, 0x38a1, 0x2239, 0x38a6, 0x2244, 0x38ac, 0x224f, 0x38b2,
-    0x225a, 0x38b8, 0x2265, 0x38be, 0x2270, 0x38c3, 0x227b, 0x38c9,
-    0x2287, 0x38cf, 0x2292, 0x38d5, 0x229d, 0x38db, 0x22a8, 0x38e0,
-    0x22b3, 0x38e6, 0x22be, 0x38ec, 0x22ca, 0x38f2, 0x22d5, 0x38f7,
-    0x22e0, 0x38fd, 0x22eb, 0x3903, 0x22f6, 0x3909, 0x2301, 0x390e,
-    0x230d, 0x3914, 0x2318, 0x391a, 0x2323, 0x391f, 0x232e, 0x3925,
-    0x233a, 0x392b, 0x2345, 0x3930, 0x2350, 0x3936, 0x235b, 0x393b,
-    0x2367, 0x3941, 0x2372, 0x3947, 0x237d, 0x394c, 0x2388, 0x3952,
-    0x2394, 0x3958, 0x239f, 0x395d, 0x23aa, 0x3963, 0x23b5, 0x3968,
-    0x23c1, 0x396e, 0x23cc, 0x3973, 0x23d7, 0x3979, 0x23e2, 0x397e,
-    0x23ee, 0x3984, 0x23f9, 0x3989, 0x2404, 0x398f, 0x2410, 0x3994,
-    0x241b, 0x399a, 0x2426, 0x399f, 0x2432, 0x39a5, 0x243d, 0x39aa,
-    0x2448, 0x39b0, 0x2454, 0x39b5, 0x245f, 0x39bb, 0x246a, 0x39c0,
-    0x2476, 0x39c5, 0x2481, 0x39cb, 0x248c, 0x39d0, 0x2498, 0x39d6,
-    0x24a3, 0x39db, 0x24ae, 0x39e0, 0x24ba, 0x39e6, 0x24c5, 0x39eb,
-    0x24d0, 0x39f0, 0x24dc, 0x39f6, 0x24e7, 0x39fb, 0x24f3, 0x3a00,
-    0x24fe, 0x3a06, 0x2509, 0x3a0b, 0x2515, 0x3a10, 0x2520, 0x3a16,
-    0x252c, 0x3a1b, 0x2537, 0x3a20, 0x2542, 0x3a25, 0x254e, 0x3a2b,
-    0x2559, 0x3a30, 0x2565, 0x3a35, 0x2570, 0x3a3a, 0x257c, 0x3a3f,
-    0x2587, 0x3a45, 0x2592, 0x3a4a, 0x259e, 0x3a4f, 0x25a9, 0x3a54,
-    0x25b5, 0x3a59, 0x25c0, 0x3a5f, 0x25cc, 0x3a64, 0x25d7, 0x3a69,
-    0x25e3, 0x3a6e, 0x25ee, 0x3a73, 0x25fa, 0x3a78, 0x2605, 0x3a7d,
-    0x2611, 0x3a82, 0x261c, 0x3a88, 0x2628, 0x3a8d, 0x2633, 0x3a92,
-    0x263f, 0x3a97, 0x264a, 0x3a9c, 0x2656, 0x3aa1, 0x2661, 0x3aa6,
-    0x266d, 0x3aab, 0x2678, 0x3ab0, 0x2684, 0x3ab5, 0x268f, 0x3aba,
-    0x269b, 0x3abf, 0x26a6, 0x3ac4, 0x26b2, 0x3ac9, 0x26bd, 0x3ace,
-    0x26c9, 0x3ad3, 0x26d4, 0x3ad8, 0x26e0, 0x3add, 0x26ec, 0x3ae2,
-    0x26f7, 0x3ae6, 0x2703, 0x3aeb, 0x270e, 0x3af0, 0x271a, 0x3af5,
-    0x2725, 0x3afa, 0x2731, 0x3aff, 0x273d, 0x3b04, 0x2748, 0x3b09,
-    0x2754, 0x3b0e, 0x275f, 0x3b12, 0x276b, 0x3b17, 0x2777, 0x3b1c,
-    0x2782, 0x3b21, 0x278e, 0x3b26, 0x2799, 0x3b2a, 0x27a5, 0x3b2f,
-    0x27b1, 0x3b34, 0x27bc, 0x3b39, 0x27c8, 0x3b3e, 0x27d3, 0x3b42,
-    0x27df, 0x3b47, 0x27eb, 0x3b4c, 0x27f6, 0x3b50, 0x2802, 0x3b55,
-    0x280e, 0x3b5a, 0x2819, 0x3b5f, 0x2825, 0x3b63, 0x2831, 0x3b68,
-    0x283c, 0x3b6d, 0x2848, 0x3b71, 0x2854, 0x3b76, 0x285f, 0x3b7b,
-    0x286b, 0x3b7f, 0x2877, 0x3b84, 0x2882, 0x3b88, 0x288e, 0x3b8d,
-    0x289a, 0x3b92, 0x28a5, 0x3b96, 0x28b1, 0x3b9b, 0x28bd, 0x3b9f,
-    0x28c9, 0x3ba4, 0x28d4, 0x3ba9, 0x28e0, 0x3bad, 0x28ec, 0x3bb2,
-    0x28f7, 0x3bb6, 0x2903, 0x3bbb, 0x290f, 0x3bbf, 0x291b, 0x3bc4,
-    0x2926, 0x3bc8, 0x2932, 0x3bcd, 0x293e, 0x3bd1, 0x294a, 0x3bd6,
-    0x2955, 0x3bda, 0x2961, 0x3bde, 0x296d, 0x3be3, 0x2979, 0x3be7,
-    0x2984, 0x3bec, 0x2990, 0x3bf0, 0x299c, 0x3bf5, 0x29a8, 0x3bf9,
-    0x29b4, 0x3bfd, 0x29bf, 0x3c02, 0x29cb, 0x3c06, 0x29d7, 0x3c0a,
-    0x29e3, 0x3c0f, 0x29ee, 0x3c13, 0x29fa, 0x3c17, 0x2a06, 0x3c1c,
-    0x2a12, 0x3c20, 0x2a1e, 0x3c24, 0x2a29, 0x3c29, 0x2a35, 0x3c2d,
-    0x2a41, 0x3c31, 0x2a4d, 0x3c36, 0x2a59, 0x3c3a, 0x2a65, 0x3c3e,
-    0x2a70, 0x3c42, 0x2a7c, 0x3c46, 0x2a88, 0x3c4b, 0x2a94, 0x3c4f,
-    0x2aa0, 0x3c53, 0x2aac, 0x3c57, 0x2ab7, 0x3c5b, 0x2ac3, 0x3c60,
-    0x2acf, 0x3c64, 0x2adb, 0x3c68, 0x2ae7, 0x3c6c, 0x2af3, 0x3c70,
-    0x2aff, 0x3c74, 0x2b0a, 0x3c79, 0x2b16, 0x3c7d, 0x2b22, 0x3c81,
-    0x2b2e, 0x3c85, 0x2b3a, 0x3c89, 0x2b46, 0x3c8d, 0x2b52, 0x3c91,
-    0x2b5e, 0x3c95, 0x2b6a, 0x3c99, 0x2b75, 0x3c9d, 0x2b81, 0x3ca1,
-    0x2b8d, 0x3ca5, 0x2b99, 0x3ca9, 0x2ba5, 0x3cad, 0x2bb1, 0x3cb1,
-    0x2bbd, 0x3cb5, 0x2bc9, 0x3cb9, 0x2bd5, 0x3cbd, 0x2be1, 0x3cc1,
-    0x2bed, 0x3cc5, 0x2bf9, 0x3cc9, 0x2c05, 0x3ccd, 0x2c10, 0x3cd1,
-    0x2c1c, 0x3cd5, 0x2c28, 0x3cd9, 0x2c34, 0x3cdd, 0x2c40, 0x3ce0,
-    0x2c4c, 0x3ce4, 0x2c58, 0x3ce8, 0x2c64, 0x3cec, 0x2c70, 0x3cf0,
-    0x2c7c, 0x3cf4, 0x2c88, 0x3cf8, 0x2c94, 0x3cfb, 0x2ca0, 0x3cff,
-    0x2cac, 0x3d03, 0x2cb8, 0x3d07, 0x2cc4, 0x3d0b, 0x2cd0, 0x3d0e,
-    0x2cdc, 0x3d12, 0x2ce8, 0x3d16, 0x2cf4, 0x3d1a, 0x2d00, 0x3d1d,
-    0x2d0c, 0x3d21, 0x2d18, 0x3d25, 0x2d24, 0x3d28, 0x2d30, 0x3d2c,
-    0x2d3c, 0x3d30, 0x2d48, 0x3d34, 0x2d54, 0x3d37, 0x2d60, 0x3d3b,
-    0x2d6c, 0x3d3f, 0x2d78, 0x3d42, 0x2d84, 0x3d46, 0x2d90, 0x3d49,
-    0x2d9c, 0x3d4d, 0x2da8, 0x3d51, 0x2db4, 0x3d54, 0x2dc0, 0x3d58,
-    0x2dcc, 0x3d5b, 0x2dd8, 0x3d5f, 0x2de4, 0x3d63, 0x2df0, 0x3d66,
-    0x2dfc, 0x3d6a, 0x2e09, 0x3d6d, 0x2e15, 0x3d71, 0x2e21, 0x3d74,
-    0x2e2d, 0x3d78, 0x2e39, 0x3d7b, 0x2e45, 0x3d7f, 0x2e51, 0x3d82,
-    0x2e5d, 0x3d86, 0x2e69, 0x3d89, 0x2e75, 0x3d8d, 0x2e81, 0x3d90,
-    0x2e8d, 0x3d93, 0x2e99, 0x3d97, 0x2ea6, 0x3d9a, 0x2eb2, 0x3d9e,
-    0x2ebe, 0x3da1, 0x2eca, 0x3da4, 0x2ed6, 0x3da8, 0x2ee2, 0x3dab,
-    0x2eee, 0x3daf, 0x2efa, 0x3db2, 0x2f06, 0x3db5, 0x2f13, 0x3db9,
-    0x2f1f, 0x3dbc, 0x2f2b, 0x3dbf, 0x2f37, 0x3dc2, 0x2f43, 0x3dc6,
-    0x2f4f, 0x3dc9, 0x2f5b, 0x3dcc, 0x2f67, 0x3dd0, 0x2f74, 0x3dd3,
-    0x2f80, 0x3dd6, 0x2f8c, 0x3dd9, 0x2f98, 0x3ddd, 0x2fa4, 0x3de0,
-    0x2fb0, 0x3de3, 0x2fbc, 0x3de6, 0x2fc9, 0x3de9, 0x2fd5, 0x3ded,
-    0x2fe1, 0x3df0, 0x2fed, 0x3df3, 0x2ff9, 0x3df6, 0x3005, 0x3df9,
-    0x3012, 0x3dfc, 0x301e, 0x3dff, 0x302a, 0x3e03, 0x3036, 0x3e06,
-    0x3042, 0x3e09, 0x304e, 0x3e0c, 0x305b, 0x3e0f, 0x3067, 0x3e12,
-    0x3073, 0x3e15, 0x307f, 0x3e18, 0x308b, 0x3e1b, 0x3098, 0x3e1e,
-    0x30a4, 0x3e21, 0x30b0, 0x3e24, 0x30bc, 0x3e27, 0x30c8, 0x3e2a,
-    0x30d5, 0x3e2d, 0x30e1, 0x3e30, 0x30ed, 0x3e33, 0x30f9, 0x3e36,
-    0x3105, 0x3e39, 0x3112, 0x3e3c, 0x311e, 0x3e3f, 0x312a, 0x3e42,
-    0x3136, 0x3e45, 0x3143, 0x3e48, 0x314f, 0x3e4a, 0x315b, 0x3e4d,
-    0x3167, 0x3e50, 0x3174, 0x3e53, 0x3180, 0x3e56, 0x318c, 0x3e59,
-    0x3198, 0x3e5c, 0x31a4, 0x3e5e, 0x31b1, 0x3e61, 0x31bd, 0x3e64,
-    0x31c9, 0x3e67, 0x31d5, 0x3e6a, 0x31e2, 0x3e6c, 0x31ee, 0x3e6f,
-    0x31fa, 0x3e72, 0x3207, 0x3e75, 0x3213, 0x3e77, 0x321f, 0x3e7a,
-    0x322b, 0x3e7d, 0x3238, 0x3e80, 0x3244, 0x3e82, 0x3250, 0x3e85,
-    0x325c, 0x3e88, 0x3269, 0x3e8a, 0x3275, 0x3e8d, 0x3281, 0x3e90,
-    0x328e, 0x3e92, 0x329a, 0x3e95, 0x32a6, 0x3e98, 0x32b2, 0x3e9a,
-    0x32bf, 0x3e9d, 0x32cb, 0x3e9f, 0x32d7, 0x3ea2, 0x32e4, 0x3ea5,
-    0x32f0, 0x3ea7, 0x32fc, 0x3eaa, 0x3308, 0x3eac, 0x3315, 0x3eaf,
-    0x3321, 0x3eb1, 0x332d, 0x3eb4, 0x333a, 0x3eb6, 0x3346, 0x3eb9,
-    0x3352, 0x3ebb, 0x335f, 0x3ebe, 0x336b, 0x3ec0, 0x3377, 0x3ec3,
-    0x3384, 0x3ec5, 0x3390, 0x3ec8, 0x339c, 0x3eca, 0x33a9, 0x3ecc,
-    0x33b5, 0x3ecf, 0x33c1, 0x3ed1, 0x33ce, 0x3ed4, 0x33da, 0x3ed6,
-    0x33e6, 0x3ed8, 0x33f3, 0x3edb, 0x33ff, 0x3edd, 0x340b, 0x3ee0,
-    0x3418, 0x3ee2, 0x3424, 0x3ee4, 0x3430, 0x3ee7, 0x343d, 0x3ee9,
-    0x3449, 0x3eeb, 0x3455, 0x3eed, 0x3462, 0x3ef0, 0x346e, 0x3ef2,
-    0x347b, 0x3ef4, 0x3487, 0x3ef7, 0x3493, 0x3ef9, 0x34a0, 0x3efb,
-    0x34ac, 0x3efd, 0x34b8, 0x3f00, 0x34c5, 0x3f02, 0x34d1, 0x3f04,
-    0x34dd, 0x3f06, 0x34ea, 0x3f08, 0x34f6, 0x3f0a, 0x3503, 0x3f0d,
-    0x350f, 0x3f0f, 0x351b, 0x3f11, 0x3528, 0x3f13, 0x3534, 0x3f15,
-    0x3540, 0x3f17, 0x354d, 0x3f19, 0x3559, 0x3f1c, 0x3566, 0x3f1e,
-    0x3572, 0x3f20, 0x357e, 0x3f22, 0x358b, 0x3f24, 0x3597, 0x3f26,
-    0x35a4, 0x3f28, 0x35b0, 0x3f2a, 0x35bc, 0x3f2c, 0x35c9, 0x3f2e,
-    0x35d5, 0x3f30, 0x35e2, 0x3f32, 0x35ee, 0x3f34, 0x35fa, 0x3f36,
-    0x3607, 0x3f38, 0x3613, 0x3f3a, 0x3620, 0x3f3c, 0x362c, 0x3f3e,
-    0x3639, 0x3f40, 0x3645, 0x3f42, 0x3651, 0x3f43, 0x365e, 0x3f45,
-    0x366a, 0x3f47, 0x3677, 0x3f49, 0x3683, 0x3f4b, 0x3690, 0x3f4d,
-    0x369c, 0x3f4f, 0x36a8, 0x3f51, 0x36b5, 0x3f52, 0x36c1, 0x3f54,
-    0x36ce, 0x3f56, 0x36da, 0x3f58, 0x36e7, 0x3f5a, 0x36f3, 0x3f5b,
-    0x36ff, 0x3f5d, 0x370c, 0x3f5f, 0x3718, 0x3f61, 0x3725, 0x3f62,
-    0x3731, 0x3f64, 0x373e, 0x3f66, 0x374a, 0x3f68, 0x3757, 0x3f69,
-    0x3763, 0x3f6b, 0x376f, 0x3f6d, 0x377c, 0x3f6e, 0x3788, 0x3f70,
-    0x3795, 0x3f72, 0x37a1, 0x3f73, 0x37ae, 0x3f75, 0x37ba, 0x3f77,
-    0x37c7, 0x3f78, 0x37d3, 0x3f7a, 0x37e0, 0x3f7b, 0x37ec, 0x3f7d,
-    0x37f9, 0x3f7f, 0x3805, 0x3f80, 0x3811, 0x3f82, 0x381e, 0x3f83,
-    0x382a, 0x3f85, 0x3837, 0x3f86, 0x3843, 0x3f88, 0x3850, 0x3f89,
-    0x385c, 0x3f8b, 0x3869, 0x3f8c, 0x3875, 0x3f8e, 0x3882, 0x3f8f,
-    0x388e, 0x3f91, 0x389b, 0x3f92, 0x38a7, 0x3f94, 0x38b4, 0x3f95,
-    0x38c0, 0x3f97, 0x38cd, 0x3f98, 0x38d9, 0x3f99, 0x38e6, 0x3f9b,
-    0x38f2, 0x3f9c, 0x38ff, 0x3f9e, 0x390b, 0x3f9f, 0x3918, 0x3fa0,
-    0x3924, 0x3fa2, 0x3931, 0x3fa3, 0x393d, 0x3fa4, 0x394a, 0x3fa6,
-    0x3956, 0x3fa7, 0x3963, 0x3fa8, 0x396f, 0x3faa, 0x397c, 0x3fab,
-    0x3988, 0x3fac, 0x3995, 0x3fad, 0x39a1, 0x3faf, 0x39ae, 0x3fb0,
-    0x39ba, 0x3fb1, 0x39c7, 0x3fb2, 0x39d3, 0x3fb4, 0x39e0, 0x3fb5,
-    0x39ec, 0x3fb6, 0x39f9, 0x3fb7, 0x3a05, 0x3fb8, 0x3a12, 0x3fb9,
-    0x3a1e, 0x3fbb, 0x3a2b, 0x3fbc, 0x3a37, 0x3fbd, 0x3a44, 0x3fbe,
-    0x3a50, 0x3fbf, 0x3a5d, 0x3fc0, 0x3a69, 0x3fc1, 0x3a76, 0x3fc3,
-    0x3a82, 0x3fc4, 0x3a8f, 0x3fc5, 0x3a9b, 0x3fc6, 0x3aa8, 0x3fc7,
-    0x3ab4, 0x3fc8, 0x3ac1, 0x3fc9, 0x3acd, 0x3fca, 0x3ada, 0x3fcb,
-    0x3ae6, 0x3fcc, 0x3af3, 0x3fcd, 0x3b00, 0x3fce, 0x3b0c, 0x3fcf,
-    0x3b19, 0x3fd0, 0x3b25, 0x3fd1, 0x3b32, 0x3fd2, 0x3b3e, 0x3fd3,
-    0x3b4b, 0x3fd4, 0x3b57, 0x3fd5, 0x3b64, 0x3fd5, 0x3b70, 0x3fd6,
-    0x3b7d, 0x3fd7, 0x3b89, 0x3fd8, 0x3b96, 0x3fd9, 0x3ba2, 0x3fda,
-    0x3baf, 0x3fdb, 0x3bbc, 0x3fdc, 0x3bc8, 0x3fdc, 0x3bd5, 0x3fdd,
-    0x3be1, 0x3fde, 0x3bee, 0x3fdf, 0x3bfa, 0x3fe0, 0x3c07, 0x3fe0,
-    0x3c13, 0x3fe1, 0x3c20, 0x3fe2, 0x3c2c, 0x3fe3, 0x3c39, 0x3fe3,
-    0x3c45, 0x3fe4, 0x3c52, 0x3fe5, 0x3c5f, 0x3fe6, 0x3c6b, 0x3fe6,
-    0x3c78, 0x3fe7, 0x3c84, 0x3fe8, 0x3c91, 0x3fe8, 0x3c9d, 0x3fe9,
-    0x3caa, 0x3fea, 0x3cb6, 0x3fea, 0x3cc3, 0x3feb, 0x3cd0, 0x3fec,
-    0x3cdc, 0x3fec, 0x3ce9, 0x3fed, 0x3cf5, 0x3fed, 0x3d02, 0x3fee,
-    0x3d0e, 0x3fef, 0x3d1b, 0x3fef, 0x3d27, 0x3ff0, 0x3d34, 0x3ff0,
-    0x3d40, 0x3ff1, 0x3d4d, 0x3ff1, 0x3d5a, 0x3ff2, 0x3d66, 0x3ff2,
-    0x3d73, 0x3ff3, 0x3d7f, 0x3ff3, 0x3d8c, 0x3ff4, 0x3d98, 0x3ff4,
-    0x3da5, 0x3ff5, 0x3db2, 0x3ff5, 0x3dbe, 0x3ff6, 0x3dcb, 0x3ff6,
-    0x3dd7, 0x3ff7, 0x3de4, 0x3ff7, 0x3df0, 0x3ff7, 0x3dfd, 0x3ff8,
-    0x3e09, 0x3ff8, 0x3e16, 0x3ff9, 0x3e23, 0x3ff9, 0x3e2f, 0x3ff9,
-    0x3e3c, 0x3ffa, 0x3e48, 0x3ffa, 0x3e55, 0x3ffa, 0x3e61, 0x3ffb,
-    0x3e6e, 0x3ffb, 0x3e7a, 0x3ffb, 0x3e87, 0x3ffc, 0x3e94, 0x3ffc,
-    0x3ea0, 0x3ffc, 0x3ead, 0x3ffc, 0x3eb9, 0x3ffd, 0x3ec6, 0x3ffd,
-    0x3ed2, 0x3ffd, 0x3edf, 0x3ffd, 0x3eec, 0x3ffe, 0x3ef8, 0x3ffe,
-    0x3f05, 0x3ffe, 0x3f11, 0x3ffe, 0x3f1e, 0x3ffe, 0x3f2a, 0x3fff,
-    0x3f37, 0x3fff, 0x3f44, 0x3fff, 0x3f50, 0x3fff, 0x3f5d, 0x3fff,
-    0x3f69, 0x3fff, 0x3f76, 0x3fff, 0x3f82, 0x4000, 0x3f8f, 0x4000,
-    0x3f9b, 0x4000, 0x3fa8, 0x4000, 0x3fb5, 0x4000, 0x3fc1, 0x4000,
-    0x3fce, 0x4000, 0x3fda, 0x4000, 0x3fe7, 0x4000, 0x3ff3, 0x4000,
-};
-
-/**    
-* \par   
-* Generation of real_CoefB array:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-*  {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-*  } 
   
-* \par    
-* Convert to fixed point Q15 format    
-*       round(pBTable[i] * pow(2, 15))    
-*    
-*/
-static const q15_t ALIGN4 realCoefBQ15[8192] = {
-    0x4000, 0x4000, 0x400d, 0x4000, 0x4019, 0x4000, 0x4026, 0x4000,
-    0x4032, 0x4000, 0x403f, 0x4000, 0x404b, 0x4000, 0x4058, 0x4000,
-    0x4065, 0x4000, 0x4071, 0x4000, 0x407e, 0x4000, 0x408a, 0x3fff,
-    0x4097, 0x3fff, 0x40a3, 0x3fff, 0x40b0, 0x3fff, 0x40bc, 0x3fff,
-    0x40c9, 0x3fff, 0x40d6, 0x3fff, 0x40e2, 0x3ffe, 0x40ef, 0x3ffe,
-    0x40fb, 0x3ffe, 0x4108, 0x3ffe, 0x4114, 0x3ffe, 0x4121, 0x3ffd,
-    0x412e, 0x3ffd, 0x413a, 0x3ffd, 0x4147, 0x3ffd, 0x4153, 0x3ffc,
-    0x4160, 0x3ffc, 0x416c, 0x3ffc, 0x4179, 0x3ffc, 0x4186, 0x3ffb,
-    0x4192, 0x3ffb, 0x419f, 0x3ffb, 0x41ab, 0x3ffa, 0x41b8, 0x3ffa,
-    0x41c4, 0x3ffa, 0x41d1, 0x3ff9, 0x41dd, 0x3ff9, 0x41ea, 0x3ff9,
-    0x41f7, 0x3ff8, 0x4203, 0x3ff8, 0x4210, 0x3ff7, 0x421c, 0x3ff7,
-    0x4229, 0x3ff7, 0x4235, 0x3ff6, 0x4242, 0x3ff6, 0x424e, 0x3ff5,
-    0x425b, 0x3ff5, 0x4268, 0x3ff4, 0x4274, 0x3ff4, 0x4281, 0x3ff3,
-    0x428d, 0x3ff3, 0x429a, 0x3ff2, 0x42a6, 0x3ff2, 0x42b3, 0x3ff1,
-    0x42c0, 0x3ff1, 0x42cc, 0x3ff0, 0x42d9, 0x3ff0, 0x42e5, 0x3fef,
-    0x42f2, 0x3fef, 0x42fe, 0x3fee, 0x430b, 0x3fed, 0x4317, 0x3fed,
-    0x4324, 0x3fec, 0x4330, 0x3fec, 0x433d, 0x3feb, 0x434a, 0x3fea,
-    0x4356, 0x3fea, 0x4363, 0x3fe9, 0x436f, 0x3fe8, 0x437c, 0x3fe8,
-    0x4388, 0x3fe7, 0x4395, 0x3fe6, 0x43a1, 0x3fe6, 0x43ae, 0x3fe5,
-    0x43bb, 0x3fe4, 0x43c7, 0x3fe3, 0x43d4, 0x3fe3, 0x43e0, 0x3fe2,
-    0x43ed, 0x3fe1, 0x43f9, 0x3fe0, 0x4406, 0x3fe0, 0x4412, 0x3fdf,
-    0x441f, 0x3fde, 0x442b, 0x3fdd, 0x4438, 0x3fdc, 0x4444, 0x3fdc,
-    0x4451, 0x3fdb, 0x445e, 0x3fda, 0x446a, 0x3fd9, 0x4477, 0x3fd8,
-    0x4483, 0x3fd7, 0x4490, 0x3fd6, 0x449c, 0x3fd5, 0x44a9, 0x3fd5,
-    0x44b5, 0x3fd4, 0x44c2, 0x3fd3, 0x44ce, 0x3fd2, 0x44db, 0x3fd1,
-    0x44e7, 0x3fd0, 0x44f4, 0x3fcf, 0x4500, 0x3fce, 0x450d, 0x3fcd,
-    0x451a, 0x3fcc, 0x4526, 0x3fcb, 0x4533, 0x3fca, 0x453f, 0x3fc9,
-    0x454c, 0x3fc8, 0x4558, 0x3fc7, 0x4565, 0x3fc6, 0x4571, 0x3fc5,
-    0x457e, 0x3fc4, 0x458a, 0x3fc3, 0x4597, 0x3fc1, 0x45a3, 0x3fc0,
-    0x45b0, 0x3fbf, 0x45bc, 0x3fbe, 0x45c9, 0x3fbd, 0x45d5, 0x3fbc,
-    0x45e2, 0x3fbb, 0x45ee, 0x3fb9, 0x45fb, 0x3fb8, 0x4607, 0x3fb7,
-    0x4614, 0x3fb6, 0x4620, 0x3fb5, 0x462d, 0x3fb4, 0x4639, 0x3fb2,
-    0x4646, 0x3fb1, 0x4652, 0x3fb0, 0x465f, 0x3faf, 0x466b, 0x3fad,
-    0x4678, 0x3fac, 0x4684, 0x3fab, 0x4691, 0x3faa, 0x469d, 0x3fa8,
-    0x46aa, 0x3fa7, 0x46b6, 0x3fa6, 0x46c3, 0x3fa4, 0x46cf, 0x3fa3,
-    0x46dc, 0x3fa2, 0x46e8, 0x3fa0, 0x46f5, 0x3f9f, 0x4701, 0x3f9e,
-    0x470e, 0x3f9c, 0x471a, 0x3f9b, 0x4727, 0x3f99, 0x4733, 0x3f98,
-    0x4740, 0x3f97, 0x474c, 0x3f95, 0x4759, 0x3f94, 0x4765, 0x3f92,
-    0x4772, 0x3f91, 0x477e, 0x3f8f, 0x478b, 0x3f8e, 0x4797, 0x3f8c,
-    0x47a4, 0x3f8b, 0x47b0, 0x3f89, 0x47bd, 0x3f88, 0x47c9, 0x3f86,
-    0x47d6, 0x3f85, 0x47e2, 0x3f83, 0x47ef, 0x3f82, 0x47fb, 0x3f80,
-    0x4807, 0x3f7f, 0x4814, 0x3f7d, 0x4820, 0x3f7b, 0x482d, 0x3f7a,
-    0x4839, 0x3f78, 0x4846, 0x3f77, 0x4852, 0x3f75, 0x485f, 0x3f73,
-    0x486b, 0x3f72, 0x4878, 0x3f70, 0x4884, 0x3f6e, 0x4891, 0x3f6d,
-    0x489d, 0x3f6b, 0x48a9, 0x3f69, 0x48b6, 0x3f68, 0x48c2, 0x3f66,
-    0x48cf, 0x3f64, 0x48db, 0x3f62, 0x48e8, 0x3f61, 0x48f4, 0x3f5f,
-    0x4901, 0x3f5d, 0x490d, 0x3f5b, 0x4919, 0x3f5a, 0x4926, 0x3f58,
-    0x4932, 0x3f56, 0x493f, 0x3f54, 0x494b, 0x3f52, 0x4958, 0x3f51,
-    0x4964, 0x3f4f, 0x4970, 0x3f4d, 0x497d, 0x3f4b, 0x4989, 0x3f49,
-    0x4996, 0x3f47, 0x49a2, 0x3f45, 0x49af, 0x3f43, 0x49bb, 0x3f42,
-    0x49c7, 0x3f40, 0x49d4, 0x3f3e, 0x49e0, 0x3f3c, 0x49ed, 0x3f3a,
-    0x49f9, 0x3f38, 0x4a06, 0x3f36, 0x4a12, 0x3f34, 0x4a1e, 0x3f32,
-    0x4a2b, 0x3f30, 0x4a37, 0x3f2e, 0x4a44, 0x3f2c, 0x4a50, 0x3f2a,
-    0x4a5c, 0x3f28, 0x4a69, 0x3f26, 0x4a75, 0x3f24, 0x4a82, 0x3f22,
-    0x4a8e, 0x3f20, 0x4a9a, 0x3f1e, 0x4aa7, 0x3f1c, 0x4ab3, 0x3f19,
-    0x4ac0, 0x3f17, 0x4acc, 0x3f15, 0x4ad8, 0x3f13, 0x4ae5, 0x3f11,
-    0x4af1, 0x3f0f, 0x4afd, 0x3f0d, 0x4b0a, 0x3f0a, 0x4b16, 0x3f08,
-    0x4b23, 0x3f06, 0x4b2f, 0x3f04, 0x4b3b, 0x3f02, 0x4b48, 0x3f00,
-    0x4b54, 0x3efd, 0x4b60, 0x3efb, 0x4b6d, 0x3ef9, 0x4b79, 0x3ef7,
-    0x4b85, 0x3ef4, 0x4b92, 0x3ef2, 0x4b9e, 0x3ef0, 0x4bab, 0x3eed,
-    0x4bb7, 0x3eeb, 0x4bc3, 0x3ee9, 0x4bd0, 0x3ee7, 0x4bdc, 0x3ee4,
-    0x4be8, 0x3ee2, 0x4bf5, 0x3ee0, 0x4c01, 0x3edd, 0x4c0d, 0x3edb,
-    0x4c1a, 0x3ed8, 0x4c26, 0x3ed6, 0x4c32, 0x3ed4, 0x4c3f, 0x3ed1,
-    0x4c4b, 0x3ecf, 0x4c57, 0x3ecc, 0x4c64, 0x3eca, 0x4c70, 0x3ec8,
-    0x4c7c, 0x3ec5, 0x4c89, 0x3ec3, 0x4c95, 0x3ec0, 0x4ca1, 0x3ebe,
-    0x4cae, 0x3ebb, 0x4cba, 0x3eb9, 0x4cc6, 0x3eb6, 0x4cd3, 0x3eb4,
-    0x4cdf, 0x3eb1, 0x4ceb, 0x3eaf, 0x4cf8, 0x3eac, 0x4d04, 0x3eaa,
-    0x4d10, 0x3ea7, 0x4d1c, 0x3ea5, 0x4d29, 0x3ea2, 0x4d35, 0x3e9f,
-    0x4d41, 0x3e9d, 0x4d4e, 0x3e9a, 0x4d5a, 0x3e98, 0x4d66, 0x3e95,
-    0x4d72, 0x3e92, 0x4d7f, 0x3e90, 0x4d8b, 0x3e8d, 0x4d97, 0x3e8a,
-    0x4da4, 0x3e88, 0x4db0, 0x3e85, 0x4dbc, 0x3e82, 0x4dc8, 0x3e80,
-    0x4dd5, 0x3e7d, 0x4de1, 0x3e7a, 0x4ded, 0x3e77, 0x4df9, 0x3e75,
-    0x4e06, 0x3e72, 0x4e12, 0x3e6f, 0x4e1e, 0x3e6c, 0x4e2b, 0x3e6a,
-    0x4e37, 0x3e67, 0x4e43, 0x3e64, 0x4e4f, 0x3e61, 0x4e5c, 0x3e5e,
-    0x4e68, 0x3e5c, 0x4e74, 0x3e59, 0x4e80, 0x3e56, 0x4e8c, 0x3e53,
-    0x4e99, 0x3e50, 0x4ea5, 0x3e4d, 0x4eb1, 0x3e4a, 0x4ebd, 0x3e48,
-    0x4eca, 0x3e45, 0x4ed6, 0x3e42, 0x4ee2, 0x3e3f, 0x4eee, 0x3e3c,
-    0x4efb, 0x3e39, 0x4f07, 0x3e36, 0x4f13, 0x3e33, 0x4f1f, 0x3e30,
-    0x4f2b, 0x3e2d, 0x4f38, 0x3e2a, 0x4f44, 0x3e27, 0x4f50, 0x3e24,
-    0x4f5c, 0x3e21, 0x4f68, 0x3e1e, 0x4f75, 0x3e1b, 0x4f81, 0x3e18,
-    0x4f8d, 0x3e15, 0x4f99, 0x3e12, 0x4fa5, 0x3e0f, 0x4fb2, 0x3e0c,
-    0x4fbe, 0x3e09, 0x4fca, 0x3e06, 0x4fd6, 0x3e03, 0x4fe2, 0x3dff,
-    0x4fee, 0x3dfc, 0x4ffb, 0x3df9, 0x5007, 0x3df6, 0x5013, 0x3df3,
-    0x501f, 0x3df0, 0x502b, 0x3ded, 0x5037, 0x3de9, 0x5044, 0x3de6,
-    0x5050, 0x3de3, 0x505c, 0x3de0, 0x5068, 0x3ddd, 0x5074, 0x3dd9,
-    0x5080, 0x3dd6, 0x508c, 0x3dd3, 0x5099, 0x3dd0, 0x50a5, 0x3dcc,
-    0x50b1, 0x3dc9, 0x50bd, 0x3dc6, 0x50c9, 0x3dc2, 0x50d5, 0x3dbf,
-    0x50e1, 0x3dbc, 0x50ed, 0x3db9, 0x50fa, 0x3db5, 0x5106, 0x3db2,
-    0x5112, 0x3daf, 0x511e, 0x3dab, 0x512a, 0x3da8, 0x5136, 0x3da4,
-    0x5142, 0x3da1, 0x514e, 0x3d9e, 0x515a, 0x3d9a, 0x5167, 0x3d97,
-    0x5173, 0x3d93, 0x517f, 0x3d90, 0x518b, 0x3d8d, 0x5197, 0x3d89,
-    0x51a3, 0x3d86, 0x51af, 0x3d82, 0x51bb, 0x3d7f, 0x51c7, 0x3d7b,
-    0x51d3, 0x3d78, 0x51df, 0x3d74, 0x51eb, 0x3d71, 0x51f7, 0x3d6d,
-    0x5204, 0x3d6a, 0x5210, 0x3d66, 0x521c, 0x3d63, 0x5228, 0x3d5f,
-    0x5234, 0x3d5b, 0x5240, 0x3d58, 0x524c, 0x3d54, 0x5258, 0x3d51,
-    0x5264, 0x3d4d, 0x5270, 0x3d49, 0x527c, 0x3d46, 0x5288, 0x3d42,
-    0x5294, 0x3d3f, 0x52a0, 0x3d3b, 0x52ac, 0x3d37, 0x52b8, 0x3d34,
-    0x52c4, 0x3d30, 0x52d0, 0x3d2c, 0x52dc, 0x3d28, 0x52e8, 0x3d25,
-    0x52f4, 0x3d21, 0x5300, 0x3d1d, 0x530c, 0x3d1a, 0x5318, 0x3d16,
-    0x5324, 0x3d12, 0x5330, 0x3d0e, 0x533c, 0x3d0b, 0x5348, 0x3d07,
-    0x5354, 0x3d03, 0x5360, 0x3cff, 0x536c, 0x3cfb, 0x5378, 0x3cf8,
-    0x5384, 0x3cf4, 0x5390, 0x3cf0, 0x539c, 0x3cec, 0x53a8, 0x3ce8,
-    0x53b4, 0x3ce4, 0x53c0, 0x3ce0, 0x53cc, 0x3cdd, 0x53d8, 0x3cd9,
-    0x53e4, 0x3cd5, 0x53f0, 0x3cd1, 0x53fb, 0x3ccd, 0x5407, 0x3cc9,
-    0x5413, 0x3cc5, 0x541f, 0x3cc1, 0x542b, 0x3cbd, 0x5437, 0x3cb9,
-    0x5443, 0x3cb5, 0x544f, 0x3cb1, 0x545b, 0x3cad, 0x5467, 0x3ca9,
-    0x5473, 0x3ca5, 0x547f, 0x3ca1, 0x548b, 0x3c9d, 0x5496, 0x3c99,
-    0x54a2, 0x3c95, 0x54ae, 0x3c91, 0x54ba, 0x3c8d, 0x54c6, 0x3c89,
-    0x54d2, 0x3c85, 0x54de, 0x3c81, 0x54ea, 0x3c7d, 0x54f6, 0x3c79,
-    0x5501, 0x3c74, 0x550d, 0x3c70, 0x5519, 0x3c6c, 0x5525, 0x3c68,
-    0x5531, 0x3c64, 0x553d, 0x3c60, 0x5549, 0x3c5b, 0x5554, 0x3c57,
-    0x5560, 0x3c53, 0x556c, 0x3c4f, 0x5578, 0x3c4b, 0x5584, 0x3c46,
-    0x5590, 0x3c42, 0x559b, 0x3c3e, 0x55a7, 0x3c3a, 0x55b3, 0x3c36,
-    0x55bf, 0x3c31, 0x55cb, 0x3c2d, 0x55d7, 0x3c29, 0x55e2, 0x3c24,
-    0x55ee, 0x3c20, 0x55fa, 0x3c1c, 0x5606, 0x3c17, 0x5612, 0x3c13,
-    0x561d, 0x3c0f, 0x5629, 0x3c0a, 0x5635, 0x3c06, 0x5641, 0x3c02,
-    0x564c, 0x3bfd, 0x5658, 0x3bf9, 0x5664, 0x3bf5, 0x5670, 0x3bf0,
-    0x567c, 0x3bec, 0x5687, 0x3be7, 0x5693, 0x3be3, 0x569f, 0x3bde,
-    0x56ab, 0x3bda, 0x56b6, 0x3bd6, 0x56c2, 0x3bd1, 0x56ce, 0x3bcd,
-    0x56da, 0x3bc8, 0x56e5, 0x3bc4, 0x56f1, 0x3bbf, 0x56fd, 0x3bbb,
-    0x5709, 0x3bb6, 0x5714, 0x3bb2, 0x5720, 0x3bad, 0x572c, 0x3ba9,
-    0x5737, 0x3ba4, 0x5743, 0x3b9f, 0x574f, 0x3b9b, 0x575b, 0x3b96,
-    0x5766, 0x3b92, 0x5772, 0x3b8d, 0x577e, 0x3b88, 0x5789, 0x3b84,
-    0x5795, 0x3b7f, 0x57a1, 0x3b7b, 0x57ac, 0x3b76, 0x57b8, 0x3b71,
-    0x57c4, 0x3b6d, 0x57cf, 0x3b68, 0x57db, 0x3b63, 0x57e7, 0x3b5f,
-    0x57f2, 0x3b5a, 0x57fe, 0x3b55, 0x580a, 0x3b50, 0x5815, 0x3b4c,
-    0x5821, 0x3b47, 0x582d, 0x3b42, 0x5838, 0x3b3e, 0x5844, 0x3b39,
-    0x584f, 0x3b34, 0x585b, 0x3b2f, 0x5867, 0x3b2a, 0x5872, 0x3b26,
-    0x587e, 0x3b21, 0x5889, 0x3b1c, 0x5895, 0x3b17, 0x58a1, 0x3b12,
-    0x58ac, 0x3b0e, 0x58b8, 0x3b09, 0x58c3, 0x3b04, 0x58cf, 0x3aff,
-    0x58db, 0x3afa, 0x58e6, 0x3af5, 0x58f2, 0x3af0, 0x58fd, 0x3aeb,
-    0x5909, 0x3ae6, 0x5914, 0x3ae2, 0x5920, 0x3add, 0x592c, 0x3ad8,
-    0x5937, 0x3ad3, 0x5943, 0x3ace, 0x594e, 0x3ac9, 0x595a, 0x3ac4,
-    0x5965, 0x3abf, 0x5971, 0x3aba, 0x597c, 0x3ab5, 0x5988, 0x3ab0,
-    0x5993, 0x3aab, 0x599f, 0x3aa6, 0x59aa, 0x3aa1, 0x59b6, 0x3a9c,
-    0x59c1, 0x3a97, 0x59cd, 0x3a92, 0x59d8, 0x3a8d, 0x59e4, 0x3a88,
-    0x59ef, 0x3a82, 0x59fb, 0x3a7d, 0x5a06, 0x3a78, 0x5a12, 0x3a73,
-    0x5a1d, 0x3a6e, 0x5a29, 0x3a69, 0x5a34, 0x3a64, 0x5a40, 0x3a5f,
-    0x5a4b, 0x3a59, 0x5a57, 0x3a54, 0x5a62, 0x3a4f, 0x5a6e, 0x3a4a,
-    0x5a79, 0x3a45, 0x5a84, 0x3a3f, 0x5a90, 0x3a3a, 0x5a9b, 0x3a35,
-    0x5aa7, 0x3a30, 0x5ab2, 0x3a2b, 0x5abe, 0x3a25, 0x5ac9, 0x3a20,
-    0x5ad4, 0x3a1b, 0x5ae0, 0x3a16, 0x5aeb, 0x3a10, 0x5af7, 0x3a0b,
-    0x5b02, 0x3a06, 0x5b0d, 0x3a00, 0x5b19, 0x39fb, 0x5b24, 0x39f6,
-    0x5b30, 0x39f0, 0x5b3b, 0x39eb, 0x5b46, 0x39e6, 0x5b52, 0x39e0,
-    0x5b5d, 0x39db, 0x5b68, 0x39d6, 0x5b74, 0x39d0, 0x5b7f, 0x39cb,
-    0x5b8a, 0x39c5, 0x5b96, 0x39c0, 0x5ba1, 0x39bb, 0x5bac, 0x39b5,
-    0x5bb8, 0x39b0, 0x5bc3, 0x39aa, 0x5bce, 0x39a5, 0x5bda, 0x399f,
-    0x5be5, 0x399a, 0x5bf0, 0x3994, 0x5bfc, 0x398f, 0x5c07, 0x3989,
-    0x5c12, 0x3984, 0x5c1e, 0x397e, 0x5c29, 0x3979, 0x5c34, 0x3973,
-    0x5c3f, 0x396e, 0x5c4b, 0x3968, 0x5c56, 0x3963, 0x5c61, 0x395d,
-    0x5c6c, 0x3958, 0x5c78, 0x3952, 0x5c83, 0x394c, 0x5c8e, 0x3947,
-    0x5c99, 0x3941, 0x5ca5, 0x393b, 0x5cb0, 0x3936, 0x5cbb, 0x3930,
-    0x5cc6, 0x392b, 0x5cd2, 0x3925, 0x5cdd, 0x391f, 0x5ce8, 0x391a,
-    0x5cf3, 0x3914, 0x5cff, 0x390e, 0x5d0a, 0x3909, 0x5d15, 0x3903,
-    0x5d20, 0x38fd, 0x5d2b, 0x38f7, 0x5d36, 0x38f2, 0x5d42, 0x38ec,
-    0x5d4d, 0x38e6, 0x5d58, 0x38e0, 0x5d63, 0x38db, 0x5d6e, 0x38d5,
-    0x5d79, 0x38cf, 0x5d85, 0x38c9, 0x5d90, 0x38c3, 0x5d9b, 0x38be,
-    0x5da6, 0x38b8, 0x5db1, 0x38b2, 0x5dbc, 0x38ac, 0x5dc7, 0x38a6,
-    0x5dd3, 0x38a1, 0x5dde, 0x389b, 0x5de9, 0x3895, 0x5df4, 0x388f,
-    0x5dff, 0x3889, 0x5e0a, 0x3883, 0x5e15, 0x387d, 0x5e20, 0x3877,
-    0x5e2b, 0x3871, 0x5e36, 0x386b, 0x5e42, 0x3866, 0x5e4d, 0x3860,
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-    0x7fe7, 0x388, 0x7fe8, 0x37c, 0x7fe8, 0x36f, 0x7fe9, 0x363,
-    0x7fea, 0x356, 0x7fea, 0x34a, 0x7feb, 0x33d, 0x7fec, 0x330,
-    0x7fec, 0x324, 0x7fed, 0x317, 0x7fed, 0x30b, 0x7fee, 0x2fe,
-    0x7fef, 0x2f2, 0x7fef, 0x2e5, 0x7ff0, 0x2d9, 0x7ff0, 0x2cc,
-    0x7ff1, 0x2c0, 0x7ff1, 0x2b3, 0x7ff2, 0x2a6, 0x7ff2, 0x29a,
-    0x7ff3, 0x28d, 0x7ff3, 0x281, 0x7ff4, 0x274, 0x7ff4, 0x268,
-    0x7ff5, 0x25b, 0x7ff5, 0x24e, 0x7ff6, 0x242, 0x7ff6, 0x235,
-    0x7ff7, 0x229, 0x7ff7, 0x21c, 0x7ff7, 0x210, 0x7ff8, 0x203,
-    0x7ff8, 0x1f7, 0x7ff9, 0x1ea, 0x7ff9, 0x1dd, 0x7ff9, 0x1d1,
-    0x7ffa, 0x1c4, 0x7ffa, 0x1b8, 0x7ffa, 0x1ab, 0x7ffb, 0x19f,
-    0x7ffb, 0x192, 0x7ffb, 0x186, 0x7ffc, 0x179, 0x7ffc, 0x16c,
-    0x7ffc, 0x160, 0x7ffc, 0x153, 0x7ffd, 0x147, 0x7ffd, 0x13a,
-    0x7ffd, 0x12e, 0x7ffd, 0x121, 0x7ffe, 0x114, 0x7ffe, 0x108,
-    0x7ffe, 0xfb, 0x7ffe, 0xef, 0x7ffe, 0xe2, 0x7fff, 0xd6,
-    0x7fff, 0xc9, 0x7fff, 0xbc, 0x7fff, 0xb0, 0x7fff, 0xa3,
-    0x7fff, 0x97, 0x7fff, 0x8a, 0x7fff, 0x7e, 0x7fff, 0x71,
-    0x7fff, 0x65, 0x7fff, 0x58, 0x7fff, 0x4b, 0x7fff, 0x3f,
-    0x7fff, 0x32, 0x7fff, 0x26, 0x7fff, 0x19, 0x7fff, 0xd,
-    0x7fff, 0x0, 0x7fff, 0xfff3, 0x7fff, 0xffe7, 0x7fff, 0xffda,
-    0x7fff, 0xffce, 0x7fff, 0xffc1, 0x7fff, 0xffb5, 0x7fff, 0xffa8,
-    0x7fff, 0xff9b, 0x7fff, 0xff8f, 0x7fff, 0xff82, 0x7fff, 0xff76,
-    0x7fff, 0xff69, 0x7fff, 0xff5d, 0x7fff, 0xff50, 0x7fff, 0xff44,
-    0x7fff, 0xff37, 0x7fff, 0xff2a, 0x7ffe, 0xff1e, 0x7ffe, 0xff11,
-    0x7ffe, 0xff05, 0x7ffe, 0xfef8, 0x7ffe, 0xfeec, 0x7ffd, 0xfedf,
-    0x7ffd, 0xfed2, 0x7ffd, 0xfec6, 0x7ffd, 0xfeb9, 0x7ffc, 0xfead,
-    0x7ffc, 0xfea0, 0x7ffc, 0xfe94, 0x7ffc, 0xfe87, 0x7ffb, 0xfe7a,
-    0x7ffb, 0xfe6e, 0x7ffb, 0xfe61, 0x7ffa, 0xfe55, 0x7ffa, 0xfe48,
-    0x7ffa, 0xfe3c, 0x7ff9, 0xfe2f, 0x7ff9, 0xfe23, 0x7ff9, 0xfe16,
-    0x7ff8, 0xfe09, 0x7ff8, 0xfdfd, 0x7ff7, 0xfdf0, 0x7ff7, 0xfde4,
-    0x7ff7, 0xfdd7, 0x7ff6, 0xfdcb, 0x7ff6, 0xfdbe, 0x7ff5, 0xfdb2,
-    0x7ff5, 0xfda5, 0x7ff4, 0xfd98, 0x7ff4, 0xfd8c, 0x7ff3, 0xfd7f,
-    0x7ff3, 0xfd73, 0x7ff2, 0xfd66, 0x7ff2, 0xfd5a, 0x7ff1, 0xfd4d,
-    0x7ff1, 0xfd40, 0x7ff0, 0xfd34, 0x7ff0, 0xfd27, 0x7fef, 0xfd1b,
-    0x7fef, 0xfd0e, 0x7fee, 0xfd02, 0x7fed, 0xfcf5, 0x7fed, 0xfce9,
-    0x7fec, 0xfcdc, 0x7fec, 0xfcd0, 0x7feb, 0xfcc3, 0x7fea, 0xfcb6,
-    0x7fea, 0xfcaa, 0x7fe9, 0xfc9d, 0x7fe8, 0xfc91, 0x7fe8, 0xfc84,
-    0x7fe7, 0xfc78, 0x7fe6, 0xfc6b, 0x7fe6, 0xfc5f, 0x7fe5, 0xfc52,
-    0x7fe4, 0xfc45, 0x7fe3, 0xfc39, 0x7fe3, 0xfc2c, 0x7fe2, 0xfc20,
-    0x7fe1, 0xfc13, 0x7fe0, 0xfc07, 0x7fe0, 0xfbfa, 0x7fdf, 0xfbee,
-    0x7fde, 0xfbe1, 0x7fdd, 0xfbd5, 0x7fdc, 0xfbc8, 0x7fdc, 0xfbbc,
-    0x7fdb, 0xfbaf, 0x7fda, 0xfba2, 0x7fd9, 0xfb96, 0x7fd8, 0xfb89,
-    0x7fd7, 0xfb7d, 0x7fd6, 0xfb70, 0x7fd5, 0xfb64, 0x7fd5, 0xfb57,
-    0x7fd4, 0xfb4b, 0x7fd3, 0xfb3e, 0x7fd2, 0xfb32, 0x7fd1, 0xfb25,
-    0x7fd0, 0xfb19, 0x7fcf, 0xfb0c, 0x7fce, 0xfb00, 0x7fcd, 0xfaf3,
-    0x7fcc, 0xfae6, 0x7fcb, 0xfada, 0x7fca, 0xfacd, 0x7fc9, 0xfac1,
-    0x7fc8, 0xfab4, 0x7fc7, 0xfaa8, 0x7fc6, 0xfa9b, 0x7fc5, 0xfa8f,
-    0x7fc4, 0xfa82, 0x7fc3, 0xfa76, 0x7fc1, 0xfa69, 0x7fc0, 0xfa5d,
-    0x7fbf, 0xfa50, 0x7fbe, 0xfa44, 0x7fbd, 0xfa37, 0x7fbc, 0xfa2b,
-    0x7fbb, 0xfa1e, 0x7fb9, 0xfa12, 0x7fb8, 0xfa05, 0x7fb7, 0xf9f9,
-    0x7fb6, 0xf9ec, 0x7fb5, 0xf9e0, 0x7fb4, 0xf9d3, 0x7fb2, 0xf9c7,
-    0x7fb1, 0xf9ba, 0x7fb0, 0xf9ae, 0x7faf, 0xf9a1, 0x7fad, 0xf995,
-    0x7fac, 0xf988, 0x7fab, 0xf97c, 0x7faa, 0xf96f, 0x7fa8, 0xf963,
-    0x7fa7, 0xf956, 0x7fa6, 0xf94a, 0x7fa4, 0xf93d, 0x7fa3, 0xf931,
-    0x7fa2, 0xf924, 0x7fa0, 0xf918, 0x7f9f, 0xf90b, 0x7f9e, 0xf8ff,
-    0x7f9c, 0xf8f2, 0x7f9b, 0xf8e6, 0x7f99, 0xf8d9, 0x7f98, 0xf8cd,
-    0x7f97, 0xf8c0, 0x7f95, 0xf8b4, 0x7f94, 0xf8a7, 0x7f92, 0xf89b,
-    0x7f91, 0xf88e, 0x7f8f, 0xf882, 0x7f8e, 0xf875, 0x7f8c, 0xf869,
-    0x7f8b, 0xf85c, 0x7f89, 0xf850, 0x7f88, 0xf843, 0x7f86, 0xf837,
-    0x7f85, 0xf82a, 0x7f83, 0xf81e, 0x7f82, 0xf811, 0x7f80, 0xf805,
-    0x7f7f, 0xf7f9, 0x7f7d, 0xf7ec, 0x7f7b, 0xf7e0, 0x7f7a, 0xf7d3,
-    0x7f78, 0xf7c7, 0x7f77, 0xf7ba, 0x7f75, 0xf7ae, 0x7f73, 0xf7a1,
-    0x7f72, 0xf795, 0x7f70, 0xf788, 0x7f6e, 0xf77c, 0x7f6d, 0xf76f,
-    0x7f6b, 0xf763, 0x7f69, 0xf757, 0x7f68, 0xf74a, 0x7f66, 0xf73e,
-    0x7f64, 0xf731, 0x7f62, 0xf725, 0x7f61, 0xf718, 0x7f5f, 0xf70c,
-    0x7f5d, 0xf6ff, 0x7f5b, 0xf6f3, 0x7f5a, 0xf6e7, 0x7f58, 0xf6da,
-    0x7f56, 0xf6ce, 0x7f54, 0xf6c1, 0x7f52, 0xf6b5, 0x7f51, 0xf6a8,
-    0x7f4f, 0xf69c, 0x7f4d, 0xf690, 0x7f4b, 0xf683, 0x7f49, 0xf677,
-    0x7f47, 0xf66a, 0x7f45, 0xf65e, 0x7f43, 0xf651, 0x7f42, 0xf645,
-    0x7f40, 0xf639, 0x7f3e, 0xf62c, 0x7f3c, 0xf620, 0x7f3a, 0xf613,
-    0x7f38, 0xf607, 0x7f36, 0xf5fa, 0x7f34, 0xf5ee, 0x7f32, 0xf5e2,
-    0x7f30, 0xf5d5, 0x7f2e, 0xf5c9, 0x7f2c, 0xf5bc, 0x7f2a, 0xf5b0,
-    0x7f28, 0xf5a4, 0x7f26, 0xf597, 0x7f24, 0xf58b, 0x7f22, 0xf57e,
-    0x7f20, 0xf572, 0x7f1e, 0xf566, 0x7f1c, 0xf559, 0x7f19, 0xf54d,
-    0x7f17, 0xf540, 0x7f15, 0xf534, 0x7f13, 0xf528, 0x7f11, 0xf51b,
-    0x7f0f, 0xf50f, 0x7f0d, 0xf503, 0x7f0a, 0xf4f6, 0x7f08, 0xf4ea,
-    0x7f06, 0xf4dd, 0x7f04, 0xf4d1, 0x7f02, 0xf4c5, 0x7f00, 0xf4b8,
-    0x7efd, 0xf4ac, 0x7efb, 0xf4a0, 0x7ef9, 0xf493, 0x7ef7, 0xf487,
-    0x7ef4, 0xf47b, 0x7ef2, 0xf46e, 0x7ef0, 0xf462, 0x7eed, 0xf455,
-    0x7eeb, 0xf449, 0x7ee9, 0xf43d, 0x7ee7, 0xf430, 0x7ee4, 0xf424,
-    0x7ee2, 0xf418, 0x7ee0, 0xf40b, 0x7edd, 0xf3ff, 0x7edb, 0xf3f3,
-    0x7ed8, 0xf3e6, 0x7ed6, 0xf3da, 0x7ed4, 0xf3ce, 0x7ed1, 0xf3c1,
-    0x7ecf, 0xf3b5, 0x7ecc, 0xf3a9, 0x7eca, 0xf39c, 0x7ec8, 0xf390,
-    0x7ec5, 0xf384, 0x7ec3, 0xf377, 0x7ec0, 0xf36b, 0x7ebe, 0xf35f,
-    0x7ebb, 0xf352, 0x7eb9, 0xf346, 0x7eb6, 0xf33a, 0x7eb4, 0xf32d,
-    0x7eb1, 0xf321, 0x7eaf, 0xf315, 0x7eac, 0xf308, 0x7eaa, 0xf2fc,
-    0x7ea7, 0xf2f0, 0x7ea5, 0xf2e4, 0x7ea2, 0xf2d7, 0x7e9f, 0xf2cb,
-    0x7e9d, 0xf2bf, 0x7e9a, 0xf2b2, 0x7e98, 0xf2a6, 0x7e95, 0xf29a,
-    0x7e92, 0xf28e, 0x7e90, 0xf281, 0x7e8d, 0xf275, 0x7e8a, 0xf269,
-    0x7e88, 0xf25c, 0x7e85, 0xf250, 0x7e82, 0xf244, 0x7e80, 0xf238,
-    0x7e7d, 0xf22b, 0x7e7a, 0xf21f, 0x7e77, 0xf213, 0x7e75, 0xf207,
-    0x7e72, 0xf1fa, 0x7e6f, 0xf1ee, 0x7e6c, 0xf1e2, 0x7e6a, 0xf1d5,
-    0x7e67, 0xf1c9, 0x7e64, 0xf1bd, 0x7e61, 0xf1b1, 0x7e5e, 0xf1a4,
-    0x7e5c, 0xf198, 0x7e59, 0xf18c, 0x7e56, 0xf180, 0x7e53, 0xf174,
-    0x7e50, 0xf167, 0x7e4d, 0xf15b, 0x7e4a, 0xf14f, 0x7e48, 0xf143,
-    0x7e45, 0xf136, 0x7e42, 0xf12a, 0x7e3f, 0xf11e, 0x7e3c, 0xf112,
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-    0x7e2d, 0xf0d5, 0x7e2a, 0xf0c8, 0x7e27, 0xf0bc, 0x7e24, 0xf0b0,
-    0x7e21, 0xf0a4, 0x7e1e, 0xf098, 0x7e1b, 0xf08b, 0x7e18, 0xf07f,
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-    0x7df0, 0xefe1, 0x7ded, 0xefd5, 0x7de9, 0xefc9, 0x7de6, 0xefbc,
-    0x7de3, 0xefb0, 0x7de0, 0xefa4, 0x7ddd, 0xef98, 0x7dd9, 0xef8c,
-    0x7dd6, 0xef80, 0x7dd3, 0xef74, 0x7dd0, 0xef67, 0x7dcc, 0xef5b,
-    0x7dc9, 0xef4f, 0x7dc6, 0xef43, 0x7dc2, 0xef37, 0x7dbf, 0xef2b,
-    0x7dbc, 0xef1f, 0x7db9, 0xef13, 0x7db5, 0xef06, 0x7db2, 0xeefa,
-    0x7daf, 0xeeee, 0x7dab, 0xeee2, 0x7da8, 0xeed6, 0x7da4, 0xeeca,
-    0x7da1, 0xeebe, 0x7d9e, 0xeeb2, 0x7d9a, 0xeea6, 0x7d97, 0xee99,
-    0x7d93, 0xee8d, 0x7d90, 0xee81, 0x7d8d, 0xee75, 0x7d89, 0xee69,
-    0x7d86, 0xee5d, 0x7d82, 0xee51, 0x7d7f, 0xee45, 0x7d7b, 0xee39,
-    0x7d78, 0xee2d, 0x7d74, 0xee21, 0x7d71, 0xee15, 0x7d6d, 0xee09,
-    0x7d6a, 0xedfc, 0x7d66, 0xedf0, 0x7d63, 0xede4, 0x7d5f, 0xedd8,
-    0x7d5b, 0xedcc, 0x7d58, 0xedc0, 0x7d54, 0xedb4, 0x7d51, 0xeda8,
-    0x7d4d, 0xed9c, 0x7d49, 0xed90, 0x7d46, 0xed84, 0x7d42, 0xed78,
-    0x7d3f, 0xed6c, 0x7d3b, 0xed60, 0x7d37, 0xed54, 0x7d34, 0xed48,
-    0x7d30, 0xed3c, 0x7d2c, 0xed30, 0x7d28, 0xed24, 0x7d25, 0xed18,
-    0x7d21, 0xed0c, 0x7d1d, 0xed00, 0x7d1a, 0xecf4, 0x7d16, 0xece8,
-    0x7d12, 0xecdc, 0x7d0e, 0xecd0, 0x7d0b, 0xecc4, 0x7d07, 0xecb8,
-    0x7d03, 0xecac, 0x7cff, 0xeca0, 0x7cfb, 0xec94, 0x7cf8, 0xec88,
-    0x7cf4, 0xec7c, 0x7cf0, 0xec70, 0x7cec, 0xec64, 0x7ce8, 0xec58,
-    0x7ce4, 0xec4c, 0x7ce0, 0xec40, 0x7cdd, 0xec34, 0x7cd9, 0xec28,
-    0x7cd5, 0xec1c, 0x7cd1, 0xec10, 0x7ccd, 0xec05, 0x7cc9, 0xebf9,
-    0x7cc5, 0xebed, 0x7cc1, 0xebe1, 0x7cbd, 0xebd5, 0x7cb9, 0xebc9,
-    0x7cb5, 0xebbd, 0x7cb1, 0xebb1, 0x7cad, 0xeba5, 0x7ca9, 0xeb99,
-    0x7ca5, 0xeb8d, 0x7ca1, 0xeb81, 0x7c9d, 0xeb75, 0x7c99, 0xeb6a,
-    0x7c95, 0xeb5e, 0x7c91, 0xeb52, 0x7c8d, 0xeb46, 0x7c89, 0xeb3a,
-    0x7c85, 0xeb2e, 0x7c81, 0xeb22, 0x7c7d, 0xeb16, 0x7c79, 0xeb0a,
-    0x7c74, 0xeaff, 0x7c70, 0xeaf3, 0x7c6c, 0xeae7, 0x7c68, 0xeadb,
-    0x7c64, 0xeacf, 0x7c60, 0xeac3, 0x7c5b, 0xeab7, 0x7c57, 0xeaac,
-    0x7c53, 0xeaa0, 0x7c4f, 0xea94, 0x7c4b, 0xea88, 0x7c46, 0xea7c,
-    0x7c42, 0xea70, 0x7c3e, 0xea65, 0x7c3a, 0xea59, 0x7c36, 0xea4d,
-    0x7c31, 0xea41, 0x7c2d, 0xea35, 0x7c29, 0xea29, 0x7c24, 0xea1e,
-    0x7c20, 0xea12, 0x7c1c, 0xea06, 0x7c17, 0xe9fa, 0x7c13, 0xe9ee,
-    0x7c0f, 0xe9e3, 0x7c0a, 0xe9d7, 0x7c06, 0xe9cb, 0x7c02, 0xe9bf,
-    0x7bfd, 0xe9b4, 0x7bf9, 0xe9a8, 0x7bf5, 0xe99c, 0x7bf0, 0xe990,
-    0x7bec, 0xe984, 0x7be7, 0xe979, 0x7be3, 0xe96d, 0x7bde, 0xe961,
-    0x7bda, 0xe955, 0x7bd6, 0xe94a, 0x7bd1, 0xe93e, 0x7bcd, 0xe932,
-    0x7bc8, 0xe926, 0x7bc4, 0xe91b, 0x7bbf, 0xe90f, 0x7bbb, 0xe903,
-    0x7bb6, 0xe8f7, 0x7bb2, 0xe8ec, 0x7bad, 0xe8e0, 0x7ba9, 0xe8d4,
-    0x7ba4, 0xe8c9, 0x7b9f, 0xe8bd, 0x7b9b, 0xe8b1, 0x7b96, 0xe8a5,
-    0x7b92, 0xe89a, 0x7b8d, 0xe88e, 0x7b88, 0xe882, 0x7b84, 0xe877,
-    0x7b7f, 0xe86b, 0x7b7b, 0xe85f, 0x7b76, 0xe854, 0x7b71, 0xe848,
-    0x7b6d, 0xe83c, 0x7b68, 0xe831, 0x7b63, 0xe825, 0x7b5f, 0xe819,
-    0x7b5a, 0xe80e, 0x7b55, 0xe802, 0x7b50, 0xe7f6, 0x7b4c, 0xe7eb,
-    0x7b47, 0xe7df, 0x7b42, 0xe7d3, 0x7b3e, 0xe7c8, 0x7b39, 0xe7bc,
-    0x7b34, 0xe7b1, 0x7b2f, 0xe7a5, 0x7b2a, 0xe799, 0x7b26, 0xe78e,
-    0x7b21, 0xe782, 0x7b1c, 0xe777, 0x7b17, 0xe76b, 0x7b12, 0xe75f,
-    0x7b0e, 0xe754, 0x7b09, 0xe748, 0x7b04, 0xe73d, 0x7aff, 0xe731,
-    0x7afa, 0xe725, 0x7af5, 0xe71a, 0x7af0, 0xe70e, 0x7aeb, 0xe703,
-    0x7ae6, 0xe6f7, 0x7ae2, 0xe6ec, 0x7add, 0xe6e0, 0x7ad8, 0xe6d4,
-    0x7ad3, 0xe6c9, 0x7ace, 0xe6bd, 0x7ac9, 0xe6b2, 0x7ac4, 0xe6a6,
-    0x7abf, 0xe69b, 0x7aba, 0xe68f, 0x7ab5, 0xe684, 0x7ab0, 0xe678,
-    0x7aab, 0xe66d, 0x7aa6, 0xe661, 0x7aa1, 0xe656, 0x7a9c, 0xe64a,
-    0x7a97, 0xe63f, 0x7a92, 0xe633, 0x7a8d, 0xe628, 0x7a88, 0xe61c,
-    0x7a82, 0xe611, 0x7a7d, 0xe605, 0x7a78, 0xe5fa, 0x7a73, 0xe5ee,
-    0x7a6e, 0xe5e3, 0x7a69, 0xe5d7, 0x7a64, 0xe5cc, 0x7a5f, 0xe5c0,
-    0x7a59, 0xe5b5, 0x7a54, 0xe5a9, 0x7a4f, 0xe59e, 0x7a4a, 0xe592,
-    0x7a45, 0xe587, 0x7a3f, 0xe57c, 0x7a3a, 0xe570, 0x7a35, 0xe565,
-    0x7a30, 0xe559, 0x7a2b, 0xe54e, 0x7a25, 0xe542, 0x7a20, 0xe537,
-    0x7a1b, 0xe52c, 0x7a16, 0xe520, 0x7a10, 0xe515, 0x7a0b, 0xe509,
-    0x7a06, 0xe4fe, 0x7a00, 0xe4f3, 0x79fb, 0xe4e7, 0x79f6, 0xe4dc,
-    0x79f0, 0xe4d0, 0x79eb, 0xe4c5, 0x79e6, 0xe4ba, 0x79e0, 0xe4ae,
-    0x79db, 0xe4a3, 0x79d6, 0xe498, 0x79d0, 0xe48c, 0x79cb, 0xe481,
-    0x79c5, 0xe476, 0x79c0, 0xe46a, 0x79bb, 0xe45f, 0x79b5, 0xe454,
-    0x79b0, 0xe448, 0x79aa, 0xe43d, 0x79a5, 0xe432, 0x799f, 0xe426,
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-    0x42c0, 0xc00f, 0x42b3, 0xc00f, 0x42a6, 0xc00e, 0x429a, 0xc00e,
-    0x428d, 0xc00d, 0x4281, 0xc00d, 0x4274, 0xc00c, 0x4268, 0xc00c,
-    0x425b, 0xc00b, 0x424e, 0xc00b, 0x4242, 0xc00a, 0x4235, 0xc00a,
-    0x4229, 0xc009, 0x421c, 0xc009, 0x4210, 0xc009, 0x4203, 0xc008,
-    0x41f7, 0xc008, 0x41ea, 0xc007, 0x41dd, 0xc007, 0x41d1, 0xc007,
-    0x41c4, 0xc006, 0x41b8, 0xc006, 0x41ab, 0xc006, 0x419f, 0xc005,
-    0x4192, 0xc005, 0x4186, 0xc005, 0x4179, 0xc004, 0x416c, 0xc004,
-    0x4160, 0xc004, 0x4153, 0xc004, 0x4147, 0xc003, 0x413a, 0xc003,
-    0x412e, 0xc003, 0x4121, 0xc003, 0x4114, 0xc002, 0x4108, 0xc002,
-    0x40fb, 0xc002, 0x40ef, 0xc002, 0x40e2, 0xc002, 0x40d6, 0xc001,
-    0x40c9, 0xc001, 0x40bc, 0xc001, 0x40b0, 0xc001, 0x40a3, 0xc001,
-    0x4097, 0xc001, 0x408a, 0xc001, 0x407e, 0xc000, 0x4071, 0xc000,
-    0x4065, 0xc000, 0x4058, 0xc000, 0x404b, 0xc000, 0x403f, 0xc000,
-    0x4032, 0xc000, 0x4026, 0xc000, 0x4019, 0xc000, 0x400d, 0xc000,
-};
-
-/**    
-* @brief  Initialization function for the Q15 RFFT/RIFFT.   
-* @param[in, out] *S             points to an instance of the Q15 RFFT/RIFFT structure.   
-* @param[in]      fftLenReal     length of the FFT.   
-* @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    
-* This function also initializes Twiddle factor table.     
-*/
-arm_status arm_rfft_init_q15(
-    arm_rfft_instance_q15 * S,
-    uint32_t fftLenReal,
-    uint32_t ifftFlagR,
-    uint32_t bitReverseFlag)
-{
-    /*  Initialise the default arm status */
-    arm_status status = ARM_MATH_SUCCESS;
-
-    /*  Initialize the Real FFT length */
-    S->fftLenReal = (uint16_t) fftLenReal;
-
-    /*  Initialize the Twiddle coefficientA pointer */
-    S->pTwiddleAReal = (q15_t *) realCoefAQ15;
-
-    /*  Initialize the Twiddle coefficientB pointer */
-    S->pTwiddleBReal = (q15_t *) realCoefBQ15;
-
-    /*  Initialize the Flag for selection of RFFT or RIFFT */
-    S->ifftFlagR = (uint8_t) ifftFlagR;
-
-    /*  Initialize the Flag for calculation Bit reversal or not */
-    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-    /*  Initialization of coef modifier depending on the FFT length */
-    switch (S->fftLenReal)
-    {
-    /* case 8192u: */
-    /*    S->twidCoefRModifier = 1u; */
-    /*    S->pCfft = &arm_cfft_sR_q15_len4096; */
-    /*    break; */
-    /* case 4096u: */
-    /*     S->twidCoefRModifier = 2u; */
-    /*     S->pCfft = &arm_cfft_sR_q15_len2048; */
-    /*     break; */
-    /* case 2048u: */
-    /*     S->twidCoefRModifier = 4u; */
-    /*     S->pCfft = &arm_cfft_sR_q15_len1024; */
-    /*     break; */
-    case 1024u:
-        S->twidCoefRModifier = 8u;
-        S->pCfft = &arm_cfft_sR_q15_len512;
-        break;
-    case 512u:
-        S->twidCoefRModifier = 16u;
-        S->pCfft = &arm_cfft_sR_q15_len256;
-        break;
-    case 256u:
-        S->twidCoefRModifier = 32u;
-        S->pCfft = &arm_cfft_sR_q15_len128;
-        break;
-    case 128u:
-        S->twidCoefRModifier = 64u;
-        S->pCfft = &arm_cfft_sR_q15_len64;
-        break;
-    case 64u:
-        S->twidCoefRModifier = 128u;
-        S->pCfft = &arm_cfft_sR_q15_len32;
-        break;
-    case 32u:
-        S->twidCoefRModifier = 256u;
-        S->pCfft = &arm_cfft_sR_q15_len16;
-        break;
-    default:
-        /*  Reporting argument error if rfftSize is not valid value */
-        status = ARM_MATH_ARGUMENT_ERROR;
-        break;
-    }
-
-    /* return the status of RFFT Init function */
-    return (status);
-}
-
-/**    
-* @} end of RealFFT group    
-*/
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c
deleted file mode 100644
index ab839d5d..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_init_q31.c
+++ /dev/null
@@ -1,4285 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_init_q31.c    
-*    
-* Description:	RFFT & RIFFT Q31 initialisation function    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.  
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include "arm_const_structs.h"
-
-/**    
-* @ingroup groupTransforms    
-*/
-
-/**    
-* @addtogroup RealFFT    
-* @{    
-*/
-
-/**    
-* \par    
-* Generation fixed-point realCoefAQ31 array in Q31 format:    
-* \par    
-* n = 4096    
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pATable[2 * i] = 0.5 * (1.0 - sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-* }
    
-* \par    
-* Convert to fixed point Q31 format    
-*     round(pATable[i] * pow(2, 31))    
-*/
-
-
-static const q31_t realCoefAQ31[8192] = {
-    0x40000000, 0xc0000000, 0x3ff36f02, 0xc000013c,
-    0x3fe6de05, 0xc00004ef, 0x3fda4d09, 0xc0000b1a,
-    0x3fcdbc0f, 0xc00013bd, 0x3fc12b16, 0xc0001ed8,
-    0x3fb49a1f, 0xc0002c6a, 0x3fa8092c, 0xc0003c74,
-    0x3f9b783c, 0xc0004ef5, 0x3f8ee750, 0xc00063ee,
-    0x3f825668, 0xc0007b5f, 0x3f75c585, 0xc0009547,
-    0x3f6934a8, 0xc000b1a7, 0x3f5ca3d0, 0xc000d07e,
-    0x3f5012fe, 0xc000f1ce, 0x3f438234, 0xc0011594,
-    0x3f36f170, 0xc0013bd3, 0x3f2a60b4, 0xc0016489,
-    0x3f1dd001, 0xc0018fb6, 0x3f113f56, 0xc001bd5c,
-    0x3f04aeb5, 0xc001ed78, 0x3ef81e1d, 0xc002200d,
-    0x3eeb8d8f, 0xc0025519, 0x3edefd0c, 0xc0028c9c,
-    0x3ed26c94, 0xc002c697, 0x3ec5dc28, 0xc003030a,
-    0x3eb94bc8, 0xc00341f4, 0x3eacbb74, 0xc0038356,
-    0x3ea02b2e, 0xc003c72f, 0x3e939af5, 0xc0040d80,
-    0x3e870aca, 0xc0045648, 0x3e7a7aae, 0xc004a188,
-    0x3e6deaa1, 0xc004ef3f, 0x3e615aa3, 0xc0053f6e,
-    0x3e54cab5, 0xc0059214, 0x3e483ad8, 0xc005e731,
-    0x3e3bab0b, 0xc0063ec6, 0x3e2f1b50, 0xc00698d3,
-    0x3e228ba7, 0xc006f556, 0x3e15fc11, 0xc0075452,
-    0x3e096c8d, 0xc007b5c4, 0x3dfcdd1d, 0xc00819ae,
-    0x3df04dc0, 0xc008800f, 0x3de3be78, 0xc008e8e8,
-    0x3dd72f45, 0xc0095438, 0x3dcaa027, 0xc009c1ff,
-    0x3dbe111e, 0xc00a323d, 0x3db1822c, 0xc00aa4f3,
-    0x3da4f351, 0xc00b1a20, 0x3d98648d, 0xc00b91c4,
-    0x3d8bd5e1, 0xc00c0be0, 0x3d7f474d, 0xc00c8872,
-    0x3d72b8d2, 0xc00d077c, 0x3d662a70, 0xc00d88fd,
-    0x3d599c28, 0xc00e0cf5, 0x3d4d0df9, 0xc00e9364,
-    0x3d407fe6, 0xc00f1c4a, 0x3d33f1ed, 0xc00fa7a8,
-    0x3d276410, 0xc010357c, 0x3d1ad650, 0xc010c5c7,
-    0x3d0e48ab, 0xc011588a, 0x3d01bb24, 0xc011edc3,
-    0x3cf52dbb, 0xc0128574, 0x3ce8a06f, 0xc0131f9b,
-    0x3cdc1342, 0xc013bc39, 0x3ccf8634, 0xc0145b4e,
-    0x3cc2f945, 0xc014fcda, 0x3cb66c77, 0xc015a0dd,
-    0x3ca9dfc8, 0xc0164757, 0x3c9d533b, 0xc016f047,
-    0x3c90c6cf, 0xc0179bae, 0x3c843a85, 0xc018498c,
-    0x3c77ae5e, 0xc018f9e1, 0x3c6b2259, 0xc019acac,
-    0x3c5e9678, 0xc01a61ee, 0x3c520aba, 0xc01b19a7,
-    0x3c457f21, 0xc01bd3d6, 0x3c38f3ac, 0xc01c907c,
-    0x3c2c685d, 0xc01d4f99, 0x3c1fdd34, 0xc01e112b,
-    0x3c135231, 0xc01ed535, 0x3c06c754, 0xc01f9bb5,
-    0x3bfa3c9f, 0xc02064ab, 0x3bedb212, 0xc0213018,
-    0x3be127ac, 0xc021fdfb, 0x3bd49d70, 0xc022ce54,
-    0x3bc8135c, 0xc023a124, 0x3bbb8973, 0xc024766a,
-    0x3baeffb3, 0xc0254e27, 0x3ba2761e, 0xc0262859,
-    0x3b95ecb4, 0xc0270502, 0x3b896375, 0xc027e421,
-    0x3b7cda63, 0xc028c5b6, 0x3b70517d, 0xc029a9c1,
-    0x3b63c8c4, 0xc02a9042, 0x3b574039, 0xc02b7939,
-    0x3b4ab7db, 0xc02c64a6, 0x3b3e2fac, 0xc02d5289,
-    0x3b31a7ac, 0xc02e42e2, 0x3b251fdc, 0xc02f35b1,
-    0x3b18983b, 0xc0302af5, 0x3b0c10cb, 0xc03122b0,
-    0x3aff898c, 0xc0321ce0, 0x3af3027e, 0xc0331986,
-    0x3ae67ba2, 0xc03418a2, 0x3ad9f4f8, 0xc0351a33,
-    0x3acd6e81, 0xc0361e3a, 0x3ac0e83d, 0xc03724b6,
-    0x3ab4622d, 0xc0382da8, 0x3aa7dc52, 0xc0393910,
-    0x3a9b56ab, 0xc03a46ed, 0x3a8ed139, 0xc03b573f,
-    0x3a824bfd, 0xc03c6a07, 0x3a75c6f8, 0xc03d7f44,
-    0x3a694229, 0xc03e96f6, 0x3a5cbd91, 0xc03fb11d,
-    0x3a503930, 0xc040cdba, 0x3a43b508, 0xc041eccc,
-    0x3a373119, 0xc0430e53, 0x3a2aad62, 0xc044324f,
-    0x3a1e29e5, 0xc04558c0, 0x3a11a6a3, 0xc04681a6,
-    0x3a05239a, 0xc047ad01, 0x39f8a0cd, 0xc048dad1,
-    0x39ec1e3b, 0xc04a0b16, 0x39df9be6, 0xc04b3dcf,
-    0x39d319cc, 0xc04c72fe, 0x39c697f0, 0xc04daaa1,
-    0x39ba1651, 0xc04ee4b8, 0x39ad94f0, 0xc0502145,
-    0x39a113cd, 0xc0516045, 0x399492ea, 0xc052a1bb,
-    0x39881245, 0xc053e5a5, 0x397b91e1, 0xc0552c03,
-    0x396f11bc, 0xc05674d6, 0x396291d9, 0xc057c01d,
-    0x39561237, 0xc0590dd8, 0x394992d7, 0xc05a5e07,
-    0x393d13b8, 0xc05bb0ab, 0x393094dd, 0xc05d05c3,
-    0x39241645, 0xc05e5d4e, 0x391797f0, 0xc05fb74e,
-    0x390b19e0, 0xc06113c2, 0x38fe9c15, 0xc06272aa,
-    0x38f21e8e, 0xc063d405, 0x38e5a14d, 0xc06537d4,
-    0x38d92452, 0xc0669e18, 0x38cca79e, 0xc06806ce,
-    0x38c02b31, 0xc06971f9, 0x38b3af0c, 0xc06adf97,
-    0x38a7332e, 0xc06c4fa8, 0x389ab799, 0xc06dc22e,
-    0x388e3c4d, 0xc06f3726, 0x3881c14b, 0xc070ae92,
-    0x38754692, 0xc0722871, 0x3868cc24, 0xc073a4c3,
-    0x385c5201, 0xc0752389, 0x384fd829, 0xc076a4c2,
-    0x38435e9d, 0xc078286e, 0x3836e55d, 0xc079ae8c,
-    0x382a6c6a, 0xc07b371e, 0x381df3c5, 0xc07cc223,
-    0x38117b6d, 0xc07e4f9b, 0x38050364, 0xc07fdf85,
-    0x37f88ba9, 0xc08171e2, 0x37ec143e, 0xc08306b2,
-    0x37df9d22, 0xc0849df4, 0x37d32657, 0xc08637a9,
-    0x37c6afdc, 0xc087d3d0, 0x37ba39b3, 0xc089726a,
-    0x37adc3db, 0xc08b1376, 0x37a14e55, 0xc08cb6f5,
-    0x3794d922, 0xc08e5ce5, 0x37886442, 0xc0900548,
-    0x377befb5, 0xc091b01d, 0x376f7b7d, 0xc0935d64,
-    0x37630799, 0xc0950d1d, 0x3756940a, 0xc096bf48,
-    0x374a20d0, 0xc09873e4, 0x373daded, 0xc09a2af3,
-    0x37313b60, 0xc09be473, 0x3724c92a, 0xc09da065,
-    0x3718574b, 0xc09f5ec8, 0x370be5c4, 0xc0a11f9d,
-    0x36ff7496, 0xc0a2e2e3, 0x36f303c0, 0xc0a4a89b,
-    0x36e69344, 0xc0a670c4, 0x36da2321, 0xc0a83b5e,
-    0x36cdb359, 0xc0aa086a, 0x36c143ec, 0xc0abd7e6,
-    0x36b4d4d9, 0xc0ada9d4, 0x36a86623, 0xc0af7e33,
-    0x369bf7c9, 0xc0b15502, 0x368f89cb, 0xc0b32e42,
-    0x36831c2b, 0xc0b509f3, 0x3676aee8, 0xc0b6e815,
-    0x366a4203, 0xc0b8c8a7, 0x365dd57d, 0xc0baabaa,
-    0x36516956, 0xc0bc911d, 0x3644fd8f, 0xc0be7901,
-    0x36389228, 0xc0c06355, 0x362c2721, 0xc0c25019,
-    0x361fbc7b, 0xc0c43f4d, 0x36135237, 0xc0c630f2,
-    0x3606e854, 0xc0c82506, 0x35fa7ed4, 0xc0ca1b8a,
-    0x35ee15b7, 0xc0cc147f, 0x35e1acfd, 0xc0ce0fe3,
-    0x35d544a7, 0xc0d00db6, 0x35c8dcb6, 0xc0d20dfa,
-    0x35bc7529, 0xc0d410ad, 0x35b00e02, 0xc0d615cf,
-    0x35a3a740, 0xc0d81d61, 0x359740e5, 0xc0da2762,
-    0x358adaf0, 0xc0dc33d2, 0x357e7563, 0xc0de42b2,
-    0x3572103d, 0xc0e05401, 0x3565ab80, 0xc0e267be,
-    0x3559472b, 0xc0e47deb, 0x354ce33f, 0xc0e69686,
-    0x35407fbd, 0xc0e8b190, 0x35341ca5, 0xc0eacf09,
-    0x3527b9f7, 0xc0eceef1, 0x351b57b5, 0xc0ef1147,
-    0x350ef5de, 0xc0f1360b, 0x35029473, 0xc0f35d3e,
-    0x34f63374, 0xc0f586df, 0x34e9d2e3, 0xc0f7b2ee,
-    0x34dd72be, 0xc0f9e16b, 0x34d11308, 0xc0fc1257,
-    0x34c4b3c0, 0xc0fe45b0, 0x34b854e7, 0xc1007b77,
-    0x34abf67e, 0xc102b3ac, 0x349f9884, 0xc104ee4f,
-    0x34933afa, 0xc1072b5f, 0x3486dde1, 0xc1096add,
-    0x347a8139, 0xc10bacc8, 0x346e2504, 0xc10df120,
-    0x3461c940, 0xc11037e6, 0x34556def, 0xc1128119,
-    0x34491311, 0xc114ccb9, 0x343cb8a7, 0xc1171ac6,
-    0x34305eb0, 0xc1196b3f, 0x3424052f, 0xc11bbe26,
-    0x3417ac22, 0xc11e1379, 0x340b538b, 0xc1206b39,
-    0x33fefb6a, 0xc122c566, 0x33f2a3bf, 0xc12521ff,
-    0x33e64c8c, 0xc1278104, 0x33d9f5cf, 0xc129e276,
-    0x33cd9f8b, 0xc12c4653, 0x33c149bf, 0xc12eac9d,
-    0x33b4f46c, 0xc1311553, 0x33a89f92, 0xc1338075,
-    0x339c4b32, 0xc135ee02, 0x338ff74d, 0xc1385dfb,
-    0x3383a3e2, 0xc13ad060, 0x337750f2, 0xc13d4530,
-    0x336afe7e, 0xc13fbc6c, 0x335eac86, 0xc1423613,
-    0x33525b0b, 0xc144b225, 0x33460a0d, 0xc14730a3,
-    0x3339b98d, 0xc149b18b, 0x332d698a, 0xc14c34df,
-    0x33211a07, 0xc14eba9d, 0x3314cb02, 0xc15142c6,
-    0x33087c7d, 0xc153cd5a, 0x32fc2e77, 0xc1565a58,
-    0x32efe0f2, 0xc158e9c1, 0x32e393ef, 0xc15b7b94,
-    0x32d7476c, 0xc15e0fd1, 0x32cafb6b, 0xc160a678,
-    0x32beafed, 0xc1633f8a, 0x32b264f2, 0xc165db05,
-    0x32a61a7a, 0xc16878eb, 0x3299d085, 0xc16b193a,
-    0x328d8715, 0xc16dbbf3, 0x32813e2a, 0xc1706115,
-    0x3274f5c3, 0xc17308a1, 0x3268ade3, 0xc175b296,
-    0x325c6688, 0xc1785ef4, 0x32501fb5, 0xc17b0dbb,
-    0x3243d968, 0xc17dbeec, 0x323793a3, 0xc1807285,
-    0x322b4e66, 0xc1832888, 0x321f09b1, 0xc185e0f3,
-    0x3212c585, 0xc1889bc6, 0x320681e3, 0xc18b5903,
-    0x31fa3ecb, 0xc18e18a7, 0x31edfc3d, 0xc190dab4,
-    0x31e1ba3a, 0xc1939f29, 0x31d578c2, 0xc1966606,
-    0x31c937d6, 0xc1992f4c, 0x31bcf777, 0xc19bfaf9,
-    0x31b0b7a4, 0xc19ec90d, 0x31a4785e, 0xc1a1998a,
-    0x319839a6, 0xc1a46c6e, 0x318bfb7d, 0xc1a741b9,
-    0x317fbde2, 0xc1aa196c, 0x317380d6, 0xc1acf386,
-    0x31674459, 0xc1afd007, 0x315b086d, 0xc1b2aef0,
-    0x314ecd11, 0xc1b5903f, 0x31429247, 0xc1b873f5,
-    0x3136580d, 0xc1bb5a11, 0x312a1e66, 0xc1be4294,
-    0x311de551, 0xc1c12d7e, 0x3111accf, 0xc1c41ace,
-    0x310574e0, 0xc1c70a84, 0x30f93d86, 0xc1c9fca0,
-    0x30ed06bf, 0xc1ccf122, 0x30e0d08d, 0xc1cfe80a,
-    0x30d49af1, 0xc1d2e158, 0x30c865ea, 0xc1d5dd0c,
-    0x30bc317a, 0xc1d8db25, 0x30affda0, 0xc1dbdba3,
-    0x30a3ca5d, 0xc1dede87, 0x309797b2, 0xc1e1e3d0,
-    0x308b659f, 0xc1e4eb7e, 0x307f3424, 0xc1e7f591,
-    0x30730342, 0xc1eb0209, 0x3066d2fa, 0xc1ee10e5,
-    0x305aa34c, 0xc1f12227, 0x304e7438, 0xc1f435cc,
-    0x304245c0, 0xc1f74bd6, 0x303617e2, 0xc1fa6445,
-    0x3029eaa1, 0xc1fd7f17, 0x301dbdfb, 0xc2009c4e,
-    0x301191f3, 0xc203bbe8, 0x30056687, 0xc206dde6,
-    0x2ff93bba, 0xc20a0248, 0x2fed118a, 0xc20d290d,
-    0x2fe0e7f9, 0xc2105236, 0x2fd4bf08, 0xc2137dc2,
-    0x2fc896b5, 0xc216abb1, 0x2fbc6f03, 0xc219dc03,
-    0x2fb047f2, 0xc21d0eb8, 0x2fa42181, 0xc22043d0,
-    0x2f97fbb2, 0xc2237b4b, 0x2f8bd685, 0xc226b528,
-    0x2f7fb1fa, 0xc229f167, 0x2f738e12, 0xc22d3009,
-    0x2f676ace, 0xc230710d, 0x2f5b482d, 0xc233b473,
-    0x2f4f2630, 0xc236fa3b, 0x2f4304d8, 0xc23a4265,
-    0x2f36e426, 0xc23d8cf1, 0x2f2ac419, 0xc240d9de,
-    0x2f1ea4b2, 0xc244292c, 0x2f1285f2, 0xc2477adc,
-    0x2f0667d9, 0xc24aceed, 0x2efa4a67, 0xc24e255e,
-    0x2eee2d9d, 0xc2517e31, 0x2ee2117c, 0xc254d965,
-    0x2ed5f604, 0xc25836f9, 0x2ec9db35, 0xc25b96ee,
-    0x2ebdc110, 0xc25ef943, 0x2eb1a796, 0xc2625df8,
-    0x2ea58ec6, 0xc265c50e, 0x2e9976a1, 0xc2692e83,
-    0x2e8d5f29, 0xc26c9a58, 0x2e81485c, 0xc270088e,
-    0x2e75323c, 0xc2737922, 0x2e691cc9, 0xc276ec16,
-    0x2e5d0804, 0xc27a616a, 0x2e50f3ed, 0xc27dd91c,
-    0x2e44e084, 0xc281532e, 0x2e38cdcb, 0xc284cf9f,
-    0x2e2cbbc1, 0xc2884e6e, 0x2e20aa67, 0xc28bcf9c,
-    0x2e1499bd, 0xc28f5329, 0x2e0889c4, 0xc292d914,
-    0x2dfc7a7c, 0xc296615d, 0x2df06be6, 0xc299ec05,
-    0x2de45e03, 0xc29d790a, 0x2dd850d2, 0xc2a1086d,
-    0x2dcc4454, 0xc2a49a2e, 0x2dc0388a, 0xc2a82e4d,
-    0x2db42d74, 0xc2abc4c9, 0x2da82313, 0xc2af5da2,
-    0x2d9c1967, 0xc2b2f8d8, 0x2d901070, 0xc2b6966c,
-    0x2d84082f, 0xc2ba365c, 0x2d7800a5, 0xc2bdd8a9,
-    0x2d6bf9d1, 0xc2c17d52, 0x2d5ff3b5, 0xc2c52459,
-    0x2d53ee51, 0xc2c8cdbb, 0x2d47e9a5, 0xc2cc7979,
-    0x2d3be5b1, 0xc2d02794, 0x2d2fe277, 0xc2d3d80a,
-    0x2d23dff7, 0xc2d78add, 0x2d17de31, 0xc2db400a,
-    0x2d0bdd25, 0xc2def794, 0x2cffdcd4, 0xc2e2b178,
-    0x2cf3dd3f, 0xc2e66db8, 0x2ce7de66, 0xc2ea2c53,
-    0x2cdbe04a, 0xc2eded49, 0x2ccfe2ea, 0xc2f1b099,
-    0x2cc3e648, 0xc2f57644, 0x2cb7ea63, 0xc2f93e4a,
-    0x2cabef3d, 0xc2fd08a9, 0x2c9ff4d6, 0xc300d563,
-    0x2c93fb2e, 0xc304a477, 0x2c880245, 0xc30875e5,
-    0x2c7c0a1d, 0xc30c49ad, 0x2c7012b5, 0xc3101fce,
-    0x2c641c0e, 0xc313f848, 0x2c582629, 0xc317d31c,
-    0x2c4c3106, 0xc31bb049, 0x2c403ca5, 0xc31f8fcf,
-    0x2c344908, 0xc32371ae, 0x2c28562d, 0xc32755e5,
-    0x2c1c6417, 0xc32b3c75, 0x2c1072c4, 0xc32f255e,
-    0x2c048237, 0xc333109e, 0x2bf8926f, 0xc336fe37,
-    0x2beca36c, 0xc33aee27, 0x2be0b52f, 0xc33ee070,
-    0x2bd4c7ba, 0xc342d510, 0x2bc8db0b, 0xc346cc07,
-    0x2bbcef23, 0xc34ac556, 0x2bb10404, 0xc34ec0fc,
-    0x2ba519ad, 0xc352bef9, 0x2b99301f, 0xc356bf4d,
-    0x2b8d475b, 0xc35ac1f7, 0x2b815f60, 0xc35ec6f8,
-    0x2b75782f, 0xc362ce50, 0x2b6991ca, 0xc366d7fd,
-    0x2b5dac2f, 0xc36ae401, 0x2b51c760, 0xc36ef25b,
-    0x2b45e35d, 0xc373030a, 0x2b3a0027, 0xc377160f,
-    0x2b2e1dbe, 0xc37b2b6a, 0x2b223c22, 0xc37f4319,
-    0x2b165b54, 0xc3835d1e, 0x2b0a7b54, 0xc3877978,
-    0x2afe9c24, 0xc38b9827, 0x2af2bdc3, 0xc38fb92a,
-    0x2ae6e031, 0xc393dc82, 0x2adb0370, 0xc398022f,
-    0x2acf277f, 0xc39c2a2f, 0x2ac34c60, 0xc3a05484,
-    0x2ab77212, 0xc3a4812c, 0x2aab9896, 0xc3a8b028,
-    0x2a9fbfed, 0xc3ace178, 0x2a93e817, 0xc3b1151b,
-    0x2a881114, 0xc3b54b11, 0x2a7c3ae5, 0xc3b9835a,
-    0x2a70658a, 0xc3bdbdf6, 0x2a649105, 0xc3c1fae5,
-    0x2a58bd54, 0xc3c63a26, 0x2a4cea79, 0xc3ca7bba,
-    0x2a411874, 0xc3cebfa0, 0x2a354746, 0xc3d305d8,
-    0x2a2976ef, 0xc3d74e62, 0x2a1da770, 0xc3db993e,
-    0x2a11d8c8, 0xc3dfe66c, 0x2a060af9, 0xc3e435ea,
-    0x29fa3e03, 0xc3e887bb, 0x29ee71e6, 0xc3ecdbdc,
-    0x29e2a6a3, 0xc3f1324e, 0x29d6dc3b, 0xc3f58b10,
-    0x29cb12ad, 0xc3f9e624, 0x29bf49fa, 0xc3fe4388,
-    0x29b38223, 0xc402a33c, 0x29a7bb28, 0xc4070540,
-    0x299bf509, 0xc40b6994, 0x29902fc7, 0xc40fd037,
-    0x29846b63, 0xc414392b, 0x2978a7dd, 0xc418a46d,
-    0x296ce535, 0xc41d11ff, 0x2961236c, 0xc42181e0,
-    0x29556282, 0xc425f410, 0x2949a278, 0xc42a688f,
-    0x293de34e, 0xc42edf5c, 0x29322505, 0xc4335877,
-    0x2926679c, 0xc437d3e1, 0x291aab16, 0xc43c5199,
-    0x290eef71, 0xc440d19e, 0x290334af, 0xc44553f2,
-    0x28f77acf, 0xc449d892, 0x28ebc1d3, 0xc44e5f80,
-    0x28e009ba, 0xc452e8bc, 0x28d45286, 0xc4577444,
-    0x28c89c37, 0xc45c0219, 0x28bce6cd, 0xc460923b,
-    0x28b13248, 0xc46524a9, 0x28a57ea9, 0xc469b963,
-    0x2899cbf1, 0xc46e5069, 0x288e1a20, 0xc472e9bc,
-    0x28826936, 0xc477855a, 0x2876b934, 0xc47c2344,
-    0x286b0a1a, 0xc480c379, 0x285f5be9, 0xc48565f9,
-    0x2853aea1, 0xc48a0ac4, 0x28480243, 0xc48eb1db,
-    0x283c56cf, 0xc4935b3c, 0x2830ac45, 0xc49806e7,
-    0x282502a7, 0xc49cb4dd, 0x281959f4, 0xc4a1651c,
-    0x280db22d, 0xc4a617a6, 0x28020b52, 0xc4aacc7a,
-    0x27f66564, 0xc4af8397, 0x27eac063, 0xc4b43cfd,
-    0x27df1c50, 0xc4b8f8ad, 0x27d3792b, 0xc4bdb6a6,
-    0x27c7d6f4, 0xc4c276e8, 0x27bc35ad, 0xc4c73972,
-    0x27b09555, 0xc4cbfe45, 0x27a4f5ed, 0xc4d0c560,
-    0x27995776, 0xc4d58ec3, 0x278db9ef, 0xc4da5a6f,
-    0x27821d59, 0xc4df2862, 0x277681b6, 0xc4e3f89c,
-    0x276ae704, 0xc4e8cb1e, 0x275f4d45, 0xc4ed9fe7,
-    0x2753b479, 0xc4f276f7, 0x27481ca1, 0xc4f7504e,
-    0x273c85bc, 0xc4fc2bec, 0x2730efcc, 0xc50109d0,
-    0x27255ad1, 0xc505e9fb, 0x2719c6cb, 0xc50acc6b,
-    0x270e33bb, 0xc50fb121, 0x2702a1a1, 0xc514981d,
-    0x26f7107e, 0xc519815f, 0x26eb8052, 0xc51e6ce6,
-    0x26dff11d, 0xc5235ab2, 0x26d462e1, 0xc5284ac3,
-    0x26c8d59c, 0xc52d3d18, 0x26bd4951, 0xc53231b3,
-    0x26b1bdff, 0xc5372891, 0x26a633a6, 0xc53c21b4,
-    0x269aaa48, 0xc5411d1b, 0x268f21e5, 0xc5461ac6,
-    0x26839a7c, 0xc54b1ab4, 0x26781410, 0xc5501ce5,
-    0x266c8e9f, 0xc555215a, 0x26610a2a, 0xc55a2812,
-    0x265586b3, 0xc55f310d, 0x264a0438, 0xc5643c4a,
-    0x263e82bc, 0xc56949ca, 0x2633023e, 0xc56e598c,
-    0x262782be, 0xc5736b90, 0x261c043d, 0xc5787fd6,
-    0x261086bc, 0xc57d965d, 0x26050a3b, 0xc582af26,
-    0x25f98ebb, 0xc587ca31, 0x25ee143b, 0xc58ce77c,
-    0x25e29abc, 0xc5920708, 0x25d72240, 0xc59728d5,
-    0x25cbaac5, 0xc59c4ce3, 0x25c0344d, 0xc5a17330,
-    0x25b4bed8, 0xc5a69bbe, 0x25a94a67, 0xc5abc68c,
-    0x259dd6f9, 0xc5b0f399, 0x25926490, 0xc5b622e6,
-    0x2586f32c, 0xc5bb5472, 0x257b82cd, 0xc5c0883d,
-    0x25701374, 0xc5c5be47, 0x2564a521, 0xc5caf690,
-    0x255937d5, 0xc5d03118, 0x254dcb8f, 0xc5d56ddd,
-    0x25426051, 0xc5daace1, 0x2536f61b, 0xc5dfee22,
-    0x252b8cee, 0xc5e531a1, 0x252024c9, 0xc5ea775e,
-    0x2514bdad, 0xc5efbf58, 0x2509579b, 0xc5f5098f,
-    0x24fdf294, 0xc5fa5603, 0x24f28e96, 0xc5ffa4b3,
-    0x24e72ba4, 0xc604f5a0, 0x24dbc9bd, 0xc60a48c9,
-    0x24d068e2, 0xc60f9e2e, 0x24c50914, 0xc614f5cf,
-    0x24b9aa52, 0xc61a4fac, 0x24ae4c9d, 0xc61fabc4,
-    0x24a2eff6, 0xc6250a18, 0x2497945d, 0xc62a6aa6,
-    0x248c39d3, 0xc62fcd6f, 0x2480e057, 0xc6353273,
-    0x247587eb, 0xc63a99b1, 0x246a308f, 0xc6400329,
-    0x245eda43, 0xc6456edb, 0x24538507, 0xc64adcc7,
-    0x244830dd, 0xc6504ced, 0x243cddc4, 0xc655bf4c,
-    0x24318bbe, 0xc65b33e4, 0x24263ac9, 0xc660aab5,
-    0x241aeae8, 0xc66623be, 0x240f9c1a, 0xc66b9f01,
-    0x24044e60, 0xc6711c7b, 0x23f901ba, 0xc6769c2e,
-    0x23edb628, 0xc67c1e18, 0x23e26bac, 0xc681a23a,
-    0x23d72245, 0xc6872894, 0x23cbd9f4, 0xc68cb124,
-    0x23c092b9, 0xc6923bec, 0x23b54c95, 0xc697c8eb,
-    0x23aa0788, 0xc69d5820, 0x239ec393, 0xc6a2e98b,
-    0x239380b6, 0xc6a87d2d, 0x23883ef2, 0xc6ae1304,
-    0x237cfe47, 0xc6b3ab12, 0x2371beb5, 0xc6b94554,
-    0x2366803c, 0xc6bee1cd, 0x235b42df, 0xc6c4807a,
-    0x2350069b, 0xc6ca215c, 0x2344cb73, 0xc6cfc472,
-    0x23399167, 0xc6d569be, 0x232e5876, 0xc6db113d,
-    0x232320a2, 0xc6e0baf0, 0x2317e9eb, 0xc6e666d7,
-    0x230cb451, 0xc6ec14f2, 0x23017fd5, 0xc6f1c540,
-    0x22f64c77, 0xc6f777c1, 0x22eb1a37, 0xc6fd2c75,
-    0x22dfe917, 0xc702e35c, 0x22d4b916, 0xc7089c75,
-    0x22c98a35, 0xc70e57c0, 0x22be5c74, 0xc714153e,
-    0x22b32fd4, 0xc719d4ed, 0x22a80456, 0xc71f96ce,
-    0x229cd9f8, 0xc7255ae0, 0x2291b0bd, 0xc72b2123,
-    0x228688a4, 0xc730e997, 0x227b61af, 0xc736b43c,
-    0x22703bdc, 0xc73c8111, 0x2265172e, 0xc7425016,
-    0x2259f3a3, 0xc748214c, 0x224ed13d, 0xc74df4b1,
-    0x2243affc, 0xc753ca46, 0x22388fe1, 0xc759a20a,
-    0x222d70eb, 0xc75f7bfe, 0x2222531c, 0xc7655820,
-    0x22173674, 0xc76b3671, 0x220c1af3, 0xc77116f0,
-    0x22010099, 0xc776f99d, 0x21f5e768, 0xc77cde79,
-    0x21eacf5f, 0xc782c582, 0x21dfb87f, 0xc788aeb9,
-    0x21d4a2c8, 0xc78e9a1d, 0x21c98e3b, 0xc79487ae,
-    0x21be7ad8, 0xc79a776c, 0x21b368a0, 0xc7a06957,
-    0x21a85793, 0xc7a65d6e, 0x219d47b1, 0xc7ac53b1,
-    0x219238fb, 0xc7b24c20, 0x21872b72, 0xc7b846ba,
-    0x217c1f15, 0xc7be4381, 0x217113e5, 0xc7c44272,
-    0x216609e3, 0xc7ca438f, 0x215b0110, 0xc7d046d6,
-    0x214ff96a, 0xc7d64c47, 0x2144f2f3, 0xc7dc53e3,
-    0x2139edac, 0xc7e25daa, 0x212ee995, 0xc7e8699a,
-    0x2123e6ad, 0xc7ee77b3, 0x2118e4f6, 0xc7f487f6,
-    0x210de470, 0xc7fa9a62, 0x2102e51c, 0xc800aef7,
-    0x20f7e6f9, 0xc806c5b5, 0x20ecea09, 0xc80cde9b,
-    0x20e1ee4b, 0xc812f9a9, 0x20d6f3c1, 0xc81916df,
-    0x20cbfa6a, 0xc81f363d, 0x20c10247, 0xc82557c3,
-    0x20b60b58, 0xc82b7b70, 0x20ab159e, 0xc831a143,
-    0x20a0211a, 0xc837c93e, 0x20952dcb, 0xc83df35f,
-    0x208a3bb2, 0xc8441fa6, 0x207f4acf, 0xc84a4e14,
-    0x20745b24, 0xc8507ea7, 0x20696cb0, 0xc856b160,
-    0x205e7f74, 0xc85ce63e, 0x2053936f, 0xc8631d42,
-    0x2048a8a4, 0xc869566a, 0x203dbf11, 0xc86f91b7,
-    0x2032d6b8, 0xc875cf28, 0x2027ef99, 0xc87c0ebd,
-    0x201d09b4, 0xc8825077, 0x2012250a, 0xc8889454,
-    0x2007419b, 0xc88eda54, 0x1ffc5f67, 0xc8952278,
-    0x1ff17e70, 0xc89b6cbf, 0x1fe69eb4, 0xc8a1b928,
-    0x1fdbc036, 0xc8a807b4, 0x1fd0e2f5, 0xc8ae5862,
-    0x1fc606f1, 0xc8b4ab32, 0x1fbb2c2c, 0xc8bb0023,
-    0x1fb052a5, 0xc8c15736, 0x1fa57a5d, 0xc8c7b06b,
-    0x1f9aa354, 0xc8ce0bc0, 0x1f8fcd8b, 0xc8d46936,
-    0x1f84f902, 0xc8dac8cd, 0x1f7a25ba, 0xc8e12a84,
-    0x1f6f53b3, 0xc8e78e5b, 0x1f6482ed, 0xc8edf452,
-    0x1f59b369, 0xc8f45c68, 0x1f4ee527, 0xc8fac69e,
-    0x1f441828, 0xc90132f2, 0x1f394c6b, 0xc907a166,
-    0x1f2e81f3, 0xc90e11f7, 0x1f23b8be, 0xc91484a8,
-    0x1f18f0ce, 0xc91af976, 0x1f0e2a22, 0xc9217062,
-    0x1f0364bc, 0xc927e96b, 0x1ef8a09b, 0xc92e6492,
-    0x1eedddc0, 0xc934e1d6, 0x1ee31c2b, 0xc93b6137,
-    0x1ed85bdd, 0xc941e2b4, 0x1ecd9cd7, 0xc948664d,
-    0x1ec2df18, 0xc94eec03, 0x1eb822a1, 0xc95573d4,
-    0x1ead6773, 0xc95bfdc1, 0x1ea2ad8d, 0xc96289c9,
-    0x1e97f4f1, 0xc96917ec, 0x1e8d3d9e, 0xc96fa82a,
-    0x1e828796, 0xc9763a83, 0x1e77d2d8, 0xc97ccef5,
-    0x1e6d1f65, 0xc9836582, 0x1e626d3e, 0xc989fe29,
-    0x1e57bc62, 0xc99098e9, 0x1e4d0cd2, 0xc99735c2,
-    0x1e425e8f, 0xc99dd4b4, 0x1e37b199, 0xc9a475bf,
-    0x1e2d05f1, 0xc9ab18e3, 0x1e225b96, 0xc9b1be1e,
-    0x1e17b28a, 0xc9b86572, 0x1e0d0acc, 0xc9bf0edd,
-    0x1e02645d, 0xc9c5ba60, 0x1df7bf3e, 0xc9cc67fa,
-    0x1ded1b6e, 0xc9d317ab, 0x1de278ef, 0xc9d9c973,
-    0x1dd7d7c1, 0xc9e07d51, 0x1dcd37e4, 0xc9e73346,
-    0x1dc29958, 0xc9edeb50, 0x1db7fc1e, 0xc9f4a570,
-    0x1dad6036, 0xc9fb61a5, 0x1da2c5a2, 0xca021fef,
-    0x1d982c60, 0xca08e04f, 0x1d8d9472, 0xca0fa2c3,
-    0x1d82fdd8, 0xca16674b, 0x1d786892, 0xca1d2de7,
-    0x1d6dd4a2, 0xca23f698, 0x1d634206, 0xca2ac15b,
-    0x1d58b0c0, 0xca318e32, 0x1d4e20d0, 0xca385d1d,
-    0x1d439236, 0xca3f2e19, 0x1d3904f4, 0xca460129,
-    0x1d2e7908, 0xca4cd64b, 0x1d23ee74, 0xca53ad7e,
-    0x1d196538, 0xca5a86c4, 0x1d0edd55, 0xca61621b,
-    0x1d0456ca, 0xca683f83, 0x1cf9d199, 0xca6f1efc,
-    0x1cef4dc2, 0xca760086, 0x1ce4cb44, 0xca7ce420,
-    0x1cda4a21, 0xca83c9ca, 0x1ccfca59, 0xca8ab184,
-    0x1cc54bec, 0xca919b4e, 0x1cbacedb, 0xca988727,
-    0x1cb05326, 0xca9f750f, 0x1ca5d8cd, 0xcaa66506,
-    0x1c9b5fd2, 0xcaad570c, 0x1c90e834, 0xcab44b1f,
-    0x1c8671f3, 0xcabb4141, 0x1c7bfd11, 0xcac23971,
-    0x1c71898d, 0xcac933ae, 0x1c671768, 0xcad02ff8,
-    0x1c5ca6a2, 0xcad72e4f, 0x1c52373c, 0xcade2eb3,
-    0x1c47c936, 0xcae53123, 0x1c3d5c91, 0xcaec35a0,
-    0x1c32f14d, 0xcaf33c28, 0x1c28876a, 0xcafa44bc,
-    0x1c1e1ee9, 0xcb014f5b, 0x1c13b7c9, 0xcb085c05,
-    0x1c09520d, 0xcb0f6aba, 0x1bfeedb3, 0xcb167b79,
-    0x1bf48abd, 0xcb1d8e43, 0x1bea292b, 0xcb24a316,
-    0x1bdfc8fc, 0xcb2bb9f4, 0x1bd56a32, 0xcb32d2da,
-    0x1bcb0cce, 0xcb39edca, 0x1bc0b0ce, 0xcb410ac3,
-    0x1bb65634, 0xcb4829c4, 0x1babfd01, 0xcb4f4acd,
-    0x1ba1a534, 0xcb566ddf, 0x1b974ece, 0xcb5d92f8,
-    0x1b8cf9cf, 0xcb64ba19, 0x1b82a638, 0xcb6be341,
-    0x1b785409, 0xcb730e70, 0x1b6e0342, 0xcb7a3ba5,
-    0x1b63b3e5, 0xcb816ae1, 0x1b5965f1, 0xcb889c23,
-    0x1b4f1967, 0xcb8fcf6b, 0x1b44ce46, 0xcb9704b9,
-    0x1b3a8491, 0xcb9e3c0b, 0x1b303c46, 0xcba57563,
-    0x1b25f566, 0xcbacb0bf, 0x1b1baff2, 0xcbb3ee20,
-    0x1b116beb, 0xcbbb2d85, 0x1b072950, 0xcbc26eee,
-    0x1afce821, 0xcbc9b25a, 0x1af2a860, 0xcbd0f7ca,
-    0x1ae86a0d, 0xcbd83f3d, 0x1ade2d28, 0xcbdf88b3,
-    0x1ad3f1b1, 0xcbe6d42b, 0x1ac9b7a9, 0xcbee21a5,
-    0x1abf7f11, 0xcbf57121, 0x1ab547e8, 0xcbfcc29f,
-    0x1aab122f, 0xcc04161e, 0x1aa0dde7, 0xcc0b6b9e,
-    0x1a96ab0f, 0xcc12c31f, 0x1a8c79a9, 0xcc1a1ca0,
-    0x1a8249b4, 0xcc217822, 0x1a781b31, 0xcc28d5a3,
-    0x1a6dee21, 0xcc303524, 0x1a63c284, 0xcc3796a5,
-    0x1a599859, 0xcc3efa25, 0x1a4f6fa3, 0xcc465fa3,
-    0x1a454860, 0xcc4dc720, 0x1a3b2292, 0xcc55309b,
-    0x1a30fe38, 0xcc5c9c14, 0x1a26db54, 0xcc64098b,
-    0x1a1cb9e5, 0xcc6b78ff, 0x1a1299ec, 0xcc72ea70,
-    0x1a087b69, 0xcc7a5dde, 0x19fe5e5e, 0xcc81d349,
-    0x19f442c9, 0xcc894aaf, 0x19ea28ac, 0xcc90c412,
-    0x19e01006, 0xcc983f70, 0x19d5f8d9, 0xcc9fbcca,
-    0x19cbe325, 0xcca73c1e, 0x19c1cee9, 0xccaebd6e,
-    0x19b7bc27, 0xccb640b8, 0x19adaadf, 0xccbdc5fc,
-    0x19a39b11, 0xccc54d3a, 0x19998cbe, 0xccccd671,
-    0x198f7fe6, 0xccd461a2, 0x19857489, 0xccdbeecc,
-    0x197b6aa8, 0xcce37def, 0x19716243, 0xcceb0f0a,
-    0x19675b5a, 0xccf2a21d, 0x195d55ef, 0xccfa3729,
-    0x19535201, 0xcd01ce2b, 0x19494f90, 0xcd096725,
-    0x193f4e9e, 0xcd110216, 0x19354f2a, 0xcd189efe,
-    0x192b5135, 0xcd203ddc, 0x192154bf, 0xcd27deb0,
-    0x191759c9, 0xcd2f817b, 0x190d6053, 0xcd37263a,
-    0x1903685d, 0xcd3eccef, 0x18f971e8, 0xcd467599,
-    0x18ef7cf4, 0xcd4e2037, 0x18e58982, 0xcd55ccca,
-    0x18db9792, 0xcd5d7b50, 0x18d1a724, 0xcd652bcb,
-    0x18c7b838, 0xcd6cde39, 0x18bdcad0, 0xcd74929a,
-    0x18b3deeb, 0xcd7c48ee, 0x18a9f48a, 0xcd840134,
-    0x18a00bae, 0xcd8bbb6d, 0x18962456, 0xcd937798,
-    0x188c3e83, 0xcd9b35b4, 0x18825a35, 0xcda2f5c2,
-    0x1878776d, 0xcdaab7c0, 0x186e962b, 0xcdb27bb0,
-    0x1864b670, 0xcdba4190, 0x185ad83c, 0xcdc20960,
-    0x1850fb8e, 0xcdc9d320, 0x18472069, 0xcdd19ed0,
-    0x183d46cc, 0xcdd96c6f, 0x18336eb7, 0xcde13bfd,
-    0x1829982b, 0xcde90d79, 0x181fc328, 0xcdf0e0e4,
-    0x1815efae, 0xcdf8b63d, 0x180c1dbf, 0xce008d84,
-    0x18024d59, 0xce0866b8, 0x17f87e7f, 0xce1041d9,
-    0x17eeb130, 0xce181ee8, 0x17e4e56c, 0xce1ffde2,
-    0x17db1b34, 0xce27dec9, 0x17d15288, 0xce2fc19c,
-    0x17c78b68, 0xce37a65b, 0x17bdc5d6, 0xce3f8d05,
-    0x17b401d1, 0xce47759a, 0x17aa3f5a, 0xce4f6019,
-    0x17a07e70, 0xce574c84, 0x1796bf16, 0xce5f3ad8,
-    0x178d014a, 0xce672b16, 0x1783450d, 0xce6f1d3d,
-    0x17798a60, 0xce77114e, 0x176fd143, 0xce7f0748,
-    0x176619b6, 0xce86ff2a, 0x175c63ba, 0xce8ef8f4,
-    0x1752af4f, 0xce96f4a7, 0x1748fc75, 0xce9ef241,
-    0x173f4b2e, 0xcea6f1c2, 0x17359b78, 0xceaef32b,
-    0x172bed55, 0xceb6f67a, 0x172240c5, 0xcebefbb0,
-    0x171895c9, 0xcec702cb, 0x170eec60, 0xcecf0bcd,
-    0x1705448b, 0xced716b4, 0x16fb9e4b, 0xcedf2380,
-    0x16f1f99f, 0xcee73231, 0x16e85689, 0xceef42c7,
-    0x16deb508, 0xcef75541, 0x16d5151d, 0xceff699f,
-    0x16cb76c9, 0xcf077fe1, 0x16c1da0b, 0xcf0f9805,
-    0x16b83ee4, 0xcf17b20d, 0x16aea555, 0xcf1fcdf8,
-    0x16a50d5d, 0xcf27ebc5, 0x169b76fe, 0xcf300b74,
-    0x1691e237, 0xcf382d05, 0x16884f09, 0xcf405077,
-    0x167ebd74, 0xcf4875ca, 0x16752d79, 0xcf509cfe,
-    0x166b9f18, 0xcf58c613, 0x16621251, 0xcf60f108,
-    0x16588725, 0xcf691ddd, 0x164efd94, 0xcf714c91,
-    0x1645759f, 0xcf797d24, 0x163bef46, 0xcf81af97,
-    0x16326a88, 0xcf89e3e8, 0x1628e767, 0xcf921a17,
-    0x161f65e4, 0xcf9a5225, 0x1615e5fd, 0xcfa28c10,
-    0x160c67b4, 0xcfaac7d8, 0x1602eb0a, 0xcfb3057d,
-    0x15f96ffd, 0xcfbb4500, 0x15eff690, 0xcfc3865e,
-    0x15e67ec1, 0xcfcbc999, 0x15dd0892, 0xcfd40eaf,
-    0x15d39403, 0xcfdc55a1, 0x15ca2115, 0xcfe49e6d,
-    0x15c0afc6, 0xcfece915, 0x15b74019, 0xcff53597,
-    0x15add20d, 0xcffd83f4, 0x15a465a3, 0xd005d42a,
-    0x159afadb, 0xd00e2639, 0x159191b5, 0xd0167a22,
-    0x15882a32, 0xd01ecfe4, 0x157ec452, 0xd027277e,
-    0x15756016, 0xd02f80f1, 0x156bfd7d, 0xd037dc3b,
-    0x15629c89, 0xd040395d, 0x15593d3a, 0xd0489856,
-    0x154fdf8f, 0xd050f926, 0x15468389, 0xd0595bcd,
-    0x153d292a, 0xd061c04a, 0x1533d070, 0xd06a269d,
-    0x152a795d, 0xd0728ec6, 0x152123f0, 0xd07af8c4,
-    0x1517d02b, 0xd0836497, 0x150e7e0d, 0xd08bd23f,
-    0x15052d97, 0xd09441bb, 0x14fbdec9, 0xd09cb30b,
-    0x14f291a4, 0xd0a5262f, 0x14e94627, 0xd0ad9b26,
-    0x14dffc54, 0xd0b611f1, 0x14d6b42b, 0xd0be8a8d,
-    0x14cd6dab, 0xd0c704fd, 0x14c428d6, 0xd0cf813e,
-    0x14bae5ab, 0xd0d7ff51, 0x14b1a42c, 0xd0e07f36,
-    0x14a86458, 0xd0e900ec, 0x149f2630, 0xd0f18472,
-    0x1495e9b3, 0xd0fa09c9, 0x148caee4, 0xd10290f0,
-    0x148375c1, 0xd10b19e7, 0x147a3e4b, 0xd113a4ad,
-    0x14710883, 0xd11c3142, 0x1467d469, 0xd124bfa6,
-    0x145ea1fd, 0xd12d4fd9, 0x14557140, 0xd135e1d9,
-    0x144c4232, 0xd13e75a8, 0x144314d3, 0xd1470b44,
-    0x1439e923, 0xd14fa2ad, 0x1430bf24, 0xd1583be2,
-    0x142796d5, 0xd160d6e5, 0x141e7037, 0xd16973b3,
-    0x14154b4a, 0xd172124d, 0x140c280e, 0xd17ab2b3,
-    0x14030684, 0xd18354e4, 0x13f9e6ad, 0xd18bf8e0,
-    0x13f0c887, 0xd1949ea6, 0x13e7ac15, 0xd19d4636,
-    0x13de9156, 0xd1a5ef90, 0x13d5784a, 0xd1ae9ab4,
-    0x13cc60f2, 0xd1b747a0, 0x13c34b4f, 0xd1bff656,
-    0x13ba3760, 0xd1c8a6d4, 0x13b12526, 0xd1d1591a,
-    0x13a814a2, 0xd1da0d28, 0x139f05d3, 0xd1e2c2fd,
-    0x1395f8ba, 0xd1eb7a9a, 0x138ced57, 0xd1f433fd,
-    0x1383e3ab, 0xd1fcef27, 0x137adbb6, 0xd205ac17,
-    0x1371d579, 0xd20e6acc, 0x1368d0f3, 0xd2172b48,
-    0x135fce26, 0xd21fed88, 0x1356cd11, 0xd228b18d,
-    0x134dcdb4, 0xd2317756, 0x1344d011, 0xd23a3ee4,
-    0x133bd427, 0xd2430835, 0x1332d9f7, 0xd24bd34a,
-    0x1329e181, 0xd254a021, 0x1320eac6, 0xd25d6ebc,
-    0x1317f5c6, 0xd2663f19, 0x130f0280, 0xd26f1138,
-    0x130610f7, 0xd277e518, 0x12fd2129, 0xd280babb,
-    0x12f43318, 0xd289921e, 0x12eb46c3, 0xd2926b41,
-    0x12e25c2b, 0xd29b4626, 0x12d97350, 0xd2a422ca,
-    0x12d08c33, 0xd2ad012e, 0x12c7a6d4, 0xd2b5e151,
-    0x12bec333, 0xd2bec333, 0x12b5e151, 0xd2c7a6d4,
-    0x12ad012e, 0xd2d08c33, 0x12a422ca, 0xd2d97350,
-    0x129b4626, 0xd2e25c2b, 0x12926b41, 0xd2eb46c3,
-    0x1289921e, 0xd2f43318, 0x1280babb, 0xd2fd2129,
-    0x1277e518, 0xd30610f7, 0x126f1138, 0xd30f0280,
-    0x12663f19, 0xd317f5c6, 0x125d6ebc, 0xd320eac6,
-    0x1254a021, 0xd329e181, 0x124bd34a, 0xd332d9f7,
-    0x12430835, 0xd33bd427, 0x123a3ee4, 0xd344d011,
-    0x12317756, 0xd34dcdb4, 0x1228b18d, 0xd356cd11,
-    0x121fed88, 0xd35fce26, 0x12172b48, 0xd368d0f3,
-    0x120e6acc, 0xd371d579, 0x1205ac17, 0xd37adbb6,
-    0x11fcef27, 0xd383e3ab, 0x11f433fd, 0xd38ced57,
-    0x11eb7a9a, 0xd395f8ba, 0x11e2c2fd, 0xd39f05d3,
-    0x11da0d28, 0xd3a814a2, 0x11d1591a, 0xd3b12526,
-    0x11c8a6d4, 0xd3ba3760, 0x11bff656, 0xd3c34b4f,
-    0x11b747a0, 0xd3cc60f2, 0x11ae9ab4, 0xd3d5784a,
-    0x11a5ef90, 0xd3de9156, 0x119d4636, 0xd3e7ac15,
-    0x11949ea6, 0xd3f0c887, 0x118bf8e0, 0xd3f9e6ad,
-    0x118354e4, 0xd4030684, 0x117ab2b3, 0xd40c280e,
-    0x1172124d, 0xd4154b4a, 0x116973b3, 0xd41e7037,
-    0x1160d6e5, 0xd42796d5, 0x11583be2, 0xd430bf24,
-    0x114fa2ad, 0xd439e923, 0x11470b44, 0xd44314d3,
-    0x113e75a8, 0xd44c4232, 0x1135e1d9, 0xd4557140,
-    0x112d4fd9, 0xd45ea1fd, 0x1124bfa6, 0xd467d469,
-    0x111c3142, 0xd4710883, 0x1113a4ad, 0xd47a3e4b,
-    0x110b19e7, 0xd48375c1, 0x110290f0, 0xd48caee4,
-    0x10fa09c9, 0xd495e9b3, 0x10f18472, 0xd49f2630,
-    0x10e900ec, 0xd4a86458, 0x10e07f36, 0xd4b1a42c,
-    0x10d7ff51, 0xd4bae5ab, 0x10cf813e, 0xd4c428d6,
-    0x10c704fd, 0xd4cd6dab, 0x10be8a8d, 0xd4d6b42b,
-    0x10b611f1, 0xd4dffc54, 0x10ad9b26, 0xd4e94627,
-    0x10a5262f, 0xd4f291a4, 0x109cb30b, 0xd4fbdec9,
-    0x109441bb, 0xd5052d97, 0x108bd23f, 0xd50e7e0d,
-    0x10836497, 0xd517d02b, 0x107af8c4, 0xd52123f0,
-    0x10728ec6, 0xd52a795d, 0x106a269d, 0xd533d070,
-    0x1061c04a, 0xd53d292a, 0x10595bcd, 0xd5468389,
-    0x1050f926, 0xd54fdf8f, 0x10489856, 0xd5593d3a,
-    0x1040395d, 0xd5629c89, 0x1037dc3b, 0xd56bfd7d,
-    0x102f80f1, 0xd5756016, 0x1027277e, 0xd57ec452,
-    0x101ecfe4, 0xd5882a32, 0x10167a22, 0xd59191b5,
-    0x100e2639, 0xd59afadb, 0x1005d42a, 0xd5a465a3,
-    0xffd83f4, 0xd5add20d, 0xff53597, 0xd5b74019,
-    0xfece915, 0xd5c0afc6, 0xfe49e6d, 0xd5ca2115,
-    0xfdc55a1, 0xd5d39403, 0xfd40eaf, 0xd5dd0892,
-    0xfcbc999, 0xd5e67ec1, 0xfc3865e, 0xd5eff690,
-    0xfbb4500, 0xd5f96ffd, 0xfb3057d, 0xd602eb0a,
-    0xfaac7d8, 0xd60c67b4, 0xfa28c10, 0xd615e5fd,
-    0xf9a5225, 0xd61f65e4, 0xf921a17, 0xd628e767,
-    0xf89e3e8, 0xd6326a88, 0xf81af97, 0xd63bef46,
-    0xf797d24, 0xd645759f, 0xf714c91, 0xd64efd94,
-    0xf691ddd, 0xd6588725, 0xf60f108, 0xd6621251,
-    0xf58c613, 0xd66b9f18, 0xf509cfe, 0xd6752d79,
-    0xf4875ca, 0xd67ebd74, 0xf405077, 0xd6884f09,
-    0xf382d05, 0xd691e237, 0xf300b74, 0xd69b76fe,
-    0xf27ebc5, 0xd6a50d5d, 0xf1fcdf8, 0xd6aea555,
-    0xf17b20d, 0xd6b83ee4, 0xf0f9805, 0xd6c1da0b,
-    0xf077fe1, 0xd6cb76c9, 0xeff699f, 0xd6d5151d,
-    0xef75541, 0xd6deb508, 0xeef42c7, 0xd6e85689,
-    0xee73231, 0xd6f1f99f, 0xedf2380, 0xd6fb9e4b,
-    0xed716b4, 0xd705448b, 0xecf0bcd, 0xd70eec60,
-    0xec702cb, 0xd71895c9, 0xebefbb0, 0xd72240c5,
-    0xeb6f67a, 0xd72bed55, 0xeaef32b, 0xd7359b78,
-    0xea6f1c2, 0xd73f4b2e, 0xe9ef241, 0xd748fc75,
-    0xe96f4a7, 0xd752af4f, 0xe8ef8f4, 0xd75c63ba,
-    0xe86ff2a, 0xd76619b6, 0xe7f0748, 0xd76fd143,
-    0xe77114e, 0xd7798a60, 0xe6f1d3d, 0xd783450d,
-    0xe672b16, 0xd78d014a, 0xe5f3ad8, 0xd796bf16,
-    0xe574c84, 0xd7a07e70, 0xe4f6019, 0xd7aa3f5a,
-    0xe47759a, 0xd7b401d1, 0xe3f8d05, 0xd7bdc5d6,
-    0xe37a65b, 0xd7c78b68, 0xe2fc19c, 0xd7d15288,
-    0xe27dec9, 0xd7db1b34, 0xe1ffde2, 0xd7e4e56c,
-    0xe181ee8, 0xd7eeb130, 0xe1041d9, 0xd7f87e7f,
-    0xe0866b8, 0xd8024d59, 0xe008d84, 0xd80c1dbf,
-    0xdf8b63d, 0xd815efae, 0xdf0e0e4, 0xd81fc328,
-    0xde90d79, 0xd829982b, 0xde13bfd, 0xd8336eb7,
-    0xdd96c6f, 0xd83d46cc, 0xdd19ed0, 0xd8472069,
-    0xdc9d320, 0xd850fb8e, 0xdc20960, 0xd85ad83c,
-    0xdba4190, 0xd864b670, 0xdb27bb0, 0xd86e962b,
-    0xdaab7c0, 0xd878776d, 0xda2f5c2, 0xd8825a35,
-    0xd9b35b4, 0xd88c3e83, 0xd937798, 0xd8962456,
-    0xd8bbb6d, 0xd8a00bae, 0xd840134, 0xd8a9f48a,
-    0xd7c48ee, 0xd8b3deeb, 0xd74929a, 0xd8bdcad0,
-    0xd6cde39, 0xd8c7b838, 0xd652bcb, 0xd8d1a724,
-    0xd5d7b50, 0xd8db9792, 0xd55ccca, 0xd8e58982,
-    0xd4e2037, 0xd8ef7cf4, 0xd467599, 0xd8f971e8,
-    0xd3eccef, 0xd903685d, 0xd37263a, 0xd90d6053,
-    0xd2f817b, 0xd91759c9, 0xd27deb0, 0xd92154bf,
-    0xd203ddc, 0xd92b5135, 0xd189efe, 0xd9354f2a,
-    0xd110216, 0xd93f4e9e, 0xd096725, 0xd9494f90,
-    0xd01ce2b, 0xd9535201, 0xcfa3729, 0xd95d55ef,
-    0xcf2a21d, 0xd9675b5a, 0xceb0f0a, 0xd9716243,
-    0xce37def, 0xd97b6aa8, 0xcdbeecc, 0xd9857489,
-    0xcd461a2, 0xd98f7fe6, 0xcccd671, 0xd9998cbe,
-    0xcc54d3a, 0xd9a39b11, 0xcbdc5fc, 0xd9adaadf,
-    0xcb640b8, 0xd9b7bc27, 0xcaebd6e, 0xd9c1cee9,
-    0xca73c1e, 0xd9cbe325, 0xc9fbcca, 0xd9d5f8d9,
-    0xc983f70, 0xd9e01006, 0xc90c412, 0xd9ea28ac,
-    0xc894aaf, 0xd9f442c9, 0xc81d349, 0xd9fe5e5e,
-    0xc7a5dde, 0xda087b69, 0xc72ea70, 0xda1299ec,
-    0xc6b78ff, 0xda1cb9e5, 0xc64098b, 0xda26db54,
-    0xc5c9c14, 0xda30fe38, 0xc55309b, 0xda3b2292,
-    0xc4dc720, 0xda454860, 0xc465fa3, 0xda4f6fa3,
-    0xc3efa25, 0xda599859, 0xc3796a5, 0xda63c284,
-    0xc303524, 0xda6dee21, 0xc28d5a3, 0xda781b31,
-    0xc217822, 0xda8249b4, 0xc1a1ca0, 0xda8c79a9,
-    0xc12c31f, 0xda96ab0f, 0xc0b6b9e, 0xdaa0dde7,
-    0xc04161e, 0xdaab122f, 0xbfcc29f, 0xdab547e8,
-    0xbf57121, 0xdabf7f11, 0xbee21a5, 0xdac9b7a9,
-    0xbe6d42b, 0xdad3f1b1, 0xbdf88b3, 0xdade2d28,
-    0xbd83f3d, 0xdae86a0d, 0xbd0f7ca, 0xdaf2a860,
-    0xbc9b25a, 0xdafce821, 0xbc26eee, 0xdb072950,
-    0xbbb2d85, 0xdb116beb, 0xbb3ee20, 0xdb1baff2,
-    0xbacb0bf, 0xdb25f566, 0xba57563, 0xdb303c46,
-    0xb9e3c0b, 0xdb3a8491, 0xb9704b9, 0xdb44ce46,
-    0xb8fcf6b, 0xdb4f1967, 0xb889c23, 0xdb5965f1,
-    0xb816ae1, 0xdb63b3e5, 0xb7a3ba5, 0xdb6e0342,
-    0xb730e70, 0xdb785409, 0xb6be341, 0xdb82a638,
-    0xb64ba19, 0xdb8cf9cf, 0xb5d92f8, 0xdb974ece,
-    0xb566ddf, 0xdba1a534, 0xb4f4acd, 0xdbabfd01,
-    0xb4829c4, 0xdbb65634, 0xb410ac3, 0xdbc0b0ce,
-    0xb39edca, 0xdbcb0cce, 0xb32d2da, 0xdbd56a32,
-    0xb2bb9f4, 0xdbdfc8fc, 0xb24a316, 0xdbea292b,
-    0xb1d8e43, 0xdbf48abd, 0xb167b79, 0xdbfeedb3,
-    0xb0f6aba, 0xdc09520d, 0xb085c05, 0xdc13b7c9,
-    0xb014f5b, 0xdc1e1ee9, 0xafa44bc, 0xdc28876a,
-    0xaf33c28, 0xdc32f14d, 0xaec35a0, 0xdc3d5c91,
-    0xae53123, 0xdc47c936, 0xade2eb3, 0xdc52373c,
-    0xad72e4f, 0xdc5ca6a2, 0xad02ff8, 0xdc671768,
-    0xac933ae, 0xdc71898d, 0xac23971, 0xdc7bfd11,
-    0xabb4141, 0xdc8671f3, 0xab44b1f, 0xdc90e834,
-    0xaad570c, 0xdc9b5fd2, 0xaa66506, 0xdca5d8cd,
-    0xa9f750f, 0xdcb05326, 0xa988727, 0xdcbacedb,
-    0xa919b4e, 0xdcc54bec, 0xa8ab184, 0xdccfca59,
-    0xa83c9ca, 0xdcda4a21, 0xa7ce420, 0xdce4cb44,
-    0xa760086, 0xdcef4dc2, 0xa6f1efc, 0xdcf9d199,
-    0xa683f83, 0xdd0456ca, 0xa61621b, 0xdd0edd55,
-    0xa5a86c4, 0xdd196538, 0xa53ad7e, 0xdd23ee74,
-    0xa4cd64b, 0xdd2e7908, 0xa460129, 0xdd3904f4,
-    0xa3f2e19, 0xdd439236, 0xa385d1d, 0xdd4e20d0,
-    0xa318e32, 0xdd58b0c0, 0xa2ac15b, 0xdd634206,
-    0xa23f698, 0xdd6dd4a2, 0xa1d2de7, 0xdd786892,
-    0xa16674b, 0xdd82fdd8, 0xa0fa2c3, 0xdd8d9472,
-    0xa08e04f, 0xdd982c60, 0xa021fef, 0xdda2c5a2,
-    0x9fb61a5, 0xddad6036, 0x9f4a570, 0xddb7fc1e,
-    0x9edeb50, 0xddc29958, 0x9e73346, 0xddcd37e4,
-    0x9e07d51, 0xddd7d7c1, 0x9d9c973, 0xdde278ef,
-    0x9d317ab, 0xdded1b6e, 0x9cc67fa, 0xddf7bf3e,
-    0x9c5ba60, 0xde02645d, 0x9bf0edd, 0xde0d0acc,
-    0x9b86572, 0xde17b28a, 0x9b1be1e, 0xde225b96,
-    0x9ab18e3, 0xde2d05f1, 0x9a475bf, 0xde37b199,
-    0x99dd4b4, 0xde425e8f, 0x99735c2, 0xde4d0cd2,
-    0x99098e9, 0xde57bc62, 0x989fe29, 0xde626d3e,
-    0x9836582, 0xde6d1f65, 0x97ccef5, 0xde77d2d8,
-    0x9763a83, 0xde828796, 0x96fa82a, 0xde8d3d9e,
-    0x96917ec, 0xde97f4f1, 0x96289c9, 0xdea2ad8d,
-    0x95bfdc1, 0xdead6773, 0x95573d4, 0xdeb822a1,
-    0x94eec03, 0xdec2df18, 0x948664d, 0xdecd9cd7,
-    0x941e2b4, 0xded85bdd, 0x93b6137, 0xdee31c2b,
-    0x934e1d6, 0xdeedddc0, 0x92e6492, 0xdef8a09b,
-    0x927e96b, 0xdf0364bc, 0x9217062, 0xdf0e2a22,
-    0x91af976, 0xdf18f0ce, 0x91484a8, 0xdf23b8be,
-    0x90e11f7, 0xdf2e81f3, 0x907a166, 0xdf394c6b,
-    0x90132f2, 0xdf441828, 0x8fac69e, 0xdf4ee527,
-    0x8f45c68, 0xdf59b369, 0x8edf452, 0xdf6482ed,
-    0x8e78e5b, 0xdf6f53b3, 0x8e12a84, 0xdf7a25ba,
-    0x8dac8cd, 0xdf84f902, 0x8d46936, 0xdf8fcd8b,
-    0x8ce0bc0, 0xdf9aa354, 0x8c7b06b, 0xdfa57a5d,
-    0x8c15736, 0xdfb052a5, 0x8bb0023, 0xdfbb2c2c,
-    0x8b4ab32, 0xdfc606f1, 0x8ae5862, 0xdfd0e2f5,
-    0x8a807b4, 0xdfdbc036, 0x8a1b928, 0xdfe69eb4,
-    0x89b6cbf, 0xdff17e70, 0x8952278, 0xdffc5f67,
-    0x88eda54, 0xe007419b, 0x8889454, 0xe012250a,
-    0x8825077, 0xe01d09b4, 0x87c0ebd, 0xe027ef99,
-    0x875cf28, 0xe032d6b8, 0x86f91b7, 0xe03dbf11,
-    0x869566a, 0xe048a8a4, 0x8631d42, 0xe053936f,
-    0x85ce63e, 0xe05e7f74, 0x856b160, 0xe0696cb0,
-    0x8507ea7, 0xe0745b24, 0x84a4e14, 0xe07f4acf,
-    0x8441fa6, 0xe08a3bb2, 0x83df35f, 0xe0952dcb,
-    0x837c93e, 0xe0a0211a, 0x831a143, 0xe0ab159e,
-    0x82b7b70, 0xe0b60b58, 0x82557c3, 0xe0c10247,
-    0x81f363d, 0xe0cbfa6a, 0x81916df, 0xe0d6f3c1,
-    0x812f9a9, 0xe0e1ee4b, 0x80cde9b, 0xe0ecea09,
-    0x806c5b5, 0xe0f7e6f9, 0x800aef7, 0xe102e51c,
-    0x7fa9a62, 0xe10de470, 0x7f487f6, 0xe118e4f6,
-    0x7ee77b3, 0xe123e6ad, 0x7e8699a, 0xe12ee995,
-    0x7e25daa, 0xe139edac, 0x7dc53e3, 0xe144f2f3,
-    0x7d64c47, 0xe14ff96a, 0x7d046d6, 0xe15b0110,
-    0x7ca438f, 0xe16609e3, 0x7c44272, 0xe17113e5,
-    0x7be4381, 0xe17c1f15, 0x7b846ba, 0xe1872b72,
-    0x7b24c20, 0xe19238fb, 0x7ac53b1, 0xe19d47b1,
-    0x7a65d6e, 0xe1a85793, 0x7a06957, 0xe1b368a0,
-    0x79a776c, 0xe1be7ad8, 0x79487ae, 0xe1c98e3b,
-    0x78e9a1d, 0xe1d4a2c8, 0x788aeb9, 0xe1dfb87f,
-    0x782c582, 0xe1eacf5f, 0x77cde79, 0xe1f5e768,
-    0x776f99d, 0xe2010099, 0x77116f0, 0xe20c1af3,
-    0x76b3671, 0xe2173674, 0x7655820, 0xe222531c,
-    0x75f7bfe, 0xe22d70eb, 0x759a20a, 0xe2388fe1,
-    0x753ca46, 0xe243affc, 0x74df4b1, 0xe24ed13d,
-    0x748214c, 0xe259f3a3, 0x7425016, 0xe265172e,
-    0x73c8111, 0xe2703bdc, 0x736b43c, 0xe27b61af,
-    0x730e997, 0xe28688a4, 0x72b2123, 0xe291b0bd,
-    0x7255ae0, 0xe29cd9f8, 0x71f96ce, 0xe2a80456,
-    0x719d4ed, 0xe2b32fd4, 0x714153e, 0xe2be5c74,
-    0x70e57c0, 0xe2c98a35, 0x7089c75, 0xe2d4b916,
-    0x702e35c, 0xe2dfe917, 0x6fd2c75, 0xe2eb1a37,
-    0x6f777c1, 0xe2f64c77, 0x6f1c540, 0xe3017fd5,
-    0x6ec14f2, 0xe30cb451, 0x6e666d7, 0xe317e9eb,
-    0x6e0baf0, 0xe32320a2, 0x6db113d, 0xe32e5876,
-    0x6d569be, 0xe3399167, 0x6cfc472, 0xe344cb73,
-    0x6ca215c, 0xe350069b, 0x6c4807a, 0xe35b42df,
-    0x6bee1cd, 0xe366803c, 0x6b94554, 0xe371beb5,
-    0x6b3ab12, 0xe37cfe47, 0x6ae1304, 0xe3883ef2,
-    0x6a87d2d, 0xe39380b6, 0x6a2e98b, 0xe39ec393,
-    0x69d5820, 0xe3aa0788, 0x697c8eb, 0xe3b54c95,
-    0x6923bec, 0xe3c092b9, 0x68cb124, 0xe3cbd9f4,
-    0x6872894, 0xe3d72245, 0x681a23a, 0xe3e26bac,
-    0x67c1e18, 0xe3edb628, 0x6769c2e, 0xe3f901ba,
-    0x6711c7b, 0xe4044e60, 0x66b9f01, 0xe40f9c1a,
-    0x66623be, 0xe41aeae8, 0x660aab5, 0xe4263ac9,
-    0x65b33e4, 0xe4318bbe, 0x655bf4c, 0xe43cddc4,
-    0x6504ced, 0xe44830dd, 0x64adcc7, 0xe4538507,
-    0x6456edb, 0xe45eda43, 0x6400329, 0xe46a308f,
-    0x63a99b1, 0xe47587eb, 0x6353273, 0xe480e057,
-    0x62fcd6f, 0xe48c39d3, 0x62a6aa6, 0xe497945d,
-    0x6250a18, 0xe4a2eff6, 0x61fabc4, 0xe4ae4c9d,
-    0x61a4fac, 0xe4b9aa52, 0x614f5cf, 0xe4c50914,
-    0x60f9e2e, 0xe4d068e2, 0x60a48c9, 0xe4dbc9bd,
-    0x604f5a0, 0xe4e72ba4, 0x5ffa4b3, 0xe4f28e96,
-    0x5fa5603, 0xe4fdf294, 0x5f5098f, 0xe509579b,
-    0x5efbf58, 0xe514bdad, 0x5ea775e, 0xe52024c9,
-    0x5e531a1, 0xe52b8cee, 0x5dfee22, 0xe536f61b,
-    0x5daace1, 0xe5426051, 0x5d56ddd, 0xe54dcb8f,
-    0x5d03118, 0xe55937d5, 0x5caf690, 0xe564a521,
-    0x5c5be47, 0xe5701374, 0x5c0883d, 0xe57b82cd,
-    0x5bb5472, 0xe586f32c, 0x5b622e6, 0xe5926490,
-    0x5b0f399, 0xe59dd6f9, 0x5abc68c, 0xe5a94a67,
-    0x5a69bbe, 0xe5b4bed8, 0x5a17330, 0xe5c0344d,
-    0x59c4ce3, 0xe5cbaac5, 0x59728d5, 0xe5d72240,
-    0x5920708, 0xe5e29abc, 0x58ce77c, 0xe5ee143b,
-    0x587ca31, 0xe5f98ebb, 0x582af26, 0xe6050a3b,
-    0x57d965d, 0xe61086bc, 0x5787fd6, 0xe61c043d,
-    0x5736b90, 0xe62782be, 0x56e598c, 0xe633023e,
-    0x56949ca, 0xe63e82bc, 0x5643c4a, 0xe64a0438,
-    0x55f310d, 0xe65586b3, 0x55a2812, 0xe6610a2a,
-    0x555215a, 0xe66c8e9f, 0x5501ce5, 0xe6781410,
-    0x54b1ab4, 0xe6839a7c, 0x5461ac6, 0xe68f21e5,
-    0x5411d1b, 0xe69aaa48, 0x53c21b4, 0xe6a633a6,
-    0x5372891, 0xe6b1bdff, 0x53231b3, 0xe6bd4951,
-    0x52d3d18, 0xe6c8d59c, 0x5284ac3, 0xe6d462e1,
-    0x5235ab2, 0xe6dff11d, 0x51e6ce6, 0xe6eb8052,
-    0x519815f, 0xe6f7107e, 0x514981d, 0xe702a1a1,
-    0x50fb121, 0xe70e33bb, 0x50acc6b, 0xe719c6cb,
-    0x505e9fb, 0xe7255ad1, 0x50109d0, 0xe730efcc,
-    0x4fc2bec, 0xe73c85bc, 0x4f7504e, 0xe7481ca1,
-    0x4f276f7, 0xe753b479, 0x4ed9fe7, 0xe75f4d45,
-    0x4e8cb1e, 0xe76ae704, 0x4e3f89c, 0xe77681b6,
-    0x4df2862, 0xe7821d59, 0x4da5a6f, 0xe78db9ef,
-    0x4d58ec3, 0xe7995776, 0x4d0c560, 0xe7a4f5ed,
-    0x4cbfe45, 0xe7b09555, 0x4c73972, 0xe7bc35ad,
-    0x4c276e8, 0xe7c7d6f4, 0x4bdb6a6, 0xe7d3792b,
-    0x4b8f8ad, 0xe7df1c50, 0x4b43cfd, 0xe7eac063,
-    0x4af8397, 0xe7f66564, 0x4aacc7a, 0xe8020b52,
-    0x4a617a6, 0xe80db22d, 0x4a1651c, 0xe81959f4,
-    0x49cb4dd, 0xe82502a7, 0x49806e7, 0xe830ac45,
-    0x4935b3c, 0xe83c56cf, 0x48eb1db, 0xe8480243,
-    0x48a0ac4, 0xe853aea1, 0x48565f9, 0xe85f5be9,
-    0x480c379, 0xe86b0a1a, 0x47c2344, 0xe876b934,
-    0x477855a, 0xe8826936, 0x472e9bc, 0xe88e1a20,
-    0x46e5069, 0xe899cbf1, 0x469b963, 0xe8a57ea9,
-    0x46524a9, 0xe8b13248, 0x460923b, 0xe8bce6cd,
-    0x45c0219, 0xe8c89c37, 0x4577444, 0xe8d45286,
-    0x452e8bc, 0xe8e009ba, 0x44e5f80, 0xe8ebc1d3,
-    0x449d892, 0xe8f77acf, 0x44553f2, 0xe90334af,
-    0x440d19e, 0xe90eef71, 0x43c5199, 0xe91aab16,
-    0x437d3e1, 0xe926679c, 0x4335877, 0xe9322505,
-    0x42edf5c, 0xe93de34e, 0x42a688f, 0xe949a278,
-    0x425f410, 0xe9556282, 0x42181e0, 0xe961236c,
-    0x41d11ff, 0xe96ce535, 0x418a46d, 0xe978a7dd,
-    0x414392b, 0xe9846b63, 0x40fd037, 0xe9902fc7,
-    0x40b6994, 0xe99bf509, 0x4070540, 0xe9a7bb28,
-    0x402a33c, 0xe9b38223, 0x3fe4388, 0xe9bf49fa,
-    0x3f9e624, 0xe9cb12ad, 0x3f58b10, 0xe9d6dc3b,
-    0x3f1324e, 0xe9e2a6a3, 0x3ecdbdc, 0xe9ee71e6,
-    0x3e887bb, 0xe9fa3e03, 0x3e435ea, 0xea060af9,
-    0x3dfe66c, 0xea11d8c8, 0x3db993e, 0xea1da770,
-    0x3d74e62, 0xea2976ef, 0x3d305d8, 0xea354746,
-    0x3cebfa0, 0xea411874, 0x3ca7bba, 0xea4cea79,
-    0x3c63a26, 0xea58bd54, 0x3c1fae5, 0xea649105,
-    0x3bdbdf6, 0xea70658a, 0x3b9835a, 0xea7c3ae5,
-    0x3b54b11, 0xea881114, 0x3b1151b, 0xea93e817,
-    0x3ace178, 0xea9fbfed, 0x3a8b028, 0xeaab9896,
-    0x3a4812c, 0xeab77212, 0x3a05484, 0xeac34c60,
-    0x39c2a2f, 0xeacf277f, 0x398022f, 0xeadb0370,
-    0x393dc82, 0xeae6e031, 0x38fb92a, 0xeaf2bdc3,
-    0x38b9827, 0xeafe9c24, 0x3877978, 0xeb0a7b54,
-    0x3835d1e, 0xeb165b54, 0x37f4319, 0xeb223c22,
-    0x37b2b6a, 0xeb2e1dbe, 0x377160f, 0xeb3a0027,
-    0x373030a, 0xeb45e35d, 0x36ef25b, 0xeb51c760,
-    0x36ae401, 0xeb5dac2f, 0x366d7fd, 0xeb6991ca,
-    0x362ce50, 0xeb75782f, 0x35ec6f8, 0xeb815f60,
-    0x35ac1f7, 0xeb8d475b, 0x356bf4d, 0xeb99301f,
-    0x352bef9, 0xeba519ad, 0x34ec0fc, 0xebb10404,
-    0x34ac556, 0xebbcef23, 0x346cc07, 0xebc8db0b,
-    0x342d510, 0xebd4c7ba, 0x33ee070, 0xebe0b52f,
-    0x33aee27, 0xebeca36c, 0x336fe37, 0xebf8926f,
-    0x333109e, 0xec048237, 0x32f255e, 0xec1072c4,
-    0x32b3c75, 0xec1c6417, 0x32755e5, 0xec28562d,
-    0x32371ae, 0xec344908, 0x31f8fcf, 0xec403ca5,
-    0x31bb049, 0xec4c3106, 0x317d31c, 0xec582629,
-    0x313f848, 0xec641c0e, 0x3101fce, 0xec7012b5,
-    0x30c49ad, 0xec7c0a1d, 0x30875e5, 0xec880245,
-    0x304a477, 0xec93fb2e, 0x300d563, 0xec9ff4d6,
-    0x2fd08a9, 0xecabef3d, 0x2f93e4a, 0xecb7ea63,
-    0x2f57644, 0xecc3e648, 0x2f1b099, 0xeccfe2ea,
-    0x2eded49, 0xecdbe04a, 0x2ea2c53, 0xece7de66,
-    0x2e66db8, 0xecf3dd3f, 0x2e2b178, 0xecffdcd4,
-    0x2def794, 0xed0bdd25, 0x2db400a, 0xed17de31,
-    0x2d78add, 0xed23dff7, 0x2d3d80a, 0xed2fe277,
-    0x2d02794, 0xed3be5b1, 0x2cc7979, 0xed47e9a5,
-    0x2c8cdbb, 0xed53ee51, 0x2c52459, 0xed5ff3b5,
-    0x2c17d52, 0xed6bf9d1, 0x2bdd8a9, 0xed7800a5,
-    0x2ba365c, 0xed84082f, 0x2b6966c, 0xed901070,
-    0x2b2f8d8, 0xed9c1967, 0x2af5da2, 0xeda82313,
-    0x2abc4c9, 0xedb42d74, 0x2a82e4d, 0xedc0388a,
-    0x2a49a2e, 0xedcc4454, 0x2a1086d, 0xedd850d2,
-    0x29d790a, 0xede45e03, 0x299ec05, 0xedf06be6,
-    0x296615d, 0xedfc7a7c, 0x292d914, 0xee0889c4,
-    0x28f5329, 0xee1499bd, 0x28bcf9c, 0xee20aa67,
-    0x2884e6e, 0xee2cbbc1, 0x284cf9f, 0xee38cdcb,
-    0x281532e, 0xee44e084, 0x27dd91c, 0xee50f3ed,
-    0x27a616a, 0xee5d0804, 0x276ec16, 0xee691cc9,
-    0x2737922, 0xee75323c, 0x270088e, 0xee81485c,
-    0x26c9a58, 0xee8d5f29, 0x2692e83, 0xee9976a1,
-    0x265c50e, 0xeea58ec6, 0x2625df8, 0xeeb1a796,
-    0x25ef943, 0xeebdc110, 0x25b96ee, 0xeec9db35,
-    0x25836f9, 0xeed5f604, 0x254d965, 0xeee2117c,
-    0x2517e31, 0xeeee2d9d, 0x24e255e, 0xeefa4a67,
-    0x24aceed, 0xef0667d9, 0x2477adc, 0xef1285f2,
-    0x244292c, 0xef1ea4b2, 0x240d9de, 0xef2ac419,
-    0x23d8cf1, 0xef36e426, 0x23a4265, 0xef4304d8,
-    0x236fa3b, 0xef4f2630, 0x233b473, 0xef5b482d,
-    0x230710d, 0xef676ace, 0x22d3009, 0xef738e12,
-    0x229f167, 0xef7fb1fa, 0x226b528, 0xef8bd685,
-    0x2237b4b, 0xef97fbb2, 0x22043d0, 0xefa42181,
-    0x21d0eb8, 0xefb047f2, 0x219dc03, 0xefbc6f03,
-    0x216abb1, 0xefc896b5, 0x2137dc2, 0xefd4bf08,
-    0x2105236, 0xefe0e7f9, 0x20d290d, 0xefed118a,
-    0x20a0248, 0xeff93bba, 0x206dde6, 0xf0056687,
-    0x203bbe8, 0xf01191f3, 0x2009c4e, 0xf01dbdfb,
-    0x1fd7f17, 0xf029eaa1, 0x1fa6445, 0xf03617e2,
-    0x1f74bd6, 0xf04245c0, 0x1f435cc, 0xf04e7438,
-    0x1f12227, 0xf05aa34c, 0x1ee10e5, 0xf066d2fa,
-    0x1eb0209, 0xf0730342, 0x1e7f591, 0xf07f3424,
-    0x1e4eb7e, 0xf08b659f, 0x1e1e3d0, 0xf09797b2,
-    0x1dede87, 0xf0a3ca5d, 0x1dbdba3, 0xf0affda0,
-    0x1d8db25, 0xf0bc317a, 0x1d5dd0c, 0xf0c865ea,
-    0x1d2e158, 0xf0d49af1, 0x1cfe80a, 0xf0e0d08d,
-    0x1ccf122, 0xf0ed06bf, 0x1c9fca0, 0xf0f93d86,
-    0x1c70a84, 0xf10574e0, 0x1c41ace, 0xf111accf,
-    0x1c12d7e, 0xf11de551, 0x1be4294, 0xf12a1e66,
-    0x1bb5a11, 0xf136580d, 0x1b873f5, 0xf1429247,
-    0x1b5903f, 0xf14ecd11, 0x1b2aef0, 0xf15b086d,
-    0x1afd007, 0xf1674459, 0x1acf386, 0xf17380d6,
-    0x1aa196c, 0xf17fbde2, 0x1a741b9, 0xf18bfb7d,
-    0x1a46c6e, 0xf19839a6, 0x1a1998a, 0xf1a4785e,
-    0x19ec90d, 0xf1b0b7a4, 0x19bfaf9, 0xf1bcf777,
-    0x1992f4c, 0xf1c937d6, 0x1966606, 0xf1d578c2,
-    0x1939f29, 0xf1e1ba3a, 0x190dab4, 0xf1edfc3d,
-    0x18e18a7, 0xf1fa3ecb, 0x18b5903, 0xf20681e3,
-    0x1889bc6, 0xf212c585, 0x185e0f3, 0xf21f09b1,
-    0x1832888, 0xf22b4e66, 0x1807285, 0xf23793a3,
-    0x17dbeec, 0xf243d968, 0x17b0dbb, 0xf2501fb5,
-    0x1785ef4, 0xf25c6688, 0x175b296, 0xf268ade3,
-    0x17308a1, 0xf274f5c3, 0x1706115, 0xf2813e2a,
-    0x16dbbf3, 0xf28d8715, 0x16b193a, 0xf299d085,
-    0x16878eb, 0xf2a61a7a, 0x165db05, 0xf2b264f2,
-    0x1633f8a, 0xf2beafed, 0x160a678, 0xf2cafb6b,
-    0x15e0fd1, 0xf2d7476c, 0x15b7b94, 0xf2e393ef,
-    0x158e9c1, 0xf2efe0f2, 0x1565a58, 0xf2fc2e77,
-    0x153cd5a, 0xf3087c7d, 0x15142c6, 0xf314cb02,
-    0x14eba9d, 0xf3211a07, 0x14c34df, 0xf32d698a,
-    0x149b18b, 0xf339b98d, 0x14730a3, 0xf3460a0d,
-    0x144b225, 0xf3525b0b, 0x1423613, 0xf35eac86,
-    0x13fbc6c, 0xf36afe7e, 0x13d4530, 0xf37750f2,
-    0x13ad060, 0xf383a3e2, 0x1385dfb, 0xf38ff74d,
-    0x135ee02, 0xf39c4b32, 0x1338075, 0xf3a89f92,
-    0x1311553, 0xf3b4f46c, 0x12eac9d, 0xf3c149bf,
-    0x12c4653, 0xf3cd9f8b, 0x129e276, 0xf3d9f5cf,
-    0x1278104, 0xf3e64c8c, 0x12521ff, 0xf3f2a3bf,
-    0x122c566, 0xf3fefb6a, 0x1206b39, 0xf40b538b,
-    0x11e1379, 0xf417ac22, 0x11bbe26, 0xf424052f,
-    0x1196b3f, 0xf4305eb0, 0x1171ac6, 0xf43cb8a7,
-    0x114ccb9, 0xf4491311, 0x1128119, 0xf4556def,
-    0x11037e6, 0xf461c940, 0x10df120, 0xf46e2504,
-    0x10bacc8, 0xf47a8139, 0x1096add, 0xf486dde1,
-    0x1072b5f, 0xf4933afa, 0x104ee4f, 0xf49f9884,
-    0x102b3ac, 0xf4abf67e, 0x1007b77, 0xf4b854e7,
-    0xfe45b0, 0xf4c4b3c0, 0xfc1257, 0xf4d11308,
-    0xf9e16b, 0xf4dd72be, 0xf7b2ee, 0xf4e9d2e3,
-    0xf586df, 0xf4f63374, 0xf35d3e, 0xf5029473,
-    0xf1360b, 0xf50ef5de, 0xef1147, 0xf51b57b5,
-    0xeceef1, 0xf527b9f7, 0xeacf09, 0xf5341ca5,
-    0xe8b190, 0xf5407fbd, 0xe69686, 0xf54ce33f,
-    0xe47deb, 0xf559472b, 0xe267be, 0xf565ab80,
-    0xe05401, 0xf572103d, 0xde42b2, 0xf57e7563,
-    0xdc33d2, 0xf58adaf0, 0xda2762, 0xf59740e5,
-    0xd81d61, 0xf5a3a740, 0xd615cf, 0xf5b00e02,
-    0xd410ad, 0xf5bc7529, 0xd20dfa, 0xf5c8dcb6,
-    0xd00db6, 0xf5d544a7, 0xce0fe3, 0xf5e1acfd,
-    0xcc147f, 0xf5ee15b7, 0xca1b8a, 0xf5fa7ed4,
-    0xc82506, 0xf606e854, 0xc630f2, 0xf6135237,
-    0xc43f4d, 0xf61fbc7b, 0xc25019, 0xf62c2721,
-    0xc06355, 0xf6389228, 0xbe7901, 0xf644fd8f,
-    0xbc911d, 0xf6516956, 0xbaabaa, 0xf65dd57d,
-    0xb8c8a7, 0xf66a4203, 0xb6e815, 0xf676aee8,
-    0xb509f3, 0xf6831c2b, 0xb32e42, 0xf68f89cb,
-    0xb15502, 0xf69bf7c9, 0xaf7e33, 0xf6a86623,
-    0xada9d4, 0xf6b4d4d9, 0xabd7e6, 0xf6c143ec,
-    0xaa086a, 0xf6cdb359, 0xa83b5e, 0xf6da2321,
-    0xa670c4, 0xf6e69344, 0xa4a89b, 0xf6f303c0,
-    0xa2e2e3, 0xf6ff7496, 0xa11f9d, 0xf70be5c4,
-    0x9f5ec8, 0xf718574b, 0x9da065, 0xf724c92a,
-    0x9be473, 0xf7313b60, 0x9a2af3, 0xf73daded,
-    0x9873e4, 0xf74a20d0, 0x96bf48, 0xf756940a,
-    0x950d1d, 0xf7630799, 0x935d64, 0xf76f7b7d,
-    0x91b01d, 0xf77befb5, 0x900548, 0xf7886442,
-    0x8e5ce5, 0xf794d922, 0x8cb6f5, 0xf7a14e55,
-    0x8b1376, 0xf7adc3db, 0x89726a, 0xf7ba39b3,
-    0x87d3d0, 0xf7c6afdc, 0x8637a9, 0xf7d32657,
-    0x849df4, 0xf7df9d22, 0x8306b2, 0xf7ec143e,
-    0x8171e2, 0xf7f88ba9, 0x7fdf85, 0xf8050364,
-    0x7e4f9b, 0xf8117b6d, 0x7cc223, 0xf81df3c5,
-    0x7b371e, 0xf82a6c6a, 0x79ae8c, 0xf836e55d,
-    0x78286e, 0xf8435e9d, 0x76a4c2, 0xf84fd829,
-    0x752389, 0xf85c5201, 0x73a4c3, 0xf868cc24,
-    0x722871, 0xf8754692, 0x70ae92, 0xf881c14b,
-    0x6f3726, 0xf88e3c4d, 0x6dc22e, 0xf89ab799,
-    0x6c4fa8, 0xf8a7332e, 0x6adf97, 0xf8b3af0c,
-    0x6971f9, 0xf8c02b31, 0x6806ce, 0xf8cca79e,
-    0x669e18, 0xf8d92452, 0x6537d4, 0xf8e5a14d,
-    0x63d405, 0xf8f21e8e, 0x6272aa, 0xf8fe9c15,
-    0x6113c2, 0xf90b19e0, 0x5fb74e, 0xf91797f0,
-    0x5e5d4e, 0xf9241645, 0x5d05c3, 0xf93094dd,
-    0x5bb0ab, 0xf93d13b8, 0x5a5e07, 0xf94992d7,
-    0x590dd8, 0xf9561237, 0x57c01d, 0xf96291d9,
-    0x5674d6, 0xf96f11bc, 0x552c03, 0xf97b91e1,
-    0x53e5a5, 0xf9881245, 0x52a1bb, 0xf99492ea,
-    0x516045, 0xf9a113cd, 0x502145, 0xf9ad94f0,
-    0x4ee4b8, 0xf9ba1651, 0x4daaa1, 0xf9c697f0,
-    0x4c72fe, 0xf9d319cc, 0x4b3dcf, 0xf9df9be6,
-    0x4a0b16, 0xf9ec1e3b, 0x48dad1, 0xf9f8a0cd,
-    0x47ad01, 0xfa05239a, 0x4681a6, 0xfa11a6a3,
-    0x4558c0, 0xfa1e29e5, 0x44324f, 0xfa2aad62,
-    0x430e53, 0xfa373119, 0x41eccc, 0xfa43b508,
-    0x40cdba, 0xfa503930, 0x3fb11d, 0xfa5cbd91,
-    0x3e96f6, 0xfa694229, 0x3d7f44, 0xfa75c6f8,
-    0x3c6a07, 0xfa824bfd, 0x3b573f, 0xfa8ed139,
-    0x3a46ed, 0xfa9b56ab, 0x393910, 0xfaa7dc52,
-    0x382da8, 0xfab4622d, 0x3724b6, 0xfac0e83d,
-    0x361e3a, 0xfacd6e81, 0x351a33, 0xfad9f4f8,
-    0x3418a2, 0xfae67ba2, 0x331986, 0xfaf3027e,
-    0x321ce0, 0xfaff898c, 0x3122b0, 0xfb0c10cb,
-    0x302af5, 0xfb18983b, 0x2f35b1, 0xfb251fdc,
-    0x2e42e2, 0xfb31a7ac, 0x2d5289, 0xfb3e2fac,
-    0x2c64a6, 0xfb4ab7db, 0x2b7939, 0xfb574039,
-    0x2a9042, 0xfb63c8c4, 0x29a9c1, 0xfb70517d,
-    0x28c5b6, 0xfb7cda63, 0x27e421, 0xfb896375,
-    0x270502, 0xfb95ecb4, 0x262859, 0xfba2761e,
-    0x254e27, 0xfbaeffb3, 0x24766a, 0xfbbb8973,
-    0x23a124, 0xfbc8135c, 0x22ce54, 0xfbd49d70,
-    0x21fdfb, 0xfbe127ac, 0x213018, 0xfbedb212,
-    0x2064ab, 0xfbfa3c9f, 0x1f9bb5, 0xfc06c754,
-    0x1ed535, 0xfc135231, 0x1e112b, 0xfc1fdd34,
-    0x1d4f99, 0xfc2c685d, 0x1c907c, 0xfc38f3ac,
-    0x1bd3d6, 0xfc457f21, 0x1b19a7, 0xfc520aba,
-    0x1a61ee, 0xfc5e9678, 0x19acac, 0xfc6b2259,
-    0x18f9e1, 0xfc77ae5e, 0x18498c, 0xfc843a85,
-    0x179bae, 0xfc90c6cf, 0x16f047, 0xfc9d533b,
-    0x164757, 0xfca9dfc8, 0x15a0dd, 0xfcb66c77,
-    0x14fcda, 0xfcc2f945, 0x145b4e, 0xfccf8634,
-    0x13bc39, 0xfcdc1342, 0x131f9b, 0xfce8a06f,
-    0x128574, 0xfcf52dbb, 0x11edc3, 0xfd01bb24,
-    0x11588a, 0xfd0e48ab, 0x10c5c7, 0xfd1ad650,
-    0x10357c, 0xfd276410, 0xfa7a8, 0xfd33f1ed,
-    0xf1c4a, 0xfd407fe6, 0xe9364, 0xfd4d0df9,
-    0xe0cf5, 0xfd599c28, 0xd88fd, 0xfd662a70,
-    0xd077c, 0xfd72b8d2, 0xc8872, 0xfd7f474d,
-    0xc0be0, 0xfd8bd5e1, 0xb91c4, 0xfd98648d,
-    0xb1a20, 0xfda4f351, 0xaa4f3, 0xfdb1822c,
-    0xa323d, 0xfdbe111e, 0x9c1ff, 0xfdcaa027,
-    0x95438, 0xfdd72f45, 0x8e8e8, 0xfde3be78,
-    0x8800f, 0xfdf04dc0, 0x819ae, 0xfdfcdd1d,
-    0x7b5c4, 0xfe096c8d, 0x75452, 0xfe15fc11,
-    0x6f556, 0xfe228ba7, 0x698d3, 0xfe2f1b50,
-    0x63ec6, 0xfe3bab0b, 0x5e731, 0xfe483ad8,
-    0x59214, 0xfe54cab5, 0x53f6e, 0xfe615aa3,
-    0x4ef3f, 0xfe6deaa1, 0x4a188, 0xfe7a7aae,
-    0x45648, 0xfe870aca, 0x40d80, 0xfe939af5,
-    0x3c72f, 0xfea02b2e, 0x38356, 0xfeacbb74,
-    0x341f4, 0xfeb94bc8, 0x3030a, 0xfec5dc28,
-    0x2c697, 0xfed26c94, 0x28c9c, 0xfedefd0c,
-    0x25519, 0xfeeb8d8f, 0x2200d, 0xfef81e1d,
-    0x1ed78, 0xff04aeb5, 0x1bd5c, 0xff113f56,
-    0x18fb6, 0xff1dd001, 0x16489, 0xff2a60b4,
-    0x13bd3, 0xff36f170, 0x11594, 0xff438234,
-    0xf1ce, 0xff5012fe, 0xd07e, 0xff5ca3d0,
-    0xb1a7, 0xff6934a8, 0x9547, 0xff75c585,
-    0x7b5f, 0xff825668, 0x63ee, 0xff8ee750,
-    0x4ef5, 0xff9b783c, 0x3c74, 0xffa8092c,
-    0x2c6a, 0xffb49a1f, 0x1ed8, 0xffc12b16,
-    0x13bd, 0xffcdbc0f, 0xb1a, 0xffda4d09,
-    0x4ef, 0xffe6de05, 0x13c, 0xfff36f02,
-    0x0, 0x0, 0x13c, 0xc90fe,
-    0x4ef, 0x1921fb, 0xb1a, 0x25b2f7,
-    0x13bd, 0x3243f1, 0x1ed8, 0x3ed4ea,
-    0x2c6a, 0x4b65e1, 0x3c74, 0x57f6d4,
-    0x4ef5, 0x6487c4, 0x63ee, 0x7118b0,
-    0x7b5f, 0x7da998, 0x9547, 0x8a3a7b,
-    0xb1a7, 0x96cb58, 0xd07e, 0xa35c30,
-    0xf1ce, 0xafed02, 0x11594, 0xbc7dcc,
-    0x13bd3, 0xc90e90, 0x16489, 0xd59f4c,
-    0x18fb6, 0xe22fff, 0x1bd5c, 0xeec0aa,
-    0x1ed78, 0xfb514b, 0x2200d, 0x107e1e3,
-    0x25519, 0x1147271, 0x28c9c, 0x12102f4,
-    0x2c697, 0x12d936c, 0x3030a, 0x13a23d8,
-    0x341f4, 0x146b438, 0x38356, 0x153448c,
-    0x3c72f, 0x15fd4d2, 0x40d80, 0x16c650b,
-    0x45648, 0x178f536, 0x4a188, 0x1858552,
-    0x4ef3f, 0x192155f, 0x53f6e, 0x19ea55d,
-    0x59214, 0x1ab354b, 0x5e731, 0x1b7c528,
-    0x63ec6, 0x1c454f5, 0x698d3, 0x1d0e4b0,
-    0x6f556, 0x1dd7459, 0x75452, 0x1ea03ef,
-    0x7b5c4, 0x1f69373, 0x819ae, 0x20322e3,
-    0x8800f, 0x20fb240, 0x8e8e8, 0x21c4188,
-    0x95438, 0x228d0bb, 0x9c1ff, 0x2355fd9,
-    0xa323d, 0x241eee2, 0xaa4f3, 0x24e7dd4,
-    0xb1a20, 0x25b0caf, 0xb91c4, 0x2679b73,
-    0xc0be0, 0x2742a1f, 0xc8872, 0x280b8b3,
-    0xd077c, 0x28d472e, 0xd88fd, 0x299d590,
-    0xe0cf5, 0x2a663d8, 0xe9364, 0x2b2f207,
-    0xf1c4a, 0x2bf801a, 0xfa7a8, 0x2cc0e13,
-    0x10357c, 0x2d89bf0, 0x10c5c7, 0x2e529b0,
-    0x11588a, 0x2f1b755, 0x11edc3, 0x2fe44dc,
-    0x128574, 0x30ad245, 0x131f9b, 0x3175f91,
-    0x13bc39, 0x323ecbe, 0x145b4e, 0x33079cc,
-    0x14fcda, 0x33d06bb, 0x15a0dd, 0x3499389,
-    0x164757, 0x3562038, 0x16f047, 0x362acc5,
-    0x179bae, 0x36f3931, 0x18498c, 0x37bc57b,
-    0x18f9e1, 0x38851a2, 0x19acac, 0x394dda7,
-    0x1a61ee, 0x3a16988, 0x1b19a7, 0x3adf546,
-    0x1bd3d6, 0x3ba80df, 0x1c907c, 0x3c70c54,
-    0x1d4f99, 0x3d397a3, 0x1e112b, 0x3e022cc,
-    0x1ed535, 0x3ecadcf, 0x1f9bb5, 0x3f938ac,
-    0x2064ab, 0x405c361, 0x213018, 0x4124dee,
-    0x21fdfb, 0x41ed854, 0x22ce54, 0x42b6290,
-    0x23a124, 0x437eca4, 0x24766a, 0x444768d,
-    0x254e27, 0x451004d, 0x262859, 0x45d89e2,
-    0x270502, 0x46a134c, 0x27e421, 0x4769c8b,
-    0x28c5b6, 0x483259d, 0x29a9c1, 0x48fae83,
-    0x2a9042, 0x49c373c, 0x2b7939, 0x4a8bfc7,
-    0x2c64a6, 0x4b54825, 0x2d5289, 0x4c1d054,
-    0x2e42e2, 0x4ce5854, 0x2f35b1, 0x4dae024,
-    0x302af5, 0x4e767c5, 0x3122b0, 0x4f3ef35,
-    0x321ce0, 0x5007674, 0x331986, 0x50cfd82,
-    0x3418a2, 0x519845e, 0x351a33, 0x5260b08,
-    0x361e3a, 0x532917f, 0x3724b6, 0x53f17c3,
-    0x382da8, 0x54b9dd3, 0x393910, 0x55823ae,
-    0x3a46ed, 0x564a955, 0x3b573f, 0x5712ec7,
-    0x3c6a07, 0x57db403, 0x3d7f44, 0x58a3908,
-    0x3e96f6, 0x596bdd7, 0x3fb11d, 0x5a3426f,
-    0x40cdba, 0x5afc6d0, 0x41eccc, 0x5bc4af8,
-    0x430e53, 0x5c8cee7, 0x44324f, 0x5d5529e,
-    0x4558c0, 0x5e1d61b, 0x4681a6, 0x5ee595d,
-    0x47ad01, 0x5fadc66, 0x48dad1, 0x6075f33,
-    0x4a0b16, 0x613e1c5, 0x4b3dcf, 0x620641a,
-    0x4c72fe, 0x62ce634, 0x4daaa1, 0x6396810,
-    0x4ee4b8, 0x645e9af, 0x502145, 0x6526b10,
-    0x516045, 0x65eec33, 0x52a1bb, 0x66b6d16,
-    0x53e5a5, 0x677edbb, 0x552c03, 0x6846e1f,
-    0x5674d6, 0x690ee44, 0x57c01d, 0x69d6e27,
-    0x590dd8, 0x6a9edc9, 0x5a5e07, 0x6b66d29,
-    0x5bb0ab, 0x6c2ec48, 0x5d05c3, 0x6cf6b23,
-    0x5e5d4e, 0x6dbe9bb, 0x5fb74e, 0x6e86810,
-    0x6113c2, 0x6f4e620, 0x6272aa, 0x70163eb,
-    0x63d405, 0x70de172, 0x6537d4, 0x71a5eb3,
-    0x669e18, 0x726dbae, 0x6806ce, 0x7335862,
-    0x6971f9, 0x73fd4cf, 0x6adf97, 0x74c50f4,
-    0x6c4fa8, 0x758ccd2, 0x6dc22e, 0x7654867,
-    0x6f3726, 0x771c3b3, 0x70ae92, 0x77e3eb5,
-    0x722871, 0x78ab96e, 0x73a4c3, 0x79733dc,
-    0x752389, 0x7a3adff, 0x76a4c2, 0x7b027d7,
-    0x78286e, 0x7bca163, 0x79ae8c, 0x7c91aa3,
-    0x7b371e, 0x7d59396, 0x7cc223, 0x7e20c3b,
-    0x7e4f9b, 0x7ee8493, 0x7fdf85, 0x7fafc9c,
-    0x8171e2, 0x8077457, 0x8306b2, 0x813ebc2,
-    0x849df4, 0x82062de, 0x8637a9, 0x82cd9a9,
-    0x87d3d0, 0x8395024, 0x89726a, 0x845c64d,
-    0x8b1376, 0x8523c25, 0x8cb6f5, 0x85eb1ab,
-    0x8e5ce5, 0x86b26de, 0x900548, 0x8779bbe,
-    0x91b01d, 0x884104b, 0x935d64, 0x8908483,
-    0x950d1d, 0x89cf867, 0x96bf48, 0x8a96bf6,
-    0x9873e4, 0x8b5df30, 0x9a2af3, 0x8c25213,
-    0x9be473, 0x8cec4a0, 0x9da065, 0x8db36d6,
-    0x9f5ec8, 0x8e7a8b5, 0xa11f9d, 0x8f41a3c,
-    0xa2e2e3, 0x9008b6a, 0xa4a89b, 0x90cfc40,
-    0xa670c4, 0x9196cbc, 0xa83b5e, 0x925dcdf,
-    0xaa086a, 0x9324ca7, 0xabd7e6, 0x93ebc14,
-    0xada9d4, 0x94b2b27, 0xaf7e33, 0x95799dd,
-    0xb15502, 0x9640837, 0xb32e42, 0x9707635,
-    0xb509f3, 0x97ce3d5, 0xb6e815, 0x9895118,
-    0xb8c8a7, 0x995bdfd, 0xbaabaa, 0x9a22a83,
-    0xbc911d, 0x9ae96aa, 0xbe7901, 0x9bb0271,
-    0xc06355, 0x9c76dd8, 0xc25019, 0x9d3d8df,
-    0xc43f4d, 0x9e04385, 0xc630f2, 0x9ecadc9,
-    0xc82506, 0x9f917ac, 0xca1b8a, 0xa05812c,
-    0xcc147f, 0xa11ea49, 0xce0fe3, 0xa1e5303,
-    0xd00db6, 0xa2abb59, 0xd20dfa, 0xa37234a,
-    0xd410ad, 0xa438ad7, 0xd615cf, 0xa4ff1fe,
-    0xd81d61, 0xa5c58c0, 0xda2762, 0xa68bf1b,
-    0xdc33d2, 0xa752510, 0xde42b2, 0xa818a9d,
-    0xe05401, 0xa8defc3, 0xe267be, 0xa9a5480,
-    0xe47deb, 0xaa6b8d5, 0xe69686, 0xab31cc1,
-    0xe8b190, 0xabf8043, 0xeacf09, 0xacbe35b,
-    0xeceef1, 0xad84609, 0xef1147, 0xae4a84b,
-    0xf1360b, 0xaf10a22, 0xf35d3e, 0xafd6b8d,
-    0xf586df, 0xb09cc8c, 0xf7b2ee, 0xb162d1d,
-    0xf9e16b, 0xb228d42, 0xfc1257, 0xb2eecf8,
-    0xfe45b0, 0xb3b4c40, 0x1007b77, 0xb47ab19,
-    0x102b3ac, 0xb540982, 0x104ee4f, 0xb60677c,
-    0x1072b5f, 0xb6cc506, 0x1096add, 0xb79221f,
-    0x10bacc8, 0xb857ec7, 0x10df120, 0xb91dafc,
-    0x11037e6, 0xb9e36c0, 0x1128119, 0xbaa9211,
-    0x114ccb9, 0xbb6ecef, 0x1171ac6, 0xbc34759,
-    0x1196b3f, 0xbcfa150, 0x11bbe26, 0xbdbfad1,
-    0x11e1379, 0xbe853de, 0x1206b39, 0xbf4ac75,
-    0x122c566, 0xc010496, 0x12521ff, 0xc0d5c41,
-    0x1278104, 0xc19b374, 0x129e276, 0xc260a31,
-    0x12c4653, 0xc326075, 0x12eac9d, 0xc3eb641,
-    0x1311553, 0xc4b0b94, 0x1338075, 0xc57606e,
-    0x135ee02, 0xc63b4ce, 0x1385dfb, 0xc7008b3,
-    0x13ad060, 0xc7c5c1e, 0x13d4530, 0xc88af0e,
-    0x13fbc6c, 0xc950182, 0x1423613, 0xca1537a,
-    0x144b225, 0xcada4f5, 0x14730a3, 0xcb9f5f3,
-    0x149b18b, 0xcc64673, 0x14c34df, 0xcd29676,
-    0x14eba9d, 0xcdee5f9, 0x15142c6, 0xceb34fe,
-    0x153cd5a, 0xcf78383, 0x1565a58, 0xd03d189,
-    0x158e9c1, 0xd101f0e, 0x15b7b94, 0xd1c6c11,
-    0x15e0fd1, 0xd28b894, 0x160a678, 0xd350495,
-    0x1633f8a, 0xd415013, 0x165db05, 0xd4d9b0e,
-    0x16878eb, 0xd59e586, 0x16b193a, 0xd662f7b,
-    0x16dbbf3, 0xd7278eb, 0x1706115, 0xd7ec1d6,
-    0x17308a1, 0xd8b0a3d, 0x175b296, 0xd97521d,
-    0x1785ef4, 0xda39978, 0x17b0dbb, 0xdafe04b,
-    0x17dbeec, 0xdbc2698, 0x1807285, 0xdc86c5d,
-    0x1832888, 0xdd4b19a, 0x185e0f3, 0xde0f64f,
-    0x1889bc6, 0xded3a7b, 0x18b5903, 0xdf97e1d,
-    0x18e18a7, 0xe05c135, 0x190dab4, 0xe1203c3,
-    0x1939f29, 0xe1e45c6, 0x1966606, 0xe2a873e,
-    0x1992f4c, 0xe36c82a, 0x19bfaf9, 0xe430889,
-    0x19ec90d, 0xe4f485c, 0x1a1998a, 0xe5b87a2,
-    0x1a46c6e, 0xe67c65a, 0x1a741b9, 0xe740483,
-    0x1aa196c, 0xe80421e, 0x1acf386, 0xe8c7f2a,
-    0x1afd007, 0xe98bba7, 0x1b2aef0, 0xea4f793,
-    0x1b5903f, 0xeb132ef, 0x1b873f5, 0xebd6db9,
-    0x1bb5a11, 0xec9a7f3, 0x1be4294, 0xed5e19a,
-    0x1c12d7e, 0xee21aaf, 0x1c41ace, 0xeee5331,
-    0x1c70a84, 0xefa8b20, 0x1c9fca0, 0xf06c27a,
-    0x1ccf122, 0xf12f941, 0x1cfe80a, 0xf1f2f73,
-    0x1d2e158, 0xf2b650f, 0x1d5dd0c, 0xf379a16,
-    0x1d8db25, 0xf43ce86, 0x1dbdba3, 0xf500260,
-    0x1dede87, 0xf5c35a3, 0x1e1e3d0, 0xf68684e,
-    0x1e4eb7e, 0xf749a61, 0x1e7f591, 0xf80cbdc,
-    0x1eb0209, 0xf8cfcbe, 0x1ee10e5, 0xf992d06,
-    0x1f12227, 0xfa55cb4, 0x1f435cc, 0xfb18bc8,
-    0x1f74bd6, 0xfbdba40, 0x1fa6445, 0xfc9e81e,
-    0x1fd7f17, 0xfd6155f, 0x2009c4e, 0xfe24205,
-    0x203bbe8, 0xfee6e0d, 0x206dde6, 0xffa9979,
-    0x20a0248, 0x1006c446, 0x20d290d, 0x1012ee76,
-    0x2105236, 0x101f1807, 0x2137dc2, 0x102b40f8,
-    0x216abb1, 0x1037694b, 0x219dc03, 0x104390fd,
-    0x21d0eb8, 0x104fb80e, 0x22043d0, 0x105bde7f,
-    0x2237b4b, 0x1068044e, 0x226b528, 0x1074297b,
-    0x229f167, 0x10804e06, 0x22d3009, 0x108c71ee,
-    0x230710d, 0x10989532, 0x233b473, 0x10a4b7d3,
-    0x236fa3b, 0x10b0d9d0, 0x23a4265, 0x10bcfb28,
-    0x23d8cf1, 0x10c91bda, 0x240d9de, 0x10d53be7,
-    0x244292c, 0x10e15b4e, 0x2477adc, 0x10ed7a0e,
-    0x24aceed, 0x10f99827, 0x24e255e, 0x1105b599,
-    0x2517e31, 0x1111d263, 0x254d965, 0x111dee84,
-    0x25836f9, 0x112a09fc, 0x25b96ee, 0x113624cb,
-    0x25ef943, 0x11423ef0, 0x2625df8, 0x114e586a,
-    0x265c50e, 0x115a713a, 0x2692e83, 0x1166895f,
-    0x26c9a58, 0x1172a0d7, 0x270088e, 0x117eb7a4,
-    0x2737922, 0x118acdc4, 0x276ec16, 0x1196e337,
-    0x27a616a, 0x11a2f7fc, 0x27dd91c, 0x11af0c13,
-    0x281532e, 0x11bb1f7c, 0x284cf9f, 0x11c73235,
-    0x2884e6e, 0x11d3443f, 0x28bcf9c, 0x11df5599,
-    0x28f5329, 0x11eb6643, 0x292d914, 0x11f7763c,
-    0x296615d, 0x12038584, 0x299ec05, 0x120f941a,
-    0x29d790a, 0x121ba1fd, 0x2a1086d, 0x1227af2e,
-    0x2a49a2e, 0x1233bbac, 0x2a82e4d, 0x123fc776,
-    0x2abc4c9, 0x124bd28c, 0x2af5da2, 0x1257dced,
-    0x2b2f8d8, 0x1263e699, 0x2b6966c, 0x126fef90,
-    0x2ba365c, 0x127bf7d1, 0x2bdd8a9, 0x1287ff5b,
-    0x2c17d52, 0x1294062f, 0x2c52459, 0x12a00c4b,
-    0x2c8cdbb, 0x12ac11af, 0x2cc7979, 0x12b8165b,
-    0x2d02794, 0x12c41a4f, 0x2d3d80a, 0x12d01d89,
-    0x2d78add, 0x12dc2009, 0x2db400a, 0x12e821cf,
-    0x2def794, 0x12f422db, 0x2e2b178, 0x1300232c,
-    0x2e66db8, 0x130c22c1, 0x2ea2c53, 0x1318219a,
-    0x2eded49, 0x13241fb6, 0x2f1b099, 0x13301d16,
-    0x2f57644, 0x133c19b8, 0x2f93e4a, 0x1348159d,
-    0x2fd08a9, 0x135410c3, 0x300d563, 0x13600b2a,
-    0x304a477, 0x136c04d2, 0x30875e5, 0x1377fdbb,
-    0x30c49ad, 0x1383f5e3, 0x3101fce, 0x138fed4b,
-    0x313f848, 0x139be3f2, 0x317d31c, 0x13a7d9d7,
-    0x31bb049, 0x13b3cefa, 0x31f8fcf, 0x13bfc35b,
-    0x32371ae, 0x13cbb6f8, 0x32755e5, 0x13d7a9d3,
-    0x32b3c75, 0x13e39be9, 0x32f255e, 0x13ef8d3c,
-    0x333109e, 0x13fb7dc9, 0x336fe37, 0x14076d91,
-    0x33aee27, 0x14135c94, 0x33ee070, 0x141f4ad1,
-    0x342d510, 0x142b3846, 0x346cc07, 0x143724f5,
-    0x34ac556, 0x144310dd, 0x34ec0fc, 0x144efbfc,
-    0x352bef9, 0x145ae653, 0x356bf4d, 0x1466cfe1,
-    0x35ac1f7, 0x1472b8a5, 0x35ec6f8, 0x147ea0a0,
-    0x362ce50, 0x148a87d1, 0x366d7fd, 0x14966e36,
-    0x36ae401, 0x14a253d1, 0x36ef25b, 0x14ae38a0,
-    0x373030a, 0x14ba1ca3, 0x377160f, 0x14c5ffd9,
-    0x37b2b6a, 0x14d1e242, 0x37f4319, 0x14ddc3de,
-    0x3835d1e, 0x14e9a4ac, 0x3877978, 0x14f584ac,
-    0x38b9827, 0x150163dc, 0x38fb92a, 0x150d423d,
-    0x393dc82, 0x15191fcf, 0x398022f, 0x1524fc90,
-    0x39c2a2f, 0x1530d881, 0x3a05484, 0x153cb3a0,
-    0x3a4812c, 0x15488dee, 0x3a8b028, 0x1554676a,
-    0x3ace178, 0x15604013, 0x3b1151b, 0x156c17e9,
-    0x3b54b11, 0x1577eeec, 0x3b9835a, 0x1583c51b,
-    0x3bdbdf6, 0x158f9a76, 0x3c1fae5, 0x159b6efb,
-    0x3c63a26, 0x15a742ac, 0x3ca7bba, 0x15b31587,
-    0x3cebfa0, 0x15bee78c, 0x3d305d8, 0x15cab8ba,
-    0x3d74e62, 0x15d68911, 0x3db993e, 0x15e25890,
-    0x3dfe66c, 0x15ee2738, 0x3e435ea, 0x15f9f507,
-    0x3e887bb, 0x1605c1fd, 0x3ecdbdc, 0x16118e1a,
-    0x3f1324e, 0x161d595d, 0x3f58b10, 0x162923c5,
-    0x3f9e624, 0x1634ed53, 0x3fe4388, 0x1640b606,
-    0x402a33c, 0x164c7ddd, 0x4070540, 0x165844d8,
-    0x40b6994, 0x16640af7, 0x40fd037, 0x166fd039,
-    0x414392b, 0x167b949d, 0x418a46d, 0x16875823,
-    0x41d11ff, 0x16931acb, 0x42181e0, 0x169edc94,
-    0x425f410, 0x16aa9d7e, 0x42a688f, 0x16b65d88,
-    0x42edf5c, 0x16c21cb2, 0x4335877, 0x16cddafb,
-    0x437d3e1, 0x16d99864, 0x43c5199, 0x16e554ea,
-    0x440d19e, 0x16f1108f, 0x44553f2, 0x16fccb51,
-    0x449d892, 0x17088531, 0x44e5f80, 0x17143e2d,
-    0x452e8bc, 0x171ff646, 0x4577444, 0x172bad7a,
-    0x45c0219, 0x173763c9, 0x460923b, 0x17431933,
-    0x46524a9, 0x174ecdb8, 0x469b963, 0x175a8157,
-    0x46e5069, 0x1766340f, 0x472e9bc, 0x1771e5e0,
-    0x477855a, 0x177d96ca, 0x47c2344, 0x178946cc,
-    0x480c379, 0x1794f5e6, 0x48565f9, 0x17a0a417,
-    0x48a0ac4, 0x17ac515f, 0x48eb1db, 0x17b7fdbd,
-    0x4935b3c, 0x17c3a931, 0x49806e7, 0x17cf53bb,
-    0x49cb4dd, 0x17dafd59, 0x4a1651c, 0x17e6a60c,
-    0x4a617a6, 0x17f24dd3, 0x4aacc7a, 0x17fdf4ae,
-    0x4af8397, 0x18099a9c, 0x4b43cfd, 0x18153f9d,
-    0x4b8f8ad, 0x1820e3b0, 0x4bdb6a6, 0x182c86d5,
-    0x4c276e8, 0x1838290c, 0x4c73972, 0x1843ca53,
-    0x4cbfe45, 0x184f6aab, 0x4d0c560, 0x185b0a13,
-    0x4d58ec3, 0x1866a88a, 0x4da5a6f, 0x18724611,
-    0x4df2862, 0x187de2a7, 0x4e3f89c, 0x18897e4a,
-    0x4e8cb1e, 0x189518fc, 0x4ed9fe7, 0x18a0b2bb,
-    0x4f276f7, 0x18ac4b87, 0x4f7504e, 0x18b7e35f,
-    0x4fc2bec, 0x18c37a44, 0x50109d0, 0x18cf1034,
-    0x505e9fb, 0x18daa52f, 0x50acc6b, 0x18e63935,
-    0x50fb121, 0x18f1cc45, 0x514981d, 0x18fd5e5f,
-    0x519815f, 0x1908ef82, 0x51e6ce6, 0x19147fae,
-    0x5235ab2, 0x19200ee3, 0x5284ac3, 0x192b9d1f,
-    0x52d3d18, 0x19372a64, 0x53231b3, 0x1942b6af,
-    0x5372891, 0x194e4201, 0x53c21b4, 0x1959cc5a,
-    0x5411d1b, 0x196555b8, 0x5461ac6, 0x1970de1b,
-    0x54b1ab4, 0x197c6584, 0x5501ce5, 0x1987ebf0,
-    0x555215a, 0x19937161, 0x55a2812, 0x199ef5d6,
-    0x55f310d, 0x19aa794d, 0x5643c4a, 0x19b5fbc8,
-    0x56949ca, 0x19c17d44, 0x56e598c, 0x19ccfdc2,
-    0x5736b90, 0x19d87d42, 0x5787fd6, 0x19e3fbc3,
-    0x57d965d, 0x19ef7944, 0x582af26, 0x19faf5c5,
-    0x587ca31, 0x1a067145, 0x58ce77c, 0x1a11ebc5,
-    0x5920708, 0x1a1d6544, 0x59728d5, 0x1a28ddc0,
-    0x59c4ce3, 0x1a34553b, 0x5a17330, 0x1a3fcbb3,
-    0x5a69bbe, 0x1a4b4128, 0x5abc68c, 0x1a56b599,
-    0x5b0f399, 0x1a622907, 0x5b622e6, 0x1a6d9b70,
-    0x5bb5472, 0x1a790cd4, 0x5c0883d, 0x1a847d33,
-    0x5c5be47, 0x1a8fec8c, 0x5caf690, 0x1a9b5adf,
-    0x5d03118, 0x1aa6c82b, 0x5d56ddd, 0x1ab23471,
-    0x5daace1, 0x1abd9faf, 0x5dfee22, 0x1ac909e5,
-    0x5e531a1, 0x1ad47312, 0x5ea775e, 0x1adfdb37,
-    0x5efbf58, 0x1aeb4253, 0x5f5098f, 0x1af6a865,
-    0x5fa5603, 0x1b020d6c, 0x5ffa4b3, 0x1b0d716a,
-    0x604f5a0, 0x1b18d45c, 0x60a48c9, 0x1b243643,
-    0x60f9e2e, 0x1b2f971e, 0x614f5cf, 0x1b3af6ec,
-    0x61a4fac, 0x1b4655ae, 0x61fabc4, 0x1b51b363,
-    0x6250a18, 0x1b5d100a, 0x62a6aa6, 0x1b686ba3,
-    0x62fcd6f, 0x1b73c62d, 0x6353273, 0x1b7f1fa9,
-    0x63a99b1, 0x1b8a7815, 0x6400329, 0x1b95cf71,
-    0x6456edb, 0x1ba125bd, 0x64adcc7, 0x1bac7af9,
-    0x6504ced, 0x1bb7cf23, 0x655bf4c, 0x1bc3223c,
-    0x65b33e4, 0x1bce7442, 0x660aab5, 0x1bd9c537,
-    0x66623be, 0x1be51518, 0x66b9f01, 0x1bf063e6,
-    0x6711c7b, 0x1bfbb1a0, 0x6769c2e, 0x1c06fe46,
-    0x67c1e18, 0x1c1249d8, 0x681a23a, 0x1c1d9454,
-    0x6872894, 0x1c28ddbb, 0x68cb124, 0x1c34260c,
-    0x6923bec, 0x1c3f6d47, 0x697c8eb, 0x1c4ab36b,
-    0x69d5820, 0x1c55f878, 0x6a2e98b, 0x1c613c6d,
-    0x6a87d2d, 0x1c6c7f4a, 0x6ae1304, 0x1c77c10e,
-    0x6b3ab12, 0x1c8301b9, 0x6b94554, 0x1c8e414b,
-    0x6bee1cd, 0x1c997fc4, 0x6c4807a, 0x1ca4bd21,
-    0x6ca215c, 0x1caff965, 0x6cfc472, 0x1cbb348d,
-    0x6d569be, 0x1cc66e99, 0x6db113d, 0x1cd1a78a,
-    0x6e0baf0, 0x1cdcdf5e, 0x6e666d7, 0x1ce81615,
-    0x6ec14f2, 0x1cf34baf, 0x6f1c540, 0x1cfe802b,
-    0x6f777c1, 0x1d09b389, 0x6fd2c75, 0x1d14e5c9,
-    0x702e35c, 0x1d2016e9, 0x7089c75, 0x1d2b46ea,
-    0x70e57c0, 0x1d3675cb, 0x714153e, 0x1d41a38c,
-    0x719d4ed, 0x1d4cd02c, 0x71f96ce, 0x1d57fbaa,
-    0x7255ae0, 0x1d632608, 0x72b2123, 0x1d6e4f43,
-    0x730e997, 0x1d79775c, 0x736b43c, 0x1d849e51,
-    0x73c8111, 0x1d8fc424, 0x7425016, 0x1d9ae8d2,
-    0x748214c, 0x1da60c5d, 0x74df4b1, 0x1db12ec3,
-    0x753ca46, 0x1dbc5004, 0x759a20a, 0x1dc7701f,
-    0x75f7bfe, 0x1dd28f15, 0x7655820, 0x1dddace4,
-    0x76b3671, 0x1de8c98c, 0x77116f0, 0x1df3e50d,
-    0x776f99d, 0x1dfeff67, 0x77cde79, 0x1e0a1898,
-    0x782c582, 0x1e1530a1, 0x788aeb9, 0x1e204781,
-    0x78e9a1d, 0x1e2b5d38, 0x79487ae, 0x1e3671c5,
-    0x79a776c, 0x1e418528, 0x7a06957, 0x1e4c9760,
-    0x7a65d6e, 0x1e57a86d, 0x7ac53b1, 0x1e62b84f,
-    0x7b24c20, 0x1e6dc705, 0x7b846ba, 0x1e78d48e,
-    0x7be4381, 0x1e83e0eb, 0x7c44272, 0x1e8eec1b,
-    0x7ca438f, 0x1e99f61d, 0x7d046d6, 0x1ea4fef0,
-    0x7d64c47, 0x1eb00696, 0x7dc53e3, 0x1ebb0d0d,
-    0x7e25daa, 0x1ec61254, 0x7e8699a, 0x1ed1166b,
-    0x7ee77b3, 0x1edc1953, 0x7f487f6, 0x1ee71b0a,
-    0x7fa9a62, 0x1ef21b90, 0x800aef7, 0x1efd1ae4,
-    0x806c5b5, 0x1f081907, 0x80cde9b, 0x1f1315f7,
-    0x812f9a9, 0x1f1e11b5, 0x81916df, 0x1f290c3f,
-    0x81f363d, 0x1f340596, 0x82557c3, 0x1f3efdb9,
-    0x82b7b70, 0x1f49f4a8, 0x831a143, 0x1f54ea62,
-    0x837c93e, 0x1f5fdee6, 0x83df35f, 0x1f6ad235,
-    0x8441fa6, 0x1f75c44e, 0x84a4e14, 0x1f80b531,
-    0x8507ea7, 0x1f8ba4dc, 0x856b160, 0x1f969350,
-    0x85ce63e, 0x1fa1808c, 0x8631d42, 0x1fac6c91,
-    0x869566a, 0x1fb7575c, 0x86f91b7, 0x1fc240ef,
-    0x875cf28, 0x1fcd2948, 0x87c0ebd, 0x1fd81067,
-    0x8825077, 0x1fe2f64c, 0x8889454, 0x1feddaf6,
-    0x88eda54, 0x1ff8be65, 0x8952278, 0x2003a099,
-    0x89b6cbf, 0x200e8190, 0x8a1b928, 0x2019614c,
-    0x8a807b4, 0x20243fca, 0x8ae5862, 0x202f1d0b,
-    0x8b4ab32, 0x2039f90f, 0x8bb0023, 0x2044d3d4,
-    0x8c15736, 0x204fad5b, 0x8c7b06b, 0x205a85a3,
-    0x8ce0bc0, 0x20655cac, 0x8d46936, 0x20703275,
-    0x8dac8cd, 0x207b06fe, 0x8e12a84, 0x2085da46,
-    0x8e78e5b, 0x2090ac4d, 0x8edf452, 0x209b7d13,
-    0x8f45c68, 0x20a64c97, 0x8fac69e, 0x20b11ad9,
-    0x90132f2, 0x20bbe7d8, 0x907a166, 0x20c6b395,
-    0x90e11f7, 0x20d17e0d, 0x91484a8, 0x20dc4742,
-    0x91af976, 0x20e70f32, 0x9217062, 0x20f1d5de,
-    0x927e96b, 0x20fc9b44, 0x92e6492, 0x21075f65,
-    0x934e1d6, 0x21122240, 0x93b6137, 0x211ce3d5,
-    0x941e2b4, 0x2127a423, 0x948664d, 0x21326329,
-    0x94eec03, 0x213d20e8, 0x95573d4, 0x2147dd5f,
-    0x95bfdc1, 0x2152988d, 0x96289c9, 0x215d5273,
-    0x96917ec, 0x21680b0f, 0x96fa82a, 0x2172c262,
-    0x9763a83, 0x217d786a, 0x97ccef5, 0x21882d28,
-    0x9836582, 0x2192e09b, 0x989fe29, 0x219d92c2,
-    0x99098e9, 0x21a8439e, 0x99735c2, 0x21b2f32e,
-    0x99dd4b4, 0x21bda171, 0x9a475bf, 0x21c84e67,
-    0x9ab18e3, 0x21d2fa0f, 0x9b1be1e, 0x21dda46a,
-    0x9b86572, 0x21e84d76, 0x9bf0edd, 0x21f2f534,
-    0x9c5ba60, 0x21fd9ba3, 0x9cc67fa, 0x220840c2,
-    0x9d317ab, 0x2212e492, 0x9d9c973, 0x221d8711,
-    0x9e07d51, 0x2228283f, 0x9e73346, 0x2232c81c,
-    0x9edeb50, 0x223d66a8, 0x9f4a570, 0x224803e2,
-    0x9fb61a5, 0x22529fca, 0xa021fef, 0x225d3a5e,
-    0xa08e04f, 0x2267d3a0, 0xa0fa2c3, 0x22726b8e,
-    0xa16674b, 0x227d0228, 0xa1d2de7, 0x2287976e,
-    0xa23f698, 0x22922b5e, 0xa2ac15b, 0x229cbdfa,
-    0xa318e32, 0x22a74f40, 0xa385d1d, 0x22b1df30,
-    0xa3f2e19, 0x22bc6dca, 0xa460129, 0x22c6fb0c,
-    0xa4cd64b, 0x22d186f8, 0xa53ad7e, 0x22dc118c,
-    0xa5a86c4, 0x22e69ac8, 0xa61621b, 0x22f122ab,
-    0xa683f83, 0x22fba936, 0xa6f1efc, 0x23062e67,
-    0xa760086, 0x2310b23e, 0xa7ce420, 0x231b34bc,
-    0xa83c9ca, 0x2325b5df, 0xa8ab184, 0x233035a7,
-    0xa919b4e, 0x233ab414, 0xa988727, 0x23453125,
-    0xa9f750f, 0x234facda, 0xaa66506, 0x235a2733,
-    0xaad570c, 0x2364a02e, 0xab44b1f, 0x236f17cc,
-    0xabb4141, 0x23798e0d, 0xac23971, 0x238402ef,
-    0xac933ae, 0x238e7673, 0xad02ff8, 0x2398e898,
-    0xad72e4f, 0x23a3595e, 0xade2eb3, 0x23adc8c4,
-    0xae53123, 0x23b836ca, 0xaec35a0, 0x23c2a36f,
-    0xaf33c28, 0x23cd0eb3, 0xafa44bc, 0x23d77896,
-    0xb014f5b, 0x23e1e117, 0xb085c05, 0x23ec4837,
-    0xb0f6aba, 0x23f6adf3, 0xb167b79, 0x2401124d,
-    0xb1d8e43, 0x240b7543, 0xb24a316, 0x2415d6d5,
-    0xb2bb9f4, 0x24203704, 0xb32d2da, 0x242a95ce,
-    0xb39edca, 0x2434f332, 0xb410ac3, 0x243f4f32,
-    0xb4829c4, 0x2449a9cc, 0xb4f4acd, 0x245402ff,
-    0xb566ddf, 0x245e5acc, 0xb5d92f8, 0x2468b132,
-    0xb64ba19, 0x24730631, 0xb6be341, 0x247d59c8,
-    0xb730e70, 0x2487abf7, 0xb7a3ba5, 0x2491fcbe,
-    0xb816ae1, 0x249c4c1b, 0xb889c23, 0x24a69a0f,
-    0xb8fcf6b, 0x24b0e699, 0xb9704b9, 0x24bb31ba,
-    0xb9e3c0b, 0x24c57b6f, 0xba57563, 0x24cfc3ba,
-    0xbacb0bf, 0x24da0a9a, 0xbb3ee20, 0x24e4500e,
-    0xbbb2d85, 0x24ee9415, 0xbc26eee, 0x24f8d6b0,
-    0xbc9b25a, 0x250317df, 0xbd0f7ca, 0x250d57a0,
-    0xbd83f3d, 0x251795f3, 0xbdf88b3, 0x2521d2d8,
-    0xbe6d42b, 0x252c0e4f, 0xbee21a5, 0x25364857,
-    0xbf57121, 0x254080ef, 0xbfcc29f, 0x254ab818,
-    0xc04161e, 0x2554edd1, 0xc0b6b9e, 0x255f2219,
-    0xc12c31f, 0x256954f1, 0xc1a1ca0, 0x25738657,
-    0xc217822, 0x257db64c, 0xc28d5a3, 0x2587e4cf,
-    0xc303524, 0x259211df, 0xc3796a5, 0x259c3d7c,
-    0xc3efa25, 0x25a667a7, 0xc465fa3, 0x25b0905d,
-    0xc4dc720, 0x25bab7a0, 0xc55309b, 0x25c4dd6e,
-    0xc5c9c14, 0x25cf01c8, 0xc64098b, 0x25d924ac,
-    0xc6b78ff, 0x25e3461b, 0xc72ea70, 0x25ed6614,
-    0xc7a5dde, 0x25f78497, 0xc81d349, 0x2601a1a2,
-    0xc894aaf, 0x260bbd37, 0xc90c412, 0x2615d754,
-    0xc983f70, 0x261feffa, 0xc9fbcca, 0x262a0727,
-    0xca73c1e, 0x26341cdb, 0xcaebd6e, 0x263e3117,
-    0xcb640b8, 0x264843d9, 0xcbdc5fc, 0x26525521,
-    0xcc54d3a, 0x265c64ef, 0xcccd671, 0x26667342,
-    0xcd461a2, 0x2670801a, 0xcdbeecc, 0x267a8b77,
-    0xce37def, 0x26849558, 0xceb0f0a, 0x268e9dbd,
-    0xcf2a21d, 0x2698a4a6, 0xcfa3729, 0x26a2aa11,
-    0xd01ce2b, 0x26acadff, 0xd096725, 0x26b6b070,
-    0xd110216, 0x26c0b162, 0xd189efe, 0x26cab0d6,
-    0xd203ddc, 0x26d4aecb, 0xd27deb0, 0x26deab41,
-    0xd2f817b, 0x26e8a637, 0xd37263a, 0x26f29fad,
-    0xd3eccef, 0x26fc97a3, 0xd467599, 0x27068e18,
-    0xd4e2037, 0x2710830c, 0xd55ccca, 0x271a767e,
-    0xd5d7b50, 0x2724686e, 0xd652bcb, 0x272e58dc,
-    0xd6cde39, 0x273847c8, 0xd74929a, 0x27423530,
-    0xd7c48ee, 0x274c2115, 0xd840134, 0x27560b76,
-    0xd8bbb6d, 0x275ff452, 0xd937798, 0x2769dbaa,
-    0xd9b35b4, 0x2773c17d, 0xda2f5c2, 0x277da5cb,
-    0xdaab7c0, 0x27878893, 0xdb27bb0, 0x279169d5,
-    0xdba4190, 0x279b4990, 0xdc20960, 0x27a527c4,
-    0xdc9d320, 0x27af0472, 0xdd19ed0, 0x27b8df97,
-    0xdd96c6f, 0x27c2b934, 0xde13bfd, 0x27cc9149,
-    0xde90d79, 0x27d667d5, 0xdf0e0e4, 0x27e03cd8,
-    0xdf8b63d, 0x27ea1052, 0xe008d84, 0x27f3e241,
-    0xe0866b8, 0x27fdb2a7, 0xe1041d9, 0x28078181,
-    0xe181ee8, 0x28114ed0, 0xe1ffde2, 0x281b1a94,
-    0xe27dec9, 0x2824e4cc, 0xe2fc19c, 0x282ead78,
-    0xe37a65b, 0x28387498, 0xe3f8d05, 0x28423a2a,
-    0xe47759a, 0x284bfe2f, 0xe4f6019, 0x2855c0a6,
-    0xe574c84, 0x285f8190, 0xe5f3ad8, 0x286940ea,
-    0xe672b16, 0x2872feb6, 0xe6f1d3d, 0x287cbaf3,
-    0xe77114e, 0x288675a0, 0xe7f0748, 0x28902ebd,
-    0xe86ff2a, 0x2899e64a, 0xe8ef8f4, 0x28a39c46,
-    0xe96f4a7, 0x28ad50b1, 0xe9ef241, 0x28b7038b,
-    0xea6f1c2, 0x28c0b4d2, 0xeaef32b, 0x28ca6488,
-    0xeb6f67a, 0x28d412ab, 0xebefbb0, 0x28ddbf3b,
-    0xec702cb, 0x28e76a37, 0xecf0bcd, 0x28f113a0,
-    0xed716b4, 0x28fabb75, 0xedf2380, 0x290461b5,
-    0xee73231, 0x290e0661, 0xeef42c7, 0x2917a977,
-    0xef75541, 0x29214af8, 0xeff699f, 0x292aeae3,
-    0xf077fe1, 0x29348937, 0xf0f9805, 0x293e25f5,
-    0xf17b20d, 0x2947c11c, 0xf1fcdf8, 0x29515aab,
-    0xf27ebc5, 0x295af2a3, 0xf300b74, 0x29648902,
-    0xf382d05, 0x296e1dc9, 0xf405077, 0x2977b0f7,
-    0xf4875ca, 0x2981428c, 0xf509cfe, 0x298ad287,
-    0xf58c613, 0x299460e8, 0xf60f108, 0x299dedaf,
-    0xf691ddd, 0x29a778db, 0xf714c91, 0x29b1026c,
-    0xf797d24, 0x29ba8a61, 0xf81af97, 0x29c410ba,
-    0xf89e3e8, 0x29cd9578, 0xf921a17, 0x29d71899,
-    0xf9a5225, 0x29e09a1c, 0xfa28c10, 0x29ea1a03,
-    0xfaac7d8, 0x29f3984c, 0xfb3057d, 0x29fd14f6,
-    0xfbb4500, 0x2a069003, 0xfc3865e, 0x2a100970,
-    0xfcbc999, 0x2a19813f, 0xfd40eaf, 0x2a22f76e,
-    0xfdc55a1, 0x2a2c6bfd, 0xfe49e6d, 0x2a35deeb,
-    0xfece915, 0x2a3f503a, 0xff53597, 0x2a48bfe7,
-    0xffd83f4, 0x2a522df3, 0x1005d42a, 0x2a5b9a5d,
-    0x100e2639, 0x2a650525, 0x10167a22, 0x2a6e6e4b,
-    0x101ecfe4, 0x2a77d5ce, 0x1027277e, 0x2a813bae,
-    0x102f80f1, 0x2a8a9fea, 0x1037dc3b, 0x2a940283,
-    0x1040395d, 0x2a9d6377, 0x10489856, 0x2aa6c2c6,
-    0x1050f926, 0x2ab02071, 0x10595bcd, 0x2ab97c77,
-    0x1061c04a, 0x2ac2d6d6, 0x106a269d, 0x2acc2f90,
-    0x10728ec6, 0x2ad586a3, 0x107af8c4, 0x2adedc10,
-    0x10836497, 0x2ae82fd5, 0x108bd23f, 0x2af181f3,
-    0x109441bb, 0x2afad269, 0x109cb30b, 0x2b042137,
-    0x10a5262f, 0x2b0d6e5c, 0x10ad9b26, 0x2b16b9d9,
-    0x10b611f1, 0x2b2003ac, 0x10be8a8d, 0x2b294bd5,
-    0x10c704fd, 0x2b329255, 0x10cf813e, 0x2b3bd72a,
-    0x10d7ff51, 0x2b451a55, 0x10e07f36, 0x2b4e5bd4,
-    0x10e900ec, 0x2b579ba8, 0x10f18472, 0x2b60d9d0,
-    0x10fa09c9, 0x2b6a164d, 0x110290f0, 0x2b73511c,
-    0x110b19e7, 0x2b7c8a3f, 0x1113a4ad, 0x2b85c1b5,
-    0x111c3142, 0x2b8ef77d, 0x1124bfa6, 0x2b982b97,
-    0x112d4fd9, 0x2ba15e03, 0x1135e1d9, 0x2baa8ec0,
-    0x113e75a8, 0x2bb3bdce, 0x11470b44, 0x2bbceb2d,
-    0x114fa2ad, 0x2bc616dd, 0x11583be2, 0x2bcf40dc,
-    0x1160d6e5, 0x2bd8692b, 0x116973b3, 0x2be18fc9,
-    0x1172124d, 0x2beab4b6, 0x117ab2b3, 0x2bf3d7f2,
-    0x118354e4, 0x2bfcf97c, 0x118bf8e0, 0x2c061953,
-    0x11949ea6, 0x2c0f3779, 0x119d4636, 0x2c1853eb,
-    0x11a5ef90, 0x2c216eaa, 0x11ae9ab4, 0x2c2a87b6,
-    0x11b747a0, 0x2c339f0e, 0x11bff656, 0x2c3cb4b1,
-    0x11c8a6d4, 0x2c45c8a0, 0x11d1591a, 0x2c4edada,
-    0x11da0d28, 0x2c57eb5e, 0x11e2c2fd, 0x2c60fa2d,
-    0x11eb7a9a, 0x2c6a0746, 0x11f433fd, 0x2c7312a9,
-    0x11fcef27, 0x2c7c1c55, 0x1205ac17, 0x2c85244a,
-    0x120e6acc, 0x2c8e2a87, 0x12172b48, 0x2c972f0d,
-    0x121fed88, 0x2ca031da, 0x1228b18d, 0x2ca932ef,
-    0x12317756, 0x2cb2324c, 0x123a3ee4, 0x2cbb2fef,
-    0x12430835, 0x2cc42bd9, 0x124bd34a, 0x2ccd2609,
-    0x1254a021, 0x2cd61e7f, 0x125d6ebc, 0x2cdf153a,
-    0x12663f19, 0x2ce80a3a, 0x126f1138, 0x2cf0fd80,
-    0x1277e518, 0x2cf9ef09, 0x1280babb, 0x2d02ded7,
-    0x1289921e, 0x2d0bcce8, 0x12926b41, 0x2d14b93d,
-    0x129b4626, 0x2d1da3d5, 0x12a422ca, 0x2d268cb0,
-    0x12ad012e, 0x2d2f73cd, 0x12b5e151, 0x2d38592c,
-    0x12bec333, 0x2d413ccd, 0x12c7a6d4, 0x2d4a1eaf,
-    0x12d08c33, 0x2d52fed2, 0x12d97350, 0x2d5bdd36,
-    0x12e25c2b, 0x2d64b9da, 0x12eb46c3, 0x2d6d94bf,
-    0x12f43318, 0x2d766de2, 0x12fd2129, 0x2d7f4545,
-    0x130610f7, 0x2d881ae8, 0x130f0280, 0x2d90eec8,
-    0x1317f5c6, 0x2d99c0e7, 0x1320eac6, 0x2da29144,
-    0x1329e181, 0x2dab5fdf, 0x1332d9f7, 0x2db42cb6,
-    0x133bd427, 0x2dbcf7cb, 0x1344d011, 0x2dc5c11c,
-    0x134dcdb4, 0x2dce88aa, 0x1356cd11, 0x2dd74e73,
-    0x135fce26, 0x2de01278, 0x1368d0f3, 0x2de8d4b8,
-    0x1371d579, 0x2df19534, 0x137adbb6, 0x2dfa53e9,
-    0x1383e3ab, 0x2e0310d9, 0x138ced57, 0x2e0bcc03,
-    0x1395f8ba, 0x2e148566, 0x139f05d3, 0x2e1d3d03,
-    0x13a814a2, 0x2e25f2d8, 0x13b12526, 0x2e2ea6e6,
-    0x13ba3760, 0x2e37592c, 0x13c34b4f, 0x2e4009aa,
-    0x13cc60f2, 0x2e48b860, 0x13d5784a, 0x2e51654c,
-    0x13de9156, 0x2e5a1070, 0x13e7ac15, 0x2e62b9ca,
-    0x13f0c887, 0x2e6b615a, 0x13f9e6ad, 0x2e740720,
-    0x14030684, 0x2e7cab1c, 0x140c280e, 0x2e854d4d,
-    0x14154b4a, 0x2e8dedb3, 0x141e7037, 0x2e968c4d,
-    0x142796d5, 0x2e9f291b, 0x1430bf24, 0x2ea7c41e,
-    0x1439e923, 0x2eb05d53, 0x144314d3, 0x2eb8f4bc,
-    0x144c4232, 0x2ec18a58, 0x14557140, 0x2eca1e27,
-    0x145ea1fd, 0x2ed2b027, 0x1467d469, 0x2edb405a,
-    0x14710883, 0x2ee3cebe, 0x147a3e4b, 0x2eec5b53,
-    0x148375c1, 0x2ef4e619, 0x148caee4, 0x2efd6f10,
-    0x1495e9b3, 0x2f05f637, 0x149f2630, 0x2f0e7b8e,
-    0x14a86458, 0x2f16ff14, 0x14b1a42c, 0x2f1f80ca,
-    0x14bae5ab, 0x2f2800af, 0x14c428d6, 0x2f307ec2,
-    0x14cd6dab, 0x2f38fb03, 0x14d6b42b, 0x2f417573,
-    0x14dffc54, 0x2f49ee0f, 0x14e94627, 0x2f5264da,
-    0x14f291a4, 0x2f5ad9d1, 0x14fbdec9, 0x2f634cf5,
-    0x15052d97, 0x2f6bbe45, 0x150e7e0d, 0x2f742dc1,
-    0x1517d02b, 0x2f7c9b69, 0x152123f0, 0x2f85073c,
-    0x152a795d, 0x2f8d713a, 0x1533d070, 0x2f95d963,
-    0x153d292a, 0x2f9e3fb6, 0x15468389, 0x2fa6a433,
-    0x154fdf8f, 0x2faf06da, 0x15593d3a, 0x2fb767aa,
-    0x15629c89, 0x2fbfc6a3, 0x156bfd7d, 0x2fc823c5,
-    0x15756016, 0x2fd07f0f, 0x157ec452, 0x2fd8d882,
-    0x15882a32, 0x2fe1301c, 0x159191b5, 0x2fe985de,
-    0x159afadb, 0x2ff1d9c7, 0x15a465a3, 0x2ffa2bd6,
-    0x15add20d, 0x30027c0c, 0x15b74019, 0x300aca69,
-    0x15c0afc6, 0x301316eb, 0x15ca2115, 0x301b6193,
-    0x15d39403, 0x3023aa5f, 0x15dd0892, 0x302bf151,
-    0x15e67ec1, 0x30343667, 0x15eff690, 0x303c79a2,
-    0x15f96ffd, 0x3044bb00, 0x1602eb0a, 0x304cfa83,
-    0x160c67b4, 0x30553828, 0x1615e5fd, 0x305d73f0,
-    0x161f65e4, 0x3065addb, 0x1628e767, 0x306de5e9,
-    0x16326a88, 0x30761c18, 0x163bef46, 0x307e5069,
-    0x1645759f, 0x308682dc, 0x164efd94, 0x308eb36f,
-    0x16588725, 0x3096e223, 0x16621251, 0x309f0ef8,
-    0x166b9f18, 0x30a739ed, 0x16752d79, 0x30af6302,
-    0x167ebd74, 0x30b78a36, 0x16884f09, 0x30bfaf89,
-    0x1691e237, 0x30c7d2fb, 0x169b76fe, 0x30cff48c,
-    0x16a50d5d, 0x30d8143b, 0x16aea555, 0x30e03208,
-    0x16b83ee4, 0x30e84df3, 0x16c1da0b, 0x30f067fb,
-    0x16cb76c9, 0x30f8801f, 0x16d5151d, 0x31009661,
-    0x16deb508, 0x3108aabf, 0x16e85689, 0x3110bd39,
-    0x16f1f99f, 0x3118cdcf, 0x16fb9e4b, 0x3120dc80,
-    0x1705448b, 0x3128e94c, 0x170eec60, 0x3130f433,
-    0x171895c9, 0x3138fd35, 0x172240c5, 0x31410450,
-    0x172bed55, 0x31490986, 0x17359b78, 0x31510cd5,
-    0x173f4b2e, 0x31590e3e, 0x1748fc75, 0x31610dbf,
-    0x1752af4f, 0x31690b59, 0x175c63ba, 0x3171070c,
-    0x176619b6, 0x317900d6, 0x176fd143, 0x3180f8b8,
-    0x17798a60, 0x3188eeb2, 0x1783450d, 0x3190e2c3,
-    0x178d014a, 0x3198d4ea, 0x1796bf16, 0x31a0c528,
-    0x17a07e70, 0x31a8b37c, 0x17aa3f5a, 0x31b09fe7,
-    0x17b401d1, 0x31b88a66, 0x17bdc5d6, 0x31c072fb,
-    0x17c78b68, 0x31c859a5, 0x17d15288, 0x31d03e64,
-    0x17db1b34, 0x31d82137, 0x17e4e56c, 0x31e0021e,
-    0x17eeb130, 0x31e7e118, 0x17f87e7f, 0x31efbe27,
-    0x18024d59, 0x31f79948, 0x180c1dbf, 0x31ff727c,
-    0x1815efae, 0x320749c3, 0x181fc328, 0x320f1f1c,
-    0x1829982b, 0x3216f287, 0x18336eb7, 0x321ec403,
-    0x183d46cc, 0x32269391, 0x18472069, 0x322e6130,
-    0x1850fb8e, 0x32362ce0, 0x185ad83c, 0x323df6a0,
-    0x1864b670, 0x3245be70, 0x186e962b, 0x324d8450,
-    0x1878776d, 0x32554840, 0x18825a35, 0x325d0a3e,
-    0x188c3e83, 0x3264ca4c, 0x18962456, 0x326c8868,
-    0x18a00bae, 0x32744493, 0x18a9f48a, 0x327bfecc,
-    0x18b3deeb, 0x3283b712, 0x18bdcad0, 0x328b6d66,
-    0x18c7b838, 0x329321c7, 0x18d1a724, 0x329ad435,
-    0x18db9792, 0x32a284b0, 0x18e58982, 0x32aa3336,
-    0x18ef7cf4, 0x32b1dfc9, 0x18f971e8, 0x32b98a67,
-    0x1903685d, 0x32c13311, 0x190d6053, 0x32c8d9c6,
-    0x191759c9, 0x32d07e85, 0x192154bf, 0x32d82150,
-    0x192b5135, 0x32dfc224, 0x19354f2a, 0x32e76102,
-    0x193f4e9e, 0x32eefdea, 0x19494f90, 0x32f698db,
-    0x19535201, 0x32fe31d5, 0x195d55ef, 0x3305c8d7,
-    0x19675b5a, 0x330d5de3, 0x19716243, 0x3314f0f6,
-    0x197b6aa8, 0x331c8211, 0x19857489, 0x33241134,
-    0x198f7fe6, 0x332b9e5e, 0x19998cbe, 0x3333298f,
-    0x19a39b11, 0x333ab2c6, 0x19adaadf, 0x33423a04,
-    0x19b7bc27, 0x3349bf48, 0x19c1cee9, 0x33514292,
-    0x19cbe325, 0x3358c3e2, 0x19d5f8d9, 0x33604336,
-    0x19e01006, 0x3367c090, 0x19ea28ac, 0x336f3bee,
-    0x19f442c9, 0x3376b551, 0x19fe5e5e, 0x337e2cb7,
-    0x1a087b69, 0x3385a222, 0x1a1299ec, 0x338d1590,
-    0x1a1cb9e5, 0x33948701, 0x1a26db54, 0x339bf675,
-    0x1a30fe38, 0x33a363ec, 0x1a3b2292, 0x33aacf65,
-    0x1a454860, 0x33b238e0, 0x1a4f6fa3, 0x33b9a05d,
-    0x1a599859, 0x33c105db, 0x1a63c284, 0x33c8695b,
-    0x1a6dee21, 0x33cfcadc, 0x1a781b31, 0x33d72a5d,
-    0x1a8249b4, 0x33de87de, 0x1a8c79a9, 0x33e5e360,
-    0x1a96ab0f, 0x33ed3ce1, 0x1aa0dde7, 0x33f49462,
-    0x1aab122f, 0x33fbe9e2, 0x1ab547e8, 0x34033d61,
-    0x1abf7f11, 0x340a8edf, 0x1ac9b7a9, 0x3411de5b,
-    0x1ad3f1b1, 0x34192bd5, 0x1ade2d28, 0x3420774d,
-    0x1ae86a0d, 0x3427c0c3, 0x1af2a860, 0x342f0836,
-    0x1afce821, 0x34364da6, 0x1b072950, 0x343d9112,
-    0x1b116beb, 0x3444d27b, 0x1b1baff2, 0x344c11e0,
-    0x1b25f566, 0x34534f41, 0x1b303c46, 0x345a8a9d,
-    0x1b3a8491, 0x3461c3f5, 0x1b44ce46, 0x3468fb47,
-    0x1b4f1967, 0x34703095, 0x1b5965f1, 0x347763dd,
-    0x1b63b3e5, 0x347e951f, 0x1b6e0342, 0x3485c45b,
-    0x1b785409, 0x348cf190, 0x1b82a638, 0x34941cbf,
-    0x1b8cf9cf, 0x349b45e7, 0x1b974ece, 0x34a26d08,
-    0x1ba1a534, 0x34a99221, 0x1babfd01, 0x34b0b533,
-    0x1bb65634, 0x34b7d63c, 0x1bc0b0ce, 0x34bef53d,
-    0x1bcb0cce, 0x34c61236, 0x1bd56a32, 0x34cd2d26,
-    0x1bdfc8fc, 0x34d4460c, 0x1bea292b, 0x34db5cea,
-    0x1bf48abd, 0x34e271bd, 0x1bfeedb3, 0x34e98487,
-    0x1c09520d, 0x34f09546, 0x1c13b7c9, 0x34f7a3fb,
-    0x1c1e1ee9, 0x34feb0a5, 0x1c28876a, 0x3505bb44,
-    0x1c32f14d, 0x350cc3d8, 0x1c3d5c91, 0x3513ca60,
-    0x1c47c936, 0x351acedd, 0x1c52373c, 0x3521d14d,
-    0x1c5ca6a2, 0x3528d1b1, 0x1c671768, 0x352fd008,
-    0x1c71898d, 0x3536cc52, 0x1c7bfd11, 0x353dc68f,
-    0x1c8671f3, 0x3544bebf, 0x1c90e834, 0x354bb4e1,
-    0x1c9b5fd2, 0x3552a8f4, 0x1ca5d8cd, 0x35599afa,
-    0x1cb05326, 0x35608af1, 0x1cbacedb, 0x356778d9,
-    0x1cc54bec, 0x356e64b2, 0x1ccfca59, 0x35754e7c,
-    0x1cda4a21, 0x357c3636, 0x1ce4cb44, 0x35831be0,
-    0x1cef4dc2, 0x3589ff7a, 0x1cf9d199, 0x3590e104,
-    0x1d0456ca, 0x3597c07d, 0x1d0edd55, 0x359e9de5,
-    0x1d196538, 0x35a5793c, 0x1d23ee74, 0x35ac5282,
-    0x1d2e7908, 0x35b329b5, 0x1d3904f4, 0x35b9fed7,
-    0x1d439236, 0x35c0d1e7, 0x1d4e20d0, 0x35c7a2e3,
-    0x1d58b0c0, 0x35ce71ce, 0x1d634206, 0x35d53ea5,
-    0x1d6dd4a2, 0x35dc0968, 0x1d786892, 0x35e2d219,
-    0x1d82fdd8, 0x35e998b5, 0x1d8d9472, 0x35f05d3d,
-    0x1d982c60, 0x35f71fb1, 0x1da2c5a2, 0x35fde011,
-    0x1dad6036, 0x36049e5b, 0x1db7fc1e, 0x360b5a90,
-    0x1dc29958, 0x361214b0, 0x1dcd37e4, 0x3618ccba,
-    0x1dd7d7c1, 0x361f82af, 0x1de278ef, 0x3626368d,
-    0x1ded1b6e, 0x362ce855, 0x1df7bf3e, 0x36339806,
-    0x1e02645d, 0x363a45a0, 0x1e0d0acc, 0x3640f123,
-    0x1e17b28a, 0x36479a8e, 0x1e225b96, 0x364e41e2,
-    0x1e2d05f1, 0x3654e71d, 0x1e37b199, 0x365b8a41,
-    0x1e425e8f, 0x36622b4c, 0x1e4d0cd2, 0x3668ca3e,
-    0x1e57bc62, 0x366f6717, 0x1e626d3e, 0x367601d7,
-    0x1e6d1f65, 0x367c9a7e, 0x1e77d2d8, 0x3683310b,
-    0x1e828796, 0x3689c57d, 0x1e8d3d9e, 0x369057d6,
-    0x1e97f4f1, 0x3696e814, 0x1ea2ad8d, 0x369d7637,
-    0x1ead6773, 0x36a4023f, 0x1eb822a1, 0x36aa8c2c,
-    0x1ec2df18, 0x36b113fd, 0x1ecd9cd7, 0x36b799b3,
-    0x1ed85bdd, 0x36be1d4c, 0x1ee31c2b, 0x36c49ec9,
-    0x1eedddc0, 0x36cb1e2a, 0x1ef8a09b, 0x36d19b6e,
-    0x1f0364bc, 0x36d81695, 0x1f0e2a22, 0x36de8f9e,
-    0x1f18f0ce, 0x36e5068a, 0x1f23b8be, 0x36eb7b58,
-    0x1f2e81f3, 0x36f1ee09, 0x1f394c6b, 0x36f85e9a,
-    0x1f441828, 0x36fecd0e, 0x1f4ee527, 0x37053962,
-    0x1f59b369, 0x370ba398, 0x1f6482ed, 0x37120bae,
-    0x1f6f53b3, 0x371871a5, 0x1f7a25ba, 0x371ed57c,
-    0x1f84f902, 0x37253733, 0x1f8fcd8b, 0x372b96ca,
-    0x1f9aa354, 0x3731f440, 0x1fa57a5d, 0x37384f95,
-    0x1fb052a5, 0x373ea8ca, 0x1fbb2c2c, 0x3744ffdd,
-    0x1fc606f1, 0x374b54ce, 0x1fd0e2f5, 0x3751a79e,
-    0x1fdbc036, 0x3757f84c, 0x1fe69eb4, 0x375e46d8,
-    0x1ff17e70, 0x37649341, 0x1ffc5f67, 0x376add88,
-    0x2007419b, 0x377125ac, 0x2012250a, 0x37776bac,
-    0x201d09b4, 0x377daf89, 0x2027ef99, 0x3783f143,
-    0x2032d6b8, 0x378a30d8, 0x203dbf11, 0x37906e49,
-    0x2048a8a4, 0x3796a996, 0x2053936f, 0x379ce2be,
-    0x205e7f74, 0x37a319c2, 0x20696cb0, 0x37a94ea0,
-    0x20745b24, 0x37af8159, 0x207f4acf, 0x37b5b1ec,
-    0x208a3bb2, 0x37bbe05a, 0x20952dcb, 0x37c20ca1,
-    0x20a0211a, 0x37c836c2, 0x20ab159e, 0x37ce5ebd,
-    0x20b60b58, 0x37d48490, 0x20c10247, 0x37daa83d,
-    0x20cbfa6a, 0x37e0c9c3, 0x20d6f3c1, 0x37e6e921,
-    0x20e1ee4b, 0x37ed0657, 0x20ecea09, 0x37f32165,
-    0x20f7e6f9, 0x37f93a4b, 0x2102e51c, 0x37ff5109,
-    0x210de470, 0x3805659e, 0x2118e4f6, 0x380b780a,
-    0x2123e6ad, 0x3811884d, 0x212ee995, 0x38179666,
-    0x2139edac, 0x381da256, 0x2144f2f3, 0x3823ac1d,
-    0x214ff96a, 0x3829b3b9, 0x215b0110, 0x382fb92a,
-    0x216609e3, 0x3835bc71, 0x217113e5, 0x383bbd8e,
-    0x217c1f15, 0x3841bc7f, 0x21872b72, 0x3847b946,
-    0x219238fb, 0x384db3e0, 0x219d47b1, 0x3853ac4f,
-    0x21a85793, 0x3859a292, 0x21b368a0, 0x385f96a9,
-    0x21be7ad8, 0x38658894, 0x21c98e3b, 0x386b7852,
-    0x21d4a2c8, 0x387165e3, 0x21dfb87f, 0x38775147,
-    0x21eacf5f, 0x387d3a7e, 0x21f5e768, 0x38832187,
-    0x22010099, 0x38890663, 0x220c1af3, 0x388ee910,
-    0x22173674, 0x3894c98f, 0x2222531c, 0x389aa7e0,
-    0x222d70eb, 0x38a08402, 0x22388fe1, 0x38a65df6,
-    0x2243affc, 0x38ac35ba, 0x224ed13d, 0x38b20b4f,
-    0x2259f3a3, 0x38b7deb4, 0x2265172e, 0x38bdafea,
-    0x22703bdc, 0x38c37eef, 0x227b61af, 0x38c94bc4,
-    0x228688a4, 0x38cf1669, 0x2291b0bd, 0x38d4dedd,
-    0x229cd9f8, 0x38daa520, 0x22a80456, 0x38e06932,
-    0x22b32fd4, 0x38e62b13, 0x22be5c74, 0x38ebeac2,
-    0x22c98a35, 0x38f1a840, 0x22d4b916, 0x38f7638b,
-    0x22dfe917, 0x38fd1ca4, 0x22eb1a37, 0x3902d38b,
-    0x22f64c77, 0x3908883f, 0x23017fd5, 0x390e3ac0,
-    0x230cb451, 0x3913eb0e, 0x2317e9eb, 0x39199929,
-    0x232320a2, 0x391f4510, 0x232e5876, 0x3924eec3,
-    0x23399167, 0x392a9642, 0x2344cb73, 0x39303b8e,
-    0x2350069b, 0x3935dea4, 0x235b42df, 0x393b7f86,
-    0x2366803c, 0x39411e33, 0x2371beb5, 0x3946baac,
-    0x237cfe47, 0x394c54ee, 0x23883ef2, 0x3951ecfc,
-    0x239380b6, 0x395782d3, 0x239ec393, 0x395d1675,
-    0x23aa0788, 0x3962a7e0, 0x23b54c95, 0x39683715,
-    0x23c092b9, 0x396dc414, 0x23cbd9f4, 0x39734edc,
-    0x23d72245, 0x3978d76c, 0x23e26bac, 0x397e5dc6,
-    0x23edb628, 0x3983e1e8, 0x23f901ba, 0x398963d2,
-    0x24044e60, 0x398ee385, 0x240f9c1a, 0x399460ff,
-    0x241aeae8, 0x3999dc42, 0x24263ac9, 0x399f554b,
-    0x24318bbe, 0x39a4cc1c, 0x243cddc4, 0x39aa40b4,
-    0x244830dd, 0x39afb313, 0x24538507, 0x39b52339,
-    0x245eda43, 0x39ba9125, 0x246a308f, 0x39bffcd7,
-    0x247587eb, 0x39c5664f, 0x2480e057, 0x39cacd8d,
-    0x248c39d3, 0x39d03291, 0x2497945d, 0x39d5955a,
-    0x24a2eff6, 0x39daf5e8, 0x24ae4c9d, 0x39e0543c,
-    0x24b9aa52, 0x39e5b054, 0x24c50914, 0x39eb0a31,
-    0x24d068e2, 0x39f061d2, 0x24dbc9bd, 0x39f5b737,
-    0x24e72ba4, 0x39fb0a60, 0x24f28e96, 0x3a005b4d,
-    0x24fdf294, 0x3a05a9fd, 0x2509579b, 0x3a0af671,
-    0x2514bdad, 0x3a1040a8, 0x252024c9, 0x3a1588a2,
-    0x252b8cee, 0x3a1ace5f, 0x2536f61b, 0x3a2011de,
-    0x25426051, 0x3a25531f, 0x254dcb8f, 0x3a2a9223,
-    0x255937d5, 0x3a2fcee8, 0x2564a521, 0x3a350970,
-    0x25701374, 0x3a3a41b9, 0x257b82cd, 0x3a3f77c3,
-    0x2586f32c, 0x3a44ab8e, 0x25926490, 0x3a49dd1a,
-    0x259dd6f9, 0x3a4f0c67, 0x25a94a67, 0x3a543974,
-    0x25b4bed8, 0x3a596442, 0x25c0344d, 0x3a5e8cd0,
-    0x25cbaac5, 0x3a63b31d, 0x25d72240, 0x3a68d72b,
-    0x25e29abc, 0x3a6df8f8, 0x25ee143b, 0x3a731884,
-    0x25f98ebb, 0x3a7835cf, 0x26050a3b, 0x3a7d50da,
-    0x261086bc, 0x3a8269a3, 0x261c043d, 0x3a87802a,
-    0x262782be, 0x3a8c9470, 0x2633023e, 0x3a91a674,
-    0x263e82bc, 0x3a96b636, 0x264a0438, 0x3a9bc3b6,
-    0x265586b3, 0x3aa0cef3, 0x26610a2a, 0x3aa5d7ee,
-    0x266c8e9f, 0x3aaadea6, 0x26781410, 0x3aafe31b,
-    0x26839a7c, 0x3ab4e54c, 0x268f21e5, 0x3ab9e53a,
-    0x269aaa48, 0x3abee2e5, 0x26a633a6, 0x3ac3de4c,
-    0x26b1bdff, 0x3ac8d76f, 0x26bd4951, 0x3acdce4d,
-    0x26c8d59c, 0x3ad2c2e8, 0x26d462e1, 0x3ad7b53d,
-    0x26dff11d, 0x3adca54e, 0x26eb8052, 0x3ae1931a,
-    0x26f7107e, 0x3ae67ea1, 0x2702a1a1, 0x3aeb67e3,
-    0x270e33bb, 0x3af04edf, 0x2719c6cb, 0x3af53395,
-    0x27255ad1, 0x3afa1605, 0x2730efcc, 0x3afef630,
-    0x273c85bc, 0x3b03d414, 0x27481ca1, 0x3b08afb2,
-    0x2753b479, 0x3b0d8909, 0x275f4d45, 0x3b126019,
-    0x276ae704, 0x3b1734e2, 0x277681b6, 0x3b1c0764,
-    0x27821d59, 0x3b20d79e, 0x278db9ef, 0x3b25a591,
-    0x27995776, 0x3b2a713d, 0x27a4f5ed, 0x3b2f3aa0,
-    0x27b09555, 0x3b3401bb, 0x27bc35ad, 0x3b38c68e,
-    0x27c7d6f4, 0x3b3d8918, 0x27d3792b, 0x3b42495a,
-    0x27df1c50, 0x3b470753, 0x27eac063, 0x3b4bc303,
-    0x27f66564, 0x3b507c69, 0x28020b52, 0x3b553386,
-    0x280db22d, 0x3b59e85a, 0x281959f4, 0x3b5e9ae4,
-    0x282502a7, 0x3b634b23, 0x2830ac45, 0x3b67f919,
-    0x283c56cf, 0x3b6ca4c4, 0x28480243, 0x3b714e25,
-    0x2853aea1, 0x3b75f53c, 0x285f5be9, 0x3b7a9a07,
-    0x286b0a1a, 0x3b7f3c87, 0x2876b934, 0x3b83dcbc,
-    0x28826936, 0x3b887aa6, 0x288e1a20, 0x3b8d1644,
-    0x2899cbf1, 0x3b91af97, 0x28a57ea9, 0x3b96469d,
-    0x28b13248, 0x3b9adb57, 0x28bce6cd, 0x3b9f6dc5,
-    0x28c89c37, 0x3ba3fde7, 0x28d45286, 0x3ba88bbc,
-    0x28e009ba, 0x3bad1744, 0x28ebc1d3, 0x3bb1a080,
-    0x28f77acf, 0x3bb6276e, 0x290334af, 0x3bbaac0e,
-    0x290eef71, 0x3bbf2e62, 0x291aab16, 0x3bc3ae67,
-    0x2926679c, 0x3bc82c1f, 0x29322505, 0x3bcca789,
-    0x293de34e, 0x3bd120a4, 0x2949a278, 0x3bd59771,
-    0x29556282, 0x3bda0bf0, 0x2961236c, 0x3bde7e20,
-    0x296ce535, 0x3be2ee01, 0x2978a7dd, 0x3be75b93,
-    0x29846b63, 0x3bebc6d5, 0x29902fc7, 0x3bf02fc9,
-    0x299bf509, 0x3bf4966c, 0x29a7bb28, 0x3bf8fac0,
-    0x29b38223, 0x3bfd5cc4, 0x29bf49fa, 0x3c01bc78,
-    0x29cb12ad, 0x3c0619dc, 0x29d6dc3b, 0x3c0a74f0,
-    0x29e2a6a3, 0x3c0ecdb2, 0x29ee71e6, 0x3c132424,
-    0x29fa3e03, 0x3c177845, 0x2a060af9, 0x3c1bca16,
-    0x2a11d8c8, 0x3c201994, 0x2a1da770, 0x3c2466c2,
-    0x2a2976ef, 0x3c28b19e, 0x2a354746, 0x3c2cfa28,
-    0x2a411874, 0x3c314060, 0x2a4cea79, 0x3c358446,
-    0x2a58bd54, 0x3c39c5da, 0x2a649105, 0x3c3e051b,
-    0x2a70658a, 0x3c42420a, 0x2a7c3ae5, 0x3c467ca6,
-    0x2a881114, 0x3c4ab4ef, 0x2a93e817, 0x3c4eeae5,
-    0x2a9fbfed, 0x3c531e88, 0x2aab9896, 0x3c574fd8,
-    0x2ab77212, 0x3c5b7ed4, 0x2ac34c60, 0x3c5fab7c,
-    0x2acf277f, 0x3c63d5d1, 0x2adb0370, 0x3c67fdd1,
-    0x2ae6e031, 0x3c6c237e, 0x2af2bdc3, 0x3c7046d6,
-    0x2afe9c24, 0x3c7467d9, 0x2b0a7b54, 0x3c788688,
-    0x2b165b54, 0x3c7ca2e2, 0x2b223c22, 0x3c80bce7,
-    0x2b2e1dbe, 0x3c84d496, 0x2b3a0027, 0x3c88e9f1,
-    0x2b45e35d, 0x3c8cfcf6, 0x2b51c760, 0x3c910da5,
-    0x2b5dac2f, 0x3c951bff, 0x2b6991ca, 0x3c992803,
-    0x2b75782f, 0x3c9d31b0, 0x2b815f60, 0x3ca13908,
-    0x2b8d475b, 0x3ca53e09, 0x2b99301f, 0x3ca940b3,
-    0x2ba519ad, 0x3cad4107, 0x2bb10404, 0x3cb13f04,
-    0x2bbcef23, 0x3cb53aaa, 0x2bc8db0b, 0x3cb933f9,
-    0x2bd4c7ba, 0x3cbd2af0, 0x2be0b52f, 0x3cc11f90,
-    0x2beca36c, 0x3cc511d9, 0x2bf8926f, 0x3cc901c9,
-    0x2c048237, 0x3cccef62, 0x2c1072c4, 0x3cd0daa2,
-    0x2c1c6417, 0x3cd4c38b, 0x2c28562d, 0x3cd8aa1b,
-    0x2c344908, 0x3cdc8e52, 0x2c403ca5, 0x3ce07031,
-    0x2c4c3106, 0x3ce44fb7, 0x2c582629, 0x3ce82ce4,
-    0x2c641c0e, 0x3cec07b8, 0x2c7012b5, 0x3cefe032,
-    0x2c7c0a1d, 0x3cf3b653, 0x2c880245, 0x3cf78a1b,
-    0x2c93fb2e, 0x3cfb5b89, 0x2c9ff4d6, 0x3cff2a9d,
-    0x2cabef3d, 0x3d02f757, 0x2cb7ea63, 0x3d06c1b6,
-    0x2cc3e648, 0x3d0a89bc, 0x2ccfe2ea, 0x3d0e4f67,
-    0x2cdbe04a, 0x3d1212b7, 0x2ce7de66, 0x3d15d3ad,
-    0x2cf3dd3f, 0x3d199248, 0x2cffdcd4, 0x3d1d4e88,
-    0x2d0bdd25, 0x3d21086c, 0x2d17de31, 0x3d24bff6,
-    0x2d23dff7, 0x3d287523, 0x2d2fe277, 0x3d2c27f6,
-    0x2d3be5b1, 0x3d2fd86c, 0x2d47e9a5, 0x3d338687,
-    0x2d53ee51, 0x3d373245, 0x2d5ff3b5, 0x3d3adba7,
-    0x2d6bf9d1, 0x3d3e82ae, 0x2d7800a5, 0x3d422757,
-    0x2d84082f, 0x3d45c9a4, 0x2d901070, 0x3d496994,
-    0x2d9c1967, 0x3d4d0728, 0x2da82313, 0x3d50a25e,
-    0x2db42d74, 0x3d543b37, 0x2dc0388a, 0x3d57d1b3,
-    0x2dcc4454, 0x3d5b65d2, 0x2dd850d2, 0x3d5ef793,
-    0x2de45e03, 0x3d6286f6, 0x2df06be6, 0x3d6613fb,
-    0x2dfc7a7c, 0x3d699ea3, 0x2e0889c4, 0x3d6d26ec,
-    0x2e1499bd, 0x3d70acd7, 0x2e20aa67, 0x3d743064,
-    0x2e2cbbc1, 0x3d77b192, 0x2e38cdcb, 0x3d7b3061,
-    0x2e44e084, 0x3d7eacd2, 0x2e50f3ed, 0x3d8226e4,
-    0x2e5d0804, 0x3d859e96, 0x2e691cc9, 0x3d8913ea,
-    0x2e75323c, 0x3d8c86de, 0x2e81485c, 0x3d8ff772,
-    0x2e8d5f29, 0x3d9365a8, 0x2e9976a1, 0x3d96d17d,
-    0x2ea58ec6, 0x3d9a3af2, 0x2eb1a796, 0x3d9da208,
-    0x2ebdc110, 0x3da106bd, 0x2ec9db35, 0x3da46912,
-    0x2ed5f604, 0x3da7c907, 0x2ee2117c, 0x3dab269b,
-    0x2eee2d9d, 0x3dae81cf, 0x2efa4a67, 0x3db1daa2,
-    0x2f0667d9, 0x3db53113, 0x2f1285f2, 0x3db88524,
-    0x2f1ea4b2, 0x3dbbd6d4, 0x2f2ac419, 0x3dbf2622,
-    0x2f36e426, 0x3dc2730f, 0x2f4304d8, 0x3dc5bd9b,
-    0x2f4f2630, 0x3dc905c5, 0x2f5b482d, 0x3dcc4b8d,
-    0x2f676ace, 0x3dcf8ef3, 0x2f738e12, 0x3dd2cff7,
-    0x2f7fb1fa, 0x3dd60e99, 0x2f8bd685, 0x3dd94ad8,
-    0x2f97fbb2, 0x3ddc84b5, 0x2fa42181, 0x3ddfbc30,
-    0x2fb047f2, 0x3de2f148, 0x2fbc6f03, 0x3de623fd,
-    0x2fc896b5, 0x3de9544f, 0x2fd4bf08, 0x3dec823e,
-    0x2fe0e7f9, 0x3defadca, 0x2fed118a, 0x3df2d6f3,
-    0x2ff93bba, 0x3df5fdb8, 0x30056687, 0x3df9221a,
-    0x301191f3, 0x3dfc4418, 0x301dbdfb, 0x3dff63b2,
-    0x3029eaa1, 0x3e0280e9, 0x303617e2, 0x3e059bbb,
-    0x304245c0, 0x3e08b42a, 0x304e7438, 0x3e0bca34,
-    0x305aa34c, 0x3e0eddd9, 0x3066d2fa, 0x3e11ef1b,
-    0x30730342, 0x3e14fdf7, 0x307f3424, 0x3e180a6f,
-    0x308b659f, 0x3e1b1482, 0x309797b2, 0x3e1e1c30,
-    0x30a3ca5d, 0x3e212179, 0x30affda0, 0x3e24245d,
-    0x30bc317a, 0x3e2724db, 0x30c865ea, 0x3e2a22f4,
-    0x30d49af1, 0x3e2d1ea8, 0x30e0d08d, 0x3e3017f6,
-    0x30ed06bf, 0x3e330ede, 0x30f93d86, 0x3e360360,
-    0x310574e0, 0x3e38f57c, 0x3111accf, 0x3e3be532,
-    0x311de551, 0x3e3ed282, 0x312a1e66, 0x3e41bd6c,
-    0x3136580d, 0x3e44a5ef, 0x31429247, 0x3e478c0b,
-    0x314ecd11, 0x3e4a6fc1, 0x315b086d, 0x3e4d5110,
-    0x31674459, 0x3e502ff9, 0x317380d6, 0x3e530c7a,
-    0x317fbde2, 0x3e55e694, 0x318bfb7d, 0x3e58be47,
-    0x319839a6, 0x3e5b9392, 0x31a4785e, 0x3e5e6676,
-    0x31b0b7a4, 0x3e6136f3, 0x31bcf777, 0x3e640507,
-    0x31c937d6, 0x3e66d0b4, 0x31d578c2, 0x3e6999fa,
-    0x31e1ba3a, 0x3e6c60d7, 0x31edfc3d, 0x3e6f254c,
-    0x31fa3ecb, 0x3e71e759, 0x320681e3, 0x3e74a6fd,
-    0x3212c585, 0x3e77643a, 0x321f09b1, 0x3e7a1f0d,
-    0x322b4e66, 0x3e7cd778, 0x323793a3, 0x3e7f8d7b,
-    0x3243d968, 0x3e824114, 0x32501fb5, 0x3e84f245,
-    0x325c6688, 0x3e87a10c, 0x3268ade3, 0x3e8a4d6a,
-    0x3274f5c3, 0x3e8cf75f, 0x32813e2a, 0x3e8f9eeb,
-    0x328d8715, 0x3e92440d, 0x3299d085, 0x3e94e6c6,
-    0x32a61a7a, 0x3e978715, 0x32b264f2, 0x3e9a24fb,
-    0x32beafed, 0x3e9cc076, 0x32cafb6b, 0x3e9f5988,
-    0x32d7476c, 0x3ea1f02f, 0x32e393ef, 0x3ea4846c,
-    0x32efe0f2, 0x3ea7163f, 0x32fc2e77, 0x3ea9a5a8,
-    0x33087c7d, 0x3eac32a6, 0x3314cb02, 0x3eaebd3a,
-    0x33211a07, 0x3eb14563, 0x332d698a, 0x3eb3cb21,
-    0x3339b98d, 0x3eb64e75, 0x33460a0d, 0x3eb8cf5d,
-    0x33525b0b, 0x3ebb4ddb, 0x335eac86, 0x3ebdc9ed,
-    0x336afe7e, 0x3ec04394, 0x337750f2, 0x3ec2bad0,
-    0x3383a3e2, 0x3ec52fa0, 0x338ff74d, 0x3ec7a205,
-    0x339c4b32, 0x3eca11fe, 0x33a89f92, 0x3ecc7f8b,
-    0x33b4f46c, 0x3eceeaad, 0x33c149bf, 0x3ed15363,
-    0x33cd9f8b, 0x3ed3b9ad, 0x33d9f5cf, 0x3ed61d8a,
-    0x33e64c8c, 0x3ed87efc, 0x33f2a3bf, 0x3edade01,
-    0x33fefb6a, 0x3edd3a9a, 0x340b538b, 0x3edf94c7,
-    0x3417ac22, 0x3ee1ec87, 0x3424052f, 0x3ee441da,
-    0x34305eb0, 0x3ee694c1, 0x343cb8a7, 0x3ee8e53a,
-    0x34491311, 0x3eeb3347, 0x34556def, 0x3eed7ee7,
-    0x3461c940, 0x3eefc81a, 0x346e2504, 0x3ef20ee0,
-    0x347a8139, 0x3ef45338, 0x3486dde1, 0x3ef69523,
-    0x34933afa, 0x3ef8d4a1, 0x349f9884, 0x3efb11b1,
-    0x34abf67e, 0x3efd4c54, 0x34b854e7, 0x3eff8489,
-    0x34c4b3c0, 0x3f01ba50, 0x34d11308, 0x3f03eda9,
-    0x34dd72be, 0x3f061e95, 0x34e9d2e3, 0x3f084d12,
-    0x34f63374, 0x3f0a7921, 0x35029473, 0x3f0ca2c2,
-    0x350ef5de, 0x3f0ec9f5, 0x351b57b5, 0x3f10eeb9,
-    0x3527b9f7, 0x3f13110f, 0x35341ca5, 0x3f1530f7,
-    0x35407fbd, 0x3f174e70, 0x354ce33f, 0x3f19697a,
-    0x3559472b, 0x3f1b8215, 0x3565ab80, 0x3f1d9842,
-    0x3572103d, 0x3f1fabff, 0x357e7563, 0x3f21bd4e,
-    0x358adaf0, 0x3f23cc2e, 0x359740e5, 0x3f25d89e,
-    0x35a3a740, 0x3f27e29f, 0x35b00e02, 0x3f29ea31,
-    0x35bc7529, 0x3f2bef53, 0x35c8dcb6, 0x3f2df206,
-    0x35d544a7, 0x3f2ff24a, 0x35e1acfd, 0x3f31f01d,
-    0x35ee15b7, 0x3f33eb81, 0x35fa7ed4, 0x3f35e476,
-    0x3606e854, 0x3f37dafa, 0x36135237, 0x3f39cf0e,
-    0x361fbc7b, 0x3f3bc0b3, 0x362c2721, 0x3f3dafe7,
-    0x36389228, 0x3f3f9cab, 0x3644fd8f, 0x3f4186ff,
-    0x36516956, 0x3f436ee3, 0x365dd57d, 0x3f455456,
-    0x366a4203, 0x3f473759, 0x3676aee8, 0x3f4917eb,
-    0x36831c2b, 0x3f4af60d, 0x368f89cb, 0x3f4cd1be,
-    0x369bf7c9, 0x3f4eaafe, 0x36a86623, 0x3f5081cd,
-    0x36b4d4d9, 0x3f52562c, 0x36c143ec, 0x3f54281a,
-    0x36cdb359, 0x3f55f796, 0x36da2321, 0x3f57c4a2,
-    0x36e69344, 0x3f598f3c, 0x36f303c0, 0x3f5b5765,
-    0x36ff7496, 0x3f5d1d1d, 0x370be5c4, 0x3f5ee063,
-    0x3718574b, 0x3f60a138, 0x3724c92a, 0x3f625f9b,
-    0x37313b60, 0x3f641b8d, 0x373daded, 0x3f65d50d,
-    0x374a20d0, 0x3f678c1c, 0x3756940a, 0x3f6940b8,
-    0x37630799, 0x3f6af2e3, 0x376f7b7d, 0x3f6ca29c,
-    0x377befb5, 0x3f6e4fe3, 0x37886442, 0x3f6ffab8,
-    0x3794d922, 0x3f71a31b, 0x37a14e55, 0x3f73490b,
-    0x37adc3db, 0x3f74ec8a, 0x37ba39b3, 0x3f768d96,
-    0x37c6afdc, 0x3f782c30, 0x37d32657, 0x3f79c857,
-    0x37df9d22, 0x3f7b620c, 0x37ec143e, 0x3f7cf94e,
-    0x37f88ba9, 0x3f7e8e1e, 0x38050364, 0x3f80207b,
-    0x38117b6d, 0x3f81b065, 0x381df3c5, 0x3f833ddd,
-    0x382a6c6a, 0x3f84c8e2, 0x3836e55d, 0x3f865174,
-    0x38435e9d, 0x3f87d792, 0x384fd829, 0x3f895b3e,
-    0x385c5201, 0x3f8adc77, 0x3868cc24, 0x3f8c5b3d,
-    0x38754692, 0x3f8dd78f, 0x3881c14b, 0x3f8f516e,
-    0x388e3c4d, 0x3f90c8da, 0x389ab799, 0x3f923dd2,
-    0x38a7332e, 0x3f93b058, 0x38b3af0c, 0x3f952069,
-    0x38c02b31, 0x3f968e07, 0x38cca79e, 0x3f97f932,
-    0x38d92452, 0x3f9961e8, 0x38e5a14d, 0x3f9ac82c,
-    0x38f21e8e, 0x3f9c2bfb, 0x38fe9c15, 0x3f9d8d56,
-    0x390b19e0, 0x3f9eec3e, 0x391797f0, 0x3fa048b2,
-    0x39241645, 0x3fa1a2b2, 0x393094dd, 0x3fa2fa3d,
-    0x393d13b8, 0x3fa44f55, 0x394992d7, 0x3fa5a1f9,
-    0x39561237, 0x3fa6f228, 0x396291d9, 0x3fa83fe3,
-    0x396f11bc, 0x3fa98b2a, 0x397b91e1, 0x3faad3fd,
-    0x39881245, 0x3fac1a5b, 0x399492ea, 0x3fad5e45,
-    0x39a113cd, 0x3fae9fbb, 0x39ad94f0, 0x3fafdebb,
-    0x39ba1651, 0x3fb11b48, 0x39c697f0, 0x3fb2555f,
-    0x39d319cc, 0x3fb38d02, 0x39df9be6, 0x3fb4c231,
-    0x39ec1e3b, 0x3fb5f4ea, 0x39f8a0cd, 0x3fb7252f,
-    0x3a05239a, 0x3fb852ff, 0x3a11a6a3, 0x3fb97e5a,
-    0x3a1e29e5, 0x3fbaa740, 0x3a2aad62, 0x3fbbcdb1,
-    0x3a373119, 0x3fbcf1ad, 0x3a43b508, 0x3fbe1334,
-    0x3a503930, 0x3fbf3246, 0x3a5cbd91, 0x3fc04ee3,
-    0x3a694229, 0x3fc1690a, 0x3a75c6f8, 0x3fc280bc,
-    0x3a824bfd, 0x3fc395f9, 0x3a8ed139, 0x3fc4a8c1,
-    0x3a9b56ab, 0x3fc5b913, 0x3aa7dc52, 0x3fc6c6f0,
-    0x3ab4622d, 0x3fc7d258, 0x3ac0e83d, 0x3fc8db4a,
-    0x3acd6e81, 0x3fc9e1c6, 0x3ad9f4f8, 0x3fcae5cd,
-    0x3ae67ba2, 0x3fcbe75e, 0x3af3027e, 0x3fcce67a,
-    0x3aff898c, 0x3fcde320, 0x3b0c10cb, 0x3fcedd50,
-    0x3b18983b, 0x3fcfd50b, 0x3b251fdc, 0x3fd0ca4f,
-    0x3b31a7ac, 0x3fd1bd1e, 0x3b3e2fac, 0x3fd2ad77,
-    0x3b4ab7db, 0x3fd39b5a, 0x3b574039, 0x3fd486c7,
-    0x3b63c8c4, 0x3fd56fbe, 0x3b70517d, 0x3fd6563f,
-    0x3b7cda63, 0x3fd73a4a, 0x3b896375, 0x3fd81bdf,
-    0x3b95ecb4, 0x3fd8fafe, 0x3ba2761e, 0x3fd9d7a7,
-    0x3baeffb3, 0x3fdab1d9, 0x3bbb8973, 0x3fdb8996,
-    0x3bc8135c, 0x3fdc5edc, 0x3bd49d70, 0x3fdd31ac,
-    0x3be127ac, 0x3fde0205, 0x3bedb212, 0x3fdecfe8,
-    0x3bfa3c9f, 0x3fdf9b55, 0x3c06c754, 0x3fe0644b,
-    0x3c135231, 0x3fe12acb, 0x3c1fdd34, 0x3fe1eed5,
-    0x3c2c685d, 0x3fe2b067, 0x3c38f3ac, 0x3fe36f84,
-    0x3c457f21, 0x3fe42c2a, 0x3c520aba, 0x3fe4e659,
-    0x3c5e9678, 0x3fe59e12, 0x3c6b2259, 0x3fe65354,
-    0x3c77ae5e, 0x3fe7061f, 0x3c843a85, 0x3fe7b674,
-    0x3c90c6cf, 0x3fe86452, 0x3c9d533b, 0x3fe90fb9,
-    0x3ca9dfc8, 0x3fe9b8a9, 0x3cb66c77, 0x3fea5f23,
-    0x3cc2f945, 0x3feb0326, 0x3ccf8634, 0x3feba4b2,
-    0x3cdc1342, 0x3fec43c7, 0x3ce8a06f, 0x3fece065,
-    0x3cf52dbb, 0x3fed7a8c, 0x3d01bb24, 0x3fee123d,
-    0x3d0e48ab, 0x3feea776, 0x3d1ad650, 0x3fef3a39,
-    0x3d276410, 0x3fefca84, 0x3d33f1ed, 0x3ff05858,
-    0x3d407fe6, 0x3ff0e3b6, 0x3d4d0df9, 0x3ff16c9c,
-    0x3d599c28, 0x3ff1f30b, 0x3d662a70, 0x3ff27703,
-    0x3d72b8d2, 0x3ff2f884, 0x3d7f474d, 0x3ff3778e,
-    0x3d8bd5e1, 0x3ff3f420, 0x3d98648d, 0x3ff46e3c,
-    0x3da4f351, 0x3ff4e5e0, 0x3db1822c, 0x3ff55b0d,
-    0x3dbe111e, 0x3ff5cdc3, 0x3dcaa027, 0x3ff63e01,
-    0x3dd72f45, 0x3ff6abc8, 0x3de3be78, 0x3ff71718,
-    0x3df04dc0, 0x3ff77ff1, 0x3dfcdd1d, 0x3ff7e652,
-    0x3e096c8d, 0x3ff84a3c, 0x3e15fc11, 0x3ff8abae,
-    0x3e228ba7, 0x3ff90aaa, 0x3e2f1b50, 0x3ff9672d,
-    0x3e3bab0b, 0x3ff9c13a, 0x3e483ad8, 0x3ffa18cf,
-    0x3e54cab5, 0x3ffa6dec, 0x3e615aa3, 0x3ffac092,
-    0x3e6deaa1, 0x3ffb10c1, 0x3e7a7aae, 0x3ffb5e78,
-    0x3e870aca, 0x3ffba9b8, 0x3e939af5, 0x3ffbf280,
-    0x3ea02b2e, 0x3ffc38d1, 0x3eacbb74, 0x3ffc7caa,
-    0x3eb94bc8, 0x3ffcbe0c, 0x3ec5dc28, 0x3ffcfcf6,
-    0x3ed26c94, 0x3ffd3969, 0x3edefd0c, 0x3ffd7364,
-    0x3eeb8d8f, 0x3ffdaae7, 0x3ef81e1d, 0x3ffddff3,
-    0x3f04aeb5, 0x3ffe1288, 0x3f113f56, 0x3ffe42a4,
-    0x3f1dd001, 0x3ffe704a, 0x3f2a60b4, 0x3ffe9b77,
-    0x3f36f170, 0x3ffec42d, 0x3f438234, 0x3ffeea6c,
-    0x3f5012fe, 0x3fff0e32, 0x3f5ca3d0, 0x3fff2f82,
-    0x3f6934a8, 0x3fff4e59, 0x3f75c585, 0x3fff6ab9,
-    0x3f825668, 0x3fff84a1, 0x3f8ee750, 0x3fff9c12,
-    0x3f9b783c, 0x3fffb10b, 0x3fa8092c, 0x3fffc38c,
-    0x3fb49a1f, 0x3fffd396, 0x3fc12b16, 0x3fffe128,
-    0x3fcdbc0f, 0x3fffec43, 0x3fda4d09, 0x3ffff4e6,
-    0x3fe6de05, 0x3ffffb11, 0x3ff36f02, 0x3ffffec4,
-};
-
-
-/**    
-* \par   
-* Generation of realCoefBQ31 array:    
-* \par    
-*  n = 4096        
-* 
for (i = 0; i < n; i++)    
-* {    
-*    pBTable[2 * i] = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));    
-*    pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));    
-* } 
    
-* \par    
-* Convert to fixed point Q31 format    
-*     round(pBTable[i] * pow(2, 31))    
-*    
-*/
-
-static const q31_t realCoefBQ31[8192] = {
-    0x40000000, 0x40000000, 0x400c90fe, 0x3ffffec4,
-    0x401921fb, 0x3ffffb11, 0x4025b2f7, 0x3ffff4e6,
-    0x403243f1, 0x3fffec43, 0x403ed4ea, 0x3fffe128,
-    0x404b65e1, 0x3fffd396, 0x4057f6d4, 0x3fffc38c,
-    0x406487c4, 0x3fffb10b, 0x407118b0, 0x3fff9c12,
-    0x407da998, 0x3fff84a1, 0x408a3a7b, 0x3fff6ab9,
-    0x4096cb58, 0x3fff4e59, 0x40a35c30, 0x3fff2f82,
-    0x40afed02, 0x3fff0e32, 0x40bc7dcc, 0x3ffeea6c,
-    0x40c90e90, 0x3ffec42d, 0x40d59f4c, 0x3ffe9b77,
-    0x40e22fff, 0x3ffe704a, 0x40eec0aa, 0x3ffe42a4,
-    0x40fb514b, 0x3ffe1288, 0x4107e1e3, 0x3ffddff3,
-    0x41147271, 0x3ffdaae7, 0x412102f4, 0x3ffd7364,
-    0x412d936c, 0x3ffd3969, 0x413a23d8, 0x3ffcfcf6,
-    0x4146b438, 0x3ffcbe0c, 0x4153448c, 0x3ffc7caa,
-    0x415fd4d2, 0x3ffc38d1, 0x416c650b, 0x3ffbf280,
-    0x4178f536, 0x3ffba9b8, 0x41858552, 0x3ffb5e78,
-    0x4192155f, 0x3ffb10c1, 0x419ea55d, 0x3ffac092,
-    0x41ab354b, 0x3ffa6dec, 0x41b7c528, 0x3ffa18cf,
-    0x41c454f5, 0x3ff9c13a, 0x41d0e4b0, 0x3ff9672d,
-    0x41dd7459, 0x3ff90aaa, 0x41ea03ef, 0x3ff8abae,
-    0x41f69373, 0x3ff84a3c, 0x420322e3, 0x3ff7e652,
-    0x420fb240, 0x3ff77ff1, 0x421c4188, 0x3ff71718,
-    0x4228d0bb, 0x3ff6abc8, 0x42355fd9, 0x3ff63e01,
-    0x4241eee2, 0x3ff5cdc3, 0x424e7dd4, 0x3ff55b0d,
-    0x425b0caf, 0x3ff4e5e0, 0x42679b73, 0x3ff46e3c,
-    0x42742a1f, 0x3ff3f420, 0x4280b8b3, 0x3ff3778e,
-    0x428d472e, 0x3ff2f884, 0x4299d590, 0x3ff27703,
-    0x42a663d8, 0x3ff1f30b, 0x42b2f207, 0x3ff16c9c,
-    0x42bf801a, 0x3ff0e3b6, 0x42cc0e13, 0x3ff05858,
-    0x42d89bf0, 0x3fefca84, 0x42e529b0, 0x3fef3a39,
-    0x42f1b755, 0x3feea776, 0x42fe44dc, 0x3fee123d,
-    0x430ad245, 0x3fed7a8c, 0x43175f91, 0x3fece065,
-    0x4323ecbe, 0x3fec43c7, 0x433079cc, 0x3feba4b2,
-    0x433d06bb, 0x3feb0326, 0x43499389, 0x3fea5f23,
-    0x43562038, 0x3fe9b8a9, 0x4362acc5, 0x3fe90fb9,
-    0x436f3931, 0x3fe86452, 0x437bc57b, 0x3fe7b674,
-    0x438851a2, 0x3fe7061f, 0x4394dda7, 0x3fe65354,
-    0x43a16988, 0x3fe59e12, 0x43adf546, 0x3fe4e659,
-    0x43ba80df, 0x3fe42c2a, 0x43c70c54, 0x3fe36f84,
-    0x43d397a3, 0x3fe2b067, 0x43e022cc, 0x3fe1eed5,
-    0x43ecadcf, 0x3fe12acb, 0x43f938ac, 0x3fe0644b,
-    0x4405c361, 0x3fdf9b55, 0x44124dee, 0x3fdecfe8,
-    0x441ed854, 0x3fde0205, 0x442b6290, 0x3fdd31ac,
-    0x4437eca4, 0x3fdc5edc, 0x4444768d, 0x3fdb8996,
-    0x4451004d, 0x3fdab1d9, 0x445d89e2, 0x3fd9d7a7,
-    0x446a134c, 0x3fd8fafe, 0x44769c8b, 0x3fd81bdf,
-    0x4483259d, 0x3fd73a4a, 0x448fae83, 0x3fd6563f,
-    0x449c373c, 0x3fd56fbe, 0x44a8bfc7, 0x3fd486c7,
-    0x44b54825, 0x3fd39b5a, 0x44c1d054, 0x3fd2ad77,
-    0x44ce5854, 0x3fd1bd1e, 0x44dae024, 0x3fd0ca4f,
-    0x44e767c5, 0x3fcfd50b, 0x44f3ef35, 0x3fcedd50,
-    0x45007674, 0x3fcde320, 0x450cfd82, 0x3fcce67a,
-    0x4519845e, 0x3fcbe75e, 0x45260b08, 0x3fcae5cd,
-    0x4532917f, 0x3fc9e1c6, 0x453f17c3, 0x3fc8db4a,
-    0x454b9dd3, 0x3fc7d258, 0x455823ae, 0x3fc6c6f0,
-    0x4564a955, 0x3fc5b913, 0x45712ec7, 0x3fc4a8c1,
-    0x457db403, 0x3fc395f9, 0x458a3908, 0x3fc280bc,
-    0x4596bdd7, 0x3fc1690a, 0x45a3426f, 0x3fc04ee3,
-    0x45afc6d0, 0x3fbf3246, 0x45bc4af8, 0x3fbe1334,
-    0x45c8cee7, 0x3fbcf1ad, 0x45d5529e, 0x3fbbcdb1,
-    0x45e1d61b, 0x3fbaa740, 0x45ee595d, 0x3fb97e5a,
-    0x45fadc66, 0x3fb852ff, 0x46075f33, 0x3fb7252f,
-    0x4613e1c5, 0x3fb5f4ea, 0x4620641a, 0x3fb4c231,
-    0x462ce634, 0x3fb38d02, 0x46396810, 0x3fb2555f,
-    0x4645e9af, 0x3fb11b48, 0x46526b10, 0x3fafdebb,
-    0x465eec33, 0x3fae9fbb, 0x466b6d16, 0x3fad5e45,
-    0x4677edbb, 0x3fac1a5b, 0x46846e1f, 0x3faad3fd,
-    0x4690ee44, 0x3fa98b2a, 0x469d6e27, 0x3fa83fe3,
-    0x46a9edc9, 0x3fa6f228, 0x46b66d29, 0x3fa5a1f9,
-    0x46c2ec48, 0x3fa44f55, 0x46cf6b23, 0x3fa2fa3d,
-    0x46dbe9bb, 0x3fa1a2b2, 0x46e86810, 0x3fa048b2,
-    0x46f4e620, 0x3f9eec3e, 0x470163eb, 0x3f9d8d56,
-    0x470de172, 0x3f9c2bfb, 0x471a5eb3, 0x3f9ac82c,
-    0x4726dbae, 0x3f9961e8, 0x47335862, 0x3f97f932,
-    0x473fd4cf, 0x3f968e07, 0x474c50f4, 0x3f952069,
-    0x4758ccd2, 0x3f93b058, 0x47654867, 0x3f923dd2,
-    0x4771c3b3, 0x3f90c8da, 0x477e3eb5, 0x3f8f516e,
-    0x478ab96e, 0x3f8dd78f, 0x479733dc, 0x3f8c5b3d,
-    0x47a3adff, 0x3f8adc77, 0x47b027d7, 0x3f895b3e,
-    0x47bca163, 0x3f87d792, 0x47c91aa3, 0x3f865174,
-    0x47d59396, 0x3f84c8e2, 0x47e20c3b, 0x3f833ddd,
-    0x47ee8493, 0x3f81b065, 0x47fafc9c, 0x3f80207b,
-    0x48077457, 0x3f7e8e1e, 0x4813ebc2, 0x3f7cf94e,
-    0x482062de, 0x3f7b620c, 0x482cd9a9, 0x3f79c857,
-    0x48395024, 0x3f782c30, 0x4845c64d, 0x3f768d96,
-    0x48523c25, 0x3f74ec8a, 0x485eb1ab, 0x3f73490b,
-    0x486b26de, 0x3f71a31b, 0x48779bbe, 0x3f6ffab8,
-    0x4884104b, 0x3f6e4fe3, 0x48908483, 0x3f6ca29c,
-    0x489cf867, 0x3f6af2e3, 0x48a96bf6, 0x3f6940b8,
-    0x48b5df30, 0x3f678c1c, 0x48c25213, 0x3f65d50d,
-    0x48cec4a0, 0x3f641b8d, 0x48db36d6, 0x3f625f9b,
-    0x48e7a8b5, 0x3f60a138, 0x48f41a3c, 0x3f5ee063,
-    0x49008b6a, 0x3f5d1d1d, 0x490cfc40, 0x3f5b5765,
-    0x49196cbc, 0x3f598f3c, 0x4925dcdf, 0x3f57c4a2,
-    0x49324ca7, 0x3f55f796, 0x493ebc14, 0x3f54281a,
-    0x494b2b27, 0x3f52562c, 0x495799dd, 0x3f5081cd,
-    0x49640837, 0x3f4eaafe, 0x49707635, 0x3f4cd1be,
-    0x497ce3d5, 0x3f4af60d, 0x49895118, 0x3f4917eb,
-    0x4995bdfd, 0x3f473759, 0x49a22a83, 0x3f455456,
-    0x49ae96aa, 0x3f436ee3, 0x49bb0271, 0x3f4186ff,
-    0x49c76dd8, 0x3f3f9cab, 0x49d3d8df, 0x3f3dafe7,
-    0x49e04385, 0x3f3bc0b3, 0x49ecadc9, 0x3f39cf0e,
-    0x49f917ac, 0x3f37dafa, 0x4a05812c, 0x3f35e476,
-    0x4a11ea49, 0x3f33eb81, 0x4a1e5303, 0x3f31f01d,
-    0x4a2abb59, 0x3f2ff24a, 0x4a37234a, 0x3f2df206,
-    0x4a438ad7, 0x3f2bef53, 0x4a4ff1fe, 0x3f29ea31,
-    0x4a5c58c0, 0x3f27e29f, 0x4a68bf1b, 0x3f25d89e,
-    0x4a752510, 0x3f23cc2e, 0x4a818a9d, 0x3f21bd4e,
-    0x4a8defc3, 0x3f1fabff, 0x4a9a5480, 0x3f1d9842,
-    0x4aa6b8d5, 0x3f1b8215, 0x4ab31cc1, 0x3f19697a,
-    0x4abf8043, 0x3f174e70, 0x4acbe35b, 0x3f1530f7,
-    0x4ad84609, 0x3f13110f, 0x4ae4a84b, 0x3f10eeb9,
-    0x4af10a22, 0x3f0ec9f5, 0x4afd6b8d, 0x3f0ca2c2,
-    0x4b09cc8c, 0x3f0a7921, 0x4b162d1d, 0x3f084d12,
-    0x4b228d42, 0x3f061e95, 0x4b2eecf8, 0x3f03eda9,
-    0x4b3b4c40, 0x3f01ba50, 0x4b47ab19, 0x3eff8489,
-    0x4b540982, 0x3efd4c54, 0x4b60677c, 0x3efb11b1,
-    0x4b6cc506, 0x3ef8d4a1, 0x4b79221f, 0x3ef69523,
-    0x4b857ec7, 0x3ef45338, 0x4b91dafc, 0x3ef20ee0,
-    0x4b9e36c0, 0x3eefc81a, 0x4baa9211, 0x3eed7ee7,
-    0x4bb6ecef, 0x3eeb3347, 0x4bc34759, 0x3ee8e53a,
-    0x4bcfa150, 0x3ee694c1, 0x4bdbfad1, 0x3ee441da,
-    0x4be853de, 0x3ee1ec87, 0x4bf4ac75, 0x3edf94c7,
-    0x4c010496, 0x3edd3a9a, 0x4c0d5c41, 0x3edade01,
-    0x4c19b374, 0x3ed87efc, 0x4c260a31, 0x3ed61d8a,
-    0x4c326075, 0x3ed3b9ad, 0x4c3eb641, 0x3ed15363,
-    0x4c4b0b94, 0x3eceeaad, 0x4c57606e, 0x3ecc7f8b,
-    0x4c63b4ce, 0x3eca11fe, 0x4c7008b3, 0x3ec7a205,
-    0x4c7c5c1e, 0x3ec52fa0, 0x4c88af0e, 0x3ec2bad0,
-    0x4c950182, 0x3ec04394, 0x4ca1537a, 0x3ebdc9ed,
-    0x4cada4f5, 0x3ebb4ddb, 0x4cb9f5f3, 0x3eb8cf5d,
-    0x4cc64673, 0x3eb64e75, 0x4cd29676, 0x3eb3cb21,
-    0x4cdee5f9, 0x3eb14563, 0x4ceb34fe, 0x3eaebd3a,
-    0x4cf78383, 0x3eac32a6, 0x4d03d189, 0x3ea9a5a8,
-    0x4d101f0e, 0x3ea7163f, 0x4d1c6c11, 0x3ea4846c,
-    0x4d28b894, 0x3ea1f02f, 0x4d350495, 0x3e9f5988,
-    0x4d415013, 0x3e9cc076, 0x4d4d9b0e, 0x3e9a24fb,
-    0x4d59e586, 0x3e978715, 0x4d662f7b, 0x3e94e6c6,
-    0x4d7278eb, 0x3e92440d, 0x4d7ec1d6, 0x3e8f9eeb,
-    0x4d8b0a3d, 0x3e8cf75f, 0x4d97521d, 0x3e8a4d6a,
-    0x4da39978, 0x3e87a10c, 0x4dafe04b, 0x3e84f245,
-    0x4dbc2698, 0x3e824114, 0x4dc86c5d, 0x3e7f8d7b,
-    0x4dd4b19a, 0x3e7cd778, 0x4de0f64f, 0x3e7a1f0d,
-    0x4ded3a7b, 0x3e77643a, 0x4df97e1d, 0x3e74a6fd,
-    0x4e05c135, 0x3e71e759, 0x4e1203c3, 0x3e6f254c,
-    0x4e1e45c6, 0x3e6c60d7, 0x4e2a873e, 0x3e6999fa,
-    0x4e36c82a, 0x3e66d0b4, 0x4e430889, 0x3e640507,
-    0x4e4f485c, 0x3e6136f3, 0x4e5b87a2, 0x3e5e6676,
-    0x4e67c65a, 0x3e5b9392, 0x4e740483, 0x3e58be47,
-    0x4e80421e, 0x3e55e694, 0x4e8c7f2a, 0x3e530c7a,
-    0x4e98bba7, 0x3e502ff9, 0x4ea4f793, 0x3e4d5110,
-    0x4eb132ef, 0x3e4a6fc1, 0x4ebd6db9, 0x3e478c0b,
-    0x4ec9a7f3, 0x3e44a5ef, 0x4ed5e19a, 0x3e41bd6c,
-    0x4ee21aaf, 0x3e3ed282, 0x4eee5331, 0x3e3be532,
-    0x4efa8b20, 0x3e38f57c, 0x4f06c27a, 0x3e360360,
-    0x4f12f941, 0x3e330ede, 0x4f1f2f73, 0x3e3017f6,
-    0x4f2b650f, 0x3e2d1ea8, 0x4f379a16, 0x3e2a22f4,
-    0x4f43ce86, 0x3e2724db, 0x4f500260, 0x3e24245d,
-    0x4f5c35a3, 0x3e212179, 0x4f68684e, 0x3e1e1c30,
-    0x4f749a61, 0x3e1b1482, 0x4f80cbdc, 0x3e180a6f,
-    0x4f8cfcbe, 0x3e14fdf7, 0x4f992d06, 0x3e11ef1b,
-    0x4fa55cb4, 0x3e0eddd9, 0x4fb18bc8, 0x3e0bca34,
-    0x4fbdba40, 0x3e08b42a, 0x4fc9e81e, 0x3e059bbb,
-    0x4fd6155f, 0x3e0280e9, 0x4fe24205, 0x3dff63b2,
-    0x4fee6e0d, 0x3dfc4418, 0x4ffa9979, 0x3df9221a,
-    0x5006c446, 0x3df5fdb8, 0x5012ee76, 0x3df2d6f3,
-    0x501f1807, 0x3defadca, 0x502b40f8, 0x3dec823e,
-    0x5037694b, 0x3de9544f, 0x504390fd, 0x3de623fd,
-    0x504fb80e, 0x3de2f148, 0x505bde7f, 0x3ddfbc30,
-    0x5068044e, 0x3ddc84b5, 0x5074297b, 0x3dd94ad8,
-    0x50804e06, 0x3dd60e99, 0x508c71ee, 0x3dd2cff7,
-    0x50989532, 0x3dcf8ef3, 0x50a4b7d3, 0x3dcc4b8d,
-    0x50b0d9d0, 0x3dc905c5, 0x50bcfb28, 0x3dc5bd9b,
-    0x50c91bda, 0x3dc2730f, 0x50d53be7, 0x3dbf2622,
-    0x50e15b4e, 0x3dbbd6d4, 0x50ed7a0e, 0x3db88524,
-    0x50f99827, 0x3db53113, 0x5105b599, 0x3db1daa2,
-    0x5111d263, 0x3dae81cf, 0x511dee84, 0x3dab269b,
-    0x512a09fc, 0x3da7c907, 0x513624cb, 0x3da46912,
-    0x51423ef0, 0x3da106bd, 0x514e586a, 0x3d9da208,
-    0x515a713a, 0x3d9a3af2, 0x5166895f, 0x3d96d17d,
-    0x5172a0d7, 0x3d9365a8, 0x517eb7a4, 0x3d8ff772,
-    0x518acdc4, 0x3d8c86de, 0x5196e337, 0x3d8913ea,
-    0x51a2f7fc, 0x3d859e96, 0x51af0c13, 0x3d8226e4,
-    0x51bb1f7c, 0x3d7eacd2, 0x51c73235, 0x3d7b3061,
-    0x51d3443f, 0x3d77b192, 0x51df5599, 0x3d743064,
-    0x51eb6643, 0x3d70acd7, 0x51f7763c, 0x3d6d26ec,
-    0x52038584, 0x3d699ea3, 0x520f941a, 0x3d6613fb,
-    0x521ba1fd, 0x3d6286f6, 0x5227af2e, 0x3d5ef793,
-    0x5233bbac, 0x3d5b65d2, 0x523fc776, 0x3d57d1b3,
-    0x524bd28c, 0x3d543b37, 0x5257dced, 0x3d50a25e,
-    0x5263e699, 0x3d4d0728, 0x526fef90, 0x3d496994,
-    0x527bf7d1, 0x3d45c9a4, 0x5287ff5b, 0x3d422757,
-    0x5294062f, 0x3d3e82ae, 0x52a00c4b, 0x3d3adba7,
-    0x52ac11af, 0x3d373245, 0x52b8165b, 0x3d338687,
-    0x52c41a4f, 0x3d2fd86c, 0x52d01d89, 0x3d2c27f6,
-    0x52dc2009, 0x3d287523, 0x52e821cf, 0x3d24bff6,
-    0x52f422db, 0x3d21086c, 0x5300232c, 0x3d1d4e88,
-    0x530c22c1, 0x3d199248, 0x5318219a, 0x3d15d3ad,
-    0x53241fb6, 0x3d1212b7, 0x53301d16, 0x3d0e4f67,
-    0x533c19b8, 0x3d0a89bc, 0x5348159d, 0x3d06c1b6,
-    0x535410c3, 0x3d02f757, 0x53600b2a, 0x3cff2a9d,
-    0x536c04d2, 0x3cfb5b89, 0x5377fdbb, 0x3cf78a1b,
-    0x5383f5e3, 0x3cf3b653, 0x538fed4b, 0x3cefe032,
-    0x539be3f2, 0x3cec07b8, 0x53a7d9d7, 0x3ce82ce4,
-    0x53b3cefa, 0x3ce44fb7, 0x53bfc35b, 0x3ce07031,
-    0x53cbb6f8, 0x3cdc8e52, 0x53d7a9d3, 0x3cd8aa1b,
-    0x53e39be9, 0x3cd4c38b, 0x53ef8d3c, 0x3cd0daa2,
-    0x53fb7dc9, 0x3cccef62, 0x54076d91, 0x3cc901c9,
-    0x54135c94, 0x3cc511d9, 0x541f4ad1, 0x3cc11f90,
-    0x542b3846, 0x3cbd2af0, 0x543724f5, 0x3cb933f9,
-    0x544310dd, 0x3cb53aaa, 0x544efbfc, 0x3cb13f04,
-    0x545ae653, 0x3cad4107, 0x5466cfe1, 0x3ca940b3,
-    0x5472b8a5, 0x3ca53e09, 0x547ea0a0, 0x3ca13908,
-    0x548a87d1, 0x3c9d31b0, 0x54966e36, 0x3c992803,
-    0x54a253d1, 0x3c951bff, 0x54ae38a0, 0x3c910da5,
-    0x54ba1ca3, 0x3c8cfcf6, 0x54c5ffd9, 0x3c88e9f1,
-    0x54d1e242, 0x3c84d496, 0x54ddc3de, 0x3c80bce7,
-    0x54e9a4ac, 0x3c7ca2e2, 0x54f584ac, 0x3c788688,
-    0x550163dc, 0x3c7467d9, 0x550d423d, 0x3c7046d6,
-    0x55191fcf, 0x3c6c237e, 0x5524fc90, 0x3c67fdd1,
-    0x5530d881, 0x3c63d5d1, 0x553cb3a0, 0x3c5fab7c,
-    0x55488dee, 0x3c5b7ed4, 0x5554676a, 0x3c574fd8,
-    0x55604013, 0x3c531e88, 0x556c17e9, 0x3c4eeae5,
-    0x5577eeec, 0x3c4ab4ef, 0x5583c51b, 0x3c467ca6,
-    0x558f9a76, 0x3c42420a, 0x559b6efb, 0x3c3e051b,
-    0x55a742ac, 0x3c39c5da, 0x55b31587, 0x3c358446,
-    0x55bee78c, 0x3c314060, 0x55cab8ba, 0x3c2cfa28,
-    0x55d68911, 0x3c28b19e, 0x55e25890, 0x3c2466c2,
-    0x55ee2738, 0x3c201994, 0x55f9f507, 0x3c1bca16,
-    0x5605c1fd, 0x3c177845, 0x56118e1a, 0x3c132424,
-    0x561d595d, 0x3c0ecdb2, 0x562923c5, 0x3c0a74f0,
-    0x5634ed53, 0x3c0619dc, 0x5640b606, 0x3c01bc78,
-    0x564c7ddd, 0x3bfd5cc4, 0x565844d8, 0x3bf8fac0,
-    0x56640af7, 0x3bf4966c, 0x566fd039, 0x3bf02fc9,
-    0x567b949d, 0x3bebc6d5, 0x56875823, 0x3be75b93,
-    0x56931acb, 0x3be2ee01, 0x569edc94, 0x3bde7e20,
-    0x56aa9d7e, 0x3bda0bf0, 0x56b65d88, 0x3bd59771,
-    0x56c21cb2, 0x3bd120a4, 0x56cddafb, 0x3bcca789,
-    0x56d99864, 0x3bc82c1f, 0x56e554ea, 0x3bc3ae67,
-    0x56f1108f, 0x3bbf2e62, 0x56fccb51, 0x3bbaac0e,
-    0x57088531, 0x3bb6276e, 0x57143e2d, 0x3bb1a080,
-    0x571ff646, 0x3bad1744, 0x572bad7a, 0x3ba88bbc,
-    0x573763c9, 0x3ba3fde7, 0x57431933, 0x3b9f6dc5,
-    0x574ecdb8, 0x3b9adb57, 0x575a8157, 0x3b96469d,
-    0x5766340f, 0x3b91af97, 0x5771e5e0, 0x3b8d1644,
-    0x577d96ca, 0x3b887aa6, 0x578946cc, 0x3b83dcbc,
-    0x5794f5e6, 0x3b7f3c87, 0x57a0a417, 0x3b7a9a07,
-    0x57ac515f, 0x3b75f53c, 0x57b7fdbd, 0x3b714e25,
-    0x57c3a931, 0x3b6ca4c4, 0x57cf53bb, 0x3b67f919,
-    0x57dafd59, 0x3b634b23, 0x57e6a60c, 0x3b5e9ae4,
-    0x57f24dd3, 0x3b59e85a, 0x57fdf4ae, 0x3b553386,
-    0x58099a9c, 0x3b507c69, 0x58153f9d, 0x3b4bc303,
-    0x5820e3b0, 0x3b470753, 0x582c86d5, 0x3b42495a,
-    0x5838290c, 0x3b3d8918, 0x5843ca53, 0x3b38c68e,
-    0x584f6aab, 0x3b3401bb, 0x585b0a13, 0x3b2f3aa0,
-    0x5866a88a, 0x3b2a713d, 0x58724611, 0x3b25a591,
-    0x587de2a7, 0x3b20d79e, 0x58897e4a, 0x3b1c0764,
-    0x589518fc, 0x3b1734e2, 0x58a0b2bb, 0x3b126019,
-    0x58ac4b87, 0x3b0d8909, 0x58b7e35f, 0x3b08afb2,
-    0x58c37a44, 0x3b03d414, 0x58cf1034, 0x3afef630,
-    0x58daa52f, 0x3afa1605, 0x58e63935, 0x3af53395,
-    0x58f1cc45, 0x3af04edf, 0x58fd5e5f, 0x3aeb67e3,
-    0x5908ef82, 0x3ae67ea1, 0x59147fae, 0x3ae1931a,
-    0x59200ee3, 0x3adca54e, 0x592b9d1f, 0x3ad7b53d,
-    0x59372a64, 0x3ad2c2e8, 0x5942b6af, 0x3acdce4d,
-    0x594e4201, 0x3ac8d76f, 0x5959cc5a, 0x3ac3de4c,
-    0x596555b8, 0x3abee2e5, 0x5970de1b, 0x3ab9e53a,
-    0x597c6584, 0x3ab4e54c, 0x5987ebf0, 0x3aafe31b,
-    0x59937161, 0x3aaadea6, 0x599ef5d6, 0x3aa5d7ee,
-    0x59aa794d, 0x3aa0cef3, 0x59b5fbc8, 0x3a9bc3b6,
-    0x59c17d44, 0x3a96b636, 0x59ccfdc2, 0x3a91a674,
-    0x59d87d42, 0x3a8c9470, 0x59e3fbc3, 0x3a87802a,
-    0x59ef7944, 0x3a8269a3, 0x59faf5c5, 0x3a7d50da,
-    0x5a067145, 0x3a7835cf, 0x5a11ebc5, 0x3a731884,
-    0x5a1d6544, 0x3a6df8f8, 0x5a28ddc0, 0x3a68d72b,
-    0x5a34553b, 0x3a63b31d, 0x5a3fcbb3, 0x3a5e8cd0,
-    0x5a4b4128, 0x3a596442, 0x5a56b599, 0x3a543974,
-    0x5a622907, 0x3a4f0c67, 0x5a6d9b70, 0x3a49dd1a,
-    0x5a790cd4, 0x3a44ab8e, 0x5a847d33, 0x3a3f77c3,
-    0x5a8fec8c, 0x3a3a41b9, 0x5a9b5adf, 0x3a350970,
-    0x5aa6c82b, 0x3a2fcee8, 0x5ab23471, 0x3a2a9223,
-    0x5abd9faf, 0x3a25531f, 0x5ac909e5, 0x3a2011de,
-    0x5ad47312, 0x3a1ace5f, 0x5adfdb37, 0x3a1588a2,
-    0x5aeb4253, 0x3a1040a8, 0x5af6a865, 0x3a0af671,
-    0x5b020d6c, 0x3a05a9fd, 0x5b0d716a, 0x3a005b4d,
-    0x5b18d45c, 0x39fb0a60, 0x5b243643, 0x39f5b737,
-    0x5b2f971e, 0x39f061d2, 0x5b3af6ec, 0x39eb0a31,
-    0x5b4655ae, 0x39e5b054, 0x5b51b363, 0x39e0543c,
-    0x5b5d100a, 0x39daf5e8, 0x5b686ba3, 0x39d5955a,
-    0x5b73c62d, 0x39d03291, 0x5b7f1fa9, 0x39cacd8d,
-    0x5b8a7815, 0x39c5664f, 0x5b95cf71, 0x39bffcd7,
-    0x5ba125bd, 0x39ba9125, 0x5bac7af9, 0x39b52339,
-    0x5bb7cf23, 0x39afb313, 0x5bc3223c, 0x39aa40b4,
-    0x5bce7442, 0x39a4cc1c, 0x5bd9c537, 0x399f554b,
-    0x5be51518, 0x3999dc42, 0x5bf063e6, 0x399460ff,
-    0x5bfbb1a0, 0x398ee385, 0x5c06fe46, 0x398963d2,
-    0x5c1249d8, 0x3983e1e8, 0x5c1d9454, 0x397e5dc6,
-    0x5c28ddbb, 0x3978d76c, 0x5c34260c, 0x39734edc,
-    0x5c3f6d47, 0x396dc414, 0x5c4ab36b, 0x39683715,
-    0x5c55f878, 0x3962a7e0, 0x5c613c6d, 0x395d1675,
-    0x5c6c7f4a, 0x395782d3, 0x5c77c10e, 0x3951ecfc,
-    0x5c8301b9, 0x394c54ee, 0x5c8e414b, 0x3946baac,
-    0x5c997fc4, 0x39411e33, 0x5ca4bd21, 0x393b7f86,
-    0x5caff965, 0x3935dea4, 0x5cbb348d, 0x39303b8e,
-    0x5cc66e99, 0x392a9642, 0x5cd1a78a, 0x3924eec3,
-    0x5cdcdf5e, 0x391f4510, 0x5ce81615, 0x39199929,
-    0x5cf34baf, 0x3913eb0e, 0x5cfe802b, 0x390e3ac0,
-    0x5d09b389, 0x3908883f, 0x5d14e5c9, 0x3902d38b,
-    0x5d2016e9, 0x38fd1ca4, 0x5d2b46ea, 0x38f7638b,
-    0x5d3675cb, 0x38f1a840, 0x5d41a38c, 0x38ebeac2,
-    0x5d4cd02c, 0x38e62b13, 0x5d57fbaa, 0x38e06932,
-    0x5d632608, 0x38daa520, 0x5d6e4f43, 0x38d4dedd,
-    0x5d79775c, 0x38cf1669, 0x5d849e51, 0x38c94bc4,
-    0x5d8fc424, 0x38c37eef, 0x5d9ae8d2, 0x38bdafea,
-    0x5da60c5d, 0x38b7deb4, 0x5db12ec3, 0x38b20b4f,
-    0x5dbc5004, 0x38ac35ba, 0x5dc7701f, 0x38a65df6,
-    0x5dd28f15, 0x38a08402, 0x5dddace4, 0x389aa7e0,
-    0x5de8c98c, 0x3894c98f, 0x5df3e50d, 0x388ee910,
-    0x5dfeff67, 0x38890663, 0x5e0a1898, 0x38832187,
-    0x5e1530a1, 0x387d3a7e, 0x5e204781, 0x38775147,
-    0x5e2b5d38, 0x387165e3, 0x5e3671c5, 0x386b7852,
-    0x5e418528, 0x38658894, 0x5e4c9760, 0x385f96a9,
-    0x5e57a86d, 0x3859a292, 0x5e62b84f, 0x3853ac4f,
-    0x5e6dc705, 0x384db3e0, 0x5e78d48e, 0x3847b946,
-    0x5e83e0eb, 0x3841bc7f, 0x5e8eec1b, 0x383bbd8e,
-    0x5e99f61d, 0x3835bc71, 0x5ea4fef0, 0x382fb92a,
-    0x5eb00696, 0x3829b3b9, 0x5ebb0d0d, 0x3823ac1d,
-    0x5ec61254, 0x381da256, 0x5ed1166b, 0x38179666,
-    0x5edc1953, 0x3811884d, 0x5ee71b0a, 0x380b780a,
-    0x5ef21b90, 0x3805659e, 0x5efd1ae4, 0x37ff5109,
-    0x5f081907, 0x37f93a4b, 0x5f1315f7, 0x37f32165,
-    0x5f1e11b5, 0x37ed0657, 0x5f290c3f, 0x37e6e921,
-    0x5f340596, 0x37e0c9c3, 0x5f3efdb9, 0x37daa83d,
-    0x5f49f4a8, 0x37d48490, 0x5f54ea62, 0x37ce5ebd,
-    0x5f5fdee6, 0x37c836c2, 0x5f6ad235, 0x37c20ca1,
-    0x5f75c44e, 0x37bbe05a, 0x5f80b531, 0x37b5b1ec,
-    0x5f8ba4dc, 0x37af8159, 0x5f969350, 0x37a94ea0,
-    0x5fa1808c, 0x37a319c2, 0x5fac6c91, 0x379ce2be,
-    0x5fb7575c, 0x3796a996, 0x5fc240ef, 0x37906e49,
-    0x5fcd2948, 0x378a30d8, 0x5fd81067, 0x3783f143,
-    0x5fe2f64c, 0x377daf89, 0x5feddaf6, 0x37776bac,
-    0x5ff8be65, 0x377125ac, 0x6003a099, 0x376add88,
-    0x600e8190, 0x37649341, 0x6019614c, 0x375e46d8,
-    0x60243fca, 0x3757f84c, 0x602f1d0b, 0x3751a79e,
-    0x6039f90f, 0x374b54ce, 0x6044d3d4, 0x3744ffdd,
-    0x604fad5b, 0x373ea8ca, 0x605a85a3, 0x37384f95,
-    0x60655cac, 0x3731f440, 0x60703275, 0x372b96ca,
-    0x607b06fe, 0x37253733, 0x6085da46, 0x371ed57c,
-    0x6090ac4d, 0x371871a5, 0x609b7d13, 0x37120bae,
-    0x60a64c97, 0x370ba398, 0x60b11ad9, 0x37053962,
-    0x60bbe7d8, 0x36fecd0e, 0x60c6b395, 0x36f85e9a,
-    0x60d17e0d, 0x36f1ee09, 0x60dc4742, 0x36eb7b58,
-    0x60e70f32, 0x36e5068a, 0x60f1d5de, 0x36de8f9e,
-    0x60fc9b44, 0x36d81695, 0x61075f65, 0x36d19b6e,
-    0x61122240, 0x36cb1e2a, 0x611ce3d5, 0x36c49ec9,
-    0x6127a423, 0x36be1d4c, 0x61326329, 0x36b799b3,
-    0x613d20e8, 0x36b113fd, 0x6147dd5f, 0x36aa8c2c,
-    0x6152988d, 0x36a4023f, 0x615d5273, 0x369d7637,
-    0x61680b0f, 0x3696e814, 0x6172c262, 0x369057d6,
-    0x617d786a, 0x3689c57d, 0x61882d28, 0x3683310b,
-    0x6192e09b, 0x367c9a7e, 0x619d92c2, 0x367601d7,
-    0x61a8439e, 0x366f6717, 0x61b2f32e, 0x3668ca3e,
-    0x61bda171, 0x36622b4c, 0x61c84e67, 0x365b8a41,
-    0x61d2fa0f, 0x3654e71d, 0x61dda46a, 0x364e41e2,
-    0x61e84d76, 0x36479a8e, 0x61f2f534, 0x3640f123,
-    0x61fd9ba3, 0x363a45a0, 0x620840c2, 0x36339806,
-    0x6212e492, 0x362ce855, 0x621d8711, 0x3626368d,
-    0x6228283f, 0x361f82af, 0x6232c81c, 0x3618ccba,
-    0x623d66a8, 0x361214b0, 0x624803e2, 0x360b5a90,
-    0x62529fca, 0x36049e5b, 0x625d3a5e, 0x35fde011,
-    0x6267d3a0, 0x35f71fb1, 0x62726b8e, 0x35f05d3d,
-    0x627d0228, 0x35e998b5, 0x6287976e, 0x35e2d219,
-    0x62922b5e, 0x35dc0968, 0x629cbdfa, 0x35d53ea5,
-    0x62a74f40, 0x35ce71ce, 0x62b1df30, 0x35c7a2e3,
-    0x62bc6dca, 0x35c0d1e7, 0x62c6fb0c, 0x35b9fed7,
-    0x62d186f8, 0x35b329b5, 0x62dc118c, 0x35ac5282,
-    0x62e69ac8, 0x35a5793c, 0x62f122ab, 0x359e9de5,
-    0x62fba936, 0x3597c07d, 0x63062e67, 0x3590e104,
-    0x6310b23e, 0x3589ff7a, 0x631b34bc, 0x35831be0,
-    0x6325b5df, 0x357c3636, 0x633035a7, 0x35754e7c,
-    0x633ab414, 0x356e64b2, 0x63453125, 0x356778d9,
-    0x634facda, 0x35608af1, 0x635a2733, 0x35599afa,
-    0x6364a02e, 0x3552a8f4, 0x636f17cc, 0x354bb4e1,
-    0x63798e0d, 0x3544bebf, 0x638402ef, 0x353dc68f,
-    0x638e7673, 0x3536cc52, 0x6398e898, 0x352fd008,
-    0x63a3595e, 0x3528d1b1, 0x63adc8c4, 0x3521d14d,
-    0x63b836ca, 0x351acedd, 0x63c2a36f, 0x3513ca60,
-    0x63cd0eb3, 0x350cc3d8, 0x63d77896, 0x3505bb44,
-    0x63e1e117, 0x34feb0a5, 0x63ec4837, 0x34f7a3fb,
-    0x63f6adf3, 0x34f09546, 0x6401124d, 0x34e98487,
-    0x640b7543, 0x34e271bd, 0x6415d6d5, 0x34db5cea,
-    0x64203704, 0x34d4460c, 0x642a95ce, 0x34cd2d26,
-    0x6434f332, 0x34c61236, 0x643f4f32, 0x34bef53d,
-    0x6449a9cc, 0x34b7d63c, 0x645402ff, 0x34b0b533,
-    0x645e5acc, 0x34a99221, 0x6468b132, 0x34a26d08,
-    0x64730631, 0x349b45e7, 0x647d59c8, 0x34941cbf,
-    0x6487abf7, 0x348cf190, 0x6491fcbe, 0x3485c45b,
-    0x649c4c1b, 0x347e951f, 0x64a69a0f, 0x347763dd,
-    0x64b0e699, 0x34703095, 0x64bb31ba, 0x3468fb47,
-    0x64c57b6f, 0x3461c3f5, 0x64cfc3ba, 0x345a8a9d,
-    0x64da0a9a, 0x34534f41, 0x64e4500e, 0x344c11e0,
-    0x64ee9415, 0x3444d27b, 0x64f8d6b0, 0x343d9112,
-    0x650317df, 0x34364da6, 0x650d57a0, 0x342f0836,
-    0x651795f3, 0x3427c0c3, 0x6521d2d8, 0x3420774d,
-    0x652c0e4f, 0x34192bd5, 0x65364857, 0x3411de5b,
-    0x654080ef, 0x340a8edf, 0x654ab818, 0x34033d61,
-    0x6554edd1, 0x33fbe9e2, 0x655f2219, 0x33f49462,
-    0x656954f1, 0x33ed3ce1, 0x65738657, 0x33e5e360,
-    0x657db64c, 0x33de87de, 0x6587e4cf, 0x33d72a5d,
-    0x659211df, 0x33cfcadc, 0x659c3d7c, 0x33c8695b,
-    0x65a667a7, 0x33c105db, 0x65b0905d, 0x33b9a05d,
-    0x65bab7a0, 0x33b238e0, 0x65c4dd6e, 0x33aacf65,
-    0x65cf01c8, 0x33a363ec, 0x65d924ac, 0x339bf675,
-    0x65e3461b, 0x33948701, 0x65ed6614, 0x338d1590,
-    0x65f78497, 0x3385a222, 0x6601a1a2, 0x337e2cb7,
-    0x660bbd37, 0x3376b551, 0x6615d754, 0x336f3bee,
-    0x661feffa, 0x3367c090, 0x662a0727, 0x33604336,
-    0x66341cdb, 0x3358c3e2, 0x663e3117, 0x33514292,
-    0x664843d9, 0x3349bf48, 0x66525521, 0x33423a04,
-    0x665c64ef, 0x333ab2c6, 0x66667342, 0x3333298f,
-    0x6670801a, 0x332b9e5e, 0x667a8b77, 0x33241134,
-    0x66849558, 0x331c8211, 0x668e9dbd, 0x3314f0f6,
-    0x6698a4a6, 0x330d5de3, 0x66a2aa11, 0x3305c8d7,
-    0x66acadff, 0x32fe31d5, 0x66b6b070, 0x32f698db,
-    0x66c0b162, 0x32eefdea, 0x66cab0d6, 0x32e76102,
-    0x66d4aecb, 0x32dfc224, 0x66deab41, 0x32d82150,
-    0x66e8a637, 0x32d07e85, 0x66f29fad, 0x32c8d9c6,
-    0x66fc97a3, 0x32c13311, 0x67068e18, 0x32b98a67,
-    0x6710830c, 0x32b1dfc9, 0x671a767e, 0x32aa3336,
-    0x6724686e, 0x32a284b0, 0x672e58dc, 0x329ad435,
-    0x673847c8, 0x329321c7, 0x67423530, 0x328b6d66,
-    0x674c2115, 0x3283b712, 0x67560b76, 0x327bfecc,
-    0x675ff452, 0x32744493, 0x6769dbaa, 0x326c8868,
-    0x6773c17d, 0x3264ca4c, 0x677da5cb, 0x325d0a3e,
-    0x67878893, 0x32554840, 0x679169d5, 0x324d8450,
-    0x679b4990, 0x3245be70, 0x67a527c4, 0x323df6a0,
-    0x67af0472, 0x32362ce0, 0x67b8df97, 0x322e6130,
-    0x67c2b934, 0x32269391, 0x67cc9149, 0x321ec403,
-    0x67d667d5, 0x3216f287, 0x67e03cd8, 0x320f1f1c,
-    0x67ea1052, 0x320749c3, 0x67f3e241, 0x31ff727c,
-    0x67fdb2a7, 0x31f79948, 0x68078181, 0x31efbe27,
-    0x68114ed0, 0x31e7e118, 0x681b1a94, 0x31e0021e,
-    0x6824e4cc, 0x31d82137, 0x682ead78, 0x31d03e64,
-    0x68387498, 0x31c859a5, 0x68423a2a, 0x31c072fb,
-    0x684bfe2f, 0x31b88a66, 0x6855c0a6, 0x31b09fe7,
-    0x685f8190, 0x31a8b37c, 0x686940ea, 0x31a0c528,
-    0x6872feb6, 0x3198d4ea, 0x687cbaf3, 0x3190e2c3,
-    0x688675a0, 0x3188eeb2, 0x68902ebd, 0x3180f8b8,
-    0x6899e64a, 0x317900d6, 0x68a39c46, 0x3171070c,
-    0x68ad50b1, 0x31690b59, 0x68b7038b, 0x31610dbf,
-    0x68c0b4d2, 0x31590e3e, 0x68ca6488, 0x31510cd5,
-    0x68d412ab, 0x31490986, 0x68ddbf3b, 0x31410450,
-    0x68e76a37, 0x3138fd35, 0x68f113a0, 0x3130f433,
-    0x68fabb75, 0x3128e94c, 0x690461b5, 0x3120dc80,
-    0x690e0661, 0x3118cdcf, 0x6917a977, 0x3110bd39,
-    0x69214af8, 0x3108aabf, 0x692aeae3, 0x31009661,
-    0x69348937, 0x30f8801f, 0x693e25f5, 0x30f067fb,
-    0x6947c11c, 0x30e84df3, 0x69515aab, 0x30e03208,
-    0x695af2a3, 0x30d8143b, 0x69648902, 0x30cff48c,
-    0x696e1dc9, 0x30c7d2fb, 0x6977b0f7, 0x30bfaf89,
-    0x6981428c, 0x30b78a36, 0x698ad287, 0x30af6302,
-    0x699460e8, 0x30a739ed, 0x699dedaf, 0x309f0ef8,
-    0x69a778db, 0x3096e223, 0x69b1026c, 0x308eb36f,
-    0x69ba8a61, 0x308682dc, 0x69c410ba, 0x307e5069,
-    0x69cd9578, 0x30761c18, 0x69d71899, 0x306de5e9,
-    0x69e09a1c, 0x3065addb, 0x69ea1a03, 0x305d73f0,
-    0x69f3984c, 0x30553828, 0x69fd14f6, 0x304cfa83,
-    0x6a069003, 0x3044bb00, 0x6a100970, 0x303c79a2,
-    0x6a19813f, 0x30343667, 0x6a22f76e, 0x302bf151,
-    0x6a2c6bfd, 0x3023aa5f, 0x6a35deeb, 0x301b6193,
-    0x6a3f503a, 0x301316eb, 0x6a48bfe7, 0x300aca69,
-    0x6a522df3, 0x30027c0c, 0x6a5b9a5d, 0x2ffa2bd6,
-    0x6a650525, 0x2ff1d9c7, 0x6a6e6e4b, 0x2fe985de,
-    0x6a77d5ce, 0x2fe1301c, 0x6a813bae, 0x2fd8d882,
-    0x6a8a9fea, 0x2fd07f0f, 0x6a940283, 0x2fc823c5,
-    0x6a9d6377, 0x2fbfc6a3, 0x6aa6c2c6, 0x2fb767aa,
-    0x6ab02071, 0x2faf06da, 0x6ab97c77, 0x2fa6a433,
-    0x6ac2d6d6, 0x2f9e3fb6, 0x6acc2f90, 0x2f95d963,
-    0x6ad586a3, 0x2f8d713a, 0x6adedc10, 0x2f85073c,
-    0x6ae82fd5, 0x2f7c9b69, 0x6af181f3, 0x2f742dc1,
-    0x6afad269, 0x2f6bbe45, 0x6b042137, 0x2f634cf5,
-    0x6b0d6e5c, 0x2f5ad9d1, 0x6b16b9d9, 0x2f5264da,
-    0x6b2003ac, 0x2f49ee0f, 0x6b294bd5, 0x2f417573,
-    0x6b329255, 0x2f38fb03, 0x6b3bd72a, 0x2f307ec2,
-    0x6b451a55, 0x2f2800af, 0x6b4e5bd4, 0x2f1f80ca,
-    0x6b579ba8, 0x2f16ff14, 0x6b60d9d0, 0x2f0e7b8e,
-    0x6b6a164d, 0x2f05f637, 0x6b73511c, 0x2efd6f10,
-    0x6b7c8a3f, 0x2ef4e619, 0x6b85c1b5, 0x2eec5b53,
-    0x6b8ef77d, 0x2ee3cebe, 0x6b982b97, 0x2edb405a,
-    0x6ba15e03, 0x2ed2b027, 0x6baa8ec0, 0x2eca1e27,
-    0x6bb3bdce, 0x2ec18a58, 0x6bbceb2d, 0x2eb8f4bc,
-    0x6bc616dd, 0x2eb05d53, 0x6bcf40dc, 0x2ea7c41e,
-    0x6bd8692b, 0x2e9f291b, 0x6be18fc9, 0x2e968c4d,
-    0x6beab4b6, 0x2e8dedb3, 0x6bf3d7f2, 0x2e854d4d,
-    0x6bfcf97c, 0x2e7cab1c, 0x6c061953, 0x2e740720,
-    0x6c0f3779, 0x2e6b615a, 0x6c1853eb, 0x2e62b9ca,
-    0x6c216eaa, 0x2e5a1070, 0x6c2a87b6, 0x2e51654c,
-    0x6c339f0e, 0x2e48b860, 0x6c3cb4b1, 0x2e4009aa,
-    0x6c45c8a0, 0x2e37592c, 0x6c4edada, 0x2e2ea6e6,
-    0x6c57eb5e, 0x2e25f2d8, 0x6c60fa2d, 0x2e1d3d03,
-    0x6c6a0746, 0x2e148566, 0x6c7312a9, 0x2e0bcc03,
-    0x6c7c1c55, 0x2e0310d9, 0x6c85244a, 0x2dfa53e9,
-    0x6c8e2a87, 0x2df19534, 0x6c972f0d, 0x2de8d4b8,
-    0x6ca031da, 0x2de01278, 0x6ca932ef, 0x2dd74e73,
-    0x6cb2324c, 0x2dce88aa, 0x6cbb2fef, 0x2dc5c11c,
-    0x6cc42bd9, 0x2dbcf7cb, 0x6ccd2609, 0x2db42cb6,
-    0x6cd61e7f, 0x2dab5fdf, 0x6cdf153a, 0x2da29144,
-    0x6ce80a3a, 0x2d99c0e7, 0x6cf0fd80, 0x2d90eec8,
-    0x6cf9ef09, 0x2d881ae8, 0x6d02ded7, 0x2d7f4545,
-    0x6d0bcce8, 0x2d766de2, 0x6d14b93d, 0x2d6d94bf,
-    0x6d1da3d5, 0x2d64b9da, 0x6d268cb0, 0x2d5bdd36,
-    0x6d2f73cd, 0x2d52fed2, 0x6d38592c, 0x2d4a1eaf,
-    0x6d413ccd, 0x2d413ccd, 0x6d4a1eaf, 0x2d38592c,
-    0x6d52fed2, 0x2d2f73cd, 0x6d5bdd36, 0x2d268cb0,
-    0x6d64b9da, 0x2d1da3d5, 0x6d6d94bf, 0x2d14b93d,
-    0x6d766de2, 0x2d0bcce8, 0x6d7f4545, 0x2d02ded7,
-    0x6d881ae8, 0x2cf9ef09, 0x6d90eec8, 0x2cf0fd80,
-    0x6d99c0e7, 0x2ce80a3a, 0x6da29144, 0x2cdf153a,
-    0x6dab5fdf, 0x2cd61e7f, 0x6db42cb6, 0x2ccd2609,
-    0x6dbcf7cb, 0x2cc42bd9, 0x6dc5c11c, 0x2cbb2fef,
-    0x6dce88aa, 0x2cb2324c, 0x6dd74e73, 0x2ca932ef,
-    0x6de01278, 0x2ca031da, 0x6de8d4b8, 0x2c972f0d,
-    0x6df19534, 0x2c8e2a87, 0x6dfa53e9, 0x2c85244a,
-    0x6e0310d9, 0x2c7c1c55, 0x6e0bcc03, 0x2c7312a9,
-    0x6e148566, 0x2c6a0746, 0x6e1d3d03, 0x2c60fa2d,
-    0x6e25f2d8, 0x2c57eb5e, 0x6e2ea6e6, 0x2c4edada,
-    0x6e37592c, 0x2c45c8a0, 0x6e4009aa, 0x2c3cb4b1,
-    0x6e48b860, 0x2c339f0e, 0x6e51654c, 0x2c2a87b6,
-    0x6e5a1070, 0x2c216eaa, 0x6e62b9ca, 0x2c1853eb,
-    0x6e6b615a, 0x2c0f3779, 0x6e740720, 0x2c061953,
-    0x6e7cab1c, 0x2bfcf97c, 0x6e854d4d, 0x2bf3d7f2,
-    0x6e8dedb3, 0x2beab4b6, 0x6e968c4d, 0x2be18fc9,
-    0x6e9f291b, 0x2bd8692b, 0x6ea7c41e, 0x2bcf40dc,
-    0x6eb05d53, 0x2bc616dd, 0x6eb8f4bc, 0x2bbceb2d,
-    0x6ec18a58, 0x2bb3bdce, 0x6eca1e27, 0x2baa8ec0,
-    0x6ed2b027, 0x2ba15e03, 0x6edb405a, 0x2b982b97,
-    0x6ee3cebe, 0x2b8ef77d, 0x6eec5b53, 0x2b85c1b5,
-    0x6ef4e619, 0x2b7c8a3f, 0x6efd6f10, 0x2b73511c,
-    0x6f05f637, 0x2b6a164d, 0x6f0e7b8e, 0x2b60d9d0,
-    0x6f16ff14, 0x2b579ba8, 0x6f1f80ca, 0x2b4e5bd4,
-    0x6f2800af, 0x2b451a55, 0x6f307ec2, 0x2b3bd72a,
-    0x6f38fb03, 0x2b329255, 0x6f417573, 0x2b294bd5,
-    0x6f49ee0f, 0x2b2003ac, 0x6f5264da, 0x2b16b9d9,
-    0x6f5ad9d1, 0x2b0d6e5c, 0x6f634cf5, 0x2b042137,
-    0x6f6bbe45, 0x2afad269, 0x6f742dc1, 0x2af181f3,
-    0x6f7c9b69, 0x2ae82fd5, 0x6f85073c, 0x2adedc10,
-    0x6f8d713a, 0x2ad586a3, 0x6f95d963, 0x2acc2f90,
-    0x6f9e3fb6, 0x2ac2d6d6, 0x6fa6a433, 0x2ab97c77,
-    0x6faf06da, 0x2ab02071, 0x6fb767aa, 0x2aa6c2c6,
-    0x6fbfc6a3, 0x2a9d6377, 0x6fc823c5, 0x2a940283,
-    0x6fd07f0f, 0x2a8a9fea, 0x6fd8d882, 0x2a813bae,
-    0x6fe1301c, 0x2a77d5ce, 0x6fe985de, 0x2a6e6e4b,
-    0x6ff1d9c7, 0x2a650525, 0x6ffa2bd6, 0x2a5b9a5d,
-    0x70027c0c, 0x2a522df3, 0x700aca69, 0x2a48bfe7,
-    0x701316eb, 0x2a3f503a, 0x701b6193, 0x2a35deeb,
-    0x7023aa5f, 0x2a2c6bfd, 0x702bf151, 0x2a22f76e,
-    0x70343667, 0x2a19813f, 0x703c79a2, 0x2a100970,
-    0x7044bb00, 0x2a069003, 0x704cfa83, 0x29fd14f6,
-    0x70553828, 0x29f3984c, 0x705d73f0, 0x29ea1a03,
-    0x7065addb, 0x29e09a1c, 0x706de5e9, 0x29d71899,
-    0x70761c18, 0x29cd9578, 0x707e5069, 0x29c410ba,
-    0x708682dc, 0x29ba8a61, 0x708eb36f, 0x29b1026c,
-    0x7096e223, 0x29a778db, 0x709f0ef8, 0x299dedaf,
-    0x70a739ed, 0x299460e8, 0x70af6302, 0x298ad287,
-    0x70b78a36, 0x2981428c, 0x70bfaf89, 0x2977b0f7,
-    0x70c7d2fb, 0x296e1dc9, 0x70cff48c, 0x29648902,
-    0x70d8143b, 0x295af2a3, 0x70e03208, 0x29515aab,
-    0x70e84df3, 0x2947c11c, 0x70f067fb, 0x293e25f5,
-    0x70f8801f, 0x29348937, 0x71009661, 0x292aeae3,
-    0x7108aabf, 0x29214af8, 0x7110bd39, 0x2917a977,
-    0x7118cdcf, 0x290e0661, 0x7120dc80, 0x290461b5,
-    0x7128e94c, 0x28fabb75, 0x7130f433, 0x28f113a0,
-    0x7138fd35, 0x28e76a37, 0x71410450, 0x28ddbf3b,
-    0x71490986, 0x28d412ab, 0x71510cd5, 0x28ca6488,
-    0x71590e3e, 0x28c0b4d2, 0x71610dbf, 0x28b7038b,
-    0x71690b59, 0x28ad50b1, 0x7171070c, 0x28a39c46,
-    0x717900d6, 0x2899e64a, 0x7180f8b8, 0x28902ebd,
-    0x7188eeb2, 0x288675a0, 0x7190e2c3, 0x287cbaf3,
-    0x7198d4ea, 0x2872feb6, 0x71a0c528, 0x286940ea,
-    0x71a8b37c, 0x285f8190, 0x71b09fe7, 0x2855c0a6,
-    0x71b88a66, 0x284bfe2f, 0x71c072fb, 0x28423a2a,
-    0x71c859a5, 0x28387498, 0x71d03e64, 0x282ead78,
-    0x71d82137, 0x2824e4cc, 0x71e0021e, 0x281b1a94,
-    0x71e7e118, 0x28114ed0, 0x71efbe27, 0x28078181,
-    0x71f79948, 0x27fdb2a7, 0x71ff727c, 0x27f3e241,
-    0x720749c3, 0x27ea1052, 0x720f1f1c, 0x27e03cd8,
-    0x7216f287, 0x27d667d5, 0x721ec403, 0x27cc9149,
-    0x72269391, 0x27c2b934, 0x722e6130, 0x27b8df97,
-    0x72362ce0, 0x27af0472, 0x723df6a0, 0x27a527c4,
-    0x7245be70, 0x279b4990, 0x724d8450, 0x279169d5,
-    0x72554840, 0x27878893, 0x725d0a3e, 0x277da5cb,
-    0x7264ca4c, 0x2773c17d, 0x726c8868, 0x2769dbaa,
-    0x72744493, 0x275ff452, 0x727bfecc, 0x27560b76,
-    0x7283b712, 0x274c2115, 0x728b6d66, 0x27423530,
-    0x729321c7, 0x273847c8, 0x729ad435, 0x272e58dc,
-    0x72a284b0, 0x2724686e, 0x72aa3336, 0x271a767e,
-    0x72b1dfc9, 0x2710830c, 0x72b98a67, 0x27068e18,
-    0x72c13311, 0x26fc97a3, 0x72c8d9c6, 0x26f29fad,
-    0x72d07e85, 0x26e8a637, 0x72d82150, 0x26deab41,
-    0x72dfc224, 0x26d4aecb, 0x72e76102, 0x26cab0d6,
-    0x72eefdea, 0x26c0b162, 0x72f698db, 0x26b6b070,
-    0x72fe31d5, 0x26acadff, 0x7305c8d7, 0x26a2aa11,
-    0x730d5de3, 0x2698a4a6, 0x7314f0f6, 0x268e9dbd,
-    0x731c8211, 0x26849558, 0x73241134, 0x267a8b77,
-    0x732b9e5e, 0x2670801a, 0x7333298f, 0x26667342,
-    0x733ab2c6, 0x265c64ef, 0x73423a04, 0x26525521,
-    0x7349bf48, 0x264843d9, 0x73514292, 0x263e3117,
-    0x7358c3e2, 0x26341cdb, 0x73604336, 0x262a0727,
-    0x7367c090, 0x261feffa, 0x736f3bee, 0x2615d754,
-    0x7376b551, 0x260bbd37, 0x737e2cb7, 0x2601a1a2,
-    0x7385a222, 0x25f78497, 0x738d1590, 0x25ed6614,
-    0x73948701, 0x25e3461b, 0x739bf675, 0x25d924ac,
-    0x73a363ec, 0x25cf01c8, 0x73aacf65, 0x25c4dd6e,
-    0x73b238e0, 0x25bab7a0, 0x73b9a05d, 0x25b0905d,
-    0x73c105db, 0x25a667a7, 0x73c8695b, 0x259c3d7c,
-    0x73cfcadc, 0x259211df, 0x73d72a5d, 0x2587e4cf,
-    0x73de87de, 0x257db64c, 0x73e5e360, 0x25738657,
-    0x73ed3ce1, 0x256954f1, 0x73f49462, 0x255f2219,
-    0x73fbe9e2, 0x2554edd1, 0x74033d61, 0x254ab818,
-    0x740a8edf, 0x254080ef, 0x7411de5b, 0x25364857,
-    0x74192bd5, 0x252c0e4f, 0x7420774d, 0x2521d2d8,
-    0x7427c0c3, 0x251795f3, 0x742f0836, 0x250d57a0,
-    0x74364da6, 0x250317df, 0x743d9112, 0x24f8d6b0,
-    0x7444d27b, 0x24ee9415, 0x744c11e0, 0x24e4500e,
-    0x74534f41, 0x24da0a9a, 0x745a8a9d, 0x24cfc3ba,
-    0x7461c3f5, 0x24c57b6f, 0x7468fb47, 0x24bb31ba,
-    0x74703095, 0x24b0e699, 0x747763dd, 0x24a69a0f,
-    0x747e951f, 0x249c4c1b, 0x7485c45b, 0x2491fcbe,
-    0x748cf190, 0x2487abf7, 0x74941cbf, 0x247d59c8,
-    0x749b45e7, 0x24730631, 0x74a26d08, 0x2468b132,
-    0x74a99221, 0x245e5acc, 0x74b0b533, 0x245402ff,
-    0x74b7d63c, 0x2449a9cc, 0x74bef53d, 0x243f4f32,
-    0x74c61236, 0x2434f332, 0x74cd2d26, 0x242a95ce,
-    0x74d4460c, 0x24203704, 0x74db5cea, 0x2415d6d5,
-    0x74e271bd, 0x240b7543, 0x74e98487, 0x2401124d,
-    0x74f09546, 0x23f6adf3, 0x74f7a3fb, 0x23ec4837,
-    0x74feb0a5, 0x23e1e117, 0x7505bb44, 0x23d77896,
-    0x750cc3d8, 0x23cd0eb3, 0x7513ca60, 0x23c2a36f,
-    0x751acedd, 0x23b836ca, 0x7521d14d, 0x23adc8c4,
-    0x7528d1b1, 0x23a3595e, 0x752fd008, 0x2398e898,
-    0x7536cc52, 0x238e7673, 0x753dc68f, 0x238402ef,
-    0x7544bebf, 0x23798e0d, 0x754bb4e1, 0x236f17cc,
-    0x7552a8f4, 0x2364a02e, 0x75599afa, 0x235a2733,
-    0x75608af1, 0x234facda, 0x756778d9, 0x23453125,
-    0x756e64b2, 0x233ab414, 0x75754e7c, 0x233035a7,
-    0x757c3636, 0x2325b5df, 0x75831be0, 0x231b34bc,
-    0x7589ff7a, 0x2310b23e, 0x7590e104, 0x23062e67,
-    0x7597c07d, 0x22fba936, 0x759e9de5, 0x22f122ab,
-    0x75a5793c, 0x22e69ac8, 0x75ac5282, 0x22dc118c,
-    0x75b329b5, 0x22d186f8, 0x75b9fed7, 0x22c6fb0c,
-    0x75c0d1e7, 0x22bc6dca, 0x75c7a2e3, 0x22b1df30,
-    0x75ce71ce, 0x22a74f40, 0x75d53ea5, 0x229cbdfa,
-    0x75dc0968, 0x22922b5e, 0x75e2d219, 0x2287976e,
-    0x75e998b5, 0x227d0228, 0x75f05d3d, 0x22726b8e,
-    0x75f71fb1, 0x2267d3a0, 0x75fde011, 0x225d3a5e,
-    0x76049e5b, 0x22529fca, 0x760b5a90, 0x224803e2,
-    0x761214b0, 0x223d66a8, 0x7618ccba, 0x2232c81c,
-    0x761f82af, 0x2228283f, 0x7626368d, 0x221d8711,
-    0x762ce855, 0x2212e492, 0x76339806, 0x220840c2,
-    0x763a45a0, 0x21fd9ba3, 0x7640f123, 0x21f2f534,
-    0x76479a8e, 0x21e84d76, 0x764e41e2, 0x21dda46a,
-    0x7654e71d, 0x21d2fa0f, 0x765b8a41, 0x21c84e67,
-    0x76622b4c, 0x21bda171, 0x7668ca3e, 0x21b2f32e,
-    0x766f6717, 0x21a8439e, 0x767601d7, 0x219d92c2,
-    0x767c9a7e, 0x2192e09b, 0x7683310b, 0x21882d28,
-    0x7689c57d, 0x217d786a, 0x769057d6, 0x2172c262,
-    0x7696e814, 0x21680b0f, 0x769d7637, 0x215d5273,
-    0x76a4023f, 0x2152988d, 0x76aa8c2c, 0x2147dd5f,
-    0x76b113fd, 0x213d20e8, 0x76b799b3, 0x21326329,
-    0x76be1d4c, 0x2127a423, 0x76c49ec9, 0x211ce3d5,
-    0x76cb1e2a, 0x21122240, 0x76d19b6e, 0x21075f65,
-    0x76d81695, 0x20fc9b44, 0x76de8f9e, 0x20f1d5de,
-    0x76e5068a, 0x20e70f32, 0x76eb7b58, 0x20dc4742,
-    0x76f1ee09, 0x20d17e0d, 0x76f85e9a, 0x20c6b395,
-    0x76fecd0e, 0x20bbe7d8, 0x77053962, 0x20b11ad9,
-    0x770ba398, 0x20a64c97, 0x77120bae, 0x209b7d13,
-    0x771871a5, 0x2090ac4d, 0x771ed57c, 0x2085da46,
-    0x77253733, 0x207b06fe, 0x772b96ca, 0x20703275,
-    0x7731f440, 0x20655cac, 0x77384f95, 0x205a85a3,
-    0x773ea8ca, 0x204fad5b, 0x7744ffdd, 0x2044d3d4,
-    0x774b54ce, 0x2039f90f, 0x7751a79e, 0x202f1d0b,
-    0x7757f84c, 0x20243fca, 0x775e46d8, 0x2019614c,
-    0x77649341, 0x200e8190, 0x776add88, 0x2003a099,
-    0x777125ac, 0x1ff8be65, 0x77776bac, 0x1feddaf6,
-    0x777daf89, 0x1fe2f64c, 0x7783f143, 0x1fd81067,
-    0x778a30d8, 0x1fcd2948, 0x77906e49, 0x1fc240ef,
-    0x7796a996, 0x1fb7575c, 0x779ce2be, 0x1fac6c91,
-    0x77a319c2, 0x1fa1808c, 0x77a94ea0, 0x1f969350,
-    0x77af8159, 0x1f8ba4dc, 0x77b5b1ec, 0x1f80b531,
-    0x77bbe05a, 0x1f75c44e, 0x77c20ca1, 0x1f6ad235,
-    0x77c836c2, 0x1f5fdee6, 0x77ce5ebd, 0x1f54ea62,
-    0x77d48490, 0x1f49f4a8, 0x77daa83d, 0x1f3efdb9,
-    0x77e0c9c3, 0x1f340596, 0x77e6e921, 0x1f290c3f,
-    0x77ed0657, 0x1f1e11b5, 0x77f32165, 0x1f1315f7,
-    0x77f93a4b, 0x1f081907, 0x77ff5109, 0x1efd1ae4,
-    0x7805659e, 0x1ef21b90, 0x780b780a, 0x1ee71b0a,
-    0x7811884d, 0x1edc1953, 0x78179666, 0x1ed1166b,
-    0x781da256, 0x1ec61254, 0x7823ac1d, 0x1ebb0d0d,
-    0x7829b3b9, 0x1eb00696, 0x782fb92a, 0x1ea4fef0,
-    0x7835bc71, 0x1e99f61d, 0x783bbd8e, 0x1e8eec1b,
-    0x7841bc7f, 0x1e83e0eb, 0x7847b946, 0x1e78d48e,
-    0x784db3e0, 0x1e6dc705, 0x7853ac4f, 0x1e62b84f,
-    0x7859a292, 0x1e57a86d, 0x785f96a9, 0x1e4c9760,
-    0x78658894, 0x1e418528, 0x786b7852, 0x1e3671c5,
-    0x787165e3, 0x1e2b5d38, 0x78775147, 0x1e204781,
-    0x787d3a7e, 0x1e1530a1, 0x78832187, 0x1e0a1898,
-    0x78890663, 0x1dfeff67, 0x788ee910, 0x1df3e50d,
-    0x7894c98f, 0x1de8c98c, 0x789aa7e0, 0x1dddace4,
-    0x78a08402, 0x1dd28f15, 0x78a65df6, 0x1dc7701f,
-    0x78ac35ba, 0x1dbc5004, 0x78b20b4f, 0x1db12ec3,
-    0x78b7deb4, 0x1da60c5d, 0x78bdafea, 0x1d9ae8d2,
-    0x78c37eef, 0x1d8fc424, 0x78c94bc4, 0x1d849e51,
-    0x78cf1669, 0x1d79775c, 0x78d4dedd, 0x1d6e4f43,
-    0x78daa520, 0x1d632608, 0x78e06932, 0x1d57fbaa,
-    0x78e62b13, 0x1d4cd02c, 0x78ebeac2, 0x1d41a38c,
-    0x78f1a840, 0x1d3675cb, 0x78f7638b, 0x1d2b46ea,
-    0x78fd1ca4, 0x1d2016e9, 0x7902d38b, 0x1d14e5c9,
-    0x7908883f, 0x1d09b389, 0x790e3ac0, 0x1cfe802b,
-    0x7913eb0e, 0x1cf34baf, 0x79199929, 0x1ce81615,
-    0x791f4510, 0x1cdcdf5e, 0x7924eec3, 0x1cd1a78a,
-    0x792a9642, 0x1cc66e99, 0x79303b8e, 0x1cbb348d,
-    0x7935dea4, 0x1caff965, 0x793b7f86, 0x1ca4bd21,
-    0x79411e33, 0x1c997fc4, 0x7946baac, 0x1c8e414b,
-    0x794c54ee, 0x1c8301b9, 0x7951ecfc, 0x1c77c10e,
-    0x795782d3, 0x1c6c7f4a, 0x795d1675, 0x1c613c6d,
-    0x7962a7e0, 0x1c55f878, 0x79683715, 0x1c4ab36b,
-    0x796dc414, 0x1c3f6d47, 0x79734edc, 0x1c34260c,
-    0x7978d76c, 0x1c28ddbb, 0x797e5dc6, 0x1c1d9454,
-    0x7983e1e8, 0x1c1249d8, 0x798963d2, 0x1c06fe46,
-    0x798ee385, 0x1bfbb1a0, 0x799460ff, 0x1bf063e6,
-    0x7999dc42, 0x1be51518, 0x799f554b, 0x1bd9c537,
-    0x79a4cc1c, 0x1bce7442, 0x79aa40b4, 0x1bc3223c,
-    0x79afb313, 0x1bb7cf23, 0x79b52339, 0x1bac7af9,
-    0x79ba9125, 0x1ba125bd, 0x79bffcd7, 0x1b95cf71,
-    0x79c5664f, 0x1b8a7815, 0x79cacd8d, 0x1b7f1fa9,
-    0x79d03291, 0x1b73c62d, 0x79d5955a, 0x1b686ba3,
-    0x79daf5e8, 0x1b5d100a, 0x79e0543c, 0x1b51b363,
-    0x79e5b054, 0x1b4655ae, 0x79eb0a31, 0x1b3af6ec,
-    0x79f061d2, 0x1b2f971e, 0x79f5b737, 0x1b243643,
-    0x79fb0a60, 0x1b18d45c, 0x7a005b4d, 0x1b0d716a,
-    0x7a05a9fd, 0x1b020d6c, 0x7a0af671, 0x1af6a865,
-    0x7a1040a8, 0x1aeb4253, 0x7a1588a2, 0x1adfdb37,
-    0x7a1ace5f, 0x1ad47312, 0x7a2011de, 0x1ac909e5,
-    0x7a25531f, 0x1abd9faf, 0x7a2a9223, 0x1ab23471,
-    0x7a2fcee8, 0x1aa6c82b, 0x7a350970, 0x1a9b5adf,
-    0x7a3a41b9, 0x1a8fec8c, 0x7a3f77c3, 0x1a847d33,
-    0x7a44ab8e, 0x1a790cd4, 0x7a49dd1a, 0x1a6d9b70,
-    0x7a4f0c67, 0x1a622907, 0x7a543974, 0x1a56b599,
-    0x7a596442, 0x1a4b4128, 0x7a5e8cd0, 0x1a3fcbb3,
-    0x7a63b31d, 0x1a34553b, 0x7a68d72b, 0x1a28ddc0,
-    0x7a6df8f8, 0x1a1d6544, 0x7a731884, 0x1a11ebc5,
-    0x7a7835cf, 0x1a067145, 0x7a7d50da, 0x19faf5c5,
-    0x7a8269a3, 0x19ef7944, 0x7a87802a, 0x19e3fbc3,
-    0x7a8c9470, 0x19d87d42, 0x7a91a674, 0x19ccfdc2,
-    0x7a96b636, 0x19c17d44, 0x7a9bc3b6, 0x19b5fbc8,
-    0x7aa0cef3, 0x19aa794d, 0x7aa5d7ee, 0x199ef5d6,
-    0x7aaadea6, 0x19937161, 0x7aafe31b, 0x1987ebf0,
-    0x7ab4e54c, 0x197c6584, 0x7ab9e53a, 0x1970de1b,
-    0x7abee2e5, 0x196555b8, 0x7ac3de4c, 0x1959cc5a,
-    0x7ac8d76f, 0x194e4201, 0x7acdce4d, 0x1942b6af,
-    0x7ad2c2e8, 0x19372a64, 0x7ad7b53d, 0x192b9d1f,
-    0x7adca54e, 0x19200ee3, 0x7ae1931a, 0x19147fae,
-    0x7ae67ea1, 0x1908ef82, 0x7aeb67e3, 0x18fd5e5f,
-    0x7af04edf, 0x18f1cc45, 0x7af53395, 0x18e63935,
-    0x7afa1605, 0x18daa52f, 0x7afef630, 0x18cf1034,
-    0x7b03d414, 0x18c37a44, 0x7b08afb2, 0x18b7e35f,
-    0x7b0d8909, 0x18ac4b87, 0x7b126019, 0x18a0b2bb,
-    0x7b1734e2, 0x189518fc, 0x7b1c0764, 0x18897e4a,
-    0x7b20d79e, 0x187de2a7, 0x7b25a591, 0x18724611,
-    0x7b2a713d, 0x1866a88a, 0x7b2f3aa0, 0x185b0a13,
-    0x7b3401bb, 0x184f6aab, 0x7b38c68e, 0x1843ca53,
-    0x7b3d8918, 0x1838290c, 0x7b42495a, 0x182c86d5,
-    0x7b470753, 0x1820e3b0, 0x7b4bc303, 0x18153f9d,
-    0x7b507c69, 0x18099a9c, 0x7b553386, 0x17fdf4ae,
-    0x7b59e85a, 0x17f24dd3, 0x7b5e9ae4, 0x17e6a60c,
-    0x7b634b23, 0x17dafd59, 0x7b67f919, 0x17cf53bb,
-    0x7b6ca4c4, 0x17c3a931, 0x7b714e25, 0x17b7fdbd,
-    0x7b75f53c, 0x17ac515f, 0x7b7a9a07, 0x17a0a417,
-    0x7b7f3c87, 0x1794f5e6, 0x7b83dcbc, 0x178946cc,
-    0x7b887aa6, 0x177d96ca, 0x7b8d1644, 0x1771e5e0,
-    0x7b91af97, 0x1766340f, 0x7b96469d, 0x175a8157,
-    0x7b9adb57, 0x174ecdb8, 0x7b9f6dc5, 0x17431933,
-    0x7ba3fde7, 0x173763c9, 0x7ba88bbc, 0x172bad7a,
-    0x7bad1744, 0x171ff646, 0x7bb1a080, 0x17143e2d,
-    0x7bb6276e, 0x17088531, 0x7bbaac0e, 0x16fccb51,
-    0x7bbf2e62, 0x16f1108f, 0x7bc3ae67, 0x16e554ea,
-    0x7bc82c1f, 0x16d99864, 0x7bcca789, 0x16cddafb,
-    0x7bd120a4, 0x16c21cb2, 0x7bd59771, 0x16b65d88,
-    0x7bda0bf0, 0x16aa9d7e, 0x7bde7e20, 0x169edc94,
-    0x7be2ee01, 0x16931acb, 0x7be75b93, 0x16875823,
-    0x7bebc6d5, 0x167b949d, 0x7bf02fc9, 0x166fd039,
-    0x7bf4966c, 0x16640af7, 0x7bf8fac0, 0x165844d8,
-    0x7bfd5cc4, 0x164c7ddd, 0x7c01bc78, 0x1640b606,
-    0x7c0619dc, 0x1634ed53, 0x7c0a74f0, 0x162923c5,
-    0x7c0ecdb2, 0x161d595d, 0x7c132424, 0x16118e1a,
-    0x7c177845, 0x1605c1fd, 0x7c1bca16, 0x15f9f507,
-    0x7c201994, 0x15ee2738, 0x7c2466c2, 0x15e25890,
-    0x7c28b19e, 0x15d68911, 0x7c2cfa28, 0x15cab8ba,
-    0x7c314060, 0x15bee78c, 0x7c358446, 0x15b31587,
-    0x7c39c5da, 0x15a742ac, 0x7c3e051b, 0x159b6efb,
-    0x7c42420a, 0x158f9a76, 0x7c467ca6, 0x1583c51b,
-    0x7c4ab4ef, 0x1577eeec, 0x7c4eeae5, 0x156c17e9,
-    0x7c531e88, 0x15604013, 0x7c574fd8, 0x1554676a,
-    0x7c5b7ed4, 0x15488dee, 0x7c5fab7c, 0x153cb3a0,
-    0x7c63d5d1, 0x1530d881, 0x7c67fdd1, 0x1524fc90,
-    0x7c6c237e, 0x15191fcf, 0x7c7046d6, 0x150d423d,
-    0x7c7467d9, 0x150163dc, 0x7c788688, 0x14f584ac,
-    0x7c7ca2e2, 0x14e9a4ac, 0x7c80bce7, 0x14ddc3de,
-    0x7c84d496, 0x14d1e242, 0x7c88e9f1, 0x14c5ffd9,
-    0x7c8cfcf6, 0x14ba1ca3, 0x7c910da5, 0x14ae38a0,
-    0x7c951bff, 0x14a253d1, 0x7c992803, 0x14966e36,
-    0x7c9d31b0, 0x148a87d1, 0x7ca13908, 0x147ea0a0,
-    0x7ca53e09, 0x1472b8a5, 0x7ca940b3, 0x1466cfe1,
-    0x7cad4107, 0x145ae653, 0x7cb13f04, 0x144efbfc,
-    0x7cb53aaa, 0x144310dd, 0x7cb933f9, 0x143724f5,
-    0x7cbd2af0, 0x142b3846, 0x7cc11f90, 0x141f4ad1,
-    0x7cc511d9, 0x14135c94, 0x7cc901c9, 0x14076d91,
-    0x7cccef62, 0x13fb7dc9, 0x7cd0daa2, 0x13ef8d3c,
-    0x7cd4c38b, 0x13e39be9, 0x7cd8aa1b, 0x13d7a9d3,
-    0x7cdc8e52, 0x13cbb6f8, 0x7ce07031, 0x13bfc35b,
-    0x7ce44fb7, 0x13b3cefa, 0x7ce82ce4, 0x13a7d9d7,
-    0x7cec07b8, 0x139be3f2, 0x7cefe032, 0x138fed4b,
-    0x7cf3b653, 0x1383f5e3, 0x7cf78a1b, 0x1377fdbb,
-    0x7cfb5b89, 0x136c04d2, 0x7cff2a9d, 0x13600b2a,
-    0x7d02f757, 0x135410c3, 0x7d06c1b6, 0x1348159d,
-    0x7d0a89bc, 0x133c19b8, 0x7d0e4f67, 0x13301d16,
-    0x7d1212b7, 0x13241fb6, 0x7d15d3ad, 0x1318219a,
-    0x7d199248, 0x130c22c1, 0x7d1d4e88, 0x1300232c,
-    0x7d21086c, 0x12f422db, 0x7d24bff6, 0x12e821cf,
-    0x7d287523, 0x12dc2009, 0x7d2c27f6, 0x12d01d89,
-    0x7d2fd86c, 0x12c41a4f, 0x7d338687, 0x12b8165b,
-    0x7d373245, 0x12ac11af, 0x7d3adba7, 0x12a00c4b,
-    0x7d3e82ae, 0x1294062f, 0x7d422757, 0x1287ff5b,
-    0x7d45c9a4, 0x127bf7d1, 0x7d496994, 0x126fef90,
-    0x7d4d0728, 0x1263e699, 0x7d50a25e, 0x1257dced,
-    0x7d543b37, 0x124bd28c, 0x7d57d1b3, 0x123fc776,
-    0x7d5b65d2, 0x1233bbac, 0x7d5ef793, 0x1227af2e,
-    0x7d6286f6, 0x121ba1fd, 0x7d6613fb, 0x120f941a,
-    0x7d699ea3, 0x12038584, 0x7d6d26ec, 0x11f7763c,
-    0x7d70acd7, 0x11eb6643, 0x7d743064, 0x11df5599,
-    0x7d77b192, 0x11d3443f, 0x7d7b3061, 0x11c73235,
-    0x7d7eacd2, 0x11bb1f7c, 0x7d8226e4, 0x11af0c13,
-    0x7d859e96, 0x11a2f7fc, 0x7d8913ea, 0x1196e337,
-    0x7d8c86de, 0x118acdc4, 0x7d8ff772, 0x117eb7a4,
-    0x7d9365a8, 0x1172a0d7, 0x7d96d17d, 0x1166895f,
-    0x7d9a3af2, 0x115a713a, 0x7d9da208, 0x114e586a,
-    0x7da106bd, 0x11423ef0, 0x7da46912, 0x113624cb,
-    0x7da7c907, 0x112a09fc, 0x7dab269b, 0x111dee84,
-    0x7dae81cf, 0x1111d263, 0x7db1daa2, 0x1105b599,
-    0x7db53113, 0x10f99827, 0x7db88524, 0x10ed7a0e,
-    0x7dbbd6d4, 0x10e15b4e, 0x7dbf2622, 0x10d53be7,
-    0x7dc2730f, 0x10c91bda, 0x7dc5bd9b, 0x10bcfb28,
-    0x7dc905c5, 0x10b0d9d0, 0x7dcc4b8d, 0x10a4b7d3,
-    0x7dcf8ef3, 0x10989532, 0x7dd2cff7, 0x108c71ee,
-    0x7dd60e99, 0x10804e06, 0x7dd94ad8, 0x1074297b,
-    0x7ddc84b5, 0x1068044e, 0x7ddfbc30, 0x105bde7f,
-    0x7de2f148, 0x104fb80e, 0x7de623fd, 0x104390fd,
-    0x7de9544f, 0x1037694b, 0x7dec823e, 0x102b40f8,
-    0x7defadca, 0x101f1807, 0x7df2d6f3, 0x1012ee76,
-    0x7df5fdb8, 0x1006c446, 0x7df9221a, 0xffa9979,
-    0x7dfc4418, 0xfee6e0d, 0x7dff63b2, 0xfe24205,
-    0x7e0280e9, 0xfd6155f, 0x7e059bbb, 0xfc9e81e,
-    0x7e08b42a, 0xfbdba40, 0x7e0bca34, 0xfb18bc8,
-    0x7e0eddd9, 0xfa55cb4, 0x7e11ef1b, 0xf992d06,
-    0x7e14fdf7, 0xf8cfcbe, 0x7e180a6f, 0xf80cbdc,
-    0x7e1b1482, 0xf749a61, 0x7e1e1c30, 0xf68684e,
-    0x7e212179, 0xf5c35a3, 0x7e24245d, 0xf500260,
-    0x7e2724db, 0xf43ce86, 0x7e2a22f4, 0xf379a16,
-    0x7e2d1ea8, 0xf2b650f, 0x7e3017f6, 0xf1f2f73,
-    0x7e330ede, 0xf12f941, 0x7e360360, 0xf06c27a,
-    0x7e38f57c, 0xefa8b20, 0x7e3be532, 0xeee5331,
-    0x7e3ed282, 0xee21aaf, 0x7e41bd6c, 0xed5e19a,
-    0x7e44a5ef, 0xec9a7f3, 0x7e478c0b, 0xebd6db9,
-    0x7e4a6fc1, 0xeb132ef, 0x7e4d5110, 0xea4f793,
-    0x7e502ff9, 0xe98bba7, 0x7e530c7a, 0xe8c7f2a,
-    0x7e55e694, 0xe80421e, 0x7e58be47, 0xe740483,
-    0x7e5b9392, 0xe67c65a, 0x7e5e6676, 0xe5b87a2,
-    0x7e6136f3, 0xe4f485c, 0x7e640507, 0xe430889,
-    0x7e66d0b4, 0xe36c82a, 0x7e6999fa, 0xe2a873e,
-    0x7e6c60d7, 0xe1e45c6, 0x7e6f254c, 0xe1203c3,
-    0x7e71e759, 0xe05c135, 0x7e74a6fd, 0xdf97e1d,
-    0x7e77643a, 0xded3a7b, 0x7e7a1f0d, 0xde0f64f,
-    0x7e7cd778, 0xdd4b19a, 0x7e7f8d7b, 0xdc86c5d,
-    0x7e824114, 0xdbc2698, 0x7e84f245, 0xdafe04b,
-    0x7e87a10c, 0xda39978, 0x7e8a4d6a, 0xd97521d,
-    0x7e8cf75f, 0xd8b0a3d, 0x7e8f9eeb, 0xd7ec1d6,
-    0x7e92440d, 0xd7278eb, 0x7e94e6c6, 0xd662f7b,
-    0x7e978715, 0xd59e586, 0x7e9a24fb, 0xd4d9b0e,
-    0x7e9cc076, 0xd415013, 0x7e9f5988, 0xd350495,
-    0x7ea1f02f, 0xd28b894, 0x7ea4846c, 0xd1c6c11,
-    0x7ea7163f, 0xd101f0e, 0x7ea9a5a8, 0xd03d189,
-    0x7eac32a6, 0xcf78383, 0x7eaebd3a, 0xceb34fe,
-    0x7eb14563, 0xcdee5f9, 0x7eb3cb21, 0xcd29676,
-    0x7eb64e75, 0xcc64673, 0x7eb8cf5d, 0xcb9f5f3,
-    0x7ebb4ddb, 0xcada4f5, 0x7ebdc9ed, 0xca1537a,
-    0x7ec04394, 0xc950182, 0x7ec2bad0, 0xc88af0e,
-    0x7ec52fa0, 0xc7c5c1e, 0x7ec7a205, 0xc7008b3,
-    0x7eca11fe, 0xc63b4ce, 0x7ecc7f8b, 0xc57606e,
-    0x7eceeaad, 0xc4b0b94, 0x7ed15363, 0xc3eb641,
-    0x7ed3b9ad, 0xc326075, 0x7ed61d8a, 0xc260a31,
-    0x7ed87efc, 0xc19b374, 0x7edade01, 0xc0d5c41,
-    0x7edd3a9a, 0xc010496, 0x7edf94c7, 0xbf4ac75,
-    0x7ee1ec87, 0xbe853de, 0x7ee441da, 0xbdbfad1,
-    0x7ee694c1, 0xbcfa150, 0x7ee8e53a, 0xbc34759,
-    0x7eeb3347, 0xbb6ecef, 0x7eed7ee7, 0xbaa9211,
-    0x7eefc81a, 0xb9e36c0, 0x7ef20ee0, 0xb91dafc,
-    0x7ef45338, 0xb857ec7, 0x7ef69523, 0xb79221f,
-    0x7ef8d4a1, 0xb6cc506, 0x7efb11b1, 0xb60677c,
-    0x7efd4c54, 0xb540982, 0x7eff8489, 0xb47ab19,
-    0x7f01ba50, 0xb3b4c40, 0x7f03eda9, 0xb2eecf8,
-    0x7f061e95, 0xb228d42, 0x7f084d12, 0xb162d1d,
-    0x7f0a7921, 0xb09cc8c, 0x7f0ca2c2, 0xafd6b8d,
-    0x7f0ec9f5, 0xaf10a22, 0x7f10eeb9, 0xae4a84b,
-    0x7f13110f, 0xad84609, 0x7f1530f7, 0xacbe35b,
-    0x7f174e70, 0xabf8043, 0x7f19697a, 0xab31cc1,
-    0x7f1b8215, 0xaa6b8d5, 0x7f1d9842, 0xa9a5480,
-    0x7f1fabff, 0xa8defc3, 0x7f21bd4e, 0xa818a9d,
-    0x7f23cc2e, 0xa752510, 0x7f25d89e, 0xa68bf1b,
-    0x7f27e29f, 0xa5c58c0, 0x7f29ea31, 0xa4ff1fe,
-    0x7f2bef53, 0xa438ad7, 0x7f2df206, 0xa37234a,
-    0x7f2ff24a, 0xa2abb59, 0x7f31f01d, 0xa1e5303,
-    0x7f33eb81, 0xa11ea49, 0x7f35e476, 0xa05812c,
-    0x7f37dafa, 0x9f917ac, 0x7f39cf0e, 0x9ecadc9,
-    0x7f3bc0b3, 0x9e04385, 0x7f3dafe7, 0x9d3d8df,
-    0x7f3f9cab, 0x9c76dd8, 0x7f4186ff, 0x9bb0271,
-    0x7f436ee3, 0x9ae96aa, 0x7f455456, 0x9a22a83,
-    0x7f473759, 0x995bdfd, 0x7f4917eb, 0x9895118,
-    0x7f4af60d, 0x97ce3d5, 0x7f4cd1be, 0x9707635,
-    0x7f4eaafe, 0x9640837, 0x7f5081cd, 0x95799dd,
-    0x7f52562c, 0x94b2b27, 0x7f54281a, 0x93ebc14,
-    0x7f55f796, 0x9324ca7, 0x7f57c4a2, 0x925dcdf,
-    0x7f598f3c, 0x9196cbc, 0x7f5b5765, 0x90cfc40,
-    0x7f5d1d1d, 0x9008b6a, 0x7f5ee063, 0x8f41a3c,
-    0x7f60a138, 0x8e7a8b5, 0x7f625f9b, 0x8db36d6,
-    0x7f641b8d, 0x8cec4a0, 0x7f65d50d, 0x8c25213,
-    0x7f678c1c, 0x8b5df30, 0x7f6940b8, 0x8a96bf6,
-    0x7f6af2e3, 0x89cf867, 0x7f6ca29c, 0x8908483,
-    0x7f6e4fe3, 0x884104b, 0x7f6ffab8, 0x8779bbe,
-    0x7f71a31b, 0x86b26de, 0x7f73490b, 0x85eb1ab,
-    0x7f74ec8a, 0x8523c25, 0x7f768d96, 0x845c64d,
-    0x7f782c30, 0x8395024, 0x7f79c857, 0x82cd9a9,
-    0x7f7b620c, 0x82062de, 0x7f7cf94e, 0x813ebc2,
-    0x7f7e8e1e, 0x8077457, 0x7f80207b, 0x7fafc9c,
-    0x7f81b065, 0x7ee8493, 0x7f833ddd, 0x7e20c3b,
-    0x7f84c8e2, 0x7d59396, 0x7f865174, 0x7c91aa3,
-    0x7f87d792, 0x7bca163, 0x7f895b3e, 0x7b027d7,
-    0x7f8adc77, 0x7a3adff, 0x7f8c5b3d, 0x79733dc,
-    0x7f8dd78f, 0x78ab96e, 0x7f8f516e, 0x77e3eb5,
-    0x7f90c8da, 0x771c3b3, 0x7f923dd2, 0x7654867,
-    0x7f93b058, 0x758ccd2, 0x7f952069, 0x74c50f4,
-    0x7f968e07, 0x73fd4cf, 0x7f97f932, 0x7335862,
-    0x7f9961e8, 0x726dbae, 0x7f9ac82c, 0x71a5eb3,
-    0x7f9c2bfb, 0x70de172, 0x7f9d8d56, 0x70163eb,
-    0x7f9eec3e, 0x6f4e620, 0x7fa048b2, 0x6e86810,
-    0x7fa1a2b2, 0x6dbe9bb, 0x7fa2fa3d, 0x6cf6b23,
-    0x7fa44f55, 0x6c2ec48, 0x7fa5a1f9, 0x6b66d29,
-    0x7fa6f228, 0x6a9edc9, 0x7fa83fe3, 0x69d6e27,
-    0x7fa98b2a, 0x690ee44, 0x7faad3fd, 0x6846e1f,
-    0x7fac1a5b, 0x677edbb, 0x7fad5e45, 0x66b6d16,
-    0x7fae9fbb, 0x65eec33, 0x7fafdebb, 0x6526b10,
-    0x7fb11b48, 0x645e9af, 0x7fb2555f, 0x6396810,
-    0x7fb38d02, 0x62ce634, 0x7fb4c231, 0x620641a,
-    0x7fb5f4ea, 0x613e1c5, 0x7fb7252f, 0x6075f33,
-    0x7fb852ff, 0x5fadc66, 0x7fb97e5a, 0x5ee595d,
-    0x7fbaa740, 0x5e1d61b, 0x7fbbcdb1, 0x5d5529e,
-    0x7fbcf1ad, 0x5c8cee7, 0x7fbe1334, 0x5bc4af8,
-    0x7fbf3246, 0x5afc6d0, 0x7fc04ee3, 0x5a3426f,
-    0x7fc1690a, 0x596bdd7, 0x7fc280bc, 0x58a3908,
-    0x7fc395f9, 0x57db403, 0x7fc4a8c1, 0x5712ec7,
-    0x7fc5b913, 0x564a955, 0x7fc6c6f0, 0x55823ae,
-    0x7fc7d258, 0x54b9dd3, 0x7fc8db4a, 0x53f17c3,
-    0x7fc9e1c6, 0x532917f, 0x7fcae5cd, 0x5260b08,
-    0x7fcbe75e, 0x519845e, 0x7fcce67a, 0x50cfd82,
-    0x7fcde320, 0x5007674, 0x7fcedd50, 0x4f3ef35,
-    0x7fcfd50b, 0x4e767c5, 0x7fd0ca4f, 0x4dae024,
-    0x7fd1bd1e, 0x4ce5854, 0x7fd2ad77, 0x4c1d054,
-    0x7fd39b5a, 0x4b54825, 0x7fd486c7, 0x4a8bfc7,
-    0x7fd56fbe, 0x49c373c, 0x7fd6563f, 0x48fae83,
-    0x7fd73a4a, 0x483259d, 0x7fd81bdf, 0x4769c8b,
-    0x7fd8fafe, 0x46a134c, 0x7fd9d7a7, 0x45d89e2,
-    0x7fdab1d9, 0x451004d, 0x7fdb8996, 0x444768d,
-    0x7fdc5edc, 0x437eca4, 0x7fdd31ac, 0x42b6290,
-    0x7fde0205, 0x41ed854, 0x7fdecfe8, 0x4124dee,
-    0x7fdf9b55, 0x405c361, 0x7fe0644b, 0x3f938ac,
-    0x7fe12acb, 0x3ecadcf, 0x7fe1eed5, 0x3e022cc,
-    0x7fe2b067, 0x3d397a3, 0x7fe36f84, 0x3c70c54,
-    0x7fe42c2a, 0x3ba80df, 0x7fe4e659, 0x3adf546,
-    0x7fe59e12, 0x3a16988, 0x7fe65354, 0x394dda7,
-    0x7fe7061f, 0x38851a2, 0x7fe7b674, 0x37bc57b,
-    0x7fe86452, 0x36f3931, 0x7fe90fb9, 0x362acc5,
-    0x7fe9b8a9, 0x3562038, 0x7fea5f23, 0x3499389,
-    0x7feb0326, 0x33d06bb, 0x7feba4b2, 0x33079cc,
-    0x7fec43c7, 0x323ecbe, 0x7fece065, 0x3175f91,
-    0x7fed7a8c, 0x30ad245, 0x7fee123d, 0x2fe44dc,
-    0x7feea776, 0x2f1b755, 0x7fef3a39, 0x2e529b0,
-    0x7fefca84, 0x2d89bf0, 0x7ff05858, 0x2cc0e13,
-    0x7ff0e3b6, 0x2bf801a, 0x7ff16c9c, 0x2b2f207,
-    0x7ff1f30b, 0x2a663d8, 0x7ff27703, 0x299d590,
-    0x7ff2f884, 0x28d472e, 0x7ff3778e, 0x280b8b3,
-    0x7ff3f420, 0x2742a1f, 0x7ff46e3c, 0x2679b73,
-    0x7ff4e5e0, 0x25b0caf, 0x7ff55b0d, 0x24e7dd4,
-    0x7ff5cdc3, 0x241eee2, 0x7ff63e01, 0x2355fd9,
-    0x7ff6abc8, 0x228d0bb, 0x7ff71718, 0x21c4188,
-    0x7ff77ff1, 0x20fb240, 0x7ff7e652, 0x20322e3,
-    0x7ff84a3c, 0x1f69373, 0x7ff8abae, 0x1ea03ef,
-    0x7ff90aaa, 0x1dd7459, 0x7ff9672d, 0x1d0e4b0,
-    0x7ff9c13a, 0x1c454f5, 0x7ffa18cf, 0x1b7c528,
-    0x7ffa6dec, 0x1ab354b, 0x7ffac092, 0x19ea55d,
-    0x7ffb10c1, 0x192155f, 0x7ffb5e78, 0x1858552,
-    0x7ffba9b8, 0x178f536, 0x7ffbf280, 0x16c650b,
-    0x7ffc38d1, 0x15fd4d2, 0x7ffc7caa, 0x153448c,
-    0x7ffcbe0c, 0x146b438, 0x7ffcfcf6, 0x13a23d8,
-    0x7ffd3969, 0x12d936c, 0x7ffd7364, 0x12102f4,
-    0x7ffdaae7, 0x1147271, 0x7ffddff3, 0x107e1e3,
-    0x7ffe1288, 0xfb514b, 0x7ffe42a4, 0xeec0aa,
-    0x7ffe704a, 0xe22fff, 0x7ffe9b77, 0xd59f4c,
-    0x7ffec42d, 0xc90e90, 0x7ffeea6c, 0xbc7dcc,
-    0x7fff0e32, 0xafed02, 0x7fff2f82, 0xa35c30,
-    0x7fff4e59, 0x96cb58, 0x7fff6ab9, 0x8a3a7b,
-    0x7fff84a1, 0x7da998, 0x7fff9c12, 0x7118b0,
-    0x7fffb10b, 0x6487c4, 0x7fffc38c, 0x57f6d4,
-    0x7fffd396, 0x4b65e1, 0x7fffe128, 0x3ed4ea,
-    0x7fffec43, 0x3243f1, 0x7ffff4e6, 0x25b2f7,
-    0x7ffffb11, 0x1921fb, 0x7ffffec4, 0xc90fe,
-    0x7fffffff, 0x0, 0x7ffffec4, 0xfff36f02,
-    0x7ffffb11, 0xffe6de05, 0x7ffff4e6, 0xffda4d09,
-    0x7fffec43, 0xffcdbc0f, 0x7fffe128, 0xffc12b16,
-    0x7fffd396, 0xffb49a1f, 0x7fffc38c, 0xffa8092c,
-    0x7fffb10b, 0xff9b783c, 0x7fff9c12, 0xff8ee750,
-    0x7fff84a1, 0xff825668, 0x7fff6ab9, 0xff75c585,
-    0x7fff4e59, 0xff6934a8, 0x7fff2f82, 0xff5ca3d0,
-    0x7fff0e32, 0xff5012fe, 0x7ffeea6c, 0xff438234,
-    0x7ffec42d, 0xff36f170, 0x7ffe9b77, 0xff2a60b4,
-    0x7ffe704a, 0xff1dd001, 0x7ffe42a4, 0xff113f56,
-    0x7ffe1288, 0xff04aeb5, 0x7ffddff3, 0xfef81e1d,
-    0x7ffdaae7, 0xfeeb8d8f, 0x7ffd7364, 0xfedefd0c,
-    0x7ffd3969, 0xfed26c94, 0x7ffcfcf6, 0xfec5dc28,
-    0x7ffcbe0c, 0xfeb94bc8, 0x7ffc7caa, 0xfeacbb74,
-    0x7ffc38d1, 0xfea02b2e, 0x7ffbf280, 0xfe939af5,
-    0x7ffba9b8, 0xfe870aca, 0x7ffb5e78, 0xfe7a7aae,
-    0x7ffb10c1, 0xfe6deaa1, 0x7ffac092, 0xfe615aa3,
-    0x7ffa6dec, 0xfe54cab5, 0x7ffa18cf, 0xfe483ad8,
-    0x7ff9c13a, 0xfe3bab0b, 0x7ff9672d, 0xfe2f1b50,
-    0x7ff90aaa, 0xfe228ba7, 0x7ff8abae, 0xfe15fc11,
-    0x7ff84a3c, 0xfe096c8d, 0x7ff7e652, 0xfdfcdd1d,
-    0x7ff77ff1, 0xfdf04dc0, 0x7ff71718, 0xfde3be78,
-    0x7ff6abc8, 0xfdd72f45, 0x7ff63e01, 0xfdcaa027,
-    0x7ff5cdc3, 0xfdbe111e, 0x7ff55b0d, 0xfdb1822c,
-    0x7ff4e5e0, 0xfda4f351, 0x7ff46e3c, 0xfd98648d,
-    0x7ff3f420, 0xfd8bd5e1, 0x7ff3778e, 0xfd7f474d,
-    0x7ff2f884, 0xfd72b8d2, 0x7ff27703, 0xfd662a70,
-    0x7ff1f30b, 0xfd599c28, 0x7ff16c9c, 0xfd4d0df9,
-    0x7ff0e3b6, 0xfd407fe6, 0x7ff05858, 0xfd33f1ed,
-    0x7fefca84, 0xfd276410, 0x7fef3a39, 0xfd1ad650,
-    0x7feea776, 0xfd0e48ab, 0x7fee123d, 0xfd01bb24,
-    0x7fed7a8c, 0xfcf52dbb, 0x7fece065, 0xfce8a06f,
-    0x7fec43c7, 0xfcdc1342, 0x7feba4b2, 0xfccf8634,
-    0x7feb0326, 0xfcc2f945, 0x7fea5f23, 0xfcb66c77,
-    0x7fe9b8a9, 0xfca9dfc8, 0x7fe90fb9, 0xfc9d533b,
-    0x7fe86452, 0xfc90c6cf, 0x7fe7b674, 0xfc843a85,
-    0x7fe7061f, 0xfc77ae5e, 0x7fe65354, 0xfc6b2259,
-    0x7fe59e12, 0xfc5e9678, 0x7fe4e659, 0xfc520aba,
-    0x7fe42c2a, 0xfc457f21, 0x7fe36f84, 0xfc38f3ac,
-    0x7fe2b067, 0xfc2c685d, 0x7fe1eed5, 0xfc1fdd34,
-    0x7fe12acb, 0xfc135231, 0x7fe0644b, 0xfc06c754,
-    0x7fdf9b55, 0xfbfa3c9f, 0x7fdecfe8, 0xfbedb212,
-    0x7fde0205, 0xfbe127ac, 0x7fdd31ac, 0xfbd49d70,
-    0x7fdc5edc, 0xfbc8135c, 0x7fdb8996, 0xfbbb8973,
-    0x7fdab1d9, 0xfbaeffb3, 0x7fd9d7a7, 0xfba2761e,
-    0x7fd8fafe, 0xfb95ecb4, 0x7fd81bdf, 0xfb896375,
-    0x7fd73a4a, 0xfb7cda63, 0x7fd6563f, 0xfb70517d,
-    0x7fd56fbe, 0xfb63c8c4, 0x7fd486c7, 0xfb574039,
-    0x7fd39b5a, 0xfb4ab7db, 0x7fd2ad77, 0xfb3e2fac,
-    0x7fd1bd1e, 0xfb31a7ac, 0x7fd0ca4f, 0xfb251fdc,
-    0x7fcfd50b, 0xfb18983b, 0x7fcedd50, 0xfb0c10cb,
-    0x7fcde320, 0xfaff898c, 0x7fcce67a, 0xfaf3027e,
-    0x7fcbe75e, 0xfae67ba2, 0x7fcae5cd, 0xfad9f4f8,
-    0x7fc9e1c6, 0xfacd6e81, 0x7fc8db4a, 0xfac0e83d,
-    0x7fc7d258, 0xfab4622d, 0x7fc6c6f0, 0xfaa7dc52,
-    0x7fc5b913, 0xfa9b56ab, 0x7fc4a8c1, 0xfa8ed139,
-    0x7fc395f9, 0xfa824bfd, 0x7fc280bc, 0xfa75c6f8,
-    0x7fc1690a, 0xfa694229, 0x7fc04ee3, 0xfa5cbd91,
-    0x7fbf3246, 0xfa503930, 0x7fbe1334, 0xfa43b508,
-    0x7fbcf1ad, 0xfa373119, 0x7fbbcdb1, 0xfa2aad62,
-    0x7fbaa740, 0xfa1e29e5, 0x7fb97e5a, 0xfa11a6a3,
-    0x7fb852ff, 0xfa05239a, 0x7fb7252f, 0xf9f8a0cd,
-    0x7fb5f4ea, 0xf9ec1e3b, 0x7fb4c231, 0xf9df9be6,
-    0x7fb38d02, 0xf9d319cc, 0x7fb2555f, 0xf9c697f0,
-    0x7fb11b48, 0xf9ba1651, 0x7fafdebb, 0xf9ad94f0,
-    0x7fae9fbb, 0xf9a113cd, 0x7fad5e45, 0xf99492ea,
-    0x7fac1a5b, 0xf9881245, 0x7faad3fd, 0xf97b91e1,
-    0x7fa98b2a, 0xf96f11bc, 0x7fa83fe3, 0xf96291d9,
-    0x7fa6f228, 0xf9561237, 0x7fa5a1f9, 0xf94992d7,
-    0x7fa44f55, 0xf93d13b8, 0x7fa2fa3d, 0xf93094dd,
-    0x7fa1a2b2, 0xf9241645, 0x7fa048b2, 0xf91797f0,
-    0x7f9eec3e, 0xf90b19e0, 0x7f9d8d56, 0xf8fe9c15,
-    0x7f9c2bfb, 0xf8f21e8e, 0x7f9ac82c, 0xf8e5a14d,
-    0x7f9961e8, 0xf8d92452, 0x7f97f932, 0xf8cca79e,
-    0x7f968e07, 0xf8c02b31, 0x7f952069, 0xf8b3af0c,
-    0x7f93b058, 0xf8a7332e, 0x7f923dd2, 0xf89ab799,
-    0x7f90c8da, 0xf88e3c4d, 0x7f8f516e, 0xf881c14b,
-    0x7f8dd78f, 0xf8754692, 0x7f8c5b3d, 0xf868cc24,
-    0x7f8adc77, 0xf85c5201, 0x7f895b3e, 0xf84fd829,
-    0x7f87d792, 0xf8435e9d, 0x7f865174, 0xf836e55d,
-    0x7f84c8e2, 0xf82a6c6a, 0x7f833ddd, 0xf81df3c5,
-    0x7f81b065, 0xf8117b6d, 0x7f80207b, 0xf8050364,
-    0x7f7e8e1e, 0xf7f88ba9, 0x7f7cf94e, 0xf7ec143e,
-    0x7f7b620c, 0xf7df9d22, 0x7f79c857, 0xf7d32657,
-    0x7f782c30, 0xf7c6afdc, 0x7f768d96, 0xf7ba39b3,
-    0x7f74ec8a, 0xf7adc3db, 0x7f73490b, 0xf7a14e55,
-    0x7f71a31b, 0xf794d922, 0x7f6ffab8, 0xf7886442,
-    0x7f6e4fe3, 0xf77befb5, 0x7f6ca29c, 0xf76f7b7d,
-    0x7f6af2e3, 0xf7630799, 0x7f6940b8, 0xf756940a,
-    0x7f678c1c, 0xf74a20d0, 0x7f65d50d, 0xf73daded,
-    0x7f641b8d, 0xf7313b60, 0x7f625f9b, 0xf724c92a,
-    0x7f60a138, 0xf718574b, 0x7f5ee063, 0xf70be5c4,
-    0x7f5d1d1d, 0xf6ff7496, 0x7f5b5765, 0xf6f303c0,
-    0x7f598f3c, 0xf6e69344, 0x7f57c4a2, 0xf6da2321,
-    0x7f55f796, 0xf6cdb359, 0x7f54281a, 0xf6c143ec,
-    0x7f52562c, 0xf6b4d4d9, 0x7f5081cd, 0xf6a86623,
-    0x7f4eaafe, 0xf69bf7c9, 0x7f4cd1be, 0xf68f89cb,
-    0x7f4af60d, 0xf6831c2b, 0x7f4917eb, 0xf676aee8,
-    0x7f473759, 0xf66a4203, 0x7f455456, 0xf65dd57d,
-    0x7f436ee3, 0xf6516956, 0x7f4186ff, 0xf644fd8f,
-    0x7f3f9cab, 0xf6389228, 0x7f3dafe7, 0xf62c2721,
-    0x7f3bc0b3, 0xf61fbc7b, 0x7f39cf0e, 0xf6135237,
-    0x7f37dafa, 0xf606e854, 0x7f35e476, 0xf5fa7ed4,
-    0x7f33eb81, 0xf5ee15b7, 0x7f31f01d, 0xf5e1acfd,
-    0x7f2ff24a, 0xf5d544a7, 0x7f2df206, 0xf5c8dcb6,
-    0x7f2bef53, 0xf5bc7529, 0x7f29ea31, 0xf5b00e02,
-    0x7f27e29f, 0xf5a3a740, 0x7f25d89e, 0xf59740e5,
-    0x7f23cc2e, 0xf58adaf0, 0x7f21bd4e, 0xf57e7563,
-    0x7f1fabff, 0xf572103d, 0x7f1d9842, 0xf565ab80,
-    0x7f1b8215, 0xf559472b, 0x7f19697a, 0xf54ce33f,
-    0x7f174e70, 0xf5407fbd, 0x7f1530f7, 0xf5341ca5,
-    0x7f13110f, 0xf527b9f7, 0x7f10eeb9, 0xf51b57b5,
-    0x7f0ec9f5, 0xf50ef5de, 0x7f0ca2c2, 0xf5029473,
-    0x7f0a7921, 0xf4f63374, 0x7f084d12, 0xf4e9d2e3,
-    0x7f061e95, 0xf4dd72be, 0x7f03eda9, 0xf4d11308,
-    0x7f01ba50, 0xf4c4b3c0, 0x7eff8489, 0xf4b854e7,
-    0x7efd4c54, 0xf4abf67e, 0x7efb11b1, 0xf49f9884,
-    0x7ef8d4a1, 0xf4933afa, 0x7ef69523, 0xf486dde1,
-    0x7ef45338, 0xf47a8139, 0x7ef20ee0, 0xf46e2504,
-    0x7eefc81a, 0xf461c940, 0x7eed7ee7, 0xf4556def,
-    0x7eeb3347, 0xf4491311, 0x7ee8e53a, 0xf43cb8a7,
-    0x7ee694c1, 0xf4305eb0, 0x7ee441da, 0xf424052f,
-    0x7ee1ec87, 0xf417ac22, 0x7edf94c7, 0xf40b538b,
-    0x7edd3a9a, 0xf3fefb6a, 0x7edade01, 0xf3f2a3bf,
-    0x7ed87efc, 0xf3e64c8c, 0x7ed61d8a, 0xf3d9f5cf,
-    0x7ed3b9ad, 0xf3cd9f8b, 0x7ed15363, 0xf3c149bf,
-    0x7eceeaad, 0xf3b4f46c, 0x7ecc7f8b, 0xf3a89f92,
-    0x7eca11fe, 0xf39c4b32, 0x7ec7a205, 0xf38ff74d,
-    0x7ec52fa0, 0xf383a3e2, 0x7ec2bad0, 0xf37750f2,
-    0x7ec04394, 0xf36afe7e, 0x7ebdc9ed, 0xf35eac86,
-    0x7ebb4ddb, 0xf3525b0b, 0x7eb8cf5d, 0xf3460a0d,
-    0x7eb64e75, 0xf339b98d, 0x7eb3cb21, 0xf32d698a,
-    0x7eb14563, 0xf3211a07, 0x7eaebd3a, 0xf314cb02,
-    0x7eac32a6, 0xf3087c7d, 0x7ea9a5a8, 0xf2fc2e77,
-    0x7ea7163f, 0xf2efe0f2, 0x7ea4846c, 0xf2e393ef,
-    0x7ea1f02f, 0xf2d7476c, 0x7e9f5988, 0xf2cafb6b,
-    0x7e9cc076, 0xf2beafed, 0x7e9a24fb, 0xf2b264f2,
-    0x7e978715, 0xf2a61a7a, 0x7e94e6c6, 0xf299d085,
-    0x7e92440d, 0xf28d8715, 0x7e8f9eeb, 0xf2813e2a,
-    0x7e8cf75f, 0xf274f5c3, 0x7e8a4d6a, 0xf268ade3,
-    0x7e87a10c, 0xf25c6688, 0x7e84f245, 0xf2501fb5,
-    0x7e824114, 0xf243d968, 0x7e7f8d7b, 0xf23793a3,
-    0x7e7cd778, 0xf22b4e66, 0x7e7a1f0d, 0xf21f09b1,
-    0x7e77643a, 0xf212c585, 0x7e74a6fd, 0xf20681e3,
-    0x7e71e759, 0xf1fa3ecb, 0x7e6f254c, 0xf1edfc3d,
-    0x7e6c60d7, 0xf1e1ba3a, 0x7e6999fa, 0xf1d578c2,
-    0x7e66d0b4, 0xf1c937d6, 0x7e640507, 0xf1bcf777,
-    0x7e6136f3, 0xf1b0b7a4, 0x7e5e6676, 0xf1a4785e,
-    0x7e5b9392, 0xf19839a6, 0x7e58be47, 0xf18bfb7d,
-    0x7e55e694, 0xf17fbde2, 0x7e530c7a, 0xf17380d6,
-    0x7e502ff9, 0xf1674459, 0x7e4d5110, 0xf15b086d,
-    0x7e4a6fc1, 0xf14ecd11, 0x7e478c0b, 0xf1429247,
-    0x7e44a5ef, 0xf136580d, 0x7e41bd6c, 0xf12a1e66,
-    0x7e3ed282, 0xf11de551, 0x7e3be532, 0xf111accf,
-    0x7e38f57c, 0xf10574e0, 0x7e360360, 0xf0f93d86,
-    0x7e330ede, 0xf0ed06bf, 0x7e3017f6, 0xf0e0d08d,
-    0x7e2d1ea8, 0xf0d49af1, 0x7e2a22f4, 0xf0c865ea,
-    0x7e2724db, 0xf0bc317a, 0x7e24245d, 0xf0affda0,
-    0x7e212179, 0xf0a3ca5d, 0x7e1e1c30, 0xf09797b2,
-    0x7e1b1482, 0xf08b659f, 0x7e180a6f, 0xf07f3424,
-    0x7e14fdf7, 0xf0730342, 0x7e11ef1b, 0xf066d2fa,
-    0x7e0eddd9, 0xf05aa34c, 0x7e0bca34, 0xf04e7438,
-    0x7e08b42a, 0xf04245c0, 0x7e059bbb, 0xf03617e2,
-    0x7e0280e9, 0xf029eaa1, 0x7dff63b2, 0xf01dbdfb,
-    0x7dfc4418, 0xf01191f3, 0x7df9221a, 0xf0056687,
-    0x7df5fdb8, 0xeff93bba, 0x7df2d6f3, 0xefed118a,
-    0x7defadca, 0xefe0e7f9, 0x7dec823e, 0xefd4bf08,
-    0x7de9544f, 0xefc896b5, 0x7de623fd, 0xefbc6f03,
-    0x7de2f148, 0xefb047f2, 0x7ddfbc30, 0xefa42181,
-    0x7ddc84b5, 0xef97fbb2, 0x7dd94ad8, 0xef8bd685,
-    0x7dd60e99, 0xef7fb1fa, 0x7dd2cff7, 0xef738e12,
-    0x7dcf8ef3, 0xef676ace, 0x7dcc4b8d, 0xef5b482d,
-    0x7dc905c5, 0xef4f2630, 0x7dc5bd9b, 0xef4304d8,
-    0x7dc2730f, 0xef36e426, 0x7dbf2622, 0xef2ac419,
-    0x7dbbd6d4, 0xef1ea4b2, 0x7db88524, 0xef1285f2,
-    0x7db53113, 0xef0667d9, 0x7db1daa2, 0xeefa4a67,
-    0x7dae81cf, 0xeeee2d9d, 0x7dab269b, 0xeee2117c,
-    0x7da7c907, 0xeed5f604, 0x7da46912, 0xeec9db35,
-    0x7da106bd, 0xeebdc110, 0x7d9da208, 0xeeb1a796,
-    0x7d9a3af2, 0xeea58ec6, 0x7d96d17d, 0xee9976a1,
-    0x7d9365a8, 0xee8d5f29, 0x7d8ff772, 0xee81485c,
-    0x7d8c86de, 0xee75323c, 0x7d8913ea, 0xee691cc9,
-    0x7d859e96, 0xee5d0804, 0x7d8226e4, 0xee50f3ed,
-    0x7d7eacd2, 0xee44e084, 0x7d7b3061, 0xee38cdcb,
-    0x7d77b192, 0xee2cbbc1, 0x7d743064, 0xee20aa67,
-    0x7d70acd7, 0xee1499bd, 0x7d6d26ec, 0xee0889c4,
-    0x7d699ea3, 0xedfc7a7c, 0x7d6613fb, 0xedf06be6,
-    0x7d6286f6, 0xede45e03, 0x7d5ef793, 0xedd850d2,
-    0x7d5b65d2, 0xedcc4454, 0x7d57d1b3, 0xedc0388a,
-    0x7d543b37, 0xedb42d74, 0x7d50a25e, 0xeda82313,
-    0x7d4d0728, 0xed9c1967, 0x7d496994, 0xed901070,
-    0x7d45c9a4, 0xed84082f, 0x7d422757, 0xed7800a5,
-    0x7d3e82ae, 0xed6bf9d1, 0x7d3adba7, 0xed5ff3b5,
-    0x7d373245, 0xed53ee51, 0x7d338687, 0xed47e9a5,
-    0x7d2fd86c, 0xed3be5b1, 0x7d2c27f6, 0xed2fe277,
-    0x7d287523, 0xed23dff7, 0x7d24bff6, 0xed17de31,
-    0x7d21086c, 0xed0bdd25, 0x7d1d4e88, 0xecffdcd4,
-    0x7d199248, 0xecf3dd3f, 0x7d15d3ad, 0xece7de66,
-    0x7d1212b7, 0xecdbe04a, 0x7d0e4f67, 0xeccfe2ea,
-    0x7d0a89bc, 0xecc3e648, 0x7d06c1b6, 0xecb7ea63,
-    0x7d02f757, 0xecabef3d, 0x7cff2a9d, 0xec9ff4d6,
-    0x7cfb5b89, 0xec93fb2e, 0x7cf78a1b, 0xec880245,
-    0x7cf3b653, 0xec7c0a1d, 0x7cefe032, 0xec7012b5,
-    0x7cec07b8, 0xec641c0e, 0x7ce82ce4, 0xec582629,
-    0x7ce44fb7, 0xec4c3106, 0x7ce07031, 0xec403ca5,
-    0x7cdc8e52, 0xec344908, 0x7cd8aa1b, 0xec28562d,
-    0x7cd4c38b, 0xec1c6417, 0x7cd0daa2, 0xec1072c4,
-    0x7cccef62, 0xec048237, 0x7cc901c9, 0xebf8926f,
-    0x7cc511d9, 0xebeca36c, 0x7cc11f90, 0xebe0b52f,
-    0x7cbd2af0, 0xebd4c7ba, 0x7cb933f9, 0xebc8db0b,
-    0x7cb53aaa, 0xebbcef23, 0x7cb13f04, 0xebb10404,
-    0x7cad4107, 0xeba519ad, 0x7ca940b3, 0xeb99301f,
-    0x7ca53e09, 0xeb8d475b, 0x7ca13908, 0xeb815f60,
-    0x7c9d31b0, 0xeb75782f, 0x7c992803, 0xeb6991ca,
-    0x7c951bff, 0xeb5dac2f, 0x7c910da5, 0xeb51c760,
-    0x7c8cfcf6, 0xeb45e35d, 0x7c88e9f1, 0xeb3a0027,
-    0x7c84d496, 0xeb2e1dbe, 0x7c80bce7, 0xeb223c22,
-    0x7c7ca2e2, 0xeb165b54, 0x7c788688, 0xeb0a7b54,
-    0x7c7467d9, 0xeafe9c24, 0x7c7046d6, 0xeaf2bdc3,
-    0x7c6c237e, 0xeae6e031, 0x7c67fdd1, 0xeadb0370,
-    0x7c63d5d1, 0xeacf277f, 0x7c5fab7c, 0xeac34c60,
-    0x7c5b7ed4, 0xeab77212, 0x7c574fd8, 0xeaab9896,
-    0x7c531e88, 0xea9fbfed, 0x7c4eeae5, 0xea93e817,
-    0x7c4ab4ef, 0xea881114, 0x7c467ca6, 0xea7c3ae5,
-    0x7c42420a, 0xea70658a, 0x7c3e051b, 0xea649105,
-    0x7c39c5da, 0xea58bd54, 0x7c358446, 0xea4cea79,
-    0x7c314060, 0xea411874, 0x7c2cfa28, 0xea354746,
-    0x7c28b19e, 0xea2976ef, 0x7c2466c2, 0xea1da770,
-    0x7c201994, 0xea11d8c8, 0x7c1bca16, 0xea060af9,
-    0x7c177845, 0xe9fa3e03, 0x7c132424, 0xe9ee71e6,
-    0x7c0ecdb2, 0xe9e2a6a3, 0x7c0a74f0, 0xe9d6dc3b,
-    0x7c0619dc, 0xe9cb12ad, 0x7c01bc78, 0xe9bf49fa,
-    0x7bfd5cc4, 0xe9b38223, 0x7bf8fac0, 0xe9a7bb28,
-    0x7bf4966c, 0xe99bf509, 0x7bf02fc9, 0xe9902fc7,
-    0x7bebc6d5, 0xe9846b63, 0x7be75b93, 0xe978a7dd,
-    0x7be2ee01, 0xe96ce535, 0x7bde7e20, 0xe961236c,
-    0x7bda0bf0, 0xe9556282, 0x7bd59771, 0xe949a278,
-    0x7bd120a4, 0xe93de34e, 0x7bcca789, 0xe9322505,
-    0x7bc82c1f, 0xe926679c, 0x7bc3ae67, 0xe91aab16,
-    0x7bbf2e62, 0xe90eef71, 0x7bbaac0e, 0xe90334af,
-    0x7bb6276e, 0xe8f77acf, 0x7bb1a080, 0xe8ebc1d3,
-    0x7bad1744, 0xe8e009ba, 0x7ba88bbc, 0xe8d45286,
-    0x7ba3fde7, 0xe8c89c37, 0x7b9f6dc5, 0xe8bce6cd,
-    0x7b9adb57, 0xe8b13248, 0x7b96469d, 0xe8a57ea9,
-    0x7b91af97, 0xe899cbf1, 0x7b8d1644, 0xe88e1a20,
-    0x7b887aa6, 0xe8826936, 0x7b83dcbc, 0xe876b934,
-    0x7b7f3c87, 0xe86b0a1a, 0x7b7a9a07, 0xe85f5be9,
-    0x7b75f53c, 0xe853aea1, 0x7b714e25, 0xe8480243,
-    0x7b6ca4c4, 0xe83c56cf, 0x7b67f919, 0xe830ac45,
-    0x7b634b23, 0xe82502a7, 0x7b5e9ae4, 0xe81959f4,
-    0x7b59e85a, 0xe80db22d, 0x7b553386, 0xe8020b52,
-    0x7b507c69, 0xe7f66564, 0x7b4bc303, 0xe7eac063,
-    0x7b470753, 0xe7df1c50, 0x7b42495a, 0xe7d3792b,
-    0x7b3d8918, 0xe7c7d6f4, 0x7b38c68e, 0xe7bc35ad,
-    0x7b3401bb, 0xe7b09555, 0x7b2f3aa0, 0xe7a4f5ed,
-    0x7b2a713d, 0xe7995776, 0x7b25a591, 0xe78db9ef,
-    0x7b20d79e, 0xe7821d59, 0x7b1c0764, 0xe77681b6,
-    0x7b1734e2, 0xe76ae704, 0x7b126019, 0xe75f4d45,
-    0x7b0d8909, 0xe753b479, 0x7b08afb2, 0xe7481ca1,
-    0x7b03d414, 0xe73c85bc, 0x7afef630, 0xe730efcc,
-    0x7afa1605, 0xe7255ad1, 0x7af53395, 0xe719c6cb,
-    0x7af04edf, 0xe70e33bb, 0x7aeb67e3, 0xe702a1a1,
-    0x7ae67ea1, 0xe6f7107e, 0x7ae1931a, 0xe6eb8052,
-    0x7adca54e, 0xe6dff11d, 0x7ad7b53d, 0xe6d462e1,
-    0x7ad2c2e8, 0xe6c8d59c, 0x7acdce4d, 0xe6bd4951,
-    0x7ac8d76f, 0xe6b1bdff, 0x7ac3de4c, 0xe6a633a6,
-    0x7abee2e5, 0xe69aaa48, 0x7ab9e53a, 0xe68f21e5,
-    0x7ab4e54c, 0xe6839a7c, 0x7aafe31b, 0xe6781410,
-    0x7aaadea6, 0xe66c8e9f, 0x7aa5d7ee, 0xe6610a2a,
-    0x7aa0cef3, 0xe65586b3, 0x7a9bc3b6, 0xe64a0438,
-    0x7a96b636, 0xe63e82bc, 0x7a91a674, 0xe633023e,
-    0x7a8c9470, 0xe62782be, 0x7a87802a, 0xe61c043d,
-    0x7a8269a3, 0xe61086bc, 0x7a7d50da, 0xe6050a3b,
-    0x7a7835cf, 0xe5f98ebb, 0x7a731884, 0xe5ee143b,
-    0x7a6df8f8, 0xe5e29abc, 0x7a68d72b, 0xe5d72240,
-    0x7a63b31d, 0xe5cbaac5, 0x7a5e8cd0, 0xe5c0344d,
-    0x7a596442, 0xe5b4bed8, 0x7a543974, 0xe5a94a67,
-    0x7a4f0c67, 0xe59dd6f9, 0x7a49dd1a, 0xe5926490,
-    0x7a44ab8e, 0xe586f32c, 0x7a3f77c3, 0xe57b82cd,
-    0x7a3a41b9, 0xe5701374, 0x7a350970, 0xe564a521,
-    0x7a2fcee8, 0xe55937d5, 0x7a2a9223, 0xe54dcb8f,
-    0x7a25531f, 0xe5426051, 0x7a2011de, 0xe536f61b,
-    0x7a1ace5f, 0xe52b8cee, 0x7a1588a2, 0xe52024c9,
-    0x7a1040a8, 0xe514bdad, 0x7a0af671, 0xe509579b,
-    0x7a05a9fd, 0xe4fdf294, 0x7a005b4d, 0xe4f28e96,
-    0x79fb0a60, 0xe4e72ba4, 0x79f5b737, 0xe4dbc9bd,
-    0x79f061d2, 0xe4d068e2, 0x79eb0a31, 0xe4c50914,
-    0x79e5b054, 0xe4b9aa52, 0x79e0543c, 0xe4ae4c9d,
-    0x79daf5e8, 0xe4a2eff6, 0x79d5955a, 0xe497945d,
-    0x79d03291, 0xe48c39d3, 0x79cacd8d, 0xe480e057,
-    0x79c5664f, 0xe47587eb, 0x79bffcd7, 0xe46a308f,
-    0x79ba9125, 0xe45eda43, 0x79b52339, 0xe4538507,
-    0x79afb313, 0xe44830dd, 0x79aa40b4, 0xe43cddc4,
-    0x79a4cc1c, 0xe4318bbe, 0x799f554b, 0xe4263ac9,
-    0x7999dc42, 0xe41aeae8, 0x799460ff, 0xe40f9c1a,
-    0x798ee385, 0xe4044e60, 0x798963d2, 0xe3f901ba,
-    0x7983e1e8, 0xe3edb628, 0x797e5dc6, 0xe3e26bac,
-    0x7978d76c, 0xe3d72245, 0x79734edc, 0xe3cbd9f4,
-    0x796dc414, 0xe3c092b9, 0x79683715, 0xe3b54c95,
-    0x7962a7e0, 0xe3aa0788, 0x795d1675, 0xe39ec393,
-    0x795782d3, 0xe39380b6, 0x7951ecfc, 0xe3883ef2,
-    0x794c54ee, 0xe37cfe47, 0x7946baac, 0xe371beb5,
-    0x79411e33, 0xe366803c, 0x793b7f86, 0xe35b42df,
-    0x7935dea4, 0xe350069b, 0x79303b8e, 0xe344cb73,
-    0x792a9642, 0xe3399167, 0x7924eec3, 0xe32e5876,
-    0x791f4510, 0xe32320a2, 0x79199929, 0xe317e9eb,
-    0x7913eb0e, 0xe30cb451, 0x790e3ac0, 0xe3017fd5,
-    0x7908883f, 0xe2f64c77, 0x7902d38b, 0xe2eb1a37,
-    0x78fd1ca4, 0xe2dfe917, 0x78f7638b, 0xe2d4b916,
-    0x78f1a840, 0xe2c98a35, 0x78ebeac2, 0xe2be5c74,
-    0x78e62b13, 0xe2b32fd4, 0x78e06932, 0xe2a80456,
-    0x78daa520, 0xe29cd9f8, 0x78d4dedd, 0xe291b0bd,
-    0x78cf1669, 0xe28688a4, 0x78c94bc4, 0xe27b61af,
-    0x78c37eef, 0xe2703bdc, 0x78bdafea, 0xe265172e,
-    0x78b7deb4, 0xe259f3a3, 0x78b20b4f, 0xe24ed13d,
-    0x78ac35ba, 0xe243affc, 0x78a65df6, 0xe2388fe1,
-    0x78a08402, 0xe22d70eb, 0x789aa7e0, 0xe222531c,
-    0x7894c98f, 0xe2173674, 0x788ee910, 0xe20c1af3,
-    0x78890663, 0xe2010099, 0x78832187, 0xe1f5e768,
-    0x787d3a7e, 0xe1eacf5f, 0x78775147, 0xe1dfb87f,
-    0x787165e3, 0xe1d4a2c8, 0x786b7852, 0xe1c98e3b,
-    0x78658894, 0xe1be7ad8, 0x785f96a9, 0xe1b368a0,
-    0x7859a292, 0xe1a85793, 0x7853ac4f, 0xe19d47b1,
-    0x784db3e0, 0xe19238fb, 0x7847b946, 0xe1872b72,
-    0x7841bc7f, 0xe17c1f15, 0x783bbd8e, 0xe17113e5,
-    0x7835bc71, 0xe16609e3, 0x782fb92a, 0xe15b0110,
-    0x7829b3b9, 0xe14ff96a, 0x7823ac1d, 0xe144f2f3,
-    0x781da256, 0xe139edac, 0x78179666, 0xe12ee995,
-    0x7811884d, 0xe123e6ad, 0x780b780a, 0xe118e4f6,
-    0x7805659e, 0xe10de470, 0x77ff5109, 0xe102e51c,
-    0x77f93a4b, 0xe0f7e6f9, 0x77f32165, 0xe0ecea09,
-    0x77ed0657, 0xe0e1ee4b, 0x77e6e921, 0xe0d6f3c1,
-    0x77e0c9c3, 0xe0cbfa6a, 0x77daa83d, 0xe0c10247,
-    0x77d48490, 0xe0b60b58, 0x77ce5ebd, 0xe0ab159e,
-    0x77c836c2, 0xe0a0211a, 0x77c20ca1, 0xe0952dcb,
-    0x77bbe05a, 0xe08a3bb2, 0x77b5b1ec, 0xe07f4acf,
-    0x77af8159, 0xe0745b24, 0x77a94ea0, 0xe0696cb0,
-    0x77a319c2, 0xe05e7f74, 0x779ce2be, 0xe053936f,
-    0x7796a996, 0xe048a8a4, 0x77906e49, 0xe03dbf11,
-    0x778a30d8, 0xe032d6b8, 0x7783f143, 0xe027ef99,
-    0x777daf89, 0xe01d09b4, 0x77776bac, 0xe012250a,
-    0x777125ac, 0xe007419b, 0x776add88, 0xdffc5f67,
-    0x77649341, 0xdff17e70, 0x775e46d8, 0xdfe69eb4,
-    0x7757f84c, 0xdfdbc036, 0x7751a79e, 0xdfd0e2f5,
-    0x774b54ce, 0xdfc606f1, 0x7744ffdd, 0xdfbb2c2c,
-    0x773ea8ca, 0xdfb052a5, 0x77384f95, 0xdfa57a5d,
-    0x7731f440, 0xdf9aa354, 0x772b96ca, 0xdf8fcd8b,
-    0x77253733, 0xdf84f902, 0x771ed57c, 0xdf7a25ba,
-    0x771871a5, 0xdf6f53b3, 0x77120bae, 0xdf6482ed,
-    0x770ba398, 0xdf59b369, 0x77053962, 0xdf4ee527,
-    0x76fecd0e, 0xdf441828, 0x76f85e9a, 0xdf394c6b,
-    0x76f1ee09, 0xdf2e81f3, 0x76eb7b58, 0xdf23b8be,
-    0x76e5068a, 0xdf18f0ce, 0x76de8f9e, 0xdf0e2a22,
-    0x76d81695, 0xdf0364bc, 0x76d19b6e, 0xdef8a09b,
-    0x76cb1e2a, 0xdeedddc0, 0x76c49ec9, 0xdee31c2b,
-    0x76be1d4c, 0xded85bdd, 0x76b799b3, 0xdecd9cd7,
-    0x76b113fd, 0xdec2df18, 0x76aa8c2c, 0xdeb822a1,
-    0x76a4023f, 0xdead6773, 0x769d7637, 0xdea2ad8d,
-    0x7696e814, 0xde97f4f1, 0x769057d6, 0xde8d3d9e,
-    0x7689c57d, 0xde828796, 0x7683310b, 0xde77d2d8,
-    0x767c9a7e, 0xde6d1f65, 0x767601d7, 0xde626d3e,
-    0x766f6717, 0xde57bc62, 0x7668ca3e, 0xde4d0cd2,
-    0x76622b4c, 0xde425e8f, 0x765b8a41, 0xde37b199,
-    0x7654e71d, 0xde2d05f1, 0x764e41e2, 0xde225b96,
-    0x76479a8e, 0xde17b28a, 0x7640f123, 0xde0d0acc,
-    0x763a45a0, 0xde02645d, 0x76339806, 0xddf7bf3e,
-    0x762ce855, 0xdded1b6e, 0x7626368d, 0xdde278ef,
-    0x761f82af, 0xddd7d7c1, 0x7618ccba, 0xddcd37e4,
-    0x761214b0, 0xddc29958, 0x760b5a90, 0xddb7fc1e,
-    0x76049e5b, 0xddad6036, 0x75fde011, 0xdda2c5a2,
-    0x75f71fb1, 0xdd982c60, 0x75f05d3d, 0xdd8d9472,
-    0x75e998b5, 0xdd82fdd8, 0x75e2d219, 0xdd786892,
-    0x75dc0968, 0xdd6dd4a2, 0x75d53ea5, 0xdd634206,
-    0x75ce71ce, 0xdd58b0c0, 0x75c7a2e3, 0xdd4e20d0,
-    0x75c0d1e7, 0xdd439236, 0x75b9fed7, 0xdd3904f4,
-    0x75b329b5, 0xdd2e7908, 0x75ac5282, 0xdd23ee74,
-    0x75a5793c, 0xdd196538, 0x759e9de5, 0xdd0edd55,
-    0x7597c07d, 0xdd0456ca, 0x7590e104, 0xdcf9d199,
-    0x7589ff7a, 0xdcef4dc2, 0x75831be0, 0xdce4cb44,
-    0x757c3636, 0xdcda4a21, 0x75754e7c, 0xdccfca59,
-    0x756e64b2, 0xdcc54bec, 0x756778d9, 0xdcbacedb,
-    0x75608af1, 0xdcb05326, 0x75599afa, 0xdca5d8cd,
-    0x7552a8f4, 0xdc9b5fd2, 0x754bb4e1, 0xdc90e834,
-    0x7544bebf, 0xdc8671f3, 0x753dc68f, 0xdc7bfd11,
-    0x7536cc52, 0xdc71898d, 0x752fd008, 0xdc671768,
-    0x7528d1b1, 0xdc5ca6a2, 0x7521d14d, 0xdc52373c,
-    0x751acedd, 0xdc47c936, 0x7513ca60, 0xdc3d5c91,
-    0x750cc3d8, 0xdc32f14d, 0x7505bb44, 0xdc28876a,
-    0x74feb0a5, 0xdc1e1ee9, 0x74f7a3fb, 0xdc13b7c9,
-    0x74f09546, 0xdc09520d, 0x74e98487, 0xdbfeedb3,
-    0x74e271bd, 0xdbf48abd, 0x74db5cea, 0xdbea292b,
-    0x74d4460c, 0xdbdfc8fc, 0x74cd2d26, 0xdbd56a32,
-    0x74c61236, 0xdbcb0cce, 0x74bef53d, 0xdbc0b0ce,
-    0x74b7d63c, 0xdbb65634, 0x74b0b533, 0xdbabfd01,
-    0x74a99221, 0xdba1a534, 0x74a26d08, 0xdb974ece,
-    0x749b45e7, 0xdb8cf9cf, 0x74941cbf, 0xdb82a638,
-    0x748cf190, 0xdb785409, 0x7485c45b, 0xdb6e0342,
-    0x747e951f, 0xdb63b3e5, 0x747763dd, 0xdb5965f1,
-    0x74703095, 0xdb4f1967, 0x7468fb47, 0xdb44ce46,
-    0x7461c3f5, 0xdb3a8491, 0x745a8a9d, 0xdb303c46,
-    0x74534f41, 0xdb25f566, 0x744c11e0, 0xdb1baff2,
-    0x7444d27b, 0xdb116beb, 0x743d9112, 0xdb072950,
-    0x74364da6, 0xdafce821, 0x742f0836, 0xdaf2a860,
-    0x7427c0c3, 0xdae86a0d, 0x7420774d, 0xdade2d28,
-    0x74192bd5, 0xdad3f1b1, 0x7411de5b, 0xdac9b7a9,
-    0x740a8edf, 0xdabf7f11, 0x74033d61, 0xdab547e8,
-    0x73fbe9e2, 0xdaab122f, 0x73f49462, 0xdaa0dde7,
-    0x73ed3ce1, 0xda96ab0f, 0x73e5e360, 0xda8c79a9,
-    0x73de87de, 0xda8249b4, 0x73d72a5d, 0xda781b31,
-    0x73cfcadc, 0xda6dee21, 0x73c8695b, 0xda63c284,
-    0x73c105db, 0xda599859, 0x73b9a05d, 0xda4f6fa3,
-    0x73b238e0, 0xda454860, 0x73aacf65, 0xda3b2292,
-    0x73a363ec, 0xda30fe38, 0x739bf675, 0xda26db54,
-    0x73948701, 0xda1cb9e5, 0x738d1590, 0xda1299ec,
-    0x7385a222, 0xda087b69, 0x737e2cb7, 0xd9fe5e5e,
-    0x7376b551, 0xd9f442c9, 0x736f3bee, 0xd9ea28ac,
-    0x7367c090, 0xd9e01006, 0x73604336, 0xd9d5f8d9,
-    0x7358c3e2, 0xd9cbe325, 0x73514292, 0xd9c1cee9,
-    0x7349bf48, 0xd9b7bc27, 0x73423a04, 0xd9adaadf,
-    0x733ab2c6, 0xd9a39b11, 0x7333298f, 0xd9998cbe,
-    0x732b9e5e, 0xd98f7fe6, 0x73241134, 0xd9857489,
-    0x731c8211, 0xd97b6aa8, 0x7314f0f6, 0xd9716243,
-    0x730d5de3, 0xd9675b5a, 0x7305c8d7, 0xd95d55ef,
-    0x72fe31d5, 0xd9535201, 0x72f698db, 0xd9494f90,
-    0x72eefdea, 0xd93f4e9e, 0x72e76102, 0xd9354f2a,
-    0x72dfc224, 0xd92b5135, 0x72d82150, 0xd92154bf,
-    0x72d07e85, 0xd91759c9, 0x72c8d9c6, 0xd90d6053,
-    0x72c13311, 0xd903685d, 0x72b98a67, 0xd8f971e8,
-    0x72b1dfc9, 0xd8ef7cf4, 0x72aa3336, 0xd8e58982,
-    0x72a284b0, 0xd8db9792, 0x729ad435, 0xd8d1a724,
-    0x729321c7, 0xd8c7b838, 0x728b6d66, 0xd8bdcad0,
-    0x7283b712, 0xd8b3deeb, 0x727bfecc, 0xd8a9f48a,
-    0x72744493, 0xd8a00bae, 0x726c8868, 0xd8962456,
-    0x7264ca4c, 0xd88c3e83, 0x725d0a3e, 0xd8825a35,
-    0x72554840, 0xd878776d, 0x724d8450, 0xd86e962b,
-    0x7245be70, 0xd864b670, 0x723df6a0, 0xd85ad83c,
-    0x72362ce0, 0xd850fb8e, 0x722e6130, 0xd8472069,
-    0x72269391, 0xd83d46cc, 0x721ec403, 0xd8336eb7,
-    0x7216f287, 0xd829982b, 0x720f1f1c, 0xd81fc328,
-    0x720749c3, 0xd815efae, 0x71ff727c, 0xd80c1dbf,
-    0x71f79948, 0xd8024d59, 0x71efbe27, 0xd7f87e7f,
-    0x71e7e118, 0xd7eeb130, 0x71e0021e, 0xd7e4e56c,
-    0x71d82137, 0xd7db1b34, 0x71d03e64, 0xd7d15288,
-    0x71c859a5, 0xd7c78b68, 0x71c072fb, 0xd7bdc5d6,
-    0x71b88a66, 0xd7b401d1, 0x71b09fe7, 0xd7aa3f5a,
-    0x71a8b37c, 0xd7a07e70, 0x71a0c528, 0xd796bf16,
-    0x7198d4ea, 0xd78d014a, 0x7190e2c3, 0xd783450d,
-    0x7188eeb2, 0xd7798a60, 0x7180f8b8, 0xd76fd143,
-    0x717900d6, 0xd76619b6, 0x7171070c, 0xd75c63ba,
-    0x71690b59, 0xd752af4f, 0x71610dbf, 0xd748fc75,
-    0x71590e3e, 0xd73f4b2e, 0x71510cd5, 0xd7359b78,
-    0x71490986, 0xd72bed55, 0x71410450, 0xd72240c5,
-    0x7138fd35, 0xd71895c9, 0x7130f433, 0xd70eec60,
-    0x7128e94c, 0xd705448b, 0x7120dc80, 0xd6fb9e4b,
-    0x7118cdcf, 0xd6f1f99f, 0x7110bd39, 0xd6e85689,
-    0x7108aabf, 0xd6deb508, 0x71009661, 0xd6d5151d,
-    0x70f8801f, 0xd6cb76c9, 0x70f067fb, 0xd6c1da0b,
-    0x70e84df3, 0xd6b83ee4, 0x70e03208, 0xd6aea555,
-    0x70d8143b, 0xd6a50d5d, 0x70cff48c, 0xd69b76fe,
-    0x70c7d2fb, 0xd691e237, 0x70bfaf89, 0xd6884f09,
-    0x70b78a36, 0xd67ebd74, 0x70af6302, 0xd6752d79,
-    0x70a739ed, 0xd66b9f18, 0x709f0ef8, 0xd6621251,
-    0x7096e223, 0xd6588725, 0x708eb36f, 0xd64efd94,
-    0x708682dc, 0xd645759f, 0x707e5069, 0xd63bef46,
-    0x70761c18, 0xd6326a88, 0x706de5e9, 0xd628e767,
-    0x7065addb, 0xd61f65e4, 0x705d73f0, 0xd615e5fd,
-    0x70553828, 0xd60c67b4, 0x704cfa83, 0xd602eb0a,
-    0x7044bb00, 0xd5f96ffd, 0x703c79a2, 0xd5eff690,
-    0x70343667, 0xd5e67ec1, 0x702bf151, 0xd5dd0892,
-    0x7023aa5f, 0xd5d39403, 0x701b6193, 0xd5ca2115,
-    0x701316eb, 0xd5c0afc6, 0x700aca69, 0xd5b74019,
-    0x70027c0c, 0xd5add20d, 0x6ffa2bd6, 0xd5a465a3,
-    0x6ff1d9c7, 0xd59afadb, 0x6fe985de, 0xd59191b5,
-    0x6fe1301c, 0xd5882a32, 0x6fd8d882, 0xd57ec452,
-    0x6fd07f0f, 0xd5756016, 0x6fc823c5, 0xd56bfd7d,
-    0x6fbfc6a3, 0xd5629c89, 0x6fb767aa, 0xd5593d3a,
-    0x6faf06da, 0xd54fdf8f, 0x6fa6a433, 0xd5468389,
-    0x6f9e3fb6, 0xd53d292a, 0x6f95d963, 0xd533d070,
-    0x6f8d713a, 0xd52a795d, 0x6f85073c, 0xd52123f0,
-    0x6f7c9b69, 0xd517d02b, 0x6f742dc1, 0xd50e7e0d,
-    0x6f6bbe45, 0xd5052d97, 0x6f634cf5, 0xd4fbdec9,
-    0x6f5ad9d1, 0xd4f291a4, 0x6f5264da, 0xd4e94627,
-    0x6f49ee0f, 0xd4dffc54, 0x6f417573, 0xd4d6b42b,
-    0x6f38fb03, 0xd4cd6dab, 0x6f307ec2, 0xd4c428d6,
-    0x6f2800af, 0xd4bae5ab, 0x6f1f80ca, 0xd4b1a42c,
-    0x6f16ff14, 0xd4a86458, 0x6f0e7b8e, 0xd49f2630,
-    0x6f05f637, 0xd495e9b3, 0x6efd6f10, 0xd48caee4,
-    0x6ef4e619, 0xd48375c1, 0x6eec5b53, 0xd47a3e4b,
-    0x6ee3cebe, 0xd4710883, 0x6edb405a, 0xd467d469,
-    0x6ed2b027, 0xd45ea1fd, 0x6eca1e27, 0xd4557140,
-    0x6ec18a58, 0xd44c4232, 0x6eb8f4bc, 0xd44314d3,
-    0x6eb05d53, 0xd439e923, 0x6ea7c41e, 0xd430bf24,
-    0x6e9f291b, 0xd42796d5, 0x6e968c4d, 0xd41e7037,
-    0x6e8dedb3, 0xd4154b4a, 0x6e854d4d, 0xd40c280e,
-    0x6e7cab1c, 0xd4030684, 0x6e740720, 0xd3f9e6ad,
-    0x6e6b615a, 0xd3f0c887, 0x6e62b9ca, 0xd3e7ac15,
-    0x6e5a1070, 0xd3de9156, 0x6e51654c, 0xd3d5784a,
-    0x6e48b860, 0xd3cc60f2, 0x6e4009aa, 0xd3c34b4f,
-    0x6e37592c, 0xd3ba3760, 0x6e2ea6e6, 0xd3b12526,
-    0x6e25f2d8, 0xd3a814a2, 0x6e1d3d03, 0xd39f05d3,
-    0x6e148566, 0xd395f8ba, 0x6e0bcc03, 0xd38ced57,
-    0x6e0310d9, 0xd383e3ab, 0x6dfa53e9, 0xd37adbb6,
-    0x6df19534, 0xd371d579, 0x6de8d4b8, 0xd368d0f3,
-    0x6de01278, 0xd35fce26, 0x6dd74e73, 0xd356cd11,
-    0x6dce88aa, 0xd34dcdb4, 0x6dc5c11c, 0xd344d011,
-    0x6dbcf7cb, 0xd33bd427, 0x6db42cb6, 0xd332d9f7,
-    0x6dab5fdf, 0xd329e181, 0x6da29144, 0xd320eac6,
-    0x6d99c0e7, 0xd317f5c6, 0x6d90eec8, 0xd30f0280,
-    0x6d881ae8, 0xd30610f7, 0x6d7f4545, 0xd2fd2129,
-    0x6d766de2, 0xd2f43318, 0x6d6d94bf, 0xd2eb46c3,
-    0x6d64b9da, 0xd2e25c2b, 0x6d5bdd36, 0xd2d97350,
-    0x6d52fed2, 0xd2d08c33, 0x6d4a1eaf, 0xd2c7a6d4,
-    0x6d413ccd, 0xd2bec333, 0x6d38592c, 0xd2b5e151,
-    0x6d2f73cd, 0xd2ad012e, 0x6d268cb0, 0xd2a422ca,
-    0x6d1da3d5, 0xd29b4626, 0x6d14b93d, 0xd2926b41,
-    0x6d0bcce8, 0xd289921e, 0x6d02ded7, 0xd280babb,
-    0x6cf9ef09, 0xd277e518, 0x6cf0fd80, 0xd26f1138,
-    0x6ce80a3a, 0xd2663f19, 0x6cdf153a, 0xd25d6ebc,
-    0x6cd61e7f, 0xd254a021, 0x6ccd2609, 0xd24bd34a,
-    0x6cc42bd9, 0xd2430835, 0x6cbb2fef, 0xd23a3ee4,
-    0x6cb2324c, 0xd2317756, 0x6ca932ef, 0xd228b18d,
-    0x6ca031da, 0xd21fed88, 0x6c972f0d, 0xd2172b48,
-    0x6c8e2a87, 0xd20e6acc, 0x6c85244a, 0xd205ac17,
-    0x6c7c1c55, 0xd1fcef27, 0x6c7312a9, 0xd1f433fd,
-    0x6c6a0746, 0xd1eb7a9a, 0x6c60fa2d, 0xd1e2c2fd,
-    0x6c57eb5e, 0xd1da0d28, 0x6c4edada, 0xd1d1591a,
-    0x6c45c8a0, 0xd1c8a6d4, 0x6c3cb4b1, 0xd1bff656,
-    0x6c339f0e, 0xd1b747a0, 0x6c2a87b6, 0xd1ae9ab4,
-    0x6c216eaa, 0xd1a5ef90, 0x6c1853eb, 0xd19d4636,
-    0x6c0f3779, 0xd1949ea6, 0x6c061953, 0xd18bf8e0,
-    0x6bfcf97c, 0xd18354e4, 0x6bf3d7f2, 0xd17ab2b3,
-    0x6beab4b6, 0xd172124d, 0x6be18fc9, 0xd16973b3,
-    0x6bd8692b, 0xd160d6e5, 0x6bcf40dc, 0xd1583be2,
-    0x6bc616dd, 0xd14fa2ad, 0x6bbceb2d, 0xd1470b44,
-    0x6bb3bdce, 0xd13e75a8, 0x6baa8ec0, 0xd135e1d9,
-    0x6ba15e03, 0xd12d4fd9, 0x6b982b97, 0xd124bfa6,
-    0x6b8ef77d, 0xd11c3142, 0x6b85c1b5, 0xd113a4ad,
-    0x6b7c8a3f, 0xd10b19e7, 0x6b73511c, 0xd10290f0,
-    0x6b6a164d, 0xd0fa09c9, 0x6b60d9d0, 0xd0f18472,
-    0x6b579ba8, 0xd0e900ec, 0x6b4e5bd4, 0xd0e07f36,
-    0x6b451a55, 0xd0d7ff51, 0x6b3bd72a, 0xd0cf813e,
-    0x6b329255, 0xd0c704fd, 0x6b294bd5, 0xd0be8a8d,
-    0x6b2003ac, 0xd0b611f1, 0x6b16b9d9, 0xd0ad9b26,
-    0x6b0d6e5c, 0xd0a5262f, 0x6b042137, 0xd09cb30b,
-    0x6afad269, 0xd09441bb, 0x6af181f3, 0xd08bd23f,
-    0x6ae82fd5, 0xd0836497, 0x6adedc10, 0xd07af8c4,
-    0x6ad586a3, 0xd0728ec6, 0x6acc2f90, 0xd06a269d,
-    0x6ac2d6d6, 0xd061c04a, 0x6ab97c77, 0xd0595bcd,
-    0x6ab02071, 0xd050f926, 0x6aa6c2c6, 0xd0489856,
-    0x6a9d6377, 0xd040395d, 0x6a940283, 0xd037dc3b,
-    0x6a8a9fea, 0xd02f80f1, 0x6a813bae, 0xd027277e,
-    0x6a77d5ce, 0xd01ecfe4, 0x6a6e6e4b, 0xd0167a22,
-    0x6a650525, 0xd00e2639, 0x6a5b9a5d, 0xd005d42a,
-    0x6a522df3, 0xcffd83f4, 0x6a48bfe7, 0xcff53597,
-    0x6a3f503a, 0xcfece915, 0x6a35deeb, 0xcfe49e6d,
-    0x6a2c6bfd, 0xcfdc55a1, 0x6a22f76e, 0xcfd40eaf,
-    0x6a19813f, 0xcfcbc999, 0x6a100970, 0xcfc3865e,
-    0x6a069003, 0xcfbb4500, 0x69fd14f6, 0xcfb3057d,
-    0x69f3984c, 0xcfaac7d8, 0x69ea1a03, 0xcfa28c10,
-    0x69e09a1c, 0xcf9a5225, 0x69d71899, 0xcf921a17,
-    0x69cd9578, 0xcf89e3e8, 0x69c410ba, 0xcf81af97,
-    0x69ba8a61, 0xcf797d24, 0x69b1026c, 0xcf714c91,
-    0x69a778db, 0xcf691ddd, 0x699dedaf, 0xcf60f108,
-    0x699460e8, 0xcf58c613, 0x698ad287, 0xcf509cfe,
-    0x6981428c, 0xcf4875ca, 0x6977b0f7, 0xcf405077,
-    0x696e1dc9, 0xcf382d05, 0x69648902, 0xcf300b74,
-    0x695af2a3, 0xcf27ebc5, 0x69515aab, 0xcf1fcdf8,
-    0x6947c11c, 0xcf17b20d, 0x693e25f5, 0xcf0f9805,
-    0x69348937, 0xcf077fe1, 0x692aeae3, 0xceff699f,
-    0x69214af8, 0xcef75541, 0x6917a977, 0xceef42c7,
-    0x690e0661, 0xcee73231, 0x690461b5, 0xcedf2380,
-    0x68fabb75, 0xced716b4, 0x68f113a0, 0xcecf0bcd,
-    0x68e76a37, 0xcec702cb, 0x68ddbf3b, 0xcebefbb0,
-    0x68d412ab, 0xceb6f67a, 0x68ca6488, 0xceaef32b,
-    0x68c0b4d2, 0xcea6f1c2, 0x68b7038b, 0xce9ef241,
-    0x68ad50b1, 0xce96f4a7, 0x68a39c46, 0xce8ef8f4,
-    0x6899e64a, 0xce86ff2a, 0x68902ebd, 0xce7f0748,
-    0x688675a0, 0xce77114e, 0x687cbaf3, 0xce6f1d3d,
-    0x6872feb6, 0xce672b16, 0x686940ea, 0xce5f3ad8,
-    0x685f8190, 0xce574c84, 0x6855c0a6, 0xce4f6019,
-    0x684bfe2f, 0xce47759a, 0x68423a2a, 0xce3f8d05,
-    0x68387498, 0xce37a65b, 0x682ead78, 0xce2fc19c,
-    0x6824e4cc, 0xce27dec9, 0x681b1a94, 0xce1ffde2,
-    0x68114ed0, 0xce181ee8, 0x68078181, 0xce1041d9,
-    0x67fdb2a7, 0xce0866b8, 0x67f3e241, 0xce008d84,
-    0x67ea1052, 0xcdf8b63d, 0x67e03cd8, 0xcdf0e0e4,
-    0x67d667d5, 0xcde90d79, 0x67cc9149, 0xcde13bfd,
-    0x67c2b934, 0xcdd96c6f, 0x67b8df97, 0xcdd19ed0,
-    0x67af0472, 0xcdc9d320, 0x67a527c4, 0xcdc20960,
-    0x679b4990, 0xcdba4190, 0x679169d5, 0xcdb27bb0,
-    0x67878893, 0xcdaab7c0, 0x677da5cb, 0xcda2f5c2,
-    0x6773c17d, 0xcd9b35b4, 0x6769dbaa, 0xcd937798,
-    0x675ff452, 0xcd8bbb6d, 0x67560b76, 0xcd840134,
-    0x674c2115, 0xcd7c48ee, 0x67423530, 0xcd74929a,
-    0x673847c8, 0xcd6cde39, 0x672e58dc, 0xcd652bcb,
-    0x6724686e, 0xcd5d7b50, 0x671a767e, 0xcd55ccca,
-    0x6710830c, 0xcd4e2037, 0x67068e18, 0xcd467599,
-    0x66fc97a3, 0xcd3eccef, 0x66f29fad, 0xcd37263a,
-    0x66e8a637, 0xcd2f817b, 0x66deab41, 0xcd27deb0,
-    0x66d4aecb, 0xcd203ddc, 0x66cab0d6, 0xcd189efe,
-    0x66c0b162, 0xcd110216, 0x66b6b070, 0xcd096725,
-    0x66acadff, 0xcd01ce2b, 0x66a2aa11, 0xccfa3729,
-    0x6698a4a6, 0xccf2a21d, 0x668e9dbd, 0xcceb0f0a,
-    0x66849558, 0xcce37def, 0x667a8b77, 0xccdbeecc,
-    0x6670801a, 0xccd461a2, 0x66667342, 0xccccd671,
-    0x665c64ef, 0xccc54d3a, 0x66525521, 0xccbdc5fc,
-    0x664843d9, 0xccb640b8, 0x663e3117, 0xccaebd6e,
-    0x66341cdb, 0xcca73c1e, 0x662a0727, 0xcc9fbcca,
-    0x661feffa, 0xcc983f70, 0x6615d754, 0xcc90c412,
-    0x660bbd37, 0xcc894aaf, 0x6601a1a2, 0xcc81d349,
-    0x65f78497, 0xcc7a5dde, 0x65ed6614, 0xcc72ea70,
-    0x65e3461b, 0xcc6b78ff, 0x65d924ac, 0xcc64098b,
-    0x65cf01c8, 0xcc5c9c14, 0x65c4dd6e, 0xcc55309b,
-    0x65bab7a0, 0xcc4dc720, 0x65b0905d, 0xcc465fa3,
-    0x65a667a7, 0xcc3efa25, 0x659c3d7c, 0xcc3796a5,
-    0x659211df, 0xcc303524, 0x6587e4cf, 0xcc28d5a3,
-    0x657db64c, 0xcc217822, 0x65738657, 0xcc1a1ca0,
-    0x656954f1, 0xcc12c31f, 0x655f2219, 0xcc0b6b9e,
-    0x6554edd1, 0xcc04161e, 0x654ab818, 0xcbfcc29f,
-    0x654080ef, 0xcbf57121, 0x65364857, 0xcbee21a5,
-    0x652c0e4f, 0xcbe6d42b, 0x6521d2d8, 0xcbdf88b3,
-    0x651795f3, 0xcbd83f3d, 0x650d57a0, 0xcbd0f7ca,
-    0x650317df, 0xcbc9b25a, 0x64f8d6b0, 0xcbc26eee,
-    0x64ee9415, 0xcbbb2d85, 0x64e4500e, 0xcbb3ee20,
-    0x64da0a9a, 0xcbacb0bf, 0x64cfc3ba, 0xcba57563,
-    0x64c57b6f, 0xcb9e3c0b, 0x64bb31ba, 0xcb9704b9,
-    0x64b0e699, 0xcb8fcf6b, 0x64a69a0f, 0xcb889c23,
-    0x649c4c1b, 0xcb816ae1, 0x6491fcbe, 0xcb7a3ba5,
-    0x6487abf7, 0xcb730e70, 0x647d59c8, 0xcb6be341,
-    0x64730631, 0xcb64ba19, 0x6468b132, 0xcb5d92f8,
-    0x645e5acc, 0xcb566ddf, 0x645402ff, 0xcb4f4acd,
-    0x6449a9cc, 0xcb4829c4, 0x643f4f32, 0xcb410ac3,
-    0x6434f332, 0xcb39edca, 0x642a95ce, 0xcb32d2da,
-    0x64203704, 0xcb2bb9f4, 0x6415d6d5, 0xcb24a316,
-    0x640b7543, 0xcb1d8e43, 0x6401124d, 0xcb167b79,
-    0x63f6adf3, 0xcb0f6aba, 0x63ec4837, 0xcb085c05,
-    0x63e1e117, 0xcb014f5b, 0x63d77896, 0xcafa44bc,
-    0x63cd0eb3, 0xcaf33c28, 0x63c2a36f, 0xcaec35a0,
-    0x63b836ca, 0xcae53123, 0x63adc8c4, 0xcade2eb3,
-    0x63a3595e, 0xcad72e4f, 0x6398e898, 0xcad02ff8,
-    0x638e7673, 0xcac933ae, 0x638402ef, 0xcac23971,
-    0x63798e0d, 0xcabb4141, 0x636f17cc, 0xcab44b1f,
-    0x6364a02e, 0xcaad570c, 0x635a2733, 0xcaa66506,
-    0x634facda, 0xca9f750f, 0x63453125, 0xca988727,
-    0x633ab414, 0xca919b4e, 0x633035a7, 0xca8ab184,
-    0x6325b5df, 0xca83c9ca, 0x631b34bc, 0xca7ce420,
-    0x6310b23e, 0xca760086, 0x63062e67, 0xca6f1efc,
-    0x62fba936, 0xca683f83, 0x62f122ab, 0xca61621b,
-    0x62e69ac8, 0xca5a86c4, 0x62dc118c, 0xca53ad7e,
-    0x62d186f8, 0xca4cd64b, 0x62c6fb0c, 0xca460129,
-    0x62bc6dca, 0xca3f2e19, 0x62b1df30, 0xca385d1d,
-    0x62a74f40, 0xca318e32, 0x629cbdfa, 0xca2ac15b,
-    0x62922b5e, 0xca23f698, 0x6287976e, 0xca1d2de7,
-    0x627d0228, 0xca16674b, 0x62726b8e, 0xca0fa2c3,
-    0x6267d3a0, 0xca08e04f, 0x625d3a5e, 0xca021fef,
-    0x62529fca, 0xc9fb61a5, 0x624803e2, 0xc9f4a570,
-    0x623d66a8, 0xc9edeb50, 0x6232c81c, 0xc9e73346,
-    0x6228283f, 0xc9e07d51, 0x621d8711, 0xc9d9c973,
-    0x6212e492, 0xc9d317ab, 0x620840c2, 0xc9cc67fa,
-    0x61fd9ba3, 0xc9c5ba60, 0x61f2f534, 0xc9bf0edd,
-    0x61e84d76, 0xc9b86572, 0x61dda46a, 0xc9b1be1e,
-    0x61d2fa0f, 0xc9ab18e3, 0x61c84e67, 0xc9a475bf,
-    0x61bda171, 0xc99dd4b4, 0x61b2f32e, 0xc99735c2,
-    0x61a8439e, 0xc99098e9, 0x619d92c2, 0xc989fe29,
-    0x6192e09b, 0xc9836582, 0x61882d28, 0xc97ccef5,
-    0x617d786a, 0xc9763a83, 0x6172c262, 0xc96fa82a,
-    0x61680b0f, 0xc96917ec, 0x615d5273, 0xc96289c9,
-    0x6152988d, 0xc95bfdc1, 0x6147dd5f, 0xc95573d4,
-    0x613d20e8, 0xc94eec03, 0x61326329, 0xc948664d,
-    0x6127a423, 0xc941e2b4, 0x611ce3d5, 0xc93b6137,
-    0x61122240, 0xc934e1d6, 0x61075f65, 0xc92e6492,
-    0x60fc9b44, 0xc927e96b, 0x60f1d5de, 0xc9217062,
-    0x60e70f32, 0xc91af976, 0x60dc4742, 0xc91484a8,
-    0x60d17e0d, 0xc90e11f7, 0x60c6b395, 0xc907a166,
-    0x60bbe7d8, 0xc90132f2, 0x60b11ad9, 0xc8fac69e,
-    0x60a64c97, 0xc8f45c68, 0x609b7d13, 0xc8edf452,
-    0x6090ac4d, 0xc8e78e5b, 0x6085da46, 0xc8e12a84,
-    0x607b06fe, 0xc8dac8cd, 0x60703275, 0xc8d46936,
-    0x60655cac, 0xc8ce0bc0, 0x605a85a3, 0xc8c7b06b,
-    0x604fad5b, 0xc8c15736, 0x6044d3d4, 0xc8bb0023,
-    0x6039f90f, 0xc8b4ab32, 0x602f1d0b, 0xc8ae5862,
-    0x60243fca, 0xc8a807b4, 0x6019614c, 0xc8a1b928,
-    0x600e8190, 0xc89b6cbf, 0x6003a099, 0xc8952278,
-    0x5ff8be65, 0xc88eda54, 0x5feddaf6, 0xc8889454,
-    0x5fe2f64c, 0xc8825077, 0x5fd81067, 0xc87c0ebd,
-    0x5fcd2948, 0xc875cf28, 0x5fc240ef, 0xc86f91b7,
-    0x5fb7575c, 0xc869566a, 0x5fac6c91, 0xc8631d42,
-    0x5fa1808c, 0xc85ce63e, 0x5f969350, 0xc856b160,
-    0x5f8ba4dc, 0xc8507ea7, 0x5f80b531, 0xc84a4e14,
-    0x5f75c44e, 0xc8441fa6, 0x5f6ad235, 0xc83df35f,
-    0x5f5fdee6, 0xc837c93e, 0x5f54ea62, 0xc831a143,
-    0x5f49f4a8, 0xc82b7b70, 0x5f3efdb9, 0xc82557c3,
-    0x5f340596, 0xc81f363d, 0x5f290c3f, 0xc81916df,
-    0x5f1e11b5, 0xc812f9a9, 0x5f1315f7, 0xc80cde9b,
-    0x5f081907, 0xc806c5b5, 0x5efd1ae4, 0xc800aef7,
-    0x5ef21b90, 0xc7fa9a62, 0x5ee71b0a, 0xc7f487f6,
-    0x5edc1953, 0xc7ee77b3, 0x5ed1166b, 0xc7e8699a,
-    0x5ec61254, 0xc7e25daa, 0x5ebb0d0d, 0xc7dc53e3,
-    0x5eb00696, 0xc7d64c47, 0x5ea4fef0, 0xc7d046d6,
-    0x5e99f61d, 0xc7ca438f, 0x5e8eec1b, 0xc7c44272,
-    0x5e83e0eb, 0xc7be4381, 0x5e78d48e, 0xc7b846ba,
-    0x5e6dc705, 0xc7b24c20, 0x5e62b84f, 0xc7ac53b1,
-    0x5e57a86d, 0xc7a65d6e, 0x5e4c9760, 0xc7a06957,
-    0x5e418528, 0xc79a776c, 0x5e3671c5, 0xc79487ae,
-    0x5e2b5d38, 0xc78e9a1d, 0x5e204781, 0xc788aeb9,
-    0x5e1530a1, 0xc782c582, 0x5e0a1898, 0xc77cde79,
-    0x5dfeff67, 0xc776f99d, 0x5df3e50d, 0xc77116f0,
-    0x5de8c98c, 0xc76b3671, 0x5dddace4, 0xc7655820,
-    0x5dd28f15, 0xc75f7bfe, 0x5dc7701f, 0xc759a20a,
-    0x5dbc5004, 0xc753ca46, 0x5db12ec3, 0xc74df4b1,
-    0x5da60c5d, 0xc748214c, 0x5d9ae8d2, 0xc7425016,
-    0x5d8fc424, 0xc73c8111, 0x5d849e51, 0xc736b43c,
-    0x5d79775c, 0xc730e997, 0x5d6e4f43, 0xc72b2123,
-    0x5d632608, 0xc7255ae0, 0x5d57fbaa, 0xc71f96ce,
-    0x5d4cd02c, 0xc719d4ed, 0x5d41a38c, 0xc714153e,
-    0x5d3675cb, 0xc70e57c0, 0x5d2b46ea, 0xc7089c75,
-    0x5d2016e9, 0xc702e35c, 0x5d14e5c9, 0xc6fd2c75,
-    0x5d09b389, 0xc6f777c1, 0x5cfe802b, 0xc6f1c540,
-    0x5cf34baf, 0xc6ec14f2, 0x5ce81615, 0xc6e666d7,
-    0x5cdcdf5e, 0xc6e0baf0, 0x5cd1a78a, 0xc6db113d,
-    0x5cc66e99, 0xc6d569be, 0x5cbb348d, 0xc6cfc472,
-    0x5caff965, 0xc6ca215c, 0x5ca4bd21, 0xc6c4807a,
-    0x5c997fc4, 0xc6bee1cd, 0x5c8e414b, 0xc6b94554,
-    0x5c8301b9, 0xc6b3ab12, 0x5c77c10e, 0xc6ae1304,
-    0x5c6c7f4a, 0xc6a87d2d, 0x5c613c6d, 0xc6a2e98b,
-    0x5c55f878, 0xc69d5820, 0x5c4ab36b, 0xc697c8eb,
-    0x5c3f6d47, 0xc6923bec, 0x5c34260c, 0xc68cb124,
-    0x5c28ddbb, 0xc6872894, 0x5c1d9454, 0xc681a23a,
-    0x5c1249d8, 0xc67c1e18, 0x5c06fe46, 0xc6769c2e,
-    0x5bfbb1a0, 0xc6711c7b, 0x5bf063e6, 0xc66b9f01,
-    0x5be51518, 0xc66623be, 0x5bd9c537, 0xc660aab5,
-    0x5bce7442, 0xc65b33e4, 0x5bc3223c, 0xc655bf4c,
-    0x5bb7cf23, 0xc6504ced, 0x5bac7af9, 0xc64adcc7,
-    0x5ba125bd, 0xc6456edb, 0x5b95cf71, 0xc6400329,
-    0x5b8a7815, 0xc63a99b1, 0x5b7f1fa9, 0xc6353273,
-    0x5b73c62d, 0xc62fcd6f, 0x5b686ba3, 0xc62a6aa6,
-    0x5b5d100a, 0xc6250a18, 0x5b51b363, 0xc61fabc4,
-    0x5b4655ae, 0xc61a4fac, 0x5b3af6ec, 0xc614f5cf,
-    0x5b2f971e, 0xc60f9e2e, 0x5b243643, 0xc60a48c9,
-    0x5b18d45c, 0xc604f5a0, 0x5b0d716a, 0xc5ffa4b3,
-    0x5b020d6c, 0xc5fa5603, 0x5af6a865, 0xc5f5098f,
-    0x5aeb4253, 0xc5efbf58, 0x5adfdb37, 0xc5ea775e,
-    0x5ad47312, 0xc5e531a1, 0x5ac909e5, 0xc5dfee22,
-    0x5abd9faf, 0xc5daace1, 0x5ab23471, 0xc5d56ddd,
-    0x5aa6c82b, 0xc5d03118, 0x5a9b5adf, 0xc5caf690,
-    0x5a8fec8c, 0xc5c5be47, 0x5a847d33, 0xc5c0883d,
-    0x5a790cd4, 0xc5bb5472, 0x5a6d9b70, 0xc5b622e6,
-    0x5a622907, 0xc5b0f399, 0x5a56b599, 0xc5abc68c,
-    0x5a4b4128, 0xc5a69bbe, 0x5a3fcbb3, 0xc5a17330,
-    0x5a34553b, 0xc59c4ce3, 0x5a28ddc0, 0xc59728d5,
-    0x5a1d6544, 0xc5920708, 0x5a11ebc5, 0xc58ce77c,
-    0x5a067145, 0xc587ca31, 0x59faf5c5, 0xc582af26,
-    0x59ef7944, 0xc57d965d, 0x59e3fbc3, 0xc5787fd6,
-    0x59d87d42, 0xc5736b90, 0x59ccfdc2, 0xc56e598c,
-    0x59c17d44, 0xc56949ca, 0x59b5fbc8, 0xc5643c4a,
-    0x59aa794d, 0xc55f310d, 0x599ef5d6, 0xc55a2812,
-    0x59937161, 0xc555215a, 0x5987ebf0, 0xc5501ce5,
-    0x597c6584, 0xc54b1ab4, 0x5970de1b, 0xc5461ac6,
-    0x596555b8, 0xc5411d1b, 0x5959cc5a, 0xc53c21b4,
-    0x594e4201, 0xc5372891, 0x5942b6af, 0xc53231b3,
-    0x59372a64, 0xc52d3d18, 0x592b9d1f, 0xc5284ac3,
-    0x59200ee3, 0xc5235ab2, 0x59147fae, 0xc51e6ce6,
-    0x5908ef82, 0xc519815f, 0x58fd5e5f, 0xc514981d,
-    0x58f1cc45, 0xc50fb121, 0x58e63935, 0xc50acc6b,
-    0x58daa52f, 0xc505e9fb, 0x58cf1034, 0xc50109d0,
-    0x58c37a44, 0xc4fc2bec, 0x58b7e35f, 0xc4f7504e,
-    0x58ac4b87, 0xc4f276f7, 0x58a0b2bb, 0xc4ed9fe7,
-    0x589518fc, 0xc4e8cb1e, 0x58897e4a, 0xc4e3f89c,
-    0x587de2a7, 0xc4df2862, 0x58724611, 0xc4da5a6f,
-    0x5866a88a, 0xc4d58ec3, 0x585b0a13, 0xc4d0c560,
-    0x584f6aab, 0xc4cbfe45, 0x5843ca53, 0xc4c73972,
-    0x5838290c, 0xc4c276e8, 0x582c86d5, 0xc4bdb6a6,
-    0x5820e3b0, 0xc4b8f8ad, 0x58153f9d, 0xc4b43cfd,
-    0x58099a9c, 0xc4af8397, 0x57fdf4ae, 0xc4aacc7a,
-    0x57f24dd3, 0xc4a617a6, 0x57e6a60c, 0xc4a1651c,
-    0x57dafd59, 0xc49cb4dd, 0x57cf53bb, 0xc49806e7,
-    0x57c3a931, 0xc4935b3c, 0x57b7fdbd, 0xc48eb1db,
-    0x57ac515f, 0xc48a0ac4, 0x57a0a417, 0xc48565f9,
-    0x5794f5e6, 0xc480c379, 0x578946cc, 0xc47c2344,
-    0x577d96ca, 0xc477855a, 0x5771e5e0, 0xc472e9bc,
-    0x5766340f, 0xc46e5069, 0x575a8157, 0xc469b963,
-    0x574ecdb8, 0xc46524a9, 0x57431933, 0xc460923b,
-    0x573763c9, 0xc45c0219, 0x572bad7a, 0xc4577444,
-    0x571ff646, 0xc452e8bc, 0x57143e2d, 0xc44e5f80,
-    0x57088531, 0xc449d892, 0x56fccb51, 0xc44553f2,
-    0x56f1108f, 0xc440d19e, 0x56e554ea, 0xc43c5199,
-    0x56d99864, 0xc437d3e1, 0x56cddafb, 0xc4335877,
-    0x56c21cb2, 0xc42edf5c, 0x56b65d88, 0xc42a688f,
-    0x56aa9d7e, 0xc425f410, 0x569edc94, 0xc42181e0,
-    0x56931acb, 0xc41d11ff, 0x56875823, 0xc418a46d,
-    0x567b949d, 0xc414392b, 0x566fd039, 0xc40fd037,
-    0x56640af7, 0xc40b6994, 0x565844d8, 0xc4070540,
-    0x564c7ddd, 0xc402a33c, 0x5640b606, 0xc3fe4388,
-    0x5634ed53, 0xc3f9e624, 0x562923c5, 0xc3f58b10,
-    0x561d595d, 0xc3f1324e, 0x56118e1a, 0xc3ecdbdc,
-    0x5605c1fd, 0xc3e887bb, 0x55f9f507, 0xc3e435ea,
-    0x55ee2738, 0xc3dfe66c, 0x55e25890, 0xc3db993e,
-    0x55d68911, 0xc3d74e62, 0x55cab8ba, 0xc3d305d8,
-    0x55bee78c, 0xc3cebfa0, 0x55b31587, 0xc3ca7bba,
-    0x55a742ac, 0xc3c63a26, 0x559b6efb, 0xc3c1fae5,
-    0x558f9a76, 0xc3bdbdf6, 0x5583c51b, 0xc3b9835a,
-    0x5577eeec, 0xc3b54b11, 0x556c17e9, 0xc3b1151b,
-    0x55604013, 0xc3ace178, 0x5554676a, 0xc3a8b028,
-    0x55488dee, 0xc3a4812c, 0x553cb3a0, 0xc3a05484,
-    0x5530d881, 0xc39c2a2f, 0x5524fc90, 0xc398022f,
-    0x55191fcf, 0xc393dc82, 0x550d423d, 0xc38fb92a,
-    0x550163dc, 0xc38b9827, 0x54f584ac, 0xc3877978,
-    0x54e9a4ac, 0xc3835d1e, 0x54ddc3de, 0xc37f4319,
-    0x54d1e242, 0xc37b2b6a, 0x54c5ffd9, 0xc377160f,
-    0x54ba1ca3, 0xc373030a, 0x54ae38a0, 0xc36ef25b,
-    0x54a253d1, 0xc36ae401, 0x54966e36, 0xc366d7fd,
-    0x548a87d1, 0xc362ce50, 0x547ea0a0, 0xc35ec6f8,
-    0x5472b8a5, 0xc35ac1f7, 0x5466cfe1, 0xc356bf4d,
-    0x545ae653, 0xc352bef9, 0x544efbfc, 0xc34ec0fc,
-    0x544310dd, 0xc34ac556, 0x543724f5, 0xc346cc07,
-    0x542b3846, 0xc342d510, 0x541f4ad1, 0xc33ee070,
-    0x54135c94, 0xc33aee27, 0x54076d91, 0xc336fe37,
-    0x53fb7dc9, 0xc333109e, 0x53ef8d3c, 0xc32f255e,
-    0x53e39be9, 0xc32b3c75, 0x53d7a9d3, 0xc32755e5,
-    0x53cbb6f8, 0xc32371ae, 0x53bfc35b, 0xc31f8fcf,
-    0x53b3cefa, 0xc31bb049, 0x53a7d9d7, 0xc317d31c,
-    0x539be3f2, 0xc313f848, 0x538fed4b, 0xc3101fce,
-    0x5383f5e3, 0xc30c49ad, 0x5377fdbb, 0xc30875e5,
-    0x536c04d2, 0xc304a477, 0x53600b2a, 0xc300d563,
-    0x535410c3, 0xc2fd08a9, 0x5348159d, 0xc2f93e4a,
-    0x533c19b8, 0xc2f57644, 0x53301d16, 0xc2f1b099,
-    0x53241fb6, 0xc2eded49, 0x5318219a, 0xc2ea2c53,
-    0x530c22c1, 0xc2e66db8, 0x5300232c, 0xc2e2b178,
-    0x52f422db, 0xc2def794, 0x52e821cf, 0xc2db400a,
-    0x52dc2009, 0xc2d78add, 0x52d01d89, 0xc2d3d80a,
-    0x52c41a4f, 0xc2d02794, 0x52b8165b, 0xc2cc7979,
-    0x52ac11af, 0xc2c8cdbb, 0x52a00c4b, 0xc2c52459,
-    0x5294062f, 0xc2c17d52, 0x5287ff5b, 0xc2bdd8a9,
-    0x527bf7d1, 0xc2ba365c, 0x526fef90, 0xc2b6966c,
-    0x5263e699, 0xc2b2f8d8, 0x5257dced, 0xc2af5da2,
-    0x524bd28c, 0xc2abc4c9, 0x523fc776, 0xc2a82e4d,
-    0x5233bbac, 0xc2a49a2e, 0x5227af2e, 0xc2a1086d,
-    0x521ba1fd, 0xc29d790a, 0x520f941a, 0xc299ec05,
-    0x52038584, 0xc296615d, 0x51f7763c, 0xc292d914,
-    0x51eb6643, 0xc28f5329, 0x51df5599, 0xc28bcf9c,
-    0x51d3443f, 0xc2884e6e, 0x51c73235, 0xc284cf9f,
-    0x51bb1f7c, 0xc281532e, 0x51af0c13, 0xc27dd91c,
-    0x51a2f7fc, 0xc27a616a, 0x5196e337, 0xc276ec16,
-    0x518acdc4, 0xc2737922, 0x517eb7a4, 0xc270088e,
-    0x5172a0d7, 0xc26c9a58, 0x5166895f, 0xc2692e83,
-    0x515a713a, 0xc265c50e, 0x514e586a, 0xc2625df8,
-    0x51423ef0, 0xc25ef943, 0x513624cb, 0xc25b96ee,
-    0x512a09fc, 0xc25836f9, 0x511dee84, 0xc254d965,
-    0x5111d263, 0xc2517e31, 0x5105b599, 0xc24e255e,
-    0x50f99827, 0xc24aceed, 0x50ed7a0e, 0xc2477adc,
-    0x50e15b4e, 0xc244292c, 0x50d53be7, 0xc240d9de,
-    0x50c91bda, 0xc23d8cf1, 0x50bcfb28, 0xc23a4265,
-    0x50b0d9d0, 0xc236fa3b, 0x50a4b7d3, 0xc233b473,
-    0x50989532, 0xc230710d, 0x508c71ee, 0xc22d3009,
-    0x50804e06, 0xc229f167, 0x5074297b, 0xc226b528,
-    0x5068044e, 0xc2237b4b, 0x505bde7f, 0xc22043d0,
-    0x504fb80e, 0xc21d0eb8, 0x504390fd, 0xc219dc03,
-    0x5037694b, 0xc216abb1, 0x502b40f8, 0xc2137dc2,
-    0x501f1807, 0xc2105236, 0x5012ee76, 0xc20d290d,
-    0x5006c446, 0xc20a0248, 0x4ffa9979, 0xc206dde6,
-    0x4fee6e0d, 0xc203bbe8, 0x4fe24205, 0xc2009c4e,
-    0x4fd6155f, 0xc1fd7f17, 0x4fc9e81e, 0xc1fa6445,
-    0x4fbdba40, 0xc1f74bd6, 0x4fb18bc8, 0xc1f435cc,
-    0x4fa55cb4, 0xc1f12227, 0x4f992d06, 0xc1ee10e5,
-    0x4f8cfcbe, 0xc1eb0209, 0x4f80cbdc, 0xc1e7f591,
-    0x4f749a61, 0xc1e4eb7e, 0x4f68684e, 0xc1e1e3d0,
-    0x4f5c35a3, 0xc1dede87, 0x4f500260, 0xc1dbdba3,
-    0x4f43ce86, 0xc1d8db25, 0x4f379a16, 0xc1d5dd0c,
-    0x4f2b650f, 0xc1d2e158, 0x4f1f2f73, 0xc1cfe80a,
-    0x4f12f941, 0xc1ccf122, 0x4f06c27a, 0xc1c9fca0,
-    0x4efa8b20, 0xc1c70a84, 0x4eee5331, 0xc1c41ace,
-    0x4ee21aaf, 0xc1c12d7e, 0x4ed5e19a, 0xc1be4294,
-    0x4ec9a7f3, 0xc1bb5a11, 0x4ebd6db9, 0xc1b873f5,
-    0x4eb132ef, 0xc1b5903f, 0x4ea4f793, 0xc1b2aef0,
-    0x4e98bba7, 0xc1afd007, 0x4e8c7f2a, 0xc1acf386,
-    0x4e80421e, 0xc1aa196c, 0x4e740483, 0xc1a741b9,
-    0x4e67c65a, 0xc1a46c6e, 0x4e5b87a2, 0xc1a1998a,
-    0x4e4f485c, 0xc19ec90d, 0x4e430889, 0xc19bfaf9,
-    0x4e36c82a, 0xc1992f4c, 0x4e2a873e, 0xc1966606,
-    0x4e1e45c6, 0xc1939f29, 0x4e1203c3, 0xc190dab4,
-    0x4e05c135, 0xc18e18a7, 0x4df97e1d, 0xc18b5903,
-    0x4ded3a7b, 0xc1889bc6, 0x4de0f64f, 0xc185e0f3,
-    0x4dd4b19a, 0xc1832888, 0x4dc86c5d, 0xc1807285,
-    0x4dbc2698, 0xc17dbeec, 0x4dafe04b, 0xc17b0dbb,
-    0x4da39978, 0xc1785ef4, 0x4d97521d, 0xc175b296,
-    0x4d8b0a3d, 0xc17308a1, 0x4d7ec1d6, 0xc1706115,
-    0x4d7278eb, 0xc16dbbf3, 0x4d662f7b, 0xc16b193a,
-    0x4d59e586, 0xc16878eb, 0x4d4d9b0e, 0xc165db05,
-    0x4d415013, 0xc1633f8a, 0x4d350495, 0xc160a678,
-    0x4d28b894, 0xc15e0fd1, 0x4d1c6c11, 0xc15b7b94,
-    0x4d101f0e, 0xc158e9c1, 0x4d03d189, 0xc1565a58,
-    0x4cf78383, 0xc153cd5a, 0x4ceb34fe, 0xc15142c6,
-    0x4cdee5f9, 0xc14eba9d, 0x4cd29676, 0xc14c34df,
-    0x4cc64673, 0xc149b18b, 0x4cb9f5f3, 0xc14730a3,
-    0x4cada4f5, 0xc144b225, 0x4ca1537a, 0xc1423613,
-    0x4c950182, 0xc13fbc6c, 0x4c88af0e, 0xc13d4530,
-    0x4c7c5c1e, 0xc13ad060, 0x4c7008b3, 0xc1385dfb,
-    0x4c63b4ce, 0xc135ee02, 0x4c57606e, 0xc1338075,
-    0x4c4b0b94, 0xc1311553, 0x4c3eb641, 0xc12eac9d,
-    0x4c326075, 0xc12c4653, 0x4c260a31, 0xc129e276,
-    0x4c19b374, 0xc1278104, 0x4c0d5c41, 0xc12521ff,
-    0x4c010496, 0xc122c566, 0x4bf4ac75, 0xc1206b39,
-    0x4be853de, 0xc11e1379, 0x4bdbfad1, 0xc11bbe26,
-    0x4bcfa150, 0xc1196b3f, 0x4bc34759, 0xc1171ac6,
-    0x4bb6ecef, 0xc114ccb9, 0x4baa9211, 0xc1128119,
-    0x4b9e36c0, 0xc11037e6, 0x4b91dafc, 0xc10df120,
-    0x4b857ec7, 0xc10bacc8, 0x4b79221f, 0xc1096add,
-    0x4b6cc506, 0xc1072b5f, 0x4b60677c, 0xc104ee4f,
-    0x4b540982, 0xc102b3ac, 0x4b47ab19, 0xc1007b77,
-    0x4b3b4c40, 0xc0fe45b0, 0x4b2eecf8, 0xc0fc1257,
-    0x4b228d42, 0xc0f9e16b, 0x4b162d1d, 0xc0f7b2ee,
-    0x4b09cc8c, 0xc0f586df, 0x4afd6b8d, 0xc0f35d3e,
-    0x4af10a22, 0xc0f1360b, 0x4ae4a84b, 0xc0ef1147,
-    0x4ad84609, 0xc0eceef1, 0x4acbe35b, 0xc0eacf09,
-    0x4abf8043, 0xc0e8b190, 0x4ab31cc1, 0xc0e69686,
-    0x4aa6b8d5, 0xc0e47deb, 0x4a9a5480, 0xc0e267be,
-    0x4a8defc3, 0xc0e05401, 0x4a818a9d, 0xc0de42b2,
-    0x4a752510, 0xc0dc33d2, 0x4a68bf1b, 0xc0da2762,
-    0x4a5c58c0, 0xc0d81d61, 0x4a4ff1fe, 0xc0d615cf,
-    0x4a438ad7, 0xc0d410ad, 0x4a37234a, 0xc0d20dfa,
-    0x4a2abb59, 0xc0d00db6, 0x4a1e5303, 0xc0ce0fe3,
-    0x4a11ea49, 0xc0cc147f, 0x4a05812c, 0xc0ca1b8a,
-    0x49f917ac, 0xc0c82506, 0x49ecadc9, 0xc0c630f2,
-    0x49e04385, 0xc0c43f4d, 0x49d3d8df, 0xc0c25019,
-    0x49c76dd8, 0xc0c06355, 0x49bb0271, 0xc0be7901,
-    0x49ae96aa, 0xc0bc911d, 0x49a22a83, 0xc0baabaa,
-    0x4995bdfd, 0xc0b8c8a7, 0x49895118, 0xc0b6e815,
-    0x497ce3d5, 0xc0b509f3, 0x49707635, 0xc0b32e42,
-    0x49640837, 0xc0b15502, 0x495799dd, 0xc0af7e33,
-    0x494b2b27, 0xc0ada9d4, 0x493ebc14, 0xc0abd7e6,
-    0x49324ca7, 0xc0aa086a, 0x4925dcdf, 0xc0a83b5e,
-    0x49196cbc, 0xc0a670c4, 0x490cfc40, 0xc0a4a89b,
-    0x49008b6a, 0xc0a2e2e3, 0x48f41a3c, 0xc0a11f9d,
-    0x48e7a8b5, 0xc09f5ec8, 0x48db36d6, 0xc09da065,
-    0x48cec4a0, 0xc09be473, 0x48c25213, 0xc09a2af3,
-    0x48b5df30, 0xc09873e4, 0x48a96bf6, 0xc096bf48,
-    0x489cf867, 0xc0950d1d, 0x48908483, 0xc0935d64,
-    0x4884104b, 0xc091b01d, 0x48779bbe, 0xc0900548,
-    0x486b26de, 0xc08e5ce5, 0x485eb1ab, 0xc08cb6f5,
-    0x48523c25, 0xc08b1376, 0x4845c64d, 0xc089726a,
-    0x48395024, 0xc087d3d0, 0x482cd9a9, 0xc08637a9,
-    0x482062de, 0xc0849df4, 0x4813ebc2, 0xc08306b2,
-    0x48077457, 0xc08171e2, 0x47fafc9c, 0xc07fdf85,
-    0x47ee8493, 0xc07e4f9b, 0x47e20c3b, 0xc07cc223,
-    0x47d59396, 0xc07b371e, 0x47c91aa3, 0xc079ae8c,
-    0x47bca163, 0xc078286e, 0x47b027d7, 0xc076a4c2,
-    0x47a3adff, 0xc0752389, 0x479733dc, 0xc073a4c3,
-    0x478ab96e, 0xc0722871, 0x477e3eb5, 0xc070ae92,
-    0x4771c3b3, 0xc06f3726, 0x47654867, 0xc06dc22e,
-    0x4758ccd2, 0xc06c4fa8, 0x474c50f4, 0xc06adf97,
-    0x473fd4cf, 0xc06971f9, 0x47335862, 0xc06806ce,
-    0x4726dbae, 0xc0669e18, 0x471a5eb3, 0xc06537d4,
-    0x470de172, 0xc063d405, 0x470163eb, 0xc06272aa,
-    0x46f4e620, 0xc06113c2, 0x46e86810, 0xc05fb74e,
-    0x46dbe9bb, 0xc05e5d4e, 0x46cf6b23, 0xc05d05c3,
-    0x46c2ec48, 0xc05bb0ab, 0x46b66d29, 0xc05a5e07,
-    0x46a9edc9, 0xc0590dd8, 0x469d6e27, 0xc057c01d,
-    0x4690ee44, 0xc05674d6, 0x46846e1f, 0xc0552c03,
-    0x4677edbb, 0xc053e5a5, 0x466b6d16, 0xc052a1bb,
-    0x465eec33, 0xc0516045, 0x46526b10, 0xc0502145,
-    0x4645e9af, 0xc04ee4b8, 0x46396810, 0xc04daaa1,
-    0x462ce634, 0xc04c72fe, 0x4620641a, 0xc04b3dcf,
-    0x4613e1c5, 0xc04a0b16, 0x46075f33, 0xc048dad1,
-    0x45fadc66, 0xc047ad01, 0x45ee595d, 0xc04681a6,
-    0x45e1d61b, 0xc04558c0, 0x45d5529e, 0xc044324f,
-    0x45c8cee7, 0xc0430e53, 0x45bc4af8, 0xc041eccc,
-    0x45afc6d0, 0xc040cdba, 0x45a3426f, 0xc03fb11d,
-    0x4596bdd7, 0xc03e96f6, 0x458a3908, 0xc03d7f44,
-    0x457db403, 0xc03c6a07, 0x45712ec7, 0xc03b573f,
-    0x4564a955, 0xc03a46ed, 0x455823ae, 0xc0393910,
-    0x454b9dd3, 0xc0382da8, 0x453f17c3, 0xc03724b6,
-    0x4532917f, 0xc0361e3a, 0x45260b08, 0xc0351a33,
-    0x4519845e, 0xc03418a2, 0x450cfd82, 0xc0331986,
-    0x45007674, 0xc0321ce0, 0x44f3ef35, 0xc03122b0,
-    0x44e767c5, 0xc0302af5, 0x44dae024, 0xc02f35b1,
-    0x44ce5854, 0xc02e42e2, 0x44c1d054, 0xc02d5289,
-    0x44b54825, 0xc02c64a6, 0x44a8bfc7, 0xc02b7939,
-    0x449c373c, 0xc02a9042, 0x448fae83, 0xc029a9c1,
-    0x4483259d, 0xc028c5b6, 0x44769c8b, 0xc027e421,
-    0x446a134c, 0xc0270502, 0x445d89e2, 0xc0262859,
-    0x4451004d, 0xc0254e27, 0x4444768d, 0xc024766a,
-    0x4437eca4, 0xc023a124, 0x442b6290, 0xc022ce54,
-    0x441ed854, 0xc021fdfb, 0x44124dee, 0xc0213018,
-    0x4405c361, 0xc02064ab, 0x43f938ac, 0xc01f9bb5,
-    0x43ecadcf, 0xc01ed535, 0x43e022cc, 0xc01e112b,
-    0x43d397a3, 0xc01d4f99, 0x43c70c54, 0xc01c907c,
-    0x43ba80df, 0xc01bd3d6, 0x43adf546, 0xc01b19a7,
-    0x43a16988, 0xc01a61ee, 0x4394dda7, 0xc019acac,
-    0x438851a2, 0xc018f9e1, 0x437bc57b, 0xc018498c,
-    0x436f3931, 0xc0179bae, 0x4362acc5, 0xc016f047,
-    0x43562038, 0xc0164757, 0x43499389, 0xc015a0dd,
-    0x433d06bb, 0xc014fcda, 0x433079cc, 0xc0145b4e,
-    0x4323ecbe, 0xc013bc39, 0x43175f91, 0xc0131f9b,
-    0x430ad245, 0xc0128574, 0x42fe44dc, 0xc011edc3,
-    0x42f1b755, 0xc011588a, 0x42e529b0, 0xc010c5c7,
-    0x42d89bf0, 0xc010357c, 0x42cc0e13, 0xc00fa7a8,
-    0x42bf801a, 0xc00f1c4a, 0x42b2f207, 0xc00e9364,
-    0x42a663d8, 0xc00e0cf5, 0x4299d590, 0xc00d88fd,
-    0x428d472e, 0xc00d077c, 0x4280b8b3, 0xc00c8872,
-    0x42742a1f, 0xc00c0be0, 0x42679b73, 0xc00b91c4,
-    0x425b0caf, 0xc00b1a20, 0x424e7dd4, 0xc00aa4f3,
-    0x4241eee2, 0xc00a323d, 0x42355fd9, 0xc009c1ff,
-    0x4228d0bb, 0xc0095438, 0x421c4188, 0xc008e8e8,
-    0x420fb240, 0xc008800f, 0x420322e3, 0xc00819ae,
-    0x41f69373, 0xc007b5c4, 0x41ea03ef, 0xc0075452,
-    0x41dd7459, 0xc006f556, 0x41d0e4b0, 0xc00698d3,
-    0x41c454f5, 0xc0063ec6, 0x41b7c528, 0xc005e731,
-    0x41ab354b, 0xc0059214, 0x419ea55d, 0xc0053f6e,
-    0x4192155f, 0xc004ef3f, 0x41858552, 0xc004a188,
-    0x4178f536, 0xc0045648, 0x416c650b, 0xc0040d80,
-    0x415fd4d2, 0xc003c72f, 0x4153448c, 0xc0038356,
-    0x4146b438, 0xc00341f4, 0x413a23d8, 0xc003030a,
-    0x412d936c, 0xc002c697, 0x412102f4, 0xc0028c9c,
-    0x41147271, 0xc0025519, 0x4107e1e3, 0xc002200d,
-    0x40fb514b, 0xc001ed78, 0x40eec0aa, 0xc001bd5c,
-    0x40e22fff, 0xc0018fb6, 0x40d59f4c, 0xc0016489,
-    0x40c90e90, 0xc0013bd3, 0x40bc7dcc, 0xc0011594,
-    0x40afed02, 0xc000f1ce, 0x40a35c30, 0xc000d07e,
-    0x4096cb58, 0xc000b1a7, 0x408a3a7b, 0xc0009547,
-    0x407da998, 0xc0007b5f, 0x407118b0, 0xc00063ee,
-    0x406487c4, 0xc0004ef5, 0x4057f6d4, 0xc0003c74,
-    0x404b65e1, 0xc0002c6a, 0x403ed4ea, 0xc0001ed8,
-    0x403243f1, 0xc00013bd, 0x4025b2f7, 0xc0000b1a,
-    0x401921fb, 0xc00004ef, 0x400c90fe, 0xc000013c,
-};
-
-/**    
-* @brief  Initialization function for the Q31 RFFT/RIFFT.   
-* @param[in, out] *S             points to an instance of the Q31 RFFT/RIFFT structure.   
-* @param[in]      fftLenReal     length of the FFT.   
-* @param[in]      ifftFlagR      flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform.   
-* @param[in]      bitReverseFlag flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output.   
-* @return		The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported value.   
-*    
-* \par Description:   
-* \par   
-* The parameter fftLenReal	Specifies length of RFFT/RIFFT Process. Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.    
-* \par    
-* The parameter ifftFlagR controls whether a forward or inverse transform is computed.    
-* Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.    
-* \par    
-* The parameter bitReverseFlag controls whether output is in normal order or bit reversed order.    
-* Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.   
-* \par    7
-* This function also initializes Twiddle factor table.    
-*/
-
-arm_status arm_rfft_init_q31(
-    arm_rfft_instance_q31 * S,
-    uint32_t fftLenReal,
-    uint32_t ifftFlagR,
-    uint32_t bitReverseFlag)
-{
-    /*  Initialise the default arm status */
-    arm_status status = ARM_MATH_SUCCESS;
-
-    /*  Initialize the Real FFT length */
-    S->fftLenReal = (uint16_t) fftLenReal;
-
-    /*  Initialize the Twiddle coefficientA pointer */
-    S->pTwiddleAReal = (q31_t *) realCoefAQ31;
-
-    /*  Initialize the Twiddle coefficientB pointer */
-    S->pTwiddleBReal = (q31_t *) realCoefBQ31;
-
-    /*  Initialize the Flag for selection of RFFT or RIFFT */
-    S->ifftFlagR = (uint8_t) ifftFlagR;
-
-    /*  Initialize the Flag for calculation Bit reversal or not */
-    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-    /*  Initialization of coef modifier depending on the FFT length */
-    switch (S->fftLenReal)
-    {
-    case 8192u:
-        S->twidCoefRModifier = 1u;
-        S->pCfft = &arm_cfft_sR_q31_len4096;
-        break;
-    case 4096u:
-        S->twidCoefRModifier = 2u;
-        S->pCfft = &arm_cfft_sR_q31_len2048;
-        break;
-    case 2048u:
-        S->twidCoefRModifier = 4u;
-        S->pCfft = &arm_cfft_sR_q31_len1024;
-        break;
-    case 1024u:
-        S->twidCoefRModifier = 8u;
-        S->pCfft = &arm_cfft_sR_q31_len512;
-        break;
-    case 512u:
-        S->twidCoefRModifier = 16u;
-        S->pCfft = &arm_cfft_sR_q31_len256;
-        break;
-    case 256u:
-        S->twidCoefRModifier = 32u;
-        S->pCfft = &arm_cfft_sR_q31_len128;
-        break;
-    case 128u:
-        S->twidCoefRModifier = 64u;
-        S->pCfft = &arm_cfft_sR_q31_len64;
-        break;
-    case 64u:
-        S->twidCoefRModifier = 128u;
-        S->pCfft = &arm_cfft_sR_q31_len32;
-        break;
-    case 32u:
-        S->twidCoefRModifier = 256u;
-        S->pCfft = &arm_cfft_sR_q31_len16;
-        break;
-    default:
-        /*  Reporting argument error if rfftSize is not valid value */
-        status = ARM_MATH_ARGUMENT_ERROR;
-        break;
-    }
-
-    /* return the status of RFFT Init function */
-    return (status);
-}
-
-/**    
-* @} end of RealFFT group    
-*/
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c
deleted file mode 100644
index 8d2e9184..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q15.c
+++ /dev/null
@@ -1,439 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_q15.c    
-*    
-* Description:	RFFT & RIFFT Q15 process function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.     
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------    
-*		Internal functions prototypes    
---------------------------------------------------------------------*/
-
-void arm_split_rfft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier);
-
-void arm_split_rifft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier);
-
-/**    
-* @addtogroup RealFFT    
-* @{    
-*/
-
-/**    
-* @brief Processing function for the Q15 RFFT/RIFFT.   
-* @param[in]  *S    points to an instance of the Q15 RFFT/RIFFT structure.   
-* @param[in]  *pSrc points to the input buffer.   
-* @param[out] *pDst points to the output buffer.   
-* @return none.   
-*    
-* \par Input an output formats:   
-* \par    
-* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.    
-* Hence the output format is different for different RFFT sizes.    
-* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:   
-* \par    
-* \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"    
-* \par    
-* \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"    
-*/
-
-void arm_rfft_q15(
-    const arm_rfft_instance_q15 * S,
-    q15_t * pSrc,
-    q15_t * pDst)
-{
-    const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
-    uint32_t i;
-    uint32_t L2 = S->fftLenReal >> 1;
-
-    /* Calculation of RIFFT of input */
-    if(S->ifftFlagR == 1u)
-    {
-        /*  Real IFFT core process */
-        arm_split_rifft_q15(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-        
-        /* Complex IFFT process */
-        arm_cfft_q15(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
-        
-        for(i=0;ifftLenReal;i++)
-        {
-            pDst[i] = pDst[i] << 1;
-        }
-    }
-    else
-    {
-        /* Calculation of RFFT of input */
-        
-        /* Complex FFT process */
-        arm_cfft_q15(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
-
-        /*  Real FFT core process */
-        arm_split_rfft_q15(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-    }
-}
-
-/**    
-* @} end of RealFFT group    
-*/
-
-/**    
-* @brief  Core Real FFT process    
-* @param  *pSrc 				points to the input buffer.   
-* @param  fftLen  				length of FFT.   
-* @param  *pATable 			points to the A twiddle Coef buffer.    
-* @param  *pBTable 			points to the B twiddle Coef buffer.   
-* @param  *pDst 				points to the output buffer.   
-* @param  modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.    
-* The function implements a Real FFT    
-*/
-
-void arm_split_rfft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier)
-{
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q15_t *pSrc1, *pSrc2;
-#ifndef ARM_MATH_CM0_FAMILY
-    q15_t *pD1, *pD2;
-#endif
-
-    //  pSrc[2u * fftLen] = pSrc[0]; 
-    //  pSrc[(2u * fftLen) + 1u] = pSrc[1]; 
-
-    pCoefA = &pATable[modifier * 2u];
-    pCoefB = &pBTable[modifier * 2u];
-
-    pSrc1 = &pSrc[2];
-    pSrc2 = &pSrc[(2u * fftLen) - 2u];
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    i = 1u;
-    pD1 = pDst + 2;
-    pD2 = pDst + (4u * fftLen) - 2;
-
-    for(i = fftLen - 1; i > 0; i--)
-    {
-        /*    
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-        */
-
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-        outR = __SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA));
-
-#else
-
-        /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
-        outR = -(__SMUSD(*__SIMD32(pSrc1), *__SIMD32(pCoefA)));
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-        outR = __SMLAD(*__SIMD32(pSrc2), *__SIMD32(pCoefB), outR) >> 16u;
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        outI = __SMUSDX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
-#else
-
-        outI = __SMUSDX(*__SIMD32(pCoefB), *__SIMD32(pSrc2)--);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
-        outI = __SMLADX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), outI);
-
-        /* write output */
-        *pD1++ = (q15_t) outR;
-        *pD1++ = outI >> 16u;
-
-        /* write complex conjugate output */
-        pD2[0] = (q15_t) outR;
-        pD2[1] = -(outI >> 16u);
-        pD2 -= 2;
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2u * modifier);
-        pCoefA = pCoefA + (2u * modifier);
-    }
-
-    pDst[2u * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2u * fftLen) + 1u] = 0;
-
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
-    pDst[1] = 0;
-
-#else
-
-    /* Run the below code for Cortex-M0 */
-    i = 1u;
-
-    while(i < fftLen)
-    {
-        /*    
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-        */
-
-        outR = *pSrc1 * *pCoefA;
-        outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
-        outR = outR + (*pSrc2 * *pCoefB);
-        outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;
-
-
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);   
-        */
-
-        outI = *pSrc2 * *(pCoefB + 1);
-        outI = outI - (*(pSrc2 + 1) * *pCoefB);
-        outI = outI + (*(pSrc1 + 1) * *pCoefA);
-        outI = outI + (*pSrc1 * *(pCoefA + 1));
-
-        /* update input pointers */
-        pSrc1 += 2u;
-        pSrc2 -= 2u;
-
-        /* write output */
-        pDst[2u * i] = (q15_t) outR;
-        pDst[(2u * i) + 1u] = outI >> 16u;
-
-        /* write complex conjugate output */
-        pDst[(4u * fftLen) - (2u * i)] = (q15_t) outR;
-        pDst[((4u * fftLen) - (2u * i)) + 1u] = -(outI >> 16u);
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2u * modifier);
-        pCoefA = pCoefA + (2u * modifier);
-
-        i++;
-    }
-
-    pDst[2u * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2u * fftLen) + 1u] = 0;
-
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
-    pDst[1] = 0;
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-}
-
-
-/**    
-* @brief  Core Real IFFT process    
-* @param[in]   *pSrc 				points to the input buffer.    
-* @param[in]   fftLen  		    length of FFT.   
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.   
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
-* @param[out]  *pDst 				points to the output buffer.   
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.    
-* The function implements a Real IFFT    
-*/
-void arm_split_rifft_q15(
-    q15_t * pSrc,
-    uint32_t fftLen,
-    q15_t * pATable,
-    q15_t * pBTable,
-    q15_t * pDst,
-    uint32_t modifier)
-{
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q15_t *pSrc1, *pSrc2;
-    q15_t *pDst1 = &pDst[0];
-
-    pCoefA = &pATable[0];
-    pCoefB = &pBTable[0];
-
-    pSrc1 = &pSrc[0];
-    pSrc2 = &pSrc[2u * fftLen];
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-    /* Run the below code for Cortex-M4 and Cortex-M3 */
-    i = fftLen;
-
-    while(i > 0u)
-    {
-        /*    
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);    
-        */
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-        outR = __SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB));
-
-#else
-
-        /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] +  
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
-        outR = -(__SMUSD(*__SIMD32(pSrc2), *__SIMD32(pCoefB)));
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i] */
-        outR = __SMLAD(*__SIMD32(pSrc1), *__SIMD32(pCoefA), outR) >> 16u;
-
-        /*    
-        -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] +    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        outI = __SMUADX(*__SIMD32(pSrc2)--, *__SIMD32(pCoefB));
-
-        /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        outI = __SMLSDX(*__SIMD32(pCoefA), *__SIMD32(pSrc1)++, -outI);
-
-#else
-
-        outI = __SMLSDX(*__SIMD32(pSrc1)++, *__SIMD32(pCoefA), -outI);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-        /* write output */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-        *__SIMD32(pDst1)++ = __PKHBT(outR, (outI >> 16u), 16);
-
-#else
-
-        *__SIMD32(pDst1)++ = __PKHBT((outI >> 16u), outR, 16);
-
-#endif /*      #ifndef ARM_MATH_BIG_ENDIAN     */
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2u * modifier);
-        pCoefA = pCoefA + (2u * modifier);
-
-        i--;
-    }
-#else
-    /* Run the below code for Cortex-M0 */
-    i = fftLen;
-
-    while(i > 0u)
-    {
-        /*    
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-        */
-
-        outR = *pSrc2 * *pCoefB;
-        outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
-        outR = outR + (*pSrc1 * *pCoefA);
-        outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
-
-        /*   
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -   
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -   
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);   
-        */
-
-        outI = *(pSrc1 + 1) * *pCoefA;
-        outI = outI - (*pSrc1 * *(pCoefA + 1));
-        outI = outI - (*pSrc2 * *(pCoefB + 1));
-        outI = outI - (*(pSrc2 + 1) * *(pCoefB));
-
-        /* update input pointers */
-        pSrc1 += 2u;
-        pSrc2 -= 2u;
-
-        /* write output */
-        *pDst1++ = (q15_t) outR;
-        *pDst1++ = (q15_t) (outI >> 16);
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2u * modifier);
-        pCoefA = pCoefA + (2u * modifier);
-
-        i--;
-    }
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-}
diff --git a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c b/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c
deleted file mode 100644
index 2f1cd0a7..00000000
--- a/Libraries/CMSIS/DSP_Lib/Source/TransformFunctions/arm_rfft_q31.c
+++ /dev/null
@@ -1,296 +0,0 @@
-/* ----------------------------------------------------------------------    
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.    
-*    
-* $Date:        19. March 2015 
-* $Revision: 	V.1.4.5  
-*    
-* Project: 	    CMSIS DSP Library    
-* Title:	    arm_rfft_q31.c    
-*    
-* Description:	RFFT & RIFFT Q31 process function    
-*    
-*    
-* Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
-*  
-* Redistribution and use in source and binary forms, with or without 
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the 
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.    
-* -------------------------------------------------------------------- */
-
-#include "arm_math.h"
-
-/*--------------------------------------------------------------------    
-*		Internal functions prototypes    
---------------------------------------------------------------------*/
-
-void arm_split_rfft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier);
-
-void arm_split_rifft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier);
-
-/**    
-* @addtogroup RealFFT    
-* @{    
-*/
-
-/**    
-* @brief Processing function for the Q31 RFFT/RIFFT.   
-* @param[in]  *S    points to an instance of the Q31 RFFT/RIFFT structure.   
-* @param[in]  *pSrc points to the input buffer.   
-* @param[out] *pDst points to the output buffer.   
-* @return none.   
-*    
-* \par Input an output formats:   
-* \par    
-* Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.   
-* Hence the output format is different for different RFFT sizes.    
-* The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:   
-* \par    
-* \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"    
-*    
-* \par    
-* \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"    
-*/
-void arm_rfft_q31(
-    const arm_rfft_instance_q31 * S,
-    q31_t * pSrc,
-    q31_t * pDst)
-{
-    const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
-    uint32_t i;
-    uint32_t L2 = S->fftLenReal >> 1;
-
-    /* Calculation of RIFFT of input */
-    if(S->ifftFlagR == 1u)
-    {
-        /*  Real IFFT core process */
-        arm_split_rifft_q31(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-        
-        /* Complex IFFT process */
-        arm_cfft_q31(S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
-        
-        for(i=0;ifftLenReal;i++)
-        {
-            pDst[i] = pDst[i] << 1;
-        }
-    }
-    else
-    {
-        /* Calculation of RFFT of input */
-        
-        /* Complex FFT process */
-        arm_cfft_q31(S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
-
-        /*  Real FFT core process */
-        arm_split_rfft_q31(pSrc, L2, S->pTwiddleAReal,
-                            S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-    }
-}
-
-/**    
-* @} end of RealFFT group    
-*/
-
-/**    
-* @brief  Core Real FFT process    
-* @param[in]   *pSrc 				points to the input buffer.    
-* @param[in]   fftLen  			    length of FFT.   
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.    
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
-* @param[out]  *pDst 				points to the output buffer.    
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.    
-*/
-void arm_split_rfft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier)
-{
-    uint32_t i;                                    /* Loop Counter */
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-    q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[(4u * fftLen) - 1u];
-    q31_t *pIn1 = &pSrc[2], *pIn2 = &pSrc[(2u * fftLen) - 1u];
-
-    /* Init coefficient pointers */
-    pCoefA = &pATable[modifier * 2u];
-    pCoefB = &pBTable[modifier * 2u];
-
-    i = fftLen - 1u;
-
-    while(i > 0u)
-    {
-        /*    
-        outR = (pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1]    
-        + pSrc[2 * n - 2 * i] * pBTable[2 * i] +    
-        pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-        */
-
-        /* outI = (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]); */
-
-        CoefA1 = *pCoefA++;
-        CoefA2 = *pCoefA;
-
-        /* outR = (pSrc[2 * i] * pATable[2 * i] */    
-        mult_32x32_keep32_R(outR, *pIn1, CoefA1);
-
-        /* outI = pIn[2 * i] * pATable[2 * i + 1] */
-        mult_32x32_keep32_R(outI, *pIn1++, CoefA2);
-
-        /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-        multSub_32x32_keep32_R(outR, *pIn1, CoefA2);
-
-        /* (pIn[2 * i + 1] * pATable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);
-
-        /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
-        multSub_32x32_keep32_R(outR, *pIn2, CoefA2);
-        CoefB1 = *pCoefB;
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);
-
-        /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);
-
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefA2);
-
-        /* write output */
-        *pOut1++ = outR;
-        *pOut1++ = outI;
-
-        /* write complex conjugate output */
-        *pOut2-- = -outI;
-        *pOut2-- = outR;
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (modifier * 2u);
-        pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-        i--;
-    }
-    pDst[2u * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[(2u * fftLen) + 1u] = 0;
-
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
-    pDst[1] = 0;
-}
-
-/**    
-* @brief  Core Real IFFT process    
-* @param[in]   *pSrc 				points to the input buffer.   
-* @param[in]   fftLen  			    length of FFT.    
-* @param[in]   *pATable 			points to the twiddle Coef A buffer.   
-* @param[in]   *pBTable 			points to the twiddle Coef B buffer.    
-* @param[out]  *pDst 				points to the output buffer.   
-* @param[in]   modifier 	        twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.   
-* @return none.    
-*/
-void arm_split_rifft_q31(
-    q31_t * pSrc,
-    uint32_t fftLen,
-    q31_t * pATable,
-    q31_t * pBTable,
-    q31_t * pDst,
-    uint32_t modifier)
-{
-    q31_t outR, outI;                              /* Temporary variables for output */
-    q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-    q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-    q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[(2u * fftLen) + 1u];
-
-    pCoefA = &pATable[0];
-    pCoefB = &pBTable[0];
-
-    while(fftLen > 0u)
-    {
-        /*    
-        outR = (pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] +    
-        pIn[2 * n - 2 * i] * pBTable[2 * i] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);    
-
-        outI = (pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] -    
-        pIn[2 * n - 2 * i] * pBTable[2 * i + 1] -    
-        pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);   
-        */
-        CoefA1 = *pCoefA++;
-        CoefA2 = *pCoefA;
-
-        /* outR = (pIn[2 * i] * pATable[2 * i] */
-        mult_32x32_keep32_R(outR, *pIn1, CoefA1);
-
-        /* - pIn[2 * i] * pATable[2 * i + 1] */
-        mult_32x32_keep32_R(outI, *pIn1++, -CoefA2);
-        
-        /* pIn[2 * i + 1] * pATable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn1, CoefA2);
-
-        /* pIn[2 * i + 1] * pATable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn1++, CoefA1);
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefA2);
-        CoefB1 = *pCoefB;
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-        multSub_32x32_keep32_R(outI, *pIn2--, CoefB1);
-
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-        multAcc_32x32_keep32_R(outR, *pIn2, CoefB1);
-
-        /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-        multAcc_32x32_keep32_R(outI, *pIn2--, CoefA2);
-
-        /* write output */
-        *pDst++ = outR;
-        *pDst++ = outI;
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (modifier * 2u);
-        pCoefA = pCoefA + ((modifier * 2u) - 1u);
-
-        /* Decrement loop count */
-        fftLen--;
-    }
-}
diff --git a/Libraries/CMSIS/DSP_Lib/license.txt b/Libraries/CMSIS/DSP_Lib/license.txt
deleted file mode 100644
index bb4a58f3..00000000
--- a/Libraries/CMSIS/DSP_Lib/license.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-All files contained in the folders "CMSIS\DSP-Lib\Source" and "CMSIS\DSP-Lib\Examples"
-are guided by the following license:
-
-Copyright (C) 2009-2015 ARM Limited. 
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
- - Redistributions of source code must retain the above copyright
-   notice, this list of conditions and the following disclaimer.
- - Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
- - Neither the name of ARM nor the names of its contributors may be used 
-   to endorse or promote products derived from this software without 
-   specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
diff --git a/Libraries/CMSIS/Include/arm_common_tables.h b/Libraries/CMSIS/Include/arm_common_tables.h
deleted file mode 100644
index 911ecd49..00000000
--- a/Libraries/CMSIS/Include/arm_common_tables.h
+++ /dev/null
@@ -1,136 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_common_tables.h
-*
-* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
-*
-* Target Processor: Cortex-M4/Cortex-M3
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#ifndef _ARM_COMMON_TABLES_H
-#define _ARM_COMMON_TABLES_H
-
-#include "arm_math.h"
-
-extern const uint16_t armBitRevTable[1024];
-extern const q15_t armRecipTableQ15[64];
-extern const q31_t armRecipTableQ31[64];
-//extern const q31_t realCoefAQ31[1024];
-//extern const q31_t realCoefBQ31[1024];
-extern const float32_t twiddleCoef_16[32];
-extern const float32_t twiddleCoef_32[64];
-extern const float32_t twiddleCoef_64[128];
-extern const float32_t twiddleCoef_128[256];
-extern const float32_t twiddleCoef_256[512];
-extern const float32_t twiddleCoef_512[1024];
-extern const float32_t twiddleCoef_1024[2048];
-extern const float32_t twiddleCoef_2048[4096];
-extern const float32_t twiddleCoef_4096[8192];
-#define twiddleCoef twiddleCoef_4096
-extern const q31_t twiddleCoef_16_q31[24];
-extern const q31_t twiddleCoef_32_q31[48];
-extern const q31_t twiddleCoef_64_q31[96];
-extern const q31_t twiddleCoef_128_q31[192];
-extern const q31_t twiddleCoef_256_q31[384];
-extern const q31_t twiddleCoef_512_q31[768];
-extern const q31_t twiddleCoef_1024_q31[1536];
-extern const q31_t twiddleCoef_2048_q31[3072];
-extern const q31_t twiddleCoef_4096_q31[6144];
-extern const q15_t twiddleCoef_16_q15[24];
-extern const q15_t twiddleCoef_32_q15[48];
-extern const q15_t twiddleCoef_64_q15[96];
-extern const q15_t twiddleCoef_128_q15[192];
-extern const q15_t twiddleCoef_256_q15[384];
-extern const q15_t twiddleCoef_512_q15[768];
-extern const q15_t twiddleCoef_1024_q15[1536];
-extern const q15_t twiddleCoef_2048_q15[3072];
-extern const q15_t twiddleCoef_4096_q15[6144];
-extern const float32_t twiddleCoef_rfft_32[32];
-extern const float32_t twiddleCoef_rfft_64[64];
-extern const float32_t twiddleCoef_rfft_128[128];
-extern const float32_t twiddleCoef_rfft_256[256];
-extern const float32_t twiddleCoef_rfft_512[512];
-extern const float32_t twiddleCoef_rfft_1024[1024];
-extern const float32_t twiddleCoef_rfft_2048[2048];
-extern const float32_t twiddleCoef_rfft_4096[4096];
-
-
-/* floating-point bit reversal tables */
-#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
-#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
-#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
-#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
-#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
-#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
-#define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
-#define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
-#define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
-
-extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE__16_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE__32_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE__64_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE1024_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
-
-/* fixed-point bit reversal tables */
-#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12  )
-#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24  )
-#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56  )
-#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
-#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
-#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
-#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
-#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
-#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
-
-extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
-extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
-
-/* Tables for Fast Math Sine and Cosine */
-extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
-extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
-extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
-
-#endif /*  ARM_COMMON_TABLES_H */
diff --git a/Libraries/CMSIS/Include/arm_const_structs.h b/Libraries/CMSIS/Include/arm_const_structs.h
deleted file mode 100644
index 54595f55..00000000
--- a/Libraries/CMSIS/Include/arm_const_structs.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2014 ARM Limited. All rights reserved.
-*
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_const_structs.h
-*
-* Description:	This file has constant structs that are initialized for
-*              user convenience.  For example, some can be given as
-*              arguments to the arm_cfft_f32() function.
-*
-* Target Processor: Cortex-M4/Cortex-M3
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
-* -------------------------------------------------------------------- */
-
-#ifndef _ARM_CONST_STRUCTS_H
-#define _ARM_CONST_STRUCTS_H
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
-
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
-
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
-
-#endif
diff --git a/Libraries/CMSIS/Include/arm_math.h b/Libraries/CMSIS/Include/arm_math.h
deleted file mode 100644
index 6dd430dd..00000000
--- a/Libraries/CMSIS/Include/arm_math.h
+++ /dev/null
@@ -1,7556 +0,0 @@
-/* ----------------------------------------------------------------------
-* Copyright (C) 2010-2015 ARM Limited. All rights reserved.
-*
-* $Date:        19. March 2015
-* $Revision: 	V.1.4.5
-*
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_math.h
-*
-* Description:	Public header file for CMSIS DSP Library
-*
-* Target Processor: Cortex-M7/Cortex-M4/Cortex-M3/Cortex-M0
-*
-* Redistribution and use in source and binary forms, with or without
-* modification, are permitted provided that the following conditions
-* are met:
-*   - Redistributions of source code must retain the above copyright
-*     notice, this list of conditions and the following disclaimer.
-*   - Redistributions in binary form must reproduce the above copyright
-*     notice, this list of conditions and the following disclaimer in
-*     the documentation and/or other materials provided with the
-*     distribution.
-*   - Neither the name of ARM LIMITED nor the names of its contributors
-*     may be used to endorse or promote products derived from this
-*     software without specific prior written permission.
-*
-* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
-* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
-* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
-* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
-* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
-* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-* POSSIBILITY OF SUCH DAMAGE.
- * -------------------------------------------------------------------- */
-
-/**
-   \mainpage CMSIS DSP Software Library
-   *
-   * Introduction
-   * ------------
-   *
-   * This user manual describes the CMSIS DSP software library,
-   * a suite of common signal processing functions for use on Cortex-M processor based devices.
-   *
-   * The library is divided into a number of functions each covering a specific category:
-   * - Basic math functions
-   * - Fast math functions
-   * - Complex math functions
-   * - Filters
-   * - Matrix functions
-   * - Transforms
-   * - Motor control functions
-   * - Statistical functions
-   * - Support functions
-   * - Interpolation functions
-   *
-   * The library has separate functions for operating on 8-bit integers, 16-bit integers,
-   * 32-bit integer and 32-bit floating-point values.
-   *
-   * Using the Library
-   * ------------
-   *
-   * The library installer contains prebuilt versions of the libraries in the Lib folder.
-   * - arm_cortexM7lfdp_math.lib (Little endian and Double Precision Floating Point Unit on Cortex-M7)
-   * - arm_cortexM7bfdp_math.lib (Big endian and Double Precision Floating Point Unit on Cortex-M7)
-   * - arm_cortexM7lfsp_math.lib (Little endian and Single Precision Floating Point Unit on Cortex-M7)
-   * - arm_cortexM7bfsp_math.lib (Big endian and Single Precision Floating Point Unit on Cortex-M7)
-   * - arm_cortexM7l_math.lib (Little endian on Cortex-M7)
-   * - arm_cortexM7b_math.lib (Big endian on Cortex-M7)
-   * - arm_cortexM4lf_math.lib (Little endian and Floating Point Unit on Cortex-M4)
-   * - arm_cortexM4bf_math.lib (Big endian and Floating Point Unit on Cortex-M4)
-   * - arm_cortexM4l_math.lib (Little endian on Cortex-M4)
-   * - arm_cortexM4b_math.lib (Big endian on Cortex-M4)
-   * - arm_cortexM3l_math.lib (Little endian on Cortex-M3)
-   * - arm_cortexM3b_math.lib (Big endian on Cortex-M3)
-   * - arm_cortexM0l_math.lib (Little endian on Cortex-M0 / CortexM0+)
-   * - arm_cortexM0b_math.lib (Big endian on Cortex-M0 / CortexM0+)
-   *
-   * The library functions are declared in the public file arm_math.h which is placed in the Include folder.
-   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
-   * public header file  arm_math.h for Cortex-M7/M4/M3/M0/M0+ with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
-   * Define the appropriate pre processor MACRO ARM_MATH_CM7 or ARM_MATH_CM4 or  ARM_MATH_CM3 or
-   * ARM_MATH_CM0 or ARM_MATH_CM0PLUS depending on the target processor in the application.
-   *
-   * Examples
-   * --------
-   *
-   * The library ships with a number of examples which demonstrate how to use the library functions.
-   *
-   * Toolchain Support
-   * ------------
-   *
-   * The library has been developed and tested with MDK-ARM version 5.14.0.0
-   * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
-   *
-   * Building the Library
-   * ------------
-   *
-   * The library installer contains a project file to re build libraries on MDK-ARM Tool chain in the CMSIS\\DSP_Lib\\Source\\ARM folder.
-   * - arm_cortexM_math.uvprojx
-   *
-   *
-   * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional pre processor MACROs detailed above.
-   *
-   * Pre-processor Macros
-   * ------------
-   *
-   * Each library project have differant pre-processor macros.
-   *
-   * - UNALIGNED_SUPPORT_DISABLE:
-   *
-   * Define macro UNALIGNED_SUPPORT_DISABLE, If the silicon does not support unaligned memory access
-   *
-   * - ARM_MATH_BIG_ENDIAN:
-   *
-   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
-   *
-   * - ARM_MATH_MATRIX_CHECK:
-   *
-   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
-   *
-   * - ARM_MATH_ROUNDING:
-   *
-   * Define macro ARM_MATH_ROUNDING for rounding on support functions
-   *
-   * - ARM_MATH_CMx:
-   *
-   * Define macro ARM_MATH_CM4 for building the library on Cortex-M4 target, ARM_MATH_CM3 for building library on Cortex-M3 target
-   * and ARM_MATH_CM0 for building library on Cortex-M0 target, ARM_MATH_CM0PLUS for building library on Cortex-M0+ target, and
-   * ARM_MATH_CM7 for building the library on cortex-M7.
-   *
-   * - __FPU_PRESENT:
-   *
-   * Initialize macro __FPU_PRESENT = 1 when building on FPU supported Targets. Enable this macro for M4bf and M4lf libraries
-   *
-   * 

-   * CMSIS-DSP in ARM::CMSIS Pack
-   * -----------------------------
-   * 
-   * The following files relevant to CMSIS-DSP are present in the ARM::CMSIS Pack directories:
-   * |File/Folder                   |Content                                                                 |
-   * |------------------------------|------------------------------------------------------------------------|
-   * |\b CMSIS\\Documentation\\DSP  | This documentation                                                     |
-   * |\b CMSIS\\DSP_Lib             | Software license agreement (license.txt)                               |
-   * |\b CMSIS\\DSP_Lib\\Examples   | Example projects demonstrating the usage of the library functions      |
-   * |\b CMSIS\\DSP_Lib\\Source     | Source files for rebuilding the library                                |
-   * 
-   * 

-   * Revision History of CMSIS-DSP
-   * ------------
-   * Please refer to \ref ChangeLog_pg.
-   *
-   * Copyright Notice
-   * ------------
-   *
-   * Copyright (C) 2010-2015 ARM Limited. All rights reserved.
-   */
-
-
-/**
- * @defgroup groupMath Basic Math Functions
- */
-
-/**
- * @defgroup groupFastMath Fast Math Functions
- * This set of functions provides a fast approximation to sine, cosine, and square root.
- * As compared to most of the other functions in the CMSIS math library, the fast math functions
- * operate on individual values and not arrays.
- * There are separate functions for Q15, Q31, and floating-point data.
- *
- */
-
-/**
- * @defgroup groupCmplxMath Complex Math Functions
- * This set of functions operates on complex data vectors.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * In the API functions, the number of samples in a complex array refers
- * to the number of complex values; the array contains twice this number of
- * real values.
- */
-
-/**
- * @defgroup groupFilters Filtering Functions
- */
-
-/**
- * @defgroup groupMatrix Matrix Functions
- *
- * This set of functions provides basic matrix math operations.
- * The functions operate on matrix data structures.  For example,
- * the type
- * definition for the floating-point matrix structure is shown
- * below:
- * 
- *     typedef struct
- *     {
- *       uint16_t numRows;     // number of rows of the matrix.
- *       uint16_t numCols;     // number of columns of the matrix.
- *       float32_t *pData;     // points to the data of the matrix.
- *     } arm_matrix_instance_f32;
- * 

- * There are similar definitions for Q15 and Q31 data types.
- *
- * The structure specifies the size of the matrix and then points to
- * an array of data.  The array is of size numRows X numCols
- * and the values are arranged in row order.  That is, the
- * matrix element (i, j) is stored at:
- * 
- *     pData[i*numCols + j]
- * 

- *
- * \par Init Functions
- * There is an associated initialization function for each type of matrix
- * data structure.
- * The initialization function sets the values of the internal structure fields.
- * Refer to the function arm_mat_init_f32(), arm_mat_init_q31()
- * and arm_mat_init_q15() for floating-point, Q31 and Q15 types,  respectively.
- *
- * \par
- * Use of the initialization function is optional. However, if initialization function is used
- * then the instance structure cannot be placed into a const data section.
- * To place the instance structure in a const data
- * section, manually initialize the data structure.  For example:
- * 
- * arm_matrix_instance_f32 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q31 S = {nRows, nColumns, pData};
- * arm_matrix_instance_q15 S = {nRows, nColumns, pData};
- * 

- * where nRows specifies the number of rows, nColumns
- * specifies the number of columns, and pData points to the
- * data array.
- *
- * \par Size Checking
- * By default all of the matrix functions perform size checking on the input and
- * output matrices.  For example, the matrix addition function verifies that the
- * two input matrices and the output matrix all have the same number of rows and
- * columns.  If the size check fails the functions return:
- * 
- *     ARM_MATH_SIZE_MISMATCH
- * 

- * Otherwise the functions return
- * 
- *     ARM_MATH_SUCCESS
- * 

- * There is some overhead associated with this matrix size checking.
- * The matrix size checking is enabled via the \#define
- * 
- *     ARM_MATH_MATRIX_CHECK
- * 

- * within the library project settings.  By default this macro is defined
- * and size checking is enabled.  By changing the project settings and
- * undefining this macro size checking is eliminated and the functions
- * run a bit faster.  With size checking disabled the functions always
- * return ARM_MATH_SUCCESS.
- */
-
-/**
- * @defgroup groupTransforms Transform Functions
- */
-
-/**
- * @defgroup groupController Controller Functions
- */
-
-/**
- * @defgroup groupStats Statistics Functions
- */
-/**
- * @defgroup groupSupport Support Functions
- */
-
-/**
- * @defgroup groupInterpolation Interpolation Functions
- * These functions perform 1- and 2-dimensional interpolation of data.
- * Linear interpolation is used for 1-dimensional data and
- * bilinear interpolation is used for 2-dimensional data.
- */
-
-/**
- * @defgroup groupExamples Examples
- */
-#ifndef _ARM_MATH_H
-#define _ARM_MATH_H
-
-#define __CMSIS_GENERIC         /* disable NVIC and Systick functions */
-
-#if defined(ARM_MATH_CM7)
-  #include "core_cm7.h"
-#elif defined (ARM_MATH_CM4)
-  #include "core_cm4.h"
-#elif defined (ARM_MATH_CM3)
-  #include "core_cm3.h"
-#elif defined (ARM_MATH_CM0)
-  #include "core_cm0.h"
-#define ARM_MATH_CM0_FAMILY
-  #elif defined (ARM_MATH_CM0PLUS)
-#include "core_cm0plus.h"
-  #define ARM_MATH_CM0_FAMILY
-#else
-  #error "Define according the used Cortex core ARM_MATH_CM7, ARM_MATH_CM4, ARM_MATH_CM3, ARM_MATH_CM0PLUS or ARM_MATH_CM0"
-#endif
-
-#undef  __CMSIS_GENERIC         /* enable NVIC and Systick functions */
-#include "string.h"
-#include "math.h"
-#ifdef	__cplusplus
-extern "C"
-{
-#endif
-
-
-  /**
-   * @brief Macros required for reciprocal calculation in Normalized LMS
-   */
-
-#define DELTA_Q31 			(0x100)
-#define DELTA_Q15 			0x5
-#define INDEX_MASK 			0x0000003F
-#ifndef PI
-#define PI					3.14159265358979f
-#endif
-
-  /**
-   * @brief Macros required for SINE and COSINE Fast math approximations
-   */
-
-#define FAST_MATH_TABLE_SIZE  512
-#define FAST_MATH_Q31_SHIFT   (32 - 10)
-#define FAST_MATH_Q15_SHIFT   (16 - 10)
-#define CONTROLLER_Q31_SHIFT  (32 - 9)
-#define TABLE_SIZE  256
-#define TABLE_SPACING_Q31	   0x400000
-#define TABLE_SPACING_Q15	   0x80
-
-  /**
-   * @brief Macros required for SINE and COSINE Controller functions
-   */
-  /* 1.31(q31) Fixed value of 2/360 */
-  /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING			0xB60B61
-
-  /**
-   * @brief Macro for Unaligned Support
-   */
-#ifndef UNALIGNED_SUPPORT_DISABLE
-    #define ALIGN4
-#else
-  #if defined  (__GNUC__)
-    #define ALIGN4 __attribute__((aligned(4)))
-  #else
-    #define ALIGN4 __align(4)
-  #endif
-#endif	/*	#ifndef UNALIGNED_SUPPORT_DISABLE	*/
-
-  /**
-   * @brief Error status returned by some functions in the library.
-   */
-
-  typedef enum
-  {
-    ARM_MATH_SUCCESS = 0,                /**< No error */
-    ARM_MATH_ARGUMENT_ERROR = -1,        /**< One or more arguments are incorrect */
-    ARM_MATH_LENGTH_ERROR = -2,          /**< Length of data buffer is incorrect */
-    ARM_MATH_SIZE_MISMATCH = -3,         /**< Size of matrices is not compatible with the operation. */
-    ARM_MATH_NANINF = -4,                /**< Not-a-number (NaN) or infinity is generated */
-    ARM_MATH_SINGULAR = -5,              /**< Generated by matrix inversion if the input matrix is singular and cannot be inverted. */
-    ARM_MATH_TEST_FAILURE = -6           /**< Test Failed  */
-  } arm_status;
-
-  /**
-   * @brief 8-bit fractional data type in 1.7 format.
-   */
-  typedef int8_t q7_t;
-
-  /**
-   * @brief 16-bit fractional data type in 1.15 format.
-   */
-  typedef int16_t q15_t;
-
-  /**
-   * @brief 32-bit fractional data type in 1.31 format.
-   */
-  typedef int32_t q31_t;
-
-  /**
-   * @brief 64-bit fractional data type in 1.63 format.
-   */
-  typedef int64_t q63_t;
-
-  /**
-   * @brief 32-bit floating-point type definition.
-   */
-  typedef float float32_t;
-
-  /**
-   * @brief 64-bit floating-point type definition.
-   */
-  typedef double float64_t;
-
-  /**
-   * @brief definition to read/write two 16 bit values.
-   */
-#if defined __CC_ARM
-  #define __SIMD32_TYPE int32_t __packed
-  #define CMSIS_UNUSED __attribute__((unused))
-#elif defined __ICCARM__
-  #define __SIMD32_TYPE int32_t __packed
-  #define CMSIS_UNUSED
-#elif defined __GNUC__
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED __attribute__((unused))
-#elif defined __CSMC__			/* Cosmic */
-  #define __SIMD32_TYPE int32_t
-  #define CMSIS_UNUSED
-#elif defined __TASKING__
-  #define __SIMD32_TYPE __unaligned int32_t
-  #define CMSIS_UNUSED
-#else
-  #error Unknown compiler
-#endif
-
-#define __SIMD32(addr)  (*(__SIMD32_TYPE **) & (addr))
-#define __SIMD32_CONST(addr)  ((__SIMD32_TYPE *)(addr))
-
-#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE *)  (addr))
-
-#define __SIMD64(addr)  (*(int64_t **) & (addr))
-
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
-  /**
-   * @brief definition to pack two 16 bit values.
-   */
-#define __PKHBT(ARG1, ARG2, ARG3)      ( (((int32_t)(ARG1) <<  0) & (int32_t)0x0000FFFF) | \
-                                         (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
-#define __PKHTB(ARG1, ARG2, ARG3)      ( (((int32_t)(ARG1) <<  0) & (int32_t)0xFFFF0000) | \
-                                         (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
-
-#endif
-
-
-   /**
-   * @brief definition to pack four 8 bit values.
-   */
-#ifndef ARM_MATH_BIG_ENDIAN
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) |	\
-                                (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) |	\
-							    (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) |	\
-							    (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
-#else
-
-#define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) |	\
-                                (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) |	\
-							    (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) |	\
-							    (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
-
-#endif
-
-
-  /**
-   * @brief Clips Q63 to Q31 values.
-   */
-  static __INLINE q31_t clip_q63_to_q31(
-  q63_t x)
-  {
-    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
-      ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
-  }
-
-  /**
-   * @brief Clips Q63 to Q15 values.
-   */
-  static __INLINE q15_t clip_q63_to_q15(
-  q63_t x)
-  {
-    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
-      ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
-  }
-
-  /**
-   * @brief Clips Q31 to Q7 values.
-   */
-  static __INLINE q7_t clip_q31_to_q7(
-  q31_t x)
-  {
-    return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
-      ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
-  }
-
-  /**
-   * @brief Clips Q31 to Q15 values.
-   */
-  static __INLINE q15_t clip_q31_to_q15(
-  q31_t x)
-  {
-    return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
-      ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
-  }
-
-  /**
-   * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
-   */
-
-  static __INLINE q63_t mult32x64(
-  q63_t x,
-  q31_t y)
-  {
-    return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
-            (((q63_t) (x >> 32) * y)));
-  }
-
-
-//#if defined (ARM_MATH_CM0_FAMILY) && defined ( __CC_ARM   )
-//#define __CLZ __clz
-//#endif
-
-//note: function can be removed when all toolchain support __CLZ for Cortex-M0
-#if defined (ARM_MATH_CM0_FAMILY) && ((defined (__ICCARM__))  )
-
-  static __INLINE uint32_t __CLZ(
-  q31_t data);
-
-
-  static __INLINE uint32_t __CLZ(
-  q31_t data)
-  {
-    uint32_t count = 0;
-    uint32_t mask = 0x80000000;
-
-    while((data & mask) == 0)
-    {
-      count += 1u;
-      mask = mask >> 1u;
-    }
-
-    return (count);
-
-  }
-
-#endif
-
-  /**
-   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
-   */
-
-  static __INLINE uint32_t arm_recip_q31(
-  q31_t in,
-  q31_t * dst,
-  q31_t * pRecipTable)
-  {
-
-    uint32_t out, tempVal;
-    uint32_t index, i;
-    uint32_t signBits;
-
-    if(in > 0)
-    {
-      signBits = __CLZ(in) - 1;
-    }
-    else
-    {
-      signBits = __CLZ(-in) - 1;
-    }
-
-    /* Convert input sample to 1.31 format */
-    in = in << signBits;
-
-    /* calculation of index for initial approximated Val */
-    index = (uint32_t) (in >> 24u);
-    index = (index & INDEX_MASK);
-
-    /* 1.31 with exp 1 */
-    out = pRecipTable[index];
-
-    /* calculation of reciprocal value */
-    /* running approximation for two iterations */
-    for (i = 0u; i < 2u; i++)
-    {
-      tempVal = (q31_t) (((q63_t) in * out) >> 31u);
-      tempVal = 0x7FFFFFFF - tempVal;
-      /*      1.31 with exp 1 */
-      //out = (q31_t) (((q63_t) out * tempVal) >> 30u);
-      out = (q31_t) clip_q63_to_q31(((q63_t) out * tempVal) >> 30u);
-    }
-
-    /* write output */
-    *dst = out;
-
-    /* return num of signbits of out = 1/in value */
-    return (signBits + 1u);
-
-  }
-
-  /**
-   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
-   */
-  static __INLINE uint32_t arm_recip_q15(
-  q15_t in,
-  q15_t * dst,
-  q15_t * pRecipTable)
-  {
-
-    uint32_t out = 0, tempVal = 0;
-    uint32_t index = 0, i = 0;
-    uint32_t signBits = 0;
-
-    if(in > 0)
-    {
-      signBits = __CLZ(in) - 17;
-    }
-    else
-    {
-      signBits = __CLZ(-in) - 17;
-    }
-
-    /* Convert input sample to 1.15 format */
-    in = in << signBits;
-
-    /* calculation of index for initial approximated Val */
-    index = in >> 8;
-    index = (index & INDEX_MASK);
-
-    /*      1.15 with exp 1  */
-    out = pRecipTable[index];
-
-    /* calculation of reciprocal value */
-    /* running approximation for two iterations */
-    for (i = 0; i < 2; i++)
-    {
-      tempVal = (q15_t) (((q31_t) in * out) >> 15);
-      tempVal = 0x7FFF - tempVal;
-      /*      1.15 with exp 1 */
-      out = (q15_t) (((q31_t) out * tempVal) >> 14);
-    }
-
-    /* write output */
-    *dst = out;
-
-    /* return num of signbits of out = 1/in value */
-    return (signBits + 1);
-
-  }
-
-
-  /*
-   * @brief C custom defined intrinisic function for only M0 processors
-   */
-#if defined(ARM_MATH_CM0_FAMILY)
-
-  static __INLINE q31_t __SSAT(
-  q31_t x,
-  uint32_t y)
-  {
-    int32_t posMax, negMin;
-    uint32_t i;
-
-    posMax = 1;
-    for (i = 0; i < (y - 1); i++)
-    {
-      posMax = posMax * 2;
-    }
-
-    if(x > 0)
-    {
-      posMax = (posMax - 1);
-
-      if(x > posMax)
-      {
-        x = posMax;
-      }
-    }
-    else
-    {
-      negMin = -posMax;
-
-      if(x < negMin)
-      {
-        x = negMin;
-      }
-    }
-    return (x);
-
-
-  }
-
-#endif /* end of ARM_MATH_CM0_FAMILY */
-
-
-
-  /*
-   * @brief C custom defined intrinsic function for M3 and M0 processors
-   */
-#if defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY)
-
-  /*
-   * @brief C custom defined QADD8 for M3 and M0 processors
-   */
-  static __INLINE q31_t __QADD8(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum;
-    q7_t r, s, t, u;
-
-    r = (q7_t) x;
-    s = (q7_t) y;
-
-    r = __SSAT((q31_t) (r + s), 8);
-    s = __SSAT(((q31_t) (((x << 16) >> 24) + ((y << 16) >> 24))), 8);
-    t = __SSAT(((q31_t) (((x << 8) >> 24) + ((y << 8) >> 24))), 8);
-    u = __SSAT(((q31_t) ((x >> 24) + (y >> 24))), 8);
-
-    sum =
-      (((q31_t) u << 24) & 0xFF000000) | (((q31_t) t << 16) & 0x00FF0000) |
-      (((q31_t) s << 8) & 0x0000FF00) | (r & 0x000000FF);
-
-    return sum;
-
-  }
-
-  /*
-   * @brief C custom defined QSUB8 for M3 and M0 processors
-   */
-  static __INLINE q31_t __QSUB8(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum;
-    q31_t r, s, t, u;
-
-    r = (q7_t) x;
-    s = (q7_t) y;
-
-    r = __SSAT((r - s), 8);
-    s = __SSAT(((q31_t) (((x << 16) >> 24) - ((y << 16) >> 24))), 8) << 8;
-    t = __SSAT(((q31_t) (((x << 8) >> 24) - ((y << 8) >> 24))), 8) << 16;
-    u = __SSAT(((q31_t) ((x >> 24) - (y >> 24))), 8) << 24;
-
-    sum =
-      (u & 0xFF000000) | (t & 0x00FF0000) | (s & 0x0000FF00) | (r &
-                                                                0x000000FF);
-
-    return sum;
-  }
-
-  /*
-   * @brief C custom defined QADD16 for M3 and M0 processors
-   */
-
-  /*
-   * @brief C custom defined QADD16 for M3 and M0 processors
-   */
-  static __INLINE q31_t __QADD16(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum;
-    q31_t r, s;
-
-    r = (q15_t) x;
-    s = (q15_t) y;
-
-    r = __SSAT(r + s, 16);
-    s = __SSAT(((q31_t) ((x >> 16) + (y >> 16))), 16) << 16;
-
-    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
-    return sum;
-
-  }
-
-  /*
-   * @brief C custom defined SHADD16 for M3 and M0 processors
-   */
-  static __INLINE q31_t __SHADD16(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum;
-    q31_t r, s;
-
-    r = (q15_t) x;
-    s = (q15_t) y;
-
-    r = ((r >> 1) + (s >> 1));
-    s = ((q31_t) ((x >> 17) + (y >> 17))) << 16;
-
-    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
-    return sum;
-
-  }
-
-  /*
-   * @brief C custom defined QSUB16 for M3 and M0 processors
-   */
-  static __INLINE q31_t __QSUB16(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum;
-    q31_t r, s;
-
-    r = (q15_t) x;
-    s = (q15_t) y;
-
-    r = __SSAT(r - s, 16);
-    s = __SSAT(((q31_t) ((x >> 16) - (y >> 16))), 16) << 16;
-
-    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
-    return sum;
-  }
-
-  /*
-   * @brief C custom defined SHSUB16 for M3 and M0 processors
-   */
-  static __INLINE q31_t __SHSUB16(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t diff;
-    q31_t r, s;
-
-    r = (q15_t) x;
-    s = (q15_t) y;
-
-    r = ((r >> 1) - (s >> 1));
-    s = (((x >> 17) - (y >> 17)) << 16);
-
-    diff = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
-    return diff;
-  }
-
-  /*
-   * @brief C custom defined QASX for M3 and M0 processors
-   */
-  static __INLINE q31_t __QASX(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum = 0;
-
-    sum =
-      ((sum +
-        clip_q31_to_q15((q31_t) ((q15_t) (x >> 16) + (q15_t) y))) << 16) +
-      clip_q31_to_q15((q31_t) ((q15_t) x - (q15_t) (y >> 16)));
-
-    return sum;
-  }
-
-  /*
-   * @brief C custom defined SHASX for M3 and M0 processors
-   */
-  static __INLINE q31_t __SHASX(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum;
-    q31_t r, s;
-
-    r = (q15_t) x;
-    s = (q15_t) y;
-
-    r = ((r >> 1) - (y >> 17));
-    s = (((x >> 17) + (s >> 1)) << 16);
-
-    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
-    return sum;
-  }
-
-
-  /*
-   * @brief C custom defined QSAX for M3 and M0 processors
-   */
-  static __INLINE q31_t __QSAX(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum = 0;
-
-    sum =
-      ((sum +
-        clip_q31_to_q15((q31_t) ((q15_t) (x >> 16) - (q15_t) y))) << 16) +
-      clip_q31_to_q15((q31_t) ((q15_t) x + (q15_t) (y >> 16)));
-
-    return sum;
-  }
-
-  /*
-   * @brief C custom defined SHSAX for M3 and M0 processors
-   */
-  static __INLINE q31_t __SHSAX(
-  q31_t x,
-  q31_t y)
-  {
-
-    q31_t sum;
-    q31_t r, s;
-
-    r = (q15_t) x;
-    s = (q15_t) y;
-
-    r = ((r >> 1) + (y >> 17));
-    s = (((x >> 17) - (s >> 1)) << 16);
-
-    sum = (s & 0xFFFF0000) | (r & 0x0000FFFF);
-
-    return sum;
-  }
-
-  /*
-   * @brief C custom defined SMUSDX for M3 and M0 processors
-   */
-  static __INLINE q31_t __SMUSDX(
-  q31_t x,
-  q31_t y)
-  {
-
-    return ((q31_t) (((q15_t) x * (q15_t) (y >> 16)) -
-                     ((q15_t) (x >> 16) * (q15_t) y)));
-  }
-
-  /*
-   * @brief C custom defined SMUADX for M3 and M0 processors
-   */
-  static __INLINE q31_t __SMUADX(
-  q31_t x,
-  q31_t y)
-  {
-
-    return ((q31_t) (((q15_t) x * (q15_t) (y >> 16)) +
-                     ((q15_t) (x >> 16) * (q15_t) y)));
-  }
-
-  /*
-   * @brief C custom defined QADD for M3 and M0 processors
-   */
-  static __INLINE q31_t __QADD(
-  q31_t x,
-  q31_t y)
-  {
-    return clip_q63_to_q31((q63_t) x + y);
-  }
-
-  /*
-   * @brief C custom defined QSUB for M3 and M0 processors
-   */
-  static __INLINE q31_t __QSUB(
-  q31_t x,
-  q31_t y)
-  {
-    return clip_q63_to_q31((q63_t) x - y);
-  }
-
-  /*
-   * @brief C custom defined SMLAD for M3 and M0 processors
-   */
-  static __INLINE q31_t __SMLAD(
-  q31_t x,
-  q31_t y,
-  q31_t sum)
-  {
-
-    return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) +
-            ((q15_t) x * (q15_t) y));
-  }
-
-  /*
-   * @brief C custom defined SMLADX for M3 and M0 processors
-   */
-  static __INLINE q31_t __SMLADX(
-  q31_t x,
-  q31_t y,
-  q31_t sum)
-  {
-
-    return (sum + ((q15_t) (x >> 16) * (q15_t) (y)) +
-            ((q15_t) x * (q15_t) (y >> 16)));
-  }
-
-  /*
-   * @brief C custom defined SMLSDX for M3 and M0 processors
-   */
-  static __INLINE q31_t __SMLSDX(
-  q31_t x,
-  q31_t y,
-  q31_t sum)
-  {
-
-    return (sum - ((q15_t) (x >> 16) * (q15_t) (y)) +
-            ((q15_t) x * (q15_t) (y >> 16)));
-  }
-
-  /*
-   * @brief C custom defined SMLALD for M3 and M0 processors
-   */
-  static __INLINE q63_t __SMLALD(
-  q31_t x,
-  q31_t y,
-  q63_t sum)
-  {
-
-    return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) +
-            ((q15_t) x * (q15_t) y));
-  }
-
-  /*
-   * @brief C custom defined SMLALDX for M3 and M0 processors
-   */
-  static __INLINE q63_t __SMLALDX(
-  q31_t x,
-  q31_t y,
-  q63_t sum)
-  {
-
-    return (sum + ((q15_t) (x >> 16) * (q15_t) y)) +
-      ((q15_t) x * (q15_t) (y >> 16));
-  }
-
-  /*
-   * @brief C custom defined SMUAD for M3 and M0 processors
-   */
-  static __INLINE q31_t __SMUAD(
-  q31_t x,
-  q31_t y)
-  {
-
-    return (((x >> 16) * (y >> 16)) +
-            (((x << 16) >> 16) * ((y << 16) >> 16)));
-  }
-
-  /*
-   * @brief C custom defined SMUSD for M3 and M0 processors
-   */
-  static __INLINE q31_t __SMUSD(
-  q31_t x,
-  q31_t y)
-  {
-
-    return (-((x >> 16) * (y >> 16)) +
-            (((x << 16) >> 16) * ((y << 16) >> 16)));
-  }
-
-
-  /*
-   * @brief C custom defined SXTB16 for M3 and M0 processors
-   */
-  static __INLINE q31_t __SXTB16(
-  q31_t x)
-  {
-
-    return ((((x << 24) >> 24) & 0x0000FFFF) |
-            (((x << 8) >> 8) & 0xFFFF0000));
-  }
-
-
-#endif /* defined (ARM_MATH_CM3) || defined (ARM_MATH_CM0_FAMILY) */
-
-
-  /**
-   * @brief Instance structure for the Q7 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;        /**< number of filter coefficients in the filter. */
-    q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-  } arm_fir_instance_q7;
-
-  /**
-   * @brief Instance structure for the Q15 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-    q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-  } arm_fir_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-    q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
-  } arm_fir_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of filter coefficients in the filter. */
-    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-  } arm_fir_instance_f32;
-
-
-  /**
-   * @brief Processing function for the Q7 FIR filter.
-   * @param[in] *S points to an instance of the Q7 FIR filter structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-  void arm_fir_q7(
-  const arm_fir_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q7 FIR filter.
-   * @param[in,out] *S points to an instance of the Q7 FIR structure.
-   * @param[in] numTaps  Number of filter coefficients in the filter.
-   * @param[in] *pCoeffs points to the filter coefficients.
-   * @param[in] *pState points to the state buffer.
-   * @param[in] blockSize number of samples that are processed.
-   * @return none
-   */
-  void arm_fir_init_q7(
-  arm_fir_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR filter.
-   * @param[in] *S points to an instance of the Q15 FIR structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-  void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the fast Q15 FIR filter for Cortex-M3 and Cortex-M4.
-   * @param[in] *S points to an instance of the Q15 FIR filter structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-  void arm_fir_fast_q15(
-  const arm_fir_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q15 FIR filter.
-   * @param[in,out] *S points to an instance of the Q15 FIR filter structure.
-   * @param[in] numTaps  Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
-   * @param[in] *pCoeffs points to the filter coefficients.
-   * @param[in] *pState points to the state buffer.
-   * @param[in] blockSize number of samples that are processed at a time.
-   * @return The function returns ARM_MATH_SUCCESS if initialization was successful or ARM_MATH_ARGUMENT_ERROR if
-   * numTaps is not a supported value.
-   */
-
-  arm_status arm_fir_init_q15(
-  arm_fir_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 FIR filter.
-   * @param[in] *S points to an instance of the Q31 FIR filter structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-  void arm_fir_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the fast Q31 FIR filter for Cortex-M3 and Cortex-M4.
-   * @param[in] *S points to an instance of the Q31 FIR structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-  void arm_fir_fast_q31(
-  const arm_fir_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q31 FIR filter.
-   * @param[in,out] *S points to an instance of the Q31 FIR structure.
-   * @param[in] 	numTaps  Number of filter coefficients in the filter.
-   * @param[in] 	*pCoeffs points to the filter coefficients.
-   * @param[in] 	*pState points to the state buffer.
-   * @param[in] 	blockSize number of samples that are processed at a time.
-   * @return 		none.
-   */
-  void arm_fir_init_q31(
-  arm_fir_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the floating-point FIR filter.
-   * @param[in] *S points to an instance of the floating-point FIR structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-  void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the floating-point FIR filter.
-   * @param[in,out] *S points to an instance of the floating-point FIR filter structure.
-   * @param[in] 	numTaps  Number of filter coefficients in the filter.
-   * @param[in] 	*pCoeffs points to the filter coefficients.
-   * @param[in] 	*pState points to the state buffer.
-   * @param[in] 	blockSize number of samples that are processed at a time.
-   * @return    	none.
-   */
-  void arm_fir_init_f32(
-  arm_fir_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 Biquad cascade filter.
-   */
-  typedef struct
-  {
-    int8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q15_t *pState;            /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    q15_t *pCoeffs;           /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-    int8_t postShift;         /**< Additional shift, in bits, applied to each output sample. */
-
-  } arm_biquad_casd_df1_inst_q15;
-
-
-  /**
-   * @brief Instance structure for the Q31 Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-    uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
-
-  } arm_biquad_casd_df1_inst_q31;
-
-  /**
-   * @brief Instance structure for the floating-point Biquad cascade filter.
-   */
-  typedef struct
-  {
-    uint32_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;          /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    float32_t *pCoeffs;         /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-
-
-  } arm_biquad_casd_df1_inst_f32;
-
-
-
-  /**
-   * @brief Processing function for the Q15 Biquad cascade filter.
-   * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]  *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in]  blockSize number of samples to process.
-   * @return     none.
-   */
-
-  void arm_biquad_cascade_df1_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q15 Biquad cascade filter.
-   * @param[in,out] *S           points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]     numStages    number of 2nd order stages in the filter.
-   * @param[in]     *pCoeffs     points to the filter coefficients.
-   * @param[in]     *pState      points to the state buffer.
-   * @param[in]     postShift    Shift to be applied to the output. Varies according to the coefficients format
-   * @return        none
-   */
-
-  void arm_biquad_cascade_df1_init_q15(
-  arm_biquad_casd_df1_inst_q15 * S,
-  uint8_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int8_t postShift);
-
-
-  /**
-   * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  *S points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]  *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in]  blockSize number of samples to process.
-   * @return     none.
-   */
-
-  void arm_biquad_cascade_df1_fast_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 Biquad cascade filter
-   * @param[in]  *S         points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]  *pSrc      points to the block of input data.
-   * @param[out] *pDst      points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   * @return     none.
-   */
-
-  void arm_biquad_cascade_df1_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  *S         points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]  *pSrc      points to the block of input data.
-   * @param[out] *pDst      points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   * @return     none.
-   */
-
-  void arm_biquad_cascade_df1_fast_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q31 Biquad cascade filter.
-   * @param[in,out] *S           points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]     numStages      number of 2nd order stages in the filter.
-   * @param[in]     *pCoeffs     points to the filter coefficients.
-   * @param[in]     *pState      points to the state buffer.
-   * @param[in]     postShift    Shift to be applied to the output. Varies according to the coefficients format
-   * @return        none
-   */
-
-  void arm_biquad_cascade_df1_init_q31(
-  arm_biquad_casd_df1_inst_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int8_t postShift);
-
-  /**
-   * @brief Processing function for the floating-point Biquad cascade filter.
-   * @param[in]  *S         points to an instance of the floating-point Biquad cascade structure.
-   * @param[in]  *pSrc      points to the block of input data.
-   * @param[out] *pDst      points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   * @return     none.
-   */
-
-  void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the floating-point Biquad cascade filter.
-   * @param[in,out] *S           points to an instance of the floating-point Biquad cascade structure.
-   * @param[in]     numStages    number of 2nd order stages in the filter.
-   * @param[in]     *pCoeffs     points to the filter coefficients.
-   * @param[in]     *pState      points to the state buffer.
-   * @return        none
-   */
-
-  void arm_biquad_cascade_df1_init_f32(
-  arm_biquad_casd_df1_inst_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief Instance structure for the floating-point matrix structure.
-   */
-
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    float32_t *pData;     /**< points to the data of the matrix. */
-  } arm_matrix_instance_f32;
-
-
-  /**
-   * @brief Instance structure for the floating-point matrix structure.
-   */
-
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    float64_t *pData;     /**< points to the data of the matrix. */
-  } arm_matrix_instance_f64;
-
-  /**
-   * @brief Instance structure for the Q15 matrix structure.
-   */
-
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    q15_t *pData;         /**< points to the data of the matrix. */
-
-  } arm_matrix_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 matrix structure.
-   */
-
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    q31_t *pData;         /**< points to the data of the matrix. */
-
-  } arm_matrix_instance_q31;
-
-
-
-  /**
-   * @brief Floating-point matrix addition.
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix addition.
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_add_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst);
-
-  /**
-   * @brief Q31 matrix addition.
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_add_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Floating-point, complex, matrix multiplication.
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_cmplx_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15, complex,  matrix multiplication.
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_cmplx_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pScratch);
-
-  /**
-   * @brief Q31, complex, matrix multiplication.
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_cmplx_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix transpose.
-   * @param[in]  *pSrc points to the input matrix
-   * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH
-   * or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst);
-
-
-  /**
-   * @brief Q15 matrix transpose.
-   * @param[in]  *pSrc points to the input matrix
-   * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH
-   * or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_trans_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  arm_matrix_instance_q15 * pDst);
-
-  /**
-   * @brief Q31 matrix transpose.
-   * @param[in]  *pSrc points to the input matrix
-   * @param[out] *pDst points to the output matrix
-   * @return 	The function returns either  ARM_MATH_SIZE_MISMATCH
-   * or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_trans_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix multiplication
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix multiplication
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @param[in]		 *pState points to the array for storing intermediate results
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState);
-
-  /**
-   * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
-   * @param[in]       *pSrcA  points to the first input matrix structure
-   * @param[in]       *pSrcB  points to the second input matrix structure
-   * @param[out]      *pDst   points to output matrix structure
-   * @param[in]		  *pState points to the array for storing intermediate results
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_mult_fast_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst,
-  q15_t * pState);
-
-  /**
-   * @brief Q31 matrix multiplication
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_mult_fast_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief Floating-point matrix subtraction
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix subtraction
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_sub_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-  arm_matrix_instance_q15 * pDst);
-
-  /**
-   * @brief Q31 matrix subtraction
-   * @param[in]       *pSrcA points to the first input matrix structure
-   * @param[in]       *pSrcB points to the second input matrix structure
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_sub_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-  arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Floating-point matrix scaling.
-   * @param[in]  *pSrc points to the input matrix
-   * @param[in]  scale scale factor
-   * @param[out] *pDst points to the output matrix
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  float32_t scale,
-  arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix scaling.
-   * @param[in]       *pSrc points to input matrix
-   * @param[in]       scaleFract fractional portion of the scale factor
-   * @param[in]       shift number of bits to shift the result by
-   * @param[out]      *pDst points to output matrix
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_scale_q15(
-  const arm_matrix_instance_q15 * pSrc,
-  q15_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q15 * pDst);
-
-  /**
-   * @brief Q31 matrix scaling.
-   * @param[in]       *pSrc points to input matrix
-   * @param[in]       scaleFract fractional portion of the scale factor
-   * @param[in]       shift number of bits to shift the result by
-   * @param[out]      *pDst points to output matrix structure
-   * @return     The function returns either
-   * ARM_MATH_SIZE_MISMATCH or ARM_MATH_SUCCESS based on the outcome of size checking.
-   */
-
-  arm_status arm_mat_scale_q31(
-  const arm_matrix_instance_q31 * pSrc,
-  q31_t scaleFract,
-  int32_t shift,
-  arm_matrix_instance_q31 * pDst);
-
-
-  /**
-   * @brief  Q31 matrix initialization.
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows          number of rows in the matrix.
-   * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
-   * @return        none
-   */
-
-  void arm_mat_init_q31(
-  arm_matrix_instance_q31 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q31_t * pData);
-
-  /**
-   * @brief  Q15 matrix initialization.
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows          number of rows in the matrix.
-   * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
-   * @return        none
-   */
-
-  void arm_mat_init_q15(
-  arm_matrix_instance_q15 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q15_t * pData);
-
-  /**
-   * @brief  Floating-point matrix initialization.
-   * @param[in,out] *S             points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows          number of rows in the matrix.
-   * @param[in]     nColumns       number of columns in the matrix.
-   * @param[in]     *pData	       points to the matrix data array.
-   * @return        none
-   */
-
-  void arm_mat_init_f32(
-  arm_matrix_instance_f32 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  float32_t * pData);
-
-
-
-  /**
-   * @brief Instance structure for the Q15 PID Control.
-   */
-  typedef struct
-  {
-    q15_t A0;    /**< The derived gain, A0 = Kp + Ki + Kd . */
-#ifdef ARM_MATH_CM0_FAMILY
-    q15_t A1;
-    q15_t A2;
-#else
-    q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
-#endif
-    q15_t state[3];       /**< The state array of length 3. */
-    q15_t Kp;           /**< The proportional gain. */
-    q15_t Ki;           /**< The integral gain. */
-    q15_t Kd;           /**< The derivative gain. */
-  } arm_pid_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 PID Control.
-   */
-  typedef struct
-  {
-    q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
-    q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
-    q31_t A2;            /**< The derived gain, A2 = Kd . */
-    q31_t state[3];      /**< The state array of length 3. */
-    q31_t Kp;            /**< The proportional gain. */
-    q31_t Ki;            /**< The integral gain. */
-    q31_t Kd;            /**< The derivative gain. */
-
-  } arm_pid_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point PID Control.
-   */
-  typedef struct
-  {
-    float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
-    float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
-    float32_t A2;          /**< The derived gain, A2 = Kd . */
-    float32_t state[3];    /**< The state array of length 3. */
-    float32_t Kp;               /**< The proportional gain. */
-    float32_t Ki;               /**< The integral gain. */
-    float32_t Kd;               /**< The derivative gain. */
-  } arm_pid_instance_f32;
-
-
-
-  /**
-   * @brief  Initialization function for the floating-point PID Control.
-   * @param[in,out] *S      points to an instance of the PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   * @return none.
-   */
-  void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag);
-
-  /**
-   * @brief  Reset function for the floating-point PID Control.
-   * @param[in,out] *S is an instance of the floating-point PID Control structure
-   * @return none
-   */
-  void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S);
-
-
-  /**
-   * @brief  Initialization function for the Q31 PID Control.
-   * @param[in,out] *S points to an instance of the Q15 PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   * @return none.
-   */
-  void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the Q31 PID Control.
-   * @param[in,out] *S points to an instance of the Q31 PID Control structure
-   * @return none
-   */
-
-  void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S);
-
-  /**
-   * @brief  Initialization function for the Q15 PID Control.
-   * @param[in,out] *S points to an instance of the Q15 PID structure.
-   * @param[in] resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   * @return none.
-   */
-  void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag);
-
-  /**
-   * @brief  Reset function for the Q15 PID Control.
-   * @param[in,out] *S points to an instance of the q15 PID Control structure
-   * @return none
-   */
-  void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S);
-
-
-  /**
-   * @brief Instance structure for the floating-point Linear Interpolate function.
-   */
-  typedef struct
-  {
-    uint32_t nValues;           /**< nValues */
-    float32_t x1;               /**< x1 */
-    float32_t xSpacing;         /**< xSpacing */
-    float32_t *pYData;          /**< pointer to the table of Y values */
-  } arm_linear_interp_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point bilinear interpolation function.
-   */
-
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    float32_t *pData;   /**< points to the data table. */
-  } arm_bilinear_interp_instance_f32;
-
-   /**
-   * @brief Instance structure for the Q31 bilinear interpolation function.
-   */
-
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q31_t *pData;       /**< points to the data table. */
-  } arm_bilinear_interp_instance_q31;
-
-   /**
-   * @brief Instance structure for the Q15 bilinear interpolation function.
-   */
-
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q15_t *pData;       /**< points to the data table. */
-  } arm_bilinear_interp_instance_q15;
-
-   /**
-   * @brief Instance structure for the Q15 bilinear interpolation function.
-   */
-
-  typedef struct
-  {
-    uint16_t numRows;   /**< number of rows in the data table. */
-    uint16_t numCols;   /**< number of columns in the data table. */
-    q7_t *pData;                /**< points to the data table. */
-  } arm_bilinear_interp_instance_q7;
-
-
-  /**
-   * @brief Q7 vector multiplication.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst  points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_mult_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q15 vector multiplication.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst  points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_mult_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q31 vector multiplication.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_mult_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Floating-point vector multiplication.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_mult_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-
-
-
-
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                     /**< points to the Sin twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix2_instance_q15;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-  q15_t * pSrc);
-
-
-
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q15;
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix4_q15(
-  const arm_cfft_radix4_instance_q15 * S,
-  q15_t * pSrc);
-
-  /**
-   * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                     /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix2_instance_q31;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_q31(
-  const arm_cfft_radix2_instance_q31 * S,
-  q31_t * pSrc);
-
-  /**
-   * @brief Instance structure for the Q31 CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                 /**< length of the FFT. */
-    uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q31;
-
-/* Deprecated */
-  void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-  q31_t * pSrc);
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;                 /**< value of 1/fftLen. */
-  } arm_cfft_radix2_instance_f32;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_f32(
-  arm_cfft_radix2_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_f32(
-  const arm_cfft_radix2_instance_f32 * S,
-  float32_t * pSrc);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-    uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-    uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-    float32_t onebyfftLen;                 /**< value of 1/fftLen. */
-  } arm_cfft_radix4_instance_f32;
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_f32(
-  arm_cfft_radix4_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix4_f32(
-  const arm_cfft_radix4_instance_f32 * S,
-  float32_t * pSrc);
-
-  /**
-   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const q15_t *pTwiddle;             /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_q15;
-
-void arm_cfft_q15( 
-    const arm_cfft_instance_q15 * S, 
-    q15_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag);  
-
-  /**
-   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const q31_t *pTwiddle;             /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_q31;
-
-void arm_cfft_q31( 
-    const arm_cfft_instance_q31 * S, 
-    q31_t * p1,
-    uint8_t ifftFlag,
-    uint8_t bitReverseFlag);  
-  
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-
-  typedef struct
-  {
-    uint16_t fftLen;                   /**< length of the FFT. */
-    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-    uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_f32;
-
-  void arm_cfft_f32(
-  const arm_cfft_instance_f32 * S,
-  float32_t * p1,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the Q15 RFFT/RIFFT function.
-   */
-
-  typedef struct
-  {
-    uint32_t fftLenReal;                      /**< length of the real FFT. */
-    uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
-    q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
-    const arm_cfft_instance_q15 *pCfft;       /**< points to the complex FFT instance. */
-  } arm_rfft_instance_q15;
-
-  arm_status arm_rfft_init_q15(
-  arm_rfft_instance_q15 * S,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_q15(
-  const arm_rfft_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst);
-
-  /**
-   * @brief Instance structure for the Q31 RFFT/RIFFT function.
-   */
-
-  typedef struct
-  {
-    uint32_t fftLenReal;                        /**< length of the real FFT. */
-    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
-    q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
-    const arm_cfft_instance_q31 *pCfft;         /**< points to the complex FFT instance. */
-  } arm_rfft_instance_q31;
-
-  arm_status arm_rfft_init_q31(
-  arm_rfft_instance_q31 * S,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_q31(
-  const arm_rfft_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst);
-
-  /**
-   * @brief Instance structure for the floating-point RFFT/RIFFT function.
-   */
-
-  typedef struct
-  {
-    uint32_t fftLenReal;                        /**< length of the real FFT. */
-    uint16_t fftLenBy2;                         /**< length of the complex FFT. */
-    uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-    uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-    uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
-    float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
-    arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
-  } arm_rfft_instance_f32;
-
-  arm_status arm_rfft_init_f32(
-  arm_rfft_instance_f32 * S,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag);
-
-  void arm_rfft_f32(
-  const arm_rfft_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst);
-
-  /**
-   * @brief Instance structure for the floating-point RFFT/RIFFT function.
-   */
-
-typedef struct
-  {
-    arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
-    uint16_t fftLenRFFT;                        /**< length of the real sequence */
-	float32_t * pTwiddleRFFT;					/**< Twiddle factors real stage  */
-  } arm_rfft_fast_instance_f32 ;
-
-arm_status arm_rfft_fast_init_f32 (
-	arm_rfft_fast_instance_f32 * S,
-	uint16_t fftLen);
-
-void arm_rfft_fast_f32(
-  arm_rfft_fast_instance_f32 * S,
-  float32_t * p, float32_t * pOut,
-  uint8_t ifftFlag);
-
-  /**
-   * @brief Instance structure for the floating-point DCT4/IDCT4 function.
-   */
-
-  typedef struct
-  {
-    uint16_t N;                         /**< length of the DCT4. */
-    uint16_t Nby2;                      /**< half of the length of the DCT4. */
-    float32_t normalize;                /**< normalizing factor. */
-    float32_t *pTwiddle;                /**< points to the twiddle factor table. */
-    float32_t *pCosFactor;              /**< points to the cosFactor table. */
-    arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_f32;
-
-  /**
-   * @brief  Initialization function for the floating-point DCT4/IDCT4.
-   * @param[in,out] *S         points to an instance of floating-point DCT4/IDCT4 structure.
-   * @param[in]     *S_RFFT    points to an instance of floating-point RFFT/RIFFT structure.
-   * @param[in]     *S_CFFT    points to an instance of floating-point CFFT/CIFFT structure.
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if fftLenReal is not a supported transform length.
-   */
-
-  arm_status arm_dct4_init_f32(
-  arm_dct4_instance_f32 * S,
-  arm_rfft_instance_f32 * S_RFFT,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  float32_t normalize);
-
-  /**
-   * @brief Processing function for the floating-point DCT4/IDCT4.
-   * @param[in]       *S             points to an instance of the floating-point DCT4/IDCT4 structure.
-   * @param[in]       *pState        points to state buffer.
-   * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
-   * @return none.
-   */
-
-  void arm_dct4_f32(
-  const arm_dct4_instance_f32 * S,
-  float32_t * pState,
-  float32_t * pInlineBuffer);
-
-  /**
-   * @brief Instance structure for the Q31 DCT4/IDCT4 function.
-   */
-
-  typedef struct
-  {
-    uint16_t N;                         /**< length of the DCT4. */
-    uint16_t Nby2;                      /**< half of the length of the DCT4. */
-    q31_t normalize;                    /**< normalizing factor. */
-    q31_t *pTwiddle;                    /**< points to the twiddle factor table. */
-    q31_t *pCosFactor;                  /**< points to the cosFactor table. */
-    arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_q31;
-
-  /**
-   * @brief  Initialization function for the Q31 DCT4/IDCT4.
-   * @param[in,out] *S         points to an instance of Q31 DCT4/IDCT4 structure.
-   * @param[in]     *S_RFFT    points to an instance of Q31 RFFT/RIFFT structure
-   * @param[in]     *S_CFFT    points to an instance of Q31 CFFT/CIFFT structure
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
-   */
-
-  arm_status arm_dct4_init_q31(
-  arm_dct4_instance_q31 * S,
-  arm_rfft_instance_q31 * S_RFFT,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q31_t normalize);
-
-  /**
-   * @brief Processing function for the Q31 DCT4/IDCT4.
-   * @param[in]       *S             points to an instance of the Q31 DCT4 structure.
-   * @param[in]       *pState        points to state buffer.
-   * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
-   * @return none.
-   */
-
-  void arm_dct4_q31(
-  const arm_dct4_instance_q31 * S,
-  q31_t * pState,
-  q31_t * pInlineBuffer);
-
-  /**
-   * @brief Instance structure for the Q15 DCT4/IDCT4 function.
-   */
-
-  typedef struct
-  {
-    uint16_t N;                         /**< length of the DCT4. */
-    uint16_t Nby2;                      /**< half of the length of the DCT4. */
-    q15_t normalize;                    /**< normalizing factor. */
-    q15_t *pTwiddle;                    /**< points to the twiddle factor table. */
-    q15_t *pCosFactor;                  /**< points to the cosFactor table. */
-    arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
-    arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_q15;
-
-  /**
-   * @brief  Initialization function for the Q15 DCT4/IDCT4.
-   * @param[in,out] *S         points to an instance of Q15 DCT4/IDCT4 structure.
-   * @param[in]     *S_RFFT    points to an instance of Q15 RFFT/RIFFT structure.
-   * @param[in]     *S_CFFT    points to an instance of Q15 CFFT/CIFFT structure.
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return		arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if N is not a supported transform length.
-   */
-
-  arm_status arm_dct4_init_q15(
-  arm_dct4_instance_q15 * S,
-  arm_rfft_instance_q15 * S_RFFT,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q15_t normalize);
-
-  /**
-   * @brief Processing function for the Q15 DCT4/IDCT4.
-   * @param[in]       *S             points to an instance of the Q15 DCT4 structure.
-   * @param[in]       *pState        points to state buffer.
-   * @param[in,out]   *pInlineBuffer points to the in-place input and output buffer.
-   * @return none.
-   */
-
-  void arm_dct4_q15(
-  const arm_dct4_instance_q15 * S,
-  q15_t * pState,
-  q15_t * pInlineBuffer);
-
-  /**
-   * @brief Floating-point vector addition.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_add_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q7 vector addition.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_add_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q15 vector addition.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_add_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q31 vector addition.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_add_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Floating-point vector subtraction.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_sub_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q7 vector subtraction.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_sub_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q15 vector subtraction.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_sub_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q31 vector subtraction.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_sub_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Multiplies a floating-point vector by a scalar.
-   * @param[in]       *pSrc points to the input vector
-   * @param[in]       scale scale factor to be applied
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_scale_f32(
-  float32_t * pSrc,
-  float32_t scale,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Multiplies a Q7 vector by a scalar.
-   * @param[in]       *pSrc points to the input vector
-   * @param[in]       scaleFract fractional portion of the scale value
-   * @param[in]       shift number of bits to shift the result by
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_scale_q7(
-  q7_t * pSrc,
-  q7_t scaleFract,
-  int8_t shift,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Multiplies a Q15 vector by a scalar.
-   * @param[in]       *pSrc points to the input vector
-   * @param[in]       scaleFract fractional portion of the scale value
-   * @param[in]       shift number of bits to shift the result by
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_scale_q15(
-  q15_t * pSrc,
-  q15_t scaleFract,
-  int8_t shift,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Multiplies a Q31 vector by a scalar.
-   * @param[in]       *pSrc points to the input vector
-   * @param[in]       scaleFract fractional portion of the scale value
-   * @param[in]       shift number of bits to shift the result by
-   * @param[out]      *pDst points to the output vector
-   * @param[in]       blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_scale_q31(
-  q31_t * pSrc,
-  q31_t scaleFract,
-  int8_t shift,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q7 vector absolute value.
-   * @param[in]       *pSrc points to the input buffer
-   * @param[out]      *pDst points to the output buffer
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_abs_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Floating-point vector absolute value.
-   * @param[in]       *pSrc points to the input buffer
-   * @param[out]      *pDst points to the output buffer
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_abs_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q15 vector absolute value.
-   * @param[in]       *pSrc points to the input buffer
-   * @param[out]      *pDst points to the output buffer
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_abs_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Q31 vector absolute value.
-   * @param[in]       *pSrc points to the input buffer
-   * @param[out]      *pDst points to the output buffer
-   * @param[in]       blockSize number of samples in each vector
-   * @return none.
-   */
-
-  void arm_abs_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Dot product of floating-point vectors.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[in]       blockSize number of samples in each vector
-   * @param[out]      *result output result returned here
-   * @return none.
-   */
-
-  void arm_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t blockSize,
-  float32_t * result);
-
-  /**
-   * @brief Dot product of Q7 vectors.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[in]       blockSize number of samples in each vector
-   * @param[out]      *result output result returned here
-   * @return none.
-   */
-
-  void arm_dot_prod_q7(
-  q7_t * pSrcA,
-  q7_t * pSrcB,
-  uint32_t blockSize,
-  q31_t * result);
-
-  /**
-   * @brief Dot product of Q15 vectors.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[in]       blockSize number of samples in each vector
-   * @param[out]      *result output result returned here
-   * @return none.
-   */
-
-  void arm_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result);
-
-  /**
-   * @brief Dot product of Q31 vectors.
-   * @param[in]       *pSrcA points to the first input vector
-   * @param[in]       *pSrcB points to the second input vector
-   * @param[in]       blockSize number of samples in each vector
-   * @param[out]      *result output result returned here
-   * @return none.
-   */
-
-  void arm_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t blockSize,
-  q63_t * result);
-
-  /**
-   * @brief  Shifts the elements of a Q7 vector a specified number of bits.
-   * @param[in]  *pSrc points to the input vector
-   * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_shift_q7(
-  q7_t * pSrc,
-  int8_t shiftBits,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Shifts the elements of a Q15 vector a specified number of bits.
-   * @param[in]  *pSrc points to the input vector
-   * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_shift_q15(
-  q15_t * pSrc,
-  int8_t shiftBits,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Shifts the elements of a Q31 vector a specified number of bits.
-   * @param[in]  *pSrc points to the input vector
-   * @param[in]  shiftBits number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_shift_q31(
-  q31_t * pSrc,
-  int8_t shiftBits,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Adds a constant offset to a floating-point vector.
-   * @param[in]  *pSrc points to the input vector
-   * @param[in]  offset is the offset to be added
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_offset_f32(
-  float32_t * pSrc,
-  float32_t offset,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Adds a constant offset to a Q7 vector.
-   * @param[in]  *pSrc points to the input vector
-   * @param[in]  offset is the offset to be added
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_offset_q7(
-  q7_t * pSrc,
-  q7_t offset,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Adds a constant offset to a Q15 vector.
-   * @param[in]  *pSrc points to the input vector
-   * @param[in]  offset is the offset to be added
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_offset_q15(
-  q15_t * pSrc,
-  q15_t offset,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Adds a constant offset to a Q31 vector.
-   * @param[in]  *pSrc points to the input vector
-   * @param[in]  offset is the offset to be added
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_offset_q31(
-  q31_t * pSrc,
-  q31_t offset,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Negates the elements of a floating-point vector.
-   * @param[in]  *pSrc points to the input vector
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_negate_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Negates the elements of a Q7 vector.
-   * @param[in]  *pSrc points to the input vector
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_negate_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Negates the elements of a Q15 vector.
-   * @param[in]  *pSrc points to the input vector
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_negate_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Negates the elements of a Q31 vector.
-   * @param[in]  *pSrc points to the input vector
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  blockSize number of samples in the vector
-   * @return none.
-   */
-
-  void arm_negate_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-  /**
-   * @brief  Copies the elements of a floating-point vector.
-   * @param[in]  *pSrc input pointer
-   * @param[out]  *pDst output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_copy_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Copies the elements of a Q7 vector.
-   * @param[in]  *pSrc input pointer
-   * @param[out]  *pDst output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_copy_q7(
-  q7_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Copies the elements of a Q15 vector.
-   * @param[in]  *pSrc input pointer
-   * @param[out]  *pDst output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_copy_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Copies the elements of a Q31 vector.
-   * @param[in]  *pSrc input pointer
-   * @param[out]  *pDst output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_copy_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-  /**
-   * @brief  Fills a constant value into a floating-point vector.
-   * @param[in]  value input value to be filled
-   * @param[out]  *pDst output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Fills a constant value into a Q7 vector.
-   * @param[in]  value input value to be filled
-   * @param[out]  *pDst output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_fill_q7(
-  q7_t value,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Fills a constant value into a Q15 vector.
-   * @param[in]  value input value to be filled
-   * @param[out]  *pDst output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_fill_q15(
-  q15_t value,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Fills a constant value into a Q31 vector.
-   * @param[in]  value input value to be filled
-   * @param[out]  *pDst output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_fill_q31(
-  q31_t value,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-/**
- * @brief Convolution of floating-point sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @return none.
- */
-
-  void arm_conv_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
-   * @return none.
-   */
-
-
-  void arm_conv_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-/**
- * @brief Convolution of Q15 sequences.
- * @param[in] *pSrcA points to the first input sequence.
- * @param[in] srcALen length of the first input sequence.
- * @param[in] *pSrcB points to the second input sequence.
- * @param[in] srcBLen length of the second input sequence.
- * @param[out] *pDst points to the location where the output result is written.  Length srcALen+srcBLen-1.
- * @return none.
- */
-
-  void arm_conv_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
-
-  /**
-   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @return none.
-   */
-
-  void arm_conv_fast_q15(
-			  q15_t * pSrcA,
-			 uint32_t srcALen,
-			  q15_t * pSrcB,
-			 uint32_t srcBLen,
-			 q15_t * pDst);
-
-  /**
-   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  *pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  *pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
-   * @return none.
-   */
-
-  void arm_conv_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-
-  /**
-   * @brief Convolution of Q31 sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @return none.
-   */
-
-  void arm_conv_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-  /**
-   * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @return none.
-   */
-
-  void arm_conv_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
-    /**
-   * @brief Convolution of Q7 sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   * @return none.
-   */
-
-  void arm_conv_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-
-  /**
-   * @brief Convolution of Q7 sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length srcALen+srcBLen-1.
-   * @return none.
-   */
-
-  void arm_conv_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst);
-
-
-  /**
-   * @brief Partial convolution of floating-point sequences.
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-    /**
-   * @brief Partial convolution of Q15 sequences.
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-/**
-   * @brief Partial convolution of Q15 sequences.
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-  /**
-   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_fast_q15(
-				        q15_t * pSrcA,
-				       uint32_t srcALen,
-				        q15_t * pSrcB,
-				       uint32_t srcBLen,
-				       q15_t * pDst,
-				       uint32_t firstIndex,
-				       uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @param[in]       * pScratch1 points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]       * pScratch2 points to scratch buffer of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Partial convolution of Q31 sequences.
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q7 sequences
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-/**
-   * @brief Partial convolution of Q7 sequences.
-   * @param[in]       *pSrcA points to the first input sequence.
-   * @param[in]       srcALen length of the first input sequence.
-   * @param[in]       *pSrcB points to the second input sequence.
-   * @param[in]       srcBLen length of the second input sequence.
-   * @param[out]      *pDst points to the block of output data
-   * @param[in]       firstIndex is the first output sample to start with.
-   * @param[in]       numPoints is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-
-  arm_status arm_conv_partial_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  uint32_t firstIndex,
-  uint32_t numPoints);
-
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR decimator.
-   */
-
-  typedef struct
-  {
-    uint8_t M;                      /**< decimation factor. */
-    uint16_t numTaps;               /**< number of coefficients in the filter. */
-    q15_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numTaps.*/
-    q15_t *pState;                   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR decimator.
-   */
-
-  typedef struct
-  {
-    uint8_t M;                  /**< decimation factor. */
-    uint16_t numTaps;           /**< number of coefficients in the filter. */
-    q31_t *pCoeffs;              /**< points to the coefficient array. The array is of length numTaps.*/
-    q31_t *pState;               /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-
-  } arm_fir_decimate_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR decimator.
-   */
-
-  typedef struct
-  {
-    uint8_t M;                          /**< decimation factor. */
-    uint16_t numTaps;                   /**< number of coefficients in the filter. */
-    float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numTaps.*/
-    float32_t *pState;                   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-
-  } arm_fir_decimate_instance_f32;
-
-
-
-  /**
-   * @brief Processing function for the floating-point FIR decimator.
-   * @param[in] *S points to an instance of the floating-point FIR decimator structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none
-   */
-
-  void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point FIR decimator.
-   * @param[in,out] *S points to an instance of the floating-point FIR decimator structure.
-   * @param[in] numTaps  number of coefficients in the filter.
-   * @param[in] M  decimation factor.
-   * @param[in] *pCoeffs points to the filter coefficients.
-   * @param[in] *pState points to the state buffer.
-   * @param[in] blockSize number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * blockSize is not a multiple of M.
-   */
-
-  arm_status arm_fir_decimate_init_f32(
-  arm_fir_decimate_instance_f32 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q15 FIR decimator.
-   * @param[in] *S points to an instance of the Q15 FIR decimator structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none
-   */
-
-  void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
-   * @param[in] *S points to an instance of the Q15 FIR decimator structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none
-   */
-
-  void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR decimator.
-   * @param[in,out] *S points to an instance of the Q15 FIR decimator structure.
-   * @param[in] numTaps  number of coefficients in the filter.
-   * @param[in] M  decimation factor.
-   * @param[in] *pCoeffs points to the filter coefficients.
-   * @param[in] *pState points to the state buffer.
-   * @param[in] blockSize number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * blockSize is not a multiple of M.
-   */
-
-  arm_status arm_fir_decimate_init_q15(
-  arm_fir_decimate_instance_q15 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 FIR decimator.
-   * @param[in] *S points to an instance of the Q31 FIR decimator structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none
-   */
-
-  void arm_fir_decimate_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
-   * @param[in] *S points to an instance of the Q31 FIR decimator structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none
-   */
-
-  void arm_fir_decimate_fast_q31(
-  arm_fir_decimate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR decimator.
-   * @param[in,out] *S points to an instance of the Q31 FIR decimator structure.
-   * @param[in] numTaps  number of coefficients in the filter.
-   * @param[in] M  decimation factor.
-   * @param[in] *pCoeffs points to the filter coefficients.
-   * @param[in] *pState points to the state buffer.
-   * @param[in] blockSize number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * blockSize is not a multiple of M.
-   */
-
-  arm_status arm_fir_decimate_init_q31(
-  arm_fir_decimate_instance_q31 * S,
-  uint16_t numTaps,
-  uint8_t M,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR interpolator.
-   */
-
-  typedef struct
-  {
-    uint8_t L;                      /**< upsample factor. */
-    uint16_t phaseLength;           /**< length of each polyphase filter component. */
-    q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-    q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
-  } arm_fir_interpolate_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR interpolator.
-   */
-
-  typedef struct
-  {
-    uint8_t L;                      /**< upsample factor. */
-    uint16_t phaseLength;           /**< length of each polyphase filter component. */
-    q31_t *pCoeffs;                  /**< points to the coefficient array. The array is of length L*phaseLength. */
-    q31_t *pState;                   /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
-  } arm_fir_interpolate_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR interpolator.
-   */
-
-  typedef struct
-  {
-    uint8_t L;                     /**< upsample factor. */
-    uint16_t phaseLength;          /**< length of each polyphase filter component. */
-    float32_t *pCoeffs;             /**< points to the coefficient array. The array is of length L*phaseLength. */
-    float32_t *pState;              /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
-  } arm_fir_interpolate_instance_f32;
-
-
-  /**
-   * @brief Processing function for the Q15 FIR interpolator.
-   * @param[in] *S        points to an instance of the Q15 FIR interpolator structure.
-   * @param[in] *pSrc     points to the block of input data.
-   * @param[out] *pDst    points to the block of output data.
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none.
-   */
-
-  void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR interpolator.
-   * @param[in,out] *S        points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]     L         upsample factor.
-   * @param[in]     numTaps   number of filter coefficients in the filter.
-   * @param[in]     *pCoeffs  points to the filter coefficient buffer.
-   * @param[in]     *pState   points to the state buffer.
-   * @param[in]     blockSize number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length numTaps is not a multiple of the interpolation factor L.
-   */
-
-  arm_status arm_fir_interpolate_init_q15(
-  arm_fir_interpolate_instance_q15 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 FIR interpolator.
-   * @param[in] *S        points to an instance of the Q15 FIR interpolator structure.
-   * @param[in] *pSrc     points to the block of input data.
-   * @param[out] *pDst    points to the block of output data.
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none.
-   */
-
-  void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q31 FIR interpolator.
-   * @param[in,out] *S        points to an instance of the Q31 FIR interpolator structure.
-   * @param[in]     L         upsample factor.
-   * @param[in]     numTaps   number of filter coefficients in the filter.
-   * @param[in]     *pCoeffs  points to the filter coefficient buffer.
-   * @param[in]     *pState   points to the state buffer.
-   * @param[in]     blockSize number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length numTaps is not a multiple of the interpolation factor L.
-   */
-
-  arm_status arm_fir_interpolate_init_q31(
-  arm_fir_interpolate_instance_q31 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR interpolator.
-   * @param[in] *S        points to an instance of the floating-point FIR interpolator structure.
-   * @param[in] *pSrc     points to the block of input data.
-   * @param[out] *pDst    points to the block of output data.
-   * @param[in] blockSize number of input samples to process per call.
-   * @return none.
-   */
-
-  void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the floating-point FIR interpolator.
-   * @param[in,out] *S        points to an instance of the floating-point FIR interpolator structure.
-   * @param[in]     L         upsample factor.
-   * @param[in]     numTaps   number of filter coefficients in the filter.
-   * @param[in]     *pCoeffs  points to the filter coefficient buffer.
-   * @param[in]     *pState   points to the state buffer.
-   * @param[in]     blockSize number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length numTaps is not a multiple of the interpolation factor L.
-   */
-
-  arm_status arm_fir_interpolate_init_f32(
-  arm_fir_interpolate_instance_f32 * S,
-  uint8_t L,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-  /**
-   * @brief Instance structure for the high precision Q31 Biquad cascade filter.
-   */
-
-  typedef struct
-  {
-    uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
-    uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
-
-  } arm_biquad_cas_df1_32x64_ins_q31;
-
-
-  /**
-   * @param[in]  *S        points to an instance of the high precision Q31 Biquad cascade filter structure.
-   * @param[in]  *pSrc     points to the block of input data.
-   * @param[out] *pDst     points to the block of output data
-   * @param[in]  blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_biquad_cas_df1_32x64_q31(
-  const arm_biquad_cas_df1_32x64_ins_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @param[in,out] *S           points to an instance of the high precision Q31 Biquad cascade filter structure.
-   * @param[in]     numStages    number of 2nd order stages in the filter.
-   * @param[in]     *pCoeffs     points to the filter coefficients.
-   * @param[in]     *pState      points to the state buffer.
-   * @param[in]     postShift    shift to be applied to the output. Varies according to the coefficients format
-   * @return        none
-   */
-
-  void arm_biquad_cas_df1_32x64_init_q31(
-  arm_biquad_cas_df1_32x64_ins_q31 * S,
-  uint8_t numStages,
-  q31_t * pCoeffs,
-  q63_t * pState,
-  uint8_t postShift);
-
-
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_df2T_instance_f32;
-
-
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_stereo_df2T_instance_f32;
-
-
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-
-  typedef struct
-  {
-    uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-    float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_df2T_instance_f64;
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in]  *S        points to an instance of the filter data structure.
-   * @param[in]  *pSrc     points to the block of input data.
-   * @param[out] *pDst     points to the block of output data
-   * @param[in]  blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_biquad_cascade_df2T_f32(
-  const arm_biquad_cascade_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
-   * @param[in]  *S        points to an instance of the filter data structure.
-   * @param[in]  *pSrc     points to the block of input data.
-   * @param[out] *pDst     points to the block of output data
-   * @param[in]  blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_biquad_cascade_stereo_df2T_f32(
-  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in]  *S        points to an instance of the filter data structure.
-   * @param[in]  *pSrc     points to the block of input data.
-   * @param[out] *pDst     points to the block of output data
-   * @param[in]  blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_biquad_cascade_df2T_f64(
-  const arm_biquad_cascade_df2T_instance_f64 * S,
-  float64_t * pSrc,
-  float64_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] *S           points to an instance of the filter data structure.
-   * @param[in]     numStages    number of 2nd order stages in the filter.
-   * @param[in]     *pCoeffs     points to the filter coefficients.
-   * @param[in]     *pState      points to the state buffer.
-   * @return        none
-   */
-
-  void arm_biquad_cascade_df2T_init_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] *S           points to an instance of the filter data structure.
-   * @param[in]     numStages    number of 2nd order stages in the filter.
-   * @param[in]     *pCoeffs     points to the filter coefficients.
-   * @param[in]     *pState      points to the state buffer.
-   * @return        none
-   */
-
-  void arm_biquad_cascade_stereo_df2T_init_f32(
-  arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] *S           points to an instance of the filter data structure.
-   * @param[in]     numStages    number of 2nd order stages in the filter.
-   * @param[in]     *pCoeffs     points to the filter coefficients.
-   * @param[in]     *pState      points to the state buffer.
-   * @return        none
-   */
-
-  void arm_biquad_cascade_df2T_init_f64(
-  arm_biquad_cascade_df2T_instance_f64 * S,
-  uint8_t numStages,
-  float64_t * pCoeffs,
-  float64_t * pState);
-
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR lattice filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numStages;                          /**< number of filter stages. */
-    q15_t *pState;                               /**< points to the state variable array. The array is of length numStages. */
-    q15_t *pCoeffs;                              /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR lattice filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numStages;                          /**< number of filter stages. */
-    q31_t *pState;                               /**< points to the state variable array. The array is of length numStages. */
-    q31_t *pCoeffs;                              /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR lattice filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numStages;                  /**< number of filter stages. */
-    float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
-    float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_f32;
-
-  /**
-   * @brief Initialization function for the Q15 FIR lattice filter.
-   * @param[in] *S points to an instance of the Q15 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] *pState points to the state buffer.  The array is of length numStages.
-   * @return none.
-   */
-
-  void arm_fir_lattice_init_q15(
-  arm_fir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pCoeffs,
-  q15_t * pState);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR lattice filter.
-   * @param[in] *S points to an instance of the Q15 FIR lattice structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-  void arm_fir_lattice_q15(
-  const arm_fir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Initialization function for the Q31 FIR lattice filter.
-   * @param[in] *S points to an instance of the Q31 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] *pState points to the state buffer.   The array is of length numStages.
-   * @return none.
-   */
-
-  void arm_fir_lattice_init_q31(
-  arm_fir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pCoeffs,
-  q31_t * pState);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR lattice filter.
-   * @param[in]  *S        points to an instance of the Q31 FIR lattice structure.
-   * @param[in]  *pSrc     points to the block of input data.
-   * @param[out] *pDst     points to the block of output data
-   * @param[in]  blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-/**
- * @brief Initialization function for the floating-point FIR lattice filter.
- * @param[in] *S points to an instance of the floating-point FIR lattice structure.
- * @param[in] numStages  number of filter stages.
- * @param[in] *pCoeffs points to the coefficient buffer.  The array is of length numStages.
- * @param[in] *pState points to the state buffer.  The array is of length numStages.
- * @return none.
- */
-
-  void arm_fir_lattice_init_f32(
-  arm_fir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pCoeffs,
-  float32_t * pState);
-
-  /**
-   * @brief Processing function for the floating-point FIR lattice filter.
-   * @param[in]  *S        points to an instance of the floating-point FIR lattice structure.
-   * @param[in]  *pSrc     points to the block of input data.
-   * @param[out] *pDst     points to the block of output data
-   * @param[in]  blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_fir_lattice_f32(
-  const arm_fir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Instance structure for the Q15 IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                         /**< number of stages in the filter. */
-    q15_t *pState;                              /**< points to the state variable array. The array is of length numStages+blockSize. */
-    q15_t *pkCoeffs;                            /**< points to the reflection coefficient array. The array is of length numStages. */
-    q15_t *pvCoeffs;                            /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                         /**< number of stages in the filter. */
-    q31_t *pState;                              /**< points to the state variable array. The array is of length numStages+blockSize. */
-    q31_t *pkCoeffs;                            /**< points to the reflection coefficient array. The array is of length numStages. */
-    q31_t *pvCoeffs;                            /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point IIR lattice filter.
-   */
-  typedef struct
-  {
-    uint16_t numStages;                         /**< number of stages in the filter. */
-    float32_t *pState;                          /**< points to the state variable array. The array is of length numStages+blockSize. */
-    float32_t *pkCoeffs;                        /**< points to the reflection coefficient array. The array is of length numStages. */
-    float32_t *pvCoeffs;                        /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_f32;
-
-  /**
-   * @brief Processing function for the floating-point IIR lattice filter.
-   * @param[in] *S points to an instance of the floating-point IIR lattice structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Initialization function for the floating-point IIR lattice filter.
-   * @param[in] *S points to an instance of the floating-point IIR lattice structure.
-   * @param[in] numStages number of stages in the filter.
-   * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize-1.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_iir_lattice_init_f32(
-  arm_iir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pkCoeffs,
-  float32_t * pvCoeffs,
-  float32_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 IIR lattice filter.
-   * @param[in] *S points to an instance of the Q31 IIR lattice structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_iir_lattice_q31(
-  const arm_iir_lattice_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the Q31 IIR lattice filter.
-   * @param[in] *S points to an instance of the Q31 IIR lattice structure.
-   * @param[in] numStages number of stages in the filter.
-   * @param[in] *pkCoeffs points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] *pvCoeffs points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] *pState points to the state buffer.  The array is of length numStages+blockSize.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_iir_lattice_init_q31(
-  arm_iir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pkCoeffs,
-  q31_t * pvCoeffs,
-  q31_t * pState,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 IIR lattice filter.
-   * @param[in] *S points to an instance of the Q15 IIR lattice structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[out] *pDst points to the block of output data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_iir_lattice_q15(
-  const arm_iir_lattice_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the Q15 IIR lattice filter.
- * @param[in] *S points to an instance of the fixed-point Q15 IIR lattice structure.
- * @param[in] numStages  number of stages in the filter.
- * @param[in] *pkCoeffs points to reflection coefficient buffer.  The array is of length numStages.
- * @param[in] *pvCoeffs points to ladder coefficient buffer.  The array is of length numStages+1.
- * @param[in] *pState points to state buffer.  The array is of length numStages+blockSize.
- * @param[in] blockSize number of samples to process per call.
- * @return none.
- */
-
-  void arm_iir_lattice_init_q15(
-  arm_iir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pkCoeffs,
-  q15_t * pvCoeffs,
-  q15_t * pState,
-  uint32_t blockSize);
-
-  /**
-   * @brief Instance structure for the floating-point LMS filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
-    float32_t mu;        /**< step size that controls filter coefficient updates. */
-  } arm_lms_instance_f32;
-
-  /**
-   * @brief Processing function for floating-point LMS filter.
-   * @param[in]  *S points to an instance of the floating-point LMS filter structure.
-   * @param[in]  *pSrc points to the block of input data.
-   * @param[in]  *pRef points to the block of reference data.
-   * @param[out] *pOut points to the block of output data.
-   * @param[out] *pErr points to the block of error data.
-   * @param[in]  blockSize number of samples to process.
-   * @return     none.
-   */
-
-  void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize);
-
-  /**
-   * @brief Initialization function for floating-point LMS filter.
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to the coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_lms_init_f32(
-  arm_lms_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize);
-
-  /**
-   * @brief Instance structure for the Q15 LMS filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-    q15_t mu;            /**< step size that controls filter coefficient updates. */
-    uint32_t postShift;  /**< bit shift applied to coefficients. */
-  } arm_lms_instance_q15;
-
-
-  /**
-   * @brief Initialization function for the Q15 LMS filter.
-   * @param[in] *S points to an instance of the Q15 LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to the coefficient buffer.
-   * @param[in] *pState points to the state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @param[in] postShift bit shift applied to coefficients.
-   * @return    none.
-   */
-
-  void arm_lms_init_q15(
-  arm_lms_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint32_t postShift);
-
-  /**
-   * @brief Processing function for Q15 LMS filter.
-   * @param[in] *S points to an instance of the Q15 LMS filter structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[in] *pRef points to the block of reference data.
-   * @param[out] *pOut points to the block of output data.
-   * @param[out] *pErr points to the block of error data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_lms_q15(
-  const arm_lms_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q31 LMS filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numTaps;    /**< number of coefficients in the filter. */
-    q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-    q31_t mu;            /**< step size that controls filter coefficient updates. */
-    uint32_t postShift;  /**< bit shift applied to coefficients. */
-
-  } arm_lms_instance_q31;
-
-  /**
-   * @brief Processing function for Q31 LMS filter.
-   * @param[in]  *S points to an instance of the Q15 LMS filter structure.
-   * @param[in]  *pSrc points to the block of input data.
-   * @param[in]  *pRef points to the block of reference data.
-   * @param[out] *pOut points to the block of output data.
-   * @param[out] *pErr points to the block of error data.
-   * @param[in]  blockSize number of samples to process.
-   * @return     none.
-   */
-
-  void arm_lms_q31(
-  const arm_lms_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize);
-
-  /**
-   * @brief Initialization function for Q31 LMS filter.
-   * @param[in] *S points to an instance of the Q31 LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @param[in] postShift bit shift applied to coefficients.
-   * @return none.
-   */
-
-  void arm_lms_init_q31(
-  arm_lms_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint32_t postShift);
-
-  /**
-   * @brief Instance structure for the floating-point normalized LMS filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of coefficients in the filter. */
-    float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-    float32_t mu;        /**< step size that control filter coefficient updates. */
-    float32_t energy;    /**< saves previous frame energy. */
-    float32_t x0;        /**< saves previous input sample. */
-  } arm_lms_norm_instance_f32;
-
-  /**
-   * @brief Processing function for floating-point normalized LMS filter.
-   * @param[in] *S points to an instance of the floating-point normalized LMS filter structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[in] *pRef points to the block of reference data.
-   * @param[out] *pOut points to the block of output data.
-   * @param[out] *pErr points to the block of error data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_lms_norm_f32(
-  arm_lms_norm_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize);
-
-  /**
-   * @brief Initialization function for floating-point normalized LMS filter.
-   * @param[in] *S points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_lms_norm_init_f32(
-  arm_lms_norm_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q31 normalized LMS filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;     /**< number of coefficients in the filter. */
-    q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-    q31_t mu;             /**< step size that controls filter coefficient updates. */
-    uint8_t postShift;    /**< bit shift applied to coefficients. */
-    q31_t *recipTable;    /**< points to the reciprocal initial value table. */
-    q31_t energy;         /**< saves previous frame energy. */
-    q31_t x0;             /**< saves previous input sample. */
-  } arm_lms_norm_instance_q31;
-
-  /**
-   * @brief Processing function for Q31 normalized LMS filter.
-   * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[in] *pRef points to the block of reference data.
-   * @param[out] *pOut points to the block of output data.
-   * @param[out] *pErr points to the block of error data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_lms_norm_q31(
-  arm_lms_norm_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pRef,
-  q31_t * pOut,
-  q31_t * pErr,
-  uint32_t blockSize);
-
-  /**
-   * @brief Initialization function for Q31 normalized LMS filter.
-   * @param[in] *S points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @param[in] postShift bit shift applied to coefficients.
-   * @return none.
-   */
-
-  void arm_lms_norm_init_q31(
-  arm_lms_norm_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint8_t postShift);
-
-  /**
-   * @brief Instance structure for the Q15 normalized LMS filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numTaps;    /**< Number of coefficients in the filter. */
-    q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-    q15_t mu;            /**< step size that controls filter coefficient updates. */
-    uint8_t postShift;   /**< bit shift applied to coefficients. */
-    q15_t *recipTable;   /**< Points to the reciprocal initial value table. */
-    q15_t energy;        /**< saves previous frame energy. */
-    q15_t x0;            /**< saves previous input sample. */
-  } arm_lms_norm_instance_q15;
-
-  /**
-   * @brief Processing function for Q15 normalized LMS filter.
-   * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in] *pSrc points to the block of input data.
-   * @param[in] *pRef points to the block of reference data.
-   * @param[out] *pOut points to the block of output data.
-   * @param[out] *pErr points to the block of error data.
-   * @param[in] blockSize number of samples to process.
-   * @return none.
-   */
-
-  void arm_lms_norm_q15(
-  arm_lms_norm_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pRef,
-  q15_t * pOut,
-  q15_t * pErr,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q15 normalized LMS filter.
-   * @param[in] *S points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in] numTaps  number of filter coefficients.
-   * @param[in] *pCoeffs points to coefficient buffer.
-   * @param[in] *pState points to state buffer.
-   * @param[in] mu step size that controls filter coefficient updates.
-   * @param[in] blockSize number of samples to process.
-   * @param[in] postShift bit shift applied to coefficients.
-   * @return none.
-   */
-
-  void arm_lms_norm_init_q15(
-  arm_lms_norm_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint8_t postShift);
-
-  /**
-   * @brief Correlation of floating-point sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @return none.
-   */
-
-  void arm_correlate_f32(
-  float32_t * pSrcA,
-  uint32_t srcALen,
-  float32_t * pSrcB,
-  uint32_t srcBLen,
-  float32_t * pDst);
-
-
-   /**
-   * @brief Correlation of Q15 sequences
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @return none.
-   */
-  void arm_correlate_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch);
-
-
-  /**
-   * @brief Correlation of Q15 sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @return none.
-   */
-
-  void arm_correlate_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst);
-
-  /**
-   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @return none.
-   */
-
-  void arm_correlate_fast_q15(
-			       q15_t * pSrcA,
-			      uint32_t srcALen,
-			       q15_t * pSrcB,
-			      uint32_t srcBLen,
-			      q15_t * pDst);
-
-
-
-  /**
-   * @brief Correlation of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  *pScratch points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @return none.
-   */
-
-  void arm_correlate_fast_opt_q15(
-  q15_t * pSrcA,
-  uint32_t srcALen,
-  q15_t * pSrcB,
-  uint32_t srcBLen,
-  q15_t * pDst,
-  q15_t * pScratch);
-
-  /**
-   * @brief Correlation of Q31 sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @return none.
-   */
-
-  void arm_correlate_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-  /**
-   * @brief Correlation of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @return none.
-   */
-
-  void arm_correlate_fast_q31(
-  q31_t * pSrcA,
-  uint32_t srcALen,
-  q31_t * pSrcB,
-  uint32_t srcBLen,
-  q31_t * pDst);
-
-
-
- /**
-   * @brief Correlation of Q7 sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  *pScratch1 points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  *pScratch2 points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   * @return none.
-   */
-
-  void arm_correlate_opt_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst,
-  q15_t * pScratch1,
-  q15_t * pScratch2);
-
-
-  /**
-   * @brief Correlation of Q7 sequences.
-   * @param[in] *pSrcA points to the first input sequence.
-   * @param[in] srcALen length of the first input sequence.
-   * @param[in] *pSrcB points to the second input sequence.
-   * @param[in] srcBLen length of the second input sequence.
-   * @param[out] *pDst points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @return none.
-   */
-
-  void arm_correlate_q7(
-  q7_t * pSrcA,
-  uint32_t srcALen,
-  q7_t * pSrcB,
-  uint32_t srcBLen,
-  q7_t * pDst);
-
-
-  /**
-   * @brief Instance structure for the floating-point sparse FIR filter.
-   */
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_f32;
-
-  /**
-   * @brief Instance structure for the Q31 sparse FIR filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q31;
-
-  /**
-   * @brief Instance structure for the Q15 sparse FIR filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q7 sparse FIR filter.
-   */
-
-  typedef struct
-  {
-    uint16_t numTaps;             /**< number of coefficients in the filter. */
-    uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-    q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
-    uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-    int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q7;
-
-  /**
-   * @brief Processing function for the floating-point sparse FIR filter.
-   * @param[in]  *S          points to an instance of the floating-point sparse FIR structure.
-   * @param[in]  *pSrc       points to the block of input data.
-   * @param[out] *pDst       points to the block of output data
-   * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize   number of input samples to process per call.
-   * @return none.
-   */
-
-  void arm_fir_sparse_f32(
-  arm_fir_sparse_instance_f32 * S,
-  float32_t * pSrc,
-  float32_t * pDst,
-  float32_t * pScratchIn,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the floating-point sparse FIR filter.
-   * @param[in,out] *S         points to an instance of the floating-point sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     *pCoeffs   points to the array of filter coefficients.
-   * @param[in]     *pState    points to the state buffer.
-   * @param[in]     *pTapDelay points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   * @return none
-   */
-
-  void arm_fir_sparse_init_f32(
-  arm_fir_sparse_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 sparse FIR filter.
-   * @param[in]  *S          points to an instance of the Q31 sparse FIR structure.
-   * @param[in]  *pSrc       points to the block of input data.
-   * @param[out] *pDst       points to the block of output data
-   * @param[in]  *pScratchIn points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize   number of input samples to process per call.
-   * @return none.
-   */
-
-  void arm_fir_sparse_q31(
-  arm_fir_sparse_instance_q31 * S,
-  q31_t * pSrc,
-  q31_t * pDst,
-  q31_t * pScratchIn,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q31 sparse FIR filter.
-   * @param[in,out] *S         points to an instance of the Q31 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     *pCoeffs   points to the array of filter coefficients.
-   * @param[in]     *pState    points to the state buffer.
-   * @param[in]     *pTapDelay points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   * @return none
-   */
-
-  void arm_fir_sparse_init_q31(
-  arm_fir_sparse_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q15 sparse FIR filter.
-   * @param[in]  *S           points to an instance of the Q15 sparse FIR structure.
-   * @param[in]  *pSrc        points to the block of input data.
-   * @param[out] *pDst        points to the block of output data
-   * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.
-   * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize    number of input samples to process per call.
-   * @return none.
-   */
-
-  void arm_fir_sparse_q15(
-  arm_fir_sparse_instance_q15 * S,
-  q15_t * pSrc,
-  q15_t * pDst,
-  q15_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 sparse FIR filter.
-   * @param[in,out] *S         points to an instance of the Q15 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     *pCoeffs   points to the array of filter coefficients.
-   * @param[in]     *pState    points to the state buffer.
-   * @param[in]     *pTapDelay points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   * @return none
-   */
-
-  void arm_fir_sparse_init_q15(
-  arm_fir_sparse_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q7 sparse FIR filter.
-   * @param[in]  *S           points to an instance of the Q7 sparse FIR structure.
-   * @param[in]  *pSrc        points to the block of input data.
-   * @param[out] *pDst        points to the block of output data
-   * @param[in]  *pScratchIn  points to a temporary buffer of size blockSize.
-   * @param[in]  *pScratchOut points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize    number of input samples to process per call.
-   * @return none.
-   */
-
-  void arm_fir_sparse_q7(
-  arm_fir_sparse_instance_q7 * S,
-  q7_t * pSrc,
-  q7_t * pDst,
-  q7_t * pScratchIn,
-  q31_t * pScratchOut,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q7 sparse FIR filter.
-   * @param[in,out] *S         points to an instance of the Q7 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     *pCoeffs   points to the array of filter coefficients.
-   * @param[in]     *pState    points to the state buffer.
-   * @param[in]     *pTapDelay points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   * @return none
-   */
-
-  void arm_fir_sparse_init_q7(
-  arm_fir_sparse_instance_q7 * S,
-  uint16_t numTaps,
-  q7_t * pCoeffs,
-  q7_t * pState,
-  int32_t * pTapDelay,
-  uint16_t maxDelay,
-  uint32_t blockSize);
-
-
-  /*
-   * @brief  Floating-point sin_cos function.
-   * @param[in]  theta    input value in degrees
-   * @param[out] *pSinVal points to the processed sine output.
-   * @param[out] *pCosVal points to the processed cos output.
-   * @return none.
-   */
-
-  void arm_sin_cos_f32(
-  float32_t theta,
-  float32_t * pSinVal,
-  float32_t * pCcosVal);
-
-  /*
-   * @brief  Q31 sin_cos function.
-   * @param[in]  theta    scaled input value in degrees
-   * @param[out] *pSinVal points to the processed sine output.
-   * @param[out] *pCosVal points to the processed cosine output.
-   * @return none.
-   */
-
-  void arm_sin_cos_q31(
-  q31_t theta,
-  q31_t * pSinVal,
-  q31_t * pCosVal);
-
-
-  /**
-   * @brief  Floating-point complex conjugate.
-   * @param[in]  *pSrc points to the input vector
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_conj_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q31 complex conjugate.
-   * @param[in]  *pSrc points to the input vector
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_conj_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q15 complex conjugate.
-   * @param[in]  *pSrc points to the input vector
-   * @param[out]  *pDst points to the output vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_conj_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
-
-  /**
-   * @brief  Floating-point complex magnitude squared
-   * @param[in]  *pSrc points to the complex input vector
-   * @param[out]  *pDst points to the real output vector
-   * @param[in]  numSamples number of complex samples in the input vector
-   * @return none.
-   */
-
-  void arm_cmplx_mag_squared_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q31 complex magnitude squared
-   * @param[in]  *pSrc points to the complex input vector
-   * @param[out]  *pDst points to the real output vector
-   * @param[in]  numSamples number of complex samples in the input vector
-   * @return none.
-   */
-
-  void arm_cmplx_mag_squared_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q15 complex magnitude squared
-   * @param[in]  *pSrc points to the complex input vector
-   * @param[out]  *pDst points to the real output vector
-   * @param[in]  numSamples number of complex samples in the input vector
-   * @return none.
-   */
-
-  void arm_cmplx_mag_squared_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-
- /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup PID PID Motor Control
-   *
-   * A Proportional Integral Derivative (PID) controller is a generic feedback control
-   * loop mechanism widely used in industrial control systems.
-   * A PID controller is the most commonly used type of feedback controller.
-   *
-   * This set of functions implements (PID) controllers
-   * for Q15, Q31, and floating-point data types.  The functions operate on a single sample
-   * of data and each call to the function returns a single processed value.
-   * S points to an instance of the PID control data structure.  in
-   * is the input sample value. The functions return the output value.
-   *
-   * \par Algorithm:
-   * 
-   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
-   *    A0 = Kp + Ki + Kd
-   *    A1 = (-Kp ) - (2 * Kd )
-   *    A2 = Kd  

-   *
-   * \par
-   * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
-   *
-   * \par
-   * \image html PID.gif "Proportional Integral Derivative Controller"
-   *
-   * \par
-   * The PID controller calculates an "error" value as the difference between
-   * the measured output and the reference input.
-   * The controller attempts to minimize the error by adjusting the process control inputs.
-   * The proportional value determines the reaction to the current error,
-   * the integral value determines the reaction based on the sum of recent errors,
-   * and the derivative value determines the reaction based on the rate at which the error has been changing.
-   *
-   * \par Instance Structure
-   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
-   * A separate instance structure must be defined for each PID Controller.
-   * There are separate instance structure declarations for each of the 3 supported data types.
-   *
-   * \par Reset Functions
-   * There is also an associated reset function for each data type which clears the state array.
-   *
-   * \par Initialization Functions
-   * There is also an associated initialization function for each data type.
-   * The initialization function performs the following operations:
-   * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
-   * - Zeros out the values in the state buffer.
-   *
-   * \par
-   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
-   *
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the fixed-point versions of the PID Controller functions.
-   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup PID
-   * @{
-   */
-
-  /**
-   * @brief  Process function for the floating-point PID Control.
-   * @param[in,out] *S is an instance of the floating-point PID Control structure
-   * @param[in] in input sample to process
-   * @return out processed output sample.
-   */
-
-
-  static __INLINE float32_t arm_pid_f32(
-  arm_pid_instance_f32 * S,
-  float32_t in)
-  {
-    float32_t out;
-
-    /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
-    out = (S->A0 * in) +
-      (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-
-  }
-
-  /**
-   * @brief  Process function for the Q31 PID Control.
-   * @param[in,out] *S points to an instance of the Q31 PID Control structure
-   * @param[in] in input sample to process
-   * @return out processed output sample.
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 64-bit accumulator.
-   * The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-   * Thus, if the accumulator result overflows it wraps around rather than clip.
-   * In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
-   * After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
-   */
-
-  static __INLINE q31_t arm_pid_q31(
-  arm_pid_instance_q31 * S,
-  q31_t in)
-  {
-    q63_t acc;
-    q31_t out;
-
-    /* acc = A0 * x[n]  */
-    acc = (q63_t) S->A0 * in;
-
-    /* acc += A1 * x[n-1] */
-    acc += (q63_t) S->A1 * S->state[0];
-
-    /* acc += A2 * x[n-2]  */
-    acc += (q63_t) S->A2 * S->state[1];
-
-    /* convert output to 1.31 format to add y[n-1] */
-    out = (q31_t) (acc >> 31u);
-
-    /* out += y[n-1] */
-    out += S->state[2];
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-
-  }
-
-  /**
-   * @brief  Process function for the Q15 PID Control.
-   * @param[in,out] *S points to an instance of the Q15 PID Control structure
-   * @param[in] in input sample to process
-   * @return out processed output sample.
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using a 64-bit internal accumulator.
-   * Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-   * The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-   * There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-   * After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-   * Lastly, the accumulator is saturated to yield a result in 1.15 format.
-   */
-
-  static __INLINE q15_t arm_pid_q15(
-  arm_pid_instance_q15 * S,
-  q15_t in)
-  {
-    q63_t acc;
-    q15_t out;
-
-#ifndef ARM_MATH_CM0_FAMILY
-    __SIMD32_TYPE *vstate;
-
-    /* Implementation of PID controller */
-
-    /* acc = A0 * x[n]  */
-    acc = (q31_t) __SMUAD(S->A0, in);
-
-    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    vstate = __SIMD32_CONST(S->state);
-    acc = __SMLALD(S->A1, (q31_t) *vstate, acc);
-
-#else
-    /* acc = A0 * x[n]  */
-    acc = ((q31_t) S->A0) * in;
-
-    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    acc += (q31_t) S->A1 * S->state[0];
-    acc += (q31_t) S->A2 * S->state[1];
-
-#endif
-
-    /* acc += y[n-1] */
-    acc += (q31_t) S->state[2] << 15;
-
-    /* saturate the output */
-    out = (q15_t) (__SSAT((acc >> 15), 16));
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-
-  }
-
-  /**
-   * @} end of PID group
-   */
-
-
-  /**
-   * @brief Floating-point matrix inverse.
-   * @param[in]  *src points to the instance of the input floating-point matrix structure.
-   * @param[out] *dst points to the instance of the output floating-point matrix structure.
-   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
-   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
-   */
-
-  arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * src,
-  arm_matrix_instance_f32 * dst);
-
-
-  /**
-   * @brief Floating-point matrix inverse.
-   * @param[in]  *src points to the instance of the input floating-point matrix structure.
-   * @param[out] *dst points to the instance of the output floating-point matrix structure.
-   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
-   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
-   */
-
-  arm_status arm_mat_inverse_f64(
-  const arm_matrix_instance_f64 * src,
-  arm_matrix_instance_f64 * dst);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-
-  /**
-   * @defgroup clarke Vector Clarke Transform
-   * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
-   * Generally the Clarke transform uses three-phase currents Ia, Ib and Ic to calculate currents
-   * in the two-phase orthogonal stator axis Ialpha and Ibeta.
-   * When Ialpha is superposed with Ia as shown in the figure below
-   * \image html clarke.gif Stator current space vector and its components in (a,b).
-   * and Ia + Ib + Ic = 0, in this condition Ialpha and Ibeta
-   * can be calculated using only Ia and Ib.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html clarkeFormula.gif
-   * where Ia and Ib are the instantaneous stator phases and
-   * pIalpha and pIbeta are the two coordinates of time invariant vector.
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Clarke transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup clarke
-   * @{
-   */
-
-  /**
-   *
-   * @brief  Floating-point Clarke transform
-   * @param[in]       Ia       input three-phase coordinate a
-   * @param[in]       Ib       input three-phase coordinate b
-   * @param[out]      *pIalpha points to output two-phase orthogonal vector axis alpha
-   * @param[out]      *pIbeta  points to output two-phase orthogonal vector axis beta
-   * @return none.
-   */
-
-  static __INLINE void arm_clarke_f32(
-  float32_t Ia,
-  float32_t Ib,
-  float32_t * pIalpha,
-  float32_t * pIbeta)
-  {
-    /* Calculate pIalpha using the equation, pIalpha = Ia */
-    *pIalpha = Ia;
-
-    /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
-    *pIbeta =
-      ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
-
-  }
-
-  /**
-   * @brief  Clarke transform for Q31 version
-   * @param[in]       Ia       input three-phase coordinate a
-   * @param[in]       Ib       input three-phase coordinate b
-   * @param[out]      *pIalpha points to output two-phase orthogonal vector axis alpha
-   * @param[out]      *pIbeta  points to output two-phase orthogonal vector axis beta
-   * @return none.
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition, hence there is no risk of overflow.
-   */
-
-  static __INLINE void arm_clarke_q31(
-  q31_t Ia,
-  q31_t Ib,
-  q31_t * pIalpha,
-  q31_t * pIbeta)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-
-    /* Calculating pIalpha from Ia by equation pIalpha = Ia */
-    *pIalpha = Ia;
-
-    /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
-    product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
-
-    /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
-    product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
-
-    /* pIbeta is calculated by adding the intermediate products */
-    *pIbeta = __QADD(product1, product2);
-  }
-
-  /**
-   * @} end of clarke group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q31 vector.
-   * @param[in]  *pSrc     input pointer
-   * @param[out]  *pDst    output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_q7_to_q31(
-  q7_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup inv_clarke Vector Inverse Clarke Transform
-   * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html clarkeInvFormula.gif
-   * where pIa and pIb are the instantaneous stator phases and
-   * Ialpha and Ibeta are the two coordinates of time invariant vector.
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Clarke transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup inv_clarke
-   * @{
-   */
-
-   /**
-   * @brief  Floating-point Inverse Clarke transform
-   * @param[in]       Ialpha  input two-phase orthogonal vector axis alpha
-   * @param[in]       Ibeta   input two-phase orthogonal vector axis beta
-   * @param[out]      *pIa    points to output three-phase coordinate a
-   * @param[out]      *pIb    points to output three-phase coordinate b
-   * @return none.
-   */
-
-
-  static __INLINE void arm_inv_clarke_f32(
-  float32_t Ialpha,
-  float32_t Ibeta,
-  float32_t * pIa,
-  float32_t * pIb)
-  {
-    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
-    *pIa = Ialpha;
-
-    /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
-    *pIb = -0.5 * Ialpha + (float32_t) 0.8660254039 *Ibeta;
-
-  }
-
-  /**
-   * @brief  Inverse Clarke transform for Q31 version
-   * @param[in]       Ialpha  input two-phase orthogonal vector axis alpha
-   * @param[in]       Ibeta   input two-phase orthogonal vector axis beta
-   * @param[out]      *pIa    points to output three-phase coordinate a
-   * @param[out]      *pIb    points to output three-phase coordinate b
-   * @return none.
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the subtraction, hence there is no risk of overflow.
-   */
-
-  static __INLINE void arm_inv_clarke_q31(
-  q31_t Ialpha,
-  q31_t Ibeta,
-  q31_t * pIa,
-  q31_t * pIb)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-
-    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
-    *pIa = Ialpha;
-
-    /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
-    product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
-
-    /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
-    product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
-
-    /* pIb is calculated by subtracting the products */
-    *pIb = __QSUB(product2, product1);
-
-  }
-
-  /**
-   * @} end of inv_clarke group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q15 vector.
-   * @param[in]  *pSrc     input pointer
-   * @param[out] *pDst     output pointer
-   * @param[in]  blockSize number of samples to process
-   * @return none.
-   */
-  void arm_q7_to_q15(
-  q7_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup park Vector Park Transform
-   *
-   * Forward Park transform converts the input two-coordinate vector to flux and torque components.
-   * The Park transform can be used to realize the transformation of the Ialpha and the Ibeta currents
-   * from the stationary to the moving reference frame and control the spatial relationship between
-   * the stator vector current and rotor flux vector.
-   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
-   * current vector and the relationship from the two reference frames:
-   * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html parkFormula.gif
-   * where Ialpha and Ibeta are the stator vector components,
-   * pId and pIq are rotor vector components and cosVal and sinVal are the
-   * cosine and sine values of theta (rotor flux position).
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Park transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup park
-   * @{
-   */
-
-  /**
-   * @brief Floating-point Park transform
-   * @param[in]       Ialpha input two-phase vector coordinate alpha
-   * @param[in]       Ibeta  input two-phase vector coordinate beta
-   * @param[out]      *pId   points to output	rotor reference frame d
-   * @param[out]      *pIq   points to output	rotor reference frame q
-   * @param[in]       sinVal sine value of rotation angle theta
-   * @param[in]       cosVal cosine value of rotation angle theta
-   * @return none.
-   *
-   * The function implements the forward Park transform.
-   *
-   */
-
-  static __INLINE void arm_park_f32(
-  float32_t Ialpha,
-  float32_t Ibeta,
-  float32_t * pId,
-  float32_t * pIq,
-  float32_t sinVal,
-  float32_t cosVal)
-  {
-    /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
-    *pId = Ialpha * cosVal + Ibeta * sinVal;
-
-    /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
-    *pIq = -Ialpha * sinVal + Ibeta * cosVal;
-
-  }
-
-  /**
-   * @brief  Park transform for Q31 version
-   * @param[in]       Ialpha input two-phase vector coordinate alpha
-   * @param[in]       Ibeta  input two-phase vector coordinate beta
-   * @param[out]      *pId   points to output rotor reference frame d
-   * @param[out]      *pIq   points to output rotor reference frame q
-   * @param[in]       sinVal sine value of rotation angle theta
-   * @param[in]       cosVal cosine value of rotation angle theta
-   * @return none.
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition and subtraction, hence there is no risk of overflow.
-   */
-
-
-  static __INLINE void arm_park_q31(
-  q31_t Ialpha,
-  q31_t Ibeta,
-  q31_t * pId,
-  q31_t * pIq,
-  q31_t sinVal,
-  q31_t cosVal)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
-
-    /* Intermediate product is calculated by (Ialpha * cosVal) */
-    product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
-
-    /* Intermediate product is calculated by (Ibeta * sinVal) */
-    product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
-
-
-    /* Intermediate product is calculated by (Ialpha * sinVal) */
-    product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
-
-    /* Intermediate product is calculated by (Ibeta * cosVal) */
-    product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
-
-    /* Calculate pId by adding the two intermediate products 1 and 2 */
-    *pId = __QADD(product1, product2);
-
-    /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
-    *pIq = __QSUB(product4, product3);
-  }
-
-  /**
-   * @} end of park group
-   */
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[out]  *pDst is output pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @return none.
-   */
-  void arm_q7_to_float(
-  q7_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup inv_park Vector Inverse Park transform
-   * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html parkInvFormula.gif
-   * where pIalpha and pIbeta are the stator vector components,
-   * Id and Iq are rotor vector components and cosVal and sinVal are the
-   * cosine and sine values of theta (rotor flux position).
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Park transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup inv_park
-   * @{
-   */
-
-   /**
-   * @brief  Floating-point Inverse Park transform
-   * @param[in]       Id        input coordinate of rotor reference frame d
-   * @param[in]       Iq        input coordinate of rotor reference frame q
-   * @param[out]      *pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out]      *pIbeta   points to output two-phase orthogonal vector axis beta
-   * @param[in]       sinVal    sine value of rotation angle theta
-   * @param[in]       cosVal    cosine value of rotation angle theta
-   * @return none.
-   */
-
-  static __INLINE void arm_inv_park_f32(
-  float32_t Id,
-  float32_t Iq,
-  float32_t * pIalpha,
-  float32_t * pIbeta,
-  float32_t sinVal,
-  float32_t cosVal)
-  {
-    /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
-    *pIalpha = Id * cosVal - Iq * sinVal;
-
-    /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
-    *pIbeta = Id * sinVal + Iq * cosVal;
-
-  }
-
-
-  /**
-   * @brief  Inverse Park transform for	Q31 version
-   * @param[in]       Id        input coordinate of rotor reference frame d
-   * @param[in]       Iq        input coordinate of rotor reference frame q
-   * @param[out]      *pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out]      *pIbeta   points to output two-phase orthogonal vector axis beta
-   * @param[in]       sinVal    sine value of rotation angle theta
-   * @param[in]       cosVal    cosine value of rotation angle theta
-   * @return none.
-   *
-   * Scaling and Overflow Behavior:
-   * \par
-   * The function is implemented using an internal 32-bit accumulator.
-   * The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-   * There is saturation on the addition, hence there is no risk of overflow.
-   */
-
-
-  static __INLINE void arm_inv_park_q31(
-  q31_t Id,
-  q31_t Iq,
-  q31_t * pIalpha,
-  q31_t * pIbeta,
-  q31_t sinVal,
-  q31_t cosVal)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
-
-    /* Intermediate product is calculated by (Id * cosVal) */
-    product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
-
-    /* Intermediate product is calculated by (Iq * sinVal) */
-    product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
-
-
-    /* Intermediate product is calculated by (Id * sinVal) */
-    product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
-
-    /* Intermediate product is calculated by (Iq * cosVal) */
-    product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
-
-    /* Calculate pIalpha by using the two intermediate products 1 and 2 */
-    *pIalpha = __QSUB(product1, product2);
-
-    /* Calculate pIbeta by using the two intermediate products 3 and 4 */
-    *pIbeta = __QADD(product4, product3);
-
-  }
-
-  /**
-   * @} end of Inverse park group
-   */
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[out]  *pDst is output pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @return none.
-   */
-  void arm_q31_to_float(
-  q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @ingroup groupInterpolation
-   */
-
-  /**
-   * @defgroup LinearInterpolate Linear Interpolation
-   *
-   * Linear interpolation is a method of curve fitting using linear polynomials.
-   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
-   *
-   * \par
-   * \image html LinearInterp.gif "Linear interpolation"
-   *
-   * \par
-   * A  Linear Interpolate function calculates an output value(y), for the input(x)
-   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
-   *
-   * \par Algorithm:
-   * 
-   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
-   *       where x0, x1 are nearest values of input x
-   *             y0, y1 are nearest values to output y
-   * 

-   *
-   * \par
-   * This set of functions implements Linear interpolation process
-   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
-   * sample of data and each call to the function returns a single processed value.
-   * S points to an instance of the Linear Interpolate function data structure.
-   * x is the input sample value. The functions returns the output value.
-   *
-   * \par
-   * if x is outside of the table boundary, Linear interpolation returns first value of the table
-   * if x is below input range and returns last value of table if x is above range.
-   */
-
-  /**
-   * @addtogroup LinearInterpolate
-   * @{
-   */
-
-  /**
-   * @brief  Process function for the floating-point Linear Interpolation Function.
-   * @param[in,out] *S is an instance of the floating-point Linear Interpolation structure
-   * @param[in] x input sample to process
-   * @return y processed output sample.
-   *
-   */
-
-  static __INLINE float32_t arm_linear_interp_f32(
-  arm_linear_interp_instance_f32 * S,
-  float32_t x)
-  {
-
-    float32_t y;
-    float32_t x0, x1;                            /* Nearest input values */
-    float32_t y0, y1;                            /* Nearest output values */
-    float32_t xSpacing = S->xSpacing;            /* spacing between input values */
-    int32_t i;                                   /* Index variable */
-    float32_t *pYData = S->pYData;               /* pointer to output table */
-
-    /* Calculation of index */
-    i = (int32_t) ((x - S->x1) / xSpacing);
-
-    if(i < 0)
-    {
-      /* Iniatilize output for below specified range as least output value of table */
-      y = pYData[0];
-    }
-    else if((uint32_t)i >= S->nValues)
-    {
-      /* Iniatilize output for above specified range as last output value of table */
-      y = pYData[S->nValues - 1];
-    }
-    else
-    {
-      /* Calculation of nearest input values */
-      x0 = S->x1 + i * xSpacing;
-      x1 = S->x1 + (i + 1) * xSpacing;
-
-      /* Read of nearest output values */
-      y0 = pYData[i];
-      y1 = pYData[i + 1];
-
-      /* Calculation of output */
-      y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
-
-    }
-
-    /* returns output value */
-    return (y);
-  }
-
-   /**
-   *
-   * @brief  Process function for the Q31 Linear Interpolation Function.
-   * @param[in] *pYData  pointer to Q31 Linear Interpolation table
-   * @param[in] x input sample to process
-   * @param[in] nValues number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   *
-   */
-
-
-  static __INLINE q31_t arm_linear_interp_q31(
-  q31_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q31_t y;                                     /* output */
-    q31_t y0, y1;                                /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    index = ((x & 0xFFF00000) >> 20);
-
-    if(index >= (int32_t)(nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else if(index < 0)
-    {
-      return (pYData[0]);
-    }
-    else
-    {
-
-      /* 20 bits for the fractional part */
-      /* shift left by 11 to keep fract in 1.31 format */
-      fract = (x & 0x000FFFFF) << 11;
-
-      /* Read two nearest output values from the index in 1.31(q31) format */
-      y0 = pYData[index];
-      y1 = pYData[index + 1u];
-
-      /* Calculation of y0 * (1-fract) and y is in 2.30 format */
-      y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
-
-      /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
-      y += ((q31_t) (((q63_t) y1 * fract) >> 32));
-
-      /* Convert y to 1.31 format */
-      return (y << 1u);
-
-    }
-
-  }
-
-  /**
-   *
-   * @brief  Process function for the Q15 Linear Interpolation Function.
-   * @param[in] *pYData  pointer to Q15 Linear Interpolation table
-   * @param[in] x input sample to process
-   * @param[in] nValues number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   *
-   */
-
-
-  static __INLINE q15_t arm_linear_interp_q15(
-  q15_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q63_t y;                                     /* output */
-    q15_t y0, y1;                                /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    index = ((x & 0xFFF00000) >> 20u);
-
-    if(index >= (int32_t)(nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else if(index < 0)
-    {
-      return (pYData[0]);
-    }
-    else
-    {
-      /* 20 bits for the fractional part */
-      /* fract is in 12.20 format */
-      fract = (x & 0x000FFFFF);
-
-      /* Read two nearest output values from the index */
-      y0 = pYData[index];
-      y1 = pYData[index + 1u];
-
-      /* Calculation of y0 * (1-fract) and y is in 13.35 format */
-      y = ((q63_t) y0 * (0xFFFFF - fract));
-
-      /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
-      y += ((q63_t) y1 * (fract));
-
-      /* convert y to 1.15 format */
-      return (y >> 20);
-    }
-
-
-  }
-
-  /**
-   *
-   * @brief  Process function for the Q7 Linear Interpolation Function.
-   * @param[in] *pYData  pointer to Q7 Linear Interpolation table
-   * @param[in] x input sample to process
-   * @param[in] nValues number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample x is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   */
-
-
-  static __INLINE q7_t arm_linear_interp_q7(
-  q7_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q31_t y;                                     /* output */
-    q7_t y0, y1;                                 /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    uint32_t index;                              /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    if (x < 0)
-    {
-      return (pYData[0]);
-    }
-    index = (x >> 20) & 0xfff;
-
-
-    if(index >= (nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else
-    {
-
-      /* 20 bits for the fractional part */
-      /* fract is in 12.20 format */
-      fract = (x & 0x000FFFFF);
-
-      /* Read two nearest output values from the index and are in 1.7(q7) format */
-      y0 = pYData[index];
-      y1 = pYData[index + 1u];
-
-      /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
-      y = ((y0 * (0xFFFFF - fract)));
-
-      /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
-      y += (y1 * fract);
-
-      /* convert y to 1.7(q7) format */
-      return (y >> 20u);
-
-    }
-
-  }
-  /**
-   * @} end of LinearInterpolate group
-   */
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for floating-point data.
-   * @param[in] x input value in radians.
-   * @return  sin(x).
-   */
-
-  float32_t arm_sin_f32(
-  float32_t x);
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for Q31 data.
-   * @param[in] x Scaled input value in radians.
-   * @return  sin(x).
-   */
-
-  q31_t arm_sin_q31(
-  q31_t x);
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for Q15 data.
-   * @param[in] x Scaled input value in radians.
-   * @return  sin(x).
-   */
-
-  q15_t arm_sin_q15(
-  q15_t x);
-
-  /**
-   * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
-   * @param[in] x input value in radians.
-   * @return  cos(x).
-   */
-
-  float32_t arm_cos_f32(
-  float32_t x);
-
-  /**
-   * @brief Fast approximation to the trigonometric cosine function for Q31 data.
-   * @param[in] x Scaled input value in radians.
-   * @return  cos(x).
-   */
-
-  q31_t arm_cos_q31(
-  q31_t x);
-
-  /**
-   * @brief  Fast approximation to the trigonometric cosine function for Q15 data.
-   * @param[in] x Scaled input value in radians.
-   * @return  cos(x).
-   */
-
-  q15_t arm_cos_q15(
-  q15_t x);
-
-
-  /**
-   * @ingroup groupFastMath
-   */
-
-
-  /**
-   * @defgroup SQRT Square Root
-   *
-   * Computes the square root of a number.
-   * There are separate functions for Q15, Q31, and floating-point data types.
-   * The square root function is computed using the Newton-Raphson algorithm.
-   * This is an iterative algorithm of the form:
-   * 
-   *      x1 = x0 - f(x0)/f'(x0)
-   * 

-   * where x1 is the current estimate,
-   * x0 is the previous estimate, and
-   * f'(x0) is the derivative of f() evaluated at x0.
-   * For the square root function, the algorithm reduces to:
-   * 
-   *     x0 = in/2                         [initial guess]
-   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
-   * 

-   */
-
-
-  /**
-   * @addtogroup SQRT
-   * @{
-   */
-
-  /**
-   * @brief  Floating-point square root function.
-   * @param[in]  in     input value.
-   * @param[out] *pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * in is negative value and returns zero output for negative values.
-   */
-
-  static __INLINE arm_status arm_sqrt_f32(
-  float32_t in,
-  float32_t * pOut)
-  {
-    if(in >= 0.0f)
-    {
-
-//      #if __FPU_USED
-#if (__FPU_USED == 1) && defined ( __CC_ARM   )
-      *pOut = __sqrtf(in);
-#else
-      *pOut = sqrtf(in);
-#endif
-
-      return (ARM_MATH_SUCCESS);
-    }
-    else
-    {
-      *pOut = 0.0f;
-      return (ARM_MATH_ARGUMENT_ERROR);
-    }
-
-  }
-
-
-  /**
-   * @brief Q31 square root function.
-   * @param[in]   in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF.
-   * @param[out]  *pOut square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * in is negative value and returns zero output for negative values.
-   */
-  arm_status arm_sqrt_q31(
-  q31_t in,
-  q31_t * pOut);
-
-  /**
-   * @brief  Q15 square root function.
-   * @param[in]   in     input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF.
-   * @param[out]  *pOut  square root of input value.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * in is negative value and returns zero output for negative values.
-   */
-  arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut);
-
-  /**
-   * @} end of SQRT group
-   */
-
-
-
-
-
-
-  /**
-   * @brief floating-point Circular write function.
-   */
-
-  static __INLINE void arm_circularWrite_f32(
-  int32_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const int32_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0u;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if(wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = wOffset;
-  }
-
-
-
-  /**
-   * @brief floating-point Circular Read function.
-   */
-  static __INLINE void arm_circularRead_f32(
-  int32_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  int32_t * dst,
-  int32_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0u;
-    int32_t rOffset, dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-    dst_end = (int32_t) (dst_base + dst_length);
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if(dst == (int32_t *) dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update rOffset.  Watch out for positive and negative value  */
-      rOffset += bufferInc;
-
-      if(rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-  /**
-   * @brief Q15 Circular write function.
-   */
-
-  static __INLINE void arm_circularWrite_q15(
-  q15_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const q15_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0u;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if(wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = wOffset;
-  }
-
-
-
-  /**
-   * @brief Q15 Circular Read function.
-   */
-  static __INLINE void arm_circularRead_q15(
-  q15_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  q15_t * dst,
-  q15_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0;
-    int32_t rOffset, dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-
-    dst_end = (int32_t) (dst_base + dst_length);
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if(dst == (q15_t *) dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      rOffset += bufferInc;
-
-      if(rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief Q7 Circular write function.
-   */
-
-  static __INLINE void arm_circularWrite_q7(
-  q7_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const q7_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0u;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if(wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = wOffset;
-  }
-
-
-
-  /**
-   * @brief Q7 Circular Read function.
-   */
-  static __INLINE void arm_circularRead_q7(
-  q7_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  q7_t * dst,
-  q7_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0;
-    int32_t rOffset, dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-
-    dst_end = (int32_t) (dst_base + dst_length);
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while(i > 0u)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if(dst == (q7_t *) dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update rOffset.  Watch out for positive and negative value */
-      rOffset += bufferInc;
-
-      if(rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q31 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_power_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult);
-
-  /**
-   * @brief  Sum of the squares of the elements of a floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_power_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q15 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_power_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q63_t * pResult);
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q7 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_power_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-  /**
-   * @brief  Mean value of a Q7 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_mean_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult);
-
-  /**
-   * @brief  Mean value of a Q15 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-  void arm_mean_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-  /**
-   * @brief  Mean value of a Q31 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-  void arm_mean_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-  /**
-   * @brief  Mean value of a floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-  void arm_mean_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-  /**
-   * @brief  Variance of the elements of a floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_var_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-  /**
-   * @brief  Variance of the elements of a Q31 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_var_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-  /**
-   * @brief  Variance of the elements of a Q15 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_var_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-  /**
-   * @brief  Root Mean Square of the elements of a floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_rms_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-  /**
-   * @brief  Root Mean Square of the elements of a Q31 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_rms_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-  /**
-   * @brief  Root Mean Square of the elements of a Q15 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_rms_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-  /**
-   * @brief  Standard deviation of the elements of a floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_std_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult);
-
-  /**
-   * @brief  Standard deviation of the elements of a Q31 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_std_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult);
-
-  /**
-   * @brief  Standard deviation of the elements of a Q15 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output value.
-   * @return none.
-   */
-
-  void arm_std_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult);
-
-  /**
-   * @brief  Floating-point complex magnitude
-   * @param[in]  *pSrc points to the complex input vector
-   * @param[out]  *pDst points to the real output vector
-   * @param[in]  numSamples number of complex samples in the input vector
-   * @return none.
-   */
-
-  void arm_cmplx_mag_f32(
-  float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q31 complex magnitude
-   * @param[in]  *pSrc points to the complex input vector
-   * @param[out]  *pDst points to the real output vector
-   * @param[in]  numSamples number of complex samples in the input vector
-   * @return none.
-   */
-
-  void arm_cmplx_mag_q31(
-  q31_t * pSrc,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q15 complex magnitude
-   * @param[in]  *pSrc points to the complex input vector
-   * @param[out]  *pDst points to the real output vector
-   * @param[in]  numSamples number of complex samples in the input vector
-   * @return none.
-   */
-
-  void arm_cmplx_mag_q15(
-  q15_t * pSrc,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q15 complex dot product
-   * @param[in]  *pSrcA points to the first input vector
-   * @param[in]  *pSrcB points to the second input vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @param[out]  *realResult real part of the result returned here
-   * @param[out]  *imagResult imaginary part of the result returned here
-   * @return none.
-   */
-
-  void arm_cmplx_dot_prod_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  uint32_t numSamples,
-  q31_t * realResult,
-  q31_t * imagResult);
-
-  /**
-   * @brief  Q31 complex dot product
-   * @param[in]  *pSrcA points to the first input vector
-   * @param[in]  *pSrcB points to the second input vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @param[out]  *realResult real part of the result returned here
-   * @param[out]  *imagResult imaginary part of the result returned here
-   * @return none.
-   */
-
-  void arm_cmplx_dot_prod_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  uint32_t numSamples,
-  q63_t * realResult,
-  q63_t * imagResult);
-
-  /**
-   * @brief  Floating-point complex dot product
-   * @param[in]  *pSrcA points to the first input vector
-   * @param[in]  *pSrcB points to the second input vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @param[out]  *realResult real part of the result returned here
-   * @param[out]  *imagResult imaginary part of the result returned here
-   * @return none.
-   */
-
-  void arm_cmplx_dot_prod_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  uint32_t numSamples,
-  float32_t * realResult,
-  float32_t * imagResult);
-
-  /**
-   * @brief  Q15 complex-by-real multiplication
-   * @param[in]  *pSrcCmplx points to the complex input vector
-   * @param[in]  *pSrcReal points to the real input vector
-   * @param[out]  *pCmplxDst points to the complex output vector
-   * @param[in]  numSamples number of samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_mult_real_q15(
-  q15_t * pSrcCmplx,
-  q15_t * pSrcReal,
-  q15_t * pCmplxDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q31 complex-by-real multiplication
-   * @param[in]  *pSrcCmplx points to the complex input vector
-   * @param[in]  *pSrcReal points to the real input vector
-   * @param[out]  *pCmplxDst points to the complex output vector
-   * @param[in]  numSamples number of samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_mult_real_q31(
-  q31_t * pSrcCmplx,
-  q31_t * pSrcReal,
-  q31_t * pCmplxDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Floating-point complex-by-real multiplication
-   * @param[in]  *pSrcCmplx points to the complex input vector
-   * @param[in]  *pSrcReal points to the real input vector
-   * @param[out]  *pCmplxDst points to the complex output vector
-   * @param[in]  numSamples number of samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_mult_real_f32(
-  float32_t * pSrcCmplx,
-  float32_t * pSrcReal,
-  float32_t * pCmplxDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Minimum value of a Q7 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *result is output pointer
-   * @param[in]  index is the array index of the minimum value in the input buffer.
-   * @return none.
-   */
-
-  void arm_min_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * result,
-  uint32_t * index);
-
-  /**
-   * @brief  Minimum value of a Q15 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output pointer
-   * @param[in]  *pIndex is the array index of the minimum value in the input buffer.
-   * @return none.
-   */
-
-  void arm_min_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex);
-
-  /**
-   * @brief  Minimum value of a Q31 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output pointer
-   * @param[out]  *pIndex is the array index of the minimum value in the input buffer.
-   * @return none.
-   */
-  void arm_min_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex);
-
-  /**
-   * @brief  Minimum value of a floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @param[out]  *pResult is output pointer
-   * @param[out]  *pIndex is the array index of the minimum value in the input buffer.
-   * @return none.
-   */
-
-  void arm_min_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex);
-
-/**
- * @brief Maximum value of a Q7 vector.
- * @param[in]       *pSrc points to the input buffer
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult maximum value returned here
- * @param[out]      *pIndex index of maximum value returned here
- * @return none.
- */
-
-  void arm_max_q7(
-  q7_t * pSrc,
-  uint32_t blockSize,
-  q7_t * pResult,
-  uint32_t * pIndex);
-
-/**
- * @brief Maximum value of a Q15 vector.
- * @param[in]       *pSrc points to the input buffer
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult maximum value returned here
- * @param[out]      *pIndex index of maximum value returned here
- * @return none.
- */
-
-  void arm_max_q15(
-  q15_t * pSrc,
-  uint32_t blockSize,
-  q15_t * pResult,
-  uint32_t * pIndex);
-
-/**
- * @brief Maximum value of a Q31 vector.
- * @param[in]       *pSrc points to the input buffer
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult maximum value returned here
- * @param[out]      *pIndex index of maximum value returned here
- * @return none.
- */
-
-  void arm_max_q31(
-  q31_t * pSrc,
-  uint32_t blockSize,
-  q31_t * pResult,
-  uint32_t * pIndex);
-
-/**
- * @brief Maximum value of a floating-point vector.
- * @param[in]       *pSrc points to the input buffer
- * @param[in]       blockSize length of the input vector
- * @param[out]      *pResult maximum value returned here
- * @param[out]      *pIndex index of maximum value returned here
- * @return none.
- */
-
-  void arm_max_f32(
-  float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex);
-
-  /**
-   * @brief  Q15 complex-by-complex multiplication
-   * @param[in]  *pSrcA points to the first input vector
-   * @param[in]  *pSrcB points to the second input vector
-   * @param[out]  *pDst  points to the output vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_mult_cmplx_q15(
-  q15_t * pSrcA,
-  q15_t * pSrcB,
-  q15_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Q31 complex-by-complex multiplication
-   * @param[in]  *pSrcA points to the first input vector
-   * @param[in]  *pSrcB points to the second input vector
-   * @param[out]  *pDst  points to the output vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_mult_cmplx_q31(
-  q31_t * pSrcA,
-  q31_t * pSrcB,
-  q31_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief  Floating-point complex-by-complex multiplication
-   * @param[in]  *pSrcA points to the first input vector
-   * @param[in]  *pSrcB points to the second input vector
-   * @param[out]  *pDst  points to the output vector
-   * @param[in]  numSamples number of complex samples in each vector
-   * @return none.
-   */
-
-  void arm_cmplx_mult_cmplx_f32(
-  float32_t * pSrcA,
-  float32_t * pSrcB,
-  float32_t * pDst,
-  uint32_t numSamples);
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q31 vector.
-   * @param[in]       *pSrc points to the floating-point input vector
-   * @param[out]      *pDst points to the Q31 output vector
-   * @param[in]       blockSize length of the input vector
-   * @return none.
-   */
-  void arm_float_to_q31(
-  float32_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q15 vector.
-   * @param[in]       *pSrc points to the floating-point input vector
-   * @param[out]      *pDst points to the Q15 output vector
-   * @param[in]       blockSize length of the input vector
-   * @return          none
-   */
-  void arm_float_to_q15(
-  float32_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q7 vector.
-   * @param[in]       *pSrc points to the floating-point input vector
-   * @param[out]      *pDst points to the Q7 output vector
-   * @param[in]       blockSize length of the input vector
-   * @return          none
-   */
-  void arm_float_to_q7(
-  float32_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to Q15 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[out]  *pDst is output pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @return none.
-   */
-  void arm_q31_to_q15(
-  q31_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to Q7 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[out]  *pDst is output pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @return none.
-   */
-  void arm_q31_to_q7(
-  q31_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to floating-point vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[out]  *pDst is output pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @return none.
-   */
-  void arm_q15_to_float(
-  q15_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to Q31 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[out]  *pDst is output pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @return none.
-   */
-  void arm_q15_to_q31(
-  q15_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to Q7 vector.
-   * @param[in]  *pSrc is input pointer
-   * @param[out]  *pDst is output pointer
-   * @param[in]  blockSize is the number of samples to process
-   * @return none.
-   */
-  void arm_q15_to_q7(
-  q15_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize);
-
-
-  /**
-   * @ingroup groupInterpolation
-   */
-
-  /**
-   * @defgroup BilinearInterpolate Bilinear Interpolation
-   *
-   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
-   * The underlying function f(x, y) is sampled on a regular grid and the interpolation process
-   * determines values between the grid points.
-   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
-   * Bilinear interpolation is often used in image processing to rescale images.
-   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
-   *
-   * Algorithm
-   * \par
-   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
-   * For floating-point, the instance structure is defined as:
-   * 
-   *   typedef struct
-   *   {
-   *     uint16_t numRows;
-   *     uint16_t numCols;
-   *     float32_t *pData;
-   * } arm_bilinear_interp_instance_f32;
-   * 

-   *
-   * \par
-   * where numRows specifies the number of rows in the table;
-   * numCols specifies the number of columns in the table;
-   * and pData points to an array of size numRows*numCols values.
-   * The data table pTable is organized in row order and the supplied data values fall on integer indexes.
-   * That is, table element (x,y) is located at pTable[x + y*numCols] where x and y are integers.
-   *
-   * \par
-   * Let (x, y) specify the desired interpolation point.  Then define:
-   * 
-   *     XF = floor(x)
-   *     YF = floor(y)
-   * 

-   * \par
-   * The interpolated output point is computed as:
-   * 
-   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
-   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
-   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
-   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
-   * 

-   * Note that the coordinates (x, y) contain integer and fractional components.
-   * The integer components specify which portion of the table to use while the
-   * fractional components control the interpolation processor.
-   *
-   * \par
-   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
-   */
-
-  /**
-   * @addtogroup BilinearInterpolate
-   * @{
-   */
-
-  /**
-  *
-  * @brief  Floating-point bilinear interpolation.
-  * @param[in,out] *S points to an instance of the interpolation structure.
-  * @param[in] X interpolation coordinate.
-  * @param[in] Y interpolation coordinate.
-  * @return out interpolated value.
-  */
-
-
-  static __INLINE float32_t arm_bilinear_interp_f32(
-  const arm_bilinear_interp_instance_f32 * S,
-  float32_t X,
-  float32_t Y)
-  {
-    float32_t out;
-    float32_t f00, f01, f10, f11;
-    float32_t *pData = S->pData;
-    int32_t xIndex, yIndex, index;
-    float32_t xdiff, ydiff;
-    float32_t b1, b2, b3, b4;
-
-    xIndex = (int32_t) X;
-    yIndex = (int32_t) Y;
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if(xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0
-       || yIndex > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* Calculation of index for two nearest points in X-direction */
-    index = (xIndex - 1) + (yIndex - 1) * S->numCols;
-
-
-    /* Read two nearest points in X-direction */
-    f00 = pData[index];
-    f01 = pData[index + 1];
-
-    /* Calculation of index for two nearest points in Y-direction */
-    index = (xIndex - 1) + (yIndex) * S->numCols;
-
-
-    /* Read two nearest points in Y-direction */
-    f10 = pData[index];
-    f11 = pData[index + 1];
-
-    /* Calculation of intermediate values */
-    b1 = f00;
-    b2 = f01 - f00;
-    b3 = f10 - f00;
-    b4 = f00 - f01 - f10 + f11;
-
-    /* Calculation of fractional part in X */
-    xdiff = X - xIndex;
-
-    /* Calculation of fractional part in Y */
-    ydiff = Y - yIndex;
-
-    /* Calculation of bi-linear interpolated output */
-    out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
-
-    /* return to application */
-    return (out);
-
-  }
-
-  /**
-  *
-  * @brief  Q31 bilinear interpolation.
-  * @param[in,out] *S points to an instance of the interpolation structure.
-  * @param[in] X interpolation coordinate in 12.20 format.
-  * @param[in] Y interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-
-  static __INLINE q31_t arm_bilinear_interp_q31(
-  arm_bilinear_interp_instance_q31 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q31_t out;                                   /* Temporary output */
-    q31_t acc = 0;                               /* output */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    q31_t x1, x2, y1, y2;                        /* Nearest output values */
-    int32_t rI, cI;                              /* Row and column indices */
-    q31_t *pYData = S->pData;                    /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & 0xFFF00000) >> 20u);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & 0xFFF00000) >> 20u);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* shift left xfract by 11 to keep 1.31 format */
-    xfract = (X & 0x000FFFFF) << 11u;
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[(rI) + nCols * (cI)];
-    x2 = pYData[(rI) + nCols * (cI) + 1u];
-
-    /* 20 bits for the fractional part */
-    /* shift left yfract by 11 to keep 1.31 format */
-    yfract = (Y & 0x000FFFFF) << 11u;
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[(rI) + nCols * (cI + 1)];
-    y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
-    out = ((q31_t) (((q63_t) x1 * (0x7FFFFFFF - xfract)) >> 32));
-    acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
-
-    /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
-
-    /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
-    /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
-    /* Convert acc to 1.31(q31) format */
-    return (acc << 2u);
-
-  }
-
-  /**
-  * @brief  Q15 bilinear interpolation.
-  * @param[in,out] *S points to an instance of the interpolation structure.
-  * @param[in] X interpolation coordinate in 12.20 format.
-  * @param[in] Y interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-
-  static __INLINE q15_t arm_bilinear_interp_q15(
-  arm_bilinear_interp_instance_q15 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q63_t acc = 0;                               /* output */
-    q31_t out;                                   /* Temporary output */
-    q15_t x1, x2, y1, y2;                        /* Nearest output values */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    int32_t rI, cI;                              /* Row and column indices */
-    q15_t *pYData = S->pData;                    /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & 0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & 0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* xfract should be in 12.20 format */
-    xfract = (X & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[(rI) + nCols * (cI)];
-    x2 = pYData[(rI) + nCols * (cI) + 1u];
-
-
-    /* 20 bits for the fractional part */
-    /* yfract should be in 12.20 format */
-    yfract = (Y & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[(rI) + nCols * (cI + 1)];
-    y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
-
-    /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
-    /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
-    out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4u);
-    acc = ((q63_t) out * (0xFFFFF - yfract));
-
-    /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4u);
-    acc += ((q63_t) out * (xfract));
-
-    /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4u);
-    acc += ((q63_t) out * (yfract));
-
-    /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) y2 * (xfract)) >> 4u);
-    acc += ((q63_t) out * (yfract));
-
-    /* acc is in 13.51 format and down shift acc by 36 times */
-    /* Convert out to 1.15 format */
-    return (acc >> 36);
-
-  }
-
-  /**
-  * @brief  Q7 bilinear interpolation.
-  * @param[in,out] *S points to an instance of the interpolation structure.
-  * @param[in] X interpolation coordinate in 12.20 format.
-  * @param[in] Y interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-
-  static __INLINE q7_t arm_bilinear_interp_q7(
-  arm_bilinear_interp_instance_q7 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q63_t acc = 0;                               /* output */
-    q31_t out;                                   /* Temporary output */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    q7_t x1, x2, y1, y2;                         /* Nearest output values */
-    int32_t rI, cI;                              /* Row and column indices */
-    q7_t *pYData = S->pData;                     /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & 0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & 0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if(rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* xfract should be in 12.20 format */
-    xfract = (X & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[(rI) + nCols * (cI)];
-    x2 = pYData[(rI) + nCols * (cI) + 1u];
-
-
-    /* 20 bits for the fractional part */
-    /* yfract should be in 12.20 format */
-    yfract = (Y & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[(rI) + nCols * (cI + 1)];
-    y2 = pYData[(rI) + nCols * (cI + 1) + 1u];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
-    out = ((x1 * (0xFFFFF - xfract)));
-    acc = (((q63_t) out * (0xFFFFF - yfract)));
-
-    /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
-    out = ((x2 * (0xFFFFF - yfract)));
-    acc += (((q63_t) out * (xfract)));
-
-    /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
-    out = ((y1 * (0xFFFFF - xfract)));
-    acc += (((q63_t) out * (yfract)));
-
-    /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
-    out = ((y2 * (yfract)));
-    acc += (((q63_t) out * (xfract)));
-
-    /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
-    return (acc >> 40);
-
-  }
-
-  /**
-   * @} end of BilinearInterpolate group
-   */
-   
-
-//SMMLAR
-#define multAcc_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
-
-//SMMLSR
-#define multSub_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
-
-//SMMULR
-#define mult_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
-
-//SMMLA
-#define multAcc_32x32_keep32(a, x, y) \
-    a += (q31_t) (((q63_t) x * y) >> 32)
-
-//SMMLS
-#define multSub_32x32_keep32(a, x, y) \
-    a -= (q31_t) (((q63_t) x * y) >> 32)
-
-//SMMUL
-#define mult_32x32_keep32(a, x, y) \
-    a = (q31_t) (((q63_t) x * y ) >> 32)
-
-
-#if defined ( __CC_ARM ) //Keil
-
-//Enter low optimization region - place directly above function definition
-    #ifdef ARM_MATH_CM4
-      #define LOW_OPTIMIZATION_ENTER \
-         _Pragma ("push")         \
-         _Pragma ("O1")
-    #else
-      #define LOW_OPTIMIZATION_ENTER 
-    #endif
-
-//Exit low optimization region - place directly after end of function definition
-    #ifdef ARM_MATH_CM4
-      #define LOW_OPTIMIZATION_EXIT \
-         _Pragma ("pop")
-    #else
-      #define LOW_OPTIMIZATION_EXIT  
-    #endif
-
-//Enter low optimization region - place directly above function definition
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-
-//Exit low optimization region - place directly after end of function definition
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__ICCARM__) //IAR
-
-//Enter low optimization region - place directly above function definition
-    #ifdef ARM_MATH_CM4
-      #define LOW_OPTIMIZATION_ENTER \
-         _Pragma ("optimize=low")
-    #else
-      #define LOW_OPTIMIZATION_ENTER   
-    #endif
-
-//Exit low optimization region - place directly after end of function definition
-  #define LOW_OPTIMIZATION_EXIT
-
-//Enter low optimization region - place directly above function definition
-    #ifdef ARM_MATH_CM4
-      #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
-         _Pragma ("optimize=low")
-    #else
-      #define IAR_ONLY_LOW_OPTIMIZATION_ENTER   
-    #endif
-
-//Exit low optimization region - place directly after end of function definition
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__GNUC__)
-
-  #define LOW_OPTIMIZATION_ENTER __attribute__(( optimize("-O1") ))
-
-  #define LOW_OPTIMIZATION_EXIT
-
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__CSMC__)		// Cosmic
-
-#define LOW_OPTIMIZATION_ENTER
-#define LOW_OPTIMIZATION_EXIT
-#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined(__TASKING__)		// TASKING
-
-#define LOW_OPTIMIZATION_ENTER
-#define LOW_OPTIMIZATION_EXIT
-#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#endif
-
-
-#ifdef	__cplusplus
-}
-#endif
-
-
-#endif /* _ARM_MATH_H */
-
-/**
- *
- * End of file.
- */
diff --git a/Libraries/CMSIS/Include/cmsis_armcc.h b/Libraries/CMSIS/Include/cmsis_armcc.h
new file mode 100644
index 00000000..da9d654e
--- /dev/null
+++ b/Libraries/CMSIS/Include/cmsis_armcc.h
@@ -0,0 +1,894 @@
+/**************************************************************************//**
+ * @file     cmsis_armcc.h
+ * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
+ * @version  V5.1.0
+ * @date     08. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_ARMCC_H
+#define __CMSIS_ARMCC_H
+
+
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
+  #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
+#endif
+
+/* CMSIS compiler control architecture macros */
+#if ((defined (__TARGET_ARCH_6_M  ) && (__TARGET_ARCH_6_M   == 1)) || \
+     (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M  == 1))   )
+  #define __ARM_ARCH_6M__           1
+#endif
+
+#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M  == 1))
+  #define __ARM_ARCH_7M__           1
+#endif
+
+#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
+  #define __ARM_ARCH_7EM__          1
+#endif
+
+  /* __ARM_ARCH_8M_BASE__  not applicable */
+  /* __ARM_ARCH_8M_MAIN__  not applicable */
+
+/* CMSIS compiler control DSP macros */
+#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+  #define __ARM_FEATURE_DSP         1
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               __inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static __inline
+#endif
+#ifndef   __STATIC_FORCEINLINE                 
+  #define __STATIC_FORCEINLINE                   static __forceinline
+#endif           
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __declspec(noreturn)
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        __packed struct
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         __packed union
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #define __UNALIGNED_UINT32(x)                  (*((__packed uint32_t *)(x)))
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __memory_changed()
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __enable_irq();     */
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __disable_irq();    */
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+  register uint32_t __regControl         __ASM("control");
+  return(__regControl);
+}
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+  register uint32_t __regControl         __ASM("control");
+  __regControl = control;
+}
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_IPSR(void)
+{
+  register uint32_t __regIPSR          __ASM("ipsr");
+  return(__regIPSR);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_INLINE uint32_t __get_APSR(void)
+{
+  register uint32_t __regAPSR          __ASM("apsr");
+  return(__regAPSR);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_xPSR(void)
+{
+  register uint32_t __regXPSR          __ASM("xpsr");
+  return(__regXPSR);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_INLINE uint32_t __get_PSP(void)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  return(__regProcessStackPointer);
+}
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  __regProcessStackPointer = topOfProcStack;
+}
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_INLINE uint32_t __get_MSP(void)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  return(__regMainStackPointer);
+}
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  __regMainStackPointer = topOfMainStack;
+}
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  return(__regPriMask);
+}
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  __regPriMask = (priMask);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_INLINE uint32_t  __get_BASEPRI(void)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  return(__regBasePri);
+}
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  __regBasePri = (basePri & 0xFFU);
+}
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  register uint32_t __regBasePriMax      __ASM("basepri_max");
+  __regBasePriMax = (basePri & 0xFFU);
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  return(__regFaultMask);
+}
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  __regFaultMask = (faultMask & (uint32_t)1U);
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+__STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+  register uint32_t __regfpscr         __ASM("fpscr");
+  return(__regfpscr);
+#else
+   return(0U);
+#endif
+}
+
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+  register uint32_t __regfpscr         __ASM("fpscr");
+  __regfpscr = (fpscr);
+#else
+  (void)fpscr;
+#endif
+}
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP                             __nop
+
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI                             __wfi
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE                             __wfe
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV                             __sev
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+#define __ISB() do {\
+                   __schedule_barrier();\
+                   __isb(0xF);\
+                   __schedule_barrier();\
+                } while (0U)
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB() do {\
+                   __schedule_barrier();\
+                   __dsb(0xF);\
+                   __schedule_barrier();\
+                } while (0U)
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+#define __DMB() do {\
+                   __schedule_barrier();\
+                   __dmb(0xF);\
+                   __schedule_barrier();\
+                } while (0U)
+
+                  
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV                             __rev
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
+{
+  rev16 r0, r0
+  bx lr
+}
+#endif
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
+{
+  revsh r0, r0
+  bx lr
+}
+#endif
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+#define __ROR                             __ror
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __breakpoint(value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+  #define __RBIT                          __rbit
+#else
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result;
+  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
+
+  result = value;                      /* r will be reversed bits of v; first get LSB of v */
+  for (value >>= 1U; value != 0U; value >>= 1U)
+  {
+    result <<= 1U;
+    result |= value & 1U;
+    s--;
+  }
+  result <<= s;                        /* shift when v's highest bits are zero */
+  return result;
+}
+#endif
+
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+#define __CLZ                             __clz
+
+
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))
+#else
+  #define __LDREXB(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr))  _Pragma("pop")
+#endif
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))
+#else
+  #define __LDREXH(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr))  _Pragma("pop")
+#endif
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))
+#else
+  #define __LDREXW(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr))  _Pragma("pop")
+#endif
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __STREXB(value, ptr)                                                 __strex(value, ptr)
+#else
+  #define __STREXB(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#endif
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __STREXH(value, ptr)                                                 __strex(value, ptr)
+#else
+  #define __STREXH(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#endif
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __STREXW(value, ptr)                                                 __strex(value, ptr)
+#else
+  #define __STREXW(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#endif
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX                           __clrex
+
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT                            __ssat
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT                            __usat
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
+{
+  rrx r0, r0
+  bx lr
+}
+#endif
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+#define __STRBT(value, ptr)               __strt(value, ptr)
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+#define __STRHT(value, ptr)               __strt(value, ptr)
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+#define __STRT(value, ptr)                __strt(value, ptr)
+
+#else  /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+
+#define __SADD8                           __sadd8
+#define __QADD8                           __qadd8
+#define __SHADD8                          __shadd8
+#define __UADD8                           __uadd8
+#define __UQADD8                          __uqadd8
+#define __UHADD8                          __uhadd8
+#define __SSUB8                           __ssub8
+#define __QSUB8                           __qsub8
+#define __SHSUB8                          __shsub8
+#define __USUB8                           __usub8
+#define __UQSUB8                          __uqsub8
+#define __UHSUB8                          __uhsub8
+#define __SADD16                          __sadd16
+#define __QADD16                          __qadd16
+#define __SHADD16                         __shadd16
+#define __UADD16                          __uadd16
+#define __UQADD16                         __uqadd16
+#define __UHADD16                         __uhadd16
+#define __SSUB16                          __ssub16
+#define __QSUB16                          __qsub16
+#define __SHSUB16                         __shsub16
+#define __USUB16                          __usub16
+#define __UQSUB16                         __uqsub16
+#define __UHSUB16                         __uhsub16
+#define __SASX                            __sasx
+#define __QASX                            __qasx
+#define __SHASX                           __shasx
+#define __UASX                            __uasx
+#define __UQASX                           __uqasx
+#define __UHASX                           __uhasx
+#define __SSAX                            __ssax
+#define __QSAX                            __qsax
+#define __SHSAX                           __shsax
+#define __USAX                            __usax
+#define __UQSAX                           __uqsax
+#define __UHSAX                           __uhsax
+#define __USAD8                           __usad8
+#define __USADA8                          __usada8
+#define __SSAT16                          __ssat16
+#define __USAT16                          __usat16
+#define __UXTB16                          __uxtb16
+#define __UXTAB16                         __uxtab16
+#define __SXTB16                          __sxtb16
+#define __SXTAB16                         __sxtab16
+#define __SMUAD                           __smuad
+#define __SMUADX                          __smuadx
+#define __SMLAD                           __smlad
+#define __SMLADX                          __smladx
+#define __SMLALD                          __smlald
+#define __SMLALDX                         __smlaldx
+#define __SMUSD                           __smusd
+#define __SMUSDX                          __smusdx
+#define __SMLSD                           __smlsd
+#define __SMLSDX                          __smlsdx
+#define __SMLSLD                          __smlsld
+#define __SMLSLDX                         __smlsldx
+#define __SEL                             __sel
+#define __QADD                            __qadd
+#define __QSUB                            __qsub
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
+                                                      ((int64_t)(ARG3) << 32U)     ) >> 32U))
+
+#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCC_H */
diff --git a/Libraries/CMSIS/Include/cmsis_armclang.h b/Libraries/CMSIS/Include/cmsis_armclang.h
new file mode 100644
index 00000000..478f75bb
--- /dev/null
+++ b/Libraries/CMSIS/Include/cmsis_armclang.h
@@ -0,0 +1,1444 @@
+/**************************************************************************//**
+ * @file     cmsis_armclang.h
+ * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
+ * @version  V5.2.0
+ * @date     08. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
+
+#ifndef __CMSIS_ARMCLANG_H
+#define __CMSIS_ARMCLANG_H
+
+#pragma clang system_header   /* treat file as system include file */
+
+#ifndef __ARM_COMPAT_H
+#include     /* Compatibility header for Arm Compiler 5 intrinsics */
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               __inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static __inline
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
+#endif
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __attribute__((__noreturn__))
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __enable_irq();  see arm_compat.h */
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __disable_irq();  see arm_compat.h */
+
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Control Register (non-secure)
+  \details Returns the content of the non-secure Control Register when in secure mode.
+  \return               non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Control Register (non-secure)
+  \details Writes the given value to the non-secure Control Register when in secure state.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Main Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Main Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Priority Mask (non-secure)
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Priority Mask (non-secure)
+  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Base Priority (non-secure)
+  \details Returns the current value of the non-secure Base Priority register when in secure state.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Base Priority (non-secure)
+  \details Assigns the given value to the non-secure Base Priority register when in secure state.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Fault Mask (non-secure)
+  \details Returns the current value of the non-secure Fault Mask register when in secure state.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Fault Mask (non-secure)
+  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+/**
+  \brief   Get Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+  
+  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
+  return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+  
+  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+  return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Get Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
+#else
+#define __get_FPSCR()      ((uint32_t)0U)
+#endif
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __set_FPSCR      __builtin_arm_set_fpscr
+#else
+#define __set_FPSCR(x)      ((void)(x))
+#endif
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_RW_REG(r) "+l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_RW_REG(r) "+r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP          __builtin_arm_nop
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI          __builtin_arm_wfi
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE          __builtin_arm_wfe
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV          __builtin_arm_sev
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+#define __ISB()        __builtin_arm_isb(0xF)
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()        __builtin_arm_dsb(0xF)
+
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+#define __DMB()        __builtin_arm_dmb(0xF)
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV(value)   __builtin_bswap32(value)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV16(value) __ROR(__REV(value), 16)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REVSH(value) (int16_t)__builtin_bswap16(value)
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)     __ASM volatile ("bkpt "#value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __RBIT            __builtin_arm_rbit
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB        (uint8_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH        (uint16_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW        (uint32_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXB        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXH        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXW        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX             __builtin_arm_clrex
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT             __builtin_arm_ssat
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT             __builtin_arm_usat
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   Load-Acquire (8 bit)
+  \details Executes a LDAB instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (16 bit)
+  \details Executes a LDAH instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (32 bit)
+  \details Executes a LDA instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   Store-Release (8 bit)
+  \details Executes a STLB instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (16 bit)
+  \details Executes a STLH instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (32 bit)
+  \details Executes a STL instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (8 bit)
+  \details Executes a LDAB exclusive instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (16 bit)
+  \details Executes a LDAH exclusive instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (32 bit)
+  \details Executes a LDA exclusive instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Store-Release Exclusive (8 bit)
+  \details Executes a STLB exclusive instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (16 bit)
+  \details Executes a STLH exclusive instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (32 bit)
+  \details Executes a STL exclusive instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEX                  (uint32_t)__builtin_arm_stlex
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+
+#define     __SADD8                 __builtin_arm_sadd8
+#define     __QADD8                 __builtin_arm_qadd8
+#define     __SHADD8                __builtin_arm_shadd8
+#define     __UADD8                 __builtin_arm_uadd8
+#define     __UQADD8                __builtin_arm_uqadd8
+#define     __UHADD8                __builtin_arm_uhadd8
+#define     __SSUB8                 __builtin_arm_ssub8
+#define     __QSUB8                 __builtin_arm_qsub8
+#define     __SHSUB8                __builtin_arm_shsub8
+#define     __USUB8                 __builtin_arm_usub8
+#define     __UQSUB8                __builtin_arm_uqsub8
+#define     __UHSUB8                __builtin_arm_uhsub8
+#define     __SADD16                __builtin_arm_sadd16
+#define     __QADD16                __builtin_arm_qadd16
+#define     __SHADD16               __builtin_arm_shadd16
+#define     __UADD16                __builtin_arm_uadd16
+#define     __UQADD16               __builtin_arm_uqadd16
+#define     __UHADD16               __builtin_arm_uhadd16
+#define     __SSUB16                __builtin_arm_ssub16
+#define     __QSUB16                __builtin_arm_qsub16
+#define     __SHSUB16               __builtin_arm_shsub16
+#define     __USUB16                __builtin_arm_usub16
+#define     __UQSUB16               __builtin_arm_uqsub16
+#define     __UHSUB16               __builtin_arm_uhsub16
+#define     __SASX                  __builtin_arm_sasx
+#define     __QASX                  __builtin_arm_qasx
+#define     __SHASX                 __builtin_arm_shasx
+#define     __UASX                  __builtin_arm_uasx
+#define     __UQASX                 __builtin_arm_uqasx
+#define     __UHASX                 __builtin_arm_uhasx
+#define     __SSAX                  __builtin_arm_ssax
+#define     __QSAX                  __builtin_arm_qsax
+#define     __SHSAX                 __builtin_arm_shsax
+#define     __USAX                  __builtin_arm_usax
+#define     __UQSAX                 __builtin_arm_uqsax
+#define     __UHSAX                 __builtin_arm_uhsax
+#define     __USAD8                 __builtin_arm_usad8
+#define     __USADA8                __builtin_arm_usada8
+#define     __SSAT16                __builtin_arm_ssat16
+#define     __USAT16                __builtin_arm_usat16
+#define     __UXTB16                __builtin_arm_uxtb16
+#define     __UXTAB16               __builtin_arm_uxtab16
+#define     __SXTB16                __builtin_arm_sxtb16
+#define     __SXTAB16               __builtin_arm_sxtab16
+#define     __SMUAD                 __builtin_arm_smuad
+#define     __SMUADX                __builtin_arm_smuadx
+#define     __SMLAD                 __builtin_arm_smlad
+#define     __SMLADX                __builtin_arm_smladx
+#define     __SMLALD                __builtin_arm_smlald
+#define     __SMLALDX               __builtin_arm_smlaldx
+#define     __SMUSD                 __builtin_arm_smusd
+#define     __SMUSDX                __builtin_arm_smusdx
+#define     __SMLSD                 __builtin_arm_smlsd
+#define     __SMLSDX                __builtin_arm_smlsdx
+#define     __SMLSLD                __builtin_arm_smlsld
+#define     __SMLSLDX               __builtin_arm_smlsldx
+#define     __SEL                   __builtin_arm_sel
+#define     __QADD                  __builtin_arm_qadd
+#define     __QSUB                  __builtin_arm_qsub
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+  int32_t result;
+
+  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCLANG_H */
diff --git a/Libraries/CMSIS/Include/cmsis_armclang_ltm.h b/Libraries/CMSIS/Include/cmsis_armclang_ltm.h
new file mode 100644
index 00000000..1b5a9652
--- /dev/null
+++ b/Libraries/CMSIS/Include/cmsis_armclang_ltm.h
@@ -0,0 +1,1891 @@
+/**************************************************************************//**
+ * @file     cmsis_armclang_ltm.h
+ * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
+ * @version  V1.2.0
+ * @date     08. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
+
+#ifndef __CMSIS_ARMCLANG_H
+#define __CMSIS_ARMCLANG_H
+
+#pragma clang system_header   /* treat file as system include file */
+
+#ifndef __ARM_COMPAT_H
+#include     /* Compatibility header for Arm Compiler 5 intrinsics */
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               __inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static __inline
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
+#endif
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __attribute__((__noreturn__))
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
+#endif
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __enable_irq();  see arm_compat.h */
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __disable_irq();  see arm_compat.h */
+
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Control Register (non-secure)
+  \details Returns the content of the non-secure Control Register when in secure mode.
+  \return               non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Control Register (non-secure)
+  \details Writes the given value to the non-secure Control Register when in secure state.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Main Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Main Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Priority Mask (non-secure)
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Priority Mask (non-secure)
+  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Base Priority (non-secure)
+  \details Returns the current value of the non-secure Base Priority register when in secure state.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Base Priority (non-secure)
+  \details Assigns the given value to the non-secure Base Priority register when in secure state.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Fault Mask (non-secure)
+  \details Returns the current value of the non-secure Fault Mask register when in secure state.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Fault Mask (non-secure)
+  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+/**
+  \brief   Get Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+  
+  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
+  return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+  
+  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+  return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Get Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
+#else
+#define __get_FPSCR()      ((uint32_t)0U)
+#endif
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __set_FPSCR      __builtin_arm_set_fpscr
+#else
+#define __set_FPSCR(x)      ((void)(x))
+#endif
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP          __builtin_arm_nop
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI          __builtin_arm_wfi
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE          __builtin_arm_wfe
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV          __builtin_arm_sev
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+#define __ISB()        __builtin_arm_isb(0xF)
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()        __builtin_arm_dsb(0xF)
+
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+#define __DMB()        __builtin_arm_dmb(0xF)
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV(value)   __builtin_bswap32(value)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV16(value) __ROR(__REV(value), 16)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REVSH(value) (int16_t)__builtin_bswap16(value)
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)     __ASM volatile ("bkpt "#value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __RBIT            __builtin_arm_rbit
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB        (uint8_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH        (uint16_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW        (uint32_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXB        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXH        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXW        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX             __builtin_arm_clrex
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT             __builtin_arm_ssat
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT             __builtin_arm_usat
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   Load-Acquire (8 bit)
+  \details Executes a LDAB instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (16 bit)
+  \details Executes a LDAH instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (32 bit)
+  \details Executes a LDA instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   Store-Release (8 bit)
+  \details Executes a STLB instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (16 bit)
+  \details Executes a STLH instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (32 bit)
+  \details Executes a STL instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (8 bit)
+  \details Executes a LDAB exclusive instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (16 bit)
+  \details Executes a LDAH exclusive instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (32 bit)
+  \details Executes a LDA exclusive instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Store-Release Exclusive (8 bit)
+  \details Executes a STLB exclusive instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (16 bit)
+  \details Executes a STLH exclusive instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (32 bit)
+  \details Executes a STL exclusive instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEX                  (uint32_t)__builtin_arm_stlex
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+
+__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({                          \
+  int32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+  int32_t result;
+
+  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCLANG_H */
diff --git a/Libraries/CMSIS/Include/cmsis_compiler.h b/Libraries/CMSIS/Include/cmsis_compiler.h
new file mode 100644
index 00000000..21a2c711
--- /dev/null
+++ b/Libraries/CMSIS/Include/cmsis_compiler.h
@@ -0,0 +1,283 @@
+/**************************************************************************//**
+ * @file     cmsis_compiler.h
+ * @brief    CMSIS compiler generic header file
+ * @version  V5.1.0
+ * @date     09. October 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_COMPILER_H
+#define __CMSIS_COMPILER_H
+
+#include 
+
+/*
+ * Arm Compiler 4/5
+ */
+#if   defined ( __CC_ARM )
+  #include "cmsis_armcc.h"
+
+
+/*
+ * Arm Compiler 6.6 LTM (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
+  #include "cmsis_armclang_ltm.h"
+
+  /*
+ * Arm Compiler above 6.10.1 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
+  #include "cmsis_armclang.h"
+
+
+/*
+ * GNU Compiler
+ */
+#elif defined ( __GNUC__ )
+  #include "cmsis_gcc.h"
+
+
+/*
+ * IAR Compiler
+ */
+#elif defined ( __ICCARM__ )
+  #include 
+
+
+/*
+ * TI Arm Compiler
+ */
+#elif defined ( __TI_ARM__ )
+  #include 
+
+  #ifndef   __ASM
+    #define __ASM                                  __asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    #define __NO_RETURN                            __attribute__((noreturn))
+  #endif
+  #ifndef   __USED
+    #define __USED                                 __attribute__((used))
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __attribute__((weak))
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               __attribute__((packed))
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __attribute__((packed))
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         union __attribute__((packed))
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)                           __attribute__((aligned(x)))
+  #endif
+  #ifndef   __RESTRICT
+    #define __RESTRICT                             __restrict
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+/*
+ * TASKING Compiler
+ */
+#elif defined ( __TASKING__ )
+  /*
+   * The CMSIS functions have been implemented as intrinsics in the compiler.
+   * Please use "carm -?i" to get an up to date list of all intrinsics,
+   * Including the CMSIS ones.
+   */
+
+  #ifndef   __ASM
+    #define __ASM                                  __asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    #define __NO_RETURN                            __attribute__((noreturn))
+  #endif
+  #ifndef   __USED
+    #define __USED                                 __attribute__((used))
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __attribute__((weak))
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               __packed__
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __packed__
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         union __packed__
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __packed__ T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)              __align(x)
+  #endif
+  #ifndef   __RESTRICT
+    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+    #define __RESTRICT
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+/*
+ * COSMIC Compiler
+ */
+#elif defined ( __CSMC__ )
+   #include 
+
+ #ifndef   __ASM
+    #define __ASM                                  _asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    // NO RETURN is automatically detected hence no warning here
+    #define __NO_RETURN
+  #endif
+  #ifndef   __USED
+    #warning No compiler specific solution for __USED. __USED is ignored.
+    #define __USED
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __weak
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               @packed
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        @packed struct
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         @packed union
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    @packed struct T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+    #define __ALIGNED(x)
+  #endif
+  #ifndef   __RESTRICT
+    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+    #define __RESTRICT
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+#else
+  #error Unknown compiler.
+#endif
+
+
+#endif /* __CMSIS_COMPILER_H */
+
diff --git a/Libraries/CMSIS/Include/cmsis_gcc.h b/Libraries/CMSIS/Include/cmsis_gcc.h
new file mode 100644
index 00000000..1e08e7e8
--- /dev/null
+++ b/Libraries/CMSIS/Include/cmsis_gcc.h
@@ -0,0 +1,2168 @@
+/**************************************************************************//**
+ * @file     cmsis_gcc.h
+ * @brief    CMSIS compiler GCC header file
+ * @version  V5.2.0
+ * @date     08. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_GCC_H
+#define __CMSIS_GCC_H
+
+/* ignore some GCC warnings */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+
+/* Fallback for __has_builtin */
+#ifndef __has_builtin
+  #define __has_builtin(x) (0)
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static inline
+#endif
+#ifndef   __STATIC_FORCEINLINE                 
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
+#endif                                           
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __attribute__((__noreturn__))
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+
+/**
+  \brief   Initializes data and bss sections
+  \details This default implementations initialized all data and additional bss
+           sections relying on .copy.table and .zero.table specified properly
+           in the used linker script.
+  
+ */
+__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
+{
+  extern void _start(void) __NO_RETURN;
+  
+  typedef struct {
+    uint32_t const* src;
+    uint32_t* dest;
+    uint32_t  wlen;
+  } __copy_table_t;
+  
+  typedef struct {
+    uint32_t* dest;
+    uint32_t  wlen;
+  } __zero_table_t;
+  
+  extern const __copy_table_t __copy_table_start__;
+  extern const __copy_table_t __copy_table_end__;
+  extern const __zero_table_t __zero_table_start__;
+  extern const __zero_table_t __zero_table_end__;
+
+  for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
+    for(uint32_t i=0u; iwlen; ++i) {
+      pTable->dest[i] = pTable->src[i];
+    }
+  }
+ 
+  for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
+    for(uint32_t i=0u; iwlen; ++i) {
+      pTable->dest[i] = 0u;
+    }
+  }
+ 
+  _start();
+}
+  
+#define __PROGRAM_START           __cmsis_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              __StackTop
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             __StackLimit
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section(".vectors")))
+#endif
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __enable_irq(void)
+{
+  __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+}
+
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Control Register (non-secure)
+  \details Returns the content of the non-secure Control Register when in secure mode.
+  \return               non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Control Register (non-secure)
+  \details Writes the given value to the non-secure Control Register when in secure state.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Main Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Main Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Priority Mask (non-secure)
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Priority Mask (non-secure)
+  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __enable_fault_irq(void)
+{
+  __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_fault_irq(void)
+{
+  __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Base Priority (non-secure)
+  \details Returns the current value of the non-secure Base Priority register when in secure state.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Base Priority (non-secure)
+  \details Assigns the given value to the non-secure Base Priority register when in secure state.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Fault Mask (non-secure)
+  \details Returns the current value of the non-secure Fault Mask register when in secure state.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Fault Mask (non-secure)
+  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+/**
+  \brief   Get Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+  
+  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
+  return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+  
+  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+  return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Get Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#if __has_builtin(__builtin_arm_get_fpscr) 
+// Re-enable using built-in when GCC has been fixed
+// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
+  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
+  return __builtin_arm_get_fpscr();
+#else
+  uint32_t result;
+
+  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
+  return(result);
+#endif
+#else
+  return(0U);
+#endif
+}
+
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#if __has_builtin(__builtin_arm_set_fpscr)
+// Re-enable using built-in when GCC has been fixed
+// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
+  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
+  __builtin_arm_set_fpscr(fpscr);
+#else
+  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
+#endif
+#else
+  (void)fpscr;
+#endif
+}
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_RW_REG(r) "+l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_RW_REG(r) "+r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP()                             __ASM volatile ("nop")
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI()                             __ASM volatile ("wfi")
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE()                             __ASM volatile ("wfe")
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV()                             __ASM volatile ("sev")
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+__STATIC_FORCEINLINE void __ISB(void)
+{
+  __ASM volatile ("isb 0xF":::"memory");
+}
+
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+__STATIC_FORCEINLINE void __DSB(void)
+{
+  __ASM volatile ("dsb 0xF":::"memory");
+}
+
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+__STATIC_FORCEINLINE void __DMB(void)
+{
+  __ASM volatile ("dmb 0xF":::"memory");
+}
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
+  return __builtin_bswap32(value);
+#else
+  uint32_t result;
+
+  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return result;
+#endif
+}
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return result;
+}
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+__STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+  return (int16_t)__builtin_bswap16(value);
+#else
+  int16_t result;
+
+  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return result;
+#endif
+}
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result;
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
+#else
+  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
+
+  result = value;                      /* r will be reversed bits of v; first get LSB of v */
+  for (value >>= 1U; value != 0U; value >>= 1U)
+  {
+    result <<= 1U;
+    result |= value & 1U;
+    s--;
+  }
+  result <<= s;                        /* shift when v's highest bits are zero */
+#endif
+  return result;
+}
+
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
+   return(result);
+}
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+   return(result);
+}
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+__STATIC_FORCEINLINE void __CLREX(void)
+{
+  __ASM volatile ("clrex" ::: "memory");
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  ARG1  Value to be saturated
+  \param [in]  ARG2  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT(ARG1,ARG2) \
+__extension__ \
+({                          \
+  int32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  ARG1  Value to be saturated
+  \param [in]  ARG2  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT(ARG1,ARG2) \
+ __extension__ \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
+#endif
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
+#endif
+   return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+   return(result);
+}
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+   __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+   __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+   __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   Load-Acquire (8 bit)
+  \details Executes a LDAB instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
+   return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (16 bit)
+  \details Executes a LDAH instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
+   return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (32 bit)
+  \details Executes a LDA instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
+   return(result);
+}
+
+
+/**
+  \brief   Store-Release (8 bit)
+  \details Executes a STLB instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+   __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (16 bit)
+  \details Executes a STLH instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+   __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Store-Release (32 bit)
+  \details Executes a STL instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+   __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (8 bit)
+  \details Executes a LDAB exclusive instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
+   return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (16 bit)
+  \details Executes a LDAH exclusive instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
+   return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (32 bit)
+  \details Executes a LDA exclusive instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
+   return(result);
+}
+
+
+/**
+  \brief   Store-Release Exclusive (8 bit)
+  \details Executes a STLB exclusive instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
+{
+   uint32_t result;
+
+   __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/**
+  \brief   Store-Release Exclusive (16 bit)
+  \details Executes a STLH exclusive instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
+{
+   uint32_t result;
+
+   __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/**
+  \brief   Store-Release Exclusive (32 bit)
+  \details Executes a STL exclusive instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
+{
+   uint32_t result;
+
+   __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+
+__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({                          \
+  int32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+#if 0
+#define __PKHBT(ARG1,ARG2,ARG3) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
+  __RES; \
+ })
+
+#define __PKHTB(ARG1,ARG2,ARG3) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+  if (ARG3 == 0) \
+    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
+  else \
+    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
+  __RES; \
+ })
+#endif
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+ int32_t result;
+
+ __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#pragma GCC diagnostic pop
+
+#endif /* __CMSIS_GCC_H */
diff --git a/Libraries/CMSIS/Include/cmsis_iccarm.h b/Libraries/CMSIS/Include/cmsis_iccarm.h
new file mode 100644
index 00000000..7af75628
--- /dev/null
+++ b/Libraries/CMSIS/Include/cmsis_iccarm.h
@@ -0,0 +1,964 @@
+/**************************************************************************//**
+ * @file     cmsis_iccarm.h
+ * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
+ * @version  V5.1.0
+ * @date     08. May 2019
+ ******************************************************************************/
+
+//------------------------------------------------------------------------------
+//
+// Copyright (c) 2017-2019 IAR Systems
+// Copyright (c) 2017-2019 Arm Limited. All rights reserved. 
+//
+// Licensed under the Apache License, Version 2.0 (the "License")
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//------------------------------------------------------------------------------
+
+
+#ifndef __CMSIS_ICCARM_H__
+#define __CMSIS_ICCARM_H__
+
+#ifndef __ICCARM__
+  #error This file should only be compiled by ICCARM
+#endif
+
+#pragma system_include
+
+#define __IAR_FT _Pragma("inline=forced") __intrinsic
+
+#if (__VER__ >= 8000000)
+  #define __ICCARM_V8 1
+#else
+  #define __ICCARM_V8 0
+#endif
+
+#ifndef __ALIGNED
+  #if __ICCARM_V8
+    #define __ALIGNED(x) __attribute__((aligned(x)))
+  #elif (__VER__ >= 7080000)
+    /* Needs IAR language extensions */
+    #define __ALIGNED(x) __attribute__((aligned(x)))
+  #else
+    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
+    #define __ALIGNED(x)
+  #endif
+#endif
+
+
+/* Define compiler macros for CPU architecture, used in CMSIS 5.
+ */
+#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
+/* Macros already defined */
+#else
+  #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
+    #define __ARM_ARCH_8M_MAIN__ 1
+  #elif defined(__ARM8M_BASELINE__)
+    #define __ARM_ARCH_8M_BASE__ 1
+  #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
+    #if __ARM_ARCH == 6
+      #define __ARM_ARCH_6M__ 1
+    #elif __ARM_ARCH == 7
+      #if __ARM_FEATURE_DSP
+        #define __ARM_ARCH_7EM__ 1
+      #else
+        #define __ARM_ARCH_7M__ 1
+      #endif
+    #endif /* __ARM_ARCH */
+  #endif /* __ARM_ARCH_PROFILE == 'M' */
+#endif
+
+/* Alternativ core deduction for older ICCARM's */
+#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
+    !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
+  #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
+    #define __ARM_ARCH_6M__ 1
+  #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
+    #define __ARM_ARCH_7M__ 1
+  #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
+    #define __ARM_ARCH_7EM__  1
+  #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
+    #define __ARM_ARCH_8M_BASE__ 1
+  #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
+    #define __ARM_ARCH_8M_MAIN__ 1
+  #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
+    #define __ARM_ARCH_8M_MAIN__ 1
+  #else
+    #error "Unknown target."
+  #endif
+#endif
+
+
+
+#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
+  #define __IAR_M0_FAMILY  1
+#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
+  #define __IAR_M0_FAMILY  1
+#else
+  #define __IAR_M0_FAMILY  0
+#endif
+
+
+#ifndef __ASM
+  #define __ASM __asm
+#endif
+
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
+#endif
+
+#ifndef __INLINE
+  #define __INLINE inline
+#endif
+
+#ifndef   __NO_RETURN
+  #if __ICCARM_V8
+    #define __NO_RETURN __attribute__((__noreturn__))
+  #else
+    #define __NO_RETURN _Pragma("object_attribute=__noreturn")
+  #endif
+#endif
+
+#ifndef   __PACKED
+  #if __ICCARM_V8
+    #define __PACKED __attribute__((packed, aligned(1)))
+  #else
+    /* Needs IAR language extensions */
+    #define __PACKED __packed
+  #endif
+#endif
+
+#ifndef   __PACKED_STRUCT
+  #if __ICCARM_V8
+    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
+  #else
+    /* Needs IAR language extensions */
+    #define __PACKED_STRUCT __packed struct
+  #endif
+#endif
+
+#ifndef   __PACKED_UNION
+  #if __ICCARM_V8
+    #define __PACKED_UNION union __attribute__((packed, aligned(1)))
+  #else
+    /* Needs IAR language extensions */
+    #define __PACKED_UNION __packed union
+  #endif
+#endif
+
+#ifndef   __RESTRICT
+  #if __ICCARM_V8
+    #define __RESTRICT            __restrict
+  #else
+    /* Needs IAR language extensions */
+    #define __RESTRICT            restrict
+  #endif
+#endif
+
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE       static inline
+#endif
+
+#ifndef   __FORCEINLINE
+  #define __FORCEINLINE         _Pragma("inline=forced")
+#endif
+
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE
+#endif
+
+#ifndef __UNALIGNED_UINT16_READ
+#pragma language=save
+#pragma language=extended
+__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
+{
+  return *(__packed uint16_t*)(ptr);
+}
+#pragma language=restore
+#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
+#endif
+
+
+#ifndef __UNALIGNED_UINT16_WRITE
+#pragma language=save
+#pragma language=extended
+__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
+{
+  *(__packed uint16_t*)(ptr) = val;;
+}
+#pragma language=restore
+#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
+#endif
+
+#ifndef __UNALIGNED_UINT32_READ
+#pragma language=save
+#pragma language=extended
+__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
+{
+  return *(__packed uint32_t*)(ptr);
+}
+#pragma language=restore
+#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
+#endif
+
+#ifndef __UNALIGNED_UINT32_WRITE
+#pragma language=save
+#pragma language=extended
+__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
+{
+  *(__packed uint32_t*)(ptr) = val;;
+}
+#pragma language=restore
+#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
+#endif
+
+#ifndef __UNALIGNED_UINT32   /* deprecated */
+#pragma language=save
+#pragma language=extended
+__packed struct  __iar_u32 { uint32_t v; };
+#pragma language=restore
+#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
+#endif
+
+#ifndef   __USED
+  #if __ICCARM_V8
+    #define __USED __attribute__((used))
+  #else
+    #define __USED _Pragma("__root")
+  #endif
+#endif
+
+#ifndef   __WEAK
+  #if __ICCARM_V8
+    #define __WEAK __attribute__((weak))
+  #else
+    #define __WEAK _Pragma("__weak")
+  #endif
+#endif
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __iar_program_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              CSTACK$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             CSTACK$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __vector_table
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  @".intvec"
+#endif
+
+#ifndef __ICCARM_INTRINSICS_VERSION__
+  #define __ICCARM_INTRINSICS_VERSION__  0
+#endif
+
+#if __ICCARM_INTRINSICS_VERSION__ == 2
+
+  #if defined(__CLZ)
+    #undef __CLZ
+  #endif
+  #if defined(__REVSH)
+    #undef __REVSH
+  #endif
+  #if defined(__RBIT)
+    #undef __RBIT
+  #endif
+  #if defined(__SSAT)
+    #undef __SSAT
+  #endif
+  #if defined(__USAT)
+    #undef __USAT
+  #endif
+
+  #include "iccarm_builtin.h"
+
+  #define __disable_fault_irq __iar_builtin_disable_fiq
+  #define __disable_irq       __iar_builtin_disable_interrupt
+  #define __enable_fault_irq  __iar_builtin_enable_fiq
+  #define __enable_irq        __iar_builtin_enable_interrupt
+  #define __arm_rsr           __iar_builtin_rsr
+  #define __arm_wsr           __iar_builtin_wsr
+
+
+  #define __get_APSR()                (__arm_rsr("APSR"))
+  #define __get_BASEPRI()             (__arm_rsr("BASEPRI"))
+  #define __get_CONTROL()             (__arm_rsr("CONTROL"))
+  #define __get_FAULTMASK()           (__arm_rsr("FAULTMASK"))
+
+  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+    #define __get_FPSCR()             (__arm_rsr("FPSCR"))
+    #define __set_FPSCR(VALUE)        (__arm_wsr("FPSCR", (VALUE)))
+  #else
+    #define __get_FPSCR()             ( 0 )
+    #define __set_FPSCR(VALUE)        ((void)VALUE)
+  #endif
+
+  #define __get_IPSR()                (__arm_rsr("IPSR"))
+  #define __get_MSP()                 (__arm_rsr("MSP"))
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    #define __get_MSPLIM()            (0U)
+  #else
+    #define __get_MSPLIM()            (__arm_rsr("MSPLIM"))
+  #endif
+  #define __get_PRIMASK()             (__arm_rsr("PRIMASK"))
+  #define __get_PSP()                 (__arm_rsr("PSP"))
+
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    #define __get_PSPLIM()            (0U)
+  #else
+    #define __get_PSPLIM()            (__arm_rsr("PSPLIM"))
+  #endif
+
+  #define __get_xPSR()                (__arm_rsr("xPSR"))
+
+  #define __set_BASEPRI(VALUE)        (__arm_wsr("BASEPRI", (VALUE)))
+  #define __set_BASEPRI_MAX(VALUE)    (__arm_wsr("BASEPRI_MAX", (VALUE)))
+  #define __set_CONTROL(VALUE)        (__arm_wsr("CONTROL", (VALUE)))
+  #define __set_FAULTMASK(VALUE)      (__arm_wsr("FAULTMASK", (VALUE)))
+  #define __set_MSP(VALUE)            (__arm_wsr("MSP", (VALUE)))
+
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    #define __set_MSPLIM(VALUE)       ((void)(VALUE))
+  #else
+    #define __set_MSPLIM(VALUE)       (__arm_wsr("MSPLIM", (VALUE)))
+  #endif
+  #define __set_PRIMASK(VALUE)        (__arm_wsr("PRIMASK", (VALUE)))
+  #define __set_PSP(VALUE)            (__arm_wsr("PSP", (VALUE)))
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    #define __set_PSPLIM(VALUE)       ((void)(VALUE))
+  #else
+    #define __set_PSPLIM(VALUE)       (__arm_wsr("PSPLIM", (VALUE)))
+  #endif
+
+  #define __TZ_get_CONTROL_NS()       (__arm_rsr("CONTROL_NS"))
+  #define __TZ_set_CONTROL_NS(VALUE)  (__arm_wsr("CONTROL_NS", (VALUE)))
+  #define __TZ_get_PSP_NS()           (__arm_rsr("PSP_NS"))
+  #define __TZ_set_PSP_NS(VALUE)      (__arm_wsr("PSP_NS", (VALUE)))
+  #define __TZ_get_MSP_NS()           (__arm_rsr("MSP_NS"))
+  #define __TZ_set_MSP_NS(VALUE)      (__arm_wsr("MSP_NS", (VALUE)))
+  #define __TZ_get_SP_NS()            (__arm_rsr("SP_NS"))
+  #define __TZ_set_SP_NS(VALUE)       (__arm_wsr("SP_NS", (VALUE)))
+  #define __TZ_get_PRIMASK_NS()       (__arm_rsr("PRIMASK_NS"))
+  #define __TZ_set_PRIMASK_NS(VALUE)  (__arm_wsr("PRIMASK_NS", (VALUE)))
+  #define __TZ_get_BASEPRI_NS()       (__arm_rsr("BASEPRI_NS"))
+  #define __TZ_set_BASEPRI_NS(VALUE)  (__arm_wsr("BASEPRI_NS", (VALUE)))
+  #define __TZ_get_FAULTMASK_NS()     (__arm_rsr("FAULTMASK_NS"))
+  #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
+
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    #define __TZ_get_PSPLIM_NS()      (0U)
+    #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
+  #else
+    #define __TZ_get_PSPLIM_NS()      (__arm_rsr("PSPLIM_NS"))
+    #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
+  #endif
+
+  #define __TZ_get_MSPLIM_NS()        (__arm_rsr("MSPLIM_NS"))
+  #define __TZ_set_MSPLIM_NS(VALUE)   (__arm_wsr("MSPLIM_NS", (VALUE)))
+
+  #define __NOP     __iar_builtin_no_operation
+
+  #define __CLZ     __iar_builtin_CLZ
+  #define __CLREX   __iar_builtin_CLREX
+
+  #define __DMB     __iar_builtin_DMB
+  #define __DSB     __iar_builtin_DSB
+  #define __ISB     __iar_builtin_ISB
+
+  #define __LDREXB  __iar_builtin_LDREXB
+  #define __LDREXH  __iar_builtin_LDREXH
+  #define __LDREXW  __iar_builtin_LDREX
+
+  #define __RBIT    __iar_builtin_RBIT
+  #define __REV     __iar_builtin_REV
+  #define __REV16   __iar_builtin_REV16
+
+  __IAR_FT int16_t __REVSH(int16_t val)
+  {
+    return (int16_t) __iar_builtin_REVSH(val);
+  }
+
+  #define __ROR     __iar_builtin_ROR
+  #define __RRX     __iar_builtin_RRX
+
+  #define __SEV     __iar_builtin_SEV
+
+  #if !__IAR_M0_FAMILY
+    #define __SSAT    __iar_builtin_SSAT
+  #endif
+
+  #define __STREXB  __iar_builtin_STREXB
+  #define __STREXH  __iar_builtin_STREXH
+  #define __STREXW  __iar_builtin_STREX
+
+  #if !__IAR_M0_FAMILY
+    #define __USAT    __iar_builtin_USAT
+  #endif
+
+  #define __WFE     __iar_builtin_WFE
+  #define __WFI     __iar_builtin_WFI
+
+  #if __ARM_MEDIA__
+    #define __SADD8   __iar_builtin_SADD8
+    #define __QADD8   __iar_builtin_QADD8
+    #define __SHADD8  __iar_builtin_SHADD8
+    #define __UADD8   __iar_builtin_UADD8
+    #define __UQADD8  __iar_builtin_UQADD8
+    #define __UHADD8  __iar_builtin_UHADD8
+    #define __SSUB8   __iar_builtin_SSUB8
+    #define __QSUB8   __iar_builtin_QSUB8
+    #define __SHSUB8  __iar_builtin_SHSUB8
+    #define __USUB8   __iar_builtin_USUB8
+    #define __UQSUB8  __iar_builtin_UQSUB8
+    #define __UHSUB8  __iar_builtin_UHSUB8
+    #define __SADD16  __iar_builtin_SADD16
+    #define __QADD16  __iar_builtin_QADD16
+    #define __SHADD16 __iar_builtin_SHADD16
+    #define __UADD16  __iar_builtin_UADD16
+    #define __UQADD16 __iar_builtin_UQADD16
+    #define __UHADD16 __iar_builtin_UHADD16
+    #define __SSUB16  __iar_builtin_SSUB16
+    #define __QSUB16  __iar_builtin_QSUB16
+    #define __SHSUB16 __iar_builtin_SHSUB16
+    #define __USUB16  __iar_builtin_USUB16
+    #define __UQSUB16 __iar_builtin_UQSUB16
+    #define __UHSUB16 __iar_builtin_UHSUB16
+    #define __SASX    __iar_builtin_SASX
+    #define __QASX    __iar_builtin_QASX
+    #define __SHASX   __iar_builtin_SHASX
+    #define __UASX    __iar_builtin_UASX
+    #define __UQASX   __iar_builtin_UQASX
+    #define __UHASX   __iar_builtin_UHASX
+    #define __SSAX    __iar_builtin_SSAX
+    #define __QSAX    __iar_builtin_QSAX
+    #define __SHSAX   __iar_builtin_SHSAX
+    #define __USAX    __iar_builtin_USAX
+    #define __UQSAX   __iar_builtin_UQSAX
+    #define __UHSAX   __iar_builtin_UHSAX
+    #define __USAD8   __iar_builtin_USAD8
+    #define __USADA8  __iar_builtin_USADA8
+    #define __SSAT16  __iar_builtin_SSAT16
+    #define __USAT16  __iar_builtin_USAT16
+    #define __UXTB16  __iar_builtin_UXTB16
+    #define __UXTAB16 __iar_builtin_UXTAB16
+    #define __SXTB16  __iar_builtin_SXTB16
+    #define __SXTAB16 __iar_builtin_SXTAB16
+    #define __SMUAD   __iar_builtin_SMUAD
+    #define __SMUADX  __iar_builtin_SMUADX
+    #define __SMMLA   __iar_builtin_SMMLA
+    #define __SMLAD   __iar_builtin_SMLAD
+    #define __SMLADX  __iar_builtin_SMLADX
+    #define __SMLALD  __iar_builtin_SMLALD
+    #define __SMLALDX __iar_builtin_SMLALDX
+    #define __SMUSD   __iar_builtin_SMUSD
+    #define __SMUSDX  __iar_builtin_SMUSDX
+    #define __SMLSD   __iar_builtin_SMLSD
+    #define __SMLSDX  __iar_builtin_SMLSDX
+    #define __SMLSLD  __iar_builtin_SMLSLD
+    #define __SMLSLDX __iar_builtin_SMLSLDX
+    #define __SEL     __iar_builtin_SEL
+    #define __QADD    __iar_builtin_QADD
+    #define __QSUB    __iar_builtin_QSUB
+    #define __PKHBT   __iar_builtin_PKHBT
+    #define __PKHTB   __iar_builtin_PKHTB
+  #endif
+
+#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
+
+  #if __IAR_M0_FAMILY
+   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
+    #define __CLZ  __cmsis_iar_clz_not_active
+    #define __SSAT __cmsis_iar_ssat_not_active
+    #define __USAT __cmsis_iar_usat_not_active
+    #define __RBIT __cmsis_iar_rbit_not_active
+    #define __get_APSR  __cmsis_iar_get_APSR_not_active
+  #endif
+
+
+  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
+    #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
+    #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
+  #endif
+
+  #ifdef __INTRINSICS_INCLUDED
+  #error intrinsics.h is already included previously!
+  #endif
+
+  #include 
+
+  #if __IAR_M0_FAMILY
+   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
+    #undef __CLZ
+    #undef __SSAT
+    #undef __USAT
+    #undef __RBIT
+    #undef __get_APSR
+
+    __STATIC_INLINE uint8_t __CLZ(uint32_t data)
+    {
+      if (data == 0U) { return 32U; }
+
+      uint32_t count = 0U;
+      uint32_t mask = 0x80000000U;
+
+      while ((data & mask) == 0U)
+      {
+        count += 1U;
+        mask = mask >> 1U;
+      }
+      return count;
+    }
+
+    __STATIC_INLINE uint32_t __RBIT(uint32_t v)
+    {
+      uint8_t sc = 31U;
+      uint32_t r = v;
+      for (v >>= 1U; v; v >>= 1U)
+      {
+        r <<= 1U;
+        r |= v & 1U;
+        sc--;
+      }
+      return (r << sc);
+    }
+
+    __STATIC_INLINE  uint32_t __get_APSR(void)
+    {
+      uint32_t res;
+      __asm("MRS      %0,APSR" : "=r" (res));
+      return res;
+    }
+
+  #endif
+
+  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
+    #undef __get_FPSCR
+    #undef __set_FPSCR
+    #define __get_FPSCR()       (0)
+    #define __set_FPSCR(VALUE)  ((void)VALUE)
+  #endif
+
+  #pragma diag_suppress=Pe940
+  #pragma diag_suppress=Pe177
+
+  #define __enable_irq    __enable_interrupt
+  #define __disable_irq   __disable_interrupt
+  #define __NOP           __no_operation
+
+  #define __get_xPSR      __get_PSR
+
+  #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
+
+    __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
+    {
+      return __LDREX((unsigned long *)ptr);
+    }
+
+    __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
+    {
+      return __STREX(value, (unsigned long *)ptr);
+    }
+  #endif
+
+
+  /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
+  #if (__CORTEX_M >= 0x03)
+
+    __IAR_FT uint32_t __RRX(uint32_t value)
+    {
+      uint32_t result;
+      __ASM("RRX      %0, %1" : "=r"(result) : "r" (value) : "cc");
+      return(result);
+    }
+
+    __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
+    {
+      __asm volatile("MSR      BASEPRI_MAX,%0"::"r" (value));
+    }
+
+
+    #define __enable_fault_irq  __enable_fiq
+    #define __disable_fault_irq __disable_fiq
+
+
+  #endif /* (__CORTEX_M >= 0x03) */
+
+  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
+  {
+    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
+  }
+
+  #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+       (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+   __IAR_FT uint32_t __get_MSPLIM(void)
+    {
+      uint32_t res;
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure MSPLIM is RAZ/WI
+      res = 0U;
+    #else
+      __asm volatile("MRS      %0,MSPLIM" : "=r" (res));
+    #endif
+      return res;
+    }
+
+    __IAR_FT void   __set_MSPLIM(uint32_t value)
+    {
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure MSPLIM is RAZ/WI
+      (void)value;
+    #else
+      __asm volatile("MSR      MSPLIM,%0" :: "r" (value));
+    #endif
+    }
+
+    __IAR_FT uint32_t __get_PSPLIM(void)
+    {
+      uint32_t res;
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure PSPLIM is RAZ/WI
+      res = 0U;
+    #else
+      __asm volatile("MRS      %0,PSPLIM" : "=r" (res));
+    #endif
+      return res;
+    }
+
+    __IAR_FT void   __set_PSPLIM(uint32_t value)
+    {
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure PSPLIM is RAZ/WI
+      (void)value;
+    #else
+      __asm volatile("MSR      PSPLIM,%0" :: "r" (value));
+    #endif
+    }
+
+    __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,CONTROL_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_CONTROL_NS(uint32_t value)
+    {
+      __asm volatile("MSR      CONTROL_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_PSP_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,PSP_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_PSP_NS(uint32_t value)
+    {
+      __asm volatile("MSR      PSP_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_MSP_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,MSP_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_MSP_NS(uint32_t value)
+    {
+      __asm volatile("MSR      MSP_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_SP_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,SP_NS" : "=r" (res));
+      return res;
+    }
+    __IAR_FT void   __TZ_set_SP_NS(uint32_t value)
+    {
+      __asm volatile("MSR      SP_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_PRIMASK_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,PRIMASK_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_PRIMASK_NS(uint32_t value)
+    {
+      __asm volatile("MSR      PRIMASK_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_BASEPRI_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,BASEPRI_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_BASEPRI_NS(uint32_t value)
+    {
+      __asm volatile("MSR      BASEPRI_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_FAULTMASK_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,FAULTMASK_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_FAULTMASK_NS(uint32_t value)
+    {
+      __asm volatile("MSR      FAULTMASK_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_PSPLIM_NS(void)
+    {
+      uint32_t res;
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure PSPLIM is RAZ/WI
+      res = 0U;
+    #else
+      __asm volatile("MRS      %0,PSPLIM_NS" : "=r" (res));
+    #endif
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_PSPLIM_NS(uint32_t value)
+    {
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure PSPLIM is RAZ/WI
+      (void)value;
+    #else
+      __asm volatile("MSR      PSPLIM_NS,%0" :: "r" (value));
+    #endif
+    }
+
+    __IAR_FT uint32_t   __TZ_get_MSPLIM_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,MSPLIM_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_MSPLIM_NS(uint32_t value)
+    {
+      __asm volatile("MSR      MSPLIM_NS,%0" :: "r" (value));
+    }
+
+  #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
+
+#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */
+
+#define __BKPT(value)    __asm volatile ("BKPT     %0" : : "i"(value))
+
+#if __IAR_M0_FAMILY
+  __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
+  {
+    if ((sat >= 1U) && (sat <= 32U))
+    {
+      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+      const int32_t min = -1 - max ;
+      if (val > max)
+      {
+        return max;
+      }
+      else if (val < min)
+      {
+        return min;
+      }
+    }
+    return val;
+  }
+
+  __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
+  {
+    if (sat <= 31U)
+    {
+      const uint32_t max = ((1U << sat) - 1U);
+      if (val > (int32_t)max)
+      {
+        return max;
+      }
+      else if (val < 0)
+      {
+        return 0U;
+      }
+    }
+    return (uint32_t)val;
+  }
+#endif
+
+#if (__CORTEX_M >= 0x03)   /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
+
+  __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
+  {
+    uint32_t res;
+    __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
+    return ((uint8_t)res);
+  }
+
+  __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
+  {
+    uint32_t res;
+    __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
+    return ((uint16_t)res);
+  }
+
+  __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
+  {
+    uint32_t res;
+    __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
+    return res;
+  }
+
+  __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
+  {
+    __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
+  }
+
+  __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
+  {
+    __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
+  }
+
+  __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
+  {
+    __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
+  }
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+
+  __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return ((uint8_t)res);
+  }
+
+  __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return ((uint16_t)res);
+  }
+
+  __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return res;
+  }
+
+  __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
+  {
+    __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
+  }
+
+  __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
+  {
+    __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
+  }
+
+  __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
+  {
+    __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
+  }
+
+  __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return ((uint8_t)res);
+  }
+
+  __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return ((uint16_t)res);
+  }
+
+  __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return res;
+  }
+
+  __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
+    return res;
+  }
+
+  __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
+    return res;
+  }
+
+  __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
+    return res;
+  }
+
+#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
+
+#undef __IAR_FT
+#undef __IAR_M0_FAMILY
+#undef __ICCARM_V8
+
+#pragma diag_default=Pe940
+#pragma diag_default=Pe177
+
+#endif /* __CMSIS_ICCARM_H__ */
diff --git a/Libraries/CMSIS/Include/cmsis_version.h b/Libraries/CMSIS/Include/cmsis_version.h
new file mode 100644
index 00000000..3174cf60
--- /dev/null
+++ b/Libraries/CMSIS/Include/cmsis_version.h
@@ -0,0 +1,39 @@
+/**************************************************************************//**
+ * @file     cmsis_version.h
+ * @brief    CMSIS Core(M) Version definitions
+ * @version  V5.0.3
+ * @date     24. June 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CMSIS_VERSION_H
+#define __CMSIS_VERSION_H
+
+/*  CMSIS Version definitions */
+#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
+#define __CM_CMSIS_VERSION_SUB   ( 3U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
+                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
+#endif
diff --git a/Libraries/CMSIS/Include/core_armv81mml.h b/Libraries/CMSIS/Include/core_armv81mml.h
new file mode 100644
index 00000000..8cee9306
--- /dev/null
+++ b/Libraries/CMSIS/Include/core_armv81mml.h
@@ -0,0 +1,2968 @@
+/**************************************************************************//**
+ * @file     core_armv81mml.h
+ * @brief    CMSIS Armv8.1-M Mainline Core Peripheral Access Layer Header File
+ * @version  V1.0.0
+ * @date     15. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_ARMV81MML_H_GENERIC
+#define __CORE_ARMV81MML_H_GENERIC
+
+#include 
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.

+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.

+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_ARMV81MML
+  @{
+ */
+
+#include "cmsis_version.h"
+ 
+#define __ARM_ARCH_8M_MAIN__    1  // patching for now
+/*  CMSIS ARMV81MML definitions */
+#define __ARMv81MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv81MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv81MML_CMSIS_VERSION       ((__ARMv81MML_CMSIS_VERSION_MAIN << 16U) | \
+                                         __ARMv81MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+  
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U    
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+  
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV81MML_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_ARMV81MML_H_DEPENDANT
+#define __CORE_ARMV81MML_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __ARMv81MML_REV
+    #define __ARMv81MML_REV               0x0000U
+    #warning "__ARMv81MML_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    IO Type Qualifiers are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group ARMv81MML */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED3[92U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+        uint32_t RESERVED7[6U];
+  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
+  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
+  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
+  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
+  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/* Instruction Tightly-Coupled Memory Control Register Definitions */
+#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
+#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
+
+#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
+#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
+
+#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
+#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
+
+#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
+#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
+
+/* Data Tightly-Coupled Memory Control Register Definitions */
+#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
+#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
+
+#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
+#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
+
+#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
+#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
+
+#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
+#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
+
+/* AHBP Control Register Definitions */
+#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
+#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
+
+#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
+#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
+
+/* L1 Cache Control Register Definitions */
+#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
+#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
+
+#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
+#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
+
+#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
+#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
+
+/* AHBS Control Register Definitions */
+#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
+#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
+
+#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
+#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
+
+#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
+#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
+
+/* Auxiliary Bus Fault Status Register Definitions */
+#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
+#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
+
+#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
+#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
+
+#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
+#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
+
+#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
+#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
+
+#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
+#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
+
+#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
+#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[29U];
+  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
+  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
+  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Integration Write Register Definitions */
+#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
+#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
+
+/* ITM Integration Read Register Definitions */
+#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
+#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
+
+/* ITM Integration Mode Control Register Definitions */
+#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
+#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
+#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
+#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_PXN_Pos                    4U                                            /*!< MPU RLAR: PXN Position */
+#define MPU_RLAR_PXN_Msk                   (0x1UL << MPU_RLAR_PXN_Pos)                    /*!< MPU RLAR: PXN Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function TZ_SysTick_Config_NS is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV81MML_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_armv8mbl.h b/Libraries/CMSIS/Include/core_armv8mbl.h
new file mode 100644
index 00000000..266f180a
--- /dev/null
+++ b/Libraries/CMSIS/Include/core_armv8mbl.h
@@ -0,0 +1,1921 @@
+/**************************************************************************//**
+ * @file     core_armv8mbl.h
+ * @brief    CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File
+ * @version  V5.0.8
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_ARMV8MBL_H_GENERIC
+#define __CORE_ARMV8MBL_H_GENERIC
+
+#include 
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.

+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.

+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_ARMv8MBL
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS definitions */
+#define __ARMv8MBL_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv8MBL_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv8MBL_CMSIS_VERSION       ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \
+                                         __ARMv8MBL_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                     ( 2U)                                            /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV8MBL_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_ARMV8MBL_H_DEPENDANT
+#define __CORE_ARMV8MBL_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __ARMv8MBL_REV
+    #define __ARMv8MBL_REV               0x0000U
+    #warning "__ARMv8MBL_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT            0U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+
+  #ifndef __ETM_PRESENT
+    #define __ETM_PRESENT             0U
+    #warning "__ETM_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MTB_PRESENT
+    #define __MTB_PRESENT             0U
+    #warning "__MTB_PRESENT not defined in device header file; using default!"
+  #endif
+
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    IO Type Qualifiers are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group ARMv8MBL */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+#else
+        uint32_t RESERVED0;
+#endif
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+        uint32_t RESERVED0[6U];
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[809U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */
+        uint32_t RESERVED4[4U];
+  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
+#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI Periodic Synchronization Control Register Definitions */
+#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */
+#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */
+
+/* TPI Software Lock Status Register Definitions */
+#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */
+#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */
+
+#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */
+#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */
+
+#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */
+#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+        uint32_t RESERVED0[7U];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  1U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#endif
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register */
+#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< CoreDebug DEMCR: DWTENA Position */
+#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< CoreDebug DEMCR: DWTENA Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+           If VTOR is not present address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+#else
+  uint32_t *vectors = (uint32_t *)0x0U;
+#endif
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+#else
+  uint32_t *vectors = (uint32_t *)0x0U;
+#endif
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function TZ_SysTick_Config_NS is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV8MBL_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_armv8mml.h b/Libraries/CMSIS/Include/core_armv8mml.h
new file mode 100644
index 00000000..ba5d83ff
--- /dev/null
+++ b/Libraries/CMSIS/Include/core_armv8mml.h
@@ -0,0 +1,2835 @@
+/**************************************************************************//**
+ * @file     core_armv8mml.h
+ * @brief    CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File
+ * @version  V5.1.0
+ * @date     12. September 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_ARMV8MML_H_GENERIC
+#define __CORE_ARMV8MML_H_GENERIC
+
+#include 
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.

+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.

+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_ARMv8MML
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS Armv8MML definitions */
+#define __ARMv8MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv8MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv8MML_CMSIS_VERSION       ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \
+                                         __ARMv8MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV8MML_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_ARMV8MML_H_DEPENDANT
+#define __CORE_ARMV8MML_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __ARMv8MML_REV
+    #define __ARMv8MML_REV               0x0000U
+    #warning "__ARMv8MML_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    IO Type Qualifiers are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group ARMv8MML */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED3[92U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[809U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */
+        uint32_t RESERVED4[4U];
+  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
+#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI Periodic Synchronization Control Register Definitions */
+#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */
+#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */
+
+/* TPI Software Lock Status Register Definitions */
+#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */
+#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */
+
+#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */
+#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */
+
+#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */
+#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)                      );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function TZ_SysTick_Config_NS is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV8MML_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm0.h b/Libraries/CMSIS/Include/core_cm0.h
index 1110d17a..70e45053 100644
--- a/Libraries/CMSIS/Include/core_cm0.h
+++ b/Libraries/CMSIS/Include/core_cm0.h
@@ -1,52 +1,44 @@
 /**************************************************************************//**
  * @file     core_cm0.h
  * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version  V4.10
- * @date     18. March 2015
+ * @version  V5.0.6
+ * @date     13. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
- * @note
+ * SPDX-License-Identifier: Apache-2.0
  *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include  /* treat file as system include file for MISRA check */
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
 #endif
 
 #ifndef __CORE_CM0_H_GENERIC
 #define __CORE_CM0_H_GENERIC
 
+#include 
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
   CMSIS violates the following MISRA-C:2004 rules:
 
    \li Required Rule 8.5, object/function definition in header file.

@@ -63,74 +55,49 @@
 /*******************************************************************************
  *                 CMSIS definitions
  ******************************************************************************/
-/** \ingroup Cortex_M0
+/**
+  \ingroup Cortex_M0
   @{
  */
 
+#include "cmsis_version.h"
+ 
 /*  CMSIS CM0 definitions */
-#define __CM0_CMSIS_VERSION_MAIN  (0x04)                                   /*!< [31:16] CMSIS HAL main version   */
-#define __CM0_CMSIS_VERSION_SUB   (0x00)                                   /*!< [15:0]  CMSIS HAL sub version    */
-#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16) | \
-                                    __CM0_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
-
-#define __CORTEX_M                (0x00)                                   /*!< Cortex-M Core                    */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
-  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
-  #define __STATIC_INLINE  static inline
+#define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM0_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
 
-#endif
+#define __CORTEX_M                (0U)                                   /*!< Cortex-M Core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     This core does not support an FPU at all
 */
-#define __FPU_USED       0
+#define __FPU_USED       0U
 
 #if defined ( __CC_ARM )
   #if defined __TARGET_FPU_VFP
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __GNUC__ )
   #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __ICCARM__ )
   #if defined __ARMVFP__
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __TMS470__ )
-  #if defined __TI__VFP_SUPPORT____
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __TASKING__ )
@@ -138,15 +105,15 @@
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __CSMC__ )		/* Cosmic */
-  #if ( __CSMC__ & 0x400)		// FPU present for parser
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
+
 #endif
 
-#include                       /* standard types definitions                      */
-#include                 /* Core Instruction Access                         */
-#include                  /* Core Function Access                            */
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
 
 #ifdef __cplusplus
 }
@@ -166,17 +133,17 @@
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
   #ifndef __CM0_REV
-    #define __CM0_REV               0x0000
+    #define __CM0_REV               0x0000U
     #warning "__CM0_REV not defined in device header file; using default!"
   #endif
 
   #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2
+    #define __NVIC_PRIO_BITS          2U
     #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
   #endif
 
   #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0
+    #define __Vendor_SysTickConfig    0U
     #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
   #endif
 #endif
@@ -190,12 +157,17 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions                */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
 
 /*@} end of group Cortex_M0 */
 
@@ -209,325 +181,364 @@
   - Core SCB Register
   - Core SysTick Register
  ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
-    \brief Type definitions and defines for Cortex-M processor based devices.
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
 */
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_CORE  Status and Control Registers
-    \brief  Core Register type definitions.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
   @{
  */
 
-/** \brief  Union type to access the Application Program Status Register (APSR).
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved                           */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31                                             /*!< APSR: N Position */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
 #define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30                                             /*!< APSR: Z Position */
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
 #define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29                                             /*!< APSR: C Position */
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
 #define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28                                             /*!< APSR: V Position */
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
 #define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
 
 
-/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0                                             /*!< IPSR: ISR Position */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
 #define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved                           */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31                                             /*!< xPSR: N Position */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
 #define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30                                             /*!< xPSR: Z Position */
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
 #define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29                                             /*!< xPSR: C Position */
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
 #define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28                                             /*!< xPSR: V Position */
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
 #define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
 
-#define xPSR_T_Pos                         24                                             /*!< xPSR: T Position */
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
 #define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
 
-#define xPSR_ISR_Pos                        0                                             /*!< xPSR: ISR Position */
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
 #define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Control Registers (CONTROL).
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved                           */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1                                             /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
 #define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
 
 /*@} end of group CMSIS_CORE */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-    \brief      Type definitions for the NVIC Registers
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
   @{
  */
 
-/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
  */
 typedef struct
 {
-  __IO uint32_t ISER[1];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
-       uint32_t RESERVED0[31];
-  __IO uint32_t ICER[1];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register          */
-       uint32_t RSERVED1[31];
-  __IO uint32_t ISPR[1];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register           */
-       uint32_t RESERVED2[31];
-  __IO uint32_t ICPR[1];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register         */
-       uint32_t RESERVED3[31];
-       uint32_t RESERVED4[64];
-  __IO uint32_t IP[8];                   /*!< Offset: 0x300 (R/W)  Interrupt Priority Register              */
+  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[31U];
+  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[31U];
+  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[31U];
+  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[31U];
+        uint32_t RESERVED4[64U];
+  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
 }  NVIC_Type;
 
 /*@} end of group CMSIS_NVIC */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCB     System Control Block (SCB)
-    \brief      Type definitions for the System Control Block Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
   @{
  */
 
-/** \brief  Structure type to access the System Control Block (SCB).
+/**
+  \brief  Structure type to access the System Control Block (SCB).
  */
 typedef struct
 {
-  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
-  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
-       uint32_t RESERVED0;
-  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
-  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
-  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
-       uint32_t RESERVED1;
-  __IO uint32_t SHP[2];                  /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED   */
-  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+        uint32_t RESERVED0;
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
 #define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
 #define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
 
 /*@} end of group CMSIS_SCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-    \brief      Type definitions for the System Timer Registers.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
   @{
  */
 
-/** \brief  Structure type to access the System Timer (SysTick).
+/**
+  \brief  Structure type to access the System Timer (SysTick).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
-  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
-  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
 } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
 #define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
 
 /*@} end of group CMSIS_SysTick */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-    \brief      Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR)
-                are only accessible over DAP and not via processor. Therefore
-                they are not covered by the Cortex-M0 header file.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
+            Therefore they are not covered by the Cortex-M0 header file.
   @{
  */
 /*@} end of group CMSIS_CoreDebug */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_core_base     Core Definitions
-    \brief      Definitions for base addresses, unions, and structures.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
   @{
  */
 
-/* Memory mapping of Cortex-M0 Hardware */
+/* Memory mapping of Core Hardware */
 #define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address              */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                 */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
 #define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
 
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
 
 
 /*@} */
@@ -541,179 +552,380 @@ typedef struct
   - Core SysTick Functions
   - Core Register Access Functions
  ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
 */
 
 
 
 /* ##########################   NVIC functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-    \brief      Functions that manage interrupts and exceptions via the NVIC.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
  */
 
-/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0 */
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
 /* The following MACROS handle generation of the register offset and byte masks */
 #define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
 #define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
 #define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
 
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
 
-/** \brief  Enable External Interrupt
-
-    The function enables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
 }
 
 
-/** \brief  Disable External Interrupt
-
-    The function disables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Get Pending Interrupt
-
-    The function reads the pending register in the NVIC and returns the pending bit
-    for the specified interrupt.
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
 
-    \param [in]      IRQn  Interrupt number.
 
-    \return             0  Interrupt status is not pending.
-    \return             1  Interrupt status is pending.
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->ISPR[0] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Set Pending Interrupt
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
 
-    The function sets the pending bit of an external interrupt.
 
-    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISPR[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Clear Pending Interrupt
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
 
-    The function clears the pending bit of an external interrupt.
 
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
  */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
 {
-  NVIC->ICPR[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
 }
 
 
-/** \brief  Set Interrupt Priority
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
 
-    The function sets the priority of an interrupt.
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
 
-    \note The priority cannot be set for every core interrupt.
 
-    \param [in]      IRQn  Interrupt number.
-    \param [in]  priority  Priority to set.
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
  */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
 {
-  if((int32_t)(IRQn) < 0) {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
 
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
 
-/** \brief  Get Interrupt Priority
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
 
-    The function reads the priority of an interrupt. The interrupt
-    number can be positive to specify an external (device specific)
-    interrupt, or negative to specify an internal (core) interrupt.
 
 
-    \param [in]   IRQn  Interrupt number.
-    \return             Interrupt Priority. Value is aligned automatically to the implemented
-                        priority bits of the microcontroller.
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           Address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
  */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
 {
-
-  if((int32_t)(IRQn) < 0) {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8 - __NVIC_PRIO_BITS)));
-  }
-  else {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8 - __NVIC_PRIO_BITS)));
-  }
+  uint32_t vectors = 0x0U;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M0 does not require the architectural barrier */
 }
 
 
-/** \brief  System Reset
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t vectors = 0x0U;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
+}
+
 
-    The function initiates a system reset request to reset the MCU.
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
 {
-  __DSB();                                                     /* Ensure all outstanding memory accesses included
-                                                                  buffered write are completed before reset */
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
   SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                  SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                     /* Ensure completion of memory access */
-  while(1) { __NOP(); }                                        /* wait until reset */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
 }
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
 
-
-/* ##################################    SysTick function  ############################################ */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-    \brief      Functions that configure the System.
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
   @{
  */
 
-#if (__Vendor_SysTickConfig == 0)
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
 
-/** \brief  System Tick Configuration
+/*@} end of CMSIS_Core_FpuFunctions */
 
-    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
-    Counter is in free running mode to generate periodic interrupts.
 
-    \param [in]  ticks  Number of ticks between two interrupts.
 
-    \return          0  Function succeeded.
-    \return          1  Function failed.
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
 
-    \note     When the variable __Vendor_SysTickConfig is set to 1, then the
-    function SysTick_Config is not included. In this case, the file device.h
-    must contain a vendor-specific implementation of this function.
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
 
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) { return (1UL); }    /* Reload value impossible */
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
diff --git a/Libraries/CMSIS/Include/core_cm0plus.h b/Libraries/CMSIS/Include/core_cm0plus.h
index 62e914b5..fe7b424e 100644
--- a/Libraries/CMSIS/Include/core_cm0plus.h
+++ b/Libraries/CMSIS/Include/core_cm0plus.h
@@ -1,52 +1,44 @@
 /**************************************************************************//**
  * @file     core_cm0plus.h
  * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version  V4.10
- * @date     18. March 2015
+ * @version  V5.0.7
+ * @date     13. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
- * @note
+ * SPDX-License-Identifier: Apache-2.0
  *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include  /* treat file as system include file for MISRA check */
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
 #endif
 
 #ifndef __CORE_CM0PLUS_H_GENERIC
 #define __CORE_CM0PLUS_H_GENERIC
 
+#include 
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
   CMSIS violates the following MISRA-C:2004 rules:
 
    \li Required Rule 8.5, object/function definition in header file.

@@ -63,74 +55,49 @@
 /*******************************************************************************
  *                 CMSIS definitions
  ******************************************************************************/
-/** \ingroup Cortex-M0+
+/**
+  \ingroup Cortex-M0+
   @{
  */
 
-/*  CMSIS CM0P definitions */
-#define __CM0PLUS_CMSIS_VERSION_MAIN (0x04)                                /*!< [31:16] CMSIS HAL main version   */
-#define __CM0PLUS_CMSIS_VERSION_SUB  (0x00)                                /*!< [15:0]  CMSIS HAL sub version    */
-#define __CM0PLUS_CMSIS_VERSION      ((__CM0PLUS_CMSIS_VERSION_MAIN << 16) | \
-                                       __CM0PLUS_CMSIS_VERSION_SUB)        /*!< CMSIS HAL version number         */
-
-#define __CORTEX_M                (0x00)                                   /*!< Cortex-M Core                    */
-
+#include "cmsis_version.h"
+ 
+/*  CMSIS CM0+ definitions */
+#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM0PLUS_CMSIS_VERSION_SUB  (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM0PLUS_CMSIS_VERSION      ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \
+                                       __CM0PLUS_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
 
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
-  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#endif
+#define __CORTEX_M                   (0U)                                       /*!< Cortex-M Core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     This core does not support an FPU at all
 */
-#define __FPU_USED       0
+#define __FPU_USED       0U
 
 #if defined ( __CC_ARM )
   #if defined __TARGET_FPU_VFP
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __GNUC__ )
   #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __ICCARM__ )
   #if defined __ARMVFP__
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __TMS470__ )
-  #if defined __TI__VFP_SUPPORT____
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __TASKING__ )
@@ -138,15 +105,15 @@
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __CSMC__ )		/* Cosmic */
-  #if ( __CSMC__ & 0x400)		// FPU present for parser
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
+
 #endif
 
-#include                       /* standard types definitions                      */
-#include                 /* Core Instruction Access                         */
-#include                  /* Core Function Access                            */
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
 
 #ifdef __cplusplus
 }
@@ -166,27 +133,27 @@
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
   #ifndef __CM0PLUS_REV
-    #define __CM0PLUS_REV             0x0000
+    #define __CM0PLUS_REV             0x0000U
     #warning "__CM0PLUS_REV not defined in device header file; using default!"
   #endif
 
   #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0
+    #define __MPU_PRESENT             0U
     #warning "__MPU_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __VTOR_PRESENT
-    #define __VTOR_PRESENT            0
+    #define __VTOR_PRESENT            0U
     #warning "__VTOR_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2
+    #define __NVIC_PRIO_BITS          2U
     #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
   #endif
 
   #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0
+    #define __Vendor_SysTickConfig    0U
     #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
   #endif
 #endif
@@ -200,12 +167,17 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions                */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
 
 /*@} end of group Cortex-M0+ */
 
@@ -220,428 +192,471 @@
   - Core SysTick Register
   - Core MPU Register
  ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
-    \brief Type definitions and defines for Cortex-M processor based devices.
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
 */
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_CORE  Status and Control Registers
-    \brief  Core Register type definitions.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
   @{
  */
 
-/** \brief  Union type to access the Application Program Status Register (APSR).
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved                           */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31                                             /*!< APSR: N Position */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
 #define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30                                             /*!< APSR: Z Position */
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
 #define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29                                             /*!< APSR: C Position */
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
 #define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28                                             /*!< APSR: V Position */
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
 #define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
 
 
-/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0                                             /*!< IPSR: ISR Position */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
 #define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved                           */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31                                             /*!< xPSR: N Position */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
 #define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30                                             /*!< xPSR: Z Position */
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
 #define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29                                             /*!< xPSR: C Position */
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
 #define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28                                             /*!< xPSR: V Position */
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
 #define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
 
-#define xPSR_T_Pos                         24                                             /*!< xPSR: T Position */
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
 #define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
 
-#define xPSR_ISR_Pos                        0                                             /*!< xPSR: ISR Position */
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
 #define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Control Registers (CONTROL).
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
  */
 typedef union
 {
   struct
   {
     uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1                                             /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
 #define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
 
-#define CONTROL_nPRIV_Pos                   0                                             /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
 #define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
 
 /*@} end of group CMSIS_CORE */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-    \brief      Type definitions for the NVIC Registers
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
   @{
  */
 
-/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
  */
 typedef struct
 {
-  __IO uint32_t ISER[1];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
-       uint32_t RESERVED0[31];
-  __IO uint32_t ICER[1];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register          */
-       uint32_t RSERVED1[31];
-  __IO uint32_t ISPR[1];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register           */
-       uint32_t RESERVED2[31];
-  __IO uint32_t ICPR[1];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register         */
-       uint32_t RESERVED3[31];
-       uint32_t RESERVED4[64];
-  __IO uint32_t IP[8];                   /*!< Offset: 0x300 (R/W)  Interrupt Priority Register              */
+  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[31U];
+  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[31U];
+  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[31U];
+  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[31U];
+        uint32_t RESERVED4[64U];
+  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
 }  NVIC_Type;
 
 /*@} end of group CMSIS_NVIC */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCB     System Control Block (SCB)
-    \brief      Type definitions for the System Control Block Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
   @{
  */
 
-/** \brief  Structure type to access the System Control Block (SCB).
+/**
+  \brief  Structure type to access the System Control Block (SCB).
  */
 typedef struct
 {
-  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
-  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
-#if (__VTOR_PRESENT == 1)
-  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
 #else
-       uint32_t RESERVED0;
+        uint32_t RESERVED0;
 #endif
-  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
-  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
-  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
-       uint32_t RESERVED1;
-  __IO uint32_t SHP[2];                  /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED   */
-  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
 #define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
 #define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
 
-#if (__VTOR_PRESENT == 1)
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 8                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Pos                 8U                                            /*!< SCB VTOR: TBLOFF Position */
 #define SCB_VTOR_TBLOFF_Msk                (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
 #endif
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
 
 /*@} end of group CMSIS_SCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-    \brief      Type definitions for the System Timer Registers.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
   @{
  */
 
-/** \brief  Structure type to access the System Timer (SysTick).
+/**
+  \brief  Structure type to access the System Timer (SysTick).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
-  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
-  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
 } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
 #define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
 
 /*@} end of group CMSIS_SysTick */
 
-#if (__MPU_PRESENT == 1)
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-    \brief      Type definitions for the Memory Protection Unit (MPU)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
   @{
  */
 
-/** \brief  Structure type to access the Memory Protection Unit (MPU).
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
  */
 typedef struct
 {
-  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
-  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
-  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
-  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
-  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
 } MPU_Type;
 
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_RALIASES                  1U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
 #define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
 #define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
 #define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
 
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
 #define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
 #define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
 #define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
 
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
 #define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
 
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos                   8                                             /*!< MPU RBAR: ADDR Position */
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */
 #define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
 
-#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
 #define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
 
-#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
 #define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
 
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
 #define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
 
-#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
 #define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
 
-#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
 #define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
 
-#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
 #define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
 
-#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
 #define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
 
-#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
 #define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
 
-#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
 #define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
 
-#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
 #define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
 
-#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
 #define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
 
-#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
 #define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
 
 /*@} end of group CMSIS_MPU */
 #endif
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-    \brief      Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR)
-                are only accessible over DAP and not via processor. Therefore
-                they are not covered by the Cortex-M0 header file.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
+            Therefore they are not covered by the Cortex-M0+ header file.
   @{
  */
 /*@} end of group CMSIS_CoreDebug */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_core_base     Core Definitions
-    \brief      Definitions for base addresses, unions, and structures.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
   @{
  */
 
-/* Memory mapping of Cortex-M0+ Hardware */
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
 #define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address              */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                 */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
 #define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
 
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
 
-#if (__MPU_PRESENT == 1)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
 #endif
 
 /*@} */
@@ -655,179 +670,395 @@ typedef struct
   - Core SysTick Functions
   - Core Register Access Functions
  ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
 */
 
 
 
 /* ##########################   NVIC functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-    \brief      Functions that manage interrupts and exceptions via the NVIC.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
  */
 
-/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0+ */
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
 /* The following MACROS handle generation of the register offset and byte masks */
 #define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
 #define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
 #define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
 
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
 
-/** \brief  Enable External Interrupt
-
-    The function enables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
 }
 
 
-/** \brief  Disable External Interrupt
-
-    The function disables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Get Pending Interrupt
-
-    The function reads the pending register in the NVIC and returns the pending bit
-    for the specified interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not pending.
-    \return             1  Interrupt status is pending.
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->ISPR[0] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
 }
 
 
-/** \brief  Set Pending Interrupt
-
-    The function sets the pending bit of an external interrupt.
-
-    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISPR[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Clear Pending Interrupt
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
 
-    The function clears the pending bit of an external interrupt.
 
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICPR[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Set Interrupt Priority
-
-    The function sets the priority of an interrupt.
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
 
-    \note The priority cannot be set for every core interrupt.
 
-    \param [in]      IRQn  Interrupt number.
-    \param [in]  priority  Priority to set.
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
  */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
 {
-  if((int32_t)(IRQn) < 0) {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
   }
-  else {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  else
+  {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
   }
 }
 
 
-/** \brief  Get Interrupt Priority
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
 
-    The function reads the priority of an interrupt. The interrupt
-    number can be positive to specify an external (device specific)
-    interrupt, or negative to specify an internal (core) interrupt.
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
 
 
-    \param [in]   IRQn  Interrupt number.
-    \return             Interrupt Priority. Value is aligned automatically to the implemented
-                        priority bits of the microcontroller.
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
  */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
 {
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
 
-  if((int32_t)(IRQn) < 0) {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8 - __NVIC_PRIO_BITS)));
-  }
-  else {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8 - __NVIC_PRIO_BITS)));
-  }
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
 }
 
 
-/** \brief  System Reset
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+           If VTOR is not present address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t vectors = SCB->VTOR;
+#else
+  uint32_t vectors = 0x0U;
+#endif
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t vectors = SCB->VTOR;
+#else
+  uint32_t vectors = 0x0U;
+#endif
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
+}
+
 
-    The function initiates a system reset request to reset the MCU.
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
 {
-  __DSB();                                                     /* Ensure all outstanding memory accesses included
-                                                                  buffered write are completed before reset */
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
   SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                  SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                     /* Ensure completion of memory access */
-  while(1) { __NOP(); }                                        /* wait until reset */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
 }
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
+/* ##########################  MPU functions  #################################### */
 
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
 
-/* ##################################    SysTick function  ############################################ */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-    \brief      Functions that configure the System.
+#include "mpu_armv7.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
   @{
  */
 
-#if (__Vendor_SysTickConfig == 0)
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
 
-/** \brief  System Tick Configuration
+/*@} end of CMSIS_Core_FpuFunctions */
 
-    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
-    Counter is in free running mode to generate periodic interrupts.
 
-    \param [in]  ticks  Number of ticks between two interrupts.
 
-    \return          0  Function succeeded.
-    \return          1  Function failed.
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
 
-    \note     When the variable __Vendor_SysTickConfig is set to 1, then the
-    function SysTick_Config is not included. In this case, the file device.h
-    must contain a vendor-specific implementation of this function.
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
 
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) {return (1UL);}      /* Reload value impossible */
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
diff --git a/Libraries/CMSIS/Include/core_cm1.h b/Libraries/CMSIS/Include/core_cm1.h
new file mode 100644
index 00000000..44c2a491
--- /dev/null
+++ b/Libraries/CMSIS/Include/core_cm1.h
@@ -0,0 +1,979 @@
+/**************************************************************************//**
+ * @file     core_cm1.h
+ * @brief    CMSIS Cortex-M1 Core Peripheral Access Layer Header File
+ * @version  V1.0.1
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM1_H_GENERIC
+#define __CORE_CM1_H_GENERIC
+
+#include 
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.

+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.

+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M1
+  @{
+ */
+
+#include "cmsis_version.h"
+ 
+/*  CMSIS CM1 definitions */
+#define __CM1_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM1_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM1_CMSIS_VERSION       ((__CM1_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM1_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                (1U)                                   /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM1_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM1_H_DEPENDANT
+#define __CORE_CM1_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM1_REV
+    #define __CM1_REV               0x0100U
+    #warning "__CM1_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    IO Type Qualifiers are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M1 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[31U];
+  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[31U];
+  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[31U];
+  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[31U];
+        uint32_t RESERVED4[64U];
+  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+        uint32_t RESERVED0;
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+} SCnSCB_Type;
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_ITCMUAEN_Pos            4U                                        /*!< ACTLR: Instruction TCM Upper Alias Enable Position */
+#define SCnSCB_ACTLR_ITCMUAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos)         /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */
+
+#define SCnSCB_ACTLR_ITCMLAEN_Pos            3U                                        /*!< ACTLR: Instruction TCM Lower Alias Enable Position */
+#define SCnSCB_ACTLR_ITCMLAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos)         /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
+            Therefore they are not covered by the Cortex-M1 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M1 */
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           Address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)0x0U;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M1 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)0x0U;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM1_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm23.h b/Libraries/CMSIS/Include/core_cm23.h
new file mode 100644
index 00000000..49f4a5b0
--- /dev/null
+++ b/Libraries/CMSIS/Include/core_cm23.h
@@ -0,0 +1,1996 @@
+/**************************************************************************//**
+ * @file     core_cm23.h
+ * @brief    CMSIS Cortex-M23 Core Peripheral Access Layer Header File
+ * @version  V5.0.8
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM23_H_GENERIC
+#define __CORE_CM23_H_GENERIC
+
+#include 
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.

+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.

+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M23
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS definitions */
+#define __CM23_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM23_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM23_CMSIS_VERSION       ((__CM23_CMSIS_VERSION_MAIN << 16U) | \
+                                     __CM23_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                 (23U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM23_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM23_H_DEPENDANT
+#define __CORE_CM23_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM23_REV
+    #define __CM23_REV                0x0000U
+    #warning "__CM23_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT            0U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+
+  #ifndef __ETM_PRESENT
+    #define __ETM_PRESENT             0U
+    #warning "__ETM_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MTB_PRESENT
+    #define __MTB_PRESENT             0U
+    #warning "__MTB_PRESENT not defined in device header file; using default!"
+  #endif
+
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    IO Type Qualifiers are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M23 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+#else
+        uint32_t RESERVED0;
+#endif
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+        uint32_t RESERVED0[6U];
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+        uint32_t RESERVED0[7U];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  1U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#endif
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register */
+#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< CoreDebug DEMCR: DWTENA Position */
+#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< CoreDebug DEMCR: DWTENA Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+/*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for Cortex-M23 */
+/*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for Cortex-M23 */
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else 
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+	
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+           If VTOR is not present address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+#else
+  uint32_t *vectors = (uint32_t *)0x0U;
+#endif
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+#else
+  uint32_t *vectors = (uint32_t *)0x0U;
+#endif
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function TZ_SysTick_Config_NS is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM23_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm3.h b/Libraries/CMSIS/Include/core_cm3.h
index d324f9b7..1f69e8bd 100644
--- a/Libraries/CMSIS/Include/core_cm3.h
+++ b/Libraries/CMSIS/Include/core_cm3.h
@@ -1,52 +1,44 @@
 /**************************************************************************//**
  * @file     core_cm3.h
  * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version  V4.10
- * @date     18. March 2015
+ * @version  V5.1.0
+ * @date     13. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
- * @note
+ * SPDX-License-Identifier: Apache-2.0
  *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include  /* treat file as system include file for MISRA check */
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
 #endif
 
 #ifndef __CORE_CM3_H_GENERIC
 #define __CORE_CM3_H_GENERIC
 
+#include 
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
   CMSIS violates the following MISRA-C:2004 rules:
 
    \li Required Rule 8.5, object/function definition in header file.

@@ -63,74 +55,49 @@
 /*******************************************************************************
  *                 CMSIS definitions
  ******************************************************************************/
-/** \ingroup Cortex_M3
+/**
+  \ingroup Cortex_M3
   @{
  */
 
-/*  CMSIS CM3 definitions */
-#define __CM3_CMSIS_VERSION_MAIN  (0x04)                                   /*!< [31:16] CMSIS HAL main version   */
-#define __CM3_CMSIS_VERSION_SUB   (0x00)                                   /*!< [15:0]  CMSIS HAL sub version    */
-#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16) | \
-                                    __CM3_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
-
-#define __CORTEX_M                (0x03)                                   /*!< Cortex-M Core                    */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
-  #define __STATIC_INLINE  static inline
+#include "cmsis_version.h"
 
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
-  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
-  #define __STATIC_INLINE  static inline
+/*  CMSIS CM3 definitions */
+#define __CM3_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM3_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM3_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
 
-#endif
+#define __CORTEX_M                (3U)                                   /*!< Cortex-M Core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     This core does not support an FPU at all
 */
-#define __FPU_USED       0
+#define __FPU_USED       0U
 
 #if defined ( __CC_ARM )
   #if defined __TARGET_FPU_VFP
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __GNUC__ )
   #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __ICCARM__ )
   #if defined __ARMVFP__
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __TMS470__ )
-  #if defined __TI__VFP_SUPPORT____
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __TASKING__ )
@@ -138,15 +105,15 @@
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __CSMC__ )		/* Cosmic */
-  #if ( __CSMC__ & 0x400)		// FPU present for parser
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
+
 #endif
 
-#include                       /* standard types definitions                      */
-#include                 /* Core Instruction Access                         */
-#include                  /* Core Function Access                            */
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
 
 #ifdef __cplusplus
 }
@@ -166,22 +133,22 @@
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
   #ifndef __CM3_REV
-    #define __CM3_REV               0x0200
+    #define __CM3_REV               0x0200U
     #warning "__CM3_REV not defined in device header file; using default!"
   #endif
 
   #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0
+    #define __MPU_PRESENT             0U
     #warning "__MPU_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          4
+    #define __NVIC_PRIO_BITS          3U
     #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
   #endif
 
   #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0
+    #define __Vendor_SysTickConfig    0U
     #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
   #endif
 #endif
@@ -195,12 +162,17 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions                */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
 
 /*@} end of group Cortex_M3 */
 
@@ -216,1101 +188,1211 @@
   - Core Debug Register
   - Core MPU Register
  ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
-    \brief Type definitions and defines for Cortex-M processor based devices.
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
 */
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_CORE  Status and Control Registers
-    \brief  Core Register type definitions.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
   @{
  */
 
-/** \brief  Union type to access the Application Program Status Register (APSR).
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31                                             /*!< APSR: N Position */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
 #define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30                                             /*!< APSR: Z Position */
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
 #define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29                                             /*!< APSR: C Position */
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
 #define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28                                             /*!< APSR: V Position */
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
 #define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
 
-#define APSR_Q_Pos                         27                                             /*!< APSR: Q Position */
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
 #define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
 
 
-/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0                                             /*!< IPSR: ISR Position */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
 #define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
+    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
+    uint32_t _reserved1:8;               /*!< bit: 16..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
+    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31                                             /*!< xPSR: N Position */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
 #define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30                                             /*!< xPSR: Z Position */
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
 #define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29                                             /*!< xPSR: C Position */
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
 #define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28                                             /*!< xPSR: V Position */
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
 #define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
 
-#define xPSR_Q_Pos                         27                                             /*!< xPSR: Q Position */
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
 #define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
 
-#define xPSR_IT_Pos                        25                                             /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
 
-#define xPSR_T_Pos                         24                                             /*!< xPSR: T Position */
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
 #define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
 
-#define xPSR_ISR_Pos                        0                                             /*!< xPSR: ISR Position */
+#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
 #define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Control Registers (CONTROL).
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
  */
 typedef union
 {
   struct
   {
     uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1                                             /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
 #define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
 
-#define CONTROL_nPRIV_Pos                   0                                             /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
 #define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
 
 /*@} end of group CMSIS_CORE */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-    \brief      Type definitions for the NVIC Registers
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
   @{
  */
 
-/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
  */
 typedef struct
 {
-  __IO uint32_t ISER[8];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
-       uint32_t RESERVED0[24];
-  __IO uint32_t ICER[8];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register         */
-       uint32_t RSERVED1[24];
-  __IO uint32_t ISPR[8];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register          */
-       uint32_t RESERVED2[24];
-  __IO uint32_t ICPR[8];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register        */
-       uint32_t RESERVED3[24];
-  __IO uint32_t IABR[8];                 /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register           */
-       uint32_t RESERVED4[56];
-  __IO uint8_t  IP[240];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-       uint32_t RESERVED5[644];
-  __O  uint32_t STIR;                    /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register     */
+  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[24U];
+  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[24U];
+  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[24U];
+  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[24U];
+  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[56U];
+  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED5[644U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
 }  NVIC_Type;
 
 /* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0                                          /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
 #define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
 
 /*@} end of group CMSIS_NVIC */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCB     System Control Block (SCB)
-    \brief      Type definitions for the System Control Block Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
   @{
  */
 
-/** \brief  Structure type to access the System Control Block (SCB).
+/**
+  \brief  Structure type to access the System Control Block (SCB).
  */
 typedef struct
 {
-  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
-  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
-  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
-  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
-  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
-  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
-  __IO uint8_t  SHP[12];                 /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
-  __IO uint32_t CFSR;                    /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register                    */
-  __IO uint32_t HFSR;                    /*!< Offset: 0x02C (R/W)  HardFault Status Register                             */
-  __IO uint32_t DFSR;                    /*!< Offset: 0x030 (R/W)  Debug Fault Status Register                           */
-  __IO uint32_t MMFAR;                   /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register                      */
-  __IO uint32_t BFAR;                    /*!< Offset: 0x038 (R/W)  BusFault Address Register                             */
-  __IO uint32_t AFSR;                    /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register                       */
-  __I  uint32_t PFR[2];                  /*!< Offset: 0x040 (R/ )  Processor Feature Register                            */
-  __I  uint32_t DFR;                     /*!< Offset: 0x048 (R/ )  Debug Feature Register                                */
-  __I  uint32_t ADR;                     /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register                            */
-  __I  uint32_t MMFR[4];                 /*!< Offset: 0x050 (R/ )  Memory Model Feature Register                         */
-  __I  uint32_t ISAR[5];                 /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register                   */
-       uint32_t RESERVED0[5];
-  __IO uint32_t CPACR;                   /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register                   */
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[5U];
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
 #define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
 #define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_RETTOBASE_Pos             11                                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
 #define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
 
 /* SCB Vector Table Offset Register Definitions */
-#if (__CM3_REV < 0x0201)                   /* core r2p1 */
-#define SCB_VTOR_TBLBASE_Pos               29                                             /*!< SCB VTOR: TBLBASE Position */
+#if defined (__CM3_REV) && (__CM3_REV < 0x0201U)                   /* core r2p1 */
+#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */
 #define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
 
-#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
 #define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
 #else
-#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
 #define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
 #endif
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_PRIGROUP_Pos              8                                             /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
 #define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
-#define SCB_AIRCR_VECTRESET_Pos             0                                             /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
 #define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
 
-#define SCB_CCR_BFHFNMIGN_Pos               8                                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
 #define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
 
-#define SCB_CCR_DIV_0_TRP_Pos               4                                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
 #define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
 
-#define SCB_CCR_USERSETMPEND_Pos            1                                             /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
 #define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
 
-#define SCB_CCR_NONBASETHRDENA_Pos          0                                             /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
 #define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18                                             /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
 #define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
 
-#define SCB_SHCSR_BUSFAULTENA_Pos          17                                             /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
 #define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
 
-#define SCB_SHCSR_MEMFAULTENA_Pos          16                                             /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
 #define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
 
-#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
 
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14                                             /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
 #define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
 
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13                                             /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
 #define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
 
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12                                             /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
 #define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
 
-#define SCB_SHCSR_SYSTICKACT_Pos           11                                             /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
 #define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
 
-#define SCB_SHCSR_PENDSVACT_Pos            10                                             /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
 #define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
 
-#define SCB_SHCSR_MONITORACT_Pos            8                                             /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
 #define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
 
-#define SCB_SHCSR_SVCALLACT_Pos             7                                             /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
 #define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
 
-#define SCB_SHCSR_USGFAULTACT_Pos           3                                             /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
 #define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
 
-#define SCB_SHCSR_BUSFAULTACT_Pos           1                                             /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
 #define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
 
-#define SCB_SHCSR_MEMFAULTACT_Pos           0                                             /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
 #define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
 
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16                                             /*!< SCB CFSR: Usage Fault Status Register Position */
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
 #define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
 
-#define SCB_CFSR_BUSFAULTSR_Pos             8                                             /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
 #define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
 
-#define SCB_CFSR_MEMFAULTSR_Pos             0                                             /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
 #define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
 
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31                                             /*!< SCB HFSR: DEBUGEVT Position */
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
 #define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
 
-#define SCB_HFSR_FORCED_Pos                30                                             /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
 #define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
 
-#define SCB_HFSR_VECTTBL_Pos                1                                             /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
 #define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
 
 /* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4                                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
 #define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
 
-#define SCB_DFSR_VCATCH_Pos                 3                                             /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
 #define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
 
-#define SCB_DFSR_DWTTRAP_Pos                2                                             /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
 #define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
 
-#define SCB_DFSR_BKPT_Pos                   1                                             /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
 #define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
 
-#define SCB_DFSR_HALTED_Pos                 0                                             /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
 #define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
 
 /*@} end of group CMSIS_SCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-    \brief      Type definitions for the System Control and ID Register not in the SCB
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
   @{
  */
 
-/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
  */
 typedef struct
 {
-       uint32_t RESERVED0[1];
-  __I  uint32_t ICTR;                    /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register      */
-#if ((defined __CM3_REV) && (__CM3_REV >= 0x200))
-  __IO uint32_t ACTLR;                   /*!< Offset: 0x008 (R/W)  Auxiliary Control Register      */
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
 #else
-       uint32_t RESERVED1[1];
+        uint32_t RESERVED1[1U];
 #endif
 } SCnSCB_Type;
 
 /* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0                                          /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
 /* Auxiliary Control Register Definitions */
+#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
+#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
 
-#define SCnSCB_ACTLR_DISFOLD_Pos            2                                          /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
 #define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
 
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1                                          /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
 #define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
 
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0                                          /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
 #define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+#endif
 
 /*@} end of group CMSIS_SCnotSCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-    \brief      Type definitions for the System Timer Registers.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
   @{
  */
 
-/** \brief  Structure type to access the System Timer (SysTick).
+/**
+  \brief  Structure type to access the System Timer (SysTick).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
-  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
-  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
 } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
 #define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
 
 /*@} end of group CMSIS_SysTick */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-    \brief      Type definitions for the Instrumentation Trace Macrocell (ITM)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
   @{
  */
 
-/** \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
  */
 typedef struct
 {
-  __O  union
+  __OM  union
   {
-    __O  uint8_t    u8;                  /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit                   */
-    __O  uint16_t   u16;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit                  */
-    __O  uint32_t   u32;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit                  */
-  }  PORT [32];                          /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers               */
-       uint32_t RESERVED0[864];
-  __IO uint32_t TER;                     /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register                 */
-       uint32_t RESERVED1[15];
-  __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
-       uint32_t RESERVED2[15];
-  __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];
-  __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
-  __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
-  __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];
-  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
-  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];
-  __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __I  uint32_t PID7;                    /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __I  uint32_t PID0;                    /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __I  uint32_t PID1;                    /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __I  uint32_t PID2;                    /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __I  uint32_t PID3;                    /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __I  uint32_t CID0;                    /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __I  uint32_t CID1;                    /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __I  uint32_t CID2;                    /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __I  uint32_t CID3;                    /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[6U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
 } ITM_Type;
 
 /* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0                                             /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
 
 /* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23                                             /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
 #define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
 
-#define ITM_TCR_TraceBusID_Pos             16                                             /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
 #define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
 
-#define ITM_TCR_GTSFREQ_Pos                10                                             /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
 #define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
 
-#define ITM_TCR_TSPrescale_Pos              8                                             /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
 #define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
 
-#define ITM_TCR_SWOENA_Pos                  4                                             /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
 #define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
 
-#define ITM_TCR_DWTENA_Pos                  3                                             /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
 #define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
 
-#define ITM_TCR_SYNCENA_Pos                 2                                             /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
 #define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
 
-#define ITM_TCR_TSENA_Pos                   1                                             /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
 #define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
 
-#define ITM_TCR_ITMENA_Pos                  0                                             /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0                                             /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0                                             /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0                                             /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2                                             /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
 
-#define ITM_LSR_Access_Pos                  1                                             /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
 #define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
 
-#define ITM_LSR_Present_Pos                 0                                             /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
 #define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
 
 /*@}*/ /* end of group CMSIS_ITM */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-    \brief      Type definitions for the Data Watchpoint and Trace (DWT)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
   @{
  */
 
-/** \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  Control Register                          */
-  __IO uint32_t CYCCNT;                  /*!< Offset: 0x004 (R/W)  Cycle Count Register                      */
-  __IO uint32_t CPICNT;                  /*!< Offset: 0x008 (R/W)  CPI Count Register                        */
-  __IO uint32_t EXCCNT;                  /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register         */
-  __IO uint32_t SLEEPCNT;                /*!< Offset: 0x010 (R/W)  Sleep Count Register                      */
-  __IO uint32_t LSUCNT;                  /*!< Offset: 0x014 (R/W)  LSU Count Register                        */
-  __IO uint32_t FOLDCNT;                 /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register         */
-  __I  uint32_t PCSR;                    /*!< Offset: 0x01C (R/ )  Program Counter Sample Register           */
-  __IO uint32_t COMP0;                   /*!< Offset: 0x020 (R/W)  Comparator Register 0                     */
-  __IO uint32_t MASK0;                   /*!< Offset: 0x024 (R/W)  Mask Register 0                           */
-  __IO uint32_t FUNCTION0;               /*!< Offset: 0x028 (R/W)  Function Register 0                       */
-       uint32_t RESERVED0[1];
-  __IO uint32_t COMP1;                   /*!< Offset: 0x030 (R/W)  Comparator Register 1                     */
-  __IO uint32_t MASK1;                   /*!< Offset: 0x034 (R/W)  Mask Register 1                           */
-  __IO uint32_t FUNCTION1;               /*!< Offset: 0x038 (R/W)  Function Register 1                       */
-       uint32_t RESERVED1[1];
-  __IO uint32_t COMP2;                   /*!< Offset: 0x040 (R/W)  Comparator Register 2                     */
-  __IO uint32_t MASK2;                   /*!< Offset: 0x044 (R/W)  Mask Register 2                           */
-  __IO uint32_t FUNCTION2;               /*!< Offset: 0x048 (R/W)  Function Register 2                       */
-       uint32_t RESERVED2[1];
-  __IO uint32_t COMP3;                   /*!< Offset: 0x050 (R/W)  Comparator Register 3                     */
-  __IO uint32_t MASK3;                   /*!< Offset: 0x054 (R/W)  Mask Register 3                           */
-  __IO uint32_t FUNCTION3;               /*!< Offset: 0x058 (R/W)  Function Register 3                       */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
 } DWT_Type;
 
 /* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28                                          /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
 #define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
 
-#define DWT_CTRL_NOTRCPKT_Pos              27                                          /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
 #define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
 
-#define DWT_CTRL_NOEXTTRIG_Pos             26                                          /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
 #define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
 
-#define DWT_CTRL_NOCYCCNT_Pos              25                                          /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
 #define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
 
-#define DWT_CTRL_NOPRFCNT_Pos              24                                          /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
 #define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
 
-#define DWT_CTRL_CYCEVTENA_Pos             22                                          /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
 #define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
 
-#define DWT_CTRL_FOLDEVTENA_Pos            21                                          /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
 #define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
 
-#define DWT_CTRL_LSUEVTENA_Pos             20                                          /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
 #define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
 
-#define DWT_CTRL_SLEEPEVTENA_Pos           19                                          /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
 #define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
 
-#define DWT_CTRL_EXCEVTENA_Pos             18                                          /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
 #define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
 
-#define DWT_CTRL_CPIEVTENA_Pos             17                                          /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
 #define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
 
-#define DWT_CTRL_EXCTRCENA_Pos             16                                          /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
 #define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
 
-#define DWT_CTRL_PCSAMPLENA_Pos            12                                          /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
 #define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
 
-#define DWT_CTRL_SYNCTAP_Pos               10                                          /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
 #define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
 
-#define DWT_CTRL_CYCTAP_Pos                 9                                          /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
 #define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
 
-#define DWT_CTRL_POSTINIT_Pos               5                                          /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
 #define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
 
-#define DWT_CTRL_POSTPRESET_Pos             1                                          /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
 #define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
 
-#define DWT_CTRL_CYCCNTENA_Pos              0                                          /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
 #define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
 
 /* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0                                          /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
 #define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
 
 /* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0                                          /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
 #define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
 
 /* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0                                          /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
 #define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
 
 /* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0                                          /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
 #define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
 
 /* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0                                          /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
 #define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
 
 /* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0                                          /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
 #define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
 
 /* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24                                          /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
 #define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
 
-#define DWT_FUNCTION_DATAVADDR1_Pos        16                                          /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
 #define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
 
-#define DWT_FUNCTION_DATAVADDR0_Pos        12                                          /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
 #define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
 
-#define DWT_FUNCTION_DATAVSIZE_Pos         10                                          /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
 #define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
 
-#define DWT_FUNCTION_LNK1ENA_Pos            9                                          /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
 #define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
 
-#define DWT_FUNCTION_DATAVMATCH_Pos         8                                          /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
 #define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
 
-#define DWT_FUNCTION_CYCMATCH_Pos           7                                          /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
 #define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
 
-#define DWT_FUNCTION_EMITRANGE_Pos          5                                          /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
 #define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
 
-#define DWT_FUNCTION_FUNCTION_Pos           0                                          /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
 #define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
 
 /*@}*/ /* end of group CMSIS_DWT */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-    \brief      Type definitions for the Trace Port Interface (TPI)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
   @{
  */
 
-/** \brief  Structure type to access the Trace Port Interface Register (TPI).
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
  */
 typedef struct
 {
-  __IO uint32_t SSPSR;                   /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register     */
-  __IO uint32_t CSPSR;                   /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-       uint32_t RESERVED0[2];
-  __IO uint32_t ACPR;                    /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-       uint32_t RESERVED1[55];
-  __IO uint32_t SPPR;                    /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-       uint32_t RESERVED2[131];
-  __I  uint32_t FFSR;                    /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IO uint32_t FFCR;                    /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __I  uint32_t FSCR;                    /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-       uint32_t RESERVED3[759];
-  __I  uint32_t TRIGGER;                 /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __I  uint32_t FIFO0;                   /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __I  uint32_t ITATBCTR2;               /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-       uint32_t RESERVED4[1];
-  __I  uint32_t ITATBCTR0;               /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __I  uint32_t FIFO1;                   /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IO uint32_t ITCTRL;                  /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-       uint32_t RESERVED5[39];
-  __IO uint32_t CLAIMSET;                /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IO uint32_t CLAIMCLR;                /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-       uint32_t RESERVED7[8];
-  __I  uint32_t DEVID;                   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __I  uint32_t DEVTYPE;                 /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
 } TPI_Type;
 
 /* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0                                          /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
 #define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
 
 /* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0                                          /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
 #define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
 
 /* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3                                          /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
 #define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
 
-#define TPI_FFSR_TCPresent_Pos              2                                          /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
 #define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
 
-#define TPI_FFSR_FtStopped_Pos              1                                          /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
 #define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
 
-#define TPI_FFSR_FlInProg_Pos               0                                          /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
 #define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
 
 /* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8                                          /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
 #define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
 
-#define TPI_FFCR_EnFCont_Pos                1                                          /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
 #define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
 
 /* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0                                          /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
 #define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
-#define TPI_FIFO0_ITM_bytecount_Pos        27                                          /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
-#define TPI_FIFO0_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
-#define TPI_FIFO0_ETM_bytecount_Pos        24                                          /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
 
-#define TPI_FIFO0_ETM2_Pos                 16                                          /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
 #define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
 
-#define TPI_FIFO0_ETM1_Pos                  8                                          /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
 #define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
 
-#define TPI_FIFO0_ETM0_Pos                  0                                          /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
 #define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
 
 /* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0                                          /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
-#define TPI_FIFO1_ITM_bytecount_Pos        27                                          /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
-#define TPI_FIFO1_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
-#define TPI_FIFO1_ETM_bytecount_Pos        24                                          /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
 
-#define TPI_FIFO1_ITM2_Pos                 16                                          /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
 #define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
 
-#define TPI_FIFO1_ITM1_Pos                  8                                          /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
 #define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
 
-#define TPI_FIFO1_ITM0_Pos                  0                                          /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
 #define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
 
 /* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0                                          /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
 
 /* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0                                          /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
 
 /* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11                                          /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
 #define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
 
-#define TPI_DEVID_MANCVALID_Pos            10                                          /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
 #define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
 
-#define TPI_DEVID_PTINVALID_Pos             9                                          /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
 #define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
 
-#define TPI_DEVID_MinBufSz_Pos              6                                          /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
 #define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
 
-#define TPI_DEVID_AsynClkIn_Pos             5                                          /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
 #define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
 
-#define TPI_DEVID_NrTraceInput_Pos          0                                          /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
 #define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
 
 /* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4                                          /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0                                          /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
 #define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
 
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
 /*@}*/ /* end of group CMSIS_TPI */
 
 
-#if (__MPU_PRESENT == 1)
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-    \brief      Type definitions for the Memory Protection Unit (MPU)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
   @{
  */
 
-/** \brief  Structure type to access the Memory Protection Unit (MPU).
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
  */
 typedef struct
 {
-  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
-  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
-  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
-  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
-  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
-  __IO uint32_t RBAR_A1;                 /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register       */
-  __IO uint32_t RASR_A1;                 /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IO uint32_t RBAR_A2;                 /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register       */
-  __IO uint32_t RASR_A2;                 /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IO uint32_t RBAR_A3;                 /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register       */
-  __IO uint32_t RASR_A3;                 /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
 } MPU_Type;
 
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
 #define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
 #define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
 #define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
 
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
 #define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
 #define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
 #define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
 
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
 #define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
 
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos                   5                                             /*!< MPU RBAR: ADDR Position */
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
 #define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
 
-#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
 #define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
 
-#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
 #define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
 
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
 #define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
 
-#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
 #define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
 
-#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
 #define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
 
-#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
 #define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
 
-#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
 #define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
 
-#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
 #define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
 
-#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
 #define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
 
-#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
 #define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
 
-#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
 #define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
 
-#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
 #define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
 
 /*@} end of group CMSIS_MPU */
 #endif
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-    \brief      Type definitions for the Core Debug Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
   @{
  */
 
-/** \brief  Structure type to access the Core Debug Register (CoreDebug).
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
  */
 typedef struct
 {
-  __IO uint32_t DHCSR;                   /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register    */
-  __O  uint32_t DCRSR;                   /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register        */
-  __IO uint32_t DCRDR;                   /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register            */
-  __IO uint32_t DEMCR;                   /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
 } CoreDebug_Type;
 
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16                                             /*!< CoreDebug DHCSR: DBGKEY Position */
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
 #define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
 
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25                                             /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
 #define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
 
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24                                             /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
 #define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
 
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19                                             /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
 #define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
 
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18                                             /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
 #define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
 
-#define CoreDebug_DHCSR_S_HALT_Pos         17                                             /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
 #define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
 
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16                                             /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
 #define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
 
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5                                             /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
 #define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
 
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3                                             /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
 #define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
 
-#define CoreDebug_DHCSR_C_STEP_Pos          2                                             /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
 #define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
 
-#define CoreDebug_DHCSR_C_HALT_Pos          1                                             /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
 #define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
 
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0                                             /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
 #define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
 
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos         16                                             /*!< CoreDebug DCRSR: REGWnR Position */
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
 #define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
 
-#define CoreDebug_DCRSR_REGSEL_Pos          0                                             /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
 #define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
 
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos         24                                             /*!< CoreDebug DEMCR: TRCENA Position */
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
 #define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
 
-#define CoreDebug_DEMCR_MON_REQ_Pos        19                                             /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
 #define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
 
-#define CoreDebug_DEMCR_MON_STEP_Pos       18                                             /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
 #define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
 
-#define CoreDebug_DEMCR_MON_PEND_Pos       17                                             /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
 #define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
 
-#define CoreDebug_DEMCR_MON_EN_Pos         16                                             /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
 #define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
 
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10                                             /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
 #define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
 
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9                                             /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
 #define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
 
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8                                             /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
 #define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
 
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7                                             /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
 #define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
 
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6                                             /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
 #define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
 
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5                                             /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
 #define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
 
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4                                             /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
 #define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
 
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0                                             /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
 #define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
 
 /*@} end of group CMSIS_CoreDebug */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_core_base     Core Definitions
-    \brief      Definitions for base addresses, unions, and structures.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
   @{
  */
 
-/* Memory mapping of Cortex-M3 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address  */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address                   */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address                   */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address                   */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address            */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address               */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                  */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address  */
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
 
 #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct           */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct           */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct           */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct    */
-
-#if (__MPU_PRESENT == 1)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
 #endif
 
 /*@} */
@@ -1325,187 +1407,275 @@ typedef struct
   - Core Debug Functions
   - Core Register Access Functions
  ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
 */
 
 
 
 /* ##########################   NVIC functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-    \brief      Functions that manage interrupts and exceptions via the NVIC.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
  */
 
-/** \brief  Set Priority Grouping
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+   #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
 
-  The function sets the priority grouping field using the required unlock sequence.
-  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-  Only values from 0..7 are used.
-  In case of a conflict between priority grouping and available
-  priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
 
-    \param [in]      PriorityGroup  Priority grouping field.
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
  */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
   uint32_t reg_value;
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 
   reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8)                       );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) );               /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
 
-/** \brief  Get Priority Grouping
-
-  The function reads the priority grouping field from the NVIC Interrupt Controller.
-
-    \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
 {
   return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 }
 
 
-/** \brief  Enable External Interrupt
-
-    The function enables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
 }
 
 
-/** \brief  Disable External Interrupt
-
-    The function disables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Get Pending Interrupt
-
-    The function reads the pending register in the NVIC and returns the pending bit
-    for the specified interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not pending.
-    \return             1  Interrupt status is pending.
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
 }
 
 
-/** \brief  Set Pending Interrupt
-
-    The function sets the pending bit of an external interrupt.
-
-    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Clear Pending Interrupt
-
-    The function clears the pending bit of an external interrupt.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Get Active Interrupt
-
-    The function reads the active register in NVIC and returns the active bit.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not active.
-    \return             1  Interrupt status is active.
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Set Interrupt Priority
-
-    The function sets the priority of an interrupt.
-
-    \note The priority cannot be set for every core interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-    \param [in]  priority  Priority to set.
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
 {
-  if((int32_t)IRQn < 0) {
-    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
   }
-  else {
-    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  else
+  {
+    return(0U);
   }
 }
 
 
-/** \brief  Get Interrupt Priority
-
-    The function reads the priority of an interrupt. The interrupt
-    number can be positive to specify an external (device specific)
-    interrupt, or negative to specify an internal (core) interrupt.
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
 
 
-    \param [in]   IRQn  Interrupt number.
-    \return             Interrupt Priority. Value is aligned automatically to the implemented
-                        priority bits of the microcontroller.
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
  */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
 {
 
-  if((int32_t)IRQn < 0) {
-    return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8 - __NVIC_PRIO_BITS)));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
   }
-  else {
-    return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)]               >> (8 - __NVIC_PRIO_BITS)));
+  else
+  {
+    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
   }
 }
 
 
-/** \brief  Encode Priority
-
-    The function encodes the priority for an interrupt with the given priority group,
-    preemptive priority value, and subpriority value.
-    In case of a conflict between priority grouping and available
-    priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
-    \param [in]     PriorityGroup  Used priority group.
-    \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-    \param [in]       SubPriority  Subpriority value (starting from 0).
-    \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
  */
 __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 {
@@ -1523,19 +1693,18 @@ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t P
 }
 
 
-/** \brief  Decode Priority
-
-    The function decodes an interrupt priority value with a given priority group to
-    preemptive priority value and subpriority value.
-    In case of a conflict between priority grouping and available
-    priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-
-    \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-    \param [in]     PriorityGroup  Used priority group.
-    \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-    \param [out]     pSubPriority  Subpriority value (starting from 0).
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
  */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
 {
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
   uint32_t PreemptPriorityBits;
@@ -1549,11 +1718,43 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr
 }
 
 
-/** \brief  System Reset
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
+}
+
 
-    The function initiates a system reset request to reset the MCU.
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */
@@ -1561,40 +1762,77 @@ __STATIC_INLINE void NVIC_SystemReset(void)
                            (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
                             SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
   __DSB();                                                          /* Ensure completion of memory access */
-  while(1) { __NOP(); }                                             /* wait until reset */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
 }
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
+/* ##########################  MPU functions  #################################### */
 
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
 
-/* ##################################    SysTick function  ############################################ */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-    \brief      Functions that configure the System.
+#include "mpu_armv7.h"
+
+#endif
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
   @{
  */
 
-#if (__Vendor_SysTickConfig == 0)
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
 
-/** \brief  System Tick Configuration
+/*@} end of CMSIS_Core_FpuFunctions */
 
-    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
-    Counter is in free running mode to generate periodic interrupts.
 
-    \param [in]  ticks  Number of ticks between two interrupts.
 
-    \return          0  Function succeeded.
-    \return          1  Function failed.
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
 
-    \note     When the variable __Vendor_SysTickConfig is set to 1, then the
-    function SysTick_Config is not included. In this case, the file device.h
-    must contain a vendor-specific implementation of this function.
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
 
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) { return (1UL); }    /* Reload value impossible */
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
@@ -1612,49 +1850,52 @@ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 
 
 /* ##################################### Debug In/Output function ########################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_core_DebugFunctions ITM Functions
-    \brief   Functions that access the ITM debug interface.
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
   @{
  */
 
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters.                         */
-#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/** \brief  ITM Send Character
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
 
-    The function transmits a character via the ITM channel 0, and
-    \li Just returns when no debugger is connected that has booked the output.
-    \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
 
-    \param [in]     ch  Character to transmit.
-
-    \returns            Character to transmit.
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
  */
 __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
 {
   if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
       ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
   {
-    while (ITM->PORT[0].u32 == 0UL) { __NOP(); }
-    ITM->PORT[0].u8 = (uint8_t)ch;
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
   }
   return (ch);
 }
 
 
-/** \brief  ITM Receive Character
-
-    The function inputs a character via the external variable \ref ITM_RxBuffer.
-
-    \return             Received character.
-    \return         -1  No character pending.
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
  */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
   int32_t ch = -1;                           /* no character available */
 
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
     ch = ITM_RxBuffer;
     ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
   }
@@ -1663,19 +1904,22 @@ __STATIC_INLINE int32_t ITM_ReceiveChar (void) {
 }
 
 
-/** \brief  ITM Check Character
-
-    The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
-    \return          0  No character available.
-    \return          1  Character available.
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
  */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
 
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
-    return (0);                                 /* no character available */
-  } else {
-    return (1);                                 /*    character available */
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
   }
 }
 
diff --git a/Libraries/CMSIS/Include/core_cm33.h b/Libraries/CMSIS/Include/core_cm33.h
new file mode 100644
index 00000000..2f1d98e2
--- /dev/null
+++ b/Libraries/CMSIS/Include/core_cm33.h
@@ -0,0 +1,2910 @@
+/**************************************************************************//**
+ * @file     core_cm33.h
+ * @brief    CMSIS Cortex-M33 Core Peripheral Access Layer Header File
+ * @version  V5.1.0
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM33_H_GENERIC
+#define __CORE_CM33_H_GENERIC
+
+#include 
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.

+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.

+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M33
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS CM33 definitions */
+#define __CM33_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM33_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM33_CMSIS_VERSION       ((__CM33_CMSIS_VERSION_MAIN << 16U) | \
+                                     __CM33_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                 (33U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined (__TARGET_FPU_VFP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined (__ARM_FP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined (__ARMVFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined (__TI_VFP_SUPPORT__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined (__FPU_VFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM33_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM33_H_DEPENDANT
+#define __CORE_CM33_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM33_REV
+    #define __CM33_REV                0x0000U
+    #warning "__CM33_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    IO Type Qualifiers are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M33 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED3[92U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else 
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function TZ_SysTick_Config_NS is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM33_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm35p.h b/Libraries/CMSIS/Include/core_cm35p.h
new file mode 100644
index 00000000..7d343679
--- /dev/null
+++ b/Libraries/CMSIS/Include/core_cm35p.h
@@ -0,0 +1,2910 @@
+/**************************************************************************//**
+ * @file     core_cm35p.h
+ * @brief    CMSIS Cortex-M35P Core Peripheral Access Layer Header File
+ * @version  V1.0.0
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM35P_H_GENERIC
+#define __CORE_CM35P_H_GENERIC
+
+#include 
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.

+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.

+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.

+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M35P
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS CM35P definitions */
+#define __CM35P_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM35P_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM35P_CMSIS_VERSION       ((__CM35P_CMSIS_VERSION_MAIN << 16U) | \
+                                      __CM35P_CMSIS_VERSION_SUB           )    /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                 (35U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined (__TARGET_FPU_VFP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined (__ARM_FP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined (__ARMVFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined (__TI_VFP_SUPPORT__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined (__FPU_VFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM35P_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM35P_H_DEPENDANT
+#define __CORE_CM35P_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM35P_REV
+    #define __CM35P_REV               0x0000U
+    #warning "__CM35P_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    IO Type Qualifiers are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M35P */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED3[92U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else 
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function TZ_SysTick_Config_NS is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM35P_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm4.h b/Libraries/CMSIS/Include/core_cm4.h
index 544d4148..90c2a72d 100644
--- a/Libraries/CMSIS/Include/core_cm4.h
+++ b/Libraries/CMSIS/Include/core_cm4.h
@@ -1,52 +1,44 @@
 /**************************************************************************//**
  * @file     core_cm4.h
  * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version  V4.10
- * @date     18. March 2015
+ * @version  V5.1.0
+ * @date     13. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
- * @note
+ * SPDX-License-Identifier: Apache-2.0
  *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include  /* treat file as system include file for MISRA check */
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
 #endif
 
 #ifndef __CORE_CM4_H_GENERIC
 #define __CORE_CM4_H_GENERIC
 
+#include 
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
   CMSIS violates the following MISRA-C:2004 rules:
 
    \li Required Rule 8.5, object/function definition in header file.

@@ -63,131 +55,112 @@
 /*******************************************************************************
  *                 CMSIS definitions
  ******************************************************************************/
-/** \ingroup Cortex_M4
+/**
+  \ingroup Cortex_M4
   @{
  */
 
-/*  CMSIS CM4 definitions */
-#define __CM4_CMSIS_VERSION_MAIN  (0x04)                                   /*!< [31:16] CMSIS HAL main version   */
-#define __CM4_CMSIS_VERSION_SUB   (0x00)                                   /*!< [15:0]  CMSIS HAL sub version    */
-#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16) | \
-                                    __CM4_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
-
-#define __CORTEX_M                (0x04)                                   /*!< Cortex-M Core                    */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
-  #define __STATIC_INLINE  static __inline
+#include "cmsis_version.h"
 
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
+/* CMSIS CM4 definitions */
+#define __CM4_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM4_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM4_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
 
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
-  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#endif
+#define __CORTEX_M                (4U)                                   /*!< Cortex-M Core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
 */
 #if defined ( __CC_ARM )
   #if defined __TARGET_FPU_VFP
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
       #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
 #elif defined ( __GNUC__ )
   #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
 #elif defined ( __ICCARM__ )
   #if defined __ARMVFP__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
-#elif defined ( __TMS470__ )
+#elif defined ( __TI_ARM__ )
   #if defined __TI_VFP_SUPPORT__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
 #elif defined ( __TASKING__ )
   #if defined __FPU_VFP__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
       #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
-#elif defined ( __CSMC__ )		/* Cosmic */
-  #if ( __CSMC__ & 0x400)		// FPU present for parser
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
       #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
+
 #endif
 
-#include                       /* standard types definitions                      */
-#include                 /* Core Instruction Access                         */
-#include                  /* Core Function Access                            */
-#include                  /* Compiler specific SIMD Intrinsics               */
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
 
 #ifdef __cplusplus
 }
@@ -207,27 +180,27 @@
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
   #ifndef __CM4_REV
-    #define __CM4_REV               0x0000
+    #define __CM4_REV               0x0000U
     #warning "__CM4_REV not defined in device header file; using default!"
   #endif
 
   #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0
+    #define __FPU_PRESENT             0U
     #warning "__FPU_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0
+    #define __MPU_PRESENT             0U
     #warning "__MPU_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          4
+    #define __NVIC_PRIO_BITS          3U
     #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
   #endif
 
   #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0
+    #define __Vendor_SysTickConfig    0U
     #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
   #endif
 #endif
@@ -241,12 +214,17 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions                */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
 
 /*@} end of group Cortex_M4 */
 
@@ -263,1220 +241,1332 @@
   - Core MPU Register
   - Core FPU Register
  ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
-    \brief Type definitions and defines for Cortex-M processor based devices.
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
 */
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_CORE  Status and Control Registers
-    \brief  Core Register type definitions.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
   @{
  */
 
-/** \brief  Union type to access the Application Program Status Register (APSR).
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31                                             /*!< APSR: N Position */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
 #define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30                                             /*!< APSR: Z Position */
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
 #define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29                                             /*!< APSR: C Position */
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
 #define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28                                             /*!< APSR: V Position */
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
 #define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
 
-#define APSR_Q_Pos                         27                                             /*!< APSR: Q Position */
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
 #define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
 
-#define APSR_GE_Pos                        16                                             /*!< APSR: GE Position */
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
 #define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
 
 
-/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0                                             /*!< IPSR: ISR Position */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
 #define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
+    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
+    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31                                             /*!< xPSR: N Position */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
 #define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30                                             /*!< xPSR: Z Position */
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
 #define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29                                             /*!< xPSR: C Position */
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
 #define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28                                             /*!< xPSR: V Position */
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
 #define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
 
-#define xPSR_Q_Pos                         27                                             /*!< xPSR: Q Position */
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
 #define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
 
-#define xPSR_IT_Pos                        25                                             /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
 
-#define xPSR_T_Pos                         24                                             /*!< xPSR: T Position */
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
 #define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
 
-#define xPSR_GE_Pos                        16                                             /*!< xPSR: GE Position */
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
 #define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
 
-#define xPSR_ISR_Pos                        0                                             /*!< xPSR: ISR Position */
+#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
 #define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Control Registers (CONTROL).
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
  */
 typedef union
 {
   struct
   {
     uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
-    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
-    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos                    2                                             /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
 #define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
 
-#define CONTROL_SPSEL_Pos                   1                                             /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
 #define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
 
-#define CONTROL_nPRIV_Pos                   0                                             /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
 #define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
 
 /*@} end of group CMSIS_CORE */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-    \brief      Type definitions for the NVIC Registers
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
   @{
  */
 
-/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
  */
 typedef struct
 {
-  __IO uint32_t ISER[8];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
-       uint32_t RESERVED0[24];
-  __IO uint32_t ICER[8];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register         */
-       uint32_t RSERVED1[24];
-  __IO uint32_t ISPR[8];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register          */
-       uint32_t RESERVED2[24];
-  __IO uint32_t ICPR[8];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register        */
-       uint32_t RESERVED3[24];
-  __IO uint32_t IABR[8];                 /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register           */
-       uint32_t RESERVED4[56];
-  __IO uint8_t  IP[240];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-       uint32_t RESERVED5[644];
-  __O  uint32_t STIR;                    /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register     */
+  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[24U];
+  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[24U];
+  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[24U];
+  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[24U];
+  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[56U];
+  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED5[644U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
 }  NVIC_Type;
 
 /* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0                                          /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
 #define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
 
 /*@} end of group CMSIS_NVIC */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCB     System Control Block (SCB)
-    \brief      Type definitions for the System Control Block Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
   @{
  */
 
-/** \brief  Structure type to access the System Control Block (SCB).
+/**
+  \brief  Structure type to access the System Control Block (SCB).
  */
 typedef struct
 {
-  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
-  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
-  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
-  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
-  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
-  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
-  __IO uint8_t  SHP[12];                 /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
-  __IO uint32_t CFSR;                    /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register                    */
-  __IO uint32_t HFSR;                    /*!< Offset: 0x02C (R/W)  HardFault Status Register                             */
-  __IO uint32_t DFSR;                    /*!< Offset: 0x030 (R/W)  Debug Fault Status Register                           */
-  __IO uint32_t MMFAR;                   /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register                      */
-  __IO uint32_t BFAR;                    /*!< Offset: 0x038 (R/W)  BusFault Address Register                             */
-  __IO uint32_t AFSR;                    /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register                       */
-  __I  uint32_t PFR[2];                  /*!< Offset: 0x040 (R/ )  Processor Feature Register                            */
-  __I  uint32_t DFR;                     /*!< Offset: 0x048 (R/ )  Debug Feature Register                                */
-  __I  uint32_t ADR;                     /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register                            */
-  __I  uint32_t MMFR[4];                 /*!< Offset: 0x050 (R/ )  Memory Model Feature Register                         */
-  __I  uint32_t ISAR[5];                 /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register                   */
-       uint32_t RESERVED0[5];
-  __IO uint32_t CPACR;                   /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register                   */
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[5U];
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
 #define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
 #define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_RETTOBASE_Pos             11                                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
 #define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
 
 /* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
 #define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_PRIGROUP_Pos              8                                             /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
 #define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
-#define SCB_AIRCR_VECTRESET_Pos             0                                             /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
 #define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
 
-#define SCB_CCR_BFHFNMIGN_Pos               8                                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
 #define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
 
-#define SCB_CCR_DIV_0_TRP_Pos               4                                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
 #define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
 
-#define SCB_CCR_USERSETMPEND_Pos            1                                             /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
 #define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
 
-#define SCB_CCR_NONBASETHRDENA_Pos          0                                             /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
 #define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18                                             /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
 #define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
 
-#define SCB_SHCSR_BUSFAULTENA_Pos          17                                             /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
 #define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
 
-#define SCB_SHCSR_MEMFAULTENA_Pos          16                                             /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
 #define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
 
-#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
 
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14                                             /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
 #define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
 
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13                                             /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
 #define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
 
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12                                             /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
 #define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
 
-#define SCB_SHCSR_SYSTICKACT_Pos           11                                             /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
 #define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
 
-#define SCB_SHCSR_PENDSVACT_Pos            10                                             /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
 #define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
 
-#define SCB_SHCSR_MONITORACT_Pos            8                                             /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
 #define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
 
-#define SCB_SHCSR_SVCALLACT_Pos             7                                             /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
 #define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
 
-#define SCB_SHCSR_USGFAULTACT_Pos           3                                             /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
 #define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
 
-#define SCB_SHCSR_BUSFAULTACT_Pos           1                                             /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
 #define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
 
-#define SCB_SHCSR_MEMFAULTACT_Pos           0                                             /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
 #define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
 
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16                                             /*!< SCB CFSR: Usage Fault Status Register Position */
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
 #define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
 
-#define SCB_CFSR_BUSFAULTSR_Pos             8                                             /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
 #define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
 
-#define SCB_CFSR_MEMFAULTSR_Pos             0                                             /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
 #define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
 
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31                                             /*!< SCB HFSR: DEBUGEVT Position */
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
 #define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
 
-#define SCB_HFSR_FORCED_Pos                30                                             /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
 #define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
 
-#define SCB_HFSR_VECTTBL_Pos                1                                             /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
 #define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
 
 /* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4                                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
 #define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
 
-#define SCB_DFSR_VCATCH_Pos                 3                                             /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
 #define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
 
-#define SCB_DFSR_DWTTRAP_Pos                2                                             /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
 #define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
 
-#define SCB_DFSR_BKPT_Pos                   1                                             /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
 #define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
 
-#define SCB_DFSR_HALTED_Pos                 0                                             /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
 #define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
 
 /*@} end of group CMSIS_SCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-    \brief      Type definitions for the System Control and ID Register not in the SCB
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
   @{
  */
 
-/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
  */
 typedef struct
 {
-       uint32_t RESERVED0[1];
-  __I  uint32_t ICTR;                    /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register      */
-  __IO uint32_t ACTLR;                   /*!< Offset: 0x008 (R/W)  Auxiliary Control Register              */
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
 } SCnSCB_Type;
 
 /* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0                                          /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
 /* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISOOFP_Pos            9                                          /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
 #define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
 
-#define SCnSCB_ACTLR_DISFPCA_Pos            8                                          /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
 #define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
 
-#define SCnSCB_ACTLR_DISFOLD_Pos            2                                          /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
 #define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
 
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1                                          /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
 #define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
 
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0                                          /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
 #define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
 
 /*@} end of group CMSIS_SCnotSCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-    \brief      Type definitions for the System Timer Registers.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
   @{
  */
 
-/** \brief  Structure type to access the System Timer (SysTick).
+/**
+  \brief  Structure type to access the System Timer (SysTick).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
-  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
-  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
 } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
 #define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
 
 /*@} end of group CMSIS_SysTick */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-    \brief      Type definitions for the Instrumentation Trace Macrocell (ITM)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
   @{
  */
 
-/** \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
  */
 typedef struct
 {
-  __O  union
+  __OM  union
   {
-    __O  uint8_t    u8;                  /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit                   */
-    __O  uint16_t   u16;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit                  */
-    __O  uint32_t   u32;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit                  */
-  }  PORT [32];                          /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers               */
-       uint32_t RESERVED0[864];
-  __IO uint32_t TER;                     /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register                 */
-       uint32_t RESERVED1[15];
-  __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
-       uint32_t RESERVED2[15];
-  __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];
-  __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
-  __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
-  __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];
-  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
-  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];
-  __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __I  uint32_t PID7;                    /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __I  uint32_t PID0;                    /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __I  uint32_t PID1;                    /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __I  uint32_t PID2;                    /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __I  uint32_t PID3;                    /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __I  uint32_t CID0;                    /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __I  uint32_t CID1;                    /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __I  uint32_t CID2;                    /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __I  uint32_t CID3;                    /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[6U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
 } ITM_Type;
 
 /* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0                                             /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
 
 /* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23                                             /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
 #define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
 
-#define ITM_TCR_TraceBusID_Pos             16                                             /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
 #define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
 
-#define ITM_TCR_GTSFREQ_Pos                10                                             /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
 #define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
 
-#define ITM_TCR_TSPrescale_Pos              8                                             /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
 #define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
 
-#define ITM_TCR_SWOENA_Pos                  4                                             /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
 #define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
 
-#define ITM_TCR_DWTENA_Pos                  3                                             /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
 #define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
 
-#define ITM_TCR_SYNCENA_Pos                 2                                             /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
 #define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
 
-#define ITM_TCR_TSENA_Pos                   1                                             /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
 #define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
 
-#define ITM_TCR_ITMENA_Pos                  0                                             /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0                                             /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0                                             /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0                                             /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2                                             /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
 
-#define ITM_LSR_Access_Pos                  1                                             /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
 #define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
 
-#define ITM_LSR_Present_Pos                 0                                             /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
 #define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
 
 /*@}*/ /* end of group CMSIS_ITM */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-    \brief      Type definitions for the Data Watchpoint and Trace (DWT)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
   @{
  */
 
-/** \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  Control Register                          */
-  __IO uint32_t CYCCNT;                  /*!< Offset: 0x004 (R/W)  Cycle Count Register                      */
-  __IO uint32_t CPICNT;                  /*!< Offset: 0x008 (R/W)  CPI Count Register                        */
-  __IO uint32_t EXCCNT;                  /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register         */
-  __IO uint32_t SLEEPCNT;                /*!< Offset: 0x010 (R/W)  Sleep Count Register                      */
-  __IO uint32_t LSUCNT;                  /*!< Offset: 0x014 (R/W)  LSU Count Register                        */
-  __IO uint32_t FOLDCNT;                 /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register         */
-  __I  uint32_t PCSR;                    /*!< Offset: 0x01C (R/ )  Program Counter Sample Register           */
-  __IO uint32_t COMP0;                   /*!< Offset: 0x020 (R/W)  Comparator Register 0                     */
-  __IO uint32_t MASK0;                   /*!< Offset: 0x024 (R/W)  Mask Register 0                           */
-  __IO uint32_t FUNCTION0;               /*!< Offset: 0x028 (R/W)  Function Register 0                       */
-       uint32_t RESERVED0[1];
-  __IO uint32_t COMP1;                   /*!< Offset: 0x030 (R/W)  Comparator Register 1                     */
-  __IO uint32_t MASK1;                   /*!< Offset: 0x034 (R/W)  Mask Register 1                           */
-  __IO uint32_t FUNCTION1;               /*!< Offset: 0x038 (R/W)  Function Register 1                       */
-       uint32_t RESERVED1[1];
-  __IO uint32_t COMP2;                   /*!< Offset: 0x040 (R/W)  Comparator Register 2                     */
-  __IO uint32_t MASK2;                   /*!< Offset: 0x044 (R/W)  Mask Register 2                           */
-  __IO uint32_t FUNCTION2;               /*!< Offset: 0x048 (R/W)  Function Register 2                       */
-       uint32_t RESERVED2[1];
-  __IO uint32_t COMP3;                   /*!< Offset: 0x050 (R/W)  Comparator Register 3                     */
-  __IO uint32_t MASK3;                   /*!< Offset: 0x054 (R/W)  Mask Register 3                           */
-  __IO uint32_t FUNCTION3;               /*!< Offset: 0x058 (R/W)  Function Register 3                       */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
 } DWT_Type;
 
 /* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28                                          /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
 #define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
 
-#define DWT_CTRL_NOTRCPKT_Pos              27                                          /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
 #define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
 
-#define DWT_CTRL_NOEXTTRIG_Pos             26                                          /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
 #define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
 
-#define DWT_CTRL_NOCYCCNT_Pos              25                                          /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
 #define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
 
-#define DWT_CTRL_NOPRFCNT_Pos              24                                          /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
 #define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
 
-#define DWT_CTRL_CYCEVTENA_Pos             22                                          /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
 #define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
 
-#define DWT_CTRL_FOLDEVTENA_Pos            21                                          /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
 #define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
 
-#define DWT_CTRL_LSUEVTENA_Pos             20                                          /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
 #define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
 
-#define DWT_CTRL_SLEEPEVTENA_Pos           19                                          /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
 #define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
 
-#define DWT_CTRL_EXCEVTENA_Pos             18                                          /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
 #define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
 
-#define DWT_CTRL_CPIEVTENA_Pos             17                                          /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
 #define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
 
-#define DWT_CTRL_EXCTRCENA_Pos             16                                          /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
 #define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
 
-#define DWT_CTRL_PCSAMPLENA_Pos            12                                          /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
 #define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
 
-#define DWT_CTRL_SYNCTAP_Pos               10                                          /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
 #define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
 
-#define DWT_CTRL_CYCTAP_Pos                 9                                          /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
 #define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
 
-#define DWT_CTRL_POSTINIT_Pos               5                                          /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
 #define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
 
-#define DWT_CTRL_POSTPRESET_Pos             1                                          /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
 #define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
 
-#define DWT_CTRL_CYCCNTENA_Pos              0                                          /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
 #define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
 
 /* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0                                          /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
 #define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
 
 /* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0                                          /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
 #define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
 
 /* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0                                          /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
 #define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
 
 /* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0                                          /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
 #define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
 
 /* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0                                          /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
 #define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
 
 /* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0                                          /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
 #define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
 
 /* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24                                          /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
 #define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
 
-#define DWT_FUNCTION_DATAVADDR1_Pos        16                                          /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
 #define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
 
-#define DWT_FUNCTION_DATAVADDR0_Pos        12                                          /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
 #define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
 
-#define DWT_FUNCTION_DATAVSIZE_Pos         10                                          /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
 #define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
 
-#define DWT_FUNCTION_LNK1ENA_Pos            9                                          /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
 #define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
 
-#define DWT_FUNCTION_DATAVMATCH_Pos         8                                          /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
 #define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
 
-#define DWT_FUNCTION_CYCMATCH_Pos           7                                          /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
 #define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
 
-#define DWT_FUNCTION_EMITRANGE_Pos          5                                          /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
 #define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
 
-#define DWT_FUNCTION_FUNCTION_Pos           0                                          /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
 #define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
 
 /*@}*/ /* end of group CMSIS_DWT */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-    \brief      Type definitions for the Trace Port Interface (TPI)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
   @{
  */
 
-/** \brief  Structure type to access the Trace Port Interface Register (TPI).
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
  */
 typedef struct
 {
-  __IO uint32_t SSPSR;                   /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register     */
-  __IO uint32_t CSPSR;                   /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-       uint32_t RESERVED0[2];
-  __IO uint32_t ACPR;                    /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-       uint32_t RESERVED1[55];
-  __IO uint32_t SPPR;                    /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-       uint32_t RESERVED2[131];
-  __I  uint32_t FFSR;                    /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IO uint32_t FFCR;                    /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __I  uint32_t FSCR;                    /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-       uint32_t RESERVED3[759];
-  __I  uint32_t TRIGGER;                 /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __I  uint32_t FIFO0;                   /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __I  uint32_t ITATBCTR2;               /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-       uint32_t RESERVED4[1];
-  __I  uint32_t ITATBCTR0;               /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __I  uint32_t FIFO1;                   /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IO uint32_t ITCTRL;                  /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-       uint32_t RESERVED5[39];
-  __IO uint32_t CLAIMSET;                /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IO uint32_t CLAIMCLR;                /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-       uint32_t RESERVED7[8];
-  __I  uint32_t DEVID;                   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __I  uint32_t DEVTYPE;                 /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
 } TPI_Type;
 
 /* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0                                          /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
 #define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
 
 /* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0                                          /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
 #define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
 
 /* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3                                          /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
 #define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
 
-#define TPI_FFSR_TCPresent_Pos              2                                          /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
 #define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
 
-#define TPI_FFSR_FtStopped_Pos              1                                          /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
 #define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
 
-#define TPI_FFSR_FlInProg_Pos               0                                          /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
 #define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
 
 /* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8                                          /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
 #define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
 
-#define TPI_FFCR_EnFCont_Pos                1                                          /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
 #define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
 
 /* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0                                          /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
 #define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
-#define TPI_FIFO0_ITM_bytecount_Pos        27                                          /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
-#define TPI_FIFO0_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
-#define TPI_FIFO0_ETM_bytecount_Pos        24                                          /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
 
-#define TPI_FIFO0_ETM2_Pos                 16                                          /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
 #define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
 
-#define TPI_FIFO0_ETM1_Pos                  8                                          /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
 #define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
 
-#define TPI_FIFO0_ETM0_Pos                  0                                          /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
 #define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
 
 /* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0                                          /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
-#define TPI_FIFO1_ITM_bytecount_Pos        27                                          /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
-#define TPI_FIFO1_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
-#define TPI_FIFO1_ETM_bytecount_Pos        24                                          /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
 
-#define TPI_FIFO1_ITM2_Pos                 16                                          /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
 #define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
 
-#define TPI_FIFO1_ITM1_Pos                  8                                          /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
 #define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
 
-#define TPI_FIFO1_ITM0_Pos                  0                                          /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
 #define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
 
 /* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0                                          /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
 
 /* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0                                          /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
 
 /* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11                                          /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
 #define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
 
-#define TPI_DEVID_MANCVALID_Pos            10                                          /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
 #define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
 
-#define TPI_DEVID_PTINVALID_Pos             9                                          /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
 #define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
 
-#define TPI_DEVID_MinBufSz_Pos              6                                          /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
 #define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
 
-#define TPI_DEVID_AsynClkIn_Pos             5                                          /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
 #define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
 
-#define TPI_DEVID_NrTraceInput_Pos          0                                          /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
 #define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
 
 /* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4                                          /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0                                          /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
 #define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
 
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
 /*@}*/ /* end of group CMSIS_TPI */
 
 
-#if (__MPU_PRESENT == 1)
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-    \brief      Type definitions for the Memory Protection Unit (MPU)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
   @{
  */
 
-/** \brief  Structure type to access the Memory Protection Unit (MPU).
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
  */
 typedef struct
 {
-  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
-  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
-  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
-  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
-  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
-  __IO uint32_t RBAR_A1;                 /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register       */
-  __IO uint32_t RASR_A1;                 /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IO uint32_t RBAR_A2;                 /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register       */
-  __IO uint32_t RASR_A2;                 /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IO uint32_t RBAR_A3;                 /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register       */
-  __IO uint32_t RASR_A3;                 /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
 } MPU_Type;
 
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
 #define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
 #define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
 #define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
 
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
 #define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
 #define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
 #define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
 
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
 #define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
 
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos                   5                                             /*!< MPU RBAR: ADDR Position */
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
 #define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
 
-#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
 #define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
 
-#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
 #define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
 
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
 #define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
 
-#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
 #define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
 
-#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
 #define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
 
-#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
 #define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
 
-#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
 #define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
 
-#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
 #define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
 
-#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
 #define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
 
-#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
 #define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
 
-#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
 #define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
 
-#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
 #define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
 
 /*@} end of group CMSIS_MPU */
-#endif
+#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
 
 
-#if (__FPU_PRESENT == 1)
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-    \brief      Type definitions for the Floating Point Unit (FPU)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
   @{
  */
 
-/** \brief  Structure type to access the Floating Point Unit (FPU).
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
  */
 typedef struct
 {
-       uint32_t RESERVED0[1];
-  __IO uint32_t FPCCR;                   /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register               */
-  __IO uint32_t FPCAR;                   /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register               */
-  __IO uint32_t FPDSCR;                  /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register        */
-  __I  uint32_t MVFR0;                   /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0                       */
-  __I  uint32_t MVFR1;                   /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1                       */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
 } FPU_Type;
 
-/* Floating-Point Context Control Register */
-#define FPU_FPCCR_ASPEN_Pos                31                                             /*!< FPCCR: ASPEN bit Position */
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
 #define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
 
-#define FPU_FPCCR_LSPEN_Pos                30                                             /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
 #define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
 
-#define FPU_FPCCR_MONRDY_Pos                8                                             /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
 #define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
 
-#define FPU_FPCCR_BFRDY_Pos                 6                                             /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
 #define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
 
-#define FPU_FPCCR_MMRDY_Pos                 5                                             /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
 #define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
 
-#define FPU_FPCCR_HFRDY_Pos                 4                                             /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
 #define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
 
-#define FPU_FPCCR_THREAD_Pos                3                                             /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
 #define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
 
-#define FPU_FPCCR_USER_Pos                  1                                             /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
 #define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
 
-#define FPU_FPCCR_LSPACT_Pos                0                                             /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
 #define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
 
-/* Floating-Point Context Address Register */
-#define FPU_FPCAR_ADDRESS_Pos               3                                             /*!< FPCAR: ADDRESS bit Position */
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
 #define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
 
-/* Floating-Point Default Status Control Register */
-#define FPU_FPDSCR_AHP_Pos                 26                                             /*!< FPDSCR: AHP bit Position */
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
 #define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
 
-#define FPU_FPDSCR_DN_Pos                  25                                             /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
 #define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
 
-#define FPU_FPDSCR_FZ_Pos                  24                                             /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
 #define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
 
-#define FPU_FPDSCR_RMode_Pos               22                                             /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
 #define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
 
-/* Media and FP Feature Register 0 */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28                                             /*!< MVFR0: FP rounding modes bits Position */
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
 #define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
 
-#define FPU_MVFR0_Short_vectors_Pos        24                                             /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
 #define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
 
-#define FPU_MVFR0_Square_root_Pos          20                                             /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
 #define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
 
-#define FPU_MVFR0_Divide_Pos               16                                             /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
 #define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
 
-#define FPU_MVFR0_FP_excep_trapping_Pos    12                                             /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
 #define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
 
-#define FPU_MVFR0_Double_precision_Pos      8                                             /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
 #define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
 
-#define FPU_MVFR0_Single_precision_Pos      4                                             /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
 #define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
 
-#define FPU_MVFR0_A_SIMD_registers_Pos      0                                             /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
 #define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
 
-/* Media and FP Feature Register 1 */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28                                             /*!< MVFR1: FP fused MAC bits Position */
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
 #define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
 
-#define FPU_MVFR1_FP_HPFP_Pos              24                                             /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
 #define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
 
-#define FPU_MVFR1_D_NaN_mode_Pos            4                                             /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
 #define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
 
-#define FPU_MVFR1_FtZ_mode_Pos              0                                             /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
 #define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
 
+/* Media and FP Feature Register 2 Definitions */
+
+#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
+
 /*@} end of group CMSIS_FPU */
-#endif
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-    \brief      Type definitions for the Core Debug Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
   @{
  */
 
-/** \brief  Structure type to access the Core Debug Register (CoreDebug).
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
  */
 typedef struct
 {
-  __IO uint32_t DHCSR;                   /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register    */
-  __O  uint32_t DCRSR;                   /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register        */
-  __IO uint32_t DCRDR;                   /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register            */
-  __IO uint32_t DEMCR;                   /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
 } CoreDebug_Type;
 
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16                                             /*!< CoreDebug DHCSR: DBGKEY Position */
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
 #define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
 
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25                                             /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
 #define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
 
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24                                             /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
 #define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
 
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19                                             /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
 #define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
 
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18                                             /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
 #define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
 
-#define CoreDebug_DHCSR_S_HALT_Pos         17                                             /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
 #define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
 
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16                                             /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
 #define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
 
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5                                             /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
 #define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
 
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3                                             /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
 #define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
 
-#define CoreDebug_DHCSR_C_STEP_Pos          2                                             /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
 #define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
 
-#define CoreDebug_DHCSR_C_HALT_Pos          1                                             /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
 #define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
 
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0                                             /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
 #define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
 
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos         16                                             /*!< CoreDebug DCRSR: REGWnR Position */
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
 #define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
 
-#define CoreDebug_DCRSR_REGSEL_Pos          0                                             /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
 #define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
 
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos         24                                             /*!< CoreDebug DEMCR: TRCENA Position */
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
 #define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
 
-#define CoreDebug_DEMCR_MON_REQ_Pos        19                                             /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
 #define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
 
-#define CoreDebug_DEMCR_MON_STEP_Pos       18                                             /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
 #define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
 
-#define CoreDebug_DEMCR_MON_PEND_Pos       17                                             /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
 #define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
 
-#define CoreDebug_DEMCR_MON_EN_Pos         16                                             /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
 #define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
 
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10                                             /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
 #define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
 
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9                                             /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
 #define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
 
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8                                             /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
 #define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
 
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7                                             /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
 #define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
 
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6                                             /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
 #define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
 
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5                                             /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
 #define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
 
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4                                             /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
 #define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
 
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0                                             /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
 #define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
 
 /*@} end of group CMSIS_CoreDebug */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_core_base     Core Definitions
-    \brief      Definitions for base addresses, unions, and structures.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
   @{
  */
 
-/* Memory mapping of Cortex-M4 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address  */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address                   */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address                   */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address                   */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address            */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address               */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                  */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address  */
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
 
 #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct           */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct           */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct           */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct    */
-
-#if (__MPU_PRESENT == 1)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
 #endif
 
-#if (__FPU_PRESENT == 1)
-  #define FPU_BASE          (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit                */
-  #define FPU               ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit                */
-#endif
+#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
+#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
 
 /*@} */
 
@@ -1490,187 +1580,278 @@ typedef struct
   - Core Debug Functions
   - Core Register Access Functions
  ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
 */
 
 
 
 /* ##########################   NVIC functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-    \brief      Functions that manage interrupts and exceptions via the NVIC.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
  */
 
-/** \brief  Set Priority Grouping
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     /* return to Handler mode, uses MSP after return, restore floating-point state */
+#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after return, restore floating-point state  */
+#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after return, restore floating-point state  */
 
-  The function sets the priority grouping field using the required unlock sequence.
-  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-  Only values from 0..7 are used.
-  In case of a conflict between priority grouping and available
-  priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
 
-    \param [in]      PriorityGroup  Priority grouping field.
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
  */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
   uint32_t reg_value;
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 
   reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8)                       );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
 
-/** \brief  Get Priority Grouping
-
-  The function reads the priority grouping field from the NVIC Interrupt Controller.
-
-    \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
 {
   return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 }
 
 
-/** \brief  Enable External Interrupt
-
-    The function enables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
 }
 
 
-/** \brief  Disable External Interrupt
-
-    The function disables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Get Pending Interrupt
-
-    The function reads the pending register in the NVIC and returns the pending bit
-    for the specified interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not pending.
-    \return             1  Interrupt status is pending.
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
 }
 
 
-/** \brief  Set Pending Interrupt
-
-    The function sets the pending bit of an external interrupt.
-
-    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Clear Pending Interrupt
-
-    The function clears the pending bit of an external interrupt.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Get Active Interrupt
-
-    The function reads the active register in NVIC and returns the active bit.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not active.
-    \return             1  Interrupt status is active.
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Set Interrupt Priority
-
-    The function sets the priority of an interrupt.
-
-    \note The priority cannot be set for every core interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-    \param [in]  priority  Priority to set.
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
 {
-  if((int32_t)IRQn < 0) {
-    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
   }
-  else {
-    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  else
+  {
+    return(0U);
   }
 }
 
 
-/** \brief  Get Interrupt Priority
-
-    The function reads the priority of an interrupt. The interrupt
-    number can be positive to specify an external (device specific)
-    interrupt, or negative to specify an internal (core) interrupt.
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
 
 
-    \param [in]   IRQn  Interrupt number.
-    \return             Interrupt Priority. Value is aligned automatically to the implemented
-                        priority bits of the microcontroller.
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
  */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
 {
 
-  if((int32_t)IRQn < 0) {
-    return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8 - __NVIC_PRIO_BITS)));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
   }
-  else {
-    return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)]               >> (8 - __NVIC_PRIO_BITS)));
+  else
+  {
+    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
   }
 }
 
 
-/** \brief  Encode Priority
-
-    The function encodes the priority for an interrupt with the given priority group,
-    preemptive priority value, and subpriority value.
-    In case of a conflict between priority grouping and available
-    priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
-    \param [in]     PriorityGroup  Used priority group.
-    \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-    \param [in]       SubPriority  Subpriority value (starting from 0).
-    \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
  */
 __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 {
@@ -1688,19 +1869,18 @@ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t P
 }
 
 
-/** \brief  Decode Priority
-
-    The function decodes an interrupt priority value with a given priority group to
-    preemptive priority value and subpriority value.
-    In case of a conflict between priority grouping and available
-    priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-
-    \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-    \param [in]     PriorityGroup  Used priority group.
-    \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-    \param [out]     pSubPriority  Subpriority value (starting from 0).
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
  */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
 {
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
   uint32_t PreemptPriorityBits;
@@ -1714,11 +1894,43 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr
 }
 
 
-/** \brief  System Reset
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M4 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
+}
+
 
-    The function initiates a system reset request to reset the MCU.
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */
@@ -1726,40 +1938,88 @@ __STATIC_INLINE void NVIC_SystemReset(void)
                            (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
                             SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
   __DSB();                                                          /* Ensure completion of memory access */
-  while(1) { __NOP(); }                                             /* wait until reset */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
 }
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
 
+/* ##########################  MPU functions  #################################### */
 
-/* ##################################    SysTick function  ############################################ */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-    \brief      Functions that configure the System.
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv7.h"
+
+#endif
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
   @{
  */
 
-#if (__Vendor_SysTickConfig == 0)
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
 
-/** \brief  System Tick Configuration
 
-    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
-    Counter is in free running mode to generate periodic interrupts.
+/*@} end of CMSIS_Core_FpuFunctions */
 
-    \param [in]  ticks  Number of ticks between two interrupts.
 
-    \return          0  Function succeeded.
-    \return          1  Function failed.
 
-    \note     When the variable __Vendor_SysTickConfig is set to 1, then the
-    function SysTick_Config is not included. In this case, the file device.h
-    must contain a vendor-specific implementation of this function.
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
 
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) { return (1UL); }    /* Reload value impossible */
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
@@ -1777,49 +2037,52 @@ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 
 
 /* ##################################### Debug In/Output function ########################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_core_DebugFunctions ITM Functions
-    \brief   Functions that access the ITM debug interface.
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
   @{
  */
 
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters.                         */
-#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
 
-/** \brief  ITM Send Character
 
-    The function transmits a character via the ITM channel 0, and
-    \li Just returns when no debugger is connected that has booked the output.
-    \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-
-    \param [in]     ch  Character to transmit.
-
-    \returns            Character to transmit.
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
  */
 __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
 {
   if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
       ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
   {
-    while (ITM->PORT[0].u32 == 0UL) { __NOP(); }
-    ITM->PORT[0].u8 = (uint8_t)ch;
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
   }
   return (ch);
 }
 
 
-/** \brief  ITM Receive Character
-
-    The function inputs a character via the external variable \ref ITM_RxBuffer.
-
-    \return             Received character.
-    \return         -1  No character pending.
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
  */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
   int32_t ch = -1;                           /* no character available */
 
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
     ch = ITM_RxBuffer;
     ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
   }
@@ -1828,19 +2091,22 @@ __STATIC_INLINE int32_t ITM_ReceiveChar (void) {
 }
 
 
-/** \brief  ITM Check Character
-
-    The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
-    \return          0  No character available.
-    \return          1  Character available.
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
  */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
 
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
-    return (0);                                 /* no character available */
-  } else {
-    return (1);                                 /*    character available */
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
   }
 }
 
diff --git a/Libraries/CMSIS/Include/core_cm7.h b/Libraries/CMSIS/Include/core_cm7.h
index cb19b9fa..3da3c43e 100644
--- a/Libraries/CMSIS/Include/core_cm7.h
+++ b/Libraries/CMSIS/Include/core_cm7.h
@@ -1,52 +1,44 @@
 /**************************************************************************//**
  * @file     core_cm7.h
  * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version  V4.10
- * @date     18. March 2015
+ * @version  V5.1.1
+ * @date     28. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
- * @note
+ * SPDX-License-Identifier: Apache-2.0
  *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include  /* treat file as system include file for MISRA check */
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
 #endif
 
 #ifndef __CORE_CM7_H_GENERIC
 #define __CORE_CM7_H_GENERIC
 
+#include 
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
   CMSIS violates the following MISRA-C:2004 rules:
 
    \li Required Rule 8.5, object/function definition in header file.

@@ -63,131 +55,112 @@
 /*******************************************************************************
  *                 CMSIS definitions
  ******************************************************************************/
-/** \ingroup Cortex_M7
+/**
+  \ingroup Cortex_M7
   @{
  */
 
-/*  CMSIS CM7 definitions */
-#define __CM7_CMSIS_VERSION_MAIN  (0x04)                                   /*!< [31:16] CMSIS HAL main version   */
-#define __CM7_CMSIS_VERSION_SUB   (0x00)                                   /*!< [15:0]  CMSIS HAL sub version    */
-#define __CM7_CMSIS_VERSION       ((__CM7_CMSIS_VERSION_MAIN << 16) | \
-                                    __CM7_CMSIS_VERSION_SUB          )     /*!< CMSIS HAL version number         */
-
-#define __CORTEX_M                (0x07)                                   /*!< Cortex-M Core                    */
+#include "cmsis_version.h"
 
+/* CMSIS CM7 definitions */
+#define __CM7_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM7_CMSIS_VERSION_SUB   ( __CM_CMSIS_VERSION_SUB)                  /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM7_CMSIS_VERSION       ((__CM7_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM7_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
 
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
-  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#endif
+#define __CORTEX_M                (7U)                                       /*!< Cortex-M Core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
 */
 #if defined ( __CC_ARM )
   #if defined __TARGET_FPU_VFP
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
       #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
 #elif defined ( __GNUC__ )
   #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
 #elif defined ( __ICCARM__ )
   #if defined __ARMVFP__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
-#elif defined ( __TMS470__ )
+#elif defined ( __TI_ARM__ )
   #if defined __TI_VFP_SUPPORT__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
 #elif defined ( __TASKING__ )
   #if defined __FPU_VFP__
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
       #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
 
-#elif defined ( __CSMC__ )		/* Cosmic */
-  #if ( __CSMC__ & 0x400)		// FPU present for parser
-    #if (__FPU_PRESENT == 1)
-      #define __FPU_USED       1
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
     #else
       #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0
+      #define __FPU_USED       0U
     #endif
   #else
-    #define __FPU_USED         0
+    #define __FPU_USED         0U
   #endif
+
 #endif
 
-#include                       /* standard types definitions                      */
-#include                 /* Core Instruction Access                         */
-#include                  /* Core Function Access                            */
-#include                  /* Compiler specific SIMD Intrinsics               */
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
 
 #ifdef __cplusplus
 }
@@ -207,42 +180,42 @@
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
   #ifndef __CM7_REV
-    #define __CM7_REV               0x0000
+    #define __CM7_REV               0x0000U
     #warning "__CM7_REV not defined in device header file; using default!"
   #endif
 
   #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0
+    #define __FPU_PRESENT             0U
     #warning "__FPU_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0
+    #define __MPU_PRESENT             0U
     #warning "__MPU_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __ICACHE_PRESENT
-    #define __ICACHE_PRESENT          0
+    #define __ICACHE_PRESENT          0U
     #warning "__ICACHE_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __DCACHE_PRESENT
-    #define __DCACHE_PRESENT          0
+    #define __DCACHE_PRESENT          0U
     #warning "__DCACHE_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __DTCM_PRESENT
-    #define __DTCM_PRESENT            0
+    #define __DTCM_PRESENT            0U
     #warning "__DTCM_PRESENT        not defined in device header file; using default!"
   #endif
 
   #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3
+    #define __NVIC_PRIO_BITS          3U
     #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
   #endif
 
   #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0
+    #define __Vendor_SysTickConfig    0U
     #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
   #endif
 #endif
@@ -256,12 +229,17 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions                */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
 
 /*@} end of group Cortex_M7 */
 
@@ -278,1392 +256,1540 @@
   - Core MPU Register
   - Core FPU Register
  ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
-    \brief Type definitions and defines for Cortex-M processor based devices.
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
 */
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_CORE  Status and Control Registers
-    \brief  Core Register type definitions.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
   @{
  */
 
-/** \brief  Union type to access the Application Program Status Register (APSR).
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved                           */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved                           */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31                                             /*!< APSR: N Position */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
 #define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30                                             /*!< APSR: Z Position */
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
 #define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29                                             /*!< APSR: C Position */
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
 #define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28                                             /*!< APSR: V Position */
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
 #define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
 
-#define APSR_Q_Pos                         27                                             /*!< APSR: Q Position */
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
 #define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
 
-#define APSR_GE_Pos                        16                                             /*!< APSR: GE Position */
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
 #define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
 
 
-/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0                                             /*!< IPSR: ISR Position */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
 #define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved                           */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags        */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved                           */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
+    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
+    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31                                             /*!< xPSR: N Position */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
 #define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30                                             /*!< xPSR: Z Position */
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
 #define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29                                             /*!< xPSR: C Position */
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
 #define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28                                             /*!< xPSR: V Position */
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
 #define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
 
-#define xPSR_Q_Pos                         27                                             /*!< xPSR: Q Position */
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
 #define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
 
-#define xPSR_IT_Pos                        25                                             /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
 
-#define xPSR_T_Pos                         24                                             /*!< xPSR: T Position */
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
 #define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
 
-#define xPSR_GE_Pos                        16                                             /*!< xPSR: GE Position */
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
 #define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
 
-#define xPSR_ISR_Pos                        0                                             /*!< xPSR: ISR Position */
+#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
 #define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Control Registers (CONTROL).
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
  */
 typedef union
 {
   struct
   {
     uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
-    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag           */
-    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos                    2                                             /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
 #define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
 
-#define CONTROL_SPSEL_Pos                   1                                             /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
 #define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
 
-#define CONTROL_nPRIV_Pos                   0                                             /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
 #define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
 
 /*@} end of group CMSIS_CORE */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-    \brief      Type definitions for the NVIC Registers
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
   @{
  */
 
-/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
  */
 typedef struct
 {
-  __IO uint32_t ISER[8];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
-       uint32_t RESERVED0[24];
-  __IO uint32_t ICER[8];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register         */
-       uint32_t RSERVED1[24];
-  __IO uint32_t ISPR[8];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register          */
-       uint32_t RESERVED2[24];
-  __IO uint32_t ICPR[8];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register        */
-       uint32_t RESERVED3[24];
-  __IO uint32_t IABR[8];                 /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register           */
-       uint32_t RESERVED4[56];
-  __IO uint8_t  IP[240];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-       uint32_t RESERVED5[644];
-  __O  uint32_t STIR;                    /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register     */
+  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[24U];
+  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[24U];
+  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[24U];
+  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[24U];
+  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[56U];
+  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED5[644U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
 }  NVIC_Type;
 
 /* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0                                          /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
 #define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
 
 /*@} end of group CMSIS_NVIC */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCB     System Control Block (SCB)
-    \brief      Type definitions for the System Control Block Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
   @{
  */
 
-/** \brief  Structure type to access the System Control Block (SCB).
+/**
+  \brief  Structure type to access the System Control Block (SCB).
  */
 typedef struct
 {
-  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
-  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
-  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
-  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
-  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
-  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
-  __IO uint8_t  SHPR[12];                /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
-  __IO uint32_t CFSR;                    /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register                    */
-  __IO uint32_t HFSR;                    /*!< Offset: 0x02C (R/W)  HardFault Status Register                             */
-  __IO uint32_t DFSR;                    /*!< Offset: 0x030 (R/W)  Debug Fault Status Register                           */
-  __IO uint32_t MMFAR;                   /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register                      */
-  __IO uint32_t BFAR;                    /*!< Offset: 0x038 (R/W)  BusFault Address Register                             */
-  __IO uint32_t AFSR;                    /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register                       */
-  __I  uint32_t ID_PFR[2];               /*!< Offset: 0x040 (R/ )  Processor Feature Register                            */
-  __I  uint32_t ID_DFR;                  /*!< Offset: 0x048 (R/ )  Debug Feature Register                                */
-  __I  uint32_t ID_AFR;                  /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register                            */
-  __I  uint32_t ID_MFR[4];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register                         */
-  __I  uint32_t ID_ISAR[5];              /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register                   */
-       uint32_t RESERVED0[1];
-  __I  uint32_t CLIDR;                   /*!< Offset: 0x078 (R/ )  Cache Level ID register                               */
-  __I  uint32_t CTR;                     /*!< Offset: 0x07C (R/ )  Cache Type register                                   */
-  __I  uint32_t CCSIDR;                  /*!< Offset: 0x080 (R/ )  Cache Size ID Register                                */
-  __IO uint32_t CSSELR;                  /*!< Offset: 0x084 (R/W)  Cache Size Selection Register                         */
-  __IO uint32_t CPACR;                   /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register                   */
-       uint32_t RESERVED3[93];
-  __O  uint32_t STIR;                    /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register                 */
-       uint32_t RESERVED4[15];
-  __I  uint32_t MVFR0;                   /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0                      */
-  __I  uint32_t MVFR1;                   /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1                      */
-  __I  uint32_t MVFR2;                   /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 1                      */
-       uint32_t RESERVED5[1];
-  __O  uint32_t ICIALLU;                 /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU                         */
-       uint32_t RESERVED6[1];
-  __O  uint32_t ICIMVAU;                 /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU                      */
-  __O  uint32_t DCIMVAC;                 /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC                      */
-  __O  uint32_t DCISW;                   /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way                         */
-  __O  uint32_t DCCMVAU;                 /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU                           */
-  __O  uint32_t DCCMVAC;                 /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC                           */
-  __O  uint32_t DCCSW;                   /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way                              */
-  __O  uint32_t DCCIMVAC;                /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC            */
-  __O  uint32_t DCCISW;                  /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way               */
-       uint32_t RESERVED7[6];
-  __IO uint32_t ITCMCR;                  /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register   */
-  __IO uint32_t DTCMCR;                  /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers         */
-  __IO uint32_t AHBPCR;                  /*!< Offset: 0x298 (R/W)  AHBP Control Register                                 */
-  __IO uint32_t CACR;                    /*!< Offset: 0x29C (R/W)  L1 Cache Control Register                             */
-  __IO uint32_t AHBSCR;                  /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register                            */
-       uint32_t RESERVED8[1];
-  __IO uint32_t ABFSR;                   /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register                   */
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MFR[4U];             /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[5U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+        uint32_t RESERVED3[93U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+        uint32_t RESERVED7[6U];
+  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
+  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
+  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
+  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
+  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
 #define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
 #define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_RETTOBASE_Pos             11                                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
 #define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
 
 /* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
 #define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_PRIGROUP_Pos              8                                             /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
 #define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
-#define SCB_AIRCR_VECTRESET_Pos             0                                             /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
 #define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                      18                                            /*!< SCB CCR: Branch prediction enable bit Position */
+#define SCB_CCR_BP_Pos                      18U                                           /*!< SCB CCR: Branch prediction enable bit Position */
 #define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: Branch prediction enable bit Mask */
 
-#define SCB_CCR_IC_Pos                      17                                            /*!< SCB CCR: Instruction cache enable bit Position */
+#define SCB_CCR_IC_Pos                      17U                                           /*!< SCB CCR: Instruction cache enable bit Position */
 #define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: Instruction cache enable bit Mask */
 
-#define SCB_CCR_DC_Pos                      16                                            /*!< SCB CCR: Cache enable bit Position */
+#define SCB_CCR_DC_Pos                      16U                                           /*!< SCB CCR: Cache enable bit Position */
 #define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: Cache enable bit Mask */
 
-#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
 
-#define SCB_CCR_BFHFNMIGN_Pos               8                                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
 #define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
 
-#define SCB_CCR_DIV_0_TRP_Pos               4                                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
 #define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
 
-#define SCB_CCR_USERSETMPEND_Pos            1                                             /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
 #define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
 
-#define SCB_CCR_NONBASETHRDENA_Pos          0                                             /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
 #define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18                                             /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
 #define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
 
-#define SCB_SHCSR_BUSFAULTENA_Pos          17                                             /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
 #define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
 
-#define SCB_SHCSR_MEMFAULTENA_Pos          16                                             /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
 #define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
 
-#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
 
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14                                             /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
 #define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
 
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13                                             /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
 #define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
 
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12                                             /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
 #define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
 
-#define SCB_SHCSR_SYSTICKACT_Pos           11                                             /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
 #define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
 
-#define SCB_SHCSR_PENDSVACT_Pos            10                                             /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
 #define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
 
-#define SCB_SHCSR_MONITORACT_Pos            8                                             /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
 #define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
 
-#define SCB_SHCSR_SVCALLACT_Pos             7                                             /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
 #define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
 
-#define SCB_SHCSR_USGFAULTACT_Pos           3                                             /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
 #define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
 
-#define SCB_SHCSR_BUSFAULTACT_Pos           1                                             /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
 #define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
 
-#define SCB_SHCSR_MEMFAULTACT_Pos           0                                             /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
 #define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
 
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16                                             /*!< SCB CFSR: Usage Fault Status Register Position */
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
 #define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
 
-#define SCB_CFSR_BUSFAULTSR_Pos             8                                             /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
 #define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
 
-#define SCB_CFSR_MEMFAULTSR_Pos             0                                             /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
 #define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
 
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31                                             /*!< SCB HFSR: DEBUGEVT Position */
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
 #define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
 
-#define SCB_HFSR_FORCED_Pos                30                                             /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
 #define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
 
-#define SCB_HFSR_VECTTBL_Pos                1                                             /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
 #define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
 
 /* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4                                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
 #define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
 
-#define SCB_DFSR_VCATCH_Pos                 3                                             /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
 #define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
 
-#define SCB_DFSR_DWTTRAP_Pos                2                                             /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
 #define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
 
-#define SCB_DFSR_BKPT_Pos                   1                                             /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
 #define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
 
-#define SCB_DFSR_HALTED_Pos                 0                                             /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
 #define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
 
-/* Cache Level ID register */
-#define SCB_CLIDR_LOUU_Pos                 27                                             /*!< SCB CLIDR: LoUU Position */
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
 #define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
 
-#define SCB_CLIDR_LOC_Pos                  24                                             /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_FORMAT_Pos)                  /*!< SCB CLIDR: LoC Mask */
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
 
-/* Cache Type register */
-#define SCB_CTR_FORMAT_Pos                 29                                             /*!< SCB CTR: Format Position */
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
 #define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
 
-#define SCB_CTR_CWG_Pos                    24                                             /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
 #define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
 
-#define SCB_CTR_ERG_Pos                    20                                             /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
 #define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
 
-#define SCB_CTR_DMINLINE_Pos               16                                             /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
 #define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
 
-#define SCB_CTR_IMINLINE_Pos                0                                             /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
 #define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
 
-/* Cache Size ID Register */
-#define SCB_CCSIDR_WT_Pos                  31                                             /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (7UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
 
-#define SCB_CCSIDR_WB_Pos                  30                                             /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (7UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
 
-#define SCB_CCSIDR_RA_Pos                  29                                             /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (7UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
 
-#define SCB_CCSIDR_WA_Pos                  28                                             /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (7UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
 
-#define SCB_CCSIDR_NUMSETS_Pos             13                                             /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
 #define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
 
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3                                             /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
 #define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
 
-#define SCB_CCSIDR_LINESIZE_Pos             0                                             /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
 #define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
 
-/* Cache Size Selection Register */
-#define SCB_CSSELR_LEVEL_Pos                1                                             /*!< SCB CSSELR: Level Position */
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
 #define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
 
-#define SCB_CSSELR_IND_Pos                  0                                             /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
 #define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
 
-/* SCB Software Triggered Interrupt Register */
-#define SCB_STIR_INTID_Pos                  0                                             /*!< SCB STIR: INTID Position */
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
 #define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
 
-/* Instruction Tightly-Coupled Memory Control Register*/
-#define SCB_ITCMCR_SZ_Pos                   3                                             /*!< SCB ITCMCR: SZ Position */
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/* Instruction Tightly-Coupled Memory Control Register Definitions */
+#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
 #define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
 
-#define SCB_ITCMCR_RETEN_Pos                2                                             /*!< SCB ITCMCR: RETEN Position */
+#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
 #define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
 
-#define SCB_ITCMCR_RMW_Pos                  1                                             /*!< SCB ITCMCR: RMW Position */
+#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
 #define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
 
-#define SCB_ITCMCR_EN_Pos                   0                                             /*!< SCB ITCMCR: EN Position */
+#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
 #define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
 
-/* Data Tightly-Coupled Memory Control Registers */
-#define SCB_DTCMCR_SZ_Pos                   3                                             /*!< SCB DTCMCR: SZ Position */
+/* Data Tightly-Coupled Memory Control Register Definitions */
+#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
 #define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
 
-#define SCB_DTCMCR_RETEN_Pos                2                                             /*!< SCB DTCMCR: RETEN Position */
+#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
 #define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
 
-#define SCB_DTCMCR_RMW_Pos                  1                                             /*!< SCB DTCMCR: RMW Position */
+#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
 #define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
 
-#define SCB_DTCMCR_EN_Pos                   0                                             /*!< SCB DTCMCR: EN Position */
+#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
 #define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
 
-/* AHBP Control Register */
-#define SCB_AHBPCR_SZ_Pos                   1                                             /*!< SCB AHBPCR: SZ Position */
+/* AHBP Control Register Definitions */
+#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
 #define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
 
-#define SCB_AHBPCR_EN_Pos                   0                                             /*!< SCB AHBPCR: EN Position */
+#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
 #define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
 
-/* L1 Cache Control Register */
-#define SCB_CACR_FORCEWT_Pos                2                                             /*!< SCB CACR: FORCEWT Position */
+/* L1 Cache Control Register Definitions */
+#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
 #define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
 
-#define SCB_CACR_ECCEN_Pos                  1                                             /*!< SCB CACR: ECCEN Position */
+#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
 #define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
 
-#define SCB_CACR_SIWT_Pos                   0                                             /*!< SCB CACR: SIWT Position */
+#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
 #define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
 
-/* AHBS control register */
-#define SCB_AHBSCR_INITCOUNT_Pos           11                                             /*!< SCB AHBSCR: INITCOUNT Position */
+/* AHBS Control Register Definitions */
+#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
 #define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
 
-#define SCB_AHBSCR_TPRI_Pos                 2                                             /*!< SCB AHBSCR: TPRI Position */
+#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
 #define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
 
-#define SCB_AHBSCR_CTL_Pos                  0                                             /*!< SCB AHBSCR: CTL Position*/
+#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
 #define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
 
-/* Auxiliary Bus Fault Status Register */
-#define SCB_ABFSR_AXIMTYPE_Pos              8                                             /*!< SCB ABFSR: AXIMTYPE Position*/
+/* Auxiliary Bus Fault Status Register Definitions */
+#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
 #define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
 
-#define SCB_ABFSR_EPPB_Pos                  4                                             /*!< SCB ABFSR: EPPB Position*/
+#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
 #define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
 
-#define SCB_ABFSR_AXIM_Pos                  3                                             /*!< SCB ABFSR: AXIM Position*/
+#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
 #define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
 
-#define SCB_ABFSR_AHBP_Pos                  2                                             /*!< SCB ABFSR: AHBP Position*/
+#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
 #define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
 
-#define SCB_ABFSR_DTCM_Pos                  1                                             /*!< SCB ABFSR: DTCM Position*/
+#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
 #define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
 
-#define SCB_ABFSR_ITCM_Pos                  0                                             /*!< SCB ABFSR: ITCM Position*/
+#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
 #define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
 
 /*@} end of group CMSIS_SCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-    \brief      Type definitions for the System Control and ID Register not in the SCB
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
   @{
  */
 
-/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
  */
 typedef struct
 {
-       uint32_t RESERVED0[1];
-  __I  uint32_t ICTR;                    /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register      */
-  __IO uint32_t ACTLR;                   /*!< Offset: 0x008 (R/W)  Auxiliary Control Register              */
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
 } SCnSCB_Type;
 
 /* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0                                          /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
 /* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12                                          /*!< ACTLR: DISITMATBFLUSH Position */
+#define SCnSCB_ACTLR_DISDYNADD_Pos         26U                                         /*!< ACTLR: DISDYNADD Position */
+#define SCnSCB_ACTLR_DISDYNADD_Msk         (1UL << SCnSCB_ACTLR_DISDYNADD_Pos)         /*!< ACTLR: DISDYNADD Mask */
+
+#define SCnSCB_ACTLR_DISISSCH1_Pos         21U                                         /*!< ACTLR: DISISSCH1 Position */
+#define SCnSCB_ACTLR_DISISSCH1_Msk         (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos)      /*!< ACTLR: DISISSCH1 Mask */
+
+#define SCnSCB_ACTLR_DISDI_Pos             16U                                         /*!< ACTLR: DISDI Position */
+#define SCnSCB_ACTLR_DISDI_Msk             (0x1FUL << SCnSCB_ACTLR_DISDI_Pos)          /*!< ACTLR: DISDI Mask */
+
+#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos     15U                                         /*!< ACTLR: DISCRITAXIRUR Position */
+#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk     (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos)     /*!< ACTLR: DISCRITAXIRUR Mask */
+
+#define SCnSCB_ACTLR_DISBTACALLOC_Pos      14U                                         /*!< ACTLR: DISBTACALLOC Position */
+#define SCnSCB_ACTLR_DISBTACALLOC_Msk      (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos)      /*!< ACTLR: DISBTACALLOC Mask */
+
+#define SCnSCB_ACTLR_DISBTACREAD_Pos       13U                                         /*!< ACTLR: DISBTACREAD Position */
+#define SCnSCB_ACTLR_DISBTACREAD_Msk       (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos)       /*!< ACTLR: DISBTACREAD Mask */
+
+#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12U                                         /*!< ACTLR: DISITMATBFLUSH Position */
 #define SCnSCB_ACTLR_DISITMATBFLUSH_Msk    (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)    /*!< ACTLR: DISITMATBFLUSH Mask */
 
-#define SCnSCB_ACTLR_DISRAMODE_Pos         11                                          /*!< ACTLR: DISRAMODE Position */
+#define SCnSCB_ACTLR_DISRAMODE_Pos         11U                                         /*!< ACTLR: DISRAMODE Position */
 #define SCnSCB_ACTLR_DISRAMODE_Msk         (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)         /*!< ACTLR: DISRAMODE Mask */
 
-#define SCnSCB_ACTLR_FPEXCODIS_Pos         10                                          /*!< ACTLR: FPEXCODIS Position */
+#define SCnSCB_ACTLR_FPEXCODIS_Pos         10U                                         /*!< ACTLR: FPEXCODIS Position */
 #define SCnSCB_ACTLR_FPEXCODIS_Msk         (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)         /*!< ACTLR: FPEXCODIS Mask */
 
-#define SCnSCB_ACTLR_DISFOLD_Pos            2                                          /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
 #define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
 
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0                                          /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
 #define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
 
 /*@} end of group CMSIS_SCnotSCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-    \brief      Type definitions for the System Timer Registers.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
   @{
  */
 
-/** \brief  Structure type to access the System Timer (SysTick).
+/**
+  \brief  Structure type to access the System Timer (SysTick).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
-  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
-  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
 } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
 #define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
 
 /*@} end of group CMSIS_SysTick */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-    \brief      Type definitions for the Instrumentation Trace Macrocell (ITM)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
   @{
  */
 
-/** \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
  */
 typedef struct
 {
-  __O  union
+  __OM  union
   {
-    __O  uint8_t    u8;                  /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit                   */
-    __O  uint16_t   u16;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit                  */
-    __O  uint32_t   u32;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit                  */
-  }  PORT [32];                          /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers               */
-       uint32_t RESERVED0[864];
-  __IO uint32_t TER;                     /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register                 */
-       uint32_t RESERVED1[15];
-  __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
-       uint32_t RESERVED2[15];
-  __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];
-  __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
-  __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
-  __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];
-  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
-  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];
-  __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __I  uint32_t PID7;                    /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __I  uint32_t PID0;                    /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __I  uint32_t PID1;                    /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __I  uint32_t PID2;                    /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __I  uint32_t PID3;                    /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __I  uint32_t CID0;                    /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __I  uint32_t CID1;                    /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __I  uint32_t CID2;                    /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __I  uint32_t CID3;                    /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[6U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
 } ITM_Type;
 
 /* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0                                             /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
 
 /* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23                                             /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
 #define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
 
-#define ITM_TCR_TraceBusID_Pos             16                                             /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
 #define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
 
-#define ITM_TCR_GTSFREQ_Pos                10                                             /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
 #define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
 
-#define ITM_TCR_TSPrescale_Pos              8                                             /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
 #define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
 
-#define ITM_TCR_SWOENA_Pos                  4                                             /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
 #define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
 
-#define ITM_TCR_DWTENA_Pos                  3                                             /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
 #define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
 
-#define ITM_TCR_SYNCENA_Pos                 2                                             /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
 #define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
 
-#define ITM_TCR_TSENA_Pos                   1                                             /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
 #define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
 
-#define ITM_TCR_ITMENA_Pos                  0                                             /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0                                             /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0                                             /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0                                             /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2                                             /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
 
-#define ITM_LSR_Access_Pos                  1                                             /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
 #define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
 
-#define ITM_LSR_Present_Pos                 0                                             /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
 #define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
 
 /*@}*/ /* end of group CMSIS_ITM */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-    \brief      Type definitions for the Data Watchpoint and Trace (DWT)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
   @{
  */
 
-/** \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  Control Register                          */
-  __IO uint32_t CYCCNT;                  /*!< Offset: 0x004 (R/W)  Cycle Count Register                      */
-  __IO uint32_t CPICNT;                  /*!< Offset: 0x008 (R/W)  CPI Count Register                        */
-  __IO uint32_t EXCCNT;                  /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register         */
-  __IO uint32_t SLEEPCNT;                /*!< Offset: 0x010 (R/W)  Sleep Count Register                      */
-  __IO uint32_t LSUCNT;                  /*!< Offset: 0x014 (R/W)  LSU Count Register                        */
-  __IO uint32_t FOLDCNT;                 /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register         */
-  __I  uint32_t PCSR;                    /*!< Offset: 0x01C (R/ )  Program Counter Sample Register           */
-  __IO uint32_t COMP0;                   /*!< Offset: 0x020 (R/W)  Comparator Register 0                     */
-  __IO uint32_t MASK0;                   /*!< Offset: 0x024 (R/W)  Mask Register 0                           */
-  __IO uint32_t FUNCTION0;               /*!< Offset: 0x028 (R/W)  Function Register 0                       */
-       uint32_t RESERVED0[1];
-  __IO uint32_t COMP1;                   /*!< Offset: 0x030 (R/W)  Comparator Register 1                     */
-  __IO uint32_t MASK1;                   /*!< Offset: 0x034 (R/W)  Mask Register 1                           */
-  __IO uint32_t FUNCTION1;               /*!< Offset: 0x038 (R/W)  Function Register 1                       */
-       uint32_t RESERVED1[1];
-  __IO uint32_t COMP2;                   /*!< Offset: 0x040 (R/W)  Comparator Register 2                     */
-  __IO uint32_t MASK2;                   /*!< Offset: 0x044 (R/W)  Mask Register 2                           */
-  __IO uint32_t FUNCTION2;               /*!< Offset: 0x048 (R/W)  Function Register 2                       */
-       uint32_t RESERVED2[1];
-  __IO uint32_t COMP3;                   /*!< Offset: 0x050 (R/W)  Comparator Register 3                     */
-  __IO uint32_t MASK3;                   /*!< Offset: 0x054 (R/W)  Mask Register 3                           */
-  __IO uint32_t FUNCTION3;               /*!< Offset: 0x058 (R/W)  Function Register 3                       */
-       uint32_t RESERVED3[981];
-  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 (  W)  Lock Access Register                      */
-  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R  )  Lock Status Register                      */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED3[981U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 (  W)  Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
 } DWT_Type;
 
 /* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28                                          /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
 #define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
 
-#define DWT_CTRL_NOTRCPKT_Pos              27                                          /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
 #define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
 
-#define DWT_CTRL_NOEXTTRIG_Pos             26                                          /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
 #define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
 
-#define DWT_CTRL_NOCYCCNT_Pos              25                                          /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
 #define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
 
-#define DWT_CTRL_NOPRFCNT_Pos              24                                          /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
 #define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
 
-#define DWT_CTRL_CYCEVTENA_Pos             22                                          /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
 #define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
 
-#define DWT_CTRL_FOLDEVTENA_Pos            21                                          /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
 #define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
 
-#define DWT_CTRL_LSUEVTENA_Pos             20                                          /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
 #define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
 
-#define DWT_CTRL_SLEEPEVTENA_Pos           19                                          /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
 #define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
 
-#define DWT_CTRL_EXCEVTENA_Pos             18                                          /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
 #define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
 
-#define DWT_CTRL_CPIEVTENA_Pos             17                                          /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
 #define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
 
-#define DWT_CTRL_EXCTRCENA_Pos             16                                          /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
 #define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
 
-#define DWT_CTRL_PCSAMPLENA_Pos            12                                          /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
 #define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
 
-#define DWT_CTRL_SYNCTAP_Pos               10                                          /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
 #define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
 
-#define DWT_CTRL_CYCTAP_Pos                 9                                          /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
 #define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
 
-#define DWT_CTRL_POSTINIT_Pos               5                                          /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
 #define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
 
-#define DWT_CTRL_POSTPRESET_Pos             1                                          /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
 #define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
 
-#define DWT_CTRL_CYCCNTENA_Pos              0                                          /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
 #define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
 
 /* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0                                          /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
 #define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
 
 /* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0                                          /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
 #define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
 
 /* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0                                          /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
 #define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
 
 /* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0                                          /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
 #define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
 
 /* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0                                          /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
 #define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
 
 /* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0                                          /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
 #define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
 
 /* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24                                          /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
 #define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
 
-#define DWT_FUNCTION_DATAVADDR1_Pos        16                                          /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
 #define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
 
-#define DWT_FUNCTION_DATAVADDR0_Pos        12                                          /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
 #define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
 
-#define DWT_FUNCTION_DATAVSIZE_Pos         10                                          /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
 #define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
 
-#define DWT_FUNCTION_LNK1ENA_Pos            9                                          /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
 #define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
 
-#define DWT_FUNCTION_DATAVMATCH_Pos         8                                          /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
 #define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
 
-#define DWT_FUNCTION_CYCMATCH_Pos           7                                          /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
 #define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
 
-#define DWT_FUNCTION_EMITRANGE_Pos          5                                          /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
 #define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
 
-#define DWT_FUNCTION_FUNCTION_Pos           0                                          /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
 #define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
 
 /*@}*/ /* end of group CMSIS_DWT */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-    \brief      Type definitions for the Trace Port Interface (TPI)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
   @{
  */
 
-/** \brief  Structure type to access the Trace Port Interface Register (TPI).
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
  */
 typedef struct
 {
-  __IO uint32_t SSPSR;                   /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register     */
-  __IO uint32_t CSPSR;                   /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-       uint32_t RESERVED0[2];
-  __IO uint32_t ACPR;                    /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-       uint32_t RESERVED1[55];
-  __IO uint32_t SPPR;                    /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-       uint32_t RESERVED2[131];
-  __I  uint32_t FFSR;                    /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IO uint32_t FFCR;                    /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __I  uint32_t FSCR;                    /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-       uint32_t RESERVED3[759];
-  __I  uint32_t TRIGGER;                 /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __I  uint32_t FIFO0;                   /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __I  uint32_t ITATBCTR2;               /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-       uint32_t RESERVED4[1];
-  __I  uint32_t ITATBCTR0;               /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __I  uint32_t FIFO1;                   /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IO uint32_t ITCTRL;                  /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-       uint32_t RESERVED5[39];
-  __IO uint32_t CLAIMSET;                /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IO uint32_t CLAIMCLR;                /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-       uint32_t RESERVED7[8];
-  __I  uint32_t DEVID;                   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __I  uint32_t DEVTYPE;                 /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
 } TPI_Type;
 
 /* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0                                          /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
 #define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
 
 /* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0                                          /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
 #define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
 
 /* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3                                          /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
 #define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
 
-#define TPI_FFSR_TCPresent_Pos              2                                          /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
 #define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
 
-#define TPI_FFSR_FtStopped_Pos              1                                          /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
 #define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
 
-#define TPI_FFSR_FlInProg_Pos               0                                          /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
 #define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
 
 /* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8                                          /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
 #define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
 
-#define TPI_FFCR_EnFCont_Pos                1                                          /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
 #define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
 
 /* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0                                          /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
 #define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
-#define TPI_FIFO0_ITM_bytecount_Pos        27                                          /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
-#define TPI_FIFO0_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
-#define TPI_FIFO0_ETM_bytecount_Pos        24                                          /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
 
-#define TPI_FIFO0_ETM2_Pos                 16                                          /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
 #define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
 
-#define TPI_FIFO0_ETM1_Pos                  8                                          /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
 #define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
 
-#define TPI_FIFO0_ETM0_Pos                  0                                          /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
 #define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
 
 /* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0                                          /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
-#define TPI_FIFO1_ITM_bytecount_Pos        27                                          /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
-#define TPI_FIFO1_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
-#define TPI_FIFO1_ETM_bytecount_Pos        24                                          /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
 
-#define TPI_FIFO1_ITM2_Pos                 16                                          /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
 #define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
 
-#define TPI_FIFO1_ITM1_Pos                  8                                          /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
 #define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
 
-#define TPI_FIFO1_ITM0_Pos                  0                                          /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
 #define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
 
 /* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0                                          /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
 
 /* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0                                          /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
 
 /* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11                                          /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
 #define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
 
-#define TPI_DEVID_MANCVALID_Pos            10                                          /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
 #define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
 
-#define TPI_DEVID_PTINVALID_Pos             9                                          /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
 #define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
 
-#define TPI_DEVID_MinBufSz_Pos              6                                          /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
 #define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
 
-#define TPI_DEVID_AsynClkIn_Pos             5                                          /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
 #define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
 
-#define TPI_DEVID_NrTraceInput_Pos          0                                          /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
 #define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
 
 /* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4                                          /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0                                          /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
 #define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
 
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
 /*@}*/ /* end of group CMSIS_TPI */
 
 
-#if (__MPU_PRESENT == 1)
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-    \brief      Type definitions for the Memory Protection Unit (MPU)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
   @{
  */
 
-/** \brief  Structure type to access the Memory Protection Unit (MPU).
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
  */
 typedef struct
 {
-  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
-  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
-  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
-  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
-  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
-  __IO uint32_t RBAR_A1;                 /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register       */
-  __IO uint32_t RASR_A1;                 /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IO uint32_t RBAR_A2;                 /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register       */
-  __IO uint32_t RASR_A2;                 /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IO uint32_t RBAR_A3;                 /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register       */
-  __IO uint32_t RASR_A3;                 /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
 } MPU_Type;
 
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
 #define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
 #define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
 #define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
 
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
 #define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
 #define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
 #define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
 
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
 #define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
 
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos                   5                                             /*!< MPU RBAR: ADDR Position */
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
 #define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
 
-#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
 #define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
 
-#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
 #define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
 
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
 #define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
 
-#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
 #define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
 
-#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
 #define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
 
-#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
 #define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
 
-#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
 #define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
 
-#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
 #define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
 
-#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
 #define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
 
-#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
 #define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
 
-#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
 #define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
 
-#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
 #define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
 
 /*@} end of group CMSIS_MPU */
-#endif
+#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
 
 
-#if (__FPU_PRESENT == 1)
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-    \brief      Type definitions for the Floating Point Unit (FPU)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
   @{
  */
 
-/** \brief  Structure type to access the Floating Point Unit (FPU).
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
  */
 typedef struct
 {
-       uint32_t RESERVED0[1];
-  __IO uint32_t FPCCR;                   /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register               */
-  __IO uint32_t FPCAR;                   /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register               */
-  __IO uint32_t FPDSCR;                  /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register        */
-  __I  uint32_t MVFR0;                   /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0                       */
-  __I  uint32_t MVFR1;                   /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1                       */
-  __I  uint32_t MVFR2;                   /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2                       */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
 } FPU_Type;
 
-/* Floating-Point Context Control Register */
-#define FPU_FPCCR_ASPEN_Pos                31                                             /*!< FPCCR: ASPEN bit Position */
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
 #define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
 
-#define FPU_FPCCR_LSPEN_Pos                30                                             /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
 #define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
 
-#define FPU_FPCCR_MONRDY_Pos                8                                             /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
 #define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
 
-#define FPU_FPCCR_BFRDY_Pos                 6                                             /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
 #define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
 
-#define FPU_FPCCR_MMRDY_Pos                 5                                             /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
 #define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
 
-#define FPU_FPCCR_HFRDY_Pos                 4                                             /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
 #define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
 
-#define FPU_FPCCR_THREAD_Pos                3                                             /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
 #define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
 
-#define FPU_FPCCR_USER_Pos                  1                                             /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
 #define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
 
-#define FPU_FPCCR_LSPACT_Pos                0                                             /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
 #define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
 
-/* Floating-Point Context Address Register */
-#define FPU_FPCAR_ADDRESS_Pos               3                                             /*!< FPCAR: ADDRESS bit Position */
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
 #define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
 
-/* Floating-Point Default Status Control Register */
-#define FPU_FPDSCR_AHP_Pos                 26                                             /*!< FPDSCR: AHP bit Position */
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
 #define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
 
-#define FPU_FPDSCR_DN_Pos                  25                                             /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
 #define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
 
-#define FPU_FPDSCR_FZ_Pos                  24                                             /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
 #define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
 
-#define FPU_FPDSCR_RMode_Pos               22                                             /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
 #define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
 
-/* Media and FP Feature Register 0 */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28                                             /*!< MVFR0: FP rounding modes bits Position */
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
 #define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
 
-#define FPU_MVFR0_Short_vectors_Pos        24                                             /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
 #define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
 
-#define FPU_MVFR0_Square_root_Pos          20                                             /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
 #define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
 
-#define FPU_MVFR0_Divide_Pos               16                                             /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
 #define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
 
-#define FPU_MVFR0_FP_excep_trapping_Pos    12                                             /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
 #define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
 
-#define FPU_MVFR0_Double_precision_Pos      8                                             /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
 #define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
 
-#define FPU_MVFR0_Single_precision_Pos      4                                             /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
 #define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
 
-#define FPU_MVFR0_A_SIMD_registers_Pos      0                                             /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
 #define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
 
-/* Media and FP Feature Register 1 */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28                                             /*!< MVFR1: FP fused MAC bits Position */
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
 #define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
 
-#define FPU_MVFR1_FP_HPFP_Pos              24                                             /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
 #define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
 
-#define FPU_MVFR1_D_NaN_mode_Pos            4                                             /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
 #define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
 
-#define FPU_MVFR1_FtZ_mode_Pos              0                                             /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
 #define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
 
-/* Media and FP Feature Register 2 */
+/* Media and FP Feature Register 2 Definitions */
+
+#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
 
 /*@} end of group CMSIS_FPU */
-#endif
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-    \brief      Type definitions for the Core Debug Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
   @{
  */
 
-/** \brief  Structure type to access the Core Debug Register (CoreDebug).
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
  */
 typedef struct
 {
-  __IO uint32_t DHCSR;                   /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register    */
-  __O  uint32_t DCRSR;                   /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register        */
-  __IO uint32_t DCRDR;                   /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register            */
-  __IO uint32_t DEMCR;                   /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
 } CoreDebug_Type;
 
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16                                             /*!< CoreDebug DHCSR: DBGKEY Position */
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
 #define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
 
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25                                             /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
 #define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
 
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24                                             /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
 #define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
 
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19                                             /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
 #define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
 
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18                                             /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
 #define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
 
-#define CoreDebug_DHCSR_S_HALT_Pos         17                                             /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
 #define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
 
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16                                             /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
 #define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
 
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5                                             /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
 #define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
 
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3                                             /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
 #define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
 
-#define CoreDebug_DHCSR_C_STEP_Pos          2                                             /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
 #define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
 
-#define CoreDebug_DHCSR_C_HALT_Pos          1                                             /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
 #define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
 
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0                                             /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
 #define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
 
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos         16                                             /*!< CoreDebug DCRSR: REGWnR Position */
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
 #define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
 
-#define CoreDebug_DCRSR_REGSEL_Pos          0                                             /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
 #define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
 
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos         24                                             /*!< CoreDebug DEMCR: TRCENA Position */
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
 #define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
 
-#define CoreDebug_DEMCR_MON_REQ_Pos        19                                             /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
 #define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
 
-#define CoreDebug_DEMCR_MON_STEP_Pos       18                                             /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
 #define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
 
-#define CoreDebug_DEMCR_MON_PEND_Pos       17                                             /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
 #define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
 
-#define CoreDebug_DEMCR_MON_EN_Pos         16                                             /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
 #define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
 
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10                                             /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
 #define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
 
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9                                             /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
 #define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
 
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8                                             /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
 #define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
 
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7                                             /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
 #define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
 
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6                                             /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
 #define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
 
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5                                             /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
 #define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
 
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4                                             /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
 #define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
 
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0                                             /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
 #define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
 
 /*@} end of group CMSIS_CoreDebug */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_core_base     Core Definitions
-    \brief      Definitions for base addresses, unions, and structures.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
   @{
  */
 
-/* Memory mapping of Cortex-M4 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address  */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address                   */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address                   */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address                   */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address            */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address               */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                  */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address  */
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
 
 #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct           */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct           */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct           */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct    */
-
-#if (__MPU_PRESENT == 1)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
 #endif
 
-#if (__FPU_PRESENT == 1)
-  #define FPU_BASE          (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit                */
-  #define FPU               ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit                */
-#endif
+#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
+#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
 
 /*@} */
 
@@ -1677,187 +1803,278 @@ typedef struct
   - Core Debug Functions
   - Core Register Access Functions
  ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
 */
 
 
 
 /* ##########################   NVIC functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-    \brief      Functions that manage interrupts and exceptions via the NVIC.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
  */
 
-/** \brief  Set Priority Grouping
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     /* return to Handler mode, uses MSP after return, restore floating-point state */
+#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after return, restore floating-point state  */
+#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after return, restore floating-point state  */
 
-  The function sets the priority grouping field using the required unlock sequence.
-  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-  Only values from 0..7 are used.
-  In case of a conflict between priority grouping and available
-  priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
 
-    \param [in]      PriorityGroup  Priority grouping field.
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
  */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
   uint32_t reg_value;
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 
   reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8)                       );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
 
-/** \brief  Get Priority Grouping
-
-  The function reads the priority grouping field from the NVIC Interrupt Controller.
-
-    \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
 {
   return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 }
 
 
-/** \brief  Enable External Interrupt
-
-    The function enables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
 }
 
 
-/** \brief  Disable External Interrupt
-
-    The function disables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Get Pending Interrupt
-
-    The function reads the pending register in the NVIC and returns the pending bit
-    for the specified interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not pending.
-    \return             1  Interrupt status is pending.
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
 }
 
 
-/** \brief  Set Pending Interrupt
-
-    The function sets the pending bit of an external interrupt.
-
-    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Clear Pending Interrupt
-
-    The function clears the pending bit of an external interrupt.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Get Active Interrupt
-
-    The function reads the active register in NVIC and returns the active bit.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not active.
-    \return             1  Interrupt status is active.
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Set Interrupt Priority
-
-    The function sets the priority of an interrupt.
-
-    \note The priority cannot be set for every core interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-    \param [in]  priority  Priority to set.
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
 {
-  if((int32_t)IRQn < 0) {
-    SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
   }
-  else {
-    NVIC->IP[((uint32_t)(int32_t)IRQn)]                = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  else
+  {
+    return(0U);
   }
 }
 
 
-/** \brief  Get Interrupt Priority
-
-    The function reads the priority of an interrupt. The interrupt
-    number can be positive to specify an external (device specific)
-    interrupt, or negative to specify an internal (core) interrupt.
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
 
 
-    \param [in]   IRQn  Interrupt number.
-    \return             Interrupt Priority. Value is aligned automatically to the implemented
-                        priority bits of the microcontroller.
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
  */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
 {
 
-  if((int32_t)IRQn < 0) {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8 - __NVIC_PRIO_BITS)));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]                >> (8U - __NVIC_PRIO_BITS)));
   }
-  else {
-    return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)]               >> (8 - __NVIC_PRIO_BITS)));
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
   }
 }
 
 
-/** \brief  Encode Priority
-
-    The function encodes the priority for an interrupt with the given priority group,
-    preemptive priority value, and subpriority value.
-    In case of a conflict between priority grouping and available
-    priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
-    \param [in]     PriorityGroup  Used priority group.
-    \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-    \param [in]       SubPriority  Subpriority value (starting from 0).
-    \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
  */
 __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 {
@@ -1875,19 +2092,18 @@ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t P
 }
 
 
-/** \brief  Decode Priority
-
-    The function decodes an interrupt priority value with a given priority group to
-    preemptive priority value and subpriority value.
-    In case of a conflict between priority grouping and available
-    priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-
-    \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-    \param [in]     PriorityGroup  Used priority group.
-    \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-    \param [out]     pSubPriority  Subpriority value (starting from 0).
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
  */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
 {
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
   uint32_t PreemptPriorityBits;
@@ -1901,11 +2117,43 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr
 }
 
 
-/** \brief  System Reset
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
+}
+
 
-    The function initiates a system reset request to reset the MCU.
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */
@@ -1913,22 +2161,36 @@ __STATIC_INLINE void NVIC_SystemReset(void)
                            (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
                             SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
   __DSB();                                                          /* Ensure completion of memory access */
-  while(1) { __NOP(); }                                             /* wait until reset */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
 }
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
 
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv7.h"
+
+#endif
+
+
 /* ##########################  FPU functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_FpuFunctions FPU Functions
-    \brief      Function that provides FPU type.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
  */
 
 /**
-  \fn          uint32_t SCB_GetFPUType(void)
-  \brief       get FPU type
+  \brief   get FPU type
+  \details returns the FPU type
   \returns
    - \b  0: No FPU
    - \b  1: Single precision FPU
@@ -1939,74 +2201,84 @@ __STATIC_INLINE uint32_t SCB_GetFPUType(void)
   uint32_t mvfr0;
 
   mvfr0 = SCB->MVFR0;
-  if        ((mvfr0 & 0x00000FF0UL) == 0x220UL) {
-    return 2UL;           // Double + Single precision FPU
-  } else if ((mvfr0 & 0x00000FF0UL) == 0x020UL) {
-    return 1UL;           // Single precision FPU
-  } else {
-    return 0UL;           // No FPU
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
   }
 }
 
-
 /*@} end of CMSIS_Core_FpuFunctions */
 
 
 
 /* ##########################  Cache functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_CacheFunctions Cache Functions
-    \brief      Functions that configure Instruction and Data cache.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_CacheFunctions Cache Functions
+  \brief    Functions that configure Instruction and Data cache.
+  @{
  */
 
 /* Cache Size ID Register Macros */
 #define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
 #define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )
-#define CCSIDR_LSSHIFT(x)      (((x) & SCB_CCSIDR_LINESIZE_Msk     ) /*>> SCB_CCSIDR_LINESIZE_Pos*/ )
-
 
-/** \brief Enable I-Cache
+#define __SCB_DCACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
+#define __SCB_ICACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
 
-    The function turns on I-Cache
+/**
+  \brief   Enable I-Cache
+  \details Turns on I-Cache
   */
-__STATIC_INLINE void SCB_EnableICache (void)
+__STATIC_FORCEINLINE void SCB_EnableICache (void)
 {
-  #if (__ICACHE_PRESENT == 1)
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
+
+    __DSB();
+    __ISB();
+    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
     __DSB();
     __ISB();
-    SCB->ICIALLU = 0UL;                     // invalidate I-Cache
-    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  // enable I-Cache
+    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
     __DSB();
     __ISB();
   #endif
 }
 
 
-/** \brief Disable I-Cache
-
-    The function turns off I-Cache
+/**
+  \brief   Disable I-Cache
+  \details Turns off I-Cache
   */
-__STATIC_INLINE void SCB_DisableICache (void)
+__STATIC_FORCEINLINE void SCB_DisableICache (void)
 {
-  #if (__ICACHE_PRESENT == 1)
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
     __DSB();
     __ISB();
-    SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk;  // disable I-Cache
-    SCB->ICIALLU = 0UL;                     // invalidate I-Cache
+    SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk;  /* disable I-Cache */
+    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
     __DSB();
     __ISB();
   #endif
 }
 
 
-/** \brief Invalidate I-Cache
-
-    The function invalidates I-Cache
+/**
+  \brief   Invalidate I-Cache
+  \details Invalidates I-Cache
   */
-__STATIC_INLINE void SCB_InvalidateICache (void)
+__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
 {
-  #if (__ICACHE_PRESENT == 1)
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
     __DSB();
     __ISB();
     SCB->ICIALLU = 0UL;
@@ -2016,35 +2288,69 @@ __STATIC_INLINE void SCB_InvalidateICache (void)
 }
 
 
-/** \brief Enable D-Cache
+/**
+  \brief   I-Cache Invalidate by address
+  \details Invalidates I-Cache for the given address.
+           I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           I-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
+  \param[in]   isize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if ( isize > 0 ) {
+       int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
+
+      __DSB();
+
+      do {
+        SCB->ICIMVAU = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_ICACHE_LINE_SIZE;
+        op_size -= __SCB_ICACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
 
-    The function turns on D-Cache
+
+/**
+  \brief   Enable D-Cache
+  \details Turns on D-Cache
   */
-__STATIC_INLINE void SCB_EnableDCache (void)
+__STATIC_FORCEINLINE void SCB_EnableDCache (void)
 {
-  #if (__DCACHE_PRESENT == 1)
-    uint32_t ccsidr, sshift, wshift, sw;
-    uint32_t sets, ways;
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
 
-    SCB->CSSELR = (0UL << 1) | 0UL;         // Level 1 data cache
-    ccsidr  = SCB->CCSIDR;
-    sets    = (uint32_t)(CCSIDR_SETS(ccsidr));
-    sshift  = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
-    ways    = (uint32_t)(CCSIDR_WAYS(ccsidr));
-    wshift  = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
+    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
 
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
-    do {                                   // invalidate D-Cache
-         uint32_t tmpways = ways;
-         do {
-              sw = ((tmpways << wshift) | (sets << sshift));
-              SCB->DCISW = sw;
-            } while(tmpways--);
-        } while(sets--);
+    ccsidr = SCB->CCSIDR;
+
+                                            /* invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
+                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
     __DSB();
 
-    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;   // enable D-Cache
+    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
 
     __DSB();
     __ISB();
@@ -2052,35 +2358,37 @@ __STATIC_INLINE void SCB_EnableDCache (void)
 }
 
 
-/** \brief Disable D-Cache
-
-    The function turns off D-Cache
+/**
+  \brief   Disable D-Cache
+  \details Turns off D-Cache
   */
-__STATIC_INLINE void SCB_DisableDCache (void)
+__STATIC_FORCEINLINE void SCB_DisableDCache (void)
 {
-  #if (__DCACHE_PRESENT == 1)
-    uint32_t ccsidr, sshift, wshift, sw;
-    uint32_t sets, ways;
-
-    SCB->CSSELR = (0UL << 1) | 0UL;         // Level 1 data cache
-    ccsidr  = SCB->CCSIDR;
-    sets    = (uint32_t)(CCSIDR_SETS(ccsidr));
-    sshift  = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
-    ways    = (uint32_t)(CCSIDR_WAYS(ccsidr));
-    wshift  = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
 
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
-    SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  // disable D-Cache
-
-    do {                                    // clean & invalidate D-Cache
-         uint32_t tmpways = ways;
-         do {
-              sw = ((tmpways << wshift) | (sets << sshift));
-              SCB->DCCISW = sw;
-            } while(tmpways--);
-        } while(sets--);
+    SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
+    __DSB();
 
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean & invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
 
     __DSB();
     __ISB();
@@ -2088,32 +2396,34 @@ __STATIC_INLINE void SCB_DisableDCache (void)
 }
 
 
-/** \brief Invalidate D-Cache
-
-    The function invalidates D-Cache
+/**
+  \brief   Invalidate D-Cache
+  \details Invalidates D-Cache
   */
-__STATIC_INLINE void SCB_InvalidateDCache (void)
+__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
 {
-  #if (__DCACHE_PRESENT == 1)
-    uint32_t ccsidr, sshift, wshift, sw;
-    uint32_t sets, ways;
-
-    SCB->CSSELR = (0UL << 1) | 0UL;         // Level 1 data cache
-    ccsidr  = SCB->CCSIDR;
-    sets    = (uint32_t)(CCSIDR_SETS(ccsidr));
-    sshift  = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
-    ways    = (uint32_t)(CCSIDR_WAYS(ccsidr));
-    wshift  = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
 
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
-    do {                                    // invalidate D-Cache
-         uint32_t tmpways = ways;
-         do {
-              sw = ((tmpways << wshift) | (sets << sshift));
-              SCB->DCISW = sw;
-            } while(tmpways--);
-        } while(sets--);
+    ccsidr = SCB->CCSIDR;
+
+                                            /* invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
+                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
 
     __DSB();
     __ISB();
@@ -2121,32 +2431,34 @@ __STATIC_INLINE void SCB_InvalidateDCache (void)
 }
 
 
-/** \brief Clean D-Cache
-
-    The function cleans D-Cache
+/**
+  \brief   Clean D-Cache
+  \details Cleans D-Cache
   */
-__STATIC_INLINE void SCB_CleanDCache (void)
+__STATIC_FORCEINLINE void SCB_CleanDCache (void)
 {
-  #if (__DCACHE_PRESENT == 1)
-    uint32_t ccsidr, sshift, wshift, sw;
-    uint32_t sets, ways;
-
-    SCB->CSSELR = (0UL << 1) | 0UL;         // Level 1 data cache
-    ccsidr  = SCB->CCSIDR;
-    sets    = (uint32_t)(CCSIDR_SETS(ccsidr));
-    sshift  = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
-    ways    = (uint32_t)(CCSIDR_WAYS(ccsidr));
-    wshift  = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
 
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
-    do {                                    // clean D-Cache
-         uint32_t tmpways = ways;
-         do {
-              sw = ((tmpways << wshift) | (sets << sshift));
-              SCB->DCCSW = sw;
-            } while(tmpways--);
-        } while(sets--);
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
+                      ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
 
     __DSB();
     __ISB();
@@ -2154,32 +2466,34 @@ __STATIC_INLINE void SCB_CleanDCache (void)
 }
 
 
-/** \brief Clean & Invalidate D-Cache
-
-    The function cleans and Invalidates D-Cache
+/**
+  \brief   Clean & Invalidate D-Cache
+  \details Cleans and Invalidates D-Cache
   */
-__STATIC_INLINE void SCB_CleanInvalidateDCache (void)
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
 {
-  #if (__DCACHE_PRESENT == 1)
-    uint32_t ccsidr, sshift, wshift, sw;
-    uint32_t sets, ways;
-
-    SCB->CSSELR = (0UL << 1) | 0UL;         // Level 1 data cache
-    ccsidr  = SCB->CCSIDR;
-    sets    = (uint32_t)(CCSIDR_SETS(ccsidr));
-    sshift  = (uint32_t)(CCSIDR_LSSHIFT(ccsidr) + 4UL);
-    ways    = (uint32_t)(CCSIDR_WAYS(ccsidr));
-    wshift  = (uint32_t)((uint32_t)__CLZ(ways) & 0x1FUL);
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
 
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
 
-    do {                                    // clean & invalidate D-Cache
-         uint32_t tmpways = ways;
-         do {
-              sw = ((tmpways << wshift) | (sets << sshift));
-              SCB->DCCISW = sw;
-            } while(tmpways--);
-        } while(sets--);
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean & invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
 
     __DSB();
     __ISB();
@@ -2188,117 +2502,125 @@ __STATIC_INLINE void SCB_CleanInvalidateDCache (void)
 
 
 /**
-  \fn          void SCB_InvalidateDCache_by_Addr(volatile uint32_t *addr, int32_t dsize)
-  \brief       D-Cache Invalidate by address
-  \param[in]   addr    address (aligned to 32-byte boundary)
+  \brief   D-Cache Invalidate by address
+  \details Invalidates D-Cache for the given address.
+           D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_InvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
 {
-  #if (__DCACHE_PRESENT == 1)
-    int32_t  op_size = dsize;
-    uint32_t op_addr = (uint32_t)addr;
-    uint32_t linesize = 32UL;               // in Cortex-M7 size of cache line is fixed to 8 words (32 bytes)
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCIMVAC = op_addr;
-      op_addr +=          linesize;
-      op_size -= (int32_t)linesize;
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
+
+      do {
+        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
 
 /**
-  \fn          void SCB_CleanDCache_by_Addr(volatile uint32_t *addr, int32_t dsize)
-  \brief       D-Cache Clean by address
-  \param[in]   addr    address (aligned to 32-byte boundary)
+  \brief   D-Cache Clean by address
+  \details Cleans D-Cache for the given address
+           D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned.
+  \param[in]   addr    address
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
 {
-  #if (__DCACHE_PRESENT == 1)
-    int32_t  op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-    uint32_t linesize = 32UL;               // in Cortex-M7 size of cache line is fixed to 8 words (32 bytes)
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCCMVAC = op_addr;
-      op_addr +=          linesize;
-      op_size -= (int32_t)linesize;
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
+
+      do {
+        SCB->DCCMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
 
 /**
-  \fn          void SCB_CleanInvalidateDCache_by_Addr(volatile uint32_t *addr, int32_t dsize)
-  \brief       D-Cache Clean and Invalidate by address
+  \brief   D-Cache Clean and Invalidate by address
+  \details Cleans and invalidates D_Cache for the given address
+           D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
   \param[in]   addr    address (aligned to 32-byte boundary)
   \param[in]   dsize   size of memory block (in number of bytes)
 */
-__STATIC_INLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
 {
-  #if (__DCACHE_PRESENT == 1)
-    int32_t  op_size = dsize;
-    uint32_t op_addr = (uint32_t) addr;
-    uint32_t linesize = 32UL;               // in Cortex-M7 size of cache line is fixed to 8 words (32 bytes)
-
-    __DSB();
-
-    while (op_size > 0) {
-      SCB->DCCIMVAC = op_addr;
-      op_addr +=          linesize;
-      op_size -= (int32_t)linesize;
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
+
+      do {
+        SCB->DCCIMVAC = op_addr;            /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr +=          __SCB_DCACHE_LINE_SIZE;
+        op_size -=          __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
     }
-
-    __DSB();
-    __ISB();
   #endif
 }
 
-
 /*@} end of CMSIS_Core_CacheFunctions */
 
 
 
 /* ##################################    SysTick function  ############################################ */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-    \brief      Functions that configure the System.
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
   @{
  */
 
-#if (__Vendor_SysTickConfig == 0)
-
-/** \brief  System Tick Configuration
-
-    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
-    Counter is in free running mode to generate periodic interrupts.
-
-    \param [in]  ticks  Number of ticks between two interrupts.
-
-    \return          0  Function succeeded.
-    \return          1  Function failed.
-
-    \note     When the variable __Vendor_SysTickConfig is set to 1, then the
-    function SysTick_Config is not included. In this case, the file device.h
-    must contain a vendor-specific implementation of this function.
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
 
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) { return (1UL); }    /* Reload value impossible */
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
@@ -2316,49 +2638,52 @@ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 
 
 /* ##################################### Debug In/Output function ########################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_core_DebugFunctions ITM Functions
-    \brief   Functions that access the ITM debug interface.
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
   @{
  */
 
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters.                         */
-#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/** \brief  ITM Send Character
-
-    The function transmits a character via the ITM channel 0, and
-    \li Just returns when no debugger is connected that has booked the output.
-    \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
 
-    \param [in]     ch  Character to transmit.
 
-    \returns            Character to transmit.
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
  */
 __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
 {
   if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
       ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
   {
-    while (ITM->PORT[0].u32 == 0UL) { __NOP(); }
-    ITM->PORT[0].u8 = (uint8_t)ch;
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
   }
   return (ch);
 }
 
 
-/** \brief  ITM Receive Character
-
-    The function inputs a character via the external variable \ref ITM_RxBuffer.
-
-    \return             Received character.
-    \return         -1  No character pending.
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
  */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
   int32_t ch = -1;                           /* no character available */
 
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
     ch = ITM_RxBuffer;
     ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
   }
@@ -2367,19 +2692,22 @@ __STATIC_INLINE int32_t ITM_ReceiveChar (void) {
 }
 
 
-/** \brief  ITM Check Character
-
-    The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
-    \return          0  No character available.
-    \return          1  Character available.
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
  */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
 
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
-    return (0);                                 /* no character available */
-  } else {
-    return (1);                                 /*    character available */
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
   }
 }
 
diff --git a/Libraries/CMSIS/Include/core_cmFunc.h b/Libraries/CMSIS/Include/core_cmFunc.h
deleted file mode 100644
index e3c057e6..00000000
--- a/Libraries/CMSIS/Include/core_cmFunc.h
+++ /dev/null
@@ -1,664 +0,0 @@
-/**************************************************************************//**
- * @file     core_cmFunc.h
- * @brief    CMSIS Cortex-M Core Function Access Header File
- * @version  V4.10
- * @date     18. March 2015
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#ifndef __CORE_CMFUNC_H
-#define __CORE_CMFUNC_H
-
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-#if (__ARMCC_VERSION < 400677)
-  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* intrinsic void __enable_irq();     */
-/* intrinsic void __disable_irq();    */
-
-/** \brief  Get Control Register
-
-    This function returns the content of the Control Register.
-
-    \return               Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  register uint32_t __regControl         __ASM("control");
-  return(__regControl);
-}
-
-
-/** \brief  Set Control Register
-
-    This function writes the given value to the Control Register.
-
-    \param [in]    control  Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  register uint32_t __regControl         __ASM("control");
-  __regControl = control;
-}
-
-
-/** \brief  Get IPSR Register
-
-    This function returns the content of the IPSR Register.
-
-    \return               IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  register uint32_t __regIPSR          __ASM("ipsr");
-  return(__regIPSR);
-}
-
-
-/** \brief  Get APSR Register
-
-    This function returns the content of the APSR Register.
-
-    \return               APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
-  register uint32_t __regAPSR          __ASM("apsr");
-  return(__regAPSR);
-}
-
-
-/** \brief  Get xPSR Register
-
-    This function returns the content of the xPSR Register.
-
-    \return               xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  register uint32_t __regXPSR          __ASM("xpsr");
-  return(__regXPSR);
-}
-
-
-/** \brief  Get Process Stack Pointer
-
-    This function returns the current value of the Process Stack Pointer (PSP).
-
-    \return               PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  return(__regProcessStackPointer);
-}
-
-
-/** \brief  Set Process Stack Pointer
-
-    This function assigns the given value to the Process Stack Pointer (PSP).
-
-    \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  __regProcessStackPointer = topOfProcStack;
-}
-
-
-/** \brief  Get Main Stack Pointer
-
-    This function returns the current value of the Main Stack Pointer (MSP).
-
-    \return               MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  return(__regMainStackPointer);
-}
-
-
-/** \brief  Set Main Stack Pointer
-
-    This function assigns the given value to the Main Stack Pointer (MSP).
-
-    \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  __regMainStackPointer = topOfMainStack;
-}
-
-
-/** \brief  Get Priority Mask
-
-    This function returns the current state of the priority mask bit from the Priority Mask Register.
-
-    \return               Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  return(__regPriMask);
-}
-
-
-/** \brief  Set Priority Mask
-
-    This function assigns the given value to the Priority Mask Register.
-
-    \param [in]    priMask  Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  __regPriMask = (priMask);
-}
-
-
-#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
-
-/** \brief  Enable FIQ
-
-    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
-    Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq                __enable_fiq
-
-
-/** \brief  Disable FIQ
-
-    This function disables FIQ interrupts by setting the F-bit in the CPSR.
-    Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq               __disable_fiq
-
-
-/** \brief  Get Base Priority
-
-    This function returns the current value of the Base Priority register.
-
-    \return               Base Priority register value
- */
-__STATIC_INLINE uint32_t  __get_BASEPRI(void)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  return(__regBasePri);
-}
-
-
-/** \brief  Set Base Priority
-
-    This function assigns the given value to the Base Priority register.
-
-    \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  __regBasePri = (basePri & 0xff);
-}
-
-
-/** \brief  Set Base Priority with condition
-
-    This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-    or the new value increases the BASEPRI priority level.
-
-    \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
-  register uint32_t __regBasePriMax      __ASM("basepri_max");
-  __regBasePriMax = (basePri & 0xff);
-}
-
-
-/** \brief  Get Fault Mask
-
-    This function returns the current value of the Fault Mask register.
-
-    \return               Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  return(__regFaultMask);
-}
-
-
-/** \brief  Set Fault Mask
-
-    This function assigns the given value to the Fault Mask register.
-
-    \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  __regFaultMask = (faultMask & (uint32_t)1);
-}
-
-#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
-
-
-#if       (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
-
-/** \brief  Get FPSCR
-
-    This function returns the current value of the Floating Point Status/Control register.
-
-    \return               Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  register uint32_t __regfpscr         __ASM("fpscr");
-  return(__regfpscr);
-#else
-   return(0);
-#endif
-}
-
-
-/** \brief  Set FPSCR
-
-    This function assigns the given value to the Floating Point Status/Control register.
-
-    \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  register uint32_t __regfpscr         __ASM("fpscr");
-  __regfpscr = (fpscr);
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/** \brief  Enable IRQ Interrupts
-
-  This function enables IRQ interrupts by clearing the I-bit in the CPSR.
-  Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
-{
-  __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/** \brief  Disable IRQ Interrupts
-
-  This function disables IRQ interrupts by setting the I-bit in the CPSR.
-  Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
-{
-  __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/** \brief  Get Control Register
-
-    This function returns the content of the Control Register.
-
-    \return               Control Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Control Register
-
-    This function writes the given value to the Control Register.
-
-    \param [in]    control  Control Register value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-/** \brief  Get IPSR Register
-
-    This function returns the content of the IPSR Register.
-
-    \return               IPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Get APSR Register
-
-    This function returns the content of the APSR Register.
-
-    \return               APSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Get xPSR Register
-
-    This function returns the content of the xPSR Register.
-
-    \return               xPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Get Process Stack Pointer
-
-    This function returns the current value of the Process Stack Pointer (PSP).
-
-    \return               PSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Process Stack Pointer
-
-    This function assigns the given value to the Process Stack Pointer (PSP).
-
-    \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
-}
-
-
-/** \brief  Get Main Stack Pointer
-
-    This function returns the current value of the Main Stack Pointer (MSP).
-
-    \return               MSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Main Stack Pointer
-
-    This function assigns the given value to the Main Stack Pointer (MSP).
-
-    \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
-}
-
-
-/** \brief  Get Priority Mask
-
-    This function returns the current state of the priority mask bit from the Priority Mask Register.
-
-    \return               Priority Mask value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Priority Mask
-
-    This function assigns the given value to the Priority Mask Register.
-
-    \param [in]    priMask  Priority Mask
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if       (__CORTEX_M >= 0x03)
-
-/** \brief  Enable FIQ
-
-    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
-    Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
-{
-  __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/** \brief  Disable FIQ
-
-    This function disables FIQ interrupts by setting the F-bit in the CPSR.
-    Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
-{
-  __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/** \brief  Get Base Priority
-
-    This function returns the current value of the Base Priority register.
-
-    \return               Base Priority register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Base Priority
-
-    This function assigns the given value to the Base Priority register.
-
-    \param [in]    basePri  Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
-{
-  __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
-}
-
-
-/** \brief  Set Base Priority with condition
-
-    This function assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-	or the new value increases the BASEPRI priority level.
-
-    \param [in]    basePri  Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t value)
-{
-  __ASM volatile ("MSR basepri_max, %0" : : "r" (value) : "memory");
-}
-
-
-/** \brief  Get Fault Mask
-
-    This function returns the current value of the Fault Mask register.
-
-    \return               Fault Mask register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Fault Mask
-
-    This function assigns the given value to the Fault Mask register.
-
-    \param [in]    faultMask  Fault Mask value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-#if       (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
-
-/** \brief  Get FPSCR
-
-    This function returns the current value of the Floating Point Status/Control register.
-
-    \return               Floating Point Status/Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  uint32_t result;
-
-  /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("");
-  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
-  __ASM volatile ("");
-  return(result);
-#else
-   return(0);
-#endif
-}
-
-
-/** \brief  Set FPSCR
-
-    This function assigns the given value to the Floating Point Status/Control register.
-
-    \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("");
-  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
-  __ASM volatile ("");
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-#include 
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-#include 
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-/*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-
-#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
-/* Cosmic specific functions */
-#include 
-
-#endif
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-#endif /* __CORE_CMFUNC_H */
diff --git a/Libraries/CMSIS/Include/core_cmInstr.h b/Libraries/CMSIS/Include/core_cmInstr.h
deleted file mode 100644
index c8e045f5..00000000
--- a/Libraries/CMSIS/Include/core_cmInstr.h
+++ /dev/null
@@ -1,916 +0,0 @@
-/**************************************************************************//**
- * @file     core_cmInstr.h
- * @brief    CMSIS Cortex-M Core Instruction Access Header File
- * @version  V4.10
- * @date     18. March 2015
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2014 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#ifndef __CORE_CMINSTR_H
-#define __CORE_CMINSTR_H
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-#if (__ARMCC_VERSION < 400677)
-  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-
-/** \brief  No Operation
-
-    No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP                             __nop
-
-
-/** \brief  Wait For Interrupt
-
-    Wait For Interrupt is a hint instruction that suspends execution
-    until one of a number of events occurs.
- */
-#define __WFI                             __wfi
-
-
-/** \brief  Wait For Event
-
-    Wait For Event is a hint instruction that permits the processor to enter
-    a low-power state until one of a number of events occurs.
- */
-#define __WFE                             __wfe
-
-
-/** \brief  Send Event
-
-    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV                             __sev
-
-
-/** \brief  Instruction Synchronization Barrier
-
-    Instruction Synchronization Barrier flushes the pipeline in the processor,
-    so that all instructions following the ISB are fetched from cache or
-    memory, after the instruction has been completed.
- */
-#define __ISB() do {\
-                   __schedule_barrier();\
-                   __isb(0xF);\
-                   __schedule_barrier();\
-                } while (0)
-
-/** \brief  Data Synchronization Barrier
-
-    This function acts as a special kind of Data Memory Barrier.
-    It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() do {\
-                   __schedule_barrier();\
-                   __dsb(0xF);\
-                   __schedule_barrier();\
-                } while (0)
-
-/** \brief  Data Memory Barrier
-
-    This function ensures the apparent order of the explicit memory operations before
-    and after the instruction, without ensuring their completion.
- */
-#define __DMB() do {\
-                   __schedule_barrier();\
-                   __dmb(0xF);\
-                   __schedule_barrier();\
-                } while (0)
-
-/** \brief  Reverse byte order (32 bit)
-
-    This function reverses the byte order in integer value.
-
-    \param [in]    value  Value to reverse
-    \return               Reversed value
- */
-#define __REV                             __rev
-
-
-/** \brief  Reverse byte order (16 bit)
-
-    This function reverses the byte order in two unsigned short values.
-
-    \param [in]    value  Value to reverse
-    \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
-  rev16 r0, r0
-  bx lr
-}
-#endif
-
-/** \brief  Reverse byte order in signed short value
-
-    This function reverses the byte order in a signed short value with sign extension to integer.
-
-    \param [in]    value  Value to reverse
-    \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int32_t __REVSH(int32_t value)
-{
-  revsh r0, r0
-  bx lr
-}
-#endif
-
-
-/** \brief  Rotate Right in unsigned value (32 bit)
-
-    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-
-    \param [in]    value  Value to rotate
-    \param [in]    value  Number of Bits to rotate
-    \return               Rotated value
- */
-#define __ROR                             __ror
-
-
-/** \brief  Breakpoint
-
-    This function causes the processor to enter Debug state.
-    Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-
-    \param [in]    value  is ignored by the processor.
-                   If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __breakpoint(value)
-
-
-/** \brief  Reverse bit order of value
-
-    This function reverses the bit order of the given value.
-
-    \param [in]    value  Value to reverse
-    \return               Reversed value
- */
-#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
-  #define __RBIT                          __rbit
-#else
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-  int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
-
-  result = value;                      // r will be reversed bits of v; first get LSB of v
-  for (value >>= 1; value; value >>= 1)
-  {
-    result <<= 1;
-    result |= value & 1;
-    s--;
-  }
-  result <<= s;                       // shift when v's highest bits are zero
-  return(result);
-}
-#endif
-
-
-/** \brief  Count leading zeros
-
-    This function counts the number of leading zeros of a data value.
-
-    \param [in]  value  Value to count the leading zeros
-    \return             number of leading zeros in value
- */
-#define __CLZ                             __clz
-
-
-#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
-
-/** \brief  LDR Exclusive (8 bit)
-
-    This function executes a exclusive LDR instruction for 8 bit value.
-
-    \param [in]    ptr  Pointer to data
-    \return             value of type uint8_t at (*ptr)
- */
-#define __LDREXB(ptr)                     ((uint8_t ) __ldrex(ptr))
-
-
-/** \brief  LDR Exclusive (16 bit)
-
-    This function executes a exclusive LDR instruction for 16 bit values.
-
-    \param [in]    ptr  Pointer to data
-    \return        value of type uint16_t at (*ptr)
- */
-#define __LDREXH(ptr)                     ((uint16_t) __ldrex(ptr))
-
-
-/** \brief  LDR Exclusive (32 bit)
-
-    This function executes a exclusive LDR instruction for 32 bit values.
-
-    \param [in]    ptr  Pointer to data
-    \return        value of type uint32_t at (*ptr)
- */
-#define __LDREXW(ptr)                     ((uint32_t ) __ldrex(ptr))
-
-
-/** \brief  STR Exclusive (8 bit)
-
-    This function executes a exclusive STR instruction for 8 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
-    \return          0  Function succeeded
-    \return          1  Function failed
- */
-#define __STREXB(value, ptr)              __strex(value, ptr)
-
-
-/** \brief  STR Exclusive (16 bit)
-
-    This function executes a exclusive STR instruction for 16 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
-    \return          0  Function succeeded
-    \return          1  Function failed
- */
-#define __STREXH(value, ptr)              __strex(value, ptr)
-
-
-/** \brief  STR Exclusive (32 bit)
-
-    This function executes a exclusive STR instruction for 32 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
-    \return          0  Function succeeded
-    \return          1  Function failed
- */
-#define __STREXW(value, ptr)              __strex(value, ptr)
-
-
-/** \brief  Remove the exclusive lock
-
-    This function removes the exclusive lock which is created by LDREX.
-
- */
-#define __CLREX                           __clrex
-
-
-/** \brief  Signed Saturate
-
-    This function saturates a signed value.
-
-    \param [in]  value  Value to be saturated
-    \param [in]    sat  Bit position to saturate to (1..32)
-    \return             Saturated value
- */
-#define __SSAT                            __ssat
-
-
-/** \brief  Unsigned Saturate
-
-    This function saturates an unsigned value.
-
-    \param [in]  value  Value to be saturated
-    \param [in]    sat  Bit position to saturate to (0..31)
-    \return             Saturated value
- */
-#define __USAT                            __usat
-
-
-/** \brief  Rotate Right with Extend (32 bit)
-
-    This function moves each bit of a bitstring right by one bit.
-    The carry input is shifted in at the left end of the bitstring.
-
-    \param [in]    value  Value to rotate
-    \return               Rotated value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
-{
-  rrx r0, r0
-  bx lr
-}
-#endif
-
-
-/** \brief  LDRT Unprivileged (8 bit)
-
-    This function executes a Unprivileged LDRT instruction for 8 bit value.
-
-    \param [in]    ptr  Pointer to data
-    \return             value of type uint8_t at (*ptr)
- */
-#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
-
-
-/** \brief  LDRT Unprivileged (16 bit)
-
-    This function executes a Unprivileged LDRT instruction for 16 bit values.
-
-    \param [in]    ptr  Pointer to data
-    \return        value of type uint16_t at (*ptr)
- */
-#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
-
-
-/** \brief  LDRT Unprivileged (32 bit)
-
-    This function executes a Unprivileged LDRT instruction for 32 bit values.
-
-    \param [in]    ptr  Pointer to data
-    \return        value of type uint32_t at (*ptr)
- */
-#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
-
-
-/** \brief  STRT Unprivileged (8 bit)
-
-    This function executes a Unprivileged STRT instruction for 8 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
- */
-#define __STRBT(value, ptr)               __strt(value, ptr)
-
-
-/** \brief  STRT Unprivileged (16 bit)
-
-    This function executes a Unprivileged STRT instruction for 16 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
- */
-#define __STRHT(value, ptr)               __strt(value, ptr)
-
-
-/** \brief  STRT Unprivileged (32 bit)
-
-    This function executes a Unprivileged STRT instruction for 32 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
- */
-#define __STRT(value, ptr)                __strt(value, ptr)
-
-#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constrant "l"
- * Otherwise, use general registers, specified by constrant "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/** \brief  No Operation
-
-    No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
-{
-  __ASM volatile ("nop");
-}
-
-
-/** \brief  Wait For Interrupt
-
-    Wait For Interrupt is a hint instruction that suspends execution
-    until one of a number of events occurs.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
-{
-  __ASM volatile ("wfi");
-}
-
-
-/** \brief  Wait For Event
-
-    Wait For Event is a hint instruction that permits the processor to enter
-    a low-power state until one of a number of events occurs.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
-{
-  __ASM volatile ("wfe");
-}
-
-
-/** \brief  Send Event
-
-    Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
-{
-  __ASM volatile ("sev");
-}
-
-
-/** \brief  Instruction Synchronization Barrier
-
-    Instruction Synchronization Barrier flushes the pipeline in the processor,
-    so that all instructions following the ISB are fetched from cache or
-    memory, after the instruction has been completed.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
-{
-  __ASM volatile ("isb 0xF":::"memory");
-}
-
-
-/** \brief  Data Synchronization Barrier
-
-    This function acts as a special kind of Data Memory Barrier.
-    It completes when all explicit memory accesses before this instruction complete.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
-{
-  __ASM volatile ("dsb 0xF":::"memory");
-}
-
-
-/** \brief  Data Memory Barrier
-
-    This function ensures the apparent order of the explicit memory operations before
-    and after the instruction, without ensuring their completion.
- */
-__attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
-{
-  __ASM volatile ("dmb 0xF":::"memory");
-}
-
-
-/** \brief  Reverse byte order (32 bit)
-
-    This function reverses the byte order in integer value.
-
-    \param [in]    value  Value to reverse
-    \return               Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
-  return __builtin_bswap32(value);
-#else
-  uint32_t result;
-
-  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-#endif
-}
-
-
-/** \brief  Reverse byte order (16 bit)
-
-    This function reverses the byte order in two unsigned short values.
-
-    \param [in]    value  Value to reverse
-    \return               Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/** \brief  Reverse byte order in signed short value
-
-    This function reverses the byte order in a signed short value with sign extension to integer.
-
-    \param [in]    value  Value to reverse
-    \return               Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-  return (short)__builtin_bswap16(value);
-#else
-  uint32_t result;
-
-  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-#endif
-}
-
-
-/** \brief  Rotate Right in unsigned value (32 bit)
-
-    This function Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-
-    \param [in]    value  Value to rotate
-    \param [in]    value  Number of Bits to rotate
-    \return               Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-  return (op1 >> op2) | (op1 << (32 - op2));
-}
-
-
-/** \brief  Breakpoint
-
-    This function causes the processor to enter Debug state.
-    Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-
-    \param [in]    value  is ignored by the processor.
-                   If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
-
-
-/** \brief  Reverse bit order of value
-
-    This function reverses the bit order of the given value.
-
-    \param [in]    value  Value to reverse
-    \return               Reversed value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-
-#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
-#else
-  int32_t s = 4 /*sizeof(v)*/ * 8 - 1; // extra shift needed at end
-
-  result = value;                      // r will be reversed bits of v; first get LSB of v
-  for (value >>= 1; value; value >>= 1)
-  {
-    result <<= 1;
-    result |= value & 1;
-    s--;
-  }
-  result <<= s;                       // shift when v's highest bits are zero
-#endif
-  return(result);
-}
-
-
-/** \brief  Count leading zeros
-
-    This function counts the number of leading zeros of a data value.
-
-    \param [in]  value  Value to count the leading zeros
-    \return             number of leading zeros in value
- */
-#define __CLZ             __builtin_clz
-
-
-#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
-
-/** \brief  LDR Exclusive (8 bit)
-
-    This function executes a exclusive LDR instruction for 8 bit value.
-
-    \param [in]    ptr  Pointer to data
-    \return             value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/** \brief  LDR Exclusive (16 bit)
-
-    This function executes a exclusive LDR instruction for 16 bit values.
-
-    \param [in]    ptr  Pointer to data
-    \return        value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/** \brief  LDR Exclusive (32 bit)
-
-    This function executes a exclusive LDR instruction for 32 bit values.
-
-    \param [in]    ptr  Pointer to data
-    \return        value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
-   return(result);
-}
-
-
-/** \brief  STR Exclusive (8 bit)
-
-    This function executes a exclusive STR instruction for 8 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
-    \return          0  Function succeeded
-    \return          1  Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/** \brief  STR Exclusive (16 bit)
-
-    This function executes a exclusive STR instruction for 16 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
-    \return          0  Function succeeded
-    \return          1  Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/** \brief  STR Exclusive (32 bit)
-
-    This function executes a exclusive STR instruction for 32 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
-    \return          0  Function succeeded
-    \return          1  Function failed
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
-   return(result);
-}
-
-
-/** \brief  Remove the exclusive lock
-
-    This function removes the exclusive lock which is created by LDREX.
-
- */
-__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
-{
-  __ASM volatile ("clrex" ::: "memory");
-}
-
-
-/** \brief  Signed Saturate
-
-    This function saturates a signed value.
-
-    \param [in]  value  Value to be saturated
-    \param [in]    sat  Bit position to saturate to (1..32)
-    \return             Saturated value
- */
-#define __SSAT(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-
-/** \brief  Unsigned Saturate
-
-    This function saturates an unsigned value.
-
-    \param [in]  value  Value to be saturated
-    \param [in]    sat  Bit position to saturate to (0..31)
-    \return             Saturated value
- */
-#define __USAT(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-
-/** \brief  Rotate Right with Extend (32 bit)
-
-    This function moves each bit of a bitstring right by one bit.
-    The carry input is shifted in at the left end of the bitstring.
-
-    \param [in]    value  Value to rotate
-    \return               Rotated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/** \brief  LDRT Unprivileged (8 bit)
-
-    This function executes a Unprivileged LDRT instruction for 8 bit value.
-
-    \param [in]    ptr  Pointer to data
-    \return             value of type uint8_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/** \brief  LDRT Unprivileged (16 bit)
-
-    This function executes a Unprivileged LDRT instruction for 16 bit values.
-
-    \param [in]    ptr  Pointer to data
-    \return        value of type uint16_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/** \brief  LDRT Unprivileged (32 bit)
-
-    This function executes a Unprivileged LDRT instruction for 32 bit values.
-
-    \param [in]    ptr  Pointer to data
-    \return        value of type uint32_t at (*ptr)
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *addr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*addr) );
-   return(result);
-}
-
-
-/** \brief  STRT Unprivileged (8 bit)
-
-    This function executes a Unprivileged STRT instruction for 8 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *addr)
-{
-   __ASM volatile ("strbt %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
-}
-
-
-/** \brief  STRT Unprivileged (16 bit)
-
-    This function executes a Unprivileged STRT instruction for 16 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *addr)
-{
-   __ASM volatile ("strht %1, %0" : "=Q" (*addr) : "r" ((uint32_t)value) );
-}
-
-
-/** \brief  STRT Unprivileged (32 bit)
-
-    This function executes a Unprivileged STRT instruction for 32 bit values.
-
-    \param [in]  value  Value to store
-    \param [in]    ptr  Pointer to location
- */
-__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *addr)
-{
-   __ASM volatile ("strt %1, %0" : "=Q" (*addr) : "r" (value) );
-}
-
-#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-#include 
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-#include 
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-/*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-
-#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
-/* Cosmic specific functions */
-#include 
-
-#endif
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-#endif /* __CORE_CMINSTR_H */
diff --git a/Libraries/CMSIS/Include/core_cmSimd.h b/Libraries/CMSIS/Include/core_cmSimd.h
deleted file mode 100644
index fd7214ee..00000000
--- a/Libraries/CMSIS/Include/core_cmSimd.h
+++ /dev/null
@@ -1,697 +0,0 @@
-/**************************************************************************//**
- * @file     core_cmSimd.h
- * @brief    CMSIS Cortex-M SIMD Header File
- * @version  V4.10
- * @date     18. March 2015
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2014 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include  /* treat file as system include file for MISRA check */
-#endif
-
-#ifndef __CORE_CMSIMD_H
-#define __CORE_CMSIMD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
- ******************************************************************************/
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-#define __SADD8                           __sadd8
-#define __QADD8                           __qadd8
-#define __SHADD8                          __shadd8
-#define __UADD8                           __uadd8
-#define __UQADD8                          __uqadd8
-#define __UHADD8                          __uhadd8
-#define __SSUB8                           __ssub8
-#define __QSUB8                           __qsub8
-#define __SHSUB8                          __shsub8
-#define __USUB8                           __usub8
-#define __UQSUB8                          __uqsub8
-#define __UHSUB8                          __uhsub8
-#define __SADD16                          __sadd16
-#define __QADD16                          __qadd16
-#define __SHADD16                         __shadd16
-#define __UADD16                          __uadd16
-#define __UQADD16                         __uqadd16
-#define __UHADD16                         __uhadd16
-#define __SSUB16                          __ssub16
-#define __QSUB16                          __qsub16
-#define __SHSUB16                         __shsub16
-#define __USUB16                          __usub16
-#define __UQSUB16                         __uqsub16
-#define __UHSUB16                         __uhsub16
-#define __SASX                            __sasx
-#define __QASX                            __qasx
-#define __SHASX                           __shasx
-#define __UASX                            __uasx
-#define __UQASX                           __uqasx
-#define __UHASX                           __uhasx
-#define __SSAX                            __ssax
-#define __QSAX                            __qsax
-#define __SHSAX                           __shsax
-#define __USAX                            __usax
-#define __UQSAX                           __uqsax
-#define __UHSAX                           __uhsax
-#define __USAD8                           __usad8
-#define __USADA8                          __usada8
-#define __SSAT16                          __ssat16
-#define __USAT16                          __usat16
-#define __UXTB16                          __uxtb16
-#define __UXTAB16                         __uxtab16
-#define __SXTB16                          __sxtb16
-#define __SXTAB16                         __sxtab16
-#define __SMUAD                           __smuad
-#define __SMUADX                          __smuadx
-#define __SMLAD                           __smlad
-#define __SMLADX                          __smladx
-#define __SMLALD                          __smlald
-#define __SMLALDX                         __smlaldx
-#define __SMUSD                           __smusd
-#define __SMUSDX                          __smusdx
-#define __SMLSD                           __smlsd
-#define __SMLSDX                          __smlsdx
-#define __SMLSLD                          __smlsld
-#define __SMLSLDX                         __smlsldx
-#define __SEL                             __sel
-#define __QADD                            __qadd
-#define __QSUB                            __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
-
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
-
-#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
-                                                      ((int64_t)(ARG3) << 32)      ) >> 32))
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   // Little endian
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               // Big endian
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   // Little endian
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               // Big endian
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   // Little endian
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               // Big endian
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   // Little endian
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               // Big endian
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QADD(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __QSUB(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  if (ARG3 == 0) \
-    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
-  else \
-    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-#include 
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-#include 
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-/* not yet supported */
-
-
-#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
-/* Cosmic specific functions */
-#include 
-
-#endif
-
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CMSIMD_H */
diff --git a/Libraries/CMSIS/Include/core_sc000.h b/Libraries/CMSIS/Include/core_sc000.h
index c442606c..f315013b 100644
--- a/Libraries/CMSIS/Include/core_sc000.h
+++ b/Libraries/CMSIS/Include/core_sc000.h
@@ -1,52 +1,44 @@
 /**************************************************************************//**
  * @file     core_sc000.h
  * @brief    CMSIS SC000 Core Peripheral Access Layer Header File
- * @version  V4.10
- * @date     18. March 2015
+ * @version  V5.0.6
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
  *
- * @note
+ * SPDX-License-Identifier: Apache-2.0
  *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include  /* treat file as system include file for MISRA check */
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
 #endif
 
 #ifndef __CORE_SC000_H_GENERIC
 #define __CORE_SC000_H_GENERIC
 
+#include 
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
   CMSIS violates the following MISRA-C:2004 rules:
 
    \li Required Rule 8.5, object/function definition in header file.

@@ -63,74 +55,49 @@
 /*******************************************************************************
  *                 CMSIS definitions
  ******************************************************************************/
-/** \ingroup SC000
+/**
+  \ingroup SC000
   @{
  */
 
-/*  CMSIS SC000 definitions */
-#define __SC000_CMSIS_VERSION_MAIN  (0x04)                                   /*!< [31:16] CMSIS HAL main version */
-#define __SC000_CMSIS_VERSION_SUB   (0x00)                                   /*!< [15:0]  CMSIS HAL sub version  */
-#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN << 16) | \
-                                      __SC000_CMSIS_VERSION_SUB          )   /*!< CMSIS HAL version number       */
-
-#define __CORTEX_SC                 (000)                                       /*!< Cortex secure core             */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
-  #define __STATIC_INLINE  static inline
+#include "cmsis_version.h"
 
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
-  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
-  #define __STATIC_INLINE  static inline
+/*  CMSIS SC000 definitions */
+#define __SC000_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __SC000_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                 /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN << 16U) | \
+                                      __SC000_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
 
-#endif
+#define __CORTEX_SC                 (000U)                                   /*!< Cortex secure core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     This core does not support an FPU at all
 */
-#define __FPU_USED       0
+#define __FPU_USED       0U
 
 #if defined ( __CC_ARM )
   #if defined __TARGET_FPU_VFP
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __GNUC__ )
   #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __ICCARM__ )
   #if defined __ARMVFP__
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __TMS470__ )
-  #if defined __TI__VFP_SUPPORT____
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __TASKING__ )
@@ -138,15 +105,15 @@
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __CSMC__ )		/* Cosmic */
-  #if ( __CSMC__ & 0x400)		// FPU present for parser
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
+
 #endif
 
-#include                       /* standard types definitions                      */
-#include                 /* Core Instruction Access                         */
-#include                  /* Core Function Access                            */
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
 
 #ifdef __cplusplus
 }
@@ -166,22 +133,22 @@
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
   #ifndef __SC000_REV
-    #define __SC000_REV             0x0000
+    #define __SC000_REV             0x0000U
     #warning "__SC000_REV not defined in device header file; using default!"
   #endif
 
   #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0
+    #define __MPU_PRESENT             0U
     #warning "__MPU_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2
+    #define __NVIC_PRIO_BITS          2U
     #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
   #endif
 
   #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0
+    #define __Vendor_SysTickConfig    0U
     #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
   #endif
 #endif
@@ -195,12 +162,17 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions                */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
 
 /*@} end of group SC000 */
 
@@ -215,443 +187,486 @@
   - Core SysTick Register
   - Core MPU Register
  ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
-    \brief Type definitions and defines for Cortex-M processor based devices.
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
 */
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_CORE  Status and Control Registers
-    \brief  Core Register type definitions.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
   @{
  */
 
-/** \brief  Union type to access the Application Program Status Register (APSR).
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved                           */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31                                             /*!< APSR: N Position */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
 #define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30                                             /*!< APSR: Z Position */
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
 #define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29                                             /*!< APSR: C Position */
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
 #define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28                                             /*!< APSR: V Position */
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
 #define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
 
 
-/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0                                             /*!< IPSR: ISR Position */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
 #define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved                           */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31                                             /*!< xPSR: N Position */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
 #define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30                                             /*!< xPSR: Z Position */
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
 #define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29                                             /*!< xPSR: C Position */
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
 #define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28                                             /*!< xPSR: V Position */
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
 #define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
 
-#define xPSR_T_Pos                         24                                             /*!< xPSR: T Position */
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
 #define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
 
-#define xPSR_ISR_Pos                        0                                             /*!< xPSR: ISR Position */
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
 #define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Control Registers (CONTROL).
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved                           */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1                                             /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
 #define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
 
 /*@} end of group CMSIS_CORE */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-    \brief      Type definitions for the NVIC Registers
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
   @{
  */
 
-/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
  */
 typedef struct
 {
-  __IO uint32_t ISER[1];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
-       uint32_t RESERVED0[31];
-  __IO uint32_t ICER[1];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register          */
-       uint32_t RSERVED1[31];
-  __IO uint32_t ISPR[1];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register           */
-       uint32_t RESERVED2[31];
-  __IO uint32_t ICPR[1];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register         */
-       uint32_t RESERVED3[31];
-       uint32_t RESERVED4[64];
-  __IO uint32_t IP[8];                   /*!< Offset: 0x300 (R/W)  Interrupt Priority Register              */
+  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[31U];
+  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[31U];
+  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[31U];
+  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[31U];
+        uint32_t RESERVED4[64U];
+  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
 }  NVIC_Type;
 
 /*@} end of group CMSIS_NVIC */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCB     System Control Block (SCB)
-    \brief      Type definitions for the System Control Block Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
   @{
  */
 
-/** \brief  Structure type to access the System Control Block (SCB).
+/**
+  \brief  Structure type to access the System Control Block (SCB).
  */
 typedef struct
 {
-  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
-  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
-  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
-  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
-  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
-  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
-       uint32_t RESERVED0[1];
-  __IO uint32_t SHP[2];                  /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED   */
-  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
-       uint32_t RESERVED1[154];
-  __IO uint32_t SFCR;                    /*!< Offset: 0x290 (R/W)  Security Features Control Register                    */
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+        uint32_t RESERVED1[154U];
+  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
 #define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
 #define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
 #define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
 
 /*@} end of group CMSIS_SCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-    \brief      Type definitions for the System Control and ID Register not in the SCB
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
   @{
  */
 
-/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
  */
 typedef struct
 {
-       uint32_t RESERVED0[2];
-  __IO uint32_t ACTLR;                   /*!< Offset: 0x008 (R/W)  Auxiliary Control Register      */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
 } SCnSCB_Type;
 
 /* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0                                          /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
 #define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
 
 /*@} end of group CMSIS_SCnotSCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-    \brief      Type definitions for the System Timer Registers.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
   @{
  */
 
-/** \brief  Structure type to access the System Timer (SysTick).
+/**
+  \brief  Structure type to access the System Timer (SysTick).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
-  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
-  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
 } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
 #define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
 
 /*@} end of group CMSIS_SysTick */
 
-#if (__MPU_PRESENT == 1)
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-    \brief      Type definitions for the Memory Protection Unit (MPU)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
   @{
  */
 
-/** \brief  Structure type to access the Memory Protection Unit (MPU).
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
  */
 typedef struct
 {
-  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
-  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
-  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
-  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
-  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
 } MPU_Type;
 
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
 #define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
 #define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
 #define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
 
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
 #define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
 #define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
 #define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
 
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
 #define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
 
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos                   8                                             /*!< MPU RBAR: ADDR Position */
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */
 #define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
 
-#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
 #define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
 
-#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
 #define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
 
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
 #define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
 
-#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
 #define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
 
-#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
 #define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
 
-#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
 #define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
 
-#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
 #define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
 
-#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
 #define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
 
-#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
 #define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
 
-#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
 #define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
 
-#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
 #define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
 
-#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
 #define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
 
 /*@} end of group CMSIS_MPU */
 #endif
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-    \brief      SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR)
-                are only accessible over DAP and not via processor. Therefore
-                they are not covered by the Cortex-M0 header file.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
+            Therefore they are not covered by the SC000 header file.
   @{
  */
 /*@} end of group CMSIS_CoreDebug */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_core_base     Core Definitions
-    \brief      Definitions for base addresses, unions, and structures.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
   @{
  */
 
-/* Memory mapping of SC000 Hardware */
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
 #define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address              */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                 */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
 #define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
 
 #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
 
-#if (__MPU_PRESENT == 1)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
 #endif
 
 /*@} */
@@ -665,179 +680,325 @@ typedef struct
   - Core SysTick Functions
   - Core Register Access Functions
  ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
 */
 
 
 
 /* ##########################   NVIC functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-    \brief      Functions that manage interrupts and exceptions via the NVIC.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
  */
 
-/* Interrupt Priorities are WORD accessible only under ARMv6M                   */
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+/*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for SC000 */
+/*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for SC000 */
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+/*#define NVIC_GetActive              __NVIC_GetActive             not available for SC000 */
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
 /* The following MACROS handle generation of the register offset and byte masks */
 #define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
 #define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
 #define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
 
 
-/** \brief  Enable External Interrupt
-
-    The function enables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
 }
 
 
-/** \brief  Disable External Interrupt
-
-    The function disables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Get Pending Interrupt
-
-    The function reads the pending register in the NVIC and returns the pending bit
-    for the specified interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not pending.
-    \return             1  Interrupt status is pending.
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->ISPR[0] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
 }
 
 
-/** \brief  Set Pending Interrupt
-
-    The function sets the pending bit of an external interrupt.
-
-    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISPR[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Clear Pending Interrupt
-
-    The function clears the pending bit of an external interrupt.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICPR[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Set Interrupt Priority
-
-    The function sets the priority of an interrupt.
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
 
-    \note The priority cannot be set for every core interrupt.
 
-    \param [in]      IRQn  Interrupt number.
-    \param [in]  priority  Priority to set.
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
  */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
 {
-  if((int32_t)(IRQn) < 0) {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else {
+  if ((int32_t)(IRQn) >= 0)
+  {
     NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
   }
 }
 
 
-/** \brief  Get Interrupt Priority
-
-    The function reads the priority of an interrupt. The interrupt
-    number can be positive to specify an external (device specific)
-    interrupt, or negative to specify an internal (core) interrupt.
-
-
-    \param [in]   IRQn  Interrupt number.
-    \return             Interrupt Priority. Value is aligned automatically to the implemented
-                        priority bits of the microcontroller.
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
  */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
 {
 
-  if((int32_t)(IRQn) < 0) {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8 - __NVIC_PRIO_BITS)));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
   }
-  else {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8 - __NVIC_PRIO_BITS)));
+  else
+  {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
   }
 }
 
 
-/** \brief  System Reset
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M0 and M0+ do not require the architectural barrier - assume SC000 is the same */
+}
+
 
-    The function initiates a system reset request to reset the MCU.
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
 {
-  __DSB();                                                     /* Ensure all outstanding memory accesses included
-                                                                  buffered write are completed before reset */
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
   SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
                  SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                     /* Ensure completion of memory access */
-  while(1) { __NOP(); }                                        /* wait until reset */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
 }
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
 
-
-/* ##################################    SysTick function  ############################################ */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-    \brief      Functions that configure the System.
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
   @{
  */
 
-#if (__Vendor_SysTickConfig == 0)
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
 
-/** \brief  System Tick Configuration
 
-    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
-    Counter is in free running mode to generate periodic interrupts.
+/*@} end of CMSIS_Core_FpuFunctions */
 
-    \param [in]  ticks  Number of ticks between two interrupts.
 
-    \return          0  Function succeeded.
-    \return          1  Function failed.
 
-    \note     When the variable __Vendor_SysTickConfig is set to 1, then the
-    function SysTick_Config is not included. In this case, the file device.h
-    must contain a vendor-specific implementation of this function.
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
 
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) {return (1UL);}      /* Reload value impossible */
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
diff --git a/Libraries/CMSIS/Include/core_sc300.h b/Libraries/CMSIS/Include/core_sc300.h
index d458d713..ad031f23 100644
--- a/Libraries/CMSIS/Include/core_sc300.h
+++ b/Libraries/CMSIS/Include/core_sc300.h
@@ -1,52 +1,44 @@
 /**************************************************************************//**
  * @file     core_sc300.h
  * @brief    CMSIS SC300 Core Peripheral Access Layer Header File
- * @version  V4.10
- * @date     18. March 2015
+ * @version  V5.0.8
+ * @date     31. May 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
  *
- * @note
+ * SPDX-License-Identifier: Apache-2.0
  *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2015 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#if defined ( __ICCARM__ )
- #pragma system_include  /* treat file as system include file for MISRA check */
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
 #endif
 
 #ifndef __CORE_SC300_H_GENERIC
 #define __CORE_SC300_H_GENERIC
 
+#include 
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
-/** \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
   CMSIS violates the following MISRA-C:2004 rules:
 
    \li Required Rule 8.5, object/function definition in header file.

@@ -63,74 +55,49 @@
 /*******************************************************************************
  *                 CMSIS definitions
  ******************************************************************************/
-/** \ingroup SC3000
+/**
+  \ingroup SC3000
   @{
  */
 
-/*  CMSIS SC300 definitions */
-#define __SC300_CMSIS_VERSION_MAIN  (0x04)                                   /*!< [31:16] CMSIS HAL main version */
-#define __SC300_CMSIS_VERSION_SUB   (0x00)                                   /*!< [15:0]  CMSIS HAL sub version  */
-#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN << 16) | \
-                                      __SC300_CMSIS_VERSION_SUB          )   /*!< CMSIS HAL version number       */
-
-#define __CORTEX_SC                 (300)                                     /*!< Cortex secure core             */
-
-
-#if   defined ( __CC_ARM )
-  #define __ASM            __asm                                      /*!< asm keyword for ARM Compiler          */
-  #define __INLINE         __inline                                   /*!< inline keyword for ARM Compiler       */
-  #define __STATIC_INLINE  static __inline
-
-#elif defined ( __GNUC__ )
-  #define __ASM            __asm                                      /*!< asm keyword for GNU Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for GNU Compiler       */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __ICCARM__ )
-  #define __ASM            __asm                                      /*!< asm keyword for IAR Compiler          */
-  #define __INLINE         inline                                     /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __TMS470__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TI CCS Compiler       */
-  #define __STATIC_INLINE  static inline
+#include "cmsis_version.h"
 
-#elif defined ( __TASKING__ )
-  #define __ASM            __asm                                      /*!< asm keyword for TASKING Compiler      */
-  #define __INLINE         inline                                     /*!< inline keyword for TASKING Compiler   */
-  #define __STATIC_INLINE  static inline
-
-#elif defined ( __CSMC__ )
-  #define __packed
-  #define __ASM            _asm                                      /*!< asm keyword for COSMIC Compiler      */
-  #define __INLINE         inline                                    /*use -pc99 on compile line !< inline keyword for COSMIC Compiler   */
-  #define __STATIC_INLINE  static inline
+/*  CMSIS SC300 definitions */
+#define __SC300_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __SC300_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                 /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN << 16U) | \
+                                      __SC300_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
 
-#endif
+#define __CORTEX_SC                 (300U)                                   /*!< Cortex secure core */
 
 /** __FPU_USED indicates whether an FPU is used or not.
     This core does not support an FPU at all
 */
-#define __FPU_USED       0
+#define __FPU_USED       0U
 
 #if defined ( __CC_ARM )
   #if defined __TARGET_FPU_VFP
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __GNUC__ )
   #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __ICCARM__ )
   #if defined __ARMVFP__
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __TMS470__ )
-  #if defined __TI__VFP_SUPPORT____
-    #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
 #elif defined ( __TASKING__ )
@@ -138,15 +105,15 @@
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
 
-#elif defined ( __CSMC__ )		/* Cosmic */
-  #if ( __CSMC__ & 0x400)		// FPU present for parser
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
     #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
   #endif
+
 #endif
 
-#include                       /* standard types definitions                      */
-#include                 /* Core Instruction Access                         */
-#include                  /* Core Function Access                            */
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
 
 #ifdef __cplusplus
 }
@@ -166,22 +133,22 @@
 /* check device defines and use defaults */
 #if defined __CHECK_DEVICE_DEFINES
   #ifndef __SC300_REV
-    #define __SC300_REV               0x0000
+    #define __SC300_REV               0x0000U
     #warning "__SC300_REV not defined in device header file; using default!"
   #endif
 
   #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0
+    #define __MPU_PRESENT             0U
     #warning "__MPU_PRESENT not defined in device header file; using default!"
   #endif
 
   #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          4
+    #define __NVIC_PRIO_BITS          3U
     #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
   #endif
 
   #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0
+    #define __Vendor_SysTickConfig    0U
     #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
   #endif
 #endif
@@ -195,12 +162,17 @@
     \li for automatic generation of peripheral register debug information.
 */
 #ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
 #else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions                 */
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
 #endif
-#define     __O     volatile             /*!< Defines 'write only' permissions                */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions              */
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
 
 /*@} end of group SC300 */
 
@@ -216,1083 +188,1194 @@
   - Core Debug Register
   - Core MPU Register
  ******************************************************************************/
-/** \defgroup CMSIS_core_register Defines and Type Definitions
-    \brief Type definitions and defines for Cortex-M processor based devices.
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
 */
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_CORE  Status and Control Registers
-    \brief  Core Register type definitions.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
   @{
  */
 
-/** \brief  Union type to access the Application Program Status Register (APSR).
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved                           */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } APSR_Type;
 
 /* APSR Register Definitions */
-#define APSR_N_Pos                         31                                             /*!< APSR: N Position */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
 #define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
 
-#define APSR_Z_Pos                         30                                             /*!< APSR: Z Position */
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
 #define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
 
-#define APSR_C_Pos                         29                                             /*!< APSR: C Position */
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
 #define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
 
-#define APSR_V_Pos                         28                                             /*!< APSR: V Position */
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
 #define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
 
-#define APSR_Q_Pos                         27                                             /*!< APSR: Q Position */
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
 #define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
 
 
-/** \brief  Union type to access the Interrupt Program Status Register (IPSR).
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } IPSR_Type;
 
 /* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0                                             /*!< IPSR: ISR Position */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
 #define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
  */
 typedef union
 {
   struct
   {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number                   */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved                           */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0)          */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0)          */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag          */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag       */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag          */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag           */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag       */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
+    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
+    uint32_t _reserved1:8;               /*!< bit: 16..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
+    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } xPSR_Type;
 
 /* xPSR Register Definitions */
-#define xPSR_N_Pos                         31                                             /*!< xPSR: N Position */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
 #define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
 
-#define xPSR_Z_Pos                         30                                             /*!< xPSR: Z Position */
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
 #define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
 
-#define xPSR_C_Pos                         29                                             /*!< xPSR: C Position */
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
 #define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
 
-#define xPSR_V_Pos                         28                                             /*!< xPSR: V Position */
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
 #define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
 
-#define xPSR_Q_Pos                         27                                             /*!< xPSR: Q Position */
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
 #define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
 
-#define xPSR_IT_Pos                        25                                             /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
 
-#define xPSR_T_Pos                         24                                             /*!< xPSR: T Position */
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
 #define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
 
-#define xPSR_ISR_Pos                        0                                             /*!< xPSR: ISR Position */
+#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
 #define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
 
 
-/** \brief  Union type to access the Control Registers (CONTROL).
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
  */
 typedef union
 {
   struct
   {
     uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used                   */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved                           */
-  } b;                                   /*!< Structure used for bit  access                  */
-  uint32_t w;                            /*!< Type      used for word access                  */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
 } CONTROL_Type;
 
 /* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1                                             /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
 #define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
 
-#define CONTROL_nPRIV_Pos                   0                                             /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
 #define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
 
 /*@} end of group CMSIS_CORE */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-    \brief      Type definitions for the NVIC Registers
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
   @{
  */
 
-/** \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
  */
 typedef struct
 {
-  __IO uint32_t ISER[8];                 /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register           */
-       uint32_t RESERVED0[24];
-  __IO uint32_t ICER[8];                 /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register         */
-       uint32_t RSERVED1[24];
-  __IO uint32_t ISPR[8];                 /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register          */
-       uint32_t RESERVED2[24];
-  __IO uint32_t ICPR[8];                 /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register        */
-       uint32_t RESERVED3[24];
-  __IO uint32_t IABR[8];                 /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register           */
-       uint32_t RESERVED4[56];
-  __IO uint8_t  IP[240];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-       uint32_t RESERVED5[644];
-  __O  uint32_t STIR;                    /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register     */
+  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[24U];
+  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[24U];
+  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[24U];
+  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[24U];
+  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[56U];
+  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED5[644U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
 }  NVIC_Type;
 
 /* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0                                          /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
 #define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
 
 /*@} end of group CMSIS_NVIC */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCB     System Control Block (SCB)
-    \brief      Type definitions for the System Control Block Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
   @{
  */
 
-/** \brief  Structure type to access the System Control Block (SCB).
+/**
+  \brief  Structure type to access the System Control Block (SCB).
  */
 typedef struct
 {
-  __I  uint32_t CPUID;                   /*!< Offset: 0x000 (R/ )  CPUID Base Register                                   */
-  __IO uint32_t ICSR;                    /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register                  */
-  __IO uint32_t VTOR;                    /*!< Offset: 0x008 (R/W)  Vector Table Offset Register                          */
-  __IO uint32_t AIRCR;                   /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register      */
-  __IO uint32_t SCR;                     /*!< Offset: 0x010 (R/W)  System Control Register                               */
-  __IO uint32_t CCR;                     /*!< Offset: 0x014 (R/W)  Configuration Control Register                        */
-  __IO uint8_t  SHP[12];                 /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IO uint32_t SHCSR;                   /*!< Offset: 0x024 (R/W)  System Handler Control and State Register             */
-  __IO uint32_t CFSR;                    /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register                    */
-  __IO uint32_t HFSR;                    /*!< Offset: 0x02C (R/W)  HardFault Status Register                             */
-  __IO uint32_t DFSR;                    /*!< Offset: 0x030 (R/W)  Debug Fault Status Register                           */
-  __IO uint32_t MMFAR;                   /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register                      */
-  __IO uint32_t BFAR;                    /*!< Offset: 0x038 (R/W)  BusFault Address Register                             */
-  __IO uint32_t AFSR;                    /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register                       */
-  __I  uint32_t PFR[2];                  /*!< Offset: 0x040 (R/ )  Processor Feature Register                            */
-  __I  uint32_t DFR;                     /*!< Offset: 0x048 (R/ )  Debug Feature Register                                */
-  __I  uint32_t ADR;                     /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register                            */
-  __I  uint32_t MMFR[4];                 /*!< Offset: 0x050 (R/ )  Memory Model Feature Register                         */
-  __I  uint32_t ISAR[5];                 /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register                   */
-       uint32_t RESERVED0[5];
-  __IO uint32_t CPACR;                   /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register                   */
-       uint32_t RESERVED1[129];
-  __IO uint32_t SFCR;                    /*!< Offset: 0x290 (R/W)  Security Features Control Register                    */
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[5U];
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+        uint32_t RESERVED1[129U];
+  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */
 } SCB_Type;
 
 /* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24                                             /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
 #define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
 
-#define SCB_CPUID_VARIANT_Pos              20                                             /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
 #define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
 
-#define SCB_CPUID_ARCHITECTURE_Pos         16                                             /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
 #define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
 
-#define SCB_CPUID_PARTNO_Pos                4                                             /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
 #define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
 
-#define SCB_CPUID_REVISION_Pos              0                                             /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
 #define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
 
 /* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31                                             /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
 #define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
 
-#define SCB_ICSR_PENDSVSET_Pos             28                                             /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
 #define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
 
-#define SCB_ICSR_PENDSVCLR_Pos             27                                             /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
 #define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
 
-#define SCB_ICSR_PENDSTSET_Pos             26                                             /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
 #define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
 
-#define SCB_ICSR_PENDSTCLR_Pos             25                                             /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
 #define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
 
-#define SCB_ICSR_ISRPREEMPT_Pos            23                                             /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
 #define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
 
-#define SCB_ICSR_ISRPENDING_Pos            22                                             /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
 #define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
 
-#define SCB_ICSR_VECTPENDING_Pos           12                                             /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
 #define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
 
-#define SCB_ICSR_RETTOBASE_Pos             11                                             /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
 #define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
 
-#define SCB_ICSR_VECTACTIVE_Pos             0                                             /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
 #define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
 
 /* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLBASE_Pos               29                                             /*!< SCB VTOR: TBLBASE Position */
+#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */
 #define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
 
-#define SCB_VTOR_TBLOFF_Pos                 7                                             /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
 #define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
 
 /* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16                                             /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
 #define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
 
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16                                             /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
 #define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
 
-#define SCB_AIRCR_ENDIANESS_Pos            15                                             /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
 #define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
 
-#define SCB_AIRCR_PRIGROUP_Pos              8                                             /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
 #define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
 
-#define SCB_AIRCR_SYSRESETREQ_Pos           2                                             /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
 #define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
 
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1                                             /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
 #define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
 
-#define SCB_AIRCR_VECTRESET_Pos             0                                             /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
 #define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
 
 /* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4                                             /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
 #define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
 
-#define SCB_SCR_SLEEPDEEP_Pos               2                                             /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
 #define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
 
-#define SCB_SCR_SLEEPONEXIT_Pos             1                                             /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
 #define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
 
 /* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9                                             /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
 #define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
 
-#define SCB_CCR_BFHFNMIGN_Pos               8                                             /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
 #define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
 
-#define SCB_CCR_DIV_0_TRP_Pos               4                                             /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
 #define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
 
-#define SCB_CCR_UNALIGN_TRP_Pos             3                                             /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
 #define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
 
-#define SCB_CCR_USERSETMPEND_Pos            1                                             /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
 #define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
 
-#define SCB_CCR_NONBASETHRDENA_Pos          0                                             /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
 #define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
 
 /* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18                                             /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
 #define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
 
-#define SCB_SHCSR_BUSFAULTENA_Pos          17                                             /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
 #define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
 
-#define SCB_SHCSR_MEMFAULTENA_Pos          16                                             /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
 #define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
 
-#define SCB_SHCSR_SVCALLPENDED_Pos         15                                             /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
 #define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
 
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14                                             /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
 #define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
 
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13                                             /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
 #define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
 
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12                                             /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
 #define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
 
-#define SCB_SHCSR_SYSTICKACT_Pos           11                                             /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
 #define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
 
-#define SCB_SHCSR_PENDSVACT_Pos            10                                             /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
 #define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
 
-#define SCB_SHCSR_MONITORACT_Pos            8                                             /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
 #define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
 
-#define SCB_SHCSR_SVCALLACT_Pos             7                                             /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
 #define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
 
-#define SCB_SHCSR_USGFAULTACT_Pos           3                                             /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
 #define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
 
-#define SCB_SHCSR_BUSFAULTACT_Pos           1                                             /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
 #define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
 
-#define SCB_SHCSR_MEMFAULTACT_Pos           0                                             /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
 #define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
 
-/* SCB Configurable Fault Status Registers Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16                                             /*!< SCB CFSR: Usage Fault Status Register Position */
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
 #define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
 
-#define SCB_CFSR_BUSFAULTSR_Pos             8                                             /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
 #define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
 
-#define SCB_CFSR_MEMFAULTSR_Pos             0                                             /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
 #define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
 
-/* SCB Hard Fault Status Registers Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31                                             /*!< SCB HFSR: DEBUGEVT Position */
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
 #define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
 
-#define SCB_HFSR_FORCED_Pos                30                                             /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
 #define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
 
-#define SCB_HFSR_VECTTBL_Pos                1                                             /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
 #define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
 
 /* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4                                             /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
 #define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
 
-#define SCB_DFSR_VCATCH_Pos                 3                                             /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
 #define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
 
-#define SCB_DFSR_DWTTRAP_Pos                2                                             /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
 #define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
 
-#define SCB_DFSR_BKPT_Pos                   1                                             /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
 #define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
 
-#define SCB_DFSR_HALTED_Pos                 0                                             /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
 #define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
 
 /*@} end of group CMSIS_SCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-    \brief      Type definitions for the System Control and ID Register not in the SCB
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
   @{
  */
 
-/** \brief  Structure type to access the System Control and ID Register not in the SCB.
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
  */
 typedef struct
 {
-       uint32_t RESERVED0[1];
-  __I  uint32_t ICTR;                    /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register      */
-       uint32_t RESERVED1[1];
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
 } SCnSCB_Type;
 
 /* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0                                          /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
 #define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
 
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+
 /*@} end of group CMSIS_SCnotSCB */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-    \brief      Type definitions for the System Timer Registers.
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
   @{
  */
 
-/** \brief  Structure type to access the System Timer (SysTick).
+/**
+  \brief  Structure type to access the System Timer (SysTick).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IO uint32_t LOAD;                    /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register       */
-  __IO uint32_t VAL;                     /*!< Offset: 0x008 (R/W)  SysTick Current Value Register      */
-  __I  uint32_t CALIB;                   /*!< Offset: 0x00C (R/ )  SysTick Calibration Register        */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
 } SysTick_Type;
 
 /* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16                                             /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
 #define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
 
-#define SysTick_CTRL_CLKSOURCE_Pos          2                                             /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
 #define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
 
-#define SysTick_CTRL_TICKINT_Pos            1                                             /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
 #define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
 
-#define SysTick_CTRL_ENABLE_Pos             0                                             /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
 #define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
 
 /* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0                                             /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
 #define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
 
 /* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0                                             /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
 #define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
 
 /* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31                                             /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
 #define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
 
-#define SysTick_CALIB_SKEW_Pos             30                                             /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
 #define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
 
-#define SysTick_CALIB_TENMS_Pos             0                                             /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
 #define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
 
 /*@} end of group CMSIS_SysTick */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-    \brief      Type definitions for the Instrumentation Trace Macrocell (ITM)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
   @{
  */
 
-/** \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
  */
 typedef struct
 {
-  __O  union
+  __OM  union
   {
-    __O  uint8_t    u8;                  /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit                   */
-    __O  uint16_t   u16;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit                  */
-    __O  uint32_t   u32;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit                  */
-  }  PORT [32];                          /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers               */
-       uint32_t RESERVED0[864];
-  __IO uint32_t TER;                     /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register                 */
-       uint32_t RESERVED1[15];
-  __IO uint32_t TPR;                     /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register              */
-       uint32_t RESERVED2[15];
-  __IO uint32_t TCR;                     /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register                */
-       uint32_t RESERVED3[29];
-  __O  uint32_t IWR;                     /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register            */
-  __I  uint32_t IRR;                     /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register             */
-  __IO uint32_t IMCR;                    /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register     */
-       uint32_t RESERVED4[43];
-  __O  uint32_t LAR;                     /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register                  */
-  __I  uint32_t LSR;                     /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register                  */
-       uint32_t RESERVED5[6];
-  __I  uint32_t PID4;                    /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __I  uint32_t PID5;                    /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __I  uint32_t PID6;                    /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __I  uint32_t PID7;                    /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __I  uint32_t PID0;                    /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __I  uint32_t PID1;                    /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __I  uint32_t PID2;                    /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __I  uint32_t PID3;                    /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __I  uint32_t CID0;                    /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __I  uint32_t CID1;                    /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __I  uint32_t CID2;                    /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __I  uint32_t CID3;                    /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[6U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
 } ITM_Type;
 
 /* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0                                             /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
 #define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
 
 /* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23                                             /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
 #define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
 
-#define ITM_TCR_TraceBusID_Pos             16                                             /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
 #define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
 
-#define ITM_TCR_GTSFREQ_Pos                10                                             /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
 #define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
 
-#define ITM_TCR_TSPrescale_Pos              8                                             /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
 #define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
 
-#define ITM_TCR_SWOENA_Pos                  4                                             /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
 #define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
 
-#define ITM_TCR_DWTENA_Pos                  3                                             /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
 #define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
 
-#define ITM_TCR_SYNCENA_Pos                 2                                             /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
 #define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
 
-#define ITM_TCR_TSENA_Pos                   1                                             /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
 #define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
 
-#define ITM_TCR_ITMENA_Pos                  0                                             /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
 #define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
 
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0                                             /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0                                             /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0                                             /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
 /* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2                                             /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
 #define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
 
-#define ITM_LSR_Access_Pos                  1                                             /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
 #define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
 
-#define ITM_LSR_Present_Pos                 0                                             /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
 #define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
 
 /*@}*/ /* end of group CMSIS_ITM */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-    \brief      Type definitions for the Data Watchpoint and Trace (DWT)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
   @{
  */
 
-/** \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
  */
 typedef struct
 {
-  __IO uint32_t CTRL;                    /*!< Offset: 0x000 (R/W)  Control Register                          */
-  __IO uint32_t CYCCNT;                  /*!< Offset: 0x004 (R/W)  Cycle Count Register                      */
-  __IO uint32_t CPICNT;                  /*!< Offset: 0x008 (R/W)  CPI Count Register                        */
-  __IO uint32_t EXCCNT;                  /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register         */
-  __IO uint32_t SLEEPCNT;                /*!< Offset: 0x010 (R/W)  Sleep Count Register                      */
-  __IO uint32_t LSUCNT;                  /*!< Offset: 0x014 (R/W)  LSU Count Register                        */
-  __IO uint32_t FOLDCNT;                 /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register         */
-  __I  uint32_t PCSR;                    /*!< Offset: 0x01C (R/ )  Program Counter Sample Register           */
-  __IO uint32_t COMP0;                   /*!< Offset: 0x020 (R/W)  Comparator Register 0                     */
-  __IO uint32_t MASK0;                   /*!< Offset: 0x024 (R/W)  Mask Register 0                           */
-  __IO uint32_t FUNCTION0;               /*!< Offset: 0x028 (R/W)  Function Register 0                       */
-       uint32_t RESERVED0[1];
-  __IO uint32_t COMP1;                   /*!< Offset: 0x030 (R/W)  Comparator Register 1                     */
-  __IO uint32_t MASK1;                   /*!< Offset: 0x034 (R/W)  Mask Register 1                           */
-  __IO uint32_t FUNCTION1;               /*!< Offset: 0x038 (R/W)  Function Register 1                       */
-       uint32_t RESERVED1[1];
-  __IO uint32_t COMP2;                   /*!< Offset: 0x040 (R/W)  Comparator Register 2                     */
-  __IO uint32_t MASK2;                   /*!< Offset: 0x044 (R/W)  Mask Register 2                           */
-  __IO uint32_t FUNCTION2;               /*!< Offset: 0x048 (R/W)  Function Register 2                       */
-       uint32_t RESERVED2[1];
-  __IO uint32_t COMP3;                   /*!< Offset: 0x050 (R/W)  Comparator Register 3                     */
-  __IO uint32_t MASK3;                   /*!< Offset: 0x054 (R/W)  Mask Register 3                           */
-  __IO uint32_t FUNCTION3;               /*!< Offset: 0x058 (R/W)  Function Register 3                       */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
 } DWT_Type;
 
 /* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28                                          /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
 #define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
 
-#define DWT_CTRL_NOTRCPKT_Pos              27                                          /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
 #define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
 
-#define DWT_CTRL_NOEXTTRIG_Pos             26                                          /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
 #define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
 
-#define DWT_CTRL_NOCYCCNT_Pos              25                                          /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
 #define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
 
-#define DWT_CTRL_NOPRFCNT_Pos              24                                          /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
 #define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
 
-#define DWT_CTRL_CYCEVTENA_Pos             22                                          /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
 #define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
 
-#define DWT_CTRL_FOLDEVTENA_Pos            21                                          /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
 #define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
 
-#define DWT_CTRL_LSUEVTENA_Pos             20                                          /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
 #define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
 
-#define DWT_CTRL_SLEEPEVTENA_Pos           19                                          /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
 #define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
 
-#define DWT_CTRL_EXCEVTENA_Pos             18                                          /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
 #define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
 
-#define DWT_CTRL_CPIEVTENA_Pos             17                                          /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
 #define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
 
-#define DWT_CTRL_EXCTRCENA_Pos             16                                          /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
 #define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
 
-#define DWT_CTRL_PCSAMPLENA_Pos            12                                          /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
 #define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
 
-#define DWT_CTRL_SYNCTAP_Pos               10                                          /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
 #define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
 
-#define DWT_CTRL_CYCTAP_Pos                 9                                          /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
 #define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
 
-#define DWT_CTRL_POSTINIT_Pos               5                                          /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
 #define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
 
-#define DWT_CTRL_POSTPRESET_Pos             1                                          /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
 #define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
 
-#define DWT_CTRL_CYCCNTENA_Pos              0                                          /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
 #define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
 
 /* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0                                          /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
 #define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
 
 /* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0                                          /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
 #define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
 
 /* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0                                          /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
 #define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
 
 /* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0                                          /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
 #define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
 
 /* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0                                          /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
 #define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
 
 /* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0                                          /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
 #define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
 
 /* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24                                          /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
 #define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
 
-#define DWT_FUNCTION_DATAVADDR1_Pos        16                                          /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
 #define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
 
-#define DWT_FUNCTION_DATAVADDR0_Pos        12                                          /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
 #define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
 
-#define DWT_FUNCTION_DATAVSIZE_Pos         10                                          /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
 #define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
 
-#define DWT_FUNCTION_LNK1ENA_Pos            9                                          /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
 #define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
 
-#define DWT_FUNCTION_DATAVMATCH_Pos         8                                          /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
 #define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
 
-#define DWT_FUNCTION_CYCMATCH_Pos           7                                          /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
 #define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
 
-#define DWT_FUNCTION_EMITRANGE_Pos          5                                          /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
 #define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
 
-#define DWT_FUNCTION_FUNCTION_Pos           0                                          /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
 #define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
 
 /*@}*/ /* end of group CMSIS_DWT */
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-    \brief      Type definitions for the Trace Port Interface (TPI)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
   @{
  */
 
-/** \brief  Structure type to access the Trace Port Interface Register (TPI).
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
  */
 typedef struct
 {
-  __IO uint32_t SSPSR;                   /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register     */
-  __IO uint32_t CSPSR;                   /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-       uint32_t RESERVED0[2];
-  __IO uint32_t ACPR;                    /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-       uint32_t RESERVED1[55];
-  __IO uint32_t SPPR;                    /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-       uint32_t RESERVED2[131];
-  __I  uint32_t FFSR;                    /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IO uint32_t FFCR;                    /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __I  uint32_t FSCR;                    /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-       uint32_t RESERVED3[759];
-  __I  uint32_t TRIGGER;                 /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __I  uint32_t FIFO0;                   /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __I  uint32_t ITATBCTR2;               /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-       uint32_t RESERVED4[1];
-  __I  uint32_t ITATBCTR0;               /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __I  uint32_t FIFO1;                   /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IO uint32_t ITCTRL;                  /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-       uint32_t RESERVED5[39];
-  __IO uint32_t CLAIMSET;                /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IO uint32_t CLAIMCLR;                /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-       uint32_t RESERVED7[8];
-  __I  uint32_t DEVID;                   /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __I  uint32_t DEVTYPE;                 /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
 } TPI_Type;
 
 /* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0                                          /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
 #define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
 
 /* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0                                          /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
 #define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
 
 /* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3                                          /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
 #define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
 
-#define TPI_FFSR_TCPresent_Pos              2                                          /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
 #define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
 
-#define TPI_FFSR_FtStopped_Pos              1                                          /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
 #define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
 
-#define TPI_FFSR_FlInProg_Pos               0                                          /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
 #define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
 
 /* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8                                          /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
 #define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
 
-#define TPI_FFCR_EnFCont_Pos                1                                          /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
 #define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
 
 /* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0                                          /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
 #define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
 
 /* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
 
-#define TPI_FIFO0_ITM_bytecount_Pos        27                                          /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
 #define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
 
-#define TPI_FIFO0_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
 
-#define TPI_FIFO0_ETM_bytecount_Pos        24                                          /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
 #define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
 
-#define TPI_FIFO0_ETM2_Pos                 16                                          /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
 #define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
 
-#define TPI_FIFO0_ETM1_Pos                  8                                          /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
 #define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
 
-#define TPI_FIFO0_ETM0_Pos                  0                                          /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
 #define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
 
 /* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0                                          /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
+#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
 
 /* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29                                          /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
 
-#define TPI_FIFO1_ITM_bytecount_Pos        27                                          /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
 #define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
 
-#define TPI_FIFO1_ETM_ATVALID_Pos          26                                          /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
 
-#define TPI_FIFO1_ETM_bytecount_Pos        24                                          /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
 #define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
 
-#define TPI_FIFO1_ITM2_Pos                 16                                          /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
 #define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
 
-#define TPI_FIFO1_ITM1_Pos                  8                                          /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
 #define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
 
-#define TPI_FIFO1_ITM0_Pos                  0                                          /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
 #define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
 
 /* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0                                          /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
+#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
 
 /* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0                                          /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
 
 /* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11                                          /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
 #define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
 
-#define TPI_DEVID_MANCVALID_Pos            10                                          /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
 #define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
 
-#define TPI_DEVID_PTINVALID_Pos             9                                          /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
 #define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
 
-#define TPI_DEVID_MinBufSz_Pos              6                                          /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
 #define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
 
-#define TPI_DEVID_AsynClkIn_Pos             5                                          /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
 #define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
 
-#define TPI_DEVID_NrTraceInput_Pos          0                                          /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
 #define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
 
 /* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4                                          /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0                                          /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
 #define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
 
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
 /*@}*/ /* end of group CMSIS_TPI */
 
 
-#if (__MPU_PRESENT == 1)
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-    \brief      Type definitions for the Memory Protection Unit (MPU)
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
   @{
  */
 
-/** \brief  Structure type to access the Memory Protection Unit (MPU).
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
  */
 typedef struct
 {
-  __I  uint32_t TYPE;                    /*!< Offset: 0x000 (R/ )  MPU Type Register                              */
-  __IO uint32_t CTRL;                    /*!< Offset: 0x004 (R/W)  MPU Control Register                           */
-  __IO uint32_t RNR;                     /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register                     */
-  __IO uint32_t RBAR;                    /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register               */
-  __IO uint32_t RASR;                    /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register         */
-  __IO uint32_t RBAR_A1;                 /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register       */
-  __IO uint32_t RASR_A1;                 /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IO uint32_t RBAR_A2;                 /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register       */
-  __IO uint32_t RASR_A2;                 /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IO uint32_t RBAR_A3;                 /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register       */
-  __IO uint32_t RASR_A3;                 /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
 } MPU_Type;
 
-/* MPU Type Register */
-#define MPU_TYPE_IREGION_Pos               16                                             /*!< MPU TYPE: IREGION Position */
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
 #define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
 
-#define MPU_TYPE_DREGION_Pos                8                                             /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
 #define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
 
-#define MPU_TYPE_SEPARATE_Pos               0                                             /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
 #define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
 
-/* MPU Control Register */
-#define MPU_CTRL_PRIVDEFENA_Pos             2                                             /*!< MPU CTRL: PRIVDEFENA Position */
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
 #define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
 
-#define MPU_CTRL_HFNMIENA_Pos               1                                             /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
 #define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
 
-#define MPU_CTRL_ENABLE_Pos                 0                                             /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
 #define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
 
-/* MPU Region Number Register */
-#define MPU_RNR_REGION_Pos                  0                                             /*!< MPU RNR: REGION Position */
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
 #define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
 
-/* MPU Region Base Address Register */
-#define MPU_RBAR_ADDR_Pos                   5                                             /*!< MPU RBAR: ADDR Position */
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
 #define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
 
-#define MPU_RBAR_VALID_Pos                  4                                             /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
 #define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
 
-#define MPU_RBAR_REGION_Pos                 0                                             /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
 #define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
 
-/* MPU Region Attribute and Size Register */
-#define MPU_RASR_ATTRS_Pos                 16                                             /*!< MPU RASR: MPU Region Attribute field Position */
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
 #define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
 
-#define MPU_RASR_XN_Pos                    28                                             /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
 #define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
 
-#define MPU_RASR_AP_Pos                    24                                             /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
 #define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
 
-#define MPU_RASR_TEX_Pos                   19                                             /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
 #define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
 
-#define MPU_RASR_S_Pos                     18                                             /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
 #define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
 
-#define MPU_RASR_C_Pos                     17                                             /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
 #define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
 
-#define MPU_RASR_B_Pos                     16                                             /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
 #define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
 
-#define MPU_RASR_SRD_Pos                    8                                             /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
 #define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
 
-#define MPU_RASR_SIZE_Pos                   1                                             /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
 #define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
 
-#define MPU_RASR_ENABLE_Pos                 0                                             /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
 #define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
 
 /*@} end of group CMSIS_MPU */
 #endif
 
 
-/** \ingroup  CMSIS_core_register
-    \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-    \brief      Type definitions for the Core Debug Registers
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
   @{
  */
 
-/** \brief  Structure type to access the Core Debug Register (CoreDebug).
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
  */
 typedef struct
 {
-  __IO uint32_t DHCSR;                   /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register    */
-  __O  uint32_t DCRSR;                   /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register        */
-  __IO uint32_t DCRDR;                   /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register            */
-  __IO uint32_t DEMCR;                   /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
 } CoreDebug_Type;
 
-/* Debug Halting Control and Status Register */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16                                             /*!< CoreDebug DHCSR: DBGKEY Position */
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
 #define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
 
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25                                             /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
 #define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
 
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24                                             /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
 #define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
 
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19                                             /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
 #define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
 
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18                                             /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
 #define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
 
-#define CoreDebug_DHCSR_S_HALT_Pos         17                                             /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
 #define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
 
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16                                             /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
 #define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
 
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5                                             /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
 #define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
 
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3                                             /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
 #define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
 
-#define CoreDebug_DHCSR_C_STEP_Pos          2                                             /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
 #define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
 
-#define CoreDebug_DHCSR_C_HALT_Pos          1                                             /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
 #define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
 
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0                                             /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
 #define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
 
-/* Debug Core Register Selector Register */
-#define CoreDebug_DCRSR_REGWnR_Pos         16                                             /*!< CoreDebug DCRSR: REGWnR Position */
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
 #define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
 
-#define CoreDebug_DCRSR_REGSEL_Pos          0                                             /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
 #define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
 
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_TRCENA_Pos         24                                             /*!< CoreDebug DEMCR: TRCENA Position */
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
 #define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
 
-#define CoreDebug_DEMCR_MON_REQ_Pos        19                                             /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
 #define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
 
-#define CoreDebug_DEMCR_MON_STEP_Pos       18                                             /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
 #define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
 
-#define CoreDebug_DEMCR_MON_PEND_Pos       17                                             /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
 #define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
 
-#define CoreDebug_DEMCR_MON_EN_Pos         16                                             /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
 #define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
 
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10                                             /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
 #define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
 
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9                                             /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
 #define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
 
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8                                             /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
 #define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
 
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7                                             /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
 #define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
 
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6                                             /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
 #define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
 
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5                                             /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
 #define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
 
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4                                             /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
 #define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
 
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0                                             /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
 #define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
 
 /*@} end of group CMSIS_CoreDebug */
 
 
-/** \ingroup    CMSIS_core_register
-    \defgroup   CMSIS_core_base     Core Definitions
-    \brief      Definitions for base addresses, unions, and structures.
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
   @{
  */
 
-/* Memory mapping of Cortex-M3 Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address  */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address                   */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address                   */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address                   */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address            */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address               */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address                  */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address  */
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
 
 #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct           */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct       */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct          */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct           */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct           */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct           */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct    */
-
-#if (__MPU_PRESENT == 1)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit             */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit             */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
 #endif
 
 /*@} */
@@ -1307,187 +1390,275 @@ typedef struct
   - Core Debug Functions
   - Core Register Access Functions
  ******************************************************************************/
-/** \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
 */
 
 
 
 /* ##########################   NVIC functions  #################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-    \brief      Functions that manage interrupts and exceptions via the NVIC.
-    @{
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
  */
 
-/** \brief  Set Priority Grouping
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
 
-  The function sets the priority grouping field using the required unlock sequence.
-  The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-  Only values from 0..7 are used.
-  In case of a conflict between priority grouping and available
-  priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
 
-    \param [in]      PriorityGroup  Priority grouping field.
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
  */
-__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
 {
   uint32_t reg_value;
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
 
   reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
   reg_value  =  (reg_value                                   |
                 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8)                       );              /* Insert write key and priorty group */
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
   SCB->AIRCR =  reg_value;
 }
 
 
-/** \brief  Get Priority Grouping
-
-  The function reads the priority grouping field from the NVIC Interrupt Controller.
-
-    \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
  */
-__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
 {
   return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
 }
 
 
-/** \brief  Enable External Interrupt
-
-    The function enables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
 }
 
 
-/** \brief  Disable External Interrupt
-
-    The function disables a device-specific interrupt in the NVIC interrupt controller.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Get Pending Interrupt
-
-    The function reads the pending register in the NVIC and returns the pending bit
-    for the specified interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not pending.
-    \return             1  Interrupt status is pending.
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
 }
 
 
-/** \brief  Set Pending Interrupt
-
-    The function sets the pending bit of an external interrupt.
-
-    \param [in]      IRQn  Interrupt number. Value cannot be negative.
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
 }
 
 
-/** \brief  Clear Pending Interrupt
-
-    The function clears the pending bit of an external interrupt.
-
-    \param [in]      IRQn  External interrupt number. Value cannot be negative.
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
 {
-  NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Get Active Interrupt
-
-    The function reads the active register in NVIC and returns the active bit.
-
-    \param [in]      IRQn  Interrupt number.
-
-    \return             0  Interrupt status is not active.
-    \return             1  Interrupt status is active.
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
 {
-  return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
 }
 
 
-/** \brief  Set Interrupt Priority
-
-    The function sets the priority of an interrupt.
-
-    \note The priority cannot be set for every core interrupt.
-
-    \param [in]      IRQn  Interrupt number.
-    \param [in]  priority  Priority to set.
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
  */
-__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
 {
-  if((int32_t)IRQn < 0) {
-    SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
   }
-  else {
-    NVIC->IP[((uint32_t)(int32_t)IRQn)]               = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  else
+  {
+    return(0U);
   }
 }
 
 
-/** \brief  Get Interrupt Priority
-
-    The function reads the priority of an interrupt. The interrupt
-    number can be positive to specify an external (device specific)
-    interrupt, or negative to specify an internal (core) interrupt.
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
 
 
-    \param [in]   IRQn  Interrupt number.
-    \return             Interrupt Priority. Value is aligned automatically to the implemented
-                        priority bits of the microcontroller.
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
  */
-__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
 {
 
-  if((int32_t)IRQn < 0) {
-    return(((uint32_t)SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] >> (8 - __NVIC_PRIO_BITS)));
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
   }
-  else {
-    return(((uint32_t)NVIC->IP[((uint32_t)(int32_t)IRQn)]               >> (8 - __NVIC_PRIO_BITS)));
+  else
+  {
+    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
   }
 }
 
 
-/** \brief  Encode Priority
-
-    The function encodes the priority for an interrupt with the given priority group,
-    preemptive priority value, and subpriority value.
-    In case of a conflict between priority grouping and available
-    priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-
-    \param [in]     PriorityGroup  Used priority group.
-    \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-    \param [in]       SubPriority  Subpriority value (starting from 0).
-    \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
  */
 __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
 {
@@ -1505,19 +1676,18 @@ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t P
 }
 
 
-/** \brief  Decode Priority
-
-    The function decodes an interrupt priority value with a given priority group to
-    preemptive priority value and subpriority value.
-    In case of a conflict between priority grouping and available
-    priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-
-    \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-    \param [in]     PriorityGroup  Used priority group.
-    \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-    \param [out]     pSubPriority  Subpriority value (starting from 0).
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
  */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority)
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
 {
   uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
   uint32_t PreemptPriorityBits;
@@ -1531,11 +1701,43 @@ __STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGr
 }
 
 
-/** \brief  System Reset
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
+  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t vectors = (uint32_t )SCB->VTOR;
+  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
+}
 
-    The function initiates a system reset request to reset the MCU.
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
  */
-__STATIC_INLINE void NVIC_SystemReset(void)
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
 {
   __DSB();                                                          /* Ensure all outstanding memory accesses included
                                                                        buffered write are completed before reset */
@@ -1543,40 +1745,69 @@ __STATIC_INLINE void NVIC_SystemReset(void)
                            (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
                             SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
   __DSB();                                                          /* Ensure completion of memory access */
-  while(1) { __NOP(); }                                             /* wait until reset */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
 }
 
 /*@} end of CMSIS_Core_NVICFunctions */
 
 
-
-/* ##################################    SysTick function  ############################################ */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-    \brief      Functions that configure the System.
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
   @{
  */
 
-#if (__Vendor_SysTickConfig == 0)
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
 
-/** \brief  System Tick Configuration
 
-    The function initializes the System Timer and its interrupt, and starts the System Tick Timer.
-    Counter is in free running mode to generate periodic interrupts.
+/*@} end of CMSIS_Core_FpuFunctions */
 
-    \param [in]  ticks  Number of ticks between two interrupts.
 
-    \return          0  Function succeeded.
-    \return          1  Function failed.
 
-    \note     When the variable __Vendor_SysTickConfig is set to 1, then the
-    function SysTick_Config is not included. In this case, the file device.h
-    must contain a vendor-specific implementation of this function.
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
 
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable __Vendor_SysTickConfig is set to 1, then the
+           function SysTick_Config is not included. In this case, the file device.h
+           must contain a vendor-specific implementation of this function.
  */
 __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 {
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk) { return (1UL); }    /* Reload value impossible */
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
 
   SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
   NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
@@ -1594,49 +1825,52 @@ __STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
 
 
 /* ##################################### Debug In/Output function ########################################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_core_DebugFunctions ITM Functions
-    \brief   Functions that access the ITM debug interface.
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
   @{
  */
 
-extern volatile int32_t ITM_RxBuffer;                    /*!< External variable to receive characters.                         */
-#define                 ITM_RXBUFFER_EMPTY    0x5AA55AA5 /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/** \brief  ITM Send Character
-
-    The function transmits a character via the ITM channel 0, and
-    \li Just returns when no debugger is connected that has booked the output.
-    \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
 
-    \param [in]     ch  Character to transmit.
 
-    \returns            Character to transmit.
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
  */
 __STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
 {
   if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
       ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
   {
-    while (ITM->PORT[0].u32 == 0UL) { __NOP(); }
-    ITM->PORT[0].u8 = (uint8_t)ch;
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
   }
   return (ch);
 }
 
 
-/** \brief  ITM Receive Character
-
-    The function inputs a character via the external variable \ref ITM_RxBuffer.
-
-    \return             Received character.
-    \return         -1  No character pending.
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
  */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void) {
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
   int32_t ch = -1;                           /* no character available */
 
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY) {
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
     ch = ITM_RxBuffer;
     ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
   }
@@ -1645,19 +1879,22 @@ __STATIC_INLINE int32_t ITM_ReceiveChar (void) {
 }
 
 
-/** \brief  ITM Check Character
-
-    The function checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-
-    \return          0  No character available.
-    \return          1  Character available.
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
  */
-__STATIC_INLINE int32_t ITM_CheckChar (void) {
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
 
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY) {
-    return (0);                                 /* no character available */
-  } else {
-    return (1);                                 /*    character available */
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
   }
 }
 
diff --git a/Libraries/CMSIS/Include/mpu_armv7.h b/Libraries/CMSIS/Include/mpu_armv7.h
new file mode 100644
index 00000000..337eb655
--- /dev/null
+++ b/Libraries/CMSIS/Include/mpu_armv7.h
@@ -0,0 +1,272 @@
+/******************************************************************************
+ * @file     mpu_armv7.h
+ * @brief    CMSIS MPU API for Armv7-M MPU
+ * @version  V5.1.0
+ * @date     08. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+ 
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header    /* treat file as system include file */
+#endif
+ 
+#ifndef ARM_MPU_ARMV7_H
+#define ARM_MPU_ARMV7_H
+
+#define ARM_MPU_REGION_SIZE_32B      ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
+#define ARM_MPU_REGION_SIZE_64B      ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
+#define ARM_MPU_REGION_SIZE_128B     ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
+#define ARM_MPU_REGION_SIZE_256B     ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
+#define ARM_MPU_REGION_SIZE_512B     ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
+#define ARM_MPU_REGION_SIZE_1KB      ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
+#define ARM_MPU_REGION_SIZE_2KB      ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
+#define ARM_MPU_REGION_SIZE_4KB      ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
+#define ARM_MPU_REGION_SIZE_8KB      ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
+#define ARM_MPU_REGION_SIZE_16KB     ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
+#define ARM_MPU_REGION_SIZE_32KB     ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
+#define ARM_MPU_REGION_SIZE_64KB     ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
+#define ARM_MPU_REGION_SIZE_128KB    ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
+#define ARM_MPU_REGION_SIZE_256KB    ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
+#define ARM_MPU_REGION_SIZE_512KB    ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
+#define ARM_MPU_REGION_SIZE_1MB      ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
+#define ARM_MPU_REGION_SIZE_2MB      ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
+#define ARM_MPU_REGION_SIZE_4MB      ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
+#define ARM_MPU_REGION_SIZE_8MB      ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
+#define ARM_MPU_REGION_SIZE_16MB     ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
+#define ARM_MPU_REGION_SIZE_32MB     ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
+#define ARM_MPU_REGION_SIZE_64MB     ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
+#define ARM_MPU_REGION_SIZE_128MB    ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
+#define ARM_MPU_REGION_SIZE_256MB    ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
+#define ARM_MPU_REGION_SIZE_512MB    ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
+#define ARM_MPU_REGION_SIZE_1GB      ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
+#define ARM_MPU_REGION_SIZE_2GB      ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
+#define ARM_MPU_REGION_SIZE_4GB      ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
+
+#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
+#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
+#define ARM_MPU_AP_URO  2U ///!< MPU Access Permission unprivileged access read-only
+#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
+#define ARM_MPU_AP_PRO  5U ///!< MPU Access Permission privileged access read-only
+#define ARM_MPU_AP_RO   6U ///!< MPU Access Permission read-only access
+
+/** MPU Region Base Address Register Value
+*
+* \param Region The region to be configured, number 0 to 15.
+* \param BaseAddress The base address for the region.
+*/
+#define ARM_MPU_RBAR(Region, BaseAddress) \
+  (((BaseAddress) & MPU_RBAR_ADDR_Msk) |  \
+   ((Region) & MPU_RBAR_REGION_Msk)    |  \
+   (MPU_RBAR_VALID_Msk))
+
+/**
+* MPU Memory Access Attributes
+* 
+* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
+* \param IsShareable       Region is shareable between multiple bus masters.
+* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
+* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
+*/  
+#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable)   \
+  ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                  | \
+   (((IsShareable)  << MPU_RASR_S_Pos)   & MPU_RASR_S_Msk)                    | \
+   (((IsCacheable)  << MPU_RASR_C_Pos)   & MPU_RASR_C_Msk)                    | \
+   (((IsBufferable) << MPU_RASR_B_Pos)   & MPU_RASR_B_Msk))
+
+/**
+* MPU Region Attribute and Size Register Value
+* 
+* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
+* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
+* \param AccessAttributes  Memory access attribution, see \ref ARM_MPU_ACCESS_.
+* \param SubRegionDisable  Sub-region disable field.
+* \param Size              Region size of the region to be configured, for example 4K, 8K.
+*/
+#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)    \
+  ((((DisableExec)      << MPU_RASR_XN_Pos)   & MPU_RASR_XN_Msk)                                  | \
+   (((AccessPermission) << MPU_RASR_AP_Pos)   & MPU_RASR_AP_Msk)                                  | \
+   (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
+   (((SubRegionDisable) << MPU_RASR_SRD_Pos)  & MPU_RASR_SRD_Msk)                                 | \
+   (((Size)             << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk)                                | \
+   (((MPU_RASR_ENABLE_Msk))))
+
+/**
+* MPU Region Attribute and Size Register Value
+* 
+* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
+* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
+* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
+* \param IsShareable       Region is shareable between multiple bus masters.
+* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
+* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
+* \param SubRegionDisable  Sub-region disable field.
+* \param Size              Region size of the region to be configured, for example 4K, 8K.
+*/                         
+#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
+  ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
+
+/**
+* MPU Memory Access Attribute for strongly ordered memory.
+*  - TEX: 000b
+*  - Shareable
+*  - Non-cacheable
+*  - Non-bufferable
+*/ 
+#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
+
+/**
+* MPU Memory Access Attribute for device memory.
+*  - TEX: 000b (if shareable) or 010b (if non-shareable)
+*  - Shareable or non-shareable
+*  - Non-cacheable
+*  - Bufferable (if shareable) or non-bufferable (if non-shareable)
+*
+* \param IsShareable Configures the device memory as shareable or non-shareable.
+*/ 
+#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
+
+/**
+* MPU Memory Access Attribute for normal memory.
+*  - TEX: 1BBb (reflecting outer cacheability rules)
+*  - Shareable or non-shareable
+*  - Cacheable or non-cacheable (reflecting inner cacheability rules)
+*  - Bufferable or non-bufferable (reflecting inner cacheability rules)
+*
+* \param OuterCp Configures the outer cache policy.
+* \param InnerCp Configures the inner cache policy.
+* \param IsShareable Configures the memory as shareable or non-shareable.
+*/ 
+#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
+
+/**
+* MPU Memory Access Attribute non-cacheable policy.
+*/
+#define ARM_MPU_CACHEP_NOCACHE 0U
+
+/**
+* MPU Memory Access Attribute write-back, write and read allocate policy.
+*/
+#define ARM_MPU_CACHEP_WB_WRA 1U
+
+/**
+* MPU Memory Access Attribute write-through, no write allocate policy.
+*/
+#define ARM_MPU_CACHEP_WT_NWA 2U
+
+/**
+* MPU Memory Access Attribute write-back, no write allocate policy.
+*/
+#define ARM_MPU_CACHEP_WB_NWA 3U
+
+
+/**
+* Struct for a single MPU Region
+*/
+typedef struct {
+  uint32_t RBAR; //!< The region base address register value (RBAR)
+  uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
+} ARM_MPU_Region_t;
+    
+/** Enable the MPU.
+* \param MPU_Control Default access permissions for unconfigured regions.
+*/
+__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
+{
+  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  __DSB();
+  __ISB();
+}
+
+/** Disable the MPU.
+*/
+__STATIC_INLINE void ARM_MPU_Disable(void)
+{
+  __DMB();
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+}
+
+/** Clear and disable the given MPU region.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
+{
+  MPU->RNR = rnr;
+  MPU->RASR = 0U;
+}
+
+/** Configure an MPU region.
+* \param rbar Value for RBAR register.
+* \param rsar Value for RSAR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
+{
+  MPU->RBAR = rbar;
+  MPU->RASR = rasr;
+}
+
+/** Configure the given MPU region.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rsar Value for RSAR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
+{
+  MPU->RNR = rnr;
+  MPU->RBAR = rbar;
+  MPU->RASR = rasr;
+}
+
+/** Memcopy with strictly ordered memory access, e.g. for register targets.
+* \param dst Destination data is copied to.
+* \param src Source data is copied from.
+* \param len Amount of data words to be copied.
+*/
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+{
+  uint32_t i;
+  for (i = 0U; i < len; ++i) 
+  {
+    dst[i] = src[i];
+  }
+}
+
+/** Load the given number of MPU regions from a table.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) 
+{
+  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
+  while (cnt > MPU_TYPE_RALIASES) {
+    ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
+    table += MPU_TYPE_RALIASES;
+    cnt -= MPU_TYPE_RALIASES;
+  }
+  ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
+}
+
+#endif
diff --git a/Libraries/CMSIS/Include/mpu_armv8.h b/Libraries/CMSIS/Include/mpu_armv8.h
new file mode 100644
index 00000000..2fe28b68
--- /dev/null
+++ b/Libraries/CMSIS/Include/mpu_armv8.h
@@ -0,0 +1,346 @@
+/******************************************************************************
+ * @file     mpu_armv8.h
+ * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU
+ * @version  V5.1.0
+ * @date     08. March 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header    /* treat file as system include file */
+#endif
+
+#ifndef ARM_MPU_ARMV8_H
+#define ARM_MPU_ARMV8_H
+
+/** \brief Attribute for device memory (outer only) */
+#define ARM_MPU_ATTR_DEVICE                           ( 0U )
+
+/** \brief Attribute for non-cacheable, normal memory */
+#define ARM_MPU_ATTR_NON_CACHEABLE                    ( 4U )
+
+/** \brief Attribute for normal memory (outer and inner)
+* \param NT Non-Transient: Set to 1 for non-transient data.
+* \param WB Write-Back: Set to 1 to use write-back update policy.
+* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
+* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
+*/
+#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
+  (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
+
+/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
+#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
+
+/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
+#define ARM_MPU_ATTR_DEVICE_nGnRE  (1U)
+
+/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
+#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)
+
+/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
+#define ARM_MPU_ATTR_DEVICE_GRE    (3U)
+
+/** \brief Memory Attribute
+* \param O Outer memory attributes
+* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
+*/
+#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
+
+/** \brief Normal memory non-shareable  */
+#define ARM_MPU_SH_NON   (0U)
+
+/** \brief Normal memory outer shareable  */
+#define ARM_MPU_SH_OUTER (2U)
+
+/** \brief Normal memory inner shareable  */
+#define ARM_MPU_SH_INNER (3U)
+
+/** \brief Memory access permissions
+* \param RO Read-Only: Set to 1 for read-only memory.
+* \param NP Non-Privileged: Set to 1 for non-privileged memory.
+*/
+#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
+
+/** \brief Region Base Address Register value
+* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
+* \param SH Defines the Shareability domain for this memory region.
+* \param RO Read-Only: Set to 1 for a read-only memory region.
+* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
+* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
+*/
+#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
+  ((BASE & MPU_RBAR_BASE_Msk) | \
+  ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
+  ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
+  ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
+
+/** \brief Region Limit Address Register value
+* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
+* \param IDX The attribute index to be associated with this memory region.
+*/
+#define ARM_MPU_RLAR(LIMIT, IDX) \
+  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
+  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
+  (MPU_RLAR_EN_Msk))
+
+#if defined(MPU_RLAR_PXN_Pos)
+  
+/** \brief Region Limit Address Register with PXN value
+* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
+* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
+* \param IDX The attribute index to be associated with this memory region.
+*/
+#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
+  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
+  ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
+  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
+  (MPU_RLAR_EN_Msk))
+  
+#endif
+
+/**
+* Struct for a single MPU Region
+*/
+typedef struct {
+  uint32_t RBAR;                   /*!< Region Base Address Register value */
+  uint32_t RLAR;                   /*!< Region Limit Address Register value */
+} ARM_MPU_Region_t;
+    
+/** Enable the MPU.
+* \param MPU_Control Default access permissions for unconfigured regions.
+*/
+__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
+{
+  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  __DSB();
+  __ISB();
+}
+
+/** Disable the MPU.
+*/
+__STATIC_INLINE void ARM_MPU_Disable(void)
+{
+  __DMB();
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+}
+
+#ifdef MPU_NS
+/** Enable the Non-secure MPU.
+* \param MPU_Control Default access permissions for unconfigured regions.
+*/
+__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
+{
+  MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  __DSB();
+  __ISB();
+}
+
+/** Disable the Non-secure MPU.
+*/
+__STATIC_INLINE void ARM_MPU_Disable_NS(void)
+{
+  __DMB();
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  MPU_NS->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+}
+#endif
+
+/** Set the memory attribute encoding to the given MPU.
+* \param mpu Pointer to the MPU to be configured.
+* \param idx The attribute index to be set [0-7]
+* \param attr The attribute value to be set.
+*/
+__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
+{
+  const uint8_t reg = idx / 4U;
+  const uint32_t pos = ((idx % 4U) * 8U);
+  const uint32_t mask = 0xFFU << pos;
+  
+  if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
+    return; // invalid index
+  }
+  
+  mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
+}
+
+/** Set the memory attribute encoding.
+* \param idx The attribute index to be set [0-7]
+* \param attr The attribute value to be set.
+*/
+__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
+{
+  ARM_MPU_SetMemAttrEx(MPU, idx, attr);
+}
+
+#ifdef MPU_NS
+/** Set the memory attribute encoding to the Non-secure MPU.
+* \param idx The attribute index to be set [0-7]
+* \param attr The attribute value to be set.
+*/
+__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
+{
+  ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
+}
+#endif
+
+/** Clear and disable the given MPU region of the given MPU.
+* \param mpu Pointer to MPU to be used.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
+{
+  mpu->RNR = rnr;
+  mpu->RLAR = 0U;
+}
+
+/** Clear and disable the given MPU region.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
+{
+  ARM_MPU_ClrRegionEx(MPU, rnr);
+}
+
+#ifdef MPU_NS
+/** Clear and disable the given Non-secure MPU region.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
+{  
+  ARM_MPU_ClrRegionEx(MPU_NS, rnr);
+}
+#endif
+
+/** Configure the given MPU region of the given MPU.
+* \param mpu Pointer to MPU to be used.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rlar Value for RLAR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
+{
+  mpu->RNR = rnr;
+  mpu->RBAR = rbar;
+  mpu->RLAR = rlar;
+}
+
+/** Configure the given MPU region.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rlar Value for RLAR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
+{
+  ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
+}
+
+#ifdef MPU_NS
+/** Configure the given Non-secure MPU region.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rlar Value for RLAR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
+{
+  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  
+}
+#endif
+
+/** Memcopy with strictly ordered memory access, e.g. for register targets.
+* \param dst Destination data is copied to.
+* \param src Source data is copied from.
+* \param len Amount of data words to be copied.
+*/
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+{
+  uint32_t i;
+  for (i = 0U; i < len; ++i) 
+  {
+    dst[i] = src[i];
+  }
+}
+
+/** Load the given number of MPU regions from a table to the given MPU.
+* \param mpu Pointer to the MPU registers to be used.
+* \param rnr First region number to be configured.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+{
+  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
+  if (cnt == 1U) {
+    mpu->RNR = rnr;
+    ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
+  } else {
+    uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
+    uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
+    
+    mpu->RNR = rnrBase;
+    while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
+      uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
+      ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
+      table += c;
+      cnt -= c;
+      rnrOffset = 0U;
+      rnrBase += MPU_TYPE_RALIASES;
+      mpu->RNR = rnrBase;
+    }
+    
+    ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
+  }
+}
+
+/** Load the given number of MPU regions from a table.
+* \param rnr First region number to be configured.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+{
+  ARM_MPU_LoadEx(MPU, rnr, table, cnt);
+}
+
+#ifdef MPU_NS
+/** Load the given number of MPU regions from a table to the Non-secure MPU.
+* \param rnr First region number to be configured.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+{
+  ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
+}
+#endif
+
+#endif
+
diff --git a/Libraries/CMSIS/Include/tz_context.h b/Libraries/CMSIS/Include/tz_context.h
new file mode 100644
index 00000000..d4c1474f
--- /dev/null
+++ b/Libraries/CMSIS/Include/tz_context.h
@@ -0,0 +1,70 @@
+/******************************************************************************
+ * @file     tz_context.h
+ * @brief    Context Management for Armv8-M TrustZone
+ * @version  V1.0.1
+ * @date     10. January 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef TZ_CONTEXT_H
+#define TZ_CONTEXT_H
+ 
+#include 
+ 
+#ifndef TZ_MODULEID_T
+#define TZ_MODULEID_T
+/// \details Data type that identifies secure software modules called by a process.
+typedef uint32_t TZ_ModuleId_t;
+#endif
+ 
+/// \details TZ Memory ID identifies an allocated memory slot.
+typedef uint32_t TZ_MemoryId_t;
+  
+/// Initialize secure context memory system
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_InitContextSystem_S (void);
+ 
+/// Allocate context memory for calling secure software modules in TrustZone
+/// \param[in]  module   identifies software modules called from non-secure mode
+/// \return value != 0 id TrustZone memory slot identifier
+/// \return value 0    no memory available or internal error
+TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
+ 
+/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
+ 
+/// Load secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
+ 
+/// Store secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
+ 
+#endif  // TZ_CONTEXT_H
diff --git a/Libraries/CMSIS/LICENSE.txt b/Libraries/CMSIS/LICENSE.txt
new file mode 100644
index 00000000..c0ee8129
--- /dev/null
+++ b/Libraries/CMSIS/LICENSE.txt
@@ -0,0 +1,201 @@
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+   1. Definitions.
+
+      "License" shall mean the terms and conditions for use, reproduction,
+      and distribution as defined by Sections 1 through 9 of this document.
+
+      "Licensor" shall mean the copyright owner or entity authorized by
+      the copyright owner that is granting the License.
+
+      "Legal Entity" shall mean the union of the acting entity and all
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diff --git a/compile.mk b/compile.mk
index 9538437d..8e838fd7 100644
--- a/compile.mk
+++ b/compile.mk
@@ -17,7 +17,8 @@ BUILDSOURCE  = $(BUILD)/Source
 TESTPATCHES  = $(BUILDROOT)/TestPatches
 DAISYSP      = $(BUILDROOT)/Libraries/DaisySP/Source
 CMSIS        = $(BUILDROOT)/Libraries/CMSIS/Include/
-DSPLIB       = $(BUILDROOT)/Libraries/CMSIS/DSP_Lib/Source
+DSPINC       = $(BUILDROOT)/Libraries/CMSIS/DSP/Include
+DSPLIB       = $(BUILDROOT)/Libraries/CMSIS/DSP/Source
 LDSCRIPT    ?= $(BUILDROOT)/Source/flash.ld
 
 # Tool path
@@ -56,13 +57,14 @@ ARCH_FLAGS = -fsingle-precision-constant -mthumb
 ARCH_FLAGS += -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
 # ARCH_FLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16
 # ARCH_FLAGS += -mcpu=cortex-m0 -mfloat-abi=soft -msoft-float
-DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT -D__FPU_USED=1 -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
-# DEF_FLAGS = -DSTM32F745xx -DARM_MATH_CM7 -D__FPU_PRESENT -D__FPU_USED=1
+DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT=1 -D__FPU_USED=1U -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
+# DEF_FLAGS = -DSTM32F745xx -DARM_MATH_CM7 -D__FPU_PRESENT=1 -D__FPU_USED=1U
 INC_FLAGS = -I$(BUILDROOT)/Libraries -I$(DEVICE) -I$(CMSIS) -I$(PERIPH_FILE)/inc -I$(SOURCE)
 INC_FLAGS += -I$(DEVICE)/Include -I$(CMSIS)
 INC_FLAGS += -I$(USB_DEVICE_FILE)/Core/inc -I$(USB_DEVICE_FILE)/Class/cdc/inc
 INC_FLAGS += -I$(USB_OTG_FILE)/inc
 CPPFLAGS += $(ARCH_FLAGS) $(INC_FLAGS) $(DEF_FLAGS)
+CPPFLAGS += -D__PROGRAM_START=1 # prevent compilation of __cmsis_start function
 CFLAGS   += -std=gnu11
 CXXFLAGS += -std=gnu++14
 LDFLAGS  += -T$(LDSCRIPT) $(ARCH_FLAGS)
@@ -70,6 +72,7 @@ CPPFLAGS += -I$(PATCHSOURCE)
 CPPFLAGS += -I$(LIBSOURCE)
 CPPFLAGS += -I$(BUILDSOURCE)
 CPPFLAGS += -I$(TESTPATCHES)
+CPPFLAGS += -I$(DSPINC)
 CPPFLAGS += -I$(DAISYSP)
 CPPFLAGS += -I$(DAISYSP)/Control
 CPPFLAGS += -I$(DAISYSP)/Drums
diff --git a/native.mk b/native.mk
index a2c17bcf..b21da466 100644
--- a/native.mk
+++ b/native.mk
@@ -14,14 +14,17 @@ SOURCE       = $(BUILDROOT)/Source
 LIBSOURCE    = $(BUILDROOT)/LibSource
 BUILDSOURCE  = $(BUILD)/Source
 TESTPATCHES  = $(BUILDROOT)/TestPatches
-DSPLIB       = Libraries/CMSIS/DSP_Lib/Source
+DSPINC       = $(BUILDROOT)/Libraries/CMSIS/DSP/Include
+DSPLIB       = $(BUILDROOT)/Libraries/CMSIS/DSP/Source
 CPPFLAGS    += -I$(SOURCE)
 CPPFLAGS    += -I$(PATCHSOURCE)
 CPPFLAGS    += -I$(LIBSOURCE)
 CPPFLAGS    += -I$(BUILDSOURCE)
 CPPFLAGS    += -I$(TESTPATCHES)
+CPPFLAGS    += -I$(DSPINC)
 CPPFLAGS    += -ILibraries -ILibraries/KissFFT
-CXXFLAGS     = -std=c++14
+CPPFLAGS    += -D__PROGRAM_START=1 # prevent compilation of __cmsis_start function
+CXXFLAGS     = -std=gnu++17
 LDLIBS       = -lm
 LDFLAGS      = -Wl,--gc-sections
 
@@ -74,7 +77,7 @@ run: native
 	@$(BUILD)/Test/patch
 
 grind: native
-	valgrind --leak-check=full $(BUILD)/Test/patch
+	valgrind --leak-check=full --show-leak-kinds=all --track-origins=yes $(BUILD)/Test/patch
 
 test: $(TESTPATCHES)/PatchTest.cpp $(DEPS) $(OBJS)
 	@$(CXX) $(CPPFLAGS) $(CXXFLAGS) $(TESTPATCHES)/PatchTest.cpp -I$(BUILD) $(OBJS) -o $(BUILD)/Test/$@

From 7490277ee400b881424f44e1ea1d906588d16598 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 18:05:02 +0200
Subject: [PATCH 258/374] updated history

---
 HISTORY.md | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/HISTORY.md b/HISTORY.md
index 4f2fbfda..ba809418 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,7 +1,4 @@
-* Implemented RPN messages in VoiceAllocator
-* Update ExponentialDecayEnvelope
-* Implemented LinearAdsrEnvelope and ExponentialAdsrEnvelope
-* Changed to use std::min/max/abs/clamp for C++ compilation units
+* Updated CMSIS libraries
 
 v21.2
 -----
@@ -78,4 +75,4 @@ OwlProgram release, including OWL Library, to coincide with release v10 of the O
 Prehistory
 -----------
 
-A wise old OWL sat in an oak.
\ No newline at end of file
+A wise old OWL sat in an oak.

From b38c45bc2431f29548de2924583766277374a30d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 18:45:23 +0200
Subject: [PATCH 259/374] remove debug message

---
 LibSource/VoiceAllocator.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/LibSource/VoiceAllocator.h b/LibSource/VoiceAllocator.h
index a1ec66b5..14e56984 100644
--- a/LibSource/VoiceAllocator.h
+++ b/LibSource/VoiceAllocator.h
@@ -47,7 +47,6 @@ class VoiceAllocator : public MidiProcessor {
     return voice[0]->getTuning();
   }
   void setTuning(float frequency){
-    debugMessage("set tuning", frequency);
     for(int i=0; isetTuning(frequency);
   }

From 9ddd11e2540b457ec9c41589980221631e3d2882 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Mon, 12 Jul 2021 18:45:32 +0200
Subject: [PATCH 260/374] added block based processing

---
 LibSource/VosimOscillator.h | 41 ++++++++++++++++++++++++++++++++-----
 1 file changed, 36 insertions(+), 5 deletions(-)

diff --git a/LibSource/VosimOscillator.h b/LibSource/VosimOscillator.h
index 3a2ee940..ef2ef1ed 100644
--- a/LibSource/VosimOscillator.h
+++ b/LibSource/VosimOscillator.h
@@ -14,7 +14,7 @@ class VosimOscillator : public OscillatorTemplate {
   SineOscillator* formant2;
 public:
   VosimOscillator(SineOscillator* osc2, SineOscillator* osc1) :
-    formant1(osc1) , formant2(osc2) {}
+    formant1(osc1), formant2(osc2) {}
   static constexpr float begin_phase = 0;
   static constexpr float end_phase = 1;
   float waveshape = 0;
@@ -22,8 +22,6 @@ class VosimOscillator : public OscillatorTemplate {
     float square = phase < 0.5 ? 0.0f : 1.0f;
     float saw = phase;
     return 1 - ( saw + (square - saw) * waveshape );
-    // return 1 - ( phase - polyblep(phase, incr));
-    // return 1 - phase;
   }
   void setWaveshape(float value){
     waveshape = value;
@@ -40,13 +38,11 @@ class VosimOscillator : public OscillatorTemplate {
   void setFormant2(float frequency){
     formant2->setFrequency(frequency);
   }
-  using Oscillator::generate;
   float generate(float fm){
     float sample = getSample() * (1 - 0.4*waveshape);
     float s1 = formant1->generate();
     float s2 = formant2->generate();
     sample = (s1*s1 + s2*s2)*sample;
-    float dt = incr * (1 + fm);
     phase += incr * (1 + fm);
     if(phase >= end_phase){
       phase -= (end_phase - begin_phase);
@@ -64,6 +60,41 @@ class VosimOscillator : public OscillatorTemplate {
   float generate(){
     return generate(0);
   }
+  void generate(FloatArray output){
+    float* out = output.getData();
+    size_t len = output.getSize();
+    float sample, s1, s2;
+    while(len--){
+      sample = getSample() * (1 - 0.4*waveshape);
+      s1 = formant1->generate();
+      s2 = formant2->generate();
+      *out++ = (s1*s1 + s2*s2)*sample;
+      phase += incr;
+      if(phase >= end_phase){
+	phase -= (end_phase - begin_phase);
+	formant1->reset();
+	formant2->reset();
+      }
+    }
+  }
+  void generate(FloatArray output, FloatArray input){
+    float* out = output.getData();
+    float* fm = input.getData();
+    size_t len = output.getSize();
+    float sample, s1, s2;
+    while(len--){
+      sample = getSample() * (1 - 0.4*waveshape);
+      s1 = formant1->generate();
+      s2 = formant2->generate();
+      *out++ = (s1*s1 + s2*s2)*sample;
+      phase += incr * (1 + *fm++);
+      if(phase >= end_phase){
+	phase -= (end_phase - begin_phase);
+	formant1->reset();
+	formant2->reset();
+      }
+    }
+  }
   static VosimOscillator* create(float sr){
     SineOscillator* f1 = SineOscillator::create(sr);
     SineOscillator* f2 = SineOscillator::create(sr);

From 44aaa9d138bc98dbd915877bdf0ef906da13b9c5 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 14 Jul 2021 00:12:18 +0200
Subject: [PATCH 261/374] only set parameter value if value is initialised

---
 LibSource/Control.h | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/LibSource/Control.h b/LibSource/Control.h
index 71661a9a..bb418c2d 100644
--- a/LibSource/Control.h
+++ b/LibSource/Control.h
@@ -8,7 +8,10 @@
 template
 class Control {
 public:
-  Control(const float value=0){
+  Control(){
+    ASSERT(PID < getProgramVector()->parameters_size, "Invalid parameter ID");
+  }
+  Control(const float value){
     ASSERT(PID < getProgramVector()->parameters_size, "Invalid parameter ID");
     set(value);
   }

From b3b711ab495556562c58a079544c6bb7606490e7 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 14 Jul 2021 00:12:59 +0200
Subject: [PATCH 262/374] check if resource exists

---
 TestPatches/DummyPatch.hpp | 27 +++++++++++++--------------
 TestPatches/fileio.h       |  3 +++
 2 files changed, 16 insertions(+), 14 deletions(-)

diff --git a/TestPatches/DummyPatch.hpp b/TestPatches/DummyPatch.hpp
index d8b3f884..0607333e 100644
--- a/TestPatches/DummyPatch.hpp
+++ b/TestPatches/DummyPatch.hpp
@@ -10,7 +10,7 @@ int errorcode = 0;
 
 extern "C"{
   int serviceCall(int service, void** params, int len){
-    int ret = -1;
+    int ret = OWL_SERVICE_INVALID_ARGS;
     switch(service){
     case OWL_SERVICE_LOAD_RESOURCE:
       if(len == 4){
@@ -19,8 +19,10 @@ extern "C"{
 	uint32_t offset = *(uint32_t*)params[2];
 	uint32_t* max_size = (uint32_t*)params[3];
 	printf("Service call (LOAD RESOURCE) : %s [%u:%u]\n", name, offset, *max_size);
-	*max_size = fileread(name, buffer, *max_size);
-	ret = OWL_SERVICE_OK;
+	if(filestat(name) == 0){
+	  *max_size = fileread(name, buffer, *max_size);
+	  ret = OWL_SERVICE_OK;
+	}
       }else{
 	printf("Service call (LOAD RESOURCE) Invalid");
       }	
@@ -115,14 +117,17 @@ void arm_bitreversal_16(uint32_t *pSrc, const uint16_t bitRevLen, const uint16_t
 
 extern "C"{
   void doSetButton(uint8_t bid, uint16_t value, uint16_t samples){
-    printf("Set button %c: %d\n", 'A'+bid-4, value);
+    printf("Set button B%d: %d\n", bid-4, value);
     if(value)
       button_values |= (1<getValue());
-  if(pid < 40)
-    parameter_values[pid] = param->getValue();
+  doSetPatchParameter(pid, param->getValue()*4095);
 }
 
 void PatchProcessor::setPatchParameter(int pid, IntParameter* param){
-  printf("Set parameter %c: %d\n", 'A'+pid, param->getValue());
-  if(pid < 40)
-    parameter_values[pid] = param->getValue()/4096.0f;
+  doSetPatchParameter(pid, param->getValue());
 }
 
 Resource* Patch::getResource(char const* name){
@@ -272,9 +273,7 @@ float Patch::getParameterValue(PatchParameterId pid){
 }
 
 void Patch::setParameterValue(PatchParameterId pid, float value){
-  printf("Set parameter %c: %f\n", 'A'+pid, value);
-  if(pid < 40)
-    parameter_values[pid] = value;
+  doSetPatchParameter(pid, value*4095);
 }
 
 void Patch::setButton(PatchButtonId bid, uint16_t value, uint16_t samples){
diff --git a/TestPatches/fileio.h b/TestPatches/fileio.h
index fc102735..4034480a 100644
--- a/TestPatches/fileio.h
+++ b/TestPatches/fileio.h
@@ -13,6 +13,9 @@
 #include 
 
 extern "C"{
+  int filestat(const char *file_name){
+    return access(file_name, R_OK);
+  }
   size_t fileread(const char *file_name, uint8_t** data, size_t size){
     FILE* fd;
     if(!file_name)

From 77135554cf146739e2f7f1632ecea5ea5815631a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 14 Jul 2021 13:00:27 +0200
Subject: [PATCH 263/374] doc comments

---
 LibSource/Resource.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/LibSource/Resource.h b/LibSource/Resource.h
index 2225b16c..8107a455 100644
--- a/LibSource/Resource.h
+++ b/LibSource/Resource.h
@@ -61,9 +61,7 @@ class Resource {
    * Returned object must be garbage collected with Resource::destroy()
    * 
    * @param name resource name
-   * 
    * @return NULL if resource does not exist or can't be read.
-   * 
    */
   static Resource* open(const char* name);
 
@@ -71,6 +69,9 @@ class Resource {
    * Open resource and load data.
    * Allocates extra memory to hold the resource if required.
    * Returned object must be garbage collected with Resource::destroy()
+   * 
+   * @param name resource name
+   * @return NULL if resource does not exist or can't be read.
    */
   static Resource* load(const char* name);
 

From fa8a5bc0b21fd87f5b74423d31d536969c7f75bf Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 14 Jul 2021 13:58:42 +0200
Subject: [PATCH 264/374] adjusted adjustable waveshape

---
 LibSource/VosimOscillator.h | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/LibSource/VosimOscillator.h b/LibSource/VosimOscillator.h
index ef2ef1ed..e72eb30a 100644
--- a/LibSource/VosimOscillator.h
+++ b/LibSource/VosimOscillator.h
@@ -19,12 +19,15 @@ class VosimOscillator : public OscillatorTemplate {
   static constexpr float end_phase = 1;
   float waveshape = 0;
   float getSample(){
-    float square = phase < 0.5 ? 0.0f : 1.0f;
+    // return 1 - phase;
+    float square = phase < 0 ? 0.0f : 1.0f;
     float saw = phase;
-    return 1 - ( saw + (square - saw) * waveshape );
+    float sample = saw + (square - saw) * waveshape;
+    return 1 - sample * (1 - waveshape*0.5);
+    // return 1 - (1-waveshape)*phase + waveshape*sinf(phase*2*M_PI);
   }
   void setWaveshape(float value){
-    waveshape = value;
+    waveshape = value*0.25;
   }    
   float getFormant1(){
     return formant1->getFrequency();
@@ -39,10 +42,10 @@ class VosimOscillator : public OscillatorTemplate {
     formant2->setFrequency(frequency);
   }
   float generate(float fm){
-    float sample = getSample() * (1 - 0.4*waveshape);
+    float sample = getSample();
     float s1 = formant1->generate();
     float s2 = formant2->generate();
-    sample = (s1*s1 + s2*s2)*sample;
+    sample = (s1*s1 + s2*s2)*sample - 1;
     phase += incr * (1 + fm);
     if(phase >= end_phase){
       phase -= (end_phase - begin_phase);

From 5efa3735dbd785b9d2fbf47835bc244af9a8ad82 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 14 Jul 2021 13:59:54 +0200
Subject: [PATCH 265/374] include PATCHNAME in compilation and in metadata

---
 Source/PatchMetadata.cpp | 2 +-
 compile.mk               | 1 +
 native.mk                | 1 +
 web.mk                   | 1 +
 4 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/Source/PatchMetadata.cpp b/Source/PatchMetadata.cpp
index eb49de51..44ec118f 100644
--- a/Source/PatchMetadata.cpp
+++ b/Source/PatchMetadata.cpp
@@ -2,7 +2,7 @@
 
 #define __weak  __attribute__((weak))
 
-__weak const char* PatchMetadata::name = NULL;
+__weak const char* PatchMetadata::name = PATCHNAME;
 __weak const int PatchMetadata::channels_in = 2;
 __weak const int PatchMetadata::channels_out = 2;
 __weak const int PatchMetadata::parameter_count = 2;
diff --git a/compile.mk b/compile.mk
index e2f5ea0b..d8b623d5 100644
--- a/compile.mk
+++ b/compile.mk
@@ -58,6 +58,7 @@ ARCH_FLAGS += -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
 # ARCH_FLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16
 # ARCH_FLAGS += -mcpu=cortex-m0 -mfloat-abi=soft -msoft-float
 DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT=1 -D__FPU_USED=1U -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
+DEF_FLAGS += "-DPATCHNAME=\"$(PATCHNAME)\""
 # DEF_FLAGS = -DSTM32F745xx -DARM_MATH_CM7 -D__FPU_PRESENT=1 -D__FPU_USED=1U
 INC_FLAGS = -I$(BUILDROOT)/Libraries -I$(DEVICE) -I$(CMSIS) -I$(PERIPH_FILE)/inc -I$(SOURCE)
 INC_FLAGS += -I$(DEVICE)/Include -I$(CMSIS)
diff --git a/native.mk b/native.mk
index b21da466..b4a3031f 100644
--- a/native.mk
+++ b/native.mk
@@ -24,6 +24,7 @@ CPPFLAGS    += -I$(TESTPATCHES)
 CPPFLAGS    += -I$(DSPINC)
 CPPFLAGS    += -ILibraries -ILibraries/KissFFT
 CPPFLAGS    += -D__PROGRAM_START=1 # prevent compilation of __cmsis_start function
+CPPFLAGS    += "-DPATCHNAME=\"$(PATCHNAME)\""
 CXXFLAGS     = -std=gnu++17
 LDLIBS       = -lm
 LDFLAGS      = -Wl,--gc-sections
diff --git a/web.mk b/web.mk
index f1cc0d73..e62d4030 100644
--- a/web.mk
+++ b/web.mk
@@ -34,6 +34,7 @@ EMCCFLAGS += -Wno-unknown-warning-option
 EMCCFLAGS += --memory-init-file 0 # don't create separate memory init file .mem
 EMCCFLAGS += -s EXPORTED_FUNCTIONS="['_WEB_setup','_WEB_setParameter','_WEB_getParameter','_WEB_processBlock','_WEB_getPatchName','_WEB_getParameterName','_WEB_getMessage','_WEB_getStatus','_WEB_getButtons','_WEB_setButton', '_WEB_processMidi', '_malloc']"
 EMCCFLAGS += -s "EXTRA_EXPORTED_RUNTIME_METHODS=['cwrap']"
+EMCCFLAGS += "-DPATCHNAME=\"$(PATCHNAME)\""
 
 include $(BUILDROOT)/sources.mk
 CPP_SRC += Source/Patch.cpp

From a59411fbb1b3a948416c9d1b1dec097fec321c2d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 14 Jul 2021 14:00:13 +0200
Subject: [PATCH 266/374] fix default parameter / button count

---
 Source/PatchMetadata.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Source/PatchMetadata.cpp b/Source/PatchMetadata.cpp
index 44ec118f..9a37d145 100644
--- a/Source/PatchMetadata.cpp
+++ b/Source/PatchMetadata.cpp
@@ -5,7 +5,7 @@
 __weak const char* PatchMetadata::name = PATCHNAME;
 __weak const int PatchMetadata::channels_in = 2;
 __weak const int PatchMetadata::channels_out = 2;
-__weak const int PatchMetadata::parameter_count = 2;
-__weak const int PatchMetadata::button_count = 2;
+__weak const int PatchMetadata::parameter_count = 0;
+__weak const int PatchMetadata::button_count = 0;
 __weak const PatchMetadata::Control PatchMetadata::parameters[] = {};
 __weak const PatchMetadata::Control PatchMetadata::buttons[] = {};

From 076aab1a192de9956c75b4b830425ca7b532cf12 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Fri, 16 Jul 2021 21:50:04 +0300
Subject: [PATCH 267/374] Register earlier to allow changing audio format

---
 Source/PatchProgram.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Source/PatchProgram.cpp b/Source/PatchProgram.cpp
index ee33dce8..4cfff380 100644
--- a/Source/PatchProgram.cpp
+++ b/Source/PatchProgram.cpp
@@ -92,10 +92,10 @@ void setup(ProgramVector* pv){
 #endif /* USE_MIDI_CALLBACK */
   if(samples != NULL)
     SampleBuffer::destroy(samples);
+#include "registerpatch.cpp"
   samples = SampleBuffer::create(pv->audio_format, pv->audio_blocksize);
   if(samples == NULL)
     error(CONFIGURATION_ERROR_STATUS, "Unsupported audio format");
-#include "registerpatch.cpp"
 }
 
 void run(ProgramVector* pv){

From 0f579bb4c75175d5bc22aac38bcb349fb398d0b9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 26 Aug 2021 13:03:50 +0200
Subject: [PATCH 268/374] updated history

---
 HISTORY.md | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index 35fb9545..e6347512 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,7 @@
+* Automatically add '>' to end of gen~ output parameters
+* Updated to use C++17
+* Use std::min/max/abs/clamp instead of macros for C++
+* Refactored AdsrEnvelope to Linear and Exponential versions
 * Updated CMSIS libraries
 
 v21.2

From bd59a8d649d625d533d4aefe1454d0e323285c86 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 4 Sep 2021 14:35:21 +0200
Subject: [PATCH 269/374] added method: block based SineOscillator::generate()
 with FM

---
 LibSource/SineOscillator.h | 20 ++++++++++++++------
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h
index cf6dc008..fd07725f 100644
--- a/LibSource/SineOscillator.h
+++ b/LibSource/SineOscillator.h
@@ -43,6 +43,13 @@ class SineOscillator : public Oscillator {
       phase -= 2*M_PI;
     return sample;
   }
+  float generate(float fm){
+    float sample = sinf(phase);
+    phase += incr + fm;
+    if(phase >= 2*M_PI)
+      phase -= 2*M_PI;
+    return sample;
+  }
   void generate(FloatArray output){
     size_t len = output.getSize();
     for(size_t i=0; i= 2*M_PI)
-      phase -= 2*M_PI;
-    return sample;
+  void generate(FloatArray output, FloatArray fm){
+    size_t len = output.getSize();
+    for(size_t i=0; i
Date: Sat, 4 Sep 2021 15:00:53 +0200
Subject: [PATCH 270/374] allow for default Heavy parameters to not be
 specified

---
 Tools/HeavyPatch.tpl.hpp              | 2 ++
 Tools/Heavy_owl_constants.tpl.h       | 4 +++-
 Tools/build_send_receive_constants.py | 4 ++--
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/Tools/HeavyPatch.tpl.hpp b/Tools/HeavyPatch.tpl.hpp
index 77501a05..eff864bc 100644
--- a/Tools/HeavyPatch.tpl.hpp
+++ b/Tools/HeavyPatch.tpl.hpp
@@ -75,7 +75,9 @@ class HeavyPatch : public Patch {
     {% for param, name, typ, namehash, minvalue, maxvalue, defvalue, button in jdata if button == False %}
     // {{name}}
     registerParameter(PARAMETER_{{param}}, HV_NAME_CHANNEL_{{param}});
+    {% if defvalue != None %}    
     setParameterValue(PARAMETER_{{param}}, HV_DEFAULT_CHANNEL_{{param}});
+    {% endif %}
     {% endfor %}
   }
 
diff --git a/Tools/Heavy_owl_constants.tpl.h b/Tools/Heavy_owl_constants.tpl.h
index 70dd0dff..db938caa 100644
--- a/Tools/Heavy_owl_constants.tpl.h
+++ b/Tools/Heavy_owl_constants.tpl.h
@@ -1,8 +1,10 @@
 {% for param, name, typ, namehash, minvalue, maxvalue, defvalue, button in jdata %}
-// {{param}} {{name}} {{typ}} {{namehash}} {{minvalue}} {{maxvalue}} {{defvalue}} {{(defvalue-minvalue)/(maxvalue-minvalue)}}
+// {{param}} {{name}} {{typ}} {{namehash}}
 #define HV_NAME_CHANNEL_{{param}} "{{name}}"
 #define HV_HASH_{{typ}}_CHANNEL_{{param}} {{namehash}}
 #define HV_MIN_CHANNEL_{{param}} {{minvalue}}
 #define HV_MAX_CHANNEL_{{param}} {{maxvalue}}
+{% if defvalue != None %}
 #define HV_DEFAULT_CHANNEL_{{param}} {{(defvalue-minvalue)/(maxvalue-minvalue)}}
+{% endif %}
 {% endfor %}
diff --git a/Tools/build_send_receive_constants.py b/Tools/build_send_receive_constants.py
index 4d288557..0b5c331d 100755
--- a/Tools/build_send_receive_constants.py
+++ b/Tools/build_send_receive_constants.py
@@ -63,7 +63,7 @@ def main():
             elif name.startswith('Channel-'):
                 key = name.split('Channel-', 1)[1]
                 jdata.append((key, name, 'RECV', "0x%x" % heavy_hash(name),
-                              0, 1, 0.5, key in OWL_BUTTONS))
+                              0, 1, None, key in OWL_BUTTONS))
 
         for k, v in ir['objects'].iteritems():
             try:
@@ -79,7 +79,7 @@ def main():
                     elif name.startswith('Channel-'):
                         key = name.split('Channel-', 1)[1]
                         jdata.append((key, name+'>', 'SEND', "0x%x" % heavy_hash(name),
-                                      0, 1, 0.5, key in OWL_BUTTONS))
+                                      0, 1, None, key in OWL_BUTTONS))
             except:
                 pass
 

From da3e33318b56863b830527e924b663b0dfe613b4 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 22 Sep 2021 13:47:26 +0200
Subject: [PATCH 271/374] re-enable ButtonA/B/C/D support for backward
 compatibility

---
 FaustSource/owl.cpp | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/FaustSource/owl.cpp b/FaustSource/owl.cpp
index b1b57051..b8ba5071 100644
--- a/FaustSource/owl.cpp
+++ b/FaustSource/owl.cpp
@@ -911,7 +911,15 @@ class OwlUI : public UI {
             }
             else if (strcasecmp(id, "PUSH") == 0)
                 fButton = PUSHBUTTON;
-        }
+	    else if (strcasecmp(id, "ButtonA") == 0)
+                fButton = BUTTON_A;
+            else if (strcasecmp(id, "ButtonB") == 0)
+                fButton = BUTTON_B;
+            else if (strcasecmp(id, "ButtonC") == 0)
+                fButton = BUTTON_C;
+            else if (strcasecmp(id, "ButtonD") == 0)
+                fButton = BUTTON_D;
+	}
         // else if (strcasecmp(k, "midi") == 0) {
 	//   if (strcasecmp(id, "pitchwheel") == 0){ // PB
 	//   }else if (strcasecmp(id, "ctrl") == 0){ // CC

From 26db4f20585c7d11337fc968b540f088eae5adbd Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 22 Sep 2021 13:47:47 +0200
Subject: [PATCH 272/374] avoid using min() (breaks faust native build)

---
 LibSource/WavFile.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/LibSource/WavFile.h b/LibSource/WavFile.h
index 1b97db4a..0c959d2c 100644
--- a/LibSource/WavFile.h
+++ b/LibSource/WavFile.h
@@ -77,7 +77,9 @@ class WavFile {
   }
   void read(size_t channel, FloatArray output){
     size_t channels = getNumberOfChannels();
-    size_t len = min(output.getSize(), getNumberOfSamples());
+    size_t len = getNumberOfSamples();
+    if(len > output.getSize())
+      len = output.getSize();
     size_t pos = channel % channels;
     if(header->audio_format == 1 && header->bps == 8){ // WAVE_FORMAT_PCM 8-bit
       int8_t* data = (int8_t*)getData();      

From 57accd28e1de54624a4d43a8cbcec5d266f24ff1 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 22 Sep 2021 21:27:27 +0200
Subject: [PATCH 273/374] fix merge mistakes

---
 LibSource/SineOscillator.h | 16 ----------------
 1 file changed, 16 deletions(-)

diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h
index 08355cab..71093359 100644
--- a/LibSource/SineOscillator.h
+++ b/LibSource/SineOscillator.h
@@ -10,13 +10,6 @@ class SineOscillator : public OscillatorTemplate {
   float getSample(){
     return sinf(phase);
   }
-  float generate(float fm){
-    float sample = sinf(phase);
-    phase += incr + fm;
-    if(phase >= 2*M_PI)
-      phase -= 2*M_PI;
-    return sample;
-  }
   void generate(FloatArray output){
     size_t len = output.getSize();
     for(size_t i=0; i {
     }
     phase = fmodf(phase, end_phase);
   }
-  static SineOscillator* create(float sr){
-    return new SineOscillator(sr);
-  }
-  static SineOscillator* create(float freq, float sr){
-    return new SineOscillator(freq, sr);
-  }
-  static void destroy(SineOscillator* osc){
-    delete osc;
-  }
   using OscillatorTemplate::generate;  
 };
 

From 1d595c7700d19ca6c45800eef905faed87805052 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 8 Oct 2021 02:37:28 +0200
Subject: [PATCH 274/374] updated CircularBuffer from OpenWare project

---
 LibSource/CircularBuffer.h | 39 ++++++++++++++++++++++++++------------
 1 file changed, 27 insertions(+), 12 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 15162048..219ccb9c 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -4,6 +4,10 @@
 #include 
 #include  // for memcpy
 
+#ifndef FLOW_ASSERT
+#define FLOW_ASSERT(x, y)
+#endif
+
 template
 class CircularBuffer {
 protected:
@@ -15,6 +19,11 @@ class CircularBuffer {
   CircularBuffer(): data(NULL), size(0){}
   CircularBuffer(T* data, size_t size): data(data), size(size){}
 
+  void setData(T* data, size_t len) {
+    this->data = data;
+    size = len;
+  }
+
   size_t getSize() const {
     return size;
   }
@@ -34,7 +43,7 @@ class CircularBuffer {
   }
 
   void write(T* source, size_t len){
-    ASSERT(getWriteCapacity() >= len, "overflow");
+    FLOW_ASSERT(getWriteCapacity() >= len, "overflow");
     T* dest = getWriteHead();
     size_t rem = size-writepos;
     if(len > rem){
@@ -51,6 +60,16 @@ class CircularBuffer {
     data[index % size] = value;
   }
 
+  void overdub(T c){
+    data[writepos++] += c;
+    if(writepos >= size)
+      writepos = 0;
+  }
+
+  void overdubAt(size_t index, T value){
+    data[index % size] += value;
+  }
+
   T read(){
     T c = data[readpos++];
     if(readpos >= size)
@@ -59,7 +78,7 @@ class CircularBuffer {
   }
 
   void read(T* dst, size_t len){
-    ASSERT(getReadCapacity() >= len, "underflow");
+    FLOW_ASSERT(getReadCapacity() >= len, "underflow");
     T* src = getReadHead();
     size_t rem = size-readpos;
     if(len > rem){
@@ -106,11 +125,9 @@ class CircularBuffer {
     return data+writepos;
   }
 
-  void moveWriteHead(size_t samples){
-    ASSERT(getWriteCapacity() < samples, "overflow");
-    writepos += samples;
-    if(writepos >= size)
-      writepos -= size;
+  void moveWriteHead(int32_t samples){
+    FLOW_ASSERT(getWriteCapacity() >= samples, "overflow");
+    writepos = (writepos + samples) % size;
   }
 
   size_t getReadIndex(){
@@ -125,11 +142,9 @@ class CircularBuffer {
     return data+readpos;
   }
 
-  void moveReadHead(size_t samples){
-    ASSERT(getReadCapacity() < samples, "underflow");
-    readpos += samples;
-    if(readpos >= size)
-      readpos -= size;
+  void moveReadHead(int32_t samples){
+    FLOW_ASSERT(getReadCapacity() < samples, "underflow");
+    readpos = (readpos + samples) % size;
   }
 
   /**

From 56a42dbcb598dd7323d68fb2ea555bbe0e277f05 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 8 Oct 2021 02:37:44 +0200
Subject: [PATCH 275/374] updated links

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 1fcc5517..c2a9d5c6 100644
--- a/README.md
+++ b/README.md
@@ -1,7 +1,7 @@
 # OwlProgram
 Dynamically loaded OWL program.
 
-OwlProgram is the patch build environment for the OWL Pedal, OWL Modular, Magus, Wizard and Alchemist products from Rebel Technology. For details see https://www.rebeltech.org (moved from http://hoxtonowl.com).
+OwlProgram is the patch build environment for the OWL Pedal, OWL Modular, Magus, Wizard and Alchemist products from Rebel Technology. For more details see [www.rebeltech.org](https://www.rebeltech.org), the [community forum](community.rebeltech.org), or refer to [www.openwarelab.org](https://www.openwarelab.org/) for documentation.
 
 It is used to build, run and store patches written in Pure Data, FAUST, Max Gen, SOUL, Maximilian and C++.
 

From 952472498baf5079f1f0e3fdc7e47e3a9b02e8db Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Sat, 9 Oct 2021 01:36:51 +0200
Subject: [PATCH 276/374] uglifyjs is deprecated in favour of uglify-js

---
 web.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/web.mk b/web.mk
index e62d4030..6e77daf7 100644
--- a/web.mk
+++ b/web.mk
@@ -104,7 +104,7 @@ PHONY: libs web minify
 
 # JavaScript minifiers
 #CLOSURE = java -jar Tools/node_modules/google-closure-compiler/compiler.jar --language_in=ECMASCRIPT5
-UGLIFYJS = Tools/node_modules/uglifyjs/bin/uglifyjs
+UGLIFYJS = Tools/node_modules/uglify-js/bin/uglifyjs
 
 $(WEBDIR)/$(TARGET).js: $(PATCH_OBJS)
 	$(EMCC) $(LDFLAGS) $(PATCH_OBJS) -o $(WEBDIR)/$(TARGET).js Libraries/libowlweb.a -Wl,--whole-archive Libraries/libdaisyspweb.a -Wl,--no-whole-archive

From a0316ad6f3c09a0603b22c7f9553c0f6ffa49147 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Sat, 10 Jul 2021 22:53:20 +0300
Subject: [PATCH 277/374] Stereo oscillator template and quadrature sine

---
 LibSource/Oscillator.h               | 14 +++---
 LibSource/QuadratureSineOscillator.h | 39 +++++++++++++++++
 LibSource/StereoOscillator.h         | 64 ++++++++++++++++++++++++++++
 3 files changed, 110 insertions(+), 7 deletions(-)
 create mode 100644 LibSource/QuadratureSineOscillator.h
 create mode 100644 LibSource/StereoOscillator.h

diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index cafd4054..d0134d0b 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -65,8 +65,8 @@ class Oscillator : public SignalGenerator {
   }
 };
 
-template
-class OscillatorTemplate : public Oscillator {
+template
+class OscillatorTemplate : public BaseOscillator {
 protected:
   float mul;
   float phase = 0;
@@ -96,22 +96,22 @@ class OscillatorTemplate : public Oscillator {
   void reset(){
     phase = T::begin_phase;
   }
-  float generate(){
-    float sample = static_cast(this)->getSample();
+  Sample generate() override {
+    Sample sample = static_cast(this)->getSample();
     phase += incr;
     if(phase >= T::end_phase)
       phase -= (T::end_phase - T::begin_phase);
     return sample;
   }
-  float generate(float fm){
-    float sample = static_cast(this)->getSample();
+  Sample generate(float fm) override {
+    Sample sample = static_cast(this)->getSample();
     // phase += incr * (1 + fm);
     phase += incr  + (T::end_phase - T::begin_phase)*fm;
     if(phase >= T::end_phase)
       phase -= (T::end_phase - T::begin_phase);
     return sample;
   }  
-  using Oscillator::generate;
+  using BaseOscillator::generate;
   static T* create(float sr){
     T* obj = new T();
     obj->setSampleRate(sr);
diff --git a/LibSource/QuadratureSineOscillator.h b/LibSource/QuadratureSineOscillator.h
new file mode 100644
index 00000000..b57dec8a
--- /dev/null
+++ b/LibSource/QuadratureSineOscillator.h
@@ -0,0 +1,39 @@
+#ifndef QUADRATURE_SINE_OSCILLATOR_H
+#define QUADRATURE_SINE_OSCILLATOR_H
+
+#include "StereoOscillator.h"
+
+class QuadratureSineOscillator : public StereoOscillatorTemplate {
+public:
+    static constexpr float begin_phase = 0;
+    static constexpr float end_phase = 2 * M_PI;
+    ComplexFloat getSample() {
+        return ComplexFloat { cosf(phase), sinf(phase) };
+    }
+    void generate(AudioBuffer& output) override {
+        size_t len = output.getSize();
+        FloatArray left = output.getSamples(0);
+        FloatArray right = output.getSamples(1);
+        for (size_t i = 0; i < len; ++i) {
+            left[i] = cosf(phase);
+            right[i] = sinf(phase);
+            phase += incr; // allow phase to overrun
+        }
+        phase = fmodf(phase, end_phase);
+    }
+    void generate(AudioBuffer& output, FloatArray fm) {
+        size_t len = output.getSize();
+        FloatArray left = output.getSamples(0);
+        FloatArray right = output.getSamples(1);
+        for (size_t i = 0; i < len; ++i) {
+            left[i] = cosf(phase);
+            right[i] = sinf(phase);
+            phase += incr * (1 + fm[i]);
+            // allow phase to overrun
+        }
+        phase = fmodf(phase, end_phase);
+    }
+    using StereoOscillatorTemplate::generate;
+};
+
+#endif /* QUADRATURE_SINE_OSCILLATOR_H */
diff --git a/LibSource/StereoOscillator.h b/LibSource/StereoOscillator.h
new file mode 100644
index 00000000..790ea98c
--- /dev/null
+++ b/LibSource/StereoOscillator.h
@@ -0,0 +1,64 @@
+#ifndef __QUADRATURE_OSCILLATOR_H__
+#define __QUADRATURE_OSCILLATOR_H__
+
+#include "SignalGenerator.h"
+#include "Oscillator.h"
+#include "ComplexFloatArray.h"
+
+/**
+ * A stereo oscillator is a MultiSignalGenerator with 2 channels that
+ * operates at a given frequency and that can be frequency modulated. Output
+ * signal is a complex number.
+ */
+class StereoOscillator : public MultiSignalGenerator {
+public:
+  StereoOscillator() = default;
+  virtual ~StereoOscillator() = default;
+  using MultiSignalGenerator::generate;
+  /**
+   * Set oscillator sample rate
+   */
+  virtual void setSampleRate(float value){}
+  /**
+   * Set oscillator frequency in Hertz
+   */
+  virtual void setFrequency(float value) = 0;
+  /**
+   * Get oscillator frequency in Hertz
+   */
+  virtual float getFrequency() = 0;
+  /**
+   * Set current oscillator phase in radians
+   * @param phase a value between 0 and 2*pi
+   */
+  virtual void setPhase(float phase) = 0;
+  /**
+   * Get current oscillator phase in radians
+   * @return a value between 0 and 2*pi
+   */
+  virtual float getPhase() = 0;
+  /**
+   * Reset oscillator (typically resets phase)
+   */
+  virtual void reset() = 0;
+  /**
+   * Produce a sample with frequency modulation.
+   */
+  virtual ComplexFloat generate() {
+    return generate(0.f);
+  }
+  virtual ComplexFloat generate(float fm) = 0;
+  virtual void generate(AudioBuffer& output) {
+    FloatArray left = output.getSamples(0);
+    FloatArray right = output.getSamples(1);
+    for(size_t i=0; i
+using StereoOscillatorTemplate = OscillatorTemplate;
+#endif

From f56d183d9f0a9f11483902a202ffaee5e2a6487c Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Sat, 10 Jul 2021 22:54:12 +0300
Subject: [PATCH 278/374] Some complex float operators

---
 LibSource/ComplexFloatArray.h | 107 ++++++++++++++++++++++++++++++++++
 1 file changed, 107 insertions(+)

diff --git a/LibSource/ComplexFloatArray.h b/LibSource/ComplexFloatArray.h
index 2092e563..ecd23404 100644
--- a/LibSource/ComplexFloatArray.h
+++ b/LibSource/ComplexFloatArray.h
@@ -75,6 +75,29 @@ struct ComplexFloat {
     im = magnitude*sinf(phase);
   }
 
+  float getMagnitudeSquared() {
+    return re * re + im * im;
+  }
+
+  ComplexFloat getComplexConjugate() {
+    return ComplexFloat {re, -im};
+  }
+
+  ComplexFloat getDotProduct(ComplexFloat other) {
+    return ComplexFloat {re * other.re - im  * other.im, re * other.im + im * other.re};
+  }
+
+  /**
+   * Copy assignment
+   */
+  ComplexFloat& operator=(const ComplexFloat& other) {
+    if (this != &other) {
+      re = other.re;
+      im = other.im;
+    }
+    return *this;
+  }
+
   bool operator<(const ComplexFloat& other) const {
     return getMagnitudeSquared() < other.getMagnitudeSquared();
   }
@@ -99,6 +122,90 @@ struct ComplexFloat {
     return re != other.re || im != other.im;
   }
 
+  friend const ComplexFloat operator+(const ComplexFloat&lhs, const ComplexFloat& rhs) {
+    ComplexFloat result = lhs;
+    result += rhs;
+    return result;
+  }
+
+  friend const ComplexFloat operator+(const ComplexFloat&lhs, float rhs) {
+    ComplexFloat result = lhs;
+    result += rhs;
+    return result;
+  }
+
+  ComplexFloat& operator+=(float other) {
+    re += other;
+    im += other;
+    return *this;
+  }
+
+  ComplexFloat& operator+=(const ComplexFloat& other) {
+    re += other.re;
+    im += other.im;
+    return *this;
+  }
+
+  friend const ComplexFloat operator-(const ComplexFloat&lhs, const ComplexFloat& rhs) {
+    ComplexFloat result = lhs;
+    result -= rhs;
+    return result;
+  }
+
+  friend const ComplexFloat operator-(const ComplexFloat&lhs, float rhs) {
+    ComplexFloat result = lhs;
+    result -= rhs;
+    return result;
+  }
+
+  ComplexFloat& operator-=(float other) {
+    re -= other;
+    im -= other;
+    return *this;
+  }
+
+  ComplexFloat& operator-=(const ComplexFloat& other) {
+    re -= other.re;
+    im -= other.im;
+    return *this;
+  }
+
+  friend const ComplexFloat operator*(const ComplexFloat&lhs, const ComplexFloat& rhs) {
+    ComplexFloat result = lhs;
+    result *= rhs;
+    return result;
+  }
+
+  friend const ComplexFloat operator*(const ComplexFloat&lhs, float rhs) {
+    ComplexFloat result = lhs;
+    result *= rhs;
+    return result;
+  }
+
+  ComplexFloat& operator*=(float other) {
+    re *= other;
+    im *= other;
+    return *this;
+  }
+
+  ComplexFloat& operator*=(const ComplexFloat& other) {
+    re = re * other.re - im * other.im;
+    im = re * other.im + im * other.re;
+    return *this;
+  }
+
+  friend const ComplexFloat operator/(const ComplexFloat&lhs, float rhs) {
+    ComplexFloat result = lhs;
+    result /= rhs;
+    return result;
+  }
+
+  ComplexFloat& operator/=(float other) {
+    re /= other;
+    im /= other;
+    return *this;
+  }
+
 };
 
 class ComplexFloatArray : public SimpleArray {

From 9f8aa675256c49bd4b844f0a9d5c8f2aab98ec9e Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Sat, 10 Jul 2021 23:29:23 +0300
Subject: [PATCH 279/374] Test for quadrature sine oscillator

---
 .../QuadratureSineOscillatorTestPatch.hpp     | 72 +++++++++++++++++++
 1 file changed, 72 insertions(+)
 create mode 100644 TestPatches/QuadratureSineOscillatorTestPatch.hpp

diff --git a/TestPatches/QuadratureSineOscillatorTestPatch.hpp b/TestPatches/QuadratureSineOscillatorTestPatch.hpp
new file mode 100644
index 00000000..afcf5ce7
--- /dev/null
+++ b/TestPatches/QuadratureSineOscillatorTestPatch.hpp
@@ -0,0 +1,72 @@
+#include "TestPatch.hpp"
+#include "QuadratureSineOscillator.h"
+
+class QuadratureSineOscillatorTestPatch : public TestPatch {
+public:
+  QuadratureSineOscillatorTestPatch(){
+    {
+      TEST("ctor");
+      QuadratureSineOscillator osc;
+      osc.setSampleRate(16000);
+      osc.setFrequency(440);
+      CHECK_EQUAL(osc.getSampleRate(), 16000);
+      CHECK_EQUAL((int)osc.getFrequency(), 440);
+      osc = QuadratureSineOscillator();
+      osc.setSampleRate(32000);
+      CHECK_EQUAL(osc.getFrequency(), 0.0f);
+      CHECK_EQUAL(osc.getSampleRate(), 32000);
+    }
+    {
+      TEST("create");
+      QuadratureSineOscillator* osc = QuadratureSineOscillator::create(32000);
+      osc->setFrequency(120);
+      CHECK_EQUAL(osc->getSampleRate(), 32000);
+      CHECK_EQUAL(osc->getFrequency(), 120);
+      QuadratureSineOscillator::destroy(osc);
+    }
+    {
+      TEST("setSampleRate");
+      QuadratureSineOscillator* osc = QuadratureSineOscillator::create(44100);
+      osc->setFrequency(321);
+      CHECK_EQUAL(osc->getSampleRate(), 44100);
+      CHECK_EQUAL(osc->getFrequency(), 321);
+      osc->setSampleRate(48000);
+      CHECK_EQUAL((int)osc->getSampleRate(), 48000);
+      CHECK_EQUAL(osc->getFrequency(), 321); // check that frequency is the same
+      QuadratureSineOscillator::destroy(osc);      
+    }
+    {
+      TEST("compareBlockAndSampleBased");
+      QuadratureSineOscillator* osc1 = QuadratureSineOscillator::create(48000);
+      QuadratureSineOscillator* osc2 = QuadratureSineOscillator::create(48000);
+      osc1->setFrequency(480);      
+      osc2->setFrequency(480);      
+      AudioBuffer* s1 = AudioBuffer::create(2, 1000);
+      AudioBuffer* s2 = AudioBuffer::create(2, 1000);
+      osc1->generate(*s1);
+      for(size_t i=0; i<1000; ++i) {
+        ComplexFloat sample = osc2->generate();
+        s2->getSamples(0)[i] = sample.re;
+        s2->getSamples(1)[i] = sample.im;
+      }
+      for(size_t i=0; i<1000; ++i) {
+        CHECK_CLOSE(s1->getSamples(0)[i], s2->getSamples(0)[i], 0.00002);
+        CHECK_CLOSE(s1->getSamples(1)[i], s2->getSamples(1)[i], 0.00002);
+      }
+      osc1->generate(*s1);
+      for(size_t i=0; i<1000; ++i) {
+        ComplexFloat sample = osc2->generate();
+        s2->getSamples(0)[i] = sample.re;
+        s2->getSamples(1)[i] = sample.im;
+      }
+      for(size_t i=0; i<1000; ++i) {
+        CHECK_CLOSE(s1->getSamples(0)[i], s2->getSamples(0)[i], 0.00002);
+        CHECK_CLOSE(s1->getSamples(1)[i], s2->getSamples(1)[i], 0.00002);
+      }
+      AudioBuffer::destroy(s1);      
+      AudioBuffer::destroy(s2);      
+      QuadratureSineOscillator::destroy(osc1);      
+      QuadratureSineOscillator::destroy(osc2);      
+    }
+}
+};

From 8c722da0ff659c0c414db2efdd046a912bfaf235 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Mon, 12 Jul 2021 21:02:12 +0300
Subject: [PATCH 280/374] Fixes/renaming according to github discussion

---
 LibSource/ComplexFloatArray.h                 | 26 ++++++++-----------
 ...StereoOscillator.h => ComplexOscillator.h} | 19 ++++++++------
 LibSource/QuadratureSineOscillator.h          |  6 ++---
 3 files changed, 25 insertions(+), 26 deletions(-)
 rename LibSource/{StereoOscillator.h => ComplexOscillator.h} (71%)

diff --git a/LibSource/ComplexFloatArray.h b/LibSource/ComplexFloatArray.h
index ecd23404..ff9680df 100644
--- a/LibSource/ComplexFloatArray.h
+++ b/LibSource/ComplexFloatArray.h
@@ -7,6 +7,10 @@
 * A structure defining a floating point complex number as two members of type float.
 */
 struct ComplexFloat {
+  constexpr ComplexFloat() : re(0), im(0) {}
+  constexpr ComplexFloat(float x) : re(x), im(0) {}
+  constexpr ComplexFloat(float re, float im) : re(re), im(im) {}
+
   /**
    * The real part of the complex number.
    */
@@ -75,27 +79,19 @@ struct ComplexFloat {
     im = magnitude*sinf(phase);
   }
 
-  float getMagnitudeSquared() {
-    return re * re + im * im;
-  }
-
-  ComplexFloat getComplexConjugate() {
+  /**
+   * Returns complet conjugate - a copy of current number with imaginary part inverted
+   */
+  ComplexFloat getComplexConjugate() const {
     return ComplexFloat {re, -im};
   }
 
-  ComplexFloat getDotProduct(ComplexFloat other) {
-    return ComplexFloat {re * other.re - im  * other.im, re * other.im + im * other.re};
-  }
 
   /**
-   * Copy assignment
+   * Returns dot product with another complex float value
    */
-  ComplexFloat& operator=(const ComplexFloat& other) {
-    if (this != &other) {
-      re = other.re;
-      im = other.im;
-    }
-    return *this;
+  ComplexFloat getDotProduct(ComplexFloat other) const {
+    return ComplexFloat {re * other.re - im  * other.im, re * other.im + im * other.re};
   }
 
   bool operator<(const ComplexFloat& other) const {
diff --git a/LibSource/StereoOscillator.h b/LibSource/ComplexOscillator.h
similarity index 71%
rename from LibSource/StereoOscillator.h
rename to LibSource/ComplexOscillator.h
index 790ea98c..71c603aa 100644
--- a/LibSource/StereoOscillator.h
+++ b/LibSource/ComplexOscillator.h
@@ -1,19 +1,22 @@
-#ifndef __QUADRATURE_OSCILLATOR_H__
-#define __QUADRATURE_OSCILLATOR_H__
+#ifndef __COMPLEX_OSCILLATOR_H__
+#define __COMPLEX_OSCILLATOR_H__
 
 #include "SignalGenerator.h"
 #include "Oscillator.h"
 #include "ComplexFloatArray.h"
 
 /**
- * A stereo oscillator is a MultiSignalGenerator with 2 channels that
+ * A complex oscillator is a MultiSignalGenerator with 2 channels that
  * operates at a given frequency and that can be frequency modulated. Output
- * signal is a complex number.
+ * signal is stereo signal.
+ * 
+ * A single sample is represented as a ComplexFloat value, while blocks
+ * of audio are stored as AudioBuffer with 2 channels.
  */
-class StereoOscillator : public MultiSignalGenerator {
+class ComplexOscillator : public MultiSignalGenerator {
 public:
-  StereoOscillator() = default;
-  virtual ~StereoOscillator() = default;
+  ComplexOscillator() = default;
+  virtual ~ComplexOscillator() = default;
   using MultiSignalGenerator::generate;
   /**
    * Set oscillator sample rate
@@ -60,5 +63,5 @@ class StereoOscillator : public MultiSignalGenerator {
 };
 
 template
-using StereoOscillatorTemplate = OscillatorTemplate;
+using ComplexOscillatorTemplate = OscillatorTemplate;
 #endif
diff --git a/LibSource/QuadratureSineOscillator.h b/LibSource/QuadratureSineOscillator.h
index b57dec8a..bc321dbd 100644
--- a/LibSource/QuadratureSineOscillator.h
+++ b/LibSource/QuadratureSineOscillator.h
@@ -1,9 +1,9 @@
 #ifndef QUADRATURE_SINE_OSCILLATOR_H
 #define QUADRATURE_SINE_OSCILLATOR_H
 
-#include "StereoOscillator.h"
+#include "ComplexOscillator.h"
 
-class QuadratureSineOscillator : public StereoOscillatorTemplate {
+class QuadratureSineOscillator : public ComplexOscillatorTemplate {
 public:
     static constexpr float begin_phase = 0;
     static constexpr float end_phase = 2 * M_PI;
@@ -33,7 +33,7 @@ class QuadratureSineOscillator : public StereoOscillatorTemplate::generate;
+    using ComplexOscillatorTemplate::generate;
 };
 
 #endif /* QUADRATURE_SINE_OSCILLATOR_H */

From 42678ea84c6e48d165435aff20a650319a43c4c2 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Mon, 12 Jul 2021 21:09:19 +0300
Subject: [PATCH 281/374] Docs

---
 LibSource/ComplexFloatArray.h | 3 +--
 LibSource/ComplexOscillator.h | 7 +++----
 2 files changed, 4 insertions(+), 6 deletions(-)

diff --git a/LibSource/ComplexFloatArray.h b/LibSource/ComplexFloatArray.h
index ff9680df..88f8f33a 100644
--- a/LibSource/ComplexFloatArray.h
+++ b/LibSource/ComplexFloatArray.h
@@ -80,13 +80,12 @@ struct ComplexFloat {
   }
 
   /**
-   * Returns complet conjugate - a copy of current number with imaginary part inverted
+   * Returns complex conjugate - a copy of current number with imaginary part inverted
    */
   ComplexFloat getComplexConjugate() const {
     return ComplexFloat {re, -im};
   }
 
-
   /**
    * Returns dot product with another complex float value
    */
diff --git a/LibSource/ComplexOscillator.h b/LibSource/ComplexOscillator.h
index 71c603aa..f55c68c5 100644
--- a/LibSource/ComplexOscillator.h
+++ b/LibSource/ComplexOscillator.h
@@ -7,11 +7,10 @@
 
 /**
  * A complex oscillator is a MultiSignalGenerator with 2 channels that
- * operates at a given frequency and that can be frequency modulated. Output
- * signal is stereo signal.
- * 
+ * operates at a given frequency and that can be frequency modulated.
+ *
  * A single sample is represented as a ComplexFloat value, while blocks
- * of audio are stored as AudioBuffer with 2 channels.
+ * of audio are stored in an AudioBuffer with 2 channels.
  */
 class ComplexOscillator : public MultiSignalGenerator {
 public:

From fab82b543cf5f6da47121837970e2282b74f7817 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Thu, 22 Jul 2021 23:06:56 +0300
Subject: [PATCH 282/374] Complex transforms

---
 LibSource/ComplexFloatArray.cpp      |  17 ++++
 LibSource/ComplexFloatArray.h        |   5 +
 LibSource/ComplexOscillator.h        |  11 +--
 LibSource/ComplexTransform.h         | 141 +++++++++++++++++++++++++++
 LibSource/QuadratureSineOscillator.h |  55 +++++++++--
 LibSource/SignalGenerator.h          |  30 ++++++
 LibSource/SignalProcessor.h          |  10 ++
 7 files changed, 251 insertions(+), 18 deletions(-)
 create mode 100644 LibSource/ComplexTransform.h

diff --git a/LibSource/ComplexFloatArray.cpp b/LibSource/ComplexFloatArray.cpp
index a88b3794..64284253 100644
--- a/LibSource/ComplexFloatArray.cpp
+++ b/LibSource/ComplexFloatArray.cpp
@@ -312,3 +312,20 @@ ComplexFloatArray ComplexFloatArray::create(size_t size){
 void ComplexFloatArray::destroy(ComplexFloatArray array){
   delete[] array.data;
 }
+
+void ComplexFloatArray::copyFrom(AudioBuffer& buffer) {
+  FloatArray left = buffer.getSamples(0);
+  FloatArray right = buffer.getSamples(1);
+  for (size_t i = 0; i < getSize(); i++) {
+    data[i] = ComplexFloat(left[i], right[i]);
+  }
+}
+
+void ComplexFloatArray::copyTo(AudioBuffer& buffer) {
+  FloatArray left = buffer.getSamples(0);
+  FloatArray right = buffer.getSamples(1);
+  for (size_t i = 0; i < getSize(); i++) {
+    left[i] = data[i].re;
+    right[i] = data[i].im;
+  }
+}
diff --git a/LibSource/ComplexFloatArray.h b/LibSource/ComplexFloatArray.h
index 88f8f33a..5792c7e3 100644
--- a/LibSource/ComplexFloatArray.h
+++ b/LibSource/ComplexFloatArray.h
@@ -2,7 +2,9 @@
 #define __ComplexFloatArray_h__
 
 #include "FloatArray.h"
+#include "AudioBuffer.h"
 #include "basicmaths.h"
+
 /**
 * A structure defining a floating point complex number as two members of type float.
 */
@@ -498,6 +500,9 @@ class ComplexFloatArray : public SimpleArray {
    * @param[out] destination The destination array.
   */
   void setMagnitude(FloatArray magnitude, int offset, size_t count, ComplexFloatArray destination);
+
+  void copyFrom(AudioBuffer& buffer);
+  void copyTo(AudioBuffer& buffer);
 };
 
 #endif // __ComplexFloatArray_h__
diff --git a/LibSource/ComplexOscillator.h b/LibSource/ComplexOscillator.h
index f55c68c5..bc819672 100644
--- a/LibSource/ComplexOscillator.h
+++ b/LibSource/ComplexOscillator.h
@@ -3,7 +3,6 @@
 
 #include "SignalGenerator.h"
 #include "Oscillator.h"
-#include "ComplexFloatArray.h"
 
 /**
  * A complex oscillator is a MultiSignalGenerator with 2 channels that
@@ -12,7 +11,7 @@
  * A single sample is represented as a ComplexFloat value, while blocks
  * of audio are stored in an AudioBuffer with 2 channels.
  */
-class ComplexOscillator : public MultiSignalGenerator {
+class ComplexOscillator : public ComplexSignalGenerator {
 public:
   ComplexOscillator() = default;
   virtual ~ComplexOscillator() = default;
@@ -50,13 +49,9 @@ class ComplexOscillator : public MultiSignalGenerator {
     return generate(0.f);
   }
   virtual ComplexFloat generate(float fm) = 0;
-  virtual void generate(AudioBuffer& output) {
-    FloatArray left = output.getSamples(0);
-    FloatArray right = output.getSamples(1);
+  virtual void generate(ComplexFloatArray output) {
     for(size_t i=0; i
+class ComplexTransformTemplate : public ComplexSignalProcessor {
+public:
+    using ComplexSignalProcessor::process;
+    ComplexTransformTemplate() {
+        memset((void*)&matrix[0][0], 0, sizeof(float) * matrix_dim * matrix_dim);
+    }
+    ComplexFloat process(ComplexFloat input) {
+        // We can avoid template specialization in C++17 thanks to if constexpr() support
+        if constexpr (matrix_dim == 2) {
+            return ComplexFloat(
+                matrix[0][0] * input.re + matrix[0][1] * input.re,
+                matrix[1][0] * input.im + matrix[1][1] * input.im);
+        }
+        else {
+            return ComplexFloat(
+                matrix[0][0] * input.re + matrix[0][1] * input.re + matrix[0][2] * input.re,
+                matrix[1][0] * input.im + matrix[1][1] * input.im + matrix[1][2] * input.im);
+        }
+    }
+    static Operation* create() {
+        return new Operation();
+    }
+    static void destroy(Operation* transform) {
+        delete transform;
+    }
+
+protected:
+    float matrix[matrix_dim][matrix_dim];
+};
+
+class Reflection2D : public ComplexTransformTemplate {
+public:
+    Reflection2D() {
+        setAngle(0);
+    }
+    void setAngle(float angle) {
+        matrix[0][0] = cos(angle * 2);
+        matrix[0][1] = sin(angle * 2);
+        matrix[1][0] = matrix[0][1];
+        matrix[1][1] = -matrix[0][0];
+    }
+};
+
+class Rotation2D : public ComplexTransformTemplate {
+public:
+    void setAngle(float angle) {
+        matrix[0][0] = cos(angle);
+        matrix[1][0] = sin(angle);
+        matrix[0][1] = -matrix[1][0];
+        matrix[1][1] = matrix[0][0];
+    }
+};
+
+class Scale2D : public ComplexTransformTemplate {
+public:
+    void setDirection(ComplexFloat vector) {
+        matrix[0][0] = vector.re;
+        matrix[1][1] = vector.im;
+    }
+    void setFactor(float factor) {
+        matrix[0][0] = factor;
+        matrix[1][1] = factor;
+    }
+};
+
+class StretchX2D : public ComplexTransformTemplate {
+public:
+    StretchX2D() {
+        matrix[1][1] = 1;
+    }
+
+    void setFactor(float scale) {
+        matrix[0][0] = scale;
+    }
+};
+
+class StretchY2D : public ComplexTransformTemplate {
+public:
+    StretchY2D() {
+        matrix[0][0] = 1;
+    }
+
+    void setFactor(float scale) {
+        matrix[1][1] = scale;
+    }
+};
+
+class Squeeze2D : public ComplexTransformTemplate {
+public:
+    void setFactor(float scale) {
+        matrix[0][0] = scale;
+        matrix[1][1] = 1.f / scale;
+    }
+};
+
+class ShearX2D : public ComplexTransformTemplate {
+public:
+    ShearX2D() {
+        matrix[0][0] = 1;
+        matrix[1][1] = 1;
+    }
+
+    void setFactor(float scale) {
+        matrix[0][1] = scale;
+    }
+};
+
+class ShearY2D : public ComplexTransformTemplate {
+public:
+    ShearY2D() {
+        matrix[0][0] = 1;
+        matrix[1][1] = 1;
+    }
+
+    void setFactor(float scale) {
+        matrix[1][0] = scale;
+    }
+};
+
+class Translate2D : public ComplexTransformTemplate {
+public:
+    Translate2D() {
+        matrix[0][0] = 1;
+        matrix[1][1] = 1;
+        matrix[2][2] = 1;
+    }
+
+    void setDirection(ComplexFloat vector) {
+        matrix[0][2] = vector.re;
+        matrix[1][2] = vector.im;
+    }
+};
+
+#endif
diff --git a/LibSource/QuadratureSineOscillator.h b/LibSource/QuadratureSineOscillator.h
index bc321dbd..f667c85e 100644
--- a/LibSource/QuadratureSineOscillator.h
+++ b/LibSource/QuadratureSineOscillator.h
@@ -10,24 +10,20 @@ class QuadratureSineOscillator : public ComplexOscillatorTemplate::generate;
 };
 
+class FeedbackQuadratureSineOscillator : public ComplexOscillatorTemplate {
+public:
+    static constexpr float begin_phase = 0;
+    static constexpr float end_phase = 2 * M_PI;
+    void setFeedback(float feedback) {
+        this->feedback = feedback;
+    }
+    ComplexFloat getSample() {
+        last_sample = ComplexFloat(
+            cosf(phase + last_sample.re * feedback), sinf(phase + last_sample.im * feedback));
+        return last_sample;
+    }
+    void generate(ComplexFloatArray output) override {
+        size_t len = output.getSize();
+        for (size_t i = 0; i < len; ++i) {
+            output[i].re = cosf(phase + last_sample.re * feedback);
+            output[i].im = sinf(phase + last_sample.im * feedback);
+            last_sample = output[i];
+            phase += incr; // allow phase to overrun
+        }
+        phase = fmodf(phase, end_phase);
+    }
+    void generate(ComplexFloatArray output, FloatArray fm) {
+        size_t len = output.getSize();
+        for (size_t i = 0; i < len; ++i) {
+            output[i].re = cosf(phase + last_sample.re * feedback);
+            output[i].im = sinf(phase + last_sample.im * feedback);
+            last_sample = output[i];
+            phase += incr * (1 + fm[i]);
+            // allow phase to overrun
+        }
+        phase = fmodf(phase, end_phase);
+    }
+    using ComplexOscillatorTemplate::generate;
+protected:
+    float feedback = 0;
+    ComplexFloat last_sample = 0;
+};
+
 #endif /* QUADRATURE_SINE_OSCILLATOR_H */
diff --git a/LibSource/SignalGenerator.h b/LibSource/SignalGenerator.h
index 004ab707..601d5185 100644
--- a/LibSource/SignalGenerator.h
+++ b/LibSource/SignalGenerator.h
@@ -2,6 +2,7 @@
 #define __SignalGenerator_h__
 
 #include "FloatArray.h"
+#include "ComplexFloatArray.h"
 #include "AudioBuffer.h"
 
 /**
@@ -25,10 +26,39 @@ class SignalGenerator {
   }
 };
 
+
 class MultiSignalGenerator {
 public:
   virtual ~MultiSignalGenerator(){}
   virtual void generate(AudioBuffer& output) = 0;
 };
 
+
+/**
+ * Base class for stereo signal generators such as Oscillators.
+ * A ComplexSignalGenerator produces complex numbers with parts
+ * in [-1..1] range unless
+ * otherwise stated.
+ */
+class ComplexSignalGenerator : public MultiSignalGenerator {
+public:
+  virtual ~ComplexSignalGenerator(){}
+  /**
+   * Produce the next consecutive sample.
+   */
+  virtual ComplexFloat generate() = 0;
+  /**
+   * Produce a block of samples
+   */
+  virtual void generate(AudioBuffer& output) override{
+    size_t size = output.getSize();
+    FloatArray left = output.getSamples(0);
+    FloatArray right = output.getSamples(1);
+    for(size_t i=0; i
Date: Thu, 22 Jul 2021 23:33:11 +0300
Subject: [PATCH 283/374] Kill remaining inheritance from multi signal

---
 LibSource/ComplexOscillator.h |  2 +-
 LibSource/SignalGenerator.h   | 10 +++-------
 2 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/LibSource/ComplexOscillator.h b/LibSource/ComplexOscillator.h
index bc819672..5052b343 100644
--- a/LibSource/ComplexOscillator.h
+++ b/LibSource/ComplexOscillator.h
@@ -15,7 +15,7 @@ class ComplexOscillator : public ComplexSignalGenerator {
 public:
   ComplexOscillator() = default;
   virtual ~ComplexOscillator() = default;
-  using MultiSignalGenerator::generate;
+  using ComplexSignalGenerator::generate;
   /**
    * Set oscillator sample rate
    */
diff --git a/LibSource/SignalGenerator.h b/LibSource/SignalGenerator.h
index 601d5185..d34bc48c 100644
--- a/LibSource/SignalGenerator.h
+++ b/LibSource/SignalGenerator.h
@@ -40,7 +40,7 @@ class MultiSignalGenerator {
  * in [-1..1] range unless
  * otherwise stated.
  */
-class ComplexSignalGenerator : public MultiSignalGenerator {
+class ComplexSignalGenerator {
 public:
   virtual ~ComplexSignalGenerator(){}
   /**
@@ -50,14 +50,10 @@ class ComplexSignalGenerator : public MultiSignalGenerator {
   /**
    * Produce a block of samples
    */
-  virtual void generate(AudioBuffer& output) override{
+  virtual void generate(ComplexFloatArray output) {
     size_t size = output.getSize();
-    FloatArray left = output.getSamples(0);
-    FloatArray right = output.getSamples(1);
     for(size_t i=0; i
Date: Mon, 26 Jul 2021 22:37:24 +0300
Subject: [PATCH 284/374] Wrong destructor call

---
 LibSource/FloatMatrix.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/FloatMatrix.cpp b/LibSource/FloatMatrix.cpp
index f346bd0e..dea7b343 100644
--- a/LibSource/FloatMatrix.cpp
+++ b/LibSource/FloatMatrix.cpp
@@ -132,9 +132,9 @@ FloatMatrix FloatMatrix::create(size_t m, size_t n){
   
  void FloatMatrix::destroy(FloatMatrix array){
 #ifdef ARM_CORTEX
-  delete array.instance.pData;
+  delete[] array.instance.pData;
 #else
-  delete array.data;
+  delete[] array.data;
 #endif
 };
 

From 0ec9b0d3e0a7556ac021bfbe19523f6801d2454b Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Mon, 26 Jul 2021 22:37:51 +0300
Subject: [PATCH 285/374] ARM matrix support added

---
 libs.mk | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/libs.mk b/libs.mk
index 73af874b..9763d09e 100644
--- a/libs.mk
+++ b/libs.mk
@@ -108,3 +108,8 @@ C_SRC += $(DSPLIB)/StatisticsFunctions/arm_var_q15.c
 
 C_SRC += $(DSPLIB)/BasicMathFunctions/arm_add_q31.c
 
+
+C_SRC += $(DSPLIB)/MatrixFunctions/arm_mat_init_f32.c
+C_SRC += $(DSPLIB)/MatrixFunctions/arm_mat_add_f32.c
+C_SRC += $(DSPLIB)/MatrixFunctions/arm_mat_mult_f32.c
+

From 3b5a18d9da8950b8fcb2593ed9ff138aa834032c Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Mon, 26 Jul 2021 23:02:19 +0300
Subject: [PATCH 286/374] Matrix copy

---
 LibSource/FloatMatrix.cpp | 11 +++++++++++
 LibSource/FloatMatrix.h   | 14 ++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/LibSource/FloatMatrix.cpp b/LibSource/FloatMatrix.cpp
index dea7b343..bed08a83 100644
--- a/LibSource/FloatMatrix.cpp
+++ b/LibSource/FloatMatrix.cpp
@@ -1,6 +1,7 @@
 #include "FloatMatrix.h"
 #include "basicmaths.h"
 #include "message.h"
+#include 
 
 #ifdef ARM_CORTEX
 FloatMatrix::FloatMatrix(){
@@ -124,6 +125,16 @@ void FloatMatrix::sigmoid(FloatMatrix destination){
     dest[i] = 1.0f / (1 + expf(-src[i]));
 }
 
+void FloatMatrix::copyTo(FloatMatrix destination) {
+  ASSERT(destination.getSize() >= getSize(), "Destination size too small");
+  memcpy((void*)destination.getData(), (void*)getData(), getSize() * sizeof(float));
+}
+
+void FloatMatrix::copyFrom(FloatMatrix source) {
+  ASSERT(getSize() >= source.getSize(), "Destination size too small");
+  memcpy((void*)getData(), (void*)source.getData(), source.getSize() * sizeof(float));
+}
+
 FloatMatrix FloatMatrix::create(size_t m, size_t n){
   FloatMatrix fm(new float[m*n], m, n);
   fm.clear();
diff --git a/LibSource/FloatMatrix.h b/LibSource/FloatMatrix.h
index 6dd60ca5..4a60fe33 100644
--- a/LibSource/FloatMatrix.h
+++ b/LibSource/FloatMatrix.h
@@ -167,6 +167,20 @@ class FloatMatrix {
     sigmoid(*this);
   }
 
+  /**
+   * Copies the content of this matrix to another matrix.
+   * The other matrix needs to be at least as big as this matrix.
+   * @param[out] destination the destination matrix
+   */
+  void copyTo(FloatMatrix destination);
+
+  /**
+   * Copies the content of another matrix into this matrix.
+   * This matrix needs to be at least as big as the other matrix.
+   * @param[in] source the source matrix
+   */
+  void copyFrom(FloatMatrix source);
+
   /**
    * Creates a new FloatMatrix.
    * Allocates rows*columns*sizeof(float) bytes of memory and returns a FloatMatrix that points to it.

From 0ffcfc1c9ee06322dd361243cea57d94c2421fbe Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Mon, 26 Jul 2021 23:03:12 +0300
Subject: [PATCH 287/374] Complex transform template

---
 LibSource/ComplexTransform.h | 287 +++++++++++++++++++++++++++++------
 1 file changed, 238 insertions(+), 49 deletions(-)

diff --git a/LibSource/ComplexTransform.h b/LibSource/ComplexTransform.h
index be764e9e..0db6a13e 100644
--- a/LibSource/ComplexTransform.h
+++ b/LibSource/ComplexTransform.h
@@ -3,43 +3,88 @@
 
 #include "basicmaths.h"
 #include "SignalProcessor.h"
+#include "FloatMatrix.h"
 
-template 
-class ComplexTransformTemplate : public ComplexSignalProcessor {
+template 
+class AbstractTransform {
 public:
-    using ComplexSignalProcessor::process;
-    ComplexTransformTemplate() {
-        memset((void*)&matrix[0][0], 0, sizeof(float) * matrix_dim * matrix_dim);
+    AbstractTransform() = default;
+    AbstractTransform(FloatMatrix matrix) {
+        this->matrix = matrix;
+        resetMatrix();
+    }
+    FloatMatrix getMatrix() {
+        return matrix;
+    }
+    void resetMatrix() {
+        matrix.clear();
+        for (size_t i = 0; i < matrix_order; i++) {
+            matrix[i][i] = 1;
+        }
     }
+protected:
+    FloatMatrix matrix;
+};
+
+template 
+class ComplexTransformTemplate : public AbstractTransform,
+                                 public ComplexSignalProcessor {
+public:
+    using AbstractTransform::AbstractTransform;
+    using AbstractTransform::matrix;
+    using ComplexSignalProcessor::process;
+
+
+
     ComplexFloat process(ComplexFloat input) {
-        // We can avoid template specialization in C++17 thanks to if constexpr() support
-        if constexpr (matrix_dim == 2) {
+        if constexpr (matrix_order == 2) {
+            return ComplexFloat(input.re * matrix[0][0] + input.im * matrix[0][1],
+                input.re * matrix[1][0] + input.im * matrix[1][1]);
+        }
+        else if constexpr (matrix_order == 3) {
             return ComplexFloat(
-                matrix[0][0] * input.re + matrix[0][1] * input.re,
-                matrix[1][0] * input.im + matrix[1][1] * input.im);
+                input.re * matrix[0][0] + input.im * matrix[0][1] + matrix[0][2],
+                input.re * matrix[1][0] + input.im * matrix[1][1] + matrix[1][2]);
+        }
+        else if constexpr (matrix_order > 3) {
+            ComplexFloat result {
+                input.re * matrix[0][0] + input.im * matrix[0][1],
+                input.re * matrix[1][0] + input.im * matrix[1][1]};
+            for (size_t i = 2; i < matrix_order; i++) {
+                input.re += matrix[0][i];
+                input.im += matrix[0][i];
+            }
         }
         else {
-            return ComplexFloat(
-                matrix[0][0] * input.re + matrix[0][1] * input.re + matrix[0][2] * input.re,
-                matrix[1][0] * input.im + matrix[1][1] * input.im + matrix[1][2] * input.im);
+            return ComplexFloat {};
         }
     }
+
     static Operation* create() {
-        return new Operation();
+        FloatMatrix matrix = FloatMatrix::create(matrix_order, matrix_order);
+        Operation* op = new Operation(matrix);
+        return op;
     }
     static void destroy(Operation* transform) {
+        FloatMatrix::destroy(transform->matrix);
         delete transform;
     }
-
-protected:
-    float matrix[matrix_dim][matrix_dim];
 };
 
-class Reflection2D : public ComplexTransformTemplate {
+class LinearReflection2D : public ComplexTransformTemplate<2, LinearReflection2D> {
 public:
-    Reflection2D() {
-        setAngle(0);
+    using ComplexTransformTemplate<2, LinearReflection2D>::ComplexTransformTemplate;
+    void setAngle(float angle) {
+        matrix[0][0] = cos(angle * 2);
+        matrix[1][0] = sin(angle * 2);
+        matrix[0][1] = matrix[0][1];
+        matrix[1][1] = -matrix[0][0];
     }
+};
+
+class AffineReflection2D : public ComplexTransformTemplate<3, AffineReflection2D> {
+public:
+    using ComplexTransformTemplate<3, AffineReflection2D>::ComplexTransformTemplate;
     void setAngle(float angle) {
         matrix[0][0] = cos(angle * 2);
         matrix[0][1] = sin(angle * 2);
@@ -48,8 +93,20 @@ class Reflection2D : public ComplexTransformTemplate {
     }
 };
 
-class Rotation2D : public ComplexTransformTemplate {
+class LinearRotation2D : public ComplexTransformTemplate<2, LinearRotation2D> {
+public:
+    using ComplexTransformTemplate<2, LinearRotation2D>::ComplexTransformTemplate;
+    void setAngle(float angle) {
+        matrix[0][0] = cos(angle);
+        matrix[1][0] = sin(angle);
+        matrix[0][1] = -matrix[1][0];
+        matrix[1][1] = matrix[0][0];
+    }
+};
+
+class AffineRotation2D : public ComplexTransformTemplate<3, AffineRotation2D> {
 public:
+    using ComplexTransformTemplate<3, AffineRotation2D>::ComplexTransformTemplate;
     void setAngle(float angle) {
         matrix[0][0] = cos(angle);
         matrix[1][0] = sin(angle);
@@ -58,8 +115,9 @@ class Rotation2D : public ComplexTransformTemplate {
     }
 };
 
-class Scale2D : public ComplexTransformTemplate {
+class LinearScale2D : public ComplexTransformTemplate<2, LinearScale2D> {
 public:
+    using ComplexTransformTemplate<2, LinearScale2D>::ComplexTransformTemplate;
     void setDirection(ComplexFloat vector) {
         matrix[0][0] = vector.re;
         matrix[1][1] = vector.im;
@@ -70,72 +128,203 @@ class Scale2D : public ComplexTransformTemplate {
     }
 };
 
-class StretchX2D : public ComplexTransformTemplate {
+class AffineScale2D : public ComplexTransformTemplate<3, AffineScale2D> {
 public:
-    StretchX2D() {
-        matrix[1][1] = 1;
+    using ComplexTransformTemplate<3, AffineScale2D>::ComplexTransformTemplate;
+    void setDirection(ComplexFloat vector) {
+        matrix[0][0] = vector.re;
+        matrix[1][1] = vector.im;
     }
-
-    void setFactor(float scale) {
-        matrix[0][0] = scale;
+    void setFactor(float factor) {
+        matrix[0][0] = factor;
+        matrix[1][1] = factor;
     }
 };
 
-class StretchY2D : public ComplexTransformTemplate {
+class LinearStretch2D : public ComplexTransformTemplate<2, LinearStretch2D> {
 public:
-    StretchY2D() {
-        matrix[0][0] = 1;
+    using ComplexTransformTemplate<2, LinearStretch2D>::ComplexTransformTemplate;
+    void setDirection(ComplexFloat vector) {
+        matrix[0][0] = vector.re;
+        matrix[1][1] = vector.im;
     }
+};
 
-    void setFactor(float scale) {
-        matrix[1][1] = scale;
+class AffineStretch2D : public ComplexTransformTemplate<3, AffineStretch2D> {
+public:
+    using ComplexTransformTemplate<3, AffineStretch2D>::ComplexTransformTemplate;
+    void setDirection(ComplexFloat vector) {
+        matrix[0][0] = vector.re;
+        matrix[1][1] = vector.im;
     }
 };
 
-class Squeeze2D : public ComplexTransformTemplate {
+class LinearSqueeze2D : public ComplexTransformTemplate<2, LinearSqueeze2D> {
 public:
+    using ComplexTransformTemplate<2, LinearSqueeze2D>::ComplexTransformTemplate;
     void setFactor(float scale) {
         matrix[0][0] = scale;
         matrix[1][1] = 1.f / scale;
     }
 };
 
-class ShearX2D : public ComplexTransformTemplate {
+class LinearShearX2D : public ComplexTransformTemplate<2, LinearShearX2D> {
 public:
-    ShearX2D() {
-        matrix[0][0] = 1;
-        matrix[1][1] = 1;
+    using ComplexTransformTemplate<2, LinearShearX2D>::ComplexTransformTemplate;
+    void setFactor(float scale) {
+        matrix[0][1] = scale;
     }
+};
 
+class AffineShearX2D : public ComplexTransformTemplate<3, AffineShearX2D> {
+public:
+    using ComplexTransformTemplate<3, AffineShearX2D>::ComplexTransformTemplate;
     void setFactor(float scale) {
         matrix[0][1] = scale;
     }
 };
 
-class ShearY2D : public ComplexTransformTemplate {
+class LinearShearY2D : public ComplexTransformTemplate<2, LinearShearY2D> {
 public:
-    ShearY2D() {
-        matrix[0][0] = 1;
-        matrix[1][1] = 1;
+    using ComplexTransformTemplate<2, LinearShearY2D>::ComplexTransformTemplate;
+    void setFactor(float scale) {
+        matrix[1][0] = scale;
     }
+};
 
+class AffineShearY2D : public ComplexTransformTemplate<3, AffineShearY2D> {
+public:
+    using ComplexTransformTemplate<3, AffineShearY2D>::ComplexTransformTemplate;
     void setFactor(float scale) {
         matrix[1][0] = scale;
     }
 };
 
-class Translate2D : public ComplexTransformTemplate {
+class AffineTranslate2D : public ComplexTransformTemplate<3, AffineTranslate2D> {
 public:
-    Translate2D() {
-        matrix[0][0] = 1;
-        matrix[1][1] = 1;
-        matrix[2][2] = 1;
+    using ComplexTransformTemplate<3, AffineTranslate2D>::ComplexTransformTemplate;
+    void setDirection(ComplexFloat vector) {
+        matrix[2][0] = vector.re;
+        matrix[2][1] = vector.im;
     }
+};
 
-    void setDirection(ComplexFloat vector) {
-        matrix[0][2] = vector.re;
-        matrix[1][2] = vector.im;
+template 
+class CompositeTransform
+    : public ComplexTransformTemplate> {
+public:
+    using BaseTransform = AbstractTransform;
+    using BaseTransform::getMatrix;
+    using BaseTransform::matrix;
+
+    CompositeTransform(FloatMatrix matrix, size_t num_transforms, BaseTransform** transforms)
+        : ComplexTransformTemplate>(matrix)
+        , transforms(transforms)
+        , num_transforms(num_transforms) {
+    }
+
+    void process(ComplexFloatArray input, ComplexFloatArray output) {
+        computeMatrix();
+        ComplexTransformTemplate>::process(
+            input, output);
+    }
+    void computeMatrix() {
+        FloatMatrix m = this->matrix;
+        m.copyFrom(transforms[0]->getMatrix());
+        for (size_t i = 1; i < num_transforms; i++) {
+            m.multiply(transforms[i]->getMatrix());
+        }
+    }
+
+    void setTransform(size_t position, BaseTransform* transform) {
+        transforms[position] = transform;
+    }
+
+    static CompositeTransform* create(size_t transforms) {
+        FloatMatrix matrix = FloatMatrix::create(matrix_order, matrix_order);
+        BaseTransform** transform_pointers = new BaseTransform*[transforms];
+        return new CompositeTransform(matrix, transforms, transform_pointers);
+    }
+
+    static void destroy(CompositeTransform* transform) {
+        FloatMatrix::destroy(transform->matrix);
+        delete[] transform->transforms;
+        delete transform;
     }
+
+protected:
+    BaseTransform** transforms;
+    size_t num_transforms;
+};
+
+template 
+class InterpolatedCompositeTransform
+    : public ComplexTransformTemplate> {
+public:
+    using BaseTransform = AbstractTransform;
+    using BaseTransform::getMatrix;
+    using BaseTransform::matrix;
+    using ComplexTransformTemplate>::process;
+
+    InterpolatedCompositeTransform(FloatMatrix matrix, FloatMatrix prev_matrix,
+        FloatMatrix delta, size_t num_transforms, BaseTransform** transforms)
+        : ComplexTransformTemplate>(matrix)
+        , transforms(transforms)
+        , num_transforms(num_transforms)
+        , prev_matrix(prev_matrix)
+        , delta(delta) {
+    }
+
+    void process(ComplexFloatArray input, ComplexFloatArray output) {
+        computeMatrix();
+        float mult = 1.f / input.getSize();
+        for (size_t i = 0; i < matrix_order; i++) {
+            for (size_t j = 0; j < matrix_order; j++) {
+                delta[i][j] = (matrix[i][j] - prev_matrix[i][j]) * mult;
+            }
+        }
+
+        matrix.copyFrom(prev_matrix);
+        for (size_t i = 0; i < input.getSize(); i++) {
+            matrix.add(delta);
+            output[i] = process(input[i]);
+        }
+        prev_matrix.copyFrom(matrix);
+    }
+    void computeMatrix() {
+        FloatMatrix m = this->matrix;
+
+        m.copyFrom(transforms[num_transforms - 1]->getMatrix());
+        for (int i = num_transforms - 2; i >= 0; i--) {
+            m.multiply(transforms[i]->getMatrix());
+        }
+    }
+
+    void setTransform(size_t position, BaseTransform* transform) {
+        transforms[position] = transform;
+    }
+
+    static InterpolatedCompositeTransform* create(size_t transforms) {
+        FloatMatrix matrix = FloatMatrix::create(matrix_order, matrix_order);
+        BaseTransform** transform_pointers = new BaseTransform*[transforms];
+        FloatMatrix prev_matrix = FloatMatrix::create(matrix_order, matrix_order);
+        FloatMatrix delta = FloatMatrix::create(matrix_order, matrix_order);
+        return new InterpolatedCompositeTransform(
+            matrix, prev_matrix, delta, transforms, transform_pointers);
+    }
+
+    static void destroy(InterpolatedCompositeTransform* transform) {
+        FloatMatrix::destroy(transform->matrix);
+        FloatMatrix::destroy(transform->prev_matrix);
+        FloatMatrix::destroy(transform->delta);
+        delete[] transform->transforms;
+        delete transform;
+    }
+
+protected:
+    BaseTransform** transforms;
+    size_t num_transforms;
+    FloatMatrix prev_matrix, delta;
 };
 
 #endif

From e40e027c30a26fd102ea2542dcce952e27313c66 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Sun, 1 Aug 2021 17:25:05 +0300
Subject: [PATCH 288/374] Refactored matrices

---
 LibSource/ComplexTransform.h | 330 +++++++++++++++++++----------------
 1 file changed, 175 insertions(+), 155 deletions(-)

diff --git a/LibSource/ComplexTransform.h b/LibSource/ComplexTransform.h
index 0db6a13e..ff6298f2 100644
--- a/LibSource/ComplexTransform.h
+++ b/LibSource/ComplexTransform.h
@@ -6,10 +6,10 @@
 #include "FloatMatrix.h"
 
 template 
-class AbstractTransform {
+class AbstractMatrix {
 public:
-    AbstractTransform() = default;
-    AbstractTransform(FloatMatrix matrix) {
+    AbstractMatrix() = default;
+    AbstractMatrix(FloatMatrix matrix) {
         this->matrix = matrix;
         resetMatrix();
     }
@@ -22,20 +22,22 @@ class AbstractTransform {
             matrix[i][i] = 1;
         }
     }
+
 protected:
     FloatMatrix matrix;
 };
 
+/**
+ * This template creates classes that can manage a single transformation matrix
+ **/
 template 
-class ComplexTransformTemplate : public AbstractTransform,
-                                 public ComplexSignalProcessor {
+class TransformationMatrix : public AbstractMatrix,
+                             public ComplexSignalProcessor {
 public:
-    using AbstractTransform::AbstractTransform;
-    using AbstractTransform::matrix;
+    using AbstractMatrix::AbstractMatrix;
+    using AbstractMatrix::matrix;
     using ComplexSignalProcessor::process;
 
-
-
     ComplexFloat process(ComplexFloat input) {
         if constexpr (matrix_order == 2) {
             return ComplexFloat(input.re * matrix[0][0] + input.im * matrix[0][1],
@@ -47,9 +49,8 @@ class ComplexTransformTemplate : public AbstractTransform,
                 input.re * matrix[1][0] + input.im * matrix[1][1] + matrix[1][2]);
         }
         else if constexpr (matrix_order > 3) {
-            ComplexFloat result {
-                input.re * matrix[0][0] + input.im * matrix[0][1],
-                input.re * matrix[1][0] + input.im * matrix[1][1]};
+            ComplexFloat result { input.re * matrix[0][0] + input.im * matrix[0][1],
+                input.re * matrix[1][0] + input.im * matrix[1][1] };
             for (size_t i = 2; i < matrix_order; i++) {
                 input.re += matrix[0][i];
                 input.im += matrix[0][i];
@@ -59,11 +60,9 @@ class ComplexTransformTemplate : public AbstractTransform,
             return ComplexFloat {};
         }
     }
-
     static Operation* create() {
         FloatMatrix matrix = FloatMatrix::create(matrix_order, matrix_order);
-        Operation* op = new Operation(matrix);
-        return op;
+        return new Operation(matrix);
     }
     static void destroy(Operation* transform) {
         FloatMatrix::destroy(transform->matrix);
@@ -71,162 +70,168 @@ class ComplexTransformTemplate : public AbstractTransform,
     }
 };
 
-class LinearReflection2D : public ComplexTransformTemplate<2, LinearReflection2D> {
+template 
+class Rotation2D
+    : public TransformationMatrix> {
 public:
-    using ComplexTransformTemplate<2, LinearReflection2D>::ComplexTransformTemplate;
-    void setAngle(float angle) {
-        matrix[0][0] = cos(angle * 2);
-        matrix[1][0] = sin(angle * 2);
-        matrix[0][1] = matrix[0][1];
-        matrix[1][1] = -matrix[0][0];
+    using TransformationMatrix>::TransformationMatrix;
+    void rotate(float angle) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
+        matrix[0][0] = cos(angle);
+        matrix[1][0] = sin(angle);
+    }
+    void rotate(ComplexFloat angle) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
+        matrix[0][0] = angle.re;
+        matrix[1][0] = angle.im;
     }
 };
 
-class AffineReflection2D : public ComplexTransformTemplate<3, AffineReflection2D> {
+using LinearRotation2D = Rotation2D<2>;
+using AffineRotation2D = Rotation2D<3>;
+
+template 
+class Reflection2D
+    : public TransformationMatrix> {
 public:
-    using ComplexTransformTemplate<3, AffineReflection2D>::ComplexTransformTemplate;
-    void setAngle(float angle) {
+    using TransformationMatrix>::TransformationMatrix;
+    void reflect(float angle) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
         matrix[0][0] = cos(angle * 2);
         matrix[0][1] = sin(angle * 2);
-        matrix[1][0] = matrix[0][1];
-        matrix[1][1] = -matrix[0][0];
     }
 };
 
-class LinearRotation2D : public ComplexTransformTemplate<2, LinearRotation2D> {
-public:
-    using ComplexTransformTemplate<2, LinearRotation2D>::ComplexTransformTemplate;
-    void setAngle(float angle) {
-        matrix[0][0] = cos(angle);
-        matrix[1][0] = sin(angle);
-        matrix[0][1] = -matrix[1][0];
-        matrix[1][1] = matrix[0][0];
-    }
-};
-
-class AffineRotation2D : public ComplexTransformTemplate<3, AffineRotation2D> {
-public:
-    using ComplexTransformTemplate<3, AffineRotation2D>::ComplexTransformTemplate;
-    void setAngle(float angle) {
-        matrix[0][0] = cos(angle);
-        matrix[1][0] = sin(angle);
-        matrix[0][1] = -matrix[1][0];
-        matrix[1][1] = matrix[0][0];
-    }
-};
+using LinearReflection2D = Reflection2D<2>;
+using AffineReflection2D = Reflection2D<3>;
 
-class LinearScale2D : public ComplexTransformTemplate<2, LinearScale2D> {
+template 
+class Scale2D : public TransformationMatrix> {
 public:
-    using ComplexTransformTemplate<2, LinearScale2D>::ComplexTransformTemplate;
-    void setDirection(ComplexFloat vector) {
+    using TransformationMatrix>::TransformationMatrix;
+    void scale(ComplexFloat vector) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
         matrix[0][0] = vector.re;
         matrix[1][1] = vector.im;
     }
-    void setFactor(float factor) {
+    void scale(float factor) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
         matrix[0][0] = factor;
         matrix[1][1] = factor;
     }
 };
 
-class AffineScale2D : public ComplexTransformTemplate<3, AffineScale2D> {
-public:
-    using ComplexTransformTemplate<3, AffineScale2D>::ComplexTransformTemplate;
-    void setDirection(ComplexFloat vector) {
-        matrix[0][0] = vector.re;
-        matrix[1][1] = vector.im;
-    }
-    void setFactor(float factor) {
-        matrix[0][0] = factor;
-        matrix[1][1] = factor;
-    }
-};
+using LinearScale2D = Scale2D<2>;
+using AffineScale2D = Scale2D<3>;
 
-class LinearStretch2D : public ComplexTransformTemplate<2, LinearStretch2D> {
+template 
+class Stretch2D
+    : public TransformationMatrix> {
 public:
-    using ComplexTransformTemplate<2, LinearStretch2D>::ComplexTransformTemplate;
-    void setDirection(ComplexFloat vector) {
-        matrix[0][0] = vector.re;
-        matrix[1][1] = vector.im;
+    using TransformationMatrix>::TransformationMatrix;
+    void stretch(ComplexFloat vector) {
+        stretch(vector.re, vector.im);
     }
-};
-
-class AffineStretch2D : public ComplexTransformTemplate<3, AffineStretch2D> {
-public:
-    using ComplexTransformTemplate<3, AffineStretch2D>::ComplexTransformTemplate;
-    void setDirection(ComplexFloat vector) {
-        matrix[0][0] = vector.re;
-        matrix[1][1] = vector.im;
+    void stretch(float re, float im) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
+        matrix[0][0] = re;
+        matrix[1][1] = im;
     }
 };
 
-class LinearSqueeze2D : public ComplexTransformTemplate<2, LinearSqueeze2D> {
+using LinearStretch2D = Stretch2D<2>;
+using AffineStretch2D = Stretch2D<3>;
+
+template 
+class Squeeze2D
+    : public TransformationMatrix> {
 public:
-    using ComplexTransformTemplate<2, LinearSqueeze2D>::ComplexTransformTemplate;
-    void setFactor(float scale) {
+    using TransformationMatrix>::TransformationMatrix;
+    void squeeze(float scale) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
         matrix[0][0] = scale;
         matrix[1][1] = 1.f / scale;
     }
 };
 
-class LinearShearX2D : public ComplexTransformTemplate<2, LinearShearX2D> {
-public:
-    using ComplexTransformTemplate<2, LinearShearX2D>::ComplexTransformTemplate;
-    void setFactor(float scale) {
-        matrix[0][1] = scale;
-    }
-};
+using LinearSqueeze2D = Squeeze2D<2>;
+using AffineSqueeze2D = Squeeze2D<3>;
 
-class AffineShearX2D : public ComplexTransformTemplate<3, AffineShearX2D> {
+template 
+class Shear2D : public TransformationMatrix> {
 public:
-    using ComplexTransformTemplate<3, AffineShearX2D>::ComplexTransformTemplate;
-    void setFactor(float scale) {
+    using TransformationMatrix>::TransformationMatrix;
+    void shearX(float scale) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
         matrix[0][1] = scale;
     }
-};
-
-class LinearShearY2D : public ComplexTransformTemplate<2, LinearShearY2D> {
-public:
-    using ComplexTransformTemplate<2, LinearShearY2D>::ComplexTransformTemplate;
-    void setFactor(float scale) {
+    void shearY(float scale) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
         matrix[1][0] = scale;
     }
 };
 
-class AffineShearY2D : public ComplexTransformTemplate<3, AffineShearY2D> {
-public:
-    using ComplexTransformTemplate<3, AffineShearY2D>::ComplexTransformTemplate;
-    void setFactor(float scale) {
-        matrix[1][0] = scale;
-    }
-};
+using LinearShear2D = Shear2D<2>;
+using AffineShear2D = Shear2D<3>;
 
-class AffineTranslate2D : public ComplexTransformTemplate<3, AffineTranslate2D> {
+template 
+class Translation2D
+    : public TransformationMatrix> {
 public:
-    using ComplexTransformTemplate<3, AffineTranslate2D>::ComplexTransformTemplate;
-    void setDirection(ComplexFloat vector) {
-        matrix[2][0] = vector.re;
-        matrix[2][1] = vector.im;
+    using TransformationMatrix>::TransformationMatrix;
+    // template 
+    typename std::enable_if::type translate(ComplexFloat vector) {
+        translate(vector.re, vector.im);
+    }
+    typename std::enable_if::type translate(float re, float im) {
+        FloatMatrix matrix =
+            static_cast*>(this)->getMatrix();
+        matrix[0][2] = re;
+        matrix[1][2] = im;
     }
 };
-
+/**
+ * Unlike other operations, translation can't be performed with matrix order below 3
+ **/
+using AffineTranslation2D = Translation2D<3>;
+
+/**
+ * Composite transform can apply a sequence of transformation matrices. Block based version
+ * calculates final transformation matrix just once per blocck rather than for every sample.
+ **/
 template 
 class CompositeTransform
-    : public ComplexTransformTemplate> {
+    : public TransformationMatrix> {
+private:
+    using MatrixType = AbstractMatrix;
+
 public:
-    using BaseTransform = AbstractTransform;
-    using BaseTransform::getMatrix;
-    using BaseTransform::matrix;
+    using TransformationMatrix>::process;
 
-    CompositeTransform(FloatMatrix matrix, size_t num_transforms, BaseTransform** transforms)
-        : ComplexTransformTemplate>(matrix)
+    CompositeTransform() = default;
+    CompositeTransform(FloatMatrix matrix, size_t num_transforms, MatrixType** transforms)
+        : TransformationMatrix>(matrix)
         , transforms(transforms)
         , num_transforms(num_transforms) {
     }
 
+    ComplexFloat process(ComplexFloat input) {
+        computeMatrix();
+        return TransformationMatrix>::process(input);
+    }
+
     void process(ComplexFloatArray input, ComplexFloatArray output) {
         computeMatrix();
-        ComplexTransformTemplate>::process(
-            input, output);
+        TransformationMatrix>::process(input, output);
     }
     void computeMatrix() {
         FloatMatrix m = this->matrix;
@@ -236,16 +241,13 @@ class CompositeTransform
         }
     }
 
-    void setTransform(size_t position, BaseTransform* transform) {
-        transforms[position] = transform;
-    }
-
-    static CompositeTransform* create(size_t transforms) {
+    template 
+    static CompositeTransform* create(Transforms*... transform_ptrs) {
         FloatMatrix matrix = FloatMatrix::create(matrix_order, matrix_order);
-        BaseTransform** transform_pointers = new BaseTransform*[transforms];
-        return new CompositeTransform(matrix, transforms, transform_pointers);
+        MatrixType** transforms = new MatrixType*[sizeof...(Transforms)];
+        setTransform(transforms, 0, transform_ptrs...);
+        return new CompositeTransform(matrix, sizeof...(Transforms), transforms);
     }
-
     static void destroy(CompositeTransform* transform) {
         FloatMatrix::destroy(transform->matrix);
         delete[] transform->transforms;
@@ -253,78 +255,96 @@ class CompositeTransform
     }
 
 protected:
-    BaseTransform** transforms;
+    MatrixType** transforms;
     size_t num_transforms;
+
+    template 
+    static void setTransform(MatrixType** transforms, size_t position,
+        MatrixType* transform, Transforms*... transform_ptrs) {
+        transforms[position] = transform;
+        setTransform(transforms, position + 1, transform_ptrs...);
+    }
+    static void setTransform(MatrixType** transforms, size_t position) {
+    }
 };
 
+/**
+ * This class calculates transformation matrix once per audio block just like the CompositeTemplate.
+ * In addition to that it calculates second matrix with delta values used to smoothly interpolate
+ * between matrix states at audio rate. This adds one matrix addition per sample
+ **/
 template 
 class InterpolatedCompositeTransform
-    : public ComplexTransformTemplate> {
+    : public TransformationMatrix> {
+private:
+    using MatrixType = AbstractMatrix;
+    using MatrixType::matrix;
+
 public:
-    using BaseTransform = AbstractTransform;
-    using BaseTransform::getMatrix;
-    using BaseTransform::matrix;
-    using ComplexTransformTemplate>::process;
+    using TransformationMatrix>::process;
 
     InterpolatedCompositeTransform(FloatMatrix matrix, FloatMatrix prev_matrix,
-        FloatMatrix delta, size_t num_transforms, BaseTransform** transforms)
-        : ComplexTransformTemplate>(matrix)
+        FloatMatrix delta_matrix, size_t num_transforms, MatrixType** transforms)
+        : TransformationMatrix>(
+              matrix)
         , transforms(transforms)
         , num_transforms(num_transforms)
         , prev_matrix(prev_matrix)
-        , delta(delta) {
+        , delta_matrix(delta_matrix) {
     }
-
     void process(ComplexFloatArray input, ComplexFloatArray output) {
         computeMatrix();
         float mult = 1.f / input.getSize();
         for (size_t i = 0; i < matrix_order; i++) {
             for (size_t j = 0; j < matrix_order; j++) {
-                delta[i][j] = (matrix[i][j] - prev_matrix[i][j]) * mult;
+                delta_matrix[i][j] = (matrix[i][j] - prev_matrix[i][j]) * mult;
             }
         }
-
         matrix.copyFrom(prev_matrix);
         for (size_t i = 0; i < input.getSize(); i++) {
-            matrix.add(delta);
-            output[i] = process(input[i]);
+            matrix.add(delta_matrix);
+            output[i] = this->process(input[i]);
         }
         prev_matrix.copyFrom(matrix);
     }
     void computeMatrix() {
         FloatMatrix m = this->matrix;
-
         m.copyFrom(transforms[num_transforms - 1]->getMatrix());
         for (int i = num_transforms - 2; i >= 0; i--) {
             m.multiply(transforms[i]->getMatrix());
         }
     }
-
-    void setTransform(size_t position, BaseTransform* transform) {
-        transforms[position] = transform;
-    }
-
-    static InterpolatedCompositeTransform* create(size_t transforms) {
+    template 
+    static InterpolatedCompositeTransform* create(Transforms*... transform_ptrs) {
         FloatMatrix matrix = FloatMatrix::create(matrix_order, matrix_order);
-        BaseTransform** transform_pointers = new BaseTransform*[transforms];
         FloatMatrix prev_matrix = FloatMatrix::create(matrix_order, matrix_order);
-        FloatMatrix delta = FloatMatrix::create(matrix_order, matrix_order);
-        return new InterpolatedCompositeTransform(
-            matrix, prev_matrix, delta, transforms, transform_pointers);
+        FloatMatrix delta_matrix = FloatMatrix::create(matrix_order, matrix_order);
+        MatrixType** transforms = new MatrixType*[sizeof...(Transforms)];
+        setTransform(transforms, 0, transform_ptrs...);
+        return new InterpolatedCompositeTransform(matrix, prev_matrix,
+            delta_matrix, sizeof...(Transforms), transforms);
     }
-
     static void destroy(InterpolatedCompositeTransform* transform) {
         FloatMatrix::destroy(transform->matrix);
         FloatMatrix::destroy(transform->prev_matrix);
-        FloatMatrix::destroy(transform->delta);
+        FloatMatrix::destroy(transform->delta_matrix);
         delete[] transform->transforms;
         delete transform;
     }
 
 protected:
-    BaseTransform** transforms;
+    MatrixType** transforms;
     size_t num_transforms;
-    FloatMatrix prev_matrix, delta;
-};
+    FloatMatrix prev_matrix, delta_matrix;
 
+    template 
+    static void setTransform(MatrixType** transforms, size_t position,
+        MatrixType* transform, Transforms*... transform_ptrs) {
+        transforms[position] = transform;
+        setTransform(transforms, position + 1, transform_ptrs...);
+    }
+
+    static void setTransform(MatrixType** transforms, size_t position) {
+    }
+};
 #endif

From 47192328afc9c9f162574717d5e3f269527f7ce4 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Sun, 17 Oct 2021 18:50:23 +0300
Subject: [PATCH 289/374] Fixes according to github discussion

---
 LibSource/ComplexFloatArray.cpp               | 14 +++++-------
 LibSource/ComplexFloatArray.h                 | 22 ++++++++++++++-----
 .../QuadratureSineOscillatorTestPatch.hpp     | 10 +++++----
 3 files changed, 28 insertions(+), 18 deletions(-)

diff --git a/LibSource/ComplexFloatArray.cpp b/LibSource/ComplexFloatArray.cpp
index 64284253..901a7465 100644
--- a/LibSource/ComplexFloatArray.cpp
+++ b/LibSource/ComplexFloatArray.cpp
@@ -313,19 +313,15 @@ void ComplexFloatArray::destroy(ComplexFloatArray array){
   delete[] array.data;
 }
 
-void ComplexFloatArray::copyFrom(AudioBuffer& buffer) {
-  FloatArray left = buffer.getSamples(0);
-  FloatArray right = buffer.getSamples(1);
+void ComplexFloatArray::copyFrom(FloatArray real, FloatArray imag) {
   for (size_t i = 0; i < getSize(); i++) {
-    data[i] = ComplexFloat(left[i], right[i]);
+    data[i] = ComplexFloat(real[i], imag[i]);
   }
 }
 
-void ComplexFloatArray::copyTo(AudioBuffer& buffer) {
-  FloatArray left = buffer.getSamples(0);
-  FloatArray right = buffer.getSamples(1);
+void ComplexFloatArray::copyTo(FloatArray real, FloatArray imag) {
   for (size_t i = 0; i < getSize(); i++) {
-    left[i] = data[i].re;
-    right[i] = data[i].im;
+    real[i] = data[i].re;
+    imag[i] = data[i].im;
   }
 }
diff --git a/LibSource/ComplexFloatArray.h b/LibSource/ComplexFloatArray.h
index 5792c7e3..7d6ced82 100644
--- a/LibSource/ComplexFloatArray.h
+++ b/LibSource/ComplexFloatArray.h
@@ -2,7 +2,6 @@
 #define __ComplexFloatArray_h__
 
 #include "FloatArray.h"
-#include "AudioBuffer.h"
 #include "basicmaths.h"
 
 /**
@@ -133,7 +132,6 @@ struct ComplexFloat {
 
   ComplexFloat& operator+=(float other) {
     re += other;
-    im += other;
     return *this;
   }
 
@@ -157,7 +155,6 @@ struct ComplexFloat {
 
   ComplexFloat& operator-=(float other) {
     re -= other;
-    im -= other;
     return *this;
   }
 
@@ -501,8 +498,23 @@ class ComplexFloatArray : public SimpleArray {
   */
   void setMagnitude(FloatArray magnitude, int offset, size_t count, ComplexFloatArray destination);
 
-  void copyFrom(AudioBuffer& buffer);
-  void copyTo(AudioBuffer& buffer);
+  using SimpleArray::copyFrom;
+  using SimpleArray::copyTo;
+  /**
+   * Merge two channels of audio containing real and imaginary axis data into this array
+   * 
+   * @param[in] real Real axis data
+   * @param[in] imag Imaginary axis data
+  */
+  void copyFrom(FloatArray real, FloatArray imag);
+
+  /**
+   * Split complex data into two channels of audio containing real and imaginary axis data
+   * 
+   * @param[in] real Real axis data
+   * @param[in] imag Imaginary axis data
+  */
+  void copyTo(FloatArray real, FloatArray imag);
 };
 
 #endif // __ComplexFloatArray_h__
diff --git a/TestPatches/QuadratureSineOscillatorTestPatch.hpp b/TestPatches/QuadratureSineOscillatorTestPatch.hpp
index afcf5ce7..d2049551 100644
--- a/TestPatches/QuadratureSineOscillatorTestPatch.hpp
+++ b/TestPatches/QuadratureSineOscillatorTestPatch.hpp
@@ -43,7 +43,9 @@ class QuadratureSineOscillatorTestPatch : public TestPatch {
       osc2->setFrequency(480);      
       AudioBuffer* s1 = AudioBuffer::create(2, 1000);
       AudioBuffer* s2 = AudioBuffer::create(2, 1000);
-      osc1->generate(*s1);
+      ComplexFloatArray cmp = ComplexFloatArray::create(1000);
+      osc1->generate(cmp);
+      cmp.copyTo(s1->getSamples(0), s2->getSamples(1));
       for(size_t i=0; i<1000; ++i) {
         ComplexFloat sample = osc2->generate();
         s2->getSamples(0)[i] = sample.re;
@@ -53,15 +55,15 @@ class QuadratureSineOscillatorTestPatch : public TestPatch {
         CHECK_CLOSE(s1->getSamples(0)[i], s2->getSamples(0)[i], 0.00002);
         CHECK_CLOSE(s1->getSamples(1)[i], s2->getSamples(1)[i], 0.00002);
       }
-      osc1->generate(*s1);
+      osc1->generate(cmp);
       for(size_t i=0; i<1000; ++i) {
         ComplexFloat sample = osc2->generate();
         s2->getSamples(0)[i] = sample.re;
         s2->getSamples(1)[i] = sample.im;
       }
       for(size_t i=0; i<1000; ++i) {
-        CHECK_CLOSE(s1->getSamples(0)[i], s2->getSamples(0)[i], 0.00002);
-        CHECK_CLOSE(s1->getSamples(1)[i], s2->getSamples(1)[i], 0.00002);
+        CHECK_CLOSE(cmp[i].re, s2->getSamples(0)[i], 0.00002);
+        CHECK_CLOSE(cmp[i].im, s2->getSamples(1)[i], 0.00002);
       }
       AudioBuffer::destroy(s1);      
       AudioBuffer::destroy(s2);      

From 0e4402efaa95b5e01937990a91ac9b4aa2226c9a Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Sun, 17 Oct 2021 18:53:00 +0300
Subject: [PATCH 290/374] Some more docs and quadrature oscillator with complex
 feedback

---
 LibSource/ComplexOscillator.h        | 14 +++---
 LibSource/QuadratureSineOscillator.h | 65 +++++++++++++++++++++++++++-
 LibSource/SignalGenerator.h          |  5 +--
 3 files changed, 72 insertions(+), 12 deletions(-)

diff --git a/LibSource/ComplexOscillator.h b/LibSource/ComplexOscillator.h
index 5052b343..49695bc0 100644
--- a/LibSource/ComplexOscillator.h
+++ b/LibSource/ComplexOscillator.h
@@ -45,15 +45,15 @@ class ComplexOscillator : public ComplexSignalGenerator {
   /**
    * Produce a sample with frequency modulation.
    */
-  virtual ComplexFloat generate() {
-    return generate(0.f);
-  }
   virtual ComplexFloat generate(float fm) = 0;
-  virtual void generate(ComplexFloatArray output) {
-    for(size_t i=0; i
diff --git a/LibSource/QuadratureSineOscillator.h b/LibSource/QuadratureSineOscillator.h
index f667c85e..128c4011 100644
--- a/LibSource/QuadratureSineOscillator.h
+++ b/LibSource/QuadratureSineOscillator.h
@@ -3,6 +3,11 @@
 
 #include "ComplexOscillator.h"
 
+/**
+ * Oscillator outputs complex numbers on unit cycle. This means that axis are
+ * 90 degrees out of phase at any point of time and oscillator's magnitude is
+ * always equal to 1.0
+ **/
 class QuadratureSineOscillator : public ComplexOscillatorTemplate {
 public:
     static constexpr float begin_phase = 0;
@@ -19,7 +24,7 @@ class QuadratureSineOscillator : public ComplexOscillatorTemplate::generate;
 };
 
+/**
+ * An oscillator similar to QuadratureSineOscillator class that also includes
+ * feedback control. Feedback value is a scalar value, meaning that both real and
+ * imaginary axis get the same amount of feeback
+ **/
 class FeedbackQuadratureSineOscillator : public ComplexOscillatorTemplate {
 public:
     static constexpr float begin_phase = 0;
@@ -39,6 +49,9 @@ class FeedbackQuadratureSineOscillator : public ComplexOscillatorTemplatefeedback = feedback;
     }
+    float getFeedback() const {
+        return feedback;
+    }
     ComplexFloat getSample() {
         last_sample = ComplexFloat(
             cosf(phase + last_sample.re * feedback), sinf(phase + last_sample.im * feedback));
@@ -54,7 +67,7 @@ class FeedbackQuadratureSineOscillator : public ComplexOscillatorTemplate {
+public:
+    static constexpr float begin_phase = 0;
+    static constexpr float end_phase = 2 * M_PI;
+    void setFeedback(ComplexFloat feedback) {
+        this->feedback = feedback;
+    }
+    ComplexFloat getFeedback() const {
+        return feedback;
+    }
+    ComplexFloat getSample() {
+        last_sample = ComplexFloat(
+            cosf(phase + last_sample.re * feedback.re), sinf(phase + last_sample.im * feedback.im));
+        return last_sample;
+    }
+    void generate(ComplexFloatArray output) override {
+        size_t len = output.getSize();
+        for (size_t i = 0; i < len; ++i) {
+            output[i].re = cosf(phase + last_sample.re * feedback.re);
+            output[i].im = sinf(phase + last_sample.im * feedback.im);
+            last_sample = output[i];
+            phase += incr; // allow phase to overrun
+        }
+        phase = fmodf(phase, end_phase);
+    }
+    void generate(ComplexFloatArray output, FloatArray fm) override {
+        size_t len = output.getSize();
+        for (size_t i = 0; i < len; ++i) {
+            output[i].re = cosf(phase + last_sample.re * feedback.re);
+            output[i].im = sinf(phase + last_sample.im * feedback.im);
+            last_sample = output[i];
+            phase += incr * (1 + fm[i]);
+            // allow phase to overrun
+        }
+        phase = fmodf(phase, end_phase);
+    }
+    using ComplexOscillatorTemplate::generate;
+protected:
+    ComplexFloat feedback = 0;
+    ComplexFloat last_sample = 0;
+};
+
 #endif /* QUADRATURE_SINE_OSCILLATOR_H */
diff --git a/LibSource/SignalGenerator.h b/LibSource/SignalGenerator.h
index d34bc48c..a23202da 100644
--- a/LibSource/SignalGenerator.h
+++ b/LibSource/SignalGenerator.h
@@ -36,9 +36,8 @@ class MultiSignalGenerator {
 
 /**
  * Base class for stereo signal generators such as Oscillators.
- * A ComplexSignalGenerator produces complex numbers with parts
- * in [-1..1] range unless
- * otherwise stated.
+ * A ComplexSignalGenerator produces complex numbers with each channel
+ * containing samples in [-1..1] range unless otherwise stated.
  */
 class ComplexSignalGenerator {
 public:

From 60b7683c273e14984d26482256609cf4e0141076 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Sun, 17 Oct 2021 20:54:52 +0300
Subject: [PATCH 291/374] Fixes for broken tests/warnings

---
 LibSource/Oscillator.h                            |  2 +-
 TestPatches/QuadratureSineOscillatorTestPatch.hpp | 12 +++++++-----
 TestPatches/SineOscillatorTestPatch.hpp           |  8 ++++----
 TestPatches/fileio.h                              |  2 +-
 4 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index d0134d0b..5b08b6bf 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -68,7 +68,7 @@ class Oscillator : public SignalGenerator {
 template
 class OscillatorTemplate : public BaseOscillator {
 protected:
-  float mul;
+  float mul = 1;  // Prevent having NaN as default getFrequency result
   float phase = 0;
   float incr = 0;
 public:
diff --git a/TestPatches/QuadratureSineOscillatorTestPatch.hpp b/TestPatches/QuadratureSineOscillatorTestPatch.hpp
index d2049551..3bdbe7bc 100644
--- a/TestPatches/QuadratureSineOscillatorTestPatch.hpp
+++ b/TestPatches/QuadratureSineOscillatorTestPatch.hpp
@@ -45,13 +45,15 @@ class QuadratureSineOscillatorTestPatch : public TestPatch {
       AudioBuffer* s2 = AudioBuffer::create(2, 1000);
       ComplexFloatArray cmp = ComplexFloatArray::create(1000);
       osc1->generate(cmp);
-      cmp.copyTo(s1->getSamples(0), s2->getSamples(1));
+      cmp.copyTo(s1->getSamples(0), s1->getSamples(1));
       for(size_t i=0; i<1000; ++i) {
         ComplexFloat sample = osc2->generate();
         s2->getSamples(0)[i] = sample.re;
         s2->getSamples(1)[i] = sample.im;
       }
       for(size_t i=0; i<1000; ++i) {
+        CHECK_CLOSE(cmp[i].re, s2->getSamples(0)[i], 0.00002);
+        CHECK_CLOSE(cmp[i].im, s2->getSamples(1)[i], 0.00002);
         CHECK_CLOSE(s1->getSamples(0)[i], s2->getSamples(0)[i], 0.00002);
         CHECK_CLOSE(s1->getSamples(1)[i], s2->getSamples(1)[i], 0.00002);
       }
@@ -65,10 +67,10 @@ class QuadratureSineOscillatorTestPatch : public TestPatch {
         CHECK_CLOSE(cmp[i].re, s2->getSamples(0)[i], 0.00002);
         CHECK_CLOSE(cmp[i].im, s2->getSamples(1)[i], 0.00002);
       }
-      AudioBuffer::destroy(s1);      
-      AudioBuffer::destroy(s2);      
-      QuadratureSineOscillator::destroy(osc1);      
-      QuadratureSineOscillator::destroy(osc2);      
+      AudioBuffer::destroy(s1);
+      AudioBuffer::destroy(s2);
+      QuadratureSineOscillator::destroy(osc1);
+      QuadratureSineOscillator::destroy(osc2);
     }
 }
 };
diff --git a/TestPatches/SineOscillatorTestPatch.hpp b/TestPatches/SineOscillatorTestPatch.hpp
index 6c894792..2c0ed818 100644
--- a/TestPatches/SineOscillatorTestPatch.hpp
+++ b/TestPatches/SineOscillatorTestPatch.hpp
@@ -45,14 +45,14 @@ class SineOscillatorTestPatch : public TestPatch {
       FloatArray s2 = FloatArray::create(1000);
       osc1->generate(s1);
       for(size_t i=0; i<1000; ++i)
-	s2[i] = osc2->generate();
+        s2[i] = osc2->generate();
       for(size_t i=0; i<1000; ++i)
-	CHECK_CLOSE(s1[i], s2[i], 0.00002);
+        CHECK_CLOSE(s1[i], s2[i], 0.00002);
       osc1->generate(s1);
       for(size_t i=0; i<1000; ++i)
-	s2[i] = osc2->generate();
+        s2[i] = osc2->generate();
       for(size_t i=0; i<1000; ++i)
-	CHECK_CLOSE(s1[i], s2[i], 0.00002);
+        CHECK_CLOSE(s1[i], s2[i], 0.00002);
       FloatArray::destroy(s1);      
       FloatArray::destroy(s2);      
       SineOscillator::destroy(osc1);      
diff --git a/TestPatches/fileio.h b/TestPatches/fileio.h
index 4034480a..368a24b6 100644
--- a/TestPatches/fileio.h
+++ b/TestPatches/fileio.h
@@ -41,7 +41,7 @@ extern "C"{
         errx(1, "Data buffer not specified");
     if ((fd = creat(file_name, 0666)) < 1)
         errx(1, "Error creating file");
-    if (write(fd, data, size) < size)
+    if (write(fd, data, size) < ssize_t(size))
         errx(1, "Error writing samples");
     close(fd);
     return size;

From 203743ad936b95d48b72aa91bcaa087b12ae5fe0 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 15:46:39 +0200
Subject: [PATCH 292/374] fixed broken MonochromeScreenPatch::fill()

---
 LibSource/MonochromeScreenPatch.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/MonochromeScreenPatch.cpp b/LibSource/MonochromeScreenPatch.cpp
index 75545171..b2523232 100644
--- a/LibSource/MonochromeScreenPatch.cpp
+++ b/LibSource/MonochromeScreenPatch.cpp
@@ -88,7 +88,7 @@ void MonochromeScreenBuffer::fade(uint16_t steps){
 
 template<>
 void MonochromeScreenBuffer::fill(Colour c) {
-  memset(pixels, c, height*width/8);
+  memset(pixels, c == WHITE ? 0xff : 0x00, height*width/8);
   // for(unsigned int i=0; i
Date: Tue, 26 Oct 2021 16:28:44 +0200
Subject: [PATCH 293/374] added test patches

---
 Makefile                                  |  10 +
 TestPatches/CppTest/CppTestPatch.hpp      |  19 ++
 TestPatches/FaustTest/FaustTest.dsp       |  10 +
 TestPatches/GenTest/MIDItestMinMax.cpp    | 314 ++++++++++++++++++++++
 TestPatches/GenTest/MIDItestMinMax.gendsp | 236 ++++++++++++++++
 TestPatches/GenTest/MIDItestMinMax.h      |  49 ++++
 TestPatches/HeavyTest/HeavyTest.pd        |  34 +++
 TestPatches/SoulTest/SineSynth.soul       | 118 ++++++++
 8 files changed, 790 insertions(+)
 create mode 100644 TestPatches/CppTest/CppTestPatch.hpp
 create mode 100644 TestPatches/FaustTest/FaustTest.dsp
 create mode 100644 TestPatches/GenTest/MIDItestMinMax.cpp
 create mode 100644 TestPatches/GenTest/MIDItestMinMax.gendsp
 create mode 100644 TestPatches/GenTest/MIDItestMinMax.h
 create mode 100644 TestPatches/HeavyTest/HeavyTest.pd
 create mode 100644 TestPatches/SoulTest/SineSynth.soul

diff --git a/Makefile b/Makefile
index 3a789a3d..24a766ca 100644
--- a/Makefile
+++ b/Makefile
@@ -45,7 +45,11 @@ PATCHNAME   ?= $(SOUL)
 PATCHCLASS  ?= SoulPatch
 PATCHFILE   ?= SoulPatch.hpp
 SOULCLASS   ?= $(SOUL)
+ifneq ("$(wildcard $(PATCHSOURCE)/$(SOUL).soulpatch)","")
 SOULFILE    ?= $(SOUL).soulpatch
+else
+SOULFILE    ?= $(SOUL).soul
+endif
 SOULHPP     ?= $(SOUL).hpp
 DEPS        += soul
 else ifdef TEST
@@ -182,9 +186,15 @@ grind: $(DEPS) ## run valgrind on patch natively
 	@$(MAKE) -s -f native.mk grind
 
 check: ## run test patches and unit tests natively
+	@make libs docs
 	@for nm in $(TESTS) ; do \
 		$(MAKE) -s TEST=$$nm test || exit;\
 	done
+	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/CppTest PATCHNAME=CppTest clean patch web run
+	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest FAUST=FaustTest clean patch web run
+	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/HeavyTest HEAVY=HeavyTest clean patch web run
+	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/GenTest GEN=MIDItestMinMax clean patch web run
+	@unset PATCHNAME PATCHCLASS PATCHFILE SOULCLASS SOULFILE SOULHPP && $(MAKE) PATCHSOURCE=TestPatches/SoulTest SOUL=SineSynth clean patch web run
 
 help: ## show this help
 	@echo 'Usage: make [target] ...'
diff --git a/TestPatches/CppTest/CppTestPatch.hpp b/TestPatches/CppTest/CppTestPatch.hpp
new file mode 100644
index 00000000..cc746d24
--- /dev/null
+++ b/TestPatches/CppTest/CppTestPatch.hpp
@@ -0,0 +1,19 @@
+#ifndef __CppTestPatch_hpp__
+#define __CppTestPatch_hpp__
+
+#include "OpenWareLibrary.h"
+
+class CppTestPatch : public Patch {
+public:
+  CppTestPatch(){
+    registerParameter(PARAMETER_A, "Gain");
+    setParameterValue(PARAMETER_A, 0.5);
+  }
+  void processAudio(AudioBuffer &buffer){
+    float gain = getParameterValue(PARAMETER_A)*2;
+    for(size_t ch=0; ch[OWL:B1]", 0, 1);
+
+import("demos.lib");
+process = attach(osc(1000) * btn1, 1-btn1 : led1);
+
+// import("all.lib");
+// process = zita_light;
diff --git a/TestPatches/GenTest/MIDItestMinMax.cpp b/TestPatches/GenTest/MIDItestMinMax.cpp
new file mode 100644
index 00000000..94d5b2bf
--- /dev/null
+++ b/TestPatches/GenTest/MIDItestMinMax.cpp
@@ -0,0 +1,314 @@
+#include "MIDItestMinMax.h"
+#include "message.h"
+
+namespace MIDItestMinMax {
+
+/*******************************************************************************************************************
+Cycling '74 License for Max-Generated Code for Export
+Copyright (c) 2016 Cycling '74
+The code that Max generates automatically and that end users are capable of exporting and using, and any
+  associated documentation files (the “Software”) is a work of authorship for which Cycling '74 is the author
+  and owner for copyright purposes.  A license is hereby granted, free of charge, to any person obtaining a
+  copy of the Software (“Licensee”) to use, copy, modify, merge, publish, and distribute copies of the Software,
+  and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+The Software is licensed to Licensee only for non-commercial use. Users who wish to make commercial use of the
+  Software must contact the copyright owner to determine if a license for commercial use is available, and the
+  terms and conditions for same, which may include fees or royalties. For commercial use, please send inquiries
+  to licensing (at) cycling74.com.  The determination of whether a use is commercial use or non-commercial use is based
+  upon the use, not the user. The Software may be used by individuals, institutions, governments, corporations, or
+  other business whether for-profit or non-profit so long as the use itself is not a commercialization of the
+  materials or a use that generates or is intended to generate income, revenue, sales or profit.
+The above copyright notice and this license shall be included in all copies or substantial portions of the Software.
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
+  THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+  THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+  CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+  DEALINGS IN THE SOFTWARE.
+*******************************************************************************************************************/
+
+// global noise generator
+Noise noise;
+static const int GENLIB_LOOPCOUNT_BAIL = 100000;
+
+
+// The State struct contains all the state and procedures for the gendsp kernel
+typedef struct State {
+	CommonState __commonstate;
+	SineCycle __m_cycle_5;
+	SineData __sinedata;
+	int __exception;
+	int vectorsize;
+	t_sample m_gain_1;
+	t_sample m_bend_4;
+	t_sample m_freq_3;
+	t_sample samplerate;
+	t_sample m_gate_2;
+	// re-initialize all member variables;
+	inline void reset(t_param __sr, int __vs) {
+		__exception = 0;
+		vectorsize = __vs;
+		samplerate = __sr;
+		m_gain_1 = ((int)0);
+		m_gate_2 = ((int)0);
+		m_freq_3 = ((int)440);
+		m_bend_4 = ((int)1);
+		__m_cycle_5.reset(samplerate, 0);
+		genlib_reset_complete(this);
+		
+	};
+	// the signal processing routine;
+	inline int perform(t_sample ** __ins, t_sample ** __outs, int __n) {
+		vectorsize = __n;
+		const t_sample * __in1 = __ins[0];
+		t_sample * __out1 = __outs[0];
+		if (__exception) {
+			return __exception;
+			
+		} else if (( (__in1 == 0) || (__out1 == 0) )) {
+			__exception = GENLIB_ERR_NULL_BUFFER;
+			return __exception;
+			
+		};
+		t_sample mul_6 = (m_freq_3 * m_bend_4);
+		debugMessage("fp", m_freq_3, m_bend_4, mul_6);
+		// the main sample loop;
+		while ((__n--)) {
+			const t_sample in1 = (*(__in1++));
+			__m_cycle_5.freq(mul_6);
+			t_sample cycle_3 = __m_cycle_5(__sinedata);
+			t_sample cycleindex_4 = __m_cycle_5.phase();
+			t_sample mul_5 = (cycle_3 * m_gain_1);
+			t_sample mul_2 = (mul_5 * m_gate_2);
+			t_sample tanh_1 = tanh(mul_2);
+			t_sample out1 = tanh_1;
+			// assign results to output buffer;
+			(*(__out1++)) = out1;
+			
+		};
+		return __exception;
+		
+	};
+	inline void set_gain(t_param _value) {
+		m_gain_1 = (_value < 0 ? 0 : (_value > 1 ? 1 : _value));
+	};
+	inline void set_gate(t_param _value) {
+		m_gate_2 = (_value < 0 ? 0 : (_value > 1 ? 1 : _value));
+	};
+	inline void set_freq(t_param _value) {
+		m_freq_3 = (_value < 20 ? 20 : (_value > 20000 ? 20000 : _value));
+	};
+	inline void set_bend(t_param _value) {
+		m_bend_4 = (_value < 0.25 ? 0.25 : (_value > 2 ? 2 : _value));
+	};
+	
+} State;
+
+
+///
+///	Configuration for the genlib API
+///
+
+/// Number of signal inputs and outputs
+
+int gen_kernel_numins = 1;
+int gen_kernel_numouts = 1;
+
+int num_inputs() { return gen_kernel_numins; }
+int num_outputs() { return gen_kernel_numouts; }
+int num_params() { return 4; }
+
+/// Assistive lables for the signal inputs and outputs
+
+const char *gen_kernel_innames[] = { "in1" };
+const char *gen_kernel_outnames[] = { "out1" };
+
+/// Invoke the signal process of a State object
+
+int perform(CommonState *cself, t_sample **ins, long numins, t_sample **outs, long numouts, long n) {
+	State* self = (State *)cself;
+	return self->perform(ins, outs, n);
+}
+
+/// Reset all parameters and stateful operators of a State object
+
+void reset(CommonState *cself) {
+	State* self = (State *)cself;
+	self->reset(cself->sr, cself->vs);
+}
+
+/// Set a parameter of a State object
+
+void setparameter(CommonState *cself, long index, t_param value, void *ref) {
+	State *self = (State *)cself;
+	switch (index) {
+		case 0: self->set_bend(value); break;
+		case 1: self->set_freq(value); break;
+		case 2: self->set_gain(value); break;
+		case 3: self->set_gate(value); break;
+		
+		default: break;
+	}
+}
+
+/// Get the value of a parameter of a State object
+
+void getparameter(CommonState *cself, long index, t_param *value) {
+	State *self = (State *)cself;
+	switch (index) {
+		case 0: *value = self->m_bend_4; break;
+		case 1: *value = self->m_freq_3; break;
+		case 2: *value = self->m_gain_1; break;
+		case 3: *value = self->m_gate_2; break;
+		
+		default: break;
+	}
+}
+
+/// Get the name of a parameter of a State object
+
+const char *getparametername(CommonState *cself, long index) {
+	if (index >= 0 && index < cself->numparams) {
+		return cself->params[index].name;
+	}
+	return 0;
+}
+
+/// Get the minimum value of a parameter of a State object
+
+t_param getparametermin(CommonState *cself, long index) {
+	if (index >= 0 && index < cself->numparams) {
+		return cself->params[index].outputmin;
+	}
+	return 0;
+}
+
+/// Get the maximum value of a parameter of a State object
+
+t_param getparametermax(CommonState *cself, long index) {
+	if (index >= 0 && index < cself->numparams) {
+		return cself->params[index].outputmax;
+	}
+	return 0;
+}
+
+/// Get parameter of a State object has a minimum and maximum value
+
+char getparameterhasminmax(CommonState *cself, long index) {
+	if (index >= 0 && index < cself->numparams) {
+		return cself->params[index].hasminmax;
+	}
+	return 0;
+}
+
+/// Get the units of a parameter of a State object
+
+const char *getparameterunits(CommonState *cself, long index) {
+	if (index >= 0 && index < cself->numparams) {
+		return cself->params[index].units;
+	}
+	return 0;
+}
+
+/// Get the size of the state of all parameters of a State object
+
+size_t getstatesize(CommonState *cself) {
+	return genlib_getstatesize(cself, &getparameter);
+}
+
+/// Get the state of all parameters of a State object
+
+short getstate(CommonState *cself, char *state) {
+	return genlib_getstate(cself, state, &getparameter);
+}
+
+/// set the state of all parameters of a State object
+
+short setstate(CommonState *cself, const char *state) {
+	return genlib_setstate(cself, state, &setparameter);
+}
+
+/// Allocate and configure a new State object and it's internal CommonState:
+
+void *create(t_param sr, long vs) {
+	State *self = new State;
+	self->reset(sr, vs);
+	ParamInfo *pi;
+	self->__commonstate.inputnames = gen_kernel_innames;
+	self->__commonstate.outputnames = gen_kernel_outnames;
+	self->__commonstate.numins = gen_kernel_numins;
+	self->__commonstate.numouts = gen_kernel_numouts;
+	self->__commonstate.sr = sr;
+	self->__commonstate.vs = vs;
+	self->__commonstate.params = (ParamInfo *)genlib_sysmem_newptr(4 * sizeof(ParamInfo));
+	self->__commonstate.numparams = 4;
+	// initialize parameter 0 ("m_bend_4")
+	pi = self->__commonstate.params + 0;
+	pi->name = "bend";
+	pi->paramtype = GENLIB_PARAMTYPE_FLOAT;
+	pi->defaultvalue = self->m_bend_4;
+	pi->defaultref = 0;
+	pi->hasinputminmax = false;
+	pi->inputmin = 0;
+	pi->inputmax = 1;
+	pi->hasminmax = true;
+	pi->outputmin = 0.25;
+	pi->outputmax = 2;
+	pi->exp = 0;
+	pi->units = "";		// no units defined
+	// initialize parameter 1 ("m_freq_3")
+	pi = self->__commonstate.params + 1;
+	pi->name = "freq";
+	pi->paramtype = GENLIB_PARAMTYPE_FLOAT;
+	pi->defaultvalue = self->m_freq_3;
+	pi->defaultref = 0;
+	pi->hasinputminmax = false;
+	pi->inputmin = 0;
+	pi->inputmax = 1;
+	pi->hasminmax = true;
+	pi->outputmin = 20;
+	pi->outputmax = 20000;
+	pi->exp = 0;
+	pi->units = "";		// no units defined
+	// initialize parameter 2 ("m_gain_1")
+	pi = self->__commonstate.params + 2;
+	pi->name = "gain";
+	pi->paramtype = GENLIB_PARAMTYPE_FLOAT;
+	pi->defaultvalue = self->m_gain_1;
+	pi->defaultref = 0;
+	pi->hasinputminmax = false;
+	pi->inputmin = 0;
+	pi->inputmax = 1;
+	pi->hasminmax = true;
+	pi->outputmin = 0;
+	pi->outputmax = 1;
+	pi->exp = 0;
+	pi->units = "";		// no units defined
+	// initialize parameter 3 ("m_gate_2")
+	pi = self->__commonstate.params + 3;
+	pi->name = "gate";
+	pi->paramtype = GENLIB_PARAMTYPE_FLOAT;
+	pi->defaultvalue = self->m_gate_2;
+	pi->defaultref = 0;
+	pi->hasinputminmax = false;
+	pi->inputmin = 0;
+	pi->inputmax = 1;
+	pi->hasminmax = true;
+	pi->outputmin = 0;
+	pi->outputmax = 1;
+	pi->exp = 0;
+	pi->units = "";		// no units defined
+	
+	return self;
+}
+
+/// Release all resources and memory used by a State object:
+
+void destroy(CommonState *cself) {
+	State *self = (State *)cself;
+	genlib_sysmem_freeptr(cself->params);
+		
+	delete self;
+}
+
+
+} // MIDItestMinMax::
diff --git a/TestPatches/GenTest/MIDItestMinMax.gendsp b/TestPatches/GenTest/MIDItestMinMax.gendsp
new file mode 100644
index 00000000..9dffab13
--- /dev/null
+++ b/TestPatches/GenTest/MIDItestMinMax.gendsp
@@ -0,0 +1,236 @@
+{
+	"patcher" : 	{
+		"fileversion" : 1,
+		"appversion" : 		{
+			"major" : 7,
+			"minor" : 3,
+			"revision" : 5,
+			"architecture" : "x64",
+			"modernui" : 1
+		}
+,
+		"rect" : [ 616.0, 384.0, 600.0, 450.0 ],
+		"editing_bgcolor" : [ 0.9, 0.9, 0.9, 1.0 ],
+		"bglocked" : 0,
+		"openinpresentation" : 0,
+		"default_fontsize" : 12.0,
+		"default_fontface" : 0,
+		"default_fontname" : "Arial",
+		"gridonopen" : 1,
+		"gridsize" : [ 15.0, 15.0 ],
+		"gridsnaponopen" : 1,
+		"objectsnaponopen" : 1,
+		"statusbarvisible" : 2,
+		"toolbarvisible" : 1,
+		"lefttoolbarpinned" : 0,
+		"toptoolbarpinned" : 0,
+		"righttoolbarpinned" : 0,
+		"bottomtoolbarpinned" : 0,
+		"toolbars_unpinned_last_save" : 0,
+		"tallnewobj" : 0,
+		"boxanimatetime" : 200,
+		"enablehscroll" : 1,
+		"enablevscroll" : 1,
+		"devicewidth" : 0.0,
+		"description" : "",
+		"digest" : "",
+		"tags" : "",
+		"style" : "",
+		"subpatcher_template" : "",
+		"boxes" : [ 			{
+				"box" : 				{
+					"id" : "obj-10",
+					"maxclass" : "newobj",
+					"numinlets" : 1,
+					"numoutlets" : 1,
+					"outlettype" : [ "" ],
+					"patching_rect" : [ 50.0, 317.0, 34.0, 22.0 ],
+					"style" : "",
+					"text" : "tanh"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-2",
+					"maxclass" : "newobj",
+					"numinlets" : 2,
+					"numoutlets" : 1,
+					"outlettype" : [ "" ],
+					"patching_rect" : [ 50.0, 256.0, 29.5, 22.0 ],
+					"style" : "",
+					"text" : "*"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-9",
+					"maxclass" : "newobj",
+					"numinlets" : 1,
+					"numoutlets" : 2,
+					"outlettype" : [ "", "" ],
+					"patching_rect" : [ 50.0, 149.0, 38.0, 22.0 ],
+					"style" : "",
+					"text" : "cycle"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-8",
+					"maxclass" : "newobj",
+					"numinlets" : 2,
+					"numoutlets" : 1,
+					"outlettype" : [ "" ],
+					"patching_rect" : [ 50.0, 201.0, 29.5, 22.0 ],
+					"style" : "",
+					"text" : "*"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-7",
+					"maxclass" : "newobj",
+					"numinlets" : 0,
+					"numoutlets" : 1,
+					"outlettype" : [ "" ],
+					"patching_rect" : [ 151.5, 57.0, 194.0, 22.0 ],
+					"style" : "",
+					"text" : "param bend 1 @min 0.25 @max 2"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-6",
+					"maxclass" : "newobj",
+					"numinlets" : 0,
+					"numoutlets" : 1,
+					"outlettype" : [ "" ],
+					"patching_rect" : [ 211.0, 218.0, 71.0, 22.0 ],
+					"style" : "",
+					"text" : "param gate"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-5",
+					"maxclass" : "newobj",
+					"numinlets" : 0,
+					"numoutlets" : 1,
+					"outlettype" : [ "" ],
+					"patching_rect" : [ 184.0, 132.0, 71.0, 22.0 ],
+					"style" : "",
+					"text" : "param gain"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-1",
+					"maxclass" : "newobj",
+					"numinlets" : 0,
+					"numoutlets" : 1,
+					"outlettype" : [ "" ],
+					"patching_rect" : [ 50.0, 16.0, 218.0, 22.0 ],
+					"style" : "",
+					"text" : "param freq 440 @min 20 @max 20000"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-3",
+					"maxclass" : "newobj",
+					"numinlets" : 2,
+					"numoutlets" : 1,
+					"outlettype" : [ "" ],
+					"patching_rect" : [ 50.0, 111.0, 29.5, 22.0 ],
+					"style" : "",
+					"text" : "*"
+				}
+
+			}
+, 			{
+				"box" : 				{
+					"id" : "obj-4",
+					"maxclass" : "newobj",
+					"numinlets" : 1,
+					"numoutlets" : 0,
+					"patching_rect" : [ 50.0, 350.0, 37.0, 22.0 ],
+					"style" : "",
+					"text" : "out 1"
+				}
+
+			}
+ ],
+		"lines" : [ 			{
+				"patchline" : 				{
+					"destination" : [ "obj-3", 0 ],
+					"source" : [ "obj-1", 0 ]
+				}
+
+			}
+, 			{
+				"patchline" : 				{
+					"destination" : [ "obj-4", 0 ],
+					"source" : [ "obj-10", 0 ]
+				}
+
+			}
+, 			{
+				"patchline" : 				{
+					"destination" : [ "obj-10", 0 ],
+					"source" : [ "obj-2", 0 ]
+				}
+
+			}
+, 			{
+				"patchline" : 				{
+					"destination" : [ "obj-9", 0 ],
+					"source" : [ "obj-3", 0 ]
+				}
+
+			}
+, 			{
+				"patchline" : 				{
+					"destination" : [ "obj-8", 1 ],
+					"source" : [ "obj-5", 0 ]
+				}
+
+			}
+, 			{
+				"patchline" : 				{
+					"destination" : [ "obj-2", 1 ],
+					"source" : [ "obj-6", 0 ]
+				}
+
+			}
+, 			{
+				"patchline" : 				{
+					"destination" : [ "obj-3", 1 ],
+					"source" : [ "obj-7", 0 ]
+				}
+
+			}
+, 			{
+				"patchline" : 				{
+					"destination" : [ "obj-2", 0 ],
+					"source" : [ "obj-8", 0 ]
+				}
+
+			}
+, 			{
+				"patchline" : 				{
+					"destination" : [ "obj-8", 0 ],
+					"source" : [ "obj-9", 0 ]
+				}
+
+			}
+ ]
+	}
+
+}
diff --git a/TestPatches/GenTest/MIDItestMinMax.h b/TestPatches/GenTest/MIDItestMinMax.h
new file mode 100644
index 00000000..08cf0544
--- /dev/null
+++ b/TestPatches/GenTest/MIDItestMinMax.h
@@ -0,0 +1,49 @@
+/*******************************************************************************************************************
+Cycling '74 License for Max-Generated Code for Export
+Copyright (c) 2016 Cycling '74
+The code that Max generates automatically and that end users are capable of exporting and using, and any
+  associated documentation files (the “Software”) is a work of authorship for which Cycling '74 is the author
+  and owner for copyright purposes.  A license is hereby granted, free of charge, to any person obtaining a
+  copy of the Software (“Licensee”) to use, copy, modify, merge, publish, and distribute copies of the Software,
+  and to permit persons to whom the Software is furnished to do so, subject to the following conditions:
+The Software is licensed to Licensee only for non-commercial use. Users who wish to make commercial use of the
+  Software must contact the copyright owner to determine if a license for commercial use is available, and the
+  terms and conditions for same, which may include fees or royalties. For commercial use, please send inquiries
+  to licensing (at) cycling74.com.  The determination of whether a use is commercial use or non-commercial use is based
+  upon the use, not the user. The Software may be used by individuals, institutions, governments, corporations, or
+  other business whether for-profit or non-profit so long as the use itself is not a commercialization of the
+  materials or a use that generates or is intended to generate income, revenue, sales or profit.
+The above copyright notice and this license shall be included in all copies or substantial portions of the Software.
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO
+  THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+  THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+  CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+  DEALINGS IN THE SOFTWARE.
+*******************************************************************************************************************/
+
+
+#include "genlib.h"
+#include "genlib_exportfunctions.h"
+#include "genlib_ops.h"
+
+namespace MIDItestMinMax {
+
+int num_inputs();
+int num_outputs();
+int num_params();
+int perform(CommonState *cself, t_sample **ins, long numins, t_sample **outs, long numouts, long n);
+void reset(CommonState *cself);
+void setparameter(CommonState *cself, long index, t_param value, void *ref);
+void getparameter(CommonState *cself, long index, t_param *value);
+const char *getparametername(CommonState *cself, long index);
+t_param getparametermin(CommonState *cself, long index);
+t_param getparametermax(CommonState *cself, long index);
+char getparameterhasminmax(CommonState *cself, long index);
+const char *getparameterunits(CommonState *cself, long index);
+size_t getstatesize(CommonState *cself);
+short getstate(CommonState *cself, char *state);
+short setstate(CommonState *cself, const char *state);
+void *create(t_param sr, long vs);
+void destroy(CommonState *cself);
+
+} // MIDItestMinMax::
diff --git a/TestPatches/HeavyTest/HeavyTest.pd b/TestPatches/HeavyTest/HeavyTest.pd
new file mode 100644
index 00000000..e8ae17c8
--- /dev/null
+++ b/TestPatches/HeavyTest/HeavyTest.pd
@@ -0,0 +1,34 @@
+#N canvas 0 66 1920 1014 10;
+#X obj 52 110 *~ 2000;
+#X obj 91 182 osc~;
+#X obj 222 166 osc~;
+#X obj 92 255 *~ 0.3;
+#X obj 252 213 *~ 0.3;
+#X obj 382 187 osc~;
+#X obj 344 248 *~ 0.3;
+#X obj 227 383 dac~;
+#X obj 422 95 print hello;
+#X obj 60 41 r Osc1 @owl A;
+#X obj 18 76 s Send1 @owl F;
+#X obj 230 334 +~;
+#X obj 246 74 s Send2 @owl G;
+#X obj 224 42 r Osc2 @owl B 0.25 0.75 0.5;
+#X obj 234 120 *~ 2000;
+#X obj 415 41 r Osc3 @owl C @owl_min 400 @owl_max 4000 @owl_default
+800;
+#X connect 0 0 1 0;
+#X connect 1 0 3 0;
+#X connect 2 0 4 0;
+#X connect 3 0 11 0;
+#X connect 4 0 11 0;
+#X connect 5 0 6 0;
+#X connect 6 0 11 0;
+#X connect 9 0 0 0;
+#X connect 9 0 10 0;
+#X connect 11 0 7 0;
+#X connect 11 0 7 1;
+#X connect 13 0 12 0;
+#X connect 13 0 14 0;
+#X connect 14 0 2 0;
+#X connect 15 0 5 0;
+#X connect 15 0 8 0;
diff --git a/TestPatches/SoulTest/SineSynth.soul b/TestPatches/SoulTest/SineSynth.soul
new file mode 100644
index 00000000..fe28f5a0
--- /dev/null
+++ b/TestPatches/SoulTest/SineSynth.soul
@@ -0,0 +1,118 @@
+/*
+    == SOUL example code ==
+    == Author: Jules ==
+*/
+
+/// Title: A simple MPE sine-wave synthesiser example
+///
+/// A simple sine-wave synthesiser featuring pitch-bend support, using a basic
+/// envelope and voice-allocator.
+
+graph SineSynth  [[ main ]]
+{
+    input smoothedGain.volume [[ name: "Volume", min: -40, max: 0, init: -6, step: 1 ]];
+    input event soul::midi::Message midiIn;
+    output stream float audioOut;
+
+    let
+    {
+        voices = Voice[8];
+        voiceAllocator = soul::voice_allocators::Basic(8);
+
+        smoothedGain = soul::gain::SmoothedGainParameter (0.5f);
+        gainProcessor = soul::gain::DynamicGain (float);
+    }
+
+    connection
+    {
+        midiIn -> soul::midi::MPEParser -> voiceAllocator;
+
+        // Plumb the voice allocator to the voices array
+        voiceAllocator.voiceEventOut -> voices.noteOn,
+                                        voices.noteOff,
+                                        voices.pitchBend;
+
+        // Sum the voices audio out to the output
+        voices       -> gainProcessor.in;
+        smoothedGain -> gainProcessor.gain;
+        gainProcessor -> audioOut;
+    }
+}
+
+//==============================================================================
+processor SineOsc
+{
+    input event
+    {
+        soul::note_events::NoteOn noteOn;
+        soul::note_events::NoteOff noteOff;
+        soul::note_events::PitchBend pitchBend;
+    }
+
+    output stream float audioOut;
+
+    event noteOn (soul::note_events::NoteOn e)
+    {
+        notePitch = e.note;
+        bendSemitones = 0.0f;
+        calculatePhaseIncrement();
+    }
+
+    event noteOff (soul::note_events::NoteOff e) {}
+
+    event pitchBend (soul::note_events::PitchBend e)
+    {
+        bendSemitones = e.bendSemitones;
+        calculatePhaseIncrement();
+    }
+
+    float notePitch, bendSemitones, phase, phaseIncrement;
+
+    void calculatePhaseIncrement()
+    {
+        let noteFrequency  = soul::noteNumberToFrequency (notePitch + bendSemitones);
+        phaseIncrement = float (noteFrequency * twoPi * processor.period);
+    }
+
+    void run()
+    {
+        loop
+        {
+            phase = addModulo2Pi (phase, phaseIncrement);
+            audioOut << sin (phase);
+            advance();
+        }
+    }
+}
+
+//==============================================================================
+graph Voice
+{
+    input event
+    {
+        soul::note_events::NoteOn noteOn;
+        soul::note_events::NoteOff noteOff;
+        soul::note_events::PitchBend pitchBend;
+    }
+
+    output stream float audioOut;
+
+    let
+    {
+        osc = SineOsc;
+        amplitudeEnvelope = soul::envelope::FixedAttackReleaseEnvelope (0.2f, 0.02f, 0.1f);
+        attenuator = soul::gain::DynamicGain (float);
+    }
+
+    connection
+    {
+        noteOn          -> osc.noteOn;
+        noteOff         -> osc.noteOff;
+        pitchBend       -> osc.pitchBend;
+        noteOn, noteOff -> amplitudeEnvelope.noteIn;
+
+        osc.audioOut                -> attenuator.in;
+        amplitudeEnvelope.levelOut  -> attenuator.gain;
+        attenuator                  -> audioOut;
+    }
+}

From eaeb1c5de63aa667ee4467fbe52be0a106f88d31 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 16:37:08 +0200
Subject: [PATCH 294/374] disable docs/doxygen target in make check

---
 Makefile | 1 -
 1 file changed, 1 deletion(-)

diff --git a/Makefile b/Makefile
index 24a766ca..9f049e04 100644
--- a/Makefile
+++ b/Makefile
@@ -186,7 +186,6 @@ grind: $(DEPS) ## run valgrind on patch natively
 	@$(MAKE) -s -f native.mk grind
 
 check: ## run test patches and unit tests natively
-	@make libs docs
 	@for nm in $(TESTS) ; do \
 		$(MAKE) -s TEST=$$nm test || exit;\
 	done

From 3c77b8f433e776d785d49117b0e5955a7c5ec2d6 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 16:55:08 +0200
Subject: [PATCH 295/374] added generated Faust code, simplified patch

---
 TestPatches/FaustTest/FaustPatch.hpp | 1942 ++++++++++++++++++++++++++
 TestPatches/FaustTest/FaustTest.dsp  |    4 -
 2 files changed, 1942 insertions(+), 4 deletions(-)
 create mode 100644 TestPatches/FaustTest/FaustPatch.hpp

diff --git a/TestPatches/FaustTest/FaustPatch.hpp b/TestPatches/FaustTest/FaustPatch.hpp
new file mode 100644
index 00000000..dcc66f34
--- /dev/null
+++ b/TestPatches/FaustTest/FaustPatch.hpp
@@ -0,0 +1,1942 @@
+/* ------------------------------------------------------------
+name: "FaustTest"
+Code generated with Faust 2.30.14 (https://faust.grame.fr)
+Compilation options: -lang cpp -inpl -light -mem -es 1 -scal -ftz 0
+------------------------------------------------------------ */
+
+#ifndef  __mydsp_H__
+#define  __mydsp_H__
+
+/************************************************************************
+
+    IMPORTANT NOTE : this file contains two clearly delimited sections :
+    the ARCHITECTURE section (in two parts) and the USER section. Each section
+    is governed by its own copyright and license. Please check individually
+    each section for license and copyright information.
+*************************************************************************/
+
+/*******************BEGIN ARCHITECTURE SECTION (part 1/2)****************/
+
+/************************************************************************
+    FAUST Architecture File
+    Copyright (C) 2003-2014 GRAME, Centre National de Creation Musicale
+    ---------------------------------------------------------------------
+    This Architecture section is free software; you can redistribute it
+    and/or modify it under the terms of the GNU General Public License
+    as published by the Free Software Foundation; either version 3 of
+    the License, or (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program; If not, see .
+
+    EXCEPTION : As a special exception, you may create a larger work
+    that contains this FAUST architecture section and distribute
+    that work under terms of your choice, so long as this FAUST
+    architecture section is not modified.
+
+ ************************************************************************
+ ************************************************************************/
+
+#ifndef __FaustPatch_h__
+#define __FaustPatch_h__
+
+#include "Patch.h"
+#include "VoltsPerOctave.h"
+#ifdef SOUNDFILE
+#include "Resource.h"
+#include "WaveReader.h"
+#endif
+
+// We have to undefine min/max from OWL's basicmaths.h, otherwise they cause
+// errors when Faust calls functions with the same names in std:: namespace
+#undef min
+#undef max
+
+#include 
+#include 
+
+#ifndef __FaustCommonInfrastructure__
+#define __FaustCommonInfrastructure__
+
+/************************** BEGIN dsp.h **************************/
+/************************************************************************
+ FAUST Architecture File
+ Copyright (C) 2003-2017 GRAME, Centre National de Creation Musicale
+ ---------------------------------------------------------------------
+ This Architecture section is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public License
+ as published by the Free Software Foundation; either version 3 of
+ the License, or (at your option) any later version.
+ 
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with this program; If not, see .
+ 
+ EXCEPTION : As a special exception, you may create a larger work
+ that contains this FAUST architecture section and distribute
+ that work under terms of your choice, so long as this FAUST
+ architecture section is not modified.
+ ************************************************************************/
+
+#ifndef __dsp__
+#define __dsp__
+
+#include 
+#include 
+
+#ifndef FAUSTFLOAT
+#define FAUSTFLOAT float
+#endif
+
+struct UI;
+struct Meta;
+
+/**
+ * DSP memory manager.
+ */
+
+struct dsp_memory_manager {
+    
+    virtual ~dsp_memory_manager() {}
+    
+    virtual void* allocate(size_t size) = 0;
+    virtual void destroy(void* ptr) = 0;
+    
+};
+
+/**
+* Signal processor definition.
+*/
+
+class dsp {
+
+    public:
+
+        dsp() {}
+        virtual ~dsp() {}
+
+        /* Return instance number of audio inputs */
+        virtual int getNumInputs() = 0;
+    
+        /* Return instance number of audio outputs */
+        virtual int getNumOutputs() = 0;
+    
+        /**
+         * Trigger the ui_interface parameter with instance specific calls
+         * to 'openTabBox', 'addButton', 'addVerticalSlider'... in order to build the UI.
+         *
+         * @param ui_interface - the user interface builder
+         */
+        virtual void buildUserInterface(UI* ui_interface) = 0;
+    
+        /* Return the sample rate currently used by the instance */
+        virtual int getSampleRate() = 0;
+    
+        /**
+         * Global init, calls the following methods:
+         * - static class 'classInit': static tables initialization
+         * - 'instanceInit': constants and instance state initialization
+         *
+         * @param sample_rate - the sampling rate in Hz
+         */
+        virtual void init(int sample_rate) = 0;
+
+        /**
+         * Init instance state
+         *
+         * @param sample_rate - the sampling rate in Hz
+         */
+        virtual void instanceInit(int sample_rate) = 0;
+    
+        /**
+         * Init instance constant state
+         *
+         * @param sample_rate - the sampling rate in Hz
+         */
+        virtual void instanceConstants(int sample_rate) = 0;
+    
+        /* Init default control parameters values */
+        virtual void instanceResetUserInterface() = 0;
+    
+        /* Init instance state (like delay lines...) but keep the control parameter values */
+        virtual void instanceClear() = 0;
+ 
+        /**
+         * Return a clone of the instance.
+         *
+         * @return a copy of the instance on success, otherwise a null pointer.
+         */
+        virtual dsp* clone() = 0;
+    
+        /**
+         * Trigger the Meta* parameter with instance specific calls to 'declare' (key, value) metadata.
+         *
+         * @param m - the Meta* meta user
+         */
+        virtual void metadata(Meta* m) = 0;
+    
+        /**
+         * DSP instance computation, to be called with successive in/out audio buffers.
+         *
+         * @param count - the number of frames to compute
+         * @param inputs - the input audio buffers as an array of non-interleaved FAUSTFLOAT samples (eiher float, double or quad)
+         * @param outputs - the output audio buffers as an array of non-interleaved FAUSTFLOAT samples (eiher float, double or quad)
+         *
+         */
+        virtual void compute(int count, FAUSTFLOAT** inputs, FAUSTFLOAT** outputs) = 0;
+    
+        /**
+         * DSP instance computation: alternative method to be used by subclasses.
+         *
+         * @param date_usec - the timestamp in microsec given by audio driver.
+         * @param count - the number of frames to compute
+         * @param inputs - the input audio buffers as an array of non-interleaved FAUSTFLOAT samples (either float, double or quad)
+         * @param outputs - the output audio buffers as an array of non-interleaved FAUSTFLOAT samples (either float, double or quad)
+         *
+         */
+        virtual void compute(double /*date_usec*/, int count, FAUSTFLOAT** inputs, FAUSTFLOAT** outputs) { compute(count, inputs, outputs); }
+       
+};
+
+/**
+ * Generic DSP decorator.
+ */
+
+class decorator_dsp : public dsp {
+
+    protected:
+
+        dsp* fDSP;
+
+    public:
+
+        decorator_dsp(dsp* dsp = nullptr):fDSP(dsp) {}
+        virtual ~decorator_dsp() { delete fDSP; }
+
+        virtual int getNumInputs() { return fDSP->getNumInputs(); }
+        virtual int getNumOutputs() { return fDSP->getNumOutputs(); }
+        virtual void buildUserInterface(UI* ui_interface) { fDSP->buildUserInterface(ui_interface); }
+        virtual int getSampleRate() { return fDSP->getSampleRate(); }
+        virtual void init(int sample_rate) { fDSP->init(sample_rate); }
+        virtual void instanceInit(int sample_rate) { fDSP->instanceInit(sample_rate); }
+        virtual void instanceConstants(int sample_rate) { fDSP->instanceConstants(sample_rate); }
+        virtual void instanceResetUserInterface() { fDSP->instanceResetUserInterface(); }
+        virtual void instanceClear() { fDSP->instanceClear(); }
+        virtual decorator_dsp* clone() { return new decorator_dsp(fDSP->clone()); }
+        virtual void metadata(Meta* m) { fDSP->metadata(m); }
+        // Beware: subclasses usually have to overload the two 'compute' methods
+        virtual void compute(int count, FAUSTFLOAT** inputs, FAUSTFLOAT** outputs) { fDSP->compute(count, inputs, outputs); }
+        virtual void compute(double date_usec, int count, FAUSTFLOAT** inputs, FAUSTFLOAT** outputs) { fDSP->compute(date_usec, count, inputs, outputs); }
+    
+};
+
+/**
+ * DSP factory class, used with LLVM and Interpreter backends
+ * to create DSP instances from a compiled DSP program.
+ */
+
+class dsp_factory {
+    
+    protected:
+    
+        // So that to force sub-classes to use deleteDSPFactory(dsp_factory* factory);
+        virtual ~dsp_factory() {}
+    
+    public:
+    
+        virtual std::string getName() = 0;
+        virtual std::string getSHAKey() = 0;
+        virtual std::string getDSPCode() = 0;
+        virtual std::string getCompileOptions() = 0;
+        virtual std::vector getLibraryList() = 0;
+        virtual std::vector getIncludePathnames() = 0;
+    
+        virtual dsp* createDSPInstance() = 0;
+    
+        virtual void setMemoryManager(dsp_memory_manager* manager) = 0;
+        virtual dsp_memory_manager* getMemoryManager() = 0;
+    
+};
+
+/**
+ * On Intel set FZ (Flush to Zero) and DAZ (Denormals Are Zero)
+ * flags to avoid costly denormals.
+ */
+
+#ifdef __SSE__
+    #include 
+    #ifdef __SSE2__
+        #define AVOIDDENORMALS _mm_setcsr(_mm_getcsr() | 0x8040)
+    #else
+        #define AVOIDDENORMALS _mm_setcsr(_mm_getcsr() | 0x8000)
+    #endif
+#else
+    #define AVOIDDENORMALS
+#endif
+
+#endif
+/**************************  END  dsp.h **************************/
+/************************** BEGIN UI.h **************************/
+/************************************************************************
+ FAUST Architecture File
+ Copyright (C) 2003-2020 GRAME, Centre National de Creation Musicale
+ ---------------------------------------------------------------------
+ This Architecture section is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public License
+ as published by the Free Software Foundation; either version 3 of
+ the License, or (at your option) any later version.
+ 
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with this program; If not, see .
+ 
+ EXCEPTION : As a special exception, you may create a larger work
+ that contains this FAUST architecture section and distribute
+ that work under terms of your choice, so long as this FAUST
+ architecture section is not modified.
+ ************************************************************************/
+
+#ifndef __UI_H__
+#define __UI_H__
+
+#ifndef FAUSTFLOAT
+#define FAUSTFLOAT float
+#endif
+
+/*******************************************************************************
+ * UI : Faust DSP User Interface
+ * User Interface as expected by the buildUserInterface() method of a DSP.
+ * This abstract class contains only the method that the Faust compiler can
+ * generate to describe a DSP user interface.
+ ******************************************************************************/
+
+struct Soundfile;
+
+template 
+struct UIReal
+{
+    UIReal() {}
+    virtual ~UIReal() {}
+    
+    // -- widget's layouts
+    
+    virtual void openTabBox(const char* label) = 0;
+    virtual void openHorizontalBox(const char* label) = 0;
+    virtual void openVerticalBox(const char* label) = 0;
+    virtual void closeBox() = 0;
+    
+    // -- active widgets
+    
+    virtual void addButton(const char* label, REAL* zone) = 0;
+    virtual void addCheckButton(const char* label, REAL* zone) = 0;
+    virtual void addVerticalSlider(const char* label, REAL* zone, REAL init, REAL min, REAL max, REAL step) = 0;
+    virtual void addHorizontalSlider(const char* label, REAL* zone, REAL init, REAL min, REAL max, REAL step) = 0;
+    virtual void addNumEntry(const char* label, REAL* zone, REAL init, REAL min, REAL max, REAL step) = 0;
+    
+    // -- passive widgets
+    
+    virtual void addHorizontalBargraph(const char* label, REAL* zone, REAL min, REAL max) = 0;
+    virtual void addVerticalBargraph(const char* label, REAL* zone, REAL min, REAL max) = 0;
+    
+    // -- soundfiles
+    
+    virtual void addSoundfile(const char* label, const char* filename, Soundfile** sf_zone) = 0;
+    
+    // -- metadata declarations
+    
+    virtual void declare(REAL* zone, const char* key, const char* val) {}
+};
+
+struct UI : public UIReal
+{
+    UI() {}
+    virtual ~UI() {}
+};
+
+#endif
+/**************************  END  UI.h **************************/
+/************************** BEGIN meta.h **************************/
+/************************************************************************
+ FAUST Architecture File
+ Copyright (C) 2003-2017 GRAME, Centre National de Creation Musicale
+ ---------------------------------------------------------------------
+ This Architecture section is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public License
+ as published by the Free Software Foundation; either version 3 of
+ the License, or (at your option) any later version.
+ 
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+ 
+ You should have received a copy of the GNU General Public License
+ along with this program; If not, see .
+ 
+ EXCEPTION : As a special exception, you may create a larger work
+ that contains this FAUST architecture section and distribute
+ that work under terms of your choice, so long as this FAUST
+ architecture section is not modified.
+ ************************************************************************/
+
+#ifndef __meta__
+#define __meta__
+
+/**
+ The base class of Meta handler to be used in dsp::metadata(Meta* m) method to retrieve (key, value) metadata.
+ */
+struct Meta
+{
+    virtual ~Meta() {};
+    virtual void declare(const char* key, const char* value) = 0;
+};
+
+#endif
+/**************************  END  meta.h **************************/
+#ifdef SOUNDFILE
+// Parent soundfile object uses exceptions in one of its method.
+// This is probably the easiest may to make GCC happy about it when we compile
+// with exceptions disabled.
+#define try if(true)
+#define catch(x) if(false)
+/************************** BEGIN Soundfile.h **************************/
+/************************************************************************
+ FAUST Architecture File
+ Copyright (C) 2017 GRAME, Centre National de Creation Musicale
+ ---------------------------------------------------------------------
+ This Architecture section is free software; you can redistribute it
+ and/or modify it under the terms of the GNU General Public License
+ as published by the Free Software Foundation; either version 3 of
+ the License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; If not, see .
+
+ EXCEPTION : As a special exception, you may create a larger work
+ that contains this FAUST architecture section and distribute
+ that work under terms of your choice, so long as this FAUST
+ architecture section is not modified.
+ ************************************************************************/
+
+#ifndef __Soundfile__
+#define __Soundfile__
+
+#include 
+#include 
+
+#ifndef FAUSTFLOAT
+#define FAUSTFLOAT float
+#endif
+
+#define BUFFER_SIZE 1024
+#define SAMPLE_RATE 44100
+#define MAX_CHAN 64
+#define MAX_SOUNDFILE_PARTS 256
+
+#ifdef _MSC_VER
+#define PRE_PACKED_STRUCTURE __pragma(pack(push, 1))
+#define POST_PACKED_STRUCTURE \
+    ;                         \
+    __pragma(pack(pop))
+#else
+#define PRE_PACKED_STRUCTURE
+#define POST_PACKED_STRUCTURE __attribute__((__packed__))
+#endif
+
+/*
+ The soundfile structure to be used by the DSP code. Soundfile has a MAX_SOUNDFILE_PARTS parts 
+ (even a single soundfile or an empty soundfile). 
+ fLength, fOffset and fSR fields are filled accordingly by repeating
+ the actual parts if needed.
+ 
+ It has to be 'packed' to that the LLVM backend can correctly access it.
+
+ Index computation:
+    - p is the current part number [0..MAX_SOUNDFILE_PARTS-1] (must be proved by the type system)
+    - i is the current position in the part. It will be constrained between [0..length]
+    - idx(p,i) = fOffset[p] + max(0, min(i, fLength[p]));
+*/
+
+PRE_PACKED_STRUCTURE
+struct Soundfile {
+    FAUSTFLOAT** fBuffers;
+    int* fLength;   // length of each part (so fLength[P] contains the length in frames of part P)
+    int* fSR;       // sample rate of each part (so fSR[P] contains the SR of part P)
+    int* fOffset;   // offset of each part in the global buffer (so fOffset[P] contains the offset in frames of part P)
+    int fChannels;  // max number of channels of all concatenated files
+
+    Soundfile()
+    {
+        fBuffers  = nullptr;
+        fChannels = -1;
+        fLength   = new int[MAX_SOUNDFILE_PARTS];
+        fSR       = new int[MAX_SOUNDFILE_PARTS];
+        fOffset   = new int[MAX_SOUNDFILE_PARTS];
+    }
+ 
+    ~Soundfile()
+    {
+        // Free the real channels only
+        for (int chan = 0; chan < fChannels; chan++) {
+            delete[] fBuffers[chan];
+        }
+        delete[] fBuffers;
+        delete[] fLength;
+        delete[] fSR;
+        delete[] fOffset;
+    }
+
+} POST_PACKED_STRUCTURE;
+
+/*
+ The generic soundfile reader.
+ */
+
+class SoundfileReader {
+    
+   protected:
+    
+    int fDriverSR;
+    
+    void emptyFile(Soundfile* soundfile, int part, int& offset)
+    {
+        soundfile->fLength[part] = BUFFER_SIZE;
+        soundfile->fSR[part] = SAMPLE_RATE;
+        soundfile->fOffset[part] = offset;
+        // Update offset
+        offset += soundfile->fLength[part];
+    }
+
+    Soundfile* createSoundfile(int cur_chan, int length, int max_chan)
+    {
+        Soundfile* soundfile = new Soundfile();
+        soundfile->fBuffers = new FAUSTFLOAT*[max_chan];
+        
+        for (int chan = 0; chan < cur_chan; chan++) {
+            soundfile->fBuffers[chan] = new FAUSTFLOAT[length];
+            memset(soundfile->fBuffers[chan], 0, sizeof(FAUSTFLOAT) * length);
+        }
+        
+        soundfile->fChannels = cur_chan;
+        return soundfile;
+    }
+
+    void getBuffersOffset(Soundfile* soundfile, FAUSTFLOAT** buffers, int offset)
+    {
+        for (int chan = 0; chan < soundfile->fChannels; chan++) {
+            buffers[chan] = &soundfile->fBuffers[chan][offset];
+        }
+    }
+    
+    // Check if a soundfile exists and return its real path_name
+    std::string checkFile(const std::vector& sound_directories, const std::string& file_name)
+    {
+        if (checkFile(file_name)) {
+            return file_name;
+        } else {
+            for (size_t i = 0; i < sound_directories.size(); i++) {
+                std::string path_name = sound_directories[i] + "/" + file_name;
+                if (checkFile(path_name)) { return path_name; }
+            }
+            return "";
+        }
+    }
+    
+    bool isResampling(int sample_rate) { return (fDriverSR > 0 && fDriverSR != sample_rate); }
+ 
+    // To be implemented by subclasses
+
+    /**
+     * Check the availability of a sound resource.
+     *
+     * @param path_name - the name of the file, or sound resource identified this way
+     *
+     * @return true if the sound resource is available, false otherwise.
+     */
+    virtual bool checkFile(const std::string& path_name) = 0;
+    
+    /**
+     * Check the availability of a sound resource.
+     *
+     * @param buffer - the sound buffer
+     * @param size - the sound buffer length
+     *
+     * @return true if the sound resource is available, false otherwise.
+     */
+
+    virtual bool checkFile(unsigned char* buffer, size_t size) { return true; }
+
+    /**
+     * Get the channels and length values of the given sound resource.
+     *
+     * @param path_name - the name of the file, or sound resource identified this way
+     * @param channels - the channels value to be filled with the sound resource number of channels
+     * @param length - the length value to be filled with the sound resource length in frames
+     *
+     */
+    virtual void getParamsFile(const std::string& path_name, int& channels, int& length) = 0;
+    
+    /**
+     * Get the channels and length values of the given sound resource.
+     *
+     * @param buffer - the sound buffer
+     * @param size - the sound buffer length
+     * @param channels - the channels value to be filled with the sound resource number of channels
+     * @param length - the length value to be filled with the sound resource length in frames
+     *
+     */
+    virtual void getParamsFile(unsigned char* buffer, size_t size, int& channels, int& length) {}
+
+    /**
+     * Read one sound resource and fill the 'soundfile' structure accordingly
+     *
+     * @param soundfile - the soundfile to be filled
+     * @param path_name - the name of the file, or sound resource identified this way
+     * @param part - the part number to be filled in the soundfile
+     * @param offset - the offset value to be incremented with the actual sound resource length in frames
+     * @param max_chan - the maximum number of mono channels to fill
+     *
+     */
+    virtual void readFile(Soundfile* soundfile, const std::string& path_name, int part, int& offset, int max_chan) = 0;
+    
+    /**
+     * Read one sound resource and fill the 'soundfile' structure accordingly
+     *
+     * @param soundfile - the soundfile to be filled
+     * @param buffer - the sound buffer
+     * @param size - the sound buffer length
+     * @param part - the part number to be filled in the soundfile
+     * @param offset - the offset value to be incremented with the actual sound resource length in frames
+     * @param max_chan - the maximum number of mono channels to fill
+     *
+     */
+    virtual void readFile(Soundfile* soundfile, unsigned char* buffer, size_t size, int part, int& offset, int max_chan) {}
+
+  public:
+    
+    virtual ~SoundfileReader() {}
+    
+    void setSampleRate(int sample_rate) { fDriverSR = sample_rate; }
+   
+    Soundfile* createSoundfile(const std::vector& path_name_list, int max_chan)
+    {
+        try {
+            int cur_chan = 1; // At least one channel
+            int total_length = 0;
+            
+            // Compute total length and channels max of all files
+            for (int i = 0; i < int(path_name_list.size()); i++) {
+                int chan, length;
+                if (path_name_list[i] == "__empty_sound__") {
+                    length = BUFFER_SIZE;
+                    chan = 1;
+                } else {
+                    getParamsFile(path_name_list[i], chan, length);
+                }
+                cur_chan = std::max(cur_chan, chan);
+                total_length += length;
+            }
+           
+            // Complete with empty parts
+            total_length += (MAX_SOUNDFILE_PARTS - path_name_list.size()) * BUFFER_SIZE;
+            
+            // Create the soundfile
+            Soundfile* soundfile = createSoundfile(cur_chan, total_length, max_chan);
+            
+            // Init offset
+            int offset = 0;
+            
+            // Read all files
+            for (int i = 0; i < int(path_name_list.size()); i++) {
+                if (path_name_list[i] == "__empty_sound__") {
+                    emptyFile(soundfile, i, offset);
+                } else {
+                    readFile(soundfile, path_name_list[i], i, offset, max_chan);
+                }
+            }
+            
+            // Complete with empty parts
+            for (int i = int(path_name_list.size()); i < MAX_SOUNDFILE_PARTS; i++) {
+                emptyFile(soundfile, i, offset);
+            }
+            
+            // Share the same buffers for all other channels so that we have max_chan channels available
+            for (int chan = cur_chan; chan < max_chan; chan++) {
+                soundfile->fBuffers[chan] = soundfile->fBuffers[chan % cur_chan];
+            }
+            
+            return soundfile;
+            
+        } catch (...) {
+            return nullptr;
+        }
+    }
+
+    // Check if all soundfiles exist and return their real path_name
+    std::vector checkFiles(const std::vector& sound_directories,
+                                        const std::vector& file_name_list)
+    {
+        std::vector path_name_list;
+        for (size_t i = 0; i < file_name_list.size(); i++) {
+            std::string path_name = checkFile(sound_directories, file_name_list[i]);
+            // If 'path_name' is not found, it is replaced by an empty sound (= silence)
+            path_name_list.push_back((path_name == "") ? "__empty_sound__" : path_name);
+        }
+        return path_name_list;
+    }
+
+};
+
+#endif
+/**************************  END  Soundfile.h **************************/
+
+#define MAX_SOUNDFILES 32
+// This is just value for upper limit - actual memory used depends only on number of files loaded
+#endif
+
+static float fKey, fFreq, fGain, fGate;
+static float fBend = 1.0f;
+
+class MonoVoiceAllocator {
+    float& key;
+    float& freq;
+    float& gain;
+    float& gate;
+    float& bend;
+    uint8_t notes[16];
+    uint8_t lastNote = 0;
+
+public:
+    MonoVoiceAllocator(float& ky, float& fq, float& gn, float& gt, float& bd)
+        : key(ky)
+        , freq(fq)
+        , gain(gn)
+        , gate(gt)
+        , bend(bd) {
+    }
+    float getFreq() {
+        return freq;
+    }
+    float getGain() {
+        return gain;
+    }
+    float getGate() {
+        return gate;
+    }
+    float getBend() {
+        return bend;
+    }
+    void processMidi(MidiMessage msg) {
+        uint16_t samples = 0;
+        if (msg.isNoteOn()) {
+            noteOn(msg.getNote(), (uint16_t)msg.getVelocity() << 5, samples);
+        }
+        else if (msg.isNoteOff()) {
+            noteOff(msg.getNote(), (uint16_t)msg.getVelocity() << 5, samples);
+        }
+        else if (msg.isPitchBend()) {
+            setPitchBend(msg.getPitchBend());
+        }
+        else if (msg.isControlChange()) {
+            if (msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
+                allNotesOff();
+        }
+    }
+    void setPitchBend(int16_t pb) {
+        float fb = pb * (2.0f / 8192.0f);
+        bend = exp2f(fb);
+    }
+    float noteToHz(uint8_t note) {
+        return 440.0f * exp2f((note - 69) / 12.0);
+    }
+    float velocityToGain(uint16_t velocity) {
+        return exp2f(velocity / 4095.0f) - 1;
+        // return powf((1.0-depth) + (velocity/127.0*depth), 2.0);
+    }
+    void noteOn(uint8_t note, uint16_t velocity, uint16_t delay) {
+        if (lastNote < 16)
+            notes[lastNote++] = note;
+	key = note;
+        freq = noteToHz(note);
+        gain = velocityToGain(velocity);
+        gate = 1.0f;
+    }
+    void noteOff(uint8_t note, uint16_t velocity, uint16_t delay) {
+        int i;
+        for (i = 0; i < lastNote; ++i) {
+            if (notes[i] == note)
+                break;
+        }
+        if (lastNote > 1) {
+            lastNote--;
+            while (i < lastNote) {
+                notes[i] = notes[i + 1];
+                i++;
+            }
+	    key = notes[lastNote - 1];
+            freq = noteToHz(key);
+        }
+        else {
+            gate = 0.0f;
+            lastNote = 0;	    
+        }
+    }
+    void allNotesOff() {
+        lastNote = 0;
+        bend = 0;
+    }
+};
+
+enum ParserState {
+    ST_NONE,
+    ST_KEY,
+    ST_VALUE,
+};
+
+/*************************************************************************************
+ * To enable MIDI in current patch, add this to source Faust file:
+ *     declare options "[midi:on]";
+ *
+ * You can also add a description to be displayed like this:
+ *     declare message "Hello World";
+ *
+ * To add V/Oct scaling support, use something likes this:
+ *     declare owl "[voct:input][voct:output]";
+ * Declaring just one V/Oct converter or both of them is fine.
+ **************************************************************************************/
+
+class MetaData : public Meta {
+public:
+    bool midiOn = false;
+    const char* message = NULL;
+    bool vOctInput = false;
+    bool vOctOutput = false;
+
+    void declare(const char* key, const char* value) {
+        /*
+          This function would be called by Faust compiler based on metadata
+          declared in source file.
+         */
+        if (strcasecmp(key, "options") == 0) {
+            // Parse options.
+            // Faust provides a metadata parser, but they use stdlib stuff that won't work on OWL
+            parseOptions(key, value);
+        }
+        else if (strcasecmp(key, "message") == 0) {
+            message = value;
+        }
+        else if (strcasecmp(key, "owl") == 0) {
+            parseOptions(key, value);
+        }
+    }
+
+private:
+    void processItem(const char* key, const char* item_key, const char* item_value) {
+        if (strcasecmp(key, "options") == 0 && strcasecmp(item_key, "midi") == 0 &&
+            strcasecmp(item_value, "on") == 0) {
+            midiOn = true;
+        }
+        else if (strcasecmp(key, "owl") == 0 && strcasecmp(item_key, "voct") == 0) {
+            if (strcasecmp(item_value, "input") == 0) {
+                vOctInput = true;
+            }
+            else if (strcasecmp(item_value, "output") == 0) {
+                vOctOutput = true;
+            }
+        }
+    }
+
+    void parseOptions(const char* key, const char* value) {
+        const char* c = value;
+        const uint8_t max_len = 32;
+        // We don't need to read long item values, so set a limit that would be used for truncating them.
+        char item_key[max_len] = "";
+        char item_value[max_len] = "";
+        uint8_t key_pos;
+        uint8_t value_pos;
+        ParserState state = ST_NONE;
+        while (*c) {
+            if (state == ST_NONE) {
+                if (*c == '[') {
+                    // Start reading key
+                    state = ST_KEY;
+                    key_pos = 0;
+                    value_pos = 0;
+                }
+            }
+            else if (state == ST_KEY) {
+                if (*c == ':') {
+                    // Found end of key
+                    item_key[key_pos + 1] = '\n';
+                    // Start reading value
+                    state = ST_VALUE;
+                }
+                else if (key_pos < max_len - 1)
+                    // Add next character to key
+                    item_key[key_pos++] = *c;
+            }
+            else if (state == ST_VALUE) {
+                if (*c == ']') {
+                    // Found end of value
+                    item_value[value_pos + 1] = '\n';
+                    processItem(key, item_key, item_value);
+                    // Reset state
+                    state = ST_NONE;
+                }
+                else if (value_pos < max_len - 1)
+                    // Add next character to value
+                    item_value[value_pos++] = *c;
+            };
+            c++;
+        }
+    }
+};
+
+/**************************************************************************************
+ *
+ * OwlParameter : object used by OwlUI to ensures the connection between an OWL
+ * parameter and a FAUST widget
+ *
+ ***************************************************************************************/
+
+class OwlParameterBase {
+protected:
+    Patch* fPatch; // needed to register and read owl parameters
+    FAUSTFLOAT* fZone; // Faust widget zone
+    bool isOutput;
+
+public:
+    OwlParameterBase(Patch* pp, FAUSTFLOAT* z, bool output)
+        : fPatch(pp)
+        , fZone(z)
+        , isOutput(output) {
+    }
+    virtual void update() {
+    }
+    virtual ~OwlParameterBase() {}; // Not adding virtual destructor triggers undefined behavior
+};
+
+class OwlParameter : public OwlParameterBase {
+protected:
+    PatchParameterId fParameter; // OWL parameter code : PARAMETER_A,...
+    float fMin; // Faust widget minimal value
+    float fSpan; // Faust widget value span (max-min)
+
+public:
+    OwlParameter(Patch* pp, PatchParameterId param, FAUSTFLOAT* z,
+        const char* l, float init, float lo, float hi, bool output = false)
+        : OwlParameterBase(pp, z, output)
+        , fParameter(param)
+        , fMin(lo)
+        , fSpan(hi - lo) {
+        fPatch->registerParameter(param, l);
+        fPatch->setParameterValue(fParameter, (init - lo) / fSpan);
+    }
+    void update() {
+        if (isOutput) {
+            fPatch->setParameterValue(fParameter, (*fZone - fMin) / fSpan);
+        }
+        else
+            *fZone = fMin + fSpan * fPatch->getParameterValue(fParameter);
+    }
+    ~OwlParameter() {};
+};
+
+class OwlVariable : public OwlParameterBase {
+protected:
+    float* fValue;
+    float fLo; // Faust widget minimal value
+    float fHi; // Faust widget value span (max-min)
+
+public:
+    OwlVariable(Patch* pp, float* t, FAUSTFLOAT* z, const char* l, float init,
+        float lo, float hi, bool output = false)
+        : OwlParameterBase(pp, z, output)
+        , fValue(t)
+        , fLo(lo)
+        , fHi(hi) {
+        *fZone = init;
+    }
+    void update() {
+        if (isOutput) {
+            // We don't output OwlVariable anywhere, so would this even be useful?
+            *fValue = *fZone;
+        }
+        else {
+            float value = *fValue;
+            // clip value to min/max
+            value = value > fLo ? (value < fHi ? value : fHi) : fLo;
+            *fZone = value;
+        }
+    }
+    ~OwlVariable() {};
+};
+
+class OwlButton : public OwlParameterBase {
+protected:
+    PatchButtonId fButton; // OWL button id : PUSHBUTTON, ...
+public:
+  OwlButton(Patch* pp, PatchButtonId button, FAUSTFLOAT* z, const char* l, bool output=false) :
+    OwlParameterBase(pp, z, output), fButton(button) {}
+  void update()	{
+    if(isOutput){
+      fPatch->setButton(fButton, *fZone,  0);
+    }else{
+      *fZone = fPatch->isButtonPressed(fButton);
+    }
+  }
+};
+
+class OwlCheckbox : public OwlParameterBase {
+protected:
+    PatchButtonId fButton; // OWL button id : PUSHBUTTON, ...
+    bool wasHigh = false; // Flag for edge detection
+    bool state = false;   // Current state
+public:
+    OwlCheckbox(Patch* pp, PatchButtonId button, FAUSTFLOAT* z, const char* l)
+        : OwlParameterBase(pp, z, false)
+        , fButton(button) {}
+    void update() {
+        bool isHigh = fPatch->isButtonPressed(fButton);
+        state ^= isHigh && !wasHigh;
+        wasHigh = isHigh;
+        fPatch->setButton(fButton, state,  0);
+        *fZone = state;
+    }
+};
+
+/**************************************************************************************
+ *
+ * OwlResourceReader: Reads resources from flash storage and returns Soundfile objects.
+ *
+ * This is based on SoundfileReader in faust/gui/Soundfile.h with some changes:
+ * - no allocation of excessive amounts of RAM for empty buffers
+ * - no stdlib usage of vectors, maps,
+ * - exception handling removed
+ *
+ ***************************************************************************************/
+
+#define EMPTY_BUFFER_SIZE 0
+
+#ifdef SOUNDFILE
+class OwlResourceReader {
+public:
+    virtual ~OwlResourceReader() {}
+
+    void setSampleRate(int sample_rate) { fDriverSR = sample_rate; }
+
+    Soundfile* createSoundfile(const char** path_name_list, int path_name_size, int max_chan) {
+        Soundfile *soundfile = NULL;
+        int cur_chan = 1; // At least one channel
+        int total_length = 1; // At least one byte - otherwise we can't allocate empty channels
+
+        // Compute total length and channels max of all files
+        for (int i = 0; i < path_name_size; i++) {
+            int chan, length;
+            if (strcmp(path_name_list[i], "__empty_sound__") == 0) {
+                length = EMPTY_BUFFER_SIZE;
+                chan = 1;
+            } else {
+                getParamsFile(path_name_list[i], chan, length);
+            }
+            cur_chan = std::max(cur_chan, chan);
+            total_length += length;
+        }
+
+        // Complete with empty parts
+        total_length += (MAX_SOUNDFILE_PARTS - path_name_size) * EMPTY_BUFFER_SIZE;
+
+        // Create the soundfile
+        soundfile = createSoundfile(cur_chan, total_length, max_chan);
+
+        // Init offset
+        int offset = 0;
+
+        // Read all files
+        for (int i = 0; i < path_name_size; i++) {
+            if (strcmp(path_name_list[i], "__empty_sound__") == 0){
+                emptyFile(soundfile, i, offset);
+            } else {
+                readFile(soundfile, path_name_list[i], i, offset, max_chan);
+            }
+        }
+
+        // Complete with empty parts
+        for (int i = path_name_size; i < MAX_SOUNDFILE_PARTS; i++) {
+            emptyFile(soundfile, i, offset);
+        }
+
+        // Share the same buffers for all other channels so that we have max_chan channels available
+        for (int chan = cur_chan; chan < max_chan; chan++) {
+            soundfile->fBuffers[chan] = soundfile->fBuffers[chan % cur_chan];
+        }
+        return soundfile;
+    }
+
+    /**
+     * Check the availability of a sound resource.
+     *
+     * @param resource_name - the name of the file, or sound resource identified this way
+     *
+     * @return true if the sound resource is available, false otherwise.
+     */
+    bool checkFile(const char* resource_name) {
+        Resource* resource = Resource::open(resource_name);
+        bool result = resource != NULL;
+        Resource::destroy(resource);
+        if (!result){
+            debugMessage("Resource not found");
+        }
+        return result;
+    }
+
+protected:
+    int fDriverSR;
+
+    void emptyFile(Soundfile* soundfile, int part, int& offset) {
+        soundfile->fLength[part] = EMPTY_BUFFER_SIZE;
+        soundfile->fSR[part] = SAMPLE_RATE;
+        soundfile->fOffset[part] = offset;
+        // Update offset
+        offset += soundfile->fLength[part];
+    }
+
+    Soundfile* createSoundfile(int cur_chan, int length, int max_chan) {
+        Soundfile* soundfile = new Soundfile();
+        soundfile->fBuffers = new FAUSTFLOAT*[max_chan];
+
+        for (int chan = 0; chan < cur_chan; chan++) {
+            soundfile->fBuffers[chan] = new FAUSTFLOAT[length];
+            memset(soundfile->fBuffers[chan], 0, sizeof(FAUSTFLOAT) * length);
+        }
+
+        soundfile->fChannels = cur_chan;
+        return soundfile;
+    }
+
+    void getBuffersOffset(Soundfile* soundfile, FAUSTFLOAT** buffers, int offset) {
+        for (int chan = 0; chan < soundfile->fChannels; chan++) {
+            buffers[chan] = &soundfile->fBuffers[chan][offset];
+        }
+    }
+
+    /**
+     * Get the channels and length values of the given sound resource.
+     *
+     * @param path_name - the name of the file, or sound resource identified this way
+     * @param channels - the channels value to be filled with the sound resource number of channels
+     * @param length - the length value to be filled with the sound resource length in frames
+     *
+     */
+    void getParamsFile(const char* path_name, int& channels, int& length) {
+        WaveResourceReader reader(path_name);
+        channels = 1;
+        length = 0;
+
+        if (reader.loadWaveHeader()){
+            channels = reader.fWave->num_channels;
+            length = (reader.fWave->subchunk_2_size * 8) / (reader.fWave->num_channels * reader.fWave->bits_per_sample);
+        }
+    }
+
+    /**
+     * Read one sound resource and fill the 'soundfile' structure accordingly
+     *
+     * @param soundfile - the soundfile to be filled
+     * @param path_name - the name of the file, or sound resource identified this way
+     * @param part - the part number to be filled in the soundfile
+     * @param offset - the offset value to be incremented with the actual sound resource length in frames
+     * @param max_chan - the maximum number of mono channels to fill
+     *
+     */
+    void readFile(Soundfile* soundfile, const char* path_name, int part, int& offset, int max_chan) {
+        WaveResourceReader reader(path_name);
+        if (!reader.loadWaveHeader()){
+            return;
+        }
+        reader.loadWave();
+
+        soundfile->fLength[part] = (reader.fWave->subchunk_2_size * 8) / (reader.fWave->num_channels * reader.fWave->bits_per_sample);
+        soundfile->fSR[part] = reader.fWave->sample_rate;
+        soundfile->fOffset[part] = offset;
+
+        // Audio frames have to be written for each chan
+        switch (reader.fWave->bits_per_sample){
+        case 16:
+            // 16 bit samples are signed ints
+            for (int sample = 0; sample < soundfile->fLength[part]; sample++) {
+                float factor = 1.f/32767.f;
+                int16_t* frame = (int16_t*)&reader.fWave->data[reader.fWave->block_align * sample];
+                for (int chan = 0; chan < reader.fWave->num_channels; chan++) {
+                    soundfile->fBuffers[chan][offset + sample] = frame[chan] * factor;
+                }
+            }
+            break;
+        case 8:
+            // 8 bit samples are unsigned ints
+            for (int sample = 0; sample < soundfile->fLength[part]; sample++) {
+                float factor = 1.f/255.f;
+                uint8_t* frame = (uint8_t*)&reader.fWave->data[reader.fWave->block_align * sample];
+                for (int chan = 0; chan < reader.fWave->num_channels; chan++) {
+                    soundfile->fBuffers[chan][offset + sample] = frame[chan] * factor - 0.5f;
+                }
+            }
+            break;
+        default:
+            debugMessage("Unsupported format");
+            return;
+        }
+
+        //
+        // Update offset
+        offset += soundfile->fLength[part];
+    }
+};
+#endif /* SOUNDFILE */
+
+
+/**************************************************************************************
+ *
+ * OwlUI : Faust User Interface builder. Passed to buildUserInterface OwlU
+ * ensures the mapping between owl parameters and faust widgets. It relies on
+ * specific metadata "...[OWL:PARAMETER_X]..." in widget's label for that. For
+ * example any faust widget with metadata [OWL:B] will be controlled by
+ * PARAMETER_B (the second knob).
+ *
+ ***************************************************************************************/
+
+// The maximun number of mappings between owl parameters and faust widgets
+#define MAXOWLPARAMETERS 20
+#define NO_PARAMETER     ((PatchParameterId)-1)
+#define NO_BUTTON        ((PatchButtonId)-1)
+#define PATH_LEN         24
+
+MonoVoiceAllocator allocator(fKey, fFreq, fGain, fGate, fBend);
+VoltsPerOctave* fVOctInput;
+VoltsPerOctave* fVOctOutput;
+Soundfile* defaultsound;
+
+class OwlUI : public UI {
+    Patch* fPatch;
+    PatchParameterId fParameter; // current parameter ID, value NO_PARAMETER means not set
+    int fParameterIndex;         // number of OwlParameters collected so far
+    int fSampleRate;
+    //std::map fSoundfileMap;    // Map to share loaded soundfiles
+    OwlParameterBase* fParameterTable[MAXOWLPARAMETERS];
+#ifdef SOUNDFILE
+    int fSoundfileIndex;
+    OwlResourceReader* fSoundReader = NULL;
+    Soundfile* fSoundfiles[MAX_SOUNDFILES];
+#endif
+    PatchButtonId fButton;
+    // check if the widget is an Owl parameter and, if so, add the corresponding OwlParameter
+    void addInputOwlParameter(const char* label, FAUSTFLOAT* zone,
+        FAUSTFLOAT init, FAUSTFLOAT lo, FAUSTFLOAT hi) {
+        if (fParameterIndex < MAXOWLPARAMETERS) {
+            if (meta.midiOn && strcasecmp(label, "freq") == 0) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlVariable(fPatch, &fFreq, zone, label, init, lo, hi);
+            }
+            else if (meta.midiOn && strcasecmp(label, "gain") == 0) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlVariable(fPatch, &fGain, zone, label, init, lo, hi);
+            }
+            else if (meta.midiOn && strcasecmp(label, "bend") == 0) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlVariable(fPatch, &fBend, zone, label, init, lo, hi);
+            }
+            else if (meta.midiOn && strcasecmp(label, "key") == 0) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlVariable(fPatch, &fKey, zone, label, init, lo, hi);
+            }
+            else if (fParameter != NO_PARAMETER) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlParameter(fPatch, fParameter, zone, label, init, lo, hi);
+            }
+        }
+        fParameter = NO_PARAMETER; // clear current parameter ID
+	    fButton = NO_BUTTON;
+    }
+
+    void addOutputOwlParameter(
+        const char* label, FAUSTFLOAT* zone, FAUSTFLOAT lo, FAUSTFLOAT hi) {
+        if(label[strlen(label) - 1] != '>')
+            debugMessage("Add '>' character for output parameters");
+        if (fParameterIndex < MAXOWLPARAMETERS) {
+	    if (fParameter != NO_PARAMETER) {
+                fParameterTable[fParameterIndex++] = new OwlParameter(
+                    fPatch, fParameter, zone, label, lo, lo, hi, true);
+            }
+            else if(fButton != NO_BUTTON){
+                fParameterTable[fParameterIndex++] = new OwlButton(
+                fPatch, fButton, zone, label, true);
+            }
+        }
+        fParameter = NO_PARAMETER;
+        fButton = NO_BUTTON;
+    }
+
+    void addOwlButton(const char* label, FAUSTFLOAT* zone) {
+        if (fParameterIndex < MAXOWLPARAMETERS) {
+            if (meta.midiOn && strcasecmp(label, "gate") == 0) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlVariable(fPatch, &fGate, zone, label, 0.0f, 0.0f, 1.0f);
+            }
+            else if (fButton != NO_BUTTON) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlButton(fPatch, fButton, zone, label);
+            }
+        }
+        fParameter = NO_PARAMETER;
+        fButton = NO_BUTTON; // clear current button ID
+    }
+#ifdef SOUNDFILE
+    void addOwlResources(const char** resource_names, int names_size, Soundfile** sf_zone){
+        if (fSoundfileIndex < MAX_SOUNDFILES){
+            Soundfile* sound_file = fSoundReader->createSoundfile(resource_names, names_size, MAX_CHAN);
+            fSoundfiles[fSoundfileIndex++] = sound_file;
+            if (sound_file != NULL) {
+                *sf_zone = sound_file;
+                return;
+            }
+        }
+        // If failure, use 'defaultsound'
+        *sf_zone = defaultsound;
+    }
+#endif /* SOUNDFILE */
+    void addOwlCheckbox(const char* label, FAUSTFLOAT* zone) {
+        if (fParameterIndex < MAXOWLPARAMETERS) {
+            if (meta.midiOn && strcasecmp(label, "gate") == 0) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlVariable(fPatch, &fGate, zone, label, 0.0f, 0.0f, 1.0f);
+            }
+            else if (fButton != NO_BUTTON) {
+                fParameterTable[fParameterIndex++] =
+                    new OwlCheckbox(fPatch, fButton, zone, label);
+            }
+        }
+        fParameter = NO_PARAMETER;
+        fButton = NO_BUTTON; // clear current button ID
+    }
+
+    // we dont want to create a widget but we clear the current parameter ID just in case
+    void skip() {
+        fParameter = NO_PARAMETER; // clear current parameter ID
+        fButton = NO_BUTTON;
+    }
+
+public:
+    MetaData meta;
+    OwlUI(Patch* pp)
+        : fPatch(pp)
+        , fParameter(NO_PARAMETER)
+        , fParameterIndex(0)
+#ifdef SOUNDFILE
+        , fSoundfileIndex(0)
+#endif
+        , fButton(NO_BUTTON) {
+    }
+
+    virtual ~OwlUI() {
+        for (int i = 0; i < fParameterIndex; i++)
+            delete fParameterTable[i];
+        if (meta.vOctInput)
+            delete fVOctInput;
+        if (meta.vOctOutput)
+            delete fVOctOutput;
+#ifdef SOUNDFILE
+        if (fSoundReader != NULL) {
+            delete fSoundReader;
+        }
+        for (int i = 0; i < fSoundfileIndex; i++){
+            delete fSoundfiles[i];
+        }
+#endif
+    }
+
+    // should be called before compute() to update widget's zones registered as OWL parameters
+    void update() {
+        for (int i = 0; i < fParameterIndex; i++)
+            fParameterTable[i]->update();
+    }
+
+    //---------------------- virtual methods called by buildUserInterface ----------------
+
+    // -- widget's layouts
+
+    virtual void openTabBox(const char* label) {
+    }
+    virtual void openHorizontalBox(const char* label) {
+    }
+    virtual void openVerticalBox(const char* label) {
+    }
+    virtual void closeBox() {
+    }
+
+    // -- active widgets
+
+    virtual void addButton(const char* label, FAUSTFLOAT* zone) {
+        addOwlButton(label, zone);
+    }
+    virtual void addCheckButton(const char* label, FAUSTFLOAT* zone) {
+        addOwlCheckbox(label, zone);
+    }
+    virtual void addVerticalSlider(const char* label, FAUSTFLOAT* zone,
+        FAUSTFLOAT init, FAUSTFLOAT lo, FAUSTFLOAT hi, FAUSTFLOAT step) {
+        addInputOwlParameter(label, zone, init, lo, hi);
+    }
+    virtual void addHorizontalSlider(const char* label, FAUSTFLOAT* zone,
+        FAUSTFLOAT init, FAUSTFLOAT lo, FAUSTFLOAT hi, FAUSTFLOAT step) {
+        addInputOwlParameter(label, zone, init, lo, hi);
+    }
+    virtual void addNumEntry(const char* label, FAUSTFLOAT* zone,
+        FAUSTFLOAT init, FAUSTFLOAT lo, FAUSTFLOAT hi, FAUSTFLOAT step) {
+        addInputOwlParameter(label, zone, init, lo, hi);
+    }
+
+    // -- passive widgets
+
+    virtual void addHorizontalBargraph(
+        const char* label, FAUSTFLOAT* zone, FAUSTFLOAT lo, FAUSTFLOAT hi) {
+        addOutputOwlParameter(label, zone, lo, hi);
+    }
+    virtual void addVerticalBargraph(
+        const char* label, FAUSTFLOAT* zone, FAUSTFLOAT lo, FAUSTFLOAT hi) {
+        addOutputOwlParameter(label, zone, lo, hi);
+    }
+    // -- soundfiles
+    virtual void addSoundfile(const char* label, const char* url, Soundfile** sf_zone) {
+#ifdef SOUNDFILE
+        if (fSoundReader == NULL){
+            fSoundReader = new OwlResourceReader();
+            fSoundReader->setSampleRate(fPatch->getSampleRate());
+            defaultsound = fSoundReader->createSoundfile(nullptr, 0, 1);
+        }
+
+        if (url[0] == '{'){
+            char* paths[MAX_SOUNDFILE_PARTS];
+            int total_paths = 0;
+            bool reading_path = false;
+            const char* c = url;
+            const char* start_path;
+            while (c){
+                if (reading_path){
+                    if (*c++ == '\''){
+                        // Closing quote
+                        reading_path = false;
+                        uint32_t path_len = std::min(c - start_path, PATH_LEN - 1);
+                        paths[total_paths] = new char[path_len];
+                        strncpy(paths[total_paths], start_path, path_len - 1);
+                        paths[total_paths][path_len -1] = 0;
+                        if (fSoundReader->checkFile(paths[total_paths]))
+                            total_paths++;
+                        else {
+                            delete[] paths[total_paths];
+                        }
+                    }
+                }
+                else {
+                    switch (*c){
+                    case '\'':
+                        // Opening quote
+                        start_path = ++c;
+                        reading_path = true;
+                        break;
+                    case '}':
+                        c = 0; // Done!
+                        break;
+                    default:
+                        // Path separator will end here
+                        c++;
+                        break;
+                    }
+                }
+            }
+            addOwlResources((const char**)paths, total_paths, sf_zone);
+            // Parsed path names are not used after loading resources
+            for (int i = 0; i < total_paths; i++){
+                delete[] paths[i];
+            }
+        }
+#else
+        fParameter = NO_PARAMETER; // clear current parameter ID
+        fButton = NO_BUTTON;
+#endif /* SOUNDFILE */
+    }
+
+    // -- metadata declarations
+
+    virtual void declare(FAUSTFLOAT* z, const char* k, const char* id) {
+        if (strcasecmp(k, "OWL") == 0) {
+            if (strncasecmp(id, "PARAMETER_", 10) == 0)
+                id += 10;
+            if (strlen(id) == 1) {
+                // Single char parameter name.
+                // Note that we can use I - P as aliases for AA-AH.
+                // Rationale: Magus uses only single letters param names, has
+                // no free space on display for second letter.
+                if (*id >= 'A' && *id <= 'P') {
+                    // Uppercase parameter name
+                    fParameter = PatchParameterId(*id - 'A');
+                }
+                else if (*id >= '0' && *id <= '9') {
+                    // Parameter can be numeric as well
+                    fParameter = PatchParameterId(*id - '0');
+                }
+                else if (*id >= 'a' && *id <= 'P') {
+                    // Lowercase parameter name
+                    fParameter = PatchParameterId(*id - 'a');
+                }
+            }
+            else if (strlen(id) == 2) {
+                int param_tmp = -1;
+                bool is_digit = false;
+                if (*id >= 'A' && *id <= 'D') {
+                    // Uppercase parameter name
+                    param_tmp = *id - 'A';
+                }
+                else if (*id >= '0' && *id <= '9') {
+                    // Parameter can be numeric as well
+                    is_digit = true;
+                    fParameter = PatchParameterId(*id - '0');
+                }
+                else if (*id >= 'a' && *id <= 'd') {
+                    // Lowercase parameter name
+                    param_tmp = *id - 'a';
+                }
+                if (param_tmp != -1) {
+                    id++;
+                    if (is_digit) {
+                        // Get second digit for decimal param
+                        param_tmp *= 10;
+                        if (*id >= '0' && *id <= '9') {
+                            fParameter = PatchParameterId(
+                                std::min(int(PARAMETER_DH), param_tmp + *id - '0'));
+                        }
+                    }
+                    else if (param_tmp == PARAMETER_B && *id > '0' && *id <= '9') {
+                        fButton = PatchButtonId(BUTTON_A + *id - '1');
+                    }
+                    else {
+                        // Inc to skip 1-character params
+                        param_tmp++;
+                        // This is first character for groups of 8 params
+                        param_tmp *= 8;
+                        // Second char for parameter name
+                        if (*id >= 'A' && *id <= 'H') {
+                            // Uppercase parameter name
+                            fParameter = PatchParameterId(param_tmp + *id - 'A');
+                        }
+                        else if (*id >= 'a' && *id <= 'h') {
+                            // Lowercase parameter name
+                            fParameter = PatchParameterId(param_tmp + *id - 'a');
+                        }
+                    }
+                }
+            }
+            else if (strcasecmp(id, "PUSH") == 0)
+                fButton = PUSHBUTTON;
+	    else if (strcasecmp(id, "ButtonA") == 0)
+                fButton = BUTTON_A;
+            else if (strcasecmp(id, "ButtonB") == 0)
+                fButton = BUTTON_B;
+            else if (strcasecmp(id, "ButtonC") == 0)
+                fButton = BUTTON_C;
+            else if (strcasecmp(id, "ButtonD") == 0)
+                fButton = BUTTON_D;
+	}
+        // else if (strcasecmp(k, "midi") == 0) {
+	//   if (strcasecmp(id, "pitchwheel") == 0){ // PB
+	//   }else if (strcasecmp(id, "ctrl") == 0){ // CC
+	//   }else if (strcasecmp(id, "chanpress") == 0){ // AT
+	//   }else if (strcasecmp(id, "pgm") == 0){ // PC
+	//   }
+        // }
+    }
+
+    // -- V/Oct
+
+    void addVOct() {
+        if (meta.vOctInput)
+            fVOctInput = new VoltsPerOctave(true);
+        if (meta.vOctOutput)
+            fVOctOutput = new VoltsPerOctave(false);
+    }
+};
+
+/* Simple heap based memory manager.
+ * Uses overloaded new/delete operators on OWL hardware.
+ */
+struct OwlMemoryManager : public dsp_memory_manager {
+    void* allocate(size_t size) {
+        void* res = new uint8_t[size];
+        return res;
+    }
+    virtual void destroy(void* ptr) {
+        delete (uint8_t*)ptr;
+    }
+};
+
+#endif // __FaustCommonInfrastructure__
+
+/**************************BEGIN USER SECTION **************************/
+
+
+#ifndef FAUSTFLOAT
+#define FAUSTFLOAT float
+#endif 
+
+#include "faustmath.h"
+#include 
+
+class mydspSIG0 {
+	
+  private:
+	
+	int iRec0[2];
+	
+  public:
+	
+	int getNumInputsmydspSIG0() {
+		return 0;
+	}
+	int getNumOutputsmydspSIG0() {
+		return 1;
+	}
+	int getInputRatemydspSIG0(int channel) {
+		int rate;
+		switch ((channel)) {
+			default: {
+				rate = -1;
+				break;
+			}
+		}
+		return rate;
+	}
+	int getOutputRatemydspSIG0(int channel) {
+		int rate;
+		switch ((channel)) {
+			case 0: {
+				rate = 0;
+				break;
+			}
+			default: {
+				rate = -1;
+				break;
+			}
+		}
+		return rate;
+	}
+	
+	void instanceInitmydspSIG0(int sample_rate) {
+		for (int l0 = 0; (l0 < 2); l0 = (l0 + 1)) {
+			iRec0[l0] = 0;
+		}
+	}
+	
+	void fillmydspSIG0(int count, float* table) {
+		for (int i = 0; (i < count); i = (i + 1)) {
+			iRec0[0] = (iRec0[1] + 1);
+			table[i] = fast_sinf((9.58738019e-05f * float((iRec0[0] + -1))));
+			iRec0[1] = iRec0[0];
+		}
+	}
+
+};
+
+static mydspSIG0* newmydspSIG0(dsp_memory_manager* manager) { return (mydspSIG0*)new(manager->allocate(sizeof(mydspSIG0))) mydspSIG0(); }
+static void deletemydspSIG0(mydspSIG0* dsp, dsp_memory_manager* manager) { dsp->~mydspSIG0(); manager->destroy(dsp); }
+
+static float* ftbl0mydspSIG0 = 0;
+
+#ifndef FAUSTCLASS 
+#define FAUSTCLASS mydsp
+#endif
+
+#ifdef __APPLE__ 
+#define exp10f __exp10f
+#define exp10 __exp10
+#endif
+
+class mydsp : public dsp {
+	
+ private:
+	
+	FAUSTFLOAT fCheckbox0;
+	FAUSTFLOAT fHbargraph0;
+	int fSampleRate;
+	float fConst0;
+	float fRec1[2];
+	
+ public:
+	static dsp_memory_manager* fManager;
+	
+	void metadata(Meta* m) { 
+		m->declare("compile_options", "-lang cpp -inpl -light -mem -es 1 -scal -ftz 0");
+		m->declare("filename", "FaustTest.dsp");
+		m->declare("math.lib/author", "GRAME");
+		m->declare("math.lib/copyright", "GRAME");
+		m->declare("math.lib/deprecated", "This library is deprecated and is not maintained anymore. It will be removed in August 2017.");
+		m->declare("math.lib/license", "LGPL with exception");
+		m->declare("math.lib/name", "Math Library");
+		m->declare("math.lib/version", "1.0");
+		m->declare("music.lib/author", "GRAME");
+		m->declare("music.lib/copyright", "GRAME");
+		m->declare("music.lib/deprecated", "This library is deprecated and is not maintained anymore. It will be removed in August 2017.");
+		m->declare("music.lib/license", "LGPL with exception");
+		m->declare("music.lib/name", "Music Library");
+		m->declare("music.lib/version", "1.0");
+		m->declare("name", "FaustTest");
+	}
+
+	virtual int getNumInputs() {
+		return 0;
+	}
+	virtual int getNumOutputs() {
+		return 1;
+	}
+	virtual int getInputRate(int channel) {
+		int rate;
+		switch ((channel)) {
+			default: {
+				rate = -1;
+				break;
+			}
+		}
+		return rate;
+	}
+	virtual int getOutputRate(int channel) {
+		int rate;
+		switch ((channel)) {
+			case 0: {
+				rate = 1;
+				break;
+			}
+			default: {
+				rate = -1;
+				break;
+			}
+		}
+		return rate;
+	}
+	
+	static void classInit(int sample_rate) {
+		mydspSIG0* sig0 = newmydspSIG0(fManager);
+		sig0->instanceInitmydspSIG0(sample_rate);
+		ftbl0mydspSIG0 = static_cast(fManager->allocate(262144));
+		sig0->fillmydspSIG0(65536, ftbl0mydspSIG0);
+		deletemydspSIG0(sig0, fManager);
+	}
+	static void classDestroy() {
+		fManager->destroy(ftbl0mydspSIG0);
+	}
+	
+	virtual void instanceConstants(int sample_rate) {
+		fSampleRate = sample_rate;
+		fConst0 = (1000.0f / std::min(192000.0f, std::max(1.0f, float(fSampleRate))));
+	}
+	
+	virtual void instanceResetUserInterface() {
+		fCheckbox0 = FAUSTFLOAT(0.0f);
+	}
+	
+	virtual void instanceClear() {
+		for (int l1 = 0; (l1 < 2); l1 = (l1 + 1)) {
+			fRec1[l1] = 0.0f;
+		}
+	}
+	
+	virtual void init(int sample_rate) {}
+	virtual void instanceInit(int sample_rate) {
+		instanceConstants(sample_rate);
+		instanceResetUserInterface();
+		instanceClear();
+	}
+	
+	virtual mydsp* clone() {
+		return new mydsp();
+	}
+	
+	virtual int getSampleRate() {
+		return fSampleRate;
+	}
+	
+	virtual void buildUserInterface(UI* ui_interface) {
+		ui_interface->openVerticalBox("FaustTest");
+		ui_interface->declare(&fCheckbox0, "OWL", "B1");
+		ui_interface->addCheckButton("btn1", &fCheckbox0);
+		ui_interface->declare(&fHbargraph0, "OWL", "B1");
+		ui_interface->addHorizontalBargraph("led2>", &fHbargraph0, 0.0f, 1.0f);
+		ui_interface->closeBox();
+	}
+	
+	virtual void compute(int count, FAUSTFLOAT** inputs, FAUSTFLOAT** outputs) {
+		FAUSTFLOAT* output0 = outputs[0];
+		float fSlow0 = float(fCheckbox0);
+		fHbargraph0 = FAUSTFLOAT((1.0f - fSlow0));
+		for (int i = 0; (i < count); i = (i + 1)) {
+			fRec1[0] = (fConst0 + (fRec1[1] - fast_floorf((fConst0 + fRec1[1]))));
+			output0[i] = FAUSTFLOAT((fSlow0 * ftbl0mydspSIG0[int((65536.0f * fRec1[0]))]));
+			fRec1[1] = fRec1[0];
+		}
+	}
+
+};
+
+dsp_memory_manager* mydsp::fManager = 0;
+
+    /***************************END USER SECTION ***************************/
+
+    /*******************BEGIN ARCHITECTURE SECTION (part 2/2)***************/
+
+    /**************************************************************************************
+
+        FaustPatch : an OWL patch that calls Faust generated DSP code
+
+    ***************************************************************************************/
+
+    class FaustPatch : public Patch {
+    mydsp* fDSP;
+    OwlUI fUI;
+    OwlMemoryManager mem;
+
+public:
+    FaustPatch()
+        : fUI(this) {
+        // // Allocate memory for dsp object first to ensure high priority
+        // memory is used void* allocated = mem.allocate(sizeof(mydsp));
+        // // DSP static data is initialised using classInit.
+        // mydsp::classInit(int(getSampleRate()), &mem);
+        // // call mydsp constructor
+        // fDSP = new (allocated) mydsp();
+        // fDSP->instanceInit(int(getSampleRate()));
+        // // Map OWL parameters and faust widgets
+        // fDSP->buildUserInterface(&fUI);
+
+        fBend = 1.0f;
+        fDSP = new mydsp();
+        fDSP->metadata(&fUI.meta);
+        if (fUI.meta.message != NULL)
+            debugMessage(fUI.meta.message);
+        fUI.addVOct();
+
+        mydsp::fManager = &mem; // set custom memory manager
+        mydsp::classInit(int(getSampleRate())); // initialise static tables
+        fDSP->instanceInit(int(getSampleRate())); // initialise DSP instance
+        fDSP->buildUserInterface(&fUI); // Map OWL parameters
+    }
+
+    ~FaustPatch() {
+        delete fDSP;
+        // mem.destroy(fDSP);
+        // DSP static data is destroyed using classDestroy.
+        mydsp::classDestroy();
+    }
+
+    void processMidi(MidiMessage msg) {
+        if (fUI.meta.midiOn)
+            allocator.processMidi(msg);
+    }
+
+    void processAudio(AudioBuffer& buffer) {
+        // Reasonably assume we will not have more than 32 channels
+        float* ins[32];
+        float* outs[32];
+        int n = buffer.getChannels();
+
+        if ((fDSP->getNumInputs() < 32) && (fDSP->getNumOutputs() < 32)) {
+            // create the table of input channels
+            for (int ch = 0; ch < fDSP->getNumInputs(); ++ch) {
+                ins[ch] = buffer.getSamples(ch % n);
+            }
+
+            // create the table of output channels
+            for (int ch = 0; ch < fDSP->getNumOutputs(); ++ch) {
+                outs[ch] = buffer.getSamples(ch % n);
+            }
+
+            // read OWL parameters and updates corresponding Faust Widgets zones
+            fUI.update();
+
+            // Process the audio samples
+            fDSP->compute(buffer.getSize(), ins, outs);
+        }
+    }
+};
+
+extern "C" {
+  void doSetButton(uint8_t id, uint16_t state, uint16_t samples);
+  void doSetPatchParameter(uint8_t id, int16_t value);
+
+  int owl_pushbutton(int value) {
+    static bool state = 0;
+    static uint16_t counter = 0;
+    value = (bool)value;
+    if (state != value) {
+      state = value;
+      doSetButton(PUSHBUTTON, state, counter);
+    }
+    if (++counter > getProgramVector()->audio_blocksize)
+      counter = 0;
+    return value;
+  }
+  int owl_button(int bid, int value){
+    doSetButton(bid, value, 0);
+    return value;
+  }
+  float owl_parameter(int pid, float value){
+    doSetPatchParameter(pid, (int16_t)(value*4096));
+    return value;
+  }
+
+  // Uses input scaler and tuning
+  float sample2hertz(float tune, float sample) {
+    fVOctInput->setTune(tune);
+    return fVOctInput->getFrequency(sample);
+  }
+  // Uses output scaler and tuning
+  float hertz2sample(float tune, float hertz) {
+    fVOctOutput->setTune(tune);
+    return fVOctOutput->getSample(hertz);
+  }
+  // Uses input scaler
+  float sample2volts(float sample) {
+    return fVOctInput->sampleToVolts(sample);
+  }
+  // No scaler required
+  float volts2hertz(float volts) {
+    return VoltsPerOctave::voltsToHertz(volts);
+  }
+  // Uses output scaler
+  float volts2sample(float volts) {
+    return fVOctOutput->voltsToSample(volts);
+  }
+  // No scaler required
+  float hertz2volts(float hertz) {
+    return VoltsPerOctave::hertzToVolts(hertz);
+  }
+}
+
+#endif // __FaustPatch_h__
+
+////////////////////////////////////////////////////////////////////////////////////////////////////
+
+#endif
diff --git a/TestPatches/FaustTest/FaustTest.dsp b/TestPatches/FaustTest/FaustTest.dsp
index b2e71118..10d4dbb6 100644
--- a/TestPatches/FaustTest/FaustTest.dsp
+++ b/TestPatches/FaustTest/FaustTest.dsp
@@ -3,8 +3,4 @@ import("music.lib");
 btn1 = checkbox("btn1[OWL:B1]");
 led1 = hbargraph("led2>[OWL:B1]", 0, 1);
 
-import("demos.lib");
 process = attach(osc(1000) * btn1, 1-btn1 : led1);
-
-// import("all.lib");
-// process = zita_light;

From f0dfd19dcdfb181cbfce87f0b4b79d346bd57730 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:03:49 +0200
Subject: [PATCH 296/374] added generated SOUL files

---
 TestPatches/SoulTest/SineSynth.hpp | 1801 ++++++++++++++++++++++++++++
 TestPatches/SoulTest/SoulPatch.hpp |  110 ++
 TestPatches/SoulTest/soul.hpp      |    2 +
 3 files changed, 1913 insertions(+)
 create mode 100644 TestPatches/SoulTest/SineSynth.hpp
 create mode 100644 TestPatches/SoulTest/SoulPatch.hpp
 create mode 100644 TestPatches/SoulTest/soul.hpp

diff --git a/TestPatches/SoulTest/SineSynth.hpp b/TestPatches/SoulTest/SineSynth.hpp
new file mode 100644
index 00000000..1e39052c
--- /dev/null
+++ b/TestPatches/SoulTest/SineSynth.hpp
@@ -0,0 +1,1801 @@
+//      _____ _____ _____ __
+//     |   __|     |  |  |  |        Auto-generated C++
+//     |__   |  |  |  |  |  |__      SOUL Version 0.9.0
+//     |_____|_____|_____|_____|     https://soul.dev
+//
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#ifndef SOUL_CPP_ASSERT
+ #define SOUL_CPP_ASSERT(x)
+#endif
+
+// If you need to provide custom implementations of the instrinsics that soul uses,
+// you can set this macro to provide your own namespace containing them.
+#ifndef SOUL_INTRINSICS
+ #define SOUL_INTRINSICS std
+#endif
+
+//==============================================================================
+// Generated from graph 'SineSynth', source file: SineSynth.soul
+//
+class SineSynth
+{
+public:
+    SineSynth() = default;
+    ~SineSynth() = default;
+
+    //==============================================================================
+    template  struct Vector;
+    template  struct FixedArray;
+    template  struct DynamicArray;
+
+    static constexpr uint32_t maxBlockSize  = 1024;
+    static constexpr uint32_t latency       = 0;
+
+    template 
+    struct span
+    {
+        Item* start = nullptr;
+        size_t numItems = 0;
+
+        constexpr size_t size() const               { return numItems; }
+        constexpr bool empty() const                { return numItems == 0; }
+        constexpr Item* begin() const               { return start; }
+        constexpr Item* end() const                 { return start + numItems; }
+        const Item& operator[] (size_t index) const { SOUL_CPP_ASSERT (index < numItems); return start[index]; }
+    };
+
+    struct _RenderStats;
+    struct _SparseStreamStatus;
+    struct _Event_in_f32_1;
+    struct _Event_in_struct_Message_1;
+    struct _Stream_out_f32_1024;
+    struct soul__midi__MPEParser___State;
+    struct soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator__VoiceInfo;
+    struct soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State;
+    struct SineOsc___State;
+    struct soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___State;
+    struct soul__gain__DynamicGain___for__root__Voice_attenuator___State;
+    struct Voice___State;
+    struct soul__gain__DynamicGain___for__root__SineSynth_gainProcessor___State;
+    struct soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___State;
+    struct _State;
+    struct soul__midi__Message;
+    struct soul__note_events__NoteOn;
+    struct soul__note_events__NoteOff;
+    struct soul__note_events__PitchBend;
+    struct soul__note_events__Pressure;
+    struct soul__note_events__Slide;
+    struct soul__note_events__Control;
+    struct soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___IO;
+    struct soul__gain__DynamicGain___for__root__SineSynth_gainProcessor___IO;
+    struct soul__gain__DynamicGain___for__root__Voice_attenuator___IO;
+    struct soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___IO;
+    struct SineOsc___IO;
+    struct Voice___IO;
+    struct StringLiteral;
+
+    //==============================================================================
+    // The following methods provide basic initialisation and control for the processor
+
+    void init (double newSampleRate, int sessionID)
+    {
+        memset (reinterpret_cast (std::addressof (state)), 0, sizeof (state));
+        sampleRate = newSampleRate;
+        _initialise (state, sessionID);
+        initialisedState = state;
+    }
+
+    void reset() noexcept
+    {
+        state = initialisedState;
+    }
+
+    uint32_t getNumXRuns() noexcept
+    {
+        return static_cast (_get_num_xruns (state));
+    }
+
+    //==============================================================================
+    // These classes and functions provide a high-level rendering method that
+    // presents the processor as a set of standard audio and MIDI channels.
+
+    static constexpr uint32_t numAudioInputChannels  = 0;
+    static constexpr uint32_t numAudioOutputChannels = 1;
+
+    struct MIDIMessage
+    {
+        uint32_t frameIndex = 0;
+        uint8_t byte0 = 0, byte1 = 0, byte2 = 0;
+    };
+
+    struct MIDIMessageArray
+    {
+        const MIDIMessage* messages = nullptr;
+        uint32_t numMessages = 0;
+    };
+
+    template 
+    struct RenderContext
+    {
+        std::array inputChannels;
+        std::array outputChannels;
+        MIDIMessageArray  incomingMIDI;
+        uint32_t          numFrames = 0;
+    };
+
+    //==============================================================================
+    template 
+    void render (RenderContext context)
+    {
+        uint32_t startFrame = 0, startMIDIIndex = 0;
+
+        while (startFrame < context.numFrames)
+        {
+            auto framesRemaining = context.numFrames - startFrame;
+            auto numFramesToDo = framesRemaining < maxBlockSize ? framesRemaining : maxBlockSize;
+            auto endMIDIIndex = startMIDIIndex;
+
+            while (endMIDIIndex < context.incomingMIDI.numMessages)
+            {
+                auto eventTime = context.incomingMIDI.messages[endMIDIIndex].frameIndex;
+
+                if (eventTime > startFrame)
+                {
+                    auto framesUntilEvent = eventTime - startFrame;
+
+                    if (framesUntilEvent < numFramesToDo)
+                        numFramesToDo = framesUntilEvent;
+
+                    break;
+                }
+
+                ++endMIDIIndex;
+            }
+
+            prepare (numFramesToDo);
+
+            while (startMIDIIndex < endMIDIIndex)
+            {
+                auto midi = context.incomingMIDI.messages[startMIDIIndex++];
+                auto packed = (static_cast (midi.byte0) << 16) | (static_cast (midi.byte1) << 8) | static_cast (midi.byte2);
+                _addInputEvent_midiIn_struct_Message (state, { static_cast (packed) });
+            }
+
+            advance();
+
+            copyFromInterleaved (&context.outputChannels[0], startFrame, _getOutputFrameArrayRef_audioOut (state).elements, numFramesToDo);
+            startFrame += numFramesToDo;
+        }
+    }
+
+    //==============================================================================
+    // The following methods provide low-level access for read/write to all the
+    // endpoints directly, and to run the prepare/advance loop.
+
+    void prepare (uint32_t numFramesToBeRendered)
+    {
+        SOUL_CPP_ASSERT (numFramesToBeRendered != 0);
+        framesToAdvance = numFramesToBeRendered;
+        _prepare (state, static_cast (numFramesToBeRendered));
+    }
+
+    void advance()
+    {
+        SOUL_CPP_ASSERT (framesToAdvance != 0); // you must call prepare() before advance()!
+        auto framesRemaining = framesToAdvance;
+
+        while (framesRemaining > 0)
+        {
+            auto framesThisCall = framesRemaining < maxBlockSize ? framesRemaining : maxBlockSize;
+
+            run (state, static_cast (framesThisCall));
+
+            totalFramesElapsed += framesThisCall;
+            framesRemaining -= framesThisCall;
+        }
+    }
+
+    void addInputEvent_volume (float eventValue)
+    {
+        _addInputEvent_volume_f32 (state, eventValue);
+    }
+
+    void addInputEvent_midiIn (const soul__midi__Message& eventValue)
+    {
+        _addInputEvent_midiIn_struct_Message (state, eventValue);
+    }
+
+    DynamicArray getOutputStreamFrames_audioOut()
+    {
+        return { &(_getOutputFrameArrayRef_audioOut (state).elements[0]), static_cast (framesToAdvance) };
+    }
+
+    //==============================================================================
+    // The following methods provide a fixed interface for finding out about
+    // the input/output endpoints that this processor provides.
+
+    using EndpointID = const char*;
+    enum class EndpointType     { value, stream, event };
+
+    struct EndpointDetails
+    {
+        const char* name;
+        EndpointID endpointID;
+        EndpointType endpointType;
+        const char* frameType;
+        uint32_t numAudioChannels;
+        const char* annotation;
+    };
+
+    std::array getInputEndpoints() const
+    {
+        return
+        {
+            EndpointDetails { "volume", "in:volume", EndpointType::event, "float32",                     0, "{ \"name\": \"Volume\", \"min\": -40, \"max\": 0, \"init\": -6, \"step\": 1, \"unit\": \"dB\" }" },
+            EndpointDetails { "midiIn", "in:midiIn", EndpointType::event, "Message { int32 midiBytes }", 0, ""                                                                                                }
+        };
+    }
+
+    std::array getOutputEndpoints() const
+    {
+        return
+        {
+            EndpointDetails { "audioOut", "out:audioOut", EndpointType::stream, "float32", 1, "" }
+        };
+    }
+
+    //==============================================================================
+    // The following methods provide help in dealing with the processor's endpoints
+    // in a format suitable for traditional audio plugin channels and parameters.
+
+    struct ParameterProperties
+    {
+        const char* UID;
+        const char* name;
+        const char* unit;
+        float minValue, maxValue, step, initialValue;
+        bool isAutomatable, isBoolean, isHidden;
+        const char* group;
+        const char* textValues;
+    };
+
+    struct Parameter
+    {
+        ParameterProperties properties;
+        float currentValue;
+        std::function applyValue;
+
+        void setValue (float f)
+        {
+            currentValue = snapToLegalValue (f);
+            applyValue (f);
+        }
+
+        float getValue() const
+        {
+            return currentValue;
+        }
+
+    private:
+        float snapToLegalValue (float v) const
+        {
+            if (properties.step > 0)
+                v = properties.minValue + properties.step * SOUL_INTRINSICS::floor ((v - properties.minValue) / properties.step + 0.5f);
+
+            return v < properties.minValue ? properties.minValue : (v > properties.maxValue ? properties.maxValue : v);
+        }
+    };
+
+    struct AudioBus
+    {
+        const char* name;
+        uint32_t numChannels;
+    };
+
+    static constexpr bool      hasMIDIInput = true;
+    static constexpr uint32_t  numParameters = 1;
+
+    static constexpr const std::array parameters =
+    {
+        ParameterProperties {  "volume",  "Volume",  "dB",  -40.0f,  0.0f,  1.0f,  -6.0f,  true,  false,  false,  "",  ""  }
+    };
+
+    static span getParameterProperties() { return { parameters.data(), numParameters }; }
+
+    static constexpr uint32_t numInputBuses  = 0;
+    static constexpr uint32_t numOutputBuses = 1;
+
+    static constexpr std::array outputBuses = { AudioBus { "audioOut", 1 } };
+
+    static span getInputBuses()  { return {}; }
+    static span getOutputBuses() { return { outputBuses.data(), numOutputBuses }; }
+
+    struct ParameterList
+    {
+        Parameter* begin()                      { return params; }
+        Parameter* end()                        { return params + numParameters; }
+        size_t size() const                     { return numParameters; }
+        Parameter& operator[] (size_t index)    { SOUL_CPP_ASSERT (index < numParameters); return params[index]; }
+
+        Parameter params[numParameters == 0 ? 1 : numParameters];
+    };
+
+    ParameterList createParameterList()
+    {
+        return
+        {
+            {
+                Parameter {  parameters[0],  -6.0f,  [this] (float v) { addInputEvent_volume (v); }  }
+            }
+        };
+    }
+
+    static constexpr bool hasTimelineEndpoints = false;
+
+    void setTimeSignature (int32_t newNumerator, int32_t newDenominator)
+    {
+        (void) newNumerator; (void) newDenominator;
+    }
+
+    void setTempo (float newBPM)
+    {
+        (void) newBPM;
+    }
+
+    void setTransportState (int32_t newState)
+    {
+        (void) newState;
+    }
+
+    void setPosition (int64_t currentFrame, double currentQuarterNote, double lastBarStartQuarterNote)
+    {
+        (void) currentFrame; (void) currentQuarterNote; (void) lastBarStartQuarterNote;
+    }
+
+    //==============================================================================
+    struct ZeroInitialiser
+    {
+        template    operator Type() const   { return {}; }
+        template   ZeroInitialiser operator[] (Index) const { return {}; }
+    };
+
+    //==============================================================================
+    template 
+    struct DynamicArray
+    {
+        using ElementType = Type;
+        ElementType* elements = nullptr;
+        int32_t numElements = 0;
+
+        constexpr ElementType& operator[] (int i) noexcept                   { return elements[i]; }
+        constexpr const ElementType& operator[] (int i) const noexcept       { return elements[i]; }
+        constexpr int getElementSizeBytes() const noexcept                   { return sizeof (ElementType); }
+    };
+
+    //==============================================================================
+    template 
+    struct FixedArray
+    {
+        using ElementType = Type;
+        ElementType elements[size];
+        static constexpr int32_t numElements = size;
+
+        static constexpr FixedArray fromRepeatedValue (ElementType value)
+        {
+            FixedArray a;
+
+            for (auto& element : a.elements)
+                element = value;
+
+            return a;
+        }
+
+        static size_t elementOffset (int i) noexcept               { return sizeof (ElementType) * i; }
+        ElementType& operator[] (int i) noexcept                   { return elements[i]; }
+        const ElementType& operator[] (int i) const noexcept       { return elements[i]; }
+        int getElementSizeBytes() const noexcept                   { return sizeof (ElementType); }
+        DynamicArray toDynamicArray() const noexcept  { return { const_cast (&elements[0]), size }; }
+        operator ElementType*() const noexcept                     { return const_cast (&elements[0]); }
+
+        FixedArray& operator= (ZeroInitialiser)
+        {
+            for (auto& e : elements)
+                e = ElementType {};
+
+            return *this;
+        }
+
+        template 
+        constexpr FixedArray slice() const noexcept
+        {
+            FixedArray newSlice;
+
+            for (int i = 0; i < end - start; ++i)
+                newSlice.elements[i] = elements[start + i];
+
+            return newSlice;
+        }
+    };
+
+    //==============================================================================
+    template 
+    struct Vector
+    {
+        using ElementType = Type;
+        ElementType elements[size] = {};
+        static constexpr int32_t numElements = size;
+
+        constexpr Vector() = default;
+        constexpr Vector (const Vector&) = default;
+        constexpr Vector& operator= (const Vector&) = default;
+
+        explicit constexpr Vector (Type value)
+        {
+            for (auto& element : elements)
+                element = value;
+        }
+
+        template 
+        constexpr Vector (const Vector& other)
+        {
+            for (int32_t i = 0; i < size; ++i)
+                elements[i] = static_cast (other.elements[i]);
+        }
+
+        constexpr Vector (std::initializer_list i)
+        {
+            int n = 0;
+
+            for (auto e : i)
+                elements[n++] = e;
+        }
+
+        static constexpr Vector fromRepeatedValue (Type value)
+        {
+            return Vector (value);
+        }
+
+        constexpr Vector operator+ (const Vector& rhs) const                { return apply (rhs, [] (Type a, Type b) { return a + b; }); }
+        constexpr Vector operator- (const Vector& rhs) const                { return apply (rhs, [] (Type a, Type b) { return a - b; }); }
+        constexpr Vector operator* (const Vector& rhs) const                { return apply (rhs, [] (Type a, Type b) { return a * b; }); }
+        constexpr Vector operator/ (const Vector& rhs) const                { return apply (rhs, [] (Type a, Type b) { return a / b; }); }
+        constexpr Vector operator% (const Vector& rhs) const                { return apply (rhs, [] (Type a, Type b) { return a % b; }); }
+        constexpr Vector operator-() const                                  { return apply ([] (Type n) { return -n; }); }
+        constexpr Vector operator~() const                                  { return apply ([] (Type n) { return ~n; }); }
+        constexpr Vector operator!() const                                  { return apply ([] (Type n) { return ! n; }); }
+
+        Vector& operator= (ZeroInitialiser)
+        {
+            for (auto& e : elements)
+                e = {};
+
+            return *this;
+        }
+
+        constexpr Vector operator== (const Vector& rhs) const   { return apply> (rhs, [] (Type a, Type b) { return a == b; }); }
+        constexpr Vector operator!= (const Vector& rhs) const   { return apply> (rhs, [] (Type a, Type b) { return a != b; }); }
+
+        template 
+        constexpr ReturnType apply (const Vector& rhs, Op&& op) const noexcept
+        {
+            ReturnType v;
+
+            for (int i = 0; i < size; ++i)
+                v.elements[i] = op (elements[i], rhs.elements[i]);
+
+            return v;
+        }
+
+        template 
+        constexpr ReturnType apply (Op&& op) const noexcept
+        {
+            ReturnType v;
+
+            for (int i = 0; i < size; ++i)
+                v.elements[i] = op (elements[i]);
+
+            return v;
+        }
+
+        template 
+        constexpr Vector slice() const noexcept
+        {
+            Vector newSlice;
+
+            for (int i = 0; i < end - start; ++i)
+                newSlice.elements[i] = elements[start + i];
+
+            return newSlice;
+        }
+
+        constexpr const Type& operator[] (int i) const noexcept  { return elements[i]; }
+        constexpr Type& operator[] (int i) noexcept              { return elements[i]; }
+    };
+
+    //==============================================================================
+    struct StringLiteral
+    {
+        constexpr StringLiteral (int32_t h) noexcept : handle (h) {}
+        StringLiteral() = default;
+        StringLiteral (const StringLiteral&) = default;
+        StringLiteral& operator= (const StringLiteral&) = default;
+
+        const char* toString() const       { return lookupStringLiteral (handle); }
+        operator const char*() const       { return lookupStringLiteral (handle); }
+
+        bool operator== (StringLiteral other) const noexcept    { return handle == other.handle; }
+        bool operator!= (StringLiteral other) const noexcept    { return handle != other.handle; }
+
+        int32_t handle = 0;
+    };
+
+
+    //==============================================================================
+    //==============================================================================
+    //
+    //    All the code that follows this point should be considered internal.
+    //    User code should rarely need to refer to anything beyond this point..
+    //
+    //==============================================================================
+    //==============================================================================
+
+    template   static Vec _vec_sqrt  (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::sqrt (x); }); }
+    template   static Vec _vec_pow   (Vec a, Vec b)  { return a.template apply ([&] (typename Vec::ElementType x) { return SOUL_INTRINSICS::pow (x, b); }); }
+    template   static Vec _vec_exp   (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::exp (x); }); }
+    template   static Vec _vec_log   (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::log (x); }); }
+    template   static Vec _vec_log10 (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::log10 (x); }); }
+    template   static Vec _vec_sin   (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::sin (x); }); }
+    template   static Vec _vec_cos   (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::cos (x); }); }
+    template   static Vec _vec_tan   (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::tan (x); }); }
+    template   static Vec _vec_sinh  (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::sinh (x); }); }
+    template   static Vec _vec_cosh  (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::cosh (x); }); }
+    template   static Vec _vec_tanh  (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::tanh (x); }); }
+    template   static Vec _vec_asinh (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::asinh (x); }); }
+    template   static Vec _vec_acosh (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::acosh (x); }); }
+    template   static Vec _vec_atanh (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::atanh (x); }); }
+    template   static Vec _vec_asin  (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::asin (x); }); }
+    template   static Vec _vec_acos  (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::acos (x); }); }
+    template   static Vec _vec_atan  (Vec a)         { return a.template apply ([]  (typename Vec::ElementType x) { return SOUL_INTRINSICS::atan (x); }); }
+    template   static Vec _vec_atan2 (Vec a, Vec b)  { return a.template apply ([&] (typename Vec::ElementType x) { return SOUL_INTRINSICS::atan2 (x, b); }); }
+
+    static constexpr int32_t _intrin_clamp (int32_t n, int32_t low, int32_t high)  { return n < low ? low : (n > high ? high : n); }
+    static constexpr int32_t _intrin_wrap (int32_t n, int32_t range)   { if (range == 0) return 0; auto x = n % range; return x < 0 ? x + range : x; }
+
+    static constexpr float  _nan32 = std::numeric_limits::quiet_NaN();
+    static constexpr double _nan64 = std::numeric_limits::quiet_NaN();
+
+    static constexpr float  _inf32 = std::numeric_limits::infinity();
+    static constexpr double _inf64 = std::numeric_limits::infinity();
+
+    static constexpr float  _ninf32 = -_inf32;
+    static constexpr double _ninf64 = -_inf64;
+
+    template 
+    static inline void copyToInterleaved (DestFloatType* monoDest, const SourceFloatType* const* sourceChannels, uint32_t sourceStartFrame, uint32_t numFrames)
+    {
+        auto source = *sourceChannels + sourceStartFrame;
+
+        for (uint32_t i = 0; i < numFrames; ++i)
+            monoDest[i] = static_cast (source[i]);
+    }
+
+    template 
+    static inline void copyToInterleaved (Vector* vectorDest, const SourceFloatType* const* sourceChannels, uint32_t sourceStartFrame, uint32_t numFrames)
+    {
+        for (uint32_t i = 0; i < numFrames; ++i)
+            for (uint32_t chan = 0; chan < static_cast (numChannels); ++chan)
+                vectorDest[i].elements[chan] = static_cast (sourceChannels[chan][sourceStartFrame + i]);
+    }
+
+    template 
+    static inline void copyFromInterleaved (DestFloatType* const* destChannels, uint32_t destStartFrame, const SourceFloatType* monoSource, uint32_t numFrames)
+    {
+        auto dest = *destChannels + destStartFrame;
+
+        for (uint32_t i = 0; i < numFrames; ++i)
+            dest[i] = static_cast (monoSource[i]);
+    }
+
+    template 
+    static inline void copyFromInterleaved (DestFloatType* const* destChannels, uint32_t destStartFrame, const Vector* vectorSource, uint32_t numFrames)
+    {
+        for (uint32_t i = 0; i < numFrames; ++i)
+            for (uint32_t chan = 0; chan < static_cast (numChannels); ++chan)
+                destChannels[chan][destStartFrame + i] = static_cast (vectorSource[i].elements[chan]);
+    }
+
+    //==============================================================================
+    struct _RenderStats
+    {
+        int32_t m_underrunCount, m_underrunFrames, m_overrunCount, m_overrunFrames;
+    };
+
+    struct _SparseStreamStatus
+    {
+        int32_t m_activeRamps;
+        FixedArray m_rampArray;
+    };
+
+    struct _Event_in_f32_1
+    {
+        int32_t m_numFrames;
+    };
+
+    struct _Event_in_struct_Message_1
+    {
+        int32_t m_numFrames;
+    };
+
+    struct _Stream_out_f32_1024
+    {
+        FixedArray m_buffer;
+    };
+
+    struct soul__midi__MPEParser___State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId;
+    };
+
+    struct soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator__VoiceInfo
+    {
+        bool m_active;
+        int32_t m_channel;
+        float m_note;
+        int32_t m_voiceAge;
+        bool m_noteReleased;
+    };
+
+    struct soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId, m_nextAllocatedVoiceAge, m_nextUnallocatedVoiceAge;
+        FixedArray m_voiceInfo;
+        FixedArray m_channelSustainActive;
+        bool m_masterSustainActive;
+    };
+
+    struct SineOsc___State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId;
+        float m_notePitch, m_bendSemitones, m_phase, m_phaseIncrement;
+    };
+
+    struct soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId;
+        bool m_active;
+        float m_targetLevel, m_attackLevel, m_attackMultiplier, m_level, m_releaseMultiplier;
+    };
+
+    struct soul__gain__DynamicGain___for__root__Voice_attenuator___State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId;
+    };
+
+    struct Voice___State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId;
+        SineOsc___State m_osc_state;
+        soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___State m_amplitudeEnvelope_state;
+        soul__gain__DynamicGain___for__root__Voice_attenuator___State m_attenuator_state;
+    };
+
+    struct soul__gain__DynamicGain___for__root__SineSynth_gainProcessor___State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId;
+    };
+
+    struct soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId;
+        float m_targetGain, m_currentGain, m_increment;
+        int32_t m_remainingRampSamples;
+    };
+
+    struct _State
+    {
+        int32_t m__resumePoint, m__frameCount, m__arrayEntry, m__sessionID, m__processorId, m__framesToAdvance;
+        _RenderStats m__renderStats;
+        _SparseStreamStatus m__sparseStreamStatus;
+        _Event_in_f32_1 m__in_volume;
+        _Event_in_struct_Message_1 m__in_midiIn;
+        _Stream_out_f32_1024 m__out_audioOut;
+        soul__midi__MPEParser___State m_MPEParser_state;
+        soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State m_voiceAllocator_state;
+        FixedArray m_voices_state;
+        soul__gain__DynamicGain___for__root__SineSynth_gainProcessor___State m_gainProcessor_state;
+        soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___State m_smoothedGain_state;
+    };
+
+    struct soul__midi__Message
+    {
+        int32_t m_midiBytes;
+    };
+
+    struct soul__note_events__NoteOn
+    {
+        int32_t m_channel;
+        float m_note, m_velocity;
+    };
+
+    struct soul__note_events__NoteOff
+    {
+        int32_t m_channel;
+        float m_note, m_velocity;
+    };
+
+    struct soul__note_events__PitchBend
+    {
+        int32_t m_channel;
+        float m_bendSemitones;
+    };
+
+    struct soul__note_events__Pressure
+    {
+        int32_t m_channel;
+        float m_pressure;
+    };
+
+    struct soul__note_events__Slide
+    {
+        int32_t m_channel;
+        float m_slide;
+    };
+
+    struct soul__note_events__Control
+    {
+        int32_t m_channel, m_control;
+        float m_value;
+    };
+
+    struct soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___IO
+    {
+        float m__out_gain;
+    };
+
+    struct soul__gain__DynamicGain___for__root__SineSynth_gainProcessor___IO
+    {
+        float m__in_in, m__in_gain, m__out_out;
+    };
+
+    struct soul__gain__DynamicGain___for__root__Voice_attenuator___IO
+    {
+        float m__in_in, m__in_gain, m__out_out;
+    };
+
+    struct soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___IO
+    {
+        float m__out_levelOut;
+    };
+
+    struct SineOsc___IO
+    {
+        float m__out_audioOut;
+    };
+
+    struct Voice___IO
+    {
+        float m__out_audioOut;
+    };
+
+    //==============================================================================
+    #if __clang__
+     #pragma clang diagnostic push
+     #pragma clang diagnostic ignored "-Wunused-label"
+     #pragma clang diagnostic ignored "-Wunused-parameter"
+     #pragma clang diagnostic ignored "-Wshadow"
+    #elif defined(__GNUC__)
+     #pragma GCC diagnostic push
+     #pragma GCC diagnostic ignored "-Wunused-label"
+     #pragma GCC diagnostic ignored "-Wunused-parameter"
+     #pragma GCC diagnostic ignored "-Wshadow"
+    #elif defined(_MSC_VER)
+     #pragma warning (push)
+     #pragma warning (disable: 4100 4102 4458)
+    #endif
+
+    //==============================================================================
+    int32_t run (_State& _state, int32_t maxFrames) noexcept
+    {
+        int32_t _2 = {};
+        FixedArray _3 = {};
+        soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___IO _4 = {};
+        soul__gain__DynamicGain___for__root__SineSynth_gainProcessor___IO _5 = {};
+
+        _2 = _internal___minInt32 (1024, maxFrames);
+        _updateRampingStreams (_state, _2);
+        _state.m__frameCount = 0;
+        _main_loop_check: { if (! (_state.m__frameCount < _2)) goto _exit; }
+        _main_loop_body: { _3 = ZeroInitialiser();
+                           Voice__run (_state.m_voices_state[0], _3[0]);
+                           Voice__run (_state.m_voices_state[1], _3[1]);
+                           Voice__run (_state.m_voices_state[2], _3[2]);
+                           Voice__run (_state.m_voices_state[3], _3[3]);
+                           Voice__run (_state.m_voices_state[4], _3[4]);
+                           Voice__run (_state.m_voices_state[5], _3[5]);
+                           Voice__run (_state.m_voices_state[6], _3[6]);
+                           Voice__run (_state.m_voices_state[7], _3[7]);
+                           _4 = ZeroInitialiser();
+                           soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain__run (_state.m_smoothedGain_state, _4);
+                           _5 = ZeroInitialiser();
+                           _5.m__in_in = ((((((_3[0].m__out_audioOut + _3[1].m__out_audioOut) + _3[2].m__out_audioOut) + _3[3].m__out_audioOut) + _3[4].m__out_audioOut) + _3[5].m__out_audioOut) + _3[6].m__out_audioOut) + _3[7].m__out_audioOut;
+                           _5.m__in_gain = _4.m__out_gain;
+                           soul__gain__DynamicGain___for__root__SineSynth_gainProcessor__run (_state.m_gainProcessor_state, _5);
+                           _writeToStream_struct__Stream_out_f32_1024 (_state.m__out_audioOut, _state.m__frameCount, _5.m__out_out);
+                           _state.m__frameCount = _state.m__frameCount + 1;
+                           goto _main_loop_check;
+        }
+        _exit: { _state.m__frameCount = 0;
+                 return _2;
+        }
+    }
+
+    void _initialise (_State& _state, int32_t sessionID) noexcept
+    {
+        _state.m__sessionID = sessionID;
+        _state.m_MPEParser_state.m__arrayEntry = 0;
+        _state.m_MPEParser_state.m__sessionID = _state.m__sessionID;
+        _state.m_MPEParser_state.m__processorId = 4;
+        _state.m_voiceAllocator_state.m__arrayEntry = 0;
+        _state.m_voiceAllocator_state.m__sessionID = _state.m__sessionID;
+        _state.m_voiceAllocator_state.m__processorId = 5;
+        soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___initialise (_state.m_voiceAllocator_state);
+        _state.m_voices_state[0].m__arrayEntry = 0;
+        _state.m_voices_state[0].m__sessionID = _state.m__sessionID;
+        _state.m_voices_state[0].m__processorId = 6;
+        Voice___initialise (_state.m_voices_state[0]);
+        _state.m_voices_state[1].m__arrayEntry = 1;
+        _state.m_voices_state[1].m__sessionID = _state.m__sessionID;
+        _state.m_voices_state[1].m__processorId = 7;
+        Voice___initialise (_state.m_voices_state[1]);
+        _state.m_voices_state[2].m__arrayEntry = 2;
+        _state.m_voices_state[2].m__sessionID = _state.m__sessionID;
+        _state.m_voices_state[2].m__processorId = 8;
+        Voice___initialise (_state.m_voices_state[2]);
+        _state.m_voices_state[3].m__arrayEntry = 3;
+        _state.m_voices_state[3].m__sessionID = _state.m__sessionID;
+        _state.m_voices_state[3].m__processorId = 9;
+        Voice___initialise (_state.m_voices_state[3]);
+        _state.m_voices_state[4].m__arrayEntry = 4;
+        _state.m_voices_state[4].m__sessionID = _state.m__sessionID;
+        _state.m_voices_state[4].m__processorId = 10;
+        Voice___initialise (_state.m_voices_state[4]);
+        _state.m_voices_state[5].m__arrayEntry = 5;
+        _state.m_voices_state[5].m__sessionID = _state.m__sessionID;
+        _state.m_voices_state[5].m__processorId = 11;
+        Voice___initialise (_state.m_voices_state[5]);
+        _state.m_voices_state[6].m__arrayEntry = 6;
+        _state.m_voices_state[6].m__sessionID = _state.m__sessionID;
+        _state.m_voices_state[6].m__processorId = 12;
+        Voice___initialise (_state.m_voices_state[6]);
+        _state.m_voices_state[7].m__arrayEntry = 7;
+        _state.m_voices_state[7].m__sessionID = _state.m__sessionID;
+        _state.m_voices_state[7].m__processorId = 13;
+        Voice___initialise (_state.m_voices_state[7]);
+        _state.m_gainProcessor_state.m__arrayEntry = 0;
+        _state.m_gainProcessor_state.m__sessionID = _state.m__sessionID;
+        _state.m_gainProcessor_state.m__processorId = 14;
+        _state.m_smoothedGain_state.m__arrayEntry = 0;
+        _state.m_smoothedGain_state.m__sessionID = _state.m__sessionID;
+        _state.m_smoothedGain_state.m__processorId = 15;
+        soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___initialise (_state.m_smoothedGain_state);
+    }
+
+    void _addInputEvent_volume_f32 (_State& _state, const float& event) noexcept
+    {
+        soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___volume_f32 (_state.m_smoothedGain_state, event);
+    }
+
+    void _addInputEvent_midiIn_struct_Message (_State& _state, const soul__midi__Message& event) noexcept
+    {
+        soul__midi__MPEParser___parseMIDI_struct_Message (_state.m_MPEParser_state, event);
+    }
+
+    FixedArray& _getOutputFrameArrayRef_audioOut (_State& state) noexcept
+    {
+        return state.m__out_audioOut.m_buffer;
+    }
+
+    void _prepare (_State& state, int32_t frames) noexcept
+    {
+        state.m__framesToAdvance = frames;
+    }
+
+    int32_t _get_num_xruns (_State& state) noexcept
+    {
+        return state.m__renderStats.m_underrunCount + state.m__renderStats.m_overrunCount;
+    }
+
+    //==============================================================================
+    bool _updateRampingStream (_State& _state, int32_t streamId, int32_t framesToRender) noexcept
+    {
+        bool rampComplete = {};
+
+        rampComplete = false;
+        return rampComplete;
+    }
+
+    void _updateRampingStreams (_State& _state, int32_t framesToRender) noexcept
+    {
+        bool rampComplete = {};
+        int32_t readPos = {}, writePos = {};
+
+        rampComplete = false;
+        readPos = 0;
+        writePos = 0;
+        if (_state.m__sparseStreamStatus.m_activeRamps == 0) goto _exit;
+        _loop: { rampComplete = _updateRampingStream (_state, _state.m__sparseStreamStatus.m_rampArray[readPos], framesToRender);
+                 if (rampComplete) goto _rampComplete;
+        }
+        _rampActive: { _state.m__sparseStreamStatus.m_rampArray[writePos] = _state.m__sparseStreamStatus.m_rampArray[readPos];
+                       readPos = readPos + 1;
+                       writePos = writePos + 1;
+                       if (readPos == _state.m__sparseStreamStatus.m_activeRamps) goto _loopExit;
+                       goto _loop;
+        }
+        _rampComplete: { readPos = readPos + 1;
+                         if (! (readPos == _state.m__sparseStreamStatus.m_activeRamps)) goto _loop;
+        }
+        _loopExit: { _state.m__sparseStreamStatus.m_activeRamps = writePos; }
+        _exit: {}
+    }
+
+    void _writeToStream_struct__Stream_out_f32_1024 (_Stream_out_f32_1024& stream, int32_t writePos, float value) noexcept
+    {
+        stream.m_buffer[writePos] = value;
+    }
+
+    //==============================================================================
+    float soul__dBtoGain (float decibels) noexcept
+    {
+        float _2 = {}, _3 = {}, _4 = {}, _T0 = {};
+
+        if (! (decibels > -100.0f)) goto _ternary_false_0;
+        _ternary_true_0: { _2 = SOUL_INTRINSICS::pow (10.0f, decibels * 0.05f);
+                           _T0 = _2;
+                           goto _ternary_end_0;
+        }
+        _ternary_false_0: { _3 = 0;
+                            _T0 = _3;
+        }
+        _ternary_end_0: { _4 = _T0;
+                          return _4;
+        }
+    }
+
+    float soul__noteNumberToFrequency_2 (float note) noexcept
+    {
+        float _2 = {};
+
+        _2 = SOUL_INTRINSICS::pow (2.0f, (note - 69.0f) * 0.083333336f);
+        return 440.0f * _2;
+    }
+
+    //==============================================================================
+    float soul__intrinsics___pow_specialised (float a, float b) noexcept
+    {
+        return 0;
+    }
+
+    float soul__intrinsics___sin_specialised (float n) noexcept
+    {
+        return 0;
+    }
+
+    float soul__intrinsics___abs_specialised (float n) noexcept
+    {
+        float _2 = {}, _3 = {}, _4 = {}, _T0 = {};
+
+        if (! (n < 0)) goto _ternary_false_0;
+        _ternary_true_0: { _2 = -n;
+                           _T0 = _2;
+                           goto _ternary_end_0;
+        }
+        _ternary_false_0: { _3 = n;
+                            _T0 = _3;
+        }
+        _ternary_end_0: { _4 = _T0;
+                          return _4;
+        }
+    }
+
+    int32_t soul__intrinsics___max_specialised (int32_t a, int32_t b) noexcept
+    {
+        int32_t _2 = {}, _3 = {}, _4 = {}, _T0 = {};
+
+        if (! (a > b)) goto _ternary_false_0;
+        _ternary_true_0: { _2 = a;
+                           _T0 = _2;
+                           goto _ternary_end_0;
+        }
+        _ternary_false_0: { _3 = b;
+                            _T0 = _3;
+        }
+        _ternary_end_0: { _4 = _T0;
+                          return _4;
+        }
+    }
+
+    float soul__intrinsics___addModulo2Pi_specialised (float value, float increment) noexcept
+    {
+        float _2 = {}, _3 = {}, _4 = {}, _T2 = {};
+
+        value = value + increment;
+        if (! (value >= 6.2831855f)) goto _ifnot_0;
+        _if_0: { if (! (value >= 12.566371f)) goto _ifnot_1; }
+        _if_1: { return SOUL_INTRINSICS::fmod (value, 6.2831855f); }
+        _ifnot_1: { return value - 6.2831855f; }
+        _ifnot_0: { if (! (value < 0)) goto _ternary_false_2; }
+        _ternary_true_2: { _2 = SOUL_INTRINSICS::fmod (value, 6.2831855f) + 6.2831855f;
+                           _T2 = _2;
+                           goto _ternary_end_2;
+        }
+        _ternary_false_2: { _3 = value;
+                            _T2 = _3;
+        }
+        _ternary_end_2: { _4 = _T2;
+                          return _4;
+        }
+    }
+
+    //==============================================================================
+    int32_t soul__midi__getByte1 (soul__midi__Message m) noexcept
+    {
+        return (m.m_midiBytes >> 16) & 255;
+    }
+
+    int32_t soul__midi__getByte2 (soul__midi__Message m) noexcept
+    {
+        return (m.m_midiBytes >> 8) & 255;
+    }
+
+    int32_t soul__midi__getByte3 (soul__midi__Message m) noexcept
+    {
+        return m.m_midiBytes & 255;
+    }
+
+    //==============================================================================
+    static _State& _stateUpCast (soul__midi__MPEParser___State& s)
+    {
+        auto offset = static_cast (offsetof (_State, m_MPEParser_state));
+        return *reinterpret_cast<_State*> (reinterpret_cast (&s) - offset);
+    }
+
+    //==============================================================================
+    void soul__midi__MPEParser___parseMIDI_struct_Message (soul__midi__MPEParser___State& _state, soul__midi__Message message) noexcept
+    {
+        int32_t _2 = {}, _3 = {}, _4 = {};
+        int32_t messageByte1 = {}, messageByte2 = {}, messageByte3 = {}, messageType = {}, channel = {};
+        soul__note_events__NoteOff _5 = {}, _6 = {};
+        float _7 = {}, _8 = {}, _9 = {}, _10 = {}, _11 = {}, _12 = {};
+        soul__note_events__NoteOn _13 = {};
+        soul__note_events__Slide _14 = {};
+        soul__note_events__Control _15 = {};
+        soul__note_events__Pressure _16 = {};
+        soul__note_events__PitchBend _17 = {};
+
+        _2 = soul__midi__getByte1 (message);
+        messageByte1 = static_cast (_2);
+        _3 = soul__midi__getByte2 (message);
+        messageByte2 = static_cast (_3);
+        _4 = soul__midi__getByte3 (message);
+        messageByte3 = static_cast (_4);
+        messageType = static_cast (static_cast (messageByte1) & 240);
+        channel = static_cast (static_cast (messageByte1) & 15);
+        if (! (messageType == 128)) goto _ifnot_0;
+        _if_0: { _5 = ZeroInitialiser();
+                 _5.m_channel = static_cast (channel);
+                 _5.m_note = static_cast (messageByte2);
+                 _7 = soul__midi__MPEParser__normaliseValue (_state, static_cast (messageByte3));
+                 _5.m_velocity = _7;
+                 soul__midi__MPEParser___eventOut_struct_NoteOff (_state, _5);
+                 goto _ifend_0;
+        }
+        _ifnot_0: { if (! (messageType == 144)) goto _ifnot_1; }
+        _if_1: { if (! (messageByte3 == 0)) goto _ifnot_2; }
+        _if_2: { _6 = ZeroInitialiser();
+                 _6.m_channel = static_cast (channel);
+                 _6.m_note = static_cast (messageByte2);
+                 soul__midi__MPEParser___eventOut_struct_NoteOff (_state, _6);
+                 goto _ifend_0;
+        }
+        _ifnot_2: { _13 = ZeroInitialiser();
+                    _13.m_channel = static_cast (channel);
+                    _13.m_note = static_cast (messageByte2);
+                    _8 = soul__midi__MPEParser__normaliseValue (_state, static_cast (messageByte3));
+                    _13.m_velocity = _8;
+                    soul__midi__MPEParser___eventOut_struct_NoteOn (_state, _13);
+                    goto _ifend_0;
+        }
+        _ifnot_1: { if (! (messageType == 176)) goto _ifnot_3; }
+        _if_3: { if (! (messageByte2 == 74)) goto _ifnot_4; }
+        _if_4: { _14 = ZeroInitialiser();
+                 _14.m_channel = static_cast (channel);
+                 _9 = soul__midi__MPEParser__normaliseValue (_state, static_cast (messageByte3));
+                 _14.m_slide = _9;
+                 goto _ifend_0;
+        }
+        _ifnot_4: { _15 = ZeroInitialiser();
+                    _15.m_channel = static_cast (channel);
+                    _15.m_control = static_cast (messageByte2);
+                    _10 = soul__midi__MPEParser__normaliseValue (_state, static_cast (messageByte3));
+                    _15.m_value = _10;
+                    soul__midi__MPEParser___eventOut_struct_Control (_state, _15);
+                    goto _ifend_0;
+        }
+        _ifnot_3: { if (! (messageType == 208)) goto _ifnot_5; }
+        _if_5: { _16 = ZeroInitialiser();
+                 _16.m_channel = static_cast (channel);
+                 _11 = soul__midi__MPEParser__normaliseValue (_state, static_cast (messageByte2));
+                 _16.m_pressure = _11;
+                 goto _ifend_0;
+        }
+        _ifnot_5: { if (! (messageType == 224)) goto _ifend_0; }
+        _if_6: { _17 = ZeroInitialiser();
+                 _17.m_channel = static_cast (channel);
+                 _12 = soul__midi__MPEParser__translateBendSemitones (_state, static_cast (messageByte3), static_cast (messageByte2));
+                 _17.m_bendSemitones = _12;
+                 soul__midi__MPEParser___eventOut_struct_PitchBend (_state, _17);
+        }
+        _ifend_0: {}
+    }
+
+    float soul__midi__MPEParser__normaliseValue (soul__midi__MPEParser___State& _state, int32_t i) noexcept
+    {
+        return static_cast (i) * 0.007874016f;
+    }
+
+    float soul__midi__MPEParser__translateBendSemitones (soul__midi__MPEParser___State& _state, int32_t msb, int32_t lsb) noexcept
+    {
+        int32_t value = {};
+
+        value = static_cast ((msb * 128) + lsb);
+        return static_cast (value - 8192) / 170.66667f;
+    }
+
+    void soul__midi__MPEParser___eventOut_struct_NoteOff (soul__midi__MPEParser___State& _state, soul__note_events__NoteOff value) noexcept
+    {
+        auto& _2 = _stateUpCast (_state);
+        soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___eventIn_struct_NoteOff (_2.m_voiceAllocator_state, value);
+    }
+
+    void soul__midi__MPEParser___eventOut_struct_NoteOn (soul__midi__MPEParser___State& _state, soul__note_events__NoteOn value) noexcept
+    {
+        auto& _2 = _stateUpCast (_state);
+        soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___eventIn_struct_NoteOn (_2.m_voiceAllocator_state, value);
+    }
+
+    void soul__midi__MPEParser___eventOut_struct_Control (soul__midi__MPEParser___State& _state, soul__note_events__Control value) noexcept
+    {
+        auto& _2 = _stateUpCast (_state);
+        soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___eventIn_struct_Control (_2.m_voiceAllocator_state, value);
+    }
+
+    void soul__midi__MPEParser___eventOut_struct_PitchBend (soul__midi__MPEParser___State& _state, soul__note_events__PitchBend value) noexcept
+    {
+        auto& _2 = _stateUpCast (_state);
+        soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___eventIn_struct_PitchBend (_2.m_voiceAllocator_state, value);
+    }
+
+    //==============================================================================
+    void soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___volume_f32 (soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___State& _state, float targetDB) noexcept
+    {
+        float _2 = {}, _3 = {};
+        float maxDelta = {};
+        int32_t _4 = {};
+
+        _2 = soul__dBtoGain (targetDB);
+        _state.m_targetGain = _2;
+        maxDelta = static_cast (static_cast ((1.0 / (sampleRate * 1.0))) / 0.5f);
+        _3 = soul__intrinsics___abs_specialised (_state.m_targetGain - _state.m_currentGain);
+        _4 = soul__intrinsics___max_specialised (1, static_cast (_3 / static_cast (maxDelta)));
+        _state.m_remainingRampSamples = _4;
+        _state.m_increment = (_state.m_targetGain - _state.m_currentGain) / static_cast (_state.m_remainingRampSamples);
+    }
+
+    void soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain__run (soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___State& _state, soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___IO& _io) noexcept
+    {
+        float out_value_gain = {};
+        int32_t _2 = {}, _3 = {};
+
+        out_value_gain = 0;
+        if (! (_state.m_remainingRampSamples != 0)) goto _ifnot_0;
+        _if_0: { _2 = _state.m_remainingRampSamples;
+                 _3 = _2 - 1;
+                 _state.m_remainingRampSamples = _3;
+                 if (! (_3 == 0)) goto _ifnot_1;
+        }
+        _if_1: { _state.m_currentGain = _state.m_targetGain;
+                 goto _ifnot_0;
+        }
+        _ifnot_1: { _state.m_currentGain = _state.m_currentGain + _state.m_increment; }
+        _ifnot_0: { out_value_gain = out_value_gain + _state.m_currentGain;
+                    _state.m__resumePoint = 1;
+                    _io.m__out_gain = out_value_gain;
+        }
+    }
+
+    void soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___initialise (soul__gain__SmoothedGainParameter___for__root__SineSynth_smoothedGain___State& _state) noexcept
+    {
+        _state.m_targetGain = 0;
+        _state.m_currentGain = 0;
+        _state.m_increment = 0;
+        _state.m_remainingRampSamples = 0;
+    }
+
+    //==============================================================================
+    void soul__gain__DynamicGain___for__root__SineSynth_gainProcessor__run (soul__gain__DynamicGain___for__root__SineSynth_gainProcessor___State& _state, soul__gain__DynamicGain___for__root__SineSynth_gainProcessor___IO& _io) noexcept
+    {
+        float out_value_out = {}, _2 = {}, _3 = {};
+
+        out_value_out = 0;
+        _2 = _io.m__in_in;
+        _3 = _io.m__in_gain;
+        out_value_out = out_value_out + (_2 * _3);
+        _state.m__resumePoint = 1;
+        _io.m__out_out = out_value_out;
+    }
+
+    //==============================================================================
+    void soul__gain__DynamicGain___for__root__Voice_attenuator__run (soul__gain__DynamicGain___for__root__Voice_attenuator___State& _state, soul__gain__DynamicGain___for__root__Voice_attenuator___IO& _io) noexcept
+    {
+        float out_value_out = {}, _2 = {}, _3 = {};
+
+        out_value_out = 0;
+        _2 = _io.m__in_in;
+        _3 = _io.m__in_gain;
+        out_value_out = out_value_out + (_2 * _3);
+        _state.m__resumePoint = 1;
+        _io.m__out_out = out_value_out;
+    }
+
+    //==============================================================================
+    void soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___noteIn_struct_NoteOn (soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___State& _state, soul__note_events__NoteOn e) noexcept
+    {
+        _state.m_active = true;
+        _state.m_targetLevel = e.m_velocity;
+    }
+
+    void soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___noteIn_struct_NoteOff (soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___State& _state, soul__note_events__NoteOff e) noexcept
+    {
+        _state.m_active = false;
+    }
+
+    void soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope__run (soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___State& _state, soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___IO& _io) noexcept
+    {
+        float out_value_levelOut = {}, _2 = {}, _3 = {}, _4 = {};
+        int32_t _resumePoint = {};
+        int32_t attackSamples = {};
+        bool _5 = {}, _6 = {}, _7 = {}, _8 = {}, _9 = {}, _10 = {}, _T0 = {}, _T1 = {};
+
+        out_value_levelOut = 0;
+        _resumePoint = _state.m__resumePoint;
+        if (_resumePoint == 1) goto _loop_1;
+        _check_resume_point_2: { if (_resumePoint == 2) goto _resume_point_2; }
+        _check_resume_point_3: { if (_resumePoint == 3) goto _loop_3; }
+        _check_resume_point_4: { if (_resumePoint == 4) goto _loop_4; }
+        _loop_1: { if (! (! _state.m_active)) goto _break_1; }
+        _advance_start_0: { _state.m__resumePoint = 1;
+                            goto _exit;
+        }
+        _break_1: { _state.m_level = 0;
+                    attackSamples = static_cast (static_cast (static_cast ((sampleRate * 1.0)) * 0.02f));
+                    _2 = SOUL_INTRINSICS::pow (2.0f, -1.0f / static_cast (attackSamples));
+                    _3 = SOUL_INTRINSICS::pow (_state.m_targetLevel + 2.0f, 1.0f / static_cast (attackSamples));
+                    _state.m_attackMultiplier = static_cast (_2 * _3);
+                    _state.m_attackLevel = 2.0f;
+        }
+        _loop_2: { if (! _state.m_active) goto _ternary_false_0; }
+        _ternary_true_0: { _5 = _state.m_level < _state.m_targetLevel;
+                           _T0 = _5;
+                           goto _ternary_end_0;
+        }
+        _ternary_false_0: { _6 = false;
+                            _T0 = _6;
+        }
+        _ternary_end_0: { _7 = _T0;
+                          if (! _7) goto _loop_3;
+        }
+        _body_2: { _state.m_level = _state.m_attackLevel - 2.0f;
+                   out_value_levelOut = out_value_levelOut + _state.m_level;
+                   _state.m__resumePoint = 2;
+                   goto _exit;
+        }
+        _resume_point_2: { _state.m_attackLevel = _state.m_attackLevel * static_cast (_state.m_attackMultiplier);
+                           goto _loop_2;
+        }
+        _loop_3: { if (! _state.m_active) goto _break_3; }
+        _body_3: { out_value_levelOut = out_value_levelOut + _state.m_level;
+                   _state.m__resumePoint = 3;
+                   goto _exit;
+        }
+        _break_3: { _4 = SOUL_INTRINSICS::pow (0.0001f, static_cast ((1.0 / (sampleRate * 1.0))) / 0.1f);
+                    _state.m_releaseMultiplier = static_cast (_4);
+        }
+        _loop_4: { if (! (! _state.m_active)) goto _ternary_false_1; }
+        _ternary_true_1: { _8 = _state.m_level > 0.00001f;
+                           _T1 = _8;
+                           goto _ternary_end_1;
+        }
+        _ternary_false_1: { _9 = false;
+                            _T1 = _9;
+        }
+        _ternary_end_1: { _10 = _T1;
+                          if (! _10) goto _loop_1;
+        }
+        _body_4: { out_value_levelOut = out_value_levelOut + _state.m_level;
+                   _state.m_level = _state.m_level * static_cast (_state.m_releaseMultiplier);
+                   _state.m__resumePoint = 4;
+        }
+        _exit: { _io.m__out_levelOut = out_value_levelOut; }
+    }
+
+    void soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___initialise (soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___State& _state) noexcept
+    {
+        _state.m_active = false;
+        _state.m_targetLevel = 0;
+    }
+
+    //==============================================================================
+    static _State& _stateUpCast (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& s)
+    {
+        auto offset = static_cast (offsetof (_State, m_voiceAllocator_state));
+        return *reinterpret_cast<_State*> (reinterpret_cast (&s) - offset);
+    }
+
+    //==============================================================================
+    void soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___eventIn_struct_NoteOn (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& _state, soul__note_events__NoteOn e) noexcept
+    {
+        int32_t allocatedVoice = {};
+        int32_t allocatedVoiceAge = {}, i = {}, _2 = {}, _3 = {};
+        int32_t age = {};
+        soul__note_events__NoteOff noteOff = {};
+
+        allocatedVoice = 0;
+        allocatedVoiceAge = _state.m_voiceInfo[allocatedVoice].m_voiceAge;
+        i = 1;
+        _loop_0: { if (! (i < 8)) goto _break_0; }
+        _body_0: { age = static_cast (_state.m_voiceInfo[_intrin_wrap (static_cast (i), 8) & 7].m_voiceAge);
+                   if (! (age < static_cast (allocatedVoiceAge))) goto _cont_0;
+        }
+        _if_0: { allocatedVoiceAge = static_cast (age);
+                 allocatedVoice = _intrin_wrap (static_cast (i), 8) & 7;
+        }
+        _cont_0: { _2 = i;
+                   i = _2 + 1;
+                   goto _loop_0;
+        }
+        _break_0: { if (! _state.m_voiceInfo[allocatedVoice].m_active) goto _ifnot_1; }
+        _if_1: { noteOff = ZeroInitialiser();
+                 noteOff.m_channel = _state.m_voiceInfo[allocatedVoice].m_channel;
+                 noteOff.m_note = _state.m_voiceInfo[allocatedVoice].m_note;
+                 soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___voiceEventOut_struct_NoteOff (_state, static_cast (allocatedVoice) & 7, noteOff);
+        }
+        _ifnot_1: { soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___voiceEventOut_struct_NoteOn (_state, static_cast (allocatedVoice) & 7, e);
+                    _state.m_voiceInfo[allocatedVoice].m_active = true;
+                    _state.m_voiceInfo[allocatedVoice].m_noteReleased = false;
+                    _state.m_voiceInfo[allocatedVoice].m_channel = e.m_channel;
+                    _state.m_voiceInfo[allocatedVoice].m_note = e.m_note;
+                    _3 = _state.m_nextAllocatedVoiceAge;
+                    _state.m_nextAllocatedVoiceAge = _3 + 1;
+                    _state.m_voiceInfo[allocatedVoice].m_voiceAge = _3;
+        }
+    }
+
+    void soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___eventIn_struct_NoteOff (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& _state, soul__note_events__NoteOff e) noexcept
+    {
+        int32_t voice = {}, _2 = {};
+        bool _3 = {}, _4 = {}, pedalDown = {}, _5 = {}, _6 = {}, _7 = {}, _T0 = {}, _T2 = {};
+        int32_t counter_0 = {};
+        int32_t _8 = {};
+
+        voice = 0;
+        if (! _state.m_masterSustainActive) goto _ternary_false_0;
+        _ternary_true_0: { _3 = true;
+                           _T0 = _3;
+                           goto _ternary_end_0;
+        }
+        _ternary_false_0: { _4 = _state.m_channelSustainActive[_intrin_wrap (static_cast (e.m_channel), 16) & 15];
+                            _T0 = _4;
+        }
+        _ternary_end_0: { pedalDown = _T0;
+                          counter_0 = 8;
+        }
+        _loop_0: { if (! (counter_0 > 0)) goto _break_0; }
+        _body_0: { if (! (_state.m_voiceInfo[voice].m_channel == e.m_channel)) goto _ternary_false_2; }
+        _ternary_true_2: { _5 = _state.m_voiceInfo[voice].m_note == e.m_note;
+                           _T2 = _5;
+                           goto _ternary_end_2;
+        }
+        _ternary_false_2: { _6 = false;
+                            _T2 = _6;
+        }
+        _ternary_end_2: { _7 = _T2;
+                          if (! _7) goto _ifnot_1;
+        }
+        _if_1: { if (! pedalDown) goto _ifnot_3; }
+        _if_3: { _state.m_voiceInfo[voice].m_noteReleased = true;
+                 goto _ifnot_1;
+        }
+        _ifnot_3: { _state.m_voiceInfo[voice].m_active = false;
+                    _8 = _state.m_nextUnallocatedVoiceAge;
+                    _state.m_nextUnallocatedVoiceAge = _8 + 1;
+                    _state.m_voiceInfo[voice].m_voiceAge = _8;
+                    soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___voiceEventOut_struct_NoteOff (_state, static_cast (voice) & 7, e);
+        }
+        _ifnot_1: { _2 = voice;
+                    voice = (_2 + 1) & 7;
+                    counter_0 = counter_0 - 1;
+                    goto _loop_0;
+        }
+        _break_0: {}
+    }
+
+    void soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___eventIn_struct_PitchBend (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& _state, soul__note_events__PitchBend e) noexcept
+    {
+        int32_t voice = {}, _2 = {};
+        int32_t counter_0 = {};
+
+        voice = 0;
+        counter_0 = 8;
+        _loop_0: { if (! (counter_0 > 0)) goto _break_0; }
+        _body_0: { if (! (_state.m_voiceInfo[voice].m_channel == e.m_channel)) goto _ifnot_0; }
+        _if_0: { soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___voiceEventOut_struct_PitchBend (_state, static_cast (voice) & 7, e); }
+        _ifnot_0: { _2 = voice;
+                    voice = (_2 + 1) & 7;
+                    counter_0 = counter_0 - 1;
+                    goto _loop_0;
+        }
+        _break_0: {}
+    }
+
+    void soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___eventIn_struct_Control (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& _state, soul__note_events__Control c) noexcept
+    {
+        bool pedalDown = {}, isMasterChannel = {}, _2 = {}, _3 = {}, _4 = {}, _5 = {}, _6 = {}, _7 = {}, _8 = {}, _9 = {}, _10 = {}, _T6 = {}, _T5 = {}, _T4 = {};
+        int32_t voice = {}, _11 = {}, voice_2 = {}, _12 = {};
+        int32_t counter_0 = {}, counter_1 = {};
+        soul__note_events__NoteOff noteOff = {};
+        int32_t _13 = {};
+
+        if (! (c.m_control == 64)) goto _ifnot_0;
+        _if_0: { pedalDown = c.m_value >= 0.5f;
+                 isMasterChannel = c.m_channel == 0;
+                 _state.m_channelSustainActive[_intrin_wrap (static_cast (c.m_channel), 16) & 15] = pedalDown;
+                 if (! isMasterChannel) goto _ifnot_1;
+        }
+        _if_1: { _state.m_masterSustainActive = pedalDown; }
+        _ifnot_1: { if (! (! pedalDown)) goto _ifnot_2; }
+        _if_2: { voice = 0;
+                 counter_0 = 8;
+        }
+        _loop_0: { if (! (counter_0 > 0)) goto _ifnot_2; }
+        _body_0: { if (! isMasterChannel) goto _ternary_false_6; }
+        _ternary_true_6: { _2 = true;
+                           _T6 = _2;
+                           goto _ternary_end_6;
+        }
+        _ternary_false_6: { _3 = _state.m_voiceInfo[voice].m_channel == c.m_channel;
+                            _T6 = _3;
+        }
+        _ternary_end_6: { _4 = _T6;
+                          if (! _4) goto _ternary_false_5;
+        }
+        _ternary_true_5: { _5 = _state.m_voiceInfo[voice].m_active == true;
+                           _T5 = _5;
+                           goto _ternary_end_5;
+        }
+        _ternary_false_5: { _6 = false;
+                            _T5 = _6;
+        }
+        _ternary_end_5: { _7 = _T5;
+                          if (! _7) goto _ternary_false_4;
+        }
+        _ternary_true_4: { _8 = _state.m_voiceInfo[voice].m_noteReleased == true;
+                           _T4 = _8;
+                           goto _ternary_end_4;
+        }
+        _ternary_false_4: { _9 = false;
+                            _T4 = _9;
+        }
+        _ternary_end_4: { _10 = _T4;
+                          if (! _10) goto _ifnot_3;
+        }
+        _if_3: { noteOff = ZeroInitialiser();
+                 noteOff.m_channel = _state.m_voiceInfo[voice].m_channel;
+                 noteOff.m_note = _state.m_voiceInfo[voice].m_note;
+                 soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___voiceEventOut_struct_NoteOff (_state, static_cast (voice) & 7, noteOff);
+                 _state.m_voiceInfo[voice].m_active = false;
+                 _13 = _state.m_nextUnallocatedVoiceAge;
+                 _state.m_nextUnallocatedVoiceAge = _13 + 1;
+                 _state.m_voiceInfo[voice].m_voiceAge = _13;
+        }
+        _ifnot_3: { _11 = voice;
+                    voice = (_11 + 1) & 7;
+                    counter_0 = counter_0 - 1;
+                    goto _loop_0;
+        }
+        _ifnot_2: { return; }
+        _ifnot_0: { voice_2 = 0;
+                    counter_1 = 8;
+        }
+        _loop_1: { if (! (counter_1 > 0)) goto _break_1; }
+        _body_1: { if (! (_state.m_voiceInfo[voice_2].m_channel == c.m_channel)) goto _ifnot_7; }
+        _if_7: {}
+        _ifnot_7: { _12 = voice_2;
+                    voice_2 = (_12 + 1) & 7;
+                    counter_1 = counter_1 - 1;
+                    goto _loop_1;
+        }
+        _break_1: {}
+    }
+
+    void soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___initialise (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& _state) noexcept
+    {
+        _state.m_nextAllocatedVoiceAge = 1000000000;
+        _state.m_nextUnallocatedVoiceAge = 1;
+        _state.m_voiceInfo = ZeroInitialiser();
+        _state.m_channelSustainActive = ZeroInitialiser();
+        _state.m_masterSustainActive = false;
+    }
+
+    void soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___voiceEventOut_struct_NoteOff (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& _state, int32_t element, soul__note_events__NoteOff value) noexcept
+    {
+        if (element == 0) goto _element_0;
+        _block_1: { if (element == 1) goto _element_1; }
+        _block_2: { if (element == 2) goto _element_2; }
+        _block_3: { if (element == 3) goto _element_3; }
+        _block_4: { if (element == 4) goto _element_4; }
+        _block_5: { if (element == 5) goto _element_5; }
+        _block_6: { if (element == 6) goto _element_6; }
+        _block_7: { if (element == 7) goto _element_7; }
+        _block_8: { return; }
+        _element_0: { auto& _2 = _stateUpCast (_state);
+                      Voice___noteOff_struct_NoteOff (_2.m_voices_state[0], value);
+                      return;
+        }
+        _element_1: { auto& _3 = _stateUpCast (_state);
+                      Voice___noteOff_struct_NoteOff (_3.m_voices_state[1], value);
+                      return;
+        }
+        _element_2: { auto& _4 = _stateUpCast (_state);
+                      Voice___noteOff_struct_NoteOff (_4.m_voices_state[2], value);
+                      return;
+        }
+        _element_3: { auto& _5 = _stateUpCast (_state);
+                      Voice___noteOff_struct_NoteOff (_5.m_voices_state[3], value);
+                      return;
+        }
+        _element_4: { auto& _6 = _stateUpCast (_state);
+                      Voice___noteOff_struct_NoteOff (_6.m_voices_state[4], value);
+                      return;
+        }
+        _element_5: { auto& _7 = _stateUpCast (_state);
+                      Voice___noteOff_struct_NoteOff (_7.m_voices_state[5], value);
+                      return;
+        }
+        _element_6: { auto& _8 = _stateUpCast (_state);
+                      Voice___noteOff_struct_NoteOff (_8.m_voices_state[6], value);
+                      return;
+        }
+        _element_7: { auto& _9 = _stateUpCast (_state);
+                      Voice___noteOff_struct_NoteOff (_9.m_voices_state[7], value);
+        }
+    }
+
+    void soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___voiceEventOut_struct_NoteOn (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& _state, int32_t element, soul__note_events__NoteOn value) noexcept
+    {
+        if (element == 0) goto _element_0;
+        _block_1: { if (element == 1) goto _element_1; }
+        _block_2: { if (element == 2) goto _element_2; }
+        _block_3: { if (element == 3) goto _element_3; }
+        _block_4: { if (element == 4) goto _element_4; }
+        _block_5: { if (element == 5) goto _element_5; }
+        _block_6: { if (element == 6) goto _element_6; }
+        _block_7: { if (element == 7) goto _element_7; }
+        _block_8: { return; }
+        _element_0: { auto& _2 = _stateUpCast (_state);
+                      Voice___noteOn_struct_NoteOn (_2.m_voices_state[0], value);
+                      return;
+        }
+        _element_1: { auto& _3 = _stateUpCast (_state);
+                      Voice___noteOn_struct_NoteOn (_3.m_voices_state[1], value);
+                      return;
+        }
+        _element_2: { auto& _4 = _stateUpCast (_state);
+                      Voice___noteOn_struct_NoteOn (_4.m_voices_state[2], value);
+                      return;
+        }
+        _element_3: { auto& _5 = _stateUpCast (_state);
+                      Voice___noteOn_struct_NoteOn (_5.m_voices_state[3], value);
+                      return;
+        }
+        _element_4: { auto& _6 = _stateUpCast (_state);
+                      Voice___noteOn_struct_NoteOn (_6.m_voices_state[4], value);
+                      return;
+        }
+        _element_5: { auto& _7 = _stateUpCast (_state);
+                      Voice___noteOn_struct_NoteOn (_7.m_voices_state[5], value);
+                      return;
+        }
+        _element_6: { auto& _8 = _stateUpCast (_state);
+                      Voice___noteOn_struct_NoteOn (_8.m_voices_state[6], value);
+                      return;
+        }
+        _element_7: { auto& _9 = _stateUpCast (_state);
+                      Voice___noteOn_struct_NoteOn (_9.m_voices_state[7], value);
+        }
+    }
+
+    void soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___voiceEventOut_struct_PitchBend (soul___voice_allocators__Basic___for__root__SineSynth_voiceAllocator___State& _state, int32_t element, soul__note_events__PitchBend value) noexcept
+    {
+        if (element == 0) goto _element_0;
+        _block_1: { if (element == 1) goto _element_1; }
+        _block_2: { if (element == 2) goto _element_2; }
+        _block_3: { if (element == 3) goto _element_3; }
+        _block_4: { if (element == 4) goto _element_4; }
+        _block_5: { if (element == 5) goto _element_5; }
+        _block_6: { if (element == 6) goto _element_6; }
+        _block_7: { if (element == 7) goto _element_7; }
+        _block_8: { return; }
+        _element_0: { auto& _2 = _stateUpCast (_state);
+                      Voice___pitchBend_struct_PitchBend (_2.m_voices_state[0], value);
+                      return;
+        }
+        _element_1: { auto& _3 = _stateUpCast (_state);
+                      Voice___pitchBend_struct_PitchBend (_3.m_voices_state[1], value);
+                      return;
+        }
+        _element_2: { auto& _4 = _stateUpCast (_state);
+                      Voice___pitchBend_struct_PitchBend (_4.m_voices_state[2], value);
+                      return;
+        }
+        _element_3: { auto& _5 = _stateUpCast (_state);
+                      Voice___pitchBend_struct_PitchBend (_5.m_voices_state[3], value);
+                      return;
+        }
+        _element_4: { auto& _6 = _stateUpCast (_state);
+                      Voice___pitchBend_struct_PitchBend (_6.m_voices_state[4], value);
+                      return;
+        }
+        _element_5: { auto& _7 = _stateUpCast (_state);
+                      Voice___pitchBend_struct_PitchBend (_7.m_voices_state[5], value);
+                      return;
+        }
+        _element_6: { auto& _8 = _stateUpCast (_state);
+                      Voice___pitchBend_struct_PitchBend (_8.m_voices_state[6], value);
+                      return;
+        }
+        _element_7: { auto& _9 = _stateUpCast (_state);
+                      Voice___pitchBend_struct_PitchBend (_9.m_voices_state[7], value);
+        }
+    }
+
+    //==============================================================================
+    void SineOsc___noteOn_struct_NoteOn (SineOsc___State& _state, soul__note_events__NoteOn e) noexcept
+    {
+        _state.m_notePitch = e.m_note;
+        _state.m_bendSemitones = 0;
+        SineOsc__calculatePhaseIncrement (_state);
+    }
+
+    void SineOsc___pitchBend_struct_PitchBend (SineOsc___State& _state, soul__note_events__PitchBend e) noexcept
+    {
+        _state.m_bendSemitones = e.m_bendSemitones;
+        SineOsc__calculatePhaseIncrement (_state);
+    }
+
+    void SineOsc__calculatePhaseIncrement (SineOsc___State& _state) noexcept
+    {
+        float _2 = {};
+        float noteFrequency = {};
+
+        _2 = soul__noteNumberToFrequency_2 (_state.m_notePitch + _state.m_bendSemitones);
+        noteFrequency = static_cast (_2);
+        _state.m_phaseIncrement = static_cast ((static_cast (noteFrequency) * 6.283185307179586) * (1.0 / (sampleRate * 1.0)));
+    }
+
+    void SineOsc__run (SineOsc___State& _state, SineOsc___IO& _io) noexcept
+    {
+        float out_value_audioOut = {}, _2 = {}, _3 = {};
+
+        out_value_audioOut = 0;
+        _2 = soul__intrinsics___addModulo2Pi_specialised (_state.m_phase, _state.m_phaseIncrement);
+        _state.m_phase = _2;
+        _3 = SOUL_INTRINSICS::sin (_state.m_phase);
+        out_value_audioOut = out_value_audioOut + _3;
+        _state.m__resumePoint = 1;
+        _io.m__out_audioOut = out_value_audioOut;
+    }
+
+    void SineOsc___initialise (SineOsc___State& _state) noexcept
+    {
+        _state.m_notePitch = 0;
+        _state.m_bendSemitones = 0;
+        _state.m_phase = 0;
+        _state.m_phaseIncrement = 0;
+    }
+
+    //==============================================================================
+    void Voice___initialise (Voice___State& _state) noexcept
+    {
+        _state.m_osc_state.m__arrayEntry = 0;
+        _state.m_osc_state.m__sessionID = _state.m__sessionID;
+        _state.m_osc_state.m__processorId = 1;
+        SineOsc___initialise (_state.m_osc_state);
+        _state.m_amplitudeEnvelope_state.m__arrayEntry = 0;
+        _state.m_amplitudeEnvelope_state.m__sessionID = _state.m__sessionID;
+        _state.m_amplitudeEnvelope_state.m__processorId = 2;
+        soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___initialise (_state.m_amplitudeEnvelope_state);
+        _state.m_attenuator_state.m__arrayEntry = 0;
+        _state.m_attenuator_state.m__sessionID = _state.m__sessionID;
+        _state.m_attenuator_state.m__processorId = 3;
+    }
+
+    void Voice__run (Voice___State& _state, Voice___IO& _io) noexcept
+    {
+        SineOsc___IO _2 = {};
+        soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___IO _3 = {};
+        soul__gain__DynamicGain___for__root__Voice_attenuator___IO _4 = {};
+
+        _2 = ZeroInitialiser();
+        SineOsc__run (_state.m_osc_state, _2);
+        _3 = ZeroInitialiser();
+        soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope__run (_state.m_amplitudeEnvelope_state, _3);
+        _4 = ZeroInitialiser();
+        _4.m__in_in = _2.m__out_audioOut;
+        _4.m__in_gain = _3.m__out_levelOut;
+        soul__gain__DynamicGain___for__root__Voice_attenuator__run (_state.m_attenuator_state, _4);
+        _io.m__out_audioOut = _4.m__out_out;
+    }
+
+    void Voice___noteOn_struct_NoteOn (Voice___State& _state, soul__note_events__NoteOn event) noexcept
+    {
+        SineOsc___noteOn_struct_NoteOn (_state.m_osc_state, event);
+        soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___noteIn_struct_NoteOn (_state.m_amplitudeEnvelope_state, event);
+    }
+
+    void Voice___noteOff_struct_NoteOff (Voice___State& _state, soul__note_events__NoteOff event) noexcept
+    {
+        soul__envelope__FixedAttackReleaseEnvelope___for__root__Voice_amplitudeEnvelope___noteIn_struct_NoteOff (_state.m_amplitudeEnvelope_state, event);
+    }
+
+    void Voice___pitchBend_struct_PitchBend (Voice___State& _state, soul__note_events__PitchBend event) noexcept
+    {
+        SineOsc___pitchBend_struct_PitchBend (_state.m_osc_state, event);
+    }
+
+    //==============================================================================
+    int32_t _internal___minInt32 (int32_t a, int32_t b) noexcept
+    {
+        if (! (a < b)) goto _moreThan;
+        _lessThan: { return a; }
+        _moreThan: { return b; }
+    }
+
+
+    #if __clang__
+     #pragma clang diagnostic pop
+    #elif defined(__GNUC__)
+     #pragma GCC diagnostic pop
+    #elif defined(_MSC_VER)
+     #pragma warning (pop)
+    #endif
+
+    //==============================================================================
+    // The program contains no string literals, so this function should never be called
+    static constexpr const char* lookupStringLiteral (int32_t)  { return {}; }
+
+    //==============================================================================
+    _State state = {}, initialisedState;
+
+    double sampleRate = 1.0;
+    uint32_t framesToAdvance = 0;
+    uint64_t totalFramesElapsed = 0;
+};
+
diff --git a/TestPatches/SoulTest/SoulPatch.hpp b/TestPatches/SoulTest/SoulPatch.hpp
new file mode 100644
index 00000000..cb24bd47
--- /dev/null
+++ b/TestPatches/SoulTest/SoulPatch.hpp
@@ -0,0 +1,110 @@
+#ifndef __SoulPatch_hpp__
+#define __SoulPatch_hpp__
+
+#include "Patch.h"
+
+#undef min
+#undef max
+#undef sin
+#undef cos
+#undef exp
+#undef sqrt
+#undef pow
+#undef log
+#undef log10
+
+#define SOUL_CPP_ASSERT(x)
+#define SOUL_INTRINSICS owl
+
+#include 
+namespace owl {
+  inline float pow(float x, float y){ return fast_powf(x, y); }
+  inline float exp(float x){ return fast_expf(x); }
+  inline float log(float x){ return fast_logf(x); }
+  inline float log10(float x){ return fast_log10f(x); }
+#ifdef ARM_CORTEX
+  inline float sqrt(float x){ return arm_sqrtf(x); }
+  inline float sin(float x){ return arm_sin_f32(x); }
+  inline float cos(float x){ return arm_cos_f32(x); }
+#else
+  inline float sqrt(float x){ return std::sqrt(x); }
+  inline float sin(float x){ return std::sin(x); }
+  inline float cos(float x){ return std::cos(x); }
+#endif
+  inline float tan(float x){ return std::tan(x); }
+  inline float sinh(float x){ return std::sinh(x); }
+  inline float cosh(float x){ return std::cosh(x); }
+  inline float tanh(float x){ return std::tanh(x); }
+  inline float asinh(float x){ return std::asinh(x); }
+  inline float acosh(float x){ return std::acosh(x); }
+  inline float atanh(float x){ return std::atanh(x); }
+  inline float asin(float x){ return std::asin(x); }
+  inline float acos(float x){ return std::acos(x); }
+  inline float atan(float x){ return std::atan(x); }
+  inline float atan2(float x, float y){ return fast_atan2f(x, y); }
+  inline float isnan(float x){ return std::isnan(x); }
+  inline float isinf(float x){ return std::isinf(x); }
+  inline float floor(float x){ return std::floor(x); }
+  inline float fmod(float x, float y){ return std::fmod(x, y); }
+}
+#define double float
+#include "soul.hpp"
+
+#define MAX_MIDI_MESSAGES 32
+class SoulPatch : public Patch {
+private:
+  SOULPATCH soulpatch;
+  SOULPATCH::ParameterList params;
+  AudioBuffer* outputBuffer;
+  SOULPATCH::MIDIMessage midiBuffer[32];
+  size_t numMIDIMessages = 0;
+public:
+  SoulPatch(){
+    soulpatch.init(getSampleRate(), 0);
+    params = soulpatch.createParameterList();
+    for(size_t i=0; i= SOULPATCH::numAudioInputChannels, "Too many input channels in SOUL patch");
+    ASSERT(getNumberOfChannels() >= SOULPATCH::numAudioOutputChannels, "Too many output channels in SOUL patch");
+    outputBuffer = AudioBuffer::create(SOULPATCH::numAudioOutputChannels, getBlockSize());
+  }
+  void processMidi(MidiMessage msg){
+    if(numMIDIMessages < MAX_MIDI_MESSAGES){
+      midiBuffer[numMIDIMessages] = {0, msg.data[1], msg.data[2], msg.data[3]};
+      numMIDIMessages++;
+    }
+  }
+  void processAudio(AudioBuffer &buffer){
+    SOULPATCH::RenderContext ctx;
+    for(size_t i=0; igetSamples(i);
+      out.clear();
+      ctx.outputChannels[i] = out;
+      // ctx.outputChannels[i] = buffer.getSamples(i); // in-place
+    }
+    // debugMessage("xruns", (int)soulpatch.getNumXRuns());
+    ctx.numFrames = buffer.getSize();
+    ctx.incomingMIDI.messages = &midiBuffer[0];
+    ctx.incomingMIDI.numMessages = numMIDIMessages;
+    soulpatch.render(ctx);
+    numMIDIMessages = 0;
+    for(size_t i=0; igetSamples(i));
+  }
+};
+
+#endif // __SoulPatch_hpp__
diff --git a/TestPatches/SoulTest/soul.hpp b/TestPatches/SoulTest/soul.hpp
new file mode 100644
index 00000000..f067b240
--- /dev/null
+++ b/TestPatches/SoulTest/soul.hpp
@@ -0,0 +1,2 @@
+#include "SineSynth.hpp"
+#define SOULPATCH SineSynth

From ade878638593e07a1433187a8add32801cbe0bc3 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:04:09 +0200
Subject: [PATCH 297/374] adapted make check for limited CI server setup

---
 Makefile | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/Makefile b/Makefile
index 9f049e04..05cfc2db 100644
--- a/Makefile
+++ b/Makefile
@@ -185,15 +185,17 @@ run: $(DEPS) ## run patch natively
 grind: $(DEPS) ## run valgrind on patch natively
 	@$(MAKE) -s -f native.mk grind
 
-check: ## run test patches and unit tests natively
+check: ## run test patches and unit tests
 	@for nm in $(TESTS) ; do \
 		$(MAKE) -s TEST=$$nm test || exit;\
 	done
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/CppTest PATCHNAME=CppTest clean patch web run
-	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest FAUST=FaustTest clean patch web run
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/HeavyTest HEAVY=HeavyTest clean patch web run
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/GenTest GEN=MIDItestMinMax clean patch web run
-	@unset PATCHNAME PATCHCLASS PATCHFILE SOULCLASS SOULFILE SOULHPP && $(MAKE) PATCHSOURCE=TestPatches/SoulTest SOUL=SineSynth clean patch web run
+	# @unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest FAUST=FaustTest clean patch web run # FAUST is not installed for CI
+	@cp FaustSource/*.h TestPatches/FaustTest && unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest PATCHNAME=Faust clean patch web run
+	# @unset PATCHNAME PATCHCLASS PATCHFILE SOULCLASS SOULFILE SOULHPP && $(MAKE) PATCHSOURCE=TestPatches/SoulTest SOUL=SineSynth clean patch web run # SOUL is not install for CI
+	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/SoulTest PATCHNAME=Soul clean patch web run
 
 help: ## show this help
 	@echo 'Usage: make [target] ...'

From dee969d8b52e509f2eaf134176ce9fe79edd96f6 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:04:31 +0200
Subject: [PATCH 298/374] added python requirement

---
 .github/workflows/c-cpp.yml | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/.github/workflows/c-cpp.yml b/.github/workflows/c-cpp.yml
index 66bfb3cc..7d5c1707 100644
--- a/.github/workflows/c-cpp.yml
+++ b/.github/workflows/c-cpp.yml
@@ -23,6 +23,10 @@ jobs:
       uses: mymindstorm/setup-emsdk@v7
       with:
         version: 2.0.10
+    - name: Setup python
+      uses: actions/setup-python@v2
+      with:
+        python-version: 2.7
     - name: make
       run: make
     - name: make check

From e0e532d4ca927a56c6297f7b4bb819c75d6955ab Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:13:49 +0200
Subject: [PATCH 299/374] added hvcc submodule

---
 .gitmodules | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/.gitmodules b/.gitmodules
index 8ea2ad3c..9360814d 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -2,3 +2,7 @@
 	path = Libraries/DaisySP
 	url = https://github.com/electro-smith/DaisySP.git
 	branch = master
+[submodule "Tools/hvcc"]
+	path = Tools/hvcc
+	url = https://github.com/pingdynasty/hvcc.git
+	branch = feature/develop

From f72889098131fa249f538a14bdbcec424f2a7fb0 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:21:37 +0200
Subject: [PATCH 300/374] added hvcc submodule

---
 .gitmodules | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.gitmodules b/.gitmodules
index 9360814d..cc3821de 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -5,4 +5,4 @@
 [submodule "Tools/hvcc"]
 	path = Tools/hvcc
 	url = https://github.com/pingdynasty/hvcc.git
-	branch = feature/develop
+	branch = develop

From 2b24307253d3c2ae73bb929a9c746ac319f11d7d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:23:59 +0200
Subject: [PATCH 301/374] removed gitignore

---
 Tools/.gitignore | 1 -
 1 file changed, 1 deletion(-)
 delete mode 100644 Tools/.gitignore

diff --git a/Tools/.gitignore b/Tools/.gitignore
deleted file mode 100644
index 6083bd3d..00000000
--- a/Tools/.gitignore
+++ /dev/null
@@ -1 +0,0 @@
-hvcc

From f9be0cacee7a6f4aac70d50f84eed11fb42240d2 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:24:14 +0200
Subject: [PATCH 302/374] set to latest develop version

---
 Tools/hvcc | 1 +
 1 file changed, 1 insertion(+)
 create mode 160000 Tools/hvcc

diff --git a/Tools/hvcc b/Tools/hvcc
new file mode 160000
index 00000000..548f94c5
--- /dev/null
+++ b/Tools/hvcc
@@ -0,0 +1 @@
+Subproject commit 548f94c57617a51a2f4cd6bd1643f7291d61dc40

From 676334299b9cb0a5106975a4e2d67f10bf3aa885 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:25:57 +0200
Subject: [PATCH 303/374] rearranged check targets

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 05cfc2db..8e7276be 100644
--- a/Makefile
+++ b/Makefile
@@ -190,12 +190,12 @@ check: ## run test patches and unit tests
 		$(MAKE) -s TEST=$$nm test || exit;\
 	done
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/CppTest PATCHNAME=CppTest clean patch web run
-	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/HeavyTest HEAVY=HeavyTest clean patch web run
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/GenTest GEN=MIDItestMinMax clean patch web run
 	# @unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest FAUST=FaustTest clean patch web run # FAUST is not installed for CI
 	@cp FaustSource/*.h TestPatches/FaustTest && unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest PATCHNAME=Faust clean patch web run
 	# @unset PATCHNAME PATCHCLASS PATCHFILE SOULCLASS SOULFILE SOULHPP && $(MAKE) PATCHSOURCE=TestPatches/SoulTest SOUL=SineSynth clean patch web run # SOUL is not install for CI
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/SoulTest PATCHNAME=Soul clean patch web run
+	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/HeavyTest HEAVY=HeavyTest clean patch web run
 
 help: ## show this help
 	@echo 'Usage: make [target] ...'

From 86d6e4a6bb239b6cca21407a768a8cd0fc92b5c0 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:26:39 +0200
Subject: [PATCH 304/374] copy source to build directory

---
 faust.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/faust.mk b/faust.mk
index 7ae3aa71..99d23e88 100644
--- a/faust.mk
+++ b/faust.mk
@@ -11,7 +11,7 @@ faust: $(BUILD)/Source/FaustPatch.hpp
 
 $(BUILD)/Source/FaustPatch.hpp: $(PATCHSOURCE)/$(FAUST).dsp
 	@$(FAUSTCC) $(FAUSTFLAGS) -I $(PATCHSOURCE) -i -inpl -mem -a FaustSource/owl.cpp -fm faustmath.h $< $(FAUSTSOURCE)/owl.lib -o $@
-	@cp $(FAUSTSOURCE)/*.h $(PATCHSOURCE)
+	@cp $(FAUSTSOURCE)/*.h $(BUILD)/Source
 
 $(BUILD)/Source/%Patch.hpp: $(PATCHSOURCE)/%.dsp
 	@$(FAUSTCC) $(FAUSTFLAGS) -I $(PATCHSOURCE) -i -inpl -mem -a $(FAUSTSOURCE)/owl.cpp -fm faustmath.h $< -o $@

From 642ca6b9762ab8bbab46deb29676e7cb8963c282 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:27:07 +0200
Subject: [PATCH 305/374] fixed to use std::min

---
 GenSource/GenPatch.hpp | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/GenSource/GenPatch.hpp b/GenSource/GenPatch.hpp
index c49ca53d..807677d3 100644
--- a/GenSource/GenPatch.hpp
+++ b/GenSource/GenPatch.hpp
@@ -105,8 +105,8 @@ class GenParameter : public GenParameterBase {
 public:
   PatchParameterId pid;
   int8_t index;
-  float min = 0.0;
-  float max = 1.0;
+  float min = 0.0f;
+  float max = 1.0f;
   GenParameter(Patch* patch, CommonState *context, const char* name, PatchParameterId id, int8_t idx) : pid(id), index(idx) {
 #ifndef OWL_METADATA
     patch->registerParameter(id, name);
@@ -222,7 +222,7 @@ class GenPatch : public Patch {
     for(int ch=channels; ch 0)
       outputs = SimpleArray(new OutputParameter[nof_outs], nof_outs);

From 113801951787d532ba8ea3d326c62ef655cc7b42 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:27:25 +0200
Subject: [PATCH 306/374] fixed compilation warnings

---
 LibSource/ShortFastFourierTransform.cpp | 4 ++--
 LibSource/ShortFastFourierTransform.h   | 2 +-
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/LibSource/ShortFastFourierTransform.cpp b/LibSource/ShortFastFourierTransform.cpp
index b54a49c7..ecb317ac 100644
--- a/LibSource/ShortFastFourierTransform.cpp
+++ b/LibSource/ShortFastFourierTransform.cpp
@@ -34,7 +34,7 @@ void ShortFastFourierTransform::ifft(ComplexShortArray in, ShortArray out){
   arm_rfft_q15(&instance, (int16_t*)in.getData(), (int16_t*)out.getData());
 }
 
-int ShortFastFourierTransform::getSize(){
+size_t ShortFastFourierTransform::getSize(){
   return len;
 }
 
@@ -78,7 +78,7 @@ void ShortFastFourierTransform::ifft(ComplexShortArray input, ShortArray output)
   }
 }
     
-int ShortFastFourierTransform::getSize(){
+size_t ShortFastFourierTransform::getSize(){
   return temp.getSize();
 }
 
diff --git a/LibSource/ShortFastFourierTransform.h b/LibSource/ShortFastFourierTransform.h
index 228447df..bb42d302 100644
--- a/LibSource/ShortFastFourierTransform.h
+++ b/LibSource/ShortFastFourierTransform.h
@@ -73,7 +73,7 @@ class ShortFastFourierTransform {
    * Get the size of the FFT
    * @return The size of the FFT
   */
-  int getSize();
+  size_t getSize();
 };
 
 #endif // __ShortFastFourierTransform_h__

From 2200371ce21efa19050ada180cc5506f3a571c76 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:27:36 +0200
Subject: [PATCH 307/374] fixed compilation warnings

---
 Source/main.cpp | 1 -
 1 file changed, 1 deletion(-)

diff --git a/Source/main.cpp b/Source/main.cpp
index ededc307..80c379b2 100644
--- a/Source/main.cpp
+++ b/Source/main.cpp
@@ -35,7 +35,6 @@ int main(void){
   HeapRegion_t regions[5];
   if(pv->checksum >= PROGRAM_VECTOR_CHECKSUM_V13 && pv->heapLocations != NULL){
     int cnt = 0;
-    extern char _eprogram, _eram; // remaining program space
     MemorySegment* seg = pv->heapLocations;
     while(seg != NULL && seg->location != NULL && cnt < 5){
       regions[cnt++] = { seg->location, seg->size };

From fd7346ee59ae062508c8f9a243bbb8c72b97b3b4 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:40:12 +0200
Subject: [PATCH 308/374] added dummy genlib get/set state functions for native
 build

---
 GenSource/GenPatch.hpp |  1 +
 GenSource/genlib.cpp   | 13 +++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/GenSource/GenPatch.hpp b/GenSource/GenPatch.hpp
index 807677d3..b14e644e 100644
--- a/GenSource/GenPatch.hpp
+++ b/GenSource/GenPatch.hpp
@@ -3,6 +3,7 @@
 
 #include "Patch.h"
 #include "gen.h"
+#include "genlib.h"
 #include "PatchMetadata.h"
 
 #if __has_include("metadata.h")
diff --git a/GenSource/genlib.cpp b/GenSource/genlib.cpp
index 636ded71..c5ffd948 100644
--- a/GenSource/genlib.cpp
+++ b/GenSource/genlib.cpp
@@ -463,4 +463,17 @@ short genlib_setstate(CommonState *cself, const char *state, setparameter_method
 	
 	return 0;
 }
+#else
+short genlib_setstate(CommonState *cself, const char *state, setparameter_method setmethod)
+{
+  return 0;
+}
+short genlib_getstate(CommonState *cself, char *state, getparameter_method getmethod)
+{
+  return 0;
+}
+size_t genlib_getstatesize(CommonState *cself, getparameter_method getmethod)
+{
+  return 0;
+}
 #endif

From 6ac4d0159324fadcfe581a7c4d69d06755311d4e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:46:16 +0200
Subject: [PATCH 309/374] removed inconsistently used override declarations

---
 LibSource/AbstractSynth.h | 14 +++++++-------
 Source/MemoryBuffer.hpp   |  8 ++++----
 2 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/LibSource/AbstractSynth.h b/LibSource/AbstractSynth.h
index c1951bc0..f4cb2002 100644
--- a/LibSource/AbstractSynth.h
+++ b/LibSource/AbstractSynth.h
@@ -70,31 +70,31 @@ class AbstractSynth : public Synth, public MidiProcessor, public VelocityCurve {
     mod_range = range / 127.0f;
   }
   // MIDI handlers
-  virtual void noteOn(MidiMessage msg) override {
+  virtual void noteOn(MidiMessage msg) {
     setNote(msg.getNote());
     setFrequency(noteToFrequency(note+pb));
     setGain(velocityToGain(msg.getVelocity()));
     gate(true);
   }
-  virtual void noteOff(MidiMessage msg) override {
+  virtual void noteOff(MidiMessage msg) {
     gate(false);
   }
-  virtual void controlChange(MidiMessage msg) override {
+  virtual void controlChange(MidiMessage msg) {
     if(msg.getControllerNumber() == MIDI_CC_MODULATION)
       setModulation(msg.getControllerValue()/128.0f);
     else if(msg.getControllerNumber() == MIDI_ALL_NOTES_OFF)
       allNotesOff();
   }
-  virtual void channelPressure(MidiMessage msg) override {
+  virtual void channelPressure(MidiMessage msg) {
     setPressure(msg.getChannelPressure()/128.0f);
   }
-  virtual void polyKeyPressure(MidiMessage msg) override {
+  virtual void polyKeyPressure(MidiMessage msg) {
     setPressure(msg.getPolyKeyPressure()/128.0f);
   }
-  virtual void modulate(MidiMessage msg) override {
+  virtual void modulate(MidiMessage msg) {
     setModulation(mod_range * msg.getControllerValue());
   }
-  virtual void pitchbend(MidiMessage msg) override {
+  virtual void pitchbend(MidiMessage msg) {
     setPitchBend(pb_range * msg.getPitchBend());
   }
   virtual void allNotesOff(){
diff --git a/Source/MemoryBuffer.hpp b/Source/MemoryBuffer.hpp
index cdd7e3e0..c9c3c220 100644
--- a/Source/MemoryBuffer.hpp
+++ b/Source/MemoryBuffer.hpp
@@ -11,17 +11,17 @@ class MemoryBuffer : public AudioBuffer {
 public:
   MemoryBuffer(float* buf, size_t ch, size_t sz): buffer(buf), channels(ch), size(sz) {}
   virtual ~MemoryBuffer(){}
-  void clear() override {
+  void clear() {
     memset(buffer, 0, size*channels*sizeof(float));
   }
-  FloatArray getSamples(int channel) override {
+  FloatArray getSamples(int channel) {
     ASSERT((size_t)channel < channels, "Invalid channel");
     return FloatArray(buffer+channel*size, size);
   }
-  int getChannels() override {
+  int getChannels() {
     return channels;
   }
-  int getSize() override {
+  int getSize() {
     return size;
   }
 };

From 5074806f2238dbec8140f9266111db75991f4fd5 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 17:56:42 +0200
Subject: [PATCH 310/374] install hvcc requirements in make check

---
 Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/Makefile b/Makefile
index 8e7276be..c57c3698 100644
--- a/Makefile
+++ b/Makefile
@@ -193,9 +193,9 @@ check: ## run test patches and unit tests
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/GenTest GEN=MIDItestMinMax clean patch web run
 	# @unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest FAUST=FaustTest clean patch web run # FAUST is not installed for CI
 	@cp FaustSource/*.h TestPatches/FaustTest && unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest PATCHNAME=Faust clean patch web run
-	# @unset PATCHNAME PATCHCLASS PATCHFILE SOULCLASS SOULFILE SOULHPP && $(MAKE) PATCHSOURCE=TestPatches/SoulTest SOUL=SineSynth clean patch web run # SOUL is not install for CI
+	# @unset PATCHNAME PATCHCLASS PATCHFILE SOULCLASS SOULFILE SOULHPP && $(MAKE) PATCHSOURCE=TestPatches/SoulTest SOUL=SineSynth clean patch web run # SOUL is not installed for CI
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/SoulTest PATCHNAME=Soul clean patch web run
-	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/HeavyTest HEAVY=HeavyTest clean patch web run
+	@pip install -r Tools/hvcc/requirements.txt && unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/HeavyTest HEAVY=HeavyTest clean patch web run
 
 help: ## show this help
 	@echo 'Usage: make [target] ...'

From 9ab6b7383bdced6d856aa984420aa6675e3ebdfb Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 2 Nov 2021 11:06:28 +0100
Subject: [PATCH 311/374] updated HISTORY

---
 HISTORY.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index e6347512..c423ac37 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,5 @@
+* Block based SineOscillator::generate() with FM
+* Added test patches for automatic CI builds
 * Automatically add '>' to end of gen~ output parameters
 * Updated to use C++17
 * Use std::min/max/abs/clamp instead of macros for C++

From 95ed80beae0fb8e9cd53155733b3510b03c3d0dd Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 26 Oct 2021 23:50:37 +0200
Subject: [PATCH 312/374] fixed realloc

---
 LibSource/basicmaths.c | 35 +++++++++++++++++++++++++++++------
 Source/heap.h          |  1 +
 Source/heap_5.c        | 15 +++++++++++++++
 3 files changed, 45 insertions(+), 6 deletions(-)

diff --git a/LibSource/basicmaths.c b/LibSource/basicmaths.c
index 7600f2ae..359d373a 100644
--- a/LibSource/basicmaths.c
+++ b/LibSource/basicmaths.c
@@ -4,15 +4,38 @@
 #include "fastpow.h"
 #include "fastlog.h"
 
-void* pvPortRealloc(void *ptr, size_t size ){  
+/* The realloc() function changes the size of the memory block pointed  to */
+/* by ptr to size bytes.  The contents will be unchanged in the range from */
+/* the start of the region up to the minimum of the old and new sizes.  If */
+/* the  new size is larger than the old size, the added memory will not be */
+/* initialized.  If ptr is NULL, then  the  call  is  equivalent  to  mal‐ */
+/* loc(size), for all values of size; if size is equal to zero, and ptr is */
+/* not NULL, then the call is equivalent  to  free(ptr).   Unless  ptr  is */
+/* NULL,  it  must have been returned by an earlier call to malloc(), cal‐ */
+/* loc(), or realloc().  If the area pointed to was moved, a free(ptr)  is */
+/* done. */
+void* pvPortRealloc(void *ptr, size_t new_size) {
+  if(ptr == NULL) 
+    return pvPortMalloc(new_size);
+  size_t old_size = vPortGetSizeBlock(ptr);
+  if(new_size == 0){
+    vPortFree(ptr);
+    return NULL;
+  }
+  if(new_size <= old_size)
+    return ptr;
+  void* p = pvPortMalloc(new_size);
+  if(p == NULL)
+    return p;
+  memcpy(p, ptr, old_size);
   vPortFree(ptr);
-  ptr = pvPortMalloc(size);
-  if(ptr != NULL)
-    memset(ptr, 0, size);
-  return ptr;
+  return p;
 }
 
-void *pvPortCalloc(size_t nmemb, size_t size){
+/* The calloc() function allocates memory for an array of  nmemb  elements */
+/* of  size bytes each and returns a pointer to the allocated memory. */
+/* The memory is set to zero. */
+void *pvPortCalloc(size_t nmemb, size_t size){						  
   size_t xWantedSize = nmemb*size;
   void* ptr = pvPortMalloc(xWantedSize);
   if(ptr != NULL)
diff --git a/Source/heap.h b/Source/heap.h
index 47d62012..e812977b 100644
--- a/Source/heap.h
+++ b/Source/heap.h
@@ -27,6 +27,7 @@
    size_t xPortGetFreeHeapSize( void );
    size_t xPortGetMinimumEverFreeHeapSize( void );
    void vPortDefineHeapRegions( const HeapRegion_t * const pxHeapRegions );
+   int vPortGetSizeBlock (void *pv);
 
 #ifdef __cplusplus
 }
diff --git a/Source/heap_5.c b/Source/heap_5.c
index aee5dee9..e552db41 100644
--- a/Source/heap_5.c
+++ b/Source/heap_5.c
@@ -537,3 +537,18 @@ const HeapRegion_t *pxHeapRegion;
 	xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 );
 }
 
+/* 
+ * ref: https://sudonull.com/post/25551-We-embed-the-Lua-interpreter-in-the-project-for-the-microcontroller-stm32
+ */
+int vPortGetSizeBlock (void *pv) {
+    uint8_t *puc = (uint8_t *)pv;
+    BlockLink_t *pxLink;
+    if (pv != NULL) {
+        puc -= uxHeapStructSize;
+        pxLink = (BlockLink_t *)puc;
+        configASSERT((pxLink->xBlockSize & xBlockAllocatedBit) != 0);
+        configASSERT(pxLink->pxNextFreeBlock == NULL);
+        return pxLink->xBlockSize & ~xBlockAllocatedBit;
+    }
+    return 0;
+}

From b6e43fad75a7777cf74f4947ebfcf94a5bbc9e7a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 2 Nov 2021 12:03:43 +0100
Subject: [PATCH 313/374] updated HISTORY

---
 HISTORY.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/HISTORY.md b/HISTORY.md
index c423ac37..bb14723e 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,4 @@
+* Improved realloc implementation
 * Block based SineOscillator::generate() with FM
 * Added test patches for automatic CI builds
 * Automatically add '>' to end of gen~ output parameters

From 977989354586e6b433cbd6a04ec97972fe972405 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 2 Nov 2021 12:23:19 +0100
Subject: [PATCH 314/374] prevent using malloc/calloc/realloc/free macros for
 non-ARM Cortex builds

---
 LibSource/basicmaths.c | 2 ++
 LibSource/basicmaths.h | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/LibSource/basicmaths.c b/LibSource/basicmaths.c
index 359d373a..62bcd63e 100644
--- a/LibSource/basicmaths.c
+++ b/LibSource/basicmaths.c
@@ -4,6 +4,7 @@
 #include "fastpow.h"
 #include "fastlog.h"
 
+#ifdef ARM_CORTEX
 /* The realloc() function changes the size of the memory block pointed  to */
 /* by ptr to size bytes.  The contents will be unchanged in the range from */
 /* the start of the region up to the minimum of the old and new sizes.  If */
@@ -42,6 +43,7 @@ void *pvPortCalloc(size_t nmemb, size_t size){
     memset(ptr, 0, xWantedSize);
   return ptr;
 }
+#endif
 
 // todo: see
 // http://www.hxa.name/articles/content/fast-pow-adjustable_hxa7241_2007.html
diff --git a/LibSource/basicmaths.h b/LibSource/basicmaths.h
index c965d3c4..7b57881a 100644
--- a/LibSource/basicmaths.h
+++ b/LibSource/basicmaths.h
@@ -86,12 +86,14 @@ using std::clamp;
 
    float fast_fmodf(float x, float y);
 
+#ifdef ARM_CORTEX
 #define malloc(x) pvPortMalloc(x)
 #define calloc(x, y) pvPortCalloc(x, y)
 #define free(x) vPortFree(x)
 #define realloc(x, y) pvPortRealloc(x, y);
 void* pvPortCalloc(size_t nmemb, size_t size);
 void* pvPortRealloc(void *pv, size_t xWantedSize);
+#endif
 
 #ifdef __cplusplus
 }

From ef22cf5f339a3326e7547d27c463d3a1ccf8b4b0 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 12 Nov 2021 12:34:23 +0100
Subject: [PATCH 315/374] removed invalid @class and @method doxygen tags
 (closes #104)

---
 LibSource/FractionalCircularBuffer.h | 2 +-
 LibSource/MidiProcessor.h            | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/LibSource/FractionalCircularBuffer.h b/LibSource/FractionalCircularBuffer.h
index cb2864d1..335fb8f8 100644
--- a/LibSource/FractionalCircularBuffer.h
+++ b/LibSource/FractionalCircularBuffer.h
@@ -5,7 +5,7 @@
 
 /**
  * Circular buffer that keeps a delta table of differences for faster fractional delay lines.
- * Note that this class requires twice as much buffer space as @class CircularBuffer.
+ * Note that this class requires twice as much buffer space as CircularBuffer.
  */
 template
 class FractionalCircularBuffer {
diff --git a/LibSource/MidiProcessor.h b/LibSource/MidiProcessor.h
index 757db1ca..5c37139e 100644
--- a/LibSource/MidiProcessor.h
+++ b/LibSource/MidiProcessor.h
@@ -4,9 +4,9 @@
 #include "MidiMessage.h"
 
 /**
- * Base class for MIDI processors such as @class AbstractSynth.
+ * Base class for MIDI processors such as AbstractSynth.
  * Derived classes can overload the specific message handlers,
- * and/or the entry-point: @method process(MidiMessage msg)
+ * and/or the entry-point: process(MidiMessage msg)
  */
 class MidiProcessor {
 public:

From be9f5cf73059ec5882266ae79a6c0cb72e8306ce Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Thu, 18 Nov 2021 22:57:08 +0300
Subject: [PATCH 316/374] Add support for DaisySP in native builds

---
 native.mk | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/native.mk b/native.mk
index b4a3031f..6a766fa8 100644
--- a/native.mk
+++ b/native.mk
@@ -16,12 +16,23 @@ BUILDSOURCE  = $(BUILD)/Source
 TESTPATCHES  = $(BUILDROOT)/TestPatches
 DSPINC       = $(BUILDROOT)/Libraries/CMSIS/DSP/Include
 DSPLIB       = $(BUILDROOT)/Libraries/CMSIS/DSP/Source
+DAISYSP      = $(BUILDROOT)/Libraries/DaisySP/Source
 CPPFLAGS    += -I$(SOURCE)
 CPPFLAGS    += -I$(PATCHSOURCE)
 CPPFLAGS    += -I$(LIBSOURCE)
 CPPFLAGS    += -I$(BUILDSOURCE)
 CPPFLAGS    += -I$(TESTPATCHES)
 CPPFLAGS    += -I$(DSPINC)
+CPPFLAGS    += -I$(DAISYSP)
+CPPFLAGS    += -I$(DAISYSP)/Control
+CPPFLAGS    += -I$(DAISYSP)/Drums
+CPPFLAGS    += -I$(DAISYSP)/Dynamics
+CPPFLAGS    += -I$(DAISYSP)/Effects
+CPPFLAGS    += -I$(DAISYSP)/Filters
+CPPFLAGS    += -I$(DAISYSP)/Noise
+CPPFLAGS    += -I$(DAISYSP)/PhysicalModeling
+CPPFLAGS    += -I$(DAISYSP)/Synthesis
+CPPFLAGS    += -I$(DAISYSP)/Utility
 CPPFLAGS    += -ILibraries -ILibraries/KissFFT
 CPPFLAGS    += -D__PROGRAM_START=1 # prevent compilation of __cmsis_start function
 CPPFLAGS    += "-DPATCHNAME=\"$(PATCHNAME)\""
@@ -55,6 +66,7 @@ C_SRC   += $(wildcard $(BUILDSOURCE)/*.c)
 CPP_SRC += $(wildcard $(BUILDSOURCE)/*.cpp)
 C_SRC   += $(wildcard $(PATCHSOURCE)/*.c)
 CPP_SRC += $(wildcard $(PATCHSOURCE)/*.cpp)
+CPP_SRC += $(wildcard $(DAISYSP)/*/*.cpp)
 ifdef MAXIMILIAN
 CPP_SRC := $(filter-out $(PATCHSOURCE)/$(MAXIMILIAN).cpp, $(CPP_SRC))
 endif

From c86cae4b9406072639fa6152804b0a478392f353 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Thu, 18 Nov 2021 23:00:15 +0300
Subject: [PATCH 317/374] DaisySP updated

---
 Libraries/DaisySP | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Libraries/DaisySP b/Libraries/DaisySP
index 6f087512..99c66166 160000
--- a/Libraries/DaisySP
+++ b/Libraries/DaisySP
@@ -1 +1 @@
-Subproject commit 6f087512c791677b6525c1f9ed148a365613dc0b
+Subproject commit 99c66166bb59639898a8dde15423e5f1bda3a3bb

From d3aa267225b166e60655d698efb7cb4766dfcfed Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Thu, 18 Nov 2021 23:19:58 +0300
Subject: [PATCH 318/374] DaisySP test patch

---
 Makefile                                     |  1 +
 TestPatches/DaisySPTest/DaisySPTestPatch.hpp | 27 ++++++++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 TestPatches/DaisySPTest/DaisySPTestPatch.hpp

diff --git a/Makefile b/Makefile
index c57c3698..8d979355 100644
--- a/Makefile
+++ b/Makefile
@@ -190,6 +190,7 @@ check: ## run test patches and unit tests
 		$(MAKE) -s TEST=$$nm test || exit;\
 	done
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/CppTest PATCHNAME=CppTest clean patch web run
+	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/DaisySPTest PATCHNAME=DaisySPTest clean patch web run
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/GenTest GEN=MIDItestMinMax clean patch web run
 	# @unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest FAUST=FaustTest clean patch web run # FAUST is not installed for CI
 	@cp FaustSource/*.h TestPatches/FaustTest && unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/FaustTest PATCHNAME=Faust clean patch web run
diff --git a/TestPatches/DaisySPTest/DaisySPTestPatch.hpp b/TestPatches/DaisySPTest/DaisySPTestPatch.hpp
new file mode 100644
index 00000000..f20e9946
--- /dev/null
+++ b/TestPatches/DaisySPTest/DaisySPTestPatch.hpp
@@ -0,0 +1,27 @@
+#ifndef __DaisySPTestPatch_hpp__
+#define __DaisySPTestPatch_hpp__
+
+#include "OpenWareLibrary.h"
+#include "daisysp.h"
+
+class DaisySPTestPatch : public Patch {
+public:
+    daisysp::Oscillator* osc;
+
+    DaisySPTestPatch() {
+        osc = new daisysp::Oscillator();
+        osc->Init(getSampleRate());
+        osc->SetFreq(100);
+    }
+    ~DaisySPTestPatch() {
+        delete osc;
+    }
+    void processAudio(AudioBuffer& buffer) {
+        FloatArray chan = buffer.getSamples(0);
+        for (int i = 0; i < chan.getSize(); i++) {
+            chan[i] = osc->Process();
+        }
+    }
+};
+
+#endif // __DaisySPTestPatch_hpp__

From c358d1b0a2c9a8d0b480e0edd7a84f9b5ff66880 Mon Sep 17 00:00:00 2001
From: antisvin 
Date: Fri, 19 Nov 2021 20:00:26 +0300
Subject: [PATCH 319/374] Updated DaisySP resolves std::sin issue

---
 Libraries/DaisySP | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Libraries/DaisySP b/Libraries/DaisySP
index 99c66166..4263388e 160000
--- a/Libraries/DaisySP
+++ b/Libraries/DaisySP
@@ -1 +1 @@
-Subproject commit 99c66166bb59639898a8dde15423e5f1bda3a3bb
+Subproject commit 4263388e7fa8dfd34fa85c6a1c697362dc6981c7

From cd16fc11c005f7c457eadac94f234c1dd5392d67 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 8 Dec 2021 11:39:54 +0100
Subject: [PATCH 320/374] split out unit tests to separate 'tests' target

---
 Makefile | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 8d979355..49890508 100644
--- a/Makefile
+++ b/Makefile
@@ -185,10 +185,12 @@ run: $(DEPS) ## run patch natively
 grind: $(DEPS) ## run valgrind on patch natively
 	@$(MAKE) -s -f native.mk grind
 
-check: ## run test patches and unit tests
+tests: ## run all unit tests
 	@for nm in $(TESTS) ; do \
 		$(MAKE) -s TEST=$$nm test || exit;\
 	done
+
+check: tests ## run test patches and unit tests
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/CppTest PATCHNAME=CppTest clean patch web run
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/DaisySPTest PATCHNAME=DaisySPTest clean patch web run
 	@unset PATCHNAME PATCHCLASS PATCHFILE && $(MAKE) PATCHSOURCE=TestPatches/GenTest GEN=MIDItestMinMax clean patch web run

From 08df3fa092586ec74a3beccaf3de04357f65db78 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 8 Dec 2021 11:40:55 +0100
Subject: [PATCH 321/374] added BYPASS compilation option for testing

---
 Source/PatchProgram.cpp | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/Source/PatchProgram.cpp b/Source/PatchProgram.cpp
index 4cfff380..6ba80c50 100644
--- a/Source/PatchProgram.cpp
+++ b/Source/PatchProgram.cpp
@@ -101,9 +101,13 @@ void setup(ProgramVector* pv){
 void run(ProgramVector* pv){
   for(;;){
     pv->programReady();
+#ifdef BYPASS
+    memcpy(pv->audio_output, pv->audio_input, samples->getSize() * samples->getChannels() * sizeof(int32_t));
+#else
     samples->split(pv->audio_input);
     processor.setParameterValues(pv->parameters);
     processor.patch->processAudio(*samples);
     samples->comb(pv->audio_output);
+#endif
   }
 }

From c546bf5534950a45991a6defaed853d5c49a2ea7 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 9 Dec 2021 13:20:53 +0100
Subject: [PATCH 322/374] use SquareWaveOscillator instead of SquareOscillator

---
 LibSource/SquareOscillator.h | 60 ------------------------------------
 1 file changed, 60 deletions(-)
 delete mode 100644 LibSource/SquareOscillator.h

diff --git a/LibSource/SquareOscillator.h b/LibSource/SquareOscillator.h
deleted file mode 100644
index 482f0b20..00000000
--- a/LibSource/SquareOscillator.h
+++ /dev/null
@@ -1,60 +0,0 @@
-#ifndef __SquareOscillator_h
-#define __SquareOscillator_h
-
-#include "Oscillator.h"
-
-class SquareOscillator : public OscillatorTemplate {
-protected:
-  float pw = 0.5;
-public:
-  static constexpr float begin_phase = 0;
-  static constexpr float end_phase = 1;
-  /**
-   * Set pulse width to a value between 0 and 1
-   */
-  void setPulseWidth(float value){
-    pw = value;
-  }
-  float getSample(){
-    return phase < pw ? 1 : -1;
-  }
-};
-
-class InvertedSquareOscillator : public OscillatorTemplate {
-protected:
-  float pw = 0.5;
-public:
-  static constexpr float begin_phase = 0;
-  static constexpr float end_phase = 1;
-  /**
-   * Set pulse width to a value between 0 and 1
-   */
-  void setPulseWidth(float value){
-    pw = value;
-  }
-  float getSample(){
-    return phase < pw ? -1 : 1;
-  }
-};
-
-class AntialiasedSquareOscillator : public OscillatorTemplate {
-protected:
-  float pw = 0.5f;
-public:
-  static constexpr float begin_phase = 0;
-  static constexpr float end_phase = 1;
-  /**
-   * Set pulse width to a value between 0 and 1
-   */
-  void setPulseWidth(float value){
-    pw = value;
-  }
-  float getSample(){
-    float sample = phase < pw ? 1 : -1;
-    sample += polyblep(incr, phase);
-    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
-    return sample;
-  }
-};
-  
-#endif /* __SquareOscillator_h */

From 606dc7d380132ba9620a96becc3789ed62a3ba01 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 10 Dec 2021 12:14:54 +0100
Subject: [PATCH 323/374] added CircularBuffer::isFull() method and empty
 variable, to distinguish between empty and full buffer

---
 LibSource/CircularBuffer.h                   | 35 +++++++++++++++-----
 TestPatches/CircularFloatBufferTestPatch.hpp | 35 +++++++++++++++++++-
 2 files changed, 60 insertions(+), 10 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 219ccb9c..da799ce6 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -15,6 +15,7 @@ class CircularBuffer {
   size_t size;
   size_t writepos = 0;
   size_t readpos = 0;
+  bool empty = true;
 public:
   CircularBuffer(): data(NULL), size(0){}
   CircularBuffer(T* data, size_t size): data(data), size(size){}
@@ -22,6 +23,7 @@ class CircularBuffer {
   void setData(T* data, size_t len) {
     this->data = data;
     size = len;
+    empty;
   }
 
   size_t getSize() const {
@@ -33,20 +35,26 @@ class CircularBuffer {
   }
   
   bool isEmpty() const {
-    return writepos == readpos;
+    return empty;
+  }
+  
+  bool isFull() const {
+    return (writepos == readpos) && !empty;
   }
 
   void write(T c){
+    FLOW_ASSERT(getWriteCapacity() > 0, "overflow");
     data[writepos++] = c;
     if(writepos >= size)
       writepos = 0;
+    empty = false;
   }
 
   void write(T* source, size_t len){
     FLOW_ASSERT(getWriteCapacity() >= len, "overflow");
     T* dest = getWriteHead();
     size_t rem = size-writepos;
-    if(len > rem){
+    if(len >= rem){
       memcpy(dest, source, rem*sizeof(T));
       writepos = len-rem;
       memcpy(data, source+rem, writepos*sizeof(T));
@@ -54,6 +62,7 @@ class CircularBuffer {
       memcpy(dest, source, len*sizeof(T));
       writepos += len;
     }
+    empty = false;
   }
     
   void writeAt(size_t index, T value){
@@ -64,6 +73,7 @@ class CircularBuffer {
     data[writepos++] += c;
     if(writepos >= size)
       writepos = 0;
+    empty = false;
   }
 
   void overdubAt(size_t index, T value){
@@ -71,9 +81,11 @@ class CircularBuffer {
   }
 
   T read(){
+    FLOW_ASSERT(getReadCapacity() > 0, "underflow");
     T c = data[readpos++];
     if(readpos >= size)
       readpos = 0;
+    empty = readpos == writepos;
     return c;
   }
 
@@ -89,6 +101,7 @@ class CircularBuffer {
       memcpy(dst, src, len*sizeof(T));
       readpos += len;
     }
+    empty = readpos == writepos;
   }
   
   T readAt(size_t index){
@@ -111,6 +124,7 @@ class CircularBuffer {
 	return;
       }
     }
+    empty = readpos == writepos;
   }
 
   size_t getWriteIndex(){
@@ -128,6 +142,7 @@ class CircularBuffer {
   void moveWriteHead(int32_t samples){
     FLOW_ASSERT(getWriteCapacity() >= samples, "overflow");
     writepos = (writepos + samples) % size;
+    empty = false;
   }
 
   size_t getReadIndex(){
@@ -145,6 +160,7 @@ class CircularBuffer {
   void moveReadHead(int32_t samples){
     FLOW_ASSERT(getReadCapacity() < samples, "underflow");
     readpos = (readpos + samples) % size;
+    empty = readpos == writepos;
   }
 
   /**
@@ -157,7 +173,7 @@ class CircularBuffer {
   /**
    * Get the read index expressed as delay behind the write index.
    */
-  int getDelay(){
+  size_t getDelay() const {
     return (writepos-readpos+size) % size;
   }
 
@@ -170,22 +186,22 @@ class CircularBuffer {
     read(out, len);
   }
 
-  size_t getReadCapacity(){
-    return (writepos + size - readpos) % size;
+  size_t getReadCapacity() const {
+    return size - getWriteCapacity();
   }
 
-  size_t getWriteCapacity(){
-    return size - getReadCapacity();
+  size_t getWriteCapacity() const {
+    return size*empty + (readpos + size - writepos) % size;
   }
 
-  size_t getContiguousWriteCapacity(){
+  size_t getContiguousWriteCapacity() const {
     if(writepos < readpos)
       return readpos - writepos;
     else
       return size - writepos;
   }
 
-  size_t getContiguousReadCapacity(){
+  size_t getContiguousReadCapacity() const {
     if(writepos < readpos)
       return size - readpos;
     else
@@ -199,6 +215,7 @@ class CircularBuffer {
 
   void reset(){
     readpos = writepos = 0;
+    empty = true;
   }
 
   void clear(){
diff --git a/TestPatches/CircularFloatBufferTestPatch.hpp b/TestPatches/CircularFloatBufferTestPatch.hpp
index 69eff6b5..b20b4f77 100644
--- a/TestPatches/CircularFloatBufferTestPatch.hpp
+++ b/TestPatches/CircularFloatBufferTestPatch.hpp
@@ -25,12 +25,41 @@ class CircularFloatBufferTestPatch : public TestPatch {
     {
       TEST("create");
       CircularFloatBuffer* buffer = CircularFloatBuffer::create(512);
-      CHECK_EQUAL((int)buffer->getSize(), 512);
+      CHECK_EQUAL(buffer->getSize(), 512);
       REQUIRE(buffer->getReadHead() != NULL);
       for(size_t i=0; i<512; ++i)
 	CHECK_EQUAL(buffer->readAt(i), 0);
       CircularFloatBuffer::destroy(buffer);
     }
+    {
+      TEST("size/capacity/isEmpty/isFull");
+      const size_t size = 64;
+      float data[size];
+      CircularFloatBuffer* buffer = CircularFloatBuffer::create(size);
+      CHECK_EQUAL((int)buffer->getSize(), size);
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), size);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), 0);
+      CHECK(buffer->isEmpty());
+      CHECK(!buffer->isFull());
+      buffer->write(data, size/2);
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), size/2);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), size/2);
+      CHECK(!buffer->isEmpty());
+      CHECK(!buffer->isFull());
+      buffer->write(data, size/2);
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), 0);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), size);
+      CHECK(!buffer->isEmpty());
+      CHECK(buffer->isFull());
+      // buffer->read(data, size);
+      for(size_t j=0; jread();
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), size);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), 0);
+      CHECK(buffer->isEmpty());
+      CHECK(!buffer->isFull());
+      CircularFloatBuffer::destroy(buffer);
+    }
     {
       TEST("write/read");
       CircularFloatBuffer* buffer = CircularFloatBuffer::create(10);
@@ -39,6 +68,10 @@ class CircularFloatBufferTestPatch : public TestPatch {
       buffer->write(input, input.getSize());
       for(size_t j=0; j<5; ++j)
 	CHECK_CLOSE(buffer->read(), j, DEFAULT_TOLERANCE);
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), 10);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), 0);
+      CHECK(buffer->isEmpty());
+      CHECK(!buffer->isFull());
       CircularFloatBuffer::destroy(buffer);
       FloatArray::destroy(input);
     }

From 2fb2ca047b72e2a321201802b3c8f00b6d880c1c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 15 Dec 2021 14:17:54 +0100
Subject: [PATCH 324/374] write before read

---
 LibSource/DelayProcessor.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 9f3a540e..75767ecf 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -64,9 +64,9 @@ class FractionalDelayProcessor : public SignalProcessor {
     buffer.clear();
   }
   float process(float input){
-    float sample = buffer.readAt(buffer.getWriteIndex() - delay);
     buffer.write(input);
-    return sample;
+    buffer.setDelay(delay);
+    return buffer.read();
   }
   /**
    * Delay smoothly from the previous delay time to @param newDelay

From a1aa94886d146fe043f2d76bc89abb61c9864ecb Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 15 Dec 2021 14:18:22 +0100
Subject: [PATCH 325/374] ensure parent class writeAt and readAt are visible

---
 LibSource/InterpolatingCircularBuffer.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/LibSource/InterpolatingCircularBuffer.h b/LibSource/InterpolatingCircularBuffer.h
index aeadaf22..bbd0b329 100644
--- a/LibSource/InterpolatingCircularBuffer.h
+++ b/LibSource/InterpolatingCircularBuffer.h
@@ -12,6 +12,9 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
 public:
   InterpolatingCircularFloatBuffer() {}
   InterpolatingCircularFloatBuffer(float* data, size_t size): CircularFloatBuffer(data, size) {}
+  using CircularBuffer::writeAt;
+  using CircularBuffer::readAt;
+
   /**
    * Interpolated write at sub-sample index.
    * Inserts a value linearly interpolated at a fractional index.
@@ -39,6 +42,7 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
       pos += 1;
     }
     delay_samples = delay;
+    empty = readpos == writepos;
   }  
   
   /**
@@ -65,6 +69,7 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
       *out++ = readAt(pos);
       pos += incr;
     }
+    empty = readpos == writepos;
   }
   
   /**

From 43397151d124479753355e89d4a49d9cb5acb013 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 15 Dec 2021 17:31:58 +0100
Subject: [PATCH 326/374] more CircularBuffer tests

---
 TestPatches/CircularFloatBufferTestPatch.hpp  |   2 +
 ...FractionalCircularFloatBufferTestPatch.hpp |  45 +++---
 .../InterpolatingCircularBufferTestPatch.hpp  | 136 ++++++++++++++++++
 3 files changed, 164 insertions(+), 19 deletions(-)
 create mode 100644 TestPatches/InterpolatingCircularBufferTestPatch.hpp

diff --git a/TestPatches/CircularFloatBufferTestPatch.hpp b/TestPatches/CircularFloatBufferTestPatch.hpp
index b20b4f77..0eaa94f8 100644
--- a/TestPatches/CircularFloatBufferTestPatch.hpp
+++ b/TestPatches/CircularFloatBufferTestPatch.hpp
@@ -9,6 +9,8 @@ class CircularFloatBufferTestPatch : public TestPatch {
       TEST("Default ctor");
       CircularFloatBuffer empty;
       CHECK_EQUAL(empty.getSize(), 0);
+      CHECK(empty.isEmpty());
+      CHECK(!empty.isFull());
       CHECK(empty.getReadHead() == NULL);
       CHECK(empty.getWriteHead() == NULL);
     }
diff --git a/TestPatches/FractionalCircularFloatBufferTestPatch.hpp b/TestPatches/FractionalCircularFloatBufferTestPatch.hpp
index adeeeb71..1e781a22 100644
--- a/TestPatches/FractionalCircularFloatBufferTestPatch.hpp
+++ b/TestPatches/FractionalCircularFloatBufferTestPatch.hpp
@@ -9,6 +9,7 @@ class FractionalCircularFloatBufferTestPatch : public TestPatch {
       TEST("Default ctor");
       FractionalCircularFloatBuffer empty;
       CHECK_EQUAL(empty.getSize(), 0);
+      CHECK(empty.isEmpty());
       CHECK(empty.getReadHead() == NULL);
       CHECK(empty.getWriteHead() == NULL);
     }
@@ -54,25 +55,31 @@ class FractionalCircularFloatBufferTestPatch : public TestPatch {
       FractionalCircularFloatBuffer::destroy(buffer);
       FloatArray::destroy(input);
     }
-    // failing test
-    // {
-    //   TEST("delay");
-    //   FractionalCircularFloatBuffer* buffer = FractionalCircularFloatBuffer::create(60);
-    //   FloatArray input = FloatArray::create(20);
-    //   FloatArray output = FloatArray::create(20);
-    //   input.noise();
-    //   CHECK(!input.equals(output));
-    //   buffer->setDelay(5);
-    //   buffer->write(input, input.getSize());
-    //   buffer->read(output, output.getSize());
-    //   // buffer->delay(input, output, input.getSize(), 5);
-    //   for(size_t j=0; j<10; ++j)
-    // 	CHECK_CLOSE(input[j], output[j+5], DEFAULT_TOLERANCE);
-    //   // CHECK(input.subArray(0, 9).equals(output.subArray(10, 9)));
-    //   FractionalCircularFloatBuffer::destroy(buffer);
-    //   FloatArray::destroy(input);
-    //   FloatArray::destroy(output);
-    // }
+    {
+      TEST("fractional delay");
+      FractionalCircularFloatBuffer* buffer = FractionalCircularFloatBuffer::create(20);
+      FloatArray input = FloatArray::create(20);
+      FloatArray delay = FloatArray::create(20);
+      input.ramp(0, 20);
+      buffer->delay(input, delay, input.getSize(), 0.5); // delay by half a sample
+      for(int i=1; iwrite(input, input.getSize());
+      for(size_t j=0; j<5; ++j)
+	CHECK_CLOSE(buffer->readAt(j+0.5f), j+0.5f, DEFAULT_TOLERANCE);
+      FractionalCircularFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
   }
 };
 
diff --git a/TestPatches/InterpolatingCircularBufferTestPatch.hpp b/TestPatches/InterpolatingCircularBufferTestPatch.hpp
new file mode 100644
index 00000000..876d7724
--- /dev/null
+++ b/TestPatches/InterpolatingCircularBufferTestPatch.hpp
@@ -0,0 +1,136 @@
+#include "TestPatch.hpp"
+#include "InterpolatingCircularBuffer.h"
+#include 
+
+
+class InterpolatingCircularBufferTestPatch : public TestPatch {
+public:
+  typedef InterpolatingCircularFloatBuffer LinearFloatBuffer;
+  // typedef InterpolatingCircularFloatBuffer CosineFloatBuffer;
+  // typedef InterpolatingCircularFloatBuffer HermiteFloatBuffer;
+  
+  InterpolatingCircularBufferTestPatch(){
+    {
+      TEST("Default ctor");
+      LinearFloatBuffer empty;
+      CHECK_EQUAL(empty.getSize(), 0);
+      CHECK(empty.isEmpty());
+      CHECK(!empty.isFull());
+      CHECK(empty.getReadHead() == NULL);
+      CHECK(empty.getWriteHead() == NULL);
+    }
+    {
+      TEST("ctor");
+      const size_t size = 123;
+      float data[size];
+      LinearFloatBuffer* buffer = new LinearFloatBuffer(data, size);
+      CHECK_EQUAL(size, buffer->getSize());
+      CHECK(data == buffer->getReadHead());
+      CHECK(data == buffer->getWriteHead());
+      delete buffer;
+    }
+    {
+      TEST("create");
+      LinearFloatBuffer* buffer = LinearFloatBuffer::create(512);
+      CHECK_EQUAL(buffer->getSize(), 512);
+      REQUIRE(buffer->getReadHead() != NULL);
+      for(size_t i=0; i<512; ++i)
+	CHECK_EQUAL(buffer->readAt(i), 0);
+      LinearFloatBuffer::destroy(buffer);
+    }
+    {
+      TEST("size/capacity/isEmpty/isFull");
+      const size_t size = 64;
+      float data[size];
+      LinearFloatBuffer* buffer = LinearFloatBuffer::create(size);
+      CHECK_EQUAL((int)buffer->getSize(), size);
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), size);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), 0);
+      CHECK(buffer->isEmpty());
+      CHECK(!buffer->isFull());
+      buffer->write(data, size/2);
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), size/2);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), size/2);
+      CHECK(!buffer->isEmpty());
+      CHECK(!buffer->isFull());
+      buffer->write(data, size/2);
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), 0);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), size);
+      CHECK(!buffer->isEmpty());
+      CHECK(buffer->isFull());
+      // buffer->read(data, size);
+      for(size_t j=0; jread();
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), size);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), 0);
+      CHECK(buffer->isEmpty());
+      CHECK(!buffer->isFull());
+      LinearFloatBuffer::destroy(buffer);
+    }
+    {
+      TEST("write/read");
+      LinearFloatBuffer* buffer = LinearFloatBuffer::create(10);
+      FloatArray input = FloatArray::create(5);
+      input.ramp(0, 5);
+      buffer->write(input, input.getSize());
+      for(size_t j=0; j<5; ++j)
+	CHECK_CLOSE(buffer->read(), j, DEFAULT_TOLERANCE);
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), 10);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), 0);
+      CHECK(buffer->isEmpty());
+      CHECK(!buffer->isFull());
+      LinearFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
+    {
+      TEST("readAt");
+      LinearFloatBuffer* buffer = LinearFloatBuffer::create(7);
+      FloatArray input = FloatArray::create(5);
+      input.ramp(0, 5);
+      buffer->write(input, input.getSize());
+      for(size_t j=0; j<5; ++j)
+	CHECK_CLOSE(buffer->readAt(j), j, DEFAULT_TOLERANCE);
+      LinearFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
+    {
+      TEST("delay");
+      LinearFloatBuffer* buffer = LinearFloatBuffer::create(60);
+      FloatArray input = FloatArray::create(25);
+      FloatArray delay = FloatArray::create(25);
+      input.noise();
+      CHECK(!input.equals(delay));
+      buffer->delay(input, delay, input.getSize(), 10);
+      CHECK(input.subArray(0, 15).equals(delay.subArray(10, 15)));
+      LinearFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+      FloatArray::destroy(delay);
+    }
+    {
+      TEST("interpolated delay");
+      LinearFloatBuffer* buffer = LinearFloatBuffer::create(20);
+      FloatArray input = FloatArray::create(20);
+      FloatArray delay = FloatArray::create(20);
+      input.ramp(0, 20);
+      buffer->delay(input, delay, input.getSize(), 0.5); // delay by half a sample
+      for(int i=1; iwrite(input, input.getSize());
+      for(size_t j=0; j<5; ++j)
+	CHECK_CLOSE(buffer->readAt(j+0.5f), j+0.5f, DEFAULT_TOLERANCE);
+      LinearFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
+  }
+};
+

From be53c7d547bc85df7e74dd2d6e1a4aa25b5aab4d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 15 Dec 2021 17:32:40 +0100
Subject: [PATCH 327/374] updated comment

---
 LibSource/NoiseGenerator.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/NoiseGenerator.h b/LibSource/NoiseGenerator.h
index 561415f1..9b2eb4f3 100644
--- a/LibSource/NoiseGenerator.h
+++ b/LibSource/NoiseGenerator.h
@@ -7,7 +7,7 @@
 
 class WhiteNoiseGenerator : public SignalGenerator {
  public:
-  /* returns white noise in the range -0.5 to 0.5 */
+  /* returns white noise in the range -1 to 1 */
   virtual float generate(){
 #if 0 // #ifdef ARM_CORTEX
     // todo: fixme

From e99504a9db8a1473246d8350b96ef91ea3b9e673 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 16 Dec 2021 02:26:45 +0100
Subject: [PATCH 328/374] added AdjustableTapTempo::adjustSpeed

---
 LibSource/TapTempo.h | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/LibSource/TapTempo.h b/LibSource/TapTempo.h
index 77dbec2e..be0e2d32 100644
--- a/LibSource/TapTempo.h
+++ b/LibSource/TapTempo.h
@@ -101,6 +101,13 @@ class AdjustableTapTempo : public TapTempo {
   void resetAdjustment(uint16_t s){
     speed = s;
   }
+  /**
+   * Adjust the tap tempo period by a positive or negative amount.
+   * Useful value range (-1, 1).
+   */
+  void adjustSpeed(float s){
+    setSpeed((s+1)*2048);
+  }
   /**
    * Adjust the tap tempo period by a 12-bit value.
    * The difference between consecutive calls is used to 

From 6c5eccbf29fe254330a65be60356e6d2936c0918 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 16 Dec 2021 02:27:41 +0100
Subject: [PATCH 329/374] added InvertedRampOscillator and constructors

---
 LibSource/RampOscillator.h | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index f575d663..5e5e9462 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -10,11 +10,31 @@ class RampOscillator : public OscillatorTemplate {
 public:
   static constexpr float begin_phase = -1;
   static constexpr float end_phase = 1;
+  RampOscillator(){}
+  RampOscillator(float sr){
+    setSampleRate(sr);
+  }  
   float getSample(){
     return phase;
   }
 };
 
+/**
+ * Inverted ramp oscillator generates falling output values from 1 to -1.
+ */
+class InvertedRampOscillator : public OscillatorTemplate {
+public:
+  static constexpr float begin_phase = -1;
+  static constexpr float end_phase = 1;
+  InvertedRampOscillator(){}
+  InvertedRampOscillator(float sr){
+    setSampleRate(sr);
+  }  
+  float getSample(){
+    return -phase;
+  }
+};
+
 class AntialisedRampOscillator : public OscillatorTemplate {
 public:
   static constexpr float begin_phase = -1;

From 3f9469e896a1e8e76436f9500226903fae64cb5d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 16 Dec 2021 02:27:57 +0100
Subject: [PATCH 330/374] added constructors

---
 LibSource/SineOscillator.h       | 4 ++++
 LibSource/SquareWaveOscillator.h | 4 ++++
 LibSource/TriangleOscillator.h   | 4 ++++
 3 files changed, 12 insertions(+)

diff --git a/LibSource/SineOscillator.h b/LibSource/SineOscillator.h
index 71093359..96b9d832 100644
--- a/LibSource/SineOscillator.h
+++ b/LibSource/SineOscillator.h
@@ -7,6 +7,10 @@ class SineOscillator : public OscillatorTemplate {
 public:
   static constexpr float begin_phase = 0;
   static constexpr float end_phase = 2*M_PI;
+  SineOscillator(){}
+  SineOscillator(float sr){
+    setSampleRate(sr);
+  }  
   float getSample(){
     return sinf(phase);
   }
diff --git a/LibSource/SquareWaveOscillator.h b/LibSource/SquareWaveOscillator.h
index ae98d31c..b49c2547 100644
--- a/LibSource/SquareWaveOscillator.h
+++ b/LibSource/SquareWaveOscillator.h
@@ -9,6 +9,10 @@ class SquareWaveOscillator : public OscillatorTemplate {
 public:
   static constexpr float begin_phase = 0;
   static constexpr float end_phase = 1;
+  SquareWaveOscillator(){}
+  SquareWaveOscillator(float sr){
+    setSampleRate(sr);
+  }  
   /**
    * Set pulse width to a value between 0 and 1
    */
diff --git a/LibSource/TriangleOscillator.h b/LibSource/TriangleOscillator.h
index f54784fe..298cd968 100644
--- a/LibSource/TriangleOscillator.h
+++ b/LibSource/TriangleOscillator.h
@@ -7,6 +7,10 @@ class TriangleOscillator : public OscillatorTemplate {
 public:
   static constexpr float begin_phase = -1;
   static constexpr float end_phase = 1;
+  TriangleOscillator(){}
+  TriangleOscillator(float sr){
+    setSampleRate(sr);
+  }  
   float getSample(){
     return -2 * (fabsf(phase) - 0.5);
   }

From 6d7365059479d8c2e557f14efa1839dfd4bb53de Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 16 Dec 2021 02:30:01 +0100
Subject: [PATCH 331/374] added dummy SignalProcessor::process(float)
 definition

---
 LibSource/SignalProcessor.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/LibSource/SignalProcessor.h b/LibSource/SignalProcessor.h
index e3ecd540..441b6252 100644
--- a/LibSource/SignalProcessor.h
+++ b/LibSource/SignalProcessor.h
@@ -10,7 +10,9 @@
 class SignalProcessor {
 public:
   virtual ~SignalProcessor(){}
-  virtual float process(float input) = 0;
+  virtual float process(float input){
+    return input;
+  }
   virtual void process(FloatArray input, FloatArray output){
     for(size_t i=0; i
Date: Thu, 16 Dec 2021 02:30:52 +0100
Subject: [PATCH 332/374] added allpass and parallel low/band/high filtering

---
 LibSource/StateVariableFilter.h | 274 ++++++++++++++++++++------------
 1 file changed, 169 insertions(+), 105 deletions(-)

diff --git a/LibSource/StateVariableFilter.h b/LibSource/StateVariableFilter.h
index 14a01bf5..038e9f13 100644
--- a/LibSource/StateVariableFilter.h
+++ b/LibSource/StateVariableFilter.h
@@ -4,121 +4,115 @@
 #include "FloatArray.h"
 #include "SignalProcessor.h"
 
+#define SVF_COMPUTE_BOUNDED
+
 /**
  * State Variable Filter based on Andy Simper's code and analysis:
  * @ref http://www.cytomic.com/files/dsp/SvfLinearTrapOptimised2.pdf
+ * This is a so-called Zero Delay Feedback, trapezoidal integration filter
+ * and is suited to audio rate modulation of filter coefficients.
+ *
+ * Andy provides two versions of the algorithm: bounded form, and with unbounded 'g' term.
+ * Define SVF_COMPUTE_BOUNDED to use the bounded form (default).
  */
 class AbstractStateVariableFilter {
+protected:
+  float kvalue(float fc, float q){
+#ifdef SVF_COMPUTE_BOUNDED
+    const float g = tanf(pioversr*fc);
+#else
+    g = tanf(pioversr*fc);
+#endif
+    const float k = 1.0f / q;
+    a1 = 1.0f/(1.0f + g * (g + k));
+    a2 = g * a1;
+    a3 = g * a2;
+    return k;
+  }
 public:
   AbstractStateVariableFilter(float sr): pioversr(M_PI/sr) {}
 
+  void setCutoff(float fc, float q){
+    const float k = kvalue(fc, q);
+    m0 = k;
+  }
+
   void setLowPass(float fc, float q){
-    const float w = tanf(pioversr*fc);
-    const float g = w;
-    const float k = 1. / q;
-    m_a1 = 1./(1. + g * (g + k));
-    m_a2 = g * m_a1;
-    m_a3 = g * m_a2;
-    m_m0 = 0;
-    m_m1 = 0;
-    m_m2 = 1.;
+    kvalue(fc, q);
+    m0 = 0;
+    m1 = 0;
+    m2 = 1.0f;
   }
 
   void setHighPass(float fc, float q){
-    const float w = tanf(pioversr*fc);
-    const float g = w;
-    const float k = 1. / q;
-    m_a1 = 1./(1. + g * (g + k));
-    m_a2 = g * m_a1;
-    m_a3 = g * m_a2;
-    m_m0 = 1.;
-    m_m1 = -k;
-    m_m2 = -1.;
+    m0 = 1.0f;
+    m1 = -kvalue(fc, q);
+    m2 = -1.0f;
   }
 
   void setBandPass(float fc, float q){
-    const float w = tanf(pioversr*fc);
-    const float g = w;
-    const float k = 1. / q;
-    m_a1 = 1./(1. + g * (g + k));
-    m_a2 = g * m_a1;
-    m_a3 = g * m_a2;
-    m_m0 = 0.;
-    m_m1 = 1.;
-    m_m2 = 0.;
+    kvalue(fc, q);
+    m0 = 0.0f;
+    m1 = 1.0f;
+    m2 = 0.0f;
   }
 
   void setNotch(float fc, float q){
-    const float w = tanf(pioversr*fc);
-    const float g = w;
-    const float k = 1. / q;
-    m_a1 = 1./(1. + g * (g + k));
-    m_a2 = g * m_a1;
-    m_a3 = g * m_a2;
-    m_m0 = 1.;
-    m_m1 = -k;
-    m_m2 = 0.;
+    const float k = kvalue(fc, q);
+    m0 = 1.0f;
+    m1 = -k;
+    m2 = 0.0f;
   }
 
   void setPeak(float fc, float q){
-    const float w = tanf(pioversr*fc);
-    const float g = w;
-    const float k = 1. / q;
-    m_a1 = 1./(1. + g * (g + k));
-    m_a2 = g * m_a1;
-    m_a3 = g * m_a2;
-    m_m0 = 1.;
-    m_m1 = -k;
-    m_m2 = -2.;
+    const float k = kvalue(fc, q);
+    m0 = 1.0f;
+    m1 = -k;
+    m2 = -2.0f;
   }
   
   void setBell(float fc, float q, float gain){
-    const float w = tanf(pioversr*fc);
+    const float k = kvalue(fc, q);
     const float A = exp10f(gain/40.);
-    const float g = w;
-    const float k = 1 / q;
-    m_a1 = 1./(1. + g * (g + k));
-    m_a2 = g * m_a1;
-    m_a3 = g * m_a2;
-    m_m0 = 1.;
-    m_m1 = k * (A * A - 1.);
-    m_m2 = 0.;
+    m0 = 1.0f;
+    m1 = k * (A * A - 1.);
+    m2 = 0.0f;
   }
   
   void setLowShelf(float fc, float q, float gain){
-    const float w = tanf(pioversr*fc);
+    const float k = kvalue(fc, q);
     const float A = exp10f(gain/40.);
-    const float g = w / sqrtf(A);
-    const float k = 1. / q;
-    m_a1 = 1./(1. + g * (g + k));
-    m_a2 = g * m_a1;
-    m_a3 = g * m_a2;
-    m_m0 = 1.;
-    m_m1 = k * (A - 1.);
-    m_m2 = (A * A - 1.);
+    m0 = 1.0f;
+    m1 = k * (A - 1.0f);
+    m2 = (A * A - 1.0f);
   }
 
   void setHighShelf(float fc, float q, float gain){
-    const float w = tanf(pioversr*fc);
+    const float k = kvalue(fc, q);
     const float A = exp10f(gain/40.);
-    const float g = w / sqrtf(A);
-    const float k = 1. / q;
-    m_a1 = 1./(1. + g * (g + k));
-    m_a2 = g * m_a1;
-    m_a3 = g * m_a2;
-    m_m0 = A*A;
-    m_m1 = k*(1. - A)*A;
-    m_m2 = (1. - A*A);
+    m0 = A * A;
+    m1 = k * (1.0f - A) * A;
+    m2 = (1.0f - A * A);
+  }
+
+  void setAllPass(float fc, float q){
+    const float k = kvalue(fc, q);
+    m0 = 1.0f;
+    m1 = 2.0f * k;
+    m2 = 0.0f;
   }
 protected:
-  float pioversr;
+  const float pioversr;
   // coefficients
-  float m_a1 = 0.;
-  float m_a2 = 0.;
-  float m_a3 = 0.;
-  float m_m0 = 0.;
-  float m_m1 = 0.;
-  float m_m2 = 0.;
+#ifndef SVF_COMPUTE_BOUNDED
+  float g = 0.0f;
+#endif
+  float a1 = 0.0f;
+  float a2 = 0.0f;
+  float a3 = 0.0f;
+  float m0 = 0.0f;
+  float m1 = 0.0f;
+  float m2 = 0.0f;
 };
 
 class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor {
@@ -126,12 +120,17 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
   StateVariableFilter(float sr): AbstractStateVariableFilter(sr) {}
 
   float process(float v0){
-    float v3 = v0 - mIc2eq;
-    float v1 = m_a1 * mIc1eq + m_a2*v3;
-    float v2 = mIc2eq + m_a2 * mIc1eq + m_a3 * v3;
-    mIc1eq = 2. * v1 - mIc1eq;
-    mIc2eq = 2. * v2 - mIc2eq;
-    return m_m0 * v0 + m_m1 * v1 + m_m2 * v2;
+#ifdef SVF_COMPUTE_BOUNDED
+    float v3 = v0 - ic2eq;
+    float v1 = a1 * ic1eq + a2*v3;
+    float v2 = ic2eq + a2 * ic1eq + a3 * v3;
+#else
+    float v1 = a1 * ic1eq + a2 * (v0 - ic2eq);
+    float v2 = ic2eq + g * v1;
+#endif
+    ic1eq = 2. * v1 - ic1eq;
+    ic2eq = 2. * v2 - ic2eq;
+    return m0 * v0 + m1 * v1 + m2 * v2;
   }
 
   void process(FloatArray input, FloatArray output){
@@ -139,12 +138,17 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
     float v0, v1, v2, v3;
     for(size_t s = 0; s < nFrames; s++){
       v0 = input[s];
-      v3 = v0 - mIc2eq;
-      v1 = m_a1 * mIc1eq + m_a2*v3;
-      v2 = mIc2eq + m_a2 * mIc1eq + m_a3 * v3;
-      mIc1eq = 2. * v1 - mIc1eq;
-      mIc2eq = 2. * v2 - mIc2eq;
-      output[s] = m_m0 * v0 + m_m1 * v1 + m_m2 * v2;
+#ifdef SVF_COMPUTE_BOUNDED
+      v3 = v0 - ic2eq;
+      v1 = a1 * ic1eq + a2*v3;
+      v2 = ic2eq + a2 * ic1eq + a3 * v3;
+#else
+      v1 = a1 * ic1eq + a2 * (v0 - ic2eq);
+      v2 = ic2eq + g * v1;
+#endif
+      ic1eq = 2. * v1 - ic1eq;
+      ic2eq = 2. * v2 - ic2eq;
+      output[s] = m0 * v0 + m1 * v1 + m2 * v2;
     }
   }
 
@@ -169,9 +173,63 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
     }
   }
 
+  /**
+   * Simultaneously process lowpass, bandpass and highpass filtered output
+   */
+  void processLowBandHighPass(FloatArray in, float fc, float q, FloatArray low, FloatArray band, FloatArray high){
+    size_t nFrames = in.getSize();
+    float v0, v1, v2, v3;
+    setCutoff(fc, q);
+    for(size_t s = 0; s < nFrames; s++){
+      v0 = in[s];
+#ifdef SVF_COMPUTE_BOUNDED
+      v3 = v0 - ic2eq;
+      v1 = a1 * ic1eq + a2*v3;
+      v2 = ic2eq + a2 * ic1eq + a3 * v3;
+#else
+      v1 = a1 * ic1eq + a2 * (v0 - ic2eq);
+      v2 = ic2eq + g * v1;
+#endif
+      ic1eq = 2. * v1 - ic1eq;
+      ic2eq = 2. * v2 - ic2eq;
+      low[s] = v2;
+      band[s] = v1;
+      high[s] = v0 - m0*v1 - v2;
+      // notch = low + high = v0 - k*v1;
+      // peak = low - high = v0 - k*v1 - 2*v2;
+      // all = low + high - k*band = v0 - 2*k*v1;
+    }
+  }
+
+  void processLowBandHighPass(FloatArray in, FloatArray fc, float q,
+			      FloatArray low, FloatArray band, FloatArray high){
+    size_t nFrames = in.getSize();
+    float v0, v1, v2, v3;
+    for(size_t s = 0; s < nFrames; s++){
+      setCutoff(fc[s], q);
+      v0 = in[s];
+#ifdef SVF_COMPUTE_BOUNDED
+      v3 = v0 - ic2eq;
+      v1 = a1 * ic1eq + a2*v3;
+      v2 = ic2eq + a2 * ic1eq + a3 * v3;
+#else
+      v1 = a1 * ic1eq + a2 * (v0 - ic2eq);
+      v2 = ic2eq + g * v1;
+#endif
+      ic1eq = 2. * v1 - ic1eq;
+      ic2eq = 2. * v2 - ic2eq;
+      low[s] = v2;
+      band[s] = v1;
+      high[s] = v0 - m0*v1 - v2;
+      // notch = low + high = v0 - k*v1;
+      // peak = low - high = v0 - k*v1 - 2*v2;
+      // all = low + high - k*band = v0 - 2*k*v1;
+    }
+  }
+
   void reset() {
-    mIc1eq = 0.;
-    mIc2eq = 0.;
+    ic1eq = 0.0f;
+    ic2eq = 0.0f;
   }
 
   static StateVariableFilter* create(float sr){
@@ -184,10 +242,11 @@ class StateVariableFilter : public AbstractStateVariableFilter, SignalProcessor
   
 private:
   // state
-  float mIc1eq = 0.;
-  float mIc2eq = 0.;
+  float ic1eq = 0.0f;
+  float ic2eq = 0.0f;
 };
 
+
 class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignalProcessor {
 protected:
   size_t mChannels;
@@ -209,19 +268,24 @@ class MultiStateVariableFilter : public AbstractStateVariableFilter, MultiSignal
       FloatArray out = output.getSamples(ch);
       size_t nFrames = in.getSize();
       float v0, v1, v2, v3;
-      float mIc1eq = state[0];
-      float mIc2eq = state[1];
+      float ic1eq = state[0];
+      float ic2eq = state[1];
       for(size_t s = 0; s < nFrames; s++){
 	v0 = in[s];
-	v3 = v0 - mIc2eq;
-	v1 = m_a1 * mIc1eq + m_a2*v3;
-	v2 = mIc2eq + m_a2 * mIc1eq + m_a3 * v3;
-	mIc1eq = 2. * v1 - mIc1eq;
-	mIc2eq = 2. * v2 - mIc2eq;
-	out[s] = m_m0 * v0 + m_m1 * v1 + m_m2 * v2;
+#ifdef SVF_COMPUTE_BOUNDED
+	v3 = v0 - ic2eq;
+	v1 = a1 * ic1eq + a2*v3;
+	v2 = ic2eq + a2 * ic1eq + a3 * v3;
+#else
+	v1 = a1 * ic1eq + a2 * (v0 - ic2eq);
+	v2 = ic2eq + g * v1;
+#endif
+	ic1eq = 2. * v1 - ic1eq;
+	ic2eq = 2. * v2 - ic2eq;
+	out[s] = m0 * v0 + m1 * v1 + m2 * v2;
       }
-      state[0] = mIc1eq;
-      state[1] = mIc2eq;
+      state[0] = ic1eq;
+      state[1] = ic2eq;
       state += STATE_VARIABLES_PER_CHANNEL;
     }
   }

From ab8955634233c3b5844f363aee33abe9febdc055 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 16 Dec 2021 02:32:03 +0100
Subject: [PATCH 333/374] added dummy SignalGenerator::generate() definition

---
 LibSource/SignalGenerator.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/LibSource/SignalGenerator.h b/LibSource/SignalGenerator.h
index a23202da..a416d668 100644
--- a/LibSource/SignalGenerator.h
+++ b/LibSource/SignalGenerator.h
@@ -16,7 +16,9 @@ class SignalGenerator {
   /**
    * Produce the next consecutive sample.
    */
-  virtual float generate() = 0;
+  virtual float generate(){
+    return 0;
+  }
   /**
    * Produce a block of samples
    */

From 0d36399d541d077d5bc9aa4a25af8683b4478377 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 16 Dec 2021 02:38:17 +0100
Subject: [PATCH 334/374] fix typo

---
 LibSource/TapTempo.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/TapTempo.h b/LibSource/TapTempo.h
index be0e2d32..18e22377 100644
--- a/LibSource/TapTempo.h
+++ b/LibSource/TapTempo.h
@@ -106,7 +106,7 @@ class AdjustableTapTempo : public TapTempo {
    * Useful value range (-1, 1).
    */
   void adjustSpeed(float s){
-    setSpeed((s+1)*2048);
+    adjust((s+1)*2048);
   }
   /**
    * Adjust the tap tempo period by a 12-bit value.

From b9fdb3049f1c2c9d8948265653372784fd76654e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 16:16:34 +0100
Subject: [PATCH 335/374] use constexpr for common Q values

---
 LibSource/BiquadFilter.h | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 49dfa5eb..9d4bc508 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -9,9 +9,9 @@ class FilterStage {
 public:
   FloatArray coefficients;
   FloatArray state;
-  static const float BESSEL_Q;
-  static const float SALLEN_KEY_Q;
-  static const float BUTTERWORTH_Q;
+  static constexpr float BESSEL_Q = 0.57735026919f; // 1/sqrt(3)
+  static constexpr float SALLEN_KEY_Q = 0.5f; // 1/2
+  static constexpr float BUTTERWORTH_Q = 0.70710678118f; // 1/sqrt(2)
 
   FilterStage(FloatArray co, FloatArray st) : coefficients(co), state(st){}
 
@@ -463,8 +463,4 @@ class StereoBiquadFilter : public MultiBiquadFilter {
   }
 };
 
-const float FilterStage::BESSEL_Q = 1/sqrtf(3); // 1/sqrt(3)
-const float FilterStage::SALLEN_KEY_Q = 0.5f; // 1/2
-const float FilterStage::BUTTERWORTH_Q = 1/sqrtf(2); // 1/sqrt(2)
-
 #endif // __BiquadFilter_h__

From af5203dad6d31c1d25e51ababeda8404d112fbc2 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 16:18:36 +0100
Subject: [PATCH 336/374] added fractional rate read

---
 LibSource/InterpolatingCircularBuffer.h | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/LibSource/InterpolatingCircularBuffer.h b/LibSource/InterpolatingCircularBuffer.h
index bbd0b329..3c99285e 100644
--- a/LibSource/InterpolatingCircularBuffer.h
+++ b/LibSource/InterpolatingCircularBuffer.h
@@ -14,6 +14,7 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
   InterpolatingCircularFloatBuffer(float* data, size_t size): CircularFloatBuffer(data, size) {}
   using CircularBuffer::writeAt;
   using CircularBuffer::readAt;
+  using CircularBuffer::read;
 
   /**
    * Interpolated write at sub-sample index.
@@ -27,6 +28,20 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
    */
   float readAt(float index);
 
+  /**
+   * Interpolated read at fractional rate
+   * @param rate read speed, in samples/sample
+   */
+  void read(float* out, size_t len, float rate){
+    float pos = readpos; // quantizes fractional read pos from last read
+    while(len--){
+      *out++ = readAt(pos);
+      pos += rate;
+    }
+    readpos = ((size_t)pos + len) % size;
+    empty = readpos == writepos;
+  }
+
   float getFractionalDelay(){
     return delay_samples;
   }
@@ -42,7 +57,6 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
       pos += 1;
     }
     delay_samples = delay;
-    empty = readpos == writepos;
   }  
   
   /**
@@ -69,7 +83,6 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
       *out++ = readAt(pos);
       pos += incr;
     }
-    empty = readpos == writepos;
   }
   
   /**

From b581d8592c881df8f197663f449db07e1d1e332a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 16:28:26 +0100
Subject: [PATCH 337/374] rename T template parameter to DataType

---
 LibSource/CircularBuffer.h | 61 +++++++++++++++++++-------------------
 1 file changed, 30 insertions(+), 31 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index da799ce6..4734af95 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -8,29 +8,28 @@
 #define FLOW_ASSERT(x, y)
 #endif
 
-template
+template
 class CircularBuffer {
 protected:
-  T* data;
+  DataType* data;
   size_t size;
   size_t writepos = 0;
   size_t readpos = 0;
   bool empty = true;
 public:
   CircularBuffer(): data(NULL), size(0){}
-  CircularBuffer(T* data, size_t size): data(data), size(size){}
+  CircularBuffer(DataType* data, size_t size): data(data), size(size){}
 
-  void setData(T* data, size_t len) {
+  void setData(DataType* data, size_t len) {
     this->data = data;
     size = len;
-    empty;
   }
 
   size_t getSize() const {
     return size;
   }
 
-  T* getData() {
+  DataType* getData() {
     return data;
   }
   
@@ -42,7 +41,7 @@ class CircularBuffer {
     return (writepos == readpos) && !empty;
   }
 
-  void write(T c){
+  void write(DataType c){
     FLOW_ASSERT(getWriteCapacity() > 0, "overflow");
     data[writepos++] = c;
     if(writepos >= size)
@@ -50,66 +49,66 @@ class CircularBuffer {
     empty = false;
   }
 
-  void write(T* source, size_t len){
+  void write(DataType* source, size_t len){
     FLOW_ASSERT(getWriteCapacity() >= len, "overflow");
-    T* dest = getWriteHead();
+    DataType* dest = getWriteHead();
     size_t rem = size-writepos;
     if(len >= rem){
-      memcpy(dest, source, rem*sizeof(T));
+      memcpy(dest, source, rem*sizeof(DataType));
       writepos = len-rem;
-      memcpy(data, source+rem, writepos*sizeof(T));
+      memcpy(data, source+rem, writepos*sizeof(DataType));
     }else{
-      memcpy(dest, source, len*sizeof(T));
+      memcpy(dest, source, len*sizeof(DataType));
       writepos += len;
     }
     empty = false;
   }
     
-  void writeAt(size_t index, T value){
+  void writeAt(size_t index, DataType value){
     data[index % size] = value;
   }
 
-  void overdub(T c){
+  void overdub(DataType c){
     data[writepos++] += c;
     if(writepos >= size)
       writepos = 0;
     empty = false;
   }
 
-  void overdubAt(size_t index, T value){
+  void overdubAt(size_t index, DataType value){
     data[index % size] += value;
   }
 
-  T read(){
+  DataType read(){
     FLOW_ASSERT(getReadCapacity() > 0, "underflow");
-    T c = data[readpos++];
+    DataType c = data[readpos++];
     if(readpos >= size)
       readpos = 0;
     empty = readpos == writepos;
     return c;
   }
 
-  void read(T* dst, size_t len){
+  void read(DataType* dst, size_t len){
     FLOW_ASSERT(getReadCapacity() >= len, "underflow");
-    T* src = getReadHead();
+    DataType* src = getReadHead();
     size_t rem = size-readpos;
     if(len > rem){
-      memcpy(dst, src, rem*sizeof(T));
+      memcpy(dst, src, rem*sizeof(DataType));
       readpos = len-rem;
-      memcpy(dst+rem, data, readpos*sizeof(T));
+      memcpy(dst+rem, data, readpos*sizeof(DataType));
     }else{
-      memcpy(dst, src, len*sizeof(T));
+      memcpy(dst, src, len*sizeof(DataType));
       readpos += len;
     }
     empty = readpos == writepos;
   }
   
-  T readAt(size_t index){
+  DataType readAt(size_t index){
     return data[index % size];
   }
 
   void skipUntilLast(char c){
-    T* src = getReadHead();
+    DataType* src = getReadHead();
     size_t rem = size-readpos;
     for(int i=0; i* create(size_t len){
-    CircularBuffer* obj = new CircularBuffer(new T[len], len);
+  static CircularBuffer* create(size_t len){
+    CircularBuffer* obj = new CircularBuffer(new DataType[len], len);
     obj->clear();
     return obj;
   }
 
-  static void destroy(CircularBuffer* obj){
+  static void destroy(CircularBuffer* obj){
     delete[] obj->data;
     delete obj;
   }

From f71dd8006da21bd5d621a596918ba220b5369bf4 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 16:58:17 +0100
Subject: [PATCH 338/374] use fmodf instead of integer modulus %

---
 LibSource/InterpolatingCircularBuffer.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/LibSource/InterpolatingCircularBuffer.h b/LibSource/InterpolatingCircularBuffer.h
index 3c99285e..3bbd43fe 100644
--- a/LibSource/InterpolatingCircularBuffer.h
+++ b/LibSource/InterpolatingCircularBuffer.h
@@ -38,7 +38,7 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
       *out++ = readAt(pos);
       pos += rate;
     }
-    readpos = ((size_t)pos + len) % size;
+    readpos = fmodf(pos + size, size);
     empty = readpos == writepos;
   }
 

From eb6b1c9a3652a72fdc1eec8abe1c72c19b6f372e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 17:01:30 +0100
Subject: [PATCH 339/374] templated IndexType

---
 LibSource/CircularBuffer.h | 54 +++++++++++++++++++-------------------
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index 4734af95..ab0942eb 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -8,24 +8,24 @@
 #define FLOW_ASSERT(x, y)
 #endif
 
-template
+template
 class CircularBuffer {
 protected:
   DataType* data;
-  size_t size;
-  size_t writepos = 0;
-  size_t readpos = 0;
+  IndexType size;
+  IndexType writepos = 0;
+  IndexType readpos = 0;
   bool empty = true;
 public:
   CircularBuffer(): data(NULL), size(0){}
-  CircularBuffer(DataType* data, size_t size): data(data), size(size){}
+  CircularBuffer(DataType* data, IndexType size): data(data), size(size){}
 
-  void setData(DataType* data, size_t len) {
+  void setData(DataType* data, IndexType len) {
     this->data = data;
     size = len;
   }
 
-  size_t getSize() const {
+  IndexType getSize() const {
     return size;
   }
 
@@ -49,10 +49,10 @@ class CircularBuffer {
     empty = false;
   }
 
-  void write(DataType* source, size_t len){
+  void write(DataType* source, IndexType len){
     FLOW_ASSERT(getWriteCapacity() >= len, "overflow");
     DataType* dest = getWriteHead();
-    size_t rem = size-writepos;
+    IndexType rem = size-writepos;
     if(len >= rem){
       memcpy(dest, source, rem*sizeof(DataType));
       writepos = len-rem;
@@ -64,7 +64,7 @@ class CircularBuffer {
     empty = false;
   }
     
-  void writeAt(size_t index, DataType value){
+  void writeAt(IndexType index, DataType value){
     data[index % size] = value;
   }
 
@@ -75,7 +75,7 @@ class CircularBuffer {
     empty = false;
   }
 
-  void overdubAt(size_t index, DataType value){
+  void overdubAt(IndexType index, DataType value){
     data[index % size] += value;
   }
 
@@ -88,10 +88,10 @@ class CircularBuffer {
     return c;
   }
 
-  void read(DataType* dst, size_t len){
+  void read(DataType* dst, IndexType len){
     FLOW_ASSERT(getReadCapacity() >= len, "underflow");
     DataType* src = getReadHead();
-    size_t rem = size-readpos;
+    IndexType rem = size-readpos;
     if(len > rem){
       memcpy(dst, src, rem*sizeof(DataType));
       readpos = len-rem;
@@ -103,13 +103,13 @@ class CircularBuffer {
     empty = readpos == writepos;
   }
   
-  DataType readAt(size_t index){
+  DataType readAt(IndexType index){
     return data[index % size];
   }
 
   void skipUntilLast(char c){
     DataType* src = getReadHead();
-    size_t rem = size-readpos;
+    IndexType rem = size-readpos;
     for(int i=0; i* create(size_t len){
+  static CircularBuffer* create(IndexType len){
     CircularBuffer* obj = new CircularBuffer(new DataType[len], len);
     obj->clear();
     return obj;

From 010e1144a71aa8128896b5144a9f77b2f70463ee Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 17:02:10 +0100
Subject: [PATCH 340/374] removed override declarations (all or nothing)

---
 LibSource/Oscillator.h               |  4 ++--
 LibSource/QuadratureSineOscillator.h | 12 ++++++------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index 5b08b6bf..833b7d91 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -96,14 +96,14 @@ class OscillatorTemplate : public BaseOscillator {
   void reset(){
     phase = T::begin_phase;
   }
-  Sample generate() override {
+  Sample generate() {
     Sample sample = static_cast(this)->getSample();
     phase += incr;
     if(phase >= T::end_phase)
       phase -= (T::end_phase - T::begin_phase);
     return sample;
   }
-  Sample generate(float fm) override {
+  Sample generate(float fm) {
     Sample sample = static_cast(this)->getSample();
     // phase += incr * (1 + fm);
     phase += incr  + (T::end_phase - T::begin_phase)*fm;
diff --git a/LibSource/QuadratureSineOscillator.h b/LibSource/QuadratureSineOscillator.h
index 128c4011..3a52a0db 100644
--- a/LibSource/QuadratureSineOscillator.h
+++ b/LibSource/QuadratureSineOscillator.h
@@ -15,7 +15,7 @@ class QuadratureSineOscillator : public ComplexOscillatorTemplate
Date: Tue, 28 Dec 2021 17:02:37 +0100
Subject: [PATCH 341/374] prevent signed warnings

---
 LibSource/ShortFastFourierTransform.cpp | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/ShortFastFourierTransform.cpp b/LibSource/ShortFastFourierTransform.cpp
index ecb317ac..644a35c1 100644
--- a/LibSource/ShortFastFourierTransform.cpp
+++ b/LibSource/ShortFastFourierTransform.cpp
@@ -61,7 +61,7 @@ void ShortFastFourierTransform::init(int aSize){
 void ShortFastFourierTransform::fft(ShortArray input, ComplexShortArray output){
   ASSERT(input.getSize() >= getSize(), "Input array too small");
   ASSERT(output.getSize() >= getSize(), "Output array too small");
-  for(int n=0; n= getSize(), "Output array too small");
   kiss_fft(cfgifft, (kiss_fft_cpx*)(int16_t*)input.getData(), (kiss_fft_cpx*)(int16_t*)temp.getData());
   float scale=1.0f/getSize();
-  for(int n=0; n
Date: Tue, 28 Dec 2021 17:03:13 +0100
Subject: [PATCH 342/374] set min and max limit on TapTempo, updated
 AdjustableTapTempo

---
 LibSource/TapTempo.h | 74 ++++++++++++++++++++++++++++----------------
 1 file changed, 47 insertions(+), 27 deletions(-)

diff --git a/LibSource/TapTempo.h b/LibSource/TapTempo.h
index 18e22377..04542535 100644
--- a/LibSource/TapTempo.h
+++ b/LibSource/TapTempo.h
@@ -4,13 +4,17 @@
 class TapTempo {
 protected:
   const float sr;
-  const size_t limit;
+  const size_t min_limit;
+  const size_t max_limit;
   size_t samples;
   size_t trig;
   bool ison;
 public:
   TapTempo(float sr, size_t limit) : 
-    sr(sr), limit(limit), samples(limit/2), trig(limit), ison(false) {
+    sr(sr), min_limit(16), max_limit(limit), samples(limit/2), trig(limit), ison(false) {
+  }
+  TapTempo(float sr, size_t min, size_t max) : 
+    sr(sr), min_limit(min), max_limit(max), samples(max/2), trig(max), ison(false) {
   }
   bool isOn(){
     return ison;
@@ -20,7 +24,7 @@ class TapTempo {
   }
   void trigger(bool on, int delay){
     if(on && !ison){
-      if(trig < limit){
+      if(trig > min_limit && trig < max_limit){
 	samples = trig + delay;
       }
       trig = 0;
@@ -28,13 +32,13 @@ class TapTempo {
     ison = on;
   }
   void clock(){
-    if(trig < limit)
+    if(trig < min_limit)
       trig++;
   }
   void clock(size_t steps){
     trig += steps;
-    if(trig > limit)
-      trig = limit;
+    if(trig > max_limit)
+      trig = max_limit;
   }
   /**
    * Get tap tempo in BPM.
@@ -78,14 +82,20 @@ class TapTempo {
   static float frequencyToBpm(float freq){
     return freq*60;
   }
+  static float frequencyToSamplePeriod(float hz, float sr){
+    return sr/hz;
+  }
   static float bpmToSamplePeriod(float bpm, float sr){
     return sr/bpmToFrequency(bpm);
   }
   static float samplePeriodToBpm(float samples, float sr){
     return frequencyToBpm(sr/samples);
   }
-  static TapTempo* create(float sr, size_t limit){
-    return new TapTempo(sr, limit);
+  static TapTempo* create(float sr, size_t max_limit){
+    return new TapTempo(sr, max_limit);
+  }
+  static TapTempo* create(float sr, size_t min, size_t max){
+    return new TapTempo(sr, min, max);
   }
   static void destroy(TapTempo* obj){
     delete obj;
@@ -94,34 +104,44 @@ class TapTempo {
 
 class AdjustableTapTempo : public TapTempo {
 protected:
-  uint16_t speed;
+  float speed;
+  float range = 4;
+  float scale(float s){
+    // s = exp2f(range*s - range*0.5f);
+    return s*s;
+    return s;
+    // s = s*s*s*range;
+  }
 public:
-  AdjustableTapTempo(float sr, size_t limit) :
-    TapTempo(sr, limit), speed(2048) {}
-  void resetAdjustment(uint16_t s){
-    speed = s;
+  AdjustableTapTempo(float sr, size_t min, size_t max) :
+    TapTempo(sr, min, max), speed(scale(0.5f)) {}
+  void resetSpeed(float s){
+    speed = scale(s);
   }
-  /**
-   * Adjust the tap tempo period by a positive or negative amount.
-   * Useful value range (-1, 1).
-   */
-  void adjustSpeed(float s){
-    adjust((s+1)*2048);
+  void setRange(float value){
+    range = value*0.75f;
   }
   /**
-   * Adjust the tap tempo period by a 12-bit value.
-   * The difference between consecutive calls is used to 
-   * recalculate the current tempo.
+   * Adjust the tap tempo period.
+   * @param speed should be in the range [0, 1]
+   * which corresponds to the configured adjustable range:
+   * from bpm/(range/2) to bpm*(range/2)
+   * A value of 0.5 corresponds to unity.
    */
-  void adjust(uint16_t s){
-    if(abs(speed-s) > 16){
-      int64_t delta = (int64_t)samples*(speed-s)/2048;
-      samples = max(int64_t(1), int64_t(samples+delta));
+  void adjustSpeed(float s){
+    s = scale(s);
+    float mul = 1 + (speed - s)*range;
+    int32_t updated = clamp((size_t)(samples*mul), min_limit, max_limit);
+    if(abs((int32_t)samples - updated) > 16){
+      samples = updated;
       speed = s;
     }
   }
   static AdjustableTapTempo* create(float sr, size_t limit){
-    return new AdjustableTapTempo(sr, limit);
+    return new AdjustableTapTempo(sr, 16, limit);
+  }
+  static AdjustableTapTempo* create(float sr, size_t min, size_t max){
+    return new AdjustableTapTempo(sr, min, max);
   }
   static void destroy(AdjustableTapTempo* obj){
     delete obj;

From f7d11ccc821bdc70357531e270fc00baa6bb6f7a Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 17:04:23 +0100
Subject: [PATCH 343/374] updated HISTORY

---
 HISTORY.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index bb14723e..b23eb044 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,5 @@
+* Added InvertingRampOscillator
+* Added StateVariableFilter::setAllpass() and ::processLowMidHighBand()
 * Improved realloc implementation
 * Block based SineOscillator::generate() with FM
 * Added test patches for automatic CI builds

From 37f928d5863858c4bd3603e3e373a1a6edff9801 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 17:15:27 +0100
Subject: [PATCH 344/374] updated HISTORY

---
 HISTORY.md | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/HISTORY.md b/HISTORY.md
index b23eb044..6ba4690d 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,5 +1,7 @@
-* Added InvertingRampOscillator
-* Added StateVariableFilter::setAllpass() and ::processLowMidHighBand()
+* AdjustableTapTempo interface changes
+* CircularBuffer improvements, added isFull()
+* Added InvertedRampOscillator
+* Added StateVariableFilter::setAllpass() and processLowMidHighBand()
 * Improved realloc implementation
 * Block based SineOscillator::generate() with FM
 * Added test patches for automatic CI builds

From a4d2e61a22dc0d662d773d1a3cff69e8e9f749a8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 17:19:24 +0100
Subject: [PATCH 345/374] updated commented M7 flags

---
 compile.mk | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/compile.mk b/compile.mk
index d8b623d5..40a4c30d 100644
--- a/compile.mk
+++ b/compile.mk
@@ -55,8 +55,9 @@ endif
 endif
 ARCH_FLAGS = -fsingle-precision-constant -mthumb
 ARCH_FLAGS += -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
-# ARCH_FLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-sp-d16
+# ARCH_FLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16
 # ARCH_FLAGS += -mcpu=cortex-m0 -mfloat-abi=soft -msoft-float
+# ARCH_FLAGS += -march=armv7e-m+fpv5+fp.dp
 DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT=1 -D__FPU_USED=1U -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
 DEF_FLAGS += "-DPATCHNAME=\"$(PATCHNAME)\""
 # DEF_FLAGS = -DSTM32F745xx -DARM_MATH_CM7 -D__FPU_PRESENT=1 -D__FPU_USED=1U

From c748ef773ec66f25d52a4a9c915ba484d713177e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 17:19:38 +0100
Subject: [PATCH 346/374] removed redundant HEAVY variables

---
 heavy.mk | 2 --
 1 file changed, 2 deletions(-)

diff --git a/heavy.mk b/heavy.mk
index a1eb118d..5be25202 100644
--- a/heavy.mk
+++ b/heavy.mk
@@ -1,5 +1,3 @@
-HEAVYRELEASE ?= r2018.03
-# release version, see https://enzienaudio.com/a/releases
 HEAVYFILE    ?= $(HEAVY).pd
 HEAVYNAME    ?= owl
 HEAVYSRC     ?= $(BUILDROOT)/HeavySource

From 3e750754768daa7ad691d59c7be7aa52bee375db Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 18:45:23 +0100
Subject: [PATCH 347/374] documentation fixes

---
 LibSource/FloatArray.h               | 2 +-
 LibSource/FloatMatrix.h              | 2 +-
 LibSource/FractionalCircularBuffer.h | 2 +-
 LibSource/Resample.h                 | 2 +-
 LibSource/SimpleArray.h              | 4 ++--
 5 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/LibSource/FloatArray.h b/LibSource/FloatArray.h
index 65f13527..f3580b49 100644
--- a/LibSource/FloatArray.h
+++ b/LibSource/FloatArray.h
@@ -359,7 +359,7 @@ class FloatArray : public SimpleArray {
   FloatArray subArray(int offset, size_t length);
   /**
    * Create a linear ramp from one value to another.
-   * Interpolates all samples in the FloatArray between the endpoints @param from to @param to.
+   * Interpolates all samples in the FloatArray between the endpoints **from** to **to**.
    */
   void ramp(float from, float to);
 
diff --git a/LibSource/FloatMatrix.h b/LibSource/FloatMatrix.h
index 4a60fe33..312e23cc 100644
--- a/LibSource/FloatMatrix.h
+++ b/LibSource/FloatMatrix.h
@@ -142,7 +142,7 @@ class FloatMatrix {
 
     /**
    * Get a single float stored in the FloatMatrix.
-   * @return the float stored at index @param index
+   * @return the float stored at index **row** and **col**
   */
   float getElement(int row, int col){
     return getData()[row*getColumns()+col];
diff --git a/LibSource/FractionalCircularBuffer.h b/LibSource/FractionalCircularBuffer.h
index 335fb8f8..858462a2 100644
--- a/LibSource/FractionalCircularBuffer.h
+++ b/LibSource/FractionalCircularBuffer.h
@@ -173,7 +173,7 @@ class FractionalCircularBuffer {
   
   /**
    * Write to buffer and read with a delay that ramps up or down
-   * from @param beginDelay to @param endDelay
+   * from **beginDelay** to **endDelay**.
    */
   void delay(T* in, T* out, size_t len, float beginDelay, float endDelay){
     setDelay(beginDelay);
diff --git a/LibSource/Resample.h b/LibSource/Resample.h
index 0d8e7584..9deae606 100644
--- a/LibSource/Resample.h
+++ b/LibSource/Resample.h
@@ -96,7 +96,7 @@ class UpSampler : public SignalProcessor {
     return filter->process(input); // this doesn't really make sense
   }
   /**
-   * Up-sample param @input and put results into @param output. Note: in-place processing not supported
+   * Up-sample @param input and put results into @param output. Note: in-place processing not supported
    */
   void process(FloatArray input, FloatArray output){
     ASSERT(input.getSize()*factor==output.getSize(), "wrong size");
diff --git a/LibSource/SimpleArray.h b/LibSource/SimpleArray.h
index 0e626f1f..15fe8f27 100644
--- a/LibSource/SimpleArray.h
+++ b/LibSource/SimpleArray.h
@@ -102,11 +102,11 @@ class SimpleArray {
 
   /**
    * Copies the content of an array into a subset of the array.
-   * Copies **samples** elements starting from **sourceOffset** of **source** to **destinationOffset** in the current array.
+   * Copies **len** elements starting from **sourceOffset** of **source** to **destinationOffset** in the current array.
    * @param[in] source the source array
    * @param[in] sourceOffset the offset into the source array
    * @param[in] destinationOffset the offset into the destination array
-   * @param[in] samples the number of samples to copy
+   * @param[in] len the number of samples to copy
   */
   void insert(SimpleArray source, int sourceOffset, int destinationOffset, size_t len){
     ASSERT(size >= destinationOffset+len, "Array too small");

From 0c4ce771a001ce6aca757c2fd6449ae5566f2e5c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 18:48:05 +0100
Subject: [PATCH 348/374] added back deprecated SquareOscillator for backwards
 compatibility

---
 LibSource/SquareOscillator.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)
 create mode 100644 LibSource/SquareOscillator.h

diff --git a/LibSource/SquareOscillator.h b/LibSource/SquareOscillator.h
new file mode 100644
index 00000000..360561a4
--- /dev/null
+++ b/LibSource/SquareOscillator.h
@@ -0,0 +1,12 @@
+#ifndef __SquareOscillator_h
+#define __SquareOscillator_h
+
+#include "SquareWaveOscillator.h"
+
+#warning "SquareOscillator.h is deprecated, use SquareWaveOscillator.h instead"
+
+typedef SquareWaveOscillator SquareOscillator;
+typedef InvertedSquareWaveOscillator InvertedSquareOscillator;
+typedef AntialiasedSquareWaveOscillator AntialiasedSquareOscillator;
+
+#endif /* __SquareOscillator_h */

From 3e8da86138861bab727b0b5175f7afa1ab7b91d9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Tue, 28 Dec 2021 18:48:56 +0100
Subject: [PATCH 349/374] added fractional read rate test

---
 .../InterpolatingCircularBufferTestPatch.hpp  | 20 ++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/TestPatches/InterpolatingCircularBufferTestPatch.hpp b/TestPatches/InterpolatingCircularBufferTestPatch.hpp
index 876d7724..be478237 100644
--- a/TestPatches/InterpolatingCircularBufferTestPatch.hpp
+++ b/TestPatches/InterpolatingCircularBufferTestPatch.hpp
@@ -113,7 +113,7 @@ class InterpolatingCircularBufferTestPatch : public TestPatch {
       FloatArray delay = FloatArray::create(20);
       input.ramp(0, 20);
       buffer->delay(input, delay, input.getSize(), 0.5); // delay by half a sample
-      for(int i=1; iwrite(input, input.getSize());
+      buffer->read(output, output.getSize(), 0.5f);
+      for(size_t j=0; j<9; ++j) // not checking last value in loop
+	CHECK_CLOSE(output[j], j*0.5f, DEFAULT_TOLERANCE);
+      CHECK_CLOSE(output[9], 2.0f, DEFAULT_TOLERANCE); // interpolated between 4 and 0 (wrapping)
+      CHECK_EQUAL((int)buffer->getWriteCapacity(), 5);
+      CHECK_EQUAL((int)buffer->getReadCapacity(), 0);
+      CHECK(buffer->isEmpty());
+      CHECK(!buffer->isFull());
+      LinearFloatBuffer::destroy(buffer);
+      FloatArray::destroy(input);
+    }
   }
 };
 

From bd3040f5c60bf8c31dc804617b63cdebd66807bd Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 29 Dec 2021 22:08:50 +0100
Subject: [PATCH 350/374] align write/delay/read order with other delay
 processors, removed CrossFadingDelayProcessor::process(float), added docs.

---
 LibSource/DelayProcessor.h | 14 +++++---------
 1 file changed, 5 insertions(+), 9 deletions(-)

diff --git a/LibSource/DelayProcessor.h b/LibSource/DelayProcessor.h
index 75767ecf..fb36a611 100644
--- a/LibSource/DelayProcessor.h
+++ b/LibSource/DelayProcessor.h
@@ -64,8 +64,8 @@ class FractionalDelayProcessor : public SignalProcessor {
     buffer.clear();
   }
   float process(float input){
-    buffer.write(input);
     buffer.setDelay(delay);
+    buffer.write(input);
     return buffer.read();
   }
   /**
@@ -129,7 +129,10 @@ class FastFractionalDelayProcessor : public SignalProcessor {
 };
 
 /**
- * Delay line signal processor that crossfades to smooth changes in delay time.
+ * Delay line signal processor that crossfades to ensure smooth changes in delay time.
+ * Cross fade time in samples is equal to one block size.
+ * Delay time should be updated at block rate, before calling the block-based process() method.
+ * Sample based processing should not be used with this class.
  */
 class CrossFadingDelayProcessor : public SignalProcessor {
 protected:
@@ -147,13 +150,6 @@ class CrossFadingDelayProcessor : public SignalProcessor {
   void clear(){
     ringbuffer->clear();
   }
-  float process(float input){
-    ringbuffer->write(input);
-    float sample = ringbuffer->read();
-    ringbuffer->setDelay(delay);
-    sample += ringbuffer->read();
-    return sample*0.5;
-  }
   void process(FloatArray input, FloatArray output){
     ringbuffer->delay(input, output, input.getSize(), delay);
   }

From c6a8ff2e16891c416ac89f80bcc53411ae860b8e Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 29 Dec 2021 22:21:06 +0100
Subject: [PATCH 351/374] added MorphingOscillator

---
 LibSource/MorphingOscillator.h | 92 ++++++++++++++++++++++++++++++++++
 LibSource/OpenWareLibrary.h    |  1 +
 2 files changed, 93 insertions(+)
 create mode 100644 LibSource/MorphingOscillator.h

diff --git a/LibSource/MorphingOscillator.h b/LibSource/MorphingOscillator.h
new file mode 100644
index 00000000..2e72a577
--- /dev/null
+++ b/LibSource/MorphingOscillator.h
@@ -0,0 +1,92 @@
+#ifndef __MorphingOscillator_h
+#define __MorphingOscillator_h
+
+#include "Oscillator.h"
+
+/**
+ * The MorphingOscillator wraps a fixed number of Oscillators and crossfades 
+ * between their outputs.
+ * Only two oscillator outputs are computed at a time. When changing between
+ * crossfading oscillators, their phases are synchronised.
+ */
+class MorphingOscillator : public Oscillator {
+protected:
+  Oscillator** osc;
+  size_t osc_count;
+  Oscillator* lo = NULL;
+  Oscillator* hi = NULL;
+  float xf = 0;
+public:
+  MorphingOscillator(Oscillator** osc, size_t count)
+    : osc(osc), osc_count(count){}
+  void setFrequency(float value){
+    lo->setFrequency(value);
+    hi->setFrequency(value);
+  }
+  float getFrequency(){
+    return lo->getFrequency();
+  }
+  void setPhase(float value){
+    lo->setPhase(value);
+    hi->setPhase(value);
+  }
+  float getPhase(){
+    return lo->getPhase();
+  }
+  void reset(){
+    lo->reset();
+    hi->reset();
+  }
+  float generate(){
+    float l = lo->generate();
+    float h = hi->generate();
+    return l + (h - l) * xf;
+  }
+  float generate(float fm){
+    float l = lo->generate(fm);
+    float h = hi->generate(fm);
+    return l + (h - l) * xf;
+  }
+  using Oscillator::generate;
+  /**
+   * Morph between all configured oscillators.
+   * @param value a cross fade index between 0 and 1.
+   */
+  void morph(float value){
+    value *= osc_count - 1;
+    size_t idx = clamp((size_t)value, (size_t)0, osc_count - 2);
+    Oscillator* newlo = osc[idx];
+    Oscillator* newhi = osc[idx+1];
+    xf = value - idx;
+    if(lo != newlo){
+      newlo->setPhase(getPhase());
+      newlo->setFrequency(getFrequency());
+      lo = newlo;
+    }
+    if(hi != newhi){
+      newhi->setPhase(getPhase());
+      newhi->setFrequency(getFrequency());
+      hi = newhi;
+    }    
+  }
+  size_t getNumberOfOscillators(){
+    return osc_count;
+  }
+  Oscillator* getOscillator(size_t index){
+    return osc[index];
+  }
+  void setOscillator(size_t index, Oscillator* oscillator){
+    osc[index] = oscillator;
+    lo = hi;
+    hi = oscillator;
+  }
+  static MorphingOscillator* create(size_t oscillator_count){
+    return new MorphingOscillator(new Oscillator*[oscillator_count], oscillator_count);
+  }  
+  static void destroy(MorphingOscillator* obj){
+    delete[] obj->osc;
+    delete obj;
+  }
+};
+
+#endif /* __MorphingOscillator_h */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index a94871c1..495a406b 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -30,6 +30,7 @@
 #include "MidiProcessor.h"
 #include "MidiPolyphonicExpressionProcessor.h"
 #include "MidiStatus.h"
+#include "MorphingOscillator.h"
 #include "MonophonicProcessor.h"
 #include "NoiseGenerator.h"
 #include "OpenWareMidiControl.h"

From 590ad12f22b0008c7c59b449bf38075aa143f651 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 29 Dec 2021 22:21:09 +0100
Subject: [PATCH 352/374] fixed polyblep/antialiased oscillator issues

---
 LibSource/Oscillator.h           | 15 ++++++++-------
 LibSource/RampOscillator.h       |  8 +++++---
 LibSource/SquareWaveOscillator.h |  4 ++--
 LibSource/TapTempo.h             |  8 ++++++++
 LibSource/TriangleOscillator.h   | 19 +++++--------------
 5 files changed, 28 insertions(+), 26 deletions(-)

diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index 833b7d91..4c8cb024 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -121,20 +121,21 @@ class OscillatorTemplate : public BaseOscillator {
     delete osc;
   }
 protected:
+  /** 
+   * Calculate poly blep antialiasing compensation on normalised (to range [0, 1])
+   * phase and phase increment (angular rate) values.
+   */
   static float polyblep(float t, float dt){
     // PolyBLEP by various
     // http://research.spa.aalto.fi/publications/papers/smc2010-phaseshaping/
     // https://www.kvraudio.com/forum/viewtopic.php?t=375517
     // http://www.martin-finke.de/blog/articles/audio-plugins-018-polyblep-oscillator/
     // https://www.metafunction.co.uk/post/all-about-digital-oscillators-part-2-blits-bleps
-    // if t and dt are normalised before call then end/begin phase are not needed    
-    if(t < T::begin_phase + dt){
-      dt = dt / (T::end_phase - T::begin_phase); // normalise phase increment
-      t = (t - T::begin_phase) / dt; // distance from discontinuity
+    if(t < dt){
+      t /= dt;
       return t+t - t*t - 1;
-    }else if(t > T::end_phase - dt){
-      dt = dt / (T::end_phase - T::begin_phase); // normalise phase increment
-      t = (t - T::end_phase) / dt; // distance from discontinuity
+    }else if(t > 1 - dt){
+      t = (t - 1) / dt;
       return t*t + t+t + 1;
     }
     return 0;
diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 5e5e9462..60dabebb 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -35,12 +35,14 @@ class InvertedRampOscillator : public OscillatorTemplate
   }
 };
 
-class AntialisedRampOscillator : public OscillatorTemplate {
+class AntialiasedRampOscillator : public OscillatorTemplate {
 public:
-  static constexpr float begin_phase = -1;
+  static constexpr float begin_phase = 0;
   static constexpr float end_phase = 1;
   float getSample(){
-    return phase - polyblep(phase, incr);
+    float sample = 2*phase-1; // naive ramp
+    sample -= polyblep(phase, incr);
+    return sample;
   }
 };
   
diff --git a/LibSource/SquareWaveOscillator.h b/LibSource/SquareWaveOscillator.h
index b49c2547..9e6fc8b5 100644
--- a/LibSource/SquareWaveOscillator.h
+++ b/LibSource/SquareWaveOscillator.h
@@ -55,8 +55,8 @@ class AntialiasedSquareWaveOscillator : public OscillatorTemplate {
 
 class AntialiasedTriangleOscillator : public OscillatorTemplate {
 protected:
-  float pw = 0.5f;
   float previousSample = 0;
 public:
   static constexpr float begin_phase = 0;
   static constexpr float end_phase = 1;
-  /**
-   * Set pulse width to a value between 0 and 1
-   */
-  void setPulseWidth(float value){
-    pw = value;
-  }
   float getSample(){
-    float sample = phase < pw ? 1 : -1;
-    sample += polyblep(incr, phase);
-    sample -= polyblep(incr, fmod(phase + 1 + pw, 2));
+    float sample = phase < 0.5f ? 1 : -1; // naive square wave
+    sample += polyblep(phase, incr);
+    sample -= polyblep(fmod(phase + 0.5f, 1), incr); // polyblep square wave
     // Leaky integrator: y[n] = A * x[n] + (1 - A) * y[n-1] = A * (x[n] - y[n-1]) + y[n-1]
-    float lambda = incr;
-    // float lambda = incr*2*M_PI;
-    sample = lambda * sample + (1 - lambda) * previousSample;
-    // sample = lambda * (sample - previousSample) + previousSample;
+    float lambda = incr*2*M_PI;
+    sample = lambda * (sample - previousSample) + previousSample;
     previousSample = sample;
     return sample;
   }

From f3fa1f3ff8f97bc73fca7f8bcad904349035d725 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 29 Dec 2021 22:21:21 +0100
Subject: [PATCH 353/374] writing HISTORY

---
 HISTORY.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index 6ba4690d..0f1e42c6 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,5 @@
+* Fixed Antialiased oscillators (Triangle, SquareWave, Ramp)
+* Added MorphingOscillator
 * AdjustableTapTempo interface changes
 * CircularBuffer improvements, added isFull()
 * Added InvertedRampOscillator

From 3e5d28025a8addd1535a03476ec29d22fed4997d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 13:18:17 +0100
Subject: [PATCH 354/374] added block based
 AntialiasedRampOscillator::generate()

---
 LibSource/RampOscillator.h | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 60dabebb..9bb12b01 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -44,6 +44,35 @@ class AntialiasedRampOscillator : public OscillatorTemplate= 1){
+	// wrap phase
+	phase -= 1;
+	// correct current sample
+	float t = (phase - incr) / incr;
+	sample -= t*t + t+t + 1;
+	// correct next sample
+	t = phase / incr;
+	blep = t+t - t*t - 1;
+      }else{
+	blep = 0;
+      }
+      output[i] = sample;
+    }
+  }
+  using OscillatorTemplate::generate;  
 };
   
 #endif /* __RampOscillator_h */

From 1ebf181cbb8702394758b96ccc3397af31eab20f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 13:18:29 +0100
Subject: [PATCH 355/374] added allpass filter configuration

---
 LibSource/BiquadFilter.h | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 9d4bc508..97639617 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -27,6 +27,10 @@ class FilterStage {
     setBandPass(coefficients, fc*M_PI/sr, q);
   }
   
+  void setAllPass(float fc, float q, float sr){
+    setAllPass(coefficients, fc*M_PI/sr, q);
+  }
+  
   void setNotch(float fc, float q, float sr){
     setNotch(coefficients, fc*M_PI/sr, q);
   }
@@ -82,6 +86,16 @@ class FilterStage {
     coefficients[4] = - (1 - K / q + K * K) * norm;
   }
 
+  static void setAllPass(float* coefficients, float omega, float q){
+    float K = tanf(omega);
+    float norm = 1 / (1 + K / Q + K * K);
+    coefficients[0] = (1 - K / Q + K * K) * norm;
+    coefficients[1] = 2 * (K * K - 1) * norm;
+    coefficients[2] = 1;
+    coefficients[3] = coefficients[1];
+    coefficients[4] = coefficients[0];
+  }
+
   static void setNotch(float* coefficients, float omega, float q){
     float K = tanf(omega);
     float norm = 1 / (1 + K / q + K * K);
@@ -310,6 +324,13 @@ class BiquadFilter : public SignalProcessor {
     }
   }
 
+  void processAllPass(FloatArray in, FloatArray fc, float q, FloatArray out){
+    for(size_t i = 0; i < in.getSize(); i++){
+      setAllPass(fc[i], q);
+      out[i] = process(in[i]);
+    }
+  }
+
   /* process a single sample and return the result */
   float process(float input){
     float output;
@@ -332,6 +353,11 @@ class BiquadFilter : public SignalProcessor {
     copyCoefficients();
   }
 
+  void setAllPass(float fc, float q){
+    FilterStage::setAllPass(coefficients, fc*pioversr, q);
+    copyCoefficients();
+  }
+
   void setNotch(float fc, float q){
     FilterStage::setNotch(coefficients, fc*pioversr, q);
     copyCoefficients();

From 591b2bf086eb7e0f5e31ed7dc6be14bf48bb56d8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 13:25:29 +0100
Subject: [PATCH 356/374] fix typo

---
 LibSource/BiquadFilter.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 97639617..673fe99e 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -88,8 +88,8 @@ class FilterStage {
 
   static void setAllPass(float* coefficients, float omega, float q){
     float K = tanf(omega);
-    float norm = 1 / (1 + K / Q + K * K);
-    coefficients[0] = (1 - K / Q + K * K) * norm;
+    float norm = 1 / (1 + K / q + K * K);
+    coefficients[0] = (1 - K / q + K * K) * norm;
     coefficients[1] = 2 * (K * K - 1) * norm;
     coefficients[2] = 1;
     coefficients[3] = coefficients[1];

From 0b28617ec4ae250b43de4d07c28261a018e684ee Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 13:26:03 +0100
Subject: [PATCH 357/374] updated HISTORY

---
 HISTORY.md | 1 +
 1 file changed, 1 insertion(+)

diff --git a/HISTORY.md b/HISTORY.md
index 0f1e42c6..0426f96a 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,4 @@
+* Added Biquad allpass filter configuration
 * Fixed Antialiased oscillators (Triangle, SquareWave, Ramp)
 * Added MorphingOscillator
 * AdjustableTapTempo interface changes

From 883d32dba2af09956eafee3ded0df60835ce4737 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 13:58:17 +0100
Subject: [PATCH 358/374] added buffer and block based processing

---
 LibSource/MorphingOscillator.h | 26 +++++++++++++++++++++-----
 1 file changed, 21 insertions(+), 5 deletions(-)

diff --git a/LibSource/MorphingOscillator.h b/LibSource/MorphingOscillator.h
index 2e72a577..eab798c5 100644
--- a/LibSource/MorphingOscillator.h
+++ b/LibSource/MorphingOscillator.h
@@ -13,12 +13,13 @@ class MorphingOscillator : public Oscillator {
 protected:
   Oscillator** osc;
   size_t osc_count;
+  FloatArray buffer;
   Oscillator* lo = NULL;
   Oscillator* hi = NULL;
   float xf = 0;
 public:
-  MorphingOscillator(Oscillator** osc, size_t count)
-    : osc(osc), osc_count(count){}
+  MorphingOscillator(Oscillator** osc, size_t count, FloatArray buffer)
+    : osc(osc), osc_count(count), buffer(buffer){}
   void setFrequency(float value){
     lo->setFrequency(value);
     hi->setFrequency(value);
@@ -47,7 +48,20 @@ class MorphingOscillator : public Oscillator {
     float h = hi->generate(fm);
     return l + (h - l) * xf;
   }
-  using Oscillator::generate;
+ void generate(FloatArray output){
+   lo->generate(output);
+   output.multiply(1-xf);
+   hi->generate(buffer);
+   buffer.multiply(xf);
+   output.add(buffer);
+ }
+ void generate(FloatArray output, FloatArray fm){
+   lo->generate(output, fm);
+   output.multiply(1-xf);
+   hi->generate(buffer, fm);
+   buffer.multiply(xf);
+   output.add(buffer);
+ }
   /**
    * Morph between all configured oscillators.
    * @param value a cross fade index between 0 and 1.
@@ -80,10 +94,12 @@ class MorphingOscillator : public Oscillator {
     lo = hi;
     hi = oscillator;
   }
-  static MorphingOscillator* create(size_t oscillator_count){
-    return new MorphingOscillator(new Oscillator*[oscillator_count], oscillator_count);
+  static MorphingOscillator* create(size_t oscillator_count, size_t blocksize){
+    return new MorphingOscillator(new Oscillator*[oscillator_count], oscillator_count,
+				  FloatArray::create(blocksize));
   }  
   static void destroy(MorphingOscillator* obj){
+    FloatArray::destroy(obj->buffer);
     delete[] obj->osc;
     delete obj;
   }

From d5ed8c201ec5788d8782603ef95ceac947fb54f8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 14:18:02 +0100
Subject: [PATCH 359/374] added PhaseShiftOscillator template

---
 HISTORY.md             |  1 +
 LibSource/Oscillator.h | 31 ++++++++++++++++++++++++++++++-
 2 files changed, 31 insertions(+), 1 deletion(-)

diff --git a/HISTORY.md b/HISTORY.md
index 0426f96a..76397147 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,4 @@
+* Added PhaseShiftOscillator template
 * Added Biquad allpass filter configuration
 * Fixed Antialiased oscillators (Triangle, SquareWave, Ramp)
 * Added MorphingOscillator
diff --git a/LibSource/Oscillator.h b/LibSource/Oscillator.h
index 4c8cb024..65e08e91 100644
--- a/LibSource/Oscillator.h
+++ b/LibSource/Oscillator.h
@@ -134,7 +134,7 @@ class OscillatorTemplate : public BaseOscillator {
     if(t < dt){
       t /= dt;
       return t+t - t*t - 1;
-    }else if(t > 1 - dt){
+    }else if(t + dt > 1){
       t = (t - 1) / dt;
       return t*t + t+t + 1;
     }
@@ -142,4 +142,33 @@ class OscillatorTemplate : public BaseOscillator {
   }
 };
 
+template
+class PhaseShiftOscillator : public Osc {
+protected:
+  float phaseshift;
+public:
+  template 
+  PhaseShiftOscillator(float phaseshift, Args&&... args) :
+    Osc(std::forward(args)...), phaseshift(phaseshift) {}
+  void setPhase(float phase){
+    Osc::setPhase(phase +  phaseshift);
+  }
+  float getPhase(){
+    return Osc::getPhase() - phaseshift;
+  }
+  void reset(){
+    Osc::setPhase(phaseshift);
+  }
+  /**
+   * @param phaseshift oscillator phase shift in radians
+   */
+  template 
+  static PhaseShiftOscillator* create(float phaseshift, Args&&... args){
+    return new PhaseShiftOscillator(phaseshift, std::forward(args)...);
+  }    
+  static void destroy(PhaseShiftOscillator* obj){
+    Osc::destroy(obj);
+  }
+};
+
 #endif /* __Oscillator_h */

From d811ea46ef5d9195b4178139d7971a49e9913c9f Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 14:26:18 +0100
Subject: [PATCH 360/374] added NoiseOscillator class (whitenoise s+h)

---
 HISTORY.md                  |  3 +++
 LibSource/NoiseOscillator.h | 41 ++++++++++++++++++++++++++++++-------
 LibSource/OpenWareLibrary.h |  1 +
 3 files changed, 38 insertions(+), 7 deletions(-)

diff --git a/HISTORY.md b/HISTORY.md
index 76397147..c4370150 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,6 @@
+v22.2
+-----
+* Added NoiseOscillator (whitenoise s+h)
 * Added PhaseShiftOscillator template
 * Added Biquad allpass filter configuration
 * Fixed Antialiased oscillators (Triangle, SquareWave, Ramp)
diff --git a/LibSource/NoiseOscillator.h b/LibSource/NoiseOscillator.h
index adbdca6d..4fc9aa84 100644
--- a/LibSource/NoiseOscillator.h
+++ b/LibSource/NoiseOscillator.h
@@ -1,13 +1,40 @@
 #ifndef NOISE_OSCILLATOR_HPP
 #define NOISE_OSCILLATOR_HPP
 
-#include "NoiseGenerator.h"
+#include "Oscillator.h"
 
-#warning "NoiseOscillator.h is deprecated, use NoiseGenerator.h instead"
-
-typedef WhiteNoiseGenerator WhiteNoiseOscillator;
-typedef PinkNoiseGenerator PinkNoiseOscillator;
-typedef BrownNoiseGenerator BrownNoiseOscillator;
-typedef GaussianNoiseGenerator GaussianNoiseOscillator;
+/**
+ * The NoiseOscillator generates random values in the range [-1, 1] at
+ * a given frequency.
+ * It behaves like a white noise generator going into a sample and hold.
+ */
+class NoiseOscillator : public OscillatorTemplate {
+protected:
+  float sample = 0;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  NoiseOscillator(){}
+  NoiseOscillator(float sr){
+    setSampleRate(sr);
+  }  
+  float getSample(){
+    return sample;
+  }
+  float generate() {
+    phase += incr;
+    if(phase >= 1){
+      sample = randf()*2 - 1;
+      phase -= 1;
+    }
+    return sample;
+  }
+  using OscillatorTemplate::generate;  
+  void reset(){
+    sample = randf()*2 - 1;
+    phase = 0;
+  }
+  using SignalGenerator::generate;
+};
 
 #endif /* NOISE_OSCILLATOR_HPP */
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index 495a406b..be1e6fdc 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -33,6 +33,7 @@
 #include "MorphingOscillator.h"
 #include "MonophonicProcessor.h"
 #include "NoiseGenerator.h"
+#include "NoiseOscillator.h"
 #include "OpenWareMidiControl.h"
 #include "Oscillator.h"
 #include "Patch.h"

From 79eed7085efd5ca2ed617b082a84b0dfbe3a7c11 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 14:44:09 +0100
Subject: [PATCH 361/374] updated AntialiasedRampOscillator

---
 LibSource/RampOscillator.h | 23 ++++++++++++++++-------
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 9bb12b01..4164819d 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -36,9 +36,23 @@ class InvertedRampOscillator : public OscillatorTemplate
 };
 
 class AntialiasedRampOscillator : public OscillatorTemplate {
+protected:
+  float lastblep;
 public:
   static constexpr float begin_phase = 0;
   static constexpr float end_phase = 1;
+  AntialiasedRampOscillator(){}
+  AntialiasedRampOscillator(float sr){
+    setSampleRate(sr);
+  }  
+  void setPhase(float ph){
+    lastblep = 0;
+    OscillatorTemplate::setPhase(ph);
+  }
+  void reset(){
+    lastblep = 0;
+    OscillatorTemplate::reset();
+  }
   float getSample(){
     float sample = 2*phase-1; // naive ramp
     sample -= polyblep(phase, incr);
@@ -46,13 +60,7 @@ class AntialiasedRampOscillator : public OscillatorTemplate::generate;  
 };

From 8a1e48e672293b4db22205a1e9c1ac13d0737594 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Fri, 31 Dec 2021 17:47:55 +0100
Subject: [PATCH 362/374] added disclaimer

---
 LibSource/RampOscillator.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/LibSource/RampOscillator.h b/LibSource/RampOscillator.h
index 4164819d..6e3bf4e5 100644
--- a/LibSource/RampOscillator.h
+++ b/LibSource/RampOscillator.h
@@ -58,6 +58,10 @@ class AntialiasedRampOscillator : public OscillatorTemplate
Date: Thu, 13 Jan 2022 03:54:35 +0100
Subject: [PATCH 363/374] added PLATFORM=OWL1/2/3 makefile option with
 alternative link files

---
 Source/owl1.ld | 160 +++++++++++++++++++++++++++++++++++++++++++++++++
 Source/owl2.ld | 159 ++++++++++++++++++++++++++++++++++++++++++++++++
 Source/owl3.ld | 160 +++++++++++++++++++++++++++++++++++++++++++++++++
 compile.mk     |  32 +++++++---
 4 files changed, 504 insertions(+), 7 deletions(-)
 create mode 100644 Source/owl1.ld
 create mode 100644 Source/owl2.ld
 create mode 100644 Source/owl3.ld

diff --git a/Source/owl1.ld b/Source/owl1.ld
new file mode 100644
index 00000000..1173b905
--- /dev/null
+++ b/Source/owl1.ld
@@ -0,0 +1,160 @@
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size  = 0x000; /* required amount of heap  */
+_Min_Stack_Size = 0x800; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+  CCMHEAP (rw)     : ORIGIN = 0x10004000, LENGTH = 32K
+  PATCHRAM (rwx)   : ORIGIN = 0x2000c000, LENGTH = 64K    /* total RAM is 112kb */
+  EXTRAM (rx)      : ORIGIN = 0x68000000, LENGTH = 1M
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .program_header :
+  {
+    . = ALIGN(8);
+    _startprog = ABSOLUTE(.);         /* define a global symbol at program start */
+    KEEP(*(.program_header)) /* Startup code */
+    . = ALIGN(8);
+  } >PATCHRAM /* AT>PATCHFLASH */
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(8);
+    _text_start = .;
+    *(.text.Reset_Handler)
+    *(.text.startup)
+    *(.main*)
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+	*(.eh_frame)
+    . = ALIGN(8);
+    /* These are for static constructors and destructors under ELF */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(8);
+    _etext = .;        /* define a global symbol at end of code */
+    _text_end = .;
+  } >PATCHRAM /* AT>PATCHFLASH */
+
+  _text_load = LOADADDR (.text);
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >PATCHRAM /* AT>PATCHFLASH */
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >PATCHRAM /* AT>PATCHFLASH */
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >PATCHRAM /* AT>PATCHFLASH */
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >PATCHRAM /* AT>PATCHFLASH */
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(.fini_array*))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >PATCHRAM /* AT>PATCHFLASH */
+
+  /* used by the startup to initialize data */
+  _sidata = .;
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : AT ( _sidata )
+  {
+    . = ALIGN(8);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    . = ALIGN(8);
+    _edata = .;        /* define a global symbol at data end */
+  } >PATCHRAM
+
+  /* Uninitialized data section */
+  . = ALIGN(8);
+  .bss :
+  {
+    _endprog = ABSOLUTE(.);         /* define a global symbol at program end */
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(8);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >PATCHRAM
+
+  .pv (NOLOAD) :
+  {
+    . = ALIGN(8);
+    _programvector = ABSOLUTE(.);
+      *(.pv)
+    . = ALIGN(8);
+    PROVIDE ( _eprogram = . );
+    PROVIDE ( _stack = . );
+  } >PATCHRAM
+  _eram = ORIGIN(PATCHRAM) + 80k;    /* Limit to 80k for OwlWare compatiblity */
+  _estack = ORIGIN(PATCHRAM) + 80k;
+
+  .fastheap (NOLOAD) :
+  {
+    . = ALIGN(8);
+    PROVIDE ( _fastheap = . );
+    . = ALIGN(8);
+  } >CCMHEAP
+  _fasteheap = ORIGIN(CCMHEAP) + LENGTH(CCMHEAP);
+
+  /* External SRAM, used for heap memory */
+  .extdata (NOLOAD) :
+  {
+    . = ALIGN(8);
+    *(.extdata)
+    . = ALIGN(8);
+    PROVIDE ( _heap = . );
+    . = . + _Min_Heap_Size;
+  } >EXTRAM
+  _eheap = ORIGIN(EXTRAM) + LENGTH(EXTRAM);
+
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Source/owl2.ld b/Source/owl2.ld
new file mode 100644
index 00000000..10001c18
--- /dev/null
+++ b/Source/owl2.ld
@@ -0,0 +1,159 @@
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size  = 0x000; /* required amount of heap  */
+
+/* Specify the memory areas */
+MEMORY
+{
+  CCMHEAP (rw)     : ORIGIN = 0x10004000, LENGTH = 32K
+  PATCHRAM (rwx)   : ORIGIN = 0x2000c000, LENGTH = 144K   /* total RAM is 192kb */
+  EXTRAM (rx)      : ORIGIN = 0x68000000, LENGTH = 8M
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into PATCHRAM */
+  .program_header :
+  {
+    . = ALIGN(8);
+    _startprog = ABSOLUTE(.);         /* define a global symbol at program start */
+    KEEP(*(.program_header)) /* Startup code */
+    . = ALIGN(8);
+  } >PATCHRAM /* AT>PATCHFLASH */
+
+  /* The program code and other data goes into PATCHRAM */
+  .text :
+  {
+    . = ALIGN(8);
+    _text_start = .;
+    *(.text.Reset_Handler)
+    *(.text.startup)
+    *(.main*)
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+	*(.eh_frame)
+    . = ALIGN(8);
+    /* These are for static constructors and destructors under ELF */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(8);
+    _etext = .;        /* define a global symbol at end of code */
+    _text_end = .;
+  } >PATCHRAM
+
+  _text_load = LOADADDR (.text);
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >PATCHRAM
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >PATCHRAM
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >PATCHRAM
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >PATCHRAM
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(.fini_array*))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >PATCHRAM
+
+  /* used by the startup to initialize data */
+  _sidata = .;
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : AT ( _sidata )
+  {
+    . = ALIGN(8);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    . = ALIGN(8);
+    _edata = .;        /* define a global symbol at data end */
+  } >PATCHRAM
+
+  /* Uninitialized data section */
+  . = ALIGN(8);
+  .bss :
+  {
+    _endprog = ABSOLUTE(.);         /* define a global symbol at program end */
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(8);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >PATCHRAM
+
+  .pv (NOLOAD) :
+  {
+    . = ALIGN(8);
+    _programvector = ABSOLUTE(.);
+      *(.pv)
+    . = ALIGN(8);
+    PROVIDE ( _eprogram = . );
+    PROVIDE ( _stack = . );
+  } >PATCHRAM
+  _eram = ORIGIN(PATCHRAM) + 80k;    /* Limit to 80k for OwlWare compatiblity */
+  _estack = ORIGIN(PATCHRAM) + 80k;
+
+  .fastheap (NOLOAD) :
+  {
+    . = ALIGN(8);
+    PROVIDE ( _fastheap = . );
+    . = ALIGN(8);
+  } >CCMHEAP
+  _fasteheap = ORIGIN(CCMHEAP) + LENGTH(CCMHEAP);
+
+  /* External SRAM, used for heap memory */
+  .extdata (NOLOAD) :
+  {
+    . = ALIGN(8);
+    *(.extdata)
+    . = ALIGN(8);
+    PROVIDE ( _heap = . );
+    . = . + _Min_Heap_Size;
+  } >EXTRAM
+  _eheap = ORIGIN(EXTRAM) + LENGTH(EXTRAM);
+
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/Source/owl3.ld b/Source/owl3.ld
new file mode 100644
index 00000000..98f218eb
--- /dev/null
+++ b/Source/owl3.ld
@@ -0,0 +1,160 @@
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size  = 0x000; /* required amount of heap  */
+_Min_Stack_Size = 0x800; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+  CCMHEAP (rwx)   : ORIGIN = 0x2000c000, LENGTH = 80K
+  PATCHRAM  (xrw) : ORIGIN = 0x24000000, LENGTH = 512K
+  EXTRAM  (rwx)   : ORIGIN = 0xD0000000, LENGTH = 8M
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into PATCHRAM */
+  .program_header :
+  {
+    . = ALIGN(8);
+    _startprog = ABSOLUTE(.);         /* define a global symbol at program start */
+    KEEP(*(.program_header)) /* Startup code */
+    . = ALIGN(8);
+  } >PATCHRAM
+
+  /* The program code and other data goes into PATCHRAM */
+  .text :
+  {
+    . = ALIGN(8);
+    _text_start = .;
+    *(.text.Reset_Handler)
+    *(.text.startup)
+    *(.main*)
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+	*(.eh_frame)
+    . = ALIGN(8);
+    /* These are for static constructors and destructors under ELF */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*crtend.o(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*crtend.o(.dtors))
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(8);
+    _etext = .;        /* define a global symbol at end of code */
+    _text_end = .;
+  } >PATCHRAM
+
+  _text_load = LOADADDR (.text);
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >PATCHRAM
+  .ARM : {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } >PATCHRAM
+
+  .preinit_array     :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >PATCHRAM
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >PATCHRAM
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(.fini_array*))
+    KEEP (*(SORT(.fini_array.*)))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >PATCHRAM
+
+  /* used by the startup to initialize data */
+  _sidata = .;
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : AT ( _sidata )
+  {
+    . = ALIGN(8);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    . = ALIGN(8);
+    _edata = .;        /* define a global symbol at data end */
+  } >PATCHRAM
+
+  /* Uninitialized data section */
+  . = ALIGN(8);
+  .bss :
+  {
+    _endprog = ABSOLUTE(.);         /* define a global symbol at program end */
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(8);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >PATCHRAM
+
+  .pv (NOLOAD) :
+  {
+    . = ALIGN(8);
+    _programvector = ABSOLUTE(.);
+      *(.pv)
+    . = ALIGN(8);
+    PROVIDE ( _eprogram = . );
+    PROVIDE ( _stack = . );
+  } >PATCHRAM
+  _eram = ORIGIN(PATCHRAM) + LENGTH(PATCHRAM);
+  _estack = ORIGIN(PATCHRAM) + LENGTH(PATCHRAM);
+
+  .fastheap (NOLOAD) :
+  {
+    . = ALIGN(8);
+    PROVIDE ( _fastheap = . );
+    . = ALIGN(8);
+  } >CCMHEAP
+  _fasteheap = ORIGIN(CCMHEAP) + LENGTH(CCMHEAP);
+
+  /* External SRAM, used for heap memory */
+  .extdata (NOLOAD) :
+  {
+    . = ALIGN(8);
+    *(.extdata)
+    . = ALIGN(8);
+    PROVIDE ( _heap = . );
+    . = . + _Min_Heap_Size;
+  } >EXTRAM
+  _eheap = ORIGIN(EXTRAM) + LENGTH(EXTRAM);
+
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/compile.mk b/compile.mk
index 40a4c30d..fc32481d 100644
--- a/compile.mk
+++ b/compile.mk
@@ -19,7 +19,6 @@ DAISYSP      = $(BUILDROOT)/Libraries/DaisySP/Source
 CMSIS        = $(BUILDROOT)/Libraries/CMSIS/Include/
 DSPINC       = $(BUILDROOT)/Libraries/CMSIS/DSP/Include
 DSPLIB       = $(BUILDROOT)/Libraries/CMSIS/DSP/Source
-LDSCRIPT    ?= $(BUILDROOT)/Source/flash.ld
 
 # Tool path
 # TOOLROOT ?= Tools/gcc-arm-none-eabi-9-2020-q2-update/bin/
@@ -53,12 +52,31 @@ ifneq (,$(findstring soundfile,$(FAUSTOPTS)))
 CPPFLAGS    += -DSOUNDFILE
 endif
 endif
-ARCH_FLAGS = -fsingle-precision-constant -mthumb
-ARCH_FLAGS += -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
-# ARCH_FLAGS += -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16
-# ARCH_FLAGS += -mcpu=cortex-m0 -mfloat-abi=soft -msoft-float
-# ARCH_FLAGS += -march=armv7e-m+fpv5+fp.dp
-DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT=1 -D__FPU_USED=1U -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
+
+ifeq ($(PLATFORM),OWL0)
+## Flags for F1
+ARCH_FLAGS = -mcpu=cortex-m0 -mfloat-abi=soft -msoft-float
+DEF_FLAGS = -DSTM32F1XX -DARM_MATH_CM0 -D__FPU_PRESENT=0 -D__FPU_USED=0U
+LDSCRIPT    ?= $(BUILDROOT)/Source/owl0.ld
+else ifeq ($(PLATFORM),OWL1)
+## Flags for F40x
+ARCH_FLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
+DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT=1 -D__FPU_USED=1U
+LDSCRIPT    ?= $(BUILDROOT)/Source/owl1.ld
+else ifeq ($(PLATFORM),OWL2)
+## Flags for F42x/F43x
+ARCH_FLAGS = -mcpu=cortex-m4 -mfloat-abi=hard -mfpu=fpv4-sp-d16
+DEF_FLAGS = -DSTM32F4XX -DARM_MATH_CM4 -D__FPU_PRESENT=1 -D__FPU_USED=1U
+LDSCRIPT    ?= $(BUILDROOT)/Source/owl2.ld
+else ifeq ($(PLATFORM),OWL3)
+## Flags for H7
+ARCH_FLAGS = -mcpu=cortex-m7 -mfloat-abi=hard -mfpu=fpv5-d16
+DEF_FLAGS = -DSTM32H7XX -DARM_MATH_CM7 -D__FPU_PRESENT=1 -D__FPU_USED=1U
+LDSCRIPT    ?= $(BUILDROOT)/Source/owl3.ld
+endif
+
+ARCH_FLAGS += -fsingle-precision-constant -mthumb
+DEF_FLAGS +=  -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
 DEF_FLAGS += "-DPATCHNAME=\"$(PATCHNAME)\""
 # DEF_FLAGS = -DSTM32F745xx -DARM_MATH_CM7 -D__FPU_PRESENT=1 -D__FPU_USED=1U
 INC_FLAGS = -I$(BUILDROOT)/Libraries -I$(DEVICE) -I$(CMSIS) -I$(PERIPH_FILE)/inc -I$(SOURCE)

From 8b6cc15e8ad0c2db549ab24ea21487ef154fef45 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 Jan 2022 17:11:44 +0100
Subject: [PATCH 364/374] default to OWL2 platform

---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Makefile b/Makefile
index 49890508..375efe8d 100644
--- a/Makefile
+++ b/Makefile
@@ -9,7 +9,7 @@ endif
 endif
 
 ifndef PLATFORM
-  PLATFORM=OWL
+  PLATFORM=OWL2
 endif
 
 DEPS = .FORCE

From b2f141c70fe8528edd623618ae0305fd6fea4ffb Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 Jan 2022 17:36:17 +0100
Subject: [PATCH 365/374] added PLATFORM docs

---
 README.md | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/README.md b/README.md
index c2a9d5c6..81899e35 100644
--- a/README.md
+++ b/README.md
@@ -87,7 +87,7 @@ Make sure to do a `make clean` before compiling a new patch, or add `clean` to y
 * PATCHOUT: number of output channels, default 2
 * SLOT: user program slot to store patch in, default 0, use with `store`
 * TARGET: changes the output prefix, default 'patch'
-
+* PLATFORM: changes the target platform: OWL1, OWL2 (default) or OWL3
 
 All files for a patch must be copied to the `PATCHSOURCE` directory. Take care to put only files required by the patch you want to compile here.
 
@@ -158,6 +158,19 @@ Specify your patch name (and optionally the PATCHSOURCE directory) as usual, but
 * `make SOUL=Foo clean patch`
 
 
+## Target Platform
+
+Most patches will compile to run on all OWL devices by default. However there are some platform differences, notably the maximum binary size (in kilobytes):
+
+* OWL1 (Legacy OWL Pedal and OWL Modular): 64K
+* OWL2 (OWL Pedal mkII, Alchemist, Wizard, Magus, Witch, Lich): 144K
+* OWL3 (Genius, Xibeca): 80K or 512K
+
+The target platform can be selected with the `PLATFORM` option, which defaults to `OWL2`. This can create patches up to 144K in binary size. Patches over 64K will not run on OWL1 devices, and patches over 80K will not run on OWL3 devices.
+
+To verify that a patch will run on all devices you can compile with `PLATFORM=OWL1`. Patches over 64K in binary size will then fail with a link error.
+
+Alternatively, to target **exclusively** OWL3 devices you can specify `PLATFORM=OWL3`. This will primarily do two things: link the binary against a bigger D1 memory segment, and enable double precision FPU. Both of these features are only available on the Cortex M7 microcontrollers used by OWL3 devices. Patches compiled with this option will not run on OWL1 or OWL2 devices.
 
 # Examples
 

From 53657ec0c84830dca1d104d9d11f40aebfc33c72 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 Jan 2022 17:38:35 +0100
Subject: [PATCH 366/374] updated OWL3 note

---
 README.md | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/README.md b/README.md
index 81899e35..0b2385bc 100644
--- a/README.md
+++ b/README.md
@@ -170,7 +170,7 @@ The target platform can be selected with the `PLATFORM` option, which defaults t
 
 To verify that a patch will run on all devices you can compile with `PLATFORM=OWL1`. Patches over 64K in binary size will then fail with a link error.
 
-Alternatively, to target **exclusively** OWL3 devices you can specify `PLATFORM=OWL3`. This will primarily do two things: link the binary against a bigger D1 memory segment, and enable double precision FPU. Both of these features are only available on the Cortex M7 microcontrollers used by OWL3 devices. Patches compiled with this option will not run on OWL1 or OWL2 devices.
+Alternatively, to target **exclusively** OWL3 devices you can specify `PLATFORM=OWL3`. This will primarily do two things: firstly link the binary against D1 memory allowing patches up to 512K, secondly enable double precision FPU. Both of these features are only available on the Cortex M7 microcontrollers used by OWL3 devices. Patches compiled with this option will not run on OWL1 or OWL2 devices.
 
 # Examples
 

From 31ddaf370e4aa113cefb859d14696f98f0a7287c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Thu, 13 Jan 2022 17:39:20 +0100
Subject: [PATCH 367/374] writing history

---
 HISTORY.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/HISTORY.md b/HISTORY.md
index c4370150..86e2c347 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,5 +1,7 @@
 v22.2
 -----
+
+* Added PLATFORM=OWL1/2/3 build option
 * Added NoiseOscillator (whitenoise s+h)
 * Added PhaseShiftOscillator template
 * Added Biquad allpass filter configuration

From 50843575fe35ebee58d68737c373d18d0d1d6c4d Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 26 Jan 2022 10:16:34 +0100
Subject: [PATCH 368/374] removed redundant AudioBuffer* createMemoryBuffer()

---
 Source/PatchProcessor.cpp | 9 ---------
 Source/PatchProcessor.h   | 1 -
 2 files changed, 10 deletions(-)

diff --git a/Source/PatchProcessor.cpp b/Source/PatchProcessor.cpp
index 29a83062..89153bb0 100644
--- a/Source/PatchProcessor.cpp
+++ b/Source/PatchProcessor.cpp
@@ -38,15 +38,6 @@ void PatchProcessor::setPatch(Patch* p, const char* n){
   name = n;
 }
 
-AudioBuffer* PatchProcessor::createMemoryBuffer(int channels, int size){
-  MemoryBuffer* buf = new ManagedMemoryBuffer(channels, size);
-  if(buf == NULL)
-    return NULL;
-  buffers[bufferCount++] = buf;
-  buf->clear();
-  return buf;
-}
-
 void PatchProcessor::setParameterValues(int16_t *params){
   if(getProgramVector()->hardware_version == OWL_MODULAR_HARDWARE){
     for(int i=0; i<4 && i
Date: Wed, 26 Jan 2022 10:17:26 +0100
Subject: [PATCH 369/374] added BiquadFilter::getSampleRate(), streamlined
 non-arm implementation

---
 LibSource/BiquadFilter.h | 20 +++++++++++++-------
 1 file changed, 13 insertions(+), 7 deletions(-)

diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 673fe99e..0a1fe600 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -220,10 +220,15 @@ class BiquadFilter : public SignalProcessor {
     init();
   }
   virtual ~BiquadFilter(){}
+
   void setSampleRate(float sr){
     pioversr = M_PI/sr;
   }
 
+  float getSampleRate(){
+    return M_PI / pioversr;
+  }
+
   size_t getStages(){
     return stages;
   }
@@ -274,13 +279,14 @@ class BiquadFilter : public SignalProcessor {
     arm_biquad_cascade_df2T_f32(&df2, input, output, size);
 #else
     for(size_t k=0; k
Date: Wed, 26 Jan 2022 10:18:19 +0100
Subject: [PATCH 370/374] updated DcBlockingFilter, add doc reference, add
 get/setTimeConstant()

---
 LibSource/DcBlockingFilter.h | 49 ++++++++++++++++++++++++++++--------
 1 file changed, 38 insertions(+), 11 deletions(-)

diff --git a/LibSource/DcBlockingFilter.h b/LibSource/DcBlockingFilter.h
index 703ea816..0ee61575 100644
--- a/LibSource/DcBlockingFilter.h
+++ b/LibSource/DcBlockingFilter.h
@@ -5,23 +5,35 @@
 #include "SignalProcessor.h"
 
 /**
- * DC Blocking IIR filter:
- * Leaky differentiator.
+ * DC Blocking IIR filter, aka Leaky differentiator.
+ * Ref: https://www.dsprelated.com/freebooks/filters/DC_Blocker.html
  */
 class DcBlockingFilter : public SignalProcessor {
 private:
-  const float lambda;
   float x1, y1;
+  float R;
 public:
-  DcBlockingFilter(float lambda = 0.995): lambda(lambda), x1(0), y1(0) {}
+  DcBlockingFilter(float R = 0.995): R(R), x1(0), y1(0) {}
 
+  /**
+   * Get adaptation time constant in samples.
+   */
+  float getTimeConstant(){
+    return 1/(1-R); // approximate
+  }
+  /**
+   * Set adaptation time constant in samples.
+   */
+  void setTimeConstant(float tc){
+    R = (tc - 1) / tc;
+  }
   void reset(){
     x1 = y1 = 0;
   }
 
   /* process a single sample and return the result */
   float process(float x){
-    y1 = x - x1 + lambda*y1;
+    y1 = x - x1 + R*y1;
     x1 = x;
     return y1;
   }
@@ -31,7 +43,7 @@ class DcBlockingFilter : public SignalProcessor {
     float y = y1;
     while(size--){
       x = *input++;
-      y = x - x1 + lambda*y;
+      y = x - x1 + R*y;
       x1 = x;
       *output++ = y;
     }
@@ -52,8 +64,8 @@ class DcBlockingFilter : public SignalProcessor {
     process(in, out, in.getSize());
   }
 
-  static DcBlockingFilter* create(float lambda=0.995){
-    return new DcBlockingFilter(lambda);
+  static DcBlockingFilter* create(float R=0.995){
+    return new DcBlockingFilter(R);
   }
 
   static void destroy(DcBlockingFilter* obj){
@@ -65,14 +77,29 @@ class StereoDcBlockingFilter : public MultiSignalProcessor {
 private:
   DcBlockingFilter left, right;
 public:
-  StereoDcBlockingFilter(float lambda = 0.995): left(lambda), right(lambda) {}
+  StereoDcBlockingFilter(float R = 0.995): left(R), right(R) {}
+
+  /**
+   * Get adaptation time constant in samples.
+   */
+  float getTimeConstant(){
+    return left.getTimeConstant();
+  }
+  /**
+   * Set adaptation time constant in samples.
+   */
+  void setTimeConstant(float tc){
+    left.setTimeConstant(tc);
+    right.setTimeConstant(tc);
+  }
+
   void process(AudioBuffer& input, AudioBuffer& output){
     left.process(input.getSamples(LEFT_CHANNEL), output.getSamples(LEFT_CHANNEL));
     right.process(input.getSamples(RIGHT_CHANNEL), output.getSamples(RIGHT_CHANNEL));
   }
 
-  static StereoDcBlockingFilter* create(float lambda){
-    return new StereoDcBlockingFilter(lambda);
+  static StereoDcBlockingFilter* create(float R=0.995){
+    return new StereoDcBlockingFilter(R);
   }
 
   static void destroy(StereoDcBlockingFilter* obj){

From 1f20d66c6a592f55fd8cc657392e9edaa3fe11c8 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 26 Jan 2022 10:19:20 +0100
Subject: [PATCH 371/374] changed InterpolatingCircularBuffe fractional read to
 take a start position

---
 LibSource/InterpolatingCircularBuffer.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/LibSource/InterpolatingCircularBuffer.h b/LibSource/InterpolatingCircularBuffer.h
index 3bbd43fe..2736c462 100644
--- a/LibSource/InterpolatingCircularBuffer.h
+++ b/LibSource/InterpolatingCircularBuffer.h
@@ -32,8 +32,8 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer {
    * Interpolated read at fractional rate
    * @param rate read speed, in samples/sample
    */
-  void read(float* out, size_t len, float rate){
-    float pos = readpos; // quantizes fractional read pos from last read
+  void read(float* out, size_t len, float startpos, float rate){
+    float pos = startpos;
     while(len--){
       *out++ = readAt(pos);
       pos += rate;

From ac1712131fa7bdbda7e2722c22c1f87a4bed8bb9 Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 26 Jan 2022 10:43:18 +0100
Subject: [PATCH 372/374] added block-based
 AntialiasedSquareWaveOscillator::generate()

---
 LibSource/SquareWaveOscillator.h | 42 ++++++++++++++++++++++++++++++++
 1 file changed, 42 insertions(+)

diff --git a/LibSource/SquareWaveOscillator.h b/LibSource/SquareWaveOscillator.h
index 9e6fc8b5..385af3e2 100644
--- a/LibSource/SquareWaveOscillator.h
+++ b/LibSource/SquareWaveOscillator.h
@@ -59,6 +59,48 @@ class AntialiasedSquareWaveOscillator : public OscillatorTemplate= pw){
+	if(phase >= 1){
+	  // wrap phase
+	  phase -= 1;
+	  // correct current sample
+	  float t = (phase - incr) / incr;
+	  sample += t*t + t+t + 1;
+	  *dest++ = sample;
+	  sample = 1;
+	  // correct next sample
+	  t = phase / incr;
+	  sample += t+t - t*t - 1;
+	}else if(sample == 1){
+	  // correct current sample
+	  float t = (fmod(phase + 1 - pw, 1) - incr) / incr;
+	  sample -= t*t + t+t + 1;
+	  *dest++ = sample;
+	  sample = -1;
+	  // correct next sample
+	  t = fmod(phase + 1 - pw, 1) / incr;
+	  sample -= t+t - t*t - 1;
+	}else{
+	  *dest++ = sample;
+	  sample = -1;
+	}
+      }else{
+	*dest++ = sample;
+	sample = 1;
+      }
+    }
+  }
+  using OscillatorTemplate::generate;  
 };
   
 #endif /* __SquareWaveOscillator_h */

From d0c8f9f6da3a2c7d332540ab05ce5fe82ecfac7c Mon Sep 17 00:00:00 2001
From: Martin Klang 
Date: Wed, 26 Jan 2022 10:56:59 +0100
Subject: [PATCH 373/374] fix pwm on block boundary polyblep correction

---
 LibSource/SquareWaveOscillator.h | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/LibSource/SquareWaveOscillator.h b/LibSource/SquareWaveOscillator.h
index 385af3e2..6efb91b8 100644
--- a/LibSource/SquareWaveOscillator.h
+++ b/LibSource/SquareWaveOscillator.h
@@ -60,10 +60,19 @@ class AntialiasedSquareWaveOscillator : public OscillatorTemplate
Date: Wed, 26 Jan 2022 11:05:19 +0100
Subject: [PATCH 374/374] fix InterpolatingCircularBuffer fractional read test

---
 TestPatches/InterpolatingCircularBufferTestPatch.hpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/TestPatches/InterpolatingCircularBufferTestPatch.hpp b/TestPatches/InterpolatingCircularBufferTestPatch.hpp
index be478237..7ed3a04e 100644
--- a/TestPatches/InterpolatingCircularBufferTestPatch.hpp
+++ b/TestPatches/InterpolatingCircularBufferTestPatch.hpp
@@ -138,7 +138,7 @@ class InterpolatingCircularBufferTestPatch : public TestPatch {
       FloatArray output = FloatArray::create(10);
       input.ramp(0, 5);
       buffer->write(input, input.getSize());
-      buffer->read(output, output.getSize(), 0.5f);
+      buffer->read(output, output.getSize(), 0.0f, 0.5f); // read at half rate from first position
       for(size_t j=0; j<9; ++j) // not checking last value in loop
 	CHECK_CLOSE(output[j], j*0.5f, DEFAULT_TOLERANCE);
       CHECK_CLOSE(output[9], 2.0f, DEFAULT_TOLERANCE); // interpolated between 4 and 0 (wrapping)